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Re: 64 bit operations w/32 bit kernel

To: Ralf Baechle <>
Subject: Re: 64 bit operations w/32 bit kernel
From: Michael Uhler <>
Date: 30 Sep 2003 11:29:28 -0700
Cc: "Finney, Steve" <>,
In-reply-to: <>
Organization: MIPS Technologies, Inc.
Original-recipient: rfc822;
References: <> <>
On Tue, 2003-09-30 at 09:00, Ralf Baechle wrote:
> On Mon, Sep 29, 2003 at 07:31:57AM -1000, Finney, Steve wrote:
> > What would be the downside to enabling 64 bit operations in user space
> > on a 32 bit kernel (setting the PX bit in the status register?). The
> > particular issue is that I want to access 64 bit-memory mapped registers,
> > and I really need to do it as an atomic operation. I tried borrowing
> > sibyte/64bit.h from the kernel, but I get an illegal instruction on the
> > double ops.
> Common design bug in hardware, imho ...
> > Also, assuming this isn't a horrible idea, is there any obvious single
> > place where "default" values in the CP0 status register get set?
> There isn't.
> What you want really is a 64-bit kernel.  On a 64-bit kernel even for
> processes running in 32-bit address spaces (o32, N32) the processor
> will run with the UX bit enabled.  o32 userspace still lives in the
> assumption that registers are 32-bit so only those bits will be restored
> in function calls etc.  N32 (where userspace isn't ready for prime time
> yet) does guarantee that.  And N64 (userspace similarly not ready for
> prime time) obviously is fully 64-bit everything.

I don't think you want to run o32 processes with the UX bit set.  UX not
only enables 64-bit addressing (which you can, in software, make look
like 32-bit addressing), it also enables access to the 64-bit opcodes.
This means that you are going to get unexpected and potentially
unreproducible results.

N32 is a 64-bit data model with 32-bit addresses, so you're OK there.


>   Ralf

Michael Uhler, Chief Technology Officer
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