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Re: PATCH: Fix ll/sc for mips (take 3)

Subject: Re: PATCH: Fix ll/sc for mips (take 3)
From: Dominic Sweetman <>
Date: Mon, 4 Feb 2002 09:46:45 +0000
In-reply-to: <>
References: <> <> <> <> <> <> <> <> <mailpost.1012680250.7159@news-sj1-1> <>
User-agent: SEMI/1.13.7 (Awazu) CLIME/1.13.6 (中ノ庄) MULE XEmacs/21.1 (patch 14) (Cuyahoga Valley) (i386-redhat-linux) ( writes:

> Branch-likely instructions probably _do_ buy you something (at
> least, slightly less code size) on some CPUs, probably even some
> CPUs which are still being produced.

Here's how branch likely is used to improve performance in a simple
MIPS CPU, and why it has no effect on code size.

You start off with this:

  loopstart: insn 1
             insn 2
             insn last
             branch to loopstart

In small loops, the last instruction in the loop might well calculate
the branch condition, so it can't be moved into the delay slot of the
loop-closing branch.  That puts a no-op into every loop iteration.
With branch-likely, you can transform the loop to 
  loopstart: insn 1
  loop2:     insn 2
             insn last
             branch-likely loop2
             insn 1 (copy)

The nop is replaced by a duplicate instruction from the top
of the loop.  Good for performance, no effect on code size.

Builders of clever modern CPUs full of branch prediction hardware,
multiple instruction issue and instruction re-ordering find the
coupling of the branch-likely to the following instruction makes their
CPUs more complicated.  That's why MIPS have warned that the
instructions will be removed from some future version of the MIPS
instruction set.

Dominic Sweetman
Algorithmics Ltd
The Fruit Farm, Ely Road, Chittering, CAMBS CB5 9PH, ENGLAND
phone: +44 1223 706200 / fax: +44 1223 706250 / direct: +44 1223 706205

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