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Re: PATCH: Update sysdeps/mips/fpu/libm-test-ulps

To: Jakub Jelinek <>
Subject: Re: PATCH: Update sysdeps/mips/fpu/libm-test-ulps
From: Richard Henderson <>
Date: Thu, 4 Oct 2001 10:24:08 -0700
Cc: Kjeld Borch Egevang <>, "H . J . Lu" <>, GNU C Library <>, linux-mips mailing list <>
In-reply-to: <>; from on Mon, Oct 01, 2001 at 12:10:53PM +0200
References: <> <> <>
User-agent: Mutt/1.2.5i
On Mon, Oct 01, 2001 at 12:10:53PM +0200, Jakub Jelinek wrote:
> The way soft-fp interprets Quiet NaNs is not just Intel-way, e.g. SPARC,
> Alpha work the same way. E.g. on SPARC, signalling NaN is exp=max,
> where at least one of the x bits is set, quiet NaN is
> exp=max, f=.1xxxxxxxxxx...xxxxxx.
> If MIPS has it backwards,

Yes indeed.  From the Mips32 spec I have handy:

Unbiased E    f    s b1    Value V    Typical Single Bit Pattern
E_max+1     != 0   x 1     SNaN        16#7fffffff 
E_max+1     != 0   x 0     QNaN        16#7fbfffff


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