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To: "Jun Sun" <>
From: "Kevin D. Kissell" <>
Date: Mon, 25 Jun 2001 08:51:01 +0200
Cc: <>
References: <> <01ee01c0fc08$66e81e80$0deca8c0@Ulysses> <> <020c01c0fc21$51256760$0deca8c0@Ulysses> <>
> > > > Since the kernel cache attribute is never initialized before
> > > > ld_mmu_{whatever} is invoked, and since that Config field
> > > > does not have a well-defined reset state on many MIPS
> > > > CPUs, it would appear that we are in effect trusting the
> > > > bootloader to have done something reasonable like
> > > > set kseg0 to be non-cachable or write-through, either
> > > > of which would be safe for the current code.
> > >
> > > I think you just proposed a fix: check current config register
> > > when we turn off cache.  Thanks. :-)
> >
> > That's a heuristic at best.  If the config register comes up random,
> > it can appear to be sane even though the cache is in fact uninitialized.
> >
> For any practical reasons, we can assume there is a loader for Linux,
> and we can assume loader does not run with a random config register.

That's a position that would sound reasonable to someone working
on Linux for legacy DEC/SGI systems, but not one that I would
expect to satisfy someone working on embedded Linux.  It would
need to be governed by a config option, but I would think
that ultimately we need to have a Linux that can be ROMed
and branched to directly from the reset vector.  Why force
everyone doing an embedded MIPS/Linux widget to re-invent
the wheel?

            Kevin K.

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