On Mon, Oct 30, 2000 at 09:51:06AM -0800, Jun Sun wrote:
> > Could
> > there be a runtime linking thing with a cpu detection wether we
> > have ll/sc or not ?
> This is a wonderful idea. It should incorporate into future MIPS CPU
> support structure.
But what is the better alternative? Emulating ll/sc is a generic facility.
Aside of making that more efficient the only idea I have is putting entire
atomic operations into the kernel such that the standard case should result
in at most one exception to be handled in the kernel.
Btw, could somebody put a counter into the ll/sc emulator and test how
often it gets called on a R3000 machine?