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trap handler for unaligned memory read/write

Subject: trap handler for unaligned memory read/write
From: Jun Sun <>
Date: Fri, 15 Sep 2000 14:09:44 -0700
I was trying to run some PCI ether drivers and always got bus error, at
least when I use ipconfig bootp code.

However, the problem seems to be generic.

Ethernet device writes a whole packet in the memory.  Driver and network
stack code often directly dereference a pointer in to the packet. 
However, the ether header is 14 byte long.  If you align packet from the
beginning, then IP header will be off-aligned.

Any suggestions?

If this is a valid problem, I think the long term solution should be in
network code, which should not assume they can dereference on an
unaligned address.

For short-term solutions, we can have trap handler that supports the
unaligned read/write.  Does anybody know if there is such a trap handler
for MIPS?



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