> > ... Second, it changes the assumption of the icache line size to a
> > single word -- apparently, at least R3400 of DS5000/240 has an
> > icache with such a layout (DEC docs confirm it, indeed).
Yes, the original R3000 chip could be wired to produce the appearance
of multi-word lines in its I-cache, and some derivative CPUs were built
that way. Four was popular - I don't think anyone did 8.
> > Besides obvious bugfixes, it introduces two significant changes.
> > First, flush_icache_page() now performs what the name suggests,
> > i.e. flushes the instruction cache.
And while I'm here, I'll continue my lonely campaign. I suggest you
don't say "flush" because nobody knows whether it means invalidate,
write-back, or both. Instead, say "invalidate", "writeback", or
"both". Even if it means changing St Linus' function names...
 well in this case we do, because this is an I-cache and R3000s
only had write-through caches anyway. But you weren't going to
stop there, were you?