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More oddities in traps.c

To: "Linux SGI" <>
Subject: More oddities in traps.c
From: "Kevin D. Kissell" <>
Date: Fri, 21 Apr 2000 10:39:51 +0200
Cc: "Linux/MIPS fnet" <>
So while we're on the topic of cruft in arch/mips/kernel/traps.c,
does anyone know why the cache error exception vector is
overwritten with a copy of the TLB miss handler as part of
vector setup on R4xxx and R5xxx CPUs?

Kevin D. Kissell
MIPS Technologies European Architecture Lab
Tel. +
FAX. +

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