I tried sending this to David Miller at his SGI email
address, just in case it would work. Of course, it
didn't. David, if you are reading this mailing list,
I'd appreciate your comments. And anyone else
having knowledge should feel free to respond as
I don't know that you are still at SGI - indeed, with
all the changes in recent months, I would be a bit
surprised if you were - but this is the last email
address I have for you.
I'm working on cleaning up and enhancing the
MIPS/Linux code to support the new families
of CPUs coming out of MIPS Technologies Inc.
In doing so, I've come across and fixed a number
of bugs, most of which I've also passed back to
Ralf Baechle for integration with the moving
target at linux.sgi.com. But I came across
something this morning that, while not a problem
for us, puzzles me. In arch/mips/mm/r6000.c,
which has your name on it, there is a compiler
directive to use MIPS III instructions, and the
resulting code does indeed end up containing
64-bit (daddiu, etc.) instructions. I've never
actually programmed an R6000, but all of the
information I have on that processor indicates
that it is a MIPS II, 32-bit design, and that those
instructions should therefore cause exceptions.
Am I mistaken, or is that directive a bug?
Kevin D. Kissell
MIPS Technologies European Architecture Lab