> > - Support for R4000/R4400 SC/MC style second level caches. This means
> > Linux should now be working (modulo a stupid bug that kills all machines
> > that are wireing TLB entries on startup.) for machines like the
> > Mips Magnum 4000SC and the Millenium.
> If the bug is simple, how hard would it be for me to fix it? Is it
The "trivial" fix: take the code that loads the wired entries into the
TLB in version 2.1.14 and put it into 2.1.36.
The right thing is to get rid of the wired entries and map the stuff using
normal page tables. Not trivial; these are some special issues when