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Re: Delay Slot

To: linux-mips
Subject: Re: Delay Slot
From: Systemkennung Linux <>
Date: Tue, 15 Apr 1997 14:35:40 +0200 (MET DST)
In-reply-to: <> from "Miguel de Icaza" at Apr 14, 97 11:02:14 pm

> Seasoned programmers put a .set noreorder at the top of their assembly
> files and gcc __asm__ macros.

And do not to forget a .set reorder at the bottom of their __asm__
macros ...

> > And further still, some assemblers have 'noreorder' set by default,
> > most do not.  You'll need to consult the docs for the assembler you
> > are using to see which is the case.
> Hopefully, the MIPS assemblers have a nice warning system.  

They warn about some dangerous things like

        .set    at
        li      $1,42

but not

        .set    mips1
        .set    noreorder
        lw      $8,counter
        addiu   $8,1
        sw      $8,counter

which won't work on the interlockless R3000.

If you look through my code you'll find many places where I reenable
assembler reordering for just two instructions.  This is to give
the assembler a chance of putting nops necesessary for the R3000
into the object file.

> The Alpha has exactly the same problem.

But no delay slots ...

> > I was pretty ticked when I learned that MIPS assemblers move
> > instructions around on you behind your back, this is just simply
> > broken.
> You mean the usage of the at register for performing the syntetic
> instructions?  Yeah, well, I can imagine *you* did not like that :-).
> But you never liked syntetic instructions on the sparc either.

I'm similar to David in that I also usually prefer lobotomized tools
that only do what I tell them to do but the intelligence of the MIPS
assemblers makes sense.  The synthetic instructions are necessary in
order to make it possible for the assembler to generate best possible
code for both PIC/non-PIC etc. code models from the same source.
Also the assembler knows more about the object files' layout than the
compiler so it can do several optimizations that a compiler can't.


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