|Subject:||Re: Cascade interrupt|
|From:||Warner Losh <firstname.lastname@example.org>|
|Date:||Tue, 21 May 1996 16:14:43 -0600|
|In-reply-to:||Your message of Tue, 21 May 1996 21:24:25 +0200|
: PS: Rule of thumb for MIPS programmers: If it doesn't work blame the : caches ;-) Wonder if that is my floppy drive problem as well :-) :-) :-) Warner P.S. I have my ISA (well EISA) buss mapped in to an address range, but the TLB entry says that it is non-cachable. Would that still cause problems? Or is that data that is passed back a DMA thing and I need to be careful about my caches...
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