> : while playing around with the RM200 I had to find out that some of the
> : "RISC PC" class machines use the PICs in cascade mode while others don't.
> : This is completly opposed the the standard Intel PC design where the PICs
> : are always in cascade mode. So just in case if you wonder why your
> : machine never gets high interrupts (>= 8) check this.
> Hmmmm. Interesting. Was it here that I reported that I never got
> high interrupts. Just grumpy low ones that wish they could aford the
> good stuff to get high?
> If the PICs are in cascade mode, what mode are they in? And should I
> force them to be in cascade mode?
I'd assume the firmware initializes them correctly. Big trick with this
cascade mode is that the interrupt output of PIC 2 is wired to interrupt
input 2 of PIC 1 and then some cascade bit is set via software. I've
lost my data sheets when I left at Waldorf, so everything is just from
What you could try to check if you get the cadcade interrupt #2 instead
of a high interrupt. Or simply try the following change:
sb a0,%lo(PORT_BASE+0x20)(s0) # poll command
lb a0,%lo(PORT_BASE+0x20)(s0) # read result
beq a0,2,poll_second # cascade?
li s1,1 # delay slot
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Insert these two lines
* Acknowledge first pic
When PICs are in cascade mode and the handler sees and INT #2 it assumes
that it really received an high interrupt and polls the second PIC. This
change fixed it for the RM200.
Looks like it is time to get a good
> data sheet on the PICs. BTW, anybody know a good source for my opti
> chip set data sheets? After seeing the one for the Dallas Semi DS1488
> in my machine, I want them for more of my chips. That is assuming
> that Alta-vista can't help me....
Hmm, I've never tried to get data-sheets via Alta-vista. But If you
want to try, the PIC's are from Intel type number 8259. It might be
difficult to get data sheets for these chips because nowadays the PICs
are integrated into either chipsets or even the CPU.