Ralf Baechle (firstname.lastname@example.org) writes:
> > > New configuration option CONFIG_MIPS_UNCACHED. Not yet
> > > selectable due to the manuals documenting ll/sc operation
> > > as undefined for uncached memory.
> > Wouldn't it make sense then to disable CONFIG_CPU_HAS_LLSC as well?
> I'm waiting for authoritative answer from silicon guys before I
> deciede. In the past I ran kernel entirely uncached and they seemed
> to work even though the documentation made me assume the opposite.
ll/sc between CPUs certainly won't work for uncached accesses, since
they rely on the cache coherency protocols.
On a uniprocessor CPU the ll/sc link is typically broken on any
exception. You'd have to try very hard to design the CPU so that it
would work any differently for cached and uncached accesses.
The Fruit Farm, Ely Road, Chittering, CAMBS CB5 9PH, ENGLAND
phone: +44 1223 706200 / fax: +44 1223 706250 / home: +44 20 7226 0032