Difference between revisions of "Poseidon"

From LinuxMIPS
Jump to: navigation, search
(PR31700)
Line 8: Line 8:
 
'''PR31700''', Poseidon v1.5
 
'''PR31700''', Poseidon v1.5
  
The PR31700 is a 75MHz [[R3000]] (PR3901 Processor Core) with MMU, 4K Instruction / 1K Data cache. PR31700 also contains multi-channel DMA controller, ROM, Flash, RAM, DRAM, SDRAM, SRAM, and PCMCIA controller.
+
The PR31700 is a 75MHz [[R3000]] (PR3901 Processor Core) with MMU, 4K Instruction / 1K Data cache. PR31700 also contains multi-channel DMA controller, ROM, Flash, RAM, DRAM, SDRAM, SRAM, and PCMCIA controller. It is also identical to the Toshiba 3912 processor from the [[TX39XX]] family. One could speculate that Toshiba and Philips collaborated on this SoC processor.
  
 
http://www-us2.semiconductors.philips.com/pip/PR31700.html
 
http://www-us2.semiconductors.philips.com/pip/PR31700.html

Revision as of 02:50, 25 November 2004

PR31500, Poseidon v1.0

PR31500 is a 40MHz R3000 3.3V static CMOS CPU with R3000A TLB and 4K Instrution / 1K Data cache. PR31500 also contains multi-channel DMA controller, ROM, Flash, RAM, DRAM, SDRAM, SRAM, and PCMCIA controller and Dual-UART, SPI and High-speed serial interface controllers.

http://www-us2.semiconductors.philips.com/pip/PR31500.html


PR31700, Poseidon v1.5

The PR31700 is a 75MHz R3000 (PR3901 Processor Core) with MMU, 4K Instruction / 1K Data cache. PR31700 also contains multi-channel DMA controller, ROM, Flash, RAM, DRAM, SDRAM, SRAM, and PCMCIA controller. It is also identical to the Toshiba 3912 processor from the TX39XX family. One could speculate that Toshiba and Philips collaborated on this SoC processor.

http://www-us2.semiconductors.philips.com/pip/PR31700.html