Difference between revisions of "PS2"

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(ISA -> Instruction Set Architecture, other small cleanups)
(32 Mb -> 32MB. 32Mb isn't enough ;-))
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* Toshiba 300MHz [[R5900]] [[Instruction_Set_Architecture#MIPS_IV|MIPS IV]] core, FPU, 16 KB 2-way set-associative I-CACHE and an 8 KB 2-way set-associative D-CACHE, along with a 16 KB data scratchpad RAM; set of 128-bit multimedia extensions
 
* Toshiba 300MHz [[R5900]] [[Instruction_Set_Architecture#MIPS_IV|MIPS IV]] core, FPU, 16 KB 2-way set-associative I-CACHE and an 8 KB 2-way set-associative D-CACHE, along with a 16 KB data scratchpad RAM; set of 128-bit multimedia extensions
 
* 128bit Emotion Engine: two 128-bit VLIW vector units: VU0, VU1; 10 DMA channels; MPEG decoder
 
* 128bit Emotion Engine: two 128-bit VLIW vector units: VU0, VU1; 10 DMA channels; MPEG decoder
* 32 Mb PC800 Direct Rambus (Direct RDRAM) memory
+
* 32MB PC800 Direct Rambus (Direct RDRAM) memory
 
* Sony Graphics Synthesizer™ graphic processor at 150MHz, 4Mb of 1024bit eDRAM
 
* Sony Graphics Synthesizer™ graphic processor at 150MHz, 4Mb of 1024bit eDRAM
 
* DVD ROM
 
* DVD ROM

Revision as of 14:02, 2 January 2005

  • Toshiba 300MHz R5900 MIPS IV core, FPU, 16 KB 2-way set-associative I-CACHE and an 8 KB 2-way set-associative D-CACHE, along with a 16 KB data scratchpad RAM; set of 128-bit multimedia extensions
  • 128bit Emotion Engine: two 128-bit VLIW vector units: VU0, VU1; 10 DMA channels; MPEG decoder
  • 32MB PC800 Direct Rambus (Direct RDRAM) memory
  • Sony Graphics Synthesizer™ graphic processor at 150MHz, 4Mb of 1024bit eDRAM
  • DVD ROM
  • USB

External links