- V6, a 32 MB first generation card,
- V8, a 128 MB first generation card,
- V10, a 32 MB second generation card,
- V12, a 128 MB second generation card (the only one being installed in Tezros).
The first generation cards are somewhat slower, but there are no other significant differences (or so it seems).
The cards consist of two chips. Buzz is the geometry and rasterization engine, and PB&J is the graphics backend (which actually sends the data to the display). Memory is shared between all card functions (framebuffer, FIFOs, OpenGL display lists, pbuffers, textures, OpenGL contexts and so on).
The rasterizer in Buzz can, in addition to standard Gouraud shading, texturing and alpha blending, perform a pretty unique function that is usually simulated with fragment programs in the PC world: per-fragment specular lighting. It means that the Buzz rasterizer unit interpolates normals and then evaluates a specular lighting equation for each generated fragment (pixel before writing to framebuffer), adding the result to the normally evaluated colors and texture lookup results.
The depth buffer maintained by Buzz is also rumored to be rather atypical. Namely, it reportedly remembers not the 1/w (W-buffer) or Z/w (Z-buffer, OpenGL standard) but the object Z. This approach is expensive, but it allows the depth buffer to have an uniform resolution in the whole view volume.
The card implements OpenGL in firmware (actually, Buzz microcode) so it can be used as a 3D accelerator right after initialization. Indeed, both PROM and IRIX htport (host textport) draw their screens using OpenGL commands (invariably, very small GL_QUADS). Even letters are decomposed to pixels, and each pixel is drawn as a single quad primitive which incidentally explains the geological slowness of PROM console on Odyssey.
Normally, Xsgi paints letters using OpenGL stipples (loads the letters into the stipple and then draws a quad using this stipple). This is obviously more efficient, and will be probably the solution implemented in Linux Odyssey driver.
All commands to the Buzz chip, along with PIO data (Programmed Input/Output, as opposed to DMA), are entered by the host processor to the CFIFO (Command FIFO). The FIFO is located at 0x110000 in card space. The commands are formed into tokens, first a single word (32-bit) is written that signals a start of a new token and also contains the token code (tokens generally are equivalent to a single OpenGL function, like glBegin, glEnd, glColor3ub or glVertex2i), and optionally a few more words (usually 32-bit, but a few 64-bit ones were also encountered) being the parameters for these tokens (most commonly in the same order and form as in corresponding OpenGL function).
Commands for the PB&J (like PseudoColor palette, cursor and modelines) are written at 0x400000 in card space, which is an entry to the DFIFO. The high 32 bits of a DFIFO write denote the register to write, while to low 32 bits are the written value. The DFIFO status register is located at 0x00106c.
There is also a standard issue SGI MicroLAN controller at 0x0010dc used to identify the card through its NIC. Equally unsurprising is the set of XIO widget registers at 0x000000. There are also some other registers, still unknown, that are extensively utilized during the initialization sequence and are probably related to SDRAM controller initialization. Possibly also DMA is realized in these registers.