Marvell system controllers - Revision history

Alec v: /* Galileo GT64010 */

2012-08-28T20:49:31Z

‎Galileo GT64010

2012-08-28T20:47:33Z

‎Galileo GT64010

2012-08-16T10:41:45Z

‎Galileo GT64120

2012-06-28T20:51:12Z

‎Marvell Horizon =

2012-06-28T20:50:56Z

‎Marvell Horizon III

2011-05-13T20:06:07Z

64011

2007-10-02T08:56:28Z

‎Galileo GT64010

2007-10-02T08:36:15Z

Horizon III

2006-11-18T13:23:01Z

32011

2006-08-23T14:26:27Z

‎Galileo GT-64111

@@ Line 3: / Line 3: @@
 ==Galileo GT64010 ==
-GT-64010/64010A PCI Interface and System Controller for MIPS 4600/4650/4700/5000/5260/5270. The GT-64010 single-chip PCI-system controller offers a 64-bit SysAD CPU interface, a 4-channel DMA controller, a EDO/FPM DRAM and devices controller, 4-channel Timer, and a PCI interface. This chip is used in the [[Cisco]] 3600 and 7200 routers.
+GT-64010/64010A PCI Interface and System Controller for MIPS 4600/4650/4700/5000/5260/5270. The GT-64010 single-chip PCI-system controller offers a 64-bit SysAD CPU interface, a 4-channel DMA controller, a EDO/FPM DRAM and devices controller, 4-channel Timer, and a PCI interface. This chip is used in the [[Cisco]] 3600 routers and in some processors for the CISCO 7200 routers.
 GT-64012 is a Cache Controller.

@@ Line 3: / Line 3: @@
 ==Galileo GT64010 ==
-GT-64010/64010A PCI Interface and System Controller for MIPS 4600/4650/4700/5000/5260/5270. The GT-64010 single-chip PCI-system controller offers a 64-bit SysAD CPU interface, a 4-channel DMA controller, a DRAM and devices controller, 4-channel Timer, and a PCI interface. This chip is used in the [[Cisco]] 3600 and 7200 routers.
+GT-64010/64010A PCI Interface and System Controller for MIPS 4600/4650/4700/5000/5260/5270. The GT-64010 single-chip PCI-system controller offers a 64-bit SysAD CPU interface, a 4-channel DMA controller, a EDO/FPM DRAM and devices controller, 4-channel Timer, and a PCI interface. This chip is used in the [[Cisco]] 3600 and 7200 routers.
 GT-64012 is a Cache Controller.

@@ Line 21: / Line 21: @@
 [[Image:GT-64120.jpg|thumb|right|GT-64120]]The GT64120 from Galileo Technology Inc. (acquired by Marvell in 2001) are designed to connect a high speed processor [[SysAD]] bus to peripheral devices. It connects the CPU to an asynchronous local device bus which is used to interface with the boot EPROM, Serial I/O, and Flash memory. It also has a built-in DRAM controller for interfacing the processor to the onboard SDRAM main memory with minimal glue logic. In addition, the chip provides a CPU bus to PCI bus bridge.
-This chip is used in the [[Mips_Malta]], IDT7M9535 IDT7M9536 IDT7M9537 evaluation boards, Galileo EV-64120 evaluation boards and in the [[Cisco]] 2800, 3745 and 7200 routers.
+This chip is used in the [[MIPS Malta]], IDT7M9535 IDT7M9536 IDT7M9537 evaluation boards, Galileo EV-64120 evaluation boards and in the [[Cisco]] 2800, 3745 and 7200 routers.
 == Galileo GT-64111 ==

@@ Line 45: / Line 45: @@
 [[Ocelot_3]]
-== Marvell Horizon ===
+== Marvell Horizon ==
 The Marvell Horizon GT-96100A communications controller is a single-chip controller for 64-bit MIPS CPUs including the PMC Sierra RM52x1A and RM7000A/B/C RM7000A/B/C. Key features:

← Older revision		Revision as of 20:50, 28 June 2012
Line 44:		Line 44:

	[[Ocelot_3]]		[[Ocelot_3]]
		+
		+	== Marvell Horizon ===
		+
		+	The Marvell Horizon GT-96100A communications controller is a single-chip controller for 64-bit MIPS CPUs including the PMC Sierra RM52x1A and RM7000A/B/C RM7000A/B/C. Key features:
		+	* 64-bit SysAD CPU interface
		+	* SDRAM 64-bit memory controller with up to 4GB memory space, ECC
		+	* two 32-bit or one 64-bit PCI 2.1 bus
		+	* Backward software compatibility with GT-64010A, GT-64011, GT-64120
		+	* 2 10/100 Ethernet MAC controllers
		+	* 20 Serial DMA channels
		+	* 8 Multi Protocol Serial Controllers
		+	* 4 FlexTDM channels

	== Marvell Horizon III ==		== Marvell Horizon III ==

@@ Line 7: / Line 7: @@
 GT-64012 is a Cache Controller.
-GT-64011 PCI Interface and System Controller for IDT 4640.
+GT-64011 PCI Interface and System Controller for IDT 4640/50 CPUs with 32-bit SysAD bus. This chip is used also in  [[Cobalt|Cobalt RaQ]] with [[R5000|RM5230]] CPU.
-GT-64014 is a Low Cost Single-Chip System Controller for R4640 CPUs.
+GT-64014 is a Low Cost Single-Chip System Controller for R4640 CPUs w/o PCI bus.
 GT-32011 is low-cost   system controller designed for use with the IDT RC30xx [[IDT Riscore|RISController]]. The GT32011 offers memory control, DMA interfaces, timers and system control logic.
@@ Line 27: / Line 27: @@
 GT-64111 is a Universal PCI System Controller for 64-bit MIPS CPUs (32-bit [[SysAD]] bus) w/ Integrated EDO DRAM Controller. Supports QED RM523x, IDT RC4640/50 and NEC VR4300. This device contains all the key system peripherals needed to build a 64-bit MIPS system: DRAM controller, device controller, four DMA engines, one 32-bit wide timer/counter and three 24-bit wide timer/counters, and a PCI 2.1 interface.
-This chip is used in [[Cobalt]].
+This chip is used in [[Cobalt|Cobalt RaQ2]].
 GT-64115 supports SDRAM. This chip is used in the [[LASAT]] firewall.

@@ Line 11: / Line 11: @@
 GT-64014 is a Low Cost Single-Chip System Controller for R4640 CPUs.
-GT-32011 is low-cost   system controller designed for use with the IDT RC30xx RISController. The GT32011 offers memory control, DMA interfaces, timers and system control logic.
+GT-32011 is low-cost   system controller designed for use with the IDT RC30xx [[IDT Riscore|RISController]]. The GT32011 offers memory control, DMA interfaces, timers and system control logic.
 == Galileo GT64060 ==

← Older revision		Revision as of 08:36, 2 October 2007
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	[[Ocelot_3]]		[[Ocelot_3]]
		+
		+	== Marvell Horizon III ==
		+
		+	The Marvell Horizon III family consists of two products: the Horizon-MV96340 supporting 64 Bit MIPS microprocessors and the Horizon-MV96360 supporting 64-bit PowerPC microprocessors.

	== External links ==		== External links ==