Difference between revisions of "Marvell system controllers"
(Marvel PCI IDs) |
m (format) |
||
| Line 1: | Line 1: | ||
http://www.marvell.com/products/communication/ | http://www.marvell.com/products/communication/ | ||
| − | Galileo GT64010 | + | ==Galileo GT64010 == |
GT-64010A PCI Interface and System Controller for MIPS 4600/4650/4700/5000/5260/5270. GT-64012 is a Cache Controller. | GT-64010A PCI Interface and System Controller for MIPS 4600/4650/4700/5000/5260/5270. GT-64012 is a Cache Controller. | ||
| Line 9: | Line 9: | ||
GT-64014 is a Low Cost Single-Chip System Controller for R4640 CPUs. | GT-64014 is a Low Cost Single-Chip System Controller for R4640 CPUs. | ||
| − | Galileo GT64060 | + | == Galileo GT64060 == |
GT-64060 PCIntegrator : High-Integration PCI Bridge/Memory Controller | GT-64060 PCIntegrator : High-Integration PCI Bridge/Memory Controller | ||
| − | Galileo GT64120 | + | == Galileo GT64120 == |
The GT64120 from Galileo Technology Inc. (acquired by Marvel in 2001) are designed to connect a high speed processor [[SysAD]] bus to peripheral devices. It connects the CPU to an asynchronous local device bus which is used to interface with the boot EPROM, Serial I/O, and Flash memory. It also has a built-in DRAM controller for interfacing the processor to the onboard SDRAM main memory with minimal glue logic. In addition, the chip provides a CPU bus to PCI bus bridge. | The GT64120 from Galileo Technology Inc. (acquired by Marvel in 2001) are designed to connect a high speed processor [[SysAD]] bus to peripheral devices. It connects the CPU to an asynchronous local device bus which is used to interface with the boot EPROM, Serial I/O, and Flash memory. It also has a built-in DRAM controller for interfacing the processor to the onboard SDRAM main memory with minimal glue logic. In addition, the chip provides a CPU bus to PCI bus bridge. | ||
| Line 19: | Line 19: | ||
This chip is used in the [[Mips_Malta]], IDT7M9535 IDT7M9536 IDT7M9537 evaluation boards, Galileo EV-64120 evaluation boards and in the CISCO 7200 routers. | This chip is used in the [[Mips_Malta]], IDT7M9535 IDT7M9536 IDT7M9537 evaluation boards, Galileo EV-64120 evaluation boards and in the CISCO 7200 routers. | ||
| − | Galileo GT-64111 | + | == Galileo GT-64111 == |
GT-64111 is a Universal PCI System Controller for 64-bit MIPS CPUs (32-bit [[SysAD]] bus) w/ Integrated EDO DRAM Controller. Supports QED RM523x, IDT RC4640/50 and NEC VR4300. This device contains all the key system peripherals needed to build a 64-bit MIPS system: DRAM controller, device controller, DMA engines, timer/counters, and a PCI 2.1 interface. | GT-64111 is a Universal PCI System Controller for 64-bit MIPS CPUs (32-bit [[SysAD]] bus) w/ Integrated EDO DRAM Controller. Supports QED RM523x, IDT RC4640/50 and NEC VR4300. This device contains all the key system peripherals needed to build a 64-bit MIPS system: DRAM controller, device controller, DMA engines, timer/counters, and a PCI 2.1 interface. | ||
| Line 25: | Line 25: | ||
This chip is used in [[Cobalt]]. | This chip is used in [[Cobalt]]. | ||
| − | Galileo Discovery GT64260 | + | == Galileo Discovery GT64260 == |
| − | Marvell Discovery II MV64340 | + | == Marvell Discovery II MV64340 == |
Ocelot-C, [[Jaguar_ATX]] | Ocelot-C, [[Jaguar_ATX]] | ||
| − | Marvell Discovery III MV64440 | + | == Marvell Discovery III MV64440 == |
[[Ocelot_3]] | [[Ocelot_3]] | ||
| Line 37: | Line 37: | ||
== Extelal links == | == Extelal links == | ||
| − | [http://www.pcidatabase.com/vendor_details.php?id=957 Marvel PCI IDs] | + | * [http://www.pcidatabase.com/vendor_details.php?id=957 Marvel PCI IDs] |
| + | * [http://www.linux-mips.org/cvsweb/linux/Documentation/mips/ Documentation/mips/GT64120.README] | ||
Revision as of 06:59, 1 August 2005
http://www.marvell.com/products/communication/
Contents |
Galileo GT64010
GT-64010A PCI Interface and System Controller for MIPS 4600/4650/4700/5000/5260/5270. GT-64012 is a Cache Controller.
GT-64011 PCI Interface and System Controller for IDT 4640.
GT-64014 is a Low Cost Single-Chip System Controller for R4640 CPUs.
Galileo GT64060
GT-64060 PCIntegrator : High-Integration PCI Bridge/Memory Controller
Galileo GT64120
The GT64120 from Galileo Technology Inc. (acquired by Marvel in 2001) are designed to connect a high speed processor SysAD bus to peripheral devices. It connects the CPU to an asynchronous local device bus which is used to interface with the boot EPROM, Serial I/O, and Flash memory. It also has a built-in DRAM controller for interfacing the processor to the onboard SDRAM main memory with minimal glue logic. In addition, the chip provides a CPU bus to PCI bus bridge.
This chip is used in the Mips_Malta, IDT7M9535 IDT7M9536 IDT7M9537 evaluation boards, Galileo EV-64120 evaluation boards and in the CISCO 7200 routers.
Galileo GT-64111
GT-64111 is a Universal PCI System Controller for 64-bit MIPS CPUs (32-bit SysAD bus) w/ Integrated EDO DRAM Controller. Supports QED RM523x, IDT RC4640/50 and NEC VR4300. This device contains all the key system peripherals needed to build a 64-bit MIPS system: DRAM controller, device controller, DMA engines, timer/counters, and a PCI 2.1 interface.
This chip is used in Cobalt.
Galileo Discovery GT64260
Marvell Discovery II MV64340
Ocelot-C, Jaguar_ATX
