M14Kc

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General Information

The M14Kc processor core is a superset of the popular MIPS32® 4KEc™ core, enhanced with additional features such as reduced interrupt latency, enhanced MMU, parity support, comprehensive debug capabilities and AHB-Lite bus interface unit.

The M14Kc core implements the MIPS32 Release 2 Architecture with a 5-stage pipeline design delivering performance efficiency of 1.5 DMIPS/MHz

The M14Kc core is one of the first MIPS cores to incorporate the microMIPS™ code compression Instruction Set Architecture (ISA).

In addition, the M14Kc includes a MIPS32 compatible instruction decoder. The M14Kc offers a high-performance, compact, low-power design that delivers a superior solution for cost-sensitive embedded applications such as home entertainment, personal entertainment and home networking.


Linux Support

Support for both MIPS32 and microMIPS are available in Linux kernels version 2.6


External Links

MIPS32® M14Kc™

MIPS32® Linux

MIPS32® SEAD-3