Difference between revisions of "Loongson"

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m (Loongson 2E)
(/proc/cpuinfo from latest kernel version.)
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=== Appearance to Operating System ===
 
=== Appearance to Operating System ===
  
The following shows the contents of /proc/cpuinfo using Linux kernel 2.6.18.1-fl2f-v1.02
+
The following shows the contents of /proc/cpuinfo using Linux kernel 2.6.35
  
 
  $ cat /proc/cpuinfo
 
  $ cat /proc/cpuinfo
  system type            : lemote-fulong
+
  system type            : lemote-fuloong-2f-box
 
  processor              : 0
 
  processor              : 0
  cpu model              : Godson2 V0.3  FPU V0.1
+
  cpu model              : ICT Loongson-2 V0.3  FPU V0.1
  BogoMIPS              : 532.48
+
  BogoMIPS              : 530.43
 
  wait instruction      : no
 
  wait instruction      : no
 
  microsecond timers    : yes
 
  microsecond timers    : yes
 
  tlb_entries            : 64
 
  tlb_entries            : 64
 
  extra interrupt vector : no
 
  extra interrupt vector : no
  hardware watchpoint    : no
+
  hardware watchpoint    : yes, count: 0, address/irw mask: []
 
  ASEs implemented      :
 
  ASEs implemented      :
 +
shadow register sets  : 1
 +
core                  : 0
 
  VCED exceptions        : not available
 
  VCED exceptions        : not available
 
  VCEI exceptions        : not available
 
  VCEI exceptions        : not available

Revision as of 14:33, 4 September 2010

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Loongson 2E

Loongson 2E was designed by ICT (Institute of Computing Technology), a department of The Chinese Academy of Sciences, helped and manufactured by STMicroelectronics.

ST Generic Part Number: STLS2E02

Features

Microarchitecture:

  • 64 bit
  • 9 pipeline stages
  • 4-issue Out-Of-Order Executive
  • 2 ALU, 2 FALU, 1 SIMD, 1 Load/Store Units

ISA: MIPS III

Cache: 64KB L1 data, 64KB L1 instruction, on-chip 512KB L2.

Clock Frequency: 600MHz - 800MHz.

TDP: 4 Watt at 700MHz

Integrated: DDR-333 memory controller.

Highlights

  • ST's Leading Edge 90nm process.
  • Some new instructions: Allow write to register directly without MFLO or MFHI.
  • Some new instructions: MADD.[S|D] MSUB.[S|D] NMADD.[S|D] NMSUB.[S|D].
  • Some new SIMD instructions: similar to MMX, using FPU for parallel fixed-point arithmetic.
  • An Execution bit: help OS to protect from buffer-flow attack.

Devices based on this CPU

Processor documentation

Chinese version

English version

Loongson 2F

Loongson 2F is the latest processor in Loongson 2 Family. Also manufactured by STMicroelectronics.

It is identical to the Loongson 2E with several improvements:

  • Higher Clock Frequency: 1.2GHz maximum
  • Advanced power control technology: less than 6 Watt under 1GHz in the same 90nm
  • Integrated DDR2 controller
  • Integrated northbridge providing faster IO (compared with former PCI bus) with PCI-X 66 bus
  • Smaller Packaging.

Devices based on this CPU

Processor documentation

Chinese version

English version

Appearance to Operating System

The following shows the contents of /proc/cpuinfo using Linux kernel 2.6.35

$ cat /proc/cpuinfo
system type            : lemote-fuloong-2f-box
processor              : 0
cpu model              : ICT Loongson-2 V0.3  FPU V0.1
BogoMIPS               : 530.43
wait instruction       : no
microsecond timers     : yes
tlb_entries            : 64
extra interrupt vector : no
hardware watchpoint    : yes, count: 0, address/irw mask: []
ASEs implemented       :
shadow register sets   : 1
core                   : 0
VCED exceptions        : not available
VCEI exceptions        : not available

Optimizing GNU/Linux distributions for Loongson 2F

Loongson2f software works considerably faster if compiled with the correct flags. Also, some flags are required to work around processor bugs early in the production runs.

Contributing

See also