Difference between revisions of "LR33020"
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== LR33020 == | == LR33020 == | ||
| − | LR33020 GraphX is a processor designed for X-Terminal systems by LSI Logic. It | + | LR33020 GraphX (LR33K) is a processor designed for X-Terminal systems by LSI Logic. It features: |
| + | * [[R3000]] CPU core | ||
| + | * Integrated caches | ||
| + | * Write buffers | ||
| + | * Memory controllers | ||
| + | * Dedicated 2D graphics hardware as COP2. (PS/2 port too) | ||
| + | * 64-bit data path | ||
| + | |||
| + | Other built in hardware include: | ||
| + | * BitBlt coprocessor | ||
| + | * DMA channels, | ||
| + | * Video FIFO | ||
| + | * PS/2 ports | ||
| + | * Support for ethernet. | ||
| + | * It supports mono, 2-bit and 4-bit grayscale and 8-, 16- and 32-bit color. | ||
The processor has probably no MMU or FPU. | The processor has probably no MMU or FPU. | ||
| + | |||
| + | The original LSI's [[PMON]] firmware contains some support for this CPU. The ''lr33020.h'' header file looks interesting. | ||
== Links == | == Links == | ||
| − | http://203.162.7.79/ieee/pdf/disk_38/392/4763/358_363_The%20LR33020%20GraphX%20proces.pdf | + | * http://203.162.7.79/ieee/pdf/disk_38/392/4763/358_363_The%20LR33020%20GraphX%20proces.pdf |
| − | http://203.162.7.79/ieee/pdf/disk_57/442/6840/205_208_The%20architecture%20of%20the%20L.pdf | + | * http://203.162.7.79/ieee/pdf/disk_57/442/6840/205_208_The%20architecture%20of%20the%20L.pdf |
| + | * [http://tekxp-linux.hopto.org/pmwiki/pmwiki.php/Hardware/Hardware Tektronix TekXpess X terminals] | ||
| + | * http://www.cse.unsw.edu.au/~cs9242/src/mipsL4/src/lib32/libc/cp2supp.S | ||
| + | * http://www.hotchips.org/archives/hc4/2_Mon/HC4.S3/HC4.3.2.pdf | ||
Latest revision as of 18:04, 2 October 2007
[edit] LR33020
LR33020 GraphX (LR33K) is a processor designed for X-Terminal systems by LSI Logic. It features:
- R3000 CPU core
- Integrated caches
- Write buffers
- Memory controllers
- Dedicated 2D graphics hardware as COP2. (PS/2 port too)
- 64-bit data path
Other built in hardware include:
- BitBlt coprocessor
- DMA channels,
- Video FIFO
- PS/2 ports
- Support for ethernet.
- It supports mono, 2-bit and 4-bit grayscale and 8-, 16- and 32-bit color.
The processor has probably no MMU or FPU.
The original LSI's PMON firmware contains some support for this CPU. The lr33020.h header file looks interesting.
[edit] Links
- http://203.162.7.79/ieee/pdf/disk_38/392/4763/358_363_The%20LR33020%20GraphX%20proces.pdf
- http://203.162.7.79/ieee/pdf/disk_57/442/6840/205_208_The%20architecture%20of%20the%20L.pdf
- Tektronix TekXpess X terminals
- http://www.cse.unsw.edu.au/~cs9242/src/mipsL4/src/lib32/libc/cp2supp.S
- http://www.hotchips.org/archives/hc4/2_Mon/HC4.S3/HC4.3.2.pdf
