Difference between revisions of "LR33020"
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== Links == | == Links == | ||
| − | http://203.162.7.79/ieee/pdf/disk_38/392/4763/358_363_The%20LR33020%20GraphX%20proces.pdf | + | * http://203.162.7.79/ieee/pdf/disk_38/392/4763/358_363_The%20LR33020%20GraphX%20proces.pdf |
| − | http://203.162.7.79/ieee/pdf/disk_57/442/6840/205_208_The%20architecture%20of%20the%20L.pdf | + | * http://203.162.7.79/ieee/pdf/disk_57/442/6840/205_208_The%20architecture%20of%20the%20L.pdf |
Revision as of 14:44, 17 January 2005
LR33020
LR33020 GraphX is a processor designed for X-Terminal systems by LSI Logic. It has a R3000 CPU core, integrated caches, write buffers, memory controllers and dedicated 2D graphics hardware. Other hardware built in is a bitblt coprocessor, DMA channels, 64-bit data path, video FIFO, PS/2 ports, support for ethernet. It supports mono, 2-bit and 4-bit grayscale and 8-, 16- and 32-bit color.
The processor has probably no MMU or FPU.
