Difference between revisions of "Aptiv"

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m (Categorise as MIPS32 Release 3)
(proAptiv and interAptiv are supported in the latest mainline kernel)
 
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== Linux support ==
 
== Linux support ==
Patches for Aptiv support are available in the IMG mti branches of the [[LinuxMipsOrg|LMO]] [http://git.linux-mips.org/ git repository], and are in the process of being submitted.
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The proAptiv and interAptiv cores are supported in the mainline Linux kernel since <b>3.14-rc1</b>
  
 
== See also ==
 
== See also ==

Latest revision as of 13:13, 11 February 2014

MIPS announced the Aptiv product line on May 10, 2012. The Aptiv series are MIPS32 Release 3 and consists of three family members:

  • proAptiv: I/O coherence manager (CM), Global Interrupt Controller (GIC), FPU, MIPS16e, multi-core
  • interAptiv: I/O coherence manager (CM), Global Interrupt Controller (GIC), FPU multi-core, multi-thread (MT)
  • microAptiv: microMIPS, DSP ASE Rev 2.
    • A standard MIPS TLB and a simpler segmented MMU are synthesizable options of the core, giving two variants of core - the MCU (not Linux capable) and the MPU (Linux capable). There is no FPU option for the microAptiv.

Linux support

The proAptiv and interAptiv cores are supported in the mainline Linux kernel since 3.14-rc1

See also