Difference between revisions of "4K"

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= 4K =
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The MIPS '''4K''' series is MIPS Technologies's low end [[MIPS32]] synthesizable.
  
The MIPS '''4K''' series is MIPS Technologies low end, synthesizable core implementing the [[MIPS32]] architecture.
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[http://www.mips.com/products/processors/hard-ip-cores/4kc-hard-ip-core/ MIPS32 4Kc Family]
  
[http://www.mips.com/content/Products/Cores/32-BitCores/MIPS324KFamily/ProductCatalog/P_MIPS324KFamily/productBrief MIPS32® 4K™ Family]
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* 4Kp core - basic version with iterative multiply and FMT MMU
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* 4Km core - 4Kp core plus fast Multiply/Divide Unit
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* 4Kc core - 4Km core plus TLB MMU
  
[http://vlad.org.ua/adm5120/datasheet/4Kc_SoftwareUsersManual_01.17.pdf Datasheet]
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The 4Kc CPU supports:
  
* 4Kpâ„¢ core - basic version with iterative multiply and FMT MMU
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* [[Instruction_Set_Architecture#MIPS32|MIPS32]] compatible instruction set and priveleged resource architecture
* 4Km® core - 4Kp core plus fast Multiply/Divide Unit  
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** Instruction and Data watch CP0 registers for software breakpoints
* 4Kc® core - 4Km core plus TLB MMU
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** Separate interrupt exeption vector
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* Memory Management Unit
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** 16 dual-entry MIPS32 style [[TLB]] with variable page sizes
  
 
= 4KE =
 
= 4KE =
  
[http://www.mips.com/content/Products/Cores/32-BitCores/MIPS324KEFamily/ProductCatalog/P_MIPS324KEFamily/productBrief MIPS32® 4KE™ Family]
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[http://www.mips.com/products/processors/hard-ip-cores/4kec-hard-ip-cores/ MIPS32 4KEc Family]
  
 
== Linux support ==
 
== Linux support ==
 
The 4K and 4KE are fully supported.
 
The 4K and 4KE are fully supported.
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== See also ==
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* [[Prefetching]] The use of the ''pref'' instruction in Linux.

Latest revision as of 16:19, 3 January 2009

The MIPS 4K series is MIPS Technologies's low end MIPS32 synthesizable.

MIPS32 4Kc Family

  • 4Kp core - basic version with iterative multiply and FMT MMU
  • 4Km core - 4Kp core plus fast Multiply/Divide Unit
  • 4Kc core - 4Km core plus TLB MMU

The 4Kc CPU supports:

  • MIPS32 compatible instruction set and priveleged resource architecture
    • Instruction and Data watch CP0 registers for software breakpoints
    • Separate interrupt exeption vector
  • Memory Management Unit
    • 16 dual-entry MIPS32 style TLB with variable page sizes

4KE

MIPS32 4KEc Family

Linux support

The 4K and 4KE are fully supported.

See also

  • Prefetching The use of the pref instruction in Linux.