24K - Revision history

Kevin.dankwardt: /* External Links */

2013-01-23T19:54:04Z

‎External Links

Ralf: /* General Information */

2012-08-16T10:43:56Z

‎General Information

Alec v: links, cleaning

2010-08-19T13:48:03Z

links, cleaning

Alec v: Revert to 19:23, 25 November 2006

2007-04-13T18:22:14Z

Revert to 19:23, 25 November 2006

Alec v: merge with MIPS 24K

2006-11-25T19:23:38Z

merge with MIPS 24K

Ralf: Mark article as stub.

2006-05-16T12:09:06Z

Mark article as stub.

Ralf at 12:49, 31 May 2005

2005-05-31T12:49:39Z

New page

The MIPS '''24K''' and '''24KE''' series of cores are currently MIPS Technologies's high-end synthesizable 32-bit cores.

== Linux support ==
Linux 2.4 and 2.6 support the 24K since 2005-01-19. Linux 2.6 adds support for the 24KE including it's [[Instruction_Set_Architecture#DSP_ASE|DSP ASE]] on 2005-05-31.

@@ Line 29: / Line 29: @@
 == External Links ==
-* [http://www.mips.com/products/cores/32-64-bit-cores/mips32-24k/ MIPS 24K]
+* [http://www.mips.com/products/processor-cores/classic/mips32-24k/ MIPS 24K]
-* [http://www.mips.com/products/cores/32-64-bit-cores/mips32-24ke/ MIPS 24Ke]

@@ Line 1: / Line 1: @@
-== General Information ==
+The MIPS '''24K''' and '''24KE''' series of cores are two of MIPS Technologies's synthesizable 32-bit cores.
-−
-The MIPS '''24K''' and '''24KE''' series of cores are currently MIPS Technologies's high-end synthesizable 32-bit cores.
 The [[Instruction_Set_Architecture#MIPS32|MIPS32]] 24K core family is targeted at high-volume applications such as broadband access, wireless, networking, digital television and office automation. It includes the '''24Kc''', '''24Kc Pro''', '''24Kf''' and '''24Kf Pro''' versions, and offers performance up to 625 MHz worst-case in a 0.13-micron process, the highest frequency available in 32-bit synthesizable cores for embedded markets. Designers have the flexibility to optimize for speed, area or power to obtain 2.8mm2 core-only size, 0.58 mW/MHz, or up to 900 Dhrystone MIPS performance.
-The MIPS32 24K [[Mips Malta|Malta]] processor has a 64KB primary instruction cache and (cacheline size 32 bytes) and 64KB data cache (cacheline size 32 bytes). This processor has 32 TLB entries. It can operate in BE or LE mode. The processor speed is 25 Mhz.
+The MIPS32 24K [[MIPS Malta|Malta]] processor has a 64KB primary instruction cache and (cacheline size 32 bytes) and 64KB data cache (cacheline size 32 bytes). This processor has 32 TLB entries. It can operate in BE or LE mode. The processor speed is 25 Mhz.
 == Linux Support ==

@@ Line 5: / Line 5: @@
 The [[Instruction_Set_Architecture#MIPS32|MIPS32]] 24K core family is targeted at high-volume applications such as broadband access, wireless, networking, digital television and office automation. It includes the '''24Kc''', '''24Kc Pro''', '''24Kf''' and '''24Kf Pro''' versions, and offers performance up to 625 MHz worst-case in a 0.13-micron process, the highest frequency available in 32-bit synthesizable cores for embedded markets. Designers have the flexibility to optimize for speed, area or power to obtain 2.8mm2 core-only size, 0.58 mW/MHz, or up to 900 Dhrystone MIPS performance.
-The MIPS32Â® 24K&trade; [[Mips Malta|Malta]] processor has a 64KB primary instruction cache and (cacheline size 32 bytes) and 64KB data cache (cacheline size 32 bytes). This processor has 32 TLB entries. It can operate in BE or LE mode. The processor speed is 25 Mhz.
+The MIPS32 24K [[Mips Malta|Malta]] processor has a 64KB primary instruction cache and (cacheline size 32 bytes) and 64KB data cache (cacheline size 32 bytes). This processor has 32 TLB entries. It can operate in BE or LE mode. The processor speed is 25 Mhz.
 == Linux Support ==
@@ Line 24: / Line 24: @@
 Linux&nbsp;2.4 and 2.6 support the 24K since 2005-01-19.  Linux&nbsp;2.6 adds support for the 24KE including it's [[Instruction_Set_Architecture#DSP_ASE|DSP ASE]] on 2005-05-31.
 == External Links ==
-[http://www.mips.com/content/Products/Cores/32-BitCores/MIPS3224K/ProductCatalog/P_MIPS3224KFamily/productBrief MIPS32Â® 24K&trade;]
+* [http://www.mips.com/products/cores/32-64-bit-cores/mips32-24k/ MIPS 24K]

@@ Line 1: / Line 1: @@
-{{stub}}
+== General Information ==
 The MIPS '''24K''' and '''24KE''' series of cores are currently MIPS Technologies's high-end synthesizable 32-bit cores.
-== Linux support ==
+The [[Instruction_Set_Architecture#MIPS32|MIPS32]] 24K core family is targeted at high-volume applications such as broadband access, wireless, networking, digital television and office automation. It includes the '''24Kc''', '''24Kc Pro''', '''24Kf''' and '''24Kf Pro''' versions, and offers performance up to 625 MHz worst-case in a 0.13-micron process, the highest frequency available in 32-bit synthesizable cores for embedded markets. Designers have the flexibility to optimize for speed, area or power to obtain 2.8mm2 core-only size, 0.58 mW/MHz, or up to 900 Dhrystone MIPS performance.
 Linux&nbsp;2.4 and 2.6 support the 24K since 2005-01-19.  Linux&nbsp;2.6 adds support for the 24KE including it's [[Instruction_Set_Architecture#DSP_ASE|DSP ASE]] on 2005-05-31.