SmartMIPS

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SmartMIPS is a an ASE which originally developed with focus on enhancing security of Smartcards. The first implementation of SmartMIPS was the 4KSd. SmartMIPS is the umbrella for a number of very different CPU core features the most important of which are:

  • Extensions to the processor architecture to accelerate software implementations of public and secret key cryptography
  • Support for 1kB and 2kB page sizes.
  • New TLB bits allow disabling execute permission of readable pages and pages that are writable but not readable.
  • Code density optimization through the MIPS16 ASE.

Where the TLB no-exec and no-read flags are available available Linux will use them to implement non-executable stacks for enhanced security. Currently these are supported by 4KSd and the cnMIPS CPU cores of Cavium SOCs.