riscy
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Re: video (and more)

To: riscy@pyramid.com (R3000 Mailing List)
Subject: Re: video (and more)
From: paul@suite.sw.oz.au (Paul Antoine)
Date: Fri, 2 Jul 1993 08:14:10 +1000 (EST)
In-reply-to: <9307012042.AA00946@csunix.urc.kun.nl> from "Ronald Schalk" at Jul 1, 93 10:42:50 pm
Organization: Softway Pty Ltd
> > Also, there are algorithms that when combined with an instruction cache
> > (which our r3k's have) that will bitblt at 100% of the memory bandwidth
> > once the code is in the I-cache.  That is, we can easily equal the 
> > performance
> > of a hardware blt'er.
> > 
> Maybe so, but in the meanwhile the processor cannot do diddly with your
> programs and kernel, so IMHO it's better to have a graphics coproc to
> cover the video part (that's what it's designed for) and leave the R3K do
> the real job: run programs.

That's what a memory-to-memory DMA is for, no?  Of course, there's too
much overhead in setup for small blits with *either* a blitter or a
DMA channel, so they're best done with an algorithm that fits in the
cache.


Paul

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