riscy
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Re: Main CPU and Peripheral controller

To: riscy@pyramid.com
Subject: Re: Main CPU and Peripheral controller
From: Andreas Busse <andy@piggy.waldorf-gmbh.de>
Date: Sun, 4 Jul 93 19:20:20 GMT
Reply-to: riscy@pyramid.com
Sender: riscy-request@pyramid.com
> To rephrase all this into what this means for us:
> 
>       *  Our DRAM interface can be two-way interleaved (which means
>          that 64-bits of memory are accessed each memory cycle, so
>          that the CPU will have the data for its next read already
>          in the data buffers, which reduces every second access to
>          1-cycle instead of about 6-cycles), DRAM page mode and
>          early-write modes can be taken advantage of to further
>          speed up access.

This is *very* important. We have a Mips Magnum 3000 (33 MHz) and
a Magnum 4000PC (50 MHz) in the office. Due to the fact that the
R4000 has only 8+8k cache the machine is sometimes slower (up to
factor 2) than the R3000 machine which has 32+32k cache. By speeding
up main memory access we will improve overall speed by a significant
amount, especially because the 3081E has a rather small cache
compared to discrete R3000/R3010 solutions.

>       *  Glue for an extend bus (such as ISA) would require very
>          little additional support.

An extra argument for the ISA bus.

> Now the bad news:  The chip is only available in a 208 pin FQFP (a
> surface mount package).  The pricing is us$50 - us$70 in lots of
> 5,000.  This would translate to >us$100 for the quantities that
> we want.

There are FQFP (isn't it called PQFP ?) sockets available.
But they are heavily expensive :-(

> However, there have been some developments in the last week or so
> that may mean that Surface Mount is OK.  More on that as details
> are available.

Hmmmm. :-)


> Alternatives
> ------------
> 
> If we cannot use the 3730, there is another alternative that was
> thought up by Steven Ligett, Jerry Callen (and Pat Mackinlay?).
> 
> This involves creating a DRAM interface between the main CPU and
> memory using programmable logic.  This interface would provide:
>
>       *  DRAM address multiplexing
>       *  Two-way interleaving
>       *  Page mode support
>       *  Early write mode support
>               (The last three are provided on the special CPU
>                cycles only, such as the instruction cache refill).
>
> There would be a R3041 co-processor connected to the main CPU via a DMA
> channel.  The only connection to the outside world for the main CPU
> would be this co-processor.
> 
> Information copied from the IDT data book on the 3041:
>
> [...]
>
> The 3041 essentially does in software what the 3730 does in hardware,
> with the added flexibility that its very programmable.  As an example,
> if the 3041 was given a scatter/gather SCSI disk access to do, it
> would read/write the data directly top the SCSI port, and write/read
> the data to the appropriate location in the main CPUs memory.
>
>
> Some costings:
> 
>     3730:
>       3730    about $120 or more (see above)
>       glue    about $10 (buffers, latches, one of two PALs)
                     -----
                      $130
>
>    3041:
>       3041    about $35
>       glue    about $30 (buffer, latches, lots of PALs)
>       memory  about $45 (maybe those old 256K SIMMS?)
                     ----
                     $110

>
> Advantages of 3730:
>       -  Single chip does almost everything
>       -  Not much R&D to get it going
> Disadvantages of 3730:
>       -  Cost (maybe; can't tell until October)
>       -  Availability
> Advantages of 3041:
>       -  Parts are available now
>       -  Cost
>       -  More programmable (RISC does it in software approach)
> Disadvantages of 3041:
>       -  More R&D
>       -  Lots of hard real time software to write
>       -  More board space needed.

The costs difference isn't that much. But the R&D difference
seems to be large. A 3730 solution would speed up design
and will be more reliable than a hand-made solution with
the 3041.

> (Note:  If video is provided on the motherboard and connected to the 3041,
>        then maybe some of the unused space in the VRAM could be used as
>       program memory for the 3041, further reducing the cost.)

If we would take the 1 Meg / 1152x900 video there won't be
any unused memory anymore...

> My opinion is that we should dump the 3730 and use the 3041 approach.
> The cost of the extra board space is offset by the reduction in cost
> of the sub-system, and the parts are available *now*.

I agree that we would have the board earlier if we are going to
use the 3041 solution. But we will have to spend more time into
programming the 3041 and arranging the hardware around what might
mean that the design isn't finished until October no matter what
solution we use...


Andy
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