riscy
[Top] [All Lists]

VRAM looks like ??

To: riscy@pyramid.com (Mips digest address)
Subject: VRAM looks like ??
From: Tim Docker <timd@extro.ucc.su.OZ.AU>
Date: Wed, 30 Jun 93 1:57:25 EST
A lurker awakes!

I deduce from previous context that VRAM is dual ported RAM with
normal DRAM accesses on one side, and some sort of serial accessibility on
the other. Is this the case?

I am interested in knowing what sort of control these devices need, particularly
on the Video side (eg how they are addressed). Does someone who knows have
ten minutes to draw an ASCII picture of one of these?

My (very) brief opinions on current topics:

1) Go ISA rather than a custom bus. I feel that the added complexity (for
presumably less perfomance) pays off when it comes to plugging the sort of
weirdo boards I may want to play with. Of course there will always be software
drivers to be written, but fancy sound boards, idsn terminal adaptors etc etc
will never exist on a custom bus with such a limited user base.

2) Can the TIGA stuff. Whilst generally a fan of coprocessors and the like,
video performance for me is critical. Everyone talks X performance, but
I like the idea of this board as a low end virtual reality engine, with
graphics straight into the buffer and no windowing (two motherboards, I guess
if you want an image for each eye!). The biggest advantage a board such as this
could have over a 486 PC clone is a RISC CPU with a closely coupled frame
buffer.

3) Neil's idea regarding a second, lower end MIPS device for IO is a good one
but I'm not at all sure (as were others) that the video sync signals could be
generated with the required accuracy in software. Also how would this IO/video
processor be coupled to the main CPU - shared memory? Simulated ethenet/SCSI ?
It sounds complicated.

I do like the concept of migrating hardware into software on a secondary CPU,
but will this actually reduce the complexity ? If not, what are the benefits?

Tim

-------------------------------------------------------------------------------
Tim Docker
timd@extro.ucc.su.oz.au

 

<Prev in Thread] Current Thread [Next in Thread>
  • VRAM looks like ??, Tim Docker <=