From Daniel.Veillard@imag.fr Wed Dec 1 12:52:54 1993 Received: from imag.imag.fr by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA09817; Wed, 1 Dec 1993 05:53:04 -0500 Received: from maupiti.imag.fr by imag.imag.fr with SMTP id AA01327 (5.65c8/IDA-1.4.4 for ); Wed, 1 Dec 1993 11:50:19 +0100 Received: by maupiti.imag.fr (5.65/5.17) id AA20065; Wed, 1 Dec 1993 11:52:55 +0100 From: Daniel.Veillard@imag.fr (Daniel Veillard) Message-Id: <9312011052.AA20065@maupiti.imag.fr> To: riscy@sunsite.unc.edu Subject: Compatibility with Mips Magnum 4000 products Date: Wed, 01 Dec 93 11:52:54 +0100 -------- hello mipser, from all I've read concerning the riscWS/EISA chipset we plan to use, and information I got from the net, it seems that the future board will be very similar to the Magnum 4000 machine: - same chipset, same kind of processor - at least same kind of SCSI chip if we stay with NCR 53cf94 - maybe other devices are implemented the same way (floppy, Ethernet, serial, video). We don't have Mips Magnum here so I can't check. Can someone check for these points. This kind of compatibility may be interesting for a fast port of Linux if we were able to get access to the source of other operating system for the Magnum (may help for Device drivers and interface with CPU/MMU). I have also heard that Plan 9 distributed operating system have been ported to the Magnum R4000 and that free source licence is available for Universities. Getting sources of other OS running on Misp Magnum 4000 may help developping Linux and that's something we can do before the board is available. Furthermore, staying compatible with the Magnum products may be a good way to offer binary compatibility and run commercial products on Linux. - Am I completely wrong ? - Is there any other sources available publicly which may help porting Linux ? - Any comments ? Daniel Daniel Veillard : | Bull-IMAG Systems E-mail : Daniel.Veillard@imag.fr | Centre Equation Tel : (33) 76 63 48 53 | 2 ave. de Vignates Fax : (33) 76 54 76 15 | 38610 GIERES FRANCE From broadley@neurocog.lrdc.pitt.edu Fri Dec 3 22:58:59 1993 Received: from neurocog.lrdc.pitt.edu by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA03319; Sat, 4 Dec 1993 09:26:17 -0500 Received: from localhost (broadley@localhost) by neurocog.lrdc.pitt.edu (8.6.4/8.6.4) id DAA10795 for riscy@sunsite.unc.edu; Sat, 4 Dec 1993 03:58:59 -0500 From: Bill Broadley Message-Id: <199312040858.DAA10795@neurocog.lrdc.pitt.edu> Subject: Memory bandwidth/board To: riscy@sunsite.unc.edu Date: Sat, 4 Dec 1993 03:58:59 -0500 (EST) X-Mailer: ELM [version 2.4 PL21] Content-Type: text Content-Length: 1267 The motherboard post mentions 84MB/sec read, 104 MB/sec write bandwidth I assume this is for the 50 Mhz motherboard? So if we go with the 4200 we would be at 40 Mhz or 67.2/83.2 Mb/sec?? Or would the bandwidth stay the same? SGI claimes 267 Mb/sec but a similiar memory interface may not be cost effective (let alone designing it.) I wrote a memory benchmark program (membench at neurocog.lrdc.pitt.edu ~ftp/pub) and was wondering what it would report on a SGI mips 4000 system. Any takers out there? Alpha 133 Mhz gets 80 Mb/sec Hp 735 99 Mhz gets 85 Mb/sec 486dx2 66 Mhz gets 16 Mb/sec So obviously 67/83 would be very competitive. I'm still very curious if the SGI's would score 267 though. The above is just because I'm curious, the motherboard looks great, of course I'm dying for details. Which Bus? Which video chip? Which scsi chip? Which simms? Interleaved? Guess I'll have to be patient. Anyone with any ties at SGI? I've heard a fair amount about the announced reference designs, which sounds like a updated designs for the 4200. Best of luck I hope this pulls together. -- Bill Broadley@{neurocog,schneider3,lrdc5}.lrdc.pitt.edu (in order of preference) Linux is great. Bike to live, live to bike. PGP-ok From tor@tss.no Sat Dec 4 18:04:50 1993 Received: from benoni.Uit.No by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA18650; Sat, 4 Dec 1993 18:04:50 -0500 Received: from benoni by ppenoni.uit.no with SMTP (PP) id <08711-0@ppenoni.uit.no>; Sun, 5 Dec 1993 00:04:45 +0000 Received: from unas.tss.no by benoni.uit.no (5.65+IDA/Babel-1.15/ABaa-1.2/Ultrix) id AAbenoni08707; Sun, 5 Dec 1993 00:04:42 +0100 Received: by unas.tss.no (4.0/ABaa-1.3mini) id AA02348; Sat, 4 Dec 93 23:55:55 +0100 Message-Id: <9312042255.AA02348@unas.tss.no> From: tor@tss.no (Tor Arntsen) Date: Sat, 4 Dec 1993 23:55:53 +0100 X-Mailer: Mail User's Shell (7.2.5 10/14/92) To: riscy@sunsite.unc.edu Subject: Re: Memory bandwidth/board On Dec 4, 11:58am, Bill Broadley wrote: >The motherboard post mentions 84MB/sec read, 104 MB/sec write bandwidth I >assume this is for the 50 Mhz motherboard? > >So if we go with the 4200 we would be at 40 Mhz or 67.2/83.2 Mb/sec?? >Or would the bandwidth stay the same? > >SGI claimes 267 Mb/sec but a similiar memory interface may not be cost >effective (let alone designing it.) > >I wrote a memory benchmark program (membench at neurocog.lrdc.pitt.edu >~ftp/pub) and was wondering what it would report on a SGI mips 4000 system. >Any takers out there? > >Alpha 133 Mhz gets 80 Mb/sec >Hp 735 99 Mhz gets 85 Mb/sec >486dx2 66 Mhz gets 16 Mb/sec > >So obviously 67/83 would be very competitive. I'm still very curious >if the SGI's would score 267 though. > [...] On an SGI Indy mips 4000PC 50/100MHz with 8K/8K L1 cache (no L2) I get 36 or 43 MB/sec (not sure to interpret this) if I've done this right. Bill, I did (slightly edited) ./membench 128 2000 Time Stride reads per % speed MB per per loop (ints) second (in K) improvement sec 8.60 4 1860.5 21.0 29.1 6.88 5 1860.5 0.0 36.3 5.73 6 1861.5 -0.1 43.6 Hmm, I start to believe that the correct number is 29.1 MB/sec. Whatever size I use (as long as it's more than 8 (KB)) I get ~29 MB/sec with a stride of 4 (i.e. 32 bytes). After that the speed improvement drops to around zero. Tor (tor@tss.no) From andy@waldorf-gmbh.de Mon Dec 6 17:14:31 1993 Received: from mail.Germany.EU.net by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA19433; Mon, 6 Dec 1993 10:14:11 -0500 Received: by mail.Germany.EU.net(EUnetD-2.3.0.k) via EUnet id DK22161; Mon, 6 Dec 1993 16:15:01 +0100 Received: from resi.waldorf-gmbh.de From: Andreas Busse Date: Mon, 6 Dec 93 16:14:31 +0100 Message-Id: <9312061514.AA14222@resi.waldorf-gmbh.de> Received: by resi.waldorf-gmbh.de (5.61/GEN-1.0.7) via EUnet for scotty.waldorf-gmbh.de id AA14222; Mon, 6 Dec 93 16:14:31 +0100 To: riscy@sunsite.unc.edu Subject: Re: Memory bandwidth/board > The motherboard post mentions 84MB/sec read, 104 MB/sec write bandwidth I > assume this is for the 50 Mhz motherboard? Right. > So if we go with the 4200 we would be at 40 Mhz or 67.2/83.2 Mb/sec?? > Or would the bandwidth stay the same? Don't know. > SGI claimes 267 Mb/sec but a similiar memory interface may not be cost > effective (let alone designing it.) Very impressive... > I wrote a memory benchmark program (membench at neurocog.lrdc.pitt.edu > ~ftp/pub) and was wondering what it would report on a SGI mips 4000 system. > Any takers out there? If you give me some time, I'll download and run it on my Magnum 4000PC/50. > [...] > The above is just because I'm curious, the motherboard looks great, of > course I'm dying for details. Me too :-) > Which Bus? Which video chip? Which scsi chip? Which simms? Interleaved? Video chip: Inmos G33x - don't know if they are still using the 334. Scsi chip: 53xx90 - don't know exactly. Simms: 512Kx36 or 2Mx36 or even larger. 8 slots. 2way interleaved. > Guess I'll have to be patient. > Anyone with any ties at SGI? I've heard a fair amount about the announced > reference designs, which sounds like a updated designs for the 4200. I will send a reminder to the guy at MTI again. I'm sure he's quite busy, so I can't bother him each day. Cheers, Andy ------------------------------------------------------------------------------- Waldorf Electronics GmbH | Phone: +49 (0)2636-80294 R&D Department | Fax: +49 (0)2636-80188 Neustrasse 9-12, 53498 Waldorf, Germany | email: andy@waldorf-gmbh.de ------------------------------------------------------------------------------- From andy@waldorf-gmbh.de Tue Dec 7 10:17:38 1993 Received: from mail.Germany.EU.net by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA21667; Tue, 7 Dec 1993 03:17:18 -0500 Received: by mail.Germany.EU.net(EUnetD-2.3.0.k) via EUnet id EI27510; Tue, 7 Dec 1993 09:18:08 +0100 Received: from resi.waldorf-gmbh.de From: Andreas Busse Date: Tue, 7 Dec 93 09:17:38 +0100 Message-Id: <9312070817.AA15538@resi.waldorf-gmbh.de> Received: by resi.waldorf-gmbh.de (5.61/GEN-1.0.7) via EUnet for scotty.waldorf-gmbh.de id AA15538; Tue, 7 Dec 93 09:17:38 +0100 To: riscy@sunsite.unc.edu Subject: NEC design kit Hi there ! A few minutes ago I called the tech support guy at NEC Europe, just to ask if there are any news regarding the R4000 design kits. You won't believe it: This morning he received a fax that the kits are ready and available. He will receive a sample kit this week and is quite sure that we can have the kit *before* XMAS ! Cheers, Andy ------------------------------------------------------------------------------- Waldorf Electronics GmbH | Phone: +49 (0)2636-80294 R&D Department | Fax: +49 (0)2636-80188 Neustrasse 9-12, 53498 Waldorf, Germany | email: andy@waldorf-gmbh.de ------------------------------------------------------------------------------- From broadley@neurocog.lrdc.pitt.edu Tue Dec 7 11:26:03 1993 Received: from neurocog.lrdc.pitt.edu by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA01194; Tue, 7 Dec 1993 16:26:10 -0500 Received: from localhost (broadley@localhost) by neurocog.lrdc.pitt.edu (8.6.4/8.6.4) id QAA07879 for riscy@sunsite.unc.edu; Tue, 7 Dec 1993 16:26:04 -0500 From: Bill Broadley Message-Id: <199312072126.QAA07879@neurocog.lrdc.pitt.edu> Subject: Other options To: riscy@sunsite.unc.edu Date: Tue, 7 Dec 1993 16:26:03 -0500 (EST) X-Mailer: ELM [version 2.4 PL21] Content-Type: text Content-Length: 1353 I was talking to Vince Cate (Vincent.Cate@cs.cmu.edu) and he made the following suggestions: >Shannon Computers (603) 875-3800 has a generic PCI-based motherboard >design which replaces a standard PC-AT motherboard and accepts PCI >CPU-cards. It can work with any processor. To start with there will be >PowerPC, Alpha, MIPS, x86, and M1 (guess Pentium too). > Std PC motherboard replacement (PC-AT format) > 3 PCI (64 bit PCI - 230 MB/sec) > 5 ISA > PCI/ISA bridge chip > keyboard controller > realtime clock > bios > scci (stuffed or not) > make 3.3 v onboard so can use cheap power supply > IBM AIX/WorkplaceOS > DEC porting NT to 21066 > Motorla porting NT PowerPC > Royalties $1/motherboard, $0.75/CPU-board So this means that if we did this that we would have to pay them $1.00 per motherboard which seems like a GREAT deal to me. Advantages over the current design is CPU upgradeable, PCI. Another option is : >DeskStation (913) 599-1900 will sell me R4600 boxes (power, box, motherboard, >CPU) for $1,000 if I buy 12 or more. If your interested check out the document: furmint.nectar.cs.cmu.edu:pc.cpu.market Comments? -- Bill Broadley@{neurocog,schneider3,lrdc5}.lrdc.pitt.edu (in order of preference) Linux is great. Bike to live, live to bike. PGP-ok From yanni%db.toronto.edu@roll.db.toronto.edu Tue Dec 7 18:07:25 1993 Received: from roll.db.toronto.edu by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA17097; Tue, 7 Dec 1993 23:07:43 -0500 Received: by roll.db.toronto.edu id <12040>; Tue, 7 Dec 1993 23:07:34 -0500 Subject: Re: Other options From: Yanni Jew To: riscy@sunsite.unc.edu Date: Tue, 7 Dec 1993 23:07:25 -0500 In-Reply-To: <199312072126.QAA07879@neurocog.lrdc.pitt.edu> from "Bill Broadley" at Dec 7, 93 04:27:05 pm X-Mailer: ELM [version 2.4 PL22] Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Content-Length: 1345 Message-Id: <93Dec7.230734est.12040@roll.db.toronto.edu> > I was talking to Vince Cate (Vincent.Cate@cs.cmu.edu) and he made > the following suggestions: > > >Shannon Computers (603) 875-3800 has a generic PCI-based motherboard > >design which replaces a standard PC-AT motherboard and accepts PCI > >CPU-cards. It can work with any processor. To start with there will be > >PowerPC, Alpha, MIPS, x86, and M1 (guess Pentium too). [etc.] I like the idea very much. It's similar to what I had in mind, before I joined this mailing list. I started out at the beginning of the year wanting to put a micro-SPARC on an ISA bus as a coprocessor. It's now the end of the year, and I've decided that micro-SPARC (even at 70Mhz) would not give much cpu-power for the effort involved. SuperSPARC is too expensive, and probably would not have much cpu-power. The ISA and EISA bus does not have enough bandwidth, and VESA may be doable. My plan was to wait for PCI boards to come down in price, and then try adding an inexpensive/fast cpu (eg. R4200). Will the motherboard allow an x86 cpu to co-exist with another cpu ? If it's possible then an inexpensive 386 cpu could be used to run Linux, then the OS for the R4200 could be developed more easily. (The final configuration might even use the 386 running Linux to handle all the I/O, and the R4200 would provide the compute power). yanni@db.toronto.edu From andy@waldorf-gmbh.de Wed Dec 8 10:53:41 1993 Received: from mail.Germany.EU.net by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA08970; Wed, 8 Dec 1993 03:53:24 -0500 Received: by mail.Germany.EU.net(EUnetD-2.3.0.k) via EUnet id FT11612; Wed, 8 Dec 1993 09:54:12 +0100 Received: from resi.waldorf-gmbh.de From: Andreas Busse Date: Wed, 8 Dec 93 09:53:41 +0100 Message-Id: <9312080853.AA17660@resi.waldorf-gmbh.de> Received: by resi.waldorf-gmbh.de (5.61/GEN-1.0.7) via EUnet for scotty.waldorf-gmbh.de id AA17660; Wed, 8 Dec 93 09:53:41 +0100 To: riscy@sunsite.unc.edu Subject: NEC design kits Hi there ! Although Bill found another interesting board design (I'll try to get more information) I have some news regarding the NEC/MTI stuff. I've posted that already, but the german backbone had some trouble yesterday. Perhaps my mail went into the bit-bucket... This is what I posted: ------- A few minutes ago I called the tech support guy at NEC Europe, just to ask if there are any news regarding the R4000 design kits. You won't believe it: This morning he received a fax that the kits are ready and available. He will receive a sample kit this week and is quite sure that we can have the kit *before* XMAS ! ------- This night I received a fax from MTI containing the riscWS/EISA part list. Unfortunally some pages are missing, but it looks like I can post at least the major stuff today. Please be a bit patient. Cheers, Andy ------------------------------------------------------------------------------- Waldorf Electronics GmbH | Phone: +49 (0)2636-80294 R&D Department | Fax: +49 (0)2636-80188 Neustrasse 9-12, 53498 Waldorf, Germany | email: andy@waldorf-gmbh.de ------------------------------------------------------------------------------- From chrisa@extro.ucc.su.OZ.AU Thu Dec 9 07:21:44 1993 Received: from extra.ucc.su.OZ.AU by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA12711; Wed, 8 Dec 1993 04:51:23 -0500 Received: from extro.ucc.su.OZ.AU by extra.ucc.su.OZ.AU with SMTP id AA17742 (5.65c/IDA-1.4.4 for ); Wed, 8 Dec 1993 20:21:45 +1100 From: "C. G. Albone" Message-Id: <199312080921.AA17742@extra.ucc.su.OZ.AU> Subject: Time frame for boards.. To: riscy@sunsite.unc.edu Date: Wed, 8 Dec 1993 20:21:44 +1100 (EST) X-Mailer: ELM [version 2.4 PL23] Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Content-Length: 494 Hello all, What do you expect to be the timeframe for the manufacture of the boards? Another related question, how long do people think it will take after the boards are manufactured and delievered before they will be able to run something? Non-hacker sorts such as myself would be interested to know. Another question, how will people be able to buy such boards? will they be fully assembled and shipped as such to wherever in the world? questions questions questions i know... chris. From heidner@alf.hrz.th-zwickau.de Wed Dec 8 11:56:35 1993 Received: from master.hrz.th-zwickau.de by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA13094; Wed, 8 Dec 1993 04:56:50 -0500 Received: from alf.hrz.th-zwickau.de by master.hrz.th-zwickau.de with SMTP (15.11/15.6) id AA12800; Wed, 8 Dec 93 10:52:03 mez Received: by alf.hrz.th-zwickau.de (4.1/SMI-4.1) id AA02111; Wed, 8 Dec 93 10:56:35 +0100 From: heidner@alf.hrz.th-zwickau.de (Dieter Heidner) Message-Id: <9312080956.AA02111@alf.hrz.th-zwickau.de> Subject: Mailproblem To: andy@waldorf-gmbh.de Date: Wed, 8 Dec 1993 10:56:35 +0100 (MET) Cc: riscy@sunsite.unc.edu X-Mailer: ELM [version 2.4 PL21] Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Content-Length: 2023 Hi since some days messages like this _________________________________________________________________________ >From Mailer-Daemon Wed Dec 8 10:04:22 1993 Return-Path: Received: by boss.hrz.th-zwickau.de (4.1/SMI-4.1) id AA04871; Wed, 8 Dec 93 10:04:02 +0100 Date: Wed, 8 Dec 93 10:04:02 +0100 From: Mailer-Daemon (Mail Delivery Subsystem) Subject: Returned mail: User unknown Message-Id: <9312080904.AA04871@boss.hrz.th-zwickau.de> To: Postmaster Status: RO ----- Transcript of session follows ----- Connected to master.hrz.th-zwickau.de: >>> RCPT To: <<< 550 ... User unknown 550 m:mme@hrz.th-zwickau.de... User unknown ----- Message header follows ----- Return-Path: Received: from SunSITE.Unc.EDU by boss.hrz.th-zwickau.de (4.1/SMI-4.1) id AA04869; Wed, 8 Dec 93 10:04:02 +0100 Errors-To: caret@c-side.com Received: from (localhost.oit.unc.edu) by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA09036; Wed, 8 Dec 1993 03:54:10 -0500 Date: Wed, 8 Dec 1993 03:54:10 -0500 Message-Id: <9312080853.AA17660@resi.waldorf-gmbh.de> Errors-To: caret@c-side.com Reply-To: andy@waldorf-gmbh.de Originator: riscy@sunsite.unc.edu Sender: riscy@sunsite.unc.edu Precedence: bulk From: Andreas Busse To: Multiple recipients of list Subject: NEC design kits X-Listprocessor-Version: 6.0a -- ListProcessor by Anastasios Kotsikonas _______________________________________________________________ I'm not shure Who has initiated this stuff ... about our site : there is no user m:mme@hrz.th-zwickau.de but a user mme@hrz.th-zwickau.de Dieter , postmaster at th-zwickau.de ------------------------------------------------------------------------------- Name: Dieter Heidner, Phone: +49 375 536 1216 Org.: HTW-Zwickau(FH), Hochschulrechenzentrum Email: Dieter.Heidner@hrz.th-zwickau.de ------------------------------------------------------------------------------- From tim@ubitrex.mb.ca Wed Dec 8 05:31:54 1993 Received: from ubitrex.mb.ca (ubiserver.ubitrex.mb.ca) by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA24491; Wed, 8 Dec 1993 12:32:18 -0500 Received: from ska.ubitrex.mb.ca ([192.75.16.23]) by ubitrex.mb.ca (4.1/SMI-4.1) id AA08195; Wed, 8 Dec 93 11:31:54 CST Date: Wed, 8 Dec 93 11:31:54 CST From: tim@ubitrex.mb.ca (Tim Braun) Message-Id: <9312081731.AA08195@ubitrex.mb.ca> To: riscy@sunsite.unc.edu Subject: Re: Memory bandwidth/board Slightly off topic, but to let us know where the playing field is: Just because I am a curious person, I ran the membench benchmark on some SPARC's around here. If you want, I can e-mail you the detailed runs, but I think the numbers work out to: SPARCstation 1 - 19.4 MB/sec IPC - 18.3 MB/sec (220 nSec RAM cycle) SPARCserver 470 - 34.8 MB/sec (VME bus) ELC - 34.8 MB/sec SPARCstation 2 - 35.8 MB/sec (112 nSec RAM cycle) ________________________________________________________________ Tim Braun | Ubitrex Corporation | Voice: 204-942-2992 ext 228 1900-155 Carlton St | FAX: 204-942-3001 Winnipeg, Manitoba, Canada R3C 3H8 | Email: tim@ubitrex.mb.ca From broadley@neurocog.lrdc.pitt.edu Wed Dec 8 23:23:10 1993 Received: from neurocog.lrdc.pitt.edu by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA05478; Thu, 9 Dec 1993 04:23:12 -0500 Message-Id: <199312090923.AA05478@SunSITE.Unc.EDU> Received: by neurocog.lrdc.pitt.edu (1.37.109.8/16.2) id AA01550; Thu, 9 Dec 1993 04:23:10 -0500 Date: Thu, 9 Dec 1993 04:23:10 -0500 From: Bill Broadley To: riscy@sunsite.unc.edu Subject: (fwd) Re: MIPS 4200 systems Newsgroups: comp.sys.laptops,comp.sys.mips,comp.sys.ibm.pc.hardware Organization: Learning Research and Development Center at U. of Pittsburgh Path: pitt.edu!ctc.com!news.pop.psu.edu!news.cac.psu.edu!howland.reston.ans.net!spool.mu.edu!sgiblab!sgigate.sgi.com!odin!mti.sgi.com!royalty.mti.sgi.com!machale From: machale@royalty.mti.sgi.com (James MacHale) Newsgroups: comp.sys.laptops,comp.sys.mips,comp.sys.ibm.pc.hardware Subject: Re: MIPS 4200 systems Message-ID: <2e0sf3$3t3@miranda.mti.sgi.com> Date: 7 Dec 93 03:14:43 GMT References: Organization: Silicon Graphics, Inc. Lines: 97 Xref: pitt.edu comp.sys.laptops:11005 comp.sys.mips:1744 comp.sys.ibm.pc.hardware:74321 NNTP-Posting-Host: royalty.mti.sgi.com In article , mcgrant@rascals.stanford.edu (Michael C. Grant) writes: |> Apparently there was some interesting talk/show/demo(?) of MIPS |> 4200-based systems at the latest Comdex. According to the little |> I've read, these chips are cheaper than the Pentium, consume a |> tenth of the power, and are more than competitive with the PowerPC, |> Pentium, and Alpha... of course that's a short article's summary. |> I know that MIPS chips in general seem to run Windows NT rather well |> too... |> |> MIPS has designed four prototypes around the 4200: high-speed and |> low-power notebooks, and high-speed and low-cost desktops. If anyone |> has additional information concerning the availability timetable, |> software availability, and feature/performance descriptions of |> such systems, I would appreciate it if they would share it here... |> MIPS announced the existence of 4 different reference designs in which the R4200 runs today. Of these, some will be offered as design kits through MTI's Open Design Center, according to demand. Documentation and support structures need to be in place before kits are offered and that is why all 4 may not necessarily be made available. The four systems are: 1/ riscPC/LC This is a low-cost desktop design which was demonstrated by MTI at the NEC booth at COMDEX. It uses a standard PC Opti-based baby-AT motherboard and substitutes a MIPS cpu daughtercard for the 486 one which would normally fit in the 486-bus local slot. The daughtercard uses the Tigershark bridge chipset (from Toshiba) to translate R4x00 signals into 486 signals. Tigershark also supports a Level2 cache. The riscPC/LC is effectively an R4200-based derivative of the earlier R4000-based riscPC/ISA design kit. The riscPC/LC can be built from discrete parts for about $1,500. (The daughtercard is the only hardware piece that you can't buy from your local store). Firmware and Hardware Abstraction Layer (HAL) have also been developed. Current speeds are limited to 33MHz by the Opti chipset: the processor pipeline will run at twice that speed. The system has not yet been benchmarked (good NT benchmarks are hard to come by!) but by visual inspection runs between a 486-DX2-66 and a Pentium. 2/ risc/Pico-Note This is a low-power notebook system, a mechanical sample of which was shown at COMDEX. The system is derived from an original AMI design based on the Evergreen chipset from PicoPower which manages system power dissipation. The LCD screen is controlled by a Cirrus Logic VGA controller. Tigershark bridge ASICs allow the R4200 (or R4600) to interface to the PicoPower chip. The design includes up to 32MB DRAM, an IDE controller, PCMCIA interface, and an AT slot for system debug. The design is currently laid out as a daughtercard lying parallel with the motherboard. The system is intended to be used initially for prototyping and system software development. It may be productized in its current form factor or relaid out as a single board. Current speed again limited to 33MHz by the Evergreen chip. Processor pipeline speed is 66MHz. 3/ NEC R4200 notebook prototype NEC, who is the primary vendor of the R4200, demonstrated an R4200-based notebook system packaged in a Versa (NEC's x86 notebook line) case at COMDEX. The system was based on the ARCSet ASICs, a high-performance chipset used in the Magnum desktop system. For details and availability information, contact NEC Electronics. 4/ High-performance desktop A fourth system is based on the ARCSet ASICs and may be used to implement a high-performance design with the R4200 running up to its full speed of 80MHz (pipeline). The design is similar in functionality to the R4400 Magnum desktop but supports fewer EISA slots. General availability of selective design kits to be announced at a later date. James Mac Hale, MTI Marketing, machale@mti.sgi.com |> Thanks a lot! |> Michael C. Grant |> mcgrant@rascals.stanford.edu |> |> -- |> "Long hair, short hair--what's the difference once the head's blowed |> off?" |> "When you get right down to it, your average pervert is really quite |> thoughtful." (Letterman) -- Bill Broadley@{neurocog,schneider3,lrdc5}.lrdc.pitt.edu (in order of preference) Linux is great. Bike to live, live to bike. PGP-ok From broadley@neurocog.lrdc.pitt.edu Wed Dec 8 23:25:10 1993 Received: from neurocog.lrdc.pitt.edu by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA05626; Thu, 9 Dec 1993 04:25:11 -0500 Message-Id: <199312090925.AA05626@SunSITE.Unc.EDU> Received: by neurocog.lrdc.pitt.edu (1.37.109.8/16.2) id AA01562; Thu, 9 Dec 1993 04:25:11 -0500 From: Bill Broadley Subject: 4200 Mips designs To: riscy@sunsite.unc.edu Date: Thu, 9 Dec 1993 04:25:10 -0500 (EST) X-Mailer: ELM [version 2.4 PL21] Content-Type: text Content-Length: 3649 I saw this post on the net, so I thought I'd cc it here... From: machale@royalty.mti.sgi.com (James MacHale) Newsgroups: comp.sys.laptops,comp.sys.mips,comp.sys.ibm.pc.hardware Subject: Re: MIPS 4200 systems MIPS announced the existence of 4 different reference designs in which the R4200 runs today. Of these, some will be offered as design kits through MTI's Open Design Center, according to demand. Documentation and support structures need to be in place before kits are offered and that is why all 4 may not necessarily be made available. The four systems are: 1/ riscPC/LC This is a low-cost desktop design which was demonstrated by MTI at the NEC booth at COMDEX. It uses a standard PC Opti-based baby-AT motherboard and substitutes a MIPS cpu daughtercard for the 486 one which would normally fit in the 486-bus local slot. The daughtercard uses the Tigershark bridge chipset (from Toshiba) to translate R4x00 signals into 486 signals. Tigershark also supports a Level2 cache. The riscPC/LC is effectively an R4200-based derivative of the earlier R4000-based riscPC/ISA design kit. The riscPC/LC can be built from discrete parts for about $1,500. (The daughtercard is the only hardware piece that you can't buy from your local store). Firmware and Hardware Abstraction Layer (HAL) have also been developed. Current speeds are limited to 33MHz by the Opti chipset: the processor pipeline will run at twice that speed. The system has not yet been benchmarked (good NT benchmarks are hard to come by!) but by visual inspection runs between a 486-DX2-66 and a Pentium. 2/ risc/Pico-Note This is a low-power notebook system, a mechanical sample of which was shown at COMDEX. The system is derived from an original AMI design based on the Evergreen chipset from PicoPower which manages system power dissipation. The LCD screen is controlled by a Cirrus Logic VGA controller. Tigershark bridge ASICs allow the R4200 (or R4600) to interface to the PicoPower chip. The design includes up to 32MB DRAM, an IDE controller, PCMCIA interface, and an AT slot for system debug. The design is currently laid out as a daughtercard lying parallel with the motherboard. The system is intended to be used initially for prototyping and system software development. It may be productized in its current form factor or relaid out as a single board. Current speed again limited to 33MHz by the Evergreen chip. Processor pipeline speed is 66MHz. 3/ NEC R4200 notebook prototype NEC, who is the primary vendor of the R4200, demonstrated an R4200-based notebook system packaged in a Versa (NEC's x86 notebook line) case at COMDEX. The system was based on the ARCSet ASICs, a high-performance chipset used in the Magnum desktop system. For details and availability information, contact NEC Electronics. 4/ High-performance desktop A fourth system is based on the ARCSet ASICs and may be used to implement a high-performance design with the R4200 running up to its full speed of 80MHz (pipeline). The design is similar in functionality to the R4400 Magnum desktop but supports fewer EISA slots. General availability of selective design kits to be announced at a later date. James Mac Hale, MTI Marketing, machale@mti.sgi.com |> Thanks a lot! |> Michael C. Grant |> mcgrant@rascals.stanford.edu |> |> -- |> "Long hair, short hair--what's the difference once the head's blowed |> off?" |> "When you get right down to it, your average pervert is really quite |> thoughtful." (Letterman) -- Bill Broadley@{neurocog,schneider3,lrdc5}.lrdc.pitt.edu (in order of preference) Linux is great. Bike to live, live to bike. PGP-ok From andy@waldorf-gmbh.de Thu Dec 9 13:03:04 1993 Received: from mail.Germany.EU.net by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA11071; Thu, 9 Dec 1993 06:03:49 -0500 Received: by mail.Germany.EU.net(EUnetD-2.3.0.l) via EUnet id HB25119; Thu, 9 Dec 1993 12:03:32 +0100 Received: from resi.waldorf-gmbh.de From: Andreas Busse Date: Thu, 9 Dec 93 12:03:04 +0100 Message-Id: <9312091103.AA20847@resi.waldorf-gmbh.de> Received: by resi.waldorf-gmbh.de (5.61/GEN-1.0.7) via EUnet for scotty.waldorf-gmbh.de id AA20847; Thu, 9 Dec 93 12:03:04 +0100 To: riscy@sunsite.unc.edu Subject: ARC 100 part list Hi again, I've got the most of the part list now (faxes from US to here seem to be a problem...). I don't want to list every resistor and capacitor here, so here are only the most important components: Mother Board 1 x DALLAS DS1287 Battery backed clock 1 x DALLAS DS1225Y NRAM 8Kx8 1 x WD16C552 UART 1 x Intel 82077A EISA stuff 1 x National DP83932BFV Ethernet controller 1 x Intel 82358 EISA stuff 1 x Intel 82357 EISA stuff 2 x Intel 82352 EISA stuff 1 x Emulex FAS2T6 SCSI Controller 1 x AM27C01 128k Eprom 1 x AM281020 256k Eprom 1 x uPD31432 ARC Address Path Chip 2 x uPD31431 ARC Data Path Chip 1 x uPD30400 R4000PC/50 Audio Board 1 x Crystal CS4215 Audio I/O Chip 4 x Altera FPGA Audio DMA control Video Board 1 x TMS27C010A-12 128k Eprom 1 x IMS G364-11S Video Controller 16 x NEC uPD42274V-80 256Kx4 VRAM 80ns There are a few pages, regarding keyboard, mouse etc., missing. As soon I've got them I'll post what's missing here. Andy ------------------------------------------------------------------------------- Waldorf Electronics GmbH | Phone: +49 (0)2636-80294 R&D Department | Fax: +49 (0)2636-80188 Neustrasse 9-12, 53498 Waldorf, Germany | email: andy@waldorf-gmbh.de ------------------------------------------------------------------------------- From hp@gipsy.vmars.tuwien.ac.at Thu Dec 9 07:28:15 1993 Received: from gipsy.vmars.tuwien.ac.at by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA16176; Thu, 9 Dec 1993 07:28:15 -0500 Received: by gipsy.vmars.tuwien.ac.at id AA01696 (5.64+/IDA-1.3.4 for riscy@sunsite.unc.edu); Thu, 9 Dec 93 13:28:03 +0100 From: Peter Holzer Message-Id: <9312091228.AA01696@gipsy.vmars.tuwien.ac.at> Subject: Re: ARC 100 part list To: riscy@sunsite.unc.edu Date: Thu, 9 Dec 93 13:28:01 MET In-Reply-To: <9312091103.AA20847@resi.waldorf-gmbh.de>; from "Andreas Busse" at Dec 9, 93 6:05 am Reply-To: hp@vmars.vmars.tuwien.ac.at X-Return-Receipt-To: hp@vmars.tuwien.ac.at X-Mailer: ELM [version 2.3 PL5] You (Andreas Busse) wrote: > > Hi again, > > I've got the most of the part list now (faxes from US to here > seem to be a problem...). Do you have prices of these components, too, so that we can make a ballpark estimation of the cost? hp -- _ | hp@vmars.tuwien.ac.at | Peter Holzer | TU Vienna | CS/Real-Time Systems |_|_) |------------------------------------------------------------------------ | | | ...and it's finished! It only has to be written. __/ | -- Karl Lehenbauer From andy@waldorf-gmbh.de Thu Dec 9 16:52:15 1993 Received: from mail.Germany.EU.net by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA28596; Thu, 9 Dec 1993 09:52:47 -0500 Received: by mail.Germany.EU.net(EUnetD-2.3.0.l) via EUnet id HI08348; Thu, 9 Dec 1993 15:52:48 +0100 Received: from resi.waldorf-gmbh.de From: Andreas Busse Date: Thu, 9 Dec 93 15:52:15 +0100 Message-Id: <9312091452.AA21119@resi.waldorf-gmbh.de> Received: by resi.waldorf-gmbh.de (5.61/GEN-1.0.7) via EUnet for scotty.waldorf-gmbh.de id AA21119; Thu, 9 Dec 93 15:52:15 +0100 To: riscy@sunsite.unc.edu Subject: Re: ARC 100 part list > Do you have prices of these components, too, so that we can make a > ballpark estimation of the cost? Not yet. Please give me some time. Andy ------------------------------------------------------------------------------- Waldorf Electronics GmbH | Phone: +49 (0)2636-80294 R&D Department | Fax: +49 (0)2636-80188 Neustrasse 9-12, 53498 Waldorf, Germany | email: andy@waldorf-gmbh.de ------------------------------------------------------------------------------- From broadley@neurocog.lrdc.pitt.edu Wed Dec 15 13:24:02 1993 Received: from neurocog.lrdc.pitt.edu by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA03414; Wed, 15 Dec 1993 18:25:01 -0500 Message-Id: <199312152325.AA03414@SunSITE.Unc.EDU> Received: by neurocog.lrdc.pitt.edu (1.37.109.8/16.2) id AA23924; Wed, 15 Dec 1993 18:24:04 -0500 From: Bill Broadley Subject: Ping To: riscy@sunsite.unc.edu Date: Wed, 15 Dec 1993 18:24:02 -0500 (EST) X-Mailer: ELM [version 2.4 PL21] Content-Type: text Content-Length: 231 Just wondering if the list is running, and how things are going. -- Bill Broadley@{neurocog,schneider3,lrdc5}.lrdc.pitt.edu (in order of preference) Linux is great. Bike to live, live to bike. PGP-ok From andy@waldorf-gmbh.de Thu Dec 16 17:04:16 1993 Received: from mail.Germany.EU.net by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA13653; Thu, 16 Dec 1993 10:03:50 -0500 Received: by mail.Germany.EU.net(EUnetD-2.3.0.l) via EUnet id QQ15673; Thu, 16 Dec 1993 16:04:43 +0100 Received: from resi.waldorf-gmbh.de From: Andreas Busse Date: Thu, 16 Dec 93 16:04:16 +0100 Message-Id: <9312161504.AA03906@resi.waldorf-gmbh.de> Received: by resi.waldorf-gmbh.de (5.61/GEN-1.0.7) via EUnet for scotty.waldorf-gmbh.de id AA03906; Thu, 16 Dec 93 16:04:16 +0100 To: riscy@sunsite.unc.edu Subject: Re: Ping I've got it. Here's the echo :-) I guess you're waiting for my cost estimation, isn't it ? Well, I am so heavy loaded at the moment with a lot of urgent stuff that I can't promise anything at the moment. It's not that I have forgotten it, I simply have no time. Please, wait a bit. Andy ---------------------------------------------------------- Andreas Busse | andy@waldorf-gmbh.de Waldorf Electronics GmbH, R&D Dep. | Phone: +49 2636-80294 Neustrasse 9-12, D-53498 Waldorf | Fax: +49 2636-80188 ---------------------------------------------------------- From tthorn@daimi.aau.dk Thu Dec 16 17:34:54 1993 Received: from avignon.daimi.aau.dk by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA17291; Thu, 16 Dec 1993 10:35:01 -0500 Received: by avignon.daimi.aau.dk id AA21628 (5.65c8/IDA-1.4.4 for riscy@sunsite.unc.edu); Thu, 16 Dec 1993 16:34:54 +0100 Date: Thu, 16 Dec 1993 16:34:54 +0100 From: Tommy Thorn Message-Id: <199312161534.AA21628@avignon.daimi.aau.dk> To: riscy@sunsite.unc.edu Subject: Re: Ping In-Reply-To: <9312161504.AA03906@resi.waldorf-gmbh.de> Reply-To: Tommy.Thorn@daimi.aau.dk Being not much of a HW guy, but wanting to do at least something, I've been studing the MMU and exception handling of the r4000 and r4200 carefully. I even consider extending the SPIM r2000/r3000 simulator to cover MIPS III (the ISA of r4x00). I've also been playing with cross development tools. I'm a bit worried about porting Linux without some sort of coordination with Linus. From what I hear, the (ongoing) m68k port hasn't tried to isolate machine dependent parts. Shouldn't we/someone contact Linus and the kernel channel (I'm on it)? Now for an old mail: Daniel Veillard writes: > from all I've read concerning the riscWS/EISA chipset we > plan to use, and information I got from the net, it seems that > the future board will be very similar to the Magnum 4000 machine: stuff deleted > This kind of compatibility may be interesting for a fast > port of Linux if we were able to get access to the source of other > operating system for the Magnum (may help for Device drivers > and interface with CPU/MMU). I have also heard that Plan 9 > distributed operating system have been ported to the Magnum R4000 > and that free source licence is available for Universities. > Getting sources of other OS running on Misp Magnum 4000 may help > developping Linux and that's something we can do before the board > is available. > > Furthermore, staying compatible with the Magnum products may be > a good way to offer binary compatibility and run commercial products > on Linux. > > - Am I completely wrong ? > - Is there any other sources available publicly which may > help porting Linux ? > - Any comments ? Even getting access to a commercial unix for the MIPS is very dangeous. Don't even think about it. We would risk a lawsuit. Every bit of code in Linux must be *absolutely* free (in the GPL sense). There are other publicly sources which we could study: NetBSD is ported to MIPS, I think. Mach is for sure, but double check copyright and licence. I really don't think we would gain much though, as the hard part is always getting good HW docs. This should not be a problem with riscy. Offering binary compatibility might be doable and possible worthwhile. What I would much rather see is the software supplied the ARC 100 design, if any. I would like to know if we get the CPU from reset, or if there is a boot PROM we could/should build on? I hope I can afford riscy. /Tommy From hp@quasi.vmars.tuwien.ac.at Thu Dec 16 10:56:46 1993 Received: from quasi.vmars.tuwien.ac.at by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA19765; Thu, 16 Dec 1993 10:56:46 -0500 Received: by quasi.vmars.tuwien.ac.at id AA04163 (5.64+/IDA-1.3.4 for riscy@sunsite.unc.edu); Thu, 16 Dec 93 16:56:32 +0100 From: Peter Holzer Message-Id: <9312161556.AA04163@quasi.vmars.tuwien.ac.at> Subject: Re: Ping (fwd) To: riscy@sunsite.unc.edu (The RISCY mailing list) Date: Thu, 16 Dec 93 16:56:31 MET Reply-To: hp@vmars.vmars.tuwien.ac.at X-Return-Receipt-To: hp@vmars.tuwien.ac.at X-Mailer: ELM [version 2.3 PL5] You (hp) wrote: >From hp Thu Dec 16 16:52:43 1993 Subject: Re: Ping To: tthorn@daimi.aau.dk Date: Thu, 16 Dec 93 16:52:43 MET In-Reply-To: <199312161534.AA21628@avignon.daimi.aau.dk>; from "Tommy Thorn" at Dec 16, 93 10:36 am Reply-To: hp@vmars.tuwien.ac.at X-Return-Receipt-To: hp@vmars.tuwien.ac.at X-Mailer: ELM [version 2.3 PL5] You (Tommy Thorn) wrote: > I'm a bit worried about porting Linux without some sort of > coordination with Linus. From what I hear, the (ongoing) m68k > port hasn't tried to isolate machine dependent parts. Shouldn't > we/someone contact Linus and the kernel channel (I'm on it)? Yes definitely. If we don't do this we risc (:-)) creating a branch of Linux which will evolve away from PC-Linux with more and more incompatibilities over time. If we stay in touch with Linus, Chances are good that there will be one Linux with only a few well-defined machine dependent parts. > I hope I can afford riscy. So do I. hp -- _ | hp@vmars.tuwien.ac.at | Peter Holzer | TU Vienna | CS/Real-Time Systems |_|_) |------------------------------------------------------------------------ | | | ...and it's finished! It only has to be written. __/ | -- Karl Lehenbauer -- _ | hp@vmars.tuwien.ac.at | Peter Holzer | TU Vienna | CS/Real-Time Systems |_|_) |------------------------------------------------------------------------ | | | ...and it's finished! It only has to be written. __/ | -- Karl Lehenbauer From Daniel.Veillard@imag.fr Thu Dec 16 18:59:13 1993 Received: from imag.imag.fr by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA27311; Thu, 16 Dec 1993 11:59:26 -0500 Received: from maupiti.imag.fr by imag.imag.fr with SMTP id AA05965 (5.65c8/IDA-1.4.4 for ); Thu, 16 Dec 1993 17:56:20 +0100 Received: by maupiti.imag.fr (5.65/5.17) id AA13796; Thu, 16 Dec 1993 17:59:14 +0100 From: Daniel.Veillard@imag.fr (Daniel Veillard) Message-Id: <9312161659.AA13796@maupiti.imag.fr> To: riscy@sunsite.unc.edu Cc: Daniel.Veillard@imag.fr Subject: Re: Ping In-Reply-To: Your message of "Thu, 16 Dec 93 10:36:15 EST." <199312161534.AA21628@avignon.daimi.aau.dk> Date: Thu, 16 Dec 93 17:59:13 +0100 Tommy Thorn wrote > >Being not much of a HW guy, but wanting to do at least something, >I've been studing the MMU and exception handling of the r4000 and >r4200 carefully. I even consider extending the SPIM r2000/r3000 >simulator to cover MIPS III (the ISA of r4x00). I had a look in this direction too, but the current implementation of SPIM doesn't seems to emulate anything concerning the exception handling of the MIPS familly especially the TLB related exceptions. > I've also been >playing with cross development tools. I got in touch with some people trying to add GCC support for 64 bit operations and got a version of GAS abble to assemble 64 bit specific stuff. One question concerning the Mips port concern the extended adressing capabilities of the Mips chips, should we use it or restain memory adressing to the same of the [34]86, I suppose too that maintaining compatibility with Little Endian mode would avoid some weird porting problems. > >I'm a bit worried about porting Linux without some sort of >coordination with Linus. From what I hear, the (ongoing) m68k >port hasn't tried to isolate machine dependent parts. Shouldn't >we/someone contact Linus and the kernel channel (I'm on it)? > stuff I wrote about looking for source from other R4000 OSes deleted > > - Is there any other sources available publicly which may > > help porting Linux ? > > - Any comments ? > >Even getting access to a commercial unix for the MIPS is very >dangeous. Don't even think about it. We would risk a lawsuit. > >Every bit of code in Linux must be *absolutely* free (in the GPL >sense). I admit looking at commercial sources is dangerous and should be prohibited for working on this project, but looking at free sources looking for HW programming tips should be Ok. >There are other publicly sources which we could study: NetBSD >is ported to MIPS, I think. Mach is for sure, but double check >copyright and licence. Looking at Mach sources it seems that DecStations, and some AST machines. But I'm afraid no machine based on ARC design are supported. What about NetBSD ? > >I really don't think we would gain much though, as the hard part is >always getting good HW docs. This should not be a problem with riscy. admitted, >Offering binary compatibility might be doable and possible worthwhile. > >What I would much rather see is the software supplied the ARC 100 >design, if any. I would like to know if we get the CPU from reset, >or if there is a boot PROM we could/should build on? It seems there is a 64 Kb boot EEPROM which in turn launch a program stored in a 256 Kb Flash EPROM. The Flash EPROM can be filled using a floppy with the HAL code for booting Windows-NT or specific code for UNIX bootstrap. But this kind of information should be specified precisely into the ARC design (I hope so !). >I hope I can afford riscy. > >/Tommy so do I, Daniel From tthorn@daimi.aau.dk Thu Dec 16 21:09:39 1993 Received: from avignon.daimi.aau.dk by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA12391; Thu, 16 Dec 1993 14:09:45 -0500 Received: by avignon.daimi.aau.dk id AA26245 (5.65c8/IDA-1.4.4 for Multiple recipients of list ); Thu, 16 Dec 1993 20:09:39 +0100 Date: Thu, 16 Dec 1993 20:09:39 +0100 From: Tommy Thorn Message-Id: <199312161909.AA26245@avignon.daimi.aau.dk> To: Daniel.Veillard@imag.fr Cc: Multiple recipients of list Subject: Re: Ping In-Reply-To: <9312161659.AA13796@maupiti.imag.fr> References: <9312161659.AA13796@maupiti.imag.fr> Reply-To: Tommy.Thorn@daimi.aau.dk Daniel Veillard writes: > I had a look in this direction too, but the current implementation > of SPIM doesn't seems to emulate anything concerning the exception > handling of the MIPS familly especially the TLB related exceptions. No, it could be added though.. oh, it was just a thought. > I got in touch with some people trying to add GCC support for > 64 bit operations and got a version of GAS abble to assemble > 64 bit specific stuff. One question concerning the Mips port concern > the extended adressing capabilities of the Mips chips, should we > use it or restain memory adressing to the same of the [34]86, > I suppose too that maintaining compatibility with Little Endian > mode would avoid some weird porting problems. Some of this was discussed a while ago. I think the general consensus was that initially should stay as close as possible to the x86 to finish the first port as fast and as easy as possible. Later, we can start looking into 64 bit, better MMU etc. I can't imagine any hacker with 64 bit hardware who wouldn't want to run 64 bit binaries, but better get something running first. > I admit looking at commercial sources is dangerous and should be > prohibited for working on this project, but looking at free sources > looking for HW programming tips should be Ok. Absolutely agreed, but be sure the source is free. Last time I looked, some of the source in Mach was only free for use in Mach. > Looking at Mach sources it seems that DecStations, and some AST > machines. But I'm afraid no machine based on ARC design are supported. > What about NetBSD ? The (possible) differences between DecStation, AST and ARC are: Endian, Memory configuration, CPU and devices. Did I leave anything out? We need to write our own drivers for scsi, video and ethernet anyway. Drew is fairly familliar with the scsi chips use (right?). The video should be simple. I don't know about the ethernet. Is someone out there into NetBSD? /Tommy From toz!cyberman@acsu.buffalo.edu Tue Dec 21 09:55:24 1993 Received: from acsu.buffalo.edu (eerie.acsu.buffalo.edu) by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA25906; Tue, 21 Dec 1993 16:03:56 -0500 Received: from toz.UUCP (uucp@localhost) by acsu.buffalo.edu (8.6.4/8.1) with UUCP id QAA27603 for riscy@sunsite.unc.edu; Tue, 21 Dec 1993 16:03:51 -0500 Received: by toz.buffalo.ny.us (1.65/waf) via UUCP; Tue, 21 Dec 93 15:09:18 EST for riscy@sunsite.unc.edu To: riscy@sunsite.unc.edu Subject: Riscy: is it too expensive? From: toz!cyberman@acsu.buffalo.edu (Cyberman) Comments: Message-Id: <2uBXec3w165w@toz.buffalo.ny.us> Date: Tue, 21 Dec 93 14:55:24 EST Organization: The Tower of Zot - Buffalo, NY USA - (716)839-0431 something recently said about cost sort of "pinged" in my head. Right now I DO NOT expect to be able to build/buy a riscy. I really think that we have deviated greatly from the original intent. Which I am certain has been obscured significantly since may or april when the idea first started. As I recall ( and I have a good memory :) the intent was to make an inexpensive MIPS based ISA machine. The idea was inexpensive first, MIPS second, ISA last. Though riscy may be a bargain for what people will get. I can't help wondering if an alternative design should also be built. Perhaps a riscy hi/lo design? :) At this moment I am considering just doing my OWN Mips based board (and in fact this is what I am planing on doing). Opps I forgot the zero it runs linux (smile). (they say the first thing that goes is ... uh can't remember) The reason for this is riscy is definately too expensive for moi. It may run rings around a 486, and may be comparable in price, it however isn't what I wanted. Nothing wrong with that, but I suspect some people may have been wanting something similiar to me. Would making 2 designs for riscy be possible? like riscy1 and riscy 1/2 ? :) I think it should be something to consider. PS - if anyone adds to the functionality of spim tell me, that's what I'm planing on using to port linux. PPS - I think the Linux code needs to be reorganized for multiplatform compilation (like many net coordinated software packages are). "Everything is vanity ..." "Even a fool looks wise if he keeps his mouth shut" "A man to his own, is a person left to his own devices" "Bewary of thinking you are always right, Hitler did" "Be wary of villianizing anyone, you could be next." Computer Engineer - Ernestly expecting employment. From broadley@neurocog.lrdc.pitt.edu Fri Dec 24 07:53:16 1993 Received: from neurocog.lrdc.pitt.edu by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA00864; Fri, 24 Dec 1993 12:53:17 -0500 Message-Id: <199312241753.AA00864@SunSITE.Unc.EDU> Received: by neurocog.lrdc.pitt.edu (1.37.109.4/16.2) id AA08983; Fri, 24 Dec 93 12:53:16 -0500 From: Bill Broadley Subject: NEC design kits (fwd) To: riscy@sunsite.unc.edu Date: Fri, 24 Dec 1993 12:53:16 -0500 (EST) X-Mailer: ELM [version 2.4 PL23] Content-Type: text Content-Length: 690 > A few minutes ago I called the tech support guy at > NEC Europe, just to ask if there are any news > regarding the R4000 design kits. > You won't believe it: This morning he received > a fax that the kits are ready and available. > He will receive a sample kit this week and is > quite sure that we can have the kit *before* XMAS ! PING.... Merry xmas all..... Well it's not long before xmas.... ;-) Is the kit just a list of specs and/or motherboard? Just anxiously awaiting more info. (especially the scsi chip) -- Bill Broadley@{neurocog,schneider3,lrdc5}.lrdc.pitt.edu (in order of preference) Linux is great. Bike to live, live to bike. PGP-ok From andy@waldorf-gmbh.de Mon Dec 27 10:39:23 1993 Received: from mail.Germany.EU.net by SunSITE.Unc.EDU (5.65c+IDA/FvK-1.06) with SMTP id AA22722; Mon, 27 Dec 1993 03:38:49 -0500 Received: by mail.Germany.EU.net(EUnetD-2.3.1.a) via EUnet id gU07404; Mon, 27 Dec 1993 09:39:32 +0100 Received: from resi.waldorf-gmbh.de From: Andreas Busse Date: Mon, 27 Dec 93 09:39:23 +0100 Message-Id: <9312270839.AA18852@resi.waldorf-gmbh.de> Received: by resi.waldorf-gmbh.de (5.61/GEN-1.0.7) via EUnet for scotty.waldorf-gmbh.de id AA18852; Mon, 27 Dec 93 09:39:23 +0100 To: broadley@neurocog.lrdc.pitt.edu Subject: Re: NEC design kits (fwd) Cc: riscy@sunsite.unc.edu > Merry xmas all..... Thanks ! > Well it's not long before xmas.... ;-) > > Is the kit just a list of specs and/or motherboard? HAHA ! > Just anxiously awaiting more info. (especially the scsi chip) I *AM* working on it. Perhaps you can imagine that I have still some other things to do. Andy ---------------------------------------------------------- Andreas Busse | andy@waldorf-gmbh.de Waldorf Electronics GmbH, R&D Dep. | Phone: +49 2636-80294 Neustrasse 9-12, D-53498 Waldorf | Fax: +49 2636-80188 ----------------------------------------------------------