From beth@linux-mips.org Mon Aug  8 13:24:18 2005
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From: beth@linux-mips.org
To:  maltalinux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: malta
Date: Mon, 08 Aug 2005 14:24:18 +0100
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CVSROOT:	/home/cvs
Module name:	malta
Changes by:	beth@ftp.linux-mips.org	05/08/08 14:24:15

Modified files:
	linux/arch/mips/kernel: Tag: MaltaRef_2_6 kspd.c rtlx.c vpe.c 
	linux/include/asm-mips: Tag: MaltaRef_2_6 mipsmtregs.h 

Log message:
	* arch/mips/kernel/kspd.c
	* arch/mips/kernel/rtlx.c
	* arch/mips/kernel/vpe.c: Fix reliabilty issues starting VPE1.
	
	* include/asm-mips/mipsmtregs.h: Additional c0 register macros.

diff -urN malta/linux/arch/mips/kernel/kspd.c malta/linux/arch/mips/kernel/kspd.c
--- malta/linux/arch/mips/kernel/Attic/kspd.c	2005/07/27 13:37:54	1.1.1000.1
+++ malta/linux/arch/mips/kernel/Attic/kspd.c	2005/08/08 13:24:14	1.1.1000.2
@@ -192,6 +192,8 @@
 				n->kspd_sp_exit(SP_VPE);
 			}
 			sp_stopping = 1;
+
+			printk(KERN_DEBUG "KSPD got exit syscall from SP\n");
 			break;
 
 		default:
diff -urN malta/linux/arch/mips/kernel/rtlx.c malta/linux/arch/mips/kernel/rtlx.c
--- malta/linux/arch/mips/kernel/rtlx.c	2005/07/27 13:37:54	1.1.1000.1
+++ malta/linux/arch/mips/kernel/rtlx.c	2005/08/08 13:24:14	1.1.1000.2
@@ -61,6 +61,7 @@
 
 extern void *vpe_get_shared(int index);
 static int rtlx_init(struct rtlx_info *rtlxi);
+DECLARE_MUTEX(wq_mutex);
 
 static void rtlx_dispatch(struct pt_regs *regs)
 {
@@ -130,6 +131,7 @@
 	/* wake up any sleeping rtlx_open's */
 	for (i = 0; i < RTLX_CHANNELS; i++)
 		wake_up_interruptible(&channel_wqs[i].lx_queue);
+
 }
 static void stopping(int vpe)
 {
@@ -158,6 +160,7 @@
 				set_current_state(TASK_INTERRUPTIBLE);
 				while ((p = vpe_get_shared(RTLX_TARG_VPE)) == NULL) {
 					schedule();
+					set_current_state(TASK_INTERRUPTIBLE);
 				}
 
 				set_current_state(TASK_RUNNING);
@@ -171,13 +174,26 @@
 			if (can_sleep) {
 				DECLARE_WAITQUEUE(wait, current);
 			
-
 				/* go to sleep */
 				add_wait_queue(&channel_wqs[index].lx_queue, &wait);
 				
 				set_current_state(TASK_INTERRUPTIBLE);
 				while (*p == NULL) {
 					schedule();
+
+					/* reset task state to interruptable otherwise
+					   we'll whizz round here like a very fast loopy 
+					   thing. schedule() appears to return with state
+					   set to TASK_RUNNING. 
+
+					   If the loaded SP program, for whatever reason, 
+					   doesn't set up the shared structure *p will never
+					   become true. So whoever connected to either /dev/rt?
+					   or if it was kspd, will then take up rather a lot of 
+					   processor cycles.
+					*/
+
+					set_current_state(TASK_INTERRUPTIBLE);
 				}
 				
 				set_current_state(TASK_RUNNING);
diff -urN malta/linux/arch/mips/kernel/vpe.c malta/linux/arch/mips/kernel/vpe.c
--- malta/linux/arch/mips/kernel/vpe.c	2005/07/27 13:37:54	1.1.1000.1
+++ malta/linux/arch/mips/kernel/vpe.c	2005/08/08 13:24:14	1.1.1000.2
@@ -267,20 +267,17 @@
 	printk("config3 0x%lx MT %ld\n", val,
 	       (val & CONFIG3_MT) >> CONFIG3_MT_SHIFT);
 
-	val = read_c0_mvpconf0();
-	printk("mvpconf0 0x%lx, PVPE %ld PTC %ld M %ld\n", val,
-	       (val & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT,
-	       val & MVPCONF0_PTC, (val & MVPCONF0_M) >> MVPCONF0_M_SHIFT);
-
 	val = read_c0_mvpcontrol();
 	printk("MVPControl 0x%lx, STLB %ld VPC %ld EVP %ld\n", val,
 	       (val & MVPCONTROL_STLB) >> MVPCONTROL_STLB_SHIFT,
 	       (val & MVPCONTROL_VPC) >> MVPCONTROL_VPC_SHIFT,
 	       (val & MVPCONTROL_EVP));
 
-	val = read_c0_vpeconf0();
-	printk("VPEConf0 0x%lx MVP %ld\n", val,
-	       (val & VPECONF0_MVP) >> VPECONF0_MVP_SHIFT);
+	val = read_c0_mvpconf0();
+	printk("mvpconf0 0x%lx, PVPE %ld PTC %ld M %ld\n", val,
+	       (val & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT,
+	       val & MVPCONF0_PTC, (val & MVPCONF0_M) >> MVPCONF0_M_SHIFT);
+
 }
 
 /* Find some VPE program space  */
@@ -695,10 +692,26 @@
 
 static void dump_tc(struct tc *t)
 {
-	printk(KERN_WARNING "VPE: TC index %d TCStatus 0x%lx halt 0x%lx\n",
-	       t->index, read_tc_c0_tcstatus(), read_tc_c0_tchalt());
+	unsigned long val;
+
+	settc(t->index);
+
+	printk(KERN_WARNING "\nVPE: TC index %d targtc %ld TCStatus 0x%lx halt 0x%lx\n",
+	       t->index, read_c0_vpecontrol() & VPECONTROL_TARGTC, 
+	       read_tc_c0_tcstatus(), read_tc_c0_tchalt());
+
 	printk(KERN_WARNING "VPE: tcrestart 0x%lx\n", read_tc_c0_tcrestart());
 	printk(KERN_WARNING "VPE: tcbind 0x%lx\n", read_tc_c0_tcbind());
+
+	val = read_c0_vpeconf0();
+	printk("VPEConf0 0x%lx MVP %ld\n", val,
+	       (val & VPECONF0_MVP) >> VPECONF0_MVP_SHIFT);
+
+	printk(KERN_WARNING "VPE: c0 status 0x%lx\n", read_vpe_c0_status());
+	printk(KERN_WARNING "VPE: c0 cause 0x%lx\n", read_vpe_c0_cause());
+
+	printk(KERN_WARNING "VPE: c0 badvaddr 0x%lx\n", read_vpe_c0_badvaddr());
+	printk(KERN_WARNING "VPE: c0 epc 0x%lx\n", read_vpe_c0_epc());
 }
 
 static void dump_tclist(void)
@@ -713,7 +726,7 @@
 /* We are prepared so configure and start the VPE... */
 int vpe_run(vpe_t * v)
 {
-	unsigned long val;
+	unsigned long val, dmt_flag;
 	struct tc *t;
 	struct vpe_notifications *n;
 
@@ -745,8 +758,6 @@
 
 	settc(t->index);
 
-	val = read_vpe_c0_vpeconf0();
-
 	/* should check it is halted, and not activated */
 	if ((read_tc_c0_tcstatus() & TCSTATUS_A) || !(read_tc_c0_tchalt() & TCHALT_H)) {
 		printk(KERN_WARNING "VPE: TC %d is already doing something!\n",
@@ -756,13 +767,16 @@
 		return -ENOEXEC;
 	}
 
+	/* disable multi-threaded execution whilst we activate, clear the halt bit
+	   and bound the tc to the other VPE... */
+	dmt_flag = dmt();
 
 	/* Write the address we want it to start running from in the TCPC register. */
 	write_tc_c0_tcrestart((unsigned long)v->__start);
 
-	/* write the sivc_info address to tccontext */
 	write_tc_c0_tccontext((unsigned long)0);
 
+
 	/* mark the TC as activated, not interrupt exempt and not dynamically 
 	   allocatable */
 	val = read_tc_c0_tcstatus();
@@ -782,18 +796,23 @@
 	   registers to set up, and so an EJTAG probe can trigger on it */
 	write_tc_c0_tcbind((read_tc_c0_tcbind() & ~TCBIND_CURVPE) | v->minor);
 
+
 	/* Set up the XTC bit in vpeconf0 to point at our tc */
-	write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | (t->index << VPECONF0_XTC_SHIFT));
+	write_vpe_c0_vpeconf0( (read_vpe_c0_vpeconf0() & ~(VPECONF0_XTC))
+			       | (t->index << VPECONF0_XTC_SHIFT));
 	
 	/* enable this VPE */
 	write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | VPECONF0_VPA);	
 
+	/* clear out any leftovers from a previous program */
+ 	write_vpe_c0_status(0); 
+	write_vpe_c0_cause(0);
+
 	/* take system out of configuration state */
 	write_c0_mvpcontrol(read_c0_mvpcontrol() & ~MVPCONTROL_VPC);
 
-
-	dump_tc(t);
-	
+	/* now safe to re-enable multi-threading */
+	emt(dmt_flag);
 
 	/* set it running */
 	evpe(EVPE_ENABLE);
@@ -801,7 +820,6 @@
 	list_for_each_entry(n, &v->notify, list) {
 		n->start(v->minor);
 	}
-
 	return 0;
 }
 
@@ -937,8 +955,7 @@
 			continue;
 
 		if (sechdrs[i].sh_type == SHT_REL)
-			err =
-				apply_relocations(sechdrs, strtab, symindex, i, &mod);
+			err = apply_relocations(sechdrs, strtab, symindex, i, &mod);
 		else if (sechdrs[i].sh_type == SHT_RELA)
 			err = apply_relocate_add(sechdrs, strtab, symindex, i,
 						 &mod);
@@ -971,6 +988,8 @@
 {
 	struct tc *t;
 
+	settc(v->minor);
+
 	printk(KERN_DEBUG "VPEControl 0x%lx\n", read_vpe_c0_vpecontrol());
 	printk(KERN_DEBUG "VPEConf0 0x%lx\n", read_vpe_c0_vpeconf0());
 
@@ -996,12 +1015,6 @@
 	
 	write_tc_c0_tchalt(TCHALT_H);
 
-	/* clear out any left overs from a previous program */
-	write_vpe_c0_cause(0);
-
-	/* clear interrupts enabled IE, ERL, EXL, and KSU from c0 status */
-	write_vpe_c0_status(read_vpe_c0_status() & ~(ST0_ERL | ST0_KSU | ST0_IE | ST0_EXL));
-
 	/* bind it to anything other than VPE1 */
 	write_tc_c0_tcbind(read_tc_c0_tcbind() & ~TCBIND_CURVPE); // | TCBIND_CURVPE
 
@@ -1043,6 +1056,9 @@
 
 	if (v->state != VPE_STATE_UNUSED) {
 		dvpe();
+
+		printk("vpe_open tc in use dumping regs\n");
+		dump_tc(get_tc(minor));
 		
 		list_for_each_entry(not, &v->notify, list) {
 			not->stop(minor);
diff -urN malta/linux/include/asm-mips/mipsmtregs.h malta/linux/include/asm-mips/mipsmtregs.h
--- malta/linux/include/asm-mips/mipsmtregs.h	2005/07/28 17:22:13	1.2.1000.2
+++ malta/linux/include/asm-mips/mipsmtregs.h	2005/08/08 13:24:14	1.2.1000.3
@@ -338,6 +338,10 @@
 #define read_vpe_c0_ebase()		mftc0($15,1)
 #define write_vpe_c0_ebase(val)		mttc0($15, 1, val)
 #define write_vpe_c0_compare(val)	mttc0($11, 0, val)
+#define read_vpe_c0_badvaddr()		mftc0($8,0)
+#define read_vpe_c0_epc()		mftc0($14,0)
+#define write_vpe_c0_epc(val)		mttc0($14,0, val)
+
 
 
 /* TC */

From chris@linux-mips.org Thu Aug 11 13:00:03 2005
Received: with ECARTIS (v1.0.0; list maltalinux-cvs-patches); Thu, 11 Aug 2005 14:00:03 +0100 (BST)
From: chris@linux-mips.org
To:  maltalinux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: malta
Date: Thu, 11 Aug 2005 14:00:03 +0100
X-archive-position: 37
X-ecartis-version: Ecartis v1.0.0
Sender: maltalinux-cvs-patches-bounce@linux-mips.org
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CVSROOT:	/home/cvs
Module name:	malta
Changes by:	chris@ftp.linux-mips.org	05/08/11 14:00:01

Added files:
	linux/include/asm-mips/mach-mips: Tag: MaltaRef_2_6 param.h 

Log message:
	Set HZ to 100 on MIPS boards as most of them
	will be using CPUs implemented in FPGA with
	low overall clock speeds.

diff -urN malta/linux/include/asm-mips/mach-mips/param.h malta/linux/include/asm-mips/mach-mips/param.h
--- malta/linux/include/asm-mips/mach-mips/Attic/param.h	1970/01/01 00:00:00
+++ malta/linux/include/asm-mips/mach-mips/Attic/param.h	2005-08-11 14:00:01.532410000 +0100	1.1.1000.1
@@ -0,0 +1,18 @@
+
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 by Ralf Baechle
+ */
+#ifndef __ASM_MACH_MIPS_PARAM_H
+#define __ASM_MACH_MIPS_PARAM_H
+
+/*
+ * MIPS boards typically use FPGAs with relatively low clock frequencies.
+ */
+
+#define HZ		100		/* Internal kernel timer frequency */
+
+#endif /* __ASM_MACH_MIPS_PARAM_H */

From beth@linux-mips.org Thu Aug 11 13:27:22 2005
Received: with ECARTIS (v1.0.0; list maltalinux-cvs-patches); Thu, 11 Aug 2005 14:27:22 +0100 (BST)
From: beth@linux-mips.org
To:  maltalinux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: malta
Date: Thu, 11 Aug 2005 14:27:22 +0100
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X-ecartis-version: Ecartis v1.0.0
Sender: maltalinux-cvs-patches-bounce@linux-mips.org
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X-list: maltalinux-cvs-patches


CVSROOT:	/home/cvs
Module name:	malta
Changes by:	beth@ftp.linux-mips.org	05/08/11 14:27:20

Modified files:
	linux/arch/mips/kernel: Tag: MaltaRef_2_6 rtlx.c 

Log message:
	Fix O_NONBLOCK flag handling

diff -urN malta/linux/arch/mips/kernel/rtlx.c malta/linux/arch/mips/kernel/rtlx.c
--- malta/linux/arch/mips/kernel/rtlx.c	2005/08/08 13:24:14	1.1.1000.2
+++ malta/linux/arch/mips/kernel/rtlx.c	2005/08/11 13:27:20	1.1.1000.3
@@ -167,6 +167,10 @@
 				remove_wait_queue(&channel_wqs[index].lx_queue, &wait);
 
 				/* back running */
+			} else {
+				printk( KERN_DEBUG "No SP program loaded, and device "
+					"opened with O_NONBLOCK\n");
+				return -ENOSYS;
 			}
 		}
 
@@ -354,7 +358,7 @@
 {
 	int minor = MINOR(inode->i_rdev);
 
-	return rtlx_open(minor, 0);
+	return rtlx_open(minor, (filp->f_flags & O_NONBLOCK) ? 0 : 1);
 }
 
 static int file_release(struct inode *inode, struct file *filp)
@@ -394,7 +398,7 @@
 	int minor = MINOR(file->f_dentry->d_inode->i_rdev);
 
 	/* data available? */
-	if (!rtlx_read_poll(minor, (file->f_flags & O_NONBLOCK))) {
+	if (!rtlx_read_poll(minor, (file->f_flags & O_NONBLOCK) ? 0 : 1)) {
 		return 0;	// -EAGAIN makes cat whinge
 	}
 	

From beth@linux-mips.org Thu Aug 11 13:27:52 2005
Received: with ECARTIS (v1.0.0; list maltalinux-cvs-patches); Thu, 11 Aug 2005 14:27:52 +0100 (BST)
From: beth@linux-mips.org
To:  maltalinux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: malta
Date: Thu, 11 Aug 2005 14:27:52 +0100
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CVSROOT:	/home/cvs
Module name:	malta
Changes by:	beth@ftp.linux-mips.org	05/08/11 14:27:51

Modified files:
	linux/arch/mips/kernel: Tag: MaltaRef_2_6 vpe.c 

Log message:
	Support fully linked SP programs.

diff -urN malta/linux/arch/mips/kernel/vpe.c malta/linux/arch/mips/kernel/vpe.c
--- malta/linux/arch/mips/kernel/vpe.c	2005/08/08 13:24:14	1.1.1000.2
+++ malta/linux/arch/mips/kernel/vpe.c	2005/08/11 13:27:51	1.1.1000.3
@@ -852,8 +852,7 @@
 	Elf_Shdr *sechdrs;
 	long err = 0;
 	char *secstrings, *strtab = NULL;
-	unsigned int len, i, symindex = 0, strindex = 0;
-
+	unsigned int len, i, symindex = 0, strindex = 0, relocate = 0;
 	struct module mod;	// so we can re-use the relocations code
 
 	memset(&mod, 0, sizeof(struct module));
@@ -865,13 +864,17 @@
 	/* Sanity checks against insmoding binaries or wrong arch,
 	   weird elf version */
 	if (memcmp(hdr->e_ident, ELFMAG, 4) != 0
-	    || hdr->e_type != ET_REL || !elf_check_arch(hdr)
+	    || (hdr->e_type != ET_REL && hdr->e_type != ET_EXEC)
+	    || !elf_check_arch(hdr)
 	    || hdr->e_shentsize != sizeof(*sechdrs)) {
 		printk(KERN_WARNING
 		       "VPE program, wrong arch or weird elf version\n");
 
 		return -ENOEXEC;
 	}
+	
+	if (hdr->e_type == ET_REL) 
+	    relocate = 1;
 
 	if (len < hdr->e_shoff + hdr->e_shnum * sizeof(Elf_Shdr)) {
 		printk(KERN_ERR "VPE program length %u truncated\n", len);
@@ -886,87 +889,116 @@
 	/* And these should exist, but gcc whinges if we don't init them */
 	symindex = strindex = 0;
 
-	for (i = 1; i < hdr->e_shnum; i++) {
+	if (relocate) {
+		for (i = 1; i < hdr->e_shnum; i++) {
+			if (sechdrs[i].sh_type != SHT_NOBITS
+			    && len < sechdrs[i].sh_offset + sechdrs[i].sh_size) {
+				printk(KERN_ERR "VPE program length %u truncated\n",
+				       len);
+				return -ENOEXEC;
+			}
 
-		if (sechdrs[i].sh_type != SHT_NOBITS
-		    && len < sechdrs[i].sh_offset + sechdrs[i].sh_size) {
-			printk(KERN_ERR "VPE program length %u truncated\n",
-			       len);
-			return -ENOEXEC;
+			/* Mark all sections sh_addr with their address in the
+			   temporary image. */
+			sechdrs[i].sh_addr = (size_t) hdr + sechdrs[i].sh_offset;
+
+			/* Internal symbols and strings. */
+			if (sechdrs[i].sh_type == SHT_SYMTAB) {
+				symindex = i;
+				strindex = sechdrs[i].sh_link;
+				strtab = (char *)hdr + sechdrs[strindex].sh_offset;
+			}
 		}
 
-		/* Mark all sections sh_addr with their address in the
-		   temporary image. */
-		sechdrs[i].sh_addr = (size_t) hdr + sechdrs[i].sh_offset;
-
-		/* Internal symbols and strings. */
-		if (sechdrs[i].sh_type == SHT_SYMTAB) {
-			symindex = i;
-			strindex = sechdrs[i].sh_link;
-			strtab = (char *)hdr + sechdrs[strindex].sh_offset;
-		}
+		layout_sections(&mod, hdr, sechdrs, secstrings);
 	}
 
-	layout_sections(&mod, hdr, sechdrs, secstrings);
 
 	v->load_addr = alloc_progmem(mod.core_size);
 	memset(v->load_addr, 0, mod.core_size);
 
 	printk("VPE elf_loader: loading to %p\n", v->load_addr);
 
-	for (i = 0; i < hdr->e_shnum; i++) {
-		void *dest;
+	if (relocate) {
+		for (i = 0; i < hdr->e_shnum; i++) {
+			void *dest;
+
+			if (!(sechdrs[i].sh_flags & SHF_ALLOC))
+				continue;
+
+			dest = v->load_addr + sechdrs[i].sh_entsize;
+
+			if (sechdrs[i].sh_type != SHT_NOBITS)
+				memcpy(dest, (void *)sechdrs[i].sh_addr,
+				       sechdrs[i].sh_size);
+			/* Update sh_addr to point to copy in image. */
+			sechdrs[i].sh_addr = (unsigned long)dest;
+			
+			printk(KERN_DEBUG " section sh_name %s sh_addr 0x%x\n", 
+			       secstrings + sechdrs[i].sh_name, sechdrs[i].sh_addr);
+		}
 
-		if (!(sechdrs[i].sh_flags & SHF_ALLOC))
-			continue;
 
-		dest = v->load_addr + sechdrs[i].sh_entsize;
+		/* Fix up syms, so that st_value is a pointer to location. */
+		err = simplify_symbols(sechdrs, symindex, strtab, secstrings,
+				       hdr->e_shnum, &mod);
+		if (err < 0) {
+			printk(KERN_WARNING "VPE: unable to simplify symbols\n");
+			goto cleanup;
+		}
 
-		if (sechdrs[i].sh_type != SHT_NOBITS)
-			memcpy(dest, (void *)sechdrs[i].sh_addr,
-			       sechdrs[i].sh_size);
-		/* Update sh_addr to point to copy in image. */
-		sechdrs[i].sh_addr = (unsigned long)dest;
+		/* Now do relocations. */
+		for (i = 1; i < hdr->e_shnum; i++) {
+			const char *strtab = (char *)sechdrs[strindex].sh_addr;
+			unsigned int info = sechdrs[i].sh_info;
+
+			/* Not a valid relocation section? */
+			if (info >= hdr->e_shnum)
+				continue;
+
+			/* Don't bother with non-allocated sections */
+			if (!(sechdrs[info].sh_flags & SHF_ALLOC))
+				continue;
+
+			if (sechdrs[i].sh_type == SHT_REL)
+				err = apply_relocations(sechdrs, strtab, symindex, i, &mod);
+			else if (sechdrs[i].sh_type == SHT_RELA)
+				err = apply_relocate_add(sechdrs, strtab, symindex, i,
+							 &mod);
+			if (err < 0) {
+				printk(KERN_WARNING
+				       "vpe_elfload: error in relocations err %ld\n",
+				       err);
+				goto cleanup;
+			}
+		}
+	} else {
+		for (i = 0; i < hdr->e_shnum; i++) {
 
-		printk(KERN_DEBUG " section sh_name %s sh_addr 0x%x\n", 
-		       secstrings + sechdrs[i].sh_name, sechdrs[i].sh_addr);
-	}
+			if (!(sechdrs[i].sh_flags & SHF_ALLOC) || sechdrs[i].sh_type == PT_MIPS_REGINFO)
+				continue;
 
-	/* Fix up syms, so that st_value is a pointer to location. */
-	err =
-		simplify_symbols(sechdrs, symindex, strtab, secstrings,
-				 hdr->e_shnum, &mod);
-	if (err < 0) {
-		printk(KERN_WARNING "VPE: unable to simplify symbols\n");
-		goto cleanup;
-	}
-
-	/* Now do relocations. */
-	for (i = 1; i < hdr->e_shnum; i++) {
-		const char *strtab = (char *)sechdrs[strindex].sh_addr;
-		unsigned int info = sechdrs[i].sh_info;
-
-		/* Not a valid relocation section? */
-		if (info >= hdr->e_shnum)
-			continue;
-
-		/* Don't bother with non-allocated sections */
-		if (!(sechdrs[info].sh_flags & SHF_ALLOC))
-			continue;
-
-		if (sechdrs[i].sh_type == SHT_REL)
-			err = apply_relocations(sechdrs, strtab, symindex, i, &mod);
-		else if (sechdrs[i].sh_type == SHT_RELA)
-			err = apply_relocate_add(sechdrs, strtab, symindex, i,
-						 &mod);
-		if (err < 0) {
-			printk(KERN_WARNING
-			       "vpe_elfload: error in relocations err %ld\n",
-			       err);
-			goto cleanup;
+			if (sechdrs[i].sh_addr < (unsigned int)v->load_addr) {
+				printk( KERN_WARNING "vpe_elfload: fully linked image has invalid " 
+					"section, name %s address 0x%x, before load "
+					"address of 0x%x\n", secstrings + sechdrs[i].sh_name,
+					sechdrs[i].sh_addr, (unsigned int)v->load_addr);
+				return -ENOEXEC;
+			}
+
+			printk(KERN_DEBUG " copying section sh_name %s, sh_addr 0x%x size 0x%x\n", 
+			       secstrings + sechdrs[i].sh_name, sechdrs[i].sh_addr,
+			       sechdrs[i].sh_size);
+
+			if (sechdrs[i].sh_type != SHT_NOBITS)
+				memcpy((void *)sechdrs[i].sh_addr, v->pbuffer + sechdrs[i].sh_offset,
+					sechdrs[i].sh_size);
+			else
+				memset((void *)sechdrs[i].sh_addr, 0, sechdrs[i].sh_size);
 		}
 	}
 
+
 	/* make sure it's physically written out */
 	flush_icache_range((unsigned long)v->load_addr,
 			   (unsigned long)v->load_addr + v->len);
@@ -1119,6 +1151,14 @@
 		ret = -ENOEXEC;
 	}
 
+	/* It's good to be able to run the SP and if it chokes have a look at
+	   the /dev/rt?. But if we reset the pointer to the shared struct we 
+	   loose what has happened. So perhaps if garbage is sent to the vpe 
+	   device, use it as a trigger for the reset. Hopefully a nice 
+	   executable will be along shortly. */
+	if (ret < 0)
+		v->shared_ptr = NULL;
+
 	// cleanup any temp buffers
 	if (v->pbuffer)
 		vfree(v->pbuffer);

From chris@linux-mips.org Thu Aug 11 14:21:54 2005
Received: with ECARTIS (v1.0.0; list maltalinux-cvs-patches); Thu, 11 Aug 2005 15:21:55 +0100 (BST)
From: chris@linux-mips.org
To:  maltalinux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: malta
Date: Thu, 11 Aug 2005 15:21:54 +0100
X-archive-position: 40
X-ecartis-version: Ecartis v1.0.0
Sender: maltalinux-cvs-patches-bounce@linux-mips.org
Errors-to: maltalinux-cvs-patches-bounce@linux-mips.org
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Precedence: bulk
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X-list: maltalinux-cvs-patches


CVSROOT:	/home/cvs
Module name:	malta
Changes by:	chris@ftp.linux-mips.org	05/08/11 15:21:54

Modified files:
	linux/drivers/usb/core: Tag: MaltaRef_2_6 Makefile 

Log message:
	* drivers/usb/core/Makefile (CFLAGS_hub.o): Temporarily added
	-mno-explicit-relocs -mno-split-addresses to work around compiler
	problem (unmatched HI16 relocation)

diff -urN malta/linux/drivers/usb/core/Makefile malta/linux/drivers/usb/core/Makefile
--- malta/linux/drivers/usb/core/Makefile	2004/09/14 16:29:13	1.12.1000.1
+++ malta/linux/drivers/usb/core/Makefile	2005/08/11 14:21:53	1.12.1000.2
@@ -5,6 +5,8 @@
 usbcore-objs	:= usb.o hub.o hcd.o urb.o message.o \
 			config.o file.o buffer.o sysfs.o
 
+CFLAGS_hub.o	+= -mno-explicit-relocs -mno-split-addresses
+
 ifeq ($(CONFIG_PCI),y)
 	usbcore-objs	+= hcd-pci.o
 endif

From chris@linux-mips.org Thu Aug 11 16:15:10 2005
Received: with ECARTIS (v1.0.0; list maltalinux-cvs-patches); Thu, 11 Aug 2005 17:15:10 +0100 (BST)
From: chris@linux-mips.org
To:  maltalinux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: malta
Date: Thu, 11 Aug 2005 17:15:10 +0100
X-archive-position: 41
X-ecartis-version: Ecartis v1.0.0
Sender: maltalinux-cvs-patches-bounce@linux-mips.org
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Precedence: bulk
Reply-to: linux-mips@linux-mips.org
X-list: maltalinux-cvs-patches


CVSROOT:	/home/cvs
Module name:	malta
Changes by:	chris@ftp.linux-mips.org	05/08/11 17:15:09

Modified files:
	linux/include/asm-mips: Tag: MaltaRef_2_6 hazards.h 

Log message:
	* include/asm-mips/hazards.h: Don't make the declaration of
	mips_ihb dependent on the configuration.

diff -urN malta/linux/include/asm-mips/hazards.h malta/linux/include/asm-mips/hazards.h
--- malta/linux/include/asm-mips/hazards.h	2005/06/21 13:36:23	1.3.1000.5
+++ malta/linux/include/asm-mips/hazards.h	2005/08/11 16:15:09	1.3.1000.6
@@ -233,7 +233,6 @@
 
 #endif
 
-#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT)
 /*
  * MIPS32 Release 2 defines Instruction Hazard Barrier,
  * which is a form of jump. So it needs to be invoked
@@ -241,7 +240,6 @@
  */
 extern asmlinkage void mips_ihb(void);
 
-#endif /* CONFIG_CPU_MIPSR2 */
 #endif /* __ASSEMBLY__ */
 
 #endif /* _ASM_HAZARDS_H */

From chris@linux-mips.org Thu Aug 11 16:15:31 2005
Received: with ECARTIS (v1.0.0; list maltalinux-cvs-patches); Thu, 11 Aug 2005 17:15:31 +0100 (BST)
From: chris@linux-mips.org
To:  maltalinux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: malta
Date: Thu, 11 Aug 2005 17:15:31 +0100
X-archive-position: 42
X-ecartis-version: Ecartis v1.0.0
Sender: maltalinux-cvs-patches-bounce@linux-mips.org
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X-list: maltalinux-cvs-patches


CVSROOT:	/home/cvs
Module name:	malta
Changes by:	chris@ftp.linux-mips.org	05/08/11 17:15:30

Modified files:
	linux/include/asm-mips/mach-mips: Tag: MaltaRef_2_6 param.h 

Log message:
	Whitespace fix

diff -urN malta/linux/include/asm-mips/mach-mips/param.h malta/linux/include/asm-mips/mach-mips/param.h
--- malta/linux/include/asm-mips/mach-mips/Attic/param.h	2005/08/11 13:00:01	1.1.1000.1
+++ malta/linux/include/asm-mips/mach-mips/Attic/param.h	2005/08/11 16:15:30	1.1.1000.2
@@ -1,4 +1,3 @@
-
 /*
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive

From chris@linux-mips.org Fri Aug 12 12:33:16 2005
Received: with ECARTIS (v1.0.0; list maltalinux-cvs-patches); Fri, 12 Aug 2005 13:33:16 +0100 (BST)
From: chris@linux-mips.org
To:  maltalinux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: malta
Date: Fri, 12 Aug 2005 13:33:16 +0100
X-archive-position: 43
X-ecartis-version: Ecartis v1.0.0
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X-list: maltalinux-cvs-patches


CVSROOT:	/home/cvs
Module name:	malta
Changes by:	chris@ftp.linux-mips.org	05/08/12 13:33:15

Modified files:
	linux/drivers/usb/host: Tag: MaltaRef_2_6 uhci-q.c 

Log message:
	* drivers/usb/host/uhci-q.c (uhci_inc_fsbr): Kludge to disable
	FSBR support on MIPS evaluation boards.  The FSBR support is only
	actually broken when the Galileo system controller, so this is
	probably a bug/misconfiguration in the chip.

diff -urN malta/linux/drivers/usb/host/uhci-q.c malta/linux/drivers/usb/host/uhci-q.c
--- malta/linux/drivers/usb/host/uhci-q.c	2005/06/21 13:33:18	1.2.1000.1
+++ malta/linux/drivers/usb/host/uhci-q.c	2005/08/12 12:33:15	1.2.1000.2
@@ -525,6 +525,10 @@
 {
 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
 
+#ifdef CONFIG_MIPS_BOARDS_GEN
+	return;
+#endif
+
 	if ((!(urb->transfer_flags & URB_NO_FSBR)) && !urbp->fsbr) {
 		urbp->fsbr = 1;
 		if (!uhci->fsbr++ && !uhci->fsbrtimeout)

From chris@linux-mips.org Mon Aug 15 19:26:47 2005
Received: with ECARTIS (v1.0.0; list maltalinux-cvs-patches); Mon, 15 Aug 2005 20:26:47 +0100 (BST)
From: chris@linux-mips.org
To:  maltalinux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: malta
Date: Mon, 15 Aug 2005 20:26:47 +0100
X-archive-position: 44
X-ecartis-version: Ecartis v1.0.0
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X-list: maltalinux-cvs-patches


CVSROOT:	/home/cvs
Module name:	malta
Changes by:	chris@ftp.linux-mips.org	05/08/15 20:26:46

Added files:
	linux/arch/mips/mips-boards/mipssim: Tag: MaltaRef_2_6 Makefile 
	                                     sim_cmdline.c sim_int.c 
	                                     sim_irq.S sim_mem.c 
	                                     sim_printf.c sim_setup.c 
	                                     sim_smp.c sim_time.c 

Log message:
	MIPSsim support files

diff -urN malta/linux/arch/mips/mips-boards/mipssim/Makefile malta/linux/arch/mips/mips-boards/mipssim/Makefile
--- malta/linux/arch/mips/mips-boards/mipssim/Attic/Makefile	1970/01/01 00:00:00
+++ malta/linux/arch/mips/mips-boards/mipssim/Attic/Makefile	2005-08-15 20:26:46.639778000 +0100	1.1.1000.1
@@ -0,0 +1,19 @@
+#
+# Copyright (C) 2005 MIPS Technologies, Inc.  All rights reserved.
+#
+# This program is free software; you can distribute it and/or modify it
+# under the terms of the GNU General Public License (Version 2) as
+# published by the Free Software Foundation.
+# 
+# This program is distributed in the hope it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+# for more details.
+# 
+# You should have received a copy of the GNU General Public License along
+# with this program; if not, write to the Free Software Foundation, Inc.,
+# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+#
+
+obj-y := sim_setup.o sim_mem.o sim_time.o sim_printf.o sim_int.o sim_irq.o sim_cmdline.o
+obj-$(CONFIG_SMP) += sim_smp.o
diff -urN malta/linux/arch/mips/mips-boards/mipssim/sim_cmdline.c malta/linux/arch/mips/mips-boards/mipssim/sim_cmdline.c
--- malta/linux/arch/mips/mips-boards/mipssim/Attic/sim_cmdline.c	1970/01/01 00:00:00
+++ malta/linux/arch/mips/mips-boards/mipssim/Attic/sim_cmdline.c	2005-08-15 20:26:46.654784000 +0100	1.1.1000.1
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2005 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/string.h>
+#include <asm/bootinfo.h>
+
+extern char arcs_cmdline[];
+
+char * __init prom_getcmdline(void)
+{
+	return arcs_cmdline;
+}
+
+void __init prom_init_cmdline(void)
+{
+}
diff -urN malta/linux/arch/mips/mips-boards/mipssim/sim_int.c malta/linux/arch/mips/mips-boards/mipssim/sim_int.c
--- malta/linux/arch/mips/mips-boards/mipssim/Attic/sim_int.c	1970/01/01 00:00:00
+++ malta/linux/arch/mips/mips-boards/mipssim/Attic/sim_int.c	2005-08-15 20:26:46.679703000 +0100	1.1.1000.1
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 1999, 2005 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/kernel_stat.h>
+
+#include <asm/irq_cpu.h>
+#include <asm/mips-boards/mipssimint.h>
+
+
+extern asmlinkage void simIRQ(void);
+
+asmlinkage void sim_hw0_irqdispatch(struct pt_regs *regs)
+{
+	do_IRQ(2, regs);
+}
+
+void __init arch_init_irq(void)
+{
+	/* Now safe to set the exception vector. */
+	set_except_vector(0, simIRQ);
+
+	mips_cpu_irq_init(MIPSCPU_INT_BASE);
+}
diff -urN malta/linux/arch/mips/mips-boards/mipssim/sim_irq.S malta/linux/arch/mips/mips-boards/mipssim/sim_irq.S
--- malta/linux/arch/mips/mips-boards/mipssim/Attic/sim_irq.S	1970/01/01 00:00:00
+++ malta/linux/arch/mips/mips-boards/mipssim/Attic/sim_irq.S	2005-08-15 20:26:46.706155000 +0100	1.1.1000.1
@@ -0,0 +1,99 @@
+/*
+ * Copyright (C) 1999, 2005 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * Interrupt exception dispatch code.
+ *
+ */
+#include <linux/config.h>
+
+#include <asm/asm.h>
+#include <asm/mipsregs.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+
+#include <asm/mips-boards/mipssimint.h>	
+
+	
+	.text
+	.set	noreorder
+	.set	noat
+	.align	5
+	NESTED(simIRQ, PT_SIZE, sp)
+	SAVE_ALL
+	CLI
+	.set	at
+
+	mfc0	s0, CP0_CAUSE		# get irq bits
+	mfc0	s1, CP0_STATUS		# get irq mask
+	andi	s0, ST0_IM		# CAUSE.CE may be non-zero!
+	and	s0, s1
+
+#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
+ 	.set	mips32
+	clz	a0, s0
+	.set	mips0
+	negu	a0
+	addu	a0, 31-CAUSEB_IP
+	bltz	a0, spurious
+#else
+	beqz	s0, spurious
+	 li	a0, 7
+	
+	and	t0, s0, 0xf000
+	sltiu	t0, t0, 1
+	sll	t0, 2
+	subu	a0, t0
+	sll	s0, t0
+
+	and	t0, s0, 0xc000
+	sltiu	t0, t0, 1
+	sll	t0, 1
+	subu	a0, t0
+	sll	s0, t0
+
+	and	t0, s0, 0x8000
+	sltiu	t0, t0, 1
+	# sll	t0, 0
+	subu	a0, t0
+	# sll	s0, t0
+#endif	
+
+#ifdef CASCADE_IRQ
+	 li	a1, CASCADE_IRQ
+	bne	a0, a1, 1f
+	 addu	a0, MIPSCPU_INT_BASE
+	
+	jal	CASCADE_DISPATCH
+	 move	 a0, sp
+
+	j	ret_from_irq
+	 nop
+1:
+#else
+	 addu	a0, MIPSCPU_INT_BASE
+#endif
+
+	jal	do_IRQ
+	 move	a1, sp
+	
+	j	ret_from_irq
+	 nop
+
+
+spurious:
+	j	spurious_interrupt
+	 nop
+	END(simIRQ)
diff -urN malta/linux/arch/mips/mips-boards/mipssim/sim_mem.c malta/linux/arch/mips/mips-boards/mipssim/sim_mem.c
--- malta/linux/arch/mips/mips-boards/mipssim/Attic/sim_mem.c	1970/01/01 00:00:00
+++ malta/linux/arch/mips/mips-boards/mipssim/Attic/sim_mem.c	2005-08-15 20:26:46.729456000 +0100	1.1.1000.1
@@ -0,0 +1,132 @@
+/*
+ * Copyright (C) 2005 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/bootmem.h>
+
+#include <asm/bootinfo.h>
+#include <asm/page.h>
+
+#include <asm/mips-boards/prom.h>
+
+/*#define DEBUG*/
+
+enum simmem_memtypes {
+	simmem_reserved = 0,
+	simmem_free,
+};
+struct prom_pmemblock mdesc[PROM_MAX_PMEMBLOCKS];
+
+#ifdef DEBUG
+static char *mtypes[3] = {
+	"SIM reserved memory",
+	"SIM free memory",
+};
+#endif
+
+/* References to section boundaries */
+extern char _end;
+
+#define PFN_ALIGN(x)    (((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK)
+
+
+struct prom_pmemblock * __init prom_getmdesc(void)
+{
+	unsigned int memsize;
+
+	memsize = 0x02000000;
+	prom_printf("Setting default memory size 0x%08x\n", memsize);
+
+	memset(mdesc, 0, sizeof(mdesc));
+
+	mdesc[0].type = simmem_reserved;
+	mdesc[0].base = 0x00000000;
+	mdesc[0].size = 0x00001000;
+
+	mdesc[1].type = simmem_free;
+	mdesc[1].base = 0x00001000;
+	mdesc[1].size = 0x000ff000;
+
+	mdesc[2].type = simmem_reserved;
+	mdesc[2].base = 0x00100000;
+	mdesc[2].size = CPHYSADDR(PFN_ALIGN(&_end)) - mdesc[2].base;
+
+	mdesc[3].type = simmem_free;
+	mdesc[3].base = CPHYSADDR(PFN_ALIGN(&_end));
+	mdesc[3].size = memsize - mdesc[3].base;
+
+	return &mdesc[0];
+}
+
+static int __init prom_memtype_classify (unsigned int type)
+{
+	switch (type) {
+	case simmem_free:
+		return BOOT_MEM_RAM;
+	case simmem_reserved:
+	default:
+		return BOOT_MEM_RESERVED;
+	}
+}
+
+void __init prom_meminit(void)
+{
+	struct prom_pmemblock *p;
+
+	p = prom_getmdesc();
+
+	while (p->size) {
+		long type;
+		unsigned long base, size;
+
+		type = prom_memtype_classify (p->type);
+		base = p->base;
+		size = p->size;
+
+		add_memory_region(base, size, type);
+                p++; 
+	}
+}
+
+unsigned long __init
+prom_free_prom_memory (void)
+{
+	unsigned long freed = 0;
+	unsigned long addr;
+	int i;
+
+	for (i = 0; i < boot_mem_map.nr_map; i++) {
+		if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA)
+			continue;
+
+		addr = boot_mem_map.map[i].addr;
+		while (addr < boot_mem_map.map[i].addr
+			      + boot_mem_map.map[i].size) {
+			ClearPageReserved(virt_to_page(__va(addr)));
+			set_page_count(virt_to_page(__va(addr)), 1);
+			free_page((unsigned long)__va(addr));
+			addr += PAGE_SIZE;
+			freed += PAGE_SIZE;
+		}
+	}
+	printk("Freeing prom memory: %ldkb freed\n", freed >> 10);
+
+	return freed;
+}
diff -urN malta/linux/arch/mips/mips-boards/mipssim/sim_printf.c malta/linux/arch/mips/mips-boards/mipssim/sim_printf.c
--- malta/linux/arch/mips/mips-boards/mipssim/Attic/sim_printf.c	1970/01/01 00:00:00
+++ malta/linux/arch/mips/mips-boards/mipssim/Attic/sim_printf.c	2005-08-15 20:26:46.756232000 +0100	1.1.1000.1
@@ -0,0 +1,75 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * Putting things on the screen/serial line using YAMONs facilities.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/serial_reg.h>
+#include <linux/spinlock.h>
+#include <asm/io.h>
+#include <asm/system.h>
+
+static inline unsigned int serial_in(int offset)
+{
+	return inb(0x3f8 + offset);
+}
+
+static inline void serial_out(int offset, int value)
+{
+	outb(value, 0x3f8 + offset);
+}
+
+int putPromChar(char c)
+{
+	while ((serial_in(UART_LSR) & UART_LSR_THRE) == 0)
+		;
+
+	serial_out(UART_TX, c);
+
+	return 1;
+}
+
+char getPromChar(void)
+{
+	while (!(serial_in(UART_LSR) & 1))
+		;
+
+	return serial_in(UART_RX);
+}
+
+void prom_printf(char *fmt, ...)
+{
+	va_list args;
+	int l;
+	char *p, *buf_end;
+	char buf[1024];
+
+	va_start(args, fmt);
+	l = vsprintf(buf, fmt, args); /* hopefully i < sizeof(buf) */
+	va_end(args);
+
+	buf_end = buf + l;
+
+	for (p = buf; p < buf_end; p++) {
+		/* Crude cr/nl handling is better than none */
+		if (*p == '\n')
+			putPromChar('\r');
+		putPromChar(*p);
+	}
+}
diff -urN malta/linux/arch/mips/mips-boards/mipssim/sim_setup.c malta/linux/arch/mips/mips-boards/mipssim/sim_setup.c
--- malta/linux/arch/mips/mips-boards/mipssim/Attic/sim_setup.c	1970/01/01 00:00:00
+++ malta/linux/arch/mips/mips-boards/mipssim/Attic/sim_setup.c	2005-08-15 20:26:46.783324000 +0100	1.1.1000.1
@@ -0,0 +1,108 @@
+/*
+ * Copyright (C) 2005 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/ioport.h>
+#include <linux/tty.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
+
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/mips-boards/generic.h>
+#include <asm/mips-boards/prom.h>
+#include <asm/serial.h>
+#include <asm/io.h>
+#include <asm/time.h>
+#include <asm/mips-boards/mipssim.h>
+#include <asm/mips-boards/mipssimint.h>
+
+
+extern void sim_time_init(void);
+extern void sim_timer_setup(struct irqaction *irq);
+static void __init serial_init(void);
+unsigned int _isbonito = 0;
+
+extern void __init sanitize_tlb_entries(void);
+
+
+const char *get_system_type(void)
+{
+	return "MIPSsim";
+}
+
+static int __init
+sim_setup(void)
+{
+
+	set_io_port_base(0xbfd00000);
+
+	serial_init();
+	
+	board_time_init = sim_time_init;
+	board_timer_setup = sim_timer_setup;
+	prom_printf("Linux started...\n");
+
+#ifdef CONFIG_MT_SMP
+	sanitize_tlb_entries();
+#endif	
+	
+	return(0);
+}
+
+early_initcall(sim_setup);
+
+void prom_init(void)
+{
+	set_io_port_base(0xbfd00000);
+	
+	prom_printf("\nLINUX started...\n");
+	prom_init_cmdline();
+	prom_meminit();
+}
+
+
+static void __init serial_init(void)
+{
+#ifdef CONFIG_SERIAL_8250
+	struct uart_port s;
+
+	memset(&s, 0, sizeof(s));
+
+	s.iobase = 0x3f8;
+
+	/* hardware int 4 - the serial int, is CPU int 6
+	 but poll for now */
+	s.irq =  0;
+	s.uartclk = BASE_BAUD * 16;
+	s.flags = ASYNC_BOOT_AUTOCONF | UPF_SKIP_TEST;
+	s.iotype = SERIAL_IO_PORT | ASYNC_SKIP_TEST;
+	s.regshift = 0;
+	s.timeout = 4;
+	
+	if (early_serial_setup(&s) != 0) {
+		prom_printf(KERN_ERR "Serial setup failed!\n");
+	}
+
+#endif
+}
+
diff -urN malta/linux/arch/mips/mips-boards/mipssim/sim_smp.c malta/linux/arch/mips/mips-boards/mipssim/sim_smp.c
--- malta/linux/arch/mips/mips-boards/mipssim/Attic/sim_smp.c	1970/01/01 00:00:00
+++ malta/linux/arch/mips/mips-boards/mipssim/Attic/sim_smp.c	2005-08-15 20:26:46.801153000 +0100	1.1.1000.1
@@ -0,0 +1,151 @@
+/*
+ * Copyright (C) 2005 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ */
+/*
+ * Simulator Platform-specific hooks for SMP operation
+ */
+
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/cpumask.h>
+#include <linux/interrupt.h>
+#include <asm/atomic.h>
+#include <asm/cpu.h>
+#include <asm/processor.h>
+#include <asm/system.h>
+#include <asm/hardirq.h>
+#include <asm/mmu_context.h>
+#include <asm/smp.h>
+#ifdef CONFIG_MIPS_MT_SMTC
+#include <asm/smtc_ipi.h>
+#endif /* CONFIG_MIPS_MT_SMTC */
+
+/* VPE/SMP Prototype implements platform interfaces directly */
+#if !defined(CONFIG_MIPS_MT_SMP)
+
+/*
+ * Cause the specified action to be performed on a targeted "CPU"
+ */
+
+void core_send_ipi(int cpu, unsigned int action)
+{
+#ifdef CONFIG_MIPS_MT_SMTC
+	void smtc_send_ipi(int, int, unsigned int);
+
+	smtc_send_ipi(cpu, LINUX_SMP_IPI, action);
+#endif /* CONFIG_MIPS_MT_SMTC */
+/* "CPU" may be TC of same VPE, VPE of same CPU, or different CPU */
+
+}
+
+/*
+ * Detect available CPUs/VPEs/TCs and populate phys_cpu_present_map
+ */
+
+void __init prom_build_cpu_map(void)
+{
+#ifdef CONFIG_MIPS_MT_SMTC
+	extern int mipsmt_build_cpu_map(int startslot);
+	int nextslot;
+
+	cpus_clear(phys_cpu_present_map);
+
+	/* Register the boot CPU */
+
+	smp_prepare_boot_cpu();
+
+	/*
+	 * As of November, 2004, MIPSsim only simulates one core
+	 * at a time.  However, that core may be a MIPS MT core
+	 * with multiple virtual processors and thread contexts.
+	 */
+
+	if (read_c0_config3() & (1<<2)) {
+		nextslot = mipsmt_build_cpu_map(1);
+	}
+#endif /* CONFIG_MIPS_MT_SMTC */
+}
+
+/*
+ * Platform "CPU" startup hook
+ */
+
+void prom_boot_secondary(int cpu, struct task_struct *idle)
+{
+#ifdef CONFIG_MIPS_MT_SMTC
+	extern void smtc_boot_secondary(int cpu, struct task_struct *t);
+
+	smtc_boot_secondary(cpu, idle);
+#endif /* CONFIG_MIPS_MT_SMTC */
+}
+
+/*
+ * Post-config but pre-boot cleanup entry point
+ */
+
+void prom_init_secondary(void)
+{
+#ifdef CONFIG_MIPS_MT_SMTC
+	void smtc_init_secondary(void);
+
+	smtc_init_secondary();
+#endif /* CONFIG_MIPS_MT_SMTC */
+}
+
+/*
+ * Platform SMP pre-initialization
+ */
+
+void prom_prepare_cpus(unsigned int max_cpus)
+{
+#ifdef CONFIG_MIPS_MT_SMTC
+	void mipsmt_prepare_cpus(int c);
+	/* 
+ 	 * As noted above, we can assume a single CPU for now 
+	 * but it may be multithreaded.
+	 */
+
+	if (read_c0_config3() & (1<<2)) {
+		mipsmt_prepare_cpus(max_cpus);
+	}
+#endif /* CONFIG_MIPS_MT_SMTC */
+}
+
+/*
+ * SMP initialization finalization entry point
+ */
+
+void prom_smp_finish(void)
+{
+#ifdef CONFIG_MIPS_MT_SMTC
+	void smtc_smp_finish(void);
+
+	smtc_smp_finish();
+#endif /* CONFIG_MIPS_MT_SMTC */
+}
+
+/*
+ * Hook for after all CPUs are online
+ */
+
+void prom_cpus_done(void)
+{
+#ifdef CONFIG_MIPS_MT_SMTC
+
+#endif /* CONFIG_MIPS_MT_SMTC */
+}
+#endif /* CONFIG_MIPS32R2_MT_SMP */
diff -urN malta/linux/arch/mips/mips-boards/mipssim/sim_time.c malta/linux/arch/mips/mips-boards/mipssim/sim_time.c
--- malta/linux/arch/mips/mips-boards/mipssim/Attic/sim_time.c	1970/01/01 00:00:00
+++ malta/linux/arch/mips/mips-boards/mipssim/Attic/sim_time.c	2005-08-15 20:26:46.820703000 +0100	1.1.1000.1
@@ -0,0 +1,212 @@
+#include <linux/types.h>
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/sched.h>
+#include <linux/spinlock.h>
+
+#include <asm/mipsregs.h>
+#include <asm/ptrace.h>
+#include <asm/hardirq.h>
+#include <asm/div64.h>
+#include <asm/cpu.h>
+#include <asm/time.h>
+
+#include <linux/interrupt.h>
+#include <linux/mc146818rtc.h>
+#include <linux/timex.h>
+#include <asm/mipsregs.h>
+#include <asm/ptrace.h>
+#include <asm/hardirq.h>
+#include <asm/irq.h>
+#include <asm/div64.h>
+#include <asm/cpu.h>
+#include <asm/time.h>
+#include <asm/mc146818-time.h>
+#include <asm/msc01_ic.h>
+
+#include <asm/mips-boards/generic.h>
+#include <asm/mips-boards/prom.h>
+#include <asm/mips-boards/mipssimint.h>
+#include <asm/mc146818-time.h>
+#include <asm/smp.h>
+
+
+unsigned long cpu_khz;
+
+extern asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs);
+
+irqreturn_t sim_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+#ifdef CONFIG_SMP 
+	int cpu = smp_processor_id();
+
+	/*
+	 * CPU 0 handles the global timer interrupt job
+	 * resets count/compare registers to trigger next timer int. 
+	 */
+#ifndef CONFIG_MIPS_MT_SMTC
+	if (cpu == 0) {
+		timer_interrupt(irq, dev_id, regs);
+	}
+	else {
+		/* Everyone else needs to reset the timer int here as 
+		   ll_local_timer_interrupt doesn't */
+		/*
+		 * FIXME: need to cope with counter underflow.
+		 * More support needs to be added to kernel/time for
+		 * counter/timer interrupts on multiple CPU's
+		 */
+		write_c0_compare (read_c0_count() + ( mips_hpt_frequency/HZ));
+	}
+#else /* SMTC */
+	/*
+	 *  In SMTC system, one Count/Compare set exists per VPE.
+	 *  Which TC within a VPE gets the interrupt is essentially
+	 *  random - we only know that it shouldn't be one with
+	 *  IXMT set. Whichever TC gets the interrupt needs to
+	 *  send special interprocessor interrupts to the other
+	 *  TCs to make sure that they schedule, etc.
+	 *
+	 *  That code is specific to the SMTC kernel, not to
+	 *  the simulation platform, so it's invoked from
+	 *  the general MIPS timer_interrupt routine.
+	 *
+	 * We have a problem in that the interrupt vector code
+	 * had to turn off the timer IM bit to avoid redundant
+	 * entries, but we may never get to mips_cpu_irq_end
+	 * to turn it back on again if the scheduler gets
+	 * involved.  So we clear the pending timer here, 
+	 * and re-enable the mask...
+	 */
+	
+	int vpflags = dvpe();
+	write_c0_compare (read_c0_count() - 1);
+	clear_c0_cause(0x100 << MIPSCPU_INT_CPUCTR);
+	set_c0_status(0x100 << MIPSCPU_INT_CPUCTR);
+	irq_enable_hazard();
+	evpe(vpflags);
+
+	if(cpu_data[cpu].vpe_id == 0) timer_interrupt(irq, dev_id, regs);
+	else write_c0_compare (read_c0_count() + ( mips_hpt_frequency/HZ));
+	smtc_timer_broadcast(cpu_data[cpu].vpe_id);
+	
+#endif /* CONFIG_MIPS_MT_SMTC */
+	
+	/*
+	 * every CPU should do profiling and process accounting
+	 */
+ 	local_timer_interrupt (irq, dev_id, regs);
+	return IRQ_HANDLED;
+#else
+	return timer_interrupt (irq, dev_id, regs);
+#endif
+}
+
+
+
+/*
+ * Estimate CPU frequency.  Sets mips_counter_frequency as a side-effect
+ */
+static unsigned int __init estimate_cpu_frequency(void)
+{
+	unsigned int prid = read_c0_prid() & 0xffff00;
+	unsigned int count;
+
+#if 1
+	/*
+	 * hardwire the board frequency to 12MHz.
+	 */
+	
+	if ((prid == (PRID_COMP_MIPS | PRID_IMP_20KC)) ||
+	    (prid == (PRID_COMP_MIPS | PRID_IMP_25KF)))
+		count = 12000000;
+	else
+		count =  6000000;
+#else
+	unsigned int flags;
+
+	local_irq_save(flags);
+
+	/* Start counter exactly on falling edge of update flag */
+	while (CMOS_READ(RTC_REG_A) & RTC_UIP);
+	while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
+
+	/* Start r4k counter. */
+	write_c0_count(0);
+
+	/* Read counter exactly on falling edge of update flag */
+	while (CMOS_READ(RTC_REG_A) & RTC_UIP);
+	while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
+
+	count = read_c0_count();
+
+	/* restore interrupts */
+	local_irq_restore(flags);
+#endif
+
+	mips_hpt_frequency = count;
+
+	if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) &&
+	    (prid != (PRID_COMP_MIPS | PRID_IMP_25KF)))
+		count *= 2;
+
+	count += 5000;    /* round */
+	count -= count%10000;
+
+	return count;
+}
+
+void __init sim_time_init(void)
+{
+	unsigned int est_freq, flags;
+
+	local_irq_save(flags);
+
+
+        /* Set Data mode - binary. */
+	CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL);
+		
+
+	est_freq = estimate_cpu_frequency ();
+
+	printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
+	       (est_freq%1000000)*100/1000000);
+
+        cpu_khz = est_freq / 1000;
+
+	local_irq_restore(flags);
+}
+
+static int mips_cpu_timer_irq;
+
+static void mips_timer_dispatch (struct pt_regs *regs)
+{
+	do_IRQ (mips_cpu_timer_irq, regs);
+}
+
+
+void __init sim_timer_setup(struct irqaction *irq)
+{
+
+	if (cpu_has_vint)
+		set_vi_handler (MIPSCPU_INT_CPUCTR, mips_timer_dispatch);
+	mips_cpu_timer_irq = MIPSCPU_INT_BASE + MIPSCPU_INT_CPUCTR;
+	
+
+	/* we are using the cpu counter for timer interrupts */
+	irq->handler = sim_timer_interrupt;
+	setup_irq (mips_cpu_timer_irq, irq);
+
+#if defined(CONFIG_SMP)
+	/* irq_desc(riptor) is a global resource, when the interrupt overlaps
+	   on seperate cpu's the first one tries to handle the second interrupt.
+	   The effect is that the int remains disabled on the second cpu.
+	   Mark the interrupt with IRQ_PER_CPU to avoid any confusion */
+	irq_desc[mips_cpu_timer_irq].status |= IRQ_PER_CPU;
+#endif
+
+	/* to generate the first timer interrupt */
+	write_c0_compare (read_c0_count() + (mips_hpt_frequency/HZ));
+}
+

From chris@linux-mips.org Mon Aug 15 19:31:25 2005
Received: with ECARTIS (v1.0.0; list maltalinux-cvs-patches); Mon, 15 Aug 2005 20:31:25 +0100 (BST)
From: chris@linux-mips.org
To:  maltalinux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: malta
Date: Mon, 15 Aug 2005 20:31:25 +0100
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X-ecartis-version: Ecartis v1.0.0
Sender: maltalinux-cvs-patches-bounce@linux-mips.org
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CVSROOT:	/home/cvs
Module name:	malta
Changes by:	chris@ftp.linux-mips.org	05/08/15 20:31:24

Modified files:
	linux/arch/mips: Tag: MaltaRef_2_6 Kconfig Makefile 
	linux/arch/mips/mips-boards/generic: Tag: MaltaRef_2_6 mipsIRQ.S 
Added files:
	linux/include/asm-mips/mips-boards: Tag: MaltaRef_2_6 mipssim.h 
	                                    mipssimint.h 

Log message:
	* arch/mips/mips-boards/generic/mipsIRQ.S:
	* arch/mips/Makefile:
	* arch/mips/Kconfig: Added MIPS_MIPSSIM board support

diff -urN malta/linux/arch/mips/Kconfig malta/linux/arch/mips/Kconfig
--- malta/linux/arch/mips/Kconfig	2005/07/28 17:26:18	1.73.1000.9
+++ malta/linux/arch/mips/Kconfig	2005/08/15 19:31:23	1.73.1000.10
@@ -292,6 +292,10 @@
 config MIPS_MIPSSIM
 	bool 'Support for MIPS simulator (MIPSsim)'
 	select IRQ_CPU
+	select DMA_NONCOHERENT
+	select SYS_SUPPORTS_32BIT_KERNEL
+	select SYS_SUPPORTS_BIG_ENDIAN
+	select SYS_SUPPORTS_LITTLE_ENDIAN
 	help
 	  This enables support for the MIPS Technologies MIPSsim simulator.
 
diff -urN malta/linux/arch/mips/Makefile malta/linux/arch/mips/Makefile
--- malta/linux/arch/mips/Makefile	2005/07/29 18:54:57	1.167.1000.7
+++ malta/linux/arch/mips/Makefile	2005/08/15 19:31:24	1.167.1000.8
@@ -423,6 +423,13 @@
 load-$(CONFIG_MIPS_SEAD)	+= 0xffffffff80100000
 
 #
+# MIPS simulator MIPSsim
+#
+core-$(CONFIG_MIPS_MIPSSIM)	+= arch/mips/mips-boards/mipssim/
+cflags-$(CONFIG_MIPS_MIPSSIM)	+= -Iinclude/asm-mips/mach-mips
+load-$(CONFIG_MIPS_MIPSSIM)	+= 0x80100000
+
+#
 # Momentum Ocelot board
 #
 # The Ocelot setup.o must be linked early - it does the ioremap() for the
diff -urN malta/linux/arch/mips/mips-boards/generic/mipsIRQ.S malta/linux/arch/mips/mips-boards/generic/mipsIRQ.S
--- malta/linux/arch/mips/mips-boards/generic/mipsIRQ.S	2004/07/08 17:57:45	1.6.1000.1
+++ malta/linux/arch/mips/mips-boards/generic/mipsIRQ.S	2005/08/15 19:31:24	1.6.1000.2
@@ -42,6 +42,9 @@
 #ifdef CONFIG_MIPS_SEAD
 #include <asm/mips-boards/seadint.h>	
 #endif
+#ifdef CONFIG_MIPS_MIPSSIM
+#include <asm/mips-boards/simint.h>	
+#endif
 	
 /* A lot of complication here is taken away because:
  *
diff -urN malta/linux/include/asm-mips/mips-boards/mipssim.h malta/linux/include/asm-mips/mips-boards/mipssim.h
--- malta/linux/include/asm-mips/mips-boards/Attic/mipssim.h	1970/01/01 00:00:00
+++ malta/linux/include/asm-mips/mips-boards/Attic/mipssim.h	2005-08-15 20:31:24.497528000 +0100	1.1.2.1
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2005 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ */
+
+#ifndef _ASM_MIPS_BOARDS_MIPSSIM_H
+#define _ASM_MIPS_BOARDS_MIPSSIM_H
+
+#define STATS_ON        1
+#define STATS_OFF       2
+#define STATS_CLEAR     3
+#define STATS_DUMP      4
+#define TRACE_ON	5
+#define TRACE_OFF       6
+
+/* Control MIPSsim tracing */
+
+#define simcfg(code)				\
+({						\
+	__asm__  __volatile__(			\
+        "sltiu $0,$0, %0"			\
+		::"i"(code)			\
+		);				\
+})
+
+
+
+#endif /*_ASM_MIPS_BOARDS_MIPSSIM_H */
diff -urN malta/linux/include/asm-mips/mips-boards/mipssimint.h malta/linux/include/asm-mips/mips-boards/mipssimint.h
--- malta/linux/include/asm-mips/mips-boards/Attic/mipssimint.h	1970/01/01 00:00:00
+++ malta/linux/include/asm-mips/mips-boards/Attic/mipssimint.h	2005-08-15 20:31:24.519658000 +0100	1.1.2.1
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2005 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ *
+ */
+#ifndef __ASM_MIPS_BOARDS_SIMINT_H
+#define __ASM_MIPS_BOARDS_SIMINT_H
+
+/*
+ * Interrupts 16..23 are used for CPU interrupts
+ */
+#define MIPSCPU_INT_BASE	16
+
+/* CPU interrupt offsets */
+#define MIPSCPU_INT_CPUCTR	7
+
+#endif /* __ASM_MIPS_BOARDS_SIMINT_H */

From chris@linux-mips.org Mon Aug 15 19:34:58 2005
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From: chris@linux-mips.org
To:  maltalinux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: malta
Date: Mon, 15 Aug 2005 20:34:58 +0100
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CVSROOT:	/home/cvs
Module name:	malta
Changes by:	chris@ftp.linux-mips.org	05/08/15 20:34:57

Added files:
	linux/include/asm-mips/mips-boards: Tag: MaltaRef_2_6 mipssim.h 
	                                    mipssimint.h 

Log message:
	MIPSsim support

diff -urN malta/linux/include/asm-mips/mips-boards/mipssim.h malta/linux/include/asm-mips/mips-boards/mipssim.h
--- malta/linux/include/asm-mips/mips-boards/Attic/mipssim.h	1970/01/01 00:00:00
+++ malta/linux/include/asm-mips/mips-boards/Attic/mipssim.h	2005-08-15 20:34:57.876864000 +0100	1.1.1000.1
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2005 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ */
+
+#ifndef _ASM_MIPS_BOARDS_MIPSSIM_H
+#define _ASM_MIPS_BOARDS_MIPSSIM_H
+
+#define STATS_ON        1
+#define STATS_OFF       2
+#define STATS_CLEAR     3
+#define STATS_DUMP      4
+#define TRACE_ON	5
+#define TRACE_OFF       6
+
+/* Control MIPSsim tracing */
+
+#define simcfg(code)				\
+({						\
+	__asm__  __volatile__(			\
+        "sltiu $0,$0, %0"			\
+		::"i"(code)			\
+		);				\
+})
+
+
+
+#endif /*_ASM_MIPS_BOARDS_MIPSSIM_H */
diff -urN malta/linux/include/asm-mips/mips-boards/mipssimint.h malta/linux/include/asm-mips/mips-boards/mipssimint.h
--- malta/linux/include/asm-mips/mips-boards/Attic/mipssimint.h	1970/01/01 00:00:00
+++ malta/linux/include/asm-mips/mips-boards/Attic/mipssimint.h	2005-08-15 20:34:57.893800000 +0100	1.1.1000.1
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2005 MIPS Technologies, Inc.  All rights reserved.
+ *
+ * ########################################################################
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ *
+ */
+#ifndef __ASM_MIPS_BOARDS_SIMINT_H
+#define __ASM_MIPS_BOARDS_SIMINT_H
+
+/*
+ * Interrupts 16..23 are used for CPU interrupts
+ */
+#define MIPSCPU_INT_BASE	16
+
+/* CPU interrupt offsets */
+#define MIPSCPU_INT_CPUCTR	7
+
+#endif /* __ASM_MIPS_BOARDS_SIMINT_H */

From beth@linux-mips.org Tue Aug 16 09:49:15 2005
Received: with ECARTIS (v1.0.0; list maltalinux-cvs-patches); Tue, 16 Aug 2005 10:49:15 +0100 (BST)
From: beth@linux-mips.org
To:  maltalinux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: malta
Date: Tue, 16 Aug 2005 10:49:15 +0100
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CVSROOT:	/home/cvs
Module name:	malta
Changes by:	beth@ftp.linux-mips.org	05/08/16 10:49:13

Modified files:
	linux/arch/mips/kernel: Tag: MaltaRef_2_6 kspd.c rtlx.c 

Log message:
	* arch/mips/kernel/kspd.c: Fix loop where in some circumstances the SP
	channel could not be opened.
	Translate SDE based MTSP syscall commands to linux equivalents.
	Support unlimited number of arguments to syscall, but for now
	only set up the first 4 as the rest have to go on the 'user' stack.
	
	* arch/mips/kernel/rtlx.c: Handle an exit code from SP in the shared pointer,
	useful if an exception occurs before rtlx has been set up.

diff -urN malta/linux/arch/mips/kernel/kspd.c malta/linux/arch/mips/kernel/kspd.c
--- malta/linux/arch/mips/kernel/Attic/kspd.c	2005/08/08 13:24:14	1.1.1000.2
+++ malta/linux/arch/mips/kernel/Attic/kspd.c	2005/08/16 09:49:13	1.1.1000.3
@@ -31,12 +31,25 @@
 static struct workqueue_struct *workqueue = NULL;
 static struct work_struct work;
 
-struct sp_request {
-	int cmd;
-	int arg0;
-	int arg1;
-	int arg2;
-	int ret;
+struct mtsp_syscall {
+    int cmd;
+    unsigned char abi;
+    unsigned char size;
+};
+
+struct mtsp_syscall_ret {
+	int retval;
+	int errno;
+};
+
+struct mtsp_syscall_generic {
+    int arg0;
+    int arg1;
+    int arg2;
+    int arg3;
+    int arg4;
+    int arg5;
+    int arg6;
 };
 
 static struct list_head kspd_notifylist;
@@ -45,7 +58,11 @@
 /* these should match with those in the SDE kit */
 #define MTSP_SYSCALL_BASE	0
 #define MTSP_SYSCALL_EXIT    (MTSP_SYSCALL_BASE + 0)
-#define MTSP_SYSCALL_OPEN    (MTSP_SYSCALL_BASE + 5)
+#define MTSP_SYSCALL_OPEN    (MTSP_SYSCALL_BASE + 1)
+#define MTSP_SYSCALL_READ    (MTSP_SYSCALL_BASE + 2)
+#define MTSP_SYSCALL_WRITE   (MTSP_SYSCALL_BASE + 3)
+#define MTSP_SYSCALL_CLOSE   (MTSP_SYSCALL_BASE + 4)
+#define MTSP_SYSCALL_LSEEK32 (MTSP_SYSCALL_BASE + 5)
 
 #define	MTSP_O_RDONLY	0x0000	
 #define	MTSP_O_WRONLY	0x0001	
@@ -81,13 +98,22 @@
 	{MTSP_O_NOFOLLOW, O_NOFOLLOW}
 };
 
-static int sp_syscall(int num, int arg0, int arg1, int arg2)
+struct apsp_table syscall_command_table[] = {
+	{MTSP_SYSCALL_OPEN, __NR_open},
+	{MTSP_SYSCALL_CLOSE, __NR_close}, 
+	{MTSP_SYSCALL_READ, __NR_read}, 
+	{MTSP_SYSCALL_WRITE, __NR_write}, 
+	{MTSP_SYSCALL_LSEEK32, __NR_lseek}
+};
+
+static int sp_syscall(int num, int arg0, int arg1, int arg2, int arg3)
 {
 	register long int _num  __asm__ ("$2") = num;
 	register long int _arg0  __asm__ ("$4") = arg0;
 	register long int _arg1  __asm__ ("$5") = arg1;
 	register long int _arg2  __asm__ ("$6") = arg2;
-	register long int eflag  __asm__ ("$7") = 1;
+	register long int _arg3  __asm__ ("$7") = arg3;
+//	register long int eflag  __asm__ ("$7") = 1;
 
 	mm_segment_t old_fs;
 
@@ -96,19 +122,33 @@
 
 	__asm__ __volatile__ (
 		"syscall\n\t"
-		: "=r" (_num), "=r" (eflag)
-		: "r" (_num), "r" (_arg0), "r" (_arg1), "r" (_arg2)
+		: "=r" (_num), "=r" (_arg3)
+		: "r" (_num), "r" (_arg0), "r" (_arg1), "r" (_arg2), "r" (_arg3)
 		);
 
 	set_fs (old_fs); 
 
-	if (eflag)
+	/* $a3 is error flag */
+	if (_arg3)
 		return -_num;
 
 	return _num;
 }
 
-static int translate_open_flags(int flags)
+static int translate_syscall_command(int cmd)
+{
+	int i;
+	int ret = -1;
+
+	for (i = 0; i < (sizeof(syscall_command_table) / sizeof(struct apsp_table));
+	     i++) {
+		if( (cmd == syscall_command_table[i].sp) ) 
+			return syscall_command_table[i].ap;
+	}
+
+	return ret;
+}
+static unsigned int translate_open_flags(int flags)
 {
 	int i;
 	unsigned int ret = 0;
@@ -123,6 +163,7 @@
 	return ret;
 }
 
+
 static void sp_setfsuidgid( uid_t uid, gid_t gid)
 {
 	current->fsuid = uid;
@@ -139,14 +180,24 @@
 */
 void sp_work_handle_request(void)
 {
-	struct sp_request spreq;
+	struct mtsp_syscall sc;
+	struct mtsp_syscall_generic generic;
+	struct mtsp_syscall_ret ret;
 	struct kspd_notifications *n;
 	char *vcwd;
 	mm_segment_t old_fs;
+	int size;
+
+	ret.retval = -1;
+
+	if (!rtlx_read(RTLX_CHANNEL_SYSIO, &sc, sizeof(struct mtsp_syscall), 0)) {
+		printk(KERN_ERR "Expected request but nothing to read\n");
+		return;
+	}
 
-	spreq.ret = -1;
+	size = sc.size;
 
-	if (!rtlx_read(RTLX_CHANNEL_SYSIO, &spreq, sizeof(struct sp_request), 0)) {
+	if (!rtlx_read(RTLX_CHANNEL_SYSIO, &generic, size, 0)) {
 		printk(KERN_ERR "Expected request but nothing to read\n");
 		return;
 	}
@@ -157,23 +208,24 @@
 	if (vpe_getuid(SP_VPE))
 		sp_setfsuidgid( vpe_getuid(SP_VPE), vpe_getgid(SP_VPE));
 
-	/* Linux compatible syscalls can be actioned directly */
-	if ((spreq.cmd >=  __NR_Linux) && 
-	    (spreq.cmd <= (__NR_Linux + __NR_Linux_syscalls))) {
-		/* its a linux syscall */
+	switch (sc.cmd) {
+		
+		/* needs the flags argument translating from SDE kit to
+		   linux */
+
+		case MTSP_SYSCALL_EXIT:
+			list_for_each_entry(n, &kspd_notifylist, list) {
+				n->kspd_sp_exit(SP_VPE);
+			}
+			sp_stopping = 1;
 
-		spreq.ret = sp_syscall(spreq.cmd, spreq.arg0, spreq.arg1, 
-					  spreq.arg2);
+			printk(KERN_DEBUG "KSPD got exit syscall from SP exitcode %d\n",
+			       generic.arg0);
+			break;
 
-	}
-	else {
-		switch (spreq.cmd) {
-			
-			/* needs the flags argument translating from SDE kit to
-			   linux */
 		case MTSP_SYSCALL_OPEN:
-			spreq.arg1 = translate_open_flags(spreq.arg1);
-
+			generic.arg1 = translate_open_flags(generic.arg1);
+		
 			vcwd = vpe_getcwd(SP_VPE);
 		
 			/* change to the cwd of the process that loaded the SP program */
@@ -182,32 +234,36 @@
 			sys_chdir(vcwd);
 			set_fs (old_fs); 
 
-			spreq.ret = sp_syscall(__NR_open, spreq.arg0, spreq.arg1, 
-					  spreq.arg2);
+			sc.cmd = __NR_open;
 
-			break;
+			/* fall through */
+			
+		default:
+		{
+			int cmd;
 
-		case MTSP_SYSCALL_EXIT:
-			list_for_each_entry(n, &kspd_notifylist, list) {
-				n->kspd_sp_exit(SP_VPE);
+			if ((sc.cmd >= __NR_Linux) && (sc.cmd <= (__NR_Linux +  __NR_Linux_syscalls)) ) 
+				cmd = sc.cmd;
+			else
+				cmd = translate_syscall_command(sc.cmd);
+
+			if (cmd >= 0) {
+				ret.retval = sp_syscall(cmd, generic.arg0, generic.arg1, 
+							generic.arg2, generic.arg3);
+				ret.errno = errno;
+			}
+			else {
+				printk(KERN_WARNING "KSPD: Unknown SP syscall number %d\n", 
+				       sc.cmd);
 			}
-			sp_stopping = 1;
-
-			printk(KERN_DEBUG "KSPD got exit syscall from SP\n");
-			break;
-
-		default:
-			printk(KERN_WARNING "KSPD: Invalid SP syscall number %d\n", 
-			       spreq.cmd);
-			break;
 		}
-	}
-
+	} /* switch */
+			
 	if (vpe_getuid(SP_VPE))
 		sp_setfsuidgid( 0, 0);
 
-	if ((rtlx_write(RTLX_CHANNEL_SYSIO, &spreq, sizeof(struct sp_request), 0))
-	    < sizeof(struct sp_request))
+	if ((rtlx_write(RTLX_CHANNEL_SYSIO, &ret, sizeof(struct mtsp_syscall_ret), 0))
+	    < sizeof(struct mtsp_syscall_ret))
 		printk("KSPD: sp_work_handle_request failed to send to SP\n");
 }
 
@@ -217,8 +273,10 @@
 static void sp_work( void *data)
 {
 	if (!channel_open) {
-		if( rtlx_open(RTLX_CHANNEL_SYSIO, 1) != 0)
+		if( rtlx_open(RTLX_CHANNEL_SYSIO, 1) != 0) {
 			printk("KSPD: unable to open sp channel\n");
+			sp_stopping = 1;
+		}
 		else {
 			channel_open++;
 			printk(KERN_DEBUG "KSPD: SP channel opened\n");
diff -urN malta/linux/arch/mips/kernel/rtlx.c malta/linux/arch/mips/kernel/rtlx.c
--- malta/linux/arch/mips/kernel/rtlx.c	2005/08/11 13:27:20	1.1.1000.3
+++ malta/linux/arch/mips/kernel/rtlx.c	2005/08/16 09:49:13	1.1.1000.4
@@ -211,6 +211,12 @@
 				return -ENOSYS;
 			}
 		}
+
+		if ((unsigned int)*p < KSEG0) {
+			printk(KERN_WARNING "vpe_get_shared returned an invalid pointer "
+			       "maybe an error code %d\n", (int)*p);
+			return -ENOSYS;
+		}
 		
 		if ((ret = rtlx_init(*p)) < 0)
 			return ret;

From beth@linux-mips.org Wed Aug 17 14:58:17 2005
Received: with ECARTIS (v1.0.0; list maltalinux-cvs-patches); Wed, 17 Aug 2005 15:58:17 +0100 (BST)
From: beth@linux-mips.org
To:  maltalinux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: malta
Date: Wed, 17 Aug 2005 15:58:17 +0100
X-archive-position: 48
X-ecartis-version: Ecartis v1.0.0
Sender: maltalinux-cvs-patches-bounce@linux-mips.org
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Precedence: bulk
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X-list: maltalinux-cvs-patches


CVSROOT:	/home/cvs
Module name:	malta
Changes by:	beth@ftp.linux-mips.org	05/08/17 15:58:16

Modified files:
	linux/include/asm-mips: Tag: MaltaRef_2_6 rtlx.h 

Log message:
	Remove unused queues and bump version number.

diff -urN malta/linux/include/asm-mips/rtlx.h malta/linux/include/asm-mips/rtlx.h
--- malta/linux/include/asm-mips/rtlx.h	2005/07/27 13:38:04	1.1.1000.1
+++ malta/linux/include/asm-mips/rtlx.h	2005/08/17 14:58:16	1.1.1000.2
@@ -11,7 +11,7 @@
 #define MIPSCPU_INT_BASE  16
 #define MIPS_CPU_RTLX_IRQ 0
 
-#define RTLX_VERSION 1
+#define RTLX_VERSION 2
 #define RTLX_xID 0x12345600
 #define RTLX_ID (RTLX_xID | RTLX_VERSION)
 #define RTLX_CHANNELS 8
@@ -52,8 +52,6 @@
 	int lx_write, lx_read;
 	char *lx_buffer;
 
-	void *queues;
-
 } rtlx_channel_t;
 
 typedef struct rtlx_info {

From beth@linux-mips.org Fri Aug 19 13:47:37 2005
Received: with ECARTIS (v1.0.0; list maltalinux-cvs-patches); Fri, 19 Aug 2005 14:47:37 +0100 (BST)
From: beth@linux-mips.org
To:  maltalinux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: malta
Date: Fri, 19 Aug 2005 14:47:37 +0100
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Sender: maltalinux-cvs-patches-bounce@linux-mips.org
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Precedence: bulk
Reply-to: linux-mips@linux-mips.org
X-list: maltalinux-cvs-patches


CVSROOT:	/home/cvs
Module name:	malta
Changes by:	beth@ftp.linux-mips.org	05/08/19 14:47:36

Modified files:
	linux/arch/mips/kernel: Tag: MaltaRef_2_6 kspd.c rtlx.c vpe.c 
	linux/include/asm-mips: Tag: MaltaRef_2_6 elf.h 

Log message:
	* arch/mips/kernel/kspd.c: Read args as well as the syscall info.
	
	* arch/mips/kernel/rtlx.c: Provide further debug info when
	the shared structure cannot be found.
	
	* arch/mips/kernel/vpe.c: Ignore the .reginfo section when loading
	a linked image.
	
	* include/asm-mips/elf.h: Define .reginfo section type.

diff -urN malta/linux/arch/mips/kernel/kspd.c malta/linux/arch/mips/kernel/kspd.c
--- malta/linux/arch/mips/kernel/Attic/kspd.c	2005/08/16 09:49:13	1.1.1000.3
+++ malta/linux/arch/mips/kernel/Attic/kspd.c	2005/08/19 13:47:36	1.1.1000.4
@@ -197,9 +197,11 @@
 
 	size = sc.size;
 
-	if (!rtlx_read(RTLX_CHANNEL_SYSIO, &generic, size, 0)) {
-		printk(KERN_ERR "Expected request but nothing to read\n");
-		return;
+	if (size) {
+		if (!rtlx_read(RTLX_CHANNEL_SYSIO, &generic, size, 0)) {
+			printk(KERN_ERR "Expected request but nothing to read\n");
+			return;
+		}
 	}
 
 	/* run the syscall at the priviledge of the user who loaded the 
diff -urN malta/linux/arch/mips/kernel/rtlx.c malta/linux/arch/mips/kernel/rtlx.c
--- malta/linux/arch/mips/kernel/rtlx.c	2005/08/16 09:49:13	1.1.1000.4
+++ malta/linux/arch/mips/kernel/rtlx.c	2005/08/19 13:47:36	1.1.1000.5
@@ -111,7 +111,8 @@
 static int rtlx_init(struct rtlx_info *rtlxi)
 {
 	if (rtlxi->id != RTLX_ID) {
-		printk(KERN_ERR "no valid RTLX id at 0x%p\n", rtlxi);
+		printk(KERN_ERR "no valid RTLX id at 0x%p found 0x%x should be 0x%x\n", 
+		       rtlxi, rtlxi->id, RTLX_ID);
 		return -ENOEXEC;
 	}
 
diff -urN malta/linux/arch/mips/kernel/vpe.c malta/linux/arch/mips/kernel/vpe.c
--- malta/linux/arch/mips/kernel/vpe.c	2005/08/11 13:27:51	1.1.1000.3
+++ malta/linux/arch/mips/kernel/vpe.c	2005/08/19 13:47:36	1.1.1000.4
@@ -974,15 +974,21 @@
 		}
 	} else {
 		for (i = 0; i < hdr->e_shnum; i++) {
-
-			if (!(sechdrs[i].sh_flags & SHF_ALLOC) || sechdrs[i].sh_type == PT_MIPS_REGINFO)
+			if (!(sechdrs[i].sh_flags & SHF_ALLOC) || 
+			    (sechdrs[i].sh_type == SHT_MIPS_REGINFO)) {
+				printk( KERN_DEBUG " ignoring section, "
+					"name %s type %x address 0x%x \n", 
+					secstrings + sechdrs[i].sh_name,
+					sechdrs[i].sh_type, sechdrs[i].sh_addr);
 				continue;
+			}
 
 			if (sechdrs[i].sh_addr < (unsigned int)v->load_addr) {
 				printk( KERN_WARNING "vpe_elfload: fully linked image has invalid " 
-					"section, name %s address 0x%x, before load "
+					"section, name %s type %x address 0x%x, before load "
 					"address of 0x%x\n", secstrings + sechdrs[i].sh_name,
-					sechdrs[i].sh_addr, (unsigned int)v->load_addr);
+					sechdrs[i].sh_type, sechdrs[i].sh_addr, 
+					(unsigned int)v->load_addr);
 				return -ENOEXEC;
 			}
 
diff -urN malta/linux/include/asm-mips/elf.h malta/linux/include/asm-mips/elf.h
--- malta/linux/include/asm-mips/elf.h	2005/06/21 13:36:23	1.21.1000.2
+++ malta/linux/include/asm-mips/elf.h	2005/08/19 13:47:36	1.21.1000.3
@@ -114,6 +114,8 @@
 #define SHT_MIPS_GPTAB		0x70000003
 #define SHT_MIPS_UCODE		0x70000004
 
+#define SHT_MIPS_REGINFO	0x70000006
+
 #define SHF_MIPS_GPREL	0x10000000
 
 #ifndef ELF_ARCH

