From wad@chromium.org Wed Jun 1 05:11:05 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 01 Jun 2011 05:11:12 +0200 (CEST) Received: from mail-yx0-f177.google.com ([209.85.213.177]:62995 "EHLO mail-yx0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491108Ab1FADLF (ORCPT ); Wed, 1 Jun 2011 05:11:05 +0200 Received: by yxh35 with SMTP id 35so2477858yxh.36 for ; Tue, 31 May 2011 20:10:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=domainkey-signature:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=n29JH1TGjiFRXdM7KNLghkbfZ4y73MIDKd3oAYdreSg=; b=Ff8vEyVst6eA8VleCWKd+eLP0dFjZxBCqJqAbE74xWMJ3ZCngUBWNEjGA+YFQrRiej MD9OdsnW682zCXrf4u9WI16kX4akh8SqvI9DPmIfU88TrybQLKELB4zb1+audFpuaoWh xo+/2Pe84T6czmTTTgiBg7EJ47ROJwU5nfDAQ= DomainKey-Signature: a=rsa-sha1; c=nofws; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=KNuoOOblS+kRKhvW0eLKJfSNrTCqI9Pl5NXSftMfUrR1mVaguu6zrHHk/nqaJHOsH3 Fqc3cSCu6ZNiHeLXwaeRTwWa4i9bdPcZ2Eifwy63JxaLkqkDz8zYIcUh39aV6Q6I0FKV tcsB7/8zQF62rOE89suGfALb2rLb9RpCAC3hA= Received: by 10.91.212.15 with SMTP id o15mr5713268agq.189.1306897857760; Tue, 31 May 2011 20:10:57 -0700 (PDT) Received: from localhost.localdomain (adsl-98-87-45-176.bna.bellsouth.net [98.87.45.176]) by mx.google.com with ESMTPS id c21sm443297ana.24.2011.05.31.20.10.56 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 31 May 2011 20:10:57 -0700 (PDT) From: Will Drewry To: linux-kernel@vger.kernel.org Cc: kees.cook@canonical.com, torvalds@linux-foundation.org, tglx@linutronix.de, mingo@elte.hu, rostedt@goodmis.org, jmorris@namei.org, Will Drewry , Ralf Baechle , linux-mips@linux-mips.org Subject: [PATCH v3 09/13] mips: select HAVE_SECCOMP_FILTER and provide seccomp_execve Date: Tue, 31 May 2011 22:10:41 -0500 Message-Id: <1306897845-9393-9-git-send-email-wad@chromium.org> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: X-archive-position: 30175 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wad@chromium.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 136 Content-Length: 1557 Lines: 52 Facilitate the use of CONFIG_SECCOMP_FILTER by wrapping compatibility system call numbering for execve and selecting HAVE_SECCOMP_FILTER. Signed-off-by: Will Drewry --- arch/mips/Kconfig | 1 + arch/mips/include/asm/seccomp.h | 3 +++ 2 files changed, 4 insertions(+), 0 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 8e256cc..d376f68 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -10,6 +10,7 @@ config MIPS select HAVE_ARCH_KGDB select HAVE_FUNCTION_TRACER select HAVE_FUNCTION_TRACE_MCOUNT_TEST + select HAVE_SECCOMP_FILTER select HAVE_DYNAMIC_FTRACE select HAVE_FTRACE_MCOUNT_RECORD select HAVE_C_RECORDMCOUNT diff --git a/arch/mips/include/asm/seccomp.h b/arch/mips/include/asm/seccomp.h index ae6306e..4014a3a 100644 --- a/arch/mips/include/asm/seccomp.h +++ b/arch/mips/include/asm/seccomp.h @@ -6,6 +6,7 @@ #define __NR_seccomp_write __NR_write #define __NR_seccomp_exit __NR_exit #define __NR_seccomp_sigreturn __NR_rt_sigreturn +#define __NR_seccomp_execve __NR_execve /* * Kludge alert: @@ -19,6 +20,7 @@ #define __NR_seccomp_write_32 4004 #define __NR_seccomp_exit_32 4001 #define __NR_seccomp_sigreturn_32 4193 /* rt_sigreturn */ +#define __NR_seccomp_execve_32 4011 #elif defined(CONFIG_MIPS32_N32) @@ -26,6 +28,7 @@ #define __NR_seccomp_write_32 6001 #define __NR_seccomp_exit_32 6058 #define __NR_seccomp_sigreturn_32 6211 /* rt_sigreturn */ +#define __NR_seccomp_execve_32 6057 #endif /* CONFIG_MIPS32_O32 */ -- 1.7.0.4 From wanlong.gao@gmail.com Wed Jun 1 18:30:20 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 01 Jun 2011 18:30:28 +0200 (CEST) Received: from mail-pz0-f49.google.com ([209.85.210.49]:54628 "EHLO mail-pz0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491835Ab1FAQaU (ORCPT ); Wed, 1 Jun 2011 18:30:20 +0200 Received: by pzk28 with SMTP id 28so3207760pzk.36 for ; Wed, 01 Jun 2011 09:30:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:from:to:cc:subject:date:message-id:x-mailer; bh=+9wTv5DZMjpVSH5mloXPUWybfyqKxdbh2tWtpb6qLMM=; b=V92awdfW0hFp5TJ6dzstZLdC2HGUwJZ+coQsvt7szFY+0rkDbFQDnALqawC1XJG5Lw yzyYTVtknfCzijzxGEFjnf/NO+wbI0WJYiYgrAVJkD4LszyucoyztDOMH/++YQmCI3aF YuWZuYJZc/zUaL27gb5zhRUbN4IBKAQ5bW2FM= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; b=f6tDEFUz8fJnPr5rqzJPhwtPJjU2O8eQAhk1BEYxusUHe3bcRQJGa/Lv/v0uBXxHVA EWlpiXtYuv/whqah1kU0D7g/OQZ5BK1tiyHgINuqh1die0uqZgGQZXvOl5Ir0SaSfMIw CVFHiiF8QlJNah4i6YemaCrc58qusuFt8Q+oA= Received: by 10.143.63.17 with SMTP id q17mr1355266wfk.186.1306945812799; Wed, 01 Jun 2011 09:30:12 -0700 (PDT) Received: from localhost.localdomain ([182.32.129.92]) by mx.google.com with ESMTPS id l10sm738976wfk.9.2011.06.01.09.29.41 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 01 Jun 2011 09:30:12 -0700 (PDT) From: Wanlong Gao To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, uclinux-dist-devel@blackfin.uclinux.org, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-sh@vger.kernel.org Cc: linux@arm.linux.org.uk, hans-christian.egtvedt@atmel.com, vapier@gentoo.org, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, lethal@linux-sh.org, gxt@mprc.pku.edu.cn, david.woodhouse@intel.com, akpm@linux-foundation.org, u.kleine-koenig@pengutronix.de, mingo@elte.hu, rientjes@google.com, w.sang@pengutronix.de, sam@ravnborg.org, manuel.lauss@googlemail.com, anton@samba.org, arnd@arndb.de, Wanlong Gao Subject: [PATCH] Fix build warning of the defconfigs Date: Thu, 2 Jun 2011 00:29:23 +0800 Message-Id: <1306945763-6583-1-git-send-email-wanlong.gao@gmail.com> X-Mailer: git-send-email 1.7.4.1 X-archive-position: 30176 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wanlong.gao@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 950 Content-Length: 6425 Lines: 192 RTC_CLASS is changed to bool. So value 'm' is invalid. Signed-off-by: Wanlong Gao --- arch/arm/configs/davinci_all_defconfig | 2 +- arch/arm/configs/mxs_defconfig | 2 +- arch/arm/configs/netx_defconfig | 2 +- arch/arm/configs/viper_defconfig | 2 +- arch/arm/configs/xcep_defconfig | 2 +- arch/arm/configs/zeus_defconfig | 2 +- arch/avr32/configs/atngw100_mrmt_defconfig | 2 +- arch/blackfin/configs/CM-BF548_defconfig | 2 +- arch/mips/configs/mtx1_defconfig | 2 +- arch/powerpc/configs/52xx/pcm030_defconfig | 2 +- arch/powerpc/configs/ps3_defconfig | 2 +- arch/sh/configs/titan_defconfig | 2 +- arch/unicore32/configs/debug_defconfig | 2 +- 13 files changed, 13 insertions(+), 13 deletions(-) diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig index 889922a..67b5abb6 100644 --- a/arch/arm/configs/davinci_all_defconfig +++ b/arch/arm/configs/davinci_all_defconfig @@ -157,7 +157,7 @@ CONFIG_LEDS_GPIO=m CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=m CONFIG_LEDS_TRIGGER_HEARTBEAT=m -CONFIG_RTC_CLASS=m +CONFIG_RTC_CLASS=y CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y CONFIG_XFS_FS=m diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig index 2bf2243..5a6ff7c 100644 --- a/arch/arm/configs/mxs_defconfig +++ b/arch/arm/configs/mxs_defconfig @@ -89,7 +89,7 @@ CONFIG_DISPLAY_SUPPORT=m # CONFIG_USB_SUPPORT is not set CONFIG_MMC=y CONFIG_MMC_MXS=y -CONFIG_RTC_CLASS=m +CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_DS1307=m CONFIG_DMADEVICES=y CONFIG_MXS_DMA=y diff --git a/arch/arm/configs/netx_defconfig b/arch/arm/configs/netx_defconfig index 316af54..9c0ad79 100644 --- a/arch/arm/configs/netx_defconfig +++ b/arch/arm/configs/netx_defconfig @@ -60,7 +60,7 @@ CONFIG_FB_ARMCLCD=y # CONFIG_VGA_CONSOLE is not set CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_LOGO=y -CONFIG_RTC_CLASS=m +CONFIG_RTC_CLASS=y CONFIG_INOTIFY=y CONFIG_TMPFS=y CONFIG_JFFS2_FS=y diff --git a/arch/arm/configs/viper_defconfig b/arch/arm/configs/viper_defconfig index 8b0c717..1d01ddd 100644 --- a/arch/arm/configs/viper_defconfig +++ b/arch/arm/configs/viper_defconfig @@ -142,7 +142,7 @@ CONFIG_USB_GADGETFS=m CONFIG_USB_FILE_STORAGE=m CONFIG_USB_G_SERIAL=m CONFIG_USB_G_PRINTER=m -CONFIG_RTC_CLASS=m +CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_DS1307=m CONFIG_RTC_DRV_SA1100=m CONFIG_EXT2_FS=m diff --git a/arch/arm/configs/xcep_defconfig b/arch/arm/configs/xcep_defconfig index 5b55041..721832f 100644 --- a/arch/arm/configs/xcep_defconfig +++ b/arch/arm/configs/xcep_defconfig @@ -73,7 +73,7 @@ CONFIG_SENSORS_MAX6650=m # CONFIG_VGA_CONSOLE is not set # CONFIG_HID_SUPPORT is not set # CONFIG_USB_SUPPORT is not set -CONFIG_RTC_CLASS=m +CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_SA1100=m CONFIG_DMADEVICES=y # CONFIG_DNOTIFY is not set diff --git a/arch/arm/configs/zeus_defconfig b/arch/arm/configs/zeus_defconfig index 960f655..59577ad 100644 --- a/arch/arm/configs/zeus_defconfig +++ b/arch/arm/configs/zeus_defconfig @@ -158,7 +158,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=m CONFIG_LEDS_TRIGGER_BACKLIGHT=m CONFIG_LEDS_TRIGGER_GPIO=m CONFIG_LEDS_TRIGGER_DEFAULT_ON=m -CONFIG_RTC_CLASS=m +CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_ISL1208=m CONFIG_RTC_DRV_PXA=m CONFIG_EXT2_FS=y diff --git a/arch/avr32/configs/atngw100_mrmt_defconfig b/arch/avr32/configs/atngw100_mrmt_defconfig index 19f6cee..fb6dab8 100644 --- a/arch/avr32/configs/atngw100_mrmt_defconfig +++ b/arch/avr32/configs/atngw100_mrmt_defconfig @@ -109,7 +109,7 @@ CONFIG_LEDS_GPIO=y CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_RTC_CLASS=m +CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_S35390A=m CONFIG_RTC_DRV_AT32AP700X=m CONFIG_DMADEVICES=y diff --git a/arch/blackfin/configs/CM-BF548_defconfig b/arch/blackfin/configs/CM-BF548_defconfig index 31d9542..9f1d084 100644 --- a/arch/blackfin/configs/CM-BF548_defconfig +++ b/arch/blackfin/configs/CM-BF548_defconfig @@ -112,7 +112,7 @@ CONFIG_USB_G_SERIAL=m CONFIG_USB_G_PRINTER=m CONFIG_MMC=m CONFIG_SDH_BFIN=m -CONFIG_RTC_CLASS=m +CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_BFIN=m CONFIG_EXT2_FS=m # CONFIG_DNOTIFY is not set diff --git a/arch/mips/configs/mtx1_defconfig b/arch/mips/configs/mtx1_defconfig index 37862b2..807c97e 100644 --- a/arch/mips/configs/mtx1_defconfig +++ b/arch/mips/configs/mtx1_defconfig @@ -678,7 +678,7 @@ CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y CONFIG_LEDS_TRIGGER_DEFAULT_ON=y -CONFIG_RTC_CLASS=m +CONFIG_RTC_CLASS=y CONFIG_RTC_INTF_DEV_UIE_EMUL=y CONFIG_RTC_DRV_TEST=m CONFIG_RTC_DRV_DS1307=m diff --git a/arch/powerpc/configs/52xx/pcm030_defconfig b/arch/powerpc/configs/52xx/pcm030_defconfig index 7f7e4a8..22e7195 100644 --- a/arch/powerpc/configs/52xx/pcm030_defconfig +++ b/arch/powerpc/configs/52xx/pcm030_defconfig @@ -85,7 +85,7 @@ CONFIG_USB_OHCI_HCD=m CONFIG_USB_OHCI_HCD_PPC_OF_BE=y # CONFIG_USB_OHCI_HCD_PCI is not set CONFIG_USB_STORAGE=m -CONFIG_RTC_CLASS=m +CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_PCF8563=m CONFIG_EXT2_FS=m CONFIG_EXT3_FS=m diff --git a/arch/powerpc/configs/ps3_defconfig b/arch/powerpc/configs/ps3_defconfig index 6472322..185c292 100644 --- a/arch/powerpc/configs/ps3_defconfig +++ b/arch/powerpc/configs/ps3_defconfig @@ -141,7 +141,7 @@ CONFIG_USB_EHCI_TT_NEWSCHED=y # CONFIG_USB_EHCI_HCD_PPC_OF is not set CONFIG_USB_OHCI_HCD=m CONFIG_USB_STORAGE=m -CONFIG_RTC_CLASS=m +CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_PS3=m CONFIG_EXT2_FS=m CONFIG_EXT3_FS=m diff --git a/arch/sh/configs/titan_defconfig b/arch/sh/configs/titan_defconfig index 0f55891..e2cbd92 100644 --- a/arch/sh/configs/titan_defconfig +++ b/arch/sh/configs/titan_defconfig @@ -227,7 +227,7 @@ CONFIG_USB_SERIAL=m CONFIG_USB_SERIAL_GENERIC=y CONFIG_USB_SERIAL_ARK3116=m CONFIG_USB_SERIAL_PL2303=m -CONFIG_RTC_CLASS=m +CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_SH=m CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y diff --git a/arch/unicore32/configs/debug_defconfig b/arch/unicore32/configs/debug_defconfig index b5fbde9..1c367f0 100644 --- a/arch/unicore32/configs/debug_defconfig +++ b/arch/unicore32/configs/debug_defconfig @@ -168,7 +168,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y # Real Time Clock CONFIG_RTC_LIB=m -CONFIG_RTC_CLASS=m +CONFIG_RTC_CLASS=y ### File systems CONFIG_EXT2_FS=m -- 1.7.4.1 From vapier@gentoo.org Wed Jun 1 19:00:53 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 01 Jun 2011 19:00:58 +0200 (CEST) Received: from mail-fx0-f49.google.com ([209.85.161.49]:42644 "EHLO mail-fx0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491835Ab1FARAx convert rfc822-to-8bit (ORCPT ); Wed, 1 Jun 2011 19:00:53 +0200 Received: by fxm14 with SMTP id 14so271842fxm.36 for ; Wed, 01 Jun 2011 10:00:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:sender:in-reply-to:references:from :date:x-google-sender-auth:message-id:subject:to:cc:content-type :content-transfer-encoding; bh=KpPEf4LLr9n8sDDxoaiv5s6pKcWw3mocvYJd39gSYcs=; b=qTHYqlfs/NHw3B2/Tna+w+EPozkPp59n+cW1jr4Vc9IO+DB5jRM1D1Zfk29PGNt3r6 +bIQRMaKhLM0eyr2PNcfYcM+zZ8Tj5MFhn0V05b69T5CKjsn2swomtzGRs1MSYPEDy7J pO5GPrw7DabUXJ9+CVRtw5Aguj1ACDtUM2+YQ= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:from:date :x-google-sender-auth:message-id:subject:to:cc:content-type :content-transfer-encoding; b=otTydPVSSge4X4RPr279iPjuC8gex/ObSJDnJzzqIiMvQE3szWiAeTkBIL8E/0oDxN WshBkkNurbbiRrDrkQBLPLiRLmLLqlL9D7sxpAESGbkyYBylRS7LawMEH5djpouT4AmP ntZ5L0Fp0GJ9jVdfumAFPATnHHEKY5plOReQA= Received: by 10.223.1.209 with SMTP id 17mr5387359fag.89.1306947648106; Wed, 01 Jun 2011 10:00:48 -0700 (PDT) MIME-Version: 1.0 Received: by 10.223.149.133 with HTTP; Wed, 1 Jun 2011 10:00:28 -0700 (PDT) In-Reply-To: <1306945763-6583-1-git-send-email-wanlong.gao@gmail.com> References: <1306945763-6583-1-git-send-email-wanlong.gao@gmail.com> From: Mike Frysinger Date: Wed, 1 Jun 2011 13:00:28 -0400 X-Google-Sender-Auth: EdDBFDhUtmES1ioY6e6-8QVrqfY Message-ID: Subject: Re: [PATCH] Fix build warning of the defconfigs To: Wanlong Gao Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, uclinux-dist-devel@blackfin.uclinux.org, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-sh@vger.kernel.org, linux@arm.linux.org.uk, hans-christian.egtvedt@atmel.com, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, lethal@linux-sh.org, gxt@mprc.pku.edu.cn, david.woodhouse@intel.com, akpm@linux-foundation.org, u.kleine-koenig@pengutronix.de, mingo@elte.hu, rientjes@google.com, w.sang@pengutronix.de, sam@ravnborg.org, manuel.lauss@googlemail.com, anton@samba.org, arnd@arndb.de Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-archive-position: 30177 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vapier@gentoo.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 970 Content-Length: 161 Lines: 5 On Wed, Jun 1, 2011 at 12:29, Wanlong Gao wrote: >  arch/blackfin/configs/CM-BF548_defconfig   |    2 +- Acked-by: Mike Frysinger -mike From w.sang@pengutronix.de Wed Jun 1 20:16:41 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 01 Jun 2011 20:16:44 +0200 (CEST) Received: from metis.ext.pengutronix.de ([92.198.50.35]:51404 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491842Ab1FASQl (ORCPT ); Wed, 1 Jun 2011 20:16:41 +0200 Received: from octopus.hi.pengutronix.de ([2001:6f8:1178:2:215:17ff:fe12:23b0]) by metis.ext.pengutronix.de with esmtp (Exim 4.72) (envelope-from ) id 1QRpxo-00074x-So; Wed, 01 Jun 2011 20:16:16 +0200 Received: from wsa by octopus.hi.pengutronix.de with local (Exim 4.76) (envelope-from ) id 1QRpxb-0000Ka-8o; Wed, 01 Jun 2011 20:16:03 +0200 Date: Wed, 1 Jun 2011 20:16:03 +0200 From: Wolfram Sang To: Wanlong Gao Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, uclinux-dist-devel@blackfin.uclinux.org, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-sh@vger.kernel.org, linux@arm.linux.org.uk, hans-christian.egtvedt@atmel.com, vapier@gentoo.org, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, lethal@linux-sh.org, gxt@mprc.pku.edu.cn, david.woodhouse@intel.com, akpm@linux-foundation.org, u.kleine-koenig@pengutronix.de, mingo@elte.hu, rientjes@google.com, sam@ravnborg.org, manuel.lauss@googlemail.com, anton@samba.org, arnd@arndb.de Subject: Re: [PATCH] Fix build warning of the defconfigs Message-ID: <20110601181603.GA454@pengutronix.de> References: <1306945763-6583-1-git-send-email-wanlong.gao@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="7AUc2qLy4jB3hD7Z" Content-Disposition: inline In-Reply-To: <1306945763-6583-1-git-send-email-wanlong.gao@gmail.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-SA-Exim-Connect-IP: 2001:6f8:1178:2:215:17ff:fe12:23b0 X-SA-Exim-Mail-From: wsa@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-mips@linux-mips.org X-archive-position: 30178 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: w.sang@pengutronix.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1075 Content-Length: 1746 Lines: 50 --7AUc2qLy4jB3hD7Z Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Jun 02, 2011 at 12:29:23AM +0800, Wanlong Gao wrote: > RTC_CLASS is changed to bool. > So value 'm' is invalid. >=20 > Signed-off-by: Wanlong Gao > --- > arch/arm/configs/davinci_all_defconfig | 2 +- > arch/arm/configs/mxs_defconfig | 2 +- > arch/arm/configs/netx_defconfig | 2 +- > arch/arm/configs/viper_defconfig | 2 +- > arch/arm/configs/xcep_defconfig | 2 +- > arch/arm/configs/zeus_defconfig | 2 +- > arch/avr32/configs/atngw100_mrmt_defconfig | 2 +- > arch/blackfin/configs/CM-BF548_defconfig | 2 +- > arch/mips/configs/mtx1_defconfig | 2 +- > arch/powerpc/configs/52xx/pcm030_defconfig | 2 +- > arch/powerpc/configs/ps3_defconfig | 2 +- > arch/sh/configs/titan_defconfig | 2 +- > arch/unicore32/configs/debug_defconfig | 2 +- > 13 files changed, 13 insertions(+), 13 deletions(-) The mxs-part has already been sent by Shawn Guo (shouldn't harm). Thanks for doing tree-wide: Acked-by: Wolfram Sang --=20 Pengutronix e.K. | Wolfram Sang | Industrial Linux Solutions | http://www.pengutronix.de/ | --7AUc2qLy4jB3hD7Z Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iEYEARECAAYFAk3mgeMACgkQD27XaX1/VRtALACgwWNkKN3MYtyEJ3UIFNG7P/jx oygAoJkolxXXrviVsTRfROYzf65y/N+3 =5o5C -----END PGP SIGNATURE----- --7AUc2qLy4jB3hD7Z-- From ralf@linux-mips.org Wed Jun 1 21:47:21 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 01 Jun 2011 21:47:26 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:47027 "EHLO duck.linux-mips.net" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491843Ab1FATrV (ORCPT ); Wed, 1 Jun 2011 21:47:21 +0200 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.3) with ESMTP id p51JlRi5010104; Wed, 1 Jun 2011 20:47:27 +0100 Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id p51JlQM0010101; Wed, 1 Jun 2011 20:47:26 +0100 Message-Id: <20110601180456.801265664@duck.linux-mips.net> User-Agent: quilt/0.48-1 Date: Wed, 01 Jun 2011 19:04:56 +0100 From: ralf@linux-mips.org To: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-alpha@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org Subject: [patch 00/14] Sort out i8253 and PC speaker locking and headers X-archive-position: 30179 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1159 Content-Length: 2825 Lines: 83 No longer terribly relevant these days but still broken and just an eyesore mess of neglience just as I've already raised it a few days ago. Time to sort this. drivers/input/misc/pcspkr.c: #if defined(CONFIG_MIPS) || defined(CONFIG_X86) /* Use the global PIT lock ! */ #include #else #include static DEFINE_RAW_SPINLOCK(i8253_lock); #endif sound/drivers/pcsp/pcsp.h: #if defined(CONFIG_MIPS) || defined(CONFIG_X86) /* Use the global PIT lock ! */ #include #else #include static DEFINE_RAW_SPINLOCK(i8253_lock); $ git grep -F pcsp.h sound/drivers/pcsp sound/drivers/pcsp/pcsp.c:#include "pcsp.h" sound/drivers/pcsp/pcsp_input.c:#include "pcsp.h" sound/drivers/pcsp/pcsp_lib.c:#include "pcsp.h" sound/drivers/pcsp/pcsp_mixer.c:#include "pcsp.h" $ git grep -w i8253_lock sound/drivers/pcsp/ sound/drivers/pcsp/pcsp.h:static DEFINE_RAW_SPINLOCK(i8253_lock); sound/drivers/pcsp/pcsp_input.c: raw_spin_lock_irqsave(&i8253_lock, flags sound/drivers/pcsp/pcsp_input.c: raw_spin_unlock_irqrestore(&i8253_lock, sound/drivers/pcsp/pcsp_lib.c: raw_spin_lock_irqsave(&i8253_lock, flags sound/drivers/pcsp/pcsp_lib.c: raw_spin_unlock_irqrestore(&i8253_lock, sound/drivers/pcsp/pcsp_lib.c: raw_spin_lock(&i8253_lock); sound/drivers/pcsp/pcsp_lib.c: raw_spin_unlock(&i8253_lock); sound/drivers/pcsp/pcsp_lib.c: raw_spin_lock(&i8253_lock); sound/drivers/pcsp/pcsp_lib.c: raw_spin_unlock(&i8253_lock); Locks are great, everybody should have their own lock! $ find . -name 8253pit.h ./arch/powerpc/include/asm/8253pit.h ./arch/alpha/include/asm/8253pit.h $ cat arch/*/include/asm/8253pit.h /* * 8253/8254 Programmable Interval Timer */ /* * 8253/8254 Programmable Interval Timer */ $ Eh... $ git grep -w PCSPKR_PLATFORM arch/mips/Kconfig: select PCSPKR_PLATFORM arch/mips/Kconfig: select PCSPKR_PLATFORM arch/mips/Kconfig: select PCSPKR_PLATFORM arch/powerpc/platforms/amigaone/Kconfig: select PCSPKR_PLATFORM drivers/input/misc/Kconfig: depends on PCSPKR_PLATFORM init/Kconfig:config PCSPKR_PLATFORM sound/drivers/Kconfig: depends on PCSPKR_PLATFORM && X86 && HIGH_RES_TIMERS So the status is: Alpha: There is no PCSPKR_PLATFORM so while a platform device is being installed no drivers will be built. I don't know which Alpha platforms or even if all of Alpha should be doing a PCSPKR_PLATFORM so I haven't even tried to sort this. ARM: No PC speaker supported, yeah :) PowerPC: Should compile but the locking is wrong but only the AmigaOne platforms should be affected. MIPS: Ok. x86: Ok. All others: No PC speaker supported Also only the plain old IBM PC XT was using a i8253; every later system had i8254. So maybe this is the time for renaming the support code? Ralf From ralf@linux-mips.org Wed Jun 1 21:47:25 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 01 Jun 2011 21:47:52 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:47038 "EHLO duck.linux-mips.net" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491847Ab1FATrZ (ORCPT ); Wed, 1 Jun 2011 21:47:25 +0200 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.3) with ESMTP id p51JlWj1010125; Wed, 1 Jun 2011 20:47:32 +0100 Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id p51JlWJL010124; Wed, 1 Jun 2011 20:47:32 +0100 Message-Id: <20110601180610.295501825@duck.linux-mips.net> User-Agent: quilt/0.48-1 Date: Wed, 01 Jun 2011 19:05:00 +0100 From: ralf@linux-mips.org To: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org Cc: linux-mips@linux-mips.org Subject: [patch 04/14] i8253: Make MIPS use the shared i8253_lock. References: <20110601180456.801265664@duck.linux-mips.net> Content-Disposition: inline; filename=i8253-move-mips-to-shared-lock.patch X-archive-position: 30180 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1160 Content-Length: 921 Lines: 36 Signed-off-by: Ralf Baechle To: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org arch/mips/Kconfig | 1 + arch/mips/kernel/i8253.c | 3 --- 2 files changed, 1 insertion(+), 3 deletions(-) Index: linux-mips/arch/mips/Kconfig =================================================================== --- linux-mips.orig/arch/mips/Kconfig +++ linux-mips/arch/mips/Kconfig @@ -2388,6 +2388,7 @@ config MMU config I8253 bool select CLKSRC_I8253 + select I8253_LOCK select MIPS_EXTERNAL_TIMER config ZONE_DMA32 Index: linux-mips/arch/mips/kernel/i8253.c =================================================================== --- linux-mips.orig/arch/mips/kernel/i8253.c +++ linux-mips/arch/mips/kernel/i8253.c @@ -16,9 +16,6 @@ #include #include -DEFINE_RAW_SPINLOCK(i8253_lock); -EXPORT_SYMBOL(i8253_lock); - /* * Initialize the PIT timer. * From ralf@linux-mips.org Wed Jun 1 21:47:31 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 01 Jun 2011 21:48:21 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:47062 "EHLO duck.linux-mips.net" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491850Ab1FATrb (ORCPT ); Wed, 1 Jun 2011 21:47:31 +0200 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.3) with ESMTP id p51JlUrX010111; Wed, 1 Jun 2011 20:47:30 +0100 Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id p51JlR21010108; Wed, 1 Jun 2011 20:47:27 +0100 Message-Id: <20110601180610.054254048@duck.linux-mips.net> User-Agent: quilt/0.48-1 Date: Wed, 01 Jun 2011 19:04:57 +0100 From: ralf@linux-mips.org To: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org Cc: Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, John Stultz , linux-mips@linux-mips.org Subject: [patch 01/14] i8253: Create and make all in kernel users to use it. References: <20110601180456.801265664@duck.linux-mips.net> Content-Disposition: inline; filename=i8253-add-shared-header.patch X-archive-position: 30181 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1168 Content-Length: 10803 Lines: 352 Signed-off-by: Ralf Baechle To: linux-kernel@vger.kernel.org Cc: Ralf Baechle Cc: Thomas Gleixner Cc: Ingo Molnar Cc: "H. Peter Anvin" Cc: x86@kernel.org Cc: John Stultz Cc: linux-mips@linux-mips.org arch/arm/mach-footbridge/isa-timer.c | 2 +- arch/mips/cobalt/time.c | 2 +- arch/mips/jazz/irq.c | 2 +- arch/mips/kernel/i8253.c | 2 +- arch/mips/mti-malta/malta-time.c | 2 +- arch/mips/sgi-ip22/ip22-time.c | 2 +- arch/mips/sni/time.c | 2 +- arch/x86/kernel/apic/apic.c | 2 +- arch/x86/kernel/apm_32.c | 2 +- arch/x86/kernel/hpet.c | 2 +- arch/x86/kernel/i8253.c | 2 +- arch/x86/kernel/time.c | 2 +- drivers/block/hd.c | 2 +- drivers/clocksource/i8253.c | 2 +- drivers/input/gameport/gameport.c | 2 +- drivers/input/joystick/analog.c | 2 +- drivers/input/misc/pcspkr.c | 2 +- include/linux/i8253.h | 11 +++++++++++ sound/drivers/pcsp/pcsp.h | 2 +- 19 files changed, 29 insertions(+), 18 deletions(-) Index: linux-mips/include/linux/i8253.h =================================================================== --- /dev/null +++ linux-mips/include/linux/i8253.h @@ -0,0 +1,11 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __LINUX_I8253_H +#define __LINUX_I8253_H + +#include + +#endif /* __LINUX_I8253_H */ Index: linux-mips/arch/arm/mach-footbridge/isa-timer.c =================================================================== --- linux-mips.orig/arch/arm/mach-footbridge/isa-timer.c +++ linux-mips/arch/arm/mach-footbridge/isa-timer.c @@ -6,6 +6,7 @@ */ #include #include +#include #include #include #include @@ -14,7 +15,6 @@ #include #include -#include #include #include "common.h" Index: linux-mips/arch/mips/cobalt/time.c =================================================================== --- linux-mips.orig/arch/mips/cobalt/time.c +++ linux-mips/arch/mips/cobalt/time.c @@ -17,10 +17,10 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */ +#include #include #include -#include #include #define GT641XX_BASE_CLOCK 50000000 /* 50MHz */ Index: linux-mips/arch/mips/jazz/irq.c =================================================================== --- linux-mips.orig/arch/mips/jazz/irq.c +++ linux-mips/arch/mips/jazz/irq.c @@ -7,6 +7,7 @@ * Copyright (C) 1994 - 2001, 2003, 07 Ralf Baechle */ #include +#include #include #include #include @@ -15,7 +16,6 @@ #include #include -#include #include #include #include Index: linux-mips/arch/mips/kernel/i8253.c =================================================================== --- linux-mips.orig/arch/mips/kernel/i8253.c +++ linux-mips/arch/mips/kernel/i8253.c @@ -3,6 +3,7 @@ * */ #include +#include #include #include #include @@ -12,7 +13,6 @@ #include #include -#include #include #include Index: linux-mips/arch/mips/mti-malta/malta-time.c =================================================================== --- linux-mips.orig/arch/mips/mti-malta/malta-time.c +++ linux-mips/arch/mips/mti-malta/malta-time.c @@ -19,6 +19,7 @@ */ #include +#include #include #include #include @@ -31,7 +32,6 @@ #include #include #include -#include #include #include #include Index: linux-mips/arch/mips/sgi-ip22/ip22-time.c =================================================================== --- linux-mips.orig/arch/mips/sgi-ip22/ip22-time.c +++ linux-mips/arch/mips/sgi-ip22/ip22-time.c @@ -10,6 +10,7 @@ * Copyright (C) 2003, 06 Ralf Baechle (ralf@linux-mips.org) */ #include +#include #include #include #include @@ -20,7 +21,6 @@ #include #include -#include #include #include #include Index: linux-mips/arch/mips/sni/time.c =================================================================== --- linux-mips.orig/arch/mips/sni/time.c +++ linux-mips/arch/mips/sni/time.c @@ -1,11 +1,11 @@ #include +#include #include #include #include #include #include -#include #include #include #include Index: linux-mips/arch/x86/kernel/apic/apic.c =================================================================== --- linux-mips.orig/arch/x86/kernel/apic/apic.c +++ linux-mips/arch/x86/kernel/apic/apic.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include @@ -39,7 +40,6 @@ #include #include #include -#include #include #include #include Index: linux-mips/arch/x86/kernel/apm_32.c =================================================================== --- linux-mips.orig/arch/x86/kernel/apm_32.c +++ linux-mips/arch/x86/kernel/apm_32.c @@ -229,11 +229,11 @@ #include #include #include +#include #include #include #include -#include #include #include #include Index: linux-mips/arch/x86/kernel/hpet.c =================================================================== --- linux-mips.orig/arch/x86/kernel/hpet.c +++ linux-mips/arch/x86/kernel/hpet.c @@ -4,6 +4,7 @@ #include #include #include +#include #include #include #include @@ -12,7 +13,6 @@ #include #include -#include #include #define HPET_MASK CLOCKSOURCE_MASK(32) Index: linux-mips/arch/x86/kernel/i8253.c =================================================================== --- linux-mips.orig/arch/x86/kernel/i8253.c +++ linux-mips/arch/x86/kernel/i8253.c @@ -9,10 +9,10 @@ #include #include #include +#include #include #include -#include #include #include Index: linux-mips/arch/x86/kernel/time.c =================================================================== --- linux-mips.orig/arch/x86/kernel/time.c +++ linux-mips/arch/x86/kernel/time.c @@ -11,13 +11,13 @@ #include #include +#include #include #include #include #include #include -#include #include #include #include Index: linux-mips/drivers/block/hd.c =================================================================== --- linux-mips.orig/drivers/block/hd.c +++ linux-mips/drivers/block/hd.c @@ -155,7 +155,7 @@ else \ #if (HD_DELAY > 0) -#include +#include unsigned long last_req; Index: linux-mips/drivers/clocksource/i8253.c =================================================================== --- linux-mips.orig/drivers/clocksource/i8253.c +++ linux-mips/drivers/clocksource/i8253.c @@ -7,7 +7,7 @@ #include #include -#include +#include /* * Since the PIT overflows every tick, its not very useful Index: linux-mips/drivers/input/gameport/gameport.c =================================================================== --- linux-mips.orig/drivers/input/gameport/gameport.c +++ linux-mips/drivers/input/gameport/gameport.c @@ -47,7 +47,7 @@ static void gameport_disconnect_port(str #if defined(__i386__) -#include +#include #define DELTA(x,y) ((y)-(x)+((y)<(x)?1193182/HZ:0)) #define GET_TIME(x) do { x = get_time_pit(); } while (0) Index: linux-mips/drivers/input/joystick/analog.c =================================================================== --- linux-mips.orig/drivers/input/joystick/analog.c +++ linux-mips/drivers/input/joystick/analog.c @@ -136,7 +136,7 @@ struct analog_port { #ifdef __i386__ -#include +#include #define GET_TIME(x) do { if (cpu_has_tsc) rdtscl(x); else x = get_time_pit(); } while (0) #define DELTA(x,y) (cpu_has_tsc ? ((y) - (x)) : ((x) - (y) + ((x) < (y) ? CLOCK_TICK_RATE / HZ : 0))) Index: linux-mips/drivers/input/misc/pcspkr.c =================================================================== --- linux-mips.orig/drivers/input/misc/pcspkr.c +++ linux-mips/drivers/input/misc/pcspkr.c @@ -27,7 +27,7 @@ MODULE_ALIAS("platform:pcspkr"); #if defined(CONFIG_MIPS) || defined(CONFIG_X86) /* Use the global PIT lock ! */ -#include +#include #else #include static DEFINE_RAW_SPINLOCK(i8253_lock); Index: linux-mips/sound/drivers/pcsp/pcsp.h =================================================================== --- linux-mips.orig/sound/drivers/pcsp/pcsp.h +++ linux-mips/sound/drivers/pcsp/pcsp.h @@ -13,7 +13,7 @@ #include #if defined(CONFIG_MIPS) || defined(CONFIG_X86) /* Use the global PIT lock ! */ -#include +#include #else #include static DEFINE_RAW_SPINLOCK(i8253_lock); From ralf@linux-mips.org Wed Jun 1 21:47:33 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 01 Jun 2011 21:48:46 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:47073 "EHLO duck.linux-mips.net" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491851Ab1FATrd (ORCPT ); Wed, 1 Jun 2011 21:47:33 +0200 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.3) with ESMTP id p51JldEN010172; Wed, 1 Jun 2011 20:47:39 +0100 Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id p51Jlcuv010171; Wed, 1 Jun 2011 20:47:38 +0100 Message-Id: <20110601180611.061710714@duck.linux-mips.net> User-Agent: quilt/0.48-1 Date: Wed, 01 Jun 2011 19:05:10 +0100 From: ralf@linux-mips.org To: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org Cc: linux-mips@linux-mips.org Subject: [patch 14/14] PCSPKR: MIPS: Make config dependencies finer grained. References: <20110601180456.801265664@duck.linux-mips.net> Content-Disposition: inline; filename=i8253-make-mips-pcspkr-config-finer-grained.patch X-archive-position: 30182 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1174 Content-Length: 1464 Lines: 50 Only the Siemens-Nixdorf RM series workstations and the Jazz family workstations have PC speakers built in; Malta can connect one via the infamous AMR connector with an AMR sound card or a little creativity. So we don't want to offer the PC speaker driver on all MIPS systems. Signed-off-by: Ralf Baechle To: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org arch/mips/Kconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) Index: linux-mips/arch/mips/Kconfig =================================================================== --- linux-mips.orig/arch/mips/Kconfig +++ linux-mips/arch/mips/Kconfig @@ -5,7 +5,6 @@ config MIPS select HAVE_IDE select HAVE_OPROFILE select HAVE_IRQ_WORK - select HAVE_PCSPKR_PLATFORM select HAVE_PERF_EVENTS select PERF_USE_VMALLOC select HAVE_ARCH_KGDB @@ -186,6 +185,7 @@ config MACH_JAZZ select CSRC_R4K select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN select GENERIC_ISA_DMA + select HAVE_PCSPKR_PLATFORM select IRQ_CPU select I8253 select I8259 @@ -267,6 +267,7 @@ config MIPS_MALTA select CSRC_R4K select DMA_NONCOHERENT select GENERIC_ISA_DMA + select HAVE_PCSPKR_PLATFORM select IRQ_CPU select IRQ_GIC select HW_HAS_PCI @@ -641,6 +642,7 @@ config SNI_RM select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN select DMA_NONCOHERENT select GENERIC_ISA_DMA + select HAVE_PCSPKR_PLATFORM select HW_HAS_EISA select HW_HAS_PCI select IRQ_CPU From ralf@linux-mips.org Wed Jun 1 21:47:35 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 01 Jun 2011 21:49:12 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:47080 "EHLO duck.linux-mips.net" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491852Ab1FATrf (ORCPT ); Wed, 1 Jun 2011 21:47:35 +0200 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.3) with ESMTP id p51JlVXp010116; Wed, 1 Jun 2011 20:47:31 +0100 Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id p51JlUpY010114; Wed, 1 Jun 2011 20:47:30 +0100 Message-Id: <20110601180610.134151920@duck.linux-mips.net> User-Agent: quilt/0.48-1 Date: Wed, 01 Jun 2011 19:04:58 +0100 From: ralf@linux-mips.org To: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org Cc: Russell King , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@linux-mips.org Subject: [patch 02/14] i8253: Unify all kernel declarations of i8253_lock in . References: <20110601180456.801265664@duck.linux-mips.net> Content-Disposition: inline; filename=i8253-move-common-declarations-to-new-header.patch X-archive-position: 30183 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1177 Content-Length: 3142 Lines: 117 Signed-off-by: Ralf Baechle To: linux-kernel@vger.kernel.org Cc: Russell King Cc: Thomas Gleixner Cc: Ingo Molnar Cc: "H. Peter Anvin" Cc: x86@kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@linux-mips.org arch/arm/include/asm/i8253.h | 9 --------- arch/mips/include/asm/i8253.h | 12 ------------ arch/x86/include/asm/i8253.h | 10 ---------- include/linux/i8253.h | 14 ++++++++++++++ 4 files changed, 14 insertions(+), 31 deletions(-) Index: linux-mips/include/linux/i8253.h =================================================================== --- linux-mips.orig/include/linux/i8253.h +++ linux-mips/include/linux/i8253.h @@ -2,10 +2,24 @@ * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. + * + * Machine specific IO port address definition for generic. + * Written by Osamu Tomita */ #ifndef __LINUX_I8253_H #define __LINUX_I8253_H +#include #include +/* i8253A PIT registers */ +#define PIT_MODE 0x43 +#define PIT_CH0 0x40 +#define PIT_CH2 0x42 + +#define inb_pit inb_p +#define outb_pit outb_p + +extern raw_spinlock_t i8253_lock; + #endif /* __LINUX_I8253_H */ Index: linux-mips/arch/arm/include/asm/i8253.h =================================================================== --- linux-mips.orig/arch/arm/include/asm/i8253.h +++ linux-mips/arch/arm/include/asm/i8253.h @@ -1,15 +1,6 @@ #ifndef __ASMARM_I8253_H #define __ASMARM_I8253_H -/* i8253A PIT registers */ -#define PIT_MODE 0x43 -#define PIT_CH0 0x40 - #define PIT_LATCH ((PIT_TICK_RATE + HZ / 2) / HZ) -extern raw_spinlock_t i8253_lock; - -#define outb_pit outb_p -#define inb_pit inb_p - #endif Index: linux-mips/arch/mips/include/asm/i8253.h =================================================================== --- linux-mips.orig/arch/mips/include/asm/i8253.h +++ linux-mips/arch/mips/include/asm/i8253.h @@ -5,20 +5,8 @@ #ifndef __ASM_I8253_H #define __ASM_I8253_H -#include - -/* i8253A PIT registers */ -#define PIT_MODE 0x43 -#define PIT_CH0 0x40 -#define PIT_CH2 0x42 - #define PIT_LATCH LATCH -extern raw_spinlock_t i8253_lock; - extern void setup_pit_timer(void); -#define inb_pit inb_p -#define outb_pit outb_p - #endif /* __ASM_I8253_H */ Index: linux-mips/arch/x86/include/asm/i8253.h =================================================================== --- linux-mips.orig/arch/x86/include/asm/i8253.h +++ linux-mips/arch/x86/include/asm/i8253.h @@ -1,20 +1,10 @@ #ifndef _ASM_X86_I8253_H #define _ASM_X86_I8253_H -/* i8253A PIT registers */ -#define PIT_MODE 0x43 -#define PIT_CH0 0x40 -#define PIT_CH2 0x42 - #define PIT_LATCH LATCH -extern raw_spinlock_t i8253_lock; - extern struct clock_event_device *global_clock_event; extern void setup_pit_timer(void); -#define inb_pit inb_p -#define outb_pit outb_p - #endif /* _ASM_X86_I8253_H */ From ralf@linux-mips.org Wed Jun 1 21:47:35 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 01 Jun 2011 21:49:37 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:47083 "EHLO duck.linux-mips.net" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491853Ab1FATrf (ORCPT ); Wed, 1 Jun 2011 21:47:35 +0200 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.3) with ESMTP id p51JlcXQ010163; Wed, 1 Jun 2011 20:47:38 +0100 Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id p51JlbQp010162; Wed, 1 Jun 2011 20:47:37 +0100 Message-Id: <20110601180610.913463093@duck.linux-mips.net> User-Agent: quilt/0.48-1 Date: Wed, 01 Jun 2011 19:05:08 +0100 From: ralf@linux-mips.org To: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Russell King , linux-mips@linux-mips.org, Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org Subject: [patch 12/14] i8253: Move remaining content and delete References: <20110601180456.801265664@duck.linux-mips.net> Content-Disposition: inline; filename=i8253-sort-remaining-definitions.patch X-archive-position: 30184 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1182 Content-Length: 3094 Lines: 99 There is no really good other place but one line for two out of three architectures that have a file doesn't justify this files existence. Signed-off-by: Ralf Baechle To: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: Russell King Cc: linux-mips@linux-mips.org Cc: Thomas Gleixner Cc: Ingo Molnar Cc: "H. Peter Anvin" Cc: x86@kernel.org arch/arm/include/asm/i8253.h | 4 ---- arch/mips/include/asm/i8253.h | 10 ---------- arch/mips/include/asm/time.h | 5 +++++ arch/x86/include/asm/i8253.h | 6 ------ arch/x86/include/asm/time.h | 1 + include/linux/i8253.h | 1 - 6 files changed, 6 insertions(+), 21 deletions(-) Index: linux-i8253/arch/x86/include/asm/i8253.h =================================================================== --- linux-i8253.orig/arch/x86/include/asm/i8253.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_X86_I8253_H -#define _ASM_X86_I8253_H - -extern void setup_pit_timer(void); - -#endif /* _ASM_X86_I8253_H */ Index: linux-i8253/include/linux/i8253.h =================================================================== --- linux-i8253.orig/include/linux/i8253.h +++ linux-i8253/include/linux/i8253.h @@ -12,7 +12,6 @@ #include #include #include -#include /* i8253A PIT registers */ #define PIT_MODE 0x43 Index: linux-i8253/arch/x86/include/asm/time.h =================================================================== --- linux-i8253.orig/arch/x86/include/asm/time.h +++ linux-i8253/arch/x86/include/asm/time.h @@ -6,6 +6,7 @@ extern void hpet_time_init(void); extern void time_init(void); +extern void setup_pit_timer(void); extern struct clock_event_device *global_clock_event; Index: linux-i8253/arch/mips/include/asm/i8253.h =================================================================== --- linux-i8253.orig/arch/mips/include/asm/i8253.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Machine specific IO port address definition for generic. - * Written by Osamu Tomita - */ -#ifndef __ASM_I8253_H -#define __ASM_I8253_H - -extern void setup_pit_timer(void); - -#endif /* __ASM_I8253_H */ Index: linux-i8253/arch/arm/include/asm/i8253.h =================================================================== --- linux-i8253.orig/arch/arm/include/asm/i8253.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef __ASMARM_I8253_H -#define __ASMARM_I8253_H - -#endif Index: linux-i8253/arch/mips/include/asm/time.h =================================================================== --- linux-i8253.orig/arch/mips/include/asm/time.h +++ linux-i8253/arch/mips/include/asm/time.h @@ -36,6 +36,11 @@ extern int rtc_mips_set_mmss(unsigned lo extern void plat_time_init(void); /* + * Initialize i8253 / i8254 PIT clockevent device. + */ +extern void setup_pit_timer(void); + +/* * mips_hpt_frequency - must be set if you intend to use an R4k-compatible * counter as a timer interrupt source. */ From ralf@linux-mips.org Wed Jun 1 21:47:37 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 01 Jun 2011 21:50:00 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:47094 "EHLO duck.linux-mips.net" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491854Ab1FATrh (ORCPT ); Wed, 1 Jun 2011 21:47:37 +0200 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.3) with ESMTP id p51Jlbl8010158; Wed, 1 Jun 2011 20:47:37 +0100 Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id p51JlbEB010157; Wed, 1 Jun 2011 20:47:37 +0100 Message-Id: <20110601180610.832810002@duck.linux-mips.net> User-Agent: quilt/0.48-1 Date: Wed, 01 Jun 2011 19:05:07 +0100 From: ralf@linux-mips.org To: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org Cc: Russell King , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@linux-mips.org Subject: [patch 11/14] i8253: Consolidate definitions of PIT_LATCH References: <20110601180456.801265664@duck.linux-mips.net> Content-Disposition: inline; filename=i8253-sort-out-pit_latch-definitions.patch X-archive-position: 30185 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1187 Content-Length: 2715 Lines: 90 x86 defines PIT_LATCH as LATCH which in is defined as ((CLOCK_TICK_RATE + HZ/2) / HZ) and again defines CLOCK_TICK_RATE as PIT_TICK_RATE. MIPS defines PIT_LATCH as LATCH which in is defined as ((CLOCK_TICK_RATE + HZ/2) / HZ) and again defines CLOCK_TICK_RATE as 1193182. ARM defines PITCH_LATCH as ((PIT_TICK_RATE + HZ / 2) / HZ) - and that's the sanest thing and equivalent to above definitions so use that as the new definition in . Signed-off-by: Ralf Baechle To: linux-kernel@vger.kernel.org Cc: Russell King Cc: Thomas Gleixner Cc: Ingo Molnar Cc: "H. Peter Anvin" Cc: x86@kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@linux-mips.org arch/arm/include/asm/i8253.h | 2 -- arch/mips/include/asm/i8253.h | 2 -- arch/x86/include/asm/i8253.h | 2 -- include/linux/i8253.h | 4 ++++ 4 files changed, 4 insertions(+), 6 deletions(-) Index: linux-mips/arch/arm/include/asm/i8253.h =================================================================== --- linux-mips.orig/arch/arm/include/asm/i8253.h +++ linux-mips/arch/arm/include/asm/i8253.h @@ -1,6 +1,4 @@ #ifndef __ASMARM_I8253_H #define __ASMARM_I8253_H -#define PIT_LATCH ((PIT_TICK_RATE + HZ / 2) / HZ) - #endif Index: linux-mips/arch/mips/include/asm/i8253.h =================================================================== --- linux-mips.orig/arch/mips/include/asm/i8253.h +++ linux-mips/arch/mips/include/asm/i8253.h @@ -5,8 +5,6 @@ #ifndef __ASM_I8253_H #define __ASM_I8253_H -#define PIT_LATCH LATCH - extern void setup_pit_timer(void); #endif /* __ASM_I8253_H */ Index: linux-mips/arch/x86/include/asm/i8253.h =================================================================== --- linux-mips.orig/arch/x86/include/asm/i8253.h +++ linux-mips/arch/x86/include/asm/i8253.h @@ -1,8 +1,6 @@ #ifndef _ASM_X86_I8253_H #define _ASM_X86_I8253_H -#define PIT_LATCH LATCH - extern void setup_pit_timer(void); #endif /* _ASM_X86_I8253_H */ Index: linux-mips/include/linux/i8253.h =================================================================== --- linux-mips.orig/include/linux/i8253.h +++ linux-mips/include/linux/i8253.h @@ -9,7 +9,9 @@ #ifndef __LINUX_I8253_H #define __LINUX_I8253_H +#include #include +#include #include /* i8253A PIT registers */ @@ -17,6 +19,8 @@ #define PIT_CH0 0x40 #define PIT_CH2 0x42 +#define PIT_LATCH ((PIT_TICK_RATE + HZ/2) / HZ) + #define inb_pit inb_p #define outb_pit outb_p From ralf@linux-mips.org Wed Jun 1 21:47:47 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 01 Jun 2011 21:50:24 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:47119 "EHLO duck.linux-mips.net" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491858Ab1FATrr (ORCPT ); Wed, 1 Jun 2011 21:47:47 +0200 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.3) with ESMTP id p51JlcTY010167; Wed, 1 Jun 2011 20:47:38 +0100 Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id p51JlcPq010166; Wed, 1 Jun 2011 20:47:38 +0100 Message-Id: <20110601180610.984881988@duck.linux-mips.net> User-Agent: quilt/0.48-1 Date: Wed, 01 Jun 2011 19:05:09 +0100 From: ralf@linux-mips.org To: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org Cc: Richard Henderson , Ivan Kokshaysky , Matt Turner , Benjamin Herrenschmidt , Paul Mackerras , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, linux-alpha@vger.kernel.org, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org Subject: [patch 13/14] PCSPKR: Cleanup Kconfig dependencies References: <20110601180456.801265664@duck.linux-mips.net> Content-Disposition: inline; filename=i8253-use-aux-symbol-for-pcspkr-config.patch X-archive-position: 30186 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1191 Content-Length: 4160 Lines: 122 Lenghty lists of the kind "depends on ARCH1 || ARCH2 ... || ARCH123" are usually either wrong or too coarse grained. Or plain an ugly sin. Signed-off-by: Ralf Baechle To: linux-kernel@vger.kernel.org Cc: Richard Henderson Cc: Ivan Kokshaysky Cc: Matt Turner Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Thomas Gleixner Cc: Ingo Molnar Cc: "H. Peter Anvin" Cc: x86@kernel.org Cc: linux-alpha@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linuxppc-dev@lists.ozlabs.org arch/alpha/Kconfig | 1 + arch/mips/Kconfig | 1 + arch/powerpc/platforms/chrp/Kconfig | 1 + arch/powerpc/platforms/prep/Kconfig | 1 + arch/powerpc/platforms/pseries/Kconfig | 1 + arch/x86/Kconfig | 1 + init/Kconfig | 5 ++++- 7 files changed, 10 insertions(+), 1 deletion(-) Index: linux-mips/arch/alpha/Kconfig =================================================================== --- linux-mips.orig/arch/alpha/Kconfig +++ linux-mips/arch/alpha/Kconfig @@ -6,6 +6,7 @@ config ALPHA select HAVE_OPROFILE select HAVE_SYSCALL_WRAPPERS select HAVE_IRQ_WORK + select HAVE_PCSPKR_PLATFORM select HAVE_PERF_EVENTS select HAVE_DMA_ATTRS select HAVE_GENERIC_HARDIRQS Index: linux-mips/arch/mips/Kconfig =================================================================== --- linux-mips.orig/arch/mips/Kconfig +++ linux-mips/arch/mips/Kconfig @@ -5,6 +5,7 @@ config MIPS select HAVE_IDE select HAVE_OPROFILE select HAVE_IRQ_WORK + select HAVE_PCSPKR_PLATFORM select HAVE_PERF_EVENTS select PERF_USE_VMALLOC select HAVE_ARCH_KGDB Index: linux-mips/arch/powerpc/platforms/chrp/Kconfig =================================================================== --- linux-mips.orig/arch/powerpc/platforms/chrp/Kconfig +++ linux-mips/arch/powerpc/platforms/chrp/Kconfig @@ -1,6 +1,7 @@ config PPC_CHRP bool "Common Hardware Reference Platform (CHRP) based machines" depends on 6xx + select HAVE_PCSPKR_PLATFORM select MPIC select PPC_I8259 select PPC_INDIRECT_PCI Index: linux-mips/arch/powerpc/platforms/prep/Kconfig =================================================================== --- linux-mips.orig/arch/powerpc/platforms/prep/Kconfig +++ linux-mips/arch/powerpc/platforms/prep/Kconfig @@ -1,6 +1,7 @@ config PPC_PREP bool "PowerPC Reference Platform (PReP) based machines" depends on 6xx && BROKEN + select HAVE_PCSPKR_PLATFORM select MPIC select PPC_I8259 select PPC_INDIRECT_PCI Index: linux-mips/arch/powerpc/platforms/pseries/Kconfig =================================================================== --- linux-mips.orig/arch/powerpc/platforms/pseries/Kconfig +++ linux-mips/arch/powerpc/platforms/pseries/Kconfig @@ -1,6 +1,7 @@ config PPC_PSERIES depends on PPC64 && PPC_BOOK3S bool "IBM pSeries & new (POWER5-based) iSeries" + select HAVE_PCSPKR_PLATFORM select MPIC select PCI_MSI select PPC_XICS Index: linux-mips/arch/x86/Kconfig =================================================================== --- linux-mips.orig/arch/x86/Kconfig +++ linux-mips/arch/x86/Kconfig @@ -20,6 +20,7 @@ config X86 select HAVE_UNSTABLE_SCHED_CLOCK select HAVE_IDE select HAVE_OPROFILE + select HAVE_PCSPKR_PLATFORM select HAVE_PERF_EVENTS select HAVE_IRQ_WORK select HAVE_IOREMAP_PROT Index: linux-mips/init/Kconfig =================================================================== --- linux-mips.orig/init/Kconfig +++ linux-mips/init/Kconfig @@ -1001,12 +1001,15 @@ config ELF_CORE config PCSPKR_PLATFORM bool "Enable PC-Speaker support" if EXPERT - depends on ALPHA || X86 || MIPS || PPC_PREP || PPC_CHRP || PPC_PSERIES + depends on HAVE_PCSPKR_PLATFORM default y help This option allows to disable the internal PC-Speaker support, saving some memory. +config HAVE_PCSPKR_PLATFORM + bool + config BASE_FULL default y bool "Enable full-sized data structures for core" if EXPERT From ralf@linux-mips.org Thu Jun 2 00:36:33 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 02 Jun 2011 00:36:35 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:40209 "EHLO duck.linux-mips.net" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491784Ab1FAWgd (ORCPT ); Thu, 2 Jun 2011 00:36:33 +0200 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.3) with ESMTP id p51MaeeE006637; Wed, 1 Jun 2011 23:36:40 +0100 Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id p51Maekl006635; Wed, 1 Jun 2011 23:36:40 +0100 Date: Wed, 1 Jun 2011 23:36:40 +0100 From: Ralf Baechle To: Jayachandran C Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] Add netlogic to mips build platforms. Message-ID: <20110601223640.GA5826@linux-mips.org> References: <20110531084853.GA10062@jayachandranc.netlogicmicro.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20110531084853.GA10062@jayachandranc.netlogicmicro.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 30187 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1351 Content-Length: 25 Lines: 3 Thanks, applied! Ralf From gxt@mprc.pku.edu.cn Thu Jun 2 03:51:49 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 02 Jun 2011 03:51:56 +0200 (CEST) Received: from mprc.pku.edu.cn ([162.105.203.9]:45663 "EHLO mprc.pku.edu.cn" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491784Ab1FBBvt (ORCPT ); Thu, 2 Jun 2011 03:51:49 +0200 Received: from [192.168.0.106] ([162.105.80.111]) (authenticated bits=0) by mprc.pku.edu.cn (8.13.8/8.13.8) with ESMTP id p52282b3006876; Thu, 2 Jun 2011 10:08:02 +0800 Subject: Re: [PATCH] Fix build warning of the defconfigs From: Guan Xuetao Reply-To: gxt@mprc.pku.edu.cn To: Wanlong Gao Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, uclinux-dist-devel@blackfin.uclinux.org, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-sh@vger.kernel.org, linux@arm.linux.org.uk, hans-christian.egtvedt@atmel.com, vapier@gentoo.org, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, lethal@linux-sh.org, david.woodhouse@intel.com, akpm@linux-foundation.org, u.kleine-koenig@pengutronix.de, mingo@elte.hu, rientjes@google.com, w.sang@pengutronix.de, sam@ravnborg.org, manuel.lauss@googlemail.com, anton@samba.org, arnd@arndb.de In-Reply-To: <1306945763-6583-1-git-send-email-wanlong.gao@gmail.com> References: <1306945763-6583-1-git-send-email-wanlong.gao@gmail.com> Content-Type: text/plain; charset="UTF-8" Organization: MPRC, PKU Date: Thu, 02 Jun 2011 17:49:17 +0800 Message-ID: <1307008157.1652.4.camel@epip-laptop> Mime-Version: 1.0 X-Mailer: Evolution 2.32.2 Content-Transfer-Encoding: 7bit X-archive-position: 30188 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: gxt@mprc.pku.edu.cn Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1429 Content-Length: 1526 Lines: 42 On Thu, 2011-06-02 at 00:29 +0800, Wanlong Gao wrote: > RTC_CLASS is changed to bool. > So value 'm' is invalid. > > Signed-off-by: Wanlong Gao > --- > arch/arm/configs/davinci_all_defconfig | 2 +- > arch/arm/configs/mxs_defconfig | 2 +- > arch/arm/configs/netx_defconfig | 2 +- > arch/arm/configs/viper_defconfig | 2 +- > arch/arm/configs/xcep_defconfig | 2 +- > arch/arm/configs/zeus_defconfig | 2 +- > arch/avr32/configs/atngw100_mrmt_defconfig | 2 +- > arch/blackfin/configs/CM-BF548_defconfig | 2 +- > arch/mips/configs/mtx1_defconfig | 2 +- > arch/powerpc/configs/52xx/pcm030_defconfig | 2 +- > arch/powerpc/configs/ps3_defconfig | 2 +- > arch/sh/configs/titan_defconfig | 2 +- > arch/unicore32/configs/debug_defconfig | 2 +- > 13 files changed, 13 insertions(+), 13 deletions(-) > > diff --git a/arch/unicore32/configs/debug_defconfig b/arch/unicore32/configs/debug_defconfig > index b5fbde9..1c367f0 100644 > --- a/arch/unicore32/configs/debug_defconfig > +++ b/arch/unicore32/configs/debug_defconfig > @@ -168,7 +168,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y > > # Real Time Clock > CONFIG_RTC_LIB=m > -CONFIG_RTC_CLASS=m > +CONFIG_RTC_CLASS=y > > ### File systems > CONFIG_EXT2_FS=m I adjust this config option recently, and enable it with y. So please just drop the modification in unicore32 config file. Thanks & Regards. Guan Xuetao From lethal@linux-sh.org Thu Jun 2 07:26:05 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 02 Jun 2011 07:26:08 +0200 (CEST) Received: from linux-sh.org ([111.68.239.195]:59274 "EHLO linux-sh.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491012Ab1FBF0F (ORCPT ); Thu, 2 Jun 2011 07:26:05 +0200 Received: from linux-sh.org (localhost.localdomain [127.0.0.1]) by linux-sh.org (8.14.4/8.14.4) with ESMTP id p525P1EJ027996; Thu, 2 Jun 2011 14:25:01 +0900 Received: (from pmundt@localhost) by linux-sh.org (8.14.4/8.14.4/Submit) id p525OqgF025867; Thu, 2 Jun 2011 14:24:52 +0900 X-Authentication-Warning: linux-sh.org: pmundt set sender to lethal@linux-sh.org using -f Date: Thu, 2 Jun 2011 14:24:52 +0900 From: Paul Mundt To: Wanlong Gao Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, uclinux-dist-devel@blackfin.uclinux.org, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-sh@vger.kernel.org, linux@arm.linux.org.uk, hans-christian.egtvedt@atmel.com, vapier@gentoo.org, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, gxt@mprc.pku.edu.cn, david.woodhouse@intel.com, akpm@linux-foundation.org, u.kleine-koenig@pengutronix.de, mingo@elte.hu, rientjes@google.com, w.sang@pengutronix.de, sam@ravnborg.org, manuel.lauss@googlemail.com, anton@samba.org, arnd@arndb.de Subject: Re: [PATCH] Fix build warning of the defconfigs Message-ID: <20110602052452.GA6087@linux-sh.org> References: <1306945763-6583-1-git-send-email-wanlong.gao@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1306945763-6583-1-git-send-email-wanlong.gao@gmail.com> User-Agent: Mutt/1.4.1i X-archive-position: 30189 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: lethal@linux-sh.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1511 Content-Length: 277 Lines: 9 On Thu, Jun 02, 2011 at 12:29:23AM +0800, Wanlong Gao wrote: > RTC_CLASS is changed to bool. > So value 'm' is invalid. > > Signed-off-by: Wanlong Gao > arch/sh/configs/titan_defconfig | 2 +- Acked-by: Paul Mundt From sshtylyov@mvista.com Thu Jun 2 13:30:33 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 02 Jun 2011 13:30:37 +0200 (CEST) Received: from mail-ww0-f43.google.com ([74.125.82.43]:44576 "EHLO mail-ww0-f43.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491187Ab1FBLad (ORCPT ); Thu, 2 Jun 2011 13:30:33 +0200 Received: by wwb17 with SMTP id 17so657611wwb.24 for ; Thu, 02 Jun 2011 04:30:27 -0700 (PDT) Received: by 10.216.143.74 with SMTP id k52mr617037wej.0.1307014227664; Thu, 02 Jun 2011 04:30:27 -0700 (PDT) Received: from [192.168.2.2] ([91.79.103.177]) by mx.google.com with ESMTPS id t79sm267935weq.29.2011.06.02.04.30.23 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 02 Jun 2011 04:30:25 -0700 (PDT) Message-ID: <4DE7741B.7040507@mvista.com> Date: Thu, 02 Jun 2011 15:29:31 +0400 From: Sergei Shtylyov User-Agent: Mozilla/5.0 (Windows; U; Windows NT 5.1; en-GB; rv:1.9.2.17) Gecko/20110414 Thunderbird/3.1.10 MIME-Version: 1.0 To: ralf@linux-mips.org CC: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-mips@linux-mips.org, Russell King , x86@kernel.org, Ingo Molnar , "H. Peter Anvin" , Thomas Gleixner , linux-arm-kernel@lists.infradead.org Subject: Re: [patch 12/14] i8253: Move remaining content and delete References: <20110601180456.801265664@duck.linux-mips.net> <20110601180610.913463093@duck.linux-mips.net> In-Reply-To: <20110601180610.913463093@duck.linux-mips.net> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-archive-position: 30190 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sshtylyov@mvista.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1675 Content-Length: 608 Lines: 21 Hello. On 01-06-2011 22:05, ralf@linux-mips.org wrote: > There is no really good other place but one line for two out of three > architectures that have a file doesn't justify this files > existence. I couldn't parse that. :-) > Signed-off-by: Ralf Baechle > To: linux-kernel@vger.kernel.org > Cc: linux-arm-kernel@lists.infradead.org > Cc: Russell King > Cc: linux-mips@linux-mips.org > Cc: Thomas Gleixner > Cc: Ingo Molnar > Cc: "H. Peter Anvin" > Cc: x86@kernel.org WBR, Sergei From florian@openwrt.org Thu Jun 2 14:54:25 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 02 Jun 2011 14:54:28 +0200 (CEST) Received: from mail-ww0-f43.google.com ([74.125.82.43]:57025 "EHLO mail-ww0-f43.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491184Ab1FBMyZ (ORCPT ); Thu, 2 Jun 2011 14:54:25 +0200 Received: by wwb17 with SMTP id 17so727282wwb.24 for ; Thu, 02 Jun 2011 05:54:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:sender:from:to:subject:date:user-agent :organization:mime-version:content-type:content-transfer-encoding :message-id; bh=aWDeU6QVXXBoo3NpNDwImSlZesuFNDZf07bkip1VCRw=; b=PV5Sfp1t21vKYwaBc6aS8WciXxfOX8SAJmXOrA9hobv/zd65VTRdoskdTlR2Hoon/u WoduPkEo8E8RSrgIqHaYThtCbJ1pMQBEFISNsFc7IpIdR75Hozq/0lIYvX0kU99yZB3q nfE1u2qJ1/7sqVUyGoq24cu374dngSZaurrq0= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:to:subject:date:user-agent:organization:mime-version :content-type:content-transfer-encoding:message-id; b=HyK42AboX67rJftSLlU7vWJr9atAPg2EnzuJGVB0WzJu6CKZoHGPcSdlEzIK6MGFtf NTfV++EQSigHBPJ71Y0OLpGHAN7xPpM13Mzlt8XKOy5E0Xus87UQ4TVsO0YUr15C2mZr G99FCQjzDoKTy/chKPV8P3ZCTRNPSItrSY4dM= Received: by 10.216.235.158 with SMTP id u30mr657427weq.104.1307019260041; Thu, 02 Jun 2011 05:54:20 -0700 (PDT) Received: from bender.localnet (fbx.mimichou.net [82.236.225.16]) by mx.google.com with ESMTPS id f73sm307336wef.43.2011.06.02.05.54.18 (version=SSLv3 cipher=OTHER); Thu, 02 Jun 2011 05:54:19 -0700 (PDT) From: Florian Fainelli To: Wim Van Sebroeck , linux-mips@linux-mips.org, linux-watchdog@vger.kernel.org, Manuel Lauss Subject: [PATCH 1/3] WATCHDOG: mtx1-wdt: use dev_{err,info} instead of printk() Date: Thu, 2 Jun 2011 14:54:17 +0200 User-Agent: KMail/1.13.6 (Linux/2.6.38-9-generic; KDE/4.6.2; x86_64; ; ) Organization: OpenWrt MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Message-Id: <201106021454.17652.florian@openwrt.org> X-archive-position: 30191 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1729 Content-Length: 650 Lines: 24 Signed-off-by: Florian Fainelli --- diff --git a/drivers/watchdog/mtx-1_wdt.c b/drivers/watchdog/mtx-1_wdt.c index 1479dc4..63df28c 100644 --- a/drivers/watchdog/mtx-1_wdt.c +++ b/drivers/watchdog/mtx-1_wdt.c @@ -224,11 +224,11 @@ static int __devinit mtx1_wdt_probe(struct platform_device *pdev) ret = misc_register(&mtx1_wdt_misc); if (ret < 0) { - printk(KERN_ERR " mtx-1_wdt : failed to register\n"); + dev_err(&pdev->dev, "failed to register\n"); return ret; } mtx1_wdt_start(); - printk(KERN_INFO "MTX-1 Watchdog driver\n"); + dev_info(&pdev->dev, "MTX-1 Watchdog driver\n"); return 0; } -- 1.7.4.1 From florian@openwrt.org Thu Jun 2 14:54:26 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 02 Jun 2011 14:54:54 +0200 (CEST) Received: from mail-ww0-f43.google.com ([74.125.82.43]:46681 "EHLO mail-ww0-f43.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491187Ab1FBMy0 (ORCPT ); Thu, 2 Jun 2011 14:54:26 +0200 Received: by wwb17 with SMTP id 17so727296wwb.24 for ; Thu, 02 Jun 2011 05:54:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:sender:from:to:subject:date:user-agent :organization:cc:mime-version:content-type:content-transfer-encoding :message-id; bh=gAApRguzQVtjd2qJOo9OPNZMZm6AXgRxbhAC6T13dOQ=; b=iC3VU/dEvEnQE6jnxra9pWgQn+WCBHx+wjvE/+/RVAbOhTx+eX7sTqplmj5qP3G5IO ngcAyh0brisqGxdu4/bK5vE53o+/dZiKFCVl+WtqUDjh7v3ha10XSgiGwI6sNKlweOMC kvvdeJvufPWJbLbscTHmf9wXCkQB6VI/aFH5M= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:to:subject:date:user-agent:organization:cc:mime-version :content-type:content-transfer-encoding:message-id; b=SG884ZPSDgTfG+yxgAjJDa47DXzxIdprwmmLkvco5J9BOlYd8QobEDKBiuHeqg52SB +qssx9GoL/ICy7T0spm3S4YCG7aBAH8Z8blV4g+8ynwlSszmdcESm5gf/aZTTlUVIimt 3CNNZE34lJjxYl4wO4/moLZd47fpy5DydDhGA= Received: by 10.216.241.78 with SMTP id f56mr664838wer.76.1307019261398; Thu, 02 Jun 2011 05:54:21 -0700 (PDT) Received: from bender.localnet (fbx.mimichou.net [82.236.225.16]) by mx.google.com with ESMTPS id f73sm307336wef.43.2011.06.02.05.54.20 (version=SSLv3 cipher=OTHER); Thu, 02 Jun 2011 05:54:20 -0700 (PDT) From: Florian Fainelli To: Wim Van Sebroeck , linux-mips@linux-mips.org, linux-watchdog@vger.kernel.org, Manuel Lauss Subject: [PATCH 2/3] WATCHDOG: mtx1-wdt: request gpio before using it Date: Thu, 2 Jun 2011 14:54:20 +0200 User-Agent: KMail/1.13.6 (Linux/2.6.38-9-generic; KDE/4.6.2; x86_64; ; ) Organization: OpenWrt Cc: stable@kernel.org MIME-Version: 1.0 Content-Type: Text/Plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Message-Id: <201106021454.20111.florian@openwrt.org> X-archive-position: 30192 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1731 Content-Length: 793 Lines: 28 Otherwise, the gpiolib autorequest feature will produce a WARN_ON(): WARNING: at drivers/gpio/gpiolib.c:101 0x8020ec6c() autorequest GPIO-215 [...] CC: stable@kernel.org Signed-off-by: Florian Fainelli --- diff --git a/drivers/watchdog/mtx-1_wdt.c b/drivers/watchdog/mtx-1_wdt.c index 63df28c..16086f8 100644 --- a/drivers/watchdog/mtx-1_wdt.c +++ b/drivers/watchdog/mtx-1_wdt.c @@ -214,6 +214,11 @@ static int __devinit mtx1_wdt_probe(struct platform_device *pdev) int ret; mtx1_wdt_device.gpio = pdev->resource[0].start; + ret = gpio_request(mtx1_wdt_device.gpio, "mtx1-wdt"); + if (ret < 0) { + dev_err(&pdev->dev, "failed to request gpio"); + return ret; + } spin_lock_init(&mtx1_wdt_device.lock); init_completion(&mtx1_wdt_device.stop); -- 1.7.4.1 From florian@openwrt.org Thu Jun 2 14:54:30 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 02 Jun 2011 14:55:17 +0200 (CEST) Received: from mail-wy0-f177.google.com ([74.125.82.177]:52142 "EHLO mail-wy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491848Ab1FBMya (ORCPT ); Thu, 2 Jun 2011 14:54:30 +0200 Received: by wyb28 with SMTP id 28so809168wyb.36 for ; Thu, 02 Jun 2011 05:54:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:sender:from:to:subject:date:user-agent :organization:cc:mime-version:content-type:content-transfer-encoding :message-id; bh=V2xZ54afUaD04skMrZs4hhZ/EGJQvdQmI4cmbCUvl2w=; b=rd5TPD/WiKdSHVIbfiiaDD47xFP2/YomBN1iCqCtYq5MLkHB6ob8qgVt2tneCMSm1B Re9KzZONWPg9yxAviJrPNkb2R9ZRQuVBOjBV7j9947H25VOJHb5Y8jW7Zvd1oqnzpfgV XAdcTwkFh0wAWGmCuj9ob4jajRgOZE//Y/Jhs= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:to:subject:date:user-agent:organization:cc:mime-version :content-type:content-transfer-encoding:message-id; b=M6H523SDuxa9Wss8rHXL265cPs1daX0GfAb1UOQbZ9NymIJgf3Tx18fF32Q2qweYTr JPVA6NsLPiq80Ie/yA60ZBRUBDEU52zI+EsljUap5Wcvu5nUwUHAiBQGIIATcnMCcDS6 AYV3ArxJ9Z5nJWYpxwflwOWUG1Zjx3VTTqr2I= Received: by 10.216.236.28 with SMTP id v28mr2334034weq.12.1307019264212; Thu, 02 Jun 2011 05:54:24 -0700 (PDT) Received: from bender.localnet (fbx.mimichou.net [82.236.225.16]) by mx.google.com with ESMTPS id d7sm307005wek.45.2011.06.02.05.54.22 (version=SSLv3 cipher=OTHER); Thu, 02 Jun 2011 05:54:23 -0700 (PDT) From: Florian Fainelli To: Wim Van Sebroeck , linux-mips@linux-mips.org, linux-watchdog@vger.kernel.org, Manuel Lauss Subject: [PATCH 3/3] WATCHDOG: mtx1-wdt: fix GPIO toggling Date: Thu, 2 Jun 2011 14:54:21 +0200 User-Agent: KMail/1.13.6 (Linux/2.6.38-9-generic; KDE/4.6.2; x86_64; ; ) Organization: OpenWrt Cc: stable@kernel.org MIME-Version: 1.0 Content-Type: Text/Plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Message-Id: <201106021454.21827.florian@openwrt.org> X-archive-position: 30193 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1732 Content-Length: 1709 Lines: 45 Commit e391be76 (MIPS: Alchemy: Clean up GPIO registers and accessors) changed the way the GPIO was toggled. Prior to this patch, we would always actively drive the GPIO output to either 0 or 1, this patch drove the GPIO active to 0, and put the GPIO in tristate to drive it to 1, unfortunately this does not work, revert back to active driving. Using a signed variable (gstate) to hold the gpio state and using a bit- wise operation on it also resulted in toggling value from 1 to -2 since the variable is signed. This value was then passed on to gpio_direction_ output, which always perform a if (value) ... to set the value to the gpio, so we were always writing a 1 to this GPIO instead of 1 -> 0 -> 1 ... CC: stable@kernel.org Signed-off-by: Florian Fainelli --- diff --git a/drivers/watchdog/mtx-1_wdt.c b/drivers/watchdog/mtx-1_wdt.c index 16086f8..9756da9 100644 --- a/drivers/watchdog/mtx-1_wdt.c +++ b/drivers/watchdog/mtx-1_wdt.c @@ -66,7 +66,7 @@ static struct { int default_ticks; unsigned long inuse; unsigned gpio; - int gstate; + unsigned int gstate; } mtx1_wdt_device; static void mtx1_wdt_trigger(unsigned long unused) @@ -78,11 +78,8 @@ static void mtx1_wdt_trigger(unsigned long unused) ticks--; /* toggle wdt gpio */ - mtx1_wdt_device.gstate = ~mtx1_wdt_device.gstate; - if (mtx1_wdt_device.gstate) - gpio_direction_output(mtx1_wdt_device.gpio, 1); - else - gpio_direction_input(mtx1_wdt_device.gpio); + mtx1_wdt_device.gstate = !mtx1_wdt_device.gstate; + gpio_direction_output(mtx1_wdt_device.gpio, mtx1_wdt_device.gstate); if (mtx1_wdt_device.queue && ticks) mod_timer(&mtx1_wdt_device.timer, jiffies + MTX1_WDT_INTERVAL); -- 1.7.4.1 From manuel.lauss@googlemail.com Thu Jun 2 15:04:48 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 02 Jun 2011 15:04:57 +0200 (CEST) Received: from mail-yw0-f49.google.com ([209.85.213.49]:59942 "EHLO mail-yw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491846Ab1FBNEs (ORCPT ); Thu, 2 Jun 2011 15:04:48 +0200 Received: by ywf9 with SMTP id 9so404219ywf.36 for ; Thu, 02 Jun 2011 06:04:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=LnKJjkzKTGiNilNhKtwT4UXNsPOZ+8rD3NSmRM+Y+vo=; b=m47RZoEcLm4vITPbIooHc+1b4R233g4kH3XTkZY+iwOHjCCaFoH0qNN09wT6yJuLiA 6WDbbHFzcc2OgowN+nMc+IoSBNLX/KyKN+C6zQYtoa/1Vhy6G6YhAe95JH66tg7ALO7K BN33Mk356IovFkKVL0Qnl0y8rKwcnS9XuDnDo= DomainKey-Signature: a=rsa-sha1; c=nofws; d=googlemail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; b=REtECPT/NDzZa9xyk35eEPVa+B2WFYsPYqfVTWVZooVW9LqBrniEnqibS6IzU5aI3T EsbPL5Er/8BNzOc/hxHXdWlgIhwh0El/IQb2thzgecCgMDJLxYsOtx+WYTz5WZEorW2B +fqb3uT3sUaV1fNN4CAwkQDglJfq5jG3maEC0= MIME-Version: 1.0 Received: by 10.236.185.74 with SMTP id t50mr904167yhm.243.1307019882580; Thu, 02 Jun 2011 06:04:42 -0700 (PDT) Received: by 10.236.102.163 with HTTP; Thu, 2 Jun 2011 06:04:42 -0700 (PDT) In-Reply-To: <201106021454.17652.florian@openwrt.org> References: <201106021454.17652.florian@openwrt.org> Date: Thu, 2 Jun 2011 15:04:42 +0200 Message-ID: Subject: Re: [PATCH 1/3] WATCHDOG: mtx1-wdt: use dev_{err,info} instead of printk() From: Manuel Lauss To: Florian Fainelli Cc: Wim Van Sebroeck , linux-mips@linux-mips.org, linux-watchdog@vger.kernel.org Content-Type: text/plain; charset=ISO-8859-1 X-archive-position: 30194 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: manuel.lauss@googlemail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1747 Content-Length: 463 Lines: 18 Hi Florian, On Thu, Jun 2, 2011 at 2:54 PM, Florian Fainelli wrote: > > Signed-off-by: Florian Fainelli > --- > diff --git a/drivers/watchdog/mtx-1_wdt.c b/drivers/watchdog/mtx-1_wdt.c While you're at it, please change line 246 from static struct platform_driver mtx1_wdt = { to static struct platform_driver mtx1_wdt_driver = { to get rid of a really annoying section mismatch warning. Thanks! Manuel Lauss From florian@openwrt.org Thu Jun 2 15:44:34 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 02 Jun 2011 15:44:37 +0200 (CEST) Received: from mail-ww0-f43.google.com ([74.125.82.43]:36619 "EHLO mail-ww0-f43.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491850Ab1FBNoe (ORCPT ); Thu, 2 Jun 2011 15:44:34 +0200 Received: by wwb17 with SMTP id 17so771584wwb.24 for ; Thu, 02 Jun 2011 06:44:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:sender:from:to:subject:date:user-agent :organization:mime-version:content-type:content-transfer-encoding :message-id; bh=TIWnWZuyMlqJuEjVySrHsNixA7A3kZcmkFQKSTZKInE=; b=J3Ydl8/H6gCdOl1JpFiPwSYyGH1OFDSsJP+Zht5or2b46F9m8urz4vTdVNlGYX0JLW Uvu/wOHkDdoG5u+mfVbAvApETUYDGhibz8ZC7mjc6vVuw6MI7YKz/4Z5LiJbNKbKJeEQ BnId888UvDhgf+qEHxPZiJACXMXOLo04UMXQk= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:to:subject:date:user-agent:organization:mime-version :content-type:content-transfer-encoding:message-id; b=qkuVpDRG1rlf5RvRZt3Vy5Yk/vmpbIW0MuD/3gM0X41iz4ChQzyhH7+h+zFGZa2q5m l6NILG2KQVxfjiPb/SB+rUZUtaTK/3Nvq29XH0ccqNkIGdDzQHJfwJeDDPk4DLIfDhNg yzvzh9izxRtC40EuRtCR53xAuTBOBm3E3ABlU= Received: by 10.216.145.131 with SMTP id p3mr716608wej.82.1307022269369; Thu, 02 Jun 2011 06:44:29 -0700 (PDT) Received: from bender.localnet (fbx.mimichou.net [82.236.225.16]) by mx.google.com with ESMTPS id a1sm331049wek.46.2011.06.02.06.44.27 (version=SSLv3 cipher=OTHER); Thu, 02 Jun 2011 06:44:28 -0700 (PDT) From: Florian Fainelli To: Wim Van Sebroeck , linux-mips@linux-mips.org, linux-watchdog@vger.kernel.org, Manuel Lauss Subject: [PATCH 1/2] WATCHDOG: mtx1-wdt: fix section mismatch Date: Thu, 2 Jun 2011 15:44:26 +0200 User-Agent: KMail/1.13.6 (Linux/2.6.38-9-generic; KDE/4.6.2; x86_64; ; ) Organization: OpenWrt MIME-Version: 1.0 Content-Type: Text/Plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Message-Id: <201106021544.26256.florian@openwrt.org> X-archive-position: 30195 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1772 Content-Length: 921 Lines: 34 Signed-off-by: Florian Fainelli --- diff --git a/drivers/watchdog/mtx-1_wdt.c b/drivers/watchdog/mtx-1_wdt.c index 9756da9..f313d3b 100644 --- a/drivers/watchdog/mtx-1_wdt.c +++ b/drivers/watchdog/mtx-1_wdt.c @@ -245,7 +245,7 @@ static int __devexit mtx1_wdt_remove(struct platform_device *pdev) return 0; } -static struct platform_driver mtx1_wdt = { +static struct platform_driver mtx1_wdt_driver = { .probe = mtx1_wdt_probe, .remove = __devexit_p(mtx1_wdt_remove), .driver.name = "mtx1-wdt", @@ -254,12 +254,12 @@ static struct platform_driver mtx1_wdt = { static int __init mtx1_wdt_init(void) { - return platform_driver_register(&mtx1_wdt); + return platform_driver_register(&mtx1_wdt_driver); } static void __exit mtx1_wdt_exit(void) { - platform_driver_unregister(&mtx1_wdt); + platform_driver_unregister(&mtx1_wdt_driver); } module_init(mtx1_wdt_init); -- 1.7.4.1 From florian@openwrt.org Thu Jun 2 15:44:36 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 02 Jun 2011 15:45:03 +0200 (CEST) Received: from mail-wy0-f177.google.com ([74.125.82.177]:50460 "EHLO mail-wy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491851Ab1FBNog (ORCPT ); Thu, 2 Jun 2011 15:44:36 +0200 Received: by wyb28 with SMTP id 28so855066wyb.36 for ; Thu, 02 Jun 2011 06:44:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:sender:from:to:subject:date:user-agent :organization:mime-version:content-type:content-transfer-encoding :message-id; bh=4PRTOUTKqfkSZLqLbvFiSZWBLbRNUr742d1N4VZn5UQ=; b=m9ugtW2MSDiD8fT+BgwbzaZgHEi3S/ziK5gSwCYyAiArfJfoKte0hiX9G+GUMEPC5w IV+0waN7wg3m4zjzONv9zF4OYFg674eDXezuYF3VHR3qA8ILtGy0FS0c5XoN88G76zRn LqGTpVL6BVyeIeCcQD2xwGetzh7Q9KadsyFco= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:to:subject:date:user-agent:organization:mime-version :content-type:content-transfer-encoding:message-id; b=K+pOptDzTrtjYUQAvQ9HhXTj0gl3FkuwZ8s6ripPYMYfz2w3KW4FlG5XTP/6CTjCHa earauSJNOlwsQK5ThhCT3t4yQT1/wKHcoweguwwTtTU1cAgRRjwu2de3LuAA0NY2yLnm nbE3z3XyqF8PnSS81Z3yLdz8/l0aPegOQAWn8= Received: by 10.216.239.67 with SMTP id b45mr282132wer.44.1307022270920; Thu, 02 Jun 2011 06:44:30 -0700 (PDT) Received: from bender.localnet (fbx.mimichou.net [82.236.225.16]) by mx.google.com with ESMTPS id a1sm331049wek.46.2011.06.02.06.44.29 (version=SSLv3 cipher=OTHER); Thu, 02 Jun 2011 06:44:30 -0700 (PDT) From: Florian Fainelli To: Wim Van Sebroeck , linux-mips@linux-mips.org, linux-watchdog@vger.kernel.org, Manuel Lauss Subject: [PATCH 2/2] WATCHDOG: mtx1-wdt: remove unused variable 'tmp' Date: Thu, 2 Jun 2011 15:44:28 +0200 User-Agent: KMail/1.13.6 (Linux/2.6.38-9-generic; KDE/4.6.2; x86_64; ; ) Organization: OpenWrt MIME-Version: 1.0 Content-Type: Text/Plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Message-Id: <201106021544.28512.florian@openwrt.org> X-archive-position: 30196 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1773 Content-Length: 428 Lines: 19 Signed-off-by: Florian Fainelli --- diff --git a/drivers/watchdog/mtx-1_wdt.c b/drivers/watchdog/mtx-1_wdt.c index f313d3b..913d499 100644 --- a/drivers/watchdog/mtx-1_wdt.c +++ b/drivers/watchdog/mtx-1_wdt.c @@ -71,8 +71,6 @@ static struct { static void mtx1_wdt_trigger(unsigned long unused) { - u32 tmp; - spin_lock(&mtx1_wdt_device.lock); if (mtx1_wdt_device.running) ticks--; -- 1.7.4.1 From eparis@redhat.com Thu Jun 2 23:06:14 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 02 Jun 2011 23:06:23 +0200 (CEST) Received: from mx1.redhat.com ([209.132.183.28]:6242 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491860Ab1FBVGO (ORCPT ); Thu, 2 Jun 2011 23:06:14 +0200 Received: from int-mx01.intmail.prod.int.phx2.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p52L54dn008435 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Thu, 2 Jun 2011 17:05:04 -0400 Received: from paris.rdu.redhat.com (paris.rdu.redhat.com [10.11.231.241]) by int-mx01.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id p52L4wq9010204; Thu, 2 Jun 2011 17:04:59 -0400 From: Eric Paris Subject: [PATCH] Audit: push audit success and retcode into arch ptrace.h To: linux-kernel@vger.kernel.org Cc: tony.luck@intel.com, fenghua.yu@intel.com, monstr@monstr.eu, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, schwidefsky@de.ibm.com, heiko.carstens@de.ibm.com, linux390@de.ibm.com, lethal@linux-sh.org, davem@davemloft.net, jdike@addtoit.com, richard@nod.at, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, viro@zeniv.linux.org.uk, eparis@redhat.com, oleg@redhat.com, akpm@linux-foundation.org, linux-ia64@vger.kernel.org, microblaze-uclinux@itee.uq.edu.au, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net Date: Thu, 02 Jun 2011 17:04:58 -0400 Message-ID: <20110602210458.23613.24076.stgit@paris.rdu.redhat.com> User-Agent: StGIT/0.14.3 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.67 on 10.5.11.11 X-archive-position: 30197 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: eparis@redhat.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2118 Content-Length: 20593 Lines: 561 The audit system previously expected arches calling to audit_syscall_exit to supply as arguments if the syscall was a success and what the return code was. Audit also provides a helper AUDITSC_RESULT which was supposed to simplify by converting from negative retcodes to an audit internal magic value stating success or failure. This helper was wrong and could indicate that a valid pointer returned to userspace was a failed syscall. The fix is to fix the layering foolishness. We now pass audit_syscall_exit a struct pt_reg and it in turns calls back into arch code to collect the return value and to determine if the syscall was a success or failure. In arch/sh/kernel/ptrace_64.c I see that we were using regs[9] in the old audit code. But the ptrace_64.h code was previously using regs[3] for the regs_return_value(). I have no idea which one is correct, but this patch now uses regs[3]. Signed-off-by: Eric Paris --- arch/ia64/include/asm/ptrace.h | 10 +++++++++- arch/ia64/kernel/ptrace.c | 9 +-------- arch/microblaze/include/asm/ptrace.h | 2 ++ arch/microblaze/kernel/ptrace.c | 3 +-- arch/mips/include/asm/ptrace.h | 11 ++++++++++- arch/mips/kernel/ptrace.c | 4 +--- arch/powerpc/include/asm/ptrace.h | 1 + arch/powerpc/kernel/ptrace.c | 4 +--- arch/s390/kernel/ptrace.c | 4 +--- arch/sh/kernel/ptrace_32.c | 4 +--- arch/sh/kernel/ptrace_64.c | 4 +--- arch/sparc/include/asm/ptrace.h | 1 + arch/sparc/kernel/ptrace_64.c | 11 +---------- arch/um/kernel/ptrace.c | 4 ++-- arch/um/sys-i386/shared/sysdep/ptrace.h | 1 + arch/um/sys-x86_64/shared/sysdep/ptrace.h | 1 + arch/x86/ia32/ia32entry.S | 10 +++++----- arch/x86/kernel/entry_32.S | 8 ++++---- arch/x86/kernel/entry_64.S | 10 +++++----- arch/x86/kernel/ptrace.c | 3 +-- arch/x86/kernel/vm86_32.c | 3 +-- include/linux/audit.h | 22 ++++++++++++++-------- include/linux/ptrace.h | 10 ++++++++++ kernel/auditsc.c | 16 ++++++++++++---- 24 files changed, 87 insertions(+), 69 deletions(-) diff --git a/arch/ia64/include/asm/ptrace.h b/arch/ia64/include/asm/ptrace.h index 7ae9c3f..9e422e3 100644 --- a/arch/ia64/include/asm/ptrace.h +++ b/arch/ia64/include/asm/ptrace.h @@ -246,7 +246,15 @@ static inline unsigned long user_stack_pointer(struct pt_regs *regs) return regs->ar_bspstore; } -#define regs_return_value(regs) ((regs)->r8) +#define is_syscall_success(regs) ((regs)->r10 != -1) +#define regs_return_value(regs) \ +({ \ + const typeof(regs) *__regs = (regs); \ + if (is_syscall_success(__regs)) \ + __regs->r8; \ + else \ + -(__regs->r8) \ +}) /* Conserve space in histogram by encoding slot bits in address * bits 2 and 3 rather than bits 0 and 1. diff --git a/arch/ia64/kernel/ptrace.c b/arch/ia64/kernel/ptrace.c index 8848f43..2c15408 100644 --- a/arch/ia64/kernel/ptrace.c +++ b/arch/ia64/kernel/ptrace.c @@ -1268,14 +1268,7 @@ syscall_trace_leave (long arg0, long arg1, long arg2, long arg3, { int step; - if (unlikely(current->audit_context)) { - int success = AUDITSC_RESULT(regs.r10); - long result = regs.r8; - - if (success != AUDITSC_SUCCESS) - result = -result; - audit_syscall_exit(success, result); - } + audit_syscall_exit(®s); step = test_thread_flag(TIF_SINGLESTEP); if (step || test_thread_flag(TIF_SYSCALL_TRACE)) diff --git a/arch/microblaze/include/asm/ptrace.h b/arch/microblaze/include/asm/ptrace.h index d9b6630..c59c209 100644 --- a/arch/microblaze/include/asm/ptrace.h +++ b/arch/microblaze/include/asm/ptrace.h @@ -61,6 +61,8 @@ struct pt_regs { #define instruction_pointer(regs) ((regs)->pc) #define profile_pc(regs) instruction_pointer(regs) +#define regs_return_value(regs) ((regs)->r3) + void show_regs(struct pt_regs *); #else /* __KERNEL__ */ diff --git a/arch/microblaze/kernel/ptrace.c b/arch/microblaze/kernel/ptrace.c index 6a8e0cc..9747fa5 100644 --- a/arch/microblaze/kernel/ptrace.c +++ b/arch/microblaze/kernel/ptrace.c @@ -159,8 +159,7 @@ asmlinkage void do_syscall_trace_leave(struct pt_regs *regs) { int step; - if (unlikely(current->audit_context)) - audit_syscall_exit(AUDITSC_RESULT(regs->r3), regs->r3); + audit_syscall_exit(regs); step = test_thread_flag(TIF_SINGLESTEP); if (step || test_thread_flag(TIF_SYSCALL_TRACE)) diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h index de39b1f..59f22b2 100644 --- a/arch/mips/include/asm/ptrace.h +++ b/arch/mips/include/asm/ptrace.h @@ -137,7 +137,16 @@ extern int ptrace_set_watch_regs(struct task_struct *child, */ #define user_mode(regs) (((regs)->cp0_status & KU_MASK) == KU_USER) -#define regs_return_value(_regs) ((_regs)->regs[2]) +#define is_syscall_success(regs) (!(regs)->regs[7]) +#define regs_return_value(regs) \ +({ \ + const typeof(regs) *__regs = (regs); \ + if (is_syscall_success(__regs)) \ + __regs->regs[2]; \ + else \ + -(__regs->regs[2]) \ +}) + #define instruction_pointer(regs) ((regs)->cp0_epc) #define profile_pc(regs) instruction_pointer(regs) diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c index 4e6ea1f..ab0f196 100644 --- a/arch/mips/kernel/ptrace.c +++ b/arch/mips/kernel/ptrace.c @@ -572,9 +572,7 @@ out: */ asmlinkage void syscall_trace_leave(struct pt_regs *regs) { - if (unlikely(current->audit_context)) - audit_syscall_exit(AUDITSC_RESULT(regs->regs[7]), - -regs->regs[2]); + audit_syscall_exit(regs); if (!(current->ptrace & PT_PTRACED)) return; diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h index 48223f9..f5a7296 100644 --- a/arch/powerpc/include/asm/ptrace.h +++ b/arch/powerpc/include/asm/ptrace.h @@ -87,6 +87,7 @@ struct pt_regs { #define user_stack_pointer(regs) ((regs)->gpr[1]) #define kernel_stack_pointer(regs) ((regs)->gpr[1]) #define regs_return_value(regs) ((regs)->gpr[3]) +#define is_syscall_success(regs) (!((regs)->ccr&0x10000000)) #ifdef CONFIG_SMP extern unsigned long profile_pc(struct pt_regs *regs); diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c index cb22024..d801ab7 100644 --- a/arch/powerpc/kernel/ptrace.c +++ b/arch/powerpc/kernel/ptrace.c @@ -1741,9 +1741,7 @@ void do_syscall_trace_leave(struct pt_regs *regs) { int step; - if (unlikely(current->audit_context)) - audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS, - regs->result); + audit_syscall_exit(regs); if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) trace_sys_exit(regs, regs->result); diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c index ef86ad2..d4d6fcb 100644 --- a/arch/s390/kernel/ptrace.c +++ b/arch/s390/kernel/ptrace.c @@ -753,9 +753,7 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs) asmlinkage void do_syscall_trace_exit(struct pt_regs *regs) { - if (unlikely(current->audit_context)) - audit_syscall_exit(AUDITSC_RESULT(regs->gprs[2]), - regs->gprs[2]); + audit_syscall_exit(regs); if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) trace_sys_exit(regs, regs->gprs[2]); diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c index 3d7b209..5fce97e 100644 --- a/arch/sh/kernel/ptrace_32.c +++ b/arch/sh/kernel/ptrace_32.c @@ -529,9 +529,7 @@ asmlinkage void do_syscall_trace_leave(struct pt_regs *regs) { int step; - if (unlikely(current->audit_context)) - audit_syscall_exit(AUDITSC_RESULT(regs->regs[0]), - regs->regs[0]); + audit_syscall_exit(regs); if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) trace_sys_exit(regs, regs->regs[0]); diff --git a/arch/sh/kernel/ptrace_64.c b/arch/sh/kernel/ptrace_64.c index c8f9764..ba720d6 100644 --- a/arch/sh/kernel/ptrace_64.c +++ b/arch/sh/kernel/ptrace_64.c @@ -548,9 +548,7 @@ asmlinkage void do_syscall_trace_leave(struct pt_regs *regs) { int step; - if (unlikely(current->audit_context)) - audit_syscall_exit(AUDITSC_RESULT(regs->regs[9]), - regs->regs[9]); + audit_syscall_exit(regs); if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) trace_sys_exit(regs, regs->regs[9]); diff --git a/arch/sparc/include/asm/ptrace.h b/arch/sparc/include/asm/ptrace.h index c7ad3fe..a211965 100644 --- a/arch/sparc/include/asm/ptrace.h +++ b/arch/sparc/include/asm/ptrace.h @@ -207,6 +207,7 @@ do { current_thread_info()->syscall_noerror = 1; \ #define instruction_pointer(regs) ((regs)->tpc) #define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP]) #define regs_return_value(regs) ((regs)->u_regs[UREG_I0]) +#define is_syscall_success(regs) (!((regs)->tstate & (TSTATE_XCARRY | TSTATE_ICARRY))) #ifdef CONFIG_SMP extern unsigned long profile_pc(struct pt_regs *); #else diff --git a/arch/sparc/kernel/ptrace_64.c b/arch/sparc/kernel/ptrace_64.c index 96ee50a..c73c8c5 100644 --- a/arch/sparc/kernel/ptrace_64.c +++ b/arch/sparc/kernel/ptrace_64.c @@ -1086,17 +1086,8 @@ asmlinkage int syscall_trace_enter(struct pt_regs *regs) asmlinkage void syscall_trace_leave(struct pt_regs *regs) { -#ifdef CONFIG_AUDITSYSCALL - if (unlikely(current->audit_context)) { - unsigned long tstate = regs->tstate; - int result = AUDITSC_SUCCESS; + audit_syscall_exit(regs); - if (unlikely(tstate & (TSTATE_XCARRY | TSTATE_ICARRY))) - result = AUDITSC_FAILURE; - - audit_syscall_exit(result, regs->u_regs[UREG_I0]); - } -#endif if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) trace_sys_exit(regs, regs->u_regs[UREG_G1]); diff --git a/arch/um/kernel/ptrace.c b/arch/um/kernel/ptrace.c index 701b672..839141d 100644 --- a/arch/um/kernel/ptrace.c +++ b/arch/um/kernel/ptrace.c @@ -203,8 +203,8 @@ void syscall_trace(struct uml_pt_regs *regs, int entryexit) UPT_SYSCALL_ARG2(regs), UPT_SYSCALL_ARG3(regs), UPT_SYSCALL_ARG4(regs)); - else audit_syscall_exit(AUDITSC_RESULT(UPT_SYSCALL_RET(regs)), - UPT_SYSCALL_RET(regs)); + else + audit_syscall_exit(regs); } /* Fake a debug trap */ diff --git a/arch/um/sys-i386/shared/sysdep/ptrace.h b/arch/um/sys-i386/shared/sysdep/ptrace.h index d50e62e..ef5c310 100644 --- a/arch/um/sys-i386/shared/sysdep/ptrace.h +++ b/arch/um/sys-i386/shared/sysdep/ptrace.h @@ -162,6 +162,7 @@ struct syscall_args { #define UPT_ORIG_SYSCALL(r) UPT_EAX(r) #define UPT_SYSCALL_NR(r) UPT_ORIG_EAX(r) #define UPT_SYSCALL_RET(r) UPT_EAX(r) +#define regs_return_value UPT_SYSCALL_RET #define UPT_FAULTINFO(r) (&(r)->faultinfo) diff --git a/arch/um/sys-x86_64/shared/sysdep/ptrace.h b/arch/um/sys-x86_64/shared/sysdep/ptrace.h index fdba545..2224e40 100644 --- a/arch/um/sys-x86_64/shared/sysdep/ptrace.h +++ b/arch/um/sys-x86_64/shared/sysdep/ptrace.h @@ -124,6 +124,7 @@ struct uml_pt_regs { #define UPT_EFLAGS(r) REGS_EFLAGS((r)->gp) #define UPT_SYSCALL_NR(r) ((r)->syscall) #define UPT_SYSCALL_RET(r) UPT_RAX(r) +#define regs_return_value UPT_SYSCALL_RET extern int user_context(unsigned long sp); diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S index c1870dd..6d1572f 100644 --- a/arch/x86/ia32/ia32entry.S +++ b/arch/x86/ia32/ia32entry.S @@ -14,6 +14,7 @@ #include #include #include +#include /* Avoid __ASSEMBLER__'ifying just for this. */ #include @@ -210,13 +211,12 @@ sysexit_from_sys_call: TRACE_IRQS_ON sti movl %eax,%esi /* second arg, syscall return value */ - cmpl $0,%eax /* is it < 0? */ - setl %al /* 1 if so, 0 if not */ + cmpl $-MAX_ERRNO,%eax /* is it an error ? */ + setbe %al /* 1 if so, 0 if not */ movzbl %al,%edi /* zero-extend that into %edi */ - inc %edi /* first arg, 0->1(AUDITSC_SUCCESS), 1->2(AUDITSC_FAILURE) */ - call audit_syscall_exit + call __audit_syscall_exit GET_THREAD_INFO(%r10) - movl RAX-ARGOFFSET(%rsp),%eax /* reload syscall return value */ + movq RAX-ARGOFFSET(%rsp),%rax /* reload syscall return value */ movl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),%edi cli TRACE_IRQS_OFF diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S index 5c1a919..584112a 100644 --- a/arch/x86/kernel/entry_32.S +++ b/arch/x86/kernel/entry_32.S @@ -54,6 +54,7 @@ #include #include #include +#include /* Avoid __ASSEMBLER__'ifying just for this. */ #include @@ -465,11 +466,10 @@ sysexit_audit: TRACE_IRQS_ON ENABLE_INTERRUPTS(CLBR_ANY) movl %eax,%edx /* second arg, syscall return value */ - cmpl $0,%eax /* is it < 0? */ - setl %al /* 1 if so, 0 if not */ + cmpl $-MAX_ERRNO,%eax /* is it an error ? */ + setbe %al /* 1 if so, 0 if not */ movzbl %al,%eax /* zero-extend that */ - inc %eax /* first arg, 0->1(AUDITSC_SUCCESS), 1->2(AUDITSC_FAILURE) */ - call audit_syscall_exit + call __audit_syscall_exit DISABLE_INTERRUPTS(CLBR_ANY) TRACE_IRQS_OFF movl TI_flags(%ebp), %ecx diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S index 8a445a0..b7b1f88 100644 --- a/arch/x86/kernel/entry_64.S +++ b/arch/x86/kernel/entry_64.S @@ -53,6 +53,7 @@ #include #include #include +#include /* Avoid __ASSEMBLER__'ifying just for this. */ #include @@ -564,17 +565,16 @@ auditsys: jmp system_call_fastpath /* - * Return fast path for syscall audit. Call audit_syscall_exit() + * Return fast path for syscall audit. Call __audit_syscall_exit() * directly and then jump back to the fast path with TIF_SYSCALL_AUDIT * masked off. */ sysret_audit: movq RAX-ARGOFFSET(%rsp),%rsi /* second arg, syscall return value */ - cmpq $0,%rsi /* is it < 0? */ - setl %al /* 1 if so, 0 if not */ + cmpq $-MAX_ERRNO,%rsi /* is it < -MAX_ERRNO? */ + setbe %al /* 1 if so, 0 if not */ movzbl %al,%edi /* zero-extend that into %edi */ - inc %edi /* first arg, 0->1(AUDITSC_SUCCESS), 1->2(AUDITSC_FAILURE) */ - call audit_syscall_exit + call __audit_syscall_exit movl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),%edi jmp sysret_check #endif /* CONFIG_AUDITSYSCALL */ diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c index 807c2a2..5c6281e 100644 --- a/arch/x86/kernel/ptrace.c +++ b/arch/x86/kernel/ptrace.c @@ -1412,8 +1412,7 @@ void syscall_trace_leave(struct pt_regs *regs) { bool step; - if (unlikely(current->audit_context)) - audit_syscall_exit(AUDITSC_RESULT(regs->ax), regs->ax); + audit_syscall_exit(regs); if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) trace_sys_exit(regs, regs->ax); diff --git a/arch/x86/kernel/vm86_32.c b/arch/x86/kernel/vm86_32.c index 863f875..644db22 100644 --- a/arch/x86/kernel/vm86_32.c +++ b/arch/x86/kernel/vm86_32.c @@ -336,8 +336,7 @@ static void do_sys_vm86(struct kernel_vm86_struct *info, struct task_struct *tsk mark_screen_rdonly(tsk->mm); /*call audit_syscall_exit since we do not exit via the normal paths */ - if (unlikely(current->audit_context)) - audit_syscall_exit(AUDITSC_RESULT(0), 0); + audit_syscall_exit(NULL); __asm__ __volatile__( "movl %0,%%esp\n\t" diff --git a/include/linux/audit.h b/include/linux/audit.h index 208efd6..0452dfc 100644 --- a/include/linux/audit.h +++ b/include/linux/audit.h @@ -26,6 +26,7 @@ #include #include +#include /* The netlink messages for the audit system is divided into blocks: * 1000 - 1099 are for commanding the audit system @@ -410,10 +411,6 @@ struct audit_field { void *lsm_rule; }; -#define AUDITSC_INVALID 0 -#define AUDITSC_SUCCESS 1 -#define AUDITSC_FAILURE 2 -#define AUDITSC_RESULT(x) ( ((long)(x))<0?AUDITSC_FAILURE:AUDITSC_SUCCESS ) extern int __init audit_register_class(int class, unsigned *list); extern int audit_classify_syscall(int abi, unsigned syscall); extern int audit_classify_arch(int arch); @@ -426,7 +423,7 @@ extern void audit_free(struct task_struct *task); extern void audit_syscall_entry(int arch, int major, unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3); -extern void audit_syscall_exit(int failed, long return_code); +extern void __audit_syscall_exit(int ret_success, long ret_value); extern void __audit_getname(const char *name); extern void audit_putname(const char *name); extern void __audit_inode(const char *name, const struct dentry *dentry); @@ -441,6 +438,15 @@ static inline int audit_dummy_context(void) void *p = current->audit_context; return !p || *(int *)p; } +static inline void audit_syscall_exit(void *pt_regs) +{ + if (unlikely(current->audit_context)) { + int success = is_syscall_success(pt_regs); + int return_code = regs_return_value(pt_regs); + + __audit_syscall_exit(success, return_code); + } +} static inline void audit_getname(const char *name) { if (unlikely(!audit_dummy_context())) @@ -560,12 +566,12 @@ static inline void audit_mmap_fd(int fd, int flags) extern int audit_n_rules; extern int audit_signals; -#else +#else /* CONFIG_AUDITSYSCALL */ #define audit_finish_fork(t) #define audit_alloc(t) ({ 0; }) #define audit_free(t) do { ; } while (0) #define audit_syscall_entry(ta,a,b,c,d,e) do { ; } while (0) -#define audit_syscall_exit(f,r) do { ; } while (0) +#define audit_syscall_exit(r) do { ; } while (0) #define audit_dummy_context() 1 #define audit_getname(n) do { ; } while (0) #define audit_putname(n) do { ; } while (0) @@ -597,7 +603,7 @@ extern int audit_signals; #define audit_rng(d, c, l) (0) #define audit_n_rules 0 #define audit_signals 0 -#endif +#endif /* CONFIG_AUDITSYSCALL */ #ifdef CONFIG_AUDIT /* These are defined in audit.c */ diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h index 9178d5c..29bb846 100644 --- a/include/linux/ptrace.h +++ b/include/linux/ptrace.h @@ -98,6 +98,7 @@ #include /* For unlikely. */ #include /* For struct task_struct. */ +#include /* for IS_ERR_VALUE */ extern long arch_ptrace(struct task_struct *child, long request, @@ -223,6 +224,15 @@ static inline void ptrace_release_task(struct task_struct *task) #define force_successful_syscall_return() do { } while (0) #endif +#ifndef is_syscall_success +/* + * On most systems we can tell if a syscall is a success based on if the retval + * is an error value. On some systems like ia64 and powerpc they have different + * indicators of success/failure and must define their own. + */ +#define is_syscall_success(regs) (!IS_ERR_VALUE((unsigned long)(regs_return_value(regs)))) +#endif + /* * should define the following things inside #ifdef __KERNEL__. * diff --git a/kernel/auditsc.c b/kernel/auditsc.c index 9c61afe..d21a34f 100644 --- a/kernel/auditsc.c +++ b/kernel/auditsc.c @@ -70,6 +70,11 @@ #include "audit.h" +/* flags stating the success for a syscall */ +#define AUDITSC_INVALID 0 +#define AUDITSC_SUCCESS 1 +#define AUDITSC_FAILURE 2 + /* AUDIT_NAMES is the number of slots we reserve in the audit_context * for saving names from getname(). If we get more names we will allocate * a name dynamically and also add those to the list anchored by names_list. */ @@ -1737,8 +1742,7 @@ void audit_finish_fork(struct task_struct *child) /** * audit_syscall_exit - deallocate audit context after a system call - * @valid: success/failure flag - * @return_code: syscall return value + * @pt_regs: syscall registers * * Tear down after system call. If the audit context has been marked as * auditable (either because of the AUDIT_RECORD_CONTEXT state from @@ -1746,13 +1750,17 @@ void audit_finish_fork(struct task_struct *child) * message), then write out the syscall information. In call cases, * free the names stored from getname(). */ -void audit_syscall_exit(int valid, long return_code) +void __audit_syscall_exit(int success, long return_code) { struct task_struct *tsk = current; struct audit_context *context; - context = audit_get_context(tsk, valid, return_code); + if (success) + success = AUDITSC_SUCCESS; + else + success = AUDITSC_FAILURE; + context = audit_get_context(tsk, success, return_code); if (likely(!context)) return; From hpa@zytor.com Thu Jun 2 23:19:35 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 02 Jun 2011 23:19:40 +0200 (CEST) Received: from terminus.zytor.com ([198.137.202.10]:49857 "EHLO mail.zytor.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491860Ab1FBVTf (ORCPT ); Thu, 2 Jun 2011 23:19:35 +0200 Received: from anacreon.sc.intel.com (hpa@localhost [127.0.0.1]) (authenticated bits=0) by mail.zytor.com (8.14.4/8.14.4) with ESMTP id p52LIYOU019153 (version=TLSv1/SSLv3 cipher=DHE-RSA-CAMELLIA256-SHA bits=256 verify=NO); Thu, 2 Jun 2011 14:18:35 -0700 Message-ID: <4DE7FE2A.10107@zytor.com> Date: Thu, 02 Jun 2011 14:18:34 -0700 From: "H. Peter Anvin" User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.17) Gecko/20110428 Fedora/3.1.10-1.fc15 Thunderbird/3.1.10 MIME-Version: 1.0 To: Eric Paris CC: linux-kernel@vger.kernel.org, tony.luck@intel.com, fenghua.yu@intel.com, monstr@monstr.eu, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, schwidefsky@de.ibm.com, heiko.carstens@de.ibm.com, linux390@de.ibm.com, lethal@linux-sh.org, davem@davemloft.net, jdike@addtoit.com, richard@nod.at, tglx@linutronix.de, mingo@redhat.com, x86@kernel.org, viro@zeniv.linux.org.uk, oleg@redhat.com, akpm@linux-foundation.org, linux-ia64@vger.kernel.org, microblaze-uclinux@itee.uq.edu.au, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net Subject: Re: [PATCH] Audit: push audit success and retcode into arch ptrace.h References: <20110602210458.23613.24076.stgit@paris.rdu.redhat.com> In-Reply-To: <20110602210458.23613.24076.stgit@paris.rdu.redhat.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-archive-position: 30198 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hpa@zytor.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2126 Content-Length: 1092 Lines: 23 On 06/02/2011 02:04 PM, Eric Paris wrote: > The audit system previously expected arches calling to audit_syscall_exit to > supply as arguments if the syscall was a success and what the return code was. > Audit also provides a helper AUDITSC_RESULT which was supposed to simplify by > converting from negative retcodes to an audit internal magic value stating > success or failure. This helper was wrong and could indicate that a valid > pointer returned to userspace was a failed syscall. The fix is to fix the > layering foolishness. We now pass audit_syscall_exit a struct pt_reg and it > in turns calls back into arch code to collect the return value and to > determine if the syscall was a success or failure. > > In arch/sh/kernel/ptrace_64.c I see that we were using regs[9] in the old > audit code. But the ptrace_64.h code was previously using regs[3] for the > regs_return_value(). I have no idea which one is correct, but this patch now > uses regs[3]. > > Signed-off-by: Eric Paris For the x86 portions: Acked-by: H. Peter Anvin -hpa From richard@nod.at Fri Jun 3 00:34:55 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 03 Jun 2011 00:34:59 +0200 (CEST) Received: from a.ns.miles-group.at ([95.130.255.143]:50951 "EHLO radon.swed.at" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491866Ab1FBWez convert rfc822-to-8bit (ORCPT ); Fri, 3 Jun 2011 00:34:55 +0200 Received: (qmail 5218 invoked by uid 89); 2 Jun 2011 22:34:49 -0000 Received: by simscan 1.3.1 ppid: 5195, pid: 5214, t: 0.1593s scanners: attach: 1.3.1 clamav: 0.96.5/m:53 Received: from unknown (HELO raccoon.localnet) (richard@nod.at@212.183.97.123) by radon.swed.at with ESMTPA; 2 Jun 2011 22:34:49 -0000 From: Richard Weinberger To: Eric Paris Subject: Re: [PATCH] Audit: push audit success and retcode into arch ptrace.h Date: Fri, 3 Jun 2011 00:32:16 +0200 User-Agent: KMail/1.13.7 (Linux/2.6.37.6-0.5-desktop; KDE/4.6.3; x86_64; ; ) Cc: linux-kernel@vger.kernel.org, tony.luck@intel.com, fenghua.yu@intel.com, monstr@monstr.eu, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, schwidefsky@de.ibm.com, heiko.carstens@de.ibm.com, linux390@de.ibm.com, lethal@linux-sh.org, davem@davemloft.net, jdike@addtoit.com, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, viro@zeniv.linux.org.uk, oleg@redhat.com, akpm@linux-foundation.org, linux-ia64@vger.kernel.org, microblaze-uclinux@itee.uq.edu.au, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net References: <20110602210458.23613.24076.stgit@paris.rdu.redhat.com> In-Reply-To: <20110602210458.23613.24076.stgit@paris.rdu.redhat.com> MIME-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: 8BIT Message-Id: <201106030032.17398.richard@nod.at> X-archive-position: 30199 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: richard@nod.at Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2185 Content-Length: 1227 Lines: 31 Am Donnerstag 02 Juni 2011, 23:04:58 schrieb Eric Paris: > b/arch/um/sys-i386/shared/sysdep/ptrace.h index d50e62e..ef5c310 100644 > --- a/arch/um/sys-i386/shared/sysdep/ptrace.h > +++ b/arch/um/sys-i386/shared/sysdep/ptrace.h > @@ -162,6 +162,7 @@ struct syscall_args { > #define UPT_ORIG_SYSCALL(r) UPT_EAX(r) > #define UPT_SYSCALL_NR(r) UPT_ORIG_EAX(r) > #define UPT_SYSCALL_RET(r) UPT_EAX(r) > +#define regs_return_value UPT_SYSCALL_RET This does not work at all. UPT_SYSCALL_RET expects something of type struct uml_pt_regs. #define regs_return_value REGS_EAX Would be correct. (For x86_64 it needs to be REGS_RAX) But there seems to be another problem. Why is pt_regs of type void *? gcc complains: In file included from include/linux/fsnotify.h:15:0, from include/linux/security.h:26, from init/main.c:32: include/linux/audit.h: In function ‘audit_syscall_exit’: include/linux/audit.h:440:17: warning: dereferencing ‘void *’ pointer include/linux/audit.h:440:3: error: invalid use of void expression include/linux/audit.h:441:21: warning: dereferencing ‘void *’ pointer include/linux/audit.h:441:21: error: void value not ignored as it ought to be Thanks, //richard From tony.luck@intel.com Fri Jun 3 01:00:57 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 03 Jun 2011 01:01:06 +0200 (CEST) Received: from mail-iw0-f177.google.com ([209.85.214.177]:61021 "EHLO mail-iw0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491867Ab1FBXA5 convert rfc822-to-8bit (ORCPT ); Fri, 3 Jun 2011 01:00:57 +0200 Received: by iwn36 with SMTP id 36so1419903iwn.36 for ; Thu, 02 Jun 2011 16:00:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=y5gbTW+l14Gg1niFywqtkqgOMdZ+1xv/DA3SWnbzdW0=; b=TgfrNYMK8HN9+bYm0V4aOFSrFPJW1Tjq0oHM4spW0qgzN4tNp9ckOndvWPK5IVv/pl LHNsOYt+63qPNZyULniU2yqqYp6kCw+bi74e+mlHBKbNdvYiFJkyjjJl5H+HwI1WBnbS O8U+0VbJrdOpAA00igosCCADUPtm23y8uCBPI= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type :content-transfer-encoding; b=VcBtJ9WPduOZDHMyAqr32JjmAv1OlOTIgklMh3h9hJlbkooPxhNm9qDR5muEl3q+OM FegCtQ6BWGDmfFQTfgEGmuOpiQvrUXp0+frScdMhiQaTfFHy16nahjS7WeKBLDLrOpdE J6//BQ2AjL5PlvbxxpWBnJPFxdcPfr+eFs7N4= MIME-Version: 1.0 Received: by 10.42.132.134 with SMTP id d6mr2412238ict.38.1307055651438; Thu, 02 Jun 2011 16:00:51 -0700 (PDT) Received: by 10.42.226.67 with HTTP; Thu, 2 Jun 2011 16:00:51 -0700 (PDT) In-Reply-To: <201106030032.17398.richard@nod.at> References: <20110602210458.23613.24076.stgit@paris.rdu.redhat.com> <201106030032.17398.richard@nod.at> Date: Thu, 2 Jun 2011 16:00:51 -0700 X-Google-Sender-Auth: QgFvRW1CC8YA0kXbdN8JonScQAY Message-ID: Subject: Re: [PATCH] Audit: push audit success and retcode into arch ptrace.h From: Tony Luck To: Richard Weinberger Cc: Eric Paris , linux-kernel@vger.kernel.org, fenghua.yu@intel.com, monstr@monstr.eu, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, schwidefsky@de.ibm.com, heiko.carstens@de.ibm.com, linux390@de.ibm.com, lethal@linux-sh.org, davem@davemloft.net, jdike@addtoit.com, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, viro@zeniv.linux.org.uk, oleg@redhat.com, akpm@linux-foundation.org, linux-ia64@vger.kernel.org, microblaze-uclinux@itee.uq.edu.au, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 8BIT X-archive-position: 30200 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tony.luck@intel.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2192 Content-Length: 1476 Lines: 33 > But there seems to be another problem. > Why is pt_regs of type void *? > > gcc complains: > In file included from include/linux/fsnotify.h:15:0, > from include/linux/security.h:26, > from init/main.c:32: > include/linux/audit.h: In function audit_syscall_exit: > include/linux/audit.h:440:17: warning: dereferencing void * pointer > include/linux/audit.h:440:3: error: invalid use of void expression > include/linux/audit.h:441:21: warning: dereferencing void * pointer > include/linux/audit.h:441:21: error: void value not ignored as it ought to be Perhaps same issue on ia64 - but symptoms are different: CC crypto/cipher.o In file included from include/linux/fsnotify.h:15, from include/linux/security.h:26, from init/do_mounts.c:8: include/linux/audit.h: In function audit_syscall_exit: include/linux/audit.h:440: warning: dereferencing void * pointer include/linux/audit.h:440: error: request for member r10 in something not a structure or union include/linux/audit.h:441: error: request for member r10 in something not a structure or union include/linux/audit.h:441: error: request for member r8 in something not a structure or union include/linux/audit.h:441: error: request for member r8 in something not a structure or union include/linux/audit.h:441: error: expected ; before } token include/linux/audit.h:441: error: void value not ignored as it ought to be -Tony From richard@nod.at Fri Jun 3 01:06:12 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 03 Jun 2011 01:06:17 +0200 (CEST) Received: from a.ns.miles-group.at ([95.130.255.143]:51100 "EHLO radon.swed.at" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491867Ab1FBXGM convert rfc822-to-8bit (ORCPT ); Fri, 3 Jun 2011 01:06:12 +0200 Received: (qmail 6862 invoked by uid 89); 2 Jun 2011 23:06:06 -0000 Received: by simscan 1.3.1 ppid: 6855, pid: 6858, t: 0.1563s scanners: attach: 1.3.1 clamav: 0.96.5/m:53 Received: from unknown (HELO raccoon.localnet) (richard@nod.at@212.183.97.123) by radon.swed.at with ESMTPA; 2 Jun 2011 23:06:06 -0000 From: Richard Weinberger To: Tony Luck Subject: Re: [PATCH] Audit: push audit success and retcode into arch ptrace.h Date: Fri, 3 Jun 2011 01:03:46 +0200 User-Agent: KMail/1.13.7 (Linux/2.6.37.6-0.5-desktop; KDE/4.6.3; x86_64; ; ) Cc: Eric Paris , linux-kernel@vger.kernel.org, fenghua.yu@intel.com, monstr@monstr.eu, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, schwidefsky@de.ibm.com, heiko.carstens@de.ibm.com, linux390@de.ibm.com, lethal@linux-sh.org, davem@davemloft.net, jdike@addtoit.com, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, viro@zeniv.linux.org.uk, oleg@redhat.com, akpm@linux-foundation.org, linux-ia64@vger.kernel.org, microblaze-uclinux@itee.uq.edu.au, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net References: <20110602210458.23613.24076.stgit@paris.rdu.redhat.com> <201106030032.17398.richard@nod.at> In-Reply-To: MIME-Version: 1.0 Content-Type: Text/Plain; charset="windows-1252" Content-Transfer-Encoding: 8BIT Message-Id: <201106030103.46742.richard@nod.at> X-archive-position: 30201 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: richard@nod.at Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2196 Content-Length: 956 Lines: 25 Am Freitag 03 Juni 2011, 01:00:51 schrieb Tony Luck: > > But there seems to be another problem. > > Why is pt_regs of type void *? > > > > gcc complains: > > In file included from include/linux/fsnotify.h:15:0, > > from include/linux/security.h:26, > > from init/main.c:32: > > include/linux/audit.h: In function audit_syscall_exit: > > include/linux/audit.h:440:17: warning: dereferencing void * pointer > > include/linux/audit.h:440:3: error: invalid use of void expression > > include/linux/audit.h:441:21: warning: dereferencing void * pointer > > include/linux/audit.h:441:21: error: void value not ignored as it ought > > to be > > Perhaps same issue on ia64 - but symptoms are different: The void * pointer is the problem. On UML it builds fine when I cast it: #define regs_return_value(r) UPT_SYSCALL_RET((struct uml_pt_regs *)r) I'll test it tomorrow in detail, for now I'm too sleepy. Thanks, //richard From eparis@redhat.com Fri Jun 3 01:07:33 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 03 Jun 2011 01:07:40 +0200 (CEST) Received: from mx1.redhat.com ([209.132.183.28]:16298 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491867Ab1FBXHd (ORCPT ); Fri, 3 Jun 2011 01:07:33 +0200 Received: from int-mx01.intmail.prod.int.phx2.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p52N6o71018061 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Thu, 2 Jun 2011 19:06:50 -0400 Received: from localhost.localdomain (vpn-11-52.rdu.redhat.com [10.11.11.52]) by int-mx01.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id p52N6kVC009314; Thu, 2 Jun 2011 19:06:47 -0400 Message-ID: <4DE81786.60702@redhat.com> Date: Thu, 02 Jun 2011 19:06:46 -0400 From: Eric Paris User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.17) Gecko/20110428 Fedora/3.1.10-1.fc15 Lightning/1.0b3pre Thunderbird/3.1.10 MIME-Version: 1.0 To: Richard Weinberger CC: linux-kernel@vger.kernel.org, tony.luck@intel.com, fenghua.yu@intel.com, monstr@monstr.eu, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, schwidefsky@de.ibm.com, heiko.carstens@de.ibm.com, linux390@de.ibm.com, lethal@linux-sh.org, davem@davemloft.net, jdike@addtoit.com, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, viro@zeniv.linux.org.uk, oleg@redhat.com, akpm@linux-foundation.org, linux-ia64@vger.kernel.org, microblaze-uclinux@itee.uq.edu.au, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net Subject: Re: [PATCH] Audit: push audit success and retcode into arch ptrace.h References: <20110602210458.23613.24076.stgit@paris.rdu.redhat.com> <201106030032.17398.richard@nod.at> In-Reply-To: <201106030032.17398.richard@nod.at> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Scanned-By: MIMEDefang 2.67 on 10.5.11.11 X-archive-position: 30202 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: eparis@redhat.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2197 Content-Length: 1836 Lines: 48 On 06/02/2011 06:32 PM, Richard Weinberger wrote: > Am Donnerstag 02 Juni 2011, 23:04:58 schrieb Eric Paris: >> b/arch/um/sys-i386/shared/sysdep/ptrace.h index d50e62e..ef5c310 100644 >> --- a/arch/um/sys-i386/shared/sysdep/ptrace.h >> +++ b/arch/um/sys-i386/shared/sysdep/ptrace.h >> @@ -162,6 +162,7 @@ struct syscall_args { >> #define UPT_ORIG_SYSCALL(r) UPT_EAX(r) >> #define UPT_SYSCALL_NR(r) UPT_ORIG_EAX(r) >> #define UPT_SYSCALL_RET(r) UPT_EAX(r) >> +#define regs_return_value UPT_SYSCALL_RET > > This does not work at all. > UPT_SYSCALL_RET expects something of type struct uml_pt_regs. > > #define regs_return_value REGS_EAX > Would be correct. (For x86_64 it needs to be REGS_RAX) > > But there seems to be another problem. > Why is pt_regs of type void *? I was stupid and used #define's instead of static inlines. Sorry. I wonder how many other arches I got that wrong, i'm sure others.... The code in arch/um/kernel/ptrace.c::syscall_trace() appeared to have a uml_pt_regs instead of just pt_regs. Which was why audit_syscall_exit() takes a void * instead of a pt_regs. We pass that right back to regs_return_value(). I believe the correct code should be: static inline long regs_return_value(struct uml_pt_regs *r) { return UPT_SYSCALL_RET(r); } > > gcc complains: > In file included from include/linux/fsnotify.h:15:0, > from include/linux/security.h:26, > from init/main.c:32: > include/linux/audit.h: In function ‘audit_syscall_exit’: > include/linux/audit.h:440:17: warning: dereferencing ‘void *’ pointer > include/linux/audit.h:440:3: error: invalid use of void expression > include/linux/audit.h:441:21: warning: dereferencing ‘void *’ pointer > include/linux/audit.h:441:21: error: void value not ignored as it ought to be > > Thanks, > //richard From eparis@redhat.com Fri Jun 3 01:08:40 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 03 Jun 2011 01:08:46 +0200 (CEST) Received: from mx1.redhat.com ([209.132.183.28]:41454 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491867Ab1FBXIk (ORCPT ); Fri, 3 Jun 2011 01:08:40 +0200 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p52N80Rr018290 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Thu, 2 Jun 2011 19:08:00 -0400 Received: from localhost.localdomain (vpn-11-52.rdu.redhat.com [10.11.11.52]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id p52N7ucf000563; Thu, 2 Jun 2011 19:07:56 -0400 Message-ID: <4DE817CC.80404@redhat.com> Date: Thu, 02 Jun 2011 19:07:56 -0400 From: Eric Paris User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.17) Gecko/20110428 Fedora/3.1.10-1.fc15 Lightning/1.0b3pre Thunderbird/3.1.10 MIME-Version: 1.0 To: Tony Luck CC: Richard Weinberger , linux-kernel@vger.kernel.org, fenghua.yu@intel.com, monstr@monstr.eu, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, schwidefsky@de.ibm.com, heiko.carstens@de.ibm.com, linux390@de.ibm.com, lethal@linux-sh.org, davem@davemloft.net, jdike@addtoit.com, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, viro@zeniv.linux.org.uk, oleg@redhat.com, akpm@linux-foundation.org, linux-ia64@vger.kernel.org, microblaze-uclinux@itee.uq.edu.au, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net Subject: Re: [PATCH] Audit: push audit success and retcode into arch ptrace.h References: <20110602210458.23613.24076.stgit@paris.rdu.redhat.com> <201106030032.17398.richard@nod.at> In-Reply-To: Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 8bit X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-archive-position: 30203 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: eparis@redhat.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2199 Content-Length: 1710 Lines: 37 On 06/02/2011 07:00 PM, Tony Luck wrote: >> But there seems to be another problem. >> Why is pt_regs of type void *? >> >> gcc complains: >> In file included from include/linux/fsnotify.h:15:0, >> from include/linux/security.h:26, >> from init/main.c:32: >> include/linux/audit.h: In function audit_syscall_exit: >> include/linux/audit.h:440:17: warning: dereferencing void * pointer >> include/linux/audit.h:440:3: error: invalid use of void expression >> include/linux/audit.h:441:21: warning: dereferencing void * pointer >> include/linux/audit.h:441:21: error: void value not ignored as it ought to be > > Perhaps same issue on ia64 - but symptoms are different: > > CC crypto/cipher.o > In file included from include/linux/fsnotify.h:15, > from include/linux/security.h:26, > from init/do_mounts.c:8: > include/linux/audit.h: In function audit_syscall_exit: > include/linux/audit.h:440: warning: dereferencing void * pointer > include/linux/audit.h:440: error: request for member r10 in > something not a structure or union > include/linux/audit.h:441: error: request for member r10 in > something not a structure or union > include/linux/audit.h:441: error: request for member r8 in something > not a structure or union > include/linux/audit.h:441: error: request for member r8 in something > not a structure or union > include/linux/audit.h:441: error: expected ; before } token > include/linux/audit.h:441: error: void value not ignored as it ought to be I think it is the same problem. I'll redo the patch with typed static inlines instead of #defines and all of this should hopefully work out. -Eric From lars@metafoo.de Fri Jun 3 03:08:33 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 03 Jun 2011 03:08:39 +0200 (CEST) Received: from smtp-out-212.synserver.de ([212.40.185.212]:1639 "EHLO smtp-out-212.synserver.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491868Ab1FCBId (ORCPT ); Fri, 3 Jun 2011 03:08:33 +0200 Received: (qmail 8603 invoked by uid 0); 3 Jun 2011 01:08:28 -0000 X-SynServer-TrustedSrc: 1 X-SynServer-AuthUser: lars@laprican.de X-SynServer-PPID: 8419 Received: from e177148193.adsl.alicedsl.de (HELO lars-laptop.nons.lan) [85.177.148.193] by 217.119.54.87 with SMTP; 3 Jun 2011 01:08:28 -0000 From: Lars-Peter Clausen To: Ralf Baechle Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, "Rafael J. Wysocki" , Lars-Peter Clausen Subject: [PATCH 1/4] PM / MIPS: Use struct syscore_ops instead of sysdevs for PM (v2) Date: Fri, 3 Jun 2011 03:06:48 +0200 Message-Id: <1307063211-10098-1-git-send-email-lars@metafoo.de> X-Mailer: git-send-email 1.7.2.5 X-archive-position: 30204 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: lars@metafoo.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2242 Content-Length: 3844 Lines: 135 From: Rafael J. Wysocki Convert some MIPS architecture's code to using struct syscore_ops objects for power management instead of sysdev classes and sysdevs. This simplifies the code and reduces the kernel's memory footprint. It also is necessary for removing sysdevs from the kernel entirely in the future. Signed-off-by: Rafael J. Wysocki Acked-by: Greg Kroah-Hartman Acked-and-tested-by: Lars-Peter Clausen Signed-off-by: Lars-Peter Clausen --- arch/mips/jz4740/gpio.c | 52 +++++++++++++++++++--------------------------- 1 files changed, 22 insertions(+), 30 deletions(-) diff --git a/arch/mips/jz4740/gpio.c b/arch/mips/jz4740/gpio.c index 73031f7..4397972 100644 --- a/arch/mips/jz4740/gpio.c +++ b/arch/mips/jz4740/gpio.c @@ -18,7 +18,7 @@ #include #include -#include +#include #include #include #include @@ -86,7 +86,6 @@ struct jz_gpio_chip { spinlock_t lock; struct gpio_chip gpio_chip; - struct sys_device sysdev; }; static struct jz_gpio_chip jz4740_gpio_chips[]; @@ -459,49 +458,47 @@ static struct jz_gpio_chip jz4740_gpio_chips[] = { JZ4740_GPIO_CHIP(D), }; -static inline struct jz_gpio_chip *sysdev_to_chip(struct sys_device *dev) +static void jz4740_gpio_suspend_chip(struct jz_gpio_chip *chip) { - return container_of(dev, struct jz_gpio_chip, sysdev); + chip->suspend_mask = readl(chip->base + JZ_REG_GPIO_MASK); + writel(~(chip->wakeup), chip->base + JZ_REG_GPIO_MASK_SET); + writel(chip->wakeup, chip->base + JZ_REG_GPIO_MASK_CLEAR); } -static int jz4740_gpio_suspend(struct sys_device *dev, pm_message_t state) +static int jz4740_gpio_suspend(void) { - struct jz_gpio_chip *chip = sysdev_to_chip(dev); + int i; - chip->suspend_mask = readl(chip->base + JZ_REG_GPIO_MASK); - writel(~(chip->wakeup), chip->base + JZ_REG_GPIO_MASK_SET); - writel(chip->wakeup, chip->base + JZ_REG_GPIO_MASK_CLEAR); + for (i = 0; i < ARRAY_SIZE(jz4740_gpio_chips); i++) + jz4740_gpio_suspend_chip(&jz4740_gpio_chips[i]); return 0; } -static int jz4740_gpio_resume(struct sys_device *dev) +static void jz4740_gpio_resume_chip(struct jz_gpio_chip *chip) { - struct jz_gpio_chip *chip = sysdev_to_chip(dev); uint32_t mask = chip->suspend_mask; writel(~mask, chip->base + JZ_REG_GPIO_MASK_CLEAR); writel(mask, chip->base + JZ_REG_GPIO_MASK_SET); +} - return 0; +static void jz4740_gpio_resume(void) +{ + int i; + + for (i = ARRAY_SIZE(jz4740_gpio_chips) - 1; i >= 0 ; i--) + jz4740_gpio_resume_chip(&jz4740_gpio_chips[i]); } -static struct sysdev_class jz4740_gpio_sysdev_class = { - .name = "gpio", +static struct syscore_ops jz4740_gpio_syscore_ops = { .suspend = jz4740_gpio_suspend, .resume = jz4740_gpio_resume, }; -static int jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id) +static void jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id) { - int ret, irq; - - chip->sysdev.id = id; - chip->sysdev.cls = &jz4740_gpio_sysdev_class; - ret = sysdev_register(&chip->sysdev); - - if (ret) - return ret; + int irq; spin_lock_init(&chip->lock); @@ -519,22 +516,17 @@ static int jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id) irq_set_chip_and_handler(irq, &jz_gpio_irq_chip, handle_level_irq); } - - return 0; } static int __init jz4740_gpio_init(void) { unsigned int i; - int ret; - - ret = sysdev_class_register(&jz4740_gpio_sysdev_class); - if (ret) - return ret; for (i = 0; i < ARRAY_SIZE(jz4740_gpio_chips); ++i) jz4740_gpio_chip_init(&jz4740_gpio_chips[i], i); + register_syscore_ops(&jz4740_gpio_syscore_ops); + printk(KERN_INFO "JZ4740 GPIO initialized\n"); return 0; -- 1.7.2.5 From lars@metafoo.de Fri Jun 3 03:08:34 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 03 Jun 2011 03:09:03 +0200 (CEST) Received: from smtp-out-212.synserver.de ([212.40.185.212]:1449 "EHLO smtp-out-212.synserver.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491871Ab1FCBIe (ORCPT ); Fri, 3 Jun 2011 03:08:34 +0200 Received: (qmail 8691 invoked by uid 0); 3 Jun 2011 01:08:29 -0000 X-SynServer-TrustedSrc: 1 X-SynServer-AuthUser: lars@laprican.de X-SynServer-PPID: 8419 Received: from e177148193.adsl.alicedsl.de (HELO lars-laptop.nons.lan) [85.177.148.193] by 217.119.54.87 with SMTP; 3 Jun 2011 01:08:29 -0000 From: Lars-Peter Clausen To: Ralf Baechle Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, Lars-Peter Clausen Subject: [PATCH 3/4] MIPS: JZ4740: GPIO: Simplify IRQ demuxer Date: Fri, 3 Jun 2011 03:06:50 +0200 Message-Id: <1307063211-10098-3-git-send-email-lars@metafoo.de> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1307063211-10098-1-git-send-email-lars@metafoo.de> References: <1307063211-10098-1-git-send-email-lars@metafoo.de> X-archive-position: 30205 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: lars@metafoo.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2245 Content-Length: 980 Lines: 39 We already know the base IRQ for a GPIO chip, so there is no need to recalculate it in the demux handler. Signed-off-by: Lars-Peter Clausen --- arch/mips/jz4740/gpio.c | 8 +------- 1 files changed, 1 insertions(+), 7 deletions(-) diff --git a/arch/mips/jz4740/gpio.c b/arch/mips/jz4740/gpio.c index ab583b8..f3590a2 100644 --- a/arch/mips/jz4740/gpio.c +++ b/arch/mips/jz4740/gpio.c @@ -301,22 +301,16 @@ static void jz_gpio_irq_demux_handler(unsigned int irq, struct irq_desc *desc) { uint32_t flag; unsigned int gpio_irq; - unsigned int gpio_bank; struct jz_gpio_chip *chip = irq_desc_get_handler_data(desc); - gpio_bank = JZ4740_IRQ_GPIO0 - irq; - flag = readl(chip->base + JZ_REG_GPIO_FLAG); - if (!flag) return; - gpio_irq = __fls(flag); + gpio_irq = chip->irq_base + __fls(flag); jz_gpio_check_trigger_both(chip, irq); - gpio_irq += (gpio_bank << 5) + JZ4740_IRQ_GPIO(0); - generic_handle_irq(gpio_irq); }; -- 1.7.2.5 From lars@metafoo.de Fri Jun 3 03:08:34 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 03 Jun 2011 03:09:28 +0200 (CEST) Received: from smtp-out-212.synserver.de ([212.40.185.212]:1398 "EHLO smtp-out-212.synserver.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491873Ab1FCBIe (ORCPT ); Fri, 3 Jun 2011 03:08:34 +0200 Received: (qmail 8720 invoked by uid 0); 3 Jun 2011 01:08:30 -0000 X-SynServer-TrustedSrc: 1 X-SynServer-AuthUser: lars@laprican.de X-SynServer-PPID: 8419 Received: from e177148193.adsl.alicedsl.de (HELO lars-laptop.nons.lan) [85.177.148.193] by 217.119.54.87 with SMTP; 3 Jun 2011 01:08:30 -0000 From: Lars-Peter Clausen To: Ralf Baechle Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, Lars-Peter Clausen Subject: [PATCH 4/4] MIPS: JZ4740: GPIO: Check correct IRQ in demux handler Date: Fri, 3 Jun 2011 03:06:51 +0200 Message-Id: <1307063211-10098-4-git-send-email-lars@metafoo.de> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1307063211-10098-1-git-send-email-lars@metafoo.de> References: <1307063211-10098-1-git-send-email-lars@metafoo.de> X-archive-position: 30206 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: lars@metafoo.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2246 Content-Length: 657 Lines: 23 Check the trigger direction for the triggered IRQ instead of the parent IRQ. Signed-off-by: Lars-Peter Clausen --- arch/mips/jz4740/gpio.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/mips/jz4740/gpio.c b/arch/mips/jz4740/gpio.c index f3590a2..7179c78 100644 --- a/arch/mips/jz4740/gpio.c +++ b/arch/mips/jz4740/gpio.c @@ -309,7 +309,7 @@ static void jz_gpio_irq_demux_handler(unsigned int irq, struct irq_desc *desc) gpio_irq = chip->irq_base + __fls(flag); - jz_gpio_check_trigger_both(chip, irq); + jz_gpio_check_trigger_both(chip, gpio_irq); generic_handle_irq(gpio_irq); }; -- 1.7.2.5 From lars@metafoo.de Fri Jun 3 03:08:36 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 03 Jun 2011 03:09:51 +0200 (CEST) Received: from smtp-out-212.synserver.de ([212.40.185.212]:1334 "EHLO smtp-out-212.synserver.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491874Ab1FCBIg (ORCPT ); Fri, 3 Jun 2011 03:08:36 +0200 Received: (qmail 8653 invoked by uid 0); 3 Jun 2011 01:08:29 -0000 X-SynServer-TrustedSrc: 1 X-SynServer-AuthUser: lars@laprican.de X-SynServer-PPID: 8419 Received: from e177148193.adsl.alicedsl.de (HELO lars-laptop.nons.lan) [85.177.148.193] by 217.119.54.87 with SMTP; 3 Jun 2011 01:08:28 -0000 From: Lars-Peter Clausen To: Ralf Baechle Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, Lars-Peter Clausen , Thomas Gleixner Subject: [PATCH 2/4] MIPS: JZ4740: Use generic irq chip Date: Fri, 3 Jun 2011 03:06:49 +0200 Message-Id: <1307063211-10098-2-git-send-email-lars@metafoo.de> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1307063211-10098-1-git-send-email-lars@metafoo.de> References: <1307063211-10098-1-git-send-email-lars@metafoo.de> X-archive-position: 30207 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: lars@metafoo.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2247 Content-Length: 12810 Lines: 437 Use the generic irq chip framework to implement the jz4740 INTC and GPIO irq chips. Signed-off-by: Lars-Peter Clausen Cc: Thomas Gleixner --- arch/mips/Kconfig | 1 + arch/mips/jz4740/gpio.c | 130 +++++++++++++---------------------------------- arch/mips/jz4740/irq.c | 92 ++++++++++++++------------------- arch/mips/jz4740/irq.h | 6 ++- arch/mips/jz4740/pm.c | 3 - 5 files changed, 79 insertions(+), 153 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 653da62..cec11bb 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -211,6 +211,7 @@ config MACH_JZ4740 select SYS_HAS_EARLY_PRINTK select HAVE_PWM select HAVE_CLK + select GENERIC_IRQ_CHIP config LANTIQ bool "Lantiq based platforms" diff --git a/arch/mips/jz4740/gpio.c b/arch/mips/jz4740/gpio.c index 4397972..ab583b8 100644 --- a/arch/mips/jz4740/gpio.c +++ b/arch/mips/jz4740/gpio.c @@ -17,8 +17,6 @@ #include #include -#include -#include #include #include #include @@ -30,6 +28,8 @@ #include +#include "irq.h" + #define JZ4740_GPIO_BASE_A (32*0) #define JZ4740_GPIO_BASE_B (32*1) #define JZ4740_GPIO_BASE_C (32*2) @@ -77,14 +77,10 @@ struct jz_gpio_chip { unsigned int irq; unsigned int irq_base; - uint32_t wakeup; - uint32_t suspend_mask; uint32_t edge_trigger_both; void __iomem *base; - spinlock_t lock; - struct gpio_chip gpio_chip; }; @@ -102,7 +98,8 @@ static inline struct jz_gpio_chip *gpio_chip_to_jz_gpio_chip(struct gpio_chip *g static inline struct jz_gpio_chip *irq_to_jz_gpio_chip(struct irq_data *data) { - return irq_data_get_irq_chip_data(data); + struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); + return gc->private; } static inline void jz_gpio_write_bit(unsigned int gpio, unsigned int reg) @@ -329,18 +326,12 @@ static inline void jz_gpio_set_irq_bit(struct irq_data *data, unsigned int reg) writel(IRQ_TO_BIT(data->irq), chip->base + reg); } -static void jz_gpio_irq_mask(struct irq_data *data) -{ - jz_gpio_set_irq_bit(data, JZ_REG_GPIO_MASK_SET); -}; - static void jz_gpio_irq_unmask(struct irq_data *data) { struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(data); jz_gpio_check_trigger_both(chip, data->irq); - - jz_gpio_set_irq_bit(data, JZ_REG_GPIO_MASK_CLEAR); + irq_gc_unmask_enable_reg(data); }; /* TODO: Check if function is gpio */ @@ -353,18 +344,13 @@ static unsigned int jz_gpio_irq_startup(struct irq_data *data) static void jz_gpio_irq_shutdown(struct irq_data *data) { - jz_gpio_irq_mask(data); + irq_gc_mask_disable_reg(data); /* Set direction to input */ jz_gpio_set_irq_bit(data, JZ_REG_GPIO_DIRECTION_CLEAR); jz_gpio_set_irq_bit(data, JZ_REG_GPIO_SELECT_CLEAR); } -static void jz_gpio_irq_ack(struct irq_data *data) -{ - jz_gpio_set_irq_bit(data, JZ_REG_GPIO_FLAG_CLEAR); -}; - static int jz_gpio_irq_set_type(struct irq_data *data, unsigned int flow_type) { struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(data); @@ -408,35 +394,13 @@ static int jz_gpio_irq_set_type(struct irq_data *data, unsigned int flow_type) static int jz_gpio_irq_set_wake(struct irq_data *data, unsigned int on) { struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(data); - spin_lock(&chip->lock); - if (on) - chip->wakeup |= IRQ_TO_BIT(data->irq); - else - chip->wakeup &= ~IRQ_TO_BIT(data->irq); - spin_unlock(&chip->lock); + irq_gc_set_wake(data, on); irq_set_irq_wake(chip->irq, on); + return 0; } -static struct irq_chip jz_gpio_irq_chip = { - .name = "GPIO", - .irq_mask = jz_gpio_irq_mask, - .irq_unmask = jz_gpio_irq_unmask, - .irq_ack = jz_gpio_irq_ack, - .irq_startup = jz_gpio_irq_startup, - .irq_shutdown = jz_gpio_irq_shutdown, - .irq_set_type = jz_gpio_irq_set_type, - .irq_set_wake = jz_gpio_irq_set_wake, - .flags = IRQCHIP_SET_TYPE_MASKED, -}; - -/* - * This lock class tells lockdep that GPIO irqs are in a different - * category than their parents, so it won't report false recursion. - */ -static struct lock_class_key gpio_lock_class; - #define JZ4740_GPIO_CHIP(_bank) { \ .irq_base = JZ4740_IRQ_GPIO_BASE_ ## _bank, \ .gpio_chip = { \ @@ -458,64 +422,44 @@ static struct jz_gpio_chip jz4740_gpio_chips[] = { JZ4740_GPIO_CHIP(D), }; -static void jz4740_gpio_suspend_chip(struct jz_gpio_chip *chip) -{ - chip->suspend_mask = readl(chip->base + JZ_REG_GPIO_MASK); - writel(~(chip->wakeup), chip->base + JZ_REG_GPIO_MASK_SET); - writel(chip->wakeup, chip->base + JZ_REG_GPIO_MASK_CLEAR); -} - -static int jz4740_gpio_suspend(void) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(jz4740_gpio_chips); i++) - jz4740_gpio_suspend_chip(&jz4740_gpio_chips[i]); - - return 0; -} - -static void jz4740_gpio_resume_chip(struct jz_gpio_chip *chip) +static void jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id) { - uint32_t mask = chip->suspend_mask; + struct irq_chip_generic *gc; + struct irq_chip_type *ct; - writel(~mask, chip->base + JZ_REG_GPIO_MASK_CLEAR); - writel(mask, chip->base + JZ_REG_GPIO_MASK_SET); -} + chip->base = ioremap(JZ4740_GPIO_BASE_ADDR + (id * 0x100), 0x100); -static void jz4740_gpio_resume(void) -{ - int i; + chip->irq = JZ4740_IRQ_INTC_GPIO(id); + irq_set_handler_data(chip->irq, chip); + irq_set_chained_handler(chip->irq, jz_gpio_irq_demux_handler); - for (i = ARRAY_SIZE(jz4740_gpio_chips) - 1; i >= 0 ; i--) - jz4740_gpio_resume_chip(&jz4740_gpio_chips[i]); -} + gc = irq_alloc_generic_chip(chip->gpio_chip.label, 1, chip->irq_base, + chip->base, handle_level_irq); -static struct syscore_ops jz4740_gpio_syscore_ops = { - .suspend = jz4740_gpio_suspend, - .resume = jz4740_gpio_resume, -}; + gc->wake_enabled = IRQ_MSK(chip->gpio_chip.ngpio); + gc->private = chip; -static void jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id) -{ - int irq; + ct = gc->chip_types; + ct->regs.enable = JZ_REG_GPIO_MASK_CLEAR; + ct->regs.disable = JZ_REG_GPIO_MASK_SET; + ct->regs.ack = JZ_REG_GPIO_FLAG_CLEAR; - spin_lock_init(&chip->lock); + ct->chip.name = "GPIO"; + ct->chip.irq_mask = irq_gc_mask_disable_reg; + ct->chip.irq_unmask = jz_gpio_irq_unmask; + ct->chip.irq_ack = irq_gc_ack; + ct->chip.irq_suspend = jz4740_irq_suspend; + ct->chip.irq_resume = jz4740_irq_resume; + ct->chip.irq_startup = jz_gpio_irq_startup; + ct->chip.irq_shutdown = jz_gpio_irq_shutdown; + ct->chip.irq_set_type = jz_gpio_irq_set_type; + ct->chip.irq_set_wake = jz_gpio_irq_set_wake; + ct->chip.flags = IRQCHIP_SET_TYPE_MASKED; - chip->base = ioremap(JZ4740_GPIO_BASE_ADDR + (id * 0x100), 0x100); + irq_setup_generic_chip(gc, IRQ_MSK(chip->gpio_chip.ngpio), + IRQ_GC_INIT_NESTED_LOCK, 0, IRQ_NOPROBE | IRQ_LEVEL); gpiochip_add(&chip->gpio_chip); - - chip->irq = JZ4740_IRQ_INTC_GPIO(id); - irq_set_handler_data(chip->irq, chip); - irq_set_chained_handler(chip->irq, jz_gpio_irq_demux_handler); - - for (irq = chip->irq_base; irq < chip->irq_base + chip->gpio_chip.ngpio; ++irq) { - irq_set_lockdep_class(irq, &gpio_lock_class); - irq_set_chip_data(irq, chip); - irq_set_chip_and_handler(irq, &jz_gpio_irq_chip, - handle_level_irq); - } } static int __init jz4740_gpio_init(void) @@ -525,8 +469,6 @@ static int __init jz4740_gpio_init(void) for (i = 0; i < ARRAY_SIZE(jz4740_gpio_chips); ++i) jz4740_gpio_chip_init(&jz4740_gpio_chips[i], i); - register_syscore_ops(&jz4740_gpio_syscore_ops); - printk(KERN_INFO "JZ4740 GPIO initialized\n"); return 0; diff --git a/arch/mips/jz4740/irq.c b/arch/mips/jz4740/irq.c index d82c0c4..fc57ded 100644 --- a/arch/mips/jz4740/irq.c +++ b/arch/mips/jz4740/irq.c @@ -32,8 +32,6 @@ #include static void __iomem *jz_intc_base; -static uint32_t jz_intc_wakeup; -static uint32_t jz_intc_saved; #define JZ_REG_INTC_STATUS 0x00 #define JZ_REG_INTC_MASK 0x04 @@ -41,51 +39,36 @@ static uint32_t jz_intc_saved; #define JZ_REG_INTC_CLEAR_MASK 0x0c #define JZ_REG_INTC_PENDING 0x10 -#define IRQ_BIT(x) BIT((x) - JZ4740_IRQ_BASE) - -static inline unsigned long intc_irq_bit(struct irq_data *data) +static irqreturn_t jz4740_cascade(int irq, void *data) { - return (unsigned long)irq_data_get_irq_chip_data(data); -} + uint32_t irq_reg; -static void intc_irq_unmask(struct irq_data *data) -{ - writel(intc_irq_bit(data), jz_intc_base + JZ_REG_INTC_CLEAR_MASK); -} + irq_reg = readl(jz_intc_base + JZ_REG_INTC_PENDING); -static void intc_irq_mask(struct irq_data *data) -{ - writel(intc_irq_bit(data), jz_intc_base + JZ_REG_INTC_SET_MASK); + if (irq_reg) + generic_handle_irq(__fls(irq_reg) + JZ4740_IRQ_BASE); + + return IRQ_HANDLED; } -static int intc_irq_set_wake(struct irq_data *data, unsigned int on) +static void jz4740_irq_set_mask(struct irq_chip_generic *gc, uint32_t mask) { - if (on) - jz_intc_wakeup |= intc_irq_bit(data); - else - jz_intc_wakeup &= ~intc_irq_bit(data); + struct irq_chip_regs *regs = &gc->chip_types->regs; - return 0; + writel(mask, gc->reg_base + regs->enable); + writel(~mask, gc->reg_base + regs->disable); } -static struct irq_chip intc_irq_type = { - .name = "INTC", - .irq_mask = intc_irq_mask, - .irq_mask_ack = intc_irq_mask, - .irq_unmask = intc_irq_unmask, - .irq_set_wake = intc_irq_set_wake, -}; - -static irqreturn_t jz4740_cascade(int irq, void *data) +void jz4740_irq_suspend(struct irq_data *data) { - uint32_t irq_reg; - - irq_reg = readl(jz_intc_base + JZ_REG_INTC_PENDING); - - if (irq_reg) - generic_handle_irq(__fls(irq_reg) + JZ4740_IRQ_BASE); + struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); + jz4740_irq_set_mask(gc, gc->wake_active); +} - return IRQ_HANDLED; +void jz4740_irq_resume(struct irq_data *data) +{ + struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); + jz4740_irq_set_mask(gc, gc->mask_cache); } static struct irqaction jz4740_cascade_action = { @@ -95,7 +78,9 @@ static struct irqaction jz4740_cascade_action = { void __init arch_init_irq(void) { - int i; + struct irq_chip_generic *gc; + struct irq_chip_type *ct; + mips_cpu_irq_init(); jz_intc_base = ioremap(JZ4740_INTC_BASE_ADDR, 0x14); @@ -103,10 +88,22 @@ void __init arch_init_irq(void) /* Mask all irqs */ writel(0xffffffff, jz_intc_base + JZ_REG_INTC_SET_MASK); - for (i = JZ4740_IRQ_BASE; i < JZ4740_IRQ_BASE + 32; i++) { - irq_set_chip_data(i, (void *)IRQ_BIT(i)); - irq_set_chip_and_handler(i, &intc_irq_type, handle_level_irq); - } + gc = irq_alloc_generic_chip("INTC", 1, JZ4740_IRQ_BASE, jz_intc_base, + handle_level_irq); + + gc->wake_enabled = IRQ_MSK(32); + + ct = gc->chip_types; + ct->regs.enable = JZ_REG_INTC_CLEAR_MASK; + ct->regs.disable = JZ_REG_INTC_SET_MASK; + ct->chip.irq_unmask = irq_gc_unmask_enable_reg; + ct->chip.irq_mask = irq_gc_mask_disable_reg; + ct->chip.irq_mask_ack = irq_gc_mask_disable_reg; + ct->chip.irq_set_wake = irq_gc_set_wake; + ct->chip.irq_suspend = jz4740_irq_suspend; + ct->chip.irq_resume = jz4740_irq_resume; + + irq_setup_generic_chip(gc, IRQ_MSK(32), 0, 0, IRQ_NOPROBE | IRQ_LEVEL); setup_irq(2, &jz4740_cascade_action); } @@ -122,19 +119,6 @@ asmlinkage void plat_irq_dispatch(void) spurious_interrupt(); } -void jz4740_intc_suspend(void) -{ - jz_intc_saved = readl(jz_intc_base + JZ_REG_INTC_MASK); - writel(~jz_intc_wakeup, jz_intc_base + JZ_REG_INTC_SET_MASK); - writel(jz_intc_wakeup, jz_intc_base + JZ_REG_INTC_CLEAR_MASK); -} - -void jz4740_intc_resume(void) -{ - writel(~jz_intc_saved, jz_intc_base + JZ_REG_INTC_CLEAR_MASK); - writel(jz_intc_saved, jz_intc_base + JZ_REG_INTC_SET_MASK); -} - #ifdef CONFIG_DEBUG_FS static inline void intc_seq_reg(struct seq_file *s, const char *name, diff --git a/arch/mips/jz4740/irq.h b/arch/mips/jz4740/irq.h index 56b5ead..f75e39d 100644 --- a/arch/mips/jz4740/irq.h +++ b/arch/mips/jz4740/irq.h @@ -15,7 +15,9 @@ #ifndef __MIPS_JZ4740_IRQ_H__ #define __MIPS_JZ4740_IRQ_H__ -extern void jz4740_intc_suspend(void); -extern void jz4740_intc_resume(void); +#include + +extern void jz4740_irq_suspend(struct irq_data *data); +extern void jz4740_irq_resume(struct irq_data *data); #endif diff --git a/arch/mips/jz4740/pm.c b/arch/mips/jz4740/pm.c index 902d5b5..6744fa7 100644 --- a/arch/mips/jz4740/pm.c +++ b/arch/mips/jz4740/pm.c @@ -21,11 +21,9 @@ #include #include "clock.h" -#include "irq.h" static int jz4740_pm_enter(suspend_state_t state) { - jz4740_intc_suspend(); jz4740_clock_suspend(); jz4740_clock_set_wait_mode(JZ4740_WAIT_MODE_SLEEP); @@ -37,7 +35,6 @@ static int jz4740_pm_enter(suspend_state_t state) jz4740_clock_set_wait_mode(JZ4740_WAIT_MODE_IDLE); jz4740_clock_resume(); - jz4740_intc_resume(); return 0; } -- 1.7.2.5 From ralf@linux-mips.org Fri Jun 3 20:00:46 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 03 Jun 2011 20:00:49 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:42293 "EHLO duck.linux-mips.net" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491088Ab1FCSAq (ORCPT ); Fri, 3 Jun 2011 20:00:46 +0200 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.3) with ESMTP id p53I0eTj010963; Fri, 3 Jun 2011 19:00:40 +0100 Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id p53I0cSt010959; Fri, 3 Jun 2011 19:00:38 +0100 Date: Fri, 3 Jun 2011 19:00:38 +0100 From: Ralf Baechle To: Gerhard Pircher Cc: linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-alpha@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, Thomas Gleixner , Benjamin Herrenschmidt Subject: Re: [patch 00/14] Sort out i8253 and PC speaker locking and headers Message-ID: <20110603180038.GA13239@linux-mips.org> References: <20110601180456.801265664@duck.linux-mips.net> <20110602191119.302850@gmx.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20110602191119.302850@gmx.net> User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 30208 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2830 Content-Length: 3914 Lines: 108 On Thu, Jun 02, 2011 at 09:11:19PM +0200, Gerhard Pircher wrote: > > #if defined(CONFIG_MIPS) || defined(CONFIG_X86) > > /* Use the global PIT lock ! */ > > #include > > #else > > #include > > static DEFINE_RAW_SPINLOCK(i8253_lock); > > #endif > > > > sound/drivers/pcsp/pcsp.h: > > > > #if defined(CONFIG_MIPS) || defined(CONFIG_X86) > > /* Use the global PIT lock ! */ > > #include > > #else > > #include > > static DEFINE_RAW_SPINLOCK(i8253_lock); > > > > $ git grep -F pcsp.h sound/drivers/pcsp > > sound/drivers/pcsp/pcsp.c:#include "pcsp.h" > > sound/drivers/pcsp/pcsp_input.c:#include "pcsp.h" > > sound/drivers/pcsp/pcsp_lib.c:#include "pcsp.h" > > sound/drivers/pcsp/pcsp_mixer.c:#include "pcsp.h" > > $ git grep -w i8253_lock sound/drivers/pcsp/ > > sound/drivers/pcsp/pcsp.h:static DEFINE_RAW_SPINLOCK(i8253_lock); > > sound/drivers/pcsp/pcsp_input.c: raw_spin_lock_irqsave(&i8253_lock, > > flags > > sound/drivers/pcsp/pcsp_input.c: > > raw_spin_unlock_irqrestore(&i8253_lock, > > sound/drivers/pcsp/pcsp_lib.c: raw_spin_lock_irqsave(&i8253_lock, > > flags > > sound/drivers/pcsp/pcsp_lib.c: > > raw_spin_unlock_irqrestore(&i8253_lock, > > sound/drivers/pcsp/pcsp_lib.c: raw_spin_lock(&i8253_lock); > > sound/drivers/pcsp/pcsp_lib.c: raw_spin_unlock(&i8253_lock); > > sound/drivers/pcsp/pcsp_lib.c: raw_spin_lock(&i8253_lock); > > sound/drivers/pcsp/pcsp_lib.c: raw_spin_unlock(&i8253_lock); > > > > Locks are great, everybody should have their own lock! > > > > $ find . -name 8253pit.h > > ./arch/powerpc/include/asm/8253pit.h > > ./arch/alpha/include/asm/8253pit.h > > $ cat arch/*/include/asm/8253pit.h > > /* > > * 8253/8254 Programmable Interval Timer > > */ > > /* > > * 8253/8254 Programmable Interval Timer > > */ > > $ > > > > Eh... > > > > $ git grep -w PCSPKR_PLATFORM > > arch/mips/Kconfig: select PCSPKR_PLATFORM > > arch/mips/Kconfig: select PCSPKR_PLATFORM > > arch/mips/Kconfig: select PCSPKR_PLATFORM > > arch/powerpc/platforms/amigaone/Kconfig: select PCSPKR_PLATFORM > > drivers/input/misc/Kconfig: depends on PCSPKR_PLATFORM > > init/Kconfig:config PCSPKR_PLATFORM > > sound/drivers/Kconfig: depends on PCSPKR_PLATFORM && X86 && > > HIGH_RES_TIMERS > > > > So the status is: > > > > Alpha: There is no PCSPKR_PLATFORM so while a platform device is > > being installed no drivers will be built. I don't know > > which Alpha platforms or even if all of Alpha should be > > doing a PCSPKR_PLATFORM so I haven't even tried to sort > > this. > > ARM: No PC speaker supported, yeah :) > > PowerPC: Should compile but the locking is wrong but only the > > AmigaOne platforms should be affected. > The Kconfig dependencies cleanup patch for CHRP, PSERIES, etc. should > also apply to the AmigaOne. Can you resend it with a fix for the > AmigaOne, or should I send a patch? I can sort that; it's easy enough. > I'll check next week, if the PC speaker is still working on my AmigaOne. I can't imagine that it's going to break - the code is sorta simple ;-) One obscurity I noticed is this bit in the amigaone.dts: timer@40 { // Also adds pcspkr to platform devices. compatible = "pnpPNP,100"; reg = <1 0x00000040 0x00000020>; }; Shouldn't that rather be something like the following? pcspeaker@61 { device_type = "sound"; compatible = "pnpPNP,800"; reg = <1 0x61 1>; }; pnpPNP,100 is the i8253 timer as I understand and pnpPNP,800 the PC speaker. If you interpret pnpPNP,100 to imply the presence of a PC speaker you can't express a system that has a i8253 but no PCspeaker in a DT so maybe amigaone.dts and arch/powerpc/kernel/setup-common.c should be changed to use pnpPNP,800 instead? Ralf From gerhard_pircher@gmx.net Fri Jun 3 21:22:39 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 03 Jun 2011 21:22:43 +0200 (CEST) Received: from mailout-de.gmx.net ([213.165.64.23]:35567 "HELO mailout-de.gmx.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with SMTP id S1491191Ab1FCTWj (ORCPT ); Fri, 3 Jun 2011 21:22:39 +0200 Received: (qmail 14544 invoked by uid 0); 3 Jun 2011 19:22:32 -0000 Received: from 79.6.110.179 by www063.gmx.net with HTTP; Fri, 03 Jun 2011 21:22:30 +0200 (CEST) Cc: benh@kernel.crashing.org, tglx@linutronix.de, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-alpha@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org Content-Type: text/plain; charset="utf-8" Date: Fri, 03 Jun 2011 21:22:30 +0200 From: "Gerhard Pircher" In-Reply-To: <20110603180038.GA13239@linux-mips.org> Message-ID: <20110603192230.246630@gmx.net> MIME-Version: 1.0 References: <20110601180456.801265664@duck.linux-mips.net> <20110602191119.302850@gmx.net> <20110603180038.GA13239@linux-mips.org> Subject: Re: [patch 00/14] Sort out i8253 and PC speaker locking and headers To: Ralf Baechle X-Authenticated: #6097454 X-Flags: 0001 X-Mailer: WWW-Mail 6100 (Global Message Exchange) X-Priority: 3 X-Provags-ID: V01U2FsdGVkX18K9bI4TecKnQl0LIFRJILuFBXWNwsVtPMNBnKxN0 cLVaDc6YahRvoVEjPYRfU8eyB/4h5dOBB2mQ== Content-Transfer-Encoding: 8bit X-GMX-UID: OUGIKT4Ba0A7Q09lKDEze/I/Njh6dA7z X-archive-position: 30209 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: gerhard_pircher@gmx.net Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2899 Content-Length: 5041 Lines: 130 -------- Original-Nachricht -------- > Datum: Fri, 3 Jun 2011 19:00:38 +0100 > Von: Ralf Baechle > An: Gerhard Pircher > CC: linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-alpha@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, Thomas Gleixner , Benjamin Herrenschmidt > Betreff: Re: [patch 00/14] Sort out i8253 and PC speaker locking and headers > On Thu, Jun 02, 2011 at 09:11:19PM +0200, Gerhard Pircher wrote: > > > > #if defined(CONFIG_MIPS) || defined(CONFIG_X86) > > > /* Use the global PIT lock ! */ > > > #include > > > #else > > > #include > > > static DEFINE_RAW_SPINLOCK(i8253_lock); > > > #endif > > > > > > sound/drivers/pcsp/pcsp.h: > > > > > > #if defined(CONFIG_MIPS) || defined(CONFIG_X86) > > > /* Use the global PIT lock ! */ > > > #include > > > #else > > > #include > > > static DEFINE_RAW_SPINLOCK(i8253_lock); > > > > > > $ git grep -F pcsp.h sound/drivers/pcsp > > > sound/drivers/pcsp/pcsp.c:#include "pcsp.h" > > > sound/drivers/pcsp/pcsp_input.c:#include "pcsp.h" > > > sound/drivers/pcsp/pcsp_lib.c:#include "pcsp.h" > > > sound/drivers/pcsp/pcsp_mixer.c:#include "pcsp.h" > > > $ git grep -w i8253_lock sound/drivers/pcsp/ > > > sound/drivers/pcsp/pcsp.h:static DEFINE_RAW_SPINLOCK(i8253_lock); > > > sound/drivers/pcsp/pcsp_input.c: > raw_spin_lock_irqsave(&i8253_lock, > > > flags > > > sound/drivers/pcsp/pcsp_input.c: > > > raw_spin_unlock_irqrestore(&i8253_lock, > > > sound/drivers/pcsp/pcsp_lib.c: > raw_spin_lock_irqsave(&i8253_lock, > > > flags > > > sound/drivers/pcsp/pcsp_lib.c: > > > raw_spin_unlock_irqrestore(&i8253_lock, > > > sound/drivers/pcsp/pcsp_lib.c: raw_spin_lock(&i8253_lock); > > > sound/drivers/pcsp/pcsp_lib.c: raw_spin_unlock(&i8253_lock); > > > sound/drivers/pcsp/pcsp_lib.c: raw_spin_lock(&i8253_lock); > > > sound/drivers/pcsp/pcsp_lib.c: raw_spin_unlock(&i8253_lock); > > > > > > Locks are great, everybody should have their own lock! > > > > > > $ find . -name 8253pit.h > > > ./arch/powerpc/include/asm/8253pit.h > > > ./arch/alpha/include/asm/8253pit.h > > > $ cat arch/*/include/asm/8253pit.h > > > /* > > > * 8253/8254 Programmable Interval Timer > > > */ > > > /* > > > * 8253/8254 Programmable Interval Timer > > > */ > > > $ > > > > > > Eh... > > > > > > $ git grep -w PCSPKR_PLATFORM > > > arch/mips/Kconfig: select PCSPKR_PLATFORM > > > arch/mips/Kconfig: select PCSPKR_PLATFORM > > > arch/mips/Kconfig: select PCSPKR_PLATFORM > > > arch/powerpc/platforms/amigaone/Kconfig: select PCSPKR_PLATFORM > > > drivers/input/misc/Kconfig: depends on PCSPKR_PLATFORM > > > init/Kconfig:config PCSPKR_PLATFORM > > > sound/drivers/Kconfig: depends on PCSPKR_PLATFORM && X86 && > > > HIGH_RES_TIMERS > > > > > > So the status is: > > > > > > Alpha: There is no PCSPKR_PLATFORM so while a platform device is > > > being installed no drivers will be built. I don't know > > > which Alpha platforms or even if all of Alpha should be > > > doing a PCSPKR_PLATFORM so I haven't even tried to sort > > > this. > > > ARM: No PC speaker supported, yeah :) > > > PowerPC: Should compile but the locking is wrong but only the > > > AmigaOne platforms should be affected. > > The Kconfig dependencies cleanup patch for CHRP, PSERIES, etc. should > > also apply to the AmigaOne. Can you resend it with a fix for the > > AmigaOne, or should I send a patch? > > I can sort that; it's easy enough. Thanks a lot! > > I'll check next week, if the PC speaker is still working on my > > AmigaOne. > > I can't imagine that it's going to break - the code is sorta simple ;-) That's true, but testing the most recent Linux kernel on the AmigaOne is never wrong. :-) > One obscurity I noticed is this bit in the amigaone.dts: > > timer@40 { > // Also adds pcspkr to platform devices. > compatible = "pnpPNP,100"; > reg = <1 0x00000040 0x00000020>; > }; > > Shouldn't that rather be something like the following? > > pcspeaker@61 { > device_type = "sound"; > compatible = "pnpPNP,800"; > reg = <1 0x61 1>; > }; > > pnpPNP,100 is the i8253 timer as I understand and pnpPNP,800 the PC > speaker. > If you interpret pnpPNP,100 to imply the presence of a PC speaker you > can't express a system that has a i8253 but no PCspeaker in a DT so > maybe amigaone.dts and arch/powerpc/kernel/setup-common.c should be > changed to use pnpPNP,800 instead? That would be cleaner, but I guess it would break CHRP and PSERIES. These platforms probably only provide a pnpPNP,100 entry in the device tree (at least that's the case on the Pegasos2 CHRP machine AFAICT). Gerhard -- NEU: FreePhone - kostenlos mobil telefonieren! Jetzt informieren: http://www.gmx.net/de/go/freephone From wad@chromium.org Fri Jun 3 22:32:34 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 03 Jun 2011 22:32:40 +0200 (CEST) Received: from mail-yw0-f49.google.com ([209.85.213.49]:55622 "EHLO mail-yw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491189Ab1FCUce (ORCPT ); Fri, 3 Jun 2011 22:32:34 +0200 Received: by ywf9 with SMTP id 9so1146209ywf.36 for ; Fri, 03 Jun 2011 13:32:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=domainkey-signature:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=n29JH1TGjiFRXdM7KNLghkbfZ4y73MIDKd3oAYdreSg=; b=W76YO/VWcOfUN0VrALLI2kpJHmbbR4lHjPweC4YC2Rfb1kgLNoqXu+SuxptmuFaLtO FXnk4JZ55QO/8PsStZnphgxUls3gyMBtdMgQKN438ikXz7z6c2ADvA8gx9/CB25aHT3O aSJbtKlVOAJXivecY1A571y2EheUZYWkwdjbQ= DomainKey-Signature: a=rsa-sha1; c=nofws; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=gWvKt5rJb9fouUM8U11I5NsH8YxrJqNGVWquTYk6SkldCLFLFQNB3i7yQnbKflezgy Be6sTEINRwhup+S2HhcEE6uTglOV7lsVaVG8F+Qvb7kVaM/DEA5Fri4V7VFAZ4flMZP3 m8OLNXY4wDYNFJ0+5z97Ma/Rwe+TixXlKrq6o= Received: by 10.151.28.1 with SMTP id f1mr2274252ybj.51.1307133148205; Fri, 03 Jun 2011 13:32:28 -0700 (PDT) Received: from localhost.localdomain (adsl-98-87-45-176.bna.bellsouth.net [98.87.45.176]) by mx.google.com with ESMTPS id i62sm1611097yhm.24.2011.06.03.13.32.26 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 03 Jun 2011 13:32:27 -0700 (PDT) From: Will Drewry To: linux-kernel@vger.kernel.org Cc: kees.cook@canonical.com, torvalds@linux-foundation.org, tglx@linutronix.de, mingo@elte.hu, rostedt@goodmis.org, jmorris@namei.org, paulmck@linux.vnet.ibm.com, Will Drewry , Ralf Baechle , linux-mips@linux-mips.org Subject: [PATCH v4 09/13] mips: select HAVE_SECCOMP_FILTER and provide seccomp_execve Date: Fri, 3 Jun 2011 15:34:08 -0500 Message-Id: <1307133252-23259-9-git-send-email-wad@chromium.org> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1307133252-23259-1-git-send-email-wad@chromium.org> References: <1307133252-23259-1-git-send-email-wad@chromium.org> X-archive-position: 30210 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wad@chromium.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2957 Content-Length: 1557 Lines: 52 Facilitate the use of CONFIG_SECCOMP_FILTER by wrapping compatibility system call numbering for execve and selecting HAVE_SECCOMP_FILTER. Signed-off-by: Will Drewry --- arch/mips/Kconfig | 1 + arch/mips/include/asm/seccomp.h | 3 +++ 2 files changed, 4 insertions(+), 0 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 8e256cc..d376f68 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -10,6 +10,7 @@ config MIPS select HAVE_ARCH_KGDB select HAVE_FUNCTION_TRACER select HAVE_FUNCTION_TRACE_MCOUNT_TEST + select HAVE_SECCOMP_FILTER select HAVE_DYNAMIC_FTRACE select HAVE_FTRACE_MCOUNT_RECORD select HAVE_C_RECORDMCOUNT diff --git a/arch/mips/include/asm/seccomp.h b/arch/mips/include/asm/seccomp.h index ae6306e..4014a3a 100644 --- a/arch/mips/include/asm/seccomp.h +++ b/arch/mips/include/asm/seccomp.h @@ -6,6 +6,7 @@ #define __NR_seccomp_write __NR_write #define __NR_seccomp_exit __NR_exit #define __NR_seccomp_sigreturn __NR_rt_sigreturn +#define __NR_seccomp_execve __NR_execve /* * Kludge alert: @@ -19,6 +20,7 @@ #define __NR_seccomp_write_32 4004 #define __NR_seccomp_exit_32 4001 #define __NR_seccomp_sigreturn_32 4193 /* rt_sigreturn */ +#define __NR_seccomp_execve_32 4011 #elif defined(CONFIG_MIPS32_N32) @@ -26,6 +28,7 @@ #define __NR_seccomp_write_32 6001 #define __NR_seccomp_exit_32 6058 #define __NR_seccomp_sigreturn_32 6211 /* rt_sigreturn */ +#define __NR_seccomp_execve_32 6057 #endif /* CONFIG_MIPS32_O32 */ -- 1.7.0.4 From eparis@redhat.com Sat Jun 4 00:06:09 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 04 Jun 2011 00:06:18 +0200 (CEST) Received: from mx1.redhat.com ([209.132.183.28]:44527 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491193Ab1FCWGJ (ORCPT ); Sat, 4 Jun 2011 00:06:09 +0200 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p53M4wt7015483 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Fri, 3 Jun 2011 18:04:58 -0400 Received: from paris.rdu.redhat.com (paris.rdu.redhat.com [10.11.231.241]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id p53M4pir019061; Fri, 3 Jun 2011 18:04:52 -0400 From: Eric Paris Subject: [PATCH -v2] Audit: push audit success and retcode into arch ptrace.h To: linux-kernel@vger.kernel.org Cc: tony.luck@intel.com, fenghua.yu@intel.com, monstr@monstr.eu, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, schwidefsky@de.ibm.com, heiko.carstens@de.ibm.com, linux390@de.ibm.com, lethal@linux-sh.org, davem@davemloft.net, jdike@addtoit.com, richard@nod.at, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, viro@zeniv.linux.org.uk, eparis@redhat.com, oleg@redhat.com, akpm@linux-foundation.org, linux-ia64@vger.kernel.org, microblaze-uclinux@itee.uq.edu.au, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net Date: Fri, 03 Jun 2011 18:04:51 -0400 Message-ID: <20110603220451.23134.47368.stgit@paris.rdu.redhat.com> User-Agent: StGIT/0.14.3 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-archive-position: 30211 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: eparis@redhat.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3022 Content-Length: 24284 Lines: 666 The audit system previously expected arches calling to audit_syscall_exit to supply as arguments if the syscall was a success and what the return code was. Audit also provides a helper AUDITSC_RESULT which was supposed to simplify things by converting from negative retcodes to an audit internal magic value stating success or failure. This helper was wrong and could indicate that a valid pointer returned to userspace was a failed syscall. The fix is to fix the layering foolishness. We now pass audit_syscall_exit a struct pt_reg and it in turns calls back into arch code to collect the return value and to determine if the syscall was a success or failure. We also define a generic is_syscall_success() macro which determines success/failure based on if the value is < -MAX_ERRNO. This works for arches like x86 which do not use a separate mechanism to indicate syscall failure. In arch/sh/kernel/ptrace_64.c I see that we were using regs[9] in the old audit code as the return value. But the ptrace_64.h code defined the macro regs_return_value() as regs[3]. I have no idea which one is correct, but this patch now uses the regs_return_value() function, so it now uses regs[3]. We make both the is_syscall_success() and regs_return_value() static inlines instead of macros. The reason is because the audit function must take a void* for the regs. (uml calls theirs struct uml_pt_regs instead of just struct pt_regs so audit_syscall_exit can't take a struct pt_regs). Since the audit function takes a void* we need to use static inlines to cast it back to the arch correct structure to dereference it. The other major change is that on some arches, like ia64, we change regs_return_value() to give us the negative value on syscall failure. The only other user of this macro, kretprobe_example.c, won't notice and it makes the value signed consistently for the audit functions across all archs. Signed-off-by: Eric Paris Acked-by: Acked-by: H. Peter Anvin [for x86 portion] --- arch/ia64/include/asm/ptrace.h | 13 ++++++++++++- arch/ia64/kernel/ptrace.c | 9 +-------- arch/microblaze/include/asm/ptrace.h | 5 +++++ arch/microblaze/kernel/ptrace.c | 3 +-- arch/mips/include/asm/ptrace.h | 14 +++++++++++++- arch/mips/kernel/ptrace.c | 4 +--- arch/powerpc/include/asm/ptrace.h | 10 +++++++++- arch/powerpc/kernel/ptrace.c | 4 +--- arch/s390/include/asm/ptrace.h | 6 +++++- arch/s390/kernel/ptrace.c | 4 +--- arch/sh/include/asm/ptrace_32.h | 5 ++++- arch/sh/include/asm/ptrace_64.h | 5 ++++- arch/sh/kernel/ptrace_32.c | 4 +--- arch/sh/kernel/ptrace_64.c | 4 +--- arch/sparc/include/asm/ptrace.h | 10 +++++++++- arch/sparc/kernel/ptrace_64.c | 11 +---------- arch/um/kernel/ptrace.c | 4 ++-- arch/um/sys-i386/shared/sysdep/ptrace.h | 4 ++++ arch/um/sys-x86_64/shared/sysdep/ptrace.h | 4 ++++ arch/x86/ia32/ia32entry.S | 10 +++++----- arch/x86/kernel/entry_32.S | 8 ++++---- arch/x86/kernel/entry_64.S | 10 +++++----- arch/x86/kernel/ptrace.c | 3 +-- arch/x86/kernel/vm86_32.c | 4 ++-- include/linux/audit.h | 22 ++++++++++++++-------- include/linux/ptrace.h | 10 ++++++++++ kernel/auditsc.c | 16 ++++++++++++---- 27 files changed, 132 insertions(+), 74 deletions(-) diff --git a/arch/ia64/include/asm/ptrace.h b/arch/ia64/include/asm/ptrace.h index 7ae9c3f..801ee1a 100644 --- a/arch/ia64/include/asm/ptrace.h +++ b/arch/ia64/include/asm/ptrace.h @@ -246,7 +246,18 @@ static inline unsigned long user_stack_pointer(struct pt_regs *regs) return regs->ar_bspstore; } -#define regs_return_value(regs) ((regs)->r8) +static inline int is_syscall_success(struct pt_regs *regs) +{ + return regs->r10 != -1; +} + +static inline long regs_return_value(struct pt_regs *regs) +{ + if (is_syscall_success(regs)) + return regs->r8; + else + return -regs->r8; +} /* Conserve space in histogram by encoding slot bits in address * bits 2 and 3 rather than bits 0 and 1. diff --git a/arch/ia64/kernel/ptrace.c b/arch/ia64/kernel/ptrace.c index 8848f43..2c15408 100644 --- a/arch/ia64/kernel/ptrace.c +++ b/arch/ia64/kernel/ptrace.c @@ -1268,14 +1268,7 @@ syscall_trace_leave (long arg0, long arg1, long arg2, long arg3, { int step; - if (unlikely(current->audit_context)) { - int success = AUDITSC_RESULT(regs.r10); - long result = regs.r8; - - if (success != AUDITSC_SUCCESS) - result = -result; - audit_syscall_exit(success, result); - } + audit_syscall_exit(®s); step = test_thread_flag(TIF_SINGLESTEP); if (step || test_thread_flag(TIF_SYSCALL_TRACE)) diff --git a/arch/microblaze/include/asm/ptrace.h b/arch/microblaze/include/asm/ptrace.h index d9b6630..bec1c74 100644 --- a/arch/microblaze/include/asm/ptrace.h +++ b/arch/microblaze/include/asm/ptrace.h @@ -61,6 +61,11 @@ struct pt_regs { #define instruction_pointer(regs) ((regs)->pc) #define profile_pc(regs) instruction_pointer(regs) +static inline long regs_return_value(struct pt_regs *regs) +{ + return regs->r3; +} + void show_regs(struct pt_regs *); #else /* __KERNEL__ */ diff --git a/arch/microblaze/kernel/ptrace.c b/arch/microblaze/kernel/ptrace.c index 6a8e0cc..9747fa5 100644 --- a/arch/microblaze/kernel/ptrace.c +++ b/arch/microblaze/kernel/ptrace.c @@ -159,8 +159,7 @@ asmlinkage void do_syscall_trace_leave(struct pt_regs *regs) { int step; - if (unlikely(current->audit_context)) - audit_syscall_exit(AUDITSC_RESULT(regs->r3), regs->r3); + audit_syscall_exit(regs); step = test_thread_flag(TIF_SINGLESTEP); if (step || test_thread_flag(TIF_SYSCALL_TRACE)) diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h index de39b1f..7d40950 100644 --- a/arch/mips/include/asm/ptrace.h +++ b/arch/mips/include/asm/ptrace.h @@ -137,7 +137,19 @@ extern int ptrace_set_watch_regs(struct task_struct *child, */ #define user_mode(regs) (((regs)->cp0_status & KU_MASK) == KU_USER) -#define regs_return_value(_regs) ((_regs)->regs[2]) +static inline int is_syscall_success(struct pt_regs *regs) +{ + return !regs->regs[7]; +} + +static inline long regs_return_value(struct pt_regs *regs) +{ + if (is_syscall_success(regs)) + return regs->regs[2]; + else + return -regs->regs[2]; +} + #define instruction_pointer(regs) ((regs)->cp0_epc) #define profile_pc(regs) instruction_pointer(regs) diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c index 4e6ea1f..ab0f196 100644 --- a/arch/mips/kernel/ptrace.c +++ b/arch/mips/kernel/ptrace.c @@ -572,9 +572,7 @@ out: */ asmlinkage void syscall_trace_leave(struct pt_regs *regs) { - if (unlikely(current->audit_context)) - audit_syscall_exit(AUDITSC_RESULT(regs->regs[7]), - -regs->regs[2]); + audit_syscall_exit(regs); if (!(current->ptrace & PT_PTRACED)) return; diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h index 48223f9..679aa7b 100644 --- a/arch/powerpc/include/asm/ptrace.h +++ b/arch/powerpc/include/asm/ptrace.h @@ -86,7 +86,15 @@ struct pt_regs { #define instruction_pointer(regs) ((regs)->nip) #define user_stack_pointer(regs) ((regs)->gpr[1]) #define kernel_stack_pointer(regs) ((regs)->gpr[1]) -#define regs_return_value(regs) ((regs)->gpr[3]) +static inline int is_syscall_success(struct pt_regs *regs) +{ + return !(regs->ccr & 0x10000000); +} + +static inline long regs_return_value(struct pt_regs *regs) +{ + return regs->gpr[3]; +} #ifdef CONFIG_SMP extern unsigned long profile_pc(struct pt_regs *regs); diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c index cb22024..d801ab7 100644 --- a/arch/powerpc/kernel/ptrace.c +++ b/arch/powerpc/kernel/ptrace.c @@ -1741,9 +1741,7 @@ void do_syscall_trace_leave(struct pt_regs *regs) { int step; - if (unlikely(current->audit_context)) - audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS, - regs->result); + audit_syscall_exit(regs); if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) trace_sys_exit(regs, regs->result); diff --git a/arch/s390/include/asm/ptrace.h b/arch/s390/include/asm/ptrace.h index 9ad628a..df397e8 100644 --- a/arch/s390/include/asm/ptrace.h +++ b/arch/s390/include/asm/ptrace.h @@ -544,9 +544,13 @@ extern void show_regs(struct pt_regs * regs); #define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0) #define instruction_pointer(regs) ((regs)->psw.addr & PSW_ADDR_INSN) #define user_stack_pointer(regs)((regs)->gprs[15]) -#define regs_return_value(regs)((regs)->gprs[2]) #define profile_pc(regs) instruction_pointer(regs) +static inline long regs_return_value(struct pt_regs *regs) +{ + return regs->gprs[2]; +} + int regs_query_register_offset(const char *name); const char *regs_query_register_name(unsigned int offset); unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset); diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c index ef86ad2..d4d6fcb 100644 --- a/arch/s390/kernel/ptrace.c +++ b/arch/s390/kernel/ptrace.c @@ -753,9 +753,7 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs) asmlinkage void do_syscall_trace_exit(struct pt_regs *regs) { - if (unlikely(current->audit_context)) - audit_syscall_exit(AUDITSC_RESULT(regs->gprs[2]), - regs->gprs[2]); + audit_syscall_exit(regs); if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) trace_sys_exit(regs, regs->gprs[2]); diff --git a/arch/sh/include/asm/ptrace_32.h b/arch/sh/include/asm/ptrace_32.h index 6c2239c..2d3e906 100644 --- a/arch/sh/include/asm/ptrace_32.h +++ b/arch/sh/include/asm/ptrace_32.h @@ -76,7 +76,10 @@ struct pt_dspregs { #ifdef __KERNEL__ #define MAX_REG_OFFSET offsetof(struct pt_regs, tra) -#define regs_return_value(_regs) ((_regs)->regs[0]) +static inline long regs_return_value(struct pt_regs *regs) +{ + return regs->regs[0]; +} #endif /* __KERNEL__ */ diff --git a/arch/sh/include/asm/ptrace_64.h b/arch/sh/include/asm/ptrace_64.h index bf9be77..eb3fcce 100644 --- a/arch/sh/include/asm/ptrace_64.h +++ b/arch/sh/include/asm/ptrace_64.h @@ -13,7 +13,10 @@ struct pt_regs { #ifdef __KERNEL__ #define MAX_REG_OFFSET offsetof(struct pt_regs, tregs[7]) -#define regs_return_value(_regs) ((_regs)->regs[3]) +static inline long regs_return_value(struct pt_regs *regs) +{ + return regs->regs[3]; +} #endif /* __KERNEL__ */ diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c index 3d7b209..5fce97e 100644 --- a/arch/sh/kernel/ptrace_32.c +++ b/arch/sh/kernel/ptrace_32.c @@ -529,9 +529,7 @@ asmlinkage void do_syscall_trace_leave(struct pt_regs *regs) { int step; - if (unlikely(current->audit_context)) - audit_syscall_exit(AUDITSC_RESULT(regs->regs[0]), - regs->regs[0]); + audit_syscall_exit(regs); if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) trace_sys_exit(regs, regs->regs[0]); diff --git a/arch/sh/kernel/ptrace_64.c b/arch/sh/kernel/ptrace_64.c index c8f9764..ba720d6 100644 --- a/arch/sh/kernel/ptrace_64.c +++ b/arch/sh/kernel/ptrace_64.c @@ -548,9 +548,7 @@ asmlinkage void do_syscall_trace_leave(struct pt_regs *regs) { int step; - if (unlikely(current->audit_context)) - audit_syscall_exit(AUDITSC_RESULT(regs->regs[9]), - regs->regs[9]); + audit_syscall_exit(regs); if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) trace_sys_exit(regs, regs->regs[9]); diff --git a/arch/sparc/include/asm/ptrace.h b/arch/sparc/include/asm/ptrace.h index c7ad3fe..10f98ca 100644 --- a/arch/sparc/include/asm/ptrace.h +++ b/arch/sparc/include/asm/ptrace.h @@ -206,7 +206,15 @@ do { current_thread_info()->syscall_noerror = 1; \ #define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV)) #define instruction_pointer(regs) ((regs)->tpc) #define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP]) -#define regs_return_value(regs) ((regs)->u_regs[UREG_I0]) +static inline int is_syscall_success(struct pt_regs *regs) +{ + return !(regs->tstate & (TSTATE_XCARRY | TSTATE_ICARRY)); +} + +static inline long regs_return_value(struct pt_regs *regs) +{ + return regs->u_regs[UREG_I0]; +} #ifdef CONFIG_SMP extern unsigned long profile_pc(struct pt_regs *); #else diff --git a/arch/sparc/kernel/ptrace_64.c b/arch/sparc/kernel/ptrace_64.c index 96ee50a..c73c8c5 100644 --- a/arch/sparc/kernel/ptrace_64.c +++ b/arch/sparc/kernel/ptrace_64.c @@ -1086,17 +1086,8 @@ asmlinkage int syscall_trace_enter(struct pt_regs *regs) asmlinkage void syscall_trace_leave(struct pt_regs *regs) { -#ifdef CONFIG_AUDITSYSCALL - if (unlikely(current->audit_context)) { - unsigned long tstate = regs->tstate; - int result = AUDITSC_SUCCESS; + audit_syscall_exit(regs); - if (unlikely(tstate & (TSTATE_XCARRY | TSTATE_ICARRY))) - result = AUDITSC_FAILURE; - - audit_syscall_exit(result, regs->u_regs[UREG_I0]); - } -#endif if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) trace_sys_exit(regs, regs->u_regs[UREG_G1]); diff --git a/arch/um/kernel/ptrace.c b/arch/um/kernel/ptrace.c index 701b672..839141d 100644 --- a/arch/um/kernel/ptrace.c +++ b/arch/um/kernel/ptrace.c @@ -203,8 +203,8 @@ void syscall_trace(struct uml_pt_regs *regs, int entryexit) UPT_SYSCALL_ARG2(regs), UPT_SYSCALL_ARG3(regs), UPT_SYSCALL_ARG4(regs)); - else audit_syscall_exit(AUDITSC_RESULT(UPT_SYSCALL_RET(regs)), - UPT_SYSCALL_RET(regs)); + else + audit_syscall_exit(regs); } /* Fake a debug trap */ diff --git a/arch/um/sys-i386/shared/sysdep/ptrace.h b/arch/um/sys-i386/shared/sysdep/ptrace.h index d50e62e..54ca089 100644 --- a/arch/um/sys-i386/shared/sysdep/ptrace.h +++ b/arch/um/sys-i386/shared/sysdep/ptrace.h @@ -162,6 +162,10 @@ struct syscall_args { #define UPT_ORIG_SYSCALL(r) UPT_EAX(r) #define UPT_SYSCALL_NR(r) UPT_ORIG_EAX(r) #define UPT_SYSCALL_RET(r) UPT_EAX(r) +static inline long regs_return_value(struct uml_pt_regs *regs) +{ + return UPT_SYSCALL_RET(regs); +} #define UPT_FAULTINFO(r) (&(r)->faultinfo) diff --git a/arch/um/sys-x86_64/shared/sysdep/ptrace.h b/arch/um/sys-x86_64/shared/sysdep/ptrace.h index fdba545..0924e20 100644 --- a/arch/um/sys-x86_64/shared/sysdep/ptrace.h +++ b/arch/um/sys-x86_64/shared/sysdep/ptrace.h @@ -124,6 +124,10 @@ struct uml_pt_regs { #define UPT_EFLAGS(r) REGS_EFLAGS((r)->gp) #define UPT_SYSCALL_NR(r) ((r)->syscall) #define UPT_SYSCALL_RET(r) UPT_RAX(r) +static inline long regs_return_value(struct uml_pt_regs *regs) +{ + return UPT_SYSCALL_RET(regs); +} extern int user_context(unsigned long sp); diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S index c1870dd..6d1572f 100644 --- a/arch/x86/ia32/ia32entry.S +++ b/arch/x86/ia32/ia32entry.S @@ -14,6 +14,7 @@ #include #include #include +#include /* Avoid __ASSEMBLER__'ifying just for this. */ #include @@ -210,13 +211,12 @@ sysexit_from_sys_call: TRACE_IRQS_ON sti movl %eax,%esi /* second arg, syscall return value */ - cmpl $0,%eax /* is it < 0? */ - setl %al /* 1 if so, 0 if not */ + cmpl $-MAX_ERRNO,%eax /* is it an error ? */ + setbe %al /* 1 if so, 0 if not */ movzbl %al,%edi /* zero-extend that into %edi */ - inc %edi /* first arg, 0->1(AUDITSC_SUCCESS), 1->2(AUDITSC_FAILURE) */ - call audit_syscall_exit + call __audit_syscall_exit GET_THREAD_INFO(%r10) - movl RAX-ARGOFFSET(%rsp),%eax /* reload syscall return value */ + movq RAX-ARGOFFSET(%rsp),%rax /* reload syscall return value */ movl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),%edi cli TRACE_IRQS_OFF diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S index 5c1a919..584112a 100644 --- a/arch/x86/kernel/entry_32.S +++ b/arch/x86/kernel/entry_32.S @@ -54,6 +54,7 @@ #include #include #include +#include /* Avoid __ASSEMBLER__'ifying just for this. */ #include @@ -465,11 +466,10 @@ sysexit_audit: TRACE_IRQS_ON ENABLE_INTERRUPTS(CLBR_ANY) movl %eax,%edx /* second arg, syscall return value */ - cmpl $0,%eax /* is it < 0? */ - setl %al /* 1 if so, 0 if not */ + cmpl $-MAX_ERRNO,%eax /* is it an error ? */ + setbe %al /* 1 if so, 0 if not */ movzbl %al,%eax /* zero-extend that */ - inc %eax /* first arg, 0->1(AUDITSC_SUCCESS), 1->2(AUDITSC_FAILURE) */ - call audit_syscall_exit + call __audit_syscall_exit DISABLE_INTERRUPTS(CLBR_ANY) TRACE_IRQS_OFF movl TI_flags(%ebp), %ecx diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S index 8a445a0..b7b1f88 100644 --- a/arch/x86/kernel/entry_64.S +++ b/arch/x86/kernel/entry_64.S @@ -53,6 +53,7 @@ #include #include #include +#include /* Avoid __ASSEMBLER__'ifying just for this. */ #include @@ -564,17 +565,16 @@ auditsys: jmp system_call_fastpath /* - * Return fast path for syscall audit. Call audit_syscall_exit() + * Return fast path for syscall audit. Call __audit_syscall_exit() * directly and then jump back to the fast path with TIF_SYSCALL_AUDIT * masked off. */ sysret_audit: movq RAX-ARGOFFSET(%rsp),%rsi /* second arg, syscall return value */ - cmpq $0,%rsi /* is it < 0? */ - setl %al /* 1 if so, 0 if not */ + cmpq $-MAX_ERRNO,%rsi /* is it < -MAX_ERRNO? */ + setbe %al /* 1 if so, 0 if not */ movzbl %al,%edi /* zero-extend that into %edi */ - inc %edi /* first arg, 0->1(AUDITSC_SUCCESS), 1->2(AUDITSC_FAILURE) */ - call audit_syscall_exit + call __audit_syscall_exit movl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),%edi jmp sysret_check #endif /* CONFIG_AUDITSYSCALL */ diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c index 807c2a2..5c6281e 100644 --- a/arch/x86/kernel/ptrace.c +++ b/arch/x86/kernel/ptrace.c @@ -1412,8 +1412,7 @@ void syscall_trace_leave(struct pt_regs *regs) { bool step; - if (unlikely(current->audit_context)) - audit_syscall_exit(AUDITSC_RESULT(regs->ax), regs->ax); + audit_syscall_exit(regs); if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) trace_sys_exit(regs, regs->ax); diff --git a/arch/x86/kernel/vm86_32.c b/arch/x86/kernel/vm86_32.c index 863f875..af17e1c 100644 --- a/arch/x86/kernel/vm86_32.c +++ b/arch/x86/kernel/vm86_32.c @@ -335,9 +335,9 @@ static void do_sys_vm86(struct kernel_vm86_struct *info, struct task_struct *tsk if (info->flags & VM86_SCREEN_BITMAP) mark_screen_rdonly(tsk->mm); - /*call audit_syscall_exit since we do not exit via the normal paths */ + /*call __audit_syscall_exit since we do not exit via the normal paths */ if (unlikely(current->audit_context)) - audit_syscall_exit(AUDITSC_RESULT(0), 0); + __audit_syscall_exit(1, 0); __asm__ __volatile__( "movl %0,%%esp\n\t" diff --git a/include/linux/audit.h b/include/linux/audit.h index 208efd6..0452dfc 100644 --- a/include/linux/audit.h +++ b/include/linux/audit.h @@ -26,6 +26,7 @@ #include #include +#include /* The netlink messages for the audit system is divided into blocks: * 1000 - 1099 are for commanding the audit system @@ -410,10 +411,6 @@ struct audit_field { void *lsm_rule; }; -#define AUDITSC_INVALID 0 -#define AUDITSC_SUCCESS 1 -#define AUDITSC_FAILURE 2 -#define AUDITSC_RESULT(x) ( ((long)(x))<0?AUDITSC_FAILURE:AUDITSC_SUCCESS ) extern int __init audit_register_class(int class, unsigned *list); extern int audit_classify_syscall(int abi, unsigned syscall); extern int audit_classify_arch(int arch); @@ -426,7 +423,7 @@ extern void audit_free(struct task_struct *task); extern void audit_syscall_entry(int arch, int major, unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3); -extern void audit_syscall_exit(int failed, long return_code); +extern void __audit_syscall_exit(int ret_success, long ret_value); extern void __audit_getname(const char *name); extern void audit_putname(const char *name); extern void __audit_inode(const char *name, const struct dentry *dentry); @@ -441,6 +438,15 @@ static inline int audit_dummy_context(void) void *p = current->audit_context; return !p || *(int *)p; } +static inline void audit_syscall_exit(void *pt_regs) +{ + if (unlikely(current->audit_context)) { + int success = is_syscall_success(pt_regs); + int return_code = regs_return_value(pt_regs); + + __audit_syscall_exit(success, return_code); + } +} static inline void audit_getname(const char *name) { if (unlikely(!audit_dummy_context())) @@ -560,12 +566,12 @@ static inline void audit_mmap_fd(int fd, int flags) extern int audit_n_rules; extern int audit_signals; -#else +#else /* CONFIG_AUDITSYSCALL */ #define audit_finish_fork(t) #define audit_alloc(t) ({ 0; }) #define audit_free(t) do { ; } while (0) #define audit_syscall_entry(ta,a,b,c,d,e) do { ; } while (0) -#define audit_syscall_exit(f,r) do { ; } while (0) +#define audit_syscall_exit(r) do { ; } while (0) #define audit_dummy_context() 1 #define audit_getname(n) do { ; } while (0) #define audit_putname(n) do { ; } while (0) @@ -597,7 +603,7 @@ extern int audit_signals; #define audit_rng(d, c, l) (0) #define audit_n_rules 0 #define audit_signals 0 -#endif +#endif /* CONFIG_AUDITSYSCALL */ #ifdef CONFIG_AUDIT /* These are defined in audit.c */ diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h index 9178d5c..29bb846 100644 --- a/include/linux/ptrace.h +++ b/include/linux/ptrace.h @@ -98,6 +98,7 @@ #include /* For unlikely. */ #include /* For struct task_struct. */ +#include /* for IS_ERR_VALUE */ extern long arch_ptrace(struct task_struct *child, long request, @@ -223,6 +224,15 @@ static inline void ptrace_release_task(struct task_struct *task) #define force_successful_syscall_return() do { } while (0) #endif +#ifndef is_syscall_success +/* + * On most systems we can tell if a syscall is a success based on if the retval + * is an error value. On some systems like ia64 and powerpc they have different + * indicators of success/failure and must define their own. + */ +#define is_syscall_success(regs) (!IS_ERR_VALUE((unsigned long)(regs_return_value(regs)))) +#endif + /* * should define the following things inside #ifdef __KERNEL__. * diff --git a/kernel/auditsc.c b/kernel/auditsc.c index 9c61afe..d21a34f 100644 --- a/kernel/auditsc.c +++ b/kernel/auditsc.c @@ -70,6 +70,11 @@ #include "audit.h" +/* flags stating the success for a syscall */ +#define AUDITSC_INVALID 0 +#define AUDITSC_SUCCESS 1 +#define AUDITSC_FAILURE 2 + /* AUDIT_NAMES is the number of slots we reserve in the audit_context * for saving names from getname(). If we get more names we will allocate * a name dynamically and also add those to the list anchored by names_list. */ @@ -1737,8 +1742,7 @@ void audit_finish_fork(struct task_struct *child) /** * audit_syscall_exit - deallocate audit context after a system call - * @valid: success/failure flag - * @return_code: syscall return value + * @pt_regs: syscall registers * * Tear down after system call. If the audit context has been marked as * auditable (either because of the AUDIT_RECORD_CONTEXT state from @@ -1746,13 +1750,17 @@ void audit_finish_fork(struct task_struct *child) * message), then write out the syscall information. In call cases, * free the names stored from getname(). */ -void audit_syscall_exit(int valid, long return_code) +void __audit_syscall_exit(int success, long return_code) { struct task_struct *tsk = current; struct audit_context *context; - context = audit_get_context(tsk, valid, return_code); + if (success) + success = AUDITSC_SUCCESS; + else + success = AUDITSC_FAILURE; + context = audit_get_context(tsk, success, return_code); if (likely(!context)) return; From tony.luck@intel.com Sat Jun 4 00:52:16 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 04 Jun 2011 00:52:21 +0200 (CEST) Received: from mail-iy0-f177.google.com ([209.85.210.177]:50791 "EHLO mail-iy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491194Ab1FCWwQ convert rfc822-to-8bit (ORCPT ); Sat, 4 Jun 2011 00:52:16 +0200 Received: by iyb39 with SMTP id 39so2448385iyb.36 for ; Fri, 03 Jun 2011 15:52:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=QcFzpaXl5O5nvRA2y9bRaW3kDB7me1h5mrlIXmJbmvg=; b=PWhaE4o2JyTJFkHTRBQTlLQrOXnhViVZmKdN5rx62H3/NbrjjLDNjWRz2B+QAkydIo 46IEQC0FAATBnGfdVjZoduklBlWCr7tcYkMKBxBNK8L9Vs1WfoPdin7d8vH+7beVbUE0 lYkj34dB2Klo53KaYav84mxjlGTAgv68rikoA= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type :content-transfer-encoding; b=FDx509LSgl3EIBFZImarpKLtQjnzu6Br9frlqTmzvYHtZq6TxrZ2cFf/UovJEolcUQ 0+XeXA6qgpn6O4BkNTihrUskVSIs8NyfgFjUr6u44r771oFKDkaXEI9nAWwp9PYdh81P XRS3Ob64sZ5YxeD0KT8kXnxe/LJracqcyrD9E= MIME-Version: 1.0 Received: by 10.42.132.134 with SMTP id d6mr4244122ict.38.1307141529967; Fri, 03 Jun 2011 15:52:09 -0700 (PDT) Received: by 10.42.226.67 with HTTP; Fri, 3 Jun 2011 15:52:09 -0700 (PDT) In-Reply-To: <20110603220451.23134.47368.stgit@paris.rdu.redhat.com> References: <20110603220451.23134.47368.stgit@paris.rdu.redhat.com> Date: Fri, 3 Jun 2011 15:52:09 -0700 X-Google-Sender-Auth: q22O4eHy6fP53swHBUJ-T83rt3g Message-ID: Subject: Re: [PATCH -v2] Audit: push audit success and retcode into arch ptrace.h From: Tony Luck To: Eric Paris Cc: linux-kernel@vger.kernel.org, fenghua.yu@intel.com, monstr@monstr.eu, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, schwidefsky@de.ibm.com, heiko.carstens@de.ibm.com, linux390@de.ibm.com, lethal@linux-sh.org, davem@davemloft.net, jdike@addtoit.com, richard@nod.at, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, viro@zeniv.linux.org.uk, oleg@redhat.com, akpm@linux-foundation.org, linux-ia64@vger.kernel.org, microblaze-uclinux@itee.uq.edu.au, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT X-archive-position: 30212 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tony.luck@intel.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3053 Content-Length: 603 Lines: 16 On Fri, Jun 3, 2011 at 3:04 PM, Eric Paris wrote: > The other major change is that on some arches, like ia64, we change > regs_return_value() to give us the negative value on syscall failure. The > only other user of this macro, kretprobe_example.c, won't notice and it makes > the value signed consistently for the audit functions across all archs. v2 builds and boots on ia64 now Acked-by: Tony Luck > Signed-off-by: Eric Paris > Acked-by: Acked-by: H. Peter Anvin [for x86 portion] ^^^^^^^^^^^^^^^^^^^^ :-) -Tony From richard@nod.at Sun Jun 5 00:39:32 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 05 Jun 2011 00:39:37 +0200 (CEST) Received: from a.ns.miles-group.at ([95.130.255.143]:33623 "EHLO radon.swed.at" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491870Ab1FDWjc (ORCPT ); Sun, 5 Jun 2011 00:39:32 +0200 Received: (qmail 31674 invoked by uid 89); 4 Jun 2011 22:39:26 -0000 Received: by simscan 1.3.1 ppid: 31652, pid: 31670, t: 0.1799s scanners: attach: 1.3.1 clamav: 0.96.5/m:53 Received: from unknown (HELO raccoon.localnet) (richard@nod.at@212.183.99.133) by radon.swed.at with ESMTPA; 4 Jun 2011 22:39:26 -0000 From: Richard Weinberger To: Eric Paris Subject: Re: [PATCH -v2] Audit: push audit success and retcode into arch ptrace.h Date: Sun, 5 Jun 2011 00:36:44 +0200 User-Agent: KMail/1.13.7 (Linux/2.6.37.6-0.5-desktop; KDE/4.6.3; x86_64; ; ) Cc: linux-kernel@vger.kernel.org, tony.luck@intel.com, fenghua.yu@intel.com, monstr@monstr.eu, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, schwidefsky@de.ibm.com, heiko.carstens@de.ibm.com, linux390@de.ibm.com, lethal@linux-sh.org, davem@davemloft.net, jdike@addtoit.com, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, viro@zeniv.linux.org.uk, oleg@redhat.com, akpm@linux-foundation.org, linux-ia64@vger.kernel.org, microblaze-uclinux@itee.uq.edu.au, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net References: <20110603220451.23134.47368.stgit@paris.rdu.redhat.com> In-Reply-To: <20110603220451.23134.47368.stgit@paris.rdu.redhat.com> MIME-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201106050036.44852.richard@nod.at> X-archive-position: 30213 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: richard@nod.at Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3354 Content-Length: 2256 Lines: 43 Am Samstag 04 Juni 2011, 00:04:51 schrieb Eric Paris: > The audit system previously expected arches calling to audit_syscall_exit > to supply as arguments if the syscall was a success and what the return > code was. Audit also provides a helper AUDITSC_RESULT which was supposed > to simplify things by converting from negative retcodes to an audit > internal magic value stating success or failure. This helper was wrong > and could indicate that a valid pointer returned to userspace was a failed > syscall. The fix is to fix the layering foolishness. We now pass > audit_syscall_exit a struct pt_reg and it in turns calls back into arch > code to collect the return value and to determine if the syscall was a > success or failure. We also define a generic is_syscall_success() macro > which determines success/failure based on if the value is < -MAX_ERRNO. > This works for arches like x86 which do not use a separate mechanism to > indicate syscall failure. > > In arch/sh/kernel/ptrace_64.c I see that we were using regs[9] in the old > audit code as the return value. But the ptrace_64.h code defined the macro > regs_return_value() as regs[3]. I have no idea which one is correct, but > this patch now uses the regs_return_value() function, so it now uses > regs[3]. > > We make both the is_syscall_success() and regs_return_value() static > inlines instead of macros. The reason is because the audit function must > take a void* for the regs. (uml calls theirs struct uml_pt_regs instead > of just struct pt_regs so audit_syscall_exit can't take a struct pt_regs). > Since the audit function takes a void* we need to use static inlines to > cast it back to the arch correct structure to dereference it. > > The other major change is that on some arches, like ia64, we change > regs_return_value() to give us the negative value on syscall failure. The > only other user of this macro, kretprobe_example.c, won't notice and it > makes the value signed consistently for the audit functions across all > archs. > > Signed-off-by: Eric Paris > Acked-by: Acked-by: H. Peter Anvin [for x86 portion] The UML part is now fine for me. :-) Acked-by: Richard Weinberger Thanks, //richard From juhosg@openwrt.org Sun Jun 5 20:49:43 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 05 Jun 2011 20:49:48 +0200 (CEST) Received: from phoenix3.szarvasnet.hu ([87.101.127.16]:47452 "EHLO phoenix3.szarvasnet.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491771Ab1FEStn (ORCPT ); Sun, 5 Jun 2011 20:49:43 +0200 Received: from mail.szarvas.hu (localhost [127.0.0.1]) by phoenix3.szarvasnet.hu (Postfix) with SMTP id BC9C01400EE; Sun, 5 Jun 2011 20:49:37 +0200 (CEST) Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by phoenix3.szarvasnet.hu (Postfix) with ESMTPA id 3CC1B14009A; Sun, 5 Jun 2011 20:49:37 +0200 (CEST) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, Gabor Juhos Subject: ***SPAM*** [PATCH 1/3] MIPS: ath79: increase NR_IRQS Date: Sun, 5 Jun 2011 20:49:25 +0200 Message-Id: <1307299767-18328-1-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.1 X-VBMS: A137B05F250 | phoenix3 | 127.0.0.1 | | | X-archive-position: 30214 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3593 Content-Length: 916 Lines: 30 The status register of the miscellaneous interrupt controller is 32 bits wide, but the actual value of NR_IRQS covers only 8 of them. Increase NR_IRQS in order to make all of those interrupt lines usable. Signed-off-by: Gabor Juhos --- arch/mips/include/asm/mach-ath79/irq.h | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/include/asm/mach-ath79/irq.h b/arch/mips/include/asm/mach-ath79/irq.h index 189bc6e..cffbeab 100644 --- a/arch/mips/include/asm/mach-ath79/irq.h +++ b/arch/mips/include/asm/mach-ath79/irq.h @@ -10,10 +10,10 @@ #define __ASM_MACH_ATH79_IRQ_H #define MIPS_CPU_IRQ_BASE 0 -#define NR_IRQS 16 +#define NR_IRQS 40 #define ATH79_MISC_IRQ_BASE 8 -#define ATH79_MISC_IRQ_COUNT 8 +#define ATH79_MISC_IRQ_COUNT 32 #define ATH79_CPU_IRQ_IP2 (MIPS_CPU_IRQ_BASE + 2) #define ATH79_CPU_IRQ_USB (MIPS_CPU_IRQ_BASE + 3) -- 1.7.2.1 From juhosg@openwrt.org Sun Jun 5 20:49:43 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 05 Jun 2011 20:50:10 +0200 (CEST) Received: from phoenix3.szarvasnet.hu ([87.101.127.16]:47454 "EHLO phoenix3.szarvasnet.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491772Ab1FEStn (ORCPT ); Sun, 5 Jun 2011 20:49:43 +0200 Received: from mail.szarvas.hu (localhost [127.0.0.1]) by phoenix3.szarvasnet.hu (Postfix) with SMTP id D6F3D1401D3; Sun, 5 Jun 2011 20:49:37 +0200 (CEST) Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by phoenix3.szarvasnet.hu (Postfix) with ESMTPA id 643E914009A; Sun, 5 Jun 2011 20:49:37 +0200 (CEST) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, Gabor Juhos Subject: [PATCH 2/3] MIPS: ath79: handle more MISC IRQs Date: Sun, 5 Jun 2011 20:49:26 +0200 Message-Id: <1307299767-18328-2-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.1 In-Reply-To: <1307299767-18328-1-git-send-email-juhosg@openwrt.org> References: <1307299767-18328-1-git-send-email-juhosg@openwrt.org> X-VBMS: A137B37F3FE | phoenix3 | 127.0.0.1 | | | X-archive-position: 30215 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3594 Content-Length: 2574 Lines: 73 The AR724X SoCs have more IRQ sources hooked into the MISC IRQ controller. The patch adds support for them. Signed-off-by: Gabor Juhos --- arch/mips/ath79/irq.c | 12 ++++++++++++ arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 4 ++++ arch/mips/include/asm/mach-ath79/irq.h | 4 ++++ 3 files changed, 20 insertions(+), 0 deletions(-) diff --git a/arch/mips/ath79/irq.c b/arch/mips/ath79/irq.c index ac610d5..0d98114 100644 --- a/arch/mips/ath79/irq.c +++ b/arch/mips/ath79/irq.c @@ -46,6 +46,15 @@ static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc) else if (pending & MISC_INT_TIMER) generic_handle_irq(ATH79_MISC_IRQ_TIMER); + else if (pending & MISC_INT_TIMER2) + generic_handle_irq(ATH79_MISC_IRQ_TIMER2); + + else if (pending & MISC_INT_TIMER3) + generic_handle_irq(ATH79_MISC_IRQ_TIMER3); + + else if (pending & MISC_INT_TIMER4) + generic_handle_irq(ATH79_MISC_IRQ_TIMER4); + else if (pending & MISC_INT_OHCI) generic_handle_irq(ATH79_MISC_IRQ_OHCI); @@ -58,6 +67,9 @@ static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc) else if (pending & MISC_INT_WDOG) generic_handle_irq(ATH79_MISC_IRQ_WDOG); + else if (pending & MISC_INT_ETHSW) + generic_handle_irq(ATH79_MISC_IRQ_ETHSW); + else spurious_interrupt(); } diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h index cda1c80..da0d894 100644 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h @@ -130,6 +130,10 @@ #define AR724X_RESET_REG_RESET_MODULE 0x1c +#define MISC_INT_ETHSW BIT(12) +#define MISC_INT_TIMER4 BIT(10) +#define MISC_INT_TIMER3 BIT(9) +#define MISC_INT_TIMER2 BIT(8) #define MISC_INT_DMA BIT(7) #define MISC_INT_OHCI BIT(6) #define MISC_INT_PERFC BIT(5) diff --git a/arch/mips/include/asm/mach-ath79/irq.h b/arch/mips/include/asm/mach-ath79/irq.h index cffbeab..519958f 100644 --- a/arch/mips/include/asm/mach-ath79/irq.h +++ b/arch/mips/include/asm/mach-ath79/irq.h @@ -30,6 +30,10 @@ #define ATH79_MISC_IRQ_PERFC (ATH79_MISC_IRQ_BASE + 5) #define ATH79_MISC_IRQ_OHCI (ATH79_MISC_IRQ_BASE + 6) #define ATH79_MISC_IRQ_DMA (ATH79_MISC_IRQ_BASE + 7) +#define ATH79_MISC_IRQ_TIMER2 (ATH79_MISC_IRQ_BASE + 8) +#define ATH79_MISC_IRQ_TIMER3 (ATH79_MISC_IRQ_BASE + 9) +#define ATH79_MISC_IRQ_TIMER4 (ATH79_MISC_IRQ_BASE + 10) +#define ATH79_MISC_IRQ_ETHSW (ATH79_MISC_IRQ_BASE + 12) #include_next -- 1.7.2.1 From juhosg@openwrt.org Sun Jun 5 20:49:43 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 05 Jun 2011 20:50:38 +0200 (CEST) Received: from phoenix3.szarvasnet.hu ([87.101.127.16]:47457 "EHLO phoenix3.szarvasnet.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491773Ab1FEStn (ORCPT ); Sun, 5 Jun 2011 20:49:43 +0200 Received: from mail.szarvas.hu (localhost [127.0.0.1]) by phoenix3.szarvasnet.hu (Postfix) with SMTP id 30E4B140102; Sun, 5 Jun 2011 20:49:38 +0200 (CEST) Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by phoenix3.szarvasnet.hu (Postfix) with ESMTPA id 866D014009A; Sun, 5 Jun 2011 20:49:37 +0200 (CEST) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, Gabor Juhos , Imre Kaloz Subject: [PATCH 3/3] MIPS: ath79: add common USB Host Controller device Date: Sun, 5 Jun 2011 20:49:27 +0200 Message-Id: <1307299767-18328-3-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.1 In-Reply-To: <1307299767-18328-1-git-send-email-juhosg@openwrt.org> References: <1307299767-18328-1-git-send-email-juhosg@openwrt.org> X-VBMS: A137B6B4D6E | phoenix3 | 127.0.0.1 | | | X-archive-position: 30216 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3595 Content-Length: 11640 Lines: 386 Add common platform_device and helper code to make the registration of the built-in USB controllers easier on the board which are using them. Also register the USB controller on the AP81 and PB44 boards. Signed-off-by: Gabor Juhos Signed-off-by: Imre Kaloz --- arch/mips/ath79/Kconfig | 5 + arch/mips/ath79/Makefile | 1 + arch/mips/ath79/dev-usb.c | 178 ++++++++++++++++++++++++ arch/mips/ath79/dev-usb.h | 17 +++ arch/mips/ath79/mach-ap81.c | 2 + arch/mips/ath79/mach-pb44.c | 2 + arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 32 ++++- 7 files changed, 236 insertions(+), 1 deletions(-) create mode 100644 arch/mips/ath79/dev-usb.c create mode 100644 arch/mips/ath79/dev-usb.h diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig index b058282..8f42ab3 100644 --- a/arch/mips/ath79/Kconfig +++ b/arch/mips/ath79/Kconfig @@ -9,6 +9,7 @@ config ATH79_MACH_AP81 select ATH79_DEV_GPIO_BUTTONS select ATH79_DEV_LEDS_GPIO select ATH79_DEV_SPI + select ATH79_DEV_USB help Say 'Y' here if you want your kernel to support the Atheros AP81 reference board. @@ -19,6 +20,7 @@ config ATH79_MACH_PB44 select ATH79_DEV_GPIO_BUTTONS select ATH79_DEV_LEDS_GPIO select ATH79_DEV_SPI + select ATH79_DEV_USB help Say 'Y' here if you want your kernel to support the Atheros PB44 reference board. @@ -47,4 +49,7 @@ config ATH79_DEV_LEDS_GPIO config ATH79_DEV_SPI def_bool n +config ATH79_DEV_USB + def_bool n + endif diff --git a/arch/mips/ath79/Makefile b/arch/mips/ath79/Makefile index c33d465..57188b6 100644 --- a/arch/mips/ath79/Makefile +++ b/arch/mips/ath79/Makefile @@ -20,6 +20,7 @@ obj-$(CONFIG_ATH79_DEV_AR913X_WMAC) += dev-ar913x-wmac.o obj-$(CONFIG_ATH79_DEV_GPIO_BUTTONS) += dev-gpio-buttons.o obj-$(CONFIG_ATH79_DEV_LEDS_GPIO) += dev-leds-gpio.o obj-$(CONFIG_ATH79_DEV_SPI) += dev-spi.o +obj-$(CONFIG_ATH79_DEV_USB) += dev-usb.o # # Machines diff --git a/arch/mips/ath79/dev-usb.c b/arch/mips/ath79/dev-usb.c new file mode 100644 index 0000000..c3f1999 --- /dev/null +++ b/arch/mips/ath79/dev-usb.c @@ -0,0 +1,178 @@ +/* + * Atheros AR7XXX/AR9XXX USB Host Controller device + * + * Copyright (C) 2008-2011 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * Parts of this file are based on Atheros' 2.6.15 BSP + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include "common.h" +#include "dev-usb.h" + +static struct resource ath79_ohci_resources[] = { + [0] = { + /* .start and .end fields are filled dynamically */ + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = ATH79_MISC_IRQ_OHCI, + .end = ATH79_MISC_IRQ_OHCI, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 ath79_ohci_dmamask = DMA_BIT_MASK(32); +static struct platform_device ath79_ohci_device = { + .name = "ath79-ohci", + .id = -1, + .resource = ath79_ohci_resources, + .num_resources = ARRAY_SIZE(ath79_ohci_resources), + .dev = { + .dma_mask = &ath79_ohci_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, +}; + +static struct resource ath79_ehci_resources[] = { + [0] = { + /* .start and .end fields are filled dynamically */ + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = ATH79_CPU_IRQ_USB, + .end = ATH79_CPU_IRQ_USB, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 ath79_ehci_dmamask = DMA_BIT_MASK(32); +static struct platform_device ath79_ehci_device = { + .name = "ath79-ehci", + .id = -1, + .resource = ath79_ehci_resources, + .num_resources = ARRAY_SIZE(ath79_ehci_resources), + .dev = { + .dma_mask = &ath79_ehci_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, +}; + +#define AR71XX_USB_RESET_MASK (AR71XX_RESET_USB_HOST | \ + AR71XX_RESET_USB_PHY | \ + AR71XX_RESET_USB_OHCI_DLL) + +static void __init ath79_usb_setup(void) +{ + void __iomem *usb_ctrl_base; + + ath79_device_reset_set(AR71XX_USB_RESET_MASK); + mdelay(1000); + ath79_device_reset_clear(AR71XX_USB_RESET_MASK); + + usb_ctrl_base = ioremap(AR71XX_USB_CTRL_BASE, AR71XX_USB_CTRL_SIZE); + + /* Turning on the Buff and Desc swap bits */ + __raw_writel(0xf0000, usb_ctrl_base + AR71XX_USB_CTRL_REG_CONFIG); + + /* WAR for HW bug. Here it adjusts the duration between two SOFS */ + __raw_writel(0x20c00, usb_ctrl_base + AR71XX_USB_CTRL_REG_FLADJ); + + iounmap(usb_ctrl_base); + + mdelay(900); + + ath79_ohci_resources[0].start = AR71XX_OHCI_BASE; + ath79_ohci_resources[0].end = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1; + platform_device_register(&ath79_ohci_device); + + ath79_ehci_resources[0].start = AR71XX_EHCI_BASE; + ath79_ehci_resources[0].end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1; + ath79_ehci_device.name = "ar71xx-ehci"; + platform_device_register(&ath79_ehci_device); +} + +static void __init ar7240_usb_setup(void) +{ + void __iomem *usb_ctrl_base; + + ath79_device_reset_clear(AR7240_RESET_OHCI_DLL); + ath79_device_reset_set(AR7240_RESET_USB_HOST); + + mdelay(1000); + + ath79_device_reset_set(AR7240_RESET_OHCI_DLL); + ath79_device_reset_clear(AR7240_RESET_USB_HOST); + + usb_ctrl_base = ioremap(AR7240_USB_CTRL_BASE, AR7240_USB_CTRL_SIZE); + + /* WAR for HW bug. Here it adjusts the duration between two SOFS */ + __raw_writel(0x3, usb_ctrl_base + AR71XX_USB_CTRL_REG_FLADJ); + + iounmap(usb_ctrl_base); + + ath79_ohci_resources[0].start = AR7240_OHCI_BASE; + ath79_ohci_resources[0].end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1; + platform_device_register(&ath79_ohci_device); +} + +static void __init ar724x_usb_setup(void) +{ + ath79_device_reset_set(AR724X_RESET_USBSUS_OVERRIDE); + mdelay(10); + + ath79_device_reset_clear(AR724X_RESET_USB_HOST); + mdelay(10); + + ath79_device_reset_clear(AR724X_RESET_USB_PHY); + mdelay(10); + + ath79_ehci_resources[0].start = AR724X_EHCI_BASE; + ath79_ehci_resources[0].end = AR724X_EHCI_BASE + AR724X_EHCI_SIZE - 1; + ath79_ehci_device.name = "ar724x-ehci"; + platform_device_register(&ath79_ehci_device); +} + +static void __init ar913x_usb_setup(void) +{ + ath79_device_reset_set(AR913X_RESET_USBSUS_OVERRIDE); + mdelay(10); + + ath79_device_reset_clear(AR913X_RESET_USB_HOST); + mdelay(10); + + ath79_device_reset_clear(AR913X_RESET_USB_PHY); + mdelay(10); + + ath79_ehci_resources[0].start = AR913X_EHCI_BASE; + ath79_ehci_resources[0].end = AR913X_EHCI_BASE + AR913X_EHCI_SIZE - 1; + ath79_ehci_device.name = "ar913x-ehci"; + platform_device_register(&ath79_ehci_device); +} + +void __init ath79_register_usb(void) +{ + if (soc_is_ar71xx()) + ath79_usb_setup(); + else if (soc_is_ar7240()) + ar7240_usb_setup(); + else if (soc_is_ar7241() || soc_is_ar7242()) + ar724x_usb_setup(); + else if (soc_is_ar913x()) + ar913x_usb_setup(); + else + BUG(); +} diff --git a/arch/mips/ath79/dev-usb.h b/arch/mips/ath79/dev-usb.h new file mode 100644 index 0000000..4b86a69 --- /dev/null +++ b/arch/mips/ath79/dev-usb.h @@ -0,0 +1,17 @@ +/* + * Atheros AR71XX/AR724X/AR913X USB Host Controller support + * + * Copyright (C) 2008-2010 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#ifndef _ATH79_DEV_USB_H +#define _ATH79_DEV_USB_H + +void ath79_register_usb(void); + +#endif /* _ATH79_DEV_USB_H */ diff --git a/arch/mips/ath79/mach-ap81.c b/arch/mips/ath79/mach-ap81.c index eee4c12..6c08267 100644 --- a/arch/mips/ath79/mach-ap81.c +++ b/arch/mips/ath79/mach-ap81.c @@ -14,6 +14,7 @@ #include "dev-gpio-buttons.h" #include "dev-leds-gpio.h" #include "dev-spi.h" +#include "dev-usb.h" #define AP81_GPIO_LED_STATUS 1 #define AP81_GPIO_LED_AOSS 3 @@ -92,6 +93,7 @@ static void __init ap81_setup(void) ath79_register_spi(&ap81_spi_data, ap81_spi_info, ARRAY_SIZE(ap81_spi_info)); ath79_register_ar913x_wmac(cal_data); + ath79_register_usb(); } MIPS_MACHINE(ATH79_MACH_AP81, "AP81", "Atheros AP81 reference board", diff --git a/arch/mips/ath79/mach-pb44.c b/arch/mips/ath79/mach-pb44.c index ec7b7a1..fe9701a 100644 --- a/arch/mips/ath79/mach-pb44.c +++ b/arch/mips/ath79/mach-pb44.c @@ -18,6 +18,7 @@ #include "dev-gpio-buttons.h" #include "dev-leds-gpio.h" #include "dev-spi.h" +#include "dev-usb.h" #define PB44_GPIO_I2C_SCL 0 #define PB44_GPIO_I2C_SDA 1 @@ -112,6 +113,7 @@ static void __init pb44_init(void) pb44_gpio_keys); ath79_register_spi(&pb44_spi_data, pb44_spi_info, ARRAY_SIZE(pb44_spi_info)); + ath79_register_usb(); } MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board", diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h index da0d894..86f0fc8 100644 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h @@ -20,6 +20,10 @@ #include #define AR71XX_APB_BASE 0x18000000 +#define AR71XX_EHCI_BASE 0x1b000000 +#define AR71XX_EHCI_SIZE 0x1000 +#define AR71XX_OHCI_BASE 0x1c000000 +#define AR71XX_OHCI_SIZE 0x1000 #define AR71XX_SPI_BASE 0x1f000000 #define AR71XX_SPI_SIZE 0x01000000 @@ -27,6 +31,8 @@ #define AR71XX_DDR_CTRL_SIZE 0x100 #define AR71XX_UART_BASE (AR71XX_APB_BASE + 0x00020000) #define AR71XX_UART_SIZE 0x100 +#define AR71XX_USB_CTRL_BASE (AR71XX_APB_BASE + 0x00030000) +#define AR71XX_USB_CTRL_SIZE 0x100 #define AR71XX_GPIO_BASE (AR71XX_APB_BASE + 0x00040000) #define AR71XX_GPIO_SIZE 0x100 #define AR71XX_PLL_BASE (AR71XX_APB_BASE + 0x00050000) @@ -34,6 +40,16 @@ #define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000) #define AR71XX_RESET_SIZE 0x100 +#define AR7240_USB_CTRL_BASE (AR71XX_APB_BASE + 0x00030000) +#define AR7240_USB_CTRL_SIZE 0x100 +#define AR7240_OHCI_BASE 0x1b000000 +#define AR7240_OHCI_SIZE 0x1000 + +#define AR724X_EHCI_BASE 0x1b000000 +#define AR724X_EHCI_SIZE 0x1000 + +#define AR913X_EHCI_BASE 0x1b000000 +#define AR913X_EHCI_SIZE 0x1000 #define AR913X_WMAC_BASE (AR71XX_APB_BASE + 0x000C0000) #define AR913X_WMAC_SIZE 0x30000 @@ -105,6 +121,12 @@ #define AR913X_AHB_DIV_MASK 0x1 /* + * USB_CONFIG block + */ +#define AR71XX_USB_CTRL_REG_FLADJ 0x00 +#define AR71XX_USB_CTRL_REG_CONFIG 0x04 + +/* * RESET block */ #define AR71XX_RESET_REG_TIMER 0x00 @@ -162,14 +184,22 @@ #define AR71XX_RESET_PCI_BUS BIT(1) #define AR71XX_RESET_PCI_CORE BIT(0) +#define AR7240_RESET_USB_HOST BIT(5) +#define AR7240_RESET_OHCI_DLL BIT(3) + #define AR724X_RESET_GE1_MDIO BIT(23) #define AR724X_RESET_GE0_MDIO BIT(22) #define AR724X_RESET_PCIE_PHY_SERIAL BIT(10) #define AR724X_RESET_PCIE_PHY BIT(7) #define AR724X_RESET_PCIE BIT(6) -#define AR724X_RESET_OHCI_DLL BIT(3) +#define AR724X_RESET_USB_HOST BIT(5) +#define AR724X_RESET_USB_PHY BIT(4) +#define AR724X_RESET_USBSUS_OVERRIDE BIT(3) #define AR913X_RESET_AMBA2WMAC BIT(22) +#define AR913X_RESET_USBSUS_OVERRIDE BIT(10) +#define AR913X_RESET_USB_HOST BIT(5) +#define AR913X_RESET_USB_PHY BIT(4) #define REV_ID_MAJOR_MASK 0xfff0 #define REV_ID_MAJOR_AR71XX 0x00a0 -- 1.7.2.1 From ralf@linux-mips.org Sun Jun 5 23:02:55 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 05 Jun 2011 23:02:58 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:55986 "EHLO duck.linux-mips.net" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491099Ab1FEVCz (ORCPT ); Sun, 5 Jun 2011 23:02:55 +0200 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.3) with ESMTP id p55L3IAg019819; Sun, 5 Jun 2011 22:03:18 +0100 Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id p55L3HnS019816; Sun, 5 Jun 2011 22:03:17 +0100 Date: Sun, 5 Jun 2011 22:03:17 +0100 From: Ralf Baechle To: Gabor Juhos Cc: linux-mips@linux-mips.org Subject: Re: ***SPAM*** [PATCH 1/3] MIPS: ath79: increase NR_IRQS Message-ID: <20110605210317.GA19705@linux-mips.org> References: <1307299767-18328-1-git-send-email-juhosg@openwrt.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1307299767-18328-1-git-send-email-juhosg@openwrt.org> User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 30217 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3652 Content-Length: 158 Lines: 7 On Sun, Jun 05, 2011 at 08:49:25PM +0200, Gabor Juhos wrote: > Subject: ***SPAM*** [PATCH 1/3] MIPS: ath79: increase NR_IRQS Really bad subject :-) Ralf From juhosg@openwrt.org Sun Jun 5 23:37:42 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 05 Jun 2011 23:37:47 +0200 (CEST) Received: from phoenix3.szarvasnet.hu ([87.101.127.16]:47284 "EHLO phoenix3.szarvasnet.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491099Ab1FEVhm convert rfc822-to-8bit (ORCPT ); Sun, 5 Jun 2011 23:37:42 +0200 Received: from mail.szarvas.hu (localhost [127.0.0.1]) by phoenix3.szarvasnet.hu (Postfix) with SMTP id 14FBD14018C; Sun, 5 Jun 2011 23:37:35 +0200 (CEST) Received: from [127.0.0.1] (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by phoenix3.szarvasnet.hu (Postfix) with ESMTPA id B2ED21400FF; Sun, 5 Jun 2011 23:37:34 +0200 (CEST) Message-ID: <4DEBF705.5010505@openwrt.org> Date: Sun, 05 Jun 2011 23:37:09 +0200 From: Gabor Juhos User-Agent: Mozilla/5.0 (Windows; U; Windows NT 6.1; hu-HU; rv:1.9.2.17) Gecko/20110414 Thunderbird/3.1.10 MIME-Version: 1.0 To: Ralf Baechle CC: linux-mips@linux-mips.org Subject: Re: ***SPAM*** [PATCH 1/3] MIPS: ath79: increase NR_IRQS References: <1307299767-18328-1-git-send-email-juhosg@openwrt.org> <20110605210317.GA19705@linux-mips.org> In-Reply-To: <20110605210317.GA19705@linux-mips.org> X-Enigmail-Version: 1.1.1 Content-Type: text/plain; charset=ISO-8859-1 X-Antivirus: avast! (VPS 110605-1, 2011.06.05), Outbound message X-Antivirus-Status: Clean Content-Transfer-Encoding: 8BIT X-VBMS: A122CBC9ECA | phoenix3 | 127.0.0.1 | | | X-archive-position: 30218 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3672 Content-Length: 253 Lines: 11 2011.06.05. 23:03 keltezssel, Ralf Baechle rta: > On Sun, Jun 05, 2011 at 08:49:25PM +0200, Gabor Juhos wrote: > >> Subject: ***SPAM*** [PATCH 1/3] MIPS: ath79: increase NR_IRQS > > Really bad subject :-) Indeed, I will change that. Thanks, Gabor From juhosg@openwrt.org Sun Jun 5 23:39:00 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 05 Jun 2011 23:39:06 +0200 (CEST) Received: from phoenix3.szarvasnet.hu ([87.101.127.16]:47314 "EHLO phoenix3.szarvasnet.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491774Ab1FEVjA (ORCPT ); Sun, 5 Jun 2011 23:39:00 +0200 Received: from mail.szarvas.hu (localhost [127.0.0.1]) by phoenix3.szarvasnet.hu (Postfix) with SMTP id EA0D31401CE; Sun, 5 Jun 2011 23:38:54 +0200 (CEST) Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by phoenix3.szarvasnet.hu (Postfix) with ESMTPA id 748441400FF; Sun, 5 Jun 2011 23:38:54 +0200 (CEST) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, Gabor Juhos Subject: [PATCH v2 2/3] MIPS: ath79: handle more MISC IRQs Date: Sun, 5 Jun 2011 23:38:45 +0200 Message-Id: <1307309926-2486-2-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.1 In-Reply-To: <1307309926-2486-1-git-send-email-juhosg@openwrt.org> References: <1307309926-2486-1-git-send-email-juhosg@openwrt.org> X-VBMS: A1232F93B4B | phoenix3 | 127.0.0.1 | | | X-archive-position: 30219 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3674 Content-Length: 2574 Lines: 73 The AR724X SoCs have more IRQ sources hooked into the MISC IRQ controller. The patch adds support for them. Signed-off-by: Gabor Juhos --- arch/mips/ath79/irq.c | 12 ++++++++++++ arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 4 ++++ arch/mips/include/asm/mach-ath79/irq.h | 4 ++++ 3 files changed, 20 insertions(+), 0 deletions(-) diff --git a/arch/mips/ath79/irq.c b/arch/mips/ath79/irq.c index ac610d5..0d98114 100644 --- a/arch/mips/ath79/irq.c +++ b/arch/mips/ath79/irq.c @@ -46,6 +46,15 @@ static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc) else if (pending & MISC_INT_TIMER) generic_handle_irq(ATH79_MISC_IRQ_TIMER); + else if (pending & MISC_INT_TIMER2) + generic_handle_irq(ATH79_MISC_IRQ_TIMER2); + + else if (pending & MISC_INT_TIMER3) + generic_handle_irq(ATH79_MISC_IRQ_TIMER3); + + else if (pending & MISC_INT_TIMER4) + generic_handle_irq(ATH79_MISC_IRQ_TIMER4); + else if (pending & MISC_INT_OHCI) generic_handle_irq(ATH79_MISC_IRQ_OHCI); @@ -58,6 +67,9 @@ static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc) else if (pending & MISC_INT_WDOG) generic_handle_irq(ATH79_MISC_IRQ_WDOG); + else if (pending & MISC_INT_ETHSW) + generic_handle_irq(ATH79_MISC_IRQ_ETHSW); + else spurious_interrupt(); } diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h index cda1c80..da0d894 100644 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h @@ -130,6 +130,10 @@ #define AR724X_RESET_REG_RESET_MODULE 0x1c +#define MISC_INT_ETHSW BIT(12) +#define MISC_INT_TIMER4 BIT(10) +#define MISC_INT_TIMER3 BIT(9) +#define MISC_INT_TIMER2 BIT(8) #define MISC_INT_DMA BIT(7) #define MISC_INT_OHCI BIT(6) #define MISC_INT_PERFC BIT(5) diff --git a/arch/mips/include/asm/mach-ath79/irq.h b/arch/mips/include/asm/mach-ath79/irq.h index cffbeab..519958f 100644 --- a/arch/mips/include/asm/mach-ath79/irq.h +++ b/arch/mips/include/asm/mach-ath79/irq.h @@ -30,6 +30,10 @@ #define ATH79_MISC_IRQ_PERFC (ATH79_MISC_IRQ_BASE + 5) #define ATH79_MISC_IRQ_OHCI (ATH79_MISC_IRQ_BASE + 6) #define ATH79_MISC_IRQ_DMA (ATH79_MISC_IRQ_BASE + 7) +#define ATH79_MISC_IRQ_TIMER2 (ATH79_MISC_IRQ_BASE + 8) +#define ATH79_MISC_IRQ_TIMER3 (ATH79_MISC_IRQ_BASE + 9) +#define ATH79_MISC_IRQ_TIMER4 (ATH79_MISC_IRQ_BASE + 10) +#define ATH79_MISC_IRQ_ETHSW (ATH79_MISC_IRQ_BASE + 12) #include_next -- 1.7.2.1 From juhosg@openwrt.org Sun Jun 5 23:39:00 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 05 Jun 2011 23:39:28 +0200 (CEST) Received: from phoenix3.szarvasnet.hu ([87.101.127.16]:47313 "EHLO phoenix3.szarvasnet.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491099Ab1FEVjA (ORCPT ); Sun, 5 Jun 2011 23:39:00 +0200 Received: from mail.szarvas.hu (localhost [127.0.0.1]) by phoenix3.szarvasnet.hu (Postfix) with SMTP id B733E1401D5; Sun, 5 Jun 2011 23:38:54 +0200 (CEST) Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by phoenix3.szarvasnet.hu (Postfix) with ESMTPA id 55C901400FF; Sun, 5 Jun 2011 23:38:54 +0200 (CEST) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, Gabor Juhos Subject: [PATCH v2 1/3] MIPS: ath79: modify number of available IRQs Date: Sun, 5 Jun 2011 23:38:44 +0200 Message-Id: <1307309926-2486-1-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.1 X-VBMS: A1232C712E7 | phoenix3 | 127.0.0.1 | | | X-archive-position: 30220 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3675 Content-Length: 959 Lines: 33 The status register of the miscellaneous interrupt controller is 32 bits wide, but the actual value of NR_IRQS covers only 8 of them. Modify NR_IRQS in order to make all of those interrupt lines usable. Signed-off-by: Gabor Juhos --- Changes since v1: - change the subject line arch/mips/include/asm/mach-ath79/irq.h | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/include/asm/mach-ath79/irq.h b/arch/mips/include/asm/mach-ath79/irq.h index 189bc6e..cffbeab 100644 --- a/arch/mips/include/asm/mach-ath79/irq.h +++ b/arch/mips/include/asm/mach-ath79/irq.h @@ -10,10 +10,10 @@ #define __ASM_MACH_ATH79_IRQ_H #define MIPS_CPU_IRQ_BASE 0 -#define NR_IRQS 16 +#define NR_IRQS 40 #define ATH79_MISC_IRQ_BASE 8 -#define ATH79_MISC_IRQ_COUNT 8 +#define ATH79_MISC_IRQ_COUNT 32 #define ATH79_CPU_IRQ_IP2 (MIPS_CPU_IRQ_BASE + 2) #define ATH79_CPU_IRQ_USB (MIPS_CPU_IRQ_BASE + 3) -- 1.7.2.1 From juhosg@openwrt.org Sun Jun 5 23:39:00 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 05 Jun 2011 23:39:53 +0200 (CEST) Received: from phoenix3.szarvasnet.hu ([87.101.127.16]:47317 "EHLO phoenix3.szarvasnet.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491778Ab1FEVjA (ORCPT ); Sun, 5 Jun 2011 23:39:00 +0200 Received: from mail.szarvas.hu (localhost [127.0.0.1]) by phoenix3.szarvasnet.hu (Postfix) with SMTP id 28B79140193; Sun, 5 Jun 2011 23:38:55 +0200 (CEST) Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by phoenix3.szarvasnet.hu (Postfix) with ESMTPA id 972E71400FF; Sun, 5 Jun 2011 23:38:54 +0200 (CEST) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, Gabor Juhos , Imre Kaloz Subject: [PATCH v2 3/3] MIPS: ath79: add common USB Host Controller device Date: Sun, 5 Jun 2011 23:38:46 +0200 Message-Id: <1307309926-2486-3-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.1 In-Reply-To: <1307309926-2486-1-git-send-email-juhosg@openwrt.org> References: <1307309926-2486-1-git-send-email-juhosg@openwrt.org> X-VBMS: A12334BCF6B | phoenix3 | 127.0.0.1 | | | X-archive-position: 30221 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3676 Content-Length: 11640 Lines: 386 Add common platform_device and helper code to make the registration of the built-in USB controllers easier on the board which are using them. Also register the USB controller on the AP81 and PB44 boards. Signed-off-by: Gabor Juhos Signed-off-by: Imre Kaloz --- arch/mips/ath79/Kconfig | 5 + arch/mips/ath79/Makefile | 1 + arch/mips/ath79/dev-usb.c | 178 ++++++++++++++++++++++++ arch/mips/ath79/dev-usb.h | 17 +++ arch/mips/ath79/mach-ap81.c | 2 + arch/mips/ath79/mach-pb44.c | 2 + arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 32 ++++- 7 files changed, 236 insertions(+), 1 deletions(-) create mode 100644 arch/mips/ath79/dev-usb.c create mode 100644 arch/mips/ath79/dev-usb.h diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig index b058282..8f42ab3 100644 --- a/arch/mips/ath79/Kconfig +++ b/arch/mips/ath79/Kconfig @@ -9,6 +9,7 @@ config ATH79_MACH_AP81 select ATH79_DEV_GPIO_BUTTONS select ATH79_DEV_LEDS_GPIO select ATH79_DEV_SPI + select ATH79_DEV_USB help Say 'Y' here if you want your kernel to support the Atheros AP81 reference board. @@ -19,6 +20,7 @@ config ATH79_MACH_PB44 select ATH79_DEV_GPIO_BUTTONS select ATH79_DEV_LEDS_GPIO select ATH79_DEV_SPI + select ATH79_DEV_USB help Say 'Y' here if you want your kernel to support the Atheros PB44 reference board. @@ -47,4 +49,7 @@ config ATH79_DEV_LEDS_GPIO config ATH79_DEV_SPI def_bool n +config ATH79_DEV_USB + def_bool n + endif diff --git a/arch/mips/ath79/Makefile b/arch/mips/ath79/Makefile index c33d465..57188b6 100644 --- a/arch/mips/ath79/Makefile +++ b/arch/mips/ath79/Makefile @@ -20,6 +20,7 @@ obj-$(CONFIG_ATH79_DEV_AR913X_WMAC) += dev-ar913x-wmac.o obj-$(CONFIG_ATH79_DEV_GPIO_BUTTONS) += dev-gpio-buttons.o obj-$(CONFIG_ATH79_DEV_LEDS_GPIO) += dev-leds-gpio.o obj-$(CONFIG_ATH79_DEV_SPI) += dev-spi.o +obj-$(CONFIG_ATH79_DEV_USB) += dev-usb.o # # Machines diff --git a/arch/mips/ath79/dev-usb.c b/arch/mips/ath79/dev-usb.c new file mode 100644 index 0000000..c3f1999 --- /dev/null +++ b/arch/mips/ath79/dev-usb.c @@ -0,0 +1,178 @@ +/* + * Atheros AR7XXX/AR9XXX USB Host Controller device + * + * Copyright (C) 2008-2011 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * Parts of this file are based on Atheros' 2.6.15 BSP + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include "common.h" +#include "dev-usb.h" + +static struct resource ath79_ohci_resources[] = { + [0] = { + /* .start and .end fields are filled dynamically */ + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = ATH79_MISC_IRQ_OHCI, + .end = ATH79_MISC_IRQ_OHCI, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 ath79_ohci_dmamask = DMA_BIT_MASK(32); +static struct platform_device ath79_ohci_device = { + .name = "ath79-ohci", + .id = -1, + .resource = ath79_ohci_resources, + .num_resources = ARRAY_SIZE(ath79_ohci_resources), + .dev = { + .dma_mask = &ath79_ohci_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, +}; + +static struct resource ath79_ehci_resources[] = { + [0] = { + /* .start and .end fields are filled dynamically */ + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = ATH79_CPU_IRQ_USB, + .end = ATH79_CPU_IRQ_USB, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 ath79_ehci_dmamask = DMA_BIT_MASK(32); +static struct platform_device ath79_ehci_device = { + .name = "ath79-ehci", + .id = -1, + .resource = ath79_ehci_resources, + .num_resources = ARRAY_SIZE(ath79_ehci_resources), + .dev = { + .dma_mask = &ath79_ehci_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, +}; + +#define AR71XX_USB_RESET_MASK (AR71XX_RESET_USB_HOST | \ + AR71XX_RESET_USB_PHY | \ + AR71XX_RESET_USB_OHCI_DLL) + +static void __init ath79_usb_setup(void) +{ + void __iomem *usb_ctrl_base; + + ath79_device_reset_set(AR71XX_USB_RESET_MASK); + mdelay(1000); + ath79_device_reset_clear(AR71XX_USB_RESET_MASK); + + usb_ctrl_base = ioremap(AR71XX_USB_CTRL_BASE, AR71XX_USB_CTRL_SIZE); + + /* Turning on the Buff and Desc swap bits */ + __raw_writel(0xf0000, usb_ctrl_base + AR71XX_USB_CTRL_REG_CONFIG); + + /* WAR for HW bug. Here it adjusts the duration between two SOFS */ + __raw_writel(0x20c00, usb_ctrl_base + AR71XX_USB_CTRL_REG_FLADJ); + + iounmap(usb_ctrl_base); + + mdelay(900); + + ath79_ohci_resources[0].start = AR71XX_OHCI_BASE; + ath79_ohci_resources[0].end = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1; + platform_device_register(&ath79_ohci_device); + + ath79_ehci_resources[0].start = AR71XX_EHCI_BASE; + ath79_ehci_resources[0].end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1; + ath79_ehci_device.name = "ar71xx-ehci"; + platform_device_register(&ath79_ehci_device); +} + +static void __init ar7240_usb_setup(void) +{ + void __iomem *usb_ctrl_base; + + ath79_device_reset_clear(AR7240_RESET_OHCI_DLL); + ath79_device_reset_set(AR7240_RESET_USB_HOST); + + mdelay(1000); + + ath79_device_reset_set(AR7240_RESET_OHCI_DLL); + ath79_device_reset_clear(AR7240_RESET_USB_HOST); + + usb_ctrl_base = ioremap(AR7240_USB_CTRL_BASE, AR7240_USB_CTRL_SIZE); + + /* WAR for HW bug. Here it adjusts the duration between two SOFS */ + __raw_writel(0x3, usb_ctrl_base + AR71XX_USB_CTRL_REG_FLADJ); + + iounmap(usb_ctrl_base); + + ath79_ohci_resources[0].start = AR7240_OHCI_BASE; + ath79_ohci_resources[0].end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1; + platform_device_register(&ath79_ohci_device); +} + +static void __init ar724x_usb_setup(void) +{ + ath79_device_reset_set(AR724X_RESET_USBSUS_OVERRIDE); + mdelay(10); + + ath79_device_reset_clear(AR724X_RESET_USB_HOST); + mdelay(10); + + ath79_device_reset_clear(AR724X_RESET_USB_PHY); + mdelay(10); + + ath79_ehci_resources[0].start = AR724X_EHCI_BASE; + ath79_ehci_resources[0].end = AR724X_EHCI_BASE + AR724X_EHCI_SIZE - 1; + ath79_ehci_device.name = "ar724x-ehci"; + platform_device_register(&ath79_ehci_device); +} + +static void __init ar913x_usb_setup(void) +{ + ath79_device_reset_set(AR913X_RESET_USBSUS_OVERRIDE); + mdelay(10); + + ath79_device_reset_clear(AR913X_RESET_USB_HOST); + mdelay(10); + + ath79_device_reset_clear(AR913X_RESET_USB_PHY); + mdelay(10); + + ath79_ehci_resources[0].start = AR913X_EHCI_BASE; + ath79_ehci_resources[0].end = AR913X_EHCI_BASE + AR913X_EHCI_SIZE - 1; + ath79_ehci_device.name = "ar913x-ehci"; + platform_device_register(&ath79_ehci_device); +} + +void __init ath79_register_usb(void) +{ + if (soc_is_ar71xx()) + ath79_usb_setup(); + else if (soc_is_ar7240()) + ar7240_usb_setup(); + else if (soc_is_ar7241() || soc_is_ar7242()) + ar724x_usb_setup(); + else if (soc_is_ar913x()) + ar913x_usb_setup(); + else + BUG(); +} diff --git a/arch/mips/ath79/dev-usb.h b/arch/mips/ath79/dev-usb.h new file mode 100644 index 0000000..4b86a69 --- /dev/null +++ b/arch/mips/ath79/dev-usb.h @@ -0,0 +1,17 @@ +/* + * Atheros AR71XX/AR724X/AR913X USB Host Controller support + * + * Copyright (C) 2008-2010 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#ifndef _ATH79_DEV_USB_H +#define _ATH79_DEV_USB_H + +void ath79_register_usb(void); + +#endif /* _ATH79_DEV_USB_H */ diff --git a/arch/mips/ath79/mach-ap81.c b/arch/mips/ath79/mach-ap81.c index eee4c12..6c08267 100644 --- a/arch/mips/ath79/mach-ap81.c +++ b/arch/mips/ath79/mach-ap81.c @@ -14,6 +14,7 @@ #include "dev-gpio-buttons.h" #include "dev-leds-gpio.h" #include "dev-spi.h" +#include "dev-usb.h" #define AP81_GPIO_LED_STATUS 1 #define AP81_GPIO_LED_AOSS 3 @@ -92,6 +93,7 @@ static void __init ap81_setup(void) ath79_register_spi(&ap81_spi_data, ap81_spi_info, ARRAY_SIZE(ap81_spi_info)); ath79_register_ar913x_wmac(cal_data); + ath79_register_usb(); } MIPS_MACHINE(ATH79_MACH_AP81, "AP81", "Atheros AP81 reference board", diff --git a/arch/mips/ath79/mach-pb44.c b/arch/mips/ath79/mach-pb44.c index ec7b7a1..fe9701a 100644 --- a/arch/mips/ath79/mach-pb44.c +++ b/arch/mips/ath79/mach-pb44.c @@ -18,6 +18,7 @@ #include "dev-gpio-buttons.h" #include "dev-leds-gpio.h" #include "dev-spi.h" +#include "dev-usb.h" #define PB44_GPIO_I2C_SCL 0 #define PB44_GPIO_I2C_SDA 1 @@ -112,6 +113,7 @@ static void __init pb44_init(void) pb44_gpio_keys); ath79_register_spi(&pb44_spi_data, pb44_spi_info, ARRAY_SIZE(pb44_spi_info)); + ath79_register_usb(); } MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board", diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h index da0d894..86f0fc8 100644 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h @@ -20,6 +20,10 @@ #include #define AR71XX_APB_BASE 0x18000000 +#define AR71XX_EHCI_BASE 0x1b000000 +#define AR71XX_EHCI_SIZE 0x1000 +#define AR71XX_OHCI_BASE 0x1c000000 +#define AR71XX_OHCI_SIZE 0x1000 #define AR71XX_SPI_BASE 0x1f000000 #define AR71XX_SPI_SIZE 0x01000000 @@ -27,6 +31,8 @@ #define AR71XX_DDR_CTRL_SIZE 0x100 #define AR71XX_UART_BASE (AR71XX_APB_BASE + 0x00020000) #define AR71XX_UART_SIZE 0x100 +#define AR71XX_USB_CTRL_BASE (AR71XX_APB_BASE + 0x00030000) +#define AR71XX_USB_CTRL_SIZE 0x100 #define AR71XX_GPIO_BASE (AR71XX_APB_BASE + 0x00040000) #define AR71XX_GPIO_SIZE 0x100 #define AR71XX_PLL_BASE (AR71XX_APB_BASE + 0x00050000) @@ -34,6 +40,16 @@ #define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000) #define AR71XX_RESET_SIZE 0x100 +#define AR7240_USB_CTRL_BASE (AR71XX_APB_BASE + 0x00030000) +#define AR7240_USB_CTRL_SIZE 0x100 +#define AR7240_OHCI_BASE 0x1b000000 +#define AR7240_OHCI_SIZE 0x1000 + +#define AR724X_EHCI_BASE 0x1b000000 +#define AR724X_EHCI_SIZE 0x1000 + +#define AR913X_EHCI_BASE 0x1b000000 +#define AR913X_EHCI_SIZE 0x1000 #define AR913X_WMAC_BASE (AR71XX_APB_BASE + 0x000C0000) #define AR913X_WMAC_SIZE 0x30000 @@ -105,6 +121,12 @@ #define AR913X_AHB_DIV_MASK 0x1 /* + * USB_CONFIG block + */ +#define AR71XX_USB_CTRL_REG_FLADJ 0x00 +#define AR71XX_USB_CTRL_REG_CONFIG 0x04 + +/* * RESET block */ #define AR71XX_RESET_REG_TIMER 0x00 @@ -162,14 +184,22 @@ #define AR71XX_RESET_PCI_BUS BIT(1) #define AR71XX_RESET_PCI_CORE BIT(0) +#define AR7240_RESET_USB_HOST BIT(5) +#define AR7240_RESET_OHCI_DLL BIT(3) + #define AR724X_RESET_GE1_MDIO BIT(23) #define AR724X_RESET_GE0_MDIO BIT(22) #define AR724X_RESET_PCIE_PHY_SERIAL BIT(10) #define AR724X_RESET_PCIE_PHY BIT(7) #define AR724X_RESET_PCIE BIT(6) -#define AR724X_RESET_OHCI_DLL BIT(3) +#define AR724X_RESET_USB_HOST BIT(5) +#define AR724X_RESET_USB_PHY BIT(4) +#define AR724X_RESET_USBSUS_OVERRIDE BIT(3) #define AR913X_RESET_AMBA2WMAC BIT(22) +#define AR913X_RESET_USBSUS_OVERRIDE BIT(10) +#define AR913X_RESET_USB_HOST BIT(5) +#define AR913X_RESET_USB_PHY BIT(4) #define REV_ID_MAJOR_MASK 0xfff0 #define REV_ID_MAJOR_AR71XX 0x00a0 -- 1.7.2.1 From hauke@hauke-m.de Mon Jun 6 00:08:11 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 00:08:14 +0200 (CEST) Received: from server19320154104.serverpool.info ([193.201.54.104]:60263 "EHLO hauke-m.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491773Ab1FEWIL (ORCPT ); Mon, 6 Jun 2011 00:08:11 +0200 Received: from localhost (localhost [127.0.0.1]) by hauke-m.de (Postfix) with ESMTP id 65D618B10; Mon, 6 Jun 2011 00:08:09 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at hauke-m.de Received: from hauke-m.de ([127.0.0.1]) by localhost (hauke-m.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ijg80cnM0mII; Mon, 6 Jun 2011 00:08:04 +0200 (CEST) Received: from localhost.localdomain (host-091-097-251-075.ewe-ip-backbone.de [91.97.251.75]) by hauke-m.de (Postfix) with ESMTPSA id 33F428B06; Mon, 6 Jun 2011 00:08:04 +0200 (CEST) From: Hauke Mehrtens To: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org Cc: zajec5@gmail.com, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com, Hauke Mehrtens Subject: [RFC][PATCH 00/10] bcma: add support for embedded devices like bcm4716 Date: Mon, 6 Jun 2011 00:07:28 +0200 Message-Id: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> X-Mailer: git-send-email 1.7.4.1 X-archive-position: 30222 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hauke@hauke-m.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3683 Content-Length: 3564 Lines: 76 This patch series adds support for embedded devices like bcm47xx to bcma. Bcma is used on bcm4716 and bcm4718 SoCs. With these patches my bcm4716 device boots up till it tries to access the flash, because the serial flash chip is unsupported for now, this will be my next task. This adds support for MIPS cores, interrupt configuration and the serial console. These patches are based on ssb code, some patches by George Kashperko and Bernhard Loos and parts of the source code release by ASUS and Netgear for their devices. This was tested on a Netgear WNDR3400, but did not work fully because of serial flash. This is bases on linux-next next-20110603, to which subsystem maintainer should I send these patches later, as it is based on the most recent version of bcma and bcm47xx? I do not have any normal PCIe based wireless device using this bus, so I have not tested it with such a device, it will be nice to hear if it is still working on them. The parallel flash should work so it could be that it will boot on an Asus rt-n16, I have not tested that. An Ethernet driver is not included because the Braodcom source code available is not licensed under a GPL compatible license and building a new driver on that based is not possible. Hauke Mehrtens (10): bcma: Use array to store cores. bcma: Make it possible to run bcma_register_cores() later bcma: add embedded bus bcma: add mips driver bcma: add serial support bcma: get CPU clock bcma: add pci(e) host mode bcm47xx: prepare to support different buses bcm47xx: add support for bcma bus bcm47xx: fix irq assignment for new SoCs. arch/mips/Kconfig | 4 + arch/mips/bcm47xx/gpio.c | 63 +++++--- arch/mips/bcm47xx/irq.c | 8 + arch/mips/bcm47xx/nvram.c | 21 ++- arch/mips/bcm47xx/serial.c | 37 ++++- arch/mips/bcm47xx/setup.c | 55 +++++- arch/mips/bcm47xx/time.c | 12 +- arch/mips/bcm47xx/wgt634u.c | 13 +- arch/mips/include/asm/mach-bcm47xx/bcm47xx.h | 17 ++- arch/mips/include/asm/mach-bcm47xx/gpio.h | 71 ++++++-- drivers/bcma/Kconfig | 20 ++ drivers/bcma/Makefile | 3 + drivers/bcma/bcma_private.h | 16 ++ drivers/bcma/driver_chipcommon.c | 62 +++++++ drivers/bcma/driver_chipcommon_pmu.c | 86 +++++++++ drivers/bcma/driver_mips.c | 248 ++++++++++++++++++++++++++ drivers/bcma/driver_pci.c | 12 ++- drivers/bcma/driver_pci_host.c | 44 +++++ drivers/bcma/host_embedded.c | 93 ++++++++++ drivers/bcma/main.c | 160 +++++++++++++---- drivers/bcma/scan.c | 87 +++++---- drivers/watchdog/bcm47xx_wdt.c | 18 ++- include/linux/bcma/bcma.h | 24 ++- include/linux/bcma/bcma_driver_chipcommon.h | 35 ++++ include/linux/bcma/bcma_driver_mips.h | 52 ++++++ include/linux/bcma/bcma_driver_pci.h | 1 + include/linux/bcma/bcma_embedded.h | 8 + 27 files changed, 1132 insertions(+), 138 deletions(-) create mode 100644 drivers/bcma/driver_mips.c create mode 100644 drivers/bcma/driver_pci_host.c create mode 100644 drivers/bcma/host_embedded.c create mode 100644 include/linux/bcma/bcma_driver_mips.h create mode 100644 include/linux/bcma/bcma_embedded.h -- 1.7.4.1 From hauke@hauke-m.de Mon Jun 6 00:08:13 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 00:08:40 +0200 (CEST) Received: from server19320154104.serverpool.info ([193.201.54.104]:60273 "EHLO hauke-m.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491774Ab1FEWIN (ORCPT ); Mon, 6 Jun 2011 00:08:13 +0200 Received: from localhost (localhost [127.0.0.1]) by hauke-m.de (Postfix) with ESMTP id E99828B13; Mon, 6 Jun 2011 00:08:12 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at hauke-m.de Received: from hauke-m.de ([127.0.0.1]) by localhost (hauke-m.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id NoHMdZ5JYw6Q; Mon, 6 Jun 2011 00:08:06 +0200 (CEST) Received: from localhost.localdomain (host-091-097-251-075.ewe-ip-backbone.de [91.97.251.75]) by hauke-m.de (Postfix) with ESMTPSA id 96DF58B0D; Mon, 6 Jun 2011 00:08:05 +0200 (CEST) From: Hauke Mehrtens To: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org Cc: zajec5@gmail.com, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com, Hauke Mehrtens Subject: [RFC][PATCH 01/10] bcma: Use array to store cores. Date: Mon, 6 Jun 2011 00:07:29 +0200 Message-Id: <1307311658-15853-2-git-send-email-hauke@hauke-m.de> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> X-archive-position: 30223 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hauke@hauke-m.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3684 Content-Length: 11642 Lines: 369 When using bcma on a embedded device it is initialized very early at boot. We have to do so as the cpu and interrupt management and all other devices are attached to this bus and it has to be initialized so early. In that stage we can not allocate memory or sleep, just use the memory on the stack and in the text segment as the kernel is not initialized far enough. This patch removed the kzallocs from the scan code. Some earlier version of the bcma implementation and the normal ssb implementation are doing it like this. The __bcma_dev_wrapper struct is used as the container for the device struct as bcma_device will be too big if it includes struct device. Signed-off-by: Hauke Mehrtens --- drivers/bcma/main.c | 86 ++++++++++++++++++++++++++++---------------- drivers/bcma/scan.c | 58 +++++++++++------------------- include/linux/bcma/bcma.h | 16 ++++++-- 3 files changed, 89 insertions(+), 71 deletions(-) diff --git a/drivers/bcma/main.c b/drivers/bcma/main.c index a2f6b18..b0e7f5e 100644 --- a/drivers/bcma/main.c +++ b/drivers/bcma/main.c @@ -17,23 +17,27 @@ static int bcma_device_remove(struct device *dev); static ssize_t manuf_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct bcma_device *core = container_of(dev, struct bcma_device, dev); - return sprintf(buf, "0x%03X\n", core->id.manuf); + struct __bcma_dev_wrapper *wrapper = container_of(dev, + struct __bcma_dev_wrapper, dev); + return sprintf(buf, "0x%03X\n", wrapper->core->id.manuf); } static ssize_t id_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct bcma_device *core = container_of(dev, struct bcma_device, dev); - return sprintf(buf, "0x%03X\n", core->id.id); + struct __bcma_dev_wrapper *wrapper = container_of(dev, + struct __bcma_dev_wrapper, dev); + return sprintf(buf, "0x%03X\n", wrapper->core->id.id); } static ssize_t rev_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct bcma_device *core = container_of(dev, struct bcma_device, dev); - return sprintf(buf, "0x%02X\n", core->id.rev); + struct __bcma_dev_wrapper *wrapper = container_of(dev, + struct __bcma_dev_wrapper, dev); + return sprintf(buf, "0x%02X\n", wrapper->core->id.rev); } static ssize_t class_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct bcma_device *core = container_of(dev, struct bcma_device, dev); - return sprintf(buf, "0x%X\n", core->id.class); + struct __bcma_dev_wrapper *wrapper = container_of(dev, + struct __bcma_dev_wrapper, dev); + return sprintf(buf, "0x%X\n", wrapper->core->id.class); } static struct device_attribute bcma_device_attrs[] = { __ATTR_RO(manuf), @@ -53,27 +57,30 @@ static struct bus_type bcma_bus_type = { static struct bcma_device *bcma_find_core(struct bcma_bus *bus, u16 coreid) { - struct bcma_device *core; - - list_for_each_entry(core, &bus->cores, list) { - if (core->id.id == coreid) - return core; + u8 i; + for (i = 0; i < bus->nr_cores; i++) { + if (bus->cores[i].id.id == coreid) + return &bus->cores[i]; } return NULL; } static void bcma_release_core_dev(struct device *dev) { - struct bcma_device *core = container_of(dev, struct bcma_device, dev); - kfree(core); + struct __bcma_dev_wrapper *wrapper = container_of(dev, + struct __bcma_dev_wrapper, dev); + kfree(wrapper); } static int bcma_register_cores(struct bcma_bus *bus) { struct bcma_device *core; - int err, dev_id = 0; + struct __bcma_dev_wrapper *wrapper; + int i, err, dev_id = 0; + + for (i = 0; i < bus->nr_cores; i++) { + core = &(bus->cores[i]); - list_for_each_entry(core, &bus->cores, list) { /* We support that cores ourself */ switch (core->id.id) { case BCMA_CORE_CHIPCOMMON: @@ -82,28 +89,37 @@ static int bcma_register_cores(struct bcma_bus *bus) continue; } - core->dev.release = bcma_release_core_dev; - core->dev.bus = &bcma_bus_type; - dev_set_name(&core->dev, "bcma%d:%d", 0/*bus->num*/, dev_id); + wrapper = kzalloc(sizeof(*wrapper), GFP_KERNEL); + if (!wrapper) { + pr_err("Could not allocate wrapper for core 0x%03X\n", + core->id.id); + continue; + } + + wrapper->core = core; + wrapper->dev.release = bcma_release_core_dev; + wrapper->dev.bus = &bcma_bus_type; + dev_set_name(&wrapper->dev, "bcma%d:%d", 0/*bus->num*/, dev_id); switch (bus->hosttype) { case BCMA_HOSTTYPE_PCI: - core->dev.parent = &bus->host_pci->dev; - core->dma_dev = &bus->host_pci->dev; - core->irq = bus->host_pci->irq; + wrapper->dev.parent = &bus->host_pci->dev; + wrapper->core->dma_dev = &bus->host_pci->dev; + wrapper->core->irq = bus->host_pci->irq; break; case BCMA_HOSTTYPE_NONE: case BCMA_HOSTTYPE_SDIO: break; } - err = device_register(&core->dev); + err = device_register(&wrapper->dev); if (err) { pr_err("Could not register dev for core 0x%03X\n", core->id.id); + kfree(wrapper); continue; } - core->dev_registered = true; + core->dev = &wrapper->dev; dev_id++; } @@ -113,10 +129,12 @@ static int bcma_register_cores(struct bcma_bus *bus) static void bcma_unregister_cores(struct bcma_bus *bus) { struct bcma_device *core; + int i; - list_for_each_entry(core, &bus->cores, list) { - if (core->dev_registered) - device_unregister(&core->dev); + for (i = 0; i < bus->nr_cores; i++) { + core = &(bus->cores[i]); + if (core->dev) + device_unregister(core->dev); } } @@ -179,7 +197,9 @@ EXPORT_SYMBOL_GPL(bcma_driver_unregister); static int bcma_bus_match(struct device *dev, struct device_driver *drv) { - struct bcma_device *core = container_of(dev, struct bcma_device, dev); + struct __bcma_dev_wrapper *wrapper = container_of(dev, + struct __bcma_dev_wrapper, dev); + struct bcma_device *core = wrapper->core; struct bcma_driver *adrv = container_of(drv, struct bcma_driver, drv); const struct bcma_device_id *cid = &core->id; const struct bcma_device_id *did; @@ -196,7 +216,9 @@ static int bcma_bus_match(struct device *dev, struct device_driver *drv) static int bcma_device_probe(struct device *dev) { - struct bcma_device *core = container_of(dev, struct bcma_device, dev); + struct __bcma_dev_wrapper *wrapper = container_of(dev, + struct __bcma_dev_wrapper, dev); + struct bcma_device *core = wrapper->core; struct bcma_driver *adrv = container_of(dev->driver, struct bcma_driver, drv); int err = 0; @@ -209,7 +231,9 @@ static int bcma_device_probe(struct device *dev) static int bcma_device_remove(struct device *dev) { - struct bcma_device *core = container_of(dev, struct bcma_device, dev); + struct __bcma_dev_wrapper *wrapper = container_of(dev, + struct __bcma_dev_wrapper, dev); + struct bcma_device *core = wrapper->core; struct bcma_driver *adrv = container_of(dev->driver, struct bcma_driver, drv); diff --git a/drivers/bcma/scan.c b/drivers/bcma/scan.c index 40d7dcc..70b39f7 100644 --- a/drivers/bcma/scan.c +++ b/drivers/bcma/scan.c @@ -211,9 +211,6 @@ int bcma_bus_scan(struct bcma_bus *bus) s32 tmp; u8 i, j; - int err; - - INIT_LIST_HEAD(&bus->cores); bus->nr_cores = 0; bcma_scan_switch_core(bus, BCMA_ADDR_BASE); @@ -230,11 +227,8 @@ int bcma_bus_scan(struct bcma_bus *bus) bcma_scan_switch_core(bus, erombase); while (eromptr < eromend) { - struct bcma_device *core = kzalloc(sizeof(*core), GFP_KERNEL); - if (!core) - return -ENOMEM; - INIT_LIST_HEAD(&core->list); - core->bus = bus; + struct bcma_device core = { }; + core.bus = bus; /* get CIs */ cia = bcma_erom_get_ci(bus, &eromptr); @@ -242,27 +236,24 @@ int bcma_bus_scan(struct bcma_bus *bus) bcma_erom_push_ent(&eromptr); if (bcma_erom_is_end(bus, &eromptr)) break; - err= -EILSEQ; - goto out; + return -EILSEQ; } cib = bcma_erom_get_ci(bus, &eromptr); - if (cib < 0) { - err= -EILSEQ; - goto out; - } + if (cib < 0) + return -EILSEQ; /* parse CIs */ - core->id.class = (cia & SCAN_CIA_CLASS) >> SCAN_CIA_CLASS_SHIFT; - core->id.id = (cia & SCAN_CIA_ID) >> SCAN_CIA_ID_SHIFT; - core->id.manuf = (cia & SCAN_CIA_MANUF) >> SCAN_CIA_MANUF_SHIFT; + core.id.class = (cia & SCAN_CIA_CLASS) >> SCAN_CIA_CLASS_SHIFT; + core.id.id = (cia & SCAN_CIA_ID) >> SCAN_CIA_ID_SHIFT; + core.id.manuf = (cia & SCAN_CIA_MANUF) >> SCAN_CIA_MANUF_SHIFT; ports[0] = (cib & SCAN_CIB_NMP) >> SCAN_CIB_NMP_SHIFT; ports[1] = (cib & SCAN_CIB_NSP) >> SCAN_CIB_NSP_SHIFT; wrappers[0] = (cib & SCAN_CIB_NMW) >> SCAN_CIB_NMW_SHIFT; wrappers[1] = (cib & SCAN_CIB_NSW) >> SCAN_CIB_NSW_SHIFT; - core->id.rev = (cib & SCAN_CIB_REV) >> SCAN_CIB_REV_SHIFT; + core.id.rev = (cib & SCAN_CIB_REV) >> SCAN_CIB_REV_SHIFT; - if (((core->id.manuf == BCMA_MANUF_ARM) && - (core->id.id == 0xFFF)) || + if (((core.id.manuf == BCMA_MANUF_ARM) && + (core.id.id == 0xFFF)) || (ports[1] == 0)) { bcma_erom_skip_component(bus, &eromptr); continue; @@ -285,10 +276,8 @@ int bcma_bus_scan(struct bcma_bus *bus) /* get & parse master ports */ for (i = 0; i < ports[0]; i++) { u32 mst_port_d = bcma_erom_get_mst_port(bus, &eromptr); - if (mst_port_d < 0) { - err= -EILSEQ; - goto out; - } + if (mst_port_d < 0) + return -EILSEQ; } /* get & parse slave ports */ @@ -303,7 +292,7 @@ int bcma_bus_scan(struct bcma_bus *bus) break; } else { if (i == 0 && j == 0) - core->addr = tmp; + core.addr = tmp; } } } @@ -320,7 +309,7 @@ int bcma_bus_scan(struct bcma_bus *bus) break; } else { if (i == 0 && j == 0) - core->wrap = tmp; + core.wrap = tmp; } } } @@ -338,22 +327,19 @@ int bcma_bus_scan(struct bcma_bus *bus) break; } else { if (wrappers[0] == 0 && !i && !j) - core->wrap = tmp; + core.wrap = tmp; } } } pr_info("Core %d found: %s " "(manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n", - bus->nr_cores, bcma_device_name(&core->id), - core->id.manuf, core->id.id, core->id.rev, - core->id.class); - - core->core_index = bus->nr_cores++; - list_add(&core->list, &bus->cores); - continue; -out: - return err; + bus->nr_cores, bcma_device_name(&core.id), + core.id.manuf, core.id.id, core.id.rev, + core.id.class); + + core.core_index = bus->nr_cores; + bus->cores[bus->nr_cores++] = core; } return 0; diff --git a/include/linux/bcma/bcma.h b/include/linux/bcma/bcma.h index 27a27a7..3dc5302 100644 --- a/include/linux/bcma/bcma.h +++ b/include/linux/bcma/bcma.h @@ -118,14 +118,23 @@ struct bcma_host_ops { #define BCMA_MAX_NR_CORES 16 +/* 1) It is not allowed to put struct device statically in bcma_device + * 2) We can not just use pointer to struct device because we use container_of + * 3) We do not have pointer to struct bcma_device in struct device + * Solution: use such a dummy wrapper + */ +struct __bcma_dev_wrapper { + struct device dev; + struct bcma_device *core; +}; + struct bcma_device { struct bcma_bus *bus; struct bcma_device_id id; - struct device dev; + struct device *dev; struct device *dma_dev; unsigned int irq; - bool dev_registered; u8 core_index; @@ -133,7 +142,6 @@ struct bcma_device { u32 wrap; void *drvdata; - struct list_head list; }; static inline void *bcma_get_drvdata(struct bcma_device *core) @@ -182,7 +190,7 @@ struct bcma_bus { struct bcma_chipinfo chipinfo; struct bcma_device *mapped_core; - struct list_head cores; + struct bcma_device cores[BCMA_MAX_NR_CORES]; u8 nr_cores; struct bcma_drv_cc drv_cc; -- 1.7.4.1 From hauke@hauke-m.de Mon Jun 6 00:08:15 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 00:09:05 +0200 (CEST) Received: from server19320154104.serverpool.info ([193.201.54.104]:60285 "EHLO hauke-m.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491779Ab1FEWIP (ORCPT ); Mon, 6 Jun 2011 00:08:15 +0200 Received: from localhost (localhost [127.0.0.1]) by hauke-m.de (Postfix) with ESMTP id 2741B8B16; Mon, 6 Jun 2011 00:08:15 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at hauke-m.de Received: from hauke-m.de ([127.0.0.1]) by localhost (hauke-m.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id xUPRyNmWoAPo; Mon, 6 Jun 2011 00:08:10 +0200 (CEST) Received: from localhost.localdomain (host-091-097-251-075.ewe-ip-backbone.de [91.97.251.75]) by hauke-m.de (Postfix) with ESMTPSA id 4AFD98B0E; Mon, 6 Jun 2011 00:08:07 +0200 (CEST) From: Hauke Mehrtens To: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org Cc: zajec5@gmail.com, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com, Hauke Mehrtens Subject: [RFC][PATCH 02/10] bcma: Make it possible to run bcma_register_cores() later Date: Mon, 6 Jun 2011 00:07:30 +0200 Message-Id: <1307311658-15853-3-git-send-email-hauke@hauke-m.de> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> X-archive-position: 30224 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hauke@hauke-m.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3685 Content-Length: 4340 Lines: 140 On embedded device we can not allocate memory with kalloc or sleep for some time, when bcma is initialized, because this is done early in the boot process. This patch makes it possible to do the bcma_register_cores() sometime later and not directly after searching for the cores. The initialization of the PCI(e) core is also done later as it uses udelay(), which will not work so early. The buses are placed into a list and bcma_register_cores() will be run when the bcma module is initialized. When using bcma on a PCI-Bus in a normal PC bcma_register_cores() is triggered directly after bcma_bus_register(). This patch is based on ssb code. Signed-off-by: Hauke Mehrtens --- drivers/bcma/main.c | 65 ++++++++++++++++++++++++++++++++++++++++++--- include/linux/bcma/bcma.h | 3 ++ 2 files changed, 64 insertions(+), 4 deletions(-) diff --git a/drivers/bcma/main.c b/drivers/bcma/main.c index b0e7f5e..1afa107 100644 --- a/drivers/bcma/main.c +++ b/drivers/bcma/main.c @@ -15,6 +15,16 @@ static int bcma_bus_match(struct device *dev, struct device_driver *drv); static int bcma_device_probe(struct device *dev); static int bcma_device_remove(struct device *dev); +/* Temporary list of yet-to-be-attached buses */ +static LIST_HEAD(attach_queue); +/* There are differences in the codeflow, if the bus is + * initialized from early boot, as various needed services + * are not available early. This is a mechanism to delay + * these initializations to after early boot has finished. + * It's also used to avoid mutex locking, as that's not + * available and needed early. */ +static bool bcma_is_early_boot = 1; + static ssize_t manuf_show(struct device *dev, struct device_attribute *attr, char *buf) { struct __bcma_dev_wrapper *wrapper = container_of(dev, @@ -126,6 +136,36 @@ static int bcma_register_cores(struct bcma_bus *bus) return 0; } +static int bcma_attach_queued_buses(void) +{ + struct bcma_bus *bus, *n; + int err = 0; + int drop_them_all = 0; + + list_for_each_entry_safe(bus, n, &attach_queue, attach_list) { + if (drop_them_all) { + list_del(&bus->attach_list); + continue; + } + /* Can't init the PCIcore in bcma_bus_register(), as that + * is too early in boot for embedded systems + * (no udelay() available). So do it here in attach stage. + */ + if (bus->drv_pci.core) + bcma_core_pci_init(&bus->drv_pci); + + err = bcma_register_cores(bus); + if (err) { + drop_them_all = 1; + list_del(&bus->attach_list); + continue; + } + list_del(&bus->attach_list); + } + + return err; +} + static void bcma_unregister_cores(struct bcma_bus *bus) { struct bcma_device *core; @@ -157,15 +197,20 @@ int bcma_bus_register(struct bcma_bus *bus) bcma_core_chipcommon_init(&bus->drv_cc); } - /* Init PCIE core */ + /* Find PCIE core */ core = bcma_find_core(bus, BCMA_CORE_PCIE); if (core) { + /* will be initilized in bcma_attach_queued_buses() */ bus->drv_pci.core = core; - bcma_core_pci_init(&bus->drv_pci); } - /* Register found cores */ - bcma_register_cores(bus); + /* Queue it for attach. + * See the comment at the bcma_is_early_boot definition. */ + list_add_tail(&bus->attach_list, &attach_queue); + if (!bcma_is_early_boot) { + /* This is not early boot, so we must attach the bus now */ + bcma_attach_queued_buses(); + } pr_info("Bus registered\n"); @@ -247,10 +292,22 @@ static int __init bcma_modinit(void) { int err; + /* See the comment at the bcma_is_early_boot definition */ + bcma_is_early_boot = 0; + err = bus_register(&bcma_bus_type); if (err) return err; + /* Maybe we already registered some buses at early boot. + * Check for this and attach them. + */ + err = bcma_attach_queued_buses(); + if (err) { + pr_err("Attaching core registered in early boot failed\n"); + err = 0; + } + #ifdef CONFIG_BCMA_HOST_PCI err = bcma_host_pci_init(); if (err) { diff --git a/include/linux/bcma/bcma.h b/include/linux/bcma/bcma.h index 3dc5302..8b6feca 100644 --- a/include/linux/bcma/bcma.h +++ b/include/linux/bcma/bcma.h @@ -195,6 +195,9 @@ struct bcma_bus { struct bcma_drv_cc drv_cc; struct bcma_drv_pci drv_pci; + + /* Internal-only stuff follows. Do not touch. */ + struct list_head attach_list; }; extern inline u32 bcma_read8(struct bcma_device *core, u16 offset) -- 1.7.4.1 From hauke@hauke-m.de Mon Jun 6 00:08:18 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 00:09:33 +0200 (CEST) Received: from server19320154104.serverpool.info ([193.201.54.104]:60305 "EHLO hauke-m.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491782Ab1FEWIS (ORCPT ); Mon, 6 Jun 2011 00:08:18 +0200 Received: from localhost (localhost [127.0.0.1]) by hauke-m.de (Postfix) with ESMTP id 607DF8B18; Mon, 6 Jun 2011 00:08:18 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at hauke-m.de Received: from hauke-m.de ([127.0.0.1]) by localhost (hauke-m.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id O2ZgSRWzGs9b; Mon, 6 Jun 2011 00:08:13 +0200 (CEST) Received: from localhost.localdomain (host-091-097-251-075.ewe-ip-backbone.de [91.97.251.75]) by hauke-m.de (Postfix) with ESMTPSA id 811318B0F; Mon, 6 Jun 2011 00:08:08 +0200 (CEST) From: Hauke Mehrtens To: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org Cc: zajec5@gmail.com, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com, Hauke Mehrtens Subject: [RFC][PATCH 03/10] bcma: add embedded bus Date: Mon, 6 Jun 2011 00:07:31 +0200 Message-Id: <1307311658-15853-4-git-send-email-hauke@hauke-m.de> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> X-archive-position: 30225 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hauke@hauke-m.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3686 Content-Length: 7214 Lines: 243 This patch adds support for using bcma on an embedded bus. An embedded system like the bcm4716 could register this bus and it searches for the bcma cores then. Signed-off-by: Hauke Mehrtens --- drivers/bcma/Kconfig | 5 ++ drivers/bcma/Makefile | 1 + drivers/bcma/host_embedded.c | 93 ++++++++++++++++++++++++++++++++++++ drivers/bcma/main.c | 1 + drivers/bcma/scan.c | 29 ++++++++++- include/linux/bcma/bcma.h | 3 + include/linux/bcma/bcma_embedded.h | 8 +++ 7 files changed, 138 insertions(+), 2 deletions(-) create mode 100644 drivers/bcma/host_embedded.c create mode 100644 include/linux/bcma/bcma_embedded.h diff --git a/drivers/bcma/Kconfig b/drivers/bcma/Kconfig index 83e9adf..0390e32 100644 --- a/drivers/bcma/Kconfig +++ b/drivers/bcma/Kconfig @@ -27,6 +27,11 @@ config BCMA_HOST_PCI bool "Support for BCMA on PCI-host bus" depends on BCMA_HOST_PCI_POSSIBLE +config BCMA_HOST_EMBEDDED + bool + depends on BCMA && MIPS + default n + config BCMA_DEBUG bool "BCMA debugging" depends on BCMA diff --git a/drivers/bcma/Makefile b/drivers/bcma/Makefile index 0d56245..e509b1b 100644 --- a/drivers/bcma/Makefile +++ b/drivers/bcma/Makefile @@ -2,6 +2,7 @@ bcma-y += main.o scan.o core.o bcma-y += driver_chipcommon.o driver_chipcommon_pmu.o bcma-y += driver_pci.o bcma-$(CONFIG_BCMA_HOST_PCI) += host_pci.o +bcma-$(CONFIG_BCMA_HOST_EMBEDDED) += host_embedded.o obj-$(CONFIG_BCMA) += bcma.o ccflags-$(CONFIG_BCMA_DEBUG) := -DDEBUG diff --git a/drivers/bcma/host_embedded.c b/drivers/bcma/host_embedded.c new file mode 100644 index 0000000..6942440 --- /dev/null +++ b/drivers/bcma/host_embedded.c @@ -0,0 +1,93 @@ +/* + * Broadcom specific AMBA + * PCI Host + * + * Licensed under the GNU/GPL. See COPYING for details. + */ + +#include "bcma_private.h" +#include "scan.h" +#include + +static u8 bcma_host_bcma_read8(struct bcma_device *core, u16 offset) +{ + offset += core->core_index * BCMA_CORE_SIZE; + return readb(core->bus->mmio + offset); +} + +static u16 bcma_host_bcma_read16(struct bcma_device *core, u16 offset) +{ + offset += core->core_index * BCMA_CORE_SIZE; + return readw(core->bus->mmio + offset); +} + +static u32 bcma_host_bcma_read32(struct bcma_device *core, u16 offset) +{ + offset += core->core_index * BCMA_CORE_SIZE; + return readl(core->bus->mmio + offset); +} + +static void bcma_host_bcma_write8(struct bcma_device *core, u16 offset, + u8 value) +{ + offset += core->core_index * BCMA_CORE_SIZE; + writeb(value, core->bus->mmio + offset); +} + +static void bcma_host_bcma_write16(struct bcma_device *core, u16 offset, + u16 value) +{ + offset += core->core_index * BCMA_CORE_SIZE; + writew(value, core->bus->mmio + offset); +} + +static void bcma_host_bcma_write32(struct bcma_device *core, u16 offset, + u32 value) +{ + offset += core->core_index * BCMA_CORE_SIZE; + writel(value, core->bus->mmio + offset); +} + +static u32 bcma_host_bcma_aread32(struct bcma_device *core, u16 offset) +{ + offset += core->core_index * BCMA_CORE_SIZE; + return readl(core->bus->host_embedded + offset); +} + +static void bcma_host_bcma_awrite32(struct bcma_device *core, u16 offset, + u32 value) +{ + offset += core->core_index * BCMA_CORE_SIZE; + writel(value, core->bus->host_embedded + offset); +} + +const struct bcma_host_ops bcma_host_bcma_ops = { + .read8 = bcma_host_bcma_read8, + .read16 = bcma_host_bcma_read16, + .read32 = bcma_host_bcma_read32, + .write8 = bcma_host_bcma_write8, + .write16 = bcma_host_bcma_write16, + .write32 = bcma_host_bcma_write32, + .aread32 = bcma_host_bcma_aread32, + .awrite32 = bcma_host_bcma_awrite32, +}; + +int bcma_host_bcma_register(struct bcma_bus *bus) +{ + u32 __iomem *mmio; + + /* iomap only first core. We have to read some register on this core + * to get the number of cores. This is sone in bcma_scan() + */ + mmio = ioremap(BCMA_ADDR_BASE, BCMA_CORE_SIZE * 1); + if (!mmio) + return -ENOMEM; + bus->mmio = mmio; + + /* Host specific */ + bus->hosttype = BCMA_HOSTTYPE_EMBEDDED; + bus->ops = &bcma_host_bcma_ops; + + /* Register */ + return bcma_bus_register(bus); +} diff --git a/drivers/bcma/main.c b/drivers/bcma/main.c index 1afa107..c5bcb5f 100644 --- a/drivers/bcma/main.c +++ b/drivers/bcma/main.c @@ -119,6 +119,7 @@ static int bcma_register_cores(struct bcma_bus *bus) break; case BCMA_HOSTTYPE_NONE: case BCMA_HOSTTYPE_SDIO: + case BCMA_HOSTTYPE_EMBEDDED: break; } diff --git a/drivers/bcma/scan.c b/drivers/bcma/scan.c index 70b39f7..9229615 100644 --- a/drivers/bcma/scan.c +++ b/drivers/bcma/scan.c @@ -203,7 +203,7 @@ static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 **eromptr, int bcma_bus_scan(struct bcma_bus *bus) { u32 erombase; - u32 __iomem *eromptr, *eromend; + u32 __iomem *eromptr, *eromend, *mmio; s32 cia, cib; u8 ports[2], wrappers[2]; @@ -219,9 +219,34 @@ int bcma_bus_scan(struct bcma_bus *bus) bus->chipinfo.id = (tmp & BCMA_CC_ID_ID) >> BCMA_CC_ID_ID_SHIFT; bus->chipinfo.rev = (tmp & BCMA_CC_ID_REV) >> BCMA_CC_ID_REV_SHIFT; bus->chipinfo.pkg = (tmp & BCMA_CC_ID_PKG) >> BCMA_CC_ID_PKG_SHIFT; + bus->nr_cores = (tmp & BCMA_CC_ID_NRCORES) >> BCMA_CC_ID_NRCORES_SHIFT; + + /* If we are an embedded device we now know the number of avaliable + * core and ioremap the correct space. + */ + if (bus->hosttype == BCMA_HOSTTYPE_EMBEDDED) { + iounmap(bus->mmio); + mmio = ioremap(BCMA_ADDR_BASE, BCMA_CORE_SIZE * bus->nr_cores); + if (!mmio) + return -ENOMEM; + bus->mmio = mmio; + + mmio = ioremap(BCMA_WRAP_BASE, BCMA_CORE_SIZE * bus->nr_cores); + if (!mmio) + return -ENOMEM; + bus->host_embedded = mmio; + } + /* reset it to 0 as we use it for counting */ + bus->nr_cores = 0; erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM); - eromptr = bus->mmio; + if (bus->hosttype == BCMA_HOSTTYPE_EMBEDDED) { + eromptr = ioremap(erombase, BCMA_CORE_SIZE); + if (!eromptr) + return -ENOMEM; + } else + eromptr = bus->mmio; + eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32); bcma_scan_switch_core(bus, erombase); diff --git a/include/linux/bcma/bcma.h b/include/linux/bcma/bcma.h index 8b6feca..192c4ae 100644 --- a/include/linux/bcma/bcma.h +++ b/include/linux/bcma/bcma.h @@ -16,6 +16,7 @@ enum bcma_hosttype { BCMA_HOSTTYPE_NONE, BCMA_HOSTTYPE_PCI, BCMA_HOSTTYPE_SDIO, + BCMA_HOSTTYPE_EMBEDDED, }; struct bcma_chipinfo { @@ -185,6 +186,8 @@ struct bcma_bus { struct pci_dev *host_pci; /* Pointer to the SDIO device (only for BCMA_HOSTTYPE_SDIO) */ struct sdio_func *host_sdio; + /* Pointer to the embedded iomem (only for BCMA_HOSTTYPE_EMBEDDED) */ + void __iomem *host_embedded; }; struct bcma_chipinfo chipinfo; diff --git a/include/linux/bcma/bcma_embedded.h b/include/linux/bcma/bcma_embedded.h new file mode 100644 index 0000000..0faf46d --- /dev/null +++ b/include/linux/bcma/bcma_embedded.h @@ -0,0 +1,8 @@ +#ifndef LINUX_BCMA_EMBEDDED_H_ +#define LINUX_BCMA_EMBEDDED_H_ + +#include + +extern int bcma_host_bcma_register(struct bcma_bus *bus); + +#endif /* LINUX_BCMA_EMBEDDED_H_ */ -- 1.7.4.1 From hauke@hauke-m.de Mon Jun 6 00:08:20 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 00:09:59 +0200 (CEST) Received: from server19320154104.serverpool.info ([193.201.54.104]:60319 "EHLO hauke-m.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491783Ab1FEWIU (ORCPT ); Mon, 6 Jun 2011 00:08:20 +0200 Received: from localhost (localhost [127.0.0.1]) by hauke-m.de (Postfix) with ESMTP id 9DF318B0F; Mon, 6 Jun 2011 00:08:20 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at hauke-m.de Received: from hauke-m.de ([127.0.0.1]) by localhost (hauke-m.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id SfPS90j92P2x; Mon, 6 Jun 2011 00:08:15 +0200 (CEST) Received: from localhost.localdomain (host-091-097-251-075.ewe-ip-backbone.de [91.97.251.75]) by hauke-m.de (Postfix) with ESMTPSA id 885C78B11; Mon, 6 Jun 2011 00:08:09 +0200 (CEST) From: Hauke Mehrtens To: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org Cc: zajec5@gmail.com, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com, Hauke Mehrtens Subject: [RFC][PATCH 04/10] bcma: add mips driver Date: Mon, 6 Jun 2011 00:07:32 +0200 Message-Id: <1307311658-15853-5-git-send-email-hauke@hauke-m.de> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> X-archive-position: 30226 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hauke@hauke-m.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3687 Content-Length: 11115 Lines: 395 This adds a mips driver to bcma. This is only found on embedded devices. For now the driver just initializes the irqs used on this system. Signed-off-by: Hauke Mehrtens --- drivers/bcma/Kconfig | 11 ++- drivers/bcma/Makefile | 1 + drivers/bcma/bcma_private.h | 3 + drivers/bcma/driver_mips.c | 227 +++++++++++++++++++++++++++++++++ drivers/bcma/main.c | 8 + include/linux/bcma/bcma.h | 2 + include/linux/bcma/bcma_driver_mips.h | 40 ++++++ 7 files changed, 291 insertions(+), 1 deletions(-) create mode 100644 drivers/bcma/driver_mips.c create mode 100644 include/linux/bcma/bcma_driver_mips.h diff --git a/drivers/bcma/Kconfig b/drivers/bcma/Kconfig index 0390e32..568d30b 100644 --- a/drivers/bcma/Kconfig +++ b/drivers/bcma/Kconfig @@ -29,9 +29,18 @@ config BCMA_HOST_PCI config BCMA_HOST_EMBEDDED bool - depends on BCMA && MIPS + depends on BCMA_DRIVER_MIPS default n +config BCMA_DRIVER_MIPS + bool "BCMA Broadcom MIPS core driver" + depends on BCMA && MIPS + help + Driver for the Broadcom MIPS core attached to Broadcom specific + Advanced Microcontroller Bus. + + If unsure, say N + config BCMA_DEBUG bool "BCMA debugging" depends on BCMA diff --git a/drivers/bcma/Makefile b/drivers/bcma/Makefile index e509b1b..50ddab8 100644 --- a/drivers/bcma/Makefile +++ b/drivers/bcma/Makefile @@ -1,6 +1,7 @@ bcma-y += main.o scan.o core.o bcma-y += driver_chipcommon.o driver_chipcommon_pmu.o bcma-y += driver_pci.o +bcma-$(CONFIG_BCMA_DRIVER_MIPS) += driver_mips.o bcma-$(CONFIG_BCMA_HOST_PCI) += host_pci.o bcma-$(CONFIG_BCMA_HOST_EMBEDDED) += host_embedded.o obj-$(CONFIG_BCMA) += bcma.o diff --git a/drivers/bcma/bcma_private.h b/drivers/bcma/bcma_private.h index 2f72e9c..842ee17 100644 --- a/drivers/bcma/bcma_private.h +++ b/drivers/bcma/bcma_private.h @@ -19,6 +19,9 @@ extern void bcma_bus_unregister(struct bcma_bus *bus); /* scan.c */ int bcma_bus_scan(struct bcma_bus *bus); +/* driver_mips.c */ +extern unsigned int bcma_core_mips_irq(struct bcma_device *dev); + #ifdef CONFIG_BCMA_HOST_PCI /* host_pci.c */ extern int __init bcma_host_pci_init(void); diff --git a/drivers/bcma/driver_mips.c b/drivers/bcma/driver_mips.c new file mode 100644 index 0000000..0a6c217 --- /dev/null +++ b/drivers/bcma/driver_mips.c @@ -0,0 +1,227 @@ +/* + * Sonics Silicon Backplane + * Broadcom MIPS core driver + * + * Copyright 2005, Broadcom Corporation + * Copyright 2006, 2007, Michael Buesch + * Copyright 2010, Bernhard Loos + * + * Licensed under the GNU/GPL. See COPYING for details. + */ + +#include + +#include +#include +#include +#include + +#include "bcma_private.h" + +/* The 47162a0 hangs when reading its registers */ +static inline bool bcma_core_mips_bcm47162a0_quirk(struct bcma_device *dev) +{ + return dev->bus->chipinfo.id == 47162 && dev->bus->chipinfo.rev == 0 && + dev->id.id == BCMA_CORE_MIPS_74K; +} + +static inline u32 mips_read32(struct bcma_drv_mips *mcore, + u16 offset) +{ + return bcma_read32(mcore->core, offset); +} + +static inline void mips_write32(struct bcma_drv_mips *mcore, + u16 offset, + u32 value) +{ + bcma_write32(mcore->core, offset, value); +} + +static const u32 ipsflag_irq_mask[] = { + 0, + BCMA_MIPS_IPSFLAG_IRQ1, + BCMA_MIPS_IPSFLAG_IRQ2, + BCMA_MIPS_IPSFLAG_IRQ3, + BCMA_MIPS_IPSFLAG_IRQ4, +}; + +static const u32 ipsflag_irq_shift[] = { + 0, + BCMA_MIPS_IPSFLAG_IRQ1_SHIFT, + BCMA_MIPS_IPSFLAG_IRQ2_SHIFT, + BCMA_MIPS_IPSFLAG_IRQ3_SHIFT, + BCMA_MIPS_IPSFLAG_IRQ4_SHIFT, +}; + +static u32 bcma_core_mips_irqflag(struct bcma_device *dev) +{ + u32 flag; + + if (bcma_core_mips_bcm47162a0_quirk(dev)) + return dev->core_index; + flag = bcma_aread32(dev, BCMA_MIPS_OOBSELOUTA30); + + return flag & 0x1F; +} + + +/* Get the MIPS IRQ assignment for a specified device. + * If unassigned, 0 is returned. + * If disabled, 5 is returned. + * If not supported, 6 is returned. + */ +unsigned int bcma_core_mips_irq(struct bcma_device *dev) +{ + struct bcma_device *mdev = dev->bus->drv_mips.core; + u32 irqflag; + unsigned int irq; + + irqflag = bcma_core_mips_irqflag(dev); + + for (irq = 1; irq <= 4; irq++) + if (bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq)) & (1 << irqflag)) + break; + + if (irq == 5) + irq = 0; + + return irq; +} + +static void bcma_core_mips_set_irq(struct bcma_device *dev, unsigned int irq) +{ + unsigned int oldirq = bcma_core_mips_irq(dev); + struct bcma_bus *bus = dev->bus; + struct bcma_device *mdev = bus->drv_mips.core; + u32 irqflag; + + irqflag = bcma_core_mips_irqflag(dev); + BUG_ON(oldirq == 6); + + dev->irq = irq + 2; + + /* clear the old irq */ + if (oldirq == 0) + bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0), + bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0)) & + ~(1 << irqflag)); + else + bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq), 0); + + /* assign the new one */ + if (irq == 0) { + bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0), + bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0)) | + (1 << irqflag)); + } else { + u32 oldirqflag = bcma_read32(mdev, + BCMA_MIPS_MIPS74K_INTMASK(irq)); + if (oldirqflag) { + int i; + /* backplane irq line is in use, find out who uses + * it and set user to irq 0 + */ + for (i = 0; i < bus->nr_cores; i++) + if ((1 << bcma_core_mips_irqflag(&bus->cores[i])) == oldirqflag) { + bcma_core_mips_set_irq(&bus->cores[i], 0); + break; + } + } + bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq), 1 << irqflag); + } + + pr_info("set_irq: core 0x%04x, irq %d => %d\n", + dev->id.id, oldirq + 2, irq + 2); +} + +static void bcma_core_mips_print_irq(struct bcma_device *dev, unsigned int irq) +{ + int i; + static const char *irq_name[] = {"2(S)", "3", "4", "5", "6", "D", "I"}; + printk(KERN_INFO KBUILD_MODNAME ": core 0x%04x, irq :", dev->id.id); + for (i = 0; i <= 6; i++) + printk(" %s%s", irq_name[i], i == irq ? "*" : " "); + printk("\n"); +} + +static void bcma_core_mips_dump_irq(struct bcma_bus *bus) +{ + int i; + for (i = 0; i < bus->nr_cores; i++) { + struct bcma_device *dev; + dev = &(bus->cores[i]); + bcma_core_mips_print_irq(dev, bcma_core_mips_irq(dev)); + } +} + +static void bcma_core_mips_flash_detect(struct bcma_drv_mips *mcore) +{ + struct bcma_bus *bus = mcore->core->bus; + + mcore->flash_buswidth = 2; + if (bus->drv_cc.core) { + mcore->flash_window = 0x1c000000; + mcore->flash_window_size = 0x02000000; + switch (bus->drv_cc.capabilities & BCMA_CC_CAP_FLASHT) { + case BCMA_CC_FLASHT_STSER: + case BCMA_CC_FLASHT_ATSER: + pr_err("Serial flash not supported.\n"); + break; + case BCMA_CC_FLASHT_PARA: + if ((bcma_read32(bus->drv_cc.core, BCMA_CC_FLASH_CFG) & + BCMA_CC_OTPS) == 0) + mcore->flash_buswidth = 1; + break; + } + } else { + mcore->flash_window = 0x1fc00000; + mcore->flash_window_size = 0x00400000; + } +} + +void bcma_core_mips_init(struct bcma_drv_mips *mcore) +{ + struct bcma_bus *bus; + struct bcma_device *dev; + unsigned int irq, i; + + if (!mcore->core) + return; /* We don't have a MIPS core */ + + pr_info("Initializing MIPS core...\n"); + + bus = mcore->core->bus; + + /* Assign IRQs to all cores on the bus */ + for (irq = 1, i = 0; i < bus->nr_cores; i++) { + int mips_irq; + dev = &(bus->cores[i]); + mips_irq = bcma_core_mips_irq(dev); + if (mips_irq > 4) + dev->irq = 0; + else + dev->irq = mips_irq + 2; + if (dev->irq > 5) + continue; + switch (dev->id.id) { + case BCMA_CORE_PCI: + case BCMA_CORE_PCIE: + case BCMA_CORE_ETHERNET: + case BCMA_CORE_ETHERNET_GBIT: + case BCMA_CORE_MAC_GBIT: + case BCMA_CORE_80211: + case BCMA_CORE_USB20_HOST: + /* These devices get their own IRQ line if available, + * the rest goes on IRQ0 + */ + if (irq <= 4) + bcma_core_mips_set_irq(dev, irq++); + break; + } + } + pr_info("after irq reconfiguration\n"); + bcma_core_mips_dump_irq(bus); + + bcma_core_mips_flash_detect(mcore); +} diff --git a/drivers/bcma/main.c b/drivers/bcma/main.c index c5bcb5f..0b4e26d 100644 --- a/drivers/bcma/main.c +++ b/drivers/bcma/main.c @@ -96,6 +96,7 @@ static int bcma_register_cores(struct bcma_bus *bus) case BCMA_CORE_CHIPCOMMON: case BCMA_CORE_PCI: case BCMA_CORE_PCIE: + case BCMA_CORE_MIPS_74K: continue; } @@ -198,6 +199,13 @@ int bcma_bus_register(struct bcma_bus *bus) bcma_core_chipcommon_init(&bus->drv_cc); } + /* Init MIPS core */ + core = bcma_find_core(bus, BCMA_CORE_MIPS_74K); + if (core) { + bus->drv_mips.core = core; + bcma_core_mips_init(&bus->drv_mips); + } + /* Find PCIE core */ core = bcma_find_core(bus, BCMA_CORE_PCIE); if (core) { diff --git a/include/linux/bcma/bcma.h b/include/linux/bcma/bcma.h index 192c4ae..c5d7d4d 100644 --- a/include/linux/bcma/bcma.h +++ b/include/linux/bcma/bcma.h @@ -6,6 +6,7 @@ #include #include +#include #include "bcma_regs.h" @@ -198,6 +199,7 @@ struct bcma_bus { struct bcma_drv_cc drv_cc; struct bcma_drv_pci drv_pci; + struct bcma_drv_mips drv_mips; /* Internal-only stuff follows. Do not touch. */ struct list_head attach_list; diff --git a/include/linux/bcma/bcma_driver_mips.h b/include/linux/bcma/bcma_driver_mips.h new file mode 100644 index 0000000..5faf30c --- /dev/null +++ b/include/linux/bcma/bcma_driver_mips.h @@ -0,0 +1,40 @@ +#ifndef LINUX_BCMA_DRIVER_MIPS_H_ +#define LINUX_BCMA_DRIVER_MIPS_H_ + +#define BCMA_MIPS_IPSFLAG 0x0F08 +#define BCMA_MIPS_IPSFLAG_IRQ1 0x0000003F /* which sbflags get routed to mips interrupt 1 */ +#define BCMA_MIPS_IPSFLAG_IRQ1_SHIFT 0 +#define BCMA_MIPS_IPSFLAG_IRQ2 0x00003F00 /* which sbflags get routed to mips interrupt 2 */ +#define BCMA_MIPS_IPSFLAG_IRQ2_SHIFT 8 +#define BCMA_MIPS_IPSFLAG_IRQ3 0x003F0000 /* which sbflags get routed to mips interrupt 3 */ +#define BCMA_MIPS_IPSFLAG_IRQ3_SHIFT 16 +#define BCMA_MIPS_IPSFLAG_IRQ4 0x3F000000 /* which sbflags get routed to mips interrupt 4 */ +#define BCMA_MIPS_IPSFLAG_IRQ4_SHIFT 24 + +/* MIPS 74K core registers */ +#define BCMA_MIPS_MIPS74K_CORECTL 0x0000 +#define BCMA_MIPS_MIPS74K_EXCEPTBASE 0x0004 +#define BCMA_MIPS_MIPS74K_BIST 0x000C +#define BCMA_MIPS_MIPS74K_INTMASK_INT0 0x0014 +#define BCMA_MIPS_MIPS74K_INTMASK(int) ((int) * 4 + BCMA_MIPS_MIPS74K_INTMASK_INT0) +#define BCMA_MIPS_MIPS74K_NMIMASK 0x002C +#define BCMA_MIPS_MIPS74K_GPIOSEL 0x0040 +#define BCMA_MIPS_MIPS74K_GPIOOUT 0x0044 +#define BCMA_MIPS_MIPS74K_GPIOEN 0x0048 +#define BCMA_MIPS_MIPS74K_CLKCTLST 0x01E0 + +#define BCMA_MIPS_OOBSELOUTA30 0x100 + +struct bcma_device; + +struct bcma_drv_mips { + struct bcma_device *core; + + u8 flash_buswidth; + u32 flash_window; + u32 flash_window_size; +}; + +extern void bcma_core_mips_init(struct bcma_drv_mips *mcore); + +#endif /* LINUX_BCMA_DRIVER_MIPS_H_ */ -- 1.7.4.1 From hauke@hauke-m.de Mon Jun 6 00:08:22 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 00:10:25 +0200 (CEST) Received: from server19320154104.serverpool.info ([193.201.54.104]:60326 "EHLO hauke-m.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491785Ab1FEWIW (ORCPT ); Mon, 6 Jun 2011 00:08:22 +0200 Received: from localhost (localhost [127.0.0.1]) by hauke-m.de (Postfix) with ESMTP id 9EB2E8B1B; Mon, 6 Jun 2011 00:08:22 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at hauke-m.de Received: from hauke-m.de ([127.0.0.1]) by localhost (hauke-m.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id JNKxFfsR02SU; Mon, 6 Jun 2011 00:08:18 +0200 (CEST) Received: from localhost.localdomain (host-091-097-251-075.ewe-ip-backbone.de [91.97.251.75]) by hauke-m.de (Postfix) with ESMTPSA id D4D618B06; Mon, 6 Jun 2011 00:08:10 +0200 (CEST) From: Hauke Mehrtens To: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org Cc: zajec5@gmail.com, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com, Hauke Mehrtens Subject: [RFC][PATCH 05/10] bcma: add serial console support Date: Mon, 6 Jun 2011 00:07:33 +0200 Message-Id: <1307311658-15853-6-git-send-email-hauke@hauke-m.de> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> X-archive-position: 30227 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hauke@hauke-m.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3688 Content-Length: 4515 Lines: 150 This adds support for serial console to bcma, when operating on an embedded device. Signed-off-by: Hauke Mehrtens --- drivers/bcma/bcma_private.h | 4 ++ drivers/bcma/driver_chipcommon.c | 62 +++++++++++++++++++++++++++++++++ drivers/bcma/driver_mips.c | 9 +++++ include/linux/bcma/bcma_driver_mips.h | 11 ++++++ 4 files changed, 86 insertions(+), 0 deletions(-) diff --git a/drivers/bcma/bcma_private.h b/drivers/bcma/bcma_private.h index 842ee17..c65a6e2 100644 --- a/drivers/bcma/bcma_private.h +++ b/drivers/bcma/bcma_private.h @@ -22,6 +22,10 @@ int bcma_bus_scan(struct bcma_bus *bus); /* driver_mips.c */ extern unsigned int bcma_core_mips_irq(struct bcma_device *dev); +/* driver_chipcommon.c */ +extern int bcma_chipco_serial_init(struct bcma_drv_cc *cc, + struct bcma_drv_mips_serial_port *ports); + #ifdef CONFIG_BCMA_HOST_PCI /* host_pci.c */ extern int __init bcma_host_pci_init(void); diff --git a/drivers/bcma/driver_chipcommon.c b/drivers/bcma/driver_chipcommon.c index 6061022..b582570 100644 --- a/drivers/bcma/driver_chipcommon.c +++ b/drivers/bcma/driver_chipcommon.c @@ -87,3 +87,65 @@ u32 bcma_chipco_gpio_polarity(struct bcma_drv_cc *cc, u32 mask, u32 value) { return bcma_cc_write32_masked(cc, BCMA_CC_GPIOPOL, mask, value); } + +int bcma_chipco_serial_init(struct bcma_drv_cc *cc, + struct bcma_drv_mips_serial_port *ports) +{ + int nr_ports = 0; + u32 plltype; + unsigned int irq; + u32 baud_base, div; + u32 i, n; + unsigned int ccrev = cc->core->id.rev; + + plltype = (cc->capabilities & BCMA_CC_CAP_PLLT); + irq = bcma_core_mips_irq(cc->core); + + if ((ccrev >= 11) && (ccrev != 15) && (ccrev != 20)) { + /* Fixed ALP clock */ + baud_base = 20000000; + if (cc->capabilities & BCMA_CC_CAP_PMU) { + /* FIXME: baud_base is different for devices with a PMU */ + WARN_ON(1); + } + div = 1; + if (ccrev >= 21) { + /* Turn off UART clock before switching clocksource. */ + bcma_cc_write32(cc, BCMA_CC_CORECTL, + bcma_cc_read32(cc, BCMA_CC_CORECTL) + & ~BCMA_CC_CORECTL_UARTCLKEN); + } + /* Set the override bit so we don't divide it */ + bcma_cc_write32(cc, BCMA_CC_CORECTL, + bcma_cc_read32(cc, BCMA_CC_CORECTL) + | BCMA_CC_CORECTL_UARTCLK0); + if (ccrev >= 21) { + /* Re-enable the UART clock. */ + bcma_cc_write32(cc, BCMA_CC_CORECTL, + bcma_cc_read32(cc, BCMA_CC_CORECTL) + | BCMA_CC_CORECTL_UARTCLKEN); + } + } else + pr_err("serial not supported on this device ccrev: 0x%x\n", + ccrev); + + /* Determine the registers of the UARTs */ + n = (cc->capabilities & BCMA_CC_CAP_NRUART); + for (i = 0; i < n; i++) { + void __iomem *cc_mmio; + void __iomem *uart_regs; + + cc_mmio = cc->core->bus->mmio + + (cc->core->core_index * BCMA_CORE_SIZE); + uart_regs = cc_mmio + BCMA_CC_UART0_DATA; + uart_regs += (i * 256); + + nr_ports++; + ports[i].regs = uart_regs; + ports[i].irq = irq; + ports[i].baud_base = baud_base; + ports[i].reg_shift = 0; + } + + return nr_ports; +} diff --git a/drivers/bcma/driver_mips.c b/drivers/bcma/driver_mips.c index 0a6c217..40e4a6d 100644 --- a/drivers/bcma/driver_mips.c +++ b/drivers/bcma/driver_mips.c @@ -155,6 +155,14 @@ static void bcma_core_mips_dump_irq(struct bcma_bus *bus) } } +static void bcma_core_mips_serial_init(struct bcma_drv_mips *mcore) +{ + struct bcma_bus *bus = mcore->core->bus; + + mcore->nr_serial_ports = bcma_chipco_serial_init(&bus->drv_cc, + mcore->serial_ports); +} + static void bcma_core_mips_flash_detect(struct bcma_drv_mips *mcore) { struct bcma_bus *bus = mcore->core->bus; @@ -223,5 +231,6 @@ void bcma_core_mips_init(struct bcma_drv_mips *mcore) pr_info("after irq reconfiguration\n"); bcma_core_mips_dump_irq(bus); + bcma_core_mips_serial_init(mcore); bcma_core_mips_flash_detect(mcore); } diff --git a/include/linux/bcma/bcma_driver_mips.h b/include/linux/bcma/bcma_driver_mips.h index 5faf30c..6584e7d 100644 --- a/include/linux/bcma/bcma_driver_mips.h +++ b/include/linux/bcma/bcma_driver_mips.h @@ -27,9 +27,20 @@ struct bcma_device; +struct bcma_drv_mips_serial_port { + void *regs; + unsigned long clockspeed; + unsigned int irq; + unsigned int baud_base; + unsigned int reg_shift; +}; + struct bcma_drv_mips { struct bcma_device *core; + int nr_serial_ports; + struct bcma_drv_mips_serial_port serial_ports[4]; + u8 flash_buswidth; u32 flash_window; u32 flash_window_size; -- 1.7.4.1 From hauke@hauke-m.de Mon Jun 6 00:08:28 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 00:10:50 +0200 (CEST) Received: from server19320154104.serverpool.info ([193.201.54.104]:60339 "EHLO hauke-m.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491795Ab1FEWI2 (ORCPT ); Mon, 6 Jun 2011 00:08:28 +0200 Received: from localhost (localhost [127.0.0.1]) by hauke-m.de (Postfix) with ESMTP id EAE5C8B1C; Mon, 6 Jun 2011 00:08:27 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at hauke-m.de Received: from hauke-m.de ([127.0.0.1]) by localhost (hauke-m.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id bAC+gmlKiAle; Mon, 6 Jun 2011 00:08:23 +0200 (CEST) Received: from localhost.localdomain (host-091-097-251-075.ewe-ip-backbone.de [91.97.251.75]) by hauke-m.de (Postfix) with ESMTPSA id 049558B14; Mon, 6 Jun 2011 00:08:12 +0200 (CEST) From: Hauke Mehrtens To: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org Cc: zajec5@gmail.com, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com, Hauke Mehrtens Subject: [RFC][PATCH 07/10] bcma: add pci(e) host mode Date: Mon, 6 Jun 2011 00:07:35 +0200 Message-Id: <1307311658-15853-8-git-send-email-hauke@hauke-m.de> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> X-archive-position: 30228 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hauke@hauke-m.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3689 Content-Length: 4685 Lines: 148 This adds some stub for a pci(e) host controller. This controller is found on some embedded devices to attach other chips. Signed-off-by: Hauke Mehrtens --- drivers/bcma/Kconfig | 6 ++++ drivers/bcma/Makefile | 1 + drivers/bcma/bcma_private.h | 6 ++++ drivers/bcma/driver_pci.c | 12 ++++++++- drivers/bcma/driver_pci_host.c | 44 ++++++++++++++++++++++++++++++++++ include/linux/bcma/bcma_driver_pci.h | 1 + 6 files changed, 69 insertions(+), 1 deletions(-) create mode 100644 drivers/bcma/driver_pci_host.c diff --git a/drivers/bcma/Kconfig b/drivers/bcma/Kconfig index 568d30b..c863a87 100644 --- a/drivers/bcma/Kconfig +++ b/drivers/bcma/Kconfig @@ -27,6 +27,12 @@ config BCMA_HOST_PCI bool "Support for BCMA on PCI-host bus" depends on BCMA_HOST_PCI_POSSIBLE +config BCMA_PCICORE_HOSTMODE + bool "Hostmode support for BCMA PCI core" + depends on BCMA_DRIVER_MIPS + help + PCIcore hostmode operation (external PCI bus). + config BCMA_HOST_EMBEDDED bool depends on BCMA_DRIVER_MIPS diff --git a/drivers/bcma/Makefile b/drivers/bcma/Makefile index 50ddab8..f99abfe 100644 --- a/drivers/bcma/Makefile +++ b/drivers/bcma/Makefile @@ -1,6 +1,7 @@ bcma-y += main.o scan.o core.o bcma-y += driver_chipcommon.o driver_chipcommon_pmu.o bcma-y += driver_pci.o +bcma-$(CONFIG_BCMA_PCICORE_HOSTMODE) += driver_pci_host.o bcma-$(CONFIG_BCMA_DRIVER_MIPS) += driver_mips.o bcma-$(CONFIG_BCMA_HOST_PCI) += host_pci.o bcma-$(CONFIG_BCMA_HOST_EMBEDDED) += host_embedded.o diff --git a/drivers/bcma/bcma_private.h b/drivers/bcma/bcma_private.h index fbabe19..13cf25a 100644 --- a/drivers/bcma/bcma_private.h +++ b/drivers/bcma/bcma_private.h @@ -29,6 +29,12 @@ extern u32 bcma_pmu_get_clockcpu(struct bcma_drv_cc *cc); extern int bcma_chipco_serial_init(struct bcma_drv_cc *cc, struct bcma_drv_mips_serial_port *ports); +#ifdef CONFIG_BCMA_PCICORE_HOSTMODE +/* driver_pci_host.c */ +extern int bcma_pcicore_is_in_hostmode(struct bcma_drv_pci *pc); +extern void bcma_pcicore_init_hostmode(struct bcma_drv_pci *pc); +#endif /* CONFIG_BCMA_PCICORE_HOSTMODE */ + #ifdef CONFIG_BCMA_HOST_PCI /* host_pci.c */ extern int __init bcma_host_pci_init(void); diff --git a/drivers/bcma/driver_pci.c b/drivers/bcma/driver_pci.c index 789d68b..cf8cbe0 100644 --- a/drivers/bcma/driver_pci.c +++ b/drivers/bcma/driver_pci.c @@ -159,7 +159,17 @@ static void bcma_pcicore_serdes_workaround(struct bcma_drv_pci *pc) void bcma_core_pci_init(struct bcma_drv_pci *pc) { - bcma_pcicore_serdes_workaround(pc); + struct bcma_device *core = pc->core; + + if (!bcma_core_is_enabled(core)) + bcma_core_enable(core, 0); +#ifdef CONFIG_BCMA_PCICORE_HOSTMODE + pc->hostmode = bcma_pcicore_is_in_hostmode(pc); + if (pc->hostmode) + bcma_pcicore_init_hostmode(pc); +#endif /* CONFIG_BCMA_PCICORE_HOSTMODE */ + if (!pc->hostmode) + bcma_pcicore_serdes_workaround(pc); } int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc, struct bcma_device *core, diff --git a/drivers/bcma/driver_pci_host.c b/drivers/bcma/driver_pci_host.c new file mode 100644 index 0000000..b52c6c9 --- /dev/null +++ b/drivers/bcma/driver_pci_host.c @@ -0,0 +1,44 @@ +/* + * Broadcom specific AMBA + * PCI Core + * + * Copyright 2005, Broadcom Corporation + * Copyright 2006, 2007, Michael Buesch + * + * Licensed under the GNU/GPL. See COPYING for details. + */ + +#include "bcma_private.h" +#include + +#include +/* Probe a 32bit value on the bus and catch bus exceptions. + * Returns nonzero on a bus exception. + * This is MIPS specific */ +#define mips_busprobe32(val, addr) get_dbe((val), ((u32 *)(addr))) + + +void bcma_pcicore_init_hostmode(struct bcma_drv_pci *pc) +{ + /* TODO: implement PCI host mode */ +} + +int bcma_pcicore_is_in_hostmode(struct bcma_drv_pci *pc) +{ + struct bcma_bus *bus = pc->core->bus; + u16 chipid_top; + u32 tmp; + + chipid_top = (bus->chipinfo.id & 0xFF00); + if (chipid_top != 0x4700 && + chipid_top != 0x5300) + return 0; + +/* TODO: add when sprom is available + * if (bus->sprom.boardflags_lo & SSB_PCICORE_BFL_NOPCI) + * return 0; + */ + + return !mips_busprobe32(tmp, (bus->mmio + (pc->core->core_index * + BCMA_CORE_SIZE))); +} diff --git a/include/linux/bcma/bcma_driver_pci.h b/include/linux/bcma/bcma_driver_pci.h index b7e191c..5bbc58f 100644 --- a/include/linux/bcma/bcma_driver_pci.h +++ b/include/linux/bcma/bcma_driver_pci.h @@ -78,6 +78,7 @@ struct pci_dev; struct bcma_drv_pci { struct bcma_device *core; u8 setup_done:1; + u8 hostmode:1; }; /* Register access */ -- 1.7.4.1 From hauke@hauke-m.de Mon Jun 6 00:08:34 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 00:11:15 +0200 (CEST) Received: from server19320154104.serverpool.info ([193.201.54.104]:60353 "EHLO hauke-m.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491773Ab1FEWIe (ORCPT ); Mon, 6 Jun 2011 00:08:34 +0200 Received: from localhost (localhost [127.0.0.1]) by hauke-m.de (Postfix) with ESMTP id 3FD398B14; Mon, 6 Jun 2011 00:08:34 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at hauke-m.de Received: from hauke-m.de ([127.0.0.1]) by localhost (hauke-m.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id HJkEUPCwR3lz; Mon, 6 Jun 2011 00:08:28 +0200 (CEST) Received: from localhost.localdomain (host-091-097-251-075.ewe-ip-backbone.de [91.97.251.75]) by hauke-m.de (Postfix) with ESMTPSA id 09E888B0D; Mon, 6 Jun 2011 00:08:13 +0200 (CEST) From: Hauke Mehrtens To: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org Cc: zajec5@gmail.com, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com, Hauke Mehrtens Subject: [RFC][PATCH 08/10] bcm47xx: prepare to support different buses Date: Mon, 6 Jun 2011 00:07:36 +0200 Message-Id: <1307311658-15853-9-git-send-email-hauke@hauke-m.de> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> X-archive-position: 30229 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hauke@hauke-m.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3690 Content-Length: 13263 Lines: 449 The ssb bus is not hod directly any more. there is now a union which contains all the supported buses, now just ssb. As just one system bus can be used at a time the union does not cause any problems. Signed-off-by: Hauke Mehrtens --- arch/mips/bcm47xx/gpio.c | 56 ++++++++++++++++---------- arch/mips/bcm47xx/nvram.c | 15 +++++-- arch/mips/bcm47xx/serial.c | 13 +++++- arch/mips/bcm47xx/setup.c | 32 +++++++++++--- arch/mips/bcm47xx/time.c | 9 +++- arch/mips/bcm47xx/wgt634u.c | 13 ++++-- arch/mips/include/asm/mach-bcm47xx/bcm47xx.h | 14 ++++++- arch/mips/include/asm/mach-bcm47xx/gpio.h | 53 +++++++++++++++++------- drivers/watchdog/bcm47xx_wdt.c | 12 +++++- 9 files changed, 156 insertions(+), 61 deletions(-) diff --git a/arch/mips/bcm47xx/gpio.c b/arch/mips/bcm47xx/gpio.c index e4a5ee9..2f6d2df 100644 --- a/arch/mips/bcm47xx/gpio.c +++ b/arch/mips/bcm47xx/gpio.c @@ -20,42 +20,54 @@ static DECLARE_BITMAP(gpio_in_use, BCM47XX_EXTIF_GPIO_LINES); int gpio_request(unsigned gpio, const char *tag) { - if (ssb_chipco_available(&ssb_bcm47xx.chipco) && - ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES)) - return -EINVAL; + switch (bcm47xx_active_bus_type) { + case BCM47XX_BUS_TYPE_SSB: + if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) && + ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES)) + return -EINVAL; - if (ssb_extif_available(&ssb_bcm47xx.extif) && - ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES)) - return -EINVAL; + if (ssb_extif_available(&bcm47xx_bus.ssb.extif) && + ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES)) + return -EINVAL; - if (test_and_set_bit(gpio, gpio_in_use)) - return -EBUSY; + if (test_and_set_bit(gpio, gpio_in_use)) + return -EBUSY; - return 0; + return 0; + } + return -EINVAL; } EXPORT_SYMBOL(gpio_request); void gpio_free(unsigned gpio) { - if (ssb_chipco_available(&ssb_bcm47xx.chipco) && - ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES)) - return; + switch (bcm47xx_active_bus_type) { + case BCM47XX_BUS_TYPE_SSB: + if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) && + ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES)) + return; - if (ssb_extif_available(&ssb_bcm47xx.extif) && - ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES)) - return; + if (ssb_extif_available(&bcm47xx_bus.ssb.extif) && + ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES)) + return; - clear_bit(gpio, gpio_in_use); + clear_bit(gpio, gpio_in_use); + return; + } } EXPORT_SYMBOL(gpio_free); int gpio_to_irq(unsigned gpio) { - if (ssb_chipco_available(&ssb_bcm47xx.chipco)) - return ssb_mips_irq(ssb_bcm47xx.chipco.dev) + 2; - else if (ssb_extif_available(&ssb_bcm47xx.extif)) - return ssb_mips_irq(ssb_bcm47xx.extif.dev) + 2; - else - return -EINVAL; + switch (bcm47xx_active_bus_type) { + case BCM47XX_BUS_TYPE_SSB: + if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco)) + return ssb_mips_irq(bcm47xx_bus.ssb.chipco.dev) + 2; + else if (ssb_extif_available(&bcm47xx_bus.ssb.extif)) + return ssb_mips_irq(bcm47xx_bus.ssb.extif.dev) + 2; + else + return -EINVAL; + } + return -EINVAL; } EXPORT_SYMBOL_GPL(gpio_to_irq); diff --git a/arch/mips/bcm47xx/nvram.c b/arch/mips/bcm47xx/nvram.c index 54db815..d2304d0 100644 --- a/arch/mips/bcm47xx/nvram.c +++ b/arch/mips/bcm47xx/nvram.c @@ -26,14 +26,21 @@ static char nvram_buf[NVRAM_SPACE]; /* Probe for NVRAM header */ static void early_nvram_init(void) { - struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore; + struct ssb_mipscore *mcore_ssb; struct nvram_header *header; int i; - u32 base, lim, off; + u32 base = 0; + u32 lim = 0; + u32 off; u32 *src, *dst; - base = mcore->flash_window; - lim = mcore->flash_window_size; + switch (bcm47xx_active_bus_type) { + case BCM47XX_BUS_TYPE_SSB: + mcore_ssb = &bcm47xx_bus.ssb.mipscore; + base = mcore_ssb->flash_window; + lim = mcore_ssb->flash_window_size; + break; + } off = FLASH_MIN; while (off <= lim) { diff --git a/arch/mips/bcm47xx/serial.c b/arch/mips/bcm47xx/serial.c index 59c11af..87c2c5e 100644 --- a/arch/mips/bcm47xx/serial.c +++ b/arch/mips/bcm47xx/serial.c @@ -23,10 +23,10 @@ static struct platform_device uart8250_device = { }, }; -static int __init uart8250_init(void) +static int __init uart8250_init_ssb(void) { int i; - struct ssb_mipscore *mcore = &(ssb_bcm47xx.mipscore); + struct ssb_mipscore *mcore = &(bcm47xx_bus.ssb.mipscore); memset(&uart8250_data, 0, sizeof(uart8250_data)); @@ -45,6 +45,15 @@ static int __init uart8250_init(void) return platform_device_register(&uart8250_device); } +static int __init uart8250_init(void) +{ + switch (bcm47xx_active_bus_type) { + case BCM47XX_BUS_TYPE_SSB: + return uart8250_init_ssb(); + } + return -EINVAL; +} + module_init(uart8250_init); MODULE_AUTHOR("Aurelien Jarno "); diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c index 73b529b..c64b76d 100644 --- a/arch/mips/bcm47xx/setup.c +++ b/arch/mips/bcm47xx/setup.c @@ -35,15 +35,21 @@ #include #include -struct ssb_bus ssb_bcm47xx; -EXPORT_SYMBOL(ssb_bcm47xx); +union bcm47xx_bus bcm47xx_bus; +EXPORT_SYMBOL(bcm47xx_bus); + +enum bcm47xx_bus_type bcm47xx_active_bus_type; static void bcm47xx_machine_restart(char *command) { printk(KERN_ALERT "Please stand by while rebooting the system...\n"); local_irq_disable(); /* Set the watchdog timer to reset immediately */ - ssb_watchdog_timer_set(&ssb_bcm47xx, 1); + switch (bcm47xx_active_bus_type) { + case BCM47XX_BUS_TYPE_SSB: + ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1); + break; + } while (1) cpu_relax(); } @@ -52,7 +58,11 @@ static void bcm47xx_machine_halt(void) { /* Disable interrupts and watchdog and spin forever */ local_irq_disable(); - ssb_watchdog_timer_set(&ssb_bcm47xx, 0); + switch (bcm47xx_active_bus_type) { + case BCM47XX_BUS_TYPE_SSB: + ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0); + break; + } while (1) cpu_relax(); } @@ -247,7 +257,7 @@ static int bcm47xx_get_invariants(struct ssb_bus *bus, return 0; } -void __init plat_mem_setup(void) +static void __init bcm47xx_register_ssb(void) { int err; char buf[100]; @@ -258,12 +268,12 @@ void __init plat_mem_setup(void) printk(KERN_WARNING "bcm47xx: someone else already registered" " a ssb SPROM callback handler (err %d)\n", err); - err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE, + err = ssb_bus_ssbbus_register(&(bcm47xx_bus.ssb), SSB_ENUM_BASE, bcm47xx_get_invariants); if (err) panic("Failed to initialize SSB bus (err %d)\n", err); - mcore = &ssb_bcm47xx.mipscore; + mcore = &bcm47xx_bus.ssb.mipscore; if (nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) { if (strstr(buf, "console=ttyS1")) { struct ssb_serial_port port; @@ -276,6 +286,14 @@ void __init plat_mem_setup(void) memcpy(&mcore->serial_ports[1], &port, sizeof(port)); } } +} + +void __init plat_mem_setup(void) +{ + struct cpuinfo_mips *c = ¤t_cpu_data; + + bcm47xx_active_bus_type = BCM47XX_BUS_TYPE_SSB; + bcm47xx_register_ssb(); _machine_restart = bcm47xx_machine_restart; _machine_halt = bcm47xx_machine_halt; diff --git a/arch/mips/bcm47xx/time.c b/arch/mips/bcm47xx/time.c index 0c6f47b..a7be993 100644 --- a/arch/mips/bcm47xx/time.c +++ b/arch/mips/bcm47xx/time.c @@ -30,7 +30,7 @@ void __init plat_time_init(void) { - unsigned long hz; + unsigned long hz = 0; /* * Use deterministic values for initial counter interrupt @@ -39,7 +39,12 @@ void __init plat_time_init(void) write_c0_count(0); write_c0_compare(0xffff); - hz = ssb_cpu_clock(&ssb_bcm47xx.mipscore) / 2; + switch (bcm47xx_active_bus_type) { + case BCM47XX_BUS_TYPE_SSB: + hz = ssb_cpu_clock(&bcm47xx_bus.ssb.mipscore) / 2; + break; + } + if (!hz) hz = 100000000; diff --git a/arch/mips/bcm47xx/wgt634u.c b/arch/mips/bcm47xx/wgt634u.c index 74d0696..79ecd0a 100644 --- a/arch/mips/bcm47xx/wgt634u.c +++ b/arch/mips/bcm47xx/wgt634u.c @@ -108,7 +108,7 @@ static irqreturn_t gpio_interrupt(int irq, void *ignored) /* Interrupts are shared, check if the current one is a GPIO interrupt. */ - if (!ssb_chipco_irq_status(&ssb_bcm47xx.chipco, + if (!ssb_chipco_irq_status(&bcm47xx_bus.ssb.chipco, SSB_CHIPCO_IRQ_GPIO)) return IRQ_NONE; @@ -133,21 +133,24 @@ static int __init wgt634u_init(void) * been allocated ranges 00:09:5b:xx:xx:xx and 00:0f:b5:xx:xx:xx. */ - u8 *et0mac = ssb_bcm47xx.sprom.et0mac; + if (bcm47xx_active_bus_type != BCM47XX_BUS_TYPE_SSB) + return -ENODEV; + + u8 *et0mac = bcm47xx_bus.ssb.sprom.et0mac; if (et0mac[0] == 0x00 && ((et0mac[1] == 0x09 && et0mac[2] == 0x5b) || (et0mac[1] == 0x0f && et0mac[2] == 0xb5))) { - struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore; + struct ssb_mipscore *mcore = &bcm47xx_bus.ssb.mipscore; printk(KERN_INFO "WGT634U machine detected.\n"); if (!request_irq(gpio_to_irq(WGT634U_GPIO_RESET), gpio_interrupt, IRQF_SHARED, - "WGT634U GPIO", &ssb_bcm47xx.chipco)) { + "WGT634U GPIO", &bcm47xx_bus.ssb.chipco)) { gpio_direction_input(WGT634U_GPIO_RESET); gpio_intmask(WGT634U_GPIO_RESET, 1); - ssb_chipco_irq_mask(&ssb_bcm47xx.chipco, + ssb_chipco_irq_mask(&bcm47xx_bus.ssb.chipco, SSB_CHIPCO_IRQ_GPIO, SSB_CHIPCO_IRQ_GPIO); } diff --git a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h index d008f47..4be8b95 100644 --- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h +++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h @@ -19,7 +19,17 @@ #ifndef __ASM_BCM47XX_H #define __ASM_BCM47XX_H -/* SSB bus */ -extern struct ssb_bus ssb_bcm47xx; +#include + +enum bcm47xx_bus_type { + BCM47XX_BUS_TYPE_SSB, +}; + +union bcm47xx_bus { + struct ssb_bus ssb; +}; + +extern union bcm47xx_bus bcm47xx_bus; +extern enum bcm47xx_bus_type bcm47xx_active_bus_type; #endif /* __ASM_BCM47XX_H */ diff --git a/arch/mips/include/asm/mach-bcm47xx/gpio.h b/arch/mips/include/asm/mach-bcm47xx/gpio.h index 9850414..16d6c19 100644 --- a/arch/mips/include/asm/mach-bcm47xx/gpio.h +++ b/arch/mips/include/asm/mach-bcm47xx/gpio.h @@ -21,41 +21,64 @@ extern int gpio_to_irq(unsigned gpio); static inline int gpio_get_value(unsigned gpio) { - return ssb_gpio_in(&ssb_bcm47xx, 1 << gpio); + switch (bcm47xx_active_bus_type) { + case BCM47XX_BUS_TYPE_SSB: + return ssb_gpio_in(&bcm47xx_bus.ssb, 1 << gpio); + } + return -EINVAL; } static inline void gpio_set_value(unsigned gpio, int value) { - ssb_gpio_out(&ssb_bcm47xx, 1 << gpio, value ? 1 << gpio : 0); + switch (bcm47xx_active_bus_type) { + case BCM47XX_BUS_TYPE_SSB: + ssb_gpio_out(&bcm47xx_bus.ssb, 1 << gpio, value ? 1 << gpio : 0); + } } static inline int gpio_direction_input(unsigned gpio) { - ssb_gpio_outen(&ssb_bcm47xx, 1 << gpio, 0); - return 0; + switch (bcm47xx_active_bus_type) { + case BCM47XX_BUS_TYPE_SSB: + ssb_gpio_outen(&bcm47xx_bus.ssb, 1 << gpio, 0); + return 0; + } + return -EINVAL; } static inline int gpio_direction_output(unsigned gpio, int value) { - /* first set the gpio out value */ - ssb_gpio_out(&ssb_bcm47xx, 1 << gpio, value ? 1 << gpio : 0); - /* then set the gpio mode */ - ssb_gpio_outen(&ssb_bcm47xx, 1 << gpio, 1 << gpio); - return 0; + switch (bcm47xx_active_bus_type) { + case BCM47XX_BUS_TYPE_SSB: + /* first set the gpio out value */ + ssb_gpio_out(&bcm47xx_bus.ssb, 1 << gpio, value ? 1 << gpio : 0); + /* then set the gpio mode */ + ssb_gpio_outen(&bcm47xx_bus.ssb, 1 << gpio, 1 << gpio); + return 0; + } + return -EINVAL; } static inline int gpio_intmask(unsigned gpio, int value) { - ssb_gpio_intmask(&ssb_bcm47xx, 1 << gpio, - value ? 1 << gpio : 0); - return 0; + switch (bcm47xx_active_bus_type) { + case BCM47XX_BUS_TYPE_SSB: + ssb_gpio_intmask(&bcm47xx_bus.ssb, 1 << gpio, + value ? 1 << gpio : 0); + return 0; + } + return -EINVAL; } static inline int gpio_polarity(unsigned gpio, int value) { - ssb_gpio_polarity(&ssb_bcm47xx, 1 << gpio, - value ? 1 << gpio : 0); - return 0; + switch (bcm47xx_active_bus_type) { + case BCM47XX_BUS_TYPE_SSB: + ssb_gpio_polarity(&bcm47xx_bus.ssb, 1 << gpio, + value ? 1 << gpio : 0); + return 0; + } + return -EINVAL; } diff --git a/drivers/watchdog/bcm47xx_wdt.c b/drivers/watchdog/bcm47xx_wdt.c index bd44417..7e4e063 100644 --- a/drivers/watchdog/bcm47xx_wdt.c +++ b/drivers/watchdog/bcm47xx_wdt.c @@ -54,12 +54,20 @@ static atomic_t ticks; static inline void bcm47xx_wdt_hw_start(void) { /* this is 2,5s on 100Mhz clock and 2s on 133 Mhz */ - ssb_watchdog_timer_set(&ssb_bcm47xx, 0xfffffff); + switch (bcm47xx_active_bus_type) { + case BCM47XX_BUS_TYPE_SSB: + ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0xfffffff); + break; + } } static inline int bcm47xx_wdt_hw_stop(void) { - return ssb_watchdog_timer_set(&ssb_bcm47xx, 0); + switch (bcm47xx_active_bus_type) { + case BCM47XX_BUS_TYPE_SSB: + return ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0); + } + return -EINVAL; } static void bcm47xx_timer_tick(unsigned long unused) -- 1.7.4.1 From hauke@hauke-m.de Mon Jun 6 00:08:37 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 00:11:39 +0200 (CEST) Received: from server19320154104.serverpool.info ([193.201.54.104]:60361 "EHLO hauke-m.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491817Ab1FEWIh (ORCPT ); Mon, 6 Jun 2011 00:08:37 +0200 Received: from localhost (localhost [127.0.0.1]) by hauke-m.de (Postfix) with ESMTP id B47EC8B0D; Mon, 6 Jun 2011 00:08:36 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at hauke-m.de Received: from hauke-m.de ([127.0.0.1]) by localhost (hauke-m.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 5IcnT5bL7c4s; Mon, 6 Jun 2011 00:08:20 +0200 (CEST) Received: from localhost.localdomain (host-091-097-251-075.ewe-ip-backbone.de [91.97.251.75]) by hauke-m.de (Postfix) with ESMTPSA id EA2058B12; Mon, 6 Jun 2011 00:08:11 +0200 (CEST) From: Hauke Mehrtens To: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org Cc: zajec5@gmail.com, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com, Hauke Mehrtens Subject: [RFC][PATCH 06/10] bcma: get CPU clock Date: Mon, 6 Jun 2011 00:07:34 +0200 Message-Id: <1307311658-15853-7-git-send-email-hauke@hauke-m.de> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> X-archive-position: 30230 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hauke@hauke-m.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3691 Content-Length: 6887 Lines: 210 Add method to return the clock of the CPU. This is needed by the arch code to calculate the mips_hpt_frequency. Signed-off-by: Hauke Mehrtens --- drivers/bcma/bcma_private.h | 3 + drivers/bcma/driver_chipcommon_pmu.c | 86 +++++++++++++++++++++++++++ drivers/bcma/driver_mips.c | 12 ++++ include/linux/bcma/bcma_driver_chipcommon.h | 35 +++++++++++ include/linux/bcma/bcma_driver_mips.h | 1 + 5 files changed, 137 insertions(+), 0 deletions(-) diff --git a/drivers/bcma/bcma_private.h b/drivers/bcma/bcma_private.h index c65a6e2..fbabe19 100644 --- a/drivers/bcma/bcma_private.h +++ b/drivers/bcma/bcma_private.h @@ -22,6 +22,9 @@ int bcma_bus_scan(struct bcma_bus *bus); /* driver_mips.c */ extern unsigned int bcma_core_mips_irq(struct bcma_device *dev); +/* driver_chipcommon_pmu.c */ +extern u32 bcma_pmu_get_clockcpu(struct bcma_drv_cc *cc); + /* driver_chipcommon.c */ extern int bcma_chipco_serial_init(struct bcma_drv_cc *cc, struct bcma_drv_mips_serial_port *ports); diff --git a/drivers/bcma/driver_chipcommon_pmu.c b/drivers/bcma/driver_chipcommon_pmu.c index f44177a..4a700f8 100644 --- a/drivers/bcma/driver_chipcommon_pmu.c +++ b/drivers/bcma/driver_chipcommon_pmu.c @@ -11,6 +11,13 @@ #include "bcma_private.h" #include +static u32 bcma_chipco_pll_read(struct bcma_drv_cc *cc, u32 offset) +{ + bcma_cc_write32(cc, BCMA_CC_PLLCTL_ADDR, offset); + bcma_cc_read32(cc, BCMA_CC_PLLCTL_ADDR); + return bcma_cc_read32(cc, BCMA_CC_PLLCTL_DATA); +} + static void bcma_chipco_chipctl_maskset(struct bcma_drv_cc *cc, u32 offset, u32 mask, u32 set) { @@ -132,3 +139,82 @@ void bcma_pmu_init(struct bcma_drv_cc *cc) bcma_pmu_swreg_init(cc); bcma_pmu_workarounds(cc); } + +static u32 bcma_pmu_alp_clock(struct bcma_drv_cc *cc) +{ + struct bcma_bus *bus = cc->core->bus; + + switch (bus->chipinfo.id) { + case 0x4716: + case 0x4748: + case 47162: + /* always 20Mhz */ + return 20000 * 1000; + default: + pr_warn("No ALP clock specified for %04X device, " + "pmu rev. %d, using default %d Hz\n", + bus->chipinfo.id, cc->pmu.rev, BCMA_CC_PMU_ALP_CLOCK); + } + return BCMA_CC_PMU_ALP_CLOCK; +} + +/* Find the output of the "m" pll divider given pll controls that start with + * pllreg "pll0" i.e. 12 for main 6 for phy, 0 for misc. + */ +static u32 bcma_pmu_clock(struct bcma_drv_cc *cc, u32 pll0, u32 m) +{ + u32 tmp, div, ndiv, p1, p2, fc; + + BUG_ON(!m || m > 4); + + BUG_ON((pll0 & 3) || (pll0 > BCMA_CC_PMU4716_MAINPLL_PLL0)); + + tmp = bcma_chipco_pll_read(cc, pll0 + BCMA_CC_PPL_P1P2_OFF); + p1 = (tmp & BCMA_CC_PPL_P1_MASK) >> BCMA_CC_PPL_P1_SHIFT; + p2 = (tmp & BCMA_CC_PPL_P2_MASK) >> BCMA_CC_PPL_P2_SHIFT; + + tmp = bcma_chipco_pll_read(cc, pll0 + BCMA_CC_PPL_M14_OFF); + div = (tmp >> ((m - 1) * BCMA_CC_PPL_MDIV_WIDTH)) & BCMA_CC_PPL_MDIV_MASK; + + tmp = bcma_chipco_pll_read(cc, pll0 + BCMA_CC_PPL_NM5_OFF); + ndiv = (tmp & BCMA_CC_PPL_NDIV_MASK) >> BCMA_CC_PPL_NDIV_SHIFT; + + /* Do calculation in Mhz */ + fc = bcma_pmu_alp_clock(cc) / 1000000; + fc = (p1 * ndiv * fc) / p2; + + /* Return clock in Hertz */ + return (fc / div) * 1000000; +} + +/* query bus clock frequency for PMU-enabled chipcommon */ +u32 bcma_pmu_get_clockcontrol(struct bcma_drv_cc *cc) +{ + struct bcma_bus *bus = cc->core->bus; + + switch (bus->chipinfo.id) { + case 0x4716: + case 0x4748: + case 47162: + return bcma_pmu_clock(cc, BCMA_CC_PMU4716_MAINPLL_PLL0, + BCMA_CC_PMU5_MAINPLL_SSB); + default: + pr_warn("No backplane clock specified for %04X device, " + "pmu rev. %d, using default %d Hz\n", + bus->chipinfo.id, cc->pmu.rev, BCMA_CC_PMU_HT_CLOCK); + } + return BCMA_CC_PMU_HT_CLOCK; +} + +/* query cpu clock frequency for PMU-enabled chipcommon */ +u32 bcma_pmu_get_clockcpu(struct bcma_drv_cc *cc) +{ + struct bcma_bus *bus = cc->core->bus; + + if ((cc->pmu.rev == 5 || cc->pmu.rev == 6 || cc->pmu.rev == 7) && + (bus->chipinfo.id != 0x4319)) + return bcma_pmu_clock(cc, BCMA_CC_PMU4716_MAINPLL_PLL0, + BCMA_CC_PMU5_MAINPLL_CPU); + + return bcma_pmu_get_clockcontrol(cc); +} diff --git a/drivers/bcma/driver_mips.c b/drivers/bcma/driver_mips.c index 40e4a6d..faaa232 100644 --- a/drivers/bcma/driver_mips.c +++ b/drivers/bcma/driver_mips.c @@ -155,6 +155,18 @@ static void bcma_core_mips_dump_irq(struct bcma_bus *bus) } } +u32 bcma_cpu_clock(struct bcma_drv_mips *mcore) +{ + struct bcma_bus *bus = mcore->core->bus; + + if (bus->drv_cc.capabilities & BCMA_CC_CAP_PMU) + return bcma_pmu_get_clockcpu(&bus->drv_cc); + + pr_err("No PMU available, need this to get the cpu clock\n"); + return 0; +} +EXPORT_SYMBOL(bcma_cpu_clock); + static void bcma_core_mips_serial_init(struct bcma_drv_mips *mcore) { struct bcma_bus *bus = mcore->core->bus; diff --git a/include/linux/bcma/bcma_driver_chipcommon.h b/include/linux/bcma/bcma_driver_chipcommon.h index 083c3b6..77dc08c 100644 --- a/include/linux/bcma/bcma_driver_chipcommon.h +++ b/include/linux/bcma/bcma_driver_chipcommon.h @@ -245,6 +245,41 @@ #define BCMA_CC_PLLCTL_ADDR 0x0660 #define BCMA_CC_PLLCTL_DATA 0x0664 +/* Divider allocation in 4716/47162/5356 */ +#define BCMA_CC_PMU5_MAINPLL_CPU 1 +#define BCMA_CC_PMU5_MAINPLL_MEM 2 +#define BCMA_CC_PMU5_MAINPLL_SSB 3 + +/* PLL usage in 4716/47162 */ +#define BCMA_CC_PMU4716_MAINPLL_PLL0 12 + +/* ALP clock on pre-PMU chips */ +#define BCMA_CC_PMU_ALP_CLOCK 20000000 +/* HT clock for systems with PMU-enabled chipcommon */ +#define BCMA_CC_PMU_HT_CLOCK 80000000 + +/* PMU rev 5 (& 6) */ +#define BCMA_CC_PPL_P1P2_OFF 0 +#define BCMA_CC_PPL_P1_MASK 0x0f000000 +#define BCMA_CC_PPL_P1_SHIFT 24 +#define BCMA_CC_PPL_P2_MASK 0x00f00000 +#define BCMA_CC_PPL_P2_SHIFT 20 +#define BCMA_CC_PPL_M14_OFF 1 +#define BCMA_CC_PPL_MDIV_MASK 0x000000ff +#define BCMA_CC_PPL_MDIV_WIDTH 8 +#define BCMA_CC_PPL_NM5_OFF 2 +#define BCMA_CC_PPL_NDIV_MASK 0xfff00000 +#define BCMA_CC_PPL_NDIV_SHIFT 20 +#define BCMA_CC_PPL_FMAB_OFF 3 +#define BCMA_CC_PPL_MRAT_MASK 0xf0000000 +#define BCMA_CC_PPL_MRAT_SHIFT 28 +#define BCMA_CC_PPL_ABRAT_MASK 0x08000000 +#define BCMA_CC_PPL_ABRAT_SHIFT 27 +#define BCMA_CC_PPL_FDIV_MASK 0x07ffffff +#define BCMA_CC_PPL_PLLCTL_OFF 4 +#define BCMA_CC_PPL_PCHI_OFF 5 +#define BCMA_CC_PPL_PCHI_MASK 0x0000003f + /* Data for the PMU, if available. * Check availability with ((struct bcma_chipcommon)->capabilities & BCMA_CC_CAP_PMU) */ diff --git a/include/linux/bcma/bcma_driver_mips.h b/include/linux/bcma/bcma_driver_mips.h index 6584e7d..8346fde 100644 --- a/include/linux/bcma/bcma_driver_mips.h +++ b/include/linux/bcma/bcma_driver_mips.h @@ -47,5 +47,6 @@ struct bcma_drv_mips { }; extern void bcma_core_mips_init(struct bcma_drv_mips *mcore); +extern u32 bcma_cpu_clock(struct bcma_drv_mips *mcore); #endif /* LINUX_BCMA_DRIVER_MIPS_H_ */ -- 1.7.4.1 From hauke@hauke-m.de Mon Jun 6 00:08:40 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 00:12:04 +0200 (CEST) Received: from server19320154104.serverpool.info ([193.201.54.104]:60375 "EHLO hauke-m.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491820Ab1FEWIk (ORCPT ); Mon, 6 Jun 2011 00:08:40 +0200 Received: from localhost (localhost [127.0.0.1]) by hauke-m.de (Postfix) with ESMTP id 5AC448B12; Mon, 6 Jun 2011 00:08:40 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at hauke-m.de Received: from hauke-m.de ([127.0.0.1]) by localhost (hauke-m.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id jqWvFN646hwD; Mon, 6 Jun 2011 00:08:34 +0200 (CEST) Received: from localhost.localdomain (host-091-097-251-075.ewe-ip-backbone.de [91.97.251.75]) by hauke-m.de (Postfix) with ESMTPSA id 1FAE18B15; Mon, 6 Jun 2011 00:08:15 +0200 (CEST) From: Hauke Mehrtens To: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org Cc: zajec5@gmail.com, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com, Hauke Mehrtens Subject: [RFC][PATCH 09/10] bcm47xx: add support for bcma bus Date: Mon, 6 Jun 2011 00:07:37 +0200 Message-Id: <1307311658-15853-10-git-send-email-hauke@hauke-m.de> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> X-archive-position: 30231 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hauke@hauke-m.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3692 Content-Length: 9389 Lines: 319 This patch add support for the bcma bus. Broadcom uses only Mips 74K CPUs on the new SoC and on the old ons using ssb bus there are no Mips 74K CPUs. Signed-off-by: Hauke Mehrtens --- arch/mips/Kconfig | 4 +++ arch/mips/bcm47xx/gpio.c | 9 ++++++++ arch/mips/bcm47xx/nvram.c | 6 +++++ arch/mips/bcm47xx/serial.c | 24 +++++++++++++++++++++++ arch/mips/bcm47xx/setup.c | 27 ++++++++++++++++++++++++- arch/mips/bcm47xx/time.c | 3 ++ arch/mips/include/asm/mach-bcm47xx/bcm47xx.h | 3 ++ arch/mips/include/asm/mach-bcm47xx/gpio.h | 18 +++++++++++++++++ drivers/watchdog/bcm47xx_wdt.c | 6 +++++ 9 files changed, 98 insertions(+), 2 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 653da62..bdb0341 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -100,6 +100,10 @@ config BCM47XX select SSB_EMBEDDED select SSB_B43_PCI_BRIDGE if PCI select SSB_PCICORE_HOSTMODE if PCI + select BCMA + select BCMA_HOST_EMBEDDED + select BCMA_DRIVER_MIPS + select BCMA_PCICORE_HOSTMODE select GENERIC_GPIO select SYS_HAS_EARLY_PRINTK select CFE diff --git a/arch/mips/bcm47xx/gpio.c b/arch/mips/bcm47xx/gpio.c index 2f6d2df..42af3f8 100644 --- a/arch/mips/bcm47xx/gpio.c +++ b/arch/mips/bcm47xx/gpio.c @@ -34,6 +34,9 @@ int gpio_request(unsigned gpio, const char *tag) return -EBUSY; return 0; + case BCM47XX_BUS_TYPE_BCMA: + /* Not implemenmted yet */ + return -EINVAL; } return -EINVAL; } @@ -53,6 +56,9 @@ void gpio_free(unsigned gpio) clear_bit(gpio, gpio_in_use); return; + case BCM47XX_BUS_TYPE_BCMA: + /* Not implemenmted yet */ + return; } } EXPORT_SYMBOL(gpio_free); @@ -67,6 +73,9 @@ int gpio_to_irq(unsigned gpio) return ssb_mips_irq(bcm47xx_bus.ssb.extif.dev) + 2; else return -EINVAL; + case BCM47XX_BUS_TYPE_BCMA: + /* Not implemenmted yet */ + return -EINVAL; } return -EINVAL; } diff --git a/arch/mips/bcm47xx/nvram.c b/arch/mips/bcm47xx/nvram.c index d2304d0..75c36c4 100644 --- a/arch/mips/bcm47xx/nvram.c +++ b/arch/mips/bcm47xx/nvram.c @@ -27,6 +27,7 @@ static char nvram_buf[NVRAM_SPACE]; static void early_nvram_init(void) { struct ssb_mipscore *mcore_ssb; + struct bcma_drv_mips *mcore_bcma; struct nvram_header *header; int i; u32 base = 0; @@ -40,6 +41,11 @@ static void early_nvram_init(void) base = mcore_ssb->flash_window; lim = mcore_ssb->flash_window_size; break; + case BCM47XX_BUS_TYPE_BCMA: + mcore_bcma = &bcm47xx_bus.bcma.drv_mips; + base = mcore_bcma->flash_window; + lim = mcore_bcma->flash_window_size; + break; } off = FLASH_MIN; diff --git a/arch/mips/bcm47xx/serial.c b/arch/mips/bcm47xx/serial.c index 87c2c5e..ed74d975 100644 --- a/arch/mips/bcm47xx/serial.c +++ b/arch/mips/bcm47xx/serial.c @@ -45,11 +45,35 @@ static int __init uart8250_init_ssb(void) return platform_device_register(&uart8250_device); } +static int __init uart8250_init_bcma(void) +{ + int i; + struct bcma_drv_mips *mcore = &(bcm47xx_bus.bcma.drv_mips); + + memset(&uart8250_data, 0, sizeof(uart8250_data)); + + for (i = 0; i < mcore->nr_serial_ports; i++) { + struct plat_serial8250_port *p = &(uart8250_data[i]); + struct bcma_drv_mips_serial_port *bcma_port = &(mcore->serial_ports[i]); + + p->mapbase = (unsigned int) bcma_port->regs; + p->membase = (void *) bcma_port->regs; + p->irq = bcma_port->irq + 2; + p->uartclk = bcma_port->baud_base; + p->regshift = bcma_port->reg_shift; + p->iotype = UPIO_MEM; + p->flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ; + } + return platform_device_register(&uart8250_device); +} + static int __init uart8250_init(void) { switch (bcm47xx_active_bus_type) { case BCM47XX_BUS_TYPE_SSB: return uart8250_init_ssb(); + case BCM47XX_BUS_TYPE_BCMA: + return uart8250_init_bcma(); } return -EINVAL; } diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c index c64b76d..8dd82f3 100644 --- a/arch/mips/bcm47xx/setup.c +++ b/arch/mips/bcm47xx/setup.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include @@ -49,6 +50,9 @@ static void bcm47xx_machine_restart(char *command) case BCM47XX_BUS_TYPE_SSB: ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1); break; + case BCM47XX_BUS_TYPE_BCMA: + bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.drv_cc, 1); + break; } while (1) cpu_relax(); @@ -62,6 +66,9 @@ static void bcm47xx_machine_halt(void) case BCM47XX_BUS_TYPE_SSB: ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0); break; + case BCM47XX_BUS_TYPE_BCMA: + bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.drv_cc, 0); + break; } while (1) cpu_relax(); @@ -288,12 +295,28 @@ static void __init bcm47xx_register_ssb(void) } } +static void __init bcm47xx_register_bcma(void) +{ + int err; + + err = bcma_host_bcma_register(&bcm47xx_bus.bcma); + if (err) + panic("Failed to initialize BCMA bus (err %d)\n", err); +} + void __init plat_mem_setup(void) { struct cpuinfo_mips *c = ¤t_cpu_data; - bcm47xx_active_bus_type = BCM47XX_BUS_TYPE_SSB; - bcm47xx_register_ssb(); + if (c->cputype == CPU_74K) { + printk(KERN_INFO "bcm47xx: using bcma bus\n"); + bcm47xx_active_bus_type = BCM47XX_BUS_TYPE_BCMA; + bcm47xx_register_bcma(); + } else { + printk(KERN_INFO "bcm47xx: using ssb bus\n"); + bcm47xx_active_bus_type = BCM47XX_BUS_TYPE_SSB; + bcm47xx_register_ssb(); + } _machine_restart = bcm47xx_machine_restart; _machine_halt = bcm47xx_machine_halt; diff --git a/arch/mips/bcm47xx/time.c b/arch/mips/bcm47xx/time.c index a7be993..ace3ba2 100644 --- a/arch/mips/bcm47xx/time.c +++ b/arch/mips/bcm47xx/time.c @@ -43,6 +43,9 @@ void __init plat_time_init(void) case BCM47XX_BUS_TYPE_SSB: hz = ssb_cpu_clock(&bcm47xx_bus.ssb.mipscore) / 2; break; + case BCM47XX_BUS_TYPE_BCMA: + hz = bcma_cpu_clock(&bcm47xx_bus.bcma.drv_mips) / 2; + break; } if (!hz) diff --git a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h index 4be8b95..3e6ccb9 100644 --- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h +++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h @@ -20,13 +20,16 @@ #define __ASM_BCM47XX_H #include +#include enum bcm47xx_bus_type { BCM47XX_BUS_TYPE_SSB, + BCM47XX_BUS_TYPE_BCMA, }; union bcm47xx_bus { struct ssb_bus ssb; + struct bcma_bus bcma; }; extern union bcm47xx_bus bcm47xx_bus; diff --git a/arch/mips/include/asm/mach-bcm47xx/gpio.h b/arch/mips/include/asm/mach-bcm47xx/gpio.h index 16d6c19..e8629a8 100644 --- a/arch/mips/include/asm/mach-bcm47xx/gpio.h +++ b/arch/mips/include/asm/mach-bcm47xx/gpio.h @@ -24,6 +24,9 @@ static inline int gpio_get_value(unsigned gpio) switch (bcm47xx_active_bus_type) { case BCM47XX_BUS_TYPE_SSB: return ssb_gpio_in(&bcm47xx_bus.ssb, 1 << gpio); + case BCM47XX_BUS_TYPE_BCMA: + /* Not implemenmted yet */ + return -EINVAL; } return -EINVAL; } @@ -33,6 +36,9 @@ static inline void gpio_set_value(unsigned gpio, int value) switch (bcm47xx_active_bus_type) { case BCM47XX_BUS_TYPE_SSB: ssb_gpio_out(&bcm47xx_bus.ssb, 1 << gpio, value ? 1 << gpio : 0); + case BCM47XX_BUS_TYPE_BCMA: + /* Not implemenmted yet */ + return; } } @@ -42,6 +48,9 @@ static inline int gpio_direction_input(unsigned gpio) case BCM47XX_BUS_TYPE_SSB: ssb_gpio_outen(&bcm47xx_bus.ssb, 1 << gpio, 0); return 0; + case BCM47XX_BUS_TYPE_BCMA: + /* Not implemenmted yet */ + return -EINVAL; } return -EINVAL; } @@ -55,6 +64,9 @@ static inline int gpio_direction_output(unsigned gpio, int value) /* then set the gpio mode */ ssb_gpio_outen(&bcm47xx_bus.ssb, 1 << gpio, 1 << gpio); return 0; + case BCM47XX_BUS_TYPE_BCMA: + /* Not implemenmted yet */ + return -EINVAL; } return -EINVAL; } @@ -66,6 +78,9 @@ static inline int gpio_intmask(unsigned gpio, int value) ssb_gpio_intmask(&bcm47xx_bus.ssb, 1 << gpio, value ? 1 << gpio : 0); return 0; + case BCM47XX_BUS_TYPE_BCMA: + /* Not implemenmted yet */ + return -EINVAL; } return -EINVAL; } @@ -77,6 +92,9 @@ static inline int gpio_polarity(unsigned gpio, int value) ssb_gpio_polarity(&bcm47xx_bus.ssb, 1 << gpio, value ? 1 << gpio : 0); return 0; + case BCM47XX_BUS_TYPE_BCMA: + /* Not implemenmted yet */ + return -EINVAL; } return -EINVAL; } diff --git a/drivers/watchdog/bcm47xx_wdt.c b/drivers/watchdog/bcm47xx_wdt.c index 7e4e063..8a31494 100644 --- a/drivers/watchdog/bcm47xx_wdt.c +++ b/drivers/watchdog/bcm47xx_wdt.c @@ -58,6 +58,9 @@ static inline void bcm47xx_wdt_hw_start(void) case BCM47XX_BUS_TYPE_SSB: ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0xfffffff); break; + case BCM47XX_BUS_TYPE_BCMA: + bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.drv_cc, 0xfffffff); + break; } } @@ -66,6 +69,9 @@ static inline int bcm47xx_wdt_hw_stop(void) switch (bcm47xx_active_bus_type) { case BCM47XX_BUS_TYPE_SSB: return ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0); + case BCM47XX_BUS_TYPE_BCMA: + bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.drv_cc, 0); + return 0; } return -EINVAL; } -- 1.7.4.1 From hauke@hauke-m.de Mon Jun 6 00:08:41 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 00:12:33 +0200 (CEST) Received: from server19320154104.serverpool.info ([193.201.54.104]:60382 "EHLO hauke-m.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491834Ab1FEWIl (ORCPT ); Mon, 6 Jun 2011 00:08:41 +0200 Received: from localhost (localhost [127.0.0.1]) by hauke-m.de (Postfix) with ESMTP id 6922D8B15; Mon, 6 Jun 2011 00:08:41 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at hauke-m.de Received: from hauke-m.de ([127.0.0.1]) by localhost (hauke-m.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id e0Y+uUEypNX7; Mon, 6 Jun 2011 00:08:37 +0200 (CEST) Received: from localhost.localdomain (host-091-097-251-075.ewe-ip-backbone.de [91.97.251.75]) by hauke-m.de (Postfix) with ESMTPSA id 35FE28B0E; Mon, 6 Jun 2011 00:08:16 +0200 (CEST) From: Hauke Mehrtens To: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org Cc: zajec5@gmail.com, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com, Hauke Mehrtens Subject: [RFC][PATCH 10/10] bcm47xx: fix irq assignment for new SoCs. Date: Mon, 6 Jun 2011 00:07:38 +0200 Message-Id: <1307311658-15853-11-git-send-email-hauke@hauke-m.de> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> X-archive-position: 30232 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hauke@hauke-m.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3693 Content-Length: 884 Lines: 33 Signed-off-by: Hauke Mehrtens --- arch/mips/bcm47xx/irq.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/arch/mips/bcm47xx/irq.c b/arch/mips/bcm47xx/irq.c index 325757a..3642cee 100644 --- a/arch/mips/bcm47xx/irq.c +++ b/arch/mips/bcm47xx/irq.c @@ -26,6 +26,7 @@ #include #include #include +#include void plat_irq_dispatch(void) { @@ -51,5 +52,12 @@ void plat_irq_dispatch(void) void __init arch_init_irq(void) { + if (bcm47xx_active_bus_type == BCM47XX_BUS_TYPE_BCMA) { + bcma_write32(bcm47xx_bus.bcma.drv_mips.core, + BCMA_MIPS_MIPS74K_INTMASK(5), 1 << 31); + /* the kernel reads the timer irq from some register and thinks + * it's #5, but we offset it by 2 and route to #7 */ + cp0_compare_irq = 7; + } mips_cpu_irq_init(); } -- 1.7.4.1 From julian.calaby@gmail.com Mon Jun 6 01:23:23 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 01:23:26 +0200 (CEST) Received: from mail-iw0-f177.google.com ([209.85.214.177]:35223 "EHLO mail-iw0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491779Ab1FEXXX convert rfc822-to-8bit (ORCPT ); Mon, 6 Jun 2011 01:23:23 +0200 Received: by iwn36 with SMTP id 36so3851719iwn.36 for ; Sun, 05 Jun 2011 16:23:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc:content-type:content-transfer-encoding; bh=bw2QYFd8KM0cNRRZtkinbeQSYFIDVmOI8ZdINVvO3UE=; b=JgizzoJBO1nzuoywPzhkKpmtjbACNdQFG9DnpH6+A7YeST1+oBz9fAtzhVc1HLBHDU lrL0vT3WgMVC/iRB32sqj9MwnRctkrz3bk83fJs5ADicgsHbmx5Big3xtSiYMQR8/Ci2 zqxYFh9ArR3q9cvM/rv2ZYZyCgZo3hFXr/I5Q= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-type:content-transfer-encoding; b=eRQwOBPfrf5n9mPMI1OYANs9LQtEwtv/PkdFjwuQF8IkqzdMaUpMT+7jRVCFLnPaLd g/JLkqOy1mLC/marP3p8Lw2lnxHThCC1dG9o/TFZNQ9lVmAxpWW7Z3ROCY/UjZxTqXlX MdzUl5lEGlZPAQasFvaciDUtUiQeRnCvMmGcc= Received: by 10.231.142.17 with SMTP id o17mr6983863ibu.49.1307316196086; Sun, 05 Jun 2011 16:23:16 -0700 (PDT) MIME-Version: 1.0 Received: by 10.231.167.71 with HTTP; Sun, 5 Jun 2011 16:22:56 -0700 (PDT) In-Reply-To: <1307311658-15853-4-git-send-email-hauke@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-4-git-send-email-hauke@hauke-m.de> From: Julian Calaby Date: Mon, 6 Jun 2011 09:22:56 +1000 Message-ID: Subject: Re: [RFC][PATCH 03/10] bcma: add embedded bus To: Hauke Mehrtens Cc: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, zajec5@gmail.com, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT X-archive-position: 30233 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: julian.calaby@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3709 Content-Length: 1909 Lines: 51 Hauke, Minor nit: On Mon, Jun 6, 2011 at 08:07, Hauke Mehrtens wrote: > This patch adds support for using bcma on an embedded bus. An embedded > system like the bcm4716 could register this bus and it searches for the > bcma cores then. > > Signed-off-by: Hauke Mehrtens > --- > diff --git a/drivers/bcma/scan.c b/drivers/bcma/scan.c > index 70b39f7..9229615 100644 > --- a/drivers/bcma/scan.c > +++ b/drivers/bcma/scan.c > @@ -219,9 +219,34 @@ int bcma_bus_scan(struct bcma_bus *bus) > bus->chipinfo.id = (tmp & BCMA_CC_ID_ID) >> BCMA_CC_ID_ID_SHIFT; > bus->chipinfo.rev = (tmp & BCMA_CC_ID_REV) >> BCMA_CC_ID_REV_SHIFT; > bus->chipinfo.pkg = (tmp & BCMA_CC_ID_PKG) >> BCMA_CC_ID_PKG_SHIFT; > + bus->nr_cores = (tmp & BCMA_CC_ID_NRCORES) >> BCMA_CC_ID_NRCORES_SHIFT; > + > + /* If we are an embedded device we now know the number of avaliable > + * core and ioremap the correct space. > + */ > + if (bus->hosttype == BCMA_HOSTTYPE_EMBEDDED) { > + iounmap(bus->mmio); > + mmio = ioremap(BCMA_ADDR_BASE, BCMA_CORE_SIZE * bus->nr_cores); > + if (!mmio) > + return -ENOMEM; > + bus->mmio = mmio; > + > + mmio = ioremap(BCMA_WRAP_BASE, BCMA_CORE_SIZE * bus->nr_cores); > + if (!mmio) > + return -ENOMEM; > + bus->host_embedded = mmio; > + } > + /* reset it to 0 as we use it for counting */ > + bus->nr_cores = 0; Would it make sense to use a local variable for nr_cores, and only use it within the BCMA_HOSTTYPE_EMBEDDED if statement, rather than re-using bus->nr_cores and having to reset it? Thanks, -- Julian Calaby Email: julian.calaby@gmail.com Profile: http://www.google.com/profiles/julian.calaby/ .Plan: http://sites.google.com/site/juliancalaby/ From ralf@linux-mips.org Mon Jun 6 03:07:36 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 03:07:39 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:45204 "EHLO duck.linux-mips.net" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491785Ab1FFBHg (ORCPT ); Mon, 6 Jun 2011 03:07:36 +0200 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.3) with ESMTP id p5617sgp019571; Mon, 6 Jun 2011 02:07:55 +0100 Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id p5617rhA019567; Mon, 6 Jun 2011 02:07:53 +0100 Date: Mon, 6 Jun 2011 02:07:53 +0100 From: Ralf Baechle To: linux-mips@linux-mips.org Cc: Grant Likely , Imre Kaloz , Gabor Juhos , John Crispin , Dezhong Diao , Thomas Gleixner Subject: Converting MIPS to Device Tree Message-ID: <20110606010753.GA16202@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 30234 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3736 Content-Length: 1481 Lines: 35 Over the past few days I've started to convert arch/mips to use DT. So far none of the platforms (except maybe PowerTV?) seems to have a firmware that is passing a DT nor is there any 2nd stage bootloader that could do so. So as the 2nd best thing I've been working on .dts files to be compiled into the images. I've put a git tree of my current working tree online. It's absolutely work in progress so expect to encounter bugs. http://git.linux-mips.org/?p=linux-dt.git;a=summary (Gitweb) git://git.linux-mips.org/linux-dt.git http://www.linux-mips.org/wiki/Device_Tree (brief documentation & links) An incomplete to do list: o Sort out interface for firmware to pass a DT to the kernel. Because we have so many different firmware implementations this one might get a slight bit interesting. o Interface to select one of several builtin DT images. I am thinking of extending the existing MIPS_MACHINE() / machtype mechanism to play nicely with DT. o Finish and test AR7, Cobalt, Jazz, Malta, MIPSsim and SNI ports. o Convert the remaining platforms; find if it's actually sensible to convert all platforms. o I'm considering to make DT support a requirement for future MIPS platforms so you might as well start beating your firmware monkeys / ask Santa to put you a shiny new bootloader blob into the boot now. o Write more of the required infrastructure. o Write documentation Contributions and comments welcome, Ralf From mattst88@gmail.com Mon Jun 6 05:36:20 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 05:36:25 +0200 (CEST) Received: from mail-vx0-f177.google.com ([209.85.220.177]:61692 "EHLO mail-vx0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490948Ab1FFDgU (ORCPT ); Mon, 6 Jun 2011 05:36:20 +0200 Received: by vxd2 with SMTP id 2so3330542vxd.36 for ; Sun, 05 Jun 2011 20:36:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:date:from:to:cc:subject:message-id:mime-version :content-type:content-disposition:content-transfer-encoding :user-agent; bh=0FJ0rm1xg/3n71WM/jv5YZ8Dzeap8tEHf9mfSQeM4S4=; b=WC2ZIySQjra6GeNG/LJKZiEiM33tBje2oOZGUWcn8MeKpDMscIM7zeWjuVLKhJdyhn KmMmuQOqjmHIuWTBEqKQ6rheFqW9ZVnzRPMOhvMwkQeyGl9ILiOJhQVqSgtpFqDUSvH2 UQp3E5q4Fr1voJdBunmv2mfTg5eGZuZDclYPg= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=date:from:to:cc:subject:message-id:mime-version:content-type :content-disposition:content-transfer-encoding:user-agent; b=v2PkpAkBZ+OdlYjQpFwtVpIVCpET7+O46NnfYT4FnAgf8yNb5pdafW8LOSn/DeHKZN Vev0TFe1ZA8kaKKG+cCMWGjj4GIF+qI3xJrCZHVeHzu79XsP/5bNa0g61oyyyEk9zeTy 0wKPSTWZcnUCRdGwespgg0Sn1NSfX9cNeHNtw= Received: by 10.220.90.77 with SMTP id h13mr83667vcm.14.1307331370110; Sun, 05 Jun 2011 20:36:10 -0700 (PDT) Received: from localhost (cpe-174-109-057-197.nc.res.rr.com [174.109.57.197]) by mx.google.com with ESMTPS id q38sm375289vcz.31.2011.06.05.20.36.09 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 05 Jun 2011 20:36:09 -0700 (PDT) Date: Sun, 5 Jun 2011 23:36:08 -0400 From: Matt Turner To: Thomas Gleixner Cc: Ralf Baechle , linux-mips@linux-mips.org Subject: Regression: d6d5d5c breaks Broadcom BCM91250A Message-ID: <20110606033608.GA14686@localhost.mattst88> MIME-Version: 1.0 Content-Type: text/plain; charset=unknown-8bit Content-Disposition: inline Content-Transfer-Encoding: 8bit User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 30235 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mattst88@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3776 Content-Length: 2751 Lines: 60 Hi Thomas, Commit d6d5d5c4afd4c8bb4c5e3753a2141e9c3a874629 breaks boot-up on my Broadcom BCM91250A. Reverting it solves the problem. I looked at the commit but nothing obviously wrong jumped out at me. Thanks, Matt CPU 1 Unable to handle kernel paging request at virtual address 0000000000000000, epc == 0000000000000000, ra == ffffffff80173888 Oops�#1�: Cpu 1 $ 0 : 0000000000000000 0000000014001fe0 0000000000000000 ffffffff804d6e00 $ 4 : ffffffff804cce20 0000000000000000 0000000000000005 0000000000000000 $ 8 : 0000000000000000 0000000000000000 6978000000000000 0000000000000000 $12 : 0000000000000000 ffffffff80000008 ffffffff801aab00 0000000010020000 $16 : ffffffff804cce20 ffffffff804cce20 0000000000000008 ffffffff804cce9c $20 : ffffffff8059de60 0000000014001fe1 0000000000001d4c 0000000000000000 $24 : 0000000010018348 ffffffff802e9f58 $28 : a8000000ce068000 a8000000ce06bc10 0000000000000000 ffffffff80173888 Hi : 0000000000000000 Lo : 0000000000000700 epc : 0000000000000000 (null) Tainted: G W ra : ffffffff80173888 irq_shutdown+0x58/0x78 Status: 14001fe2 KX SX UX KERNEL EXL Cause : 00800008 BadVA : 0000000000000000 PrId : 03040102 (SiByte SB1) Modules linked in: Process init (pid: 1, threadinfo=a8000000ce068000, task=a8000000ce067718, tls=000000002b340400) Stack : a8000000ce5d1700 ffffffff80171c28 a8000000ce46b800 ffffffff804cce20 ffffffff8059de60 0000000000000008 a8000000ce46b810 ffffffff8059de68 0000000000001d4c ffffffff80171d78 ffffffff8059de68 a8000000ce46b800 a8000000ce468000 ffffffff802ea6c8 0000000014001fe1 a8000000ce46b878 a8000000ce46b800 a8000000ce46b878 a8000000ce46b800 ffffffff802eb7c0 a8000000ce06be50 a8000000ce06bcf8 a8000000ce06bda0 a8000000ce06be50 a8000000ce06bd80 a8000000ce06be50 0000000014001fe1 a8000000ce11d760 0000000000000000 a8000000ce468000 0000000000000000 0000000000000000 a8000000ce044f40 0000000000000008 a8000000ce11d760 a8000000cd001450 0000000000000000 ffffffff802d2c14 a8000000ce3b7000 ffffffffffffff9c ... Call Trace: �� __free_irq+0xe4/0x1c8 �� free_irq+0x6c/0xb4 �� uart_shutdown+0xe4/0x120 �� uart_close+0x224/0x334 �� tty_release+0x1dc/0x4c8 �� do_filp_open+0x38/0x9c �� fput+0x130/0x224 �� filp_close+0x8c/0xa4 �� SyS_close+0xb0/0x110 �� handle_sysn32+0x44/0xa0 Code: (Bad address in epc) Disabling lock debugging due to kernel taint Kernel panic - not syncing: Attempted to kill init! From grant.likely@secretlab.ca Mon Jun 6 06:41:38 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 06:41:42 +0200 (CEST) Received: from mail-pw0-f49.google.com ([209.85.160.49]:62713 "EHLO mail-pw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490948Ab1FFEli convert rfc822-to-8bit (ORCPT ); Mon, 6 Jun 2011 06:41:38 +0200 Received: by pwi8 with SMTP id 8so2729827pwi.36 for ; Sun, 05 Jun 2011 21:41:30 -0700 (PDT) Received: by 10.68.14.167 with SMTP id q7mr1650199pbc.430.1307335290052; Sun, 05 Jun 2011 21:41:30 -0700 (PDT) MIME-Version: 1.0 Received: by 10.68.65.134 with HTTP; Sun, 5 Jun 2011 21:41:10 -0700 (PDT) In-Reply-To: <20110606010753.GA16202@linux-mips.org> References: <20110606010753.GA16202@linux-mips.org> From: Grant Likely Date: Sun, 5 Jun 2011 22:41:10 -0600 X-Google-Sender-Auth: EEV9vv6Et-Dj72jRVy7R_q2-bos Message-ID: Subject: Re: Converting MIPS to Device Tree To: Ralf Baechle Cc: linux-mips@linux-mips.org, Imre Kaloz , Gabor Juhos , John Crispin , Dezhong Diao , Thomas Gleixner Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT X-archive-position: 30236 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: grant.likely@secretlab.ca Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3817 Content-Length: 2790 Lines: 68 On Sun, Jun 5, 2011 at 7:07 PM, Ralf Baechle wrote: > Over the past few days I've started to convert arch/mips to use DT. Nice! > So > far none of the platforms (except maybe PowerTV?) seems to have a > firmware that is passing a DT nor is there any 2nd stage bootloader that > could do so. FWIW, U-Boot now has pretty generic support for manipulating and passing a dtb at boot. That doesn't do much good for existing deployed systems though. > So as the 2nd best thing I've been working on .dts files to be compiled > into the images. > > I've put a git tree of my current working tree online. It's absolutely > work in progress so expect to encounter bugs. > > http://git.linux-mips.org/?p=linux-dt.git;a=summary (Gitweb) > git://git.linux-mips.org/linux-dt.git > http://www.linux-mips.org/wiki/Device_Tree (brief documentation & links) > > An incomplete to do list: > > o Sort out interface for firmware to pass a DT to the kernel. Because we > have so many different firmware implementations this one might get a > slight bit interesting. I strongly recommend defining a single method for passing the DT here. If firmware is being modified anyway to add DT support, then may as well get everyone to conform to the same interface. Things do get really hairy if you try to pass the DT inside a legacy firmware interface and then try to figure out which data is authoritative; the dtb or the legacy data. DT boot can even be made a different boot mode for the firmware. This is effectively what U-Boot has done. Either you boot without DT, using the legacy interface, or you boot with DT using a new *and common* DT boot interface. > o Interface to select one of several builtin DT images. I am thinking of > extending the existing MIPS_MACHINE() / machtype mechanism to play > nicely with DT. I'm toying with this idea on arm too with the machine_desc structure, but it is looking more likely that ARM is going to support DT on older non-DT firmware by appending the .dtb blob to the zImage, and getting the wrapper to handle fixing up the boot interface. There are patches on the list for this, but they need one more going over before they get committed. > o Finish and test AR7, Cobalt, Jazz, Malta, MIPSsim and SNI ports. > o Convert the remaining platforms; find if it's actually sensible to > convert all platforms. > o I'm considering to make DT support a requirement for future MIPS > platforms so you might as well start beating your firmware monkeys / > ask Santa to put you a shiny new bootloader blob into the boot now. > o Write more of the required infrastructure. > o Write documentation > > Contributions and comments welcome, Cheers, g. -- Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd. From hans-christian.egtvedt@atmel.com Mon Jun 6 08:26:30 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 08:26:35 +0200 (CEST) Received: from newsmtp5.atmel.com ([204.2.163.5]:56888 "EHLO sjogate2.atmel.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490948Ab1FFG0a (ORCPT ); Mon, 6 Jun 2011 08:26:30 +0200 Received: from csomb01.corp.atmel.com ([10.95.30.150]) by sjogate2.atmel.com (8.13.6/8.13.6) with ESMTP id p566LoQ5011998; Sun, 5 Jun 2011 23:21:57 -0700 (PDT) Received: from hammb01.corp.atmel.com ([10.142.130.20]) by csomb01.corp.atmel.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 6 Jun 2011 00:24:50 -0600 Received: from [10.191.255.186] ([10.191.255.186]) by hammb01.corp.atmel.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 6 Jun 2011 07:24:48 +0100 Subject: Re: [PATCH] Fix build warning of the defconfigs From: Hans-Christian Egtvedt To: Wanlong Gao Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, uclinux-dist-devel@blackfin.uclinux.org, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-sh@vger.kernel.org, linux@arm.linux.org.uk, vapier@gentoo.org, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, lethal@linux-sh.org, gxt@mprc.pku.edu.cn, david.woodhouse@intel.com, akpm@linux-foundation.org, u.kleine-koenig@pengutronix.de, mingo@elte.hu, rientjes@google.com, w.sang@pengutronix.de, sam@ravnborg.org, manuel.lauss@googlemail.com, anton@samba.org, arnd@arndb.de In-Reply-To: <1306945763-6583-1-git-send-email-wanlong.gao@gmail.com> References: <1306945763-6583-1-git-send-email-wanlong.gao@gmail.com> Content-Type: text/plain; charset="UTF-8" Organization: Atmel Corporation Date: Mon, 06 Jun 2011 08:24:45 +0200 Message-ID: <1307341485.3104.0.camel@hcegtvedt.norway.atmel.com> Mime-Version: 1.0 X-Mailer: Evolution 2.32.2 Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 06 Jun 2011 06:24:48.0479 (UTC) FILETIME=[6F740EF0:01CC2412] X-archive-position: 30237 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hans-christian.egtvedt@atmel.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3842 Content-Length: 376 Lines: 20 On Thu, 2011-06-02 at 00:29 +0800, Wanlong Gao wrote: > RTC_CLASS is changed to bool. > So value 'm' is invalid. > > Signed-off-by: Wanlong Gao > arch/avr32/configs/atngw100_mrmt_defconfig | 2 +- > For the AVR32 related changes. Acked-by: Hans-Christian Egtvedt -- Hans-Christian Egtvedt From arend@broadcom.com Mon Jun 6 10:32:20 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 10:32:23 +0200 (CEST) Received: from mms1.broadcom.com ([216.31.210.17]:4444 "EHLO mms1.broadcom.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491055Ab1FFIcU (ORCPT ); Mon, 6 Jun 2011 10:32:20 +0200 Received: from [10.9.200.131] by mms1.broadcom.com with ESMTP (Broadcom SMTP Relay (Email Firewall v6.3.2)); Mon, 06 Jun 2011 01:36:24 -0700 X-Server-Uuid: 02CED230-5797-4B57-9875-D5D2FEE4708A Received: from mail-irva-13.broadcom.com (10.11.16.103) by IRVEXCHHUB01.corp.ad.broadcom.com (10.9.200.131) with Microsoft SMTP Server id 8.2.247.2; Mon, 6 Jun 2011 01:32:02 -0700 Received: from mail-sj1-12.sj.broadcom.com (mail-sj1-12.sj.broadcom.com [10.17.16.106]) by mail-irva-13.broadcom.com (Postfix) with ESMTP id A75FA74D0D; Mon, 6 Jun 2011 01:32:01 -0700 (PDT) Received: from [192.168.1.120] (unknown [10.176.68.21]) by mail-sj1-12.sj.broadcom.com (Postfix) with ESMTP id 0DA7020501; Mon, 6 Jun 2011 01:31:59 -0700 (PDT) Message-ID: <4DEC907E.9040405@broadcom.com> Date: Mon, 6 Jun 2011 10:31:58 +0200 From: "Arend van Spriel" User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.17) Gecko/20110424 Thunderbird/3.1.10 MIME-Version: 1.0 To: "Hauke Mehrtens" cc: "linux-wireless@vger.kernel.org" , "linux-mips@linux-mips.org" , "zajec5@gmail.com" , "mb@bu3sch.de" , "george@znau.edu.ua" , "b43-dev@lists.infradead.org" , "bernhardloos@googlemail.com" Subject: Re: [RFC][PATCH 01/10] bcma: Use array to store cores. References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-2-git-send-email-hauke@hauke-m.de> In-Reply-To: <1307311658-15853-2-git-send-email-hauke@hauke-m.de> X-WSS-ID: 61F24E021IC16574349-01-01 Content-Type: text/plain; charset=iso-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-archive-position: 30238 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: arend@broadcom.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3919 Content-Length: 1392 Lines: 28 On 06/06/2011 12:07 AM, Hauke Mehrtens wrote: > When using bcma on a embedded device it is initialized very early at > boot. We have to do so as the cpu and interrupt management and all > other devices are attached to this bus and it has to be initialized so > early. In that stage we can not allocate memory or sleep, just use the > memory on the stack and in the text segment as the kernel is not > initialized far enough. This patch removed the kzallocs from the scan > code. Some earlier version of the bcma implementation and the normal > ssb implementation are doing it like this. > The __bcma_dev_wrapper struct is used as the container for the device > struct as bcma_device will be too big if it includes struct device. Does this prevent using list_for_each() and friends to be used on the device list? If so, could you consider a different approach. There were good reasons to get rid of the bcma_dev_wrapper struct if I recall discussions on the mailing list correctly. I also see tendency to use ssb solutions without considering alternatives. For this particular example, please consider adding a bcma_zalloc(), which does kzalloc for non-embedded platforms and returns array pointers for embedded platform. You could also consider this behavior for the embedded bus only. Gr. AvS -- Almost nobody dances sober, unless they happen to be insane. -- H.P. Lovecraft -- From sshtylyov@mvista.com Mon Jun 6 11:25:23 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 11:25:26 +0200 (CEST) Received: from mail-ww0-f43.google.com ([74.125.82.43]:36797 "EHLO mail-ww0-f43.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491818Ab1FFJZX (ORCPT ); Mon, 6 Jun 2011 11:25:23 +0200 Received: by wwb17 with SMTP id 17so3005863wwb.24 for ; Mon, 06 Jun 2011 02:25:17 -0700 (PDT) Received: by 10.216.143.96 with SMTP id k74mr2144266wej.100.1307352317218; Mon, 06 Jun 2011 02:25:17 -0700 (PDT) Received: from [192.168.2.2] ([91.79.84.124]) by mx.google.com with ESMTPS id ge4sm2717580wbb.47.2011.06.06.02.25.14 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 06 Jun 2011 02:25:15 -0700 (PDT) Message-ID: <4DEC9CC5.9010700@mvista.com> Date: Mon, 06 Jun 2011 13:24:21 +0400 From: Sergei Shtylyov User-Agent: Mozilla/5.0 (Windows; U; Windows NT 5.1; en-GB; rv:1.9.2.17) Gecko/20110414 Thunderbird/3.1.10 MIME-Version: 1.0 To: Hauke Mehrtens CC: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, zajec5@gmail.com, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com Subject: Re: [RFC][PATCH 10/10] bcm47xx: fix irq assignment for new SoCs. References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-11-git-send-email-hauke@hauke-m.de> In-Reply-To: <1307311658-15853-11-git-send-email-hauke@hauke-m.de> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-archive-position: 30239 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sshtylyov@mvista.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4003 Content-Length: 854 Lines: 32 Hello. On 06-06-2011 2:07, Hauke Mehrtens wrote: > Signed-off-by: Hauke Mehrtens > --- > arch/mips/bcm47xx/irq.c | 8 ++++++++ > 1 files changed, 8 insertions(+), 0 deletions(-) > diff --git a/arch/mips/bcm47xx/irq.c b/arch/mips/bcm47xx/irq.c > index 325757a..3642cee 100644 > --- a/arch/mips/bcm47xx/irq.c > +++ b/arch/mips/bcm47xx/irq.c [...] > @@ -51,5 +52,12 @@ void plat_irq_dispatch(void) > > void __init arch_init_irq(void) > { > + if (bcm47xx_active_bus_type == BCM47XX_BUS_TYPE_BCMA) { > + bcma_write32(bcm47xx_bus.bcma.drv_mips.core, > + BCMA_MIPS_MIPS74K_INTMASK(5), 1<< 31); > + /* the kernel reads the timer irq from some register and thinks > + * it's #5, but we offset it by 2 and route to #7 */ The preferred style for the multi-line comments is this: /* * bla * bla */ WBR, Sergei From zajec5@gmail.com Mon Jun 6 11:42:48 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 11:42:51 +0200 (CEST) Received: from mail-qy0-f170.google.com ([209.85.216.170]:35316 "EHLO mail-qy0-f170.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491817Ab1FFJms (ORCPT ); Mon, 6 Jun 2011 11:42:48 +0200 Received: by qyk32 with SMTP id 32so802471qyk.15 for ; Mon, 06 Jun 2011 02:42:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=LL7AhwOXkOYH36V8inupW+Yt1UYaiw8B1rWXKqN1fbo=; b=l6QIPjbzvA4Z7+tbVPZ69fzCT/mEf55X0QEvNk7AVKeIPzJ3jM7q9gj+HK9iN5/Mwu 0bBxmFw90WX6OClBAg4vtk2Su36KxHo3t2YcuulTjGxZkHp7sFEkMh12KkuOR0t+KQRX G9mHimn95hykq71jnYrKWPD0Du/R8ltZix64Y= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=YU/95zXs9bD9HNsuQ8EXKfuOt3XzrY4AvexMFoEcWrhjEdjo7UmJD1yLBjyjU8xhn1 rxWgXI6aeuwKgxBeZZnQ7Sn0vbcGXRGeLFm120ab2UHlBvqA3IUoVvePsrhjQmiRfcwn 8spO8vyd5Nw5wChxE+ttkQc3zhkUkFg/rMTk8= MIME-Version: 1.0 Received: by 10.224.191.10 with SMTP id dk10mr1555889qab.170.1307353361789; Mon, 06 Jun 2011 02:42:41 -0700 (PDT) Received: by 10.229.96.21 with HTTP; Mon, 6 Jun 2011 02:42:41 -0700 (PDT) In-Reply-To: <1307311658-15853-2-git-send-email-hauke@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-2-git-send-email-hauke@hauke-m.de> Date: Mon, 6 Jun 2011 11:42:41 +0200 Message-ID: Subject: Re: [RFC][PATCH 01/10] bcma: Use array to store cores. From: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= To: Hauke Mehrtens , Arnd Bergmann , Greg KH Cc: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: base64 X-archive-position: 30240 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zajec5@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4019 Content-Length: 24511 Lines: 319 R3JlZywgQXJuZDogY291bGQgeW91IHRha2UgYSBsb29rIGF0IHRoaXMgcGF0Y2gsIHBsZWFzZT8K CldpdGggcHJvcG9zZWQgcGF0Y2ggd2UgYXJlIGdvaW5nIGJhY2sgdG8gdGhpcyB1Z2x5IGFycmF5 IGFuZCB3cmFwcGVycyBoYWNrcy4KCkkgd2FzIHJlYWxseSBoYXBweSB3aXRoIG91ciBmaW5hbCBz b2x1dGlvbiwgYnV0IGl0IHNlZW1zIGl0J3Mgbm90CmRvYWJsZSBmb3IgZW1iZWRkZWQgc3lzdGVt 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IMKgIHN0cnVjdCBiY21hX2RldmljZSBjb3Jlc1tCQ01BX01BWF9OUl9DT1JFU107Cj4gwqAgwqAg wqAgwqB1OCBucl9jb3JlczsKPgo+IMKgIMKgIMKgIMKgc3RydWN0IGJjbWFfZHJ2X2NjIGRydl9j YzsKPiAtLQo+IDEuNy40LjEK From tglx@linutronix.de Mon Jun 6 11:53:02 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 11:53:09 +0200 (CEST) Received: from www.linutronix.de ([62.245.132.108]:47652 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490948Ab1FFJxC (ORCPT ); Mon, 6 Jun 2011 11:53:02 +0200 Received: from localhost ([127.0.0.1]) by Galois.linutronix.de with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.72) (envelope-from ) id 1QTWUY-0002tU-80; Mon, 06 Jun 2011 11:53:02 +0200 Date: Mon, 6 Jun 2011 11:53:01 +0200 (CEST) From: Thomas Gleixner To: Matt Turner cc: Ralf Baechle , linux-mips@linux-mips.org Subject: Re: Regression: d6d5d5c breaks Broadcom BCM91250A In-Reply-To: <20110606033608.GA14686@localhost.mattst88> Message-ID: References: <20110606033608.GA14686@localhost.mattst88> User-Agent: Alpine 2.02 (LFD 1266 2009-07-14) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=UTF-8 X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 X-archive-position: 30241 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tglx@linutronix.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4029 Content-Length: 1449 Lines: 49 On Sun, 5 Jun 2011, Matt Turner wrote: > Hi Thomas, > > Commit d6d5d5c4afd4c8bb4c5e3753a2141e9c3a874629 breaks boot-up on my > Broadcom BCM91250A. Reverting it solves the problem. > > I looked at the commit but nothing obviously wrong jumped out at me. The below should fix it. -----------------> Subject: MIPS: sb1250: Restore dropped irq_mask function From: Thomas Gleixner Date: Mon, 06 Jun 2011 11:51:43 +0200 Commit d6d5d5c4a (MIPS: Sibyte: Convert to new irq_chip functions) removed the mask function which breaks irq_shutdown(). Restore it. Reported-by: Matt Turner Signed-off-by: Thomas Gleixner --- diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index be4460a..76ee045 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c @@ -123,6 +123,13 @@ static int sb1250_set_affinity(struct irq_data *d, const struct cpumask *mask, } #endif +static void disable_sb1250_irq(struct irq_data *d) +{ + unsigned int irq = d->irq; + + sb1250_mask_irq(sb1250_irq_owner[irq], irq); +} + static void enable_sb1250_irq(struct irq_data *d) { unsigned int irq = d->irq; @@ -180,6 +187,7 @@ static struct irq_chip sb1250_irq_type = { .name = "SB1250-IMR", .irq_mask_ack = ack_sb1250_irq, .irq_unmask = enable_sb1250_irq, + .irq_mask = disable_sb1250_irq, #ifdef CONFIG_SMP .irq_set_affinity = sb1250_set_affinity #endif From arend@broadcom.com Mon Jun 6 12:16:36 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 12:16:42 +0200 (CEST) Received: from mms3.broadcom.com ([216.31.210.19]:3705 "EHLO MMS3.broadcom.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490995Ab1FFKQg convert rfc822-to-8bit (ORCPT ); Mon, 6 Jun 2011 12:16:36 +0200 Received: from [10.9.200.131] by MMS3.broadcom.com with ESMTP (Broadcom SMTP Relay (Email Firewall v6.3.2)); Mon, 06 Jun 2011 03:13:48 -0700 X-Server-Uuid: B55A25B1-5D7D-41F8-BC53-C57E7AD3C201 Received: from mail-irva-13.broadcom.com (10.11.16.103) by IRVEXCHHUB01.corp.ad.broadcom.com (10.9.200.131) with Microsoft SMTP Server id 8.2.247.2; Mon, 6 Jun 2011 03:09:51 -0700 Received: from mail-sj1-12.sj.broadcom.com (mail-sj1-12.sj.broadcom.com [10.17.16.106]) by mail-irva-13.broadcom.com (Postfix) with ESMTP id C54E274D03; Mon, 6 Jun 2011 03:09:51 -0700 (PDT) Received: from [192.168.1.120] (unknown [10.176.68.21]) by mail-sj1-12.sj.broadcom.com (Postfix) with ESMTP id E553D20501; Mon, 6 Jun 2011 03:09:49 -0700 (PDT) Message-ID: <4DECA76C.90000@broadcom.com> Date: Mon, 6 Jun 2011 12:09:48 +0200 From: "Arend van Spriel" User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.17) Gecko/20110424 Thunderbird/3.1.10 MIME-Version: 1.0 To: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= cc: "Hauke Mehrtens" , "Arnd Bergmann" , "Greg KH" , "linux-wireless@vger.kernel.org" , "linux-mips@linux-mips.org" , "mb@bu3sch.de" , "george@znau.edu.ua" , "b43-dev@lists.infradead.org" , "bernhardloos@googlemail.com" Subject: Re: [RFC][PATCH 01/10] bcma: Use array to store cores. References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-2-git-send-email-hauke@hauke-m.de> In-Reply-To: X-WSS-ID: 61F277D64NS16610534-01-01 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8BIT X-archive-position: 30242 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: arend@broadcom.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4054 Content-Length: 641 Lines: 20 On 06/06/2011 11:42 AM, Rafał Miłecki wrote: > Greg, Arnd: could you take a look at this patch, please? > > With proposed patch we are going back to this ugly array and wrappers hacks. > > I was really happy with our final solution, but it seems it's not > doable for embedded systems...? Is there something better we can do > about this? I do agree with Rafał that we should look for another alternative. I posted a suggestion earlier regarding this patch. Can anyone tell me whether that could prevent need for the array/wrapper hack. Gr. AvS -- Almost nobody dances sober, unless they happen to be insane. -- H.P. Lovecraft -- From zajec5@gmail.com Mon Jun 6 12:22:12 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 12:22:19 +0200 (CEST) Received: from mail-qw0-f49.google.com ([209.85.216.49]:38587 "EHLO mail-qw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490978Ab1FFKWM convert rfc822-to-8bit (ORCPT ); Mon, 6 Jun 2011 12:22:12 +0200 Received: by qwi2 with SMTP id 2so2057014qwi.36 for ; Mon, 06 Jun 2011 03:22:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=IzibVUCJH0gKSiZ4nb+Y4qLHWWou9URcAr73tnfmUOU=; b=ewBc9VvQw0+/QoHmrmcIaPAD0ZHa8F/9dfpmtRORXZNNQzIWJS9gPn8rKgPKcPCXDo N9qT3n/5t2p0cfKIYIYuu+FWDi10Nbwb2IpATU7NSUGck1OxHld8DSZRD6vV4owmq1e8 LbeI0LrU6K0pUzBbeaq7sLyz5VjH2fyOZ/Iz0= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=rau/oZd8uObQAR0RHDUIlFfZPZKLMoQGF+3H0fsFPRGqDVa/gWN/3I/N/wlQxmYc90 G4d7y93uIKc4yPlSFgUhT8WTIxlRyAWTCduQDtQA0/wzBPIIFZPYsHJJiaKz/IljpPyI aZwgX4vzdP5zDGbyN6F9X0VLefnGPkwV111ss= MIME-Version: 1.0 Received: by 10.229.142.11 with SMTP id o11mr3397442qcu.46.1307355724941; Mon, 06 Jun 2011 03:22:04 -0700 (PDT) Received: by 10.229.96.21 with HTTP; Mon, 6 Jun 2011 03:22:04 -0700 (PDT) In-Reply-To: <1307311658-15853-4-git-send-email-hauke@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-4-git-send-email-hauke@hauke-m.de> Date: Mon, 6 Jun 2011 12:22:04 +0200 Message-ID: Subject: Re: [RFC][PATCH 03/10] bcma: add embedded bus From: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= To: Hauke Mehrtens Cc: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-archive-position: 30243 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zajec5@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4059 Content-Length: 4194 Lines: 133 Hauke, My idea for naming schema was to use: bcma_host_TYPE_* Like: bcma_host_pci_* bcma_host_sdio_* You are using: bcma_host_bcma_* What do you think about changing this to: bcma_host_embedded_* or just some: bcma_host_emb_* ? Does it make more sense to you? I was trying to keep names in bcma really clear, so every first-time-reader can see differences between hosts, host and driver, etc. 2011/6/6 Hauke Mehrtens : > --- /dev/null > +++ b/drivers/bcma/host_embedded.c > @@ -0,0 +1,93 @@ > +/* > + * Broadcom specific AMBA > + * PCI Host s/PCI/Embedded/ > +int bcma_host_bcma_register(struct bcma_bus *bus) > +{ > +       u32 __iomem *mmio; > +       /* iomap only first core. We have to read some register on this core > +        * to get the number of cores. This is sone in bcma_scan() > +        */ > +       mmio = ioremap(BCMA_ADDR_BASE, BCMA_CORE_SIZE * 1); > +       if (!mmio) > +               return -ENOMEM; > +       bus->mmio = mmio; Maybe just: bus->mmio = ioremap(...); ? :) > +       /* Host specific */ > +       bus->hosttype = BCMA_HOSTTYPE_EMBEDDED; > +       bus->ops = &bcma_host_bcma_ops; > + > +       /* Register */ > +       return bcma_bus_register(bus); > +} > diff --git a/drivers/bcma/main.c b/drivers/bcma/main.c > index 1afa107..c5bcb5f 100644 > --- a/drivers/bcma/main.c > +++ b/drivers/bcma/main.c > @@ -119,6 +119,7 @@ static int bcma_register_cores(struct bcma_bus *bus) >                        break; >                case BCMA_HOSTTYPE_NONE: >                case BCMA_HOSTTYPE_SDIO: > +               case BCMA_HOSTTYPE_EMBEDDED: >                        break; >                } > > diff --git a/drivers/bcma/scan.c b/drivers/bcma/scan.c > index 70b39f7..9229615 100644 > --- a/drivers/bcma/scan.c > +++ b/drivers/bcma/scan.c > @@ -203,7 +203,7 @@ static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 **eromptr, >  int bcma_bus_scan(struct bcma_bus *bus) >  { >        u32 erombase; > -       u32 __iomem *eromptr, *eromend; > +       u32 __iomem *eromptr, *eromend, *mmio; > >        s32 cia, cib; >        u8 ports[2], wrappers[2]; > @@ -219,9 +219,34 @@ int bcma_bus_scan(struct bcma_bus *bus) >        bus->chipinfo.id = (tmp & BCMA_CC_ID_ID) >> BCMA_CC_ID_ID_SHIFT; >        bus->chipinfo.rev = (tmp & BCMA_CC_ID_REV) >> BCMA_CC_ID_REV_SHIFT; >        bus->chipinfo.pkg = (tmp & BCMA_CC_ID_PKG) >> BCMA_CC_ID_PKG_SHIFT; > +       bus->nr_cores = (tmp & BCMA_CC_ID_NRCORES) >> BCMA_CC_ID_NRCORES_SHIFT; I'd use different variable as Julian suggested. > + > +       /* If we are an embedded device we now know the number of avaliable > +        * core and ioremap the correct space. > +        */ Typo: avaliable > +       if (bus->hosttype == BCMA_HOSTTYPE_EMBEDDED) { > +               iounmap(bus->mmio); > +               mmio = ioremap(BCMA_ADDR_BASE, BCMA_CORE_SIZE * bus->nr_cores); > +               if (!mmio) > +                       return -ENOMEM; > +               bus->mmio = mmio; > + > +               mmio = ioremap(BCMA_WRAP_BASE, BCMA_CORE_SIZE * bus->nr_cores); > +               if (!mmio) > +                       return -ENOMEM; > +               bus->host_embedded = mmio; Do we really need both? mmio and host_embedded? What about keeping mmio only and using it in calculation for read/write[8,16,32]? > +       } > +       /* reset it to 0 as we use it for counting */ > +       bus->nr_cores = 0; > >        erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM); > -       eromptr = bus->mmio; > +       if (bus->hosttype == BCMA_HOSTTYPE_EMBEDDED) { > +               eromptr = ioremap(erombase, BCMA_CORE_SIZE); > +               if (!eromptr) > +                       return -ENOMEM; > +       } else > +               eromptr = bus->mmio; I though eromptr = bus->mmio; will do the trick for embedded as well. I think I need some time to read about IO mapping and understand that. -- Rafał From zajec5@gmail.com Mon Jun 6 12:30:55 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 12:30:58 +0200 (CEST) Received: from mail-qw0-f49.google.com ([209.85.216.49]:39321 "EHLO mail-qw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490948Ab1FFKaz convert rfc822-to-8bit (ORCPT ); Mon, 6 Jun 2011 12:30:55 +0200 Received: by qwi2 with SMTP id 2so2060473qwi.36 for ; Mon, 06 Jun 2011 03:30:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=pcMMdg0LSRQ33MJb9iCduXTENE8D3psZWZN0JJDtVlM=; b=wgdoAXYGGOhyiiavE/mDMGeZE0QI/3evr6FT+AD0CGfQEq/tcNijsCGpRjBxovvHk4 LSVxSaH1FW3exRh55H8knv2YsVLZqvtA4bnrfT9hERd174QYbYPuOh4zTc/fOlHqUzmJ tpb3Wm+CyJ3rCZEmbLQaGG4ToH6tvNe0JPSv8= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=hdErGTt5yMSljZVtAVBDqSo77sY0ZK4cPhu1s4hSI3/YccXRVx2qod9CnYSLVqLhVD WUPA0LX19/qkdLeOQrzKM3kZAEgJ4EbCPZ+ASv4Y91b/BKV1vT5d8ZU8p4Wq4p8X49bJ eS+AjBBoxcbEWHltUJF3J6q+mHki519Qnbs2k= MIME-Version: 1.0 Received: by 10.229.35.1 with SMTP id n1mr3387354qcd.84.1307356249456; Mon, 06 Jun 2011 03:30:49 -0700 (PDT) Received: by 10.229.96.21 with HTTP; Mon, 6 Jun 2011 03:30:49 -0700 (PDT) In-Reply-To: <1307311658-15853-6-git-send-email-hauke@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-6-git-send-email-hauke@hauke-m.de> Date: Mon, 6 Jun 2011 12:30:49 +0200 Message-ID: Subject: Re: [RFC][PATCH 05/10] bcma: add serial console support From: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= To: Hauke Mehrtens Cc: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-archive-position: 30244 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zajec5@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4079 Content-Length: 426 Lines: 12 2011/6/6 Hauke Mehrtens : > +       if ((ccrev >= 11) && (ccrev != 15) && (ccrev != 20)) { > +       .... > +       } else > +               pr_err("serial not supported on this device ccrev: 0x%x\n", > +                      ccrev); Please use scripts/checkpatch* for your patches. I believe it will alert you about lacking brackets for "else" (kernel coding style). -- Rafał From zajec5@gmail.com Mon Jun 6 12:34:36 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 12:34:39 +0200 (CEST) Received: from mail-qy0-f170.google.com ([209.85.216.170]:44193 "EHLO mail-qy0-f170.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490948Ab1FFKeg convert rfc822-to-8bit (ORCPT ); Mon, 6 Jun 2011 12:34:36 +0200 Received: by qyk32 with SMTP id 32so823744qyk.15 for ; Mon, 06 Jun 2011 03:34:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=F1SZ9vOBp2i6Ti1j0BWioJ82cSvLzvI4L4TDhm8pZV0=; b=gjzuXNfx8GbueyzN6aL0W/YLY9ZD/ogjAv49YIhu8V8RtXc9c1NI5zbqLEh1IolSRP EAJ8Vi6XyjTOGFNdzQRbV+vuJhnavHin3lxxQ+pnNpDpj3XVg4ZWDhXdQhfmsjf6B50D mVVYdn13dazGripGIyKf2ALorsYkh+EEo1X/Y= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=nuGt7HXR11mlL3qZfeO/OVVunV0pWHvWljnfOmOUSPFXfMUVdPqW84xsNAOE1MF0ND RTHVqeundCrnlpMlABpOAVgjLKVR3s/30On5Cj2W7/cmVnj9ArEZ8YDNI3k4HLLLko6q 4SS55YPwN+aYSs+8pn9oSRQ5cljChhS2nNe1c= MIME-Version: 1.0 Received: by 10.229.118.69 with SMTP id u5mr3377503qcq.122.1307356470630; Mon, 06 Jun 2011 03:34:30 -0700 (PDT) Received: by 10.229.96.21 with HTTP; Mon, 6 Jun 2011 03:34:30 -0700 (PDT) In-Reply-To: <1307311658-15853-7-git-send-email-hauke@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-7-git-send-email-hauke@hauke-m.de> Date: Mon, 6 Jun 2011 12:34:30 +0200 Message-ID: Subject: Re: [RFC][PATCH 06/10] bcma: get CPU clock From: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= To: Hauke Mehrtens Cc: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-archive-position: 30245 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zajec5@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4085 Content-Length: 604 Lines: 19 2011/6/6 Hauke Mehrtens : > +u32 bcma_cpu_clock(struct bcma_drv_mips *mcore) > +{ > +       struct bcma_bus *bus = mcore->core->bus; > + > +       if (bus->drv_cc.capabilities & BCMA_CC_CAP_PMU) > +               return bcma_pmu_get_clockcpu(&bus->drv_cc); > + > +       pr_err("No PMU available, need this to get the cpu clock\n"); > +       return 0; > +} > +EXPORT_SYMBOL(bcma_cpu_clock); Are you really going to use this in some separated driver? If you're, I heard that exporting symbol should go in pair with patch enabling usage of such a symbol. -- Rafał From zajec5@gmail.com Mon Jun 6 12:40:16 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 12:40:19 +0200 (CEST) Received: from mail-qw0-f49.google.com ([209.85.216.49]:36302 "EHLO mail-qw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490948Ab1FFKkQ convert rfc822-to-8bit (ORCPT ); Mon, 6 Jun 2011 12:40:16 +0200 Received: by qwi2 with SMTP id 2so2063949qwi.36 for ; Mon, 06 Jun 2011 03:40:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=Pa7u+Qq1FYpCR4COrWNYJvtK1mO0sOEaVw5owJ5KkCg=; b=BVAIWJ+atMbLRFbeKYuhM8RhkPzzdyK8S3GGCIp3oH7PPxqEWdiYSh0w3I+5oVqw0t BIZ2wKpjhs5s6rM3y5F/WAiCqv9Exbu8mxfmGOP4pcs2Z81NbEviN5ArPROXx3az50UD xFPkTt5tHzRU9ar/oq3FqE1J9ip0WfvvDIyfI= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=JBrV/hSo/G51C21t53F93DSVv/hlDY/AhvOVCKFqL9W1b6/yB99POxVcSvlyzOFDUo t4gEaKcG7Wbmd2sTAdoWl/xfXDpDV4BRy2yCMQyq9GyTHI9+ELLKvKKOxwgdd6aW4qNs JvKsAoDTBXMkYbYg/E4EiLTSa4rOjbQwGG7gg= MIME-Version: 1.0 Received: by 10.229.35.1 with SMTP id n1mr3392977qcd.84.1307356810634; Mon, 06 Jun 2011 03:40:10 -0700 (PDT) Received: by 10.229.96.21 with HTTP; Mon, 6 Jun 2011 03:40:10 -0700 (PDT) In-Reply-To: References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-7-git-send-email-hauke@hauke-m.de> Date: Mon, 6 Jun 2011 12:40:10 +0200 Message-ID: Subject: Re: [RFC][PATCH 06/10] bcma: get CPU clock From: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= To: Hauke Mehrtens Cc: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-archive-position: 30246 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zajec5@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4092 Content-Length: 761 Lines: 22 W dniu 6 czerwca 2011 12:34 użytkownik Rafał Miłecki napisał: > 2011/6/6 Hauke Mehrtens : >> +u32 bcma_cpu_clock(struct bcma_drv_mips *mcore) >> +{ >> +       struct bcma_bus *bus = mcore->core->bus; >> + >> +       if (bus->drv_cc.capabilities & BCMA_CC_CAP_PMU) >> +               return bcma_pmu_get_clockcpu(&bus->drv_cc); >> + >> +       pr_err("No PMU available, need this to get the cpu clock\n"); >> +       return 0; >> +} >> +EXPORT_SYMBOL(bcma_cpu_clock); > > Are you really going to use this in some separated driver? If you're, > I heard that exporting symbol should go in pair with patch enabling > usage of such a symbol. I've just read patch 09/10, sorry for the noise :) -- Rafał From george@znau.edu.ua Mon Jun 6 12:41:52 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 12:41:55 +0200 (CEST) Received: from mail.academy.zt.ua ([82.207.120.245]:31578 "EHLO mail.academy.zt.ua" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490948Ab1FFKlw (ORCPT ); Mon, 6 Jun 2011 12:41:52 +0200 Received: from [10.0.2.42] by mail.academy.zt.ua (Cipher SSLv3:RC4-MD5:128) (MDaemon PRO v12.0.0) with ESMTP id md50000009935.msg for ; Mon, 06 Jun 2011 13:41:48 +0300 X-Authenticated-Sender: george@academy.zt.ua X-HashCash: 1:20:110606:md50000009935::1cI2duNFRf28Tgcv:000023Vf X-Return-Path: prvs=1138417825=george@znau.edu.ua X-Envelope-From: george@znau.edu.ua X-MDaemon-Deliver-To: linux-mips@linux-mips.org Subject: Re: [RFC][PATCH 03/10] bcma: add embedded bus From: George Kashperko To: =?UTF-8?Q?Rafa=C5=82_Mi=C5=82ecki?= Cc: Hauke Mehrtens , linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com In-Reply-To: References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-4-git-send-email-hauke@hauke-m.de> Content-Type: text/plain Date: Mon, 06 Jun 2011 13:32:02 +0300 Message-Id: <1307356322.28734.11.camel@dev.znau.edu.ua> Mime-Version: 1.0 X-Mailer: Evolution 2.12.3 (2.12.3-19.el5) Content-Transfer-Encoding: 7bit X-archive-position: 30247 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: george@znau.edu.ua Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4096 Content-Length: 3164 Lines: 104 Hi, > Hauke, > > My idea for naming schema was to use: > bcma_host_TYPE_* > > Like: > bcma_host_pci_* > bcma_host_sdio_* > > You are using: > bcma_host_bcma_* > > What do you think about changing this to: > bcma_host_embedded_* > or just some: > bcma_host_emb_* > ? > > Does it make more sense to you? I was trying to keep names in bcma > really clear, so every first-time-reader can see differences between > hosts, host and driver, etc. how about bcma_host_soc ? > > > 2011/6/6 Hauke Mehrtens : > > --- /dev/null > > +++ b/drivers/bcma/host_embedded.c > > @@ -0,0 +1,93 @@ > > +/* > > + * Broadcom specific AMBA > > + * PCI Host > > s/PCI/Embedded/ > > > > +int bcma_host_bcma_register(struct bcma_bus *bus) > > +{ > > + u32 __iomem *mmio; > > + /* iomap only first core. We have to read some register on this core > > + * to get the number of cores. This is sone in bcma_scan() > > + */ > > + mmio = ioremap(BCMA_ADDR_BASE, BCMA_CORE_SIZE * 1); > > + if (!mmio) > > + return -ENOMEM; > > + bus->mmio = mmio; > > Maybe just: > bus->mmio = ioremap(...); > ? :) > > > > + /* Host specific */ > > + bus->hosttype = BCMA_HOSTTYPE_EMBEDDED; > > + bus->ops = &bcma_host_bcma_ops; > > + > > + /* Register */ > > + return bcma_bus_register(bus); > > +} > > diff --git a/drivers/bcma/main.c b/drivers/bcma/main.c > > index 1afa107..c5bcb5f 100644 > > --- a/drivers/bcma/main.c > > +++ b/drivers/bcma/main.c > > @@ -119,6 +119,7 @@ static int bcma_register_cores(struct bcma_bus *bus) > > break; > > case BCMA_HOSTTYPE_NONE: > > case BCMA_HOSTTYPE_SDIO: > > + case BCMA_HOSTTYPE_EMBEDDED: > > break; > > } > > > > diff --git a/drivers/bcma/scan.c b/drivers/bcma/scan.c > > index 70b39f7..9229615 100644 > > --- a/drivers/bcma/scan.c > > +++ b/drivers/bcma/scan.c > > @@ -203,7 +203,7 @@ static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 **eromptr, > > int bcma_bus_scan(struct bcma_bus *bus) > > { > > u32 erombase; > > - u32 __iomem *eromptr, *eromend; > > + u32 __iomem *eromptr, *eromend, *mmio; > > > > s32 cia, cib; > > u8 ports[2], wrappers[2]; > > @@ -219,9 +219,34 @@ int bcma_bus_scan(struct bcma_bus *bus) > > bus->chipinfo.id = (tmp & BCMA_CC_ID_ID) >> BCMA_CC_ID_ID_SHIFT; > > bus->chipinfo.rev = (tmp & BCMA_CC_ID_REV) >> BCMA_CC_ID_REV_SHIFT; > > bus->chipinfo.pkg = (tmp & BCMA_CC_ID_PKG) >> BCMA_CC_ID_PKG_SHIFT; > > + bus->nr_cores = (tmp & BCMA_CC_ID_NRCORES) >> BCMA_CC_ID_NRCORES_SHIFT; > To avoid using wrapper struct and at the same time to save on embedded reservations you could let the bus get scanned twice on SoC - first time discovering just system devices (chipcommon and mips core) required for early setup (you will never register those to the linux device subsystem so you can have them marked as __initdata and have no ->release callback therefore), second time full scan with registering the whole bus when done. Have nice day, George From zajec5@gmail.com Mon Jun 6 12:51:16 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 12:51:19 +0200 (CEST) Received: from mail-qy0-f170.google.com ([209.85.216.170]:63679 "EHLO mail-qy0-f170.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490948Ab1FFKvQ convert rfc822-to-8bit (ORCPT ); Mon, 6 Jun 2011 12:51:16 +0200 Received: by qyk32 with SMTP id 32so830438qyk.15 for ; Mon, 06 Jun 2011 03:51:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=3G5+F40d+VgUqD0ENGQDFp+UrjbfeCuiSiO8r6nyVTY=; b=a1MKq3Eanq1j5n9AkM6+HjyFmPsvwbKF52uByAj0Hw9CDvCPxP3di+TZflhrOKqH4z 1SMJMh1ftqOatrpqa3oaNrx2S9MD7ohBg3hPmUnyqDhnPOTtMK0l46k0JoAXYartJARZ MV8UzBeLpxhbjk9Rg1yMuJPx4SSV8s8XzwAoA= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=XcPHQH3qqo47aF0ylX7ZAb2ZZKrruvKZEZ+SCht3n/nRIKuygdKEEGOjQY2PxrZu+L btkO4OAfuFKenGfR/jtbVpOPzeeSdpIcCb+KqaK00k9wlFSCojB4VUNOc91OtI3DNgRi ORXVdvZ1d/RDjDzUiB/PsiPhOkC0Ei6yavb/8= MIME-Version: 1.0 Received: by 10.229.118.69 with SMTP id u5mr3387550qcq.122.1307357469932; Mon, 06 Jun 2011 03:51:09 -0700 (PDT) Received: by 10.229.96.21 with HTTP; Mon, 6 Jun 2011 03:51:09 -0700 (PDT) In-Reply-To: <1307356322.28734.11.camel@dev.znau.edu.ua> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-4-git-send-email-hauke@hauke-m.de> <1307356322.28734.11.camel@dev.znau.edu.ua> Date: Mon, 6 Jun 2011 12:51:09 +0200 Message-ID: Subject: Re: [RFC][PATCH 03/10] bcma: add embedded bus From: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= To: George Kashperko Cc: Hauke Mehrtens , linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-archive-position: 30248 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zajec5@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4103 Content-Length: 752 Lines: 35 W dniu 6 czerwca 2011 12:32 użytkownik George Kashperko napisał: > Hi, > >> Hauke, >> >> My idea for naming schema was to use: >> bcma_host_TYPE_* >> >> Like: >> bcma_host_pci_* >> bcma_host_sdio_* >> >> You are using: >> bcma_host_bcma_* >> >> What do you think about changing this to: >> bcma_host_embedded_* >> or just some: >> bcma_host_emb_* >> ? >> >> Does it make more sense to you? I was trying to keep names in bcma >> really clear, so every first-time-reader can see differences between >> hosts, host and driver, etc. > > how about bcma_host_soc ? We get then inconsistency with "BCMA_HOSTTYPE_EMBEDDED". I'd like to 1) See something like bcma_host_emb... xor 2) Use bcma_host_soc_* and BCMA_HOSTTYPE_SOC -- Rafał From arend@broadcom.com Mon Jun 6 12:56:33 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 12:56:39 +0200 (CEST) Received: from mms3.broadcom.com ([216.31.210.19]:1989 "EHLO MMS3.broadcom.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490948Ab1FFK4d convert rfc822-to-8bit (ORCPT ); Mon, 6 Jun 2011 12:56:33 +0200 Received: from [10.9.200.133] by MMS3.broadcom.com with ESMTP (Broadcom SMTP Relay (Email Firewall v6.3.2)); Mon, 06 Jun 2011 03:59:46 -0700 X-Server-Uuid: B55A25B1-5D7D-41F8-BC53-C57E7AD3C201 Received: from mail-irva-13.broadcom.com (10.11.16.103) by IRVEXCHHUB02.corp.ad.broadcom.com (10.9.200.133) with Microsoft SMTP Server id 8.2.247.2; Mon, 6 Jun 2011 03:55:40 -0700 Received: from mail-sj1-12.sj.broadcom.com (mail-sj1-12.sj.broadcom.com [10.17.16.106]) by mail-irva-13.broadcom.com (Postfix) with ESMTP id A740574D03; Mon, 6 Jun 2011 03:55:49 -0700 (PDT) Received: from [192.168.1.120] (unknown [10.176.68.21]) by mail-sj1-12.sj.broadcom.com (Postfix) with ESMTP id 1CD2A20501; Mon, 6 Jun 2011 03:55:47 -0700 (PDT) Message-ID: <4DECB232.70308@broadcom.com> Date: Mon, 6 Jun 2011 12:55:46 +0200 From: "Arend van Spriel" User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.17) Gecko/20110424 Thunderbird/3.1.10 MIME-Version: 1.0 To: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= cc: "George Kashperko" , "Hauke Mehrtens" , "linux-wireless@vger.kernel.org" , "linux-mips@linux-mips.org" , "mb@bu3sch.de" , "b43-dev@lists.infradead.org" , "bernhardloos@googlemail.com" Subject: Re: [RFC][PATCH 03/10] bcma: add embedded bus References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-4-git-send-email-hauke@hauke-m.de> <1307356322.28734.11.camel@dev.znau.edu.ua> In-Reply-To: X-WSS-ID: 61F26CA84NS16627110-01-01 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8BIT X-archive-position: 30249 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: arend@broadcom.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4109 Content-Length: 1094 Lines: 44 On 06/06/2011 12:51 PM, Rafał Miłecki wrote: > W dniu 6 czerwca 2011 12:32 użytkownik George Kashperko > napisał: >> Hi, >> >>> Hauke, >>> >>> My idea for naming schema was to use: >>> bcma_host_TYPE_* >>> >>> Like: >>> bcma_host_pci_* >>> bcma_host_sdio_* >>> >>> You are using: >>> bcma_host_bcma_* >>> >>> What do you think about changing this to: >>> bcma_host_embedded_* >>> or just some: >>> bcma_host_emb_* >>> ? >>> >>> Does it make more sense to you? I was trying to keep names in bcma >>> really clear, so every first-time-reader can see differences between >>> hosts, host and driver, etc. >> how about bcma_host_soc ? > We get then inconsistency with "BCMA_HOSTTYPE_EMBEDDED". I'd like to > 1) See something like bcma_host_emb... > xor > 2) Use bcma_host_soc_* and BCMA_HOSTTYPE_SOC > I would go for option 2). It more clearly says what it is. Embedded is a broader term. As an example, a handset is an embedded device, but it may use BCMA_HOSTTYPE_SDIO. Gr. AvS -- Almost nobody dances sober, unless they happen to be insane. -- H.P. Lovecraft -- From zajec5@gmail.com Mon Jun 6 13:00:35 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 13:00:39 +0200 (CEST) Received: from mail-qw0-f49.google.com ([209.85.216.49]:42821 "EHLO mail-qw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490995Ab1FFLAf convert rfc822-to-8bit (ORCPT ); Mon, 6 Jun 2011 13:00:35 +0200 Received: by qwi2 with SMTP id 2so2071568qwi.36 for ; Mon, 06 Jun 2011 04:00:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=g3a68JGgAoCoxXg8BlCkX4SRBq/EDK7rMpFLEzJHblI=; b=rrbDtHFJcGp+HFB9tLvXEFPYHhrFKonU6aFFQdxhY8sL5cbKH57uMRyE50XyGjJez2 UtylmCKhuW5S3dkl73MswIR4I0eTa0v4qr4lr7vHxmsDH2SGrIIWjDKE7GaPz5hF01Ol IOi2PQlTVOLBpsSj0V1/MF8XJQhQqVAWAiP5g= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=hLcUwJHvUxgu/vCOx2gei21yzCnxGGfOgSls/BaRqzlGmNRRvjEwPY+o5ZkHIJg92c TJyIimDdR9GoxuwiX1vcz5xY2i+NQHZKi8Y0PboIZbPlbg519i+lmoT1xbERMg/JuKOi BcStGymhhBHn5UciQGvPYbn5LKs6PElI0hrUU= MIME-Version: 1.0 Received: by 10.229.43.99 with SMTP id v35mr3446500qce.8.1307358029361; Mon, 06 Jun 2011 04:00:29 -0700 (PDT) Received: by 10.229.96.21 with HTTP; Mon, 6 Jun 2011 04:00:29 -0700 (PDT) In-Reply-To: <4DECB232.70308@broadcom.com> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-4-git-send-email-hauke@hauke-m.de> <1307356322.28734.11.camel@dev.znau.edu.ua> <4DECB232.70308@broadcom.com> Date: Mon, 6 Jun 2011 13:00:29 +0200 Message-ID: Subject: Re: [RFC][PATCH 03/10] bcma: add embedded bus From: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= To: Arend van Spriel Cc: George Kashperko , Hauke Mehrtens , "linux-wireless@vger.kernel.org" , "linux-mips@linux-mips.org" , "mb@bu3sch.de" , "b43-dev@lists.infradead.org" , "bernhardloos@googlemail.com" Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-archive-position: 30250 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zajec5@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4112 Content-Length: 1169 Lines: 47 W dniu 6 czerwca 2011 12:55 użytkownik Arend van Spriel napisał: > On 06/06/2011 12:51 PM, Rafał Miłecki wrote: >> >> W dniu 6 czerwca 2011 12:32 użytkownik George Kashperko >>  napisał: >>> >>> Hi, >>> >>>> Hauke, >>>> >>>> My idea for naming schema was to use: >>>> bcma_host_TYPE_* >>>> >>>> Like: >>>> bcma_host_pci_* >>>> bcma_host_sdio_* >>>> >>>> You are using: >>>> bcma_host_bcma_* >>>> >>>> What do you think about changing this to: >>>> bcma_host_embedded_* >>>> or just some: >>>> bcma_host_emb_* >>>> ? >>>> >>>> Does it make more sense to you? I was trying to keep names in bcma >>>> really clear, so every first-time-reader can see differences between >>>> hosts, host and driver, etc. >>> >>> how about bcma_host_soc ? >> >> We get then inconsistency with "BCMA_HOSTTYPE_EMBEDDED". I'd like to >> 1) See something like bcma_host_emb... >> xor >> 2) Use bcma_host_soc_* and BCMA_HOSTTYPE_SOC >> > > I would go for option 2). It more clearly says what it is. Embedded is a > broader term. As an example, a handset is an embedded device, but it may use > BCMA_HOSTTYPE_SDIO. Good point, agree. -- Rafał From zajec5@gmail.com Mon Jun 6 13:07:41 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 13:07:44 +0200 (CEST) Received: from mail-qy0-f170.google.com ([209.85.216.170]:37407 "EHLO mail-qy0-f170.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490948Ab1FFLHl convert rfc822-to-8bit (ORCPT ); Mon, 6 Jun 2011 13:07:41 +0200 Received: by qyk32 with SMTP id 32so837219qyk.15 for ; Mon, 06 Jun 2011 04:07:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=lNIogaLGKBSA4BPEy9gMuBSWJ6F3wWqWJ9A4r5WWayc=; b=HtY0d55j9R5lFri2CD8miZyKXJoI9qzSJBU1gp6SjVHOZG5YL5WlbTmL9oVnrkHjSz 08NXQxunnGhl9SXkdT+MOm4vQi2koRMLD0alQ+hZwckLXqR5W3d51nIcyK7cMFsX/v9P 0IXc5NTNJFRzVxGtsqs/QYd8iIsynDduIY4/A= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=NKd1mxNmoH7KHrbBk+OcwUuopx6qU1jRa9PShHx1GzTD5mk5HxvPMfW2U1lENpKWLV tseDxEy62xZsfDnSDZkkXWvY4v/RDo1fXjdJFNzEsab/OMeLz2lIHwJRbUwwOsHjyKiB IN2eAEKjSW27QVB+ciCAxeACBN3pPK6StLoTk= MIME-Version: 1.0 Received: by 10.229.43.99 with SMTP id v35mr3451104qce.8.1307358455148; Mon, 06 Jun 2011 04:07:35 -0700 (PDT) Received: by 10.229.96.21 with HTTP; Mon, 6 Jun 2011 04:07:35 -0700 (PDT) In-Reply-To: <1307311658-15853-10-git-send-email-hauke@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-10-git-send-email-hauke@hauke-m.de> Date: Mon, 6 Jun 2011 13:07:35 +0200 Message-ID: Subject: Re: [RFC][PATCH 09/10] bcm47xx: add support for bcma bus From: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= To: Hauke Mehrtens Cc: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-archive-position: 30251 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zajec5@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4116 Content-Length: 1695 Lines: 39 2011/6/6 Hauke Mehrtens : > This patch add support for the bcma bus. Broadcom uses only Mips 74K > CPUs on the new SoC and on the old ons using ssb bus there are no Mips > 74K CPUs. > > Signed-off-by: Hauke Mehrtens > --- >  arch/mips/Kconfig                            |    4 +++ >  arch/mips/bcm47xx/gpio.c                     |    9 ++++++++ >  arch/mips/bcm47xx/nvram.c                    |    6 +++++ >  arch/mips/bcm47xx/serial.c                   |   24 +++++++++++++++++++++++ >  arch/mips/bcm47xx/setup.c                    |   27 ++++++++++++++++++++++++- >  arch/mips/bcm47xx/time.c                     |    3 ++ >  arch/mips/include/asm/mach-bcm47xx/bcm47xx.h |    3 ++ >  arch/mips/include/asm/mach-bcm47xx/gpio.h    |   18 +++++++++++++++++ >  drivers/watchdog/bcm47xx_wdt.c               |    6 +++++ >  9 files changed, 98 insertions(+), 2 deletions(-) > > diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig > index 653da62..bdb0341 100644 > --- a/arch/mips/Kconfig > +++ b/arch/mips/Kconfig > @@ -100,6 +100,10 @@ config BCM47XX >        select SSB_EMBEDDED >        select SSB_B43_PCI_BRIDGE if PCI >        select SSB_PCICORE_HOSTMODE if PCI > +       select BCMA > +       select BCMA_HOST_EMBEDDED > +       select BCMA_DRIVER_MIPS > +       select BCMA_PCICORE_HOSTMODE I'm not involved in development for embedded devices but I believe that space is quite important for them. You force compiling both: ssb and bcma for every device using bcm47xx. I think ppl may want to compile only one bus driver. -- Rafał From zajec5@gmail.com Mon Jun 6 13:23:48 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 13:23:51 +0200 (CEST) Received: from mail-qw0-f49.google.com ([209.85.216.49]:39433 "EHLO mail-qw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490978Ab1FFLXs convert rfc822-to-8bit (ORCPT ); Mon, 6 Jun 2011 13:23:48 +0200 Received: by qwi2 with SMTP id 2so2080893qwi.36 for ; Mon, 06 Jun 2011 04:23:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=1Y/1Xz+veULU1juedg8a1ZBlbh0LXI9Ab5GEegPR8+Y=; b=P1LXs+oOmWbomaA7A2OwvO1x752O7Kuv4wU0zTj+h+nw/7C0y2ZC9SzR+wWOD0ViSm wv/kCuim5xpTdCd3Wnpr/9qU23XSJPqYd5waR2prB9Q9CMXtOAFwjtNG+CW8DpOMcvCm 7VxBMPl7uExjyvxyjsEii9wgCdHVljgmr4iw8= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=KNWgiDZLD+V5FOWBO9zXyAncnw42HbiGQZf3NTbOmukODke4bNoRvu/Kt7v2ic/41C qbg9QkIhQWO+NE/CMTWKq11kPfOE6lARp2jDEyQFK0+HEX+1qC15d4cle2e+7jxdTa9V Ti1ByEtWxMWTjgf5ZEDtctTNnQujay/zRpCwM= MIME-Version: 1.0 Received: by 10.229.118.69 with SMTP id u5mr3407780qcq.122.1307359422318; Mon, 06 Jun 2011 04:23:42 -0700 (PDT) Received: by 10.229.96.21 with HTTP; Mon, 6 Jun 2011 04:23:42 -0700 (PDT) In-Reply-To: <1307311658-15853-5-git-send-email-hauke@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-5-git-send-email-hauke@hauke-m.de> Date: Mon, 6 Jun 2011 13:23:42 +0200 Message-ID: Subject: Re: [RFC][PATCH 04/10] bcma: add mips driver From: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= To: Hauke Mehrtens Cc: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-archive-position: 30252 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zajec5@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4136 Content-Length: 1745 Lines: 59 2011/6/6 Hauke Mehrtens : > +/* driver_mips.c */ > +extern unsigned int bcma_core_mips_irq(struct bcma_device *dev); Does it compile without CONFIG_BCMA_DRIVER_MIPS? > +/* Get the MIPS IRQ assignment for a specified device. > + * If unassigned, 0 is returned. > + * If disabled, 5 is returned. > + * If not supported, 6 is returned. > + */ Does it ever return 6? > +unsigned int bcma_core_mips_irq(struct bcma_device *dev) > +{ > +       struct bcma_device *mdev = dev->bus->drv_mips.core; > +       u32 irqflag; > +       unsigned int irq; > + > +       irqflag = bcma_core_mips_irqflag(dev); > + > +       for (irq = 1; irq <= 4; irq++) > +               if (bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq)) & (1 << irqflag)) > +                       break; Use scripts/checkpatch*. Braces around "for" and split line to match 80 chars width. Why don't you just use "return irq;" instead of break? > + > +       if (irq == 5) > +               irq = 0; > + > +       return irq; You can just make it "return 0;" after changing break to return. > +                       for (i = 0; i < bus->nr_cores; i++) > +                               if ((1 << bcma_core_mips_irqflag(&bus->cores[i])) == oldirqflag) { > +                                       bcma_core_mips_set_irq(&bus->cores[i], 0); > +                                       break; > +                               } Braces for "for". > +       pr_info("after irq reconfiguration\n"); Make first letter uppercase. I'm not English expert, but doesn't something like "IRQ reconfiguration done" sound better? -- Rafał From zajec5@gmail.com Mon Jun 6 13:32:18 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 13:32:20 +0200 (CEST) Received: from mail-qy0-f170.google.com ([209.85.216.170]:50287 "EHLO mail-qy0-f170.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490948Ab1FFLcS convert rfc822-to-8bit (ORCPT ); Mon, 6 Jun 2011 13:32:18 +0200 Received: by qyk32 with SMTP id 32so847126qyk.15 for ; Mon, 06 Jun 2011 04:32:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=q/kdsAXzOZOh74cFYGRyN61XXDqinT4KNI1L9wleoj4=; b=MWXGpavn6CvftSCwqvPGFD85dlU4ia8PsKrxEG0A0DIKMYRwHImQhOOhTZOntbP5oK DKB9jzKQAsUG/iUA+eQY/3O31IxzgcK8CWTUaVi3e5u8YX1qEOPnsLPDCFuA1WBAQU9b t5X5bXERokWqlLQJP68BCZUIfcGdBRfIVwTSM= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=srbsfgkaJeqxuBvdkaQcHGYG92DilZd2tQjEwwNAUK6uavFrrWLsjQamNH4TzDHfTC h6uS8a+YsH9Up1sOXfgOPdfKBDTk1tZgA2xnE3aeeEAY6WnQtilsg2lVhrYw4fEdYzJf 951oXNe36tFheb+8k/hnJZSB6F/gH91odSr3U= MIME-Version: 1.0 Received: by 10.229.43.99 with SMTP id v35mr3466671qce.8.1307359932220; Mon, 06 Jun 2011 04:32:12 -0700 (PDT) Received: by 10.229.96.21 with HTTP; Mon, 6 Jun 2011 04:32:11 -0700 (PDT) In-Reply-To: <1307311658-15853-8-git-send-email-hauke@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-8-git-send-email-hauke@hauke-m.de> Date: Mon, 6 Jun 2011 13:32:11 +0200 Message-ID: Subject: Re: [RFC][PATCH 07/10] bcma: add pci(e) host mode From: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= To: Hauke Mehrtens Cc: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-archive-position: 30253 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zajec5@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4142 Content-Length: 1327 Lines: 43 2011/6/6 Hauke Mehrtens : > +config BCMA_PCICORE_HOSTMODE > +       bool "Hostmode support for BCMA PCI core" > +       depends on BCMA_DRIVER_MIPS > +       help > +         PCIcore hostmode operation (external PCI bus). I think you started to use BCMA_DRIVER_corename. Could you stick to it (one schema), please? Maybe just BCMA_DRIVER_PCI_HOSTMODE ? > +#ifdef CONFIG_BCMA_PCICORE_HOSTMODE > +       pc->hostmode = bcma_pcicore_is_in_hostmode(pc); > +       if (pc->hostmode) > +               bcma_pcicore_init_hostmode(pc); > +#endif /* CONFIG_BCMA_PCICORE_HOSTMODE */ > +       if (!pc->hostmode) > +               bcma_pcicore_serdes_workaround(pc); Does it make sense to init hostmode PCI like clientmode if we just disable CONFIG_BCMA_PCICORE_HOSTMODE? I think we should always check if core is host or client mode and use correct initialization only. We should not init it as clientmode just because we do not have driver for host mode. > diff --git a/drivers/bcma/driver_pci_host.c b/drivers/bcma/driver_pci_host.c > new file mode 100644 > index 0000000..b52c6c9 > --- /dev/null > +++ b/drivers/bcma/driver_pci_host.c > @@ -0,0 +1,44 @@ > +/* > + * Broadcom specific AMBA > + * PCI Core Please rename "PCI Core", add something about hostmode. -- Rafał From arnd@arndb.de Mon Jun 6 13:33:10 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 13:33:13 +0200 (CEST) Received: from moutng.kundenserver.de ([212.227.126.171]:61487 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490948Ab1FFLdK (ORCPT ); Mon, 6 Jun 2011 13:33:10 +0200 Received: from klappe2.localnet (deibp9eh1--blueice3n2.emea.ibm.com [195.212.29.180]) by mrelayeu.kundenserver.de (node=mrbap2) with ESMTP (Nemesis) id 0MbsGc-1QBTCS2lEs-00IqeW; Mon, 06 Jun 2011 13:32:54 +0200 From: Arnd Bergmann To: =?utf-8?q?Rafa=C5=82_Mi=C5=82ecki?= Subject: Re: [RFC][PATCH 01/10] bcma: Use array to store cores. Date: Mon, 6 Jun 2011 13:32:51 +0200 User-Agent: KMail/1.12.2 (Linux/2.6.35-22-generic; KDE/4.3.2; x86_64; ; ) Cc: Hauke Mehrtens , Greg KH , linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-2-git-send-email-hauke@hauke-m.de> In-Reply-To: MIME-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-Id: <201106061332.51661.arnd@arndb.de> X-Provags-ID: V02:K0:bnwv1BZEKIFB2gmg8JqCvA67ZBu9WJzMVJziHrMGIAv 2aQkgJ9Kj50xJ1Eho6JQI3yhibnLsUkbsdQPb8ttYSIxg4Rg+s hu2wrFHfcA1DIPVKuhOrFXpSQT4QZE9xcOJTfgyPsX6QmqcqK+ kipcM2NgWE44JC8nE2Q1SipnCaIhOQPVos7LqpMhPn5idohyW0 64sYXGrnEdgVgWk/AIGqQ== X-archive-position: 30254 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: arnd@arndb.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4143 Content-Length: 1953 Lines: 39 On Monday 06 June 2011, Rafał Miłecki wrote: > Greg, Arnd: could you take a look at this patch, please? > > With proposed patch we are going back to this ugly array and wrappers hacks. > > I was really happy with our final solution, but it seems it's not > doable for embedded systems...? Is there something better we can do > about this? > > 2011/6/6 Hauke Mehrtens : > > When using bcma on a embedded device it is initialized very early at > > boot. We have to do so as the cpu and interrupt management and all > > other devices are attached to this bus and it has to be initialized so > > early. In that stage we can not allocate memory or sleep, just use the > > memory on the stack and in the text segment as the kernel is not > > initialized far enough. This patch removed the kzallocs from the scan > > code. Some earlier version of the bcma implementation and the normal > > ssb implementation are doing it like this. > > The __bcma_dev_wrapper struct is used as the container for the device > > struct as bcma_device will be too big if it includes struct device. > > > > Signed-off-by: Hauke Mehrtens If you rely on device scan to find your CPUs and interrupt controllers, you are screwed already, this won't work. In that case, it's better to have a few "early" drivers, as few as possible, that don't go through the bus scan at all but have their own ways of bootstrapping themselves. I don't know what you mean by "CPU management", but I can only assume that it's not doing that much, and you can just put the register values into the device tree. For an interrupt controller, it should be ok to have it initialized late, as long as it's only responsible for the devices on the same bus and not for instance for IPI interrupts. Just make sure that you do the bus scan and the initialization of the IRQ driver before you initialize any drivers that rely in on the interrupts to be working. Arnd From zajec5@gmail.com Mon Jun 6 13:34:21 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 13:34:24 +0200 (CEST) Received: from mail-qy0-f177.google.com ([209.85.216.177]:34177 "EHLO mail-qy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490948Ab1FFLeV convert rfc822-to-8bit (ORCPT ); Mon, 6 Jun 2011 13:34:21 +0200 Received: by qyl38 with SMTP id 38so2228710qyl.15 for ; Mon, 06 Jun 2011 04:34:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=T3uuQdTY6x1mI1O0cDc0jqZ+uLB7Wb0PB89Q5fluNtI=; b=hA3+nirSdFYIZoQ05xkmpD/0+lDcvFLPoXm0PMkf6fCE4OQgfstim4WjHHqDO3rxkU YHjFtH/hp4WJBswuX0z1WmIojp852PKXX6gK3dyWIwm0/Nzmbp1PWjv348o8FqrI5+Hn rzuvBgjHv1KdwuRybDb1TYCPQxSu+Ysr1Eq7M= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=gCbb4G+IEesLcl8LJllr8pfHYO8lGowvq1SYnVUepe2bF50ynHq6q3dhiFX4XcRk82 913/GyE6x1DOuggJKk2iO9/4Zs1XpwTbk87Pqx2I9PM7/Ff08GUyVrg+zsNPuZJDDPDS IztArznGhIIW9H/F57B6HCG0MbNSOPDsEs2Rw= MIME-Version: 1.0 Received: by 10.229.43.99 with SMTP id v35mr3467947qce.8.1307360055878; Mon, 06 Jun 2011 04:34:15 -0700 (PDT) Received: by 10.229.96.21 with HTTP; Mon, 6 Jun 2011 04:34:15 -0700 (PDT) In-Reply-To: <1307311658-15853-8-git-send-email-hauke@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-8-git-send-email-hauke@hauke-m.de> Date: Mon, 6 Jun 2011 13:34:15 +0200 Message-ID: Subject: Re: [RFC][PATCH 07/10] bcma: add pci(e) host mode From: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= To: Hauke Mehrtens Cc: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-archive-position: 30255 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zajec5@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4146 Content-Length: 439 Lines: 14 2011/6/6 Hauke Mehrtens : > +#ifdef CONFIG_BCMA_PCICORE_HOSTMODE > +/* driver_pci_host.c */ > +extern int bcma_pcicore_is_in_hostmode(struct bcma_drv_pci *pc); > +extern void bcma_pcicore_init_hostmode(struct bcma_drv_pci *pc); > +#endif /* CONFIG_BCMA_PCICORE_HOSTMODE */ I don't know if I'm overreacting, but I really don't like naming mess in the ssb. Why don't you use bcma_core_pci_* to be consistent? -- Rafał From george@znau.edu.ua Mon Jun 6 14:39:53 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 14:39:56 +0200 (CEST) Received: from mail.academy.zt.ua ([82.207.120.245]:59284 "EHLO mail.academy.zt.ua" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490948Ab1FFMjx (ORCPT ); Mon, 6 Jun 2011 14:39:53 +0200 Received: from [10.0.2.42] by mail.academy.zt.ua (Cipher SSLv3:RC4-MD5:128) (MDaemon PRO v12.0.0) with ESMTP id md50000010001.msg for ; Mon, 06 Jun 2011 15:39:45 +0300 X-Authenticated-Sender: george@academy.zt.ua X-HashCash: 1:20:110606:md50000010001::FAe2Ftu3KRnRi1gK:00001K9Y X-Return-Path: prvs=1138417825=george@znau.edu.ua X-Envelope-From: george@znau.edu.ua X-MDaemon-Deliver-To: linux-mips@linux-mips.org Subject: Re: [RFC][PATCH 01/10] bcma: Use array to store cores. From: George Kashperko To: Arnd Bergmann Cc: =?UTF-8?Q?Rafa=C5=82_Mi=C5=82ecki?= , Hauke Mehrtens , Greg KH , linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com In-Reply-To: <201106061332.51661.arnd@arndb.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-2-git-send-email-hauke@hauke-m.de> <201106061332.51661.arnd@arndb.de> Content-Type: text/plain; charset=utf-8 Date: Mon, 06 Jun 2011 15:29:59 +0300 Message-Id: <1307363399.28734.25.camel@dev.znau.edu.ua> Mime-Version: 1.0 X-Mailer: Evolution 2.12.3 (2.12.3-19.el5) Content-Transfer-Encoding: 8bit X-archive-position: 30256 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: george@znau.edu.ua Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4212 Content-Length: 2486 Lines: 52 Hi, > On Monday 06 June 2011, Rafał Miłecki wrote: > > Greg, Arnd: could you take a look at this patch, please? > > > > With proposed patch we are going back to this ugly array and wrappers hacks. > > > > I was really happy with our final solution, but it seems it's not > > doable for embedded systems...? Is there something better we can do > > about this? > > > > 2011/6/6 Hauke Mehrtens : > > > When using bcma on a embedded device it is initialized very early at > > > boot. We have to do so as the cpu and interrupt management and all > > > other devices are attached to this bus and it has to be initialized so > > > early. In that stage we can not allocate memory or sleep, just use the > > > memory on the stack and in the text segment as the kernel is not > > > initialized far enough. This patch removed the kzallocs from the scan > > > code. Some earlier version of the bcma implementation and the normal > > > ssb implementation are doing it like this. > > > The __bcma_dev_wrapper struct is used as the container for the device > > > struct as bcma_device will be too big if it includes struct device. > > > > > > Signed-off-by: Hauke Mehrtens > > If you rely on device scan to find your CPUs and interrupt controllers, > you are screwed already, this won't work. > > In that case, it's better to have a few "early" drivers, as few as > possible, that don't go through the bus scan at all but have their > own ways of bootstrapping themselves. I don't know what you mean by > "CPU management", but I can only assume that it's not doing that much, > and you can just put the register values into the device tree. GPIOs, flash and UART could get initialized early without erom scanning as Chipcommon seems always to be the #0 core on the amba interconnect. > > For an interrupt controller, it should be ok to have it initialized > late, as long as it's only responsible for the devices on the same > bus and not for instance for IPI interrupts. Just make sure that you > do the bus scan and the initialization of the IRQ driver before you > initialize any drivers that rely in on the interrupts to be working. Without proper timer init (which requires both the chipcommon and mips cores knowledge) kernel will get hung somewhere inside calibrate_delay. It could get addressed if get bus scan called in arch_init_irq or plat_time_init - both are executed before calibrate_delay and with slab available. Have nice day, George From arnd@arndb.de Mon Jun 6 15:03:28 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 15:03:38 +0200 (CEST) Received: from moutng.kundenserver.de ([212.227.126.171]:64257 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491043Ab1FFND2 (ORCPT ); Mon, 6 Jun 2011 15:03:28 +0200 Received: from klappe2.localnet (deibp9eh1--blueice3n2.emea.ibm.com [195.212.29.180]) by mrelayeu.kundenserver.de (node=mreu0) with ESMTP (Nemesis) id 0MM2UC-1QUfOB3eVI-008FHZ; Mon, 06 Jun 2011 15:03:15 +0200 From: Arnd Bergmann To: George Kashperko Subject: Re: [RFC][PATCH 01/10] bcma: Use array to store cores. Date: Mon, 6 Jun 2011 15:03:14 +0200 User-Agent: KMail/1.12.2 (Linux/2.6.35-22-generic; KDE/4.3.2; x86_64; ; ) Cc: =?utf-8?q?Rafa=C5=82_Mi=C5=82ecki?= , Hauke Mehrtens , Greg KH , linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <201106061332.51661.arnd@arndb.de> <1307363399.28734.25.camel@dev.znau.edu.ua> In-Reply-To: <1307363399.28734.25.camel@dev.znau.edu.ua> MIME-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201106061503.14852.arnd@arndb.de> X-Provags-ID: V02:K0:hZV8R3EjRVRaad34k9tVlwXZ9t38o3krGavE4YOnfRR nZjHpumAbrbrjJoYMlj+H1rzL2KuSTX8YygqZs4yEr9lZTi2Ra SCAp7fxY/+eAfJbhz3Q4KOK5jKYwU+g/aM+DsvOYSvA0rgaWKE LStP1t5SyTtyvmj6fAsJHO31EoanzMHFHcGBiQcad6nIsgXbtJ OimjiUDobW0Swyoci7ijQ== X-archive-position: 30257 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: arnd@arndb.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4233 Content-Length: 1251 Lines: 24 On Monday 06 June 2011, George Kashperko wrote: > > For an interrupt controller, it should be ok to have it initialized > > late, as long as it's only responsible for the devices on the same > > bus and not for instance for IPI interrupts. Just make sure that you > > do the bus scan and the initialization of the IRQ driver before you > > initialize any drivers that rely in on the interrupts to be working. > > Without proper timer init (which requires both the chipcommon and mips > cores knowledge) kernel will get hung somewhere inside calibrate_delay. > It could get addressed if get bus scan called in arch_init_irq or > plat_time_init - both are executed before calibrate_delay and with slab > available. Ok, so you need the interrupt controller to be working for the timer tick, right? I think another option (if that's not what you mean already) would be to have a simpler way to find a device on the bus that can be called before doing a full scan. Early drivers would then have to know what is there and call a function like "bcma_find_device(BCMA_DEV_ID_IRQ)", while drivers that are not required to be up just register a regular device driver with a probe function that gets called after the bus scan creates device structures. Arnd From ddaney@caviumnetworks.com Mon Jun 6 21:20:03 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 21:20:09 +0200 (CEST) Received: from mail3.caviumnetworks.com ([12.108.191.235]:11413 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491818Ab1FFTUD (ORCPT ); Mon, 6 Jun 2011 21:20:03 +0200 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Mon, 06 Jun 2011 12:21:03 -0700 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.4675); Mon, 6 Jun 2011 12:19:58 -0700 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Mon, 6 Jun 2011 12:19:58 -0700 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.3) with ESMTP id p56JJp8v027108; Mon, 6 Jun 2011 12:19:52 -0700 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id p56JJmix027107; Mon, 6 Jun 2011 12:19:48 -0700 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org, devicetree-discuss@lists.ozlabs.org, grant.likely@secretlab.ca, linux-kernel@vger.kernel.org Cc: David Daney Subject: [RFC PATCH v5 0/6] MIPS: Octeon: Use Device Tree. Date: Mon, 6 Jun 2011 12:19:40 -0700 Message-Id: <1307387986-27069-1-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.7.2.3 X-OriginalArrivalTime: 06 Jun 2011 19:19:58.0642 (UTC) FILETIME=[B9ABB920:01CC247E] X-archive-position: 30258 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4737 Content-Length: 5791 Lines: 142 Note: Ralf has started to work on converting more of the MIPS tree to use the device tree. We will be working to make both efforts mesh. New in v5: Build libfdt in the lib directory instead of devices/of, and include all libfdt files. Changes to of_find_node_by_path() requested by Grant Likely. New irq triggering mode constants. Boot protocol to pass flattened device tree from bootloader. This protocol may change based on attempts to arrive at a common protocol for all MIPS boards. New in v4: Cleanup and error checking suggested by Sergei Shtylyov. Use device tree passed by bootloader if present. New in v3: More updates to device tree bindings, and perhaps more importantly descriptions/definitions of the bindings libfdt building moved to devices/of/libfdt. Cleanup and style improvements as suggested by Grant Likley. Omitted all the driver changes, as they are unchanged from the last set, and at this stage the patches are just an RFC. New in v2: Changed many device tree bindings. They should be closer to the standard naming scheme now. Editing of the template device tree is done in the flattened form using libfdt. Standard platform driver functions used in preference to the of_platform variety. v1: Background: The Octeon family of SOCs has a variety of on-chip controllers for Ethernet, MDIO, I2C, and several other I/O devices. These chips are used on boards with a great variety of different configurations. To date, the configuration and bus topology information has been hard coded in the drivers and support code. To facilitate supporting new chips and boards, we would like to make use use the Device Tree to encode the configuration information. I would like to get some feedback on the current code I am working with. The migration approach is as follows: o A device tree template is statically linked into the kernel image. Based on SOC type and board type, legacy configuration probing code is used to prune and patch the device tree template. o New SOCs and boards will directly use a device tree passed by the bootloader. 1/6 - Infrastructure to allow scripts/dtc/libfdt to be used in the kernel. 2/6 - OF patch to simplify of_find_node_by_path(). 3/6 - Add the statically linked Device Tree templates and bindings descriptions. 4/6 - Remove unused arch/mips/prom.c code that conflicts with following patches. 5/6 - irq_create_of_mapping() function. 6/6 - Fix up Device Tree template for current environment. David Daney (6): of/lib: Allow scripts/dtc/libfdt to be used from kernel code of: Make of_find_node_by_path() traverse /aliases for relative paths. MIPS: Octeon: Add device tree source files. MIPS: Prune some target specific code out of prom.c MIPS: Octeon: Add irq_create_of_mapping() and GPIO interrupts. MIPS: Octeon: Initialize and fixup device tree. .../devicetree/bindings/mips/cavium/bootbus.txt | 37 ++ .../devicetree/bindings/mips/cavium/ciu.txt | 26 ++ .../devicetree/bindings/mips/cavium/gpio.txt | 48 +++ .../devicetree/bindings/mips/cavium/mdio.txt | 27 ++ .../devicetree/bindings/mips/cavium/mix.txt | 40 ++ .../devicetree/bindings/mips/cavium/pip.txt | 98 +++++ .../devicetree/bindings/mips/cavium/twsi.txt | 34 ++ .../devicetree/bindings/mips/cavium/uart.txt | 19 + .../devicetree/bindings/mips/cavium/uctl.txt | 47 +++ arch/mips/Kconfig | 1 + arch/mips/cavium-octeon/.gitignore | 2 + arch/mips/cavium-octeon/Makefile | 16 + arch/mips/cavium-octeon/octeon-irq.c | 188 +++++++++- arch/mips/cavium-octeon/octeon-platform.c | 319 +++++++++++++++ arch/mips/cavium-octeon/octeon_3xxx.dts | 427 ++++++++++++++++++++ arch/mips/cavium-octeon/setup.c | 39 ++ arch/mips/kernel/prom.c | 50 --- drivers/of/base.c | 65 +++- include/linux/libfdt.h | 8 + include/linux/libfdt_env.h | 13 + lib/Kconfig | 6 + lib/Makefile | 5 + lib/fdt.c | 2 + lib/fdt_ro.c | 2 + lib/fdt_rw.c | 2 + lib/fdt_strerror.c | 2 + lib/fdt_sw.c | 2 + lib/fdt_wip.c | 2 + 28 files changed, 1473 insertions(+), 54 deletions(-) create mode 100644 Documentation/devicetree/bindings/mips/cavium/bootbus.txt create mode 100644 Documentation/devicetree/bindings/mips/cavium/ciu.txt create mode 100644 Documentation/devicetree/bindings/mips/cavium/gpio.txt create mode 100644 Documentation/devicetree/bindings/mips/cavium/mdio.txt create mode 100644 Documentation/devicetree/bindings/mips/cavium/mix.txt create mode 100644 Documentation/devicetree/bindings/mips/cavium/pip.txt create mode 100644 Documentation/devicetree/bindings/mips/cavium/twsi.txt create mode 100644 Documentation/devicetree/bindings/mips/cavium/uart.txt create mode 100644 Documentation/devicetree/bindings/mips/cavium/uctl.txt create mode 100644 arch/mips/cavium-octeon/.gitignore create mode 100644 arch/mips/cavium-octeon/octeon_3xxx.dts create mode 100644 include/linux/libfdt.h create mode 100644 include/linux/libfdt_env.h create mode 100644 lib/fdt.c create mode 100644 lib/fdt_ro.c create mode 100644 lib/fdt_rw.c create mode 100644 lib/fdt_strerror.c create mode 100644 lib/fdt_sw.c create mode 100644 lib/fdt_wip.c -- 1.7.2.3 From ddaney@caviumnetworks.com Mon Jun 6 21:20:03 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 21:20:32 +0200 (CEST) Received: from mail3.caviumnetworks.com ([12.108.191.235]:11422 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491783Ab1FFTUD (ORCPT ); Mon, 6 Jun 2011 21:20:03 +0200 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Mon, 06 Jun 2011 12:21:05 -0700 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.4675); Mon, 6 Jun 2011 12:20:00 -0700 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Mon, 6 Jun 2011 12:20:00 -0700 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.3) with ESMTP id p56JJuYD027112; Mon, 6 Jun 2011 12:19:56 -0700 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id p56JJsFR027111; Mon, 6 Jun 2011 12:19:54 -0700 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org, devicetree-discuss@lists.ozlabs.org, grant.likely@secretlab.ca, linux-kernel@vger.kernel.org Cc: David Daney Subject: [RFC PATCH v5 1/6] of/lib: Allow scripts/dtc/libfdt to be used from kernel code Date: Mon, 6 Jun 2011 12:19:41 -0700 Message-Id: <1307387986-27069-2-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1307387986-27069-1-git-send-email-ddaney@caviumnetworks.com> References: <1307387986-27069-1-git-send-email-ddaney@caviumnetworks.com> X-OriginalArrivalTime: 06 Jun 2011 19:20:00.0517 (UTC) FILETIME=[BAC9D350:01CC247E] X-archive-position: 30259 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4741 Content-Length: 4145 Lines: 151 libfdt is part of the device tree support in scripts/dtc/libfdt. For some platforms that use the Device Tree, we want to be able to edit the flattened device tree form. We don't want to burden kernel builds that do not require it, so we gate compilation of libfdt files with CONFIG_LIBFDT. So if it is needed, you need to do this in your Kconfig: select LIBFDT And in the Makefile of the code using libfdt something like: ccflags-y := -I$(src)/../../../scripts/dtc/libfdt Signed-off-by: David Daney --- include/linux/libfdt.h | 8 ++++++++ include/linux/libfdt_env.h | 13 +++++++++++++ lib/Kconfig | 6 ++++++ lib/Makefile | 5 +++++ lib/fdt.c | 2 ++ lib/fdt_ro.c | 2 ++ lib/fdt_rw.c | 2 ++ lib/fdt_strerror.c | 2 ++ lib/fdt_sw.c | 2 ++ lib/fdt_wip.c | 2 ++ 10 files changed, 44 insertions(+), 0 deletions(-) create mode 100644 include/linux/libfdt.h create mode 100644 include/linux/libfdt_env.h create mode 100644 lib/fdt.c create mode 100644 lib/fdt_ro.c create mode 100644 lib/fdt_rw.c create mode 100644 lib/fdt_strerror.c create mode 100644 lib/fdt_sw.c create mode 100644 lib/fdt_wip.c diff --git a/include/linux/libfdt.h b/include/linux/libfdt.h new file mode 100644 index 0000000..4c0306c --- /dev/null +++ b/include/linux/libfdt.h @@ -0,0 +1,8 @@ +#ifndef _INCLUDE_LIBFDT_H_ +#define _INCLUDE_LIBFDT_H_ + +#include +#include "../../scripts/dtc/libfdt/fdt.h" +#include "../../scripts/dtc/libfdt/libfdt.h" + +#endif /* _INCLUDE_LIBFDT_H_ */ diff --git a/include/linux/libfdt_env.h b/include/linux/libfdt_env.h new file mode 100644 index 0000000..01508c7 --- /dev/null +++ b/include/linux/libfdt_env.h @@ -0,0 +1,13 @@ +#ifndef _LIBFDT_ENV_H +#define _LIBFDT_ENV_H + +#include + +#include + +#define fdt32_to_cpu(x) be32_to_cpu(x) +#define cpu_to_fdt32(x) cpu_to_be32(x) +#define fdt64_to_cpu(x) be64_to_cpu(x) +#define cpu_to_fdt64(x) cpu_to_be64(x) + +#endif /* _LIBFDT_ENV_H */ diff --git a/lib/Kconfig b/lib/Kconfig index 830181c..893a7db 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -262,4 +262,10 @@ config AVERAGE If unsure, say N. +# +# libfdt files, only selected if needed. +# +config LIBFDT + bool + endmenu diff --git a/lib/Makefile b/lib/Makefile index 6b597fd..06c2336 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -112,6 +112,11 @@ obj-$(CONFIG_AVERAGE) += average.o obj-$(CONFIG_CPU_RMAP) += cpu_rmap.o +libfdt_files = fdt.o fdt_ro.o fdt_wip.o fdt_rw.o fdt_sw.o fdt_strerror.o +$(foreach file, $(libfdt_files), \ + $(eval CFLAGS_$(file) = -I$(src)/../scripts/dtc/libfdt)) +lib-$(CONFIG_LIBFDT) += $(libfdt_files) + hostprogs-y := gen_crc32table clean-files := crc32table.h diff --git a/lib/fdt.c b/lib/fdt.c new file mode 100644 index 0000000..97f2006 --- /dev/null +++ b/lib/fdt.c @@ -0,0 +1,2 @@ +#include +#include "../scripts/dtc/libfdt/fdt.c" diff --git a/lib/fdt_ro.c b/lib/fdt_ro.c new file mode 100644 index 0000000..f73c04e --- /dev/null +++ b/lib/fdt_ro.c @@ -0,0 +1,2 @@ +#include +#include "../scripts/dtc/libfdt/fdt_ro.c" diff --git a/lib/fdt_rw.c b/lib/fdt_rw.c new file mode 100644 index 0000000..0c1f0f4 --- /dev/null +++ b/lib/fdt_rw.c @@ -0,0 +1,2 @@ +#include +#include "../scripts/dtc/libfdt/fdt_rw.c" diff --git a/lib/fdt_strerror.c b/lib/fdt_strerror.c new file mode 100644 index 0000000..8713e3f --- /dev/null +++ b/lib/fdt_strerror.c @@ -0,0 +1,2 @@ +#include +#include "../scripts/dtc/libfdt/fdt_strerror.c" diff --git a/lib/fdt_sw.c b/lib/fdt_sw.c new file mode 100644 index 0000000..9ac7e50 --- /dev/null +++ b/lib/fdt_sw.c @@ -0,0 +1,2 @@ +#include +#include "../scripts/dtc/libfdt/fdt_sw.c" diff --git a/lib/fdt_wip.c b/lib/fdt_wip.c new file mode 100644 index 0000000..45b3fc3 --- /dev/null +++ b/lib/fdt_wip.c @@ -0,0 +1,2 @@ +#include +#include "../scripts/dtc/libfdt/fdt_wip.c" -- 1.7.2.3 From ddaney@caviumnetworks.com Mon Jun 6 21:20:10 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 21:20:58 +0200 (CEST) Received: from mail3.caviumnetworks.com ([12.108.191.235]:11425 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491870Ab1FFTUK (ORCPT ); Mon, 6 Jun 2011 21:20:10 +0200 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Mon, 06 Jun 2011 12:21:12 -0700 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.4675); Mon, 6 Jun 2011 12:20:07 -0700 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Mon, 6 Jun 2011 12:20:07 -0700 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.3) with ESMTP id p56JK2sj027123; Mon, 6 Jun 2011 12:20:02 -0700 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id p56JK1BD027120; Mon, 6 Jun 2011 12:20:01 -0700 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org, devicetree-discuss@lists.ozlabs.org, grant.likely@secretlab.ca, linux-kernel@vger.kernel.org Cc: David Daney Subject: [RFC PATCH v5 3/6] MIPS: Octeon: Add device tree source files. Date: Mon, 6 Jun 2011 12:19:43 -0700 Message-Id: <1307387986-27069-4-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1307387986-27069-1-git-send-email-ddaney@caviumnetworks.com> References: <1307387986-27069-1-git-send-email-ddaney@caviumnetworks.com> X-OriginalArrivalTime: 06 Jun 2011 19:20:07.0611 (UTC) FILETIME=[BF0448B0:01CC247E] X-archive-position: 30260 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4743 Content-Length: 27319 Lines: 922 Signed-off-by: David Daney --- .../devicetree/bindings/mips/cavium/bootbus.txt | 37 ++ .../devicetree/bindings/mips/cavium/ciu.txt | 26 ++ .../devicetree/bindings/mips/cavium/gpio.txt | 48 +++ .../devicetree/bindings/mips/cavium/mdio.txt | 27 ++ .../devicetree/bindings/mips/cavium/mix.txt | 40 ++ .../devicetree/bindings/mips/cavium/pip.txt | 98 +++++ .../devicetree/bindings/mips/cavium/twsi.txt | 34 ++ .../devicetree/bindings/mips/cavium/uart.txt | 19 + .../devicetree/bindings/mips/cavium/uctl.txt | 47 +++ arch/mips/cavium-octeon/.gitignore | 2 + arch/mips/cavium-octeon/Makefile | 13 + arch/mips/cavium-octeon/octeon_3xxx.dts | 427 ++++++++++++++++++++ 12 files changed, 818 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/mips/cavium/bootbus.txt create mode 100644 Documentation/devicetree/bindings/mips/cavium/ciu.txt create mode 100644 Documentation/devicetree/bindings/mips/cavium/gpio.txt create mode 100644 Documentation/devicetree/bindings/mips/cavium/mdio.txt create mode 100644 Documentation/devicetree/bindings/mips/cavium/mix.txt create mode 100644 Documentation/devicetree/bindings/mips/cavium/pip.txt create mode 100644 Documentation/devicetree/bindings/mips/cavium/twsi.txt create mode 100644 Documentation/devicetree/bindings/mips/cavium/uart.txt create mode 100644 Documentation/devicetree/bindings/mips/cavium/uctl.txt create mode 100644 arch/mips/cavium-octeon/.gitignore create mode 100644 arch/mips/cavium-octeon/octeon_3xxx.dts diff --git a/Documentation/devicetree/bindings/mips/cavium/bootbus.txt b/Documentation/devicetree/bindings/mips/cavium/bootbus.txt new file mode 100644 index 0000000..221c118 --- /dev/null +++ b/Documentation/devicetree/bindings/mips/cavium/bootbus.txt @@ -0,0 +1,37 @@ +* Boot Bus + +Properties: +- compatible: "cavium,octeon-3860-bootbus" + + Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. + +- reg: The base address of the CIU's register bank. + +- #address-cells: Must be <2>. The first cell is the chip select + within the bootbus. The second cell is the offset from the chip select. + +- #size-cells: Must be <1>. + +- ranges: There must be one one triplet of (child-bus-address, + parent-bus-address, length) for each active chip select. + +Example: + bootbus@1180000000000 { + compatible = "cavium,octeon-3860-bootbus"; + reg = <0x11800 0x00000000 0x0 0x200>; + /* The chip select number and offset */ + #address-cells = <2>; + /* The size of the chip select region */ + #size-cells = <1>; + ranges = <0 0 0x0 0x1f400000 0x1000000>, + <1 0 0x1 0x30000000 0x10000000>, + <2 0 0x1 0x40000000 0x10000000>, + <3 0 0x1 0x50000000 0x10000000>, + <4 0 0x1 0x60000000 0x10000000>, + <5 0 0x1 0x70000000 0x10000000>, + <6 0 0x1 0x80000000 0x10000000>, + <7 0 0x1 0x90000000 0x10000000>; + . + . + . + }; diff --git a/Documentation/devicetree/bindings/mips/cavium/ciu.txt b/Documentation/devicetree/bindings/mips/cavium/ciu.txt new file mode 100644 index 0000000..c8ff212 --- /dev/null +++ b/Documentation/devicetree/bindings/mips/cavium/ciu.txt @@ -0,0 +1,26 @@ +* Central Interrupt Unit + +Properties: +- compatible: "cavium,octeon-3860-ciu" + + Compatibility with all cn3XXX, cn5XXX and cn63XX SOCs. + +- interrupt-controller: This is an interrupt controller. + +- reg: The base address of the CIU's register bank. + +- #interrupt-cells: Must be <2>. The first cell is the bank within + the CIU and may have a value of 0 or 1. The second cell is the bit + within the bank and may have a value between 0 and 63. + +Example: + interrupt-controller@1070000000000 { + compatible = "cavium,octeon-3860-ciu"; + interrupt-controller; + /* Interrupts are specified by two parts: + * 1) Controller register (0 or 1) + * 2) Bit within the register (0..63) + */ + #interrupt-cells = <2>; + reg = <0x10700 0x00000000 0x0 0x7000>; + }; diff --git a/Documentation/devicetree/bindings/mips/cavium/gpio.txt b/Documentation/devicetree/bindings/mips/cavium/gpio.txt new file mode 100644 index 0000000..21b989a --- /dev/null +++ b/Documentation/devicetree/bindings/mips/cavium/gpio.txt @@ -0,0 +1,48 @@ +* General Purpose Input Output (GPIO) bus. + +Properties: +- compatible: "cavium,octeon-3860-gpio" + + Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. + +- reg: The base address of the GPIO unit's register bank. + +- gpio-controller: This is a GPIO controller. + +- #gpio-cells: Must be <2>. The first cell is the GPIO pin. + +- interrupt-controller: The GPIO controller is also an interrupt + controller, any of its pins may be configured as an interrupt + source. + +- #interrupt-cells: Must be <2>. The first cell is the GPIO pin + connected to the interrupt source. The second cell is the interrupt + triggering protocol and may have one of four values: + 1 - edge triggered on the rising edge. + 2 - edge triggered on the falling edge + 4 - level triggered active high. + 8 - level triggered active low. + +- interrupts: Interrupt routing for pin 0. The remaining pins are + also routed, but in a manner that can be derived from the pin0 + routing, so they are not specified. + +Example: + + gpio-controller@1070000000800 { + #gpio-cells = <2>; + compatible = "cavium,octeon-3860-gpio"; + reg = <0x10700 0x00000800 0x0 0x100>; + gpio-controller; + /* Interrupts are specified by two parts: + * 1) GPIO pin number (0..15) + * 2) Triggering (1 - edge rising + * 2 - edge falling + * 4 - level active high + * 8 - level active low) + */ + interrupt-controller; + #interrupt-cells = <2>; + /* The GPIO pin connect to 16 consecutive CUI bits */ + interrupts = <0 16>; + }; diff --git a/Documentation/devicetree/bindings/mips/cavium/mdio.txt b/Documentation/devicetree/bindings/mips/cavium/mdio.txt new file mode 100644 index 0000000..6253c3b --- /dev/null +++ b/Documentation/devicetree/bindings/mips/cavium/mdio.txt @@ -0,0 +1,27 @@ +* System Management Interface (SMI) / MDIO + +Properties: +- compatible: "cavium,octeon-3860-mdio" + + Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. + +- reg: The base address of the MDIO bus controller register bank. + +- #address-cells: Must be <1>. + +- #size-cells: Must be <0>. MDIO addresses have no size component. + +Typically an MDIO bus might have several children. + +Example: + mdio@1180000001800 { + compatible = "cavium,octeon-3860-mdio"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x11800 0x00001800 0x0 0x40>; + + ethernet-phy@0 { + ... + reg = <0>; + }; + }; diff --git a/Documentation/devicetree/bindings/mips/cavium/mix.txt b/Documentation/devicetree/bindings/mips/cavium/mix.txt new file mode 100644 index 0000000..2a91a33 --- /dev/null +++ b/Documentation/devicetree/bindings/mips/cavium/mix.txt @@ -0,0 +1,40 @@ +* MIX Ethernet controller. + +Properties: +- compatible: "cavium,octeon-5750-mix" + + Compatibility with all cn5XXX and cn6XXX SOCs populated with MIX + devices. + +- reg: The base addresses of four seperate register banks. The first + bank contains the MIX registers. The second bank the corresponding + AGL registers. The third bank are the AGL registers shared by all + MIX devices present. The fourth bank is the AGL_PRT_CTL shared by + all MIX devices present. + +- cell-index: A single cell specifying which portion of the shared + register banks corresponds to this MIX device. + +- interrupts: Two interrupt specifiers. The first is the MIX + interrupt routing and the second the routing for the AGL interrupts. + +- mac-address: Optional, the MAC address to assign to the device. + +- local-mac-address: Optional, the MAC address to assign to the device + if mac-address is not specified. + +- phy-handle: Optional, a phandle for the PHY device connected to this device. + +Example: + ethernet@1070000100800 { + compatible = "cavium,octeon-5750-mix"; + reg = <0x10700 0x00100800 0x0 0x100>, /* MIX */ + <0x11800 0xE0000800 0x0 0x300>, /* AGL */ + <0x11800 0xE0000400 0x0 0x400>, /* AGL_SHARED */ + <0x11800 0xE0002008 0x0 0x8>; /* AGL_PRT_CTL */ + cell-index = <1>; + interrupts = <1 18>, < 1 46>; + local-mac-address = [ 00 0f b7 10 63 54 ]; + phy-handle = <&phy1>; + }; + diff --git a/Documentation/devicetree/bindings/mips/cavium/pip.txt b/Documentation/devicetree/bindings/mips/cavium/pip.txt new file mode 100644 index 0000000..d4c53ba --- /dev/null +++ b/Documentation/devicetree/bindings/mips/cavium/pip.txt @@ -0,0 +1,98 @@ +* PIP Ethernet nexus. + +The PIP Ethernet nexus can control several data packet input/output +devices. The devices have a two level grouping scheme. There may be +several interfaces, and each interface may have several ports. These +ports might be an individual Ethernet PHY. + + +Properties for the PIP nexus: +- compatible: "cavium,octeon-3860-pip" + + Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. + +- reg: The base address of the PIP's register bank. + +- #address-cells: Must be <1>. + +- #size-cells: Must be <0>. + +Properties for PIP interfaces which is a child the PIP nexus: +- compatible: "cavium,octeon-3860-pip-interface" + + Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. + +- reg: The interface number. + +- #address-cells: Must be <1>. + +- #size-cells: Must be <0>. + +Properties for PIP port which is a child the PIP interface: +- compatible: "cavium,octeon-3860-pip-port" + + Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. + +- reg: The port number within the interface group. + +- mac-address: Optional, the MAC address to assign to the device. + +- local-mac-address: Optional, the MAC address to assign to the device + if mac-address is not specified. + +- phy-handle: Optional, a phandle for the PHY device connected to this device. + +Example: + + pip@11800a0000000 { + compatible = "cavium,octeon-3860-pip"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x11800 0xa0000000 0x0 0x2000>; + + interface@0 { + compatible = "cavium,octeon-3860-pip-interface"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; /* interface */ + + ethernet@0 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x0>; /* Port */ + local-mac-address = [ 00 0f b7 10 63 60 ]; + phy-handle = <&phy2>; + }; + ethernet@1 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x1>; /* Port */ + local-mac-address = [ 00 0f b7 10 63 61 ]; + phy-handle = <&phy3>; + }; + ethernet@2 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x2>; /* Port */ + local-mac-address = [ 00 0f b7 10 63 62 ]; + phy-handle = <&phy4>; + }; + ethernet@3 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x3>; /* Port */ + local-mac-address = [ 00 0f b7 10 63 63 ]; + phy-handle = <&phy5>; + }; + }; + + interface@1 { + compatible = "cavium,octeon-3860-pip-interface"; + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; /* interface */ + + ethernet@0 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x0>; /* Port */ + local-mac-address = [ 00 0f b7 10 63 64 ]; + phy-handle = <&phy6>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/mips/cavium/twsi.txt b/Documentation/devicetree/bindings/mips/cavium/twsi.txt new file mode 100644 index 0000000..6e57155 --- /dev/null +++ b/Documentation/devicetree/bindings/mips/cavium/twsi.txt @@ -0,0 +1,34 @@ +* Two Wire Serial Interface (TWSI) / I2C + +- compatible: "cavium,octeon-3860-twsi" + + Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. + +- reg: The base address of the TWSI/I2C bus controller register bank. + +- #address-cells: Must be <1>. + +- #size-cells: Must be <0>. I2C addresses have no size component. + +- interrupts: A single interrupt specifier. + +- clock-rate: The I2C bus clock rate in Hz. + +Example: + twsi0: i2c@1180000001000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "cavium,octeon-3860-twsi"; + reg = <0x11800 0x00001000 0x0 0x200>; + interrupts = <0 45>; + clock-rate = <100000>; + + rtc@68 { + compatible = "dallas,ds1337"; + reg = <0x68>; + }; + tmp@4c { + compatible = "ti,tmp421"; + reg = <0x4c>; + }; + }; diff --git a/Documentation/devicetree/bindings/mips/cavium/uart.txt b/Documentation/devicetree/bindings/mips/cavium/uart.txt new file mode 100644 index 0000000..87a6c37 --- /dev/null +++ b/Documentation/devicetree/bindings/mips/cavium/uart.txt @@ -0,0 +1,19 @@ +* Universal Asynchronous Receiver/Transmitter (UART) + +- compatible: "cavium,octeon-3860-uart" + + Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. + +- reg: The base address of the UART register bank. + +- interrupts: A single interrupt specifier. + +- current-speed: Optional, the current bit rate in bits per second. + +Example: + uart1: serial@1180000000c00 { + compatible = "cavium,octeon-3860-uart","ns16550"; + reg = <0x11800 0x00000c00 0x0 0x400>; + current-speed = <115200>; + interrupts = <0 35>; + }; diff --git a/Documentation/devicetree/bindings/mips/cavium/uctl.txt b/Documentation/devicetree/bindings/mips/cavium/uctl.txt new file mode 100644 index 0000000..5dabe02 --- /dev/null +++ b/Documentation/devicetree/bindings/mips/cavium/uctl.txt @@ -0,0 +1,47 @@ +* UCTL USB controller glue + +Properties: +- compatible: "cavium,octeon-6335-uctl" + + Compatibility with all cn6XXX SOCs. + +- reg: The base address of the UCTL register bank. + +- #address-cells: Must be <2>. + +- #size-cells: Must be <2>. + +- ranges: Empty to signify direct mapping of the children. + +- refclk-frequency: A single cell containing the reference clock + frequency in Hz. + +- refclk-type: A string describing the reference clock connection + either "crystal" or "external". + +Example: + uctl@118006f000000 { + compatible = "cavium,octeon-6335-uctl"; + reg = <0x11800 0x6f000000 0x0 0x100>; + ranges; /* Direct mapping */ + #address-cells = <2>; + #size-cells = <2>; + /* 12MHz, 24MHz and 48MHz allowed */ + refclk-frequency = <24000000>; + /* Either "crystal" or "external" */ + refclk-type = "crystal"; + + ehci@16f0000000000 { + compatible = "cavium,octeon-6335-ehci","usb-ehci"; + reg = <0x16f00 0x00000000 0x0 0x100>; + interrupts = <0 56>; + big-endian-regs; + }; + ohci@16f0000000400 { + compatible = "cavium,octeon-6335-ohci","usb-ohci"; + reg = <0x16f00 0x00000400 0x0 0x100>; + interrupts = <0 56>; + big-endian-regs; + }; + }; + diff --git a/arch/mips/cavium-octeon/.gitignore b/arch/mips/cavium-octeon/.gitignore new file mode 100644 index 0000000..39c9686 --- /dev/null +++ b/arch/mips/cavium-octeon/.gitignore @@ -0,0 +1,2 @@ +*.dtb.S +*.dtb diff --git a/arch/mips/cavium-octeon/Makefile b/arch/mips/cavium-octeon/Makefile index 19eb043..b8d4f63 100644 --- a/arch/mips/cavium-octeon/Makefile +++ b/arch/mips/cavium-octeon/Makefile @@ -15,3 +15,16 @@ obj-y += octeon-memcpy.o obj-y += executive/ obj-$(CONFIG_SMP) += smp.o + +DTS_FILES = octeon_3xxx.dts +DTB_FILES = $(patsubst %.dts, %.dtb, $(DTS_FILES)) + +obj-y += $(patsubst %.dts, %.dtb.o, $(DTS_FILES)) + +$(obj)/%.dtb: $(src)/%.dts + $(call cmd,dtc) + +# Let's keep the .dtb files around in case we want to look at them. +.SECONDARY: $(addprefix $(obj)/, $(DTB_FILES)) + +clean-files += $(DTB_FILES) $(patsubst %.dtb, %.dtb.S, $(DTB_FILES)) diff --git a/arch/mips/cavium-octeon/octeon_3xxx.dts b/arch/mips/cavium-octeon/octeon_3xxx.dts new file mode 100644 index 0000000..e91dc60 --- /dev/null +++ b/arch/mips/cavium-octeon/octeon_3xxx.dts @@ -0,0 +1,427 @@ +/dts-v1/; +/* + * OCTEON 3XXX, 5XXX, 63XX device tree skeleton. + * + * This device tree is pruned and patched by early boot code before + * use. Because of this, it contains a super-set of the available + * devices and properties. + */ +/ { + compatible = "cavium,octeon-3860"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&ciu>; + + soc@0 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; /* Direct mapping */ + + ciu: interrupt-controller@1070000000000 { + compatible = "cavium,octeon-3860-ciu"; + interrupt-controller; + /* Interrupts are specified by two parts: + * 1) Controller register (0 or 1) + * 2) Bit within the register (0..63) + */ + #interrupt-cells = <2>; + reg = <0x10700 0x00000000 0x0 0x7000>; + }; + + gpio: gpio-controller@1070000000800 { + #gpio-cells = <2>; + compatible = "cavium,octeon-3860-gpio"; + reg = <0x10700 0x00000800 0x0 0x100>; + gpio-controller; + /* Interrupts are specified by two parts: + * 1) GPIO pin number (0..15) + * 2) Triggering (1 - edge rising + * 2 - edge falling + * 4 - level active high + * 8 - level active low) + */ + interrupt-controller; + #interrupt-cells = <2>; + /* The GPIO pin connect to 16 consecutive CUI bits */ + interrupts = <0 16>; /* <0 17> <0 18> <0 19> + <0 20> <0 21> <0 22> <0 23> + <0 24> <0 25> <0 26> <0 27> + <0 28> <0 29> <0 30> <0 31>; */ + }; + + smi0: mdio@1180000001800 { + compatible = "cavium,octeon-3860-mdio"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x11800 0x00001800 0x0 0x40>; + + phy0: ethernet-phy@0 { + compatible = "broadcom,bcm5241"; + reg = <0>; + }; + + phy1: ethernet-phy@1 { + compatible = "broadcom,bcm5241"; + reg = <1>; + }; + + phy2: ethernet-phy@2 { + reg = <2>; + compatible = "marvell,88e1149r"; + marvell,reg-init = <3 0x10 0 0x5777>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x0a60>; + }; + phy3: ethernet-phy@3 { + reg = <3>; + compatible = "marvell,88e1149r"; + marvell,reg-init = <3 0x10 0 0x5777>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x0a60>; + }; + phy4: ethernet-phy@4 { + reg = <4>; + compatible = "marvell,88e1149r"; + marvell,reg-init = <3 0x10 0 0x5777>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x0a60>; + }; + phy5: ethernet-phy@5 { + reg = <5>; + compatible = "marvell,88e1149r"; + marvell,reg-init = <3 0x10 0 0x5777>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x0a60>; + }; + + phy6: ethernet-phy@6 { + reg = <6>; + compatible = "marvell,88e1149r"; + marvell,reg-init = <3 0x10 0 0x5777>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x0a60>; + }; + phy7: ethernet-phy@7 { + reg = <7>; + compatible = "marvell,88e1149r"; + marvell,reg-init = <3 0x10 0 0x5777>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x0a60>; + }; + phy8: ethernet-phy@8 { + reg = <8>; + compatible = "marvell,88e1149r"; + marvell,reg-init = <3 0x10 0 0x5777>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x0a60>; + }; + phy9: ethernet-phy@9 { + reg = <9>; + compatible = "marvell,88e1149r"; + marvell,reg-init = <3 0x10 0 0x5777>, + <3 0x11 0 0x00aa>, + <3 0x12 0 0x4105>, + <3 0x13 0 0x0a60>; + }; + }; + + smi1: mdio@1180000001900 { + compatible = "cavium,octeon-3860-mdio"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x11800 0x00001900 0x0 0x40>; + }; + + mix0: ethernet@1070000100000 { + compatible = "cavium,octeon-5750-mix"; + reg = <0x10700 0x00100000 0x0 0x100>, /* MIX */ + <0x11800 0xE0000000 0x0 0x300>, /* AGL */ + <0x11800 0xE0000400 0x0 0x400>, /* AGL_SHARED */ + <0x11800 0xE0002000 0x0 0x8>; /* AGL_PRT_CTL */ + cell-index = <0>; + interrupts = <0 62>, <1 46>; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&phy0>; + }; + + mix1: ethernet@1070000100800 { + compatible = "cavium,octeon-5750-mix"; + reg = <0x10700 0x00100800 0x0 0x100>, /* MIX */ + <0x11800 0xE0000800 0x0 0x300>, /* AGL */ + <0x11800 0xE0000400 0x0 0x400>, /* AGL_SHARED */ + <0x11800 0xE0002008 0x0 0x8>; /* AGL_PRT_CTL */ + cell-index = <1>; + interrupts = <1 18>, < 1 46>; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&phy1>; + }; + + pip: pip@11800a0000000 { + compatible = "cavium,octeon-3860-pip"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x11800 0xa0000000 0x0 0x2000>; + + interface@0 { + compatible = "cavium,octeon-3860-pip-interface"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; /* interface */ + + ethernet@0 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x0>; /* Port */ + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&phy2>; + }; + ethernet@1 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x1>; /* Port */ + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&phy3>; + }; + ethernet@2 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x2>; /* Port */ + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&phy4>; + }; + ethernet@3 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x3>; /* Port */ + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&phy5>; + }; + ethernet@4 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x4>; /* Port */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + ethernet@5 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x5>; /* Port */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + ethernet@6 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x6>; /* Port */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + ethernet@7 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x7>; /* Port */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + ethernet@8 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x8>; /* Port */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + ethernet@9 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x9>; /* Port */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + ethernet@a { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0xa>; /* Port */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + ethernet@b { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0xb>; /* Port */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + ethernet@c { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0xc>; /* Port */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + ethernet@d { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0xd>; /* Port */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + ethernet@e { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0xe>; /* Port */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + ethernet@f { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0xf>; /* Port */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + }; + + interface@1 { + compatible = "cavium,octeon-3860-pip-interface"; + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; /* interface */ + + ethernet@0 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x0>; /* Port */ + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&phy6>; + }; + ethernet@1 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x1>; /* Port */ + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&phy7>; + }; + ethernet@2 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x2>; /* Port */ + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&phy8>; + }; + ethernet@3 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x3>; /* Port */ + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-handle = <&phy9>; + }; + }; + }; + + twsi0: i2c@1180000001000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "cavium,octeon-3860-twsi"; + reg = <0x11800 0x00001000 0x0 0x200>; + interrupts = <0 45>; + clock-rate = <100000>; + + rtc@68 { + compatible = "dallas,ds1337"; + reg = <0x68>; + }; + tmp@4c { + compatible = "ti,tmp421"; + reg = <0x4c>; + }; + }; + + twsi1: i2c@1180000001200 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "cavium,octeon-3860-twsi"; + reg = <0x11800 0x00001200 0x0 0x200>; + interrupts = <0 59>; + clock-rate = <100000>; + }; + + uart0: serial@1180000000800 { + compatible = "cavium,octeon-3860-uart","ns16550"; + reg = <0x11800 0x00000800 0x0 0x400>; + clock-frequency = <0>; + current-speed = <115200>; + reg-shift = <3>; + interrupts = <0 34>; + }; + + uart1: serial@1180000000c00 { + compatible = "cavium,octeon-3860-uart","ns16550"; + reg = <0x11800 0x00000c00 0x0 0x400>; + clock-frequency = <0>; + current-speed = <115200>; + reg-shift = <3>; + interrupts = <0 35>; + }; + + uart2: serial@1180000000400 { + compatible = "cavium,octeon-3860-uart","ns16550"; + reg = <0x11800 0x00000400 0x0 0x400>; + clock-frequency = <0>; + current-speed = <115200>; + reg-shift = <3>; + interrupts = <1 16>; + }; + + bootbus: bootbus@1180000000000 { + compatible = "cavium,octeon-3860-bootbus"; + reg = <0x11800 0x00000000 0x0 0x200>; + /* The chip select number and offset */ + #address-cells = <2>; + /* The size of the chip select region */ + #size-cells = <1>; + ranges = <0 0 0x0 0x1f400000 0x1000000>, + <1 0 0x1 0x30000000 0x10000000>, + <2 0 0x1 0x40000000 0x10000000>, + <3 0 0x1 0x50000000 0x10000000>, + <4 0 0x1 0x60000000 0x10000000>, + <5 0 0x1 0x70000000 0x10000000>, + <6 0 0x1 0x80000000 0x10000000>, + <7 0 0x1 0x90000000 0x10000000>; + + flash0: nor@0,0 { + compatible = "cfi-flash"; + reg = <0 0 0x800000>; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "firmware"; + reg = <0x0 0x400000>; + read-only; + }; + + partition@400000 { + label = "data"; + reg = <0x400000 0x400000>; + read-only; + }; + }; + }; + + uctl: uctl@118006f000000 { + compatible = "cavium,octeon-6335-uctl"; + reg = <0x11800 0x6f000000 0x0 0x100>; + ranges; /* Direct mapping */ + #address-cells = <2>; + #size-cells = <2>; + /* 12MHz, 24MHz and 48MHz allowed */ + refclk-frequency = <24000000>; + /* Either "crystal" or "external" */ + refclk-type = "crystal"; + + ehci@16f0000000000 { + compatible = "cavium,octeon-6335-ehci","usb-ehci"; + reg = <0x16f00 0x00000000 0x0 0x100>; + interrupts = <0 56>; + big-endian-regs; + }; + ohci@16f0000000400 { + compatible = "cavium,octeon-6335-ohci","usb-ohci"; + reg = <0x16f00 0x00000400 0x0 0x100>; + interrupts = <0 56>; + big-endian-regs; + }; + }; + }; + + aliases { + mix0 = &mix0; + mix1 = &mix1; + pip = &pip; + smi0 = &smi0; + smi1 = &smi1; + twsi0 = &twsi0; + twsi1 = &twsi1; + uart0 = &uart0; + uart1 = &uart1; + uart2 = &uart2; + flash0 = &flash0; + }; + }; -- 1.7.2.3 From ddaney@caviumnetworks.com Mon Jun 6 21:20:10 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 21:21:21 +0200 (CEST) Received: from mail3.caviumnetworks.com ([12.108.191.235]:11431 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491874Ab1FFTUK (ORCPT ); Mon, 6 Jun 2011 21:20:10 +0200 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Mon, 06 Jun 2011 12:21:13 -0700 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.4675); Mon, 6 Jun 2011 12:20:08 -0700 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Mon, 6 Jun 2011 12:20:08 -0700 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.3) with ESMTP id p56JJxoU027117; Mon, 6 Jun 2011 12:19:59 -0700 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id p56JJvxb027116; Mon, 6 Jun 2011 12:19:57 -0700 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org, devicetree-discuss@lists.ozlabs.org, grant.likely@secretlab.ca, linux-kernel@vger.kernel.org Cc: David Daney Subject: [RFC PATCH v5 2/6] of: Make of_find_node_by_path() traverse /aliases for relative paths. Date: Mon, 6 Jun 2011 12:19:42 -0700 Message-Id: <1307387986-27069-3-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1307387986-27069-1-git-send-email-ddaney@caviumnetworks.com> References: <1307387986-27069-1-git-send-email-ddaney@caviumnetworks.com> X-OriginalArrivalTime: 06 Jun 2011 19:20:08.0096 (UTC) FILETIME=[BF4E4A00:01CC247E] X-archive-position: 30261 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4748 Content-Length: 3030 Lines: 104 Currently all paths passed to of_find_node_by_path() must begin with a '/', indicating a full path to the desired node. Augment the look-up code so that if a path does *not* begin with '/', the path is used as the name of an /aliases property. The value of this alias is then used as the full node path to be found. Signed-off-by: David Daney --- drivers/of/base.c | 65 ++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 files changed, 62 insertions(+), 3 deletions(-) diff --git a/drivers/of/base.c b/drivers/of/base.c index 632ebae..4165084 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -340,22 +340,81 @@ EXPORT_SYMBOL(of_get_next_child); /** * of_find_node_by_path - Find a node matching a full OF path - * @path: The full path to match + * @path: Either the full path to match, or if the path does not + * start with '/', the name of a property of the /aliases + * node (an alias). In the case of an alias, the node + * matching the alias' value will be returned. * * Returns a node pointer with refcount incremented, use * of_node_put() on it when done. */ struct device_node *of_find_node_by_path(const char *path) { - struct device_node *np = allnodes; + struct device_node *np = NULL; + struct device_node *aliases = NULL; + char *alias = NULL; + char *new_path = NULL; + char *ps; read_lock(&devtree_lock); - for (; np; np = np->allnext) { + + /* + * The following code has three possibilities: + * 1) '/' at start of string; path == ps; (based at root) + * 2) '/' at offset in string; path < ps; (relative to alias) + * 3) '/' not found; ps == NULL; (alias only) + * + * If ps != path, then it is either a pure alias (ps == NULL), + * or an alias with a relative path (path < ps). Either way, + * look up the path pointed to by the alias. + */ + ps = strchr(path, '/'); + if (path != ps) { + aliases = of_find_node_by_path("/aliases"); + if (!aliases) + goto out; + + /* + * Duplicate the alias part of the string so it can be + * NULL terminated. + */ + alias = kstrndup(path, + ps ? (ps - path) : strlen(path), GFP_KERNEL); + if (!alias) + goto out; + path = of_get_property(aliases, alias, NULL); + if (!path || path[0] != '/') + goto out; + + /* If ps is not NULL, then there is a relative path to append */ + if (ps) { + new_path = kzalloc(strlen(path) + strlen(ps) + 1, + GFP_KERNEL); + if (!new_path) + goto out; + + sprintf(new_path, "%s%s", path, ps); + path = new_path; + } + } + + /* + * At this point, path now points to the full unaliased path + * to a node, regardless of whether or not it started with an + * alias. + */ + + for (np = allnodes; np; np = np->allnext) { if (np->full_name && (of_node_cmp(np->full_name, path) == 0) && of_node_get(np)) break; } +out: + if (aliases) + of_node_put(aliases); read_unlock(&devtree_lock); + kfree(alias); + kfree(new_path); return np; } EXPORT_SYMBOL(of_find_node_by_path); -- 1.7.2.3 From ddaney@caviumnetworks.com Mon Jun 6 21:20:11 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 21:21:43 +0200 (CEST) Received: from mail3.caviumnetworks.com ([12.108.191.235]:11437 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491875Ab1FFTUL (ORCPT ); Mon, 6 Jun 2011 21:20:11 +0200 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Mon, 06 Jun 2011 12:21:14 -0700 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.4675); Mon, 6 Jun 2011 12:20:09 -0700 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Mon, 6 Jun 2011 12:20:09 -0700 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.3) with ESMTP id p56JK4Bg027127; Mon, 6 Jun 2011 12:20:04 -0700 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id p56JK3Vs027126; Mon, 6 Jun 2011 12:20:03 -0700 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org, devicetree-discuss@lists.ozlabs.org, grant.likely@secretlab.ca, linux-kernel@vger.kernel.org Cc: David Daney Subject: [RFC PATCH v5 4/6] MIPS: Prune some target specific code out of prom.c Date: Mon, 6 Jun 2011 12:19:44 -0700 Message-Id: <1307387986-27069-5-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1307387986-27069-1-git-send-email-ddaney@caviumnetworks.com> References: <1307387986-27069-1-git-send-email-ddaney@caviumnetworks.com> X-OriginalArrivalTime: 06 Jun 2011 19:20:09.0189 (UTC) FILETIME=[BFF51150:01CC247E] X-archive-position: 30262 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4749 Content-Length: 1953 Lines: 69 This code is not common enough to be in a shared file. It is also not used by any existing boards, so just remove it. Signed-off-by: David Daney --- arch/mips/kernel/prom.c | 50 ----------------------------------------------- 1 files changed, 0 insertions(+), 50 deletions(-) diff --git a/arch/mips/kernel/prom.c b/arch/mips/kernel/prom.c index 5b7eade..a07b6f1 100644 --- a/arch/mips/kernel/prom.c +++ b/arch/mips/kernel/prom.c @@ -59,53 +59,3 @@ void __init early_init_dt_setup_initrd_arch(unsigned long start, initrd_below_start_ok = 1; } #endif - -/* - * irq_create_of_mapping - Hook to resolve OF irq specifier into a Linux irq# - * - * Currently the mapping mechanism is trivial; simple flat hwirq numbers are - * mapped 1:1 onto Linux irq numbers. Cascaded irq controllers are not - * supported. - */ -unsigned int irq_create_of_mapping(struct device_node *controller, - const u32 *intspec, unsigned int intsize) -{ - return intspec[0]; -} -EXPORT_SYMBOL_GPL(irq_create_of_mapping); - -void __init early_init_devtree(void *params) -{ - /* Setup flat device-tree pointer */ - initial_boot_params = params; - - /* Retrieve various informations from the /chosen node of the - * device-tree, including the platform type, initrd location and - * size, and more ... - */ - of_scan_flat_dt(early_init_dt_scan_chosen, arcs_cmdline); - - - /* Scan memory nodes */ - of_scan_flat_dt(early_init_dt_scan_root, NULL); - of_scan_flat_dt(early_init_dt_scan_memory_arch, NULL); -} - -void __init device_tree_init(void) -{ - unsigned long base, size; - - if (!initial_boot_params) - return; - - base = virt_to_phys((void *)initial_boot_params); - size = be32_to_cpu(initial_boot_params->totalsize); - - /* Before we do anything, lets reserve the dt blob */ - reserve_mem_mach(base, size); - - unflatten_device_tree(); - - /* free the space reserved for the dt blob */ - free_mem_mach(base, size); -} -- 1.7.2.3 From ddaney@caviumnetworks.com Mon Jun 6 21:20:13 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 21:22:08 +0200 (CEST) Received: from mail3.caviumnetworks.com ([12.108.191.235]:11446 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491877Ab1FFTUN (ORCPT ); Mon, 6 Jun 2011 21:20:13 +0200 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Mon, 06 Jun 2011 12:21:16 -0700 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.4675); Mon, 6 Jun 2011 12:20:11 -0700 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Mon, 6 Jun 2011 12:20:11 -0700 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.3) with ESMTP id p56JK6BN027131; Mon, 6 Jun 2011 12:20:06 -0700 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id p56JK5GL027130; Mon, 6 Jun 2011 12:20:05 -0700 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org, devicetree-discuss@lists.ozlabs.org, grant.likely@secretlab.ca, linux-kernel@vger.kernel.org Cc: David Daney Subject: [RFC PATCH v5 5/6] MIPS: Octeon: Add irq_create_of_mapping() and GPIO interrupts. Date: Mon, 6 Jun 2011 12:19:45 -0700 Message-Id: <1307387986-27069-6-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1307387986-27069-1-git-send-email-ddaney@caviumnetworks.com> References: <1307387986-27069-1-git-send-email-ddaney@caviumnetworks.com> X-OriginalArrivalTime: 06 Jun 2011 19:20:11.0189 (UTC) FILETIME=[C1263E50:01CC247E] X-archive-position: 30263 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4753 Content-Length: 7499 Lines: 265 This is needed for Octeon to use the Device Tree. The GPIO interrupts are configured based on Device Tree properties Signed-off-by: David Daney --- arch/mips/cavium-octeon/octeon-irq.c | 188 +++++++++++++++++++++++++++++++++- 1 files changed, 187 insertions(+), 1 deletions(-) diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c index ffd4ae6..bb10546 100644 --- a/arch/mips/cavium-octeon/octeon-irq.c +++ b/arch/mips/cavium-octeon/octeon-irq.c @@ -8,11 +8,14 @@ #include #include +#include #include +#include #include #include #include +#include static DEFINE_RAW_SPINLOCK(octeon_irq_ciu0_lock); static DEFINE_RAW_SPINLOCK(octeon_irq_ciu1_lock); @@ -58,6 +61,95 @@ static void __init octeon_irq_set_ciu_mapping(int irq, int line, int bit, octeon_irq_ciu_to_irq[line][bit] = irq; } +static unsigned int octeon_irq_gpio_mapping(struct device_node *controller, + const u32 *intspec, + unsigned int intsize) +{ + struct of_irq oirq; + int i; + unsigned int irq = 0; + unsigned int type; + unsigned int ciu = 0, bit = 0; + unsigned int pin = be32_to_cpup(intspec); + unsigned int trigger = be32_to_cpup(intspec + 1); + bool set_edge_handler = false; + + if (pin >= 16) + goto err; + i = of_irq_map_one(controller, 0, &oirq); + if (i) + goto err; + if (oirq.size != 2) + goto err_put; + + ciu = oirq.specifier[0]; + bit = oirq.specifier[1] + pin; + + if (ciu >= 8 || bit >= 64) + goto err_put; + + irq = octeon_irq_ciu_to_irq[ciu][bit]; + if (!irq) + goto err_put; + + switch (trigger & 0xf) { + case 1: + type = IRQ_TYPE_EDGE_RISING; + set_edge_handler = true; + break; + case 2: + type = IRQ_TYPE_EDGE_FALLING; + set_edge_handler = true; + break; + case 4: + type = IRQ_TYPE_LEVEL_HIGH; + break; + case 8: + type = IRQ_TYPE_LEVEL_LOW; + break; + default: + pr_err("Error: Invalid irq trigger specification: %x\n", + trigger); + type = IRQ_TYPE_LEVEL_LOW; + break; + } + + irq_set_irq_type(irq, type); + + if (set_edge_handler) + __irq_set_handler(irq, handle_edge_irq, 0, NULL); + +err_put: + of_node_put(oirq.controller); +err: + return irq; +} + +/* + * irq_create_of_mapping - Hook to resolve OF irq specifier into a Linux irq# + * + * Octeon irq maps are a pair of indexes. The first selects either + * ciu0 or ciu1, the second is the bit within the ciu register. + */ +unsigned int irq_create_of_mapping(struct device_node *controller, + const u32 *intspec, unsigned int intsize) +{ + unsigned int irq = 0; + unsigned int ciu, bit; + + if (of_device_is_compatible(controller, "cavium,octeon-3860-gpio")) + return octeon_irq_gpio_mapping(controller, intspec, intsize); + + ciu = be32_to_cpup(intspec); + bit = be32_to_cpup(intspec + 1); + + if (ciu < 8 && bit < 64) + irq = octeon_irq_ciu_to_irq[ciu][bit]; + + return irq; +} +EXPORT_SYMBOL_GPL(irq_create_of_mapping); + static int octeon_coreid_for_cpu(int cpu) { #ifdef CONFIG_SMP @@ -505,6 +597,72 @@ static void octeon_irq_ciu_enable_all_v2(struct irq_data *data) } } +static void octeon_irq_gpio_setup(struct irq_data *data) +{ + union cvmx_gpio_bit_cfgx cfg; + int bit = data->irq - OCTEON_IRQ_GPIO0; + u32 t = irqd_get_trigger_type(data); + + cfg.u64 = 0; + cfg.s.int_en = 1; + cfg.s.int_type = (t & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) != 0; + cfg.s.rx_xor = (t & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_EDGE_FALLING)) != 0; + + /* 1 uS glitch filter*/ + cfg.s.fil_cnt = 7; + cfg.s.fil_sel = 3; + + cvmx_write_csr(CVMX_GPIO_BIT_CFGX(bit), cfg.u64); +} + +static void octeon_irq_ciu_enable_gpio_v2(struct irq_data *data) +{ + octeon_irq_gpio_setup(data); + octeon_irq_ciu_enable_v2(data); +} + +static void octeon_irq_ciu_enable_gpio(struct irq_data *data) +{ + octeon_irq_gpio_setup(data); + octeon_irq_ciu_enable(data); +} + +static int octeon_irq_ciu_gpio_set_type(struct irq_data *data, unsigned int t) +{ + u32 current_type = irqd_get_trigger_type(data); + + /* If the type has been set, don't change it */ + if (current_type && current_type != t) + return -EINVAL; + + irqd_set_trigger_type(data, t); + return IRQ_SET_MASK_OK; +} + +static void octeon_irq_ciu_disable_gpio_v2(struct irq_data *data) +{ + int bit = data->irq - OCTEON_IRQ_GPIO0; + cvmx_write_csr(CVMX_GPIO_BIT_CFGX(bit), 0); + + octeon_irq_ciu_disable_all_v2(data); +} + +static void octeon_irq_ciu_disable_gpio(struct irq_data *data) +{ + int bit = data->irq - OCTEON_IRQ_GPIO0; + cvmx_write_csr(CVMX_GPIO_BIT_CFGX(bit), 0); + + octeon_irq_ciu_disable_all(data); +} + +static void octeon_irq_ciu_gpio_ack(struct irq_data *data) +{ + int bit = data->irq - OCTEON_IRQ_GPIO0; + u64 mask = 1ull << bit; + + cvmx_write_csr(CVMX_GPIO_INT_CLR, mask); +} + #ifdef CONFIG_SMP static void octeon_irq_cpu_offline_ciu(struct irq_data *data) @@ -717,6 +875,31 @@ static struct irq_chip octeon_irq_chip_ciu_mbox = { .flags = IRQCHIP_ONOFFLINE_ENABLED, }; +static struct irq_chip octeon_irq_chip_ciu_gpio_v2 = { + .name = "CIU-GPIO", + .irq_enable = octeon_irq_ciu_enable_gpio_v2, + .irq_disable = octeon_irq_ciu_disable_gpio_v2, + .irq_ack = octeon_irq_ciu_gpio_ack, + .irq_mask = octeon_irq_ciu_disable_local_v2, + .irq_unmask = octeon_irq_ciu_enable_v2, + .irq_set_type = octeon_irq_ciu_gpio_set_type, +#ifdef CONFIG_SMP + .irq_set_affinity = octeon_irq_ciu_set_affinity_v2, +#endif +}; + +static struct irq_chip octeon_irq_chip_ciu_gpio = { + .name = "CIU-GPIO", + .irq_enable = octeon_irq_ciu_enable_gpio, + .irq_disable = octeon_irq_ciu_disable_gpio, + .irq_mask = octeon_irq_dummy_mask, + .irq_ack = octeon_irq_ciu_gpio_ack, + .irq_set_type = octeon_irq_ciu_gpio_set_type, +#ifdef CONFIG_SMP + .irq_set_affinity = octeon_irq_ciu_set_affinity, +#endif +}; + /* * Watchdog interrupts are special. They are associated with a single * core, so we hardwire the affinity to that core. @@ -890,6 +1073,7 @@ static void __init octeon_irq_init_ciu(void) struct irq_chip *chip_edge; struct irq_chip *chip_mbox; struct irq_chip *chip_wd; + struct irq_chip *chip_gpio; octeon_irq_init_ciu_percpu(); octeon_irq_setup_secondary = octeon_irq_setup_secondary_ciu; @@ -904,6 +1088,7 @@ static void __init octeon_irq_init_ciu(void) chip_edge = &octeon_irq_chip_ciu_edge_v2; chip_mbox = &octeon_irq_chip_ciu_mbox_v2; chip_wd = &octeon_irq_chip_ciu_wd_v2; + chip_gpio = &octeon_irq_chip_ciu_gpio_v2; } else { octeon_irq_ip2 = octeon_irq_ip2_v1; octeon_irq_ip3 = octeon_irq_ip3_v1; @@ -911,6 +1096,7 @@ static void __init octeon_irq_init_ciu(void) chip_edge = &octeon_irq_chip_ciu_edge; chip_mbox = &octeon_irq_chip_ciu_mbox; chip_wd = &octeon_irq_chip_ciu_wd; + chip_gpio = &octeon_irq_chip_ciu_gpio; } octeon_irq_ip4 = octeon_irq_ip4_mask; @@ -921,7 +1107,7 @@ static void __init octeon_irq_init_ciu(void) for (i = 0; i < 16; i++) octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_WORKQ0, 0, i + 0, chip, handle_level_irq); for (i = 0; i < 16; i++) - octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_GPIO0, 0, i + 16, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_GPIO0, 0, i + 16, chip_gpio, handle_level_irq); octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX0, 0, 32, chip_mbox, handle_percpu_irq); octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX1, 0, 33, chip_mbox, handle_percpu_irq); -- 1.7.2.3 From ddaney@caviumnetworks.com Mon Jun 6 21:20:13 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 21:22:34 +0200 (CEST) Received: from mail3.caviumnetworks.com ([12.108.191.235]:11443 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491876Ab1FFTUN (ORCPT ); Mon, 6 Jun 2011 21:20:13 +0200 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Mon, 06 Jun 2011 12:21:16 -0700 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.4675); Mon, 6 Jun 2011 12:20:11 -0700 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Mon, 6 Jun 2011 12:20:11 -0700 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.3) with ESMTP id p56JK80m027135; Mon, 6 Jun 2011 12:20:08 -0700 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id p56JK7Vh027134; Mon, 6 Jun 2011 12:20:07 -0700 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org, devicetree-discuss@lists.ozlabs.org, grant.likely@secretlab.ca, linux-kernel@vger.kernel.org Cc: David Daney Subject: [RFC PATCH v5 6/6] MIPS: Octeon: Initialize and fixup device tree. Date: Mon, 6 Jun 2011 12:19:46 -0700 Message-Id: <1307387986-27069-7-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1307387986-27069-1-git-send-email-ddaney@caviumnetworks.com> References: <1307387986-27069-1-git-send-email-ddaney@caviumnetworks.com> X-OriginalArrivalTime: 06 Jun 2011 19:20:11.0189 (UTC) FILETIME=[C1263E50:01CC247E] X-archive-position: 30264 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4754 Content-Length: 12152 Lines: 432 Signed-off-by: David Daney --- arch/mips/Kconfig | 1 + arch/mips/cavium-octeon/Makefile | 3 + arch/mips/cavium-octeon/octeon-platform.c | 319 +++++++++++++++++++++++++++++ arch/mips/cavium-octeon/setup.c | 39 ++++ 4 files changed, 362 insertions(+), 0 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index d2849b4..97f044a 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1402,6 +1402,7 @@ config CPU_CAVIUM_OCTEON select WEAK_ORDERING select CPU_SUPPORTS_HIGHMEM select CPU_SUPPORTS_HUGEPAGES + select LIBFDT help The Cavium Octeon processor is a highly integrated chip containing many ethernet hardware widgets for networking tasks. The processor diff --git a/arch/mips/cavium-octeon/Makefile b/arch/mips/cavium-octeon/Makefile index b8d4f63..a11b35a 100644 --- a/arch/mips/cavium-octeon/Makefile +++ b/arch/mips/cavium-octeon/Makefile @@ -9,6 +9,9 @@ # Copyright (C) 2005-2009 Cavium Networks # +CFLAGS_octeon-platform.o = -I$(src)/../../../scripts/dtc/libfdt +CFLAGS_setup.o = -I$(src)/../../../scripts/dtc/libfdt + obj-y := cpu.o setup.o serial.o octeon-platform.o octeon-irq.o csrc-octeon.o obj-y += dma-octeon.o flash_setup.o obj-y += octeon-memcpy.o diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c index cd61d72..17329e5 100644 --- a/arch/mips/cavium-octeon/octeon-platform.c +++ b/arch/mips/cavium-octeon/octeon-platform.c @@ -13,10 +13,16 @@ #include #include #include +#include #include +#include +#include +#include #include #include +#include +#include static struct octeon_cf_data octeon_cf_data; @@ -440,6 +446,319 @@ device_initcall(octeon_ohci_device_init); #endif /* CONFIG_USB */ +static struct of_device_id __initdata octeon_ids[] = { + { .compatible = "simple-bus", }, + { .compatible = "cavium,octeon-6335-uctl", }, + { .compatible = "cavium,octeon-3860-bootbus", }, + {}, +}; + +static bool __init octeon_has_88e1145(void) +{ + return !OCTEON_IS_MODEL(OCTEON_CN52XX) && + !OCTEON_IS_MODEL(OCTEON_CN6XXX) && + !OCTEON_IS_MODEL(OCTEON_CN56XX); +} + +static void __init octeon_fdt_set_phy(int eth, int phy_addr) +{ + const __be32 *phy_handle; + const __be32 *reg; + u32 phandle; + int phy; + const char *p; + int current_len; + char new_name[20]; + + phy_handle = fdt_getprop(initial_boot_params, eth, "phy-handle", NULL); + if (!phy_handle) + return; + + phandle = be32_to_cpup(phy_handle); + phy = fdt_node_offset_by_phandle(initial_boot_params, phandle); + if (phy_addr < 0 || phy < 0) { + /* Delete the PHY things */ + fdt_nop_property(initial_boot_params, eth, "phy-handle"); + if (phy >= 0) + fdt_nop_node(initial_boot_params, phy); + return; + } + + if (octeon_has_88e1145()) { + fdt_nop_property(initial_boot_params, phy, "marvell,reg-init"); + memset(new_name, 0, sizeof(new_name)); + strcpy(new_name, "marvell,88e1145"); + p = fdt_getprop(initial_boot_params, phy, "compatible", + ¤t_len); + if (p && current_len >= strlen(new_name)) + fdt_setprop_inplace(initial_boot_params, phy, + "compatible", new_name, current_len); + } + + reg = fdt_getprop(initial_boot_params, phy, "reg", NULL); + if (phy_addr == be32_to_cpup(reg)) + return; + + fdt_setprop_inplace_cell(initial_boot_params, phy, "reg", phy_addr); + + snprintf(new_name, sizeof(new_name), "ethernet-phy@%x", phy_addr); + + p = fdt_get_name(initial_boot_params, phy, ¤t_len); + if (p && current_len == strlen(new_name)) + fdt_set_name(initial_boot_params, phy, new_name); + else + pr_err("Error: could not rename ethernet phy: <%s>", p); +} + +static void __init octeon_fdt_set_mac_addr(int n, u64 *pmac) +{ + u8 new_mac[6]; + u64 mac = *pmac; + int r; + + new_mac[0] = (mac >> 40) & 0xff; + new_mac[1] = (mac >> 32) & 0xff; + new_mac[2] = (mac >> 24) & 0xff; + new_mac[3] = (mac >> 16) & 0xff; + new_mac[4] = (mac >> 8) & 0xff; + new_mac[5] = mac & 0xff; + + r = fdt_setprop_inplace(initial_boot_params, n, "local-mac-address", + new_mac, sizeof(new_mac)); + + if (r) { + pr_err("Setting \"local-mac-address\" failed %d", r); + return; + } + *pmac = mac + 1; +} + +static void __init octeon_fdt_rm_ethernet(int node) +{ + const __be32 *phy_handle; + + phy_handle = fdt_getprop(initial_boot_params, node, "phy-handle", NULL); + if (phy_handle) { + u32 ph = be32_to_cpup(phy_handle); + int p = fdt_node_offset_by_phandle(initial_boot_params, ph); + if (p >= 0) + fdt_nop_node(initial_boot_params, p); + } + fdt_nop_node(initial_boot_params, node); +} + +static void __init octeon_fdt_pip_port(int iface, int i, int p, u64 *pmac) +{ + char name_buffer[20]; + int eth; + int phy_addr; + + snprintf(name_buffer, sizeof(name_buffer), "ethernet@%x", p); + eth = fdt_subnode_offset(initial_boot_params, iface, name_buffer); + if (eth < 0) + return; + if (p >= cvmx_helper_ports_on_interface(i)) { + pr_notice("Deleting port %x:%x\n", i, p); + octeon_fdt_rm_ethernet(eth); + return; + } + + phy_addr = cvmx_helper_board_get_mii_address(16 * i + p); + octeon_fdt_set_phy(eth, phy_addr); + octeon_fdt_set_mac_addr(eth, pmac); +} + +static void __init octeon_fdt_pip_iface(int pip, int idx, u64 *pmac) +{ + char name_buffer[20]; + int iface; + int p; + + cvmx_helper_interface_enumerate(idx); + snprintf(name_buffer, sizeof(name_buffer), "interface@%d", idx); + iface = fdt_subnode_offset(initial_boot_params, pip, name_buffer); + if (iface < 0) + return; + + for (p = 0; p < 16; p++) + octeon_fdt_pip_port(iface, idx, p, pmac); +} + +int __init octeon_prune_device_tree(void) +{ + int i, max_port, uart_mask; + const char *pip_path; + char name_buffer[20]; + int aliases; + u64 mac_addr_base; + + if (fdt_check_header(initial_boot_params)) + panic("Corrupt Device Tree."); + + aliases = fdt_path_offset(initial_boot_params, "/aliases"); + if (aliases < 0) { + pr_err("Error: No /aliases node in device tree."); + return -EINVAL; + } + + + mac_addr_base = + ((octeon_bootinfo->mac_addr_base[0] & 0xffull)) << 40 | + ((octeon_bootinfo->mac_addr_base[1] & 0xffull)) << 32 | + ((octeon_bootinfo->mac_addr_base[2] & 0xffull)) << 24 | + ((octeon_bootinfo->mac_addr_base[3] & 0xffull)) << 16 | + ((octeon_bootinfo->mac_addr_base[4] & 0xffull)) << 8 | + (octeon_bootinfo->mac_addr_base[5] & 0xffull); + + if (OCTEON_IS_MODEL(OCTEON_CN52XX) || OCTEON_IS_MODEL(OCTEON_CN63XX)) + max_port = 2; + else if (OCTEON_IS_MODEL(OCTEON_CN56XX)) + max_port = 1; + else + max_port = 0; + + for (i = 0; i < 2; i++) { + const char *alias_prop; + int mgmt; + snprintf(name_buffer, sizeof(name_buffer), + "mix%d", i); + alias_prop = fdt_getprop(initial_boot_params, aliases, + name_buffer, NULL); + if (alias_prop) { + mgmt = fdt_path_offset(initial_boot_params, alias_prop); + if (mgmt < 0) + continue; + if (i >= max_port) { + pr_notice("Deleting mix%d\n", i); + octeon_fdt_rm_ethernet(mgmt); + fdt_nop_property(initial_boot_params, aliases, + name_buffer); + } else { + octeon_fdt_set_phy(mgmt, i); + octeon_fdt_set_mac_addr(mgmt, &mac_addr_base); + } + } + } + + pip_path = fdt_getprop(initial_boot_params, aliases, "pip", NULL); + if (pip_path) { + int pip = fdt_path_offset(initial_boot_params, pip_path); + if (pip >= 0) + for (i = 0; i < 4; i++) + octeon_fdt_pip_iface(pip, i, &mac_addr_base); + } + + /* I2C */ + if (OCTEON_IS_MODEL(OCTEON_CN52XX) || + OCTEON_IS_MODEL(OCTEON_CN63XX) || + OCTEON_IS_MODEL(OCTEON_CN56XX)) + max_port = 2; + else + max_port = 1; + + for (i = 0; i < 2; i++) { + const char *alias_prop; + int i2c; + snprintf(name_buffer, sizeof(name_buffer), + "twsi%d", i); + alias_prop = fdt_getprop(initial_boot_params, aliases, + name_buffer, NULL); + + if (alias_prop) { + i2c = fdt_path_offset(initial_boot_params, alias_prop); + if (i2c < 0) + continue; + if (i >= max_port) { + pr_notice("Deleting twsi%d\n", i); + fdt_nop_node(initial_boot_params, i2c); + fdt_nop_property(initial_boot_params, aliases, + name_buffer); + } + } + } + + /* SMI/MDIO Same number of ports as I2C*/ + + for (i = 0; i < 2; i++) { + const char *alias_prop; + int i2c; + snprintf(name_buffer, sizeof(name_buffer), + "smi%d", i); + alias_prop = fdt_getprop(initial_boot_params, aliases, + name_buffer, NULL); + + if (alias_prop) { + i2c = fdt_path_offset(initial_boot_params, alias_prop); + if (i2c < 0) + continue; + if (i >= max_port) { + pr_notice("Deleting smi%d\n", i); + fdt_nop_node(initial_boot_params, i2c); + fdt_nop_property(initial_boot_params, aliases, + name_buffer); + } + } + } + + /* Serial */ + uart_mask = 0; + +#ifdef CONFIG_CAVIUM_OCTEON_2ND_KERNEL + /* + * If we are configured to run as the second of two kernels, + * disable uart0 and enable uart1. Uart0 is owned by the first + * kernel + */ + uart_mask |= 2; /* uart1 */ +#else + /* + * We are configured for the first kernel. We'll enable uart0 + * if the bootloader told us to use 0, otherwise will enable + * uart 1. + */ + if (octeon_get_boot_uart() == 0) + uart_mask |= 1; /* uart0 */ + if (octeon_get_boot_uart() == 1) + uart_mask |= 2; /* uart1 */ + +#ifdef CONFIG_KGDB + uart_mask |= 2; /* uart1 */ +#endif +#endif + + /* Right now CN52XX is the only chip with a third uart */ + if (OCTEON_IS_MODEL(OCTEON_CN52XX)) + uart_mask |= 4; /* uart2 */ + + for (i = 0; i < 3; i++) { + const char *alias_prop; + int uart; + snprintf(name_buffer, sizeof(name_buffer), + "uart%d", i); + alias_prop = fdt_getprop(initial_boot_params, aliases, + name_buffer, NULL); + + if (alias_prop) { + uart = fdt_path_offset(initial_boot_params, alias_prop); + if (uart_mask & (1 << i)) + continue; + pr_notice("Deleting uart%d\n", i); + fdt_nop_node(initial_boot_params, uart); + fdt_nop_property(initial_boot_params, aliases, + name_buffer); + } + } + + return 0; +} + +static int __init octeon_publish_devices(void) +{ + return of_platform_bus_probe(NULL, octeon_ids, NULL); +} +device_initcall(octeon_publish_devices); + + MODULE_AUTHOR("David Daney "); MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("Platform driver for Octeon SOC"); diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c index 36221b3..15f876e 100644 --- a/arch/mips/cavium-octeon/setup.c +++ b/arch/mips/cavium-octeon/setup.c @@ -20,6 +20,8 @@ #include #include #include +#include +#include #ifdef CONFIG_BLK_DEV_INITRD #include #endif @@ -797,3 +799,40 @@ void prom_free_prom_memory(void) } #endif } + +int octeon_prune_device_tree(void); + +extern const char __dtb_octeon_3xxx_begin; +extern const char __dtb_octeon_3xxx_end; +void __init device_tree_init(void) +{ + int dt_size; + struct boot_param_header *fdt; + bool do_prune; + + if (octeon_bootinfo->minor_version >= 3 && octeon_bootinfo->fdt_addr) { + fdt = (struct boot_param_header *)PHYS_TO_XKSEG_CACHED(octeon_bootinfo->fdt_addr); + if (fdt_check_header(fdt)) + panic("Corrupt Device Tree passed to kernel."); + dt_size = be32_to_cpu(fdt->totalsize); + do_prune = false; + } else { + fdt = (struct boot_param_header *)&__dtb_octeon_3xxx_begin; + dt_size = &__dtb_octeon_3xxx_end - &__dtb_octeon_3xxx_begin; + do_prune = true; + } + + /* Copy the default tree from init memory. */ + initial_boot_params = early_init_dt_alloc_memory_arch(dt_size, 8); + if (initial_boot_params == NULL) + panic("Could not allocate initial_boot_params\n"); + memcpy(initial_boot_params, fdt, dt_size); + + if (do_prune) { + octeon_prune_device_tree(); + pr_info("Using internal Device Tree.\n"); + } else { + pr_info("Using passed Device Tree.\n"); + } + unflatten_device_tree(); +} -- 1.7.2.3 From davem@davemloft.net Mon Jun 6 22:21:02 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 22:21:10 +0200 (CEST) Received: from shards.monkeyblade.net ([198.137.202.13]:52412 "EHLO shards.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491783Ab1FFUVC (ORCPT ); Mon, 6 Jun 2011 22:21:02 +0200 Received: from localhost (74-93-104-100-Washington.hfc.comcastbusiness.net [74.93.104.100]) (authenticated bits=0) by shards.monkeyblade.net (8.14.4/8.14.4) with ESMTP id p56KHJKR003210 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Mon, 6 Jun 2011 13:17:19 -0700 Date: Mon, 06 Jun 2011 13:17:18 -0700 (PDT) Message-Id: <20110606.131718.2215062170051315214.davem@davemloft.net> To: eparis@redhat.com Cc: linux-kernel@vger.kernel.org, tony.luck@intel.com, fenghua.yu@intel.com, monstr@monstr.eu, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, schwidefsky@de.ibm.com, heiko.carstens@de.ibm.com, linux390@de.ibm.com, lethal@linux-sh.org, jdike@addtoit.com, richard@nod.at, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, viro@zeniv.linux.org.uk, oleg@redhat.com, akpm@linux-foundation.org, linux-ia64@vger.kernel.org, microblaze-uclinux@itee.uq.edu.au, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net Subject: Re: [PATCH -v2] Audit: push audit success and retcode into arch ptrace.h From: David Miller In-Reply-To: <20110603220451.23134.47368.stgit@paris.rdu.redhat.com> References: <20110603220451.23134.47368.stgit@paris.rdu.redhat.com> X-Mailer: Mew version 6.3 on Emacs 23.2 / Mule 6.0 (HANACHIRUSATO) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.6 (shards.monkeyblade.net [198.137.202.13]); Mon, 06 Jun 2011 13:17:24 -0700 (PDT) X-archive-position: 30265 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: davem@davemloft.net Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4822 Content-Length: 267 Lines: 10 From: Eric Paris Date: Fri, 03 Jun 2011 18:04:51 -0400 ... > Signed-off-by: Eric Paris > Acked-by: Acked-by: H. Peter Anvin [for x86 portion] For sparc parts: Acked-by: David S. Miller From mattst88@gmail.com Mon Jun 6 23:09:25 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 23:09:30 +0200 (CEST) Received: from mail-vw0-f49.google.com ([209.85.212.49]:41790 "EHLO mail-vw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491818Ab1FFVJZ convert rfc822-to-8bit (ORCPT ); Mon, 6 Jun 2011 23:09:25 +0200 Received: by vws8 with SMTP id 8so4147810vws.36 for ; Mon, 06 Jun 2011 14:09:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc:content-type:content-transfer-encoding; bh=UZ4mu0vBLuRThT3RoJZHUOCQ7JEaDjz6UXDkJnWyBQU=; b=r+E2TiIXVr7moA5aOEa1zYMPk2mU4q4vmOOqaC710vOQv37HSklLxkjbvxNoRGTIYX nSFTBLhQkyOxywTaWRBcbQ0AtCL89wLr8ebTZU650sggPP/vyWve8nKogCn1TXIRrFug kRwEowofo0sq97t/4yD11haI/fOOczeRP5g84= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-type:content-transfer-encoding; b=R4KqtHUsbLckGSIgYRZXgM7OtYjOOqVaE5q1YkFXwOKKhrcn13ywnHG/XwLAU79s66 jsSv4F6k76/RutpO4BzdytH1HwrQs9E2/avdp7fyyvYNeYSRXr4qD+hNwuL0huzGyEvE bTmODVlWDCerpdUjRV+Ki8V6Tg4sW/1UrO6Ao= Received: by 10.52.0.130 with SMTP id 2mr366357vde.180.1307394558065; Mon, 06 Jun 2011 14:09:18 -0700 (PDT) MIME-Version: 1.0 Received: by 10.52.166.71 with HTTP; Mon, 6 Jun 2011 14:08:58 -0700 (PDT) In-Reply-To: References: <20110606033608.GA14686@localhost.mattst88> From: Matt Turner Date: Mon, 6 Jun 2011 17:08:58 -0400 Message-ID: Subject: Re: Regression: d6d5d5c breaks Broadcom BCM91250A To: Thomas Gleixner Cc: Ralf Baechle , linux-mips@linux-mips.org Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT X-archive-position: 30266 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mattst88@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4889 Content-Length: 1737 Lines: 57 On Mon, Jun 6, 2011 at 5:53 AM, Thomas Gleixner wrote: > On Sun, 5 Jun 2011, Matt Turner wrote: > >> Hi Thomas, >> >> Commit d6d5d5c4afd4c8bb4c5e3753a2141e9c3a874629 breaks boot-up on my >> Broadcom BCM91250A. Reverting it solves the problem. >> >> I looked at the commit but nothing obviously wrong jumped out at me. > > The below should fix it. > > -----------------> > Subject: MIPS: sb1250: Restore dropped irq_mask function > From: Thomas Gleixner > Date: Mon, 06 Jun 2011 11:51:43 +0200 > > Commit d6d5d5c4a (MIPS: Sibyte: Convert to new irq_chip functions) > removed the mask function which breaks irq_shutdown(). Restore it. > > Reported-by: Matt Turner > Signed-off-by: Thomas Gleixner > > --- > diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c > index be4460a..76ee045 100644 > --- a/arch/mips/sibyte/sb1250/irq.c > +++ b/arch/mips/sibyte/sb1250/irq.c > @@ -123,6 +123,13 @@ static int sb1250_set_affinity(struct irq_data *d, const struct cpumask *mask, > } > #endif > > +static void disable_sb1250_irq(struct irq_data *d) > +{ > + unsigned int irq = d->irq; > + > + sb1250_mask_irq(sb1250_irq_owner[irq], irq); > +} > + > static void enable_sb1250_irq(struct irq_data *d) > { > unsigned int irq = d->irq; > @@ -180,6 +187,7 @@ static struct irq_chip sb1250_irq_type = { > .name = "SB1250-IMR", > .irq_mask_ack = ack_sb1250_irq, > .irq_unmask = enable_sb1250_irq, > + .irq_mask = disable_sb1250_irq, > #ifdef CONFIG_SMP > .irq_set_affinity = sb1250_set_affinity > #endif Yep, this fixes it. Have a Tested-by: Matt Turner Thanks! Matt From hauke@hauke-m.de Mon Jun 6 23:39:02 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 23:39:05 +0200 (CEST) Received: from server19320154104.serverpool.info ([193.201.54.104]:45177 "EHLO hauke-m.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491783Ab1FFVjC (ORCPT ); Mon, 6 Jun 2011 23:39:02 +0200 Received: from localhost (localhost [127.0.0.1]) by hauke-m.de (Postfix) with ESMTP id 6BB218B0D; Mon, 6 Jun 2011 23:39:00 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at hauke-m.de Received: from hauke-m.de ([127.0.0.1]) by localhost (hauke-m.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id nlt3emItTxkE; Mon, 6 Jun 2011 23:38:52 +0200 (CEST) Received: from [192.168.0.151] (host-091-097-241-128.ewe-ip-backbone.de [91.97.241.128]) by hauke-m.de (Postfix) with ESMTPSA id A9C9F8B06; Mon, 6 Jun 2011 23:38:51 +0200 (CEST) Message-ID: <4DED48EA.7070001@hauke-m.de> Date: Mon, 06 Jun 2011 23:38:50 +0200 From: Hauke Mehrtens User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.17) Gecko/20110424 Lightning/1.0b2 Thunderbird/3.1.10 MIME-Version: 1.0 To: Arnd Bergmann CC: George Kashperko , =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= , Greg KH , linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com Subject: Re: [RFC][PATCH 01/10] bcma: Use array to store cores. References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <201106061332.51661.arnd@arndb.de> <1307363399.28734.25.camel@dev.znau.edu.ua> <201106061503.14852.arnd@arndb.de> In-Reply-To: <201106061503.14852.arnd@arndb.de> X-Enigmail-Version: 1.1.2 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-archive-position: 30267 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hauke@hauke-m.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4915 Content-Length: 2250 Lines: 43 On 06/06/2011 03:03 PM, Arnd Bergmann wrote: > On Monday 06 June 2011, George Kashperko wrote: >>> For an interrupt controller, it should be ok to have it initialized >>> late, as long as it's only responsible for the devices on the same >>> bus and not for instance for IPI interrupts. Just make sure that you >>> do the bus scan and the initialization of the IRQ driver before you >>> initialize any drivers that rely in on the interrupts to be working. >> >> Without proper timer init (which requires both the chipcommon and mips >> cores knowledge) kernel will get hung somewhere inside calibrate_delay. >> It could get addressed if get bus scan called in arch_init_irq or >> plat_time_init - both are executed before calibrate_delay and with slab >> available. > > Ok, so you need the interrupt controller to be working for the timer tick, > right? I think another option (if that's not what you mean already) would > be to have a simpler way to find a device on the bus that can be called > before doing a full scan. > > Early drivers would then have to know what is there and call a function > like "bcma_find_device(BCMA_DEV_ID_IRQ)", while drivers that are not > required to be up just register a regular device driver with a probe > function that gets called after the bus scan creates device structures. > > Arnd Accessing chip common should be possible without scanning the hole bus as it is at the first position and initializing most things just needs chip common. For initializing the interrupts scanning is needed as we do not know where the mips core is located. As we can not use kalloc on early boot we could use a function which uses kalloc under normal conditions and when on early boot the architecture code which starts the bcma code should also provide a function which returns a pointer to some memory in its text segment to use. We need space for 16 cores in the architecture code. In addition bcma_bus_register(struct bcma_bus *bus) has to be divided into two parts. The first part will scan the bus and initialize chip common and mips core. The second part will initialize pci core and register the devices in the system. When using this under normal conditions they will be called directly after each other. Hauke From hauke@hauke-m.de Mon Jun 6 23:40:15 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 23:40:18 +0200 (CEST) Received: from server19320154104.serverpool.info ([193.201.54.104]:45213 "EHLO hauke-m.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491783Ab1FFVkP (ORCPT ); Mon, 6 Jun 2011 23:40:15 +0200 Received: from localhost (localhost [127.0.0.1]) by hauke-m.de (Postfix) with ESMTP id 3E4138B0D; Mon, 6 Jun 2011 23:40:15 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at hauke-m.de Received: from hauke-m.de ([127.0.0.1]) by localhost (hauke-m.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id EVH7YEnh1K8J; Mon, 6 Jun 2011 23:40:11 +0200 (CEST) Received: from [192.168.0.151] (host-091-097-241-128.ewe-ip-backbone.de [91.97.241.128]) by hauke-m.de (Postfix) with ESMTPSA id 0C8868B06; Mon, 6 Jun 2011 23:40:10 +0200 (CEST) Message-ID: <4DED493A.8050209@hauke-m.de> Date: Mon, 06 Jun 2011 23:40:10 +0200 From: Hauke Mehrtens User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.17) Gecko/20110424 Lightning/1.0b2 Thunderbird/3.1.10 MIME-Version: 1.0 To: Julian Calaby CC: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, zajec5@gmail.com, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com Subject: Re: [RFC][PATCH 03/10] bcma: add embedded bus References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-4-git-send-email-hauke@hauke-m.de> In-Reply-To: X-Enigmail-Version: 1.1.2 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-archive-position: 30268 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hauke@hauke-m.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4917 Content-Length: 1870 Lines: 46 On 06/06/2011 01:22 AM, Julian Calaby wrote: > Hauke, > > Minor nit: > > On Mon, Jun 6, 2011 at 08:07, Hauke Mehrtens wrote: >> This patch adds support for using bcma on an embedded bus. An embedded >> system like the bcm4716 could register this bus and it searches for the >> bcma cores then. >> >> Signed-off-by: Hauke Mehrtens >> --- >> diff --git a/drivers/bcma/scan.c b/drivers/bcma/scan.c >> index 70b39f7..9229615 100644 >> --- a/drivers/bcma/scan.c >> +++ b/drivers/bcma/scan.c >> @@ -219,9 +219,34 @@ int bcma_bus_scan(struct bcma_bus *bus) >> bus->chipinfo.id = (tmp & BCMA_CC_ID_ID) >> BCMA_CC_ID_ID_SHIFT; >> bus->chipinfo.rev = (tmp & BCMA_CC_ID_REV) >> BCMA_CC_ID_REV_SHIFT; >> bus->chipinfo.pkg = (tmp & BCMA_CC_ID_PKG) >> BCMA_CC_ID_PKG_SHIFT; >> + bus->nr_cores = (tmp & BCMA_CC_ID_NRCORES) >> BCMA_CC_ID_NRCORES_SHIFT; >> + >> + /* If we are an embedded device we now know the number of avaliable >> + * core and ioremap the correct space. >> + */ >> + if (bus->hosttype == BCMA_HOSTTYPE_EMBEDDED) { >> + iounmap(bus->mmio); >> + mmio = ioremap(BCMA_ADDR_BASE, BCMA_CORE_SIZE * bus->nr_cores); >> + if (!mmio) >> + return -ENOMEM; >> + bus->mmio = mmio; >> + >> + mmio = ioremap(BCMA_WRAP_BASE, BCMA_CORE_SIZE * bus->nr_cores); >> + if (!mmio) >> + return -ENOMEM; >> + bus->host_embedded = mmio; >> + } >> + /* reset it to 0 as we use it for counting */ >> + bus->nr_cores = 0; > > Would it make sense to use a local variable for nr_cores, and only use > it within the BCMA_HOSTTYPE_EMBEDDED if statement, rather than > re-using bus->nr_cores and having to reset it? Yes that looks better. Hauke From jayachandranc@netlogicmicro.com Mon Jun 6 23:43:18 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 23:43:24 +0200 (CEST) Received: from mx1.netlogicmicro.com ([12.203.210.36]:3060 "EHLO orion5.netlogicmicro.com" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491783Ab1FFVnS (ORCPT ); Mon, 6 Jun 2011 23:43:18 +0200 X-TM-IMSS-Message-ID: Received: from orion8.netlogicmicro.com ([10.10.16.60]) by netlogicmicro.com ([10.10.16.19]) with ESMTP (TREND IMSS SMTP Service 7.0) id ccf2e5e400085af2 ; Mon, 6 Jun 2011 14:42:25 -0700 Received: from jayachandranc.netlogicmicro.com ([10.7.0.77]) by orion8.netlogicmicro.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 6 Jun 2011 14:44:16 -0700 Date: Tue, 7 Jun 2011 03:14:12 +0530 From: Jayachandran C To: ralf@linux-mips.org, linux-mips@linux-mips.org Subject: [PATCH] MIPS: Netlogic: SMP fixes for XLR/XLS platform code. Message-ID: <20110606214406.GA17399@jayachandranc.netlogicmicro.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) X-OriginalArrivalTime: 06 Jun 2011 21:44:16.0307 (UTC) FILETIME=[E20A9030:01CC2492] X-archive-position: 30269 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jayachandranc@netlogicmicro.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4923 Content-Length: 1747 Lines: 58 Fix few issues in the Netlogic code: - Use handle_percpu_irq to handle per-cpu interrupts - Remove unused function nlm_common_ipi_handler() - Call scheduler_ipi() on SMP_RESCHEDULE_YOURSELF - Enable interrupts in nlm_smp_finish() Signed-off-by: Jayachandran C --- arch/mips/netlogic/xlr/irq.c | 2 +- arch/mips/netlogic/xlr/smp.c | 13 ++----------- 2 files changed, 3 insertions(+), 12 deletions(-) diff --git a/arch/mips/netlogic/xlr/irq.c b/arch/mips/netlogic/xlr/irq.c index 1446d58..521bb73 100644 --- a/arch/mips/netlogic/xlr/irq.c +++ b/arch/mips/netlogic/xlr/irq.c @@ -209,7 +209,7 @@ void __init init_xlr_irqs(void) irq_set_chip_and_handler(i, &xlr_pic, handle_level_irq); else irq_set_chip_and_handler(i, &nlm_cpu_intr, - handle_level_irq); + handle_percpu_irq); } #ifdef CONFIG_SMP irq_set_chip_and_handler(IRQ_IPI_SMP_FUNCTION, &nlm_cpu_intr, diff --git a/arch/mips/netlogic/xlr/smp.c b/arch/mips/netlogic/xlr/smp.c index b495a7f..d842bce 100644 --- a/arch/mips/netlogic/xlr/smp.c +++ b/arch/mips/netlogic/xlr/smp.c @@ -87,17 +87,7 @@ void nlm_smp_function_ipi_handler(unsigned int irq, struct irq_desc *desc) /* IRQ_IPI_SMP_RESCHEDULE handler */ void nlm_smp_resched_ipi_handler(unsigned int irq, struct irq_desc *desc) { - set_need_resched(); -} - -void nlm_common_ipi_handler(int irq, struct pt_regs *regs) -{ - if (irq == IRQ_IPI_SMP_FUNCTION) { - smp_call_function_interrupt(); - } else { - /* Announce that we are for reschduling */ - set_need_resched(); - } + scheduler_ipi(); } /* @@ -122,6 +112,7 @@ void nlm_smp_finish(void) #ifdef notyet nlm_common_msgring_cpu_init(); #endif + local_irq_enable(); } void nlm_cpus_done(void) -- 1.7.4.1 From arnd@arndb.de Mon Jun 6 23:53:52 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jun 2011 23:53:55 +0200 (CEST) Received: from moutng.kundenserver.de ([212.227.126.171]:63928 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491874Ab1FFVxw (ORCPT ); Mon, 6 Jun 2011 23:53:52 +0200 Received: from wuerfel.localnet (port-92-200-26-47.dynamic.qsc.de [92.200.26.47]) by mrelayeu.kundenserver.de (node=mrbap4) with ESMTP (Nemesis) id 0MV56z-1Q46NG1kNx-00YPGb; Mon, 06 Jun 2011 23:53:43 +0200 From: Arnd Bergmann To: Hauke Mehrtens Subject: Re: [RFC][PATCH 01/10] bcma: Use array to store cores. Date: Mon, 6 Jun 2011 23:53:40 +0200 User-Agent: KMail/1.13.6 (Linux/3.0.0-rc1nosema+; KDE/4.6.3; x86_64; ; ) Cc: George Kashperko , =?utf-8?q?Rafa=C5=82_Mi=C5=82ecki?= , Greg KH , linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <201106061503.14852.arnd@arndb.de> <4DED48EA.7070001@hauke-m.de> In-Reply-To: <4DED48EA.7070001@hauke-m.de> MIME-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201106062353.40470.arnd@arndb.de> X-Provags-ID: V02:K0:tHivx7LtVs8emXQL2MUS+9bsoAzuQZbAI8CDWR8uUKw HlfjVsd1UWQcpJ6PxJksfx3r4mZIPQD0uFdEZl+mWksoyx1RHs J8adhLV/c1Wg2U47ZCTekQIDvXdgi4i7xN2yEJEOkRXcvwAVXp GVZKZJvtIRiXeeUXEKUdzguIzN9ZttaaebPcleFD16l/jjpvfb nevVRY0Crjv6QFdxzy7+Q== X-archive-position: 30270 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: arnd@arndb.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4943 Content-Length: 1346 Lines: 26 On Monday 06 June 2011 23:38:50 Hauke Mehrtens wrote: > Accessing chip common should be possible without scanning the hole bus > as it is at the first position and initializing most things just needs > chip common. For initializing the interrupts scanning is needed as we do > not know where the mips core is located. > > As we can not use kalloc on early boot we could use a function which > uses kalloc under normal conditions and when on early boot the > architecture code which starts the bcma code should also provide a > function which returns a pointer to some memory in its text segment to > use. We need space for 16 cores in the architecture code. > > In addition bcma_bus_register(struct bcma_bus *bus) has to be divided > into two parts. The first part will scan the bus and initialize chip > common and mips core. The second part will initialize pci core and > register the devices in the system. When using this under normal > conditions they will be called directly after each other. Just split out the minimal low-level function from the bcma_bus_scan then, to locate a single device based on some identifier. The bcma_bus_scan() function can then repeatedly allocate one device and pass it to the low-level function when doing the proper scan, while the arch code calls the low-level function directly with static data. Arnd From hauke@hauke-m.de Tue Jun 7 00:00:19 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 07 Jun 2011 00:00:22 +0200 (CEST) Received: from server19320154104.serverpool.info ([193.201.54.104]:54548 "EHLO hauke-m.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491783Ab1FFWAT (ORCPT ); Tue, 7 Jun 2011 00:00:19 +0200 Received: from localhost (localhost [127.0.0.1]) by hauke-m.de (Postfix) with ESMTP id D49FC8B0D; Tue, 7 Jun 2011 00:00:18 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at hauke-m.de Received: from hauke-m.de ([127.0.0.1]) by localhost (hauke-m.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 8DHyZtWoaHWU; Tue, 7 Jun 2011 00:00:13 +0200 (CEST) Received: from [192.168.0.151] (host-091-097-241-128.ewe-ip-backbone.de [91.97.241.128]) by hauke-m.de (Postfix) with ESMTPSA id 783C88B06; Tue, 7 Jun 2011 00:00:12 +0200 (CEST) Message-ID: <4DED4DEB.5030802@hauke-m.de> Date: Tue, 07 Jun 2011 00:00:11 +0200 From: Hauke Mehrtens User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.17) Gecko/20110424 Lightning/1.0b2 Thunderbird/3.1.10 MIME-Version: 1.0 To: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= CC: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com Subject: Re: [RFC][PATCH 03/10] bcma: add embedded bus References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-4-git-send-email-hauke@hauke-m.de> In-Reply-To: X-Enigmail-Version: 1.1.2 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-archive-position: 30271 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hauke@hauke-m.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4951 Content-Length: 4687 Lines: 145 On 06/06/2011 12:22 PM, Rafał Miłecki wrote: > Hauke, > > My idea for naming schema was to use: > bcma_host_TYPE_* > > Like: > bcma_host_pci_* > bcma_host_sdio_* > > You are using: > bcma_host_bcma_* > > What do you think about changing this to: > bcma_host_embedded_* > or just some: > bcma_host_emb_* > ? > > Does it make more sense to you? I was trying to keep names in bcma > really clear, so every first-time-reader can see differences between > hosts, host and driver, etc. > At first I named it bcma_host_bcma_ but then renamed the file name, but forgot the function names. I will rename it all to bcma_host_soc_* host_sco.c and so on. > 2011/6/6 Hauke Mehrtens : >> --- /dev/null >> +++ b/drivers/bcma/host_embedded.c >> @@ -0,0 +1,93 @@ >> +/* >> + * Broadcom specific AMBA >> + * PCI Host > > s/PCI/Embedded/ > > >> +int bcma_host_bcma_register(struct bcma_bus *bus) >> +{ >> + u32 __iomem *mmio; >> + /* iomap only first core. We have to read some register on this core >> + * to get the number of cores. This is sone in bcma_scan() >> + */ >> + mmio = ioremap(BCMA_ADDR_BASE, BCMA_CORE_SIZE * 1); >> + if (!mmio) >> + return -ENOMEM; >> + bus->mmio = mmio; > > Maybe just: > bus->mmio = ioremap(...); > ? :) yes makes sens. > >> + /* Host specific */ >> + bus->hosttype = BCMA_HOSTTYPE_EMBEDDED; >> + bus->ops = &bcma_host_bcma_ops; >> + >> + /* Register */ >> + return bcma_bus_register(bus); >> +} >> diff --git a/drivers/bcma/main.c b/drivers/bcma/main.c >> index 1afa107..c5bcb5f 100644 >> --- a/drivers/bcma/main.c >> +++ b/drivers/bcma/main.c >> @@ -119,6 +119,7 @@ static int bcma_register_cores(struct bcma_bus *bus) >> break; >> case BCMA_HOSTTYPE_NONE: >> case BCMA_HOSTTYPE_SDIO: >> + case BCMA_HOSTTYPE_EMBEDDED: >> break; >> } >> >> diff --git a/drivers/bcma/scan.c b/drivers/bcma/scan.c >> index 70b39f7..9229615 100644 >> --- a/drivers/bcma/scan.c >> +++ b/drivers/bcma/scan.c >> @@ -203,7 +203,7 @@ static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 **eromptr, >> int bcma_bus_scan(struct bcma_bus *bus) >> { >> u32 erombase; >> - u32 __iomem *eromptr, *eromend; >> + u32 __iomem *eromptr, *eromend, *mmio; >> >> s32 cia, cib; >> u8 ports[2], wrappers[2]; >> @@ -219,9 +219,34 @@ int bcma_bus_scan(struct bcma_bus *bus) >> bus->chipinfo.id = (tmp & BCMA_CC_ID_ID) >> BCMA_CC_ID_ID_SHIFT; >> bus->chipinfo.rev = (tmp & BCMA_CC_ID_REV) >> BCMA_CC_ID_REV_SHIFT; >> bus->chipinfo.pkg = (tmp & BCMA_CC_ID_PKG) >> BCMA_CC_ID_PKG_SHIFT; >> + bus->nr_cores = (tmp & BCMA_CC_ID_NRCORES) >> BCMA_CC_ID_NRCORES_SHIFT; > > I'd use different variable as Julian suggested. yes > > >> + >> + /* If we are an embedded device we now know the number of avaliable >> + * core and ioremap the correct space. >> + */ > > Typo: avaliable my favorite typo ;-) > > >> + if (bus->hosttype == BCMA_HOSTTYPE_EMBEDDED) { >> + iounmap(bus->mmio); >> + mmio = ioremap(BCMA_ADDR_BASE, BCMA_CORE_SIZE * bus->nr_cores); >> + if (!mmio) >> + return -ENOMEM; >> + bus->mmio = mmio; >> + >> + mmio = ioremap(BCMA_WRAP_BASE, BCMA_CORE_SIZE * bus->nr_cores); >> + if (!mmio) >> + return -ENOMEM; >> + bus->host_embedded = mmio; > > Do we really need both? mmio and host_embedded? What about keeping > mmio only and using it in calculation for read/write[8,16,32]? These are two different memory regions, it should be possible to calculate the other address, but I do not like that. As host_embedded is in a union this does not waste any memory. > >> + } >> + /* reset it to 0 as we use it for counting */ >> + bus->nr_cores = 0; >> >> erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM); >> - eromptr = bus->mmio; >> + if (bus->hosttype == BCMA_HOSTTYPE_EMBEDDED) { >> + eromptr = ioremap(erombase, BCMA_CORE_SIZE); >> + if (!eromptr) >> + return -ENOMEM; >> + } else >> + eromptr = bus->mmio; > > I though eromptr = bus->mmio; will do the trick for embedded as well. > I think I need some time to read about IO mapping and understand that. > No they are different eromptr is 0x1810e000 and bus->mmio is 0xb8000000 for example on my device. I tried using eromptr = bus->mmio; on embedded and it did not work. Hauke From hauke@hauke-m.de Tue Jun 7 00:06:44 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 07 Jun 2011 00:06:47 +0200 (CEST) Received: from server19320154104.serverpool.info ([193.201.54.104]:49795 "EHLO hauke-m.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491783Ab1FFWGo (ORCPT ); Tue, 7 Jun 2011 00:06:44 +0200 Received: from localhost (localhost [127.0.0.1]) by hauke-m.de (Postfix) with ESMTP id 4CE698B0D; Tue, 7 Jun 2011 00:06:42 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at hauke-m.de Received: from hauke-m.de ([127.0.0.1]) by localhost (hauke-m.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 3MUsyNgb5YJm; Tue, 7 Jun 2011 00:06:38 +0200 (CEST) Received: from [192.168.0.151] (host-091-097-241-128.ewe-ip-backbone.de [91.97.241.128]) by hauke-m.de (Postfix) with ESMTPSA id B263E8B06; Tue, 7 Jun 2011 00:06:37 +0200 (CEST) Message-ID: <4DED4F6C.5030902@hauke-m.de> Date: Tue, 07 Jun 2011 00:06:36 +0200 From: Hauke Mehrtens User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.17) Gecko/20110424 Lightning/1.0b2 Thunderbird/3.1.10 MIME-Version: 1.0 To: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= CC: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com Subject: Re: [RFC][PATCH 04/10] bcma: add mips driver References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-5-git-send-email-hauke@hauke-m.de> In-Reply-To: X-Enigmail-Version: 1.1.2 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-archive-position: 30272 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hauke@hauke-m.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4958 Content-Length: 2055 Lines: 65 On 06/06/2011 01:23 PM, Rafał Miłecki wrote: > 2011/6/6 Hauke Mehrtens : >> +/* driver_mips.c */ >> +extern unsigned int bcma_core_mips_irq(struct bcma_device *dev); > > Does it compile without CONFIG_BCMA_DRIVER_MIPS? No ;-) Thought about it after sending these patches, some other patches will have the same problem. > > >> +/* Get the MIPS IRQ assignment for a specified device. >> + * If unassigned, 0 is returned. >> + * If disabled, 5 is returned. >> + * If not supported, 6 is returned. >> + */ > > Does it ever return 6? Some old comment, will fix this. > >> +unsigned int bcma_core_mips_irq(struct bcma_device *dev) >> +{ >> + struct bcma_device *mdev = dev->bus->drv_mips.core; >> + u32 irqflag; >> + unsigned int irq; >> + >> + irqflag = bcma_core_mips_irqflag(dev); >> + >> + for (irq = 1; irq <= 4; irq++) >> + if (bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq)) & (1 << irqflag)) >> + break; > > Use scripts/checkpatch*. Braces around "for" and split line to match > 80 chars width. Will check all patches with scripts/checkpatch.sh > > Why don't you just use "return irq;" instead of break? yes this will be better. > > >> + >> + if (irq == 5) >> + irq = 0; >> + >> + return irq; > > You can just make it "return 0;" after changing break to return. agree > > >> + for (i = 0; i < bus->nr_cores; i++) >> + if ((1 << bcma_core_mips_irqflag(&bus->cores[i])) == oldirqflag) { >> + bcma_core_mips_set_irq(&bus->cores[i], 0); >> + break; >> + } > > Braces for "for". Is this needed after the coding guildlines? Shouldn't they be removed if they are not needed? > >> + pr_info("after irq reconfiguration\n"); > > Make first letter uppercase. I'm not English expert, but doesn't > something like "IRQ reconfiguration done" sound better? > Sounds better. From hauke@hauke-m.de Tue Jun 7 00:11:09 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 07 Jun 2011 00:11:13 +0200 (CEST) Received: from server19320154104.serverpool.info ([193.201.54.104]:56046 "EHLO hauke-m.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491783Ab1FFWLJ (ORCPT ); Tue, 7 Jun 2011 00:11:09 +0200 Received: from localhost (localhost [127.0.0.1]) by hauke-m.de (Postfix) with ESMTP id D895D8B0D; Tue, 7 Jun 2011 00:11:08 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at hauke-m.de Received: from hauke-m.de ([127.0.0.1]) by localhost (hauke-m.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Nv3zR++Py+4W; Tue, 7 Jun 2011 00:11:04 +0200 (CEST) Received: from [192.168.0.151] (host-091-097-241-128.ewe-ip-backbone.de [91.97.241.128]) by hauke-m.de (Postfix) with ESMTPSA id 17EE28B06; Tue, 7 Jun 2011 00:11:04 +0200 (CEST) Message-ID: <4DED5077.9040503@hauke-m.de> Date: Tue, 07 Jun 2011 00:11:03 +0200 From: Hauke Mehrtens User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.17) Gecko/20110424 Lightning/1.0b2 Thunderbird/3.1.10 MIME-Version: 1.0 To: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= CC: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com Subject: Re: [RFC][PATCH 07/10] bcma: add pci(e) host mode References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-8-git-send-email-hauke@hauke-m.de> In-Reply-To: X-Enigmail-Version: 1.1.2 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-archive-position: 30273 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hauke@hauke-m.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4967 Content-Length: 1659 Lines: 50 On 06/06/2011 01:32 PM, Rafał Miłecki wrote: > 2011/6/6 Hauke Mehrtens : >> +config BCMA_PCICORE_HOSTMODE >> + bool "Hostmode support for BCMA PCI core" >> + depends on BCMA_DRIVER_MIPS >> + help >> + PCIcore hostmode operation (external PCI bus). > > I think you started to use BCMA_DRIVER_corename. Could you stick to it > (one schema), please? Maybe just > BCMA_DRIVER_PCI_HOSTMODE > ? > Yes sounds better. > >> +#ifdef CONFIG_BCMA_PCICORE_HOSTMODE >> + pc->hostmode = bcma_pcicore_is_in_hostmode(pc); >> + if (pc->hostmode) >> + bcma_pcicore_init_hostmode(pc); >> +#endif /* CONFIG_BCMA_PCICORE_HOSTMODE */ >> + if (!pc->hostmode) >> + bcma_pcicore_serdes_workaround(pc); > > Does it make sense to init hostmode PCI like clientmode if we just > disable CONFIG_BCMA_PCICORE_HOSTMODE? > > I think we should always check if core is host or client mode and use > correct initialization only. We should not init it as clientmode just > because we do not have driver for host mode. Yes we should not initialize a host mode pci core with client init code as it will break my device. ;-) I will place bcma_pcicore_is_in_hostmode() into the normal PCI driver code so it is available all the time. > > >> diff --git a/drivers/bcma/driver_pci_host.c b/drivers/bcma/driver_pci_host.c >> new file mode 100644 >> index 0000000..b52c6c9 >> --- /dev/null >> +++ b/drivers/bcma/driver_pci_host.c >> @@ -0,0 +1,44 @@ >> +/* >> + * Broadcom specific AMBA >> + * PCI Core > > Please rename "PCI Core", add something about hostmode. > Missed that while copy and past. Hauke From hauke@hauke-m.de Tue Jun 7 00:13:06 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 07 Jun 2011 00:13:09 +0200 (CEST) Received: from server19320154104.serverpool.info ([193.201.54.104]:34873 "EHLO hauke-m.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491783Ab1FFWNG (ORCPT ); Tue, 7 Jun 2011 00:13:06 +0200 Received: from localhost (localhost [127.0.0.1]) by hauke-m.de (Postfix) with ESMTP id 301A48B0D; Tue, 7 Jun 2011 00:13:06 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at hauke-m.de Received: from hauke-m.de ([127.0.0.1]) by localhost (hauke-m.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id HnrYIMPV-YcU; Tue, 7 Jun 2011 00:13:01 +0200 (CEST) Received: from [192.168.0.151] (host-091-097-241-128.ewe-ip-backbone.de [91.97.241.128]) by hauke-m.de (Postfix) with ESMTPSA id 529948B06; Tue, 7 Jun 2011 00:13:01 +0200 (CEST) Message-ID: <4DED50EC.3040401@hauke-m.de> Date: Tue, 07 Jun 2011 00:13:00 +0200 From: Hauke Mehrtens User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.17) Gecko/20110424 Lightning/1.0b2 Thunderbird/3.1.10 MIME-Version: 1.0 To: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= CC: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com Subject: Re: [RFC][PATCH 09/10] bcm47xx: add support for bcma bus References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-10-git-send-email-hauke@hauke-m.de> In-Reply-To: X-Enigmail-Version: 1.1.2 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-archive-position: 30274 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hauke@hauke-m.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4968 Content-Length: 1787 Lines: 42 On 06/06/2011 01:07 PM, Rafał Miłecki wrote: > 2011/6/6 Hauke Mehrtens : >> This patch add support for the bcma bus. Broadcom uses only Mips 74K >> CPUs on the new SoC and on the old ons using ssb bus there are no Mips >> 74K CPUs. >> >> Signed-off-by: Hauke Mehrtens >> --- >> arch/mips/Kconfig | 4 +++ >> arch/mips/bcm47xx/gpio.c | 9 ++++++++ >> arch/mips/bcm47xx/nvram.c | 6 +++++ >> arch/mips/bcm47xx/serial.c | 24 +++++++++++++++++++++++ >> arch/mips/bcm47xx/setup.c | 27 ++++++++++++++++++++++++- >> arch/mips/bcm47xx/time.c | 3 ++ >> arch/mips/include/asm/mach-bcm47xx/bcm47xx.h | 3 ++ >> arch/mips/include/asm/mach-bcm47xx/gpio.h | 18 +++++++++++++++++ >> drivers/watchdog/bcm47xx_wdt.c | 6 +++++ >> 9 files changed, 98 insertions(+), 2 deletions(-) >> >> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig >> index 653da62..bdb0341 100644 >> --- a/arch/mips/Kconfig >> +++ b/arch/mips/Kconfig >> @@ -100,6 +100,10 @@ config BCM47XX >> select SSB_EMBEDDED >> select SSB_B43_PCI_BRIDGE if PCI >> select SSB_PCICORE_HOSTMODE if PCI >> + select BCMA >> + select BCMA_HOST_EMBEDDED >> + select BCMA_DRIVER_MIPS >> + select BCMA_PCICORE_HOSTMODE > > I'm not involved in development for embedded devices but I believe > that space is quite important for them. > > You force compiling both: ssb and bcma for every device using bcm47xx. > I think ppl may want to compile only one bus driver. > Yes that has to be improved as there should also be an option to use the compiler optimazions for the new MIPS 74K CPU core. Hauke From ralf@linux-mips.org Tue Jun 7 00:47:33 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 07 Jun 2011 00:47:35 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:37386 "EHLO duck.linux-mips.net" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491875Ab1FFWrd (ORCPT ); Tue, 7 Jun 2011 00:47:33 +0200 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.3) with ESMTP id p56Mm37u009012; Mon, 6 Jun 2011 23:48:03 +0100 Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id p56Mm2TO009010; Mon, 6 Jun 2011 23:48:02 +0100 Date: Mon, 6 Jun 2011 23:48:02 +0100 From: Ralf Baechle To: Matt Turner Cc: Thomas Gleixner , linux-mips@linux-mips.org Subject: Re: Regression: d6d5d5c breaks Broadcom BCM91250A Message-ID: <20110606224802.GA7534@linux-mips.org> References: <20110606033608.GA14686@localhost.mattst88> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 30275 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5042 Content-Length: 31 Lines: 3 Thanks folks, applied! Ralf From zajec5@gmail.com Tue Jun 7 00:50:08 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 07 Jun 2011 00:50:11 +0200 (CEST) Received: from mail-qy0-f170.google.com ([209.85.216.170]:44196 "EHLO mail-qy0-f170.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491818Ab1FFWuI (ORCPT ); Tue, 7 Jun 2011 00:50:08 +0200 Received: by qyk32 with SMTP id 32so1220935qyk.15 for ; Mon, 06 Jun 2011 15:50:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=NOpL3XBkd9eFylF6C9pQ2DSfi05L5RhiVrAJRh++va4=; b=ryGwZjAn3oW9PXAAp23e3ERYI82avF4iVTfttJb6lUNOQi8dhCKIIv2UKS+6uSkct8 QdTziPR4yd69P3WnHS45rcHHpney4iyY9PAt9stKYdW0u0wRqrNd5b47r+0OeLhQ6UhT h4FVK/pM/NN3gcc3SA7WYuqDSJ6l4K3BYh0WY= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=qG0Ds1Da1L3olrLoKlA6UWATUBfbKEjo8D4kDkbpuBXszaOWOY3npTmC/alC5GTatP 2ZMFpenrpau1hjUmG3aeHs9r6QuVzF2qj1HNwacUu/cZi7AU8H5aamph5Ky15Lf9JFad DEMnwhgPYRmf3mghNzNpUXdE/40xG3Avh5z9s= MIME-Version: 1.0 Received: by 10.229.35.1 with SMTP id n1mr3987988qcd.84.1307400602716; Mon, 06 Jun 2011 15:50:02 -0700 (PDT) Received: by 10.229.96.21 with HTTP; Mon, 6 Jun 2011 15:50:02 -0700 (PDT) In-Reply-To: <4DED4F6C.5030902@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-5-git-send-email-hauke@hauke-m.de> <4DED4F6C.5030902@hauke-m.de> Date: Tue, 7 Jun 2011 00:50:02 +0200 Message-ID: Subject: Re: [RFC][PATCH 04/10] bcma: add mips driver From: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= To: Hauke Mehrtens Cc: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: base64 X-archive-position: 30276 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zajec5@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5047 Content-Length: 1018 Lines: 14 VyBkbml1IDcgY3plcndjYSAyMDExIDAwOjA2IHXFvHl0a293bmlrIEhhdWtlIE1laHJ0ZW5zCjxo YXVrZUBoYXVrZS1tLmRlPiBuYXBpc2HFgjoKPiBPbiAwNi8wNi8yMDExIDAxOjIzIFBNLCBSYWZh xYIgTWnFgmVja2kgd3JvdGU6Cj4+PiArIMKgIMKgIMKgIMKgIMKgIMKgIMKgIMKgIMKgIMKgIMKg IGZvciAoaSA9IDA7IGkgPCBidXMtPm5yX2NvcmVzOyBpKyspCj4+PiArIMKgIMKgIMKgIMKgIMKg IMKgIMKgIMKgIMKgIMKgIMKgIMKgIMKgIMKgIMKgIGlmICgoMSA8PCBiY21hX2NvcmVfbWlwc19p cnFmbGFnKCZidXMtPmNvcmVzW2ldKSkgPT0gb2xkaXJxZmxhZykgewo+Pj4gKyDCoCDCoCDCoCDC oCDCoCDCoCDCoCDCoCDCoCDCoCDCoCDCoCDCoCDCoCDCoCDCoCDCoCDCoCDCoCBiY21hX2NvcmVf bWlwc19zZXRfaXJxKCZidXMtPmNvcmVzW2ldLCAwKTsKPj4+ICsgwqAgwqAgwqAgwqAgwqAgwqAg wqAgwqAgwqAgwqAgwqAgwqAgwqAgwqAgwqAgwqAgwqAgwqAgwqAgYnJlYWs7Cj4+PiArIMKgIMKg IMKgIMKgIMKgIMKgIMKgIMKgIMKgIMKgIMKgIMKgIMKgIMKgIMKgIH0KPj4KPj4gQnJhY2VzIGZv ciAiZm9yIi4KPiBJcyB0aGlzIG5lZWRlZCBhZnRlciB0aGUgY29kaW5nIGd1aWxkbGluZXM/IFNo b3VsZG4ndCB0aGV5IGJlIHJlbW92ZWQgaWYKPiB0aGV5IGFyZSBub3QgbmVlZGVkPwoKV2hvb3Bz LCBhZnRlciByZS1jaGVja2luZyBjb2Rpbmcgc3R5bGUgaXQgc2VlbXMgSSB3YXMgd3JvbmcuCgot LSAKUmFmYcWCCg== From ralf@linux-mips.org Tue Jun 7 02:06:40 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 07 Jun 2011 02:06:45 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:42285 "EHLO duck.linux-mips.net" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491818Ab1FGAGk (ORCPT ); Tue, 7 Jun 2011 02:06:40 +0200 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.3) with ESMTP id p5707EaV015892; Tue, 7 Jun 2011 01:07:14 +0100 Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id p5707Eje015889; Tue, 7 Jun 2011 01:07:14 +0100 Date: Tue, 7 Jun 2011 01:07:14 +0100 From: Ralf Baechle To: Jayachandran C Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] MIPS: Netlogic: SMP fixes for XLR/XLS platform code. Message-ID: <20110607000714.GA15850@linux-mips.org> References: <20110606214406.GA17399@jayachandranc.netlogicmicro.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20110606214406.GA17399@jayachandranc.netlogicmicro.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 30277 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5096 Content-Length: 90 Lines: 5 On Tue, Jun 07, 2011 at 03:14:12AM +0530, Jayachandran C wrote: Thanks, applied. Ralf From zajec5@gmail.com Tue Jun 7 02:33:36 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 07 Jun 2011 02:33:39 +0200 (CEST) Received: from mail-qy0-f170.google.com ([209.85.216.170]:35711 "EHLO mail-qy0-f170.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491205Ab1FGAdg convert rfc822-to-8bit (ORCPT ); Tue, 7 Jun 2011 02:33:36 +0200 Received: by qyk32 with SMTP id 32so1255529qyk.15 for ; Mon, 06 Jun 2011 17:33:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=yQaVeiIQ2OTvo6a/Pvt8Kln5IyvOPhEZ9k9hvEXnHKs=; b=lWrNrhJXomx1ZwTdNijBGzEC9urWli0cKwtKBos8jo3Vm0W+xe9I8fdDoxWEmTFhJt XNsDu33vXrE3eGsBgKhlfFvjLnb16gobPo0Hdj6fIAA2JvCU0GaV/kXgO56aNf+mTC2/ tzIgnaDAICdT+J8u1CRu59zmHHKFos5U53VJg= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=OGzON2vDgKpMGx/B8sXjRBGUJQVXWd1WKMAv2lPItAolAz3qrpDXqCqSdAz2fxakTF xwPIk72ROVriY0dUL4mG6MhSg/HiNEdsij/f/CqHT1NNfyuQSDpAUSW/DZxX1LivdPru aq8B1k/3WMk2ElS7RZIByBJ8SkscBtaFdKTuI= MIME-Version: 1.0 Received: by 10.229.118.69 with SMTP id u5mr4018492qcq.122.1307406808686; Mon, 06 Jun 2011 17:33:28 -0700 (PDT) Received: by 10.229.96.21 with HTTP; Mon, 6 Jun 2011 17:33:28 -0700 (PDT) In-Reply-To: <4DED4DEB.5030802@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-4-git-send-email-hauke@hauke-m.de> <4DED4DEB.5030802@hauke-m.de> Date: Tue, 7 Jun 2011 02:33:28 +0200 Message-ID: Subject: Re: [RFC][PATCH 03/10] bcma: add embedded bus From: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= To: Hauke Mehrtens Cc: linux-wireless@vger.kernel.org, linux-mips@linux-mips.org, mb@bu3sch.de, george@znau.edu.ua, arend@broadcom.com, b43-dev@lists.infradead.org, bernhardloos@googlemail.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-archive-position: 30278 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zajec5@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5109 Content-Length: 1669 Lines: 40 W dniu 7 czerwca 2011 00:00 użytkownik Hauke Mehrtens napisał: > On 06/06/2011 12:22 PM, Rafał Miłecki wrote: >>> +       if (bus->hosttype == BCMA_HOSTTYPE_EMBEDDED) { >>> +               iounmap(bus->mmio); >>> +               mmio = ioremap(BCMA_ADDR_BASE, BCMA_CORE_SIZE * bus->nr_cores); >>> +               if (!mmio) >>> +                       return -ENOMEM; >>> +               bus->mmio = mmio; >>> + >>> +               mmio = ioremap(BCMA_WRAP_BASE, BCMA_CORE_SIZE * bus->nr_cores); >>> +               if (!mmio) >>> +                       return -ENOMEM; >>> +               bus->host_embedded = mmio; >> >> Do we really need both? mmio and host_embedded? What about keeping >> mmio only and using it in calculation for read/write[8,16,32]? > > These are two different memory regions, it should be possible to > calculate the other address, but I do not like that. As host_embedded is > in a union this does not waste any memory. Ah, OK, I can see what does happen here. You are using: 1) bus->mmio for first core 2) bus->host_embedded for first agent/wrapper I'm not sure if this is a correct approach. Doing "core_index * BCMA_CORE_SIZE" comes from ssb, where it was the way to calculate offset. In case of BCMA we are reading all the info from (E)EPROM, which also includes addresses of the cores. IMO you should use core->addr and core->wrap for read/write ops. I believe this is approach Broadcom decided to use for BCMA, when designing (E)EPROM. You should not need bus->host_embedded then, maybe you could even do not set bus->mmio? -- Rafał From jamie@jamieiles.com Tue Jun 7 11:58:57 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 07 Jun 2011 11:59:00 +0200 (CEST) Received: from mail-ww0-f43.google.com ([74.125.82.43]:48425 "EHLO mail-ww0-f43.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491030Ab1FGJ65 (ORCPT ); Tue, 7 Jun 2011 11:58:57 +0200 Received: by wwb17 with SMTP id 17so3968604wwb.24 for ; Tue, 07 Jun 2011 02:58:52 -0700 (PDT) Received: by 10.216.67.199 with SMTP id j49mr3570593wed.59.1307440731821; Tue, 07 Jun 2011 02:58:51 -0700 (PDT) Received: from localhost (gw-ba1.picochip.com [94.175.234.108]) by mx.google.com with ESMTPS id z66sm2769118weq.0.2011.06.07.02.58.49 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 07 Jun 2011 02:58:49 -0700 (PDT) Date: Tue, 7 Jun 2011 10:58:47 +0100 From: Jamie Iles To: Florian Fainelli Cc: Wim Van Sebroeck , linux-mips@linux-mips.org, linux-watchdog@vger.kernel.org, Manuel Lauss , stable@kernel.org Subject: Re: [PATCH 2/3] WATCHDOG: mtx1-wdt: request gpio before using it Message-ID: <20110607095847.GB21174@pulham.picochip.com> References: <201106021454.20111.florian@openwrt.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <201106021454.20111.florian@openwrt.org> User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 30279 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jamie@jamieiles.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5371 Content-Length: 909 Lines: 28 On Thu, Jun 02, 2011 at 02:54:20PM +0200, Florian Fainelli wrote: > Otherwise, the gpiolib autorequest feature will produce a WARN_ON(): > > WARNING: at drivers/gpio/gpiolib.c:101 0x8020ec6c() > autorequest GPIO-215 > [...] > > CC: stable@kernel.org > Signed-off-by: Florian Fainelli > --- > diff --git a/drivers/watchdog/mtx-1_wdt.c b/drivers/watchdog/mtx-1_wdt.c > index 63df28c..16086f8 100644 > --- a/drivers/watchdog/mtx-1_wdt.c > +++ b/drivers/watchdog/mtx-1_wdt.c > @@ -214,6 +214,11 @@ static int __devinit mtx1_wdt_probe(struct platform_device *pdev) > int ret; > > mtx1_wdt_device.gpio = pdev->resource[0].start; > + ret = gpio_request(mtx1_wdt_device.gpio, "mtx1-wdt"); > + if (ret < 0) { > + dev_err(&pdev->dev, "failed to request gpio"); > + return ret; > + } Could you use gpio_request_one() here to make sure the GPIO is in the correct direction first? Jamie From jamie@jamieiles.com Tue Jun 7 11:59:42 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 07 Jun 2011 11:59:44 +0200 (CEST) Received: from mail-ww0-f43.google.com ([74.125.82.43]:47517 "EHLO mail-ww0-f43.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491030Ab1FGJ7m (ORCPT ); Tue, 7 Jun 2011 11:59:42 +0200 Received: by wwb17 with SMTP id 17so3969157wwb.24 for ; Tue, 07 Jun 2011 02:59:36 -0700 (PDT) Received: by 10.217.7.71 with SMTP id z49mr3891208wes.33.1307440776545; Tue, 07 Jun 2011 02:59:36 -0700 (PDT) Received: from localhost (gw-ba1.picochip.com [94.175.234.108]) by mx.google.com with ESMTPS id p21sm3425348wbh.57.2011.06.07.02.59.33 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 07 Jun 2011 02:59:34 -0700 (PDT) Date: Tue, 7 Jun 2011 10:59:32 +0100 From: Jamie Iles To: Florian Fainelli Cc: Wim Van Sebroeck , linux-mips@linux-mips.org, linux-watchdog@vger.kernel.org, Manuel Lauss , stable@kernel.org Subject: Re: [PATCH 3/3] WATCHDOG: mtx1-wdt: fix GPIO toggling Message-ID: <20110607095932.GC21174@pulham.picochip.com> References: <201106021454.21827.florian@openwrt.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <201106021454.21827.florian@openwrt.org> User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 30280 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jamie@jamieiles.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5372 Content-Length: 1846 Lines: 45 On Thu, Jun 02, 2011 at 02:54:21PM +0200, Florian Fainelli wrote: > Commit e391be76 (MIPS: Alchemy: Clean up GPIO registers and accessors) > changed the way the GPIO was toggled. Prior to this patch, we would > always actively drive the GPIO output to either 0 or 1, this patch > drove the GPIO active to 0, and put the GPIO in tristate to drive it > to 1, unfortunately this does not work, revert back to active driving. > > Using a signed variable (gstate) to hold the gpio state and using a bit- > wise operation on it also resulted in toggling value from 1 to -2 since > the variable is signed. This value was then passed on to gpio_direction_ > output, which always perform a if (value) ... to set the value to the > gpio, so we were always writing a 1 to this GPIO instead of 1 -> 0 -> 1 ... > > CC: stable@kernel.org > Signed-off-by: Florian Fainelli > --- > diff --git a/drivers/watchdog/mtx-1_wdt.c b/drivers/watchdog/mtx-1_wdt.c > index 16086f8..9756da9 100644 > --- a/drivers/watchdog/mtx-1_wdt.c > +++ b/drivers/watchdog/mtx-1_wdt.c > @@ -66,7 +66,7 @@ static struct { > int default_ticks; > unsigned long inuse; > unsigned gpio; > - int gstate; > + unsigned int gstate; > } mtx1_wdt_device; > > static void mtx1_wdt_trigger(unsigned long unused) > @@ -78,11 +78,8 @@ static void mtx1_wdt_trigger(unsigned long unused) > ticks--; > > /* toggle wdt gpio */ > - mtx1_wdt_device.gstate = ~mtx1_wdt_device.gstate; > - if (mtx1_wdt_device.gstate) > - gpio_direction_output(mtx1_wdt_device.gpio, 1); > - else > - gpio_direction_input(mtx1_wdt_device.gpio); > + mtx1_wdt_device.gstate = !mtx1_wdt_device.gstate; > + gpio_direction_output(mtx1_wdt_device.gpio, mtx1_wdt_device.gstate); Would gpio_set_value() be more appropriate here? Isn't the gpio always an output after the first call? Jamie From arend@broadcom.com Tue Jun 7 12:12:54 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 07 Jun 2011 12:12:58 +0200 (CEST) Received: from mms3.broadcom.com ([216.31.210.19]:3272 "EHLO MMS3.broadcom.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491030Ab1FGKMy (ORCPT ); Tue, 7 Jun 2011 12:12:54 +0200 Received: from [10.9.200.131] by MMS3.broadcom.com with ESMTP (Broadcom SMTP Relay (Email Firewall v6.3.2)); Tue, 07 Jun 2011 03:16:29 -0700 X-Server-Uuid: B55A25B1-5D7D-41F8-BC53-C57E7AD3C201 Received: from mail-irva-13.broadcom.com (10.11.16.103) by IRVEXCHHUB01.corp.ad.broadcom.com (10.9.200.131) with Microsoft SMTP Server id 8.2.247.2; Tue, 7 Jun 2011 03:12:32 -0700 Received: from mail-sj1-12.sj.broadcom.com (mail-sj1-12.sj.broadcom.com [10.17.16.106]) by mail-irva-13.broadcom.com (Postfix) with ESMTP id 87E8C74D04; Tue, 7 Jun 2011 03:12:31 -0700 (PDT) Received: from [192.168.1.120] (unknown [10.176.68.21]) by mail-sj1-12.sj.broadcom.com (Postfix) with ESMTP id 85A8320501; Tue, 7 Jun 2011 03:12:29 -0700 (PDT) Message-ID: <4DEDF98C.6020905@broadcom.com> Date: Tue, 7 Jun 2011 12:12:28 +0200 From: "Arend van Spriel" User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.17) Gecko/20110424 Thunderbird/3.1.10 MIME-Version: 1.0 To: "Arnd Bergmann" cc: "Hauke Mehrtens" , "George Kashperko" , =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= , "Greg KH" , "linux-wireless@vger.kernel.org" , "linux-mips@linux-mips.org" , "mb@bu3sch.de" , "b43-dev@lists.infradead.org" , "bernhardloos@googlemail.com" Subject: Re: [RFC][PATCH 01/10] bcma: Use array to store cores. References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <201106061503.14852.arnd@arndb.de> <4DED48EA.7070001@hauke-m.de> <201106062353.40470.arnd@arndb.de> In-Reply-To: <201106062353.40470.arnd@arndb.de> X-WSS-ID: 61F325F74NS17263055-01-01 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit X-archive-position: 30281 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: arend@broadcom.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5389 Content-Length: 1705 Lines: 36 On 06/06/2011 11:53 PM, Arnd Bergmann wrote: > On Monday 06 June 2011 23:38:50 Hauke Mehrtens wrote: >> Accessing chip common should be possible without scanning the hole bus >> as it is at the first position and initializing most things just needs >> chip common. For initializing the interrupts scanning is needed as we do >> not know where the mips core is located. >> >> As we can not use kalloc on early boot we could use a function which >> uses kalloc under normal conditions and when on early boot the >> architecture code which starts the bcma code should also provide a >> function which returns a pointer to some memory in its text segment to >> use. We need space for 16 cores in the architecture code. >> >> In addition bcma_bus_register(struct bcma_bus *bus) has to be divided >> into two parts. The first part will scan the bus and initialize chip >> common and mips core. The second part will initialize pci core and >> register the devices in the system. When using this under normal >> conditions they will be called directly after each other. > Just split out the minimal low-level function from the bcma_bus_scan > then, to locate a single device based on some identifier. The > bcma_bus_scan() function can then repeatedly allocate one device > and pass it to the low-level function when doing the proper scan, > while the arch code calls the low-level function directly with static > data. If going for this we should pass struct bcma_device_id as match parameter as that identifies the core appropriately although you probably only want to match manufacturer and core identifiers. Gr. AvS -- Almost nobody dances sober, unless they happen to be insane. -- H.P. Lovecraft -- From arend@broadcom.com Tue Jun 7 12:30:50 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 07 Jun 2011 12:30:55 +0200 (CEST) Received: from mms1.broadcom.com ([216.31.210.17]:1753 "EHLO mms1.broadcom.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491030Ab1FGKau convert rfc822-to-8bit (ORCPT ); Tue, 7 Jun 2011 12:30:50 +0200 Received: from [10.9.200.131] by mms1.broadcom.com with ESMTP (Broadcom SMTP Relay (Email Firewall v6.3.2)); Tue, 07 Jun 2011 03:35:00 -0700 X-Server-Uuid: 02CED230-5797-4B57-9875-D5D2FEE4708A Received: from mail-irva-13.broadcom.com (10.11.16.103) by IRVEXCHHUB01.corp.ad.broadcom.com (10.9.200.131) with Microsoft SMTP Server id 8.2.247.2; Tue, 7 Jun 2011 03:30:35 -0700 Received: from mail-sj1-12.sj.broadcom.com (mail-sj1-12.sj.broadcom.com [10.17.16.106]) by mail-irva-13.broadcom.com (Postfix) with ESMTP id AB58F74D03; Tue, 7 Jun 2011 03:30:35 -0700 (PDT) Received: from [192.168.1.120] (unknown [10.176.68.21]) by mail-sj1-12.sj.broadcom.com (Postfix) with ESMTP id 9833320501; Tue, 7 Jun 2011 03:30:33 -0700 (PDT) Message-ID: <4DEDFDC8.50005@broadcom.com> Date: Tue, 7 Jun 2011 12:30:32 +0200 From: "Arend van Spriel" User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.17) Gecko/20110424 Thunderbird/3.1.10 MIME-Version: 1.0 To: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= cc: "Hauke Mehrtens" , "linux-wireless@vger.kernel.org" , "linux-mips@linux-mips.org" , "mb@bu3sch.de" , "george@znau.edu.ua" , "b43-dev@lists.infradead.org" , "bernhardloos@googlemail.com" Subject: Re: [RFC][PATCH 03/10] bcma: add embedded bus References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-4-git-send-email-hauke@hauke-m.de> <4DED4DEB.5030802@hauke-m.de> In-Reply-To: X-WSS-ID: 61F3215E3B4122601-01-01 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8BIT X-archive-position: 30282 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: arend@broadcom.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5406 Content-Length: 1858 Lines: 44 On 06/07/2011 02:33 AM, Rafał Miłecki wrote: > W dniu 7 czerwca 2011 00:00 użytkownik Hauke Mehrtens > napisał: >> On 06/06/2011 12:22 PM, Rafał Miłecki wrote: >>>> + if (bus->hosttype == BCMA_HOSTTYPE_EMBEDDED) { >>>> + iounmap(bus->mmio); >>>> + mmio = ioremap(BCMA_ADDR_BASE, BCMA_CORE_SIZE * bus->nr_cores); >>>> + if (!mmio) >>>> + return -ENOMEM; >>>> + bus->mmio = mmio; >>>> + >>>> + mmio = ioremap(BCMA_WRAP_BASE, BCMA_CORE_SIZE * bus->nr_cores); >>>> + if (!mmio) >>>> + return -ENOMEM; >>>> + bus->host_embedded = mmio; >>> Do we really need both? mmio and host_embedded? What about keeping >>> mmio only and using it in calculation for read/write[8,16,32]? >> These are two different memory regions, it should be possible to >> calculate the other address, but I do not like that. As host_embedded is >> in a union this does not waste any memory. > Ah, OK, I can see what does happen here. You are using: > 1) bus->mmio for first core > 2) bus->host_embedded for first agent/wrapper > > I'm not sure if this is a correct approach. Doing "core_index * > BCMA_CORE_SIZE" comes from ssb, where it was the way to calculate > offset. In case of BCMA we are reading all the info from (E)EPROM, > which also includes addresses of the cores. > > IMO you should use core->addr and core->wrap for read/write ops. I > believe this is approach Broadcom decided to use for BCMA, when > designing (E)EPROM. Agree. There is no guarantee for the core index to relate to the physical address. Chip designer may be systematic in this and the index*size method may work, but not by design. Gr. AvS -- Almost nobody dances sober, unless they happen to be insane. -- H.P. Lovecraft -- From oleg@redhat.com Tue Jun 7 19:22:01 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 07 Jun 2011 19:22:07 +0200 (CEST) Received: from mx1.redhat.com ([209.132.183.28]:11962 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491094Ab1FGRWB (ORCPT ); Tue, 7 Jun 2011 19:22:01 +0200 Received: from int-mx01.intmail.prod.int.phx2.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p57HLW5l005836 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Tue, 7 Jun 2011 13:21:32 -0400 Received: from tranklukator.englab.brq.redhat.com (dhcp-1-166.brq.redhat.com [10.34.1.166]) by int-mx01.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with SMTP id p57HLMQo021360; Tue, 7 Jun 2011 13:21:22 -0400 Received: by tranklukator.englab.brq.redhat.com (nbSMTP-1.00) for uid 500 oleg@redhat.com; Tue, 7 Jun 2011 19:20:02 +0200 (CEST) Date: Tue, 7 Jun 2011 19:19:52 +0200 From: Oleg Nesterov To: Eric Paris Cc: linux-kernel@vger.kernel.org, tony.luck@intel.com, fenghua.yu@intel.com, monstr@monstr.eu, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, schwidefsky@de.ibm.com, heiko.carstens@de.ibm.com, linux390@de.ibm.com, lethal@linux-sh.org, davem@davemloft.net, jdike@addtoit.com, richard@nod.at, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, viro@zeniv.linux.org.uk, akpm@linux-foundation.org, linux-ia64@vger.kernel.org, microblaze-uclinux@itee.uq.edu.au, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net Subject: Re: [PATCH -v2] Audit: push audit success and retcode into arch ptrace.h Message-ID: <20110607171952.GA25729@redhat.com> References: <20110603220451.23134.47368.stgit@paris.rdu.redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20110603220451.23134.47368.stgit@paris.rdu.redhat.com> User-Agent: Mutt/1.5.18 (2008-05-17) X-Scanned-By: MIMEDefang 2.67 on 10.5.11.11 X-archive-position: 30283 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: oleg@redhat.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5940 Content-Length: 2617 Lines: 63 On 06/03, Eric Paris wrote: > > The audit system previously expected arches calling to audit_syscall_exit to > supply as arguments if the syscall was a success and what the return code was. > Audit also provides a helper AUDITSC_RESULT which was supposed to simplify things > by converting from negative retcodes to an audit internal magic value stating > success or failure. This helper was wrong and could indicate that a valid > pointer returned to userspace was a failed syscall. The fix is to fix the > layering foolishness. We now pass audit_syscall_exit a struct pt_reg and it > in turns calls back into arch code to collect the return value and to > determine if the syscall was a success or failure. We also define a generic > is_syscall_success() macro which determines success/failure based on if the > value is < -MAX_ERRNO. This works for arches like x86 which do not use a > separate mechanism to indicate syscall failure. I know nothing about audit, but the patch looks fine to me. But I have a bit off-topic question, > diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S > index 8a445a0..b7b1f88 100644 > --- a/arch/x86/kernel/entry_64.S > +++ b/arch/x86/kernel/entry_64.S > @@ -53,6 +53,7 @@ > #include > #include > #include > +#include > > /* Avoid __ASSEMBLER__'ifying just for this. */ > #include > @@ -564,17 +565,16 @@ auditsys: > jmp system_call_fastpath > > /* > - * Return fast path for syscall audit. Call audit_syscall_exit() > + * Return fast path for syscall audit. Call __audit_syscall_exit() > * directly and then jump back to the fast path with TIF_SYSCALL_AUDIT > * masked off. > */ > sysret_audit: > movq RAX-ARGOFFSET(%rsp),%rsi /* second arg, syscall return value */ > - cmpq $0,%rsi /* is it < 0? */ > - setl %al /* 1 if so, 0 if not */ > + cmpq $-MAX_ERRNO,%rsi /* is it < -MAX_ERRNO? */ > + setbe %al /* 1 if so, 0 if not */ > movzbl %al,%edi /* zero-extend that into %edi */ > - inc %edi /* first arg, 0->1(AUDITSC_SUCCESS), 1->2(AUDITSC_FAILURE) */ > - call audit_syscall_exit > + call __audit_syscall_exit With or without this patch, can't we call audit_syscall_exit() twice if there is something else in _TIF_WORK_SYSCALL_EXIT mask apart from SYSCALL_AUDIT ? First time it is called from asm, then from syscall_trace_leave(), no? For example. The task has TIF_SYSCALL_AUDIT and nothing else, it does system_call->auditsys->system_call_fastpath. What if it gets, say, TIF_SYSCALL_TRACE before ret_from_sys_call? Oleg. From eparis@redhat.com Tue Jun 7 20:53:57 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 07 Jun 2011 20:54:04 +0200 (CEST) Received: from mx1.redhat.com ([209.132.183.28]:20321 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491205Ab1FGSx5 (ORCPT ); Tue, 7 Jun 2011 20:53:57 +0200 Received: from int-mx12.intmail.prod.int.phx2.redhat.com (int-mx12.intmail.prod.int.phx2.redhat.com [10.5.11.25]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p57IrGxR007971 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Tue, 7 Jun 2011 14:53:16 -0400 Received: from [10.11.235.183] (dhcp235-183.rdu.redhat.com [10.11.235.183]) by int-mx12.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id p57IrBrb004399; Tue, 7 Jun 2011 14:53:11 -0400 Subject: Re: [PATCH -v2] Audit: push audit success and retcode into arch ptrace.h From: Eric Paris To: Oleg Nesterov Cc: linux-kernel@vger.kernel.org, tony.luck@intel.com, fenghua.yu@intel.com, monstr@monstr.eu, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, schwidefsky@de.ibm.com, heiko.carstens@de.ibm.com, linux390@de.ibm.com, lethal@linux-sh.org, davem@davemloft.net, jdike@addtoit.com, richard@nod.at, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, viro@zeniv.linux.org.uk, akpm@linux-foundation.org, linux-ia64@vger.kernel.org, microblaze-uclinux@itee.uq.edu.au, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net Date: Tue, 07 Jun 2011 14:53:11 -0400 In-Reply-To: <20110607171952.GA25729@redhat.com> References: <20110603220451.23134.47368.stgit@paris.rdu.redhat.com> <20110607171952.GA25729@redhat.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Message-ID: <1307472796.2052.12.camel@localhost.localdomain> Mime-Version: 1.0 X-Scanned-By: MIMEDefang 2.68 on 10.5.11.25 X-archive-position: 30284 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: eparis@redhat.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6023 Content-Length: 3049 Lines: 69 On Tue, 2011-06-07 at 19:19 +0200, Oleg Nesterov wrote: > On 06/03, Eric Paris wrote: > > > > The audit system previously expected arches calling to audit_syscall_exit to > > supply as arguments if the syscall was a success and what the return code was. > > Audit also provides a helper AUDITSC_RESULT which was supposed to simplify things > > by converting from negative retcodes to an audit internal magic value stating > > success or failure. This helper was wrong and could indicate that a valid > > pointer returned to userspace was a failed syscall. The fix is to fix the > > layering foolishness. We now pass audit_syscall_exit a struct pt_reg and it > > in turns calls back into arch code to collect the return value and to > > determine if the syscall was a success or failure. We also define a generic > > is_syscall_success() macro which determines success/failure based on if the > > value is < -MAX_ERRNO. This works for arches like x86 which do not use a > > separate mechanism to indicate syscall failure. > > I know nothing about audit, but the patch looks fine to me. > > > But I have a bit off-topic question, > > > diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S > > index 8a445a0..b7b1f88 100644 > > --- a/arch/x86/kernel/entry_64.S > > +++ b/arch/x86/kernel/entry_64.S > > @@ -53,6 +53,7 @@ > > #include > > #include > > #include > > +#include > > > > /* Avoid __ASSEMBLER__'ifying just for this. */ > > #include > > @@ -564,17 +565,16 @@ auditsys: > > jmp system_call_fastpath > > > > /* > > - * Return fast path for syscall audit. Call audit_syscall_exit() > > + * Return fast path for syscall audit. Call __audit_syscall_exit() > > * directly and then jump back to the fast path with TIF_SYSCALL_AUDIT > > * masked off. > > */ > > sysret_audit: > > movq RAX-ARGOFFSET(%rsp),%rsi /* second arg, syscall return value */ > > - cmpq $0,%rsi /* is it < 0? */ > > - setl %al /* 1 if so, 0 if not */ > > + cmpq $-MAX_ERRNO,%rsi /* is it < -MAX_ERRNO? */ > > + setbe %al /* 1 if so, 0 if not */ > > movzbl %al,%edi /* zero-extend that into %edi */ > > - inc %edi /* first arg, 0->1(AUDITSC_SUCCESS), 1->2(AUDITSC_FAILURE) */ > > - call audit_syscall_exit > > + call __audit_syscall_exit > > With or without this patch, can't we call audit_syscall_exit() twice > if there is something else in _TIF_WORK_SYSCALL_EXIT mask apart from > SYSCALL_AUDIT ? First time it is called from asm, then from > syscall_trace_leave(), no? > > For example. The task has TIF_SYSCALL_AUDIT and nothing else, it does > system_call->auditsys->system_call_fastpath. What if it gets, say, > TIF_SYSCALL_TRACE before ret_from_sys_call? No harm is done calling twice. The first call will do the real work and cleanup. It will set a flag in the audit data that the work has been done (in_syscall == 0) thus the second call will then not do any real work and won't have anything to clean up. -Eric From hauke@hauke-m.de Tue Jun 7 23:23:49 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 07 Jun 2011 23:23:51 +0200 (CEST) Received: from server19320154104.serverpool.info ([193.201.54.104]:42820 "EHLO hauke-m.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491818Ab1FGVXt (ORCPT ); Tue, 7 Jun 2011 23:23:49 +0200 Received: from localhost (localhost [127.0.0.1]) by hauke-m.de (Postfix) with ESMTP id 6CDA98B95; Tue, 7 Jun 2011 23:23:47 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at hauke-m.de Received: from hauke-m.de ([127.0.0.1]) by localhost (hauke-m.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 62uTIrJ8xjBX; Tue, 7 Jun 2011 23:23:43 +0200 (CEST) Received: from [192.168.0.10] (host-091-097-248-162.ewe-ip-backbone.de [91.97.248.162]) by hauke-m.de (Postfix) with ESMTPSA id D60078B86; Tue, 7 Jun 2011 23:23:42 +0200 (CEST) Message-ID: <4DEE96DD.2020609@hauke-m.de> Date: Tue, 07 Jun 2011 23:23:41 +0200 From: Hauke Mehrtens User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.17) Gecko/20110516 Lightning/1.0b2 Thunderbird/3.1.10 MIME-Version: 1.0 To: Arend van Spriel CC: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= , "linux-wireless@vger.kernel.org" , "linux-mips@linux-mips.org" , "mb@bu3sch.de" , "george@znau.edu.ua" , "b43-dev@lists.infradead.org" , "bernhardloos@googlemail.com" Subject: Re: [RFC][PATCH 03/10] bcma: add embedded bus References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <1307311658-15853-4-git-send-email-hauke@hauke-m.de> <4DED4DEB.5030802@hauke-m.de> <4DEDFDC8.50005@broadcom.com> In-Reply-To: <4DEDFDC8.50005@broadcom.com> X-Enigmail-Version: 1.1.2 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-archive-position: 30285 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hauke@hauke-m.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6157 Content-Length: 1913 Lines: 45 On 06/07/2011 12:30 PM, Arend van Spriel wrote: > On 06/07/2011 02:33 AM, Rafał Miłecki wrote: >> W dniu 7 czerwca 2011 00:00 użytkownik Hauke Mehrtens >> napisał: >>> On 06/06/2011 12:22 PM, Rafał Miłecki wrote: >>>>> + if (bus->hosttype == BCMA_HOSTTYPE_EMBEDDED) { >>>>> + iounmap(bus->mmio); >>>>> + mmio = ioremap(BCMA_ADDR_BASE, BCMA_CORE_SIZE * >>>>> bus->nr_cores); >>>>> + if (!mmio) >>>>> + return -ENOMEM; >>>>> + bus->mmio = mmio; >>>>> + >>>>> + mmio = ioremap(BCMA_WRAP_BASE, BCMA_CORE_SIZE * >>>>> bus->nr_cores); >>>>> + if (!mmio) >>>>> + return -ENOMEM; >>>>> + bus->host_embedded = mmio; >>>> Do we really need both? mmio and host_embedded? What about keeping >>>> mmio only and using it in calculation for read/write[8,16,32]? >>> These are two different memory regions, it should be possible to >>> calculate the other address, but I do not like that. As host_embedded is >>> in a union this does not waste any memory. >> Ah, OK, I can see what does happen here. You are using: >> 1) bus->mmio for first core >> 2) bus->host_embedded for first agent/wrapper >> >> I'm not sure if this is a correct approach. Doing "core_index * >> BCMA_CORE_SIZE" comes from ssb, where it was the way to calculate >> offset. In case of BCMA we are reading all the info from (E)EPROM, >> which also includes addresses of the cores. >> >> IMO you should use core->addr and core->wrap for read/write ops. I >> believe this is approach Broadcom decided to use for BCMA, when >> designing (E)EPROM. > > Agree. There is no guarantee for the core index to relate to the > physical address. Chip designer may be systematic in this and the > index*size method may work, but not by design. > > Gr. AvS > Ok I will use these addresses. Hauke From hauke@hauke-m.de Tue Jun 7 23:44:51 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 07 Jun 2011 23:44:54 +0200 (CEST) Received: from server19320154104.serverpool.info ([193.201.54.104]:36767 "EHLO hauke-m.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491851Ab1FGVov (ORCPT ); Tue, 7 Jun 2011 23:44:51 +0200 Received: from localhost (localhost [127.0.0.1]) by hauke-m.de (Postfix) with ESMTP id A26758B95; Tue, 7 Jun 2011 23:44:50 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at hauke-m.de Received: from hauke-m.de ([127.0.0.1]) by localhost (hauke-m.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 2GDuLPsFWEeS; Tue, 7 Jun 2011 23:44:46 +0200 (CEST) Received: from [192.168.0.10] (host-091-097-248-162.ewe-ip-backbone.de [91.97.248.162]) by hauke-m.de (Postfix) with ESMTPSA id C7B6A8B86; Tue, 7 Jun 2011 23:44:45 +0200 (CEST) Message-ID: <4DEE9BCD.1030304@hauke-m.de> Date: Tue, 07 Jun 2011 23:44:45 +0200 From: Hauke Mehrtens User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.17) Gecko/20110516 Lightning/1.0b2 Thunderbird/3.1.10 MIME-Version: 1.0 To: Arend van Spriel CC: Arnd Bergmann , George Kashperko , =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= , Greg KH , "linux-wireless@vger.kernel.org" , "linux-mips@linux-mips.org" , "mb@bu3sch.de" , "b43-dev@lists.infradead.org" , "bernhardloos@googlemail.com" Subject: Re: [RFC][PATCH 01/10] bcma: Use array to store cores. References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <201106061503.14852.arnd@arndb.de> <4DED48EA.7070001@hauke-m.de> <201106062353.40470.arnd@arndb.de> <4DEDF98C.6020905@broadcom.com> In-Reply-To: <4DEDF98C.6020905@broadcom.com> X-Enigmail-Version: 1.1.2 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-archive-position: 30286 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hauke@hauke-m.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6193 Content-Length: 2934 Lines: 56 On 06/07/2011 12:12 PM, Arend van Spriel wrote: > On 06/06/2011 11:53 PM, Arnd Bergmann wrote: >> On Monday 06 June 2011 23:38:50 Hauke Mehrtens wrote: >>> Accessing chip common should be possible without scanning the hole bus >>> as it is at the first position and initializing most things just needs >>> chip common. For initializing the interrupts scanning is needed as we do >>> not know where the mips core is located. >>> >>> As we can not use kalloc on early boot we could use a function which >>> uses kalloc under normal conditions and when on early boot the >>> architecture code which starts the bcma code should also provide a >>> function which returns a pointer to some memory in its text segment to >>> use. We need space for 16 cores in the architecture code. >>> >>> In addition bcma_bus_register(struct bcma_bus *bus) has to be divided >>> into two parts. The first part will scan the bus and initialize chip >>> common and mips core. The second part will initialize pci core and >>> register the devices in the system. When using this under normal >>> conditions they will be called directly after each other. >> Just split out the minimal low-level function from the bcma_bus_scan >> then, to locate a single device based on some identifier. The >> bcma_bus_scan() function can then repeatedly allocate one device >> and pass it to the low-level function when doing the proper scan, >> while the arch code calls the low-level function directly with static >> data. > > If going for this we should pass struct bcma_device_id as match > parameter as that identifies the core appropriately although you > probably only want to match manufacturer and core identifiers. > > Gr. AvS > What is the problem with scanning the full bus? Scanning in general works for embedded devices, just allocating memory with kalloc does not work at that time, but the architecture code (something in arch/mips/bcm47xx/) could provide some memory to store the struct bcma_core, like it does for struct bcma_bus. We could just provide memory for chipcommon and mips core or memory for all possible 16 cores, the maximum number, as most embedded devices have ~9 cores providing memory for 16 cores is not a big vast of memory and then we could use the normal scan function. A special scan function would just skip the wrong cores so I do not see any advantage in that. We could build a scan function which searches for one core and uses a struct bcma_core stored on the stack and returns the struct bcma_core if it found the wanted one. Then we could search for chipcommon and mips and store then in arch code in arch/mips/bcm47xx and use them. When boot is ready and we are searching the complete bus there is probably something differences in the init process from normal init as we already initialized chipcommon sometime earlier. I Would prefer to scan the bus completely and initialize chipcommon and mips in early boot. Hauke From dvomlehn@cisco.com Wed Jun 8 01:02:25 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jun 2011 01:02:30 +0200 (CEST) Received: from sj-iport-2.cisco.com ([171.71.176.71]:43881 "EHLO sj-iport-2.cisco.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491851Ab1FGXCZ (ORCPT ); Wed, 8 Jun 2011 01:02:25 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=cisco.com; i=dvomlehn@cisco.com; l=3303; q=dns/txt; s=iport; t=1307487745; x=1308697345; h=date:from:to:cc:subject:message-id:references: mime-version:content-transfer-encoding:in-reply-to; bh=W5UypO2ohGJvEcm5UkBhOdp1YilegaMidT9C/bF63Oc=; b=DJ7oOOotcj+zVOqlp5NXTmMM8Vrhc7tA2/NZyYBCbRnsBklbEH20kjih VtlaIVr6jSw6sebR2AAIPDXo87cEtwqiIQOTdCGmDQAtv6eGR+zebvG7i FJ3cSK8jOILM7Diox62gzaBzhdkj1Hzhezvr4xTKCTzp+1yUJIRrKnLw6 c=; X-IronPort-AV: E=Sophos;i="4.65,335,1304294400"; d="scan'208";a="372203881" Received: from mtv-core-2.cisco.com ([171.68.58.7]) by sj-iport-2.cisco.com with ESMTP; 07 Jun 2011 23:02:18 +0000 Received: from dvomlehn-lnx2.corp.sa.net (dhcp-171-71-47-241.cisco.com [171.71.47.241]) by mtv-core-2.cisco.com (8.14.3/8.14.3) with ESMTP id p57N2IJR008768; Tue, 7 Jun 2011 23:02:18 GMT Date: Tue, 7 Jun 2011 16:02:18 -0700 From: David VomLehn To: Grant Likely Cc: Ralf Baechle , linux-mips@linux-mips.org, Imre Kaloz , Gabor Juhos , John Crispin , "Dezhong Diao (dediao)" , Thomas Gleixner Subject: Re: Converting MIPS to Device Tree Message-ID: <20110607230218.GA23552@dvomlehn-lnx2.corp.sa.net> References: <20110606010753.GA16202@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.5.18 (2008-05-17) X-archive-position: 30287 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dvomlehn@cisco.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6250 Content-Length: 3198 Lines: 105 On Sun, Jun 05, 2011 at 11:41:10PM -0500, Grant Likely wrote: > On Sun, Jun 5, 2011 at 7:07 PM, Ralf Baechle wrote: > > Over the past few days I've started to convert arch/mips to use DT. > > Nice! > > > So > > far none of the platforms (except maybe PowerTV?) seems to have a > > firmware that is passing a DT nor is there any 2nd stage bootloader that > > could do so. > > FWIW, U-Boot now has pretty generic support for manipulating and > passing a dtb at boot. That doesn't do much good for existing > deployed systems though. I took a look at the issue of passing device trees to the kernel and started by surveying the methods currently in use for passing information from the bootloader to the kernel. I came up with the ten approaches: How MIPS Bootloaders Pass Information to the Kernel --------------------------------------------------- Apologies for any errors; this was meant more to be a quick survey rather than a detailed analysis. 1. a0 - argc a1 - argv Strings are concatenated to create the command line, starting at argv[0]. Platforms: ath79 2. a0 - argc a1 - argv a2 - envp Strings are concatenated to create the command line, starting at argv[0]. Platforms: pnx8550, rb532 3. a0 - argc a1 - argv Command line created by concatenating argv strings, starting at argv[1]. Platforms: emma, fw, jz4740, lasat, pnx833x, vr41xx 4. a0 - argc a1 - argv a2 - envp Command line created by concatenating argv strings, starting at argv[1]. Platforms: alchemy, ar7, loongson, mti-malta, pmc-sierra 5. a0 - unused a1 - unused a2 - unused Boot descriptor in a3. Platforms: cavium-octeon 6. a0 - argc a1 - argv a2 - non-standard envp Command line created by concatenating argv strings, starting at argv[1]. The envp is a pointer to a list of char ptr to name/char ptr pairs. Platforms: txx9 7. a0 - argc a1 - argv a2 - magic a3 - prom_vec Command line created by concatenating argv strings, starting at either argv[1] or argv[2], depending on the value passed in magic. Platforms: dec 8. a0 - argc a1 - unused a2 - envp a3 - prom_vec Interpretation depends on the values passed, but command line is a single string in the cfe environment. Platforms: bcm47xxx, sibyte 9. a0 - bits 30-16: memory size, bits 15-0, argc a1 - argv Command line created by concatenating argv strings, starting at argv[1]. Platforms: cobalt 10. a0 - argc a1 - argv a2 - unused a3 - memory size The command line is assumed to already be a single string, pointed to by argv. Platforms: powertv It seems like everything ultimately does create a command line. We could then use a parameter like "devtree=" on the command line, passed in any way the bootloader likes. In this case, the will be a kseg0 address so we don't have to set up any mappings. If we allow multiple device trees to be built in or appended to the end of the kernel, we can use the existing "dtb_compat" command line parameter to select which one to use. I would propose that "devtree" take precedence over "dtb_compat", but that's really just a desire to pick one over the other, whichever is the preferred one. -- David VL From ddaney@caviumnetworks.com Wed Jun 8 01:22:19 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jun 2011 01:22:25 +0200 (CEST) Received: from mail3.caviumnetworks.com ([12.108.191.235]:2209 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491851Ab1FGXWT (ORCPT ); Wed, 8 Jun 2011 01:22:19 +0200 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Tue, 07 Jun 2011 16:23:22 -0700 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.4675); Tue, 7 Jun 2011 16:22:17 -0700 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Tue, 7 Jun 2011 16:22:17 -0700 Message-ID: <4DEEB2A8.8050302@caviumnetworks.com> Date: Tue, 07 Jun 2011 16:22:16 -0700 From: David Daney User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.15) Gecko/20101027 Fedora/3.0.10-1.fc12 Thunderbird/3.0.10 MIME-Version: 1.0 To: David VomLehn CC: Grant Likely , Ralf Baechle , linux-mips@linux-mips.org, Imre Kaloz , Gabor Juhos , John Crispin , "Dezhong Diao (dediao)" , Thomas Gleixner Subject: Re: Converting MIPS to Device Tree References: <20110606010753.GA16202@linux-mips.org> <20110607230218.GA23552@dvomlehn-lnx2.corp.sa.net> In-Reply-To: <20110607230218.GA23552@dvomlehn-lnx2.corp.sa.net> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 07 Jun 2011 23:22:17.0193 (UTC) FILETIME=[BDBC4D90:01CC2569] X-archive-position: 30288 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6264 Content-Length: 2523 Lines: 71 On 06/07/2011 04:02 PM, David VomLehn wrote: > On Sun, Jun 05, 2011 at 11:41:10PM -0500, Grant Likely wrote: >> On Sun, Jun 5, 2011 at 7:07 PM, Ralf Baechle wrote: >>> Over the past few days I've started to convert arch/mips to use DT. >> >> Nice! >> >>> So >>> far none of the platforms (except maybe PowerTV?) seems to have a >>> firmware that is passing a DT nor is there any 2nd stage bootloader that >>> could do so. >> >> FWIW, U-Boot now has pretty generic support for manipulating and >> passing a dtb at boot. That doesn't do much good for existing >> deployed systems though. > > I took a look at the issue of passing device trees to the kernel and started > by surveying the methods currently in use for passing information from the > bootloader to the kernel. I came up with the ten approaches: > > How MIPS Bootloaders Pass Information to the Kernel > --------------------------------------------------- > Apologies for any errors; this was meant more to be a quick survey > rather than a detailed analysis. > [...] > > 5. a0 - unused > a1 - unused > a2 - unused > Boot descriptor in a3. > Platforms: cavium-octeon > I have augmented the boot descriptor with a field that contains the *physical* address of the DTB. [...] > 10. a0 - argc > a1 - argv > a2 - unused > a3 - memory size > The command line is assumed to already be a single string, pointed > to by argv. > Platforms: powertv > > It seems like everything ultimately does create a command line. We could then > use a parameter like "devtree=" on the command line, passed > in any way the bootloader likes. Some u-boots for non-mips platforms pass it in the environment of the bootm protocol. I would say to pass the pointer to the DTB in the environment, but not all platforms (like powertv) have an environment. So I guess the command line has to do. Also I think we should pass the physical address of the DTB, not the virtual address. It would be the kernel's responsibility to figure out what the virtual address is. David Daney > In this case, the will be > a kseg0 address so we don't have to set up any mappings. If we allow multiple > device trees to be built in or appended to the end of the kernel, we can use > the existing "dtb_compat" command line parameter to select which one to use. > I would propose that "devtree" take precedence over "dtb_compat", but that's > really just a desire to pick one over the other, whichever is the preferred > one. From zajec5@gmail.com Wed Jun 8 02:06:17 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jun 2011 02:06:20 +0200 (CEST) Received: from mail-qw0-f49.google.com ([209.85.216.49]:32920 "EHLO mail-qw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491874Ab1FHAGR convert rfc822-to-8bit (ORCPT ); Wed, 8 Jun 2011 02:06:17 +0200 Received: by qwi2 with SMTP id 2so8941qwi.36 for ; Tue, 07 Jun 2011 17:06:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=K+Z40NT6khlEY56HN+YhQYngCQXk2G3BTYBEW4PB1ss=; b=THxuYTE3GBQleFI2pZPgegGtkkp0vBvlwtYisUKSCzc/+rmJoh0nCY2p4rBpRY9Uvy D1d02rzqFtJTLhqEztxKI3CqPVKhOVmhVSOtobXomKkFkKxAd/XBNVz7m7zVFgbQvmLd 38xR+zT1hgj1sXqdGo3haNR3Agqr0qGwR2pzU= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=CQHF0TQBzPanR3RyPoCzYAMnUhQp8e47waZQwnLyo0HkJEFGkVFWwTtmBpgdFAuXxU w74AcVbOlorljQvCkSwWWXzHHUs0c3c9YanNvEFCLxSlSZC33GoUueN9vVgYmPAvU/M/ MjgAKJ+XolDj+MiLTicC74rHCL/DDCbSOyBHA= MIME-Version: 1.0 Received: by 10.229.142.11 with SMTP id o11mr5001194qcu.46.1307491571634; Tue, 07 Jun 2011 17:06:11 -0700 (PDT) Received: by 10.229.96.21 with HTTP; Tue, 7 Jun 2011 17:06:11 -0700 (PDT) In-Reply-To: <4DEE9BCD.1030304@hauke-m.de> References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <201106061503.14852.arnd@arndb.de> <4DED48EA.7070001@hauke-m.de> <201106062353.40470.arnd@arndb.de> <4DEDF98C.6020905@broadcom.com> <4DEE9BCD.1030304@hauke-m.de> Date: Wed, 8 Jun 2011 02:06:11 +0200 Message-ID: Subject: Re: [RFC][PATCH 01/10] bcma: Use array to store cores. From: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= To: Hauke Mehrtens Cc: Arend van Spriel , Arnd Bergmann , George Kashperko , Greg KH , "linux-wireless@vger.kernel.org" , "linux-mips@linux-mips.org" , "mb@bu3sch.de" , "b43-dev@lists.infradead.org" , "bernhardloos@googlemail.com" Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-archive-position: 30289 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zajec5@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6317 Content-Length: 3112 Lines: 78 2011/6/7 Hauke Mehrtens : > On 06/07/2011 12:12 PM, Arend van Spriel wrote: >> On 06/06/2011 11:53 PM, Arnd Bergmann wrote: >>> On Monday 06 June 2011 23:38:50 Hauke Mehrtens wrote: >>>> Accessing chip common should be possible without scanning the hole bus >>>> as it is at the first position and initializing most things just needs >>>> chip common. For initializing the interrupts scanning is needed as we do >>>> not know where the mips core is located. >>>> >>>> As we can not use kalloc on early boot we could use a function which >>>> uses kalloc under normal conditions and when on early boot the >>>> architecture code which starts the bcma code should also provide a >>>> function which returns a pointer to some memory in its text segment to >>>> use. We need space for 16 cores in the architecture code. >>>> >>>> In addition bcma_bus_register(struct bcma_bus *bus) has to be divided >>>> into two parts. The first part will scan the bus and initialize chip >>>> common and mips core. The second part will initialize pci core and >>>> register the devices in the system. When using this under normal >>>> conditions they will be called directly after each other. >>> Just split out the minimal low-level function from the bcma_bus_scan >>> then, to locate a single device based on some identifier. The >>> bcma_bus_scan() function can then repeatedly allocate one device >>> and pass it to the low-level function when doing the proper scan, >>> while the arch code calls the low-level function directly with static >>> data. >> >> If going for this we should pass struct bcma_device_id as match >> parameter as that identifies the core appropriately although you >> probably only want to match manufacturer and core identifiers. >> >> Gr. AvS >> > > What is the problem with scanning the full bus? Because full scanning needs one of the following: 1) Working alloc - not possible for SoCs 2) Hacks with wrappers, static cores info, lack of optimization (list) > A special scan function would just skip the wrong cores so I do not see > any advantage in that. > > We could build a scan function which searches for one core and uses a > struct bcma_core stored on the stack and returns the struct bcma_core if > it found the wanted one. Yeah, this should be quite easy. struct bcma_device core = bcma_early_find_core(bus, CC); bcma_cc_init(core); > Then we could search for chipcommon and mips > and store then in arch code in arch/mips/bcm47xx and use them. Not sure about this one. You have drivers for chipcommon and mips as part of bcma. Do you need to involve arch/mips/bcm47xx to this? > When boot > is ready and we are searching the complete bus there is probably > something differences in the init process from normal init as we already > initialized chipcommon sometime earlier. Nothing hard to handle. > I Would prefer to scan the bus > completely and initialize chipcommon and mips in early boot. Really, I've nothing against scanning and splitting init into "early" and "late". It's going back to static fields and wrappers that I don't like :( -- Rafał From dvomlehn@cisco.com Wed Jun 8 03:10:00 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jun 2011 03:10:09 +0200 (CEST) Received: from sj-iport-2.cisco.com ([171.71.176.71]:14431 "EHLO sj-iport-2.cisco.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491875Ab1FHBKA (ORCPT ); Wed, 8 Jun 2011 03:10:00 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=cisco.com; i=dvomlehn@cisco.com; l=2727; q=dns/txt; s=iport; t=1307495400; x=1308705000; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=44oVJrTSfXJhSLl0VnmshbGiFpomzIujs2TU5zwzTXg=; b=En5Pj0BBuahq6fnsTMaJ2mKG4bjKx4tO0eUCZPhty/bV+gqyV+VZI/LZ udAx8IgnqFsn/PgUCelKfSzuvmARdcZm3agvAPIyi5QvCpYxhvcpxOBvh UYaClBtSGqqNVhYxi1hGgj4ww/NpZMWv8x7HK5WiqcUWEvf4VIcmZavb6 0=; X-IronPort-AV: E=Sophos;i="4.65,335,1304294400"; d="scan'208";a="372268664" Received: from mtv-core-4.cisco.com ([171.68.58.9]) by sj-iport-2.cisco.com with ESMTP; 08 Jun 2011 01:09:52 +0000 Received: from dvomlehn-lnx2.corp.sa.net (dhcp-171-71-47-241.cisco.com [171.71.47.241]) by mtv-core-4.cisco.com (8.14.3/8.14.3) with ESMTP id p5819qqI002715; Wed, 8 Jun 2011 01:09:52 GMT Date: Tue, 7 Jun 2011 18:09:52 -0700 From: David VomLehn To: David Daney Cc: Grant Likely , Ralf Baechle , linux-mips@linux-mips.org, Imre Kaloz , Gabor Juhos , John Crispin , "Dezhong Diao (dediao)" , Thomas Gleixner Subject: Re: Converting MIPS to Device Tree Message-ID: <20110608010952.GA27441@dvomlehn-lnx2.corp.sa.net> References: <20110606010753.GA16202@linux-mips.org> <20110607230218.GA23552@dvomlehn-lnx2.corp.sa.net> <4DEEB2A8.8050302@caviumnetworks.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4DEEB2A8.8050302@caviumnetworks.com> User-Agent: Mutt/1.5.18 (2008-05-17) X-archive-position: 30290 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dvomlehn@cisco.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6376 Content-Length: 2672 Lines: 55 On Tue, Jun 07, 2011 at 04:22:16PM -0700, David Daney wrote: > On 06/07/2011 04:02 PM, David VomLehn wrote: >> On Sun, Jun 05, 2011 at 11:41:10PM -0500, Grant Likely wrote: >>> On Sun, Jun 5, 2011 at 7:07 PM, Ralf Baechle wrote: >>>> Over the past few days I've started to convert arch/mips to use DT. ... >> It seems like everything ultimately does create a command line. We could then >> use a parameter like "devtree=" on the command line, passed >> in any way the bootloader likes. ... > I would say to pass the pointer to the DTB in the environment, but not > all platforms (like powertv) have an environment. So I guess the > command line has to do. [Actually, PowerTV *could* have an environment; I fought with my bootloader people to ensure a2 was NULL to allow for future support for passing a pointer to an environment later. I really wish those guys were in the same group as the kernel people...] I think we're kind of stuck with passing something on the command line, which means passing the command line in the device tree ends up being a bit confusing. We might want to think about this case a bit: o Do we take only the device tree argument from the command line, then replace it with the command line in the device tree, if any? o Or append the device tree command line to the command line? o Or do something else entirely? I'm reluctant to leave it undefined but don't really see one alternative as clearly better than another. > Also I think we should pass the physical address of the DTB, not the > virtual address. It would be the kernel's responsibility to figure out > what the virtual address is. I'm good with this. We're currently passing a virtual address with the command line parameter "devicetree" so, not surprisingly, I'd like to use some other parameter name if we pass the physical address. Using "devtree" is nice and short. Or "device_tree" if you like something more less terse. > David Daney > >> In this case, the will be >> a kseg0 address so we don't have to set up any mappings. If we allow multiple >> device trees to be built in or appended to the end of the kernel, we can use >> the existing "dtb_compat" command line parameter to select which one to use. >> I would propose that "devtree" take precedence over "dtb_compat", but that's >> really just a desire to pick one over the other, whichever is the preferred >> one. Any thoughts on precedence of "devtree"/"device_tree" over "dtb_compat"? My thought is that something passed explicitly should take precedence over something built-in, but that's just what I think right now. -- David VL From geert@linux-m68k.org Wed Jun 8 09:15:22 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jun 2011 09:15:28 +0200 (CEST) Received: from mail-bw0-f49.google.com ([209.85.214.49]:60487 "EHLO mail-bw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490990Ab1FHHPW convert rfc822-to-8bit (ORCPT ); Wed, 8 Jun 2011 09:15:22 +0200 Received: by bwz1 with SMTP id 1so236288bwz.36 for ; Wed, 08 Jun 2011 00:15:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=HyCPtasq1mEL8RpJh3+rxHOvuA5tAlu9LXtcb1OnjFk=; b=JoewlpG7yZt0YJU4yvrgwfUhFmE6jukhLbH6aM9BX4zzCldzgRMhHc7ZqHaXCdrN0t Ltju/JX6FK9qOfv3VTDJWXhXQSM7Yc8b3jSvSQuweV+jswBKNnmDLbDOzgmPg6ETd5O8 YuwHF/jCnPFxtCm1ZQDvlVBm/fAXph+czr8OQ= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type :content-transfer-encoding; b=gaHqG3InZQFpC+Wp0W8tcvjRUq7OgDVWHpRMZJTHcfvcSwou7Xp/iJsONAhK+rvMPF B/jdrk+ge1SnMIewB19AdFd5jqKV3NRRiw7Gqkar5MtpZjZQpPTcxfmYgsct4H1EGqUu K+yRXqsLcZJe3sLdrxy2Nu4QI02FWj4ji8cUU= MIME-Version: 1.0 Received: by 10.204.170.193 with SMTP id e1mr610613bkz.136.1307517314521; Wed, 08 Jun 2011 00:15:14 -0700 (PDT) Received: by 10.204.127.132 with HTTP; Wed, 8 Jun 2011 00:15:14 -0700 (PDT) In-Reply-To: <20110607230218.GA23552@dvomlehn-lnx2.corp.sa.net> References: <20110606010753.GA16202@linux-mips.org> <20110607230218.GA23552@dvomlehn-lnx2.corp.sa.net> Date: Wed, 8 Jun 2011 09:15:14 +0200 X-Google-Sender-Auth: Ma49VKy_DcB_wE4UiQzupGsBxLI Message-ID: Subject: Re: Converting MIPS to Device Tree From: Geert Uytterhoeven To: David VomLehn Cc: Grant Likely , Ralf Baechle , linux-mips@linux-mips.org, Imre Kaloz , Gabor Juhos , John Crispin , "Dezhong Diao (dediao)" , Thomas Gleixner Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-archive-position: 30291 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: geert@linux-m68k.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6540 Content-Length: 1398 Lines: 34 On Wed, Jun 8, 2011 at 01:02, David VomLehn wrote: > I took a look at the issue of passing device trees to the kernel and started > by surveying the methods currently in use for passing information from the > bootloader to the kernel. I came up with the ten approaches: > > How MIPS Bootloaders Pass Information to the Kernel > --------------------------------------------------- > Apologies for any errors; this was meant more to be a quick survey > rather than a detailed analysis. > 6.      a0 - argc >        a1 - argv >        a2 - non-standard envp >        Command line created by concatenating argv strings, starting at >        argv[1]. The envp is a pointer to a list of char ptr to name/char >        ptr pairs. >        Platforms: txx9 This depends on the actual boot loader. My rbtx4927 has a VxWorks boot loader, which just doesn't pass anything. Cfr. commit 97b0511ce125b0cb95d73b198c1bdbb3cebc4de2 ("MIPS: TXx9: Make firmware parameter passing more robust"). Gr{oetje,eeting}s,                         Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.                                 -- Linus Torvalds From m@bues.ch Wed Jun 8 10:20:22 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jun 2011 10:20:27 +0200 (CEST) Received: from bues.ch ([80.190.117.144]:52647 "EHLO bues.ch" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491041Ab1FHIUW convert rfc822-to-8bit (ORCPT ); Wed, 8 Jun 2011 10:20:22 +0200 Received: by bues.ch with esmtpsa (Exim 4.69) (envelope-from ) id 1QUDzj-0003ZH-BR; Wed, 08 Jun 2011 10:20:07 +0200 Date: Wed, 8 Jun 2011 10:20:01 +0200 From: Michael =?UTF-8?B?QsO8c2No?= To: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= Cc: Hauke Mehrtens , Arend van Spriel , Arnd Bergmann , George Kashperko , Greg KH , "linux-wireless@vger.kernel.org" , "linux-mips@linux-mips.org" , "mb@bu3sch.de" , "b43-dev@lists.infradead.org" , "bernhardloos@googlemail.com" Subject: Re: [RFC][PATCH 01/10] bcma: Use array to store cores. Message-ID: <20110608102001.294a4ff2@maggie> In-Reply-To: References: <1307311658-15853-1-git-send-email-hauke@hauke-m.de> <201106061503.14852.arnd@arndb.de> <4DED48EA.7070001@hauke-m.de> <201106062353.40470.arnd@arndb.de> <4DEDF98C.6020905@broadcom.com> <4DEE9BCD.1030304@hauke-m.de> X-Mailer: Claws Mail 3.7.6 (GTK+ 2.20.1; powerpc-unknown-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-archive-position: 30292 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: m@bues.ch Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6566 Content-Length: 224 Lines: 7 On Wed, 8 Jun 2011 02:06:11 +0200 Rafał Miłecki wrote: > Because full scanning needs one of the following: > 1) Working alloc - not possible for SoCs Isn't there a bootmem allocator available on MIPS? From jonas.gorski@gmail.com Wed Jun 8 12:03:40 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jun 2011 12:03:46 +0200 (CEST) Received: from mail-fx0-f49.google.com ([209.85.161.49]:53725 "EHLO mail-fx0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491050Ab1FHKDk (ORCPT ); Wed, 8 Jun 2011 12:03:40 +0200 Received: by fxm14 with SMTP id 14so267017fxm.36 for ; Wed, 08 Jun 2011 03:03:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:from:to:cc:subject:date:message-id:x-mailer; bh=Q+VN8wYqVzre7ftpcexUhGJRjHuq+XEgsVwK6dw/uqA=; b=JVKMnY9Oj9ApcQhEQG9uNlUpPIcHq8l1uNIxLf3TCA8F42feALaRNPUb9JvZdqW9Th kTXwLF36X9ZvKuYPaVALSjdH+9BIJFTS9hhaIjZhU+40AEiID1GRD7jao5oxgaigsK+Z DGeyZjLIIUw5p+Tjj7kwDYcx3ISNes1EV7MjA= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; b=JatPD8WZ838YK84V6Af8lyEDX4Jnj4yOnXOTrEY6TgAiA6UyOq25ZMwYH6WuNuabad Br9xXDhLEklM+KSF59IKvax3eY8EfdLFG1TDsPa8/vSB9DfDn7rtMy1ZJE8oeEq0uQcg nkvDGvDFmOHrFDui/DNW1haddvbU1ZmgSYlu0= Received: by 10.223.6.201 with SMTP id a9mr1992435faa.110.1307527414990; Wed, 08 Jun 2011 03:03:34 -0700 (PDT) Received: from shaker64.lan (dslb-088-073-061-184.pools.arcor-ip.net [88.73.61.184]) by mx.google.com with ESMTPS id e15sm153481faa.47.2011.06.08.03.03.33 (version=SSLv3 cipher=OTHER); Wed, 08 Jun 2011 03:03:34 -0700 (PDT) From: Jonas Gorski To: Ralf Baechle , Florian Fainelli Cc: linux-mips@linux-mips.org Subject: [PATCH] MIPS: bcm63xx: remove duplicate PERF_IRQSTAT_REG definition Date: Wed, 8 Jun 2011 12:03:02 +0200 Message-Id: <1307527382-23623-1-git-send-email-jonas.gorski@gmail.com> X-Mailer: git-send-email 1.7.2.5 X-archive-position: 30293 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jonas.gorski@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6664 Content-Length: 620 Lines: 21 Signed-off-by: Jonas Gorski --- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h index 85fd275..0ed5230 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h @@ -89,7 +89,6 @@ /* Interrupt Mask register */ #define PERF_IRQMASK_REG 0xc -#define PERF_IRQSTAT_REG 0x10 /* Interrupt Status register */ #define PERF_IRQSTAT_REG 0x10 -- 1.7.2.5 From florian@openwrt.org Wed Jun 8 12:06:08 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jun 2011 12:06:13 +0200 (CEST) Received: from mail-ww0-f43.google.com ([74.125.82.43]:49049 "EHLO mail-ww0-f43.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491050Ab1FHKGI (ORCPT ); Wed, 8 Jun 2011 12:06:08 +0200 Received: by wwb17 with SMTP id 17so295017wwb.24 for ; Wed, 08 Jun 2011 03:06:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:sender:from:organization:to:subject:date :user-agent:cc:references:in-reply-to:mime-version:content-type :content-transfer-encoding:message-id; bh=60GUw7n+z1w5ETNClsllSqCLXPU9TRvw/XHSaIwJZGU=; b=B4jA9dEuruAuyAgqnwJKru7srkAgX2m5nAb+0qnoayCgOPKnCJbngl/iQQE3rU52kX vqdMj5p4jO/6F654XY97yrZ0/IT3MR8dM3vucC3N4gg6dRj0wjvymA9QKzsaLc9nbYE2 xQAcN+wdhjtjPYQPuvZkkfG8k2FH10PzzL7BY= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:organization:to:subject:date:user-agent:cc:references :in-reply-to:mime-version:content-type:content-transfer-encoding :message-id; b=eEqn7iSOBkncjGi/JUwbcKVlDWHK55x1O1IsPhgaWYANw1Wbz9ZYxtj9Hae09HNyjz 0UGs27kGq8TK3ZMlmyAzKnrYz+gTJerqH2VodkclH27vSXMTFAF84tWA9RRog8dGlEnR MlPaObpwZv0oqinHVTkyYtLam9BZGMMK2tpVs= Received: by 10.216.142.133 with SMTP id i5mr7250030wej.43.1307527563266; Wed, 08 Jun 2011 03:06:03 -0700 (PDT) Received: from flexo.localnet (bobafett.staff.proxad.net [213.228.1.121]) by mx.google.com with ESMTPS id n20sm179690weq.39.2011.06.08.03.06.01 (version=SSLv3 cipher=OTHER); Wed, 08 Jun 2011 03:06:02 -0700 (PDT) From: Florian Fainelli Organization: OpenWrt To: Geert Uytterhoeven Subject: Re: Converting MIPS to Device Tree Date: Wed, 8 Jun 2011 12:10:22 +0200 User-Agent: KMail/1.13.6 (Linux/2.6.38-8-server; KDE/4.6.2; x86_64; ; ) Cc: David VomLehn , Grant Likely , Ralf Baechle , linux-mips@linux-mips.org, Imre Kaloz , Gabor Juhos , John Crispin , "Dezhong Diao (dediao)" , Thomas Gleixner References: <20110606010753.GA16202@linux-mips.org> <20110607230218.GA23552@dvomlehn-lnx2.corp.sa.net> In-Reply-To: MIME-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201106081210.22284.florian@openwrt.org> X-archive-position: 30294 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6667 Content-Length: 1374 Lines: 33 On Wednesday 08 June 2011 09:15:14 Geert Uytterhoeven wrote: > On Wed, Jun 8, 2011 at 01:02, David VomLehn wrote: > > I took a look at the issue of passing device trees to the kernel and > > started by surveying the methods currently in use for passing > > information from the bootloader to the kernel. I came up with the ten > > approaches: > > > > How MIPS Bootloaders Pass Information to the Kernel > > --------------------------------------------------- > > Apologies for any errors; this was meant more to be a quick survey > > rather than a detailed analysis. > > > > 6. a0 - argc > > a1 - argv > > a2 - non-standard envp > > Command line created by concatenating argv strings, starting at > > argv[1]. The envp is a pointer to a list of char ptr to name/char > > ptr pairs. > > Platforms: txx9 > > This depends on the actual boot loader. My rbtx4927 has a VxWorks boot > loader, which just doesn't pass anything. > > Cfr. commit 97b0511ce125b0cb95d73b198c1bdbb3cebc4de2 ("MIPS: TXx9: > Make firmware parameter passing more robust"). Actually most devices out there OpenWrt is dealing with are in this situation. Most of the time because the boot loader was highly hacked and/or locked down. In the best cases we can get the bootloader to pass a valid command-line to the kernel. -- Florian From florian@openwrt.org Wed Jun 8 12:10:02 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jun 2011 12:10:05 +0200 (CEST) Received: from mail-wy0-f177.google.com ([74.125.82.177]:33835 "EHLO mail-wy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491050Ab1FHKKC (ORCPT ); Wed, 8 Jun 2011 12:10:02 +0200 Received: by wyb28 with SMTP id 28so297878wyb.36 for ; Wed, 08 Jun 2011 03:09:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:sender:from:organization:to:subject:date :user-agent:cc:references:in-reply-to:mime-version:content-type :content-transfer-encoding:message-id; bh=+FZfwqk3Vf3l+NBjW/fLN/awIRpNms37Srr5EhUKCdk=; b=rL65kiiU8isyWaTz4yKCbCHv2ZAS1DlpOICJjMyA0ej5fUqOQHtpE/2Pp1t6gZ2UnG 08ITojJOOBScpg8WbvL6dRiDk6fp41PghHglf1CSAqjiCDPi7d0hMGy/FVqG7ykCErHZ VnYka/UclMQpq68LOPiUZw/eR6V5q54NcT2S8= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:organization:to:subject:date:user-agent:cc:references :in-reply-to:mime-version:content-type:content-transfer-encoding :message-id; b=pulszT3574QWz2kw6u5pllZFrGryhrOi1CxpskfmrZEicozke8SYTIubu3763fb/PP P7JgVFOPRvp/KqFhYCRo6Iqa6PkQvIOdW9L+qJGzSlA2DWWBWk2mpQbw3LUDyadmBr0j GNVOnYJIKETQD7JcepBnXe/ZsIxCh9RYeUUSw= Received: by 10.227.131.31 with SMTP id v31mr7446636wbs.19.1307527796994; Wed, 08 Jun 2011 03:09:56 -0700 (PDT) Received: from flexo.localnet (bobafett.staff.proxad.net [213.228.1.121]) by mx.google.com with ESMTPS id en1sm284715wbb.35.2011.06.08.03.09.55 (version=SSLv3 cipher=OTHER); Wed, 08 Jun 2011 03:09:56 -0700 (PDT) From: Florian Fainelli Organization: OpenWrt To: Jonas Gorski Subject: Re: [PATCH] MIPS: bcm63xx: remove duplicate PERF_IRQSTAT_REG definition Date: Wed, 8 Jun 2011 12:14:16 +0200 User-Agent: KMail/1.13.6 (Linux/2.6.38-8-server; KDE/4.6.2; x86_64; ; ) Cc: Ralf Baechle , linux-mips@linux-mips.org References: <1307527382-23623-1-git-send-email-jonas.gorski@gmail.com> In-Reply-To: <1307527382-23623-1-git-send-email-jonas.gorski@gmail.com> MIME-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201106081214.16538.florian@openwrt.org> X-archive-position: 30295 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6674 Content-Length: 746 Lines: 22 On Wednesday 08 June 2011 12:03:02 Jonas Gorski wrote: > Signed-off-by: Jonas Gorski Acked-by: Florian Fainelli > --- > arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 1 - > 1 files changed, 0 insertions(+), 1 deletions(-) > > diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h > b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h index 85fd275..0ed5230 > 100644 > --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h > +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h > @@ -89,7 +89,6 @@ > > /* Interrupt Mask register */ > #define PERF_IRQMASK_REG 0xc > -#define PERF_IRQSTAT_REG 0x10 > > /* Interrupt Status register */ > #define PERF_IRQSTAT_REG 0x10 From ralf@linux-mips.org Wed Jun 8 13:50:48 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jun 2011 13:50:50 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:57349 "EHLO duck.linux-mips.net" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491111Ab1FHLus (ORCPT ); Wed, 8 Jun 2011 13:50:48 +0200 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.3) with ESMTP id p58BpXiP003025; Wed, 8 Jun 2011 12:51:34 +0100 Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id p58BpX7k003023; Wed, 8 Jun 2011 12:51:33 +0100 Date: Wed, 8 Jun 2011 12:51:33 +0100 From: Ralf Baechle To: Jonas Gorski Cc: Florian Fainelli , linux-mips@linux-mips.org Subject: Re: [PATCH] MIPS: bcm63xx: remove duplicate PERF_IRQSTAT_REG definition Message-ID: <20110608115133.GA7522@linux-mips.org> References: <1307527382-23623-1-git-send-email-jonas.gorski@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1307527382-23623-1-git-send-email-jonas.gorski@gmail.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 30296 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6759 Content-Length: 25 Lines: 3 Thanks, applied. Ralf From ralf@linux-mips.org Wed Jun 8 16:04:59 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jun 2011 16:05:02 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:54893 "EHLO duck.linux-mips.net" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491127Ab1FHOE7 (ORCPT ); Wed, 8 Jun 2011 16:04:59 +0200 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.3) with ESMTP id p58E4PGK004627; Wed, 8 Jun 2011 15:04:25 +0100 Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id p58E4GSD004616; Wed, 8 Jun 2011 15:04:16 +0100 Date: Wed, 8 Jun 2011 15:04:16 +0100 From: Ralf Baechle To: Eric Paris Cc: linux-kernel@vger.kernel.org, tony.luck@intel.com, fenghua.yu@intel.com, monstr@monstr.eu, benh@kernel.crashing.org, paulus@samba.org, schwidefsky@de.ibm.com, heiko.carstens@de.ibm.com, linux390@de.ibm.com, lethal@linux-sh.org, davem@davemloft.net, jdike@addtoit.com, richard@nod.at, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, viro@zeniv.linux.org.uk, oleg@redhat.com, akpm@linux-foundation.org, linux-ia64@vger.kernel.org, microblaze-uclinux@itee.uq.edu.au, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net Subject: Re: [PATCH -v2] Audit: push audit success and retcode into arch ptrace.h Message-ID: <20110608140416.GA19926@linux-mips.org> References: <20110603220451.23134.47368.stgit@paris.rdu.redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20110603220451.23134.47368.stgit@paris.rdu.redhat.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 30297 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6849 Content-Length: 242 Lines: 11 On Fri, Jun 03, 2011 at 06:04:51PM -0400, Eric Paris wrote: Thanks, this looks good & compiles, so: Acked-by: Ralf Baechle I will rebase my pending MIPS audit patches on top of this patch and resend. Thanks, Ralf From oleg@redhat.com Wed Jun 8 18:39:35 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jun 2011 18:39:41 +0200 (CEST) Received: from mx1.redhat.com ([209.132.183.28]:64916 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491132Ab1FHQjf (ORCPT ); Wed, 8 Jun 2011 18:39:35 +0200 Received: from int-mx01.intmail.prod.int.phx2.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p58GcWWe021318 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 8 Jun 2011 12:38:32 -0400 Received: from tranklukator.englab.brq.redhat.com (dhcp-1-166.brq.redhat.com [10.34.1.166]) by int-mx01.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with SMTP id p58GcODo008729; Wed, 8 Jun 2011 12:38:24 -0400 Received: by tranklukator.englab.brq.redhat.com (nbSMTP-1.00) for uid 500 oleg@redhat.com; Wed, 8 Jun 2011 18:37:01 +0200 (CEST) Date: Wed, 8 Jun 2011 18:36:53 +0200 From: Oleg Nesterov To: Eric Paris Cc: linux-kernel@vger.kernel.org, tony.luck@intel.com, fenghua.yu@intel.com, monstr@monstr.eu, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, schwidefsky@de.ibm.com, heiko.carstens@de.ibm.com, linux390@de.ibm.com, lethal@linux-sh.org, davem@davemloft.net, jdike@addtoit.com, richard@nod.at, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, viro@zeniv.linux.org.uk, akpm@linux-foundation.org, linux-ia64@vger.kernel.org, microblaze-uclinux@itee.uq.edu.au, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net Subject: Re: [PATCH -v2] Audit: push audit success and retcode into arch ptrace.h Message-ID: <20110608163653.GA9592@redhat.com> References: <20110603220451.23134.47368.stgit@paris.rdu.redhat.com> <20110607171952.GA25729@redhat.com> <1307472796.2052.12.camel@localhost.localdomain> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1307472796.2052.12.camel@localhost.localdomain> User-Agent: Mutt/1.5.18 (2008-05-17) X-Scanned-By: MIMEDefang 2.67 on 10.5.11.11 X-archive-position: 30298 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: oleg@redhat.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6996 Content-Length: 1102 Lines: 27 On 06/07, Eric Paris wrote: > > On Tue, 2011-06-07 at 19:19 +0200, Oleg Nesterov wrote: > > > > With or without this patch, can't we call audit_syscall_exit() twice > > if there is something else in _TIF_WORK_SYSCALL_EXIT mask apart from > > SYSCALL_AUDIT ? First time it is called from asm, then from > > syscall_trace_leave(), no? > > > > For example. The task has TIF_SYSCALL_AUDIT and nothing else, it does > > system_call->auditsys->system_call_fastpath. What if it gets, say, > > TIF_SYSCALL_TRACE before ret_from_sys_call? > > No harm is done calling twice. The first call will do the real work and > cleanup. It will set a flag in the audit data that the work has been > done (in_syscall == 0) thus the second call will then not do any real > work and won't have anything to clean up. Hmm... and I assume context->previous != NULL is not possible on x86_64. OK, thanks. And I guess, all CONFIG_AUDITSYSCALL code in entry.S is only needed to microoptimize the case when TIF_SYSCALL_AUDIT is the only reason for the slow path. I wonder if it really makes the measureble difference... Oleg. From eparis@redhat.com Wed Jun 8 20:14:40 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jun 2011 20:14:47 +0200 (CEST) Received: from mx1.redhat.com ([209.132.183.28]:42380 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491149Ab1FHSOk (ORCPT ); Wed, 8 Jun 2011 20:14:40 +0200 Received: from int-mx01.intmail.prod.int.phx2.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p58IDh8F024570 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 8 Jun 2011 14:13:43 -0400 Received: from [10.11.235.183] (dhcp235-183.rdu.redhat.com [10.11.235.183]) by int-mx01.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id p58IDaO1009617; Wed, 8 Jun 2011 14:13:37 -0400 Subject: Re: [PATCH -v2] Audit: push audit success and retcode into arch ptrace.h From: Eric Paris To: Oleg Nesterov Cc: linux-kernel@vger.kernel.org, tony.luck@intel.com, fenghua.yu@intel.com, monstr@monstr.eu, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, schwidefsky@de.ibm.com, heiko.carstens@de.ibm.com, linux390@de.ibm.com, lethal@linux-sh.org, davem@davemloft.net, jdike@addtoit.com, richard@nod.at, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, viro@zeniv.linux.org.uk, akpm@linux-foundation.org, linux-ia64@vger.kernel.org, microblaze-uclinux@itee.uq.edu.au, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net Date: Wed, 08 Jun 2011 14:13:36 -0400 In-Reply-To: <20110608163653.GA9592@redhat.com> References: <20110603220451.23134.47368.stgit@paris.rdu.redhat.com> <20110607171952.GA25729@redhat.com> <1307472796.2052.12.camel@localhost.localdomain> <20110608163653.GA9592@redhat.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Message-ID: <1307556823.2577.5.camel@localhost.localdomain> Mime-Version: 1.0 X-Scanned-By: MIMEDefang 2.67 on 10.5.11.11 X-archive-position: 30299 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: eparis@redhat.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7070 Content-Length: 1708 Lines: 40 On Wed, 2011-06-08 at 18:36 +0200, Oleg Nesterov wrote: > On 06/07, Eric Paris wrote: > > > > On Tue, 2011-06-07 at 19:19 +0200, Oleg Nesterov wrote: > > > > > > With or without this patch, can't we call audit_syscall_exit() twice > > > if there is something else in _TIF_WORK_SYSCALL_EXIT mask apart from > > > SYSCALL_AUDIT ? First time it is called from asm, then from > > > syscall_trace_leave(), no? > > > > > > For example. The task has TIF_SYSCALL_AUDIT and nothing else, it does > > > system_call->auditsys->system_call_fastpath. What if it gets, say, > > > TIF_SYSCALL_TRACE before ret_from_sys_call? > > > > No harm is done calling twice. The first call will do the real work and > > cleanup. It will set a flag in the audit data that the work has been > > done (in_syscall == 0) thus the second call will then not do any real > > work and won't have anything to clean up. > > Hmm... and I assume context->previous != NULL is not possible on x86_64. > OK, thanks. > > And I guess, all CONFIG_AUDITSYSCALL code in entry.S is only needed to > microoptimize the case when TIF_SYSCALL_AUDIT is the only reason for the > slow path. I wonder if it really makes the measureble difference... All I know is what Roland put in the changelog: Avoiding the iret return path when syscall audit is enabled helps performance a lot. I believe this was a result of Fedora starting auditd by default and then Linus bitching about how slow a null syscall in a tight loop was. It was an optimization for a microbenchmark. How much it affects things on a real syscall that does real work is probably going to be determined by how much work is done in the syscall. (or just disable auditd in userspace) -Eric From oleg@redhat.com Wed Jun 8 20:39:30 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jun 2011 20:39:39 +0200 (CEST) Received: from mx1.redhat.com ([209.132.183.28]:32773 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491190Ab1FHSja (ORCPT ); Wed, 8 Jun 2011 20:39:30 +0200 Received: from int-mx12.intmail.prod.int.phx2.redhat.com (int-mx12.intmail.prod.int.phx2.redhat.com [10.5.11.25]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p58Id1Dl030763 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 8 Jun 2011 14:39:01 -0400 Received: from tranklukator.englab.brq.redhat.com (dhcp-1-166.brq.redhat.com [10.34.1.166]) by int-mx12.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with SMTP id p58IcpYE003255; Wed, 8 Jun 2011 14:38:51 -0400 Received: by tranklukator.englab.brq.redhat.com (nbSMTP-1.00) for uid 500 oleg@redhat.com; Wed, 8 Jun 2011 20:37:30 +0200 (CEST) Date: Wed, 8 Jun 2011 20:37:20 +0200 From: Oleg Nesterov To: Eric Paris Cc: linux-kernel@vger.kernel.org, tony.luck@intel.com, fenghua.yu@intel.com, monstr@monstr.eu, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, schwidefsky@de.ibm.com, heiko.carstens@de.ibm.com, linux390@de.ibm.com, lethal@linux-sh.org, davem@davemloft.net, jdike@addtoit.com, richard@nod.at, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, viro@zeniv.linux.org.uk, akpm@linux-foundation.org, linux-ia64@vger.kernel.org, microblaze-uclinux@itee.uq.edu.au, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net Subject: Re: [PATCH -v2] Audit: push audit success and retcode into arch ptrace.h Message-ID: <20110608183720.GA16883@redhat.com> References: <20110603220451.23134.47368.stgit@paris.rdu.redhat.com> <20110607171952.GA25729@redhat.com> <1307472796.2052.12.camel@localhost.localdomain> <20110608163653.GA9592@redhat.com> <1307556823.2577.5.camel@localhost.localdomain> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1307556823.2577.5.camel@localhost.localdomain> User-Agent: Mutt/1.5.18 (2008-05-17) X-Scanned-By: MIMEDefang 2.68 on 10.5.11.25 X-archive-position: 30300 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: oleg@redhat.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7088 Content-Length: 916 Lines: 24 On 06/08, Eric Paris wrote: > > On Wed, 2011-06-08 at 18:36 +0200, Oleg Nesterov wrote: > > And I guess, all CONFIG_AUDITSYSCALL code in entry.S is only needed to > > microoptimize the case when TIF_SYSCALL_AUDIT is the only reason for the > > slow path. I wonder if it really makes the measureble difference... > > All I know is what Roland put in the changelog: > > Avoiding the iret return path when syscall audit is enabled helps > performance a lot. > > I believe this was a result of Fedora starting auditd by default and > then Linus bitching about how slow a null syscall in a tight loop was. > It was an optimization for a microbenchmark. How much it affects things > on a real syscall that does real work is probably going to be determined > by how much work is done in the syscall. and probably by how much work is done in audit_syscall_entry/exit. OK. Thanks a lot Eric for your explanations. Oleg. From oleg@redhat.com Wed Jun 8 21:21:55 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jun 2011 21:22:02 +0200 (CEST) Received: from mx1.redhat.com ([209.132.183.28]:21206 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491190Ab1FHTVz (ORCPT ); Wed, 8 Jun 2011 21:21:55 +0200 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p58JKnLT020232 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 8 Jun 2011 15:20:50 -0400 Received: from tranklukator.englab.brq.redhat.com (dhcp-1-166.brq.redhat.com [10.34.1.166]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with SMTP id p58JKfox006474; Wed, 8 Jun 2011 15:20:41 -0400 Received: by tranklukator.englab.brq.redhat.com (nbSMTP-1.00) for uid 500 oleg@redhat.com; Wed, 8 Jun 2011 21:19:18 +0200 (CEST) Date: Wed, 8 Jun 2011 21:19:10 +0200 From: Oleg Nesterov To: Eric Paris Cc: linux-kernel@vger.kernel.org, tony.luck@intel.com, fenghua.yu@intel.com, monstr@monstr.eu, ralf@linux-mips.org, benh@kernel.crashing.org, paulus@samba.org, schwidefsky@de.ibm.com, heiko.carstens@de.ibm.com, linux390@de.ibm.com, lethal@linux-sh.org, davem@davemloft.net, jdike@addtoit.com, richard@nod.at, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, viro@zeniv.linux.org.uk, akpm@linux-foundation.org, linux-ia64@vger.kernel.org, microblaze-uclinux@itee.uq.edu.au, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net Subject: Re: [PATCH -v2] Audit: push audit success and retcode into arch ptrace.h Message-ID: <20110608191910.GA18698@redhat.com> References: <20110603220451.23134.47368.stgit@paris.rdu.redhat.com> <20110607171952.GA25729@redhat.com> <1307472796.2052.12.camel@localhost.localdomain> <20110608163653.GA9592@redhat.com> <1307556823.2577.5.camel@localhost.localdomain> <20110608183720.GA16883@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20110608183720.GA16883@redhat.com> User-Agent: Mutt/1.5.18 (2008-05-17) X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-archive-position: 30301 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: oleg@redhat.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7122 Content-Length: 1283 Lines: 46 On 06/08, Oleg Nesterov wrote: > > OK. Thanks a lot Eric for your explanations. Yes. but may I ask another one? Shouldn't copy_process()->audit_alloc(tsk) path do clear_tsk_thread_flag(tsk, TIF_SYSCALL_AUDIT) if it doesn't set tsk->audit_context? I can be easily wrong, but afaics otherwise the child can run with TIF_SYSCALL_AUDIT bit copied from parent's thread_info by dup_task_struct()->setup_thread_stack() and without ->audit_context, right? For what? Any other reason why audit_syscall_entry() checks context != NULL? IOW. Any reason the patch below is wrong? I am just curious, thanks. Oleg. --- x/kernel/auditsc.c +++ x/kernel/auditsc.c @@ -885,6 +885,8 @@ int audit_alloc(struct task_struct *tsk) if (likely(!audit_ever_enabled)) return 0; /* Return if not auditing. */ + clear_tsk_thread_flag(tsk, TIF_SYSCALL_AUDIT); + state = audit_filter_task(tsk, &key); if (likely(state == AUDIT_DISABLED)) return 0; @@ -1591,9 +1593,7 @@ void audit_syscall_entry(int arch, int m struct audit_context *context = tsk->audit_context; enum audit_state state; - if (unlikely(!context)) - return; - + BUG_ON(!context); /* * This happens only on certain architectures that make system * calls in kernel_thread via the entry.S interface, instead of From Bo.Liu@windriver.com Thu Jun 9 04:20:01 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jun 2011 04:20:07 +0200 (CEST) Received: from mail.windriver.com ([147.11.1.11]:56649 "EHLO mail.windriver.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490945Ab1FICUB (ORCPT ); Thu, 9 Jun 2011 04:20:01 +0200 Received: from ALA-HCA.corp.ad.wrs.com (ala-hca [147.11.189.40]) by mail.windriver.com (8.14.3/8.14.3) with ESMTP id p592JcO6002506 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=FAIL); Wed, 8 Jun 2011 19:19:38 -0700 (PDT) Received: from tonyliu-laptop.wrs.com (128.224.162.208) by ALA-HCA.corp.ad.wrs.com (147.11.189.50) with Microsoft SMTP Server id 14.1.255.0; Wed, 8 Jun 2011 19:19:38 -0700 Message-ID: <4DF02DAA.7070902@windriver.com> Date: Thu, 9 Jun 2011 10:19:22 +0800 From: Tonyliu Reply-To: User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.1.9) Gecko/20100423 Thunderbird/3.0.4 MIME-Version: 1.0 To: Ralf Baechle CC: , Grant Likely , Imre Kaloz , Gabor Juhos , John Crispin , Dezhong Diao , Thomas Gleixner Subject: Re: Converting MIPS to Device Tree References: <20110606010753.GA16202@linux-mips.org> In-Reply-To: <20110606010753.GA16202@linux-mips.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-archive-position: 30302 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: Bo.Liu@windriver.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7476 Content-Length: 2869 Lines: 72 于 2011年06月06日 09:07, Ralf Baechle 写道: > Over the past few days I've started to convert arch/mips to use DT. So > far none of the platforms (except maybe PowerTV?) seems to have a > firmware that is passing a DT nor is there any 2nd stage bootloader that > could do so. > > So as the 2nd best thing I've been working on .dts files to be compiled > into the images. > > I've put a git tree of my current working tree online. It's absolutely > work in progress so expect to encounter bugs. > > http://git.linux-mips.org/?p=linux-dt.git;a=summary (Gitweb) > git://git.linux-mips.org/linux-dt.git > should be git://git.linux-mips.org/pub/scm/linux-dt.git tonyliu@tonyliu-laptop:/opt/git-root$ git clone git://git.linux-mips.org/linux-dt.git dt-linux_mips Initialized empty Git repository in /opt/git-root/dt-linux_mips/.git/ fatal: The remote end hung up unexpectedly tonyliu@tonyliu-laptop:/opt/git-root$ git clone git://git.linux-mips.org/pub/scm/linux-dt.git dt-linux_mips Initialized empty Git repository in /opt/git-root/dt-linux_mips/.git/ remote: Counting objects: 2448486, done. remote: Compressing objects: 100% (446507/446507), done. Receiving objects: 0% (14786/2448486), 5.26 MiB | 7 KiB/s Receiving objects: 0% (18463/2448486), 6.56 MiB | 12 KiB/s Receiving objects: 2% (67572/2448486), 24.25 MiB | 11 KiB/s Receiving objects: 100% (2448486/2448486), 611.83 MiB | 309 KiB/s, done. remote: Total 2448486 (delta 2040537), reused 2388725 (delta 1982106) Resolving deltas: 100% (2040537/2040537), done. Checking out files: 100% (36749/36749), done. Tony > http://www.linux-mips.org/wiki/Device_Tree (brief documentation& links) > > An incomplete to do list: > > o Sort out interface for firmware to pass a DT to the kernel. Because we > have so many different firmware implementations this one might get a > slight bit interesting. > o Interface to select one of several builtin DT images. I am thinking of > extending the existing MIPS_MACHINE() / machtype mechanism to play > nicely with DT. > o Finish and test AR7, Cobalt, Jazz, Malta, MIPSsim and SNI ports. > o Convert the remaining platforms; find if it's actually sensible to > convert all platforms. > o I'm considering to make DT support a requirement for future MIPS > platforms so you might as well start beating your firmware monkeys / > ask Santa to put you a shiny new bootloader blob into the boot now. > o Write more of the required infrastructure. > o Write documentation > > Contributions and comments welcome, > > Ralf > > > -- Tony Liu | Liu Bo ------------------------------------------------------------- WIND RIVER | China Development Center Tel: 86-10-8477-8542 ext: 8542 | Fax: 86-10-64790367 (M): 86-136-7117-3612 Address: 15/F, Wangjing TowerB, Chaoyang District, Beijing, P.R.China From benh@kernel.crashing.org Thu Jun 9 07:08:15 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jun 2011 07:08:19 +0200 (CEST) Received: from gate.crashing.org ([63.228.1.57]:56636 "EHLO gate.crashing.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490954Ab1FIFIP (ORCPT ); Thu, 9 Jun 2011 07:08:15 +0200 Received: from [IPv6:::1] (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id p5956Uw9022243; Thu, 9 Jun 2011 00:06:31 -0500 Subject: Re: [PATCH] Fix build warning of the defconfigs From: Benjamin Herrenschmidt To: Wanlong Gao Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, uclinux-dist-devel@blackfin.uclinux.org, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org, linux-sh@vger.kernel.org, linux@arm.linux.org.uk, hans-christian.egtvedt@atmel.com, vapier@gentoo.org, ralf@linux-mips.org, paulus@samba.org, lethal@linux-sh.org, gxt@mprc.pku.edu.cn, david.woodhouse@intel.com, akpm@linux-foundation.org, u.kleine-koenig@pengutronix.de, mingo@elte.hu, rientjes@google.com, w.sang@pengutronix.de, sam@ravnborg.org, manuel.lauss@googlemail.com, anton@samba.org, arnd@arndb.de In-Reply-To: <1306945763-6583-1-git-send-email-wanlong.gao@gmail.com> References: <1306945763-6583-1-git-send-email-wanlong.gao@gmail.com> Content-Type: text/plain; charset="UTF-8" Date: Thu, 09 Jun 2011 15:06:28 +1000 Message-ID: <1307595988.2874.266.camel@pasglop> Mime-Version: 1.0 X-Mailer: Evolution 2.30.3 Content-Transfer-Encoding: 7bit X-archive-position: 30303 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: benh@kernel.crashing.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7541 Content-Length: 268 Lines: 16 On Thu, 2011-06-02 at 00:29 +0800, Wanlong Gao wrote: > RTC_CLASS is changed to bool. > So value 'm' is invalid. > > Signed-off-by: Wanlong Gao > --- For powerpc: Acked-by: Benjamin Herrenschmidt Thanks ! Ben. From benh@kernel.crashing.org Thu Jun 9 07:26:42 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jun 2011 07:26:45 +0200 (CEST) Received: from gate.crashing.org ([63.228.1.57]:56669 "EHLO gate.crashing.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490954Ab1FIF0m (ORCPT ); Thu, 9 Jun 2011 07:26:42 +0200 Received: from [IPv6:::1] (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id p5959YRR023762; Thu, 9 Jun 2011 00:09:34 -0500 Subject: Re: [patch 13/14] PCSPKR: Cleanup Kconfig dependencies From: Benjamin Herrenschmidt To: ralf@linux-mips.org Cc: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, Richard Henderson , Ivan Kokshaysky , Matt Turner , Paul Mackerras , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, linux-alpha@vger.kernel.org, linux-mips@linux-mips.org, linuxppc-dev@lists.ozlabs.org In-Reply-To: <20110601180610.984881988@duck.linux-mips.net> References: <20110601180456.801265664@duck.linux-mips.net> <20110601180610.984881988@duck.linux-mips.net> Content-Type: text/plain; charset="UTF-8" Date: Thu, 09 Jun 2011 15:09:32 +1000 Message-ID: <1307596172.2874.268.camel@pasglop> Mime-Version: 1.0 X-Mailer: Evolution 2.30.3 Content-Transfer-Encoding: 7bit X-archive-position: 30304 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: benh@kernel.crashing.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7553 Content-Length: 911 Lines: 25 On Wed, 2011-06-01 at 19:05 +0100, ralf@linux-mips.org wrote: > plain text document attachment > (i8253-use-aux-symbol-for-pcspkr-config.patch) > Lenghty lists of the kind "depends on ARCH1 || ARCH2 ... || ARCH123" are > usually either wrong or too coarse grained. Or plain an ugly sin. Acked-by: Benjamin Herrenschmidt --- > Signed-off-by: Ralf Baechle > To: linux-kernel@vger.kernel.org > Cc: Richard Henderson > Cc: Ivan Kokshaysky > Cc: Matt Turner > Cc: Benjamin Herrenschmidt > Cc: Paul Mackerras > Cc: Thomas Gleixner > Cc: Ingo Molnar > Cc: "H. Peter Anvin" > Cc: x86@kernel.org > Cc: linux-alpha@vger.kernel.org > Cc: linux-mips@linux-mips.org > Cc: linuxppc-dev@lists.ozlabs.org From blogic@openwrt.org Thu Jun 9 19:56:05 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jun 2011 19:56:10 +0200 (CEST) Received: from nbd.name ([46.4.11.11]:59681 "EHLO nbd.name" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491051Ab1FIR4F (ORCPT ); Thu, 9 Jun 2011 19:56:05 +0200 From: John Crispin To: Ralf Baechle Cc: John Crispin , linux-mips@linux-mips.org Subject: [PATCH 2/2] MIPS: lantiq: fixes mtd registration of nor device Date: Thu, 9 Jun 2011 19:57:33 +0200 Message-Id: <1307642253-8770-2-git-send-email-blogic@openwrt.org> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1307642253-8770-1-git-send-email-blogic@openwrt.org> References: <1307642253-8770-1-git-send-email-blogic@openwrt.org> X-archive-position: 30305 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: blogic@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8293 Content-Length: 1056 Lines: 34 The 2 functions add_mtd_partitions and del_mtd_partitions were renamed to mtd_device_register and mtd_device_unregister. Signed-of-by: John Crispin Cc: linux-mips@linux-mips.org --- drivers/mtd/maps/lantiq-flash.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/maps/lantiq-flash.c b/drivers/mtd/maps/lantiq-flash.c index a90cabd..7e50896 100644 --- a/drivers/mtd/maps/lantiq-flash.c +++ b/drivers/mtd/maps/lantiq-flash.c @@ -182,7 +182,7 @@ ltq_mtd_probe(struct platform_device *pdev) parts = ltq_mtd_data->parts; } - err = add_mtd_partitions(ltq_mtd->mtd, parts, nr_parts); + err = mtd_device_register(ltq_mtd->mtd, parts, nr_parts); if (err) { dev_err(&pdev->dev, "failed to add partitions\n"); goto err_destroy; @@ -208,7 +208,7 @@ ltq_mtd_remove(struct platform_device *pdev) if (ltq_mtd) { if (ltq_mtd->mtd) { - del_mtd_partitions(ltq_mtd->mtd); + mtd_device_unregister(ltq_mtd->mtd); map_destroy(ltq_mtd->mtd); } if (ltq_mtd->map->virt) -- 1.7.2.3 From blogic@openwrt.org Thu Jun 9 19:56:05 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jun 2011 19:56:34 +0200 (CEST) Received: from nbd.name ([46.4.11.11]:59683 "EHLO nbd.name" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491059Ab1FIR4F (ORCPT ); Thu, 9 Jun 2011 19:56:05 +0200 From: John Crispin To: Ralf Baechle Cc: John Crispin , linux-mips@linux-mips.org Subject: [PATCH 1/2] MIPS: lantiq: adds missing clk.h functions Date: Thu, 9 Jun 2011 19:57:32 +0200 Message-Id: <1307642253-8770-1-git-send-email-blogic@openwrt.org> X-Mailer: git-send-email 1.7.2.3 X-archive-position: 30306 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: blogic@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8294 Content-Length: 676 Lines: 33 The 2 functions clk_enable() and clk_disable were missing. Signed-of-by: John Crispin Cc: linux-mips@linux-mips.org --- arch/mips/lantiq/clk.c | 11 +++++++++++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/mips/lantiq/clk.c b/arch/mips/lantiq/clk.c index 9456089..aba91db 100644 --- a/arch/mips/lantiq/clk.c +++ b/arch/mips/lantiq/clk.c @@ -100,6 +100,17 @@ void clk_put(struct clk *clk) } EXPORT_SYMBOL(clk_put); +int clk_enable(struct clk *clk) +{ + /* not used */ + return 0; +} + +void clk_disable(struct clk *clk) +{ + /* not used */ +} + static inline u32 ltq_get_counter_resolution(void) { u32 res; -- 1.7.2.3 From manuel.lauss@googlemail.com Thu Jun 9 20:06:13 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jun 2011 20:06:18 +0200 (CEST) Received: from mail-yw0-f49.google.com ([209.85.213.49]:52464 "EHLO mail-yw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491059Ab1FISGN convert rfc822-to-8bit (ORCPT ); Thu, 9 Jun 2011 20:06:13 +0200 Received: by ywf9 with SMTP id 9so1202185ywf.36 for ; Thu, 09 Jun 2011 11:06:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=Erq7HINOQZYCI4yUaCpPjD8IV7J4CA8/HNlON0lwrJI=; b=dIUHQxleNc9RVoaX0ET3iomnw8rRqmBAJsL1ODLH55Y1Ax5y1nS6GbKcFRzcAeHV/F fKmPLokVRvZijuRfvn4sl1HGBaLJDsfX0mh9LBT00DIYO9cM7kuJfybRCEwrpPbOO3Q6 YDAX+/gZ2xj1sEAogk2h9OxW/cYFFhFw5/FmM= DomainKey-Signature: a=rsa-sha1; c=nofws; d=googlemail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=eO9akhI+CQVkrbR9OM7oiVDY4WXZXT1+HsTAzFCx0bgQqk6CKS53XFqC9NRaNdJg8k zgtp9qT7wWgD/JND0lnzvVk+mdNEhC6hggsn+1/bxalZZ7xpg7s8dySTj9KTlHlpMdOE mzzPZr0Iea9Zi7EcVc8181MTZrJSL8qBsgMmc= MIME-Version: 1.0 Received: by 10.236.155.41 with SMTP id i29mr1346748yhk.444.1307642765725; Thu, 09 Jun 2011 11:06:05 -0700 (PDT) Received: by 10.236.95.173 with HTTP; Thu, 9 Jun 2011 11:06:05 -0700 (PDT) In-Reply-To: <1307642253-8770-1-git-send-email-blogic@openwrt.org> References: <1307642253-8770-1-git-send-email-blogic@openwrt.org> Date: Thu, 9 Jun 2011 20:06:05 +0200 Message-ID: Subject: Re: [PATCH 1/2] MIPS: lantiq: adds missing clk.h functions From: Manuel Lauss To: John Crispin Cc: Ralf Baechle , linux-mips@linux-mips.org Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT X-archive-position: 30307 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: manuel.lauss@googlemail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8300 Content-Length: 784 Lines: 32 On Thu, Jun 9, 2011 at 7:57 PM, John Crispin wrote: > The 2 functions clk_enable() and clk_disable were missing. > > Signed-of-by: John Crispin > Cc: linux-mips@linux-mips.org > --- > arch/mips/lantiq/clk.c | 11 +++++++++++ > 1 files changed, 11 insertions(+), 0 deletions(-) > > diff --git a/arch/mips/lantiq/clk.c b/arch/mips/lantiq/clk.c > index 9456089..aba91db 100644 > --- a/arch/mips/lantiq/clk.c > +++ b/arch/mips/lantiq/clk.c > @@ -100,6 +100,17 @@ void clk_put(struct clk *clk) > } > EXPORT_SYMBOL(clk_put); > > +int clk_enable(struct clk *clk) > +{ > + /* not used */ > + return 0; > +} > + > +void clk_disable(struct clk *clk) > +{ > + /* not used */ > +} > + Shouldn't those be exported as well? Manuel From blogic@openwrt.org Thu Jun 9 20:08:23 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jun 2011 20:08:27 +0200 (CEST) Received: from nbd.name ([46.4.11.11]:43997 "EHLO nbd.name" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491059Ab1FISIX (ORCPT ); Thu, 9 Jun 2011 20:08:23 +0200 Message-ID: <4DF10C76.6000408@openwrt.org> Date: Thu, 09 Jun 2011 20:09:58 +0200 From: John Crispin User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.1.12) Gecko/20100913 Icedove/3.0.7 MIME-Version: 1.0 To: Manuel Lauss CC: Ralf Baechle , linux-mips@linux-mips.org Subject: Re: [PATCH 1/2] MIPS: lantiq: adds missing clk.h functions References: <1307642253-8770-1-git-send-email-blogic@openwrt.org> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-archive-position: 30308 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: blogic@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8301 Content-Length: 941 Lines: 42 On 09/06/11 20:06, Manuel Lauss wrote: > On Thu, Jun 9, 2011 at 7:57 PM, John Crispin wrote: > >> The 2 functions clk_enable() and clk_disable were missing. >> >> Signed-of-by: John Crispin >> Cc: linux-mips@linux-mips.org >> --- >> arch/mips/lantiq/clk.c | 11 +++++++++++ >> 1 files changed, 11 insertions(+), 0 deletions(-) >> >> diff --git a/arch/mips/lantiq/clk.c b/arch/mips/lantiq/clk.c >> index 9456089..aba91db 100644 >> --- a/arch/mips/lantiq/clk.c >> +++ b/arch/mips/lantiq/clk.c >> @@ -100,6 +100,17 @@ void clk_put(struct clk *clk) >> } >> EXPORT_SYMBOL(clk_put); >> >> +int clk_enable(struct clk *clk) >> +{ >> + /* not used */ >> + return 0; >> +} >> + >> +void clk_disable(struct clk *clk) >> +{ >> + /* not used */ >> +} >> + >> > Shouldn't those be exported as well? > > Manuel > you are right they should be. will resend in a sec, thx ! John From blogic@openwrt.org Thu Jun 9 20:13:50 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jun 2011 20:13:53 +0200 (CEST) Received: from nbd.name ([46.4.11.11]:34065 "EHLO nbd.name" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491051Ab1FISNu (ORCPT ); Thu, 9 Jun 2011 20:13:50 +0200 From: John Crispin Cc: John Crispin , linux-mips@linux-mips.org Subject: [PATCH V2 1/2] MIPS: lantiq: adds missing clk.h functions Date: Thu, 9 Jun 2011 20:15:21 +0200 Message-Id: <1307643321-10457-1-git-send-email-blogic@openwrt.org> X-Mailer: git-send-email 1.7.2.3 To: unlisted-recipients:; (no To-header on input) X-archive-position: 30309 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: blogic@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8303 Content-Length: 735 Lines: 35 The 2 functions clk_enable() and clk_disable were missing. Signed-of-by: John Crispin Cc: linux-mips@linux-mips.org --- arch/mips/lantiq/clk.c | 13 +++++++++++++ 1 files changed, 13 insertions(+), 0 deletions(-) diff --git a/arch/mips/lantiq/clk.c b/arch/mips/lantiq/clk.c index 9456089..7e9c0ff 100644 --- a/arch/mips/lantiq/clk.c +++ b/arch/mips/lantiq/clk.c @@ -100,6 +100,19 @@ void clk_put(struct clk *clk) } EXPORT_SYMBOL(clk_put); +int clk_enable(struct clk *clk) +{ + /* not used */ + return 0; +} +EXPORT_SYMBOL(clk_enable); + +void clk_disable(struct clk *clk) +{ + /* not used */ +} +EXPORT_SYMBOL(clk_disable); + static inline u32 ltq_get_counter_resolution(void) { u32 res; -- 1.7.2.3 From guenter.roeck@ericsson.com Thu Jun 9 23:08:51 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jun 2011 23:08:54 +0200 (CEST) Received: from imr4.ericy.com ([198.24.6.8]:48576 "EHLO imr4.ericy.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491096Ab1FIVIv (ORCPT ); Thu, 9 Jun 2011 23:08:51 +0200 Received: from eusaamw0707.eamcs.ericsson.se ([147.117.20.32]) by imr4.ericy.com (8.14.3/8.14.3/Debian-9.1ubuntu1) with ESMTP id p59L8NG4031590; Thu, 9 Jun 2011 16:08:39 -0500 Received: from [155.53.96.104] (147.117.20.214) by eusaamw0707.eamcs.ericsson.se (147.117.20.92) with Microsoft SMTP Server id 8.3.137.0; Thu, 9 Jun 2011 17:08:34 -0400 Subject: Linux 2.6.39 on Cavium CN38xx From: Guenter Roeck Reply-To: guenter.roeck@ericsson.com To: linux-mips@linux-mips.org CC: David Daney Content-Type: text/plain; charset="UTF-8" Organization: Ericsson Date: Thu, 9 Jun 2011 14:08:34 -0700 Message-ID: <1307653714.8271.130.camel@groeck-laptop> MIME-Version: 1.0 X-Mailer: Evolution 2.28.3 Content-Transfer-Encoding: 7bit X-archive-position: 30310 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: guenter.roeck@ericsson.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8505 Content-Length: 2287 Lines: 76 Hi folks, I am trying to get Linux 2.6.39 to run on a board with Cavium CN38xx (pass 3, cpu ID 0x000d0003). Problem I have is that CPUs 1..15 come online, but get stuck in and endless interrupt handling loop as soon as interrupts are enabled. I attached a log generated with instrumentation code in the interrupt handler. Any idea what I might be doing wrong ? Note that I don't start the system from u-boot; the board uses OFW, so some register initialization may be wrong. I did see commit dbb103b243e09475c84df2b8ef17615975593761, but I have no idea if my problem may be related. Thanks, Guenter ------------------------------ SMP: Booting CPU09 (CoreId 9)... Core 9 ALIVE --- waiting for CPU 9 CPU revision is: 000d0003 (Cavium Octeon) --- ### CPU 9 SR=0x100000e0 ---- set CPU 9 (9) callin map bit ---- CPU 9 (9) call cpu_idle CPU 9: IRQ cause 0x0 status 0:0:0:0:0:0 Cpu 9 $ 0 : 0000000000000000 000000001000efe1 ffffffff81582db8 00000000000001ff $ 4 : 0000000000000009 0000000000000009 0000000000000048 0000000000000000 $ 8 : 0000000000000000 0000000000000008 0000000000000000 0000000000000000 $12 : 0000000000000000 ffffffff812b69bc ffffffff8140aed0 ffffffffbfc02334 $16 : ffffffff81582db8 0000000000000009 ffffffff815f07b0 ffffffff81582db8 $20 : ffffffff815e38d0 ffffffff815830f0 ffffffff815de600 ffffffff81420000 $24 : 0000000000000001 ffffffff8110e870 $28 : a80000041fe20000 a80000041fe23bf0 0000000000000003 ffffffff8110a60c Hi : 000000000b71b000 Lo : 000000000a037a00 epc : ffffffff8140d8e4 schedule+0xdc/0xde8 Not tainted ra : ffffffff8110a60c cpu_idle+0x2fc/0x350 Status: 1000efe3 KX SX UX KERNEL EXL IE Cause : 40800000 PrId : 000d0003 (Cavium Octeon) Call Trace: [] dump_stack+0x8/0x34 [] plat_irq_dispatch+0x2bc/0x2c8 [] ret_from_irq+0x0/0x4 [] schedule+0xdc/0xde8 [] cpu_idle+0x2fc/0x350 --- 2nd and subsequent interrupts: CPU 9: IRQ cause 0x0 status 0:0:0:0:0:0 Call Trace: [] dump_stack+0x8/0x34 [] plat_irq_dispatch+0x1c4/0x2c8 [] ret_from_irq+0x0/0x4 [] schedule+0xdc/0xde8 [] cpu_idle+0x2fc/0x350 From ddaney@caviumnetworks.com Thu Jun 9 23:42:04 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jun 2011 23:42:08 +0200 (CEST) Received: from mail3.caviumnetworks.com ([12.108.191.235]:4639 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491079Ab1FIVmE (ORCPT ); Thu, 9 Jun 2011 23:42:04 +0200 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Thu, 09 Jun 2011 14:43:08 -0700 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.4675); Thu, 9 Jun 2011 14:42:02 -0700 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Thu, 9 Jun 2011 14:42:02 -0700 Message-ID: <4DF13E25.2060502@caviumnetworks.com> Date: Thu, 09 Jun 2011 14:41:57 -0700 From: David Daney User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.15) Gecko/20101027 Fedora/3.0.10-1.fc12 Thunderbird/3.0.10 MIME-Version: 1.0 To: guenter.roeck@ericsson.com CC: linux-mips@linux-mips.org Subject: Re: Linux 2.6.39 on Cavium CN38xx References: <1307653714.8271.130.camel@groeck-laptop> In-Reply-To: <1307653714.8271.130.camel@groeck-laptop> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 09 Jun 2011 21:42:02.0666 (UTC) FILETIME=[119FD0A0:01CC26EE] X-archive-position: 30311 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8539 Content-Length: 2844 Lines: 97 On 06/09/2011 02:08 PM, Guenter Roeck wrote: > Hi folks, > > I am trying to get Linux 2.6.39 Where did you get your 2.6.39? Or in othe rwords, what's the SHA1 Kenneth? And, what is your .config? > to run on a board with Cavium CN38xx > (pass 3, cpu ID 0x000d0003). > > Problem I have is that CPUs 1..15 come online, but get stuck in and > endless interrupt handling loop as soon as interrupts are enabled. I > attached a log generated with instrumentation code in the interrupt > handler. > > Any idea what I might be doing wrong ? Note that I don't start the > system from u-boot; the board uses OFW, so some register initialization > may be wrong. > Octeon only supports the Octeon u-boot 'bootoctlinux' protocol. You have to make sure that the octeon_bootinfo structure is filled in properly, and all the CPUs in the core_mask enter the kernel. > I did see commit dbb103b243e09475c84df2b8ef17615975593761, but I have no > idea if my problem may be related. > Probably not because the Ethernet driver would not be active at this point. David Daney > Thanks, > Guenter > > ------------------------------ > > SMP: Booting CPU09 (CoreId 9)... > Core 9 ALIVE > --- waiting for CPU 9 > CPU revision is: 000d0003 (Cavium Octeon) > --- ### CPU 9 SR=0x100000e0 > ---- set CPU 9 (9) callin map bit > ---- CPU 9 (9) call cpu_idle > CPU 9: IRQ cause 0x0 status 0:0:0:0:0:0 > Cpu 9 > $ 0 : 0000000000000000 000000001000efe1 ffffffff81582db8 > 00000000000001ff > $ 4 : 0000000000000009 0000000000000009 0000000000000048 > 0000000000000000 > $ 8 : 0000000000000000 0000000000000008 0000000000000000 > 0000000000000000 > $12 : 0000000000000000 ffffffff812b69bc ffffffff8140aed0 > ffffffffbfc02334 > $16 : ffffffff81582db8 0000000000000009 ffffffff815f07b0 > ffffffff81582db8 > $20 : ffffffff815e38d0 ffffffff815830f0 ffffffff815de600 > ffffffff81420000 > $24 : 0000000000000001 > ffffffff8110e870 > $28 : a80000041fe20000 a80000041fe23bf0 0000000000000003 > ffffffff8110a60c > Hi : 000000000b71b000 > Lo : 000000000a037a00 > epc : ffffffff8140d8e4 schedule+0xdc/0xde8 > Not tainted > ra : ffffffff8110a60c cpu_idle+0x2fc/0x350 > Status: 1000efe3 KX SX UX KERNEL EXL IE > Cause : 40800000 > PrId : 000d0003 (Cavium Octeon) > Call Trace: > [] dump_stack+0x8/0x34 > [] plat_irq_dispatch+0x2bc/0x2c8 > [] ret_from_irq+0x0/0x4 > [] schedule+0xdc/0xde8 > [] cpu_idle+0x2fc/0x350 > > --- > > 2nd and subsequent interrupts: > > CPU 9: IRQ cause 0x0 status 0:0:0:0:0:0 > Call Trace: > [] dump_stack+0x8/0x34 > [] plat_irq_dispatch+0x1c4/0x2c8 > [] ret_from_irq+0x0/0x4 > [] schedule+0xdc/0xde8 > [] cpu_idle+0x2fc/0x350 > > > > From guenter.roeck@ericsson.com Fri Jun 10 00:06:40 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 00:06:45 +0200 (CEST) Received: from imr3.ericy.com ([198.24.6.13]:50438 "EHLO imr3.ericy.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491197Ab1FIWGk (ORCPT ); Fri, 10 Jun 2011 00:06:40 +0200 Received: from eusaamw0712.eamcs.ericsson.se ([147.117.20.181]) by imr3.ericy.com (8.13.8/8.13.8) with ESMTP id p59M6Dae002504 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=FAIL); Thu, 9 Jun 2011 17:06:31 -0500 Received: from localhost (147.117.20.214) by eusaamw0712.eamcs.ericsson.se (147.117.20.182) with Microsoft SMTP Server id 8.3.137.0; Thu, 9 Jun 2011 18:06:14 -0400 Date: Thu, 9 Jun 2011 15:06:14 -0700 From: Guenter Roeck To: David Daney CC: "linux-mips@linux-mips.org" Subject: Re: Linux 2.6.39 on Cavium CN38xx Message-ID: <20110609220614.GA13583@ericsson.com> References: <1307653714.8271.130.camel@groeck-laptop> <4DF13E25.2060502@caviumnetworks.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="PEIAKu/WMn1b1Hv9" Content-Disposition: inline In-Reply-To: <4DF13E25.2060502@caviumnetworks.com> User-Agent: Mutt/1.5.20 (2009-06-14) X-archive-position: 30312 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: guenter.roeck@ericsson.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8565 Content-Length: 38776 Lines: 1516 --PEIAKu/WMn1b1Hv9 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline Hi David, On Thu, Jun 09, 2011 at 05:41:57PM -0400, David Daney wrote: > On 06/09/2011 02:08 PM, Guenter Roeck wrote: > > Hi folks, > > > > I am trying to get Linux 2.6.39 > > Where did you get your 2.6.39? Or in othe rwords, what's the SHA1 Kenneth? > >From kernel.org. 2.6.39.1, more specifically. We have some local modifications, but nothing relevant, ie nothing in the mips boot path. > And, what is your .config? > Please see attached. > > to run on a board with Cavium CN38xx > > (pass 3, cpu ID 0x000d0003). > > > > Problem I have is that CPUs 1..15 come online, but get stuck in and > > endless interrupt handling loop as soon as interrupts are enabled. I > > attached a log generated with instrumentation code in the interrupt > > handler. > > > > Any idea what I might be doing wrong ? Note that I don't start the > > system from u-boot; the board uses OFW, so some register initialization > > may be wrong. > > > > Octeon only supports the Octeon u-boot 'bootoctlinux' protocol. > That is a little problem, obviously, since I am not in a position to modify OFW on the board. I modified setup.c instead to get and initialize required parameters as passed from OFW. > You have to make sure that the octeon_bootinfo structure is filled in > properly, and all the CPUs in the core_mask enter the kernel. > All CPUs do enter the kernel. Problem is that they get stuck in an endless interrupt loop as soon as interrupts are enabled for a core for the first time (or soon thereafter). I know (or at least I am quite sure) that I am doing something wrong during initialization, I just hoped someone might have an idea what it might be. Thanks, Guenter --PEIAKu/WMn1b1Hv9 Content-Type: text/plain; charset="us-ascii" Content-Disposition: attachment; filename="config" # # Automatically generated make config: don't edit # Linux/mips 2.6.39.1 Kernel Configuration # Thu Jun 9 11:54:15 2011 # CONFIG_MIPS=y # # Machine selection # # CONFIG_MIPS_ALCHEMY is not set # CONFIG_AR7 is not set # CONFIG_ATH79 is not set # CONFIG_BCM47XX is not set # CONFIG_BCM63XX is not set # CONFIG_MIPS_COBALT is not set # CONFIG_MACH_DECSTATION is not set # CONFIG_MACH_JAZZ is not set # CONFIG_MACH_JZ4740 is not set # CONFIG_LASAT is not set # CONFIG_MACH_LOONGSON is not set # CONFIG_MIPS_MALTA is not set # CONFIG_MIPS_SIM is not set # CONFIG_NEC_MARKEINS is not set # CONFIG_MACH_VR41XX is not set # CONFIG_NXP_STB220 is not set # CONFIG_NXP_STB225 is not set # CONFIG_PNX8550_JBS is not set # CONFIG_PNX8550_STB810 is not set # CONFIG_PMC_MSP is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_POWERTV is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP28 is not set # CONFIG_SGI_IP32 is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CARMEL is not set # CONFIG_SIBYTE_CRHONE is not set # CONFIG_SIBYTE_RHONE is not set # CONFIG_SIBYTE_SWARM is not set # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_SENTOSA is not set # CONFIG_SIBYTE_BIGSUR is not set # CONFIG_SIBYTE_XC4 is not set # CONFIG_SNI_RM is not set # CONFIG_MACH_TX39XX is not set # CONFIG_MACH_TX49XX is not set # CONFIG_MIKROTIK_RB532 is not set # CONFIG_WR_PPMC is not set # CONFIG_CAVIUM_OCTEON_SIMULATOR is not set # CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set CONFIG_ERICSSON_ASE=y # CONFIG_ALCHEMY_GPIO_INDIRECT is not set CONFIG_CAVIUM_BOOTLOADER_OFW=y # CONFIG_CAVIUM_CN63XXP1 is not set # CONFIG_CAVIUM_OCTEON_2ND_KERNEL is not set CONFIG_CAVIUM_OCTEON_HW_FIX_UNALIGNED=y CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE=2 CONFIG_CAVIUM_OCTEON_LOCK_L2=y CONFIG_CAVIUM_OCTEON_LOCK_L2_TLB=y CONFIG_CAVIUM_OCTEON_LOCK_L2_EXCEPTION=y CONFIG_CAVIUM_OCTEON_LOCK_L2_LOW_LEVEL_INTERRUPT=y CONFIG_CAVIUM_OCTEON_LOCK_L2_INTERRUPT=y CONFIG_CAVIUM_OCTEON_LOCK_L2_MEMCPY=y CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_CAVIUM_OCTEON_HELPER=y CONFIG_IOMMU_HELPER=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_SWIOTLB=y CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_ARCH_HAS_ILOG2_U32 is not set # CONFIG_ARCH_HAS_ILOG2_U64 is not set CONFIG_ARCH_SUPPORTS_OPROFILE=y CONFIG_GENERIC_FIND_NEXT_BIT=y CONFIG_GENERIC_FIND_BIT_LE=y CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_SCHED_OMIT_FRAME_POINTER=y CONFIG_CEVT_R4K_LIB=y CONFIG_CEVT_R4K=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_DMA_COHERENT=y CONFIG_SYS_HAS_EARLY_PRINTK=y # CONFIG_HOTPLUG_CPU is not set CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y # CONFIG_MIPS_MACHINE is not set # CONFIG_NO_IOPORT is not set CONFIG_CPU_BIG_ENDIAN=y CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y CONFIG_SYS_SUPPORTS_HUGETLBFS=y CONFIG_SWAP_IO_SPACE=y CONFIG_MIPS_L1_CACHE_SHIFT=7 # # CPU selection # CONFIG_CPU_CAVIUM_OCTEON=y CONFIG_SYS_HAS_CPU_CAVIUM_OCTEON=y CONFIG_WEAK_ORDERING=y CONFIG_CPU_MIPSR2=y CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y CONFIG_CPU_SUPPORTS_HUGEPAGES=y CONFIG_MIPS_PGD_C0_CONTEXT=y CONFIG_HARDWARE_WATCHPOINTS=y # # Kernel type # CONFIG_64BIT=y CONFIG_PAGE_SIZE_4KB=y # CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_32KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_FORCE_MAX_ZONEORDER=11 CONFIG_CPU_HAS_PREFETCH=y CONFIG_MIPS_MT_DISABLED=y CONFIG_64BIT_PHYS_ADDR=y CONFIG_ARCH_PHYS_ADDR_T_64BIT=y CONFIG_CPU_HAS_SYNC=y CONFIG_CPU_SUPPORTS_HIGHMEM=y CONFIG_SYS_SUPPORTS_HIGHMEM=y CONFIG_ARCH_FLATMEM_ENABLE=y CONFIG_ARCH_POPULATES_NODE_MAP=y CONFIG_SELECT_MEMORY_MODEL=y # CONFIG_FLATMEM_MANUAL is not set CONFIG_SPARSEMEM_MANUAL=y CONFIG_SPARSEMEM=y CONFIG_HAVE_MEMORY_PRESENT=y CONFIG_SPARSEMEM_STATIC=y CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_SPLIT_PTLOCK_CPUS=4 # CONFIG_COMPACTION is not set CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_ZONE_DMA_FLAG=0 CONFIG_VIRT_TO_BUS=y # CONFIG_KSM is not set CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_SMP=y CONFIG_SYS_SUPPORTS_SMP=y CONFIG_NR_CPUS_DEFAULT_16=y CONFIG_NR_CPUS=16 CONFIG_TICK_ONESHOT=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_GENERIC_CLOCKEVENTS_BUILD=y # CONFIG_HZ_48 is not set CONFIG_HZ_100=y # CONFIG_HZ_128 is not set # CONFIG_HZ_250 is not set # CONFIG_HZ_256 is not set # CONFIG_HZ_1000 is not set # CONFIG_HZ_1024 is not set CONFIG_SYS_SUPPORTS_ARBIT_HZ=y CONFIG_HZ=100 CONFIG_PREEMPT_NONE=y # CONFIG_PREEMPT_VOLUNTARY is not set # CONFIG_PREEMPT is not set # CONFIG_KEXEC is not set CONFIG_SECCOMP=y CONFIG_USE_OF=y CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" CONFIG_CONSTRUCTORS=y CONFIG_HAVE_IRQ_WORK=y CONFIG_IRQ_WORK=y # # General setup # CONFIG_EXPERIMENTAL=y CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_CROSS_COMPILE="mips-linux-gnu-" CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y # CONFIG_FHANDLE is not set # CONFIG_TASKSTATS is not set # CONFIG_AUDIT is not set CONFIG_HAVE_GENERIC_HARDIRQS=y # # IRQ subsystem # CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_IRQ_SHOW=y # # RCU Subsystem # CONFIG_TREE_RCU=y # CONFIG_PREEMPT_RCU is not set # CONFIG_RCU_TRACE is not set CONFIG_RCU_FANOUT=64 # CONFIG_RCU_FANOUT_EXACT is not set # CONFIG_RCU_FAST_NO_HZ is not set # CONFIG_TREE_RCU_TRACE is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=15 CONFIG_CGROUPS=y CONFIG_CGROUP_DEBUG=y CONFIG_CGROUP_NS=y CONFIG_CGROUP_FREEZER=y CONFIG_CGROUP_DEVICE=y CONFIG_CPUSETS=y # CONFIG_PROC_PID_CPUSET is not set CONFIG_CGROUP_CPUACCT=y CONFIG_RESOURCE_COUNTERS=y # CONFIG_CGROUP_MEM_RES_CTLR is not set # CONFIG_CGROUP_PERF is not set CONFIG_CGROUP_SCHED=y CONFIG_FAIR_GROUP_SCHED=y # CONFIG_RT_GROUP_SCHED is not set CONFIG_BLK_CGROUP=y # CONFIG_DEBUG_BLK_CGROUP is not set # CONFIG_NAMESPACES is not set # CONFIG_SCHED_AUTOGROUP is not set # CONFIG_SYSFS_DEPRECATED is not set CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="initramfs_files.lst" CONFIG_INITRAMFS_ROOT_UID=0 CONFIG_INITRAMFS_ROOT_GID=0 CONFIG_RD_GZIP=y # CONFIG_RD_BZIP2 is not set # CONFIG_RD_LZMA is not set # CONFIG_RD_XZ is not set # CONFIG_RD_LZO is not set # CONFIG_INITRAMFS_COMPRESSION_NONE is not set CONFIG_INITRAMFS_COMPRESSION_GZIP=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_SYSCTL=y CONFIG_ANON_INODES=y CONFIG_EXPERT=y CONFIG_SYSCTL_SYSCALL=y CONFIG_KALLSYMS=y CONFIG_KALLSYMS_ALL=y # CONFIG_KALLSYMS_EXTRA_PASS is not set CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y # CONFIG_PCSPKR_PLATFORM is not set CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_AIO=y CONFIG_EMBEDDED=y CONFIG_HAVE_PERF_EVENTS=y CONFIG_PERF_USE_VMALLOC=y # # Kernel Performance Events And Counters # CONFIG_PERF_EVENTS=y # CONFIG_PERF_COUNTERS is not set # CONFIG_DEBUG_PERF_USE_VMALLOC is not set CONFIG_VM_EVENT_COUNTERS=y CONFIG_COMPAT_BRK=y CONFIG_SLAB=y # CONFIG_SLUB is not set # CONFIG_SLOB is not set CONFIG_PROFILING=y CONFIG_OPROFILE=m CONFIG_HAVE_OPROFILE=y # CONFIG_KPROBES is not set # CONFIG_JUMP_LABEL is not set CONFIG_HAVE_SYSCALL_WRAPPERS=y CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_DMA_ATTRS=y CONFIG_USE_GENERIC_SMP_HELPERS=y CONFIG_HAVE_DMA_API_DEBUG=y CONFIG_HAVE_ARCH_JUMP_LABEL=y # # GCOV-based kernel profiling # # CONFIG_GCOV_KERNEL is not set CONFIG_HAVE_GENERIC_DMA_COHERENT=y CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set CONFIG_STOP_MACHINE=y CONFIG_BLOCK=y # CONFIG_BLK_DEV_BSG is not set # CONFIG_BLK_DEV_INTEGRITY is not set # CONFIG_BLK_DEV_THROTTLING is not set CONFIG_BLOCK_COMPAT=y # # IO Schedulers # CONFIG_IOSCHED_NOOP=y CONFIG_IOSCHED_DEADLINE=y CONFIG_IOSCHED_CFQ=y # CONFIG_CFQ_GROUP_IOSCHED is not set # CONFIG_DEFAULT_DEADLINE is not set CONFIG_DEFAULT_CFQ=y # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="cfq" # CONFIG_INLINE_SPIN_TRYLOCK is not set # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set # CONFIG_INLINE_SPIN_LOCK is not set # CONFIG_INLINE_SPIN_LOCK_BH is not set # CONFIG_INLINE_SPIN_LOCK_IRQ is not set # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set CONFIG_INLINE_SPIN_UNLOCK=y # CONFIG_INLINE_SPIN_UNLOCK_BH is not set CONFIG_INLINE_SPIN_UNLOCK_IRQ=y # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set # CONFIG_INLINE_READ_TRYLOCK is not set # CONFIG_INLINE_READ_LOCK is not set # CONFIG_INLINE_READ_LOCK_BH is not set # CONFIG_INLINE_READ_LOCK_IRQ is not set # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set CONFIG_INLINE_READ_UNLOCK=y # CONFIG_INLINE_READ_UNLOCK_BH is not set CONFIG_INLINE_READ_UNLOCK_IRQ=y # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set # CONFIG_INLINE_WRITE_TRYLOCK is not set # CONFIG_INLINE_WRITE_LOCK is not set # CONFIG_INLINE_WRITE_LOCK_BH is not set # CONFIG_INLINE_WRITE_LOCK_IRQ is not set # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set CONFIG_INLINE_WRITE_UNLOCK=y # CONFIG_INLINE_WRITE_UNLOCK_BH is not set CONFIG_INLINE_WRITE_UNLOCK_IRQ=y # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set CONFIG_MUTEX_SPIN_ON_OWNER=y CONFIG_FREEZER=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # CONFIG_HW_HAS_PCI=y # CONFIG_PCI is not set CONFIG_ARCH_SUPPORTS_MSI=y CONFIG_MMU=y CONFIG_ZONE_DMA32=y # CONFIG_PCCARD is not set # # Executable file formats # CONFIG_BINFMT_ELF=y CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y # CONFIG_HAVE_AOUT is not set # CONFIG_BINFMT_MISC is not set CONFIG_MIPS32_COMPAT=y CONFIG_COMPAT=y CONFIG_SYSVIPC_COMPAT=y CONFIG_MIPS32_O32=y CONFIG_MIPS32_N32=y CONFIG_BINFMT_ELF32=y # # Power management options # CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_SUSPEND_POSSIBLE=y # CONFIG_SUSPEND is not set # CONFIG_HIBERNATION is not set # CONFIG_PM_RUNTIME is not set CONFIG_NET=y # # Networking options # CONFIG_PACKET=y CONFIG_UNIX=y CONFIG_XFRM=y # CONFIG_XFRM_USER is not set # CONFIG_XFRM_SUB_POLICY is not set # CONFIG_XFRM_MIGRATE is not set # CONFIG_XFRM_STATISTICS is not set # CONFIG_NET_KEY is not set CONFIG_INET=y CONFIG_IP_MULTICAST=y CONFIG_IP_ADVANCED_ROUTER=y # CONFIG_IP_FIB_TRIE_STATS is not set CONFIG_IP_MULTIPLE_TABLES=y CONFIG_IP_ROUTE_MULTIPATH=y CONFIG_IP_ROUTE_VERBOSE=y # CONFIG_IP_PNP is not set # CONFIG_NET_IPIP is not set # CONFIG_NET_IPGRE_DEMUX is not set CONFIG_IP_MROUTE=y # CONFIG_IP_MROUTE_MULTIPLE_TABLES is not set CONFIG_IP_PIMSM_V1=y CONFIG_IP_PIMSM_V2=y # CONFIG_ARPD is not set CONFIG_SYN_COOKIES=y # CONFIG_INET_AH is not set # CONFIG_INET_ESP is not set # CONFIG_INET_IPCOMP is not set # CONFIG_INET_XFRM_TUNNEL is not set # CONFIG_INET_TUNNEL is not set CONFIG_INET_XFRM_MODE_TRANSPORT=y CONFIG_INET_XFRM_MODE_TUNNEL=y CONFIG_INET_XFRM_MODE_BEET=y # CONFIG_INET_LRO is not set CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_CUBIC=y CONFIG_DEFAULT_TCP_CONG="cubic" # CONFIG_TCP_MD5SIG is not set # CONFIG_IPV6 is not set # CONFIG_NETLABEL is not set # CONFIG_NETWORK_SECMARK is not set # CONFIG_NETWORK_PHY_TIMESTAMPING is not set # CONFIG_NETFILTER is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set # CONFIG_RDS is not set # CONFIG_TIPC is not set # CONFIG_ATM is not set # CONFIG_L2TP is not set # CONFIG_BRIDGE is not set # CONFIG_NET_DSA is not set CONFIG_VLAN_8021Q=m # CONFIG_VLAN_8021Q_GVRP is not set # CONFIG_DECNET is not set # CONFIG_LLC2 is not set # CONFIG_IPX is not set # CONFIG_ATALK is not set # CONFIG_X25 is not set # CONFIG_LAPB is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set # CONFIG_PHONET is not set # CONFIG_IEEE802154 is not set # CONFIG_NET_SCHED is not set # CONFIG_DCB is not set # CONFIG_BATMAN_ADV is not set CONFIG_RPS=y CONFIG_RFS_ACCEL=y CONFIG_XPS=y # # Network testing # # CONFIG_NET_PKTGEN is not set # CONFIG_HAMRADIO is not set # CONFIG_CAN is not set # CONFIG_IRDA is not set # CONFIG_BT is not set # CONFIG_AF_RXRPC is not set CONFIG_FIB_RULES=y CONFIG_WIRELESS=y # CONFIG_CFG80211 is not set # CONFIG_LIB80211 is not set # # CFG80211 needs to be enabled for MAC80211 # # CONFIG_WIMAX is not set # CONFIG_RFKILL is not set # CONFIG_NET_9P is not set # CONFIG_CAIF is not set # CONFIG_CEPH_LIB is not set # # Device Drivers # # # Generic Driver Options # CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" # CONFIG_DEVTMPFS is not set CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_FW_LOADER is not set # CONFIG_DEBUG_DRIVER is not set # CONFIG_DEBUG_DEVRES is not set # CONFIG_SYS_HYPERVISOR is not set # CONFIG_CONNECTOR is not set CONFIG_MTD=y # CONFIG_MTD_DEBUG is not set # CONFIG_MTD_TESTS is not set CONFIG_MTD_PARTITIONS=y CONFIG_MTD_REDBOOT_PARTS=y CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 # CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set # CONFIG_MTD_REDBOOT_PARTS_READONLY is not set # CONFIG_MTD_CMDLINE_PARTS is not set CONFIG_MTD_OF_PARTS=y # CONFIG_MTD_AR7_PARTS is not set # # User Modules And Translation Layers # CONFIG_MTD_CHAR=y CONFIG_MTD_BLKDEVS=y CONFIG_MTD_BLOCK=y # CONFIG_FTL is not set # CONFIG_NFTL is not set # CONFIG_INFTL is not set # CONFIG_RFD_FTL is not set # CONFIG_SSFDC is not set # CONFIG_SM_FTL is not set # CONFIG_MTD_OOPS is not set # CONFIG_MTD_SWAP is not set # # RAM/ROM/Flash chip drivers # CONFIG_MTD_CFI=y # CONFIG_MTD_JEDECPROBE is not set CONFIG_MTD_GEN_PROBE=y # CONFIG_MTD_CFI_ADV_OPTIONS is not set CONFIG_MTD_MAP_BANK_WIDTH_1=y CONFIG_MTD_MAP_BANK_WIDTH_2=y CONFIG_MTD_MAP_BANK_WIDTH_4=y # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set CONFIG_MTD_CFI_I1=y CONFIG_MTD_CFI_I2=y # CONFIG_MTD_CFI_I4 is not set # CONFIG_MTD_CFI_I8 is not set # CONFIG_MTD_CFI_INTELEXT is not set CONFIG_MTD_CFI_AMDSTD=y # CONFIG_MTD_CFI_STAA is not set CONFIG_MTD_CFI_UTIL=y # CONFIG_MTD_RAM is not set # CONFIG_MTD_ROM is not set # CONFIG_MTD_ABSENT is not set # # Mapping drivers for chip access # # CONFIG_MTD_COMPLEX_MAPPINGS is not set CONFIG_MTD_PHYSMAP=y # CONFIG_MTD_PHYSMAP_COMPAT is not set # CONFIG_MTD_PHYSMAP_OF is not set # CONFIG_MTD_PLATRAM is not set # # Self-contained MTD device drivers # # CONFIG_MTD_DATAFLASH is not set # CONFIG_MTD_M25P80 is not set # CONFIG_MTD_SST25L is not set # CONFIG_MTD_SLRAM is not set # CONFIG_MTD_PHRAM is not set # CONFIG_MTD_MTDRAM is not set # CONFIG_MTD_BLOCK2MTD is not set # # Disk-On-Chip Device Drivers # # CONFIG_MTD_DOC2000 is not set # CONFIG_MTD_DOC2001 is not set # CONFIG_MTD_DOC2001PLUS is not set CONFIG_MTD_NAND_ECC=y # CONFIG_MTD_NAND_ECC_SMC is not set CONFIG_MTD_NAND=y # CONFIG_MTD_NAND_VERIFY_WRITE is not set # CONFIG_MTD_NAND_ECC_BCH is not set # CONFIG_MTD_SM_COMMON is not set # CONFIG_MTD_NAND_MUSEUM_IDS is not set CONFIG_MTD_NAND_IDS=y # CONFIG_MTD_NAND_DISKONCHIP is not set # CONFIG_MTD_NAND_NANDSIM is not set # CONFIG_MTD_NAND_PLATFORM is not set # CONFIG_MTD_ONENAND is not set # # LPDDR flash memory drivers # # CONFIG_MTD_LPDDR is not set # CONFIG_MTD_UBI is not set CONFIG_DTC=y CONFIG_OF=y # # Device Tree and Open Firmware support # # CONFIG_PROC_DEVICETREE is not set CONFIG_OF_FLATTREE=y CONFIG_OF_EARLY_FLATTREE=y CONFIG_OF_ADDRESS=y CONFIG_OF_IRQ=y CONFIG_OF_DEVICE=y CONFIG_OF_I2C=m CONFIG_OF_NET=y CONFIG_OF_SPI=y CONFIG_OF_MDIO=y # CONFIG_PARPORT is not set CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_CRYPTOLOOP is not set # # DRBD disabled because PROC_FS, INET or CONNECTOR not selected # # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set # CONFIG_BLK_DEV_HD is not set # CONFIG_BLK_DEV_RBD is not set # CONFIG_MISC_DEVICES is not set CONFIG_HAVE_IDE=y # CONFIG_IDE is not set # # SCSI device support # CONFIG_SCSI_MOD=y # CONFIG_RAID_ATTRS is not set CONFIG_SCSI=y CONFIG_SCSI_DMA=y # CONFIG_SCSI_TGT is not set # CONFIG_SCSI_NETLINK is not set CONFIG_SCSI_PROC_FS=y # # SCSI support type (disk, tape, CD-ROM) # CONFIG_BLK_DEV_SD=y # CONFIG_CHR_DEV_ST is not set # CONFIG_CHR_DEV_OSST is not set # CONFIG_BLK_DEV_SR is not set # CONFIG_CHR_DEV_SG is not set # CONFIG_CHR_DEV_SCH is not set # CONFIG_SCSI_MULTI_LUN is not set # CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_LOGGING is not set # CONFIG_SCSI_SCAN_ASYNC is not set CONFIG_SCSI_WAIT_SCAN=m # # SCSI Transports # # CONFIG_SCSI_SPI_ATTRS is not set # CONFIG_SCSI_FC_ATTRS is not set # CONFIG_SCSI_ISCSI_ATTRS is not set # CONFIG_SCSI_SAS_ATTRS is not set # CONFIG_SCSI_SAS_LIBSAS is not set # CONFIG_SCSI_SRP_ATTRS is not set # CONFIG_SCSI_LOWLEVEL is not set # CONFIG_SCSI_DH is not set # CONFIG_SCSI_OSD_INITIATOR is not set CONFIG_ATA=y # CONFIG_ATA_NONSTANDARD is not set CONFIG_ATA_VERBOSE_ERROR=y CONFIG_SATA_PMP=y # # Controllers with non-SFF native interface # # CONFIG_SATA_AHCI_PLATFORM is not set CONFIG_ATA_SFF=y # # SFF controllers with custom DMA interface # CONFIG_PATA_OCTEON_CF=y CONFIG_ATA_BMDMA=y # # SATA SFF controllers with BMDMA # # CONFIG_SATA_MV is not set # # PATA SFF controllers with BMDMA # # CONFIG_PATA_ARASAN_CF is not set # # PIO-only SFF controllers # CONFIG_PATA_PLATFORM=m # # Generic fallback / legacy drivers # # CONFIG_MD is not set # CONFIG_TARGET_CORE is not set CONFIG_NETDEVICES=y # CONFIG_DUMMY is not set # CONFIG_BONDING is not set # CONFIG_MACVLAN is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set # CONFIG_VETH is not set CONFIG_MII=y CONFIG_PHYLIB=y # # MII PHY device drivers # # CONFIG_MARVELL_PHY is not set # CONFIG_DAVICOM_PHY is not set # CONFIG_QSEMI_PHY is not set # CONFIG_LXT_PHY is not set # CONFIG_CICADA_PHY is not set # CONFIG_VITESSE_PHY is not set # CONFIG_SMSC_PHY is not set CONFIG_BROADCOM_PHY=y # CONFIG_BCM63XX_PHY is not set # CONFIG_ICPLUS_PHY is not set # CONFIG_REALTEK_PHY is not set # CONFIG_NATIONAL_PHY is not set # CONFIG_STE10XP is not set # CONFIG_LSI_ET1011C_PHY is not set # CONFIG_MICREL_PHY is not set # CONFIG_FIXED_PHY is not set # CONFIG_MDIO_BITBANG is not set CONFIG_MDIO_OCTEON=y CONFIG_NET_ETHERNET=y # CONFIG_AX88796 is not set # CONFIG_SMC91X is not set # CONFIG_DM9000 is not set # CONFIG_ENC28J60 is not set # CONFIG_ETHOC is not set # CONFIG_SMSC911X is not set # CONFIG_DNET is not set # CONFIG_IBM_NEW_EMAC_ZMII is not set # CONFIG_IBM_NEW_EMAC_RGMII is not set # CONFIG_IBM_NEW_EMAC_TAH is not set # CONFIG_IBM_NEW_EMAC_EMAC4 is not set # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set # CONFIG_B44 is not set # CONFIG_KS8851 is not set # CONFIG_KS8851_MLL is not set CONFIG_OCTEON_MGMT_ETHERNET=m CONFIG_NETDEV_1000=y # CONFIG_STMMAC_ETH is not set # CONFIG_NETDEV_10000 is not set CONFIG_WLAN=y # CONFIG_HOSTAP is not set # # Enable WiMAX (Networking options) to see the WiMAX drivers # # CONFIG_WAN is not set # # CAIF transport drivers # # CONFIG_PPP is not set # CONFIG_SLIP is not set # CONFIG_NETCONSOLE is not set # CONFIG_NETPOLL is not set # CONFIG_NET_POLL_CONTROLLER is not set # CONFIG_ISDN is not set # CONFIG_PHONE is not set # CONFIG_RBN is not set # # Input device support # # CONFIG_INPUT is not set # # Hardware I/O ports # # CONFIG_SERIO is not set # CONFIG_GAMEPORT is not set # # Character devices # # CONFIG_VT is not set CONFIG_UNIX98_PTYS=y # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 # CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_N_GSM is not set CONFIG_DEVKMEM=y # # Serial drivers # CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_NR_UARTS=2 CONFIG_SERIAL_8250_RUNTIME_UARTS=2 # CONFIG_SERIAL_8250_EXTENDED is not set # # Non-8250 serial port support # # CONFIG_SERIAL_MAX3100 is not set # CONFIG_SERIAL_MAX3107 is not set CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y # CONFIG_SERIAL_OF_PLATFORM is not set # CONFIG_SERIAL_TIMBERDALE is not set # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_TTY_PRINTK is not set # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set # CONFIG_R3964 is not set # CONFIG_RAW_DRIVER is not set # CONFIG_TCG_TPM is not set # CONFIG_RAMOOPS is not set CONFIG_I2C=m CONFIG_I2C_BOARDINFO=y CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=m # CONFIG_I2C_MUX is not set CONFIG_I2C_HELPER_AUTO=y # # I2C Hardware Bus support # # # I2C system bus drivers (mostly embedded / system-on-chip) # # CONFIG_I2C_OCORES is not set # CONFIG_I2C_PCA_PLATFORM is not set # CONFIG_I2C_PXA_PCI is not set # CONFIG_I2C_SIMTEC is not set CONFIG_I2C_OCTEON=m # CONFIG_I2C_XILINX is not set # # External I2C/SMBus adapter drivers # # CONFIG_I2C_PARPORT_LIGHT is not set # CONFIG_I2C_TAOS_EVM is not set # # Other I2C/SMBus bus drivers # # CONFIG_I2C_STUB is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set CONFIG_SPI=y # CONFIG_SPI_DEBUG is not set CONFIG_SPI_MASTER=y # # SPI Master Controller Drivers # # CONFIG_SPI_ALTERA is not set # CONFIG_SPI_BITBANG is not set # CONFIG_SPI_PXA2XX_PCI is not set # CONFIG_SPI_XILINX is not set # CONFIG_SPI_DESIGNWARE is not set # # SPI Protocol Masters # # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_TLE62X0 is not set # # PPS support # # CONFIG_PPS is not set # # PPS generators support # # CONFIG_W1 is not set # CONFIG_POWER_SUPPLY is not set CONFIG_HWMON=m # CONFIG_HWMON_VID is not set # CONFIG_HWMON_DEBUG_CHIP is not set # # Native drivers # # CONFIG_SENSORS_AD7414 is not set # CONFIG_SENSORS_AD7418 is not set # CONFIG_SENSORS_ADCXX is not set # CONFIG_SENSORS_ADM1021 is not set # CONFIG_SENSORS_ADM1025 is not set # CONFIG_SENSORS_ADM1026 is not set # CONFIG_SENSORS_ADM1029 is not set # CONFIG_SENSORS_ADM1031 is not set # CONFIG_SENSORS_ADM9240 is not set # CONFIG_SENSORS_ADT7411 is not set # CONFIG_SENSORS_ADT7462 is not set # CONFIG_SENSORS_ADT7470 is not set # CONFIG_SENSORS_ADT7475 is not set # CONFIG_SENSORS_ASC7621 is not set # CONFIG_SENSORS_ATXP1 is not set # CONFIG_SENSORS_DS620 is not set # CONFIG_SENSORS_DS1621 is not set # CONFIG_SENSORS_F71805F is not set # CONFIG_SENSORS_F71882FG is not set # CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_G760A is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_JC42 is not set # CONFIG_SENSORS_LINEAGE is not set # CONFIG_SENSORS_LM63 is not set # CONFIG_SENSORS_LM70 is not set # CONFIG_SENSORS_LM73 is not set # CONFIG_SENSORS_LM75 is not set # CONFIG_SENSORS_LM77 is not set # CONFIG_SENSORS_LM78 is not set # CONFIG_SENSORS_LM80 is not set # CONFIG_SENSORS_LM83 is not set # CONFIG_SENSORS_LM85 is not set # CONFIG_SENSORS_LM87 is not set # CONFIG_SENSORS_LM90 is not set # CONFIG_SENSORS_LM92 is not set # CONFIG_SENSORS_LM93 is not set # CONFIG_SENSORS_LTC4151 is not set # CONFIG_SENSORS_LTC4215 is not set # CONFIG_SENSORS_LTC4245 is not set # CONFIG_SENSORS_LTC4261 is not set # CONFIG_SENSORS_LM95241 is not set # CONFIG_SENSORS_MAX1111 is not set # CONFIG_SENSORS_MAX16065 is not set # CONFIG_SENSORS_MAX1619 is not set # CONFIG_SENSORS_MAX6639 is not set # CONFIG_SENSORS_MAX6650 is not set # CONFIG_SENSORS_PC87360 is not set # CONFIG_SENSORS_PC87427 is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_PMBUS is not set # CONFIG_SENSORS_SHT21 is not set CONFIG_SENSORS_SMM665=m # CONFIG_SENSORS_DME1737 is not set # CONFIG_SENSORS_EMC1403 is not set # CONFIG_SENSORS_EMC2103 is not set # CONFIG_SENSORS_SMSC47M1 is not set # CONFIG_SENSORS_SMSC47M192 is not set # CONFIG_SENSORS_SMSC47B397 is not set # CONFIG_SENSORS_SCH5627 is not set # CONFIG_SENSORS_ADS1015 is not set # CONFIG_SENSORS_ADS7828 is not set # CONFIG_SENSORS_ADS7871 is not set # CONFIG_SENSORS_AMC6821 is not set # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_TMP102 is not set # CONFIG_SENSORS_TMP401 is not set # CONFIG_SENSORS_TMP421 is not set # CONFIG_SENSORS_VT1211 is not set # CONFIG_SENSORS_W83781D is not set # CONFIG_SENSORS_W83791D is not set # CONFIG_SENSORS_W83792D is not set # CONFIG_SENSORS_W83793 is not set # CONFIG_SENSORS_W83795 is not set # CONFIG_SENSORS_W83L785TS is not set # CONFIG_SENSORS_W83L786NG is not set # CONFIG_SENSORS_W83627HF is not set # CONFIG_SENSORS_W83627EHF is not set # CONFIG_THERMAL is not set # CONFIG_WATCHDOG is not set CONFIG_SSB_POSSIBLE=y # # Sonics Silicon Backplane # # CONFIG_SSB is not set CONFIG_MFD_SUPPORT=y # CONFIG_MFD_CORE is not set # CONFIG_MFD_SM501 is not set # CONFIG_MFD_VIRTUAL_IRQ is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_TPS6105X is not set # CONFIG_TPS6507X is not set # CONFIG_MFD_TMIO is not set # CONFIG_MFD_WM8400 is not set # CONFIG_MFD_WM831X_SPI is not set # CONFIG_MFD_PCF50633 is not set # CONFIG_MFD_MC13XXX is not set # CONFIG_ABX500_CORE is not set # CONFIG_EZX_PCAP is not set # CONFIG_MFD_WL1273_CORE is not set # CONFIG_REGULATOR is not set # CONFIG_MEDIA_SUPPORT is not set # # Graphics support # # CONFIG_DRM is not set # CONFIG_VGASTATE is not set # CONFIG_VIDEO_OUTPUT_CONTROL is not set # CONFIG_FB is not set # CONFIG_BACKLIGHT_LCD_SUPPORT is not set # # Display device support # # CONFIG_DISPLAY_SUPPORT is not set # CONFIG_SOUND is not set # CONFIG_USB_SUPPORT is not set # CONFIG_MMC is not set # CONFIG_MEMSTICK is not set # CONFIG_NEW_LEDS is not set # CONFIG_NFC_DEVICES is not set # CONFIG_ACCESSIBILITY is not set CONFIG_RTC_LIB=y # CONFIG_RTC_CLASS is not set # CONFIG_DMADEVICES is not set # CONFIG_AUXDISPLAY is not set # CONFIG_UIO is not set CONFIG_STAGING=y # CONFIG_STAGING_EXCLUDE_BUILD is not set # CONFIG_ECHO is not set # CONFIG_BRCM80211 is not set # CONFIG_COMEDI is not set # CONFIG_POHMELFS is not set CONFIG_OCTEON_ETHERNET=y # CONFIG_IIO is not set # CONFIG_XVMALLOC is not set # CONFIG_ZRAM is not set CONFIG_MACH_NO_WESTBRIDGE=y # CONFIG_FT1000 is not set # # Speakup console speech # # # Altera FPGA firmware download module # # CONFIG_ALTERA_STAPL is not set # # File systems # CONFIG_EXT2_FS=m # CONFIG_EXT2_FS_XATTR is not set # CONFIG_EXT2_FS_XIP is not set CONFIG_EXT3_FS=m CONFIG_EXT3_DEFAULTS_TO_ORDERED=y CONFIG_EXT3_FS_XATTR=y # CONFIG_EXT3_FS_POSIX_ACL is not set # CONFIG_EXT3_FS_SECURITY is not set # CONFIG_EXT4_FS is not set CONFIG_JBD=m # CONFIG_JBD_DEBUG is not set CONFIG_FS_MBCACHE=m # CONFIG_REISERFS_FS is not set CONFIG_JFS_FS=m # CONFIG_JFS_POSIX_ACL is not set # CONFIG_JFS_SECURITY is not set # CONFIG_JFS_DEBUG is not set # CONFIG_JFS_STATISTICS is not set # CONFIG_XFS_FS is not set # CONFIG_GFS2_FS is not set # CONFIG_BTRFS_FS is not set # CONFIG_NILFS2_FS is not set # CONFIG_FS_POSIX_ACL is not set CONFIG_FILE_LOCKING=y CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y CONFIG_INOTIFY_USER=y # CONFIG_FANOTIFY is not set # CONFIG_QUOTA is not set # CONFIG_QUOTACTL is not set # CONFIG_AUTOFS4_FS is not set # CONFIG_FUSE_FS is not set # # Caches # # CONFIG_FSCACHE is not set # # CD-ROM/DVD Filesystems # # CONFIG_ISO9660_FS is not set # CONFIG_UDF_FS is not set # # DOS/FAT/NT Filesystems # CONFIG_FAT_FS=m CONFIG_MSDOS_FS=m CONFIG_VFAT_FS=m CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" CONFIG_NTFS_FS=m # CONFIG_NTFS_DEBUG is not set # CONFIG_NTFS_RW is not set # # Pseudo filesystems # CONFIG_PROC_FS=y CONFIG_PROC_KCORE=y CONFIG_PROC_SYSCTL=y CONFIG_PROC_PAGE_MONITOR=y CONFIG_SYSFS=y CONFIG_TMPFS=y # CONFIG_TMPFS_POSIX_ACL is not set # CONFIG_HUGETLBFS is not set # CONFIG_HUGETLB_PAGE is not set # CONFIG_CONFIGFS_FS is not set CONFIG_MISC_FILESYSTEMS=y # CONFIG_ADFS_FS is not set # CONFIG_AFFS_FS is not set # CONFIG_HFS_FS is not set # CONFIG_HFSPLUS_FS is not set # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set # CONFIG_JFFS2_FS is not set # CONFIG_LOGFS is not set # CONFIG_CRAMFS is not set # CONFIG_SQUASHFS is not set # CONFIG_VXFS_FS is not set # CONFIG_MINIX_FS is not set # CONFIG_MINIX_FS_NATIVE_ENDIAN is not set # CONFIG_OMFS_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set # CONFIG_ROMFS_FS is not set # CONFIG_PSTORE is not set # CONFIG_SYSV_FS is not set CONFIG_UFS_FS=y CONFIG_UFS_FS_WRITE=y # CONFIG_UFS_DEBUG is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V3=y # CONFIG_NFS_V3_ACL is not set # CONFIG_NFS_V4 is not set # CONFIG_NFSD is not set CONFIG_LOCKD=y CONFIG_LOCKD_V4=y CONFIG_NFS_COMMON=y CONFIG_SUNRPC=y # CONFIG_CEPH_FS is not set # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set # # Partition Types # CONFIG_PARTITION_ADVANCED=y # CONFIG_ACORN_PARTITION is not set # CONFIG_OSF_PARTITION is not set # CONFIG_AMIGA_PARTITION is not set # CONFIG_ATARI_PARTITION is not set # CONFIG_MAC_PARTITION is not set CONFIG_MSDOS_PARTITION=y CONFIG_BSD_DISKLABEL=y # CONFIG_MINIX_SUBPARTITION is not set # CONFIG_SOLARIS_X86_PARTITION is not set # CONFIG_UNIXWARE_DISKLABEL is not set # CONFIG_LDM_PARTITION is not set # CONFIG_SGI_PARTITION is not set # CONFIG_ULTRIX_PARTITION is not set # CONFIG_SUN_PARTITION is not set # CONFIG_KARMA_PARTITION is not set # CONFIG_EFI_PARTITION is not set # CONFIG_SYSV68_PARTITION is not set CONFIG_NLS=y CONFIG_NLS_DEFAULT="iso8859-1" CONFIG_NLS_CODEPAGE_437=y # CONFIG_NLS_CODEPAGE_737 is not set # CONFIG_NLS_CODEPAGE_775 is not set # CONFIG_NLS_CODEPAGE_850 is not set # CONFIG_NLS_CODEPAGE_852 is not set # CONFIG_NLS_CODEPAGE_855 is not set # CONFIG_NLS_CODEPAGE_857 is not set # CONFIG_NLS_CODEPAGE_860 is not set # CONFIG_NLS_CODEPAGE_861 is not set # CONFIG_NLS_CODEPAGE_862 is not set # CONFIG_NLS_CODEPAGE_863 is not set # CONFIG_NLS_CODEPAGE_864 is not set # CONFIG_NLS_CODEPAGE_865 is not set # CONFIG_NLS_CODEPAGE_866 is not set # CONFIG_NLS_CODEPAGE_869 is not set # CONFIG_NLS_CODEPAGE_936 is not set # CONFIG_NLS_CODEPAGE_950 is not set # CONFIG_NLS_CODEPAGE_932 is not set # CONFIG_NLS_CODEPAGE_949 is not set # CONFIG_NLS_CODEPAGE_874 is not set # CONFIG_NLS_ISO8859_8 is not set # CONFIG_NLS_CODEPAGE_1250 is not set # CONFIG_NLS_CODEPAGE_1251 is not set # CONFIG_NLS_ASCII is not set CONFIG_NLS_ISO8859_1=y # CONFIG_NLS_ISO8859_2 is not set # CONFIG_NLS_ISO8859_3 is not set # CONFIG_NLS_ISO8859_4 is not set # CONFIG_NLS_ISO8859_5 is not set # CONFIG_NLS_ISO8859_6 is not set # CONFIG_NLS_ISO8859_7 is not set # CONFIG_NLS_ISO8859_9 is not set # CONFIG_NLS_ISO8859_13 is not set # CONFIG_NLS_ISO8859_14 is not set # CONFIG_NLS_ISO8859_15 is not set # CONFIG_NLS_KOI8_R is not set # CONFIG_NLS_KOI8_U is not set # CONFIG_NLS_UTF8 is not set # # Kernel hacking # CONFIG_TRACE_IRQFLAGS_SUPPORT=y # CONFIG_PRINTK_TIME is not set CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 CONFIG_ENABLE_WARN_DEPRECATED=y CONFIG_ENABLE_MUST_CHECK=y CONFIG_FRAME_WARN=2048 CONFIG_MAGIC_SYSRQ=y # CONFIG_STRIP_ASM_SYMS is not set # CONFIG_UNUSED_SYMBOLS is not set CONFIG_DEBUG_FS=y # CONFIG_HEADERS_CHECK is not set # CONFIG_DEBUG_SECTION_MISMATCH is not set CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_SHIRQ=y CONFIG_LOCKUP_DETECTOR=y # CONFIG_HARDLOCKUP_DETECTOR is not set CONFIG_BOOTPARAM_HARDLOCKUP_PANIC=y CONFIG_BOOTPARAM_HARDLOCKUP_PANIC_VALUE=1 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=1 CONFIG_DETECT_HUNG_TASK=y CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=1 CONFIG_SCHED_DEBUG=y # CONFIG_SCHEDSTATS is not set # CONFIG_TIMER_STATS is not set # CONFIG_DEBUG_OBJECTS is not set # CONFIG_DEBUG_SLAB is not set # CONFIG_DEBUG_RT_MUTEXES is not set # CONFIG_RT_MUTEX_TESTER is not set # CONFIG_DEBUG_SPINLOCK is not set # CONFIG_DEBUG_MUTEXES is not set # CONFIG_DEBUG_LOCK_ALLOC is not set # CONFIG_PROVE_LOCKING is not set # CONFIG_SPARSE_RCU_POINTER is not set # CONFIG_LOCK_STAT is not set # CONFIG_DEBUG_SPINLOCK_SLEEP is not set # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set # CONFIG_DEBUG_KOBJECT is not set CONFIG_DEBUG_INFO=y # CONFIG_DEBUG_INFO_REDUCED is not set # CONFIG_DEBUG_VM is not set # CONFIG_DEBUG_WRITECOUNT is not set # CONFIG_DEBUG_MEMORY_INIT is not set # CONFIG_DEBUG_LIST is not set # CONFIG_TEST_LIST_SORT is not set # CONFIG_DEBUG_SG is not set # CONFIG_DEBUG_NOTIFIERS is not set # CONFIG_DEBUG_CREDENTIALS is not set # CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_RCU_TORTURE_TEST is not set # CONFIG_RCU_CPU_STALL_DETECTOR is not set # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set # CONFIG_LKDTM is not set # CONFIG_FAULT_INJECTION is not set CONFIG_SYSCTL_SYSCALL_CHECK=y # CONFIG_DEBUG_PAGEALLOC is not set CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_C_RECORDMCOUNT=y CONFIG_RING_BUFFER=y CONFIG_RING_BUFFER_ALLOW_SWAP=y CONFIG_TRACING_SUPPORT=y # CONFIG_FTRACE is not set # CONFIG_DYNAMIC_DEBUG is not set # CONFIG_DMA_API_DEBUG is not set # CONFIG_ATOMIC64_SELFTEST is not set # CONFIG_SAMPLES is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set # CONFIG_TEST_KSTRTOX is not set CONFIG_EARLY_PRINTK=y # CONFIG_CMDLINE_BOOL is not set # CONFIG_DEBUG_STACKOVERFLOW is not set # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_RUNTIME_DEBUG is not set # CONFIG_SPINLOCK_TEST is not set # # Security options # # CONFIG_KEYS is not set # CONFIG_SECURITY_DMESG_RESTRICT is not set CONFIG_SECURITY=y # CONFIG_SECURITYFS is not set CONFIG_SECURITY_NETWORK=y # CONFIG_SECURITY_NETWORK_XFRM is not set # CONFIG_SECURITY_PATH is not set # CONFIG_SECURITY_TOMOYO is not set # CONFIG_SECURITY_APPARMOR is not set CONFIG_SECURITY_ESM=y # CONFIG_IMA is not set CONFIG_DEFAULT_SECURITY_ESM=y # CONFIG_DEFAULT_SECURITY_DAC is not set CONFIG_DEFAULT_SECURITY="esm" CONFIG_CRYPTO=y # # Crypto core or helper # CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_ALGAPI2=y CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_BLKCIPHER=y CONFIG_CRYPTO_BLKCIPHER2=y CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_PCOMP2=y CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER2=y CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y # CONFIG_CRYPTO_GF128MUL is not set # CONFIG_CRYPTO_NULL is not set # CONFIG_CRYPTO_PCRYPT is not set CONFIG_CRYPTO_WORKQUEUE=y # CONFIG_CRYPTO_CRYPTD is not set # CONFIG_CRYPTO_AUTHENC is not set # CONFIG_CRYPTO_TEST is not set # # Authenticated Encryption with Associated Data # # CONFIG_CRYPTO_CCM is not set # CONFIG_CRYPTO_GCM is not set # CONFIG_CRYPTO_SEQIV is not set # # Block modes # CONFIG_CRYPTO_CBC=y # CONFIG_CRYPTO_CTR is not set # CONFIG_CRYPTO_CTS is not set # CONFIG_CRYPTO_ECB is not set # CONFIG_CRYPTO_LRW is not set # CONFIG_CRYPTO_PCBC is not set # CONFIG_CRYPTO_XTS is not set # # Hash modes # CONFIG_CRYPTO_HMAC=y # CONFIG_CRYPTO_XCBC is not set # CONFIG_CRYPTO_VMAC is not set # # Digest # # CONFIG_CRYPTO_CRC32C is not set # CONFIG_CRYPTO_GHASH is not set # CONFIG_CRYPTO_MD4 is not set CONFIG_CRYPTO_MD5=y # CONFIG_CRYPTO_MICHAEL_MIC is not set # CONFIG_CRYPTO_RMD128 is not set # CONFIG_CRYPTO_RMD160 is not set # CONFIG_CRYPTO_RMD256 is not set # CONFIG_CRYPTO_RMD320 is not set # CONFIG_CRYPTO_SHA1 is not set # CONFIG_CRYPTO_SHA256 is not set # CONFIG_CRYPTO_SHA512 is not set # CONFIG_CRYPTO_TGR192 is not set # CONFIG_CRYPTO_WP512 is not set # # Ciphers # # CONFIG_CRYPTO_AES is not set # CONFIG_CRYPTO_ANUBIS is not set # CONFIG_CRYPTO_ARC4 is not set # CONFIG_CRYPTO_BLOWFISH is not set # CONFIG_CRYPTO_CAMELLIA is not set # CONFIG_CRYPTO_CAST5 is not set # CONFIG_CRYPTO_CAST6 is not set CONFIG_CRYPTO_DES=y # CONFIG_CRYPTO_FCRYPT is not set # CONFIG_CRYPTO_KHAZAD is not set # CONFIG_CRYPTO_SALSA20 is not set # CONFIG_CRYPTO_SEED is not set # CONFIG_CRYPTO_SERPENT is not set # CONFIG_CRYPTO_TEA is not set # CONFIG_CRYPTO_TWOFISH is not set # # Compression # # CONFIG_CRYPTO_DEFLATE is not set # CONFIG_CRYPTO_ZLIB is not set # CONFIG_CRYPTO_LZO is not set # # Random Number Generation # # CONFIG_CRYPTO_ANSI_CPRNG is not set # CONFIG_CRYPTO_USER_API_HASH is not set # CONFIG_CRYPTO_USER_API_SKCIPHER is not set CONFIG_CRYPTO_HW=y # CONFIG_VIRTUALIZATION is not set # CONFIG_BINARY_PRINTF is not set # # Library routines # CONFIG_BITREVERSE=y CONFIG_GENERIC_FIND_LAST_BIT=y # CONFIG_CRC_CCITT is not set # CONFIG_CRC16 is not set # CONFIG_CRC_T10DIF is not set # CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y # CONFIG_CRC7 is not set # CONFIG_LIBCRC32C is not set CONFIG_ZLIB_INFLATE=y # CONFIG_XZ_DEC is not set # CONFIG_XZ_DEC_BCJ is not set CONFIG_DECOMPRESS_GZIP=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_DMA=y CONFIG_CPU_RMAP=y CONFIG_NLATTR=y # CONFIG_AVERAGE is not set --PEIAKu/WMn1b1Hv9-- From ddaney@caviumnetworks.com Fri Jun 10 00:59:56 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 01:00:02 +0200 (CEST) Received: from mail3.caviumnetworks.com ([12.108.191.235]:6808 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491079Ab1FIW74 (ORCPT ); Fri, 10 Jun 2011 00:59:56 +0200 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Thu, 09 Jun 2011 16:00:58 -0700 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.4675); Thu, 9 Jun 2011 15:59:53 -0700 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Thu, 9 Jun 2011 15:59:53 -0700 Message-ID: <4DF15068.30906@caviumnetworks.com> Date: Thu, 09 Jun 2011 15:59:52 -0700 From: David Daney User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.15) Gecko/20101027 Fedora/3.0.10-1.fc12 Thunderbird/3.0.10 MIME-Version: 1.0 To: Guenter Roeck CC: "linux-mips@linux-mips.org" Subject: Re: Linux 2.6.39 on Cavium CN38xx References: <1307653714.8271.130.camel@groeck-laptop> <4DF13E25.2060502@caviumnetworks.com> <20110609220614.GA13583@ericsson.com> In-Reply-To: <20110609220614.GA13583@ericsson.com> Content-Type: multipart/mixed; boundary="------------000205060904040302050301" X-OriginalArrivalTime: 09 Jun 2011 22:59:53.0352 (UTC) FILETIME=[F191F080:01CC26F8] X-archive-position: 30313 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8620 Content-Length: 48203 Lines: 1863 This is a multi-part message in MIME format. --------------000205060904040302050301 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit On 06/09/2011 03:06 PM, Guenter Roeck wrote: > Hi David, > > On Thu, Jun 09, 2011 at 05:41:57PM -0400, David Daney wrote: >> On 06/09/2011 02:08 PM, Guenter Roeck wrote: >>> Hi folks, >>> >>> I am trying to get Linux 2.6.39 >> >> Where did you get your 2.6.39? Or in othe rwords, what's the SHA1 Kenneth? >> >> From kernel.org. 2.6.39.1, more specifically. We have some local modifications, > but nothing relevant, ie nothing in the mips boot path. > >> And, what is your .config? >> > Please see attached. With: commit cf29f916c310c9b13c19514b496700c549597e11 Author: Greg Kroah-Hartman Date: Fri Jun 3 09:34:20 2011 +0900 Linux 2.6.39.1 And with the attached config I can do: octeon:~# cat /proc/version Linux version 2.6.39.1 (ddaney@dd1.caveonetworks.com) (gcc version 4.6.1 20110328 (prerelease) [gcc-4_6-branch revision 171639] (GCC) ) #1031 SMP Thu Jun 9 15:44:46 PDT 2011 octeon:~# head /proc/cpuinfo system type : EBT3000 (CN3860p3.X-500-NSP) processor : 0 cpu model : Cavium Octeon V0.3 BogoMIPS : 1000.00 wait instruction : yes microsecond timers : yes tlb_entries : 32 extra interrupt vector : yes hardware watchpoint : yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb] ASEs implemented : Boots on all 16 CPUs. > >>> to run on a board with Cavium CN38xx >>> (pass 3, cpu ID 0x000d0003). >>> >>> Problem I have is that CPUs 1..15 come online, but get stuck in and >>> endless interrupt handling loop as soon as interrupts are enabled. I >>> attached a log generated with instrumentation code in the interrupt >>> handler. >>> >>> Any idea what I might be doing wrong ? Note that I don't start the >>> system from u-boot; the board uses OFW, so some register initialization >>> may be wrong. >>> >> >> Octeon only supports the Octeon u-boot 'bootoctlinux' protocol. >> > That is a little problem, obviously, since I am not in a position to modify OFW > on the board. I modified setup.c instead to get and initialize required parameters > as passed from OFW. > >> You have to make sure that the octeon_bootinfo structure is filled in >> properly, and all the CPUs in the core_mask enter the kernel. >> > All CPUs do enter the kernel. Problem is that they get stuck in an endless > interrupt loop as soon as interrupts are enabled for a core for the first time > (or soon thereafter). > > I know (or at least I am quite sure) that I am doing something wrong during > initialization, I just hoped someone might have an idea what it might be. > If you could run it under the simulator, you could easily debug it. Otherwise it is not so easy. David Daney --------------000205060904040302050301 Content-Type: text/plain; name="o38.config" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="o38.config" # # Automatically generated make config: don't edit # Linux/mips 2.6.39.1 Kernel Configuration # Thu Jun 9 15:37:08 2011 # CONFIG_MIPS=y # # Machine selection # # CONFIG_MIPS_ALCHEMY is not set # CONFIG_AR7 is not set # CONFIG_ATH79 is not set # CONFIG_BCM47XX is not set # CONFIG_BCM63XX is not set # CONFIG_MIPS_COBALT is not set # CONFIG_MACH_DECSTATION is not set # CONFIG_MACH_JAZZ is not set # CONFIG_MACH_JZ4740 is not set # CONFIG_LASAT is not set # CONFIG_MACH_LOONGSON is not set # CONFIG_MIPS_MALTA is not set # CONFIG_MIPS_SIM is not set # CONFIG_NEC_MARKEINS is not set # CONFIG_MACH_VR41XX is not set # CONFIG_NXP_STB220 is not set # CONFIG_NXP_STB225 is not set # CONFIG_PNX8550_JBS is not set # CONFIG_PNX8550_STB810 is not set # CONFIG_PMC_MSP is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_POWERTV is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP28 is not set # CONFIG_SGI_IP32 is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CARMEL is not set # CONFIG_SIBYTE_CRHONE is not set # CONFIG_SIBYTE_RHONE is not set # CONFIG_SIBYTE_SWARM is not set # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_SENTOSA is not set # CONFIG_SIBYTE_BIGSUR is not set # CONFIG_SNI_RM is not set # CONFIG_MACH_TX39XX is not set # CONFIG_MACH_TX49XX is not set # CONFIG_MIKROTIK_RB532 is not set # CONFIG_WR_PPMC is not set # CONFIG_CAVIUM_OCTEON_SIMULATOR is not set CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD=y # CONFIG_ALCHEMY_GPIO_INDIRECT is not set # CONFIG_CAVIUM_CN63XXP1 is not set # CONFIG_CAVIUM_OCTEON_2ND_KERNEL is not set CONFIG_CAVIUM_OCTEON_HW_FIX_UNALIGNED=y CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE=2 CONFIG_CAVIUM_OCTEON_LOCK_L2=y CONFIG_CAVIUM_OCTEON_LOCK_L2_TLB=y CONFIG_CAVIUM_OCTEON_LOCK_L2_EXCEPTION=y CONFIG_CAVIUM_OCTEON_LOCK_L2_LOW_LEVEL_INTERRUPT=y CONFIG_CAVIUM_OCTEON_LOCK_L2_INTERRUPT=y CONFIG_CAVIUM_OCTEON_LOCK_L2_MEMCPY=y CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_CAVIUM_OCTEON_HELPER=y CONFIG_IOMMU_HELPER=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_SWIOTLB=y CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_ARCH_HAS_ILOG2_U32 is not set # CONFIG_ARCH_HAS_ILOG2_U64 is not set CONFIG_ARCH_SUPPORTS_OPROFILE=y CONFIG_GENERIC_FIND_NEXT_BIT=y CONFIG_GENERIC_FIND_BIT_LE=y CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_SCHED_OMIT_FRAME_POINTER=y CONFIG_CEVT_R4K_LIB=y CONFIG_CEVT_R4K=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_DMA_COHERENT=y CONFIG_SYS_HAS_EARLY_PRINTK=y # CONFIG_HOTPLUG_CPU is not set CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y # CONFIG_MIPS_MACHINE is not set # CONFIG_NO_IOPORT is not set CONFIG_CPU_BIG_ENDIAN=y CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y CONFIG_SYS_SUPPORTS_HUGETLBFS=y CONFIG_SWAP_IO_SPACE=y CONFIG_MIPS_L1_CACHE_SHIFT=7 # # CPU selection # CONFIG_CPU_CAVIUM_OCTEON=y CONFIG_SYS_HAS_CPU_CAVIUM_OCTEON=y CONFIG_WEAK_ORDERING=y CONFIG_CPU_MIPSR2=y CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y CONFIG_CPU_SUPPORTS_HUGEPAGES=y CONFIG_MIPS_PGD_C0_CONTEXT=y CONFIG_HARDWARE_WATCHPOINTS=y # # Kernel type # CONFIG_64BIT=y CONFIG_PAGE_SIZE_4KB=y # CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_32KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_FORCE_MAX_ZONEORDER=11 CONFIG_CPU_HAS_PREFETCH=y CONFIG_MIPS_MT_DISABLED=y CONFIG_64BIT_PHYS_ADDR=y CONFIG_ARCH_PHYS_ADDR_T_64BIT=y CONFIG_CPU_HAS_SYNC=y CONFIG_CPU_SUPPORTS_HIGHMEM=y CONFIG_SYS_SUPPORTS_HIGHMEM=y CONFIG_ARCH_FLATMEM_ENABLE=y CONFIG_ARCH_POPULATES_NODE_MAP=y CONFIG_SELECT_MEMORY_MODEL=y # CONFIG_FLATMEM_MANUAL is not set CONFIG_SPARSEMEM_MANUAL=y CONFIG_SPARSEMEM=y CONFIG_HAVE_MEMORY_PRESENT=y CONFIG_SPARSEMEM_STATIC=y CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_SPLIT_PTLOCK_CPUS=4 # CONFIG_COMPACTION is not set CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_ZONE_DMA_FLAG=0 CONFIG_VIRT_TO_BUS=y # CONFIG_KSM is not set CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_SMP=y CONFIG_SYS_SUPPORTS_SMP=y CONFIG_NR_CPUS_DEFAULT_16=y CONFIG_NR_CPUS=16 CONFIG_TICK_ONESHOT=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_GENERIC_CLOCKEVENTS_BUILD=y # CONFIG_HZ_48 is not set CONFIG_HZ_100=y # CONFIG_HZ_128 is not set # CONFIG_HZ_250 is not set # CONFIG_HZ_256 is not set # CONFIG_HZ_1000 is not set # CONFIG_HZ_1024 is not set CONFIG_SYS_SUPPORTS_ARBIT_HZ=y CONFIG_HZ=100 CONFIG_PREEMPT_NONE=y # CONFIG_PREEMPT_VOLUNTARY is not set # CONFIG_PREEMPT is not set # CONFIG_KEXEC is not set CONFIG_SECCOMP=y CONFIG_USE_OF=y CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" CONFIG_CONSTRUCTORS=y CONFIG_HAVE_IRQ_WORK=y CONFIG_IRQ_WORK=y # # General setup # CONFIG_EXPERIMENTAL=y CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_CROSS_COMPILE="mips-linux-gnu-" CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y # CONFIG_FHANDLE is not set # CONFIG_TASKSTATS is not set # CONFIG_AUDIT is not set CONFIG_HAVE_GENERIC_HARDIRQS=y # # IRQ subsystem # CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_IRQ_SHOW=y # # RCU Subsystem # CONFIG_TREE_RCU=y # CONFIG_PREEMPT_RCU is not set # CONFIG_RCU_TRACE is not set CONFIG_RCU_FANOUT=64 # CONFIG_RCU_FANOUT_EXACT is not set # CONFIG_RCU_FAST_NO_HZ is not set # CONFIG_TREE_RCU_TRACE is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=15 CONFIG_CGROUPS=y CONFIG_CGROUP_DEBUG=y CONFIG_CGROUP_NS=y CONFIG_CGROUP_FREEZER=y CONFIG_CGROUP_DEVICE=y CONFIG_CPUSETS=y # CONFIG_PROC_PID_CPUSET is not set CONFIG_CGROUP_CPUACCT=y CONFIG_RESOURCE_COUNTERS=y # CONFIG_CGROUP_MEM_RES_CTLR is not set # CONFIG_CGROUP_PERF is not set CONFIG_CGROUP_SCHED=y CONFIG_FAIR_GROUP_SCHED=y # CONFIG_RT_GROUP_SCHED is not set CONFIG_BLK_CGROUP=y # CONFIG_DEBUG_BLK_CGROUP is not set # CONFIG_NAMESPACES is not set # CONFIG_SCHED_AUTOGROUP is not set # CONFIG_SYSFS_DEPRECATED is not set CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="" CONFIG_RD_GZIP=y # CONFIG_RD_BZIP2 is not set # CONFIG_RD_LZMA is not set # CONFIG_RD_XZ is not set # CONFIG_RD_LZO is not set # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_SYSCTL=y CONFIG_ANON_INODES=y CONFIG_EXPERT=y CONFIG_SYSCTL_SYSCALL=y CONFIG_KALLSYMS=y CONFIG_KALLSYMS_ALL=y # CONFIG_KALLSYMS_EXTRA_PASS is not set CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y # CONFIG_PCSPKR_PLATFORM is not set CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_AIO=y CONFIG_EMBEDDED=y CONFIG_HAVE_PERF_EVENTS=y CONFIG_PERF_USE_VMALLOC=y # # Kernel Performance Events And Counters # CONFIG_PERF_EVENTS=y # CONFIG_PERF_COUNTERS is not set # CONFIG_DEBUG_PERF_USE_VMALLOC is not set CONFIG_VM_EVENT_COUNTERS=y CONFIG_PCI_QUIRKS=y CONFIG_COMPAT_BRK=y CONFIG_SLAB=y # CONFIG_SLUB is not set # CONFIG_SLOB is not set CONFIG_PROFILING=y CONFIG_OPROFILE=m CONFIG_HAVE_OPROFILE=y # CONFIG_KPROBES is not set # CONFIG_JUMP_LABEL is not set CONFIG_HAVE_SYSCALL_WRAPPERS=y CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_DMA_ATTRS=y CONFIG_USE_GENERIC_SMP_HELPERS=y CONFIG_HAVE_DMA_API_DEBUG=y CONFIG_HAVE_ARCH_JUMP_LABEL=y # # GCOV-based kernel profiling # # CONFIG_GCOV_KERNEL is not set CONFIG_HAVE_GENERIC_DMA_COHERENT=y CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set CONFIG_STOP_MACHINE=y CONFIG_BLOCK=y # CONFIG_BLK_DEV_BSG is not set # CONFIG_BLK_DEV_INTEGRITY is not set # CONFIG_BLK_DEV_THROTTLING is not set CONFIG_BLOCK_COMPAT=y # # IO Schedulers # CONFIG_IOSCHED_NOOP=y CONFIG_IOSCHED_DEADLINE=y CONFIG_IOSCHED_CFQ=y # CONFIG_CFQ_GROUP_IOSCHED is not set # CONFIG_DEFAULT_DEADLINE is not set CONFIG_DEFAULT_CFQ=y # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="cfq" # CONFIG_INLINE_SPIN_TRYLOCK is not set # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set # CONFIG_INLINE_SPIN_LOCK is not set # CONFIG_INLINE_SPIN_LOCK_BH is not set # CONFIG_INLINE_SPIN_LOCK_IRQ is not set # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set CONFIG_INLINE_SPIN_UNLOCK=y # CONFIG_INLINE_SPIN_UNLOCK_BH is not set CONFIG_INLINE_SPIN_UNLOCK_IRQ=y # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set # CONFIG_INLINE_READ_TRYLOCK is not set # CONFIG_INLINE_READ_LOCK is not set # CONFIG_INLINE_READ_LOCK_BH is not set # CONFIG_INLINE_READ_LOCK_IRQ is not set # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set CONFIG_INLINE_READ_UNLOCK=y # CONFIG_INLINE_READ_UNLOCK_BH is not set CONFIG_INLINE_READ_UNLOCK_IRQ=y # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set # CONFIG_INLINE_WRITE_TRYLOCK is not set # CONFIG_INLINE_WRITE_LOCK is not set # CONFIG_INLINE_WRITE_LOCK_BH is not set # CONFIG_INLINE_WRITE_LOCK_IRQ is not set # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set CONFIG_INLINE_WRITE_UNLOCK=y # CONFIG_INLINE_WRITE_UNLOCK_BH is not set CONFIG_INLINE_WRITE_UNLOCK_IRQ=y # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set CONFIG_MUTEX_SPIN_ON_OWNER=y CONFIG_FREEZER=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_DOMAINS=y CONFIG_ARCH_SUPPORTS_MSI=y CONFIG_PCI_MSI=y # CONFIG_PCI_DEBUG is not set # CONFIG_PCI_STUB is not set # CONFIG_PCI_IOV is not set CONFIG_MMU=y CONFIG_ZONE_DMA32=y # CONFIG_PCCARD is not set # CONFIG_HOTPLUG_PCI is not set # CONFIG_RAPIDIO is not set # # Executable file formats # CONFIG_BINFMT_ELF=y CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y # CONFIG_HAVE_AOUT is not set # CONFIG_BINFMT_MISC is not set CONFIG_MIPS32_COMPAT=y CONFIG_COMPAT=y CONFIG_SYSVIPC_COMPAT=y CONFIG_MIPS32_O32=y CONFIG_MIPS32_N32=y CONFIG_BINFMT_ELF32=y # # Power management options # CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_SUSPEND_POSSIBLE=y # CONFIG_SUSPEND is not set # CONFIG_HIBERNATION is not set # CONFIG_PM_RUNTIME is not set CONFIG_NET=y # # Networking options # CONFIG_PACKET=y CONFIG_UNIX=y CONFIG_XFRM=y # CONFIG_XFRM_USER is not set # CONFIG_XFRM_SUB_POLICY is not set # CONFIG_XFRM_MIGRATE is not set # CONFIG_XFRM_STATISTICS is not set # CONFIG_NET_KEY is not set CONFIG_INET=y CONFIG_IP_MULTICAST=y CONFIG_IP_ADVANCED_ROUTER=y # CONFIG_IP_FIB_TRIE_STATS is not set CONFIG_IP_MULTIPLE_TABLES=y CONFIG_IP_ROUTE_MULTIPATH=y CONFIG_IP_ROUTE_VERBOSE=y # CONFIG_IP_PNP is not set # CONFIG_NET_IPIP is not set # CONFIG_NET_IPGRE_DEMUX is not set CONFIG_IP_MROUTE=y # CONFIG_IP_MROUTE_MULTIPLE_TABLES is not set CONFIG_IP_PIMSM_V1=y CONFIG_IP_PIMSM_V2=y # CONFIG_ARPD is not set CONFIG_SYN_COOKIES=y # CONFIG_INET_AH is not set # CONFIG_INET_ESP is not set # CONFIG_INET_IPCOMP is not set # CONFIG_INET_XFRM_TUNNEL is not set # CONFIG_INET_TUNNEL is not set CONFIG_INET_XFRM_MODE_TRANSPORT=y CONFIG_INET_XFRM_MODE_TUNNEL=y CONFIG_INET_XFRM_MODE_BEET=y # CONFIG_INET_LRO is not set CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_CUBIC=y CONFIG_DEFAULT_TCP_CONG="cubic" # CONFIG_TCP_MD5SIG is not set # CONFIG_IPV6 is not set # CONFIG_NETLABEL is not set # CONFIG_NETWORK_SECMARK is not set # CONFIG_NETWORK_PHY_TIMESTAMPING is not set # CONFIG_NETFILTER is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set # CONFIG_RDS is not set # CONFIG_TIPC is not set # CONFIG_ATM is not set # CONFIG_L2TP is not set # CONFIG_BRIDGE is not set # CONFIG_NET_DSA is not set CONFIG_VLAN_8021Q=m # CONFIG_VLAN_8021Q_GVRP is not set # CONFIG_DECNET is not set # CONFIG_LLC2 is not set # CONFIG_IPX is not set # CONFIG_ATALK is not set # CONFIG_X25 is not set # CONFIG_LAPB is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set # CONFIG_PHONET is not set # CONFIG_IEEE802154 is not set # CONFIG_NET_SCHED is not set # CONFIG_DCB is not set # CONFIG_BATMAN_ADV is not set CONFIG_RPS=y CONFIG_RFS_ACCEL=y CONFIG_XPS=y # # Network testing # # CONFIG_NET_PKTGEN is not set # CONFIG_HAMRADIO is not set # CONFIG_CAN is not set # CONFIG_IRDA is not set # CONFIG_BT is not set # CONFIG_AF_RXRPC is not set CONFIG_FIB_RULES=y CONFIG_WIRELESS=y # CONFIG_CFG80211 is not set # CONFIG_LIB80211 is not set # # CFG80211 needs to be enabled for MAC80211 # # CONFIG_WIMAX is not set # CONFIG_RFKILL is not set # CONFIG_NET_9P is not set # CONFIG_CAIF is not set # CONFIG_CEPH_LIB is not set # # Device Drivers # # # Generic Driver Options # CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" # CONFIG_DEVTMPFS is not set CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_FW_LOADER is not set # CONFIG_DEBUG_DRIVER is not set # CONFIG_DEBUG_DEVRES is not set # CONFIG_SYS_HYPERVISOR is not set # CONFIG_CONNECTOR is not set CONFIG_MTD=y # CONFIG_MTD_DEBUG is not set # CONFIG_MTD_TESTS is not set CONFIG_MTD_PARTITIONS=y CONFIG_MTD_REDBOOT_PARTS=y CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 # CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set # CONFIG_MTD_REDBOOT_PARTS_READONLY is not set # CONFIG_MTD_CMDLINE_PARTS is not set CONFIG_MTD_OF_PARTS=y # CONFIG_MTD_AR7_PARTS is not set # # User Modules And Translation Layers # CONFIG_MTD_CHAR=y CONFIG_MTD_BLKDEVS=y CONFIG_MTD_BLOCK=y # CONFIG_FTL is not set # CONFIG_NFTL is not set # CONFIG_INFTL is not set # CONFIG_RFD_FTL is not set # CONFIG_SSFDC is not set # CONFIG_SM_FTL is not set # CONFIG_MTD_OOPS is not set # CONFIG_MTD_SWAP is not set # # RAM/ROM/Flash chip drivers # CONFIG_MTD_CFI=y # CONFIG_MTD_JEDECPROBE is not set CONFIG_MTD_GEN_PROBE=y # CONFIG_MTD_CFI_ADV_OPTIONS is not set CONFIG_MTD_MAP_BANK_WIDTH_1=y CONFIG_MTD_MAP_BANK_WIDTH_2=y CONFIG_MTD_MAP_BANK_WIDTH_4=y # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set CONFIG_MTD_CFI_I1=y CONFIG_MTD_CFI_I2=y # CONFIG_MTD_CFI_I4 is not set # CONFIG_MTD_CFI_I8 is not set # CONFIG_MTD_CFI_INTELEXT is not set CONFIG_MTD_CFI_AMDSTD=y # CONFIG_MTD_CFI_STAA is not set CONFIG_MTD_CFI_UTIL=y # CONFIG_MTD_RAM is not set # CONFIG_MTD_ROM is not set # CONFIG_MTD_ABSENT is not set # # Mapping drivers for chip access # # CONFIG_MTD_COMPLEX_MAPPINGS is not set CONFIG_MTD_PHYSMAP=y # CONFIG_MTD_PHYSMAP_COMPAT is not set # CONFIG_MTD_PHYSMAP_OF is not set # CONFIG_MTD_INTEL_VR_NOR is not set # CONFIG_MTD_PLATRAM is not set # # Self-contained MTD device drivers # # CONFIG_MTD_PMC551 is not set # CONFIG_MTD_DATAFLASH is not set # CONFIG_MTD_M25P80 is not set # CONFIG_MTD_SST25L is not set # CONFIG_MTD_SLRAM is not set # CONFIG_MTD_PHRAM is not set # CONFIG_MTD_MTDRAM is not set # CONFIG_MTD_BLOCK2MTD is not set # # Disk-On-Chip Device Drivers # # CONFIG_MTD_DOC2000 is not set # CONFIG_MTD_DOC2001 is not set # CONFIG_MTD_DOC2001PLUS is not set CONFIG_MTD_NAND_ECC=y # CONFIG_MTD_NAND_ECC_SMC is not set CONFIG_MTD_NAND=y # CONFIG_MTD_NAND_VERIFY_WRITE is not set # CONFIG_MTD_NAND_ECC_BCH is not set # CONFIG_MTD_SM_COMMON is not set # CONFIG_MTD_NAND_MUSEUM_IDS is not set # CONFIG_MTD_NAND_DENALI is not set CONFIG_MTD_NAND_IDS=y # CONFIG_MTD_NAND_RICOH is not set # CONFIG_MTD_NAND_DISKONCHIP is not set # CONFIG_MTD_NAND_CAFE is not set # CONFIG_MTD_NAND_NANDSIM is not set # CONFIG_MTD_NAND_PLATFORM is not set # CONFIG_MTD_ALAUDA is not set # CONFIG_MTD_ONENAND is not set # # LPDDR flash memory drivers # # CONFIG_MTD_LPDDR is not set # CONFIG_MTD_UBI is not set CONFIG_DTC=y CONFIG_OF=y # # Device Tree and Open Firmware support # # CONFIG_PROC_DEVICETREE is not set CONFIG_OF_FLATTREE=y CONFIG_OF_EARLY_FLATTREE=y CONFIG_OF_ADDRESS=y CONFIG_OF_IRQ=y CONFIG_OF_DEVICE=y CONFIG_OF_I2C=m CONFIG_OF_NET=y CONFIG_OF_SPI=y CONFIG_OF_MDIO=y # CONFIG_PARPORT is not set CONFIG_BLK_DEV=y # CONFIG_BLK_CPQ_DA is not set # CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_CRYPTOLOOP is not set # # DRBD disabled because PROC_FS, INET or CONNECTOR not selected # # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_UB is not set # CONFIG_BLK_DEV_RAM is not set # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set # CONFIG_BLK_DEV_HD is not set # CONFIG_BLK_DEV_RBD is not set # CONFIG_MISC_DEVICES is not set CONFIG_HAVE_IDE=y # CONFIG_IDE is not set # # SCSI device support # CONFIG_SCSI_MOD=y # CONFIG_RAID_ATTRS is not set CONFIG_SCSI=y CONFIG_SCSI_DMA=y # CONFIG_SCSI_TGT is not set # CONFIG_SCSI_NETLINK is not set CONFIG_SCSI_PROC_FS=y # # SCSI support type (disk, tape, CD-ROM) # CONFIG_BLK_DEV_SD=y # CONFIG_CHR_DEV_ST is not set # CONFIG_CHR_DEV_OSST is not set # CONFIG_BLK_DEV_SR is not set # CONFIG_CHR_DEV_SG is not set # CONFIG_CHR_DEV_SCH is not set # CONFIG_SCSI_MULTI_LUN is not set # CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_LOGGING is not set # CONFIG_SCSI_SCAN_ASYNC is not set CONFIG_SCSI_WAIT_SCAN=m # # SCSI Transports # # CONFIG_SCSI_SPI_ATTRS is not set # CONFIG_SCSI_FC_ATTRS is not set # CONFIG_SCSI_ISCSI_ATTRS is not set # CONFIG_SCSI_SAS_ATTRS is not set # CONFIG_SCSI_SAS_LIBSAS is not set # CONFIG_SCSI_SRP_ATTRS is not set # CONFIG_SCSI_LOWLEVEL is not set # CONFIG_SCSI_DH is not set # CONFIG_SCSI_OSD_INITIATOR is not set CONFIG_ATA=y # CONFIG_ATA_NONSTANDARD is not set CONFIG_ATA_VERBOSE_ERROR=y CONFIG_SATA_PMP=y # # Controllers with non-SFF native interface # CONFIG_SATA_AHCI=y # CONFIG_SATA_AHCI_PLATFORM is not set # CONFIG_SATA_INIC162X is not set # CONFIG_SATA_ACARD_AHCI is not set # CONFIG_SATA_SIL24 is not set CONFIG_ATA_SFF=y # # SFF controllers with custom DMA interface # # CONFIG_PDC_ADMA is not set CONFIG_PATA_OCTEON_CF=y # CONFIG_SATA_QSTOR is not set # CONFIG_SATA_SX4 is not set CONFIG_ATA_BMDMA=y # # SATA SFF controllers with BMDMA # # CONFIG_ATA_PIIX is not set # CONFIG_SATA_MV is not set # CONFIG_SATA_NV is not set # CONFIG_SATA_PROMISE is not set # CONFIG_SATA_SIL is not set # CONFIG_SATA_SIS is not set # CONFIG_SATA_SVW is not set # CONFIG_SATA_ULI is not set # CONFIG_SATA_VIA is not set # CONFIG_SATA_VITESSE is not set # # PATA SFF controllers with BMDMA # # CONFIG_PATA_ALI is not set # CONFIG_PATA_AMD is not set # CONFIG_PATA_ARASAN_CF is not set # CONFIG_PATA_ARTOP is not set # CONFIG_PATA_ATIIXP is not set # CONFIG_PATA_ATP867X is not set # CONFIG_PATA_CMD64X is not set # CONFIG_PATA_CS5520 is not set # CONFIG_PATA_CS5530 is not set # CONFIG_PATA_CS5536 is not set # CONFIG_PATA_CYPRESS is not set # CONFIG_PATA_EFAR is not set # CONFIG_PATA_HPT366 is not set # CONFIG_PATA_HPT37X is not set # CONFIG_PATA_HPT3X2N is not set # CONFIG_PATA_HPT3X3 is not set # CONFIG_PATA_IT8213 is not set # CONFIG_PATA_IT821X is not set # CONFIG_PATA_JMICRON is not set # CONFIG_PATA_MARVELL is not set # CONFIG_PATA_NETCELL is not set # CONFIG_PATA_NINJA32 is not set # CONFIG_PATA_NS87415 is not set # CONFIG_PATA_OLDPIIX is not set # CONFIG_PATA_OPTIDMA is not set # CONFIG_PATA_PDC2027X is not set # CONFIG_PATA_PDC_OLD is not set # CONFIG_PATA_RADISYS is not set # CONFIG_PATA_RDC is not set # CONFIG_PATA_SC1200 is not set # CONFIG_PATA_SCH is not set # CONFIG_PATA_SERVERWORKS is not set # CONFIG_PATA_SIL680 is not set # CONFIG_PATA_SIS is not set # CONFIG_PATA_TOSHIBA is not set # CONFIG_PATA_TRIFLEX is not set # CONFIG_PATA_VIA is not set # CONFIG_PATA_WINBOND is not set # # PIO-only SFF controllers # # CONFIG_PATA_CMD640_PCI is not set # CONFIG_PATA_MPIIX is not set # CONFIG_PATA_NS87410 is not set # CONFIG_PATA_OPTI is not set CONFIG_PATA_PLATFORM=m # CONFIG_PATA_RZ1000 is not set # # Generic fallback / legacy drivers # # CONFIG_ATA_GENERIC is not set # CONFIG_PATA_LEGACY is not set # CONFIG_MD is not set # CONFIG_TARGET_CORE is not set # CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support # # CONFIG_FIREWIRE is not set # CONFIG_FIREWIRE_NOSY is not set # CONFIG_I2O is not set CONFIG_NETDEVICES=y # CONFIG_DUMMY is not set # CONFIG_BONDING is not set # CONFIG_MACVLAN is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set # CONFIG_VETH is not set # CONFIG_ARCNET is not set CONFIG_MII=y CONFIG_PHYLIB=y # # MII PHY device drivers # # CONFIG_MARVELL_PHY is not set # CONFIG_DAVICOM_PHY is not set # CONFIG_QSEMI_PHY is not set # CONFIG_LXT_PHY is not set # CONFIG_CICADA_PHY is not set # CONFIG_VITESSE_PHY is not set # CONFIG_SMSC_PHY is not set CONFIG_BROADCOM_PHY=y # CONFIG_BCM63XX_PHY is not set # CONFIG_ICPLUS_PHY is not set # CONFIG_REALTEK_PHY is not set # CONFIG_NATIONAL_PHY is not set # CONFIG_STE10XP is not set # CONFIG_LSI_ET1011C_PHY is not set # CONFIG_MICREL_PHY is not set # CONFIG_FIXED_PHY is not set # CONFIG_MDIO_BITBANG is not set CONFIG_MDIO_OCTEON=y CONFIG_NET_ETHERNET=y # CONFIG_AX88796 is not set # CONFIG_HAPPYMEAL is not set # CONFIG_SUNGEM is not set # CONFIG_CASSINI is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_SMC91X is not set # CONFIG_DM9000 is not set # CONFIG_ENC28J60 is not set # CONFIG_ETHOC is not set # CONFIG_SMSC911X is not set # CONFIG_DNET is not set # CONFIG_NET_TULIP is not set # CONFIG_HP100 is not set # CONFIG_IBM_NEW_EMAC_ZMII is not set # CONFIG_IBM_NEW_EMAC_RGMII is not set # CONFIG_IBM_NEW_EMAC_TAH is not set # CONFIG_IBM_NEW_EMAC_EMAC4 is not set # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set # CONFIG_NET_PCI is not set # CONFIG_B44 is not set # CONFIG_KS8851 is not set # CONFIG_KS8851_MLL is not set # CONFIG_ATL2 is not set CONFIG_OCTEON_MGMT_ETHERNET=m CONFIG_NETDEV_1000=y # CONFIG_ACENIC is not set # CONFIG_DL2K is not set # CONFIG_E1000 is not set # CONFIG_E1000E is not set # CONFIG_IP1000 is not set # CONFIG_IGB is not set # CONFIG_IGBVF is not set # CONFIG_NS83820 is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set # CONFIG_R8169 is not set # CONFIG_SIS190 is not set # CONFIG_SKGE is not set # CONFIG_SKY2 is not set # CONFIG_VIA_VELOCITY is not set # CONFIG_TIGON3 is not set # CONFIG_BNX2 is not set # CONFIG_CNIC is not set # CONFIG_QLA3XXX is not set # CONFIG_ATL1 is not set # CONFIG_ATL1E is not set # CONFIG_ATL1C is not set # CONFIG_JME is not set # CONFIG_STMMAC_ETH is not set # CONFIG_PCH_GBE is not set # CONFIG_NETDEV_10000 is not set # CONFIG_TR is not set CONFIG_WLAN=y # CONFIG_ATMEL is not set # CONFIG_PRISM54 is not set # CONFIG_USB_ZD1201 is not set # CONFIG_HOSTAP is not set # # Enable WiMAX (Networking options) to see the WiMAX drivers # # # USB Network Adapters # # CONFIG_USB_CATC is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_PEGASUS is not set # CONFIG_USB_RTL8150 is not set # CONFIG_USB_USBNET is not set # CONFIG_USB_IPHETH is not set # CONFIG_WAN is not set # # CAIF transport drivers # # CONFIG_FDDI is not set # CONFIG_HIPPI is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set # CONFIG_NET_FC is not set # CONFIG_NETCONSOLE is not set # CONFIG_NETPOLL is not set # CONFIG_NET_POLL_CONTROLLER is not set # CONFIG_VMXNET3 is not set # CONFIG_ISDN is not set # CONFIG_PHONE is not set # # Input device support # # CONFIG_INPUT is not set # # Hardware I/O ports # # CONFIG_SERIO is not set # CONFIG_GAMEPORT is not set # # Character devices # # CONFIG_VT is not set CONFIG_UNIX98_PTYS=y # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 # CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_NOZOMI is not set # CONFIG_N_GSM is not set CONFIG_DEVKMEM=y # # Serial drivers # CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_PCI=y CONFIG_SERIAL_8250_NR_UARTS=2 CONFIG_SERIAL_8250_RUNTIME_UARTS=2 # CONFIG_SERIAL_8250_EXTENDED is not set # # Non-8250 serial port support # # CONFIG_SERIAL_MAX3100 is not set # CONFIG_SERIAL_MAX3107 is not set # CONFIG_SERIAL_MFD_HSU is not set CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y # CONFIG_SERIAL_JSM is not set # CONFIG_SERIAL_OF_PLATFORM is not set # CONFIG_SERIAL_TIMBERDALE is not set # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_PCH_UART is not set # CONFIG_TTY_PRINTK is not set # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set # CONFIG_RAW_DRIVER is not set # CONFIG_TCG_TPM is not set CONFIG_DEVPORT=y # CONFIG_RAMOOPS is not set CONFIG_I2C=m CONFIG_I2C_BOARDINFO=y CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=m # CONFIG_I2C_MUX is not set CONFIG_I2C_HELPER_AUTO=y # # I2C Hardware Bus support # # # PC SMBus host controller drivers # # CONFIG_I2C_ALI1535 is not set # CONFIG_I2C_ALI1563 is not set # CONFIG_I2C_ALI15X3 is not set # CONFIG_I2C_AMD756 is not set # CONFIG_I2C_AMD8111 is not set # CONFIG_I2C_I801 is not set # CONFIG_I2C_ISCH is not set # CONFIG_I2C_PIIX4 is not set # CONFIG_I2C_NFORCE2 is not set # CONFIG_I2C_SIS5595 is not set # CONFIG_I2C_SIS630 is not set # CONFIG_I2C_SIS96X is not set # CONFIG_I2C_VIA is not set # CONFIG_I2C_VIAPRO is not set # # I2C system bus drivers (mostly embedded / system-on-chip) # # CONFIG_I2C_INTEL_MID is not set # CONFIG_I2C_OCORES is not set # CONFIG_I2C_PCA_PLATFORM is not set # CONFIG_I2C_PXA_PCI is not set # CONFIG_I2C_SIMTEC is not set CONFIG_I2C_OCTEON=m # CONFIG_I2C_XILINX is not set # CONFIG_I2C_EG20T is not set # # External I2C/SMBus adapter drivers # # CONFIG_I2C_DIOLAN_U2C is not set # CONFIG_I2C_PARPORT_LIGHT is not set # CONFIG_I2C_TAOS_EVM is not set # CONFIG_I2C_TINY_USB is not set # # Other I2C/SMBus bus drivers # # CONFIG_I2C_STUB is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set CONFIG_SPI=y # CONFIG_SPI_DEBUG is not set CONFIG_SPI_MASTER=y # # SPI Master Controller Drivers # # CONFIG_SPI_ALTERA is not set # CONFIG_SPI_BITBANG is not set # CONFIG_SPI_PXA2XX_PCI is not set # CONFIG_SPI_TOPCLIFF_PCH is not set # CONFIG_SPI_XILINX is not set # CONFIG_SPI_DESIGNWARE is not set # # SPI Protocol Masters # # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_TLE62X0 is not set # # PPS support # # CONFIG_PPS is not set # # PPS generators support # # CONFIG_W1 is not set # CONFIG_POWER_SUPPLY is not set CONFIG_HWMON=m # CONFIG_HWMON_VID is not set # CONFIG_HWMON_DEBUG_CHIP is not set # # Native drivers # # CONFIG_SENSORS_AD7414 is not set # CONFIG_SENSORS_AD7418 is not set # CONFIG_SENSORS_ADCXX is not set # CONFIG_SENSORS_ADM1021 is not set # CONFIG_SENSORS_ADM1025 is not set # CONFIG_SENSORS_ADM1026 is not set # CONFIG_SENSORS_ADM1029 is not set # CONFIG_SENSORS_ADM1031 is not set # CONFIG_SENSORS_ADM9240 is not set # CONFIG_SENSORS_ADT7411 is not set # CONFIG_SENSORS_ADT7462 is not set # CONFIG_SENSORS_ADT7470 is not set # CONFIG_SENSORS_ADT7475 is not set # CONFIG_SENSORS_ASC7621 is not set # CONFIG_SENSORS_ATXP1 is not set # CONFIG_SENSORS_DS620 is not set # CONFIG_SENSORS_DS1621 is not set # CONFIG_SENSORS_I5K_AMB is not set # CONFIG_SENSORS_F71805F is not set # CONFIG_SENSORS_F71882FG is not set # CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_G760A is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_JC42 is not set # CONFIG_SENSORS_LINEAGE is not set # CONFIG_SENSORS_LM63 is not set # CONFIG_SENSORS_LM70 is not set # CONFIG_SENSORS_LM73 is not set # CONFIG_SENSORS_LM75 is not set # CONFIG_SENSORS_LM77 is not set # CONFIG_SENSORS_LM78 is not set # CONFIG_SENSORS_LM80 is not set # CONFIG_SENSORS_LM83 is not set # CONFIG_SENSORS_LM85 is not set # CONFIG_SENSORS_LM87 is not set # CONFIG_SENSORS_LM90 is not set # CONFIG_SENSORS_LM92 is not set # CONFIG_SENSORS_LM93 is not set # CONFIG_SENSORS_LTC4151 is not set # CONFIG_SENSORS_LTC4215 is not set # CONFIG_SENSORS_LTC4245 is not set # CONFIG_SENSORS_LTC4261 is not set # CONFIG_SENSORS_LM95241 is not set # CONFIG_SENSORS_MAX1111 is not set # CONFIG_SENSORS_MAX1619 is not set # CONFIG_SENSORS_MAX6639 is not set # CONFIG_SENSORS_MAX6650 is not set # CONFIG_SENSORS_PC87360 is not set # CONFIG_SENSORS_PC87427 is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_PMBUS is not set # CONFIG_SENSORS_SHT21 is not set # CONFIG_SENSORS_SIS5595 is not set CONFIG_SENSORS_SMM665=m # CONFIG_SENSORS_DME1737 is not set # CONFIG_SENSORS_EMC1403 is not set # CONFIG_SENSORS_EMC2103 is not set # CONFIG_SENSORS_SMSC47M1 is not set # CONFIG_SENSORS_SMSC47M192 is not set # CONFIG_SENSORS_SMSC47B397 is not set # CONFIG_SENSORS_SCH5627 is not set # CONFIG_SENSORS_ADS1015 is not set # CONFIG_SENSORS_ADS7828 is not set # CONFIG_SENSORS_ADS7871 is not set # CONFIG_SENSORS_AMC6821 is not set # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_TMP102 is not set # CONFIG_SENSORS_TMP401 is not set # CONFIG_SENSORS_TMP421 is not set # CONFIG_SENSORS_VIA686A is not set # CONFIG_SENSORS_VT1211 is not set # CONFIG_SENSORS_VT8231 is not set # CONFIG_SENSORS_W83781D is not set # CONFIG_SENSORS_W83791D is not set # CONFIG_SENSORS_W83792D is not set # CONFIG_SENSORS_W83793 is not set # CONFIG_SENSORS_W83795 is not set # CONFIG_SENSORS_W83L785TS is not set # CONFIG_SENSORS_W83L786NG is not set # CONFIG_SENSORS_W83627HF is not set # CONFIG_SENSORS_W83627EHF is not set # CONFIG_THERMAL is not set # CONFIG_WATCHDOG is not set CONFIG_SSB_POSSIBLE=y # # Sonics Silicon Backplane # # CONFIG_SSB is not set CONFIG_MFD_SUPPORT=y # CONFIG_MFD_CORE is not set # CONFIG_MFD_SM501 is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_TPS6105X is not set # CONFIG_TPS6507X is not set # CONFIG_MFD_TMIO is not set # CONFIG_MFD_WM8400 is not set # CONFIG_MFD_WM831X_SPI is not set # CONFIG_MFD_PCF50633 is not set # CONFIG_MFD_MC13XXX is not set # CONFIG_ABX500_CORE is not set # CONFIG_EZX_PCAP is not set # CONFIG_LPC_SCH is not set # CONFIG_MFD_RDC321X is not set # CONFIG_MFD_JANZ_CMODIO is not set # CONFIG_MFD_VX855 is not set # CONFIG_MFD_WL1273_CORE is not set # CONFIG_REGULATOR is not set # CONFIG_MEDIA_SUPPORT is not set # # Graphics support # CONFIG_VGA_ARB=y CONFIG_VGA_ARB_MAX_GPUS=16 # CONFIG_DRM is not set # CONFIG_STUB_POULSBO is not set # CONFIG_VGASTATE is not set # CONFIG_VIDEO_OUTPUT_CONTROL is not set # CONFIG_FB is not set # CONFIG_BACKLIGHT_LCD_SUPPORT is not set # # Display device support # # CONFIG_DISPLAY_SUPPORT is not set # CONFIG_SOUND is not set CONFIG_USB_SUPPORT=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_EHCI=y CONFIG_USB=y # CONFIG_USB_DEBUG is not set # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set # # Miscellaneous USB options # # CONFIG_USB_DEVICEFS is not set CONFIG_USB_DEVICE_CLASS=y # CONFIG_USB_DYNAMIC_MINORS is not set # CONFIG_USB_OTG_WHITELIST is not set # CONFIG_USB_OTG_BLACKLIST_HUB is not set # CONFIG_USB_MON is not set # CONFIG_USB_WUSB is not set # CONFIG_USB_WUSB_CBAF is not set # # USB Host Controller Drivers # # CONFIG_USB_C67X00_HCD is not set # CONFIG_USB_XHCI_HCD is not set CONFIG_USB_EHCI_HCD=y # CONFIG_USB_EHCI_ROOT_HUB_TT is not set CONFIG_USB_EHCI_TT_NEWSCHED=y CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_ISP1760_HCD is not set # CONFIG_USB_ISP1362_HCD is not set CONFIG_USB_OHCI_HCD=y # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y CONFIG_USB_OHCI_LITTLE_ENDIAN=y # CONFIG_USB_UHCI_HCD is not set # CONFIG_USB_SL811_HCD is not set # CONFIG_USB_R8A66597_HCD is not set # CONFIG_USB_WHCI_HCD is not set # CONFIG_USB_HWA_HCD is not set CONFIG_USB_OCTEON_EHCI=y CONFIG_USB_OCTEON_OHCI=y CONFIG_USB_OCTEON2_COMMON=y # # USB Device Class drivers # # CONFIG_USB_ACM is not set # CONFIG_USB_PRINTER is not set # CONFIG_USB_WDM is not set # CONFIG_USB_TMC is not set # # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may # # # also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_DEBUG is not set # CONFIG_USB_STORAGE_REALTEK is not set # CONFIG_USB_STORAGE_DATAFAB is not set # CONFIG_USB_STORAGE_FREECOM is not set # CONFIG_USB_STORAGE_ISD200 is not set # CONFIG_USB_STORAGE_USBAT is not set # CONFIG_USB_STORAGE_SDDR09 is not set # CONFIG_USB_STORAGE_SDDR55 is not set # CONFIG_USB_STORAGE_JUMPSHOT is not set # CONFIG_USB_STORAGE_ALAUDA is not set # CONFIG_USB_STORAGE_KARMA is not set # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set # CONFIG_USB_STORAGE_ENE_UB6250 is not set # CONFIG_USB_UAS is not set # CONFIG_USB_LIBUSUAL is not set # # USB Imaging devices # # CONFIG_USB_MDC800 is not set # CONFIG_USB_MICROTEK is not set # # USB port drivers # # CONFIG_USB_SERIAL is not set # # USB Miscellaneous drivers # # CONFIG_USB_EMI62 is not set # CONFIG_USB_EMI26 is not set # CONFIG_USB_ADUTUX is not set # CONFIG_USB_SEVSEG is not set # CONFIG_USB_RIO500 is not set # CONFIG_USB_LEGOTOWER is not set # CONFIG_USB_LCD is not set # CONFIG_USB_LED is not set # CONFIG_USB_CYPRESS_CY7C63 is not set # CONFIG_USB_CYTHERM is not set # CONFIG_USB_IDMOUSE is not set # CONFIG_USB_FTDI_ELAN is not set # CONFIG_USB_APPLEDISPLAY is not set # CONFIG_USB_SISUSBVGA is not set # CONFIG_USB_LD is not set # CONFIG_USB_TRANCEVIBRATOR is not set # CONFIG_USB_IOWARRIOR is not set # CONFIG_USB_TEST is not set # CONFIG_USB_ISIGHTFW is not set # CONFIG_USB_YUREX is not set # CONFIG_USB_GADGET is not set # # OTG and related infrastructure # # CONFIG_NOP_USB_XCEIV is not set # CONFIG_UWB is not set # CONFIG_MMC is not set # CONFIG_MEMSTICK is not set # CONFIG_NEW_LEDS is not set # CONFIG_NFC_DEVICES is not set # CONFIG_ACCESSIBILITY is not set # CONFIG_INFINIBAND is not set CONFIG_RTC_LIB=y # CONFIG_RTC_CLASS is not set # CONFIG_DMADEVICES is not set # CONFIG_AUXDISPLAY is not set # CONFIG_UIO is not set CONFIG_STAGING=y # CONFIG_STAGING_EXCLUDE_BUILD is not set # CONFIG_ET131X is not set # CONFIG_USB_IP_COMMON is not set # CONFIG_ECHO is not set # CONFIG_BRCM80211 is not set # CONFIG_COMEDI is not set # CONFIG_ASUS_OLED is not set # CONFIG_R8187SE is not set # CONFIG_RTL8192U is not set # CONFIG_RTL8192E is not set # CONFIG_R8712U is not set # CONFIG_RTS_PSTOR is not set # CONFIG_TRANZPORT is not set # CONFIG_POHMELFS is not set # CONFIG_IDE_PHISON is not set CONFIG_OCTEON_ETHERNET=y # CONFIG_VT6655 is not set # CONFIG_VT6656 is not set # CONFIG_VME_BUS is not set # CONFIG_DX_SEP is not set # CONFIG_IIO is not set # CONFIG_XVMALLOC is not set # CONFIG_ZRAM is not set # CONFIG_CRYSTALHD is not set CONFIG_MACH_NO_WESTBRIDGE=y # CONFIG_USB_ENESTORAGE is not set # CONFIG_BCM_WIMAX is not set # CONFIG_FT1000 is not set # # Speakup console speech # # # Altera FPGA firmware download module # # CONFIG_ALTERA_STAPL is not set # # File systems # CONFIG_EXT2_FS=y # CONFIG_EXT2_FS_XATTR is not set # CONFIG_EXT2_FS_XIP is not set CONFIG_EXT3_FS=y CONFIG_EXT3_DEFAULTS_TO_ORDERED=y CONFIG_EXT3_FS_XATTR=y # CONFIG_EXT3_FS_POSIX_ACL is not set # CONFIG_EXT3_FS_SECURITY is not set # CONFIG_EXT4_FS is not set CONFIG_JBD=y # CONFIG_JBD_DEBUG is not set CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set CONFIG_JFS_FS=m # CONFIG_JFS_POSIX_ACL is not set # CONFIG_JFS_SECURITY is not set # CONFIG_JFS_DEBUG is not set # CONFIG_JFS_STATISTICS is not set # CONFIG_XFS_FS is not set # CONFIG_GFS2_FS is not set # CONFIG_BTRFS_FS is not set # CONFIG_NILFS2_FS is not set # CONFIG_FS_POSIX_ACL is not set CONFIG_FILE_LOCKING=y CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y CONFIG_INOTIFY_USER=y # CONFIG_FANOTIFY is not set # CONFIG_QUOTA is not set # CONFIG_QUOTACTL is not set # CONFIG_AUTOFS4_FS is not set # CONFIG_FUSE_FS is not set # # Caches # # CONFIG_FSCACHE is not set # # CD-ROM/DVD Filesystems # # CONFIG_ISO9660_FS is not set # CONFIG_UDF_FS is not set # # DOS/FAT/NT Filesystems # CONFIG_FAT_FS=m CONFIG_MSDOS_FS=m CONFIG_VFAT_FS=m CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" CONFIG_NTFS_FS=m # CONFIG_NTFS_DEBUG is not set # CONFIG_NTFS_RW is not set # # Pseudo filesystems # CONFIG_PROC_FS=y CONFIG_PROC_KCORE=y CONFIG_PROC_SYSCTL=y CONFIG_PROC_PAGE_MONITOR=y CONFIG_SYSFS=y CONFIG_TMPFS=y # CONFIG_TMPFS_POSIX_ACL is not set # CONFIG_HUGETLBFS is not set # CONFIG_HUGETLB_PAGE is not set # CONFIG_CONFIGFS_FS is not set CONFIG_MISC_FILESYSTEMS=y # CONFIG_ADFS_FS is not set # CONFIG_AFFS_FS is not set # CONFIG_HFS_FS is not set # CONFIG_HFSPLUS_FS is not set # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set # CONFIG_JFFS2_FS is not set # CONFIG_LOGFS is not set # CONFIG_CRAMFS is not set # CONFIG_SQUASHFS is not set # CONFIG_VXFS_FS is not set # CONFIG_MINIX_FS is not set # CONFIG_MINIX_FS_NATIVE_ENDIAN is not set # CONFIG_OMFS_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set # CONFIG_ROMFS_FS is not set # CONFIG_PSTORE is not set # CONFIG_SYSV_FS is not set CONFIG_UFS_FS=y CONFIG_UFS_FS_WRITE=y # CONFIG_UFS_DEBUG is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V3=y # CONFIG_NFS_V3_ACL is not set # CONFIG_NFS_V4 is not set # CONFIG_NFSD is not set CONFIG_LOCKD=y CONFIG_LOCKD_V4=y CONFIG_NFS_COMMON=y CONFIG_SUNRPC=y # CONFIG_CEPH_FS is not set # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set # # Partition Types # CONFIG_PARTITION_ADVANCED=y # CONFIG_ACORN_PARTITION is not set # CONFIG_OSF_PARTITION is not set # CONFIG_AMIGA_PARTITION is not set # CONFIG_ATARI_PARTITION is not set # CONFIG_MAC_PARTITION is not set CONFIG_MSDOS_PARTITION=y CONFIG_BSD_DISKLABEL=y # CONFIG_MINIX_SUBPARTITION is not set # CONFIG_SOLARIS_X86_PARTITION is not set # CONFIG_UNIXWARE_DISKLABEL is not set # CONFIG_LDM_PARTITION is not set # CONFIG_SGI_PARTITION is not set # CONFIG_ULTRIX_PARTITION is not set # CONFIG_SUN_PARTITION is not set # CONFIG_KARMA_PARTITION is not set # CONFIG_EFI_PARTITION is not set # CONFIG_SYSV68_PARTITION is not set CONFIG_NLS=y CONFIG_NLS_DEFAULT="iso8859-1" CONFIG_NLS_CODEPAGE_437=y # CONFIG_NLS_CODEPAGE_737 is not set # CONFIG_NLS_CODEPAGE_775 is not set # CONFIG_NLS_CODEPAGE_850 is not set # CONFIG_NLS_CODEPAGE_852 is not set # CONFIG_NLS_CODEPAGE_855 is not set # CONFIG_NLS_CODEPAGE_857 is not set # CONFIG_NLS_CODEPAGE_860 is not set # CONFIG_NLS_CODEPAGE_861 is not set # CONFIG_NLS_CODEPAGE_862 is not set # CONFIG_NLS_CODEPAGE_863 is not set # CONFIG_NLS_CODEPAGE_864 is not set # CONFIG_NLS_CODEPAGE_865 is not set # CONFIG_NLS_CODEPAGE_866 is not set # CONFIG_NLS_CODEPAGE_869 is not set # CONFIG_NLS_CODEPAGE_936 is not set # CONFIG_NLS_CODEPAGE_950 is not set # CONFIG_NLS_CODEPAGE_932 is not set # CONFIG_NLS_CODEPAGE_949 is not set # CONFIG_NLS_CODEPAGE_874 is not set # CONFIG_NLS_ISO8859_8 is not set # CONFIG_NLS_CODEPAGE_1250 is not set # CONFIG_NLS_CODEPAGE_1251 is not set # CONFIG_NLS_ASCII is not set CONFIG_NLS_ISO8859_1=y # CONFIG_NLS_ISO8859_2 is not set # CONFIG_NLS_ISO8859_3 is not set # CONFIG_NLS_ISO8859_4 is not set # CONFIG_NLS_ISO8859_5 is not set # CONFIG_NLS_ISO8859_6 is not set # CONFIG_NLS_ISO8859_7 is not set # CONFIG_NLS_ISO8859_9 is not set # CONFIG_NLS_ISO8859_13 is not set # CONFIG_NLS_ISO8859_14 is not set # CONFIG_NLS_ISO8859_15 is not set # CONFIG_NLS_KOI8_R is not set # CONFIG_NLS_KOI8_U is not set # CONFIG_NLS_UTF8 is not set # # Kernel hacking # CONFIG_TRACE_IRQFLAGS_SUPPORT=y # CONFIG_PRINTK_TIME is not set CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 CONFIG_ENABLE_WARN_DEPRECATED=y CONFIG_ENABLE_MUST_CHECK=y CONFIG_FRAME_WARN=2048 CONFIG_MAGIC_SYSRQ=y # CONFIG_STRIP_ASM_SYMS is not set # CONFIG_UNUSED_SYMBOLS is not set CONFIG_DEBUG_FS=y # CONFIG_HEADERS_CHECK is not set # CONFIG_DEBUG_SECTION_MISMATCH is not set CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_SHIRQ=y CONFIG_LOCKUP_DETECTOR=y # CONFIG_HARDLOCKUP_DETECTOR is not set CONFIG_BOOTPARAM_HARDLOCKUP_PANIC=y CONFIG_BOOTPARAM_HARDLOCKUP_PANIC_VALUE=1 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=1 CONFIG_DETECT_HUNG_TASK=y CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=1 CONFIG_SCHED_DEBUG=y # CONFIG_SCHEDSTATS is not set # CONFIG_TIMER_STATS is not set # CONFIG_DEBUG_OBJECTS is not set # CONFIG_DEBUG_SLAB is not set # CONFIG_DEBUG_RT_MUTEXES is not set # CONFIG_RT_MUTEX_TESTER is not set # CONFIG_DEBUG_SPINLOCK is not set # CONFIG_DEBUG_MUTEXES is not set # CONFIG_DEBUG_LOCK_ALLOC is not set # CONFIG_PROVE_LOCKING is not set # CONFIG_SPARSE_RCU_POINTER is not set # CONFIG_LOCK_STAT is not set # CONFIG_DEBUG_SPINLOCK_SLEEP is not set # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set # CONFIG_DEBUG_KOBJECT is not set CONFIG_DEBUG_INFO=y # CONFIG_DEBUG_INFO_REDUCED is not set # CONFIG_DEBUG_VM is not set # CONFIG_DEBUG_WRITECOUNT is not set # CONFIG_DEBUG_MEMORY_INIT is not set # CONFIG_DEBUG_LIST is not set # CONFIG_TEST_LIST_SORT is not set # CONFIG_DEBUG_SG is not set # CONFIG_DEBUG_NOTIFIERS is not set # CONFIG_DEBUG_CREDENTIALS is not set # CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_RCU_TORTURE_TEST is not set # CONFIG_RCU_CPU_STALL_DETECTOR is not set # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set # CONFIG_LKDTM is not set # CONFIG_FAULT_INJECTION is not set CONFIG_SYSCTL_SYSCALL_CHECK=y # CONFIG_DEBUG_PAGEALLOC is not set CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_C_RECORDMCOUNT=y CONFIG_RING_BUFFER=y CONFIG_RING_BUFFER_ALLOW_SWAP=y CONFIG_TRACING_SUPPORT=y # CONFIG_FTRACE is not set # CONFIG_DYNAMIC_DEBUG is not set # CONFIG_DMA_API_DEBUG is not set # CONFIG_ATOMIC64_SELFTEST is not set # CONFIG_SAMPLES is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set # CONFIG_TEST_KSTRTOX is not set CONFIG_EARLY_PRINTK=y # CONFIG_CMDLINE_BOOL is not set # CONFIG_DEBUG_STACKOVERFLOW is not set # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_RUNTIME_DEBUG is not set # CONFIG_SPINLOCK_TEST is not set # # Security options # # CONFIG_KEYS is not set # CONFIG_SECURITY_DMESG_RESTRICT is not set CONFIG_SECURITY=y # CONFIG_SECURITYFS is not set CONFIG_SECURITY_NETWORK=y # CONFIG_SECURITY_NETWORK_XFRM is not set # CONFIG_SECURITY_PATH is not set # CONFIG_SECURITY_TOMOYO is not set # CONFIG_SECURITY_APPARMOR is not set # CONFIG_IMA is not set CONFIG_DEFAULT_SECURITY_DAC=y CONFIG_DEFAULT_SECURITY="" CONFIG_CRYPTO=y # # Crypto core or helper # CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_ALGAPI2=y CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_BLKCIPHER=y CONFIG_CRYPTO_BLKCIPHER2=y CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_PCOMP2=y CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER2=y CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y # CONFIG_CRYPTO_GF128MUL is not set # CONFIG_CRYPTO_NULL is not set # CONFIG_CRYPTO_PCRYPT is not set CONFIG_CRYPTO_WORKQUEUE=y # CONFIG_CRYPTO_CRYPTD is not set # CONFIG_CRYPTO_AUTHENC is not set # CONFIG_CRYPTO_TEST is not set # # Authenticated Encryption with Associated Data # # CONFIG_CRYPTO_CCM is not set # CONFIG_CRYPTO_GCM is not set # CONFIG_CRYPTO_SEQIV is not set # # Block modes # CONFIG_CRYPTO_CBC=y # CONFIG_CRYPTO_CTR is not set # CONFIG_CRYPTO_CTS is not set # CONFIG_CRYPTO_ECB is not set # CONFIG_CRYPTO_LRW is not set # CONFIG_CRYPTO_PCBC is not set # CONFIG_CRYPTO_XTS is not set # # Hash modes # CONFIG_CRYPTO_HMAC=y # CONFIG_CRYPTO_XCBC is not set # CONFIG_CRYPTO_VMAC is not set # # Digest # # CONFIG_CRYPTO_CRC32C is not set # CONFIG_CRYPTO_GHASH is not set # CONFIG_CRYPTO_MD4 is not set CONFIG_CRYPTO_MD5=y # CONFIG_CRYPTO_MICHAEL_MIC is not set # CONFIG_CRYPTO_RMD128 is not set # CONFIG_CRYPTO_RMD160 is not set # CONFIG_CRYPTO_RMD256 is not set # CONFIG_CRYPTO_RMD320 is not set # CONFIG_CRYPTO_SHA1 is not set # CONFIG_CRYPTO_SHA256 is not set # CONFIG_CRYPTO_SHA512 is not set # CONFIG_CRYPTO_TGR192 is not set # CONFIG_CRYPTO_WP512 is not set # # Ciphers # # CONFIG_CRYPTO_AES is not set # CONFIG_CRYPTO_ANUBIS is not set # CONFIG_CRYPTO_ARC4 is not set # CONFIG_CRYPTO_BLOWFISH is not set # CONFIG_CRYPTO_CAMELLIA is not set # CONFIG_CRYPTO_CAST5 is not set # CONFIG_CRYPTO_CAST6 is not set CONFIG_CRYPTO_DES=y # CONFIG_CRYPTO_FCRYPT is not set # CONFIG_CRYPTO_KHAZAD is not set # CONFIG_CRYPTO_SALSA20 is not set # CONFIG_CRYPTO_SEED is not set # CONFIG_CRYPTO_SERPENT is not set # CONFIG_CRYPTO_TEA is not set # CONFIG_CRYPTO_TWOFISH is not set # # Compression # # CONFIG_CRYPTO_DEFLATE is not set # CONFIG_CRYPTO_ZLIB is not set # CONFIG_CRYPTO_LZO is not set # # Random Number Generation # # CONFIG_CRYPTO_ANSI_CPRNG is not set # CONFIG_CRYPTO_USER_API_HASH is not set # CONFIG_CRYPTO_USER_API_SKCIPHER is not set CONFIG_CRYPTO_HW=y # CONFIG_CRYPTO_DEV_HIFN_795X is not set # CONFIG_VIRTUALIZATION is not set # CONFIG_BINARY_PRINTF is not set # # Library routines # CONFIG_BITREVERSE=y CONFIG_GENERIC_FIND_LAST_BIT=y # CONFIG_CRC_CCITT is not set # CONFIG_CRC16 is not set # CONFIG_CRC_T10DIF is not set # CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y # CONFIG_CRC7 is not set # CONFIG_LIBCRC32C is not set CONFIG_ZLIB_INFLATE=y # CONFIG_XZ_DEC is not set # CONFIG_XZ_DEC_BCJ is not set CONFIG_DECOMPRESS_GZIP=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_DMA=y CONFIG_CPU_RMAP=y CONFIG_NLATTR=y # CONFIG_AVERAGE is not set --------------000205060904040302050301-- From ralf@linux-mips.org Fri Jun 10 05:57:19 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 05:57:23 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:42421 "EHLO duck.linux-mips.net" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491076Ab1FJD5T (ORCPT ); Fri, 10 Jun 2011 05:57:19 +0200 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.3) with ESMTP id p5A3wI4b013445; Fri, 10 Jun 2011 04:58:18 +0100 Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id p5A3wHcB013442; Fri, 10 Jun 2011 04:58:17 +0100 Date: Fri, 10 Jun 2011 04:58:17 +0100 From: Ralf Baechle To: Jamie Iles Cc: linux-serial@vger.kernel.org, Greg Kroah-Hartman , linux-mips@linux-mips.org, Marc St-Jean , Shane McDonald , Anoop P A Subject: Re: [PATCH] tty: 8250: handle USR for DesignWare 8250 with correct accessors Message-ID: <20110610035817.GA6740@linux-mips.org> References: <1307616525-22028-1-git-send-email-jamie@jamieiles.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1307616525-22028-1-git-send-email-jamie@jamieiles.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 30314 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8789 Content-Length: 4407 Lines: 110 On Thu, Jun 09, 2011 at 11:48:45AM +0100, Jamie Iles wrote: > Don't pass a pointer to the USR register through the private_data field > of the platform data. This isn't type safe and it's not clear what is > happening. Add the USR offset to serial_reg.h and use an explicit > serial_in() to read it with the correct accessor. > > Fix up the only in-tree user to not pass anything through private_data. > > Cc: Ralf Baechle > Cc: Greg Kroah-Hartman > Signed-off-by: Jamie Iles > --- > arch/mips/pmc-sierra/msp71xx/msp_serial.c | 1 - > drivers/tty/serial/8250.c | 3 +-- > include/linux/serial_reg.h | 3 +++ > 3 files changed, 4 insertions(+), 3 deletions(-) > > diff --git a/arch/mips/pmc-sierra/msp71xx/msp_serial.c b/arch/mips/pmc-sierra/msp71xx/msp_serial.c > index f726162..5ccfdcc 100644 > --- a/arch/mips/pmc-sierra/msp71xx/msp_serial.c > +++ b/arch/mips/pmc-sierra/msp71xx/msp_serial.c > @@ -63,7 +63,6 @@ void __init msp_serial_setup(void) > up.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST; > up.type = PORT_16550A; > up.line = 0; > - up.private_data = (void*)UART0_STATUS_REG; > if (early_serial_setup(&up)) > printk(KERN_ERR "Early serial init of port 0 failed\n"); > > diff --git a/drivers/tty/serial/8250.c b/drivers/tty/serial/8250.c > index b40f7b9..0596caa 100644 > --- a/drivers/tty/serial/8250.c > +++ b/drivers/tty/serial/8250.c > @@ -1666,8 +1666,7 @@ static irqreturn_t serial8250_interrupt(int irq, void *dev_id) > * interrupt meaning an LCR write attempt occurred while the > * UART was busy. The interrupt must be cleared by reading > * the UART status register (USR) and the LCR re-written. */ > - unsigned int status; > - status = *(volatile u32 *)up->port.private_data; > + (void)serial_in(up, UART_DWAPB_USR); > serial_out(up, UART_LCR, up->lcr); > > handled = 1; > diff --git a/include/linux/serial_reg.h b/include/linux/serial_reg.h > index c75bda3..abfd8ea 100644 > --- a/include/linux/serial_reg.h > +++ b/include/linux/serial_reg.h > @@ -350,6 +350,9 @@ > #define UART_OMAP_SYSS 0x16 /* System status register */ > #define UART_OMAP_WER 0x17 /* Wake-up enable register */ > > +/* Extra serial register definitions for the Synopsys DesignWare UART. */ > +#define UART_DWAPB_USR 0x1F /* UART status register */ > + > /* > * These are the definitions for the MDR1 register > */ NAck. The original read access was for a read access at offset 0xc0 from the base address. Your patch changes this to offset 0x1f * 4 = 0x7c. If you look at arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h there's #define MSP_UART0_BASE (MSP_SLP_BASE + 0x100) /* UART0 controller base */ #define MSP_BCPY_CTRL_BASE (MSP_SLP_BASE + 0x120) /* Block Copy controller base */ So there are just 0x20 of address space reserved for that UART. Me thinks that PMC-Sierra clamped the 256 byte address space of the DesignWare APB UART to what is standard for 16550 class UARTs, 8 registers which at a shift of 4 is 0x20 bytes and the status register being accesses is really something else. I'd guess PMC-Sierra just remapped the register to another address. A more proper cleanup would probably be passing something like struct serial_private { void (*dw_abp_int_callback)(void); unsigned long private; }; then in the 8250 interrupt handler something like: } else if ((up->port.iotype == UPIO_DWAPB || up->port.iotype == UPIO_DWAPB32) && (iir & UART_IIR_BUSY) == UART_IIR_BUSY) { struct serial_private *sp; sp = (void *) up->port.private_data; if (sp->dw_abp_int_callback) sp->dw_abp_int_callback(sp->private); serial_out(up, UART_LCR, up->lcr); handled = 1; end = NULL; } On a 2nd thought I wonder if the restricted address space of the PMC-Sierra variant and the strange remapping would justify treating it as a subvariant of the DW APB UART, rename it to UPIO_PMC_MSP_DWAPB, hardcode the access to the remapped status register. And get rid of the unused UPIO_DWAPB32 ... I've cced a few people who should know more about this. Ralf From jamie@jamieiles.com Fri Jun 10 09:54:48 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 09:54:53 +0200 (CEST) Received: from mail-ww0-f43.google.com ([74.125.82.43]:64835 "EHLO mail-ww0-f43.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491108Ab1FJHys (ORCPT ); Fri, 10 Jun 2011 09:54:48 +0200 Received: by wwb17 with SMTP id 17so2062584wwb.24 for ; Fri, 10 Jun 2011 00:54:42 -0700 (PDT) Received: by 10.217.1.212 with SMTP id n62mr7392456wes.25.1307692482323; Fri, 10 Jun 2011 00:54:42 -0700 (PDT) Received: from localhost (cpc3-chap8-2-0-cust205.aztw.cable.virginmedia.com [94.171.253.206]) by mx.google.com with ESMTPS id e1sm1811429wbh.5.2011.06.10.00.54.40 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 10 Jun 2011 00:54:41 -0700 (PDT) Date: Fri, 10 Jun 2011 08:54:26 +0100 From: Jamie Iles To: Ralf Baechle Cc: Jamie Iles , linux-serial@vger.kernel.org, Greg Kroah-Hartman , linux-mips@linux-mips.org, Marc St-Jean , Shane McDonald , Anoop P A , alan@linux.intel.com Subject: Re: [PATCH] tty: 8250: handle USR for DesignWare 8250 with correct accessors Message-ID: <20110610075426.GM3711@pulham.picochip.com> References: <1307616525-22028-1-git-send-email-jamie@jamieiles.com> <20110610035817.GA6740@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20110610035817.GA6740@linux-mips.org> User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 30315 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jamie@jamieiles.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8877 Content-Length: 5283 Lines: 124 On Fri, Jun 10, 2011 at 04:58:17AM +0100, Ralf Baechle wrote: > On Thu, Jun 09, 2011 at 11:48:45AM +0100, Jamie Iles wrote: > > > Don't pass a pointer to the USR register through the private_data field > > of the platform data. This isn't type safe and it's not clear what is > > happening. Add the USR offset to serial_reg.h and use an explicit > > serial_in() to read it with the correct accessor. > > > > Fix up the only in-tree user to not pass anything through private_data. > > > > Cc: Ralf Baechle > > Cc: Greg Kroah-Hartman > > Signed-off-by: Jamie Iles > > --- > > arch/mips/pmc-sierra/msp71xx/msp_serial.c | 1 - > > drivers/tty/serial/8250.c | 3 +-- > > include/linux/serial_reg.h | 3 +++ > > 3 files changed, 4 insertions(+), 3 deletions(-) > > > > diff --git a/arch/mips/pmc-sierra/msp71xx/msp_serial.c b/arch/mips/pmc-sierra/msp71xx/msp_serial.c > > index f726162..5ccfdcc 100644 > > --- a/arch/mips/pmc-sierra/msp71xx/msp_serial.c > > +++ b/arch/mips/pmc-sierra/msp71xx/msp_serial.c > > @@ -63,7 +63,6 @@ void __init msp_serial_setup(void) > > up.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST; > > up.type = PORT_16550A; > > up.line = 0; > > - up.private_data = (void*)UART0_STATUS_REG; > > if (early_serial_setup(&up)) > > printk(KERN_ERR "Early serial init of port 0 failed\n"); > > > > diff --git a/drivers/tty/serial/8250.c b/drivers/tty/serial/8250.c > > index b40f7b9..0596caa 100644 > > --- a/drivers/tty/serial/8250.c > > +++ b/drivers/tty/serial/8250.c > > @@ -1666,8 +1666,7 @@ static irqreturn_t serial8250_interrupt(int irq, void *dev_id) > > * interrupt meaning an LCR write attempt occurred while the > > * UART was busy. The interrupt must be cleared by reading > > * the UART status register (USR) and the LCR re-written. */ > > - unsigned int status; > > - status = *(volatile u32 *)up->port.private_data; > > + (void)serial_in(up, UART_DWAPB_USR); > > serial_out(up, UART_LCR, up->lcr); > > > > handled = 1; > > diff --git a/include/linux/serial_reg.h b/include/linux/serial_reg.h > > index c75bda3..abfd8ea 100644 > > --- a/include/linux/serial_reg.h > > +++ b/include/linux/serial_reg.h > > @@ -350,6 +350,9 @@ > > #define UART_OMAP_SYSS 0x16 /* System status register */ > > #define UART_OMAP_WER 0x17 /* Wake-up enable register */ > > > > +/* Extra serial register definitions for the Synopsys DesignWare UART. */ > > +#define UART_DWAPB_USR 0x1F /* UART status register */ > > + > > /* > > * These are the definitions for the MDR1 register > > */ > > NAck. > > The original read access was for a read access at offset 0xc0 from the > base address. Your patch changes this to offset 0x1f * 4 = 0x7c. > > If you look at arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h there's > > #define MSP_UART0_BASE (MSP_SLP_BASE + 0x100) > /* UART0 controller base */ > #define MSP_BCPY_CTRL_BASE (MSP_SLP_BASE + 0x120) > /* Block Copy controller base */ > > So there are just 0x20 of address space reserved for that UART. Me thinks > that PMC-Sierra clamped the 256 byte address space of the DesignWare APB > UART to what is standard for 16550 class UARTs, 8 registers which at a > shift of 4 is 0x20 bytes and the status register being accesses is really > something else. I'd guess PMC-Sierra just remapped the register to > another address. Ahh, yes. The Synopsys docs put the status reg at 0x7C. I hadn't twigged that it wasn't the same for the PMC-Sierra. I guess that's why it wasn't done this way before. > A more proper cleanup would probably be passing something like > > struct serial_private { > void (*dw_abp_int_callback)(void); > unsigned long private; > }; > > then in the 8250 interrupt handler something like: > > } else if ((up->port.iotype == UPIO_DWAPB || > up->port.iotype == UPIO_DWAPB32) && > (iir & UART_IIR_BUSY) == UART_IIR_BUSY) { > struct serial_private *sp; > > sp = (void *) up->port.private_data; > if (sp->dw_abp_int_callback) > sp->dw_abp_int_callback(sp->private); > serial_out(up, UART_LCR, up->lcr); > > handled = 1; > > end = NULL; > } > > On a 2nd thought I wonder if the restricted address space of the PMC-Sierra > variant and the strange remapping would justify treating it as a subvariant > of the DW APB UART, rename it to UPIO_PMC_MSP_DWAPB, hardcode the access to > the remapped status register. And get rid of the unused UPIO_DWAPB32 ... Hmm, I'm not sure what the best option is there. With regards to UPIO_DWAPB32 it's used in several of our devices what I'm trying to mainline at the moment so I'd like to come up with something that works for both. I found this series from Alan (http://www.spinics.net/lists/linux-serial/msg03484.html) which looks like it would do the job if we added the extra irq callback. Ideally we just remove both of the UPIO_DWAPB and UPIO_DWAPB32 and let the platform specify the ops. Jamie From robert.richter@amd.com Fri Jun 10 14:36:12 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 14:36:21 +0200 (CEST) Received: from tx2ehsobe003.messaging.microsoft.com ([65.55.88.13]:9696 "EHLO TX2EHSOBE005.bigfish.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491076Ab1FJMgM (ORCPT ); Fri, 10 Jun 2011 14:36:12 +0200 Received: from mail175-tx2-R.bigfish.com (10.9.14.251) by TX2EHSOBE005.bigfish.com (10.9.40.25) with Microsoft SMTP Server id 14.1.225.22; Fri, 10 Jun 2011 12:36:03 +0000 Received: from mail175-tx2 (localhost.localdomain [127.0.0.1]) by mail175-tx2-R.bigfish.com (Postfix) with ESMTP id 0994B109832A; Fri, 10 Jun 2011 12:36:03 +0000 (UTC) X-SpamScore: -12 X-BigFish: VPS-12(zz1432N98dK4015Lzz1202hzz8275bhz32i668h839h61h) X-Forefront-Antispam-Report: CIP:163.181.249.108;KIP:(null);UIP:(null);IPVD:NLI;H:ausb3twp01.amd.com;RD:none;EFVD:NLI Received: from mail175-tx2 (localhost.localdomain [127.0.0.1]) by mail175-tx2 (MessageSwitch) id 1307709362846720_18102; Fri, 10 Jun 2011 12:36:02 +0000 (UTC) Received: from TX2EHSMHS038.bigfish.com (unknown [10.9.14.250]) by mail175-tx2.bigfish.com (Postfix) with ESMTP id BE4031AD004B; Fri, 10 Jun 2011 12:36:02 +0000 (UTC) Received: from ausb3twp01.amd.com (163.181.249.108) by TX2EHSMHS038.bigfish.com (10.9.99.138) with Microsoft SMTP Server id 14.1.225.22; Fri, 10 Jun 2011 12:36:02 +0000 X-WSS-ID: 0LMKQZZ-01-809-02 X-M-MSG: Received: from sausexedgep02.amd.com (sausexedgep02-ext.amd.com [163.181.249.73]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by ausb3twp01.amd.com (Axway MailGate 3.8.1) with ESMTP id 221B91028133; Fri, 10 Jun 2011 07:35:59 -0500 (CDT) Received: from sausexhtp02.amd.com (163.181.3.152) by sausexedgep02.amd.com (163.181.36.59) with Microsoft SMTP Server (TLS) id 8.3.106.1; Fri, 10 Jun 2011 07:36:06 -0500 Received: from storexhtp02.amd.com (172.24.4.4) by sausexhtp02.amd.com (163.181.3.152) with Microsoft SMTP Server (TLS) id 8.3.83.0; Fri, 10 Jun 2011 07:36:00 -0500 Received: from gwo.osrc.amd.com (165.204.16.204) by storexhtp02.amd.com (172.24.4.4) with Microsoft SMTP Server id 8.3.83.0; Fri, 10 Jun 2011 08:35:58 -0400 Received: from erda.amd.com (erda.osrc.amd.com [165.204.15.17]) by gwo.osrc.amd.com (Postfix) with ESMTP id 3C0A349C1A8; Fri, 10 Jun 2011 13:35:58 +0100 (BST) Received: by erda.amd.com (Postfix, from userid 35569) id 0D26E800A; Fri, 10 Jun 2011 14:35:57 +0200 (CEST) Date: Fri, 10 Jun 2011 14:35:57 +0200 From: Robert Richter To: Gergely Kis , Ralf Baechle CC: "linux-mips@linux-mips.org" , Daniel Kalmar , "oprofile-list@lists.sourceforge.net" Subject: Re: [PATCH 0/2] MIPS: oprofile: callgraph support Message-ID: <20110610123557.GQ20052@erda.amd.com> References: <1305290285-13818-1-git-send-email-gergely@homejinni.com> <20110524084250.GR20052@erda.amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20110524084250.GR20052@erda.amd.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-OriginatorOrg: amd.com X-archive-position: 30316 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: robert.richter@amd.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9115 Content-Length: 1277 Lines: 36 On 24.05.11 10:42:50, Robert Richter wrote: > On 13.05.11 08:38:03, Gergely Kis wrote: > > From: Daniel Kalmar > > > > These patches add callgraph/backtrace support to oprofile on MIPS. > > > > Stack unwinding is done by code examination. For kernelspace, the > > already existing unwind function is utilized that uses kallsyms to > > quickly find the beginning of functions. For userspace a new function > > was added that examines code at and before the pc. > > > > Daniel Kalmar (2): > > MIPS: Add unwind_stack_by_address to support unwinding from any > > kernel code address > > MIPS: oprofile: Add callgraph support > > > > arch/mips/include/asm/stacktrace.h | 4 + > > arch/mips/kernel/process.c | 18 +++- > > arch/mips/oprofile/Makefile | 2 +- > > arch/mips/oprofile/backtrace.c | 173 ++++++++++++++++++++++++++++++++++++ > > arch/mips/oprofile/common.c | 1 + > > arch/mips/oprofile/op_impl.h | 2 + > > 6 files changed, 194 insertions(+), 6 deletions(-) > > create mode 100644 arch/mips/oprofile/backtrace.c If there are no objections I will apply the patches next week to the oprofile tree. Thanks, -Robert -- Advanced Micro Devices, Inc. Operating System Research Center From minipli@googlemail.com Fri Jun 10 15:10:10 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 15:10:15 +0200 (CEST) Received: from grimli.r00tworld.net ([83.169.44.195]:58620 "EHLO mail.r00tworld.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490990Ab1FJNKK (ORCPT ); Fri, 10 Jun 2011 15:10:10 +0200 Received: by mail.r00tworld.net (Postfix, from userid 1000) id C9FBC115901B4; Fri, 10 Jun 2011 15:10:04 +0200 (CEST) From: Mathias Krause To: Ralf Baechle Cc: Andrew Morton , Linus Torvalds , linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, Mathias Krause Subject: [PATCH] mips, exec: remove redundant addr_limit assignment Date: Fri, 10 Jun 2011 15:10:04 +0200 Message-Id: <1307711404-9745-1-git-send-email-minipli@googlemail.com> X-Mailer: git-send-email 1.5.6.5 In-Reply-To: References: References: <1307642718-22257-1-git-send-email-minipli@googlemail.com> <20110609155630.0f734351.akpm@linux-foundation.org> X-archive-position: 30317 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: minipli@googlemail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9155 Content-Length: 667 Lines: 23 The address limit is already set in flush_old_exec() via set_fs(USER_DS) so this assignment is redundant. Signed-off-by: Mathias Krause --- arch/mips/kernel/process.c | 1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c index d2112d3..a8d53e5 100644 --- a/arch/mips/kernel/process.c +++ b/arch/mips/kernel/process.c @@ -103,7 +103,6 @@ void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp) __init_dsp(); regs->cp0_epc = pc; regs->regs[29] = sp; - current_thread_info()->addr_limit = USER_DS; } void exit_thread(void) -- 1.5.6.5 From alan@linux.intel.com Fri Jun 10 15:59:35 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 15:59:38 +0200 (CEST) Received: from mga11.intel.com ([192.55.52.93]:64251 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491102Ab1FJN7f (ORCPT ); Fri, 10 Jun 2011 15:59:35 +0200 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 10 Jun 2011 06:59:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.65,347,1304319600"; d="scan'208";a="14794275" Received: from unknown (HELO bob.linux.org.uk) ([10.255.13.27]) by fmsmga002.fm.intel.com with ESMTP; 10 Jun 2011 06:59:25 -0700 Date: Fri, 10 Jun 2011 14:57:24 +0100 From: Alan Cox To: Jamie Iles Cc: Ralf Baechle , linux-serial@vger.kernel.org, Greg Kroah-Hartman , linux-mips@linux-mips.org, Marc St-Jean , Shane McDonald , Anoop P A Subject: Re: [PATCH] tty: 8250: handle USR for DesignWare 8250 with correct accessors Message-ID: <20110610145724.1e0c0983@bob.linux.org.uk> In-Reply-To: <20110610075426.GM3711@pulham.picochip.com> References: <1307616525-22028-1-git-send-email-jamie@jamieiles.com> <20110610035817.GA6740@linux-mips.org> <20110610075426.GM3711@pulham.picochip.com> Organization: Intel X-Mailer: Claws Mail 3.7.8 (GTK+ 2.22.0; x86_64-redhat-linux-gnu) Organisation: Intel Corporation UK Ltd, registered no. 1134945 (England), Registered office Pipers Way, Swindon, SN3 1RJ Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-archive-position: 30318 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: alan@linux.intel.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9215 Content-Length: 573 Lines: 13 > I found this series from Alan > (http://www.spinics.net/lists/linux-serial/msg03484.html) which looks > like it would do the job if we added the extra irq callback. Ideally > we just remove both of the UPIO_DWAPB and UPIO_DWAPB32 and let the > platform specify the ops. I've not yet had time to go back and revisit those patches and debug them so they actually work but as and when someone gets time I think it's the right basic path to follow, and the irq callback looks sensible too. Ultimately yes I'd also like to see all board specific ops banished from 8250.c From ralf@linux-mips.org Fri Jun 10 16:30:39 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 16:30:47 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:57995 "EHLO duck.linux-mips.net" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491076Ab1FJOaj (ORCPT ); Fri, 10 Jun 2011 16:30:39 +0200 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.3) with ESMTP id p5AEUScc026518; Fri, 10 Jun 2011 15:30:29 +0100 Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id p5AEULkY026505; Fri, 10 Jun 2011 15:30:21 +0100 Date: Fri, 10 Jun 2011 15:30:21 +0100 From: Ralf Baechle To: Jesse Barnes , linux-pci@vger.kernel.org, Anton Vorontsov , Chris Metcalf , Colin Cross , "David S. Miller" , Eric Miao , Erik Gilling , Guan Xuetao , "H. Peter Anvin" , Imre Kaloz , Ingo Molnar , Ivan Kokshaysky , Krzysztof Halasa , Lennert Buytenhek , Matt Turner , Nicolas Pitre , Olof Johansson , Paul Mundt , Richard Henderson , Russell King , Thomas Gleixner Cc: Andrew Morton , linux-alpha@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, linux-sh@vger.kernel.org, linux-tegra@vger.kernel.org, sparclinux@vger.kernel.org, x86@kernel.org Subject: [PATCH] PCI: Make the struct pci_dev * argument of pci_fixup_irqs const. Message-ID: <20110610143021.GA26043@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 30319 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9241 Content-Length: 60040 Lines: 1581 Aside of the usual motivation for constification, this function has a history of being abused a hook for interrupt and other fixups so I turned this function const ages ago in the MIPS code but it should be done treewide. Due to function pointer passing in varous places a few other functions had to be constified as well. Signed-off-by: Ralf Baechle To: Anton Vorontsov To: Chris Metcalf To: Colin Cross To: "David S. Miller" To: Eric Miao To: Erik Gilling To: Guan Xuetao To: "H. Peter Anvin" To: Imre Kaloz To: Ingo Molnar To: Ivan Kokshaysky To: Jesse Barnes To: Krzysztof Halasa To: Lennert Buytenhek To: Matt Turner To: Nicolas Pitre To: Olof Johansson To: Paul Mundt To: Richard Henderson To: Russell King To: Thomas Gleixner Cc: Andrew Morton Cc: linux-alpha@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-pci@vger.kernel.org Cc: linux-sh@vger.kernel.org Cc: linux-tegra@vger.kernel.org Cc: sparclinux@vger.kernel.org Cc: x86@kernel.org --- arch/alpha/kernel/sys_alcor.c | 2 +- arch/alpha/kernel/sys_cabriolet.c | 6 +++--- arch/alpha/kernel/sys_dp264.c | 8 ++++---- arch/alpha/kernel/sys_eb64p.c | 2 +- arch/alpha/kernel/sys_eiger.c | 2 +- arch/alpha/kernel/sys_marvel.c | 2 +- arch/alpha/kernel/sys_miata.c | 2 +- arch/alpha/kernel/sys_mikasa.c | 2 +- arch/alpha/kernel/sys_nautilus.c | 2 +- arch/alpha/kernel/sys_noritake.c | 2 +- arch/alpha/kernel/sys_rawhide.c | 2 +- arch/alpha/kernel/sys_ruffian.c | 2 +- arch/alpha/kernel/sys_rx164.c | 2 +- arch/alpha/kernel/sys_sable.c | 4 ++-- arch/alpha/kernel/sys_sio.c | 4 ++-- arch/alpha/kernel/sys_sx164.c | 2 +- arch/alpha/kernel/sys_takara.c | 4 ++-- arch/alpha/kernel/sys_titan.c | 2 +- arch/alpha/kernel/sys_wildfire.c | 2 +- arch/arm/common/it8152.c | 2 +- arch/arm/include/asm/hardware/it8152.h | 2 +- arch/arm/include/asm/mach/pci.h | 4 ++-- arch/arm/kernel/bios32.c | 2 +- arch/arm/mach-cns3xxx/pcie.c | 2 +- arch/arm/mach-dove/pcie.c | 2 +- arch/arm/mach-footbridge/cats-pci.c | 2 +- arch/arm/mach-footbridge/ebsa285-pci.c | 2 +- arch/arm/mach-footbridge/netwinder-pci.c | 2 +- arch/arm/mach-footbridge/personal-pci.c | 3 ++- arch/arm/mach-integrator/pci.c | 2 +- arch/arm/mach-iop13xx/iq81340mc.c | 2 +- arch/arm/mach-iop13xx/pci.c | 2 +- arch/arm/mach-iop32x/em7210.c | 2 +- arch/arm/mach-iop32x/glantank.c | 2 +- arch/arm/mach-iop32x/iq31244.c | 4 ++-- arch/arm/mach-iop32x/iq80321.c | 2 +- arch/arm/mach-iop32x/n2100.c | 2 +- arch/arm/mach-iop33x/iq80331.c | 2 +- arch/arm/mach-iop33x/iq80332.c | 2 +- arch/arm/mach-ixp2000/enp2611.c | 3 ++- arch/arm/mach-ixp2000/ixdp2400.c | 3 ++- arch/arm/mach-ixp2000/ixdp2800.c | 3 ++- arch/arm/mach-ixp2000/ixdp2x01.c | 3 ++- arch/arm/mach-ixp23xx/ixdp2351.c | 2 +- arch/arm/mach-ixp23xx/roadrunner.c | 3 ++- arch/arm/mach-ixp4xx/avila-pci.c | 2 +- arch/arm/mach-ixp4xx/coyote-pci.c | 2 +- arch/arm/mach-ixp4xx/dsmg600-pci.c | 2 +- arch/arm/mach-ixp4xx/fsg-pci.c | 2 +- arch/arm/mach-ixp4xx/gateway7001-pci.c | 3 ++- arch/arm/mach-ixp4xx/goramo_mlr.c | 2 +- arch/arm/mach-ixp4xx/gtwx5715-pci.c | 2 +- arch/arm/mach-ixp4xx/ixdp425-pci.c | 2 +- arch/arm/mach-ixp4xx/ixdpg425-pci.c | 2 +- arch/arm/mach-ixp4xx/nas100d-pci.c | 2 +- arch/arm/mach-ixp4xx/nslu2-pci.c | 2 +- arch/arm/mach-ixp4xx/vulcan-pci.c | 2 +- arch/arm/mach-ixp4xx/wg302v2-pci.c | 2 +- arch/arm/mach-kirkwood/pcie.c | 3 ++- arch/arm/mach-ks8695/board-dsm320.c | 2 +- arch/arm/mach-ks8695/board-micrel.c | 2 +- arch/arm/mach-ks8695/include/mach/devices.h | 2 +- arch/arm/mach-mv78xx0/pcie.c | 3 ++- arch/arm/mach-orion5x/common.h | 2 +- arch/arm/mach-orion5x/db88f5281-setup.c | 3 ++- arch/arm/mach-orion5x/dns323-setup.c | 4 ++-- arch/arm/mach-orion5x/kurobox_pro-setup.c | 3 ++- arch/arm/mach-orion5x/mss2-setup.c | 2 +- arch/arm/mach-orion5x/pci.c | 2 +- arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c | 2 +- arch/arm/mach-orion5x/rd88f5181l-ge-setup.c | 2 +- arch/arm/mach-orion5x/rd88f5182-setup.c | 3 ++- arch/arm/mach-orion5x/terastation_pro2-setup.c | 2 +- arch/arm/mach-orion5x/ts209-setup.c | 3 ++- arch/arm/mach-orion5x/ts409-setup.c | 3 ++- arch/arm/mach-orion5x/wnr854t-setup.c | 3 ++- arch/arm/mach-orion5x/wrt350n-v2-setup.c | 3 ++- arch/arm/mach-pxa/cm-x2xx-pci.c | 2 +- arch/arm/mach-sa1100/pci-nanoengine.c | 3 ++- arch/arm/mach-shark/pci.c | 2 +- arch/arm/mach-tegra/pcie.c | 2 +- arch/arm/mach-versatile/pci.c | 2 +- arch/sh/drivers/pci/fixups-cayman.c | 2 +- arch/sh/drivers/pci/fixups-dreamcast.c | 2 +- arch/sh/drivers/pci/fixups-landisk.c | 2 +- arch/sh/drivers/pci/fixups-r7780rp.c | 2 +- arch/sh/drivers/pci/fixups-rts7751r2d.c | 2 +- arch/sh/drivers/pci/fixups-sdk7780.c | 2 +- arch/sh/drivers/pci/fixups-se7751.c | 2 +- arch/sh/drivers/pci/fixups-sh03.c | 2 +- arch/sh/drivers/pci/fixups-snapgear.c | 2 +- arch/sh/drivers/pci/fixups-titan.c | 2 +- arch/sh/drivers/pci/pcie-sh7786.c | 2 +- arch/sh/include/asm/pci.h | 2 +- arch/sparc/include/asm/leon_pci.h | 2 +- arch/sparc/kernel/leon_pci_grpci2.c | 2 +- arch/tile/kernel/pci.c | 2 +- arch/unicore32/kernel/pci.c | 2 +- arch/x86/pci/visws.c | 2 +- drivers/pci/setup-irq.c | 4 ++-- include/linux/pci.h | 2 +- 101 files changed, 130 insertions(+), 113 deletions(-) diff --git a/arch/alpha/kernel/sys_alcor.c b/arch/alpha/kernel/sys_alcor.c index 0e14399..8606d77 100644 --- a/arch/alpha/kernel/sys_alcor.c +++ b/arch/alpha/kernel/sys_alcor.c @@ -183,7 +183,7 @@ alcor_init_irq(void) */ static int __init -alcor_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +alcor_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static char irq_tab[7][5] __initdata = { /*INT INTA INTB INTC INTD */ diff --git a/arch/alpha/kernel/sys_cabriolet.c b/arch/alpha/kernel/sys_cabriolet.c index c8c112d..1029619 100644 --- a/arch/alpha/kernel/sys_cabriolet.c +++ b/arch/alpha/kernel/sys_cabriolet.c @@ -175,7 +175,7 @@ pc164_init_irq(void) */ static inline int __init -eb66p_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +eb66p_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static char irq_tab[5][5] __initdata = { /*INT INTA INTB INTC INTD */ @@ -205,7 +205,7 @@ eb66p_map_irq(struct pci_dev *dev, u8 slot, u8 pin) */ static inline int __init -cabriolet_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +cabriolet_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static char irq_tab[5][5] __initdata = { /*INT INTA INTB INTC INTD */ @@ -289,7 +289,7 @@ cia_cab_init_pci(void) */ static inline int __init -alphapc164_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +alphapc164_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static char irq_tab[7][5] __initdata = { /*INT INTA INTB INTC INTD */ diff --git a/arch/alpha/kernel/sys_dp264.c b/arch/alpha/kernel/sys_dp264.c index f885682..bb7f0c7 100644 --- a/arch/alpha/kernel/sys_dp264.c +++ b/arch/alpha/kernel/sys_dp264.c @@ -382,7 +382,7 @@ isa_irq_fixup(struct pci_dev *dev, int irq) } static int __init -dp264_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +dp264_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static char irq_tab[6][5] __initdata = { /*INT INTA INTB INTC INTD */ @@ -404,7 +404,7 @@ dp264_map_irq(struct pci_dev *dev, u8 slot, u8 pin) } static int __init -monet_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +monet_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static char irq_tab[13][5] __initdata = { /*INT INTA INTB INTC INTD */ @@ -466,7 +466,7 @@ monet_swizzle(struct pci_dev *dev, u8 *pinp) } static int __init -webbrick_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +webbrick_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static char irq_tab[13][5] __initdata = { /*INT INTA INTB INTC INTD */ @@ -488,7 +488,7 @@ webbrick_map_irq(struct pci_dev *dev, u8 slot, u8 pin) } static int __init -clipper_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +clipper_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static char irq_tab[7][5] __initdata = { /*INT INTA INTB INTC INTD */ diff --git a/arch/alpha/kernel/sys_eb64p.c b/arch/alpha/kernel/sys_eb64p.c index a7a23b4..3c6c13c 100644 --- a/arch/alpha/kernel/sys_eb64p.c +++ b/arch/alpha/kernel/sys_eb64p.c @@ -169,7 +169,7 @@ eb64p_init_irq(void) */ static int __init -eb64p_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +eb64p_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static char irq_tab[5][5] __initdata = { /*INT INTA INTB INTC INTD */ diff --git a/arch/alpha/kernel/sys_eiger.c b/arch/alpha/kernel/sys_eiger.c index a60cd5b..35f480d 100644 --- a/arch/alpha/kernel/sys_eiger.c +++ b/arch/alpha/kernel/sys_eiger.c @@ -144,7 +144,7 @@ eiger_init_irq(void) } static int __init -eiger_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +eiger_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { u8 irq_orig; diff --git a/arch/alpha/kernel/sys_marvel.c b/arch/alpha/kernel/sys_marvel.c index 388b99d..95cfc83 100644 --- a/arch/alpha/kernel/sys_marvel.c +++ b/arch/alpha/kernel/sys_marvel.c @@ -318,7 +318,7 @@ marvel_init_irq(void) } static int -marvel_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +marvel_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { struct pci_controller *hose = dev->sysdata; struct io7_port *io7_port = hose->sysdata; diff --git a/arch/alpha/kernel/sys_miata.c b/arch/alpha/kernel/sys_miata.c index 61ccd95..258da68 100644 --- a/arch/alpha/kernel/sys_miata.c +++ b/arch/alpha/kernel/sys_miata.c @@ -151,7 +151,7 @@ miata_init_irq(void) */ static int __init -miata_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +miata_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static char irq_tab[18][5] __initdata = { /*INT INTA INTB INTC INTD */ diff --git a/arch/alpha/kernel/sys_mikasa.c b/arch/alpha/kernel/sys_mikasa.c index 0e6e469..c0fd728 100644 --- a/arch/alpha/kernel/sys_mikasa.c +++ b/arch/alpha/kernel/sys_mikasa.c @@ -146,7 +146,7 @@ mikasa_init_irq(void) */ static int __init -mikasa_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +mikasa_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static char irq_tab[8][5] __initdata = { /*INT INTA INTB INTC INTD */ diff --git a/arch/alpha/kernel/sys_nautilus.c b/arch/alpha/kernel/sys_nautilus.c index 99c0f46..4112200 100644 --- a/arch/alpha/kernel/sys_nautilus.c +++ b/arch/alpha/kernel/sys_nautilus.c @@ -65,7 +65,7 @@ nautilus_init_irq(void) } static int __init -nautilus_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +nautilus_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { /* Preserve the IRQ set up by the console. */ diff --git a/arch/alpha/kernel/sys_noritake.c b/arch/alpha/kernel/sys_noritake.c index a00ac70..2172528 100644 --- a/arch/alpha/kernel/sys_noritake.c +++ b/arch/alpha/kernel/sys_noritake.c @@ -194,7 +194,7 @@ noritake_init_irq(void) */ static int __init -noritake_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +noritake_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static char irq_tab[15][5] __initdata = { /*INT INTA INTB INTC INTD */ diff --git a/arch/alpha/kernel/sys_rawhide.c b/arch/alpha/kernel/sys_rawhide.c index 7f52161..a125d6b 100644 --- a/arch/alpha/kernel/sys_rawhide.c +++ b/arch/alpha/kernel/sys_rawhide.c @@ -223,7 +223,7 @@ rawhide_init_irq(void) */ static int __init -rawhide_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +rawhide_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static char irq_tab[5][5] __initdata = { /*INT INTA INTB INTC INTD */ diff --git a/arch/alpha/kernel/sys_ruffian.c b/arch/alpha/kernel/sys_ruffian.c index 8de1046..915b975 100644 --- a/arch/alpha/kernel/sys_ruffian.c +++ b/arch/alpha/kernel/sys_ruffian.c @@ -120,7 +120,7 @@ ruffian_kill_arch (int mode) */ static int __init -ruffian_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +ruffian_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static char irq_tab[11][5] __initdata = { /*INT INTA INTB INTC INTD */ diff --git a/arch/alpha/kernel/sys_rx164.c b/arch/alpha/kernel/sys_rx164.c index 216d94d..b172b27 100644 --- a/arch/alpha/kernel/sys_rx164.c +++ b/arch/alpha/kernel/sys_rx164.c @@ -144,7 +144,7 @@ rx164_init_irq(void) */ static int __init -rx164_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +rx164_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { #if 0 static char irq_tab_pass1[6][5] __initdata = { diff --git a/arch/alpha/kernel/sys_sable.c b/arch/alpha/kernel/sys_sable.c index da714e4..98d1dbf 100644 --- a/arch/alpha/kernel/sys_sable.c +++ b/arch/alpha/kernel/sys_sable.c @@ -194,7 +194,7 @@ sable_init_irq(void) */ static int __init -sable_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +sable_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static char irq_tab[9][5] __initdata = { /*INT INTA INTB INTC INTD */ @@ -376,7 +376,7 @@ lynx_init_irq(void) */ static int __init -lynx_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +lynx_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static char irq_tab[19][5] __initdata = { /*INT INTA INTB INTC INTD */ diff --git a/arch/alpha/kernel/sys_sio.c b/arch/alpha/kernel/sys_sio.c index 85b4aea..47bec1e 100644 --- a/arch/alpha/kernel/sys_sio.c +++ b/arch/alpha/kernel/sys_sio.c @@ -146,7 +146,7 @@ sio_fixup_irq_levels(unsigned int level_bits) } static inline int __init -noname_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +noname_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { /* * The Noname board has 5 PCI slots with each of the 4 @@ -185,7 +185,7 @@ noname_map_irq(struct pci_dev *dev, u8 slot, u8 pin) } static inline int __init -p2k_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +p2k_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static char irq_tab[][5] __initdata = { /*INT A B C D */ diff --git a/arch/alpha/kernel/sys_sx164.c b/arch/alpha/kernel/sys_sx164.c index 41d4ad4..73e1c31 100644 --- a/arch/alpha/kernel/sys_sx164.c +++ b/arch/alpha/kernel/sys_sx164.c @@ -95,7 +95,7 @@ sx164_init_irq(void) */ static int __init -sx164_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +sx164_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static char irq_tab[5][5] __initdata = { /*INT INTA INTB INTC INTD */ diff --git a/arch/alpha/kernel/sys_takara.c b/arch/alpha/kernel/sys_takara.c index a31f8cd..2ae99ad 100644 --- a/arch/alpha/kernel/sys_takara.c +++ b/arch/alpha/kernel/sys_takara.c @@ -157,7 +157,7 @@ takara_init_irq(void) */ static int __init -takara_map_irq_srm(struct pci_dev *dev, u8 slot, u8 pin) +takara_map_irq_srm(const struct pci_dev *dev, u8 slot, u8 pin) { static char irq_tab[15][5] __initdata = { { 16+3, 16+3, 16+3, 16+3, 16+3}, /* slot 6 == device 3 */ @@ -188,7 +188,7 @@ takara_map_irq_srm(struct pci_dev *dev, u8 slot, u8 pin) } static int __init -takara_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +takara_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static char irq_tab[15][5] __initdata = { { 16+3, 16+3, 16+3, 16+3, 16+3}, /* slot 6 == device 3 */ diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c index 6994407..f47b30a 100644 --- a/arch/alpha/kernel/sys_titan.c +++ b/arch/alpha/kernel/sys_titan.c @@ -305,7 +305,7 @@ titan_late_init(void) } static int __devinit -titan_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +titan_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { u8 intline; int irq; diff --git a/arch/alpha/kernel/sys_wildfire.c b/arch/alpha/kernel/sys_wildfire.c index d92cdc7..17c85a6 100644 --- a/arch/alpha/kernel/sys_wildfire.c +++ b/arch/alpha/kernel/sys_wildfire.c @@ -290,7 +290,7 @@ wildfire_device_interrupt(unsigned long vector) */ static int __init -wildfire_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +wildfire_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static char irq_tab[8][5] __initdata = { /*INT INTA INTB INTC INTD */ diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c index 7a21927..17239bd 100644 --- a/arch/arm/common/it8152.c +++ b/arch/arm/common/it8152.c @@ -144,7 +144,7 @@ void it8152_irq_demux(unsigned int irq, struct irq_desc *desc) } /* mapping for on-chip devices */ -int __init it8152_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +int __init it8152_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { if ((dev->vendor == PCI_VENDOR_ID_ITE) && (dev->device == PCI_DEVICE_ID_ITE_8152)) { diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h index b2f95c7..b3fea38 100644 --- a/arch/arm/include/asm/hardware/it8152.h +++ b/arch/arm/include/asm/hardware/it8152.h @@ -105,7 +105,7 @@ struct pci_sys_data; extern void it8152_irq_demux(unsigned int irq, struct irq_desc *desc); extern void it8152_init_irq(void); -extern int it8152_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin); +extern int it8152_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); extern int it8152_pci_setup(int nr, struct pci_sys_data *sys); extern struct pci_bus *it8152_pci_scan_bus(int nr, struct pci_sys_data *sys); diff --git a/arch/arm/include/asm/mach/pci.h b/arch/arm/include/asm/mach/pci.h index 16330bd..186efd4 100644 --- a/arch/arm/include/asm/mach/pci.h +++ b/arch/arm/include/asm/mach/pci.h @@ -25,7 +25,7 @@ struct hw_pci { void (*preinit)(void); void (*postinit)(void); u8 (*swizzle)(struct pci_dev *dev, u8 *pin); - int (*map_irq)(struct pci_dev *dev, u8 slot, u8 pin); + int (*map_irq)(const struct pci_dev *dev, u8 slot, u8 pin); }; /* @@ -44,7 +44,7 @@ struct pci_sys_data { /* Bridge swizzling */ u8 (*swizzle)(struct pci_dev *, u8 *); /* IRQ mapping */ - int (*map_irq)(struct pci_dev *, u8, u8); + int (*map_irq)(const struct pci_dev *, u8, u8); struct hw_pci *hw; void *private_data; /* platform controller private data */ }; diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index e4ee050..d6df359 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c @@ -476,7 +476,7 @@ static u8 __devinit pcibios_swizzle(struct pci_dev *dev, u8 *pin) /* * Map a slot/pin to an IRQ. */ -static int pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { struct pci_sys_data *sys = dev->sysdata; int irq = -1; diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c index 78defd7..725b94f 100644 --- a/arch/arm/mach-cns3xxx/pcie.c +++ b/arch/arm/mach-cns3xxx/pcie.c @@ -172,7 +172,7 @@ static struct pci_bus *cns3xxx_pci_scan_bus(int nr, struct pci_sys_data *sys) return pci_scan_bus(sys->busnr, &cns3xxx_pcie_ops, sys); } -static int cns3xxx_pcie_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int cns3xxx_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { struct cns3xxx_pcie *cnspci = pdev_to_cnspci(dev); int irq = cnspci->irqs[slot]; diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c index 502d1ca..c6e93aa 100644 --- a/arch/arm/mach-dove/pcie.c +++ b/arch/arm/mach-dove/pcie.c @@ -192,7 +192,7 @@ dove_pcie_scan_bus(int nr, struct pci_sys_data *sys) return bus; } -static int __init dove_pcie_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init dove_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { struct pcie_port *pp = bus_to_port(dev->bus->number); diff --git a/arch/arm/mach-footbridge/cats-pci.c b/arch/arm/mach-footbridge/cats-pci.c index ae3e1c8..32321f6 100644 --- a/arch/arm/mach-footbridge/cats-pci.c +++ b/arch/arm/mach-footbridge/cats-pci.c @@ -16,7 +16,7 @@ /* cats host-specific stuff */ static int irqmap_cats[] __initdata = { IRQ_PCI, IRQ_IN0, IRQ_IN1, IRQ_IN3 }; -static int __init cats_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init cats_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { if (dev->irq >= 255) return -1; /* not a valid interrupt. */ diff --git a/arch/arm/mach-footbridge/ebsa285-pci.c b/arch/arm/mach-footbridge/ebsa285-pci.c index e5ab5bd..511c673 100644 --- a/arch/arm/mach-footbridge/ebsa285-pci.c +++ b/arch/arm/mach-footbridge/ebsa285-pci.c @@ -15,7 +15,7 @@ static int irqmap_ebsa285[] __initdata = { IRQ_IN3, IRQ_IN1, IRQ_IN0, IRQ_PCI }; -static int __init ebsa285_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init ebsa285_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { if (dev->vendor == PCI_VENDOR_ID_CONTAQ && dev->device == PCI_DEVICE_ID_CONTAQ_82C693) diff --git a/arch/arm/mach-footbridge/netwinder-pci.c b/arch/arm/mach-footbridge/netwinder-pci.c index e263d6d..6218761 100644 --- a/arch/arm/mach-footbridge/netwinder-pci.c +++ b/arch/arm/mach-footbridge/netwinder-pci.c @@ -17,7 +17,7 @@ * We now use the slot ID instead of the device identifiers to select * which interrupt is routed where. */ -static int __init netwinder_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init netwinder_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { switch (slot) { case 0: /* host bridge */ diff --git a/arch/arm/mach-footbridge/personal-pci.c b/arch/arm/mach-footbridge/personal-pci.c index d5fca95..aeb651d 100644 --- a/arch/arm/mach-footbridge/personal-pci.c +++ b/arch/arm/mach-footbridge/personal-pci.c @@ -18,7 +18,8 @@ static int irqmap_personal_server[] __initdata = { IRQ_DOORBELLHOST, IRQ_DMA1, IRQ_DMA2, IRQ_PCI }; -static int __init personal_server_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init personal_server_map_irq(const struct pci_dev *dev, u8 slot, + u8 pin) { unsigned char line; diff --git a/arch/arm/mach-integrator/pci.c b/arch/arm/mach-integrator/pci.c index 2fdb954..520b6bf 100644 --- a/arch/arm/mach-integrator/pci.c +++ b/arch/arm/mach-integrator/pci.c @@ -95,7 +95,7 @@ static int irq_tab[4] __initdata = { * map the specified device/slot/pin to an IRQ. This works out such * that slot 9 pin 1 is INT0, pin 2 is INT1, and slot 10 pin 1 is INT1. */ -static int __init integrator_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init integrator_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { int intnr = ((slot - 9) + (pin - 1)) & 3; diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c index 9b5a63f5..23dfaff 100644 --- a/arch/arm/mach-iop13xx/iq81340mc.c +++ b/arch/arm/mach-iop13xx/iq81340mc.c @@ -30,7 +30,7 @@ extern int init_atu; /* Flag to select which ATU(s) to initialize / disable */ static int __init -iq81340mc_pcix_map_irq(struct pci_dev *dev, u8 idsel, u8 pin) +iq81340mc_pcix_map_irq(const struct pci_dev *dev, u8 idsel, u8 pin) { switch (idsel) { case 1: diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c index ba3dae3..48a3693 100644 --- a/arch/arm/mach-iop13xx/pci.c +++ b/arch/arm/mach-iop13xx/pci.c @@ -390,7 +390,7 @@ static int iop13xx_atue_pci_status(int clear) } static int -iop13xx_pcie_map_irq(struct pci_dev *dev, u8 idsel, u8 pin) +iop13xx_pcie_map_irq(const struct pci_dev *dev, u8 idsel, u8 pin) { WARN_ON(idsel != 0); diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c index 779f924..6cbffbf 100644 --- a/arch/arm/mach-iop32x/em7210.c +++ b/arch/arm/mach-iop32x/em7210.c @@ -81,7 +81,7 @@ void __init em7210_map_io(void) #define INTD IRQ_IOP32X_XINT3 static int __init -em7210_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +em7210_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static int pci_irq_table[][4] = { /* diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c index c6b6f9c..ceef5d4 100644 --- a/arch/arm/mach-iop32x/glantank.c +++ b/arch/arm/mach-iop32x/glantank.c @@ -77,7 +77,7 @@ void __init glantank_map_io(void) #define INTD IRQ_IOP32X_XINT3 static int __init -glantank_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +glantank_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static int pci_irq_table[][4] = { /* diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c index fde962c..3a62514 100644 --- a/arch/arm/mach-iop32x/iq31244.c +++ b/arch/arm/mach-iop32x/iq31244.c @@ -103,7 +103,7 @@ void __init iq31244_map_io(void) * EP80219/IQ31244 PCI. */ static int __init -ep80219_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +ep80219_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { int irq; @@ -139,7 +139,7 @@ static struct hw_pci ep80219_pci __initdata = { }; static int __init -iq31244_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +iq31244_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { int irq; diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c index 3a95950..35b7e69 100644 --- a/arch/arm/mach-iop32x/iq80321.c +++ b/arch/arm/mach-iop32x/iq80321.c @@ -71,7 +71,7 @@ void __init iq80321_map_io(void) * IQ80321 PCI. */ static int __init -iq80321_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +iq80321_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { int irq; diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c index 626aa37..1a374ea 100644 --- a/arch/arm/mach-iop32x/n2100.c +++ b/arch/arm/mach-iop32x/n2100.c @@ -78,7 +78,7 @@ void __init n2100_map_io(void) * N2100 PCI. */ static int __init -n2100_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +n2100_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { int irq; diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c index c565f8d..637c027 100644 --- a/arch/arm/mach-iop33x/iq80331.c +++ b/arch/arm/mach-iop33x/iq80331.c @@ -54,7 +54,7 @@ static struct sys_timer iq80331_timer = { * IQ80331 PCI. */ static int __init -iq80331_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +iq80331_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { int irq; diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c index 36a9efb..90a0436 100644 --- a/arch/arm/mach-iop33x/iq80332.c +++ b/arch/arm/mach-iop33x/iq80332.c @@ -54,7 +54,7 @@ static struct sys_timer iq80332_timer = { * IQ80332 PCI. */ static int __init -iq80332_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +iq80332_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { int irq; diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c index 88663ab..62c60ad 100644 --- a/arch/arm/mach-ixp2000/enp2611.c +++ b/arch/arm/mach-ixp2000/enp2611.c @@ -148,7 +148,8 @@ static struct pci_bus * __init enp2611_pci_scan_bus(int nr, return pci_scan_bus(sys->busnr, &enp2611_pci_ops, sys); } -static int __init enp2611_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init enp2611_pci_map_irq(const struct pci_dev *dev, u8 slot, + u8 pin) { int irq; diff --git a/arch/arm/mach-ixp2000/ixdp2400.c b/arch/arm/mach-ixp2000/ixdp2400.c index dfffc1e..5bad1a8 100644 --- a/arch/arm/mach-ixp2000/ixdp2400.c +++ b/arch/arm/mach-ixp2000/ixdp2400.c @@ -78,7 +78,8 @@ int ixdp2400_pci_setup(int nr, struct pci_sys_data *sys) return 1; } -static int __init ixdp2400_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init ixdp2400_pci_map_irq(const struct pci_dev *dev, u8 slot, + u8 pin) { if (ixdp2x00_master_npu()) { diff --git a/arch/arm/mach-ixp2000/ixdp2800.c b/arch/arm/mach-ixp2000/ixdp2800.c index cd4c9bc..3d3cef8 100644 --- a/arch/arm/mach-ixp2000/ixdp2800.c +++ b/arch/arm/mach-ixp2000/ixdp2800.c @@ -161,7 +161,8 @@ static int __init ixdp2800_pci_setup(int nr, struct pci_sys_data *sys) return 1; } -static int __init ixdp2800_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init ixdp2800_pci_map_irq(const struct pci_dev *dev, u8 slot, + u8 pin) { if (ixdp2x00_master_npu()) { diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c index 84835b2..be2a254 100644 --- a/arch/arm/mach-ixp2000/ixdp2x01.c +++ b/arch/arm/mach-ixp2000/ixdp2x01.c @@ -252,7 +252,8 @@ void __init ixdp2x01_pci_preinit(void) #define DEVPIN(dev, pin) ((pin) | ((dev) << 3)) -static int __init ixdp2x01_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init ixdp2x01_pci_map_irq(const struct pci_dev *dev, u8 slot, + u8 pin) { u8 bus = dev->bus->number; u32 devpin = DEVPIN(PCI_SLOT(dev->devfn), pin); diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c index 8dcba17..ec028e3 100644 --- a/arch/arm/mach-ixp23xx/ixdp2351.c +++ b/arch/arm/mach-ixp23xx/ixdp2351.c @@ -168,7 +168,7 @@ void __init ixdp2351_init_irq(void) */ #define DEVPIN(dev, pin) ((pin) | ((dev) << 3)) -static int __init ixdp2351_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init ixdp2351_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { u8 bus = dev->bus->number; u32 devpin = DEVPIN(PCI_SLOT(dev->devfn), pin); diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c index 8fe0c62..844551d 100644 --- a/arch/arm/mach-ixp23xx/roadrunner.c +++ b/arch/arm/mach-ixp23xx/roadrunner.c @@ -56,7 +56,8 @@ #define INTC_PIN IXP23XX_GPIO_PIN_11 #define INTD_PIN IXP23XX_GPIO_PIN_12 -static int __init roadrunner_map_irq(struct pci_dev *dev, u8 idsel, u8 pin) +static int __init roadrunner_map_irq(const struct pci_dev *dev, u8 idsel, + u8 pin) { static int pci_card_slot_irq[] = {INTB, INTC, INTD, INTA}; static int pmc_card_slot_irq[] = {INTA, INTB, INTC, INTD}; diff --git a/arch/arm/mach-ixp4xx/avila-pci.c b/arch/arm/mach-ixp4xx/avila-pci.c index 162043f..8fea0a3 100644 --- a/arch/arm/mach-ixp4xx/avila-pci.c +++ b/arch/arm/mach-ixp4xx/avila-pci.c @@ -46,7 +46,7 @@ void __init avila_pci_preinit(void) ixp4xx_pci_preinit(); } -static int __init avila_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init avila_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static int pci_irq_table[IRQ_LINES] = { IXP4XX_GPIO_IRQ(INTA), diff --git a/arch/arm/mach-ixp4xx/coyote-pci.c b/arch/arm/mach-ixp4xx/coyote-pci.c index 37fda7d..71f5c9c 100644 --- a/arch/arm/mach-ixp4xx/coyote-pci.c +++ b/arch/arm/mach-ixp4xx/coyote-pci.c @@ -37,7 +37,7 @@ void __init coyote_pci_preinit(void) ixp4xx_pci_preinit(); } -static int __init coyote_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init coyote_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { if (slot == SLOT0_DEVID) return IXP4XX_GPIO_IRQ(SLOT0_INTA); diff --git a/arch/arm/mach-ixp4xx/dsmg600-pci.c b/arch/arm/mach-ixp4xx/dsmg600-pci.c index c7612010..0532510 100644 --- a/arch/arm/mach-ixp4xx/dsmg600-pci.c +++ b/arch/arm/mach-ixp4xx/dsmg600-pci.c @@ -44,7 +44,7 @@ void __init dsmg600_pci_preinit(void) ixp4xx_pci_preinit(); } -static int __init dsmg600_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init dsmg600_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static int pci_irq_table[MAX_DEV][IRQ_LINES] = { { IXP4XX_GPIO_IRQ(INTE), -1, -1 }, diff --git a/arch/arm/mach-ixp4xx/fsg-pci.c b/arch/arm/mach-ixp4xx/fsg-pci.c index 44ccde9..d2ac803 100644 --- a/arch/arm/mach-ixp4xx/fsg-pci.c +++ b/arch/arm/mach-ixp4xx/fsg-pci.c @@ -38,7 +38,7 @@ void __init fsg_pci_preinit(void) ixp4xx_pci_preinit(); } -static int __init fsg_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init fsg_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static int pci_irq_table[IRQ_LINES] = { IXP4XX_GPIO_IRQ(INTC), diff --git a/arch/arm/mach-ixp4xx/gateway7001-pci.c b/arch/arm/mach-ixp4xx/gateway7001-pci.c index fc11241..76581fb 100644 --- a/arch/arm/mach-ixp4xx/gateway7001-pci.c +++ b/arch/arm/mach-ixp4xx/gateway7001-pci.c @@ -35,7 +35,8 @@ void __init gateway7001_pci_preinit(void) ixp4xx_pci_preinit(); } -static int __init gateway7001_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init gateway7001_map_irq(const struct pci_dev *dev, u8 slot, + u8 pin) { if (slot == 1) return IRQ_IXP4XX_GPIO11; diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c index 3e8c0e3..249404d 100644 --- a/arch/arm/mach-ixp4xx/goramo_mlr.c +++ b/arch/arm/mach-ixp4xx/goramo_mlr.c @@ -462,7 +462,7 @@ static void __init gmlr_pci_postinit(void) } } -static int __init gmlr_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init gmlr_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { switch(slot) { case SLOT_ETHA: return IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHA); diff --git a/arch/arm/mach-ixp4xx/gtwx5715-pci.c b/arch/arm/mach-ixp4xx/gtwx5715-pci.c index 38cc072..d68fc06 100644 --- a/arch/arm/mach-ixp4xx/gtwx5715-pci.c +++ b/arch/arm/mach-ixp4xx/gtwx5715-pci.c @@ -49,7 +49,7 @@ void __init gtwx5715_pci_preinit(void) } -static int __init gtwx5715_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init gtwx5715_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { int rc = -1; diff --git a/arch/arm/mach-ixp4xx/ixdp425-pci.c b/arch/arm/mach-ixp4xx/ixdp425-pci.c index 58f4004..fffd8c5 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-pci.c +++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c @@ -43,7 +43,7 @@ void __init ixdp425_pci_preinit(void) ixp4xx_pci_preinit(); } -static int __init ixdp425_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init ixdp425_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static int pci_irq_table[IRQ_LINES] = { IXP4XX_GPIO_IRQ(INTA), diff --git a/arch/arm/mach-ixp4xx/ixdpg425-pci.c b/arch/arm/mach-ixp4xx/ixdpg425-pci.c index e64f6d0..34efe75 100644 --- a/arch/arm/mach-ixp4xx/ixdpg425-pci.c +++ b/arch/arm/mach-ixp4xx/ixdpg425-pci.c @@ -31,7 +31,7 @@ void __init ixdpg425_pci_preinit(void) ixp4xx_pci_preinit(); } -static int __init ixdpg425_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init ixdpg425_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { if (slot == 12 || slot == 13) return IRQ_IXP4XX_GPIO7; diff --git a/arch/arm/mach-ixp4xx/nas100d-pci.c b/arch/arm/mach-ixp4xx/nas100d-pci.c index 428d120..5434ccf 100644 --- a/arch/arm/mach-ixp4xx/nas100d-pci.c +++ b/arch/arm/mach-ixp4xx/nas100d-pci.c @@ -41,7 +41,7 @@ void __init nas100d_pci_preinit(void) ixp4xx_pci_preinit(); } -static int __init nas100d_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init nas100d_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static int pci_irq_table[MAX_DEV][IRQ_LINES] = { { IXP4XX_GPIO_IRQ(INTA), -1, -1 }, diff --git a/arch/arm/mach-ixp4xx/nslu2-pci.c b/arch/arm/mach-ixp4xx/nslu2-pci.c index 2e85f76..b571605 100644 --- a/arch/arm/mach-ixp4xx/nslu2-pci.c +++ b/arch/arm/mach-ixp4xx/nslu2-pci.c @@ -38,7 +38,7 @@ void __init nslu2_pci_preinit(void) ixp4xx_pci_preinit(); } -static int __init nslu2_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init nslu2_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { static int pci_irq_table[IRQ_LINES] = { IXP4XX_GPIO_IRQ(INTA), diff --git a/arch/arm/mach-ixp4xx/vulcan-pci.c b/arch/arm/mach-ixp4xx/vulcan-pci.c index 03bdec5..0bc3f34 100644 --- a/arch/arm/mach-ixp4xx/vulcan-pci.c +++ b/arch/arm/mach-ixp4xx/vulcan-pci.c @@ -43,7 +43,7 @@ void __init vulcan_pci_preinit(void) ixp4xx_pci_preinit(); } -static int __init vulcan_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init vulcan_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { if (slot == 1) return IXP4XX_GPIO_IRQ(INTA); diff --git a/arch/arm/mach-ixp4xx/wg302v2-pci.c b/arch/arm/mach-ixp4xx/wg302v2-pci.c index 17f3cf5..f27dfcf 100644 --- a/arch/arm/mach-ixp4xx/wg302v2-pci.c +++ b/arch/arm/mach-ixp4xx/wg302v2-pci.c @@ -35,7 +35,7 @@ void __init wg302v2_pci_preinit(void) ixp4xx_pci_preinit(); } -static int __init wg302v2_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init wg302v2_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { if (slot == 1) return IRQ_IXP4XX_GPIO8; diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c index ca294ff..77d0f54 100644 --- a/arch/arm/mach-kirkwood/pcie.c +++ b/arch/arm/mach-kirkwood/pcie.c @@ -244,7 +244,8 @@ kirkwood_pcie_scan_bus(int nr, struct pci_sys_data *sys) return bus; } -static int __init kirkwood_pcie_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init kirkwood_pcie_map_irq(const struct pci_dev *dev, u8 slot, + u8 pin) { struct pcie_port *pp = bus_to_port(dev->bus); diff --git a/arch/arm/mach-ks8695/board-dsm320.c b/arch/arm/mach-ks8695/board-dsm320.c index ada92b6..1338cb3 100644 --- a/arch/arm/mach-ks8695/board-dsm320.c +++ b/arch/arm/mach-ks8695/board-dsm320.c @@ -34,7 +34,7 @@ #include "generic.h" #ifdef CONFIG_PCI -static int dsm320_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int dsm320_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { switch (slot) { case 0: diff --git a/arch/arm/mach-ks8695/board-micrel.c b/arch/arm/mach-ks8695/board-micrel.c index c7ad09b..e2e3cba 100644 --- a/arch/arm/mach-ks8695/board-micrel.c +++ b/arch/arm/mach-ks8695/board-micrel.c @@ -24,7 +24,7 @@ #include "generic.h" #ifdef CONFIG_PCI -static int micrel_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int micrel_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { return KS8695_IRQ_EXTERN0; } diff --git a/arch/arm/mach-ks8695/include/mach/devices.h b/arch/arm/mach-ks8695/include/mach/devices.h index 2744fec..85a3c9a 100644 --- a/arch/arm/mach-ks8695/include/mach/devices.h +++ b/arch/arm/mach-ks8695/include/mach/devices.h @@ -30,7 +30,7 @@ extern void __init ks8695_init_leds(u8 cpu_led, u8 timer_led); struct ks8695_pci_cfg { short mode; - int (*map_irq)(struct pci_dev *, u8, u8); + int (*map_irq)(const struct pci_dev *, u8, u8); }; extern __init void ks8695_init_pci(struct ks8695_pci_cfg *); diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c index a560439..8854d8c 100644 --- a/arch/arm/mach-mv78xx0/pcie.c +++ b/arch/arm/mach-mv78xx0/pcie.c @@ -259,7 +259,8 @@ mv78xx0_pcie_scan_bus(int nr, struct pci_sys_data *sys) return bus; } -static int __init mv78xx0_pcie_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init mv78xx0_pcie_map_irq(const struct pci_dev *dev, u8 slot, + u8 pin) { struct pcie_port *pp = bus_to_port(dev->bus->number); diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h index f2b2b35..3e5499d 100644 --- a/arch/arm/mach-orion5x/common.h +++ b/arch/arm/mach-orion5x/common.h @@ -51,7 +51,7 @@ void orion5x_pci_disable(void); void orion5x_pci_set_cardbus_mode(void); int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys); struct pci_bus *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys); -int orion5x_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin); +int orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); struct machine_desc; struct meminfo; diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c index f95d3cb..a3e3e9e 100644 --- a/arch/arm/mach-orion5x/db88f5281-setup.c +++ b/arch/arm/mach-orion5x/db88f5281-setup.c @@ -237,7 +237,8 @@ void __init db88f5281_pci_preinit(void) } } -static int __init db88f5281_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init db88f5281_pci_map_irq(const struct pci_dev *dev, u8 slot, + u8 pin) { int irq; diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c index 855e0e7..a6eddae 100644 --- a/arch/arm/mach-orion5x/dns323-setup.c +++ b/arch/arm/mach-orion5x/dns323-setup.c @@ -70,14 +70,14 @@ enum { * PCI setup */ -static int __init dns323_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init dns323_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { int irq; /* * Check for devices with hard-wired IRQs. */ - irq = orion5x_pci_map_irq(dev, slot, pin); + irq = orion5x_pci_map_irq(const dev, slot, pin); if (irq != -1) return irq; diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c index c0eb646..0038124 100644 --- a/arch/arm/mach-orion5x/kurobox_pro-setup.c +++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c @@ -119,7 +119,8 @@ static struct platform_device kurobox_pro_nor_flash = { * PCI ****************************************************************************/ -static int __init kurobox_pro_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init kurobox_pro_pci_map_irq(const struct pci_dev *dev, u8 slot, + u8 pin) { int irq; diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c index 59263b7..ef3bb8e 100644 --- a/arch/arm/mach-orion5x/mss2-setup.c +++ b/arch/arm/mach-orion5x/mss2-setup.c @@ -73,7 +73,7 @@ static struct platform_device mss2_nor_flash = { /**************************************************************************** * PCI setup ****************************************************************************/ -static int __init mss2_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init mss2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { int irq; diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c index e8706f1..0415250 100644 --- a/arch/arm/mach-orion5x/pci.c +++ b/arch/arm/mach-orion5x/pci.c @@ -587,7 +587,7 @@ struct pci_bus __init *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys return bus; } -int __init orion5x_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +int __init orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { int bus = dev->bus->number; diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c index 9eec7c2..291d22b 100644 --- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c +++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c @@ -131,7 +131,7 @@ static void __init rd88f5181l_fxo_init(void) } static int __init -rd88f5181l_fxo_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +rd88f5181l_fxo_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { int irq; diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c index 0cc90bb..3f02362 100644 --- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c +++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c @@ -140,7 +140,7 @@ static void __init rd88f5181l_ge_init(void) } static int __init -rd88f5181l_ge_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +rd88f5181l_ge_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { int irq; diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c index 48da39b..27fd38e 100644 --- a/arch/arm/mach-orion5x/rd88f5182-setup.c +++ b/arch/arm/mach-orion5x/rd88f5182-setup.c @@ -172,7 +172,8 @@ void __init rd88f5182_pci_preinit(void) } } -static int __init rd88f5182_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init rd88f5182_pci_map_irq(const struct pci_dev *dev, u8 slot, + u8 pin) { int irq; diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c index 29ce826..a34e4fa 100644 --- a/arch/arm/mach-orion5x/terastation_pro2-setup.c +++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c @@ -100,7 +100,7 @@ void __init tsp2_pci_preinit(void) } } -static int __init tsp2_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init tsp2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { int irq; diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c index 47162fd..c983161 100644 --- a/arch/arm/mach-orion5x/ts209-setup.c +++ b/arch/arm/mach-orion5x/ts209-setup.c @@ -143,7 +143,8 @@ void __init qnap_ts209_pci_preinit(void) } } -static int __init qnap_ts209_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init qnap_ts209_pci_map_irq(const struct pci_dev *dev, u8 slot, + u8 pin) { int irq; diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c index 5aacc7a..cc33b22 100644 --- a/arch/arm/mach-orion5x/ts409-setup.c +++ b/arch/arm/mach-orion5x/ts409-setup.c @@ -121,7 +121,8 @@ static struct platform_device qnap_ts409_nor_flash = { * PCI ****************************************************************************/ -static int __init qnap_ts409_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init qnap_ts409_pci_map_irq(const struct pci_dev *dev, u8 slot, + u8 pin) { int irq; diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c index 444a1c7..2653595 100644 --- a/arch/arm/mach-orion5x/wnr854t-setup.c +++ b/arch/arm/mach-orion5x/wnr854t-setup.c @@ -133,7 +133,8 @@ static void __init wnr854t_init(void) platform_device_register(&wnr854t_nor_flash); } -static int __init wnr854t_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init wnr854t_pci_map_irq(const struct pci_dev *dev, u8 slot, + u8 pin) { int irq; diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c index d1952be..251ef15 100644 --- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c +++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c @@ -221,7 +221,8 @@ static void __init wrt350n_v2_init(void) platform_device_register(&wrt350n_v2_button_device); } -static int __init wrt350n_v2_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init wrt350n_v2_pci_map_irq(const struct pci_dev *dev, u8 slot, + u8 pin) { int irq; diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c index 1afc0fb..939a369 100644 --- a/arch/arm/mach-pxa/cm-x2xx-pci.c +++ b/arch/arm/mach-pxa/cm-x2xx-pci.c @@ -77,7 +77,7 @@ void cmx2xx_pci_resume(void) {} #endif /* PCI IRQ mapping*/ -static int __init cmx2xx_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init cmx2xx_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { int irq; diff --git a/arch/arm/mach-sa1100/pci-nanoengine.c b/arch/arm/mach-sa1100/pci-nanoengine.c index fba7a91..a3cd2f7 100644 --- a/arch/arm/mach-sa1100/pci-nanoengine.c +++ b/arch/arm/mach-sa1100/pci-nanoengine.c @@ -122,7 +122,8 @@ static struct pci_ops pci_nano_ops = { .write = nanoengine_write_config, }; -static int __init pci_nanoengine_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init pci_nanoengine_map_irq(const struct pci_dev *dev, u8 slot, + u8 pin) { return NANOENGINE_IRQ_GPIO_PCI; } diff --git a/arch/arm/mach-shark/pci.c b/arch/arm/mach-shark/pci.c index 89d175c..e0d1d43 100644 --- a/arch/arm/mach-shark/pci.c +++ b/arch/arm/mach-shark/pci.c @@ -13,7 +13,7 @@ #include #include -static int __init shark_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init shark_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { if (dev->bus->number == 0) if (dev->devfn == 0) diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c index 2941212..10639ff 100644 --- a/arch/arm/mach-tegra/pcie.c +++ b/arch/arm/mach-tegra/pcie.c @@ -449,7 +449,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys) return 1; } -static int tegra_pcie_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int tegra_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { return INT_PCIE_INTR; } diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c index 13c7e5f..70f875c 100644 --- a/arch/arm/mach-versatile/pci.c +++ b/arch/arm/mach-versatile/pci.c @@ -325,7 +325,7 @@ void __init pci_versatile_preinit(void) /* * map the specified device/slot/pin to an IRQ. Different backplanes may need to modify this. */ -static int __init versatile_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init versatile_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { int irq; int devslot = PCI_SLOT(dev->devfn); diff --git a/arch/sh/drivers/pci/fixups-cayman.c b/arch/sh/drivers/pci/fixups-cayman.c index b68b61d..edc2fb7 100644 --- a/arch/sh/drivers/pci/fixups-cayman.c +++ b/arch/sh/drivers/pci/fixups-cayman.c @@ -5,7 +5,7 @@ #include #include "pci-sh5.h" -int __init pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin) +int __init pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin) { int result = -1; diff --git a/arch/sh/drivers/pci/fixups-dreamcast.c b/arch/sh/drivers/pci/fixups-dreamcast.c index 942ef4f..edeea89 100644 --- a/arch/sh/drivers/pci/fixups-dreamcast.c +++ b/arch/sh/drivers/pci/fixups-dreamcast.c @@ -64,7 +64,7 @@ static void __init gapspci_fixup_resources(struct pci_dev *dev) } DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, gapspci_fixup_resources); -int __init pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin) +int __init pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin) { /* * The interrupt routing semantics here are quite trivial. diff --git a/arch/sh/drivers/pci/fixups-landisk.c b/arch/sh/drivers/pci/fixups-landisk.c index 95c6e2d..ecb1d10 100644 --- a/arch/sh/drivers/pci/fixups-landisk.c +++ b/arch/sh/drivers/pci/fixups-landisk.c @@ -19,7 +19,7 @@ #define PCIMCR_MRSET_OFF 0xBFFFFFFF #define PCIMCR_RFSH_OFF 0xFFFFFFFB -int pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) +int pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin) { /* * slot0: pin1-4 = irq5,6,7,8 diff --git a/arch/sh/drivers/pci/fixups-r7780rp.c b/arch/sh/drivers/pci/fixups-r7780rp.c index 08b2d86..f9370dc 100644 --- a/arch/sh/drivers/pci/fixups-r7780rp.c +++ b/arch/sh/drivers/pci/fixups-r7780rp.c @@ -18,7 +18,7 @@ static char irq_tab[] __initdata = { 65, 66, 67, 68, }; -int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) +int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin) { return irq_tab[slot]; } diff --git a/arch/sh/drivers/pci/fixups-rts7751r2d.c b/arch/sh/drivers/pci/fixups-rts7751r2d.c index e248516..eaddb56 100644 --- a/arch/sh/drivers/pci/fixups-rts7751r2d.c +++ b/arch/sh/drivers/pci/fixups-rts7751r2d.c @@ -31,7 +31,7 @@ static char lboxre2_irq_tab[] __initdata = { IRQ_ETH0, IRQ_ETH1, IRQ_INTA, IRQ_INTD, }; -int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) +int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin) { if (mach_is_lboxre2()) return lboxre2_irq_tab[slot]; diff --git a/arch/sh/drivers/pci/fixups-sdk7780.c b/arch/sh/drivers/pci/fixups-sdk7780.c index 0930f98..0b84725 100644 --- a/arch/sh/drivers/pci/fixups-sdk7780.c +++ b/arch/sh/drivers/pci/fixups-sdk7780.c @@ -27,7 +27,7 @@ static char sdk7780_irq_tab[4][16] __initdata = { { 68, 67, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }, }; -int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) +int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin) { return sdk7780_irq_tab[pin-1][slot]; } diff --git a/arch/sh/drivers/pci/fixups-se7751.c b/arch/sh/drivers/pci/fixups-se7751.c index fd3e6b0..2ec146c 100644 --- a/arch/sh/drivers/pci/fixups-se7751.c +++ b/arch/sh/drivers/pci/fixups-se7751.c @@ -6,7 +6,7 @@ #include #include "pci-sh4.h" -int __init pcibios_map_platform_irq(struct pci_dev *, u8 slot, u8 pin) +int __init pcibios_map_platform_irq(const struct pci_dev *, u8 slot, u8 pin) { switch (slot) { case 0: return 13; diff --git a/arch/sh/drivers/pci/fixups-sh03.c b/arch/sh/drivers/pci/fixups-sh03.c index 2e8a18b..1615e59 100644 --- a/arch/sh/drivers/pci/fixups-sh03.c +++ b/arch/sh/drivers/pci/fixups-sh03.c @@ -3,7 +3,7 @@ #include #include -int __init pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin) +int __init pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin) { int irq; diff --git a/arch/sh/drivers/pci/fixups-snapgear.c b/arch/sh/drivers/pci/fixups-snapgear.c index 5a39ecc..4a093c6 100644 --- a/arch/sh/drivers/pci/fixups-snapgear.c +++ b/arch/sh/drivers/pci/fixups-snapgear.c @@ -18,7 +18,7 @@ #include #include "pci-sh4.h" -int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) +int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin) { int irq = -1; diff --git a/arch/sh/drivers/pci/fixups-titan.c b/arch/sh/drivers/pci/fixups-titan.c index 3a79fa8..bd1addb 100644 --- a/arch/sh/drivers/pci/fixups-titan.c +++ b/arch/sh/drivers/pci/fixups-titan.c @@ -27,7 +27,7 @@ static char titan_irq_tab[] __initdata = { TITAN_IRQ_USB, }; -int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) +int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin) { int irq = titan_irq_tab[slot]; diff --git a/arch/sh/drivers/pci/pcie-sh7786.c b/arch/sh/drivers/pci/pcie-sh7786.c index 4418f90..4df27c4f 100644 --- a/arch/sh/drivers/pci/pcie-sh7786.c +++ b/arch/sh/drivers/pci/pcie-sh7786.c @@ -466,7 +466,7 @@ static int __init pcie_init(struct sh7786_pcie_port *port) return 0; } -int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) +int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin) { return 71; } diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h index f0efe97..cb21e23 100644 --- a/arch/sh/include/asm/pci.h +++ b/arch/sh/include/asm/pci.h @@ -112,7 +112,7 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev, #endif /* Board-specific fixup routines. */ -int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin); +int pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin); extern void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, struct resource *res); diff --git a/arch/sparc/include/asm/leon_pci.h b/arch/sparc/include/asm/leon_pci.h index 42b4b31..f48527e 100644 --- a/arch/sparc/include/asm/leon_pci.h +++ b/arch/sparc/include/asm/leon_pci.h @@ -12,7 +12,7 @@ struct leon_pci_info { struct pci_ops *ops; struct resource io_space; struct resource mem_space; - int (*map_irq)(struct pci_dev *dev, u8 slot, u8 pin); + int (*map_irq)(const struct pci_dev *dev, u8 slot, u8 pin); }; extern void leon_pci_init(struct platform_device *ofdev, diff --git a/arch/sparc/kernel/leon_pci_grpci2.c b/arch/sparc/kernel/leon_pci_grpci2.c index 44dc093..fad1bd0 100644 --- a/arch/sparc/kernel/leon_pci_grpci2.c +++ b/arch/sparc/kernel/leon_pci_grpci2.c @@ -215,7 +215,7 @@ struct grpci2_priv { DEFINE_SPINLOCK(grpci2_dev_lock); struct grpci2_priv *grpci2priv; -int grpci2_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +int grpci2_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { struct grpci2_priv *priv = dev->bus->sysdata; int irq_group; diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c index 6d4cb5d..2a8014c 100644 --- a/arch/tile/kernel/pci.c +++ b/arch/tile/kernel/pci.c @@ -228,7 +228,7 @@ err_cont: * (pin - 1) converts from the PCI standard's [1:4] convention to * a normal [0:3] range. */ -static int tile_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int tile_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { struct pci_controller *controller = (struct pci_controller *)dev->sysdata; diff --git a/arch/unicore32/kernel/pci.c b/arch/unicore32/kernel/pci.c index 100eab8..4892fbb 100644 --- a/arch/unicore32/kernel/pci.c +++ b/arch/unicore32/kernel/pci.c @@ -102,7 +102,7 @@ void pci_puv3_preinit(void) writel(readl(PCIBRI_CMD) | PCIBRI_CMD_IO | PCIBRI_CMD_MEM, PCIBRI_CMD); } -static int __init pci_puv3_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init pci_puv3_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { if (dev->bus->number == 0) { #ifdef CONFIG_ARCH_FPGA /* 4 pci slots */ diff --git a/arch/x86/pci/visws.c b/arch/x86/pci/visws.c index 03008f7..6f2f8ee 100644 --- a/arch/x86/pci/visws.c +++ b/arch/x86/pci/visws.c @@ -24,7 +24,7 @@ static void pci_visws_disable_irq(struct pci_dev *dev) { } unsigned int pci_bus0, pci_bus1; -static int __init visws_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +static int __init visws_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { int irq, bus = dev->bus->number; diff --git a/drivers/pci/setup-irq.c b/drivers/pci/setup-irq.c index eec9738..eb219a1 100644 --- a/drivers/pci/setup-irq.c +++ b/drivers/pci/setup-irq.c @@ -21,7 +21,7 @@ static void __init pdev_fixup_irq(struct pci_dev *dev, u8 (*swizzle)(struct pci_dev *, u8 *), - int (*map_irq)(struct pci_dev *, u8, u8)) + int (*map_irq)(const struct pci_dev *, u8, u8)) { u8 pin, slot; int irq = 0; @@ -56,7 +56,7 @@ pdev_fixup_irq(struct pci_dev *dev, void __init pci_fixup_irqs(u8 (*swizzle)(struct pci_dev *, u8 *), - int (*map_irq)(struct pci_dev *, u8, u8)) + int (*map_irq)(const struct pci_dev *, u8, u8)) { struct pci_dev *dev = NULL; for_each_pci_dev(dev) diff --git a/include/linux/pci.h b/include/linux/pci.h index c446b5c..e37f177 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -879,7 +879,7 @@ void pdev_enable_device(struct pci_dev *); void pdev_sort_resources(struct pci_dev *, struct resource_list *); int pci_enable_resources(struct pci_dev *, int mask); void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *), - int (*)(struct pci_dev *, u8, u8)); + int (*)(const struct pci_dev *, u8, u8)); #define HAVE_PCI_REQ_REGIONS 2 int __must_check pci_request_regions(struct pci_dev *, const char *); int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *); From florian@openwrt.org Fri Jun 10 17:30:24 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 17:30:27 +0200 (CEST) Received: from mail-wy0-f177.google.com ([74.125.82.177]:46929 "EHLO mail-wy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491108Ab1FJPaY (ORCPT ); Fri, 10 Jun 2011 17:30:24 +0200 Received: by wyb28 with SMTP id 28so2624277wyb.36 for ; Fri, 10 Jun 2011 08:30:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:sender:from:organization:to:subject:date :user-agent:cc:references:in-reply-to:mime-version:content-type :content-transfer-encoding:message-id; bh=ZKKnTVMzMz79HTn0QkhyyXytmx0I3C8517LYn16b6kA=; b=YhkmRA7VzZBuqN7KuOOHr4zdjj4tx/Trw45EX2ii5kFiadfX6dDy0E5YJJ1peqoEGt Z8Nfk5bsrtJQtP6yGYy+Fot9pvwl8tnzPyIQwZFGa1yw/5Y6/wxSa04t5/CbYR33YhrE 7T3bVYbjxN71kxXxENdWcGOazQVTv7Q5pf1Z4= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:organization:to:subject:date:user-agent:cc:references :in-reply-to:mime-version:content-type:content-transfer-encoding :message-id; b=ItXlKMH0E++5MZmBsm2RUVVgx7V7P4iGO3KGiVfceXD9GZW3UrEd9j7M+Y4MtZ+YfR Bs76aauZhUdkN6ppsavXnIYJL+fbSyXqKU0mbXGBiZI7lVlRZ7p4FYfP4Kw+K/Gpz3WX LmBu+elWf9l35sNf8lBH3BCgqi0HT8VRishdg= Received: by 10.227.37.7 with SMTP id v7mr2387183wbd.41.1307719817248; Fri, 10 Jun 2011 08:30:17 -0700 (PDT) Received: from flexo.localnet (bobafett.staff.proxad.net [213.228.1.121]) by mx.google.com with ESMTPS id et5sm2112370wbb.33.2011.06.10.08.30.15 (version=SSLv3 cipher=OTHER); Fri, 10 Jun 2011 08:30:15 -0700 (PDT) From: Florian Fainelli Organization: OpenWrt To: Jamie Iles Subject: Re: [PATCH 2/3] WATCHDOG: mtx1-wdt: request gpio before using it Date: Fri, 10 Jun 2011 17:34:34 +0200 User-Agent: KMail/1.13.6 (Linux/2.6.38-8-server; KDE/4.6.2; x86_64; ; ) Cc: Wim Van Sebroeck , linux-mips@linux-mips.org, linux-watchdog@vger.kernel.org, Manuel Lauss , stable@kernel.org References: <201106021454.20111.florian@openwrt.org> <20110607095847.GB21174@pulham.picochip.com> In-Reply-To: <20110607095847.GB21174@pulham.picochip.com> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Message-Id: <201106101734.35048.florian@openwrt.org> X-archive-position: 30320 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9309 Content-Length: 1087 Lines: 36 Hello Jamie, On Tuesday 07 June 2011 11:58:47 Jamie Iles wrote: > On Thu, Jun 02, 2011 at 02:54:20PM +0200, Florian Fainelli wrote: > > Otherwise, the gpiolib autorequest feature will produce a WARN_ON(): > > > > WARNING: at drivers/gpio/gpiolib.c:101 0x8020ec6c() > > autorequest GPIO-215 > > [...] > > > > CC: stable@kernel.org > > Signed-off-by: Florian Fainelli > > --- > > diff --git a/drivers/watchdog/mtx-1_wdt.c b/drivers/watchdog/mtx-1_wdt.c > > index 63df28c..16086f8 100644 > > --- a/drivers/watchdog/mtx-1_wdt.c > > +++ b/drivers/watchdog/mtx-1_wdt.c > > @@ -214,6 +214,11 @@ static int __devinit mtx1_wdt_probe(struct > > platform_device *pdev) > > > > int ret; > > > > mtx1_wdt_device.gpio = pdev->resource[0].start; > > > > + ret = gpio_request(mtx1_wdt_device.gpio, "mtx1-wdt"); > > + if (ret < 0) { > > + dev_err(&pdev->dev, "failed to request gpio"); > > + return ret; > > + } > > Could you use gpio_request_one() here to make sure the GPIO is in the > correct direction first? Makes sense, I will respin a v2 of these. -- Florian From florian@openwrt.org Fri Jun 10 17:31:27 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 17:31:30 +0200 (CEST) Received: from mail-ww0-f41.google.com ([74.125.82.41]:58638 "EHLO mail-ww0-f41.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491108Ab1FJPb1 (ORCPT ); Fri, 10 Jun 2011 17:31:27 +0200 Received: by wwi18 with SMTP id 18so875029wwi.0 for ; Fri, 10 Jun 2011 08:31:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:sender:from:organization:to:subject:date :user-agent:cc:references:in-reply-to:mime-version:content-type :content-transfer-encoding:message-id; bh=LRs7gGO/luhcAbU0Yly9ZF3iurtzT6QEAZeATZqjkA4=; b=IMunW2YbHGtX92JyqC76WUvYGlQjgy54UdpIGoz13Xe6ZYChr2z0nih+w+iILxY8HJ q85jIDVGLS+mLWpeSBE3GT+sTiNhU4jC972NBcSYMJsjblpIELt69uehoVxMcKof2MZr 12brDo1v2k4KbNMU0OJH+Rby4Gg5Ij1KIjzIw= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:organization:to:subject:date:user-agent:cc:references :in-reply-to:mime-version:content-type:content-transfer-encoding :message-id; b=HoDWovox1p5B5isNJcNvkPgaxe4F27zEwev/Cx3gbbqaSUl20K/Lr7XBoitGXimmXt zi4tFhPB9veNZkUAI3PGuawsT2BkS6rlVIDuC2utGXKOfxBwK/GYVMhpk7Oqp8FdXuC2 OSf90E87CaDikm7bfXF3iHiRdMh59DTZbsgyc= Received: by 10.216.61.135 with SMTP id w7mr7884896wec.19.1307719882157; Fri, 10 Jun 2011 08:31:22 -0700 (PDT) Received: from flexo.localnet (bobafett.staff.proxad.net [213.228.1.121]) by mx.google.com with ESMTPS id n20sm1465014weq.39.2011.06.10.08.31.20 (version=SSLv3 cipher=OTHER); Fri, 10 Jun 2011 08:31:21 -0700 (PDT) From: Florian Fainelli Organization: OpenWrt To: Jamie Iles Subject: Re: [PATCH 3/3] WATCHDOG: mtx1-wdt: fix GPIO toggling Date: Fri, 10 Jun 2011 17:35:40 +0200 User-Agent: KMail/1.13.6 (Linux/2.6.38-8-server; KDE/4.6.2; x86_64; ; ) Cc: Wim Van Sebroeck , linux-mips@linux-mips.org, linux-watchdog@vger.kernel.org, Manuel Lauss , stable@kernel.org References: <201106021454.21827.florian@openwrt.org> <20110607095932.GC21174@pulham.picochip.com> In-Reply-To: <20110607095932.GC21174@pulham.picochip.com> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Message-Id: <201106101735.40335.florian@openwrt.org> X-archive-position: 30321 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9310 Content-Length: 2169 Lines: 56 On Tuesday 07 June 2011 11:59:32 Jamie Iles wrote: > On Thu, Jun 02, 2011 at 02:54:21PM +0200, Florian Fainelli wrote: > > Commit e391be76 (MIPS: Alchemy: Clean up GPIO registers and accessors) > > changed the way the GPIO was toggled. Prior to this patch, we would > > always actively drive the GPIO output to either 0 or 1, this patch > > drove the GPIO active to 0, and put the GPIO in tristate to drive it > > to 1, unfortunately this does not work, revert back to active driving. > > > > Using a signed variable (gstate) to hold the gpio state and using a bit- > > wise operation on it also resulted in toggling value from 1 to -2 since > > the variable is signed. This value was then passed on to gpio_direction_ > > output, which always perform a if (value) ... to set the value to the > > gpio, so we were always writing a 1 to this GPIO instead of 1 -> 0 -> 1 > > ... > > > > CC: stable@kernel.org > > Signed-off-by: Florian Fainelli > > --- > > diff --git a/drivers/watchdog/mtx-1_wdt.c b/drivers/watchdog/mtx-1_wdt.c > > index 16086f8..9756da9 100644 > > --- a/drivers/watchdog/mtx-1_wdt.c > > +++ b/drivers/watchdog/mtx-1_wdt.c > > @@ -66,7 +66,7 @@ static struct { > > > > int default_ticks; > > unsigned long inuse; > > unsigned gpio; > > > > - int gstate; > > + unsigned int gstate; > > > > } mtx1_wdt_device; > > > > static void mtx1_wdt_trigger(unsigned long unused) > > > > @@ -78,11 +78,8 @@ static void mtx1_wdt_trigger(unsigned long unused) > > > > ticks--; > > > > /* toggle wdt gpio */ > > > > - mtx1_wdt_device.gstate = ~mtx1_wdt_device.gstate; > > - if (mtx1_wdt_device.gstate) > > - gpio_direction_output(mtx1_wdt_device.gpio, 1); > > - else > > - gpio_direction_input(mtx1_wdt_device.gpio); > > + mtx1_wdt_device.gstate = !mtx1_wdt_device.gstate; > > + gpio_direction_output(mtx1_wdt_device.gpio, mtx1_wdt_device.gstate); > > Would gpio_set_value() be more appropriate here? Isn't the gpio always > an output after the first call? I wanted to first get it fixed, then eventually correctly updated. Makes sense to have this merged in the patch to match the comment of my patch. -- Florian From ralf@linux-mips.org Fri Jun 10 20:56:43 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 20:56:45 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:40493 "EHLO duck.linux-mips.net" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491037Ab1FJS4n (ORCPT ); Fri, 10 Jun 2011 20:56:43 +0200 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.3) with ESMTP id p5AIvkkl016609; Fri, 10 Jun 2011 19:57:47 +0100 Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id p5AIvjd6016605; Fri, 10 Jun 2011 19:57:45 +0100 Date: Fri, 10 Jun 2011 19:57:45 +0100 From: Ralf Baechle To: David Daney Cc: David VomLehn , Grant Likely , linux-mips@linux-mips.org, Imre Kaloz , Gabor Juhos , John Crispin , "Dezhong Diao (dediao)" , Thomas Gleixner Subject: Re: Converting MIPS to Device Tree Message-ID: <20110610185745.GA3536@linux-mips.org> References: <20110606010753.GA16202@linux-mips.org> <20110607230218.GA23552@dvomlehn-lnx2.corp.sa.net> <4DEEB2A8.8050302@caviumnetworks.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4DEEB2A8.8050302@caviumnetworks.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 30322 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9495 Content-Length: 1036 Lines: 28 On Tue, Jun 07, 2011 at 04:22:16PM -0700, David Daney wrote: > >use a parameter like "devtree=" on the command line, passed > >in any way the bootloader likes. > > Some u-boots for non-mips platforms pass it in the environment of > the bootm protocol. > > I would say to pass the pointer to the DTB in the environment, but > not all platforms (like powertv) have an environment. So I guess > the command line has to do. 3 steps: 1) Use command line argument for DT 2) Iff 1) fails, use DT specified by environment 3) Iff 1) and 2) fail, use builtin DTB. > Also I think we should pass the physical address of the DTB, not the > virtual address. It would be the kernel's responsibility to figure > out what the virtual address is. I like the basic idea - but ... Most firmware will only use KSEG0 / XKPHYS mappings so there should be no aliasing issue but still there could be conflicting cache modes. So we should also specify that firmware should writeback and invalidate the DTB from caches. Ralf From mcdonald.shane@gmail.com Fri Jun 10 20:58:28 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 20:58:31 +0200 (CEST) Received: from mail-iw0-f177.google.com ([209.85.214.177]:44465 "EHLO mail-iw0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491108Ab1FJS62 convert rfc822-to-8bit (ORCPT ); Fri, 10 Jun 2011 20:58:28 +0200 Received: by iwn36 with SMTP id 36so3118191iwn.36 for ; Fri, 10 Jun 2011 11:58:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=I01LqixJctSzwD3TaBgkRvrn6lkxN3TuAPE1uZklsMQ=; b=mmyCc1HDLGGAqbDVy00DoTM/9uxgB/2zWIcdgRFNjg4x7AFijZDr3FZBDcpsrFZA05 6ZqyVR7nak28CQdQz+Cok44dhAQsb9DLZVnL+Nf7Pw4wLUk1OBuu9vAFXsPw1i2qZMU1 1HS8lvMcOI452ezBWYWScuHp1mJQBxF3F1soI= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=ufRMSFBtPF2jVrmOUSpOPbNDPUOoosycfTi+xUIIO0YSOz0Co3a2+fSM7tjnfVqkCD JqT/aAQNPOx+lpfOEuAKmwQXgH+hh8tAAJS3Bv19c4+uoQN7/CGfTqBbvPQMOSD0rJzu HUbyfRRdIamwovj/fr9VTcnQuxndG2prX4Gzc= MIME-Version: 1.0 Received: by 10.42.99.4 with SMTP id u4mr2888108icn.461.1307732300366; Fri, 10 Jun 2011 11:58:20 -0700 (PDT) Received: by 10.42.164.201 with HTTP; Fri, 10 Jun 2011 11:58:20 -0700 (PDT) In-Reply-To: <20110610035817.GA6740@linux-mips.org> References: <1307616525-22028-1-git-send-email-jamie@jamieiles.com> <20110610035817.GA6740@linux-mips.org> Date: Fri, 10 Jun 2011 12:58:20 -0600 Message-ID: Subject: Re: [PATCH] tty: 8250: handle USR for DesignWare 8250 with correct accessors From: Shane McDonald To: Ralf Baechle Cc: Jamie Iles , linux-serial@vger.kernel.org, Greg Kroah-Hartman , linux-mips@linux-mips.org, Marc St-Jean , Anoop P A Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT X-archive-position: 30323 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mcdonald.shane@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9497 Content-Length: 1772 Lines: 36 On Thu, Jun 9, 2011 at 9:58 PM, Ralf Baechle wrote: > On Thu, Jun 09, 2011 at 11:48:45AM +0100, Jamie Iles wrote: > > The original read access was for a read access at offset 0xc0 from the > base address. Your patch changes this to offset 0x1f * 4 = 0x7c. > > If you look at arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h there's > > #define MSP_UART0_BASE (MSP_SLP_BASE + 0x100) > /* UART0 controller base */ > #define MSP_BCPY_CTRL_BASE (MSP_SLP_BASE + 0x120) > /* Block Copy controller base */ > > So there are just 0x20 of address space reserved for that UART. Me thinks > that PMC-Sierra clamped the 256 byte address space of the DesignWare APB > UART to what is standard for 16550 class UARTs, 8 registers which at a > shift of 4 is 0x20 bytes and the status register being accesses is really > something else. I'd guess PMC-Sierra just remapped the register to > another address. ... > On a 2nd thought I wonder if the restricted address space of the PMC-Sierra > variant and the strange remapping would justify treating it as a subvariant > of the DW APB UART, rename it to UPIO_PMC_MSP_DWAPB, hardcode the access to > the remapped status register. And get rid of the unused UPIO_DWAPB32 ... > > I've cced a few people who should know more about this. Marc and I were originally responsible for this code, but we're no longer at PMC-Sierra, and I don't remember the details. If Anoop isn't able confirm Ralf's suspicions regarding the smaller address space and remapped register, I'll see if I can track down some former co-workers that could shed some light on this. Ralf's 2nd thought makes perfect sense to me, though. Shane From ddaney@caviumnetworks.com Fri Jun 10 21:00:09 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 21:00:14 +0200 (CEST) Received: from mail3.caviumnetworks.com ([12.108.191.235]:16138 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491037Ab1FJTAJ (ORCPT ); Fri, 10 Jun 2011 21:00:09 +0200 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Fri, 10 Jun 2011 12:01:12 -0700 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.4675); Fri, 10 Jun 2011 12:00:07 -0700 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Fri, 10 Jun 2011 12:00:07 -0700 Message-ID: <4DF269B1.2020407@caviumnetworks.com> Date: Fri, 10 Jun 2011 12:00:01 -0700 From: David Daney User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.15) Gecko/20101027 Fedora/3.0.10-1.fc12 Thunderbird/3.0.10 MIME-Version: 1.0 To: Ralf Baechle CC: David VomLehn , Grant Likely , linux-mips@linux-mips.org, Imre Kaloz , Gabor Juhos , John Crispin , "Dezhong Diao (dediao)" , Thomas Gleixner Subject: Re: Converting MIPS to Device Tree References: <20110606010753.GA16202@linux-mips.org> <20110607230218.GA23552@dvomlehn-lnx2.corp.sa.net> <4DEEB2A8.8050302@caviumnetworks.com> <20110610185745.GA3536@linux-mips.org> In-Reply-To: <20110610185745.GA3536@linux-mips.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 10 Jun 2011 19:00:07.0143 (UTC) FILETIME=[9D226770:01CC27A0] X-archive-position: 30324 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9499 Content-Length: 1235 Lines: 36 On 06/10/2011 11:57 AM, Ralf Baechle wrote: > On Tue, Jun 07, 2011 at 04:22:16PM -0700, David Daney wrote: > >>> use a parameter like "devtree=" on the command line, passed >>> in any way the bootloader likes. >> >> Some u-boots for non-mips platforms pass it in the environment of >> the bootm protocol. >> >> I would say to pass the pointer to the DTB in the environment, but >> not all platforms (like powertv) have an environment. So I guess >> the command line has to do. > > 3 steps: > > 1) Use command line argument for DT > 2) Iff 1) fails, use DT specified by environment I'm OK with this as long as we can define 'the environment' to include what I am currently doing on Octeon. > 3) Iff 1) and 2) fail, use builtin DTB. > >> Also I think we should pass the physical address of the DTB, not the >> virtual address. It would be the kernel's responsibility to figure >> out what the virtual address is. > > I like the basic idea - but ... Most firmware will only use KSEG0 / XKPHYS > mappings so there should be no aliasing issue but still there could be > conflicting cache modes. So we should also specify that firmware should > writeback and invalidate the DTB from caches. > > Ralf > From mbizon@freebox.fr Fri Jun 10 23:47:36 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 23:47:43 +0200 (CEST) Received: from smtp4-g21.free.fr ([212.27.42.4]:52556 "EHLO smtp4-g21.free.fr" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490954Ab1FJVrg (ORCPT ); Fri, 10 Jun 2011 23:47:36 +0200 Received: from bobafett.staff.proxad.net (unknown [213.228.1.121]) by smtp4-g21.free.fr (Postfix) with ESMTP id 9DDE84C80FF; Fri, 10 Jun 2011 23:47:31 +0200 (CEST) Received: from sakura.staff.proxad.net (unknown [172.18.3.156]) by bobafett.staff.proxad.net (Postfix) with ESMTP id 8F0EF180650; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) Received: by sakura.staff.proxad.net (Postfix, from userid 1000) id 6846355AEB4; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) From: Maxime Bizon To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org, florian@openwrt.org, Maxime Bizon Subject: [PATCH 02/11] MIPS: BCM63XX: hook up plat_ioremap to intercept soc registers remapping. Date: Fri, 10 Jun 2011 23:47:12 +0200 Message-Id: <1307742441-28284-3-git-send-email-mbizon@freebox.fr> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> References: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> X-archive-position: 30325 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mbizon@freebox.fr Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9568 Content-Length: 1402 Lines: 56 Internal SOC registers can be directly accessed, no need to waste a TLB entry. Signed-off-by: Maxime Bizon --- arch/mips/include/asm/mach-bcm63xx/ioremap.h | 38 ++++++++++++++++++++++++++ 1 files changed, 38 insertions(+), 0 deletions(-) create mode 100644 arch/mips/include/asm/mach-bcm63xx/ioremap.h diff --git a/arch/mips/include/asm/mach-bcm63xx/ioremap.h b/arch/mips/include/asm/mach-bcm63xx/ioremap.h new file mode 100644 index 0000000..e3fe04d --- /dev/null +++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h @@ -0,0 +1,38 @@ +#ifndef BCM63XX_IOREMAP_H_ +#define BCM63XX_IOREMAP_H_ + +#include + +static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size) +{ + return phys_addr; +} + +static inline int is_bcm63xx_internal_registers(phys_t offset) +{ + switch (bcm63xx_get_cpu_id()) { + case BCM6338_CPU_ID: + case BCM6345_CPU_ID: + case BCM6348_CPU_ID: + case BCM6358_CPU_ID: + if (offset >= 0xfff00000) + return 1; + break; + } + return 0; +} + +static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size, + unsigned long flags) +{ + if (is_bcm63xx_internal_registers(offset)) + return (void __iomem *)offset; + return NULL; +} + +static inline int plat_iounmap(const volatile void __iomem *addr) +{ + return is_bcm63xx_internal_registers((unsigned long)addr); +} + +#endif /* BCM63XX_IOREMAP_H_ */ -- 1.7.1.1 From mbizon@freebox.fr Fri Jun 10 23:47:39 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 23:48:08 +0200 (CEST) Received: from smtp4-g21.free.fr ([212.27.42.4]:52589 "EHLO smtp4-g21.free.fr" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491133Ab1FJVrj (ORCPT ); Fri, 10 Jun 2011 23:47:39 +0200 Received: from bobafett.staff.proxad.net (unknown [213.228.1.121]) by smtp4-g21.free.fr (Postfix) with ESMTP id E7D4F4C8137; Fri, 10 Jun 2011 23:47:34 +0200 (CEST) Received: from sakura.staff.proxad.net (unknown [172.18.3.156]) by bobafett.staff.proxad.net (Postfix) with ESMTP id 8FC5F180651; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) Received: by sakura.staff.proxad.net (Postfix, from userid 1000) id 5356B55B08D; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) From: Maxime Bizon To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org, florian@openwrt.org, Maxime Bizon Subject: [PATCH 00/11] MIPS: BCM63XX: add support for Broadcom 6368 CPU. Date: Fri, 10 Jun 2011 23:47:10 +0200 Message-Id: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> X-Mailer: git-send-email 1.7.1.1 X-archive-position: 30326 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mbizon@freebox.fr Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9570 Content-Length: 1815 Lines: 36 These patches add support for 6368 CPU to the existing bcm63xx code. Basic CPU support for now, ethernet and board support will come soon. Maxime Bizon (11): MIPS: BCM63XX: set default pci cache line size. MIPS: BCM63XX: hook up plat_ioremap to intercept soc registers remapping. MIPS: BCM63XX: call board_register_device from device_initcall() MIPS: BCM63XX: introduce bcm_readll & bcm_writell. MIPS: BCM63XX: cleanup cpu registers. MIPS: BCM63XX: add more register sets & missing register definitions. MIPS: BCM63XX: change irq code to prepare for per-cpu peculiarity. MIPS: BCM63XX: prepare irq code to handle different external irq hardware implementation. MIPS: BCM63XX: handle 64 bits irq stat register in irq code. MIPS: BCM63XX: add external irq support for non 6348 CPUs. MIPS: BCM63XX: add support for bcm6368 CPU. arch/mips/bcm63xx/Kconfig | 4 + arch/mips/bcm63xx/clk.c | 70 +++- arch/mips/bcm63xx/cpu.c | 221 +++------ arch/mips/bcm63xx/dev-uart.c | 2 +- arch/mips/bcm63xx/irq.c | 321 ++++++++++-- arch/mips/bcm63xx/prom.c | 7 +- arch/mips/bcm63xx/setup.c | 2 +- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 593 +++++++++++++-------- arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h | 2 + arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 2 + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 213 +++++++- arch/mips/include/asm/mach-bcm63xx/ioremap.h | 42 ++ arch/mips/pci/pci-bcm63xx.c | 6 +- 13 files changed, 1065 insertions(+), 420 deletions(-) create mode 100644 arch/mips/include/asm/mach-bcm63xx/ioremap.h From mbizon@freebox.fr Fri Jun 10 23:47:39 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 23:48:33 +0200 (CEST) Received: from smtp4-g21.free.fr ([212.27.42.4]:52612 "EHLO smtp4-g21.free.fr" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491135Ab1FJVrj (ORCPT ); Fri, 10 Jun 2011 23:47:39 +0200 Received: from bobafett.staff.proxad.net (unknown [213.228.1.121]) by smtp4-g21.free.fr (Postfix) with ESMTP id 0CDA54C8081; Fri, 10 Jun 2011 23:47:34 +0200 (CEST) Received: from sakura.staff.proxad.net (unknown [172.18.3.156]) by bobafett.staff.proxad.net (Postfix) with ESMTP id 94B52180654; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) Received: by sakura.staff.proxad.net (Postfix, from userid 1000) id 7ED8655B091; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) From: Maxime Bizon To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org, florian@openwrt.org, Maxime Bizon Subject: [PATCH 01/11] MIPS: BCM63XX: set default pci cache line size. Date: Fri, 10 Jun 2011 23:47:11 +0200 Message-Id: <1307742441-28284-2-git-send-email-mbizon@freebox.fr> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> References: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> X-archive-position: 30327 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mbizon@freebox.fr Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9571 Content-Length: 623 Lines: 21 Signed-off-by: Maxime Bizon --- arch/mips/pci/pci-bcm63xx.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/mips/pci/pci-bcm63xx.c b/arch/mips/pci/pci-bcm63xx.c index 82e0fde..c7fc92f 100644 --- a/arch/mips/pci/pci-bcm63xx.c +++ b/arch/mips/pci/pci-bcm63xx.c @@ -215,6 +215,8 @@ static int __init bcm63xx_pci_init(void) register_pci_controller(&bcm63xx_cb_controller); #endif + pci_cache_line_size = 4; + /* mark memory space used for IO mapping as reserved */ request_mem_region(BCM_PCI_IO_BASE_PA, BCM_PCI_IO_SIZE, "bcm63xx PCI IO space"); -- 1.7.1.1 From mbizon@freebox.fr Fri Jun 10 23:47:40 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 23:48:56 +0200 (CEST) Received: from smtp4-g21.free.fr ([212.27.42.4]:52626 "EHLO smtp4-g21.free.fr" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491137Ab1FJVrk (ORCPT ); Fri, 10 Jun 2011 23:47:40 +0200 Received: from bobafett.staff.proxad.net (unknown [213.228.1.121]) by smtp4-g21.free.fr (Postfix) with ESMTP id 6C8B24C814B; Fri, 10 Jun 2011 23:47:35 +0200 (CEST) Received: from sakura.staff.proxad.net (unknown [172.18.3.156]) by bobafett.staff.proxad.net (Postfix) with ESMTP id A4273180657; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) Received: by sakura.staff.proxad.net (Postfix, from userid 1000) id 8F73955B08E; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) From: Maxime Bizon To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org, florian@openwrt.org, Maxime Bizon Subject: [PATCH 03/11] MIPS: BCM63XX: call board_register_device from device_initcall() Date: Fri, 10 Jun 2011 23:47:13 +0200 Message-Id: <1307742441-28284-4-git-send-email-mbizon@freebox.fr> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> References: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> X-archive-position: 30328 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mbizon@freebox.fr Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9572 Content-Length: 638 Lines: 21 Some device registration (eg leds), expect subsystem initcall to be run first, so move board device registration to device_initcall(). Signed-off-by: Maxime Bizon --- arch/mips/bcm63xx/setup.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/mips/bcm63xx/setup.c b/arch/mips/bcm63xx/setup.c index d005659..04a3499 100644 --- a/arch/mips/bcm63xx/setup.c +++ b/arch/mips/bcm63xx/setup.c @@ -124,4 +124,4 @@ int __init bcm63xx_register_devices(void) return board_register_devices(); } -arch_initcall(bcm63xx_register_devices); +device_initcall(bcm63xx_register_devices); -- 1.7.1.1 From mbizon@freebox.fr Fri Jun 10 23:47:40 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 23:49:19 +0200 (CEST) Received: from smtp4-g21.free.fr ([212.27.42.4]:52634 "EHLO smtp4-g21.free.fr" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491138Ab1FJVrk (ORCPT ); Fri, 10 Jun 2011 23:47:40 +0200 Received: from bobafett.staff.proxad.net (unknown [213.228.1.121]) by smtp4-g21.free.fr (Postfix) with ESMTP id AEF594C8164; Fri, 10 Jun 2011 23:47:35 +0200 (CEST) Received: from sakura.staff.proxad.net (unknown [172.18.3.156]) by bobafett.staff.proxad.net (Postfix) with ESMTP id AB00918065A; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) Received: by sakura.staff.proxad.net (Postfix, from userid 1000) id A1CE255B08D; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) From: Maxime Bizon To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org, florian@openwrt.org, Maxime Bizon Subject: [PATCH 04/11] MIPS: BCM63XX: introduce bcm_readll & bcm_writell. Date: Fri, 10 Jun 2011 23:47:14 +0200 Message-Id: <1307742441-28284-5-git-send-email-mbizon@freebox.fr> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> References: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> X-archive-position: 30329 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mbizon@freebox.fr Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9574 Content-Length: 1109 Lines: 26 Needed for upcoming 6368 CPU support. Signed-off-by: Maxime Bizon --- arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h index 91180fa..8bf4a67 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h @@ -49,9 +49,11 @@ #define bcm_readb(a) (*(volatile unsigned char *) BCM_REGS_VA(a)) #define bcm_readw(a) (*(volatile unsigned short *) BCM_REGS_VA(a)) #define bcm_readl(a) (*(volatile unsigned int *) BCM_REGS_VA(a)) +#define bcm_readll(a) (*(volatile u64 *) BCM_REGS_VA(a)) #define bcm_writeb(v, a) (*(volatile unsigned char *) BCM_REGS_VA((a)) = (v)) #define bcm_writew(v, a) (*(volatile unsigned short *) BCM_REGS_VA((a)) = (v)) #define bcm_writel(v, a) (*(volatile unsigned int *) BCM_REGS_VA((a)) = (v)) +#define bcm_writell(v, a) (*(volatile u64 *) BCM_REGS_VA((a)) = (v)) /* * IO helpers to access register set for current CPU -- 1.7.1.1 From mbizon@freebox.fr Fri Jun 10 23:47:43 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 23:49:41 +0200 (CEST) Received: from smtp4-g21.free.fr ([212.27.42.4]:52674 "EHLO smtp4-g21.free.fr" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491139Ab1FJVrn (ORCPT ); Fri, 10 Jun 2011 23:47:43 +0200 Received: from bobafett.staff.proxad.net (unknown [213.228.1.121]) by smtp4-g21.free.fr (Postfix) with ESMTP id 492294C8168; Fri, 10 Jun 2011 23:47:38 +0200 (CEST) Received: from sakura.staff.proxad.net (unknown [172.18.3.156]) by bobafett.staff.proxad.net (Postfix) with ESMTP id CD634180660; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) Received: by sakura.staff.proxad.net (Postfix, from userid 1000) id BCE6555AEB4; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) From: Maxime Bizon To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org, florian@openwrt.org, Maxime Bizon Subject: [PATCH 06/11] MIPS: BCM63XX: add more register sets & missing register definitions. Date: Fri, 10 Jun 2011 23:47:16 +0200 Message-Id: <1307742441-28284-7-git-send-email-mbizon@freebox.fr> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> References: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> X-archive-position: 30330 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mbizon@freebox.fr Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9575 Content-Length: 17427 Lines: 485 Needed for upcoming 6368 CPU support. Signed-off-by: Maxime Bizon --- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 183 +++++++++++++++++++++ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 78 +++++++++ 2 files changed, 261 insertions(+), 0 deletions(-) diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h index 464f948..ce6b3ca 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h @@ -88,6 +88,7 @@ enum bcm63xx_regs_set { RSET_UART1, RSET_GPIO, RSET_SPI, + RSET_SPI2, RSET_UDC0, RSET_OHCI0, RSET_OHCI_PRIV, @@ -98,10 +99,23 @@ enum bcm63xx_regs_set { RSET_ENET0, RSET_ENET1, RSET_ENETDMA, + RSET_ENETDMAC, + RSET_ENETDMAS, + RSET_ENETSW, RSET_EHCI0, RSET_SDRAM, RSET_MEMC, RSET_DDR, + RSET_M2M, + RSET_ATM, + RSET_XTM, + RSET_XTMDMA, + RSET_XTMDMAC, + RSET_XTMDMAS, + RSET_PCM, + RSET_PCMDMA, + RSET_PCMDMAC, + RSET_PCMDMAS, }; #define RSET_DSL_LMEM_SIZE (64 * 1024 * 4) @@ -109,11 +123,18 @@ enum bcm63xx_regs_set { #define RSET_WDT_SIZE 12 #define RSET_ENET_SIZE 2048 #define RSET_ENETDMA_SIZE 2048 +#define RSET_ENETSW_SIZE 65536 #define RSET_UART_SIZE 24 #define RSET_UDC_SIZE 256 #define RSET_OHCI_SIZE 256 #define RSET_EHCI_SIZE 256 #define RSET_PCMCIA_SIZE 12 +#define RSET_M2M_SIZE 256 +#define RSET_ATM_SIZE 4096 +#define RSET_XTM_SIZE 10240 +#define RSET_XTMDMA_SIZE 256 +#define RSET_XTMDMAC_SIZE(chans) (16 * (chans)) +#define RSET_XTMDMAS_SIZE(chans) (16 * (chans)) /* * 6338 register sets base address @@ -127,6 +148,7 @@ enum bcm63xx_regs_set { #define BCM_6338_UART1_BASE (0xdeadbeef) #define BCM_6338_GPIO_BASE (0xfffe0400) #define BCM_6338_SPI_BASE (0xfffe0c00) +#define BCM_6338_SPI2_BASE (0xdeadbeef) #define BCM_6338_UDC0_BASE (0xdeadbeef) #define BCM_6338_USBDMA_BASE (0xfffe2400) #define BCM_6338_OHCI0_BASE (0xdeadbeef) @@ -141,10 +163,23 @@ enum bcm63xx_regs_set { #define BCM_6338_ENET0_BASE (0xfffe2800) #define BCM_6338_ENET1_BASE (0xdeadbeef) #define BCM_6338_ENETDMA_BASE (0xfffe2400) +#define BCM_6338_ENETDMAC_BASE (0xfffe2500) +#define BCM_6338_ENETDMAS_BASE (0xfffe2600) +#define BCM_6338_ENETSW_BASE (0xdeadbeef) #define BCM_6338_EHCI0_BASE (0xdeadbeef) #define BCM_6338_SDRAM_BASE (0xfffe3100) #define BCM_6338_MEMC_BASE (0xdeadbeef) #define BCM_6338_DDR_BASE (0xdeadbeef) +#define BCM_6338_M2M_BASE (0xdeadbeef) +#define BCM_6338_ATM_BASE (0xdeadbeef) +#define BCM_6338_XTM_BASE (0xdeadbeef) +#define BCM_6338_XTMDMA_BASE (0xdeadbeef) +#define BCM_6338_XTMDMAC_BASE (0xdeadbeef) +#define BCM_6338_XTMDMAS_BASE (0xdeadbeef) +#define BCM_6338_PCM_BASE (0xdeadbeef) +#define BCM_6338_PCMDMA_BASE (0xdeadbeef) +#define BCM_6338_PCMDMAC_BASE (0xdeadbeef) +#define BCM_6338_PCMDMAS_BASE (0xdeadbeef) /* * 6345 register sets base address @@ -158,10 +193,14 @@ enum bcm63xx_regs_set { #define BCM_6345_UART1_BASE (0xdeadbeef) #define BCM_6345_GPIO_BASE (0xfffe0400) #define BCM_6345_SPI_BASE (0xdeadbeef) +#define BCM_6345_SPI2_BASE (0xdeadbeef) #define BCM_6345_UDC0_BASE (0xdeadbeef) #define BCM_6345_USBDMA_BASE (0xfffe2800) #define BCM_6345_ENET0_BASE (0xfffe1800) #define BCM_6345_ENETDMA_BASE (0xfffe2800) +#define BCM_6345_ENETDMAC_BASE (0xfffe2900) +#define BCM_6345_ENETDMAS_BASE (0xfffe2a00) +#define BCM_6345_ENETSW_BASE (0xdeadbeef) #define BCM_6345_PCMCIA_BASE (0xfffe2028) #define BCM_6345_MPI_BASE (0xdeadbeef) #define BCM_6345_OHCI0_BASE (0xfffe2100) @@ -176,6 +215,16 @@ enum bcm63xx_regs_set { #define BCM_6345_SDRAM_BASE (0xfffe2300) #define BCM_6345_MEMC_BASE (0xdeadbeef) #define BCM_6345_DDR_BASE (0xdeadbeef) +#define BCM_6345_M2M_BASE (0xdeadbeef) +#define BCM_6345_ATM_BASE (0xdeadbeef) +#define BCM_6345_XTM_BASE (0xdeadbeef) +#define BCM_6345_XTMDMA_BASE (0xdeadbeef) +#define BCM_6345_XTMDMAC_BASE (0xdeadbeef) +#define BCM_6345_XTMDMAS_BASE (0xdeadbeef) +#define BCM_6345_PCM_BASE (0xdeadbeef) +#define BCM_6345_PCMDMA_BASE (0xdeadbeef) +#define BCM_6345_PCMDMAC_BASE (0xdeadbeef) +#define BCM_6345_PCMDMAS_BASE (0xdeadbeef) /* * 6348 register sets base address @@ -188,6 +237,7 @@ enum bcm63xx_regs_set { #define BCM_6348_UART1_BASE (0xdeadbeef) #define BCM_6348_GPIO_BASE (0xfffe0400) #define BCM_6348_SPI_BASE (0xfffe0c00) +#define BCM_6348_SPI2_BASE (0xdeadbeef) #define BCM_6348_UDC0_BASE (0xfffe1000) #define BCM_6348_OHCI0_BASE (0xfffe1b00) #define BCM_6348_OHCI_PRIV_BASE (0xfffe1c00) @@ -195,14 +245,27 @@ enum bcm63xx_regs_set { #define BCM_6348_MPI_BASE (0xfffe2000) #define BCM_6348_PCMCIA_BASE (0xfffe2054) #define BCM_6348_SDRAM_REGS_BASE (0xfffe2300) +#define BCM_6348_M2M_BASE (0xfffe2800) #define BCM_6348_DSL_BASE (0xfffe3000) #define BCM_6348_ENET0_BASE (0xfffe6000) #define BCM_6348_ENET1_BASE (0xfffe6800) #define BCM_6348_ENETDMA_BASE (0xfffe7000) +#define BCM_6348_ENETDMAC_BASE (0xfffe7100) +#define BCM_6348_ENETDMAS_BASE (0xfffe7200) +#define BCM_6348_ENETSW_BASE (0xdeadbeef) #define BCM_6348_EHCI0_BASE (0xdeadbeef) #define BCM_6348_SDRAM_BASE (0xfffe2300) #define BCM_6348_MEMC_BASE (0xdeadbeef) #define BCM_6348_DDR_BASE (0xdeadbeef) +#define BCM_6348_ATM_BASE (0xfffe4000) +#define BCM_6348_XTM_BASE (0xdeadbeef) +#define BCM_6348_XTMDMA_BASE (0xdeadbeef) +#define BCM_6348_XTMDMAC_BASE (0xdeadbeef) +#define BCM_6348_XTMDMAS_BASE (0xdeadbeef) +#define BCM_6348_PCM_BASE (0xdeadbeef) +#define BCM_6348_PCMDMA_BASE (0xdeadbeef) +#define BCM_6348_PCMDMAC_BASE (0xdeadbeef) +#define BCM_6348_PCMDMAS_BASE (0xdeadbeef) /* * 6358 register sets base address @@ -215,6 +278,7 @@ enum bcm63xx_regs_set { #define BCM_6358_UART1_BASE (0xfffe0120) #define BCM_6358_GPIO_BASE (0xfffe0080) #define BCM_6358_SPI_BASE (0xdeadbeef) +#define BCM_6358_SPI2_BASE (0xfffe0800) #define BCM_6358_UDC0_BASE (0xfffe0800) #define BCM_6358_OHCI0_BASE (0xfffe1400) #define BCM_6358_OHCI_PRIV_BASE (0xdeadbeef) @@ -222,14 +286,28 @@ enum bcm63xx_regs_set { #define BCM_6358_MPI_BASE (0xfffe1000) #define BCM_6358_PCMCIA_BASE (0xfffe1054) #define BCM_6358_SDRAM_REGS_BASE (0xfffe2300) +#define BCM_6358_M2M_BASE (0xdeadbeef) #define BCM_6358_DSL_BASE (0xfffe3000) #define BCM_6358_ENET0_BASE (0xfffe4000) #define BCM_6358_ENET1_BASE (0xfffe4800) #define BCM_6358_ENETDMA_BASE (0xfffe5000) +#define BCM_6358_ENETDMAC_BASE (0xfffe5100) +#define BCM_6358_ENETDMAS_BASE (0xfffe5200) +#define BCM_6358_ENETSW_BASE (0xdeadbeef) #define BCM_6358_EHCI0_BASE (0xfffe1300) #define BCM_6358_SDRAM_BASE (0xdeadbeef) #define BCM_6358_MEMC_BASE (0xfffe1200) #define BCM_6358_DDR_BASE (0xfffe12a0) +#define BCM_6358_ATM_BASE (0xfffe2000) +#define BCM_6358_XTM_BASE (0xdeadbeef) +#define BCM_6358_XTMDMA_BASE (0xdeadbeef) +#define BCM_6358_XTMDMAC_BASE (0xdeadbeef) +#define BCM_6358_XTMDMAS_BASE (0xdeadbeef) +#define BCM_6358_PCM_BASE (0xfffe1600) +#define BCM_6358_PCMDMA_BASE (0xfffe1800) +#define BCM_6358_PCMDMAC_BASE (0xfffe1900) +#define BCM_6358_PCMDMAS_BASE (0xfffe1a00) + extern const unsigned long *bcm63xx_regs_base; @@ -248,6 +326,7 @@ extern const unsigned long *bcm63xx_regs_base; __GEN_RSET_BASE(__cpu, UART1) \ __GEN_RSET_BASE(__cpu, GPIO) \ __GEN_RSET_BASE(__cpu, SPI) \ + __GEN_RSET_BASE(__cpu, SPI2) \ __GEN_RSET_BASE(__cpu, UDC0) \ __GEN_RSET_BASE(__cpu, OHCI0) \ __GEN_RSET_BASE(__cpu, OHCI_PRIV) \ @@ -258,10 +337,23 @@ extern const unsigned long *bcm63xx_regs_base; __GEN_RSET_BASE(__cpu, ENET0) \ __GEN_RSET_BASE(__cpu, ENET1) \ __GEN_RSET_BASE(__cpu, ENETDMA) \ + __GEN_RSET_BASE(__cpu, ENETDMAC) \ + __GEN_RSET_BASE(__cpu, ENETDMAS) \ + __GEN_RSET_BASE(__cpu, ENETSW) \ __GEN_RSET_BASE(__cpu, EHCI0) \ __GEN_RSET_BASE(__cpu, SDRAM) \ __GEN_RSET_BASE(__cpu, MEMC) \ __GEN_RSET_BASE(__cpu, DDR) \ + __GEN_RSET_BASE(__cpu, M2M) \ + __GEN_RSET_BASE(__cpu, ATM) \ + __GEN_RSET_BASE(__cpu, XTM) \ + __GEN_RSET_BASE(__cpu, XTMDMA) \ + __GEN_RSET_BASE(__cpu, XTMDMAC) \ + __GEN_RSET_BASE(__cpu, XTMDMAS) \ + __GEN_RSET_BASE(__cpu, PCM) \ + __GEN_RSET_BASE(__cpu, PCMDMA) \ + __GEN_RSET_BASE(__cpu, PCMDMAC) \ + __GEN_RSET_BASE(__cpu, PCMDMAS) \ } #define __GEN_CPU_REGS_TABLE(__cpu) \ @@ -273,6 +365,7 @@ extern const unsigned long *bcm63xx_regs_base; [RSET_UART1] = BCM_## __cpu ##_UART1_BASE, \ [RSET_GPIO] = BCM_## __cpu ##_GPIO_BASE, \ [RSET_SPI] = BCM_## __cpu ##_SPI_BASE, \ + [RSET_SPI2] = BCM_## __cpu ##_SPI2_BASE, \ [RSET_UDC0] = BCM_## __cpu ##_UDC0_BASE, \ [RSET_OHCI0] = BCM_## __cpu ##_OHCI0_BASE, \ [RSET_OHCI_PRIV] = BCM_## __cpu ##_OHCI_PRIV_BASE, \ @@ -283,10 +376,23 @@ extern const unsigned long *bcm63xx_regs_base; [RSET_ENET0] = BCM_## __cpu ##_ENET0_BASE, \ [RSET_ENET1] = BCM_## __cpu ##_ENET1_BASE, \ [RSET_ENETDMA] = BCM_## __cpu ##_ENETDMA_BASE, \ + [RSET_ENETDMAC] = BCM_## __cpu ##_ENETDMAC_BASE, \ + [RSET_ENETDMAS] = BCM_## __cpu ##_ENETDMAS_BASE, \ + [RSET_ENETSW] = BCM_## __cpu ##_ENETSW_BASE, \ [RSET_EHCI0] = BCM_## __cpu ##_EHCI0_BASE, \ [RSET_SDRAM] = BCM_## __cpu ##_SDRAM_BASE, \ [RSET_MEMC] = BCM_## __cpu ##_MEMC_BASE, \ [RSET_DDR] = BCM_## __cpu ##_DDR_BASE, \ + [RSET_M2M] = BCM_## __cpu ##_M2M_BASE, \ + [RSET_ATM] = BCM_## __cpu ##_ATM_BASE, \ + [RSET_XTM] = BCM_## __cpu ##_XTM_BASE, \ + [RSET_XTMDMA] = BCM_## __cpu ##_XTMDMA_BASE, \ + [RSET_XTMDMAC] = BCM_## __cpu ##_XTMDMAC_BASE, \ + [RSET_XTMDMAS] = BCM_## __cpu ##_XTMDMAS_BASE, \ + [RSET_PCM] = BCM_## __cpu ##_PCM_BASE, \ + [RSET_PCMDMA] = BCM_## __cpu ##_PCMDMA_BASE, \ + [RSET_PCMDMAC] = BCM_## __cpu ##_PCMDMAC_BASE, \ + [RSET_PCMDMAS] = BCM_## __cpu ##_PCMDMAS_BASE, \ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set) @@ -330,6 +436,17 @@ enum bcm63xx_irq { IRQ_ENET1_TXDMA, IRQ_PCI, IRQ_PCMCIA, + IRQ_ATM, + IRQ_ENETSW_RXDMA0, + IRQ_ENETSW_RXDMA1, + IRQ_ENETSW_RXDMA2, + IRQ_ENETSW_RXDMA3, + IRQ_ENETSW_TXDMA0, + IRQ_ENETSW_TXDMA1, + IRQ_ENETSW_TXDMA2, + IRQ_ENETSW_TXDMA3, + IRQ_XTM, + IRQ_XTM_DMA0, }; /* @@ -350,6 +467,17 @@ enum bcm63xx_irq { #define BCM_6338_ENET1_TXDMA_IRQ 0 #define BCM_6338_PCI_IRQ 0 #define BCM_6338_PCMCIA_IRQ 0 +#define BCM_6338_ATM_IRQ 0 +#define BCM_6338_ENETSW_RXDMA0_IRQ 0 +#define BCM_6338_ENETSW_RXDMA1_IRQ 0 +#define BCM_6338_ENETSW_RXDMA2_IRQ 0 +#define BCM_6338_ENETSW_RXDMA3_IRQ 0 +#define BCM_6338_ENETSW_TXDMA0_IRQ 0 +#define BCM_6338_ENETSW_TXDMA1_IRQ 0 +#define BCM_6338_ENETSW_TXDMA2_IRQ 0 +#define BCM_6338_ENETSW_TXDMA3_IRQ 0 +#define BCM_6338_XTM_IRQ 0 +#define BCM_6338_XTM_DMA0_IRQ 0 /* * 6345 irqs @@ -369,6 +497,17 @@ enum bcm63xx_irq { #define BCM_6345_ENET1_TXDMA_IRQ 0 #define BCM_6345_PCI_IRQ 0 #define BCM_6345_PCMCIA_IRQ 0 +#define BCM_6345_ATM_IRQ 0 +#define BCM_6345_ENETSW_RXDMA0_IRQ 0 +#define BCM_6345_ENETSW_RXDMA1_IRQ 0 +#define BCM_6345_ENETSW_RXDMA2_IRQ 0 +#define BCM_6345_ENETSW_RXDMA3_IRQ 0 +#define BCM_6345_ENETSW_TXDMA0_IRQ 0 +#define BCM_6345_ENETSW_TXDMA1_IRQ 0 +#define BCM_6345_ENETSW_TXDMA2_IRQ 0 +#define BCM_6345_ENETSW_TXDMA3_IRQ 0 +#define BCM_6345_XTM_IRQ 0 +#define BCM_6345_XTM_DMA0_IRQ 0 /* * 6348 irqs @@ -388,6 +527,17 @@ enum bcm63xx_irq { #define BCM_6348_ENET1_TXDMA_IRQ (IRQ_INTERNAL_BASE + 23) #define BCM_6348_PCI_IRQ (IRQ_INTERNAL_BASE + 24) #define BCM_6348_PCMCIA_IRQ (IRQ_INTERNAL_BASE + 24) +#define BCM_6348_ATM_IRQ (IRQ_INTERNAL_BASE + 5) +#define BCM_6348_ENETSW_RXDMA0_IRQ 0 +#define BCM_6348_ENETSW_RXDMA1_IRQ 0 +#define BCM_6348_ENETSW_RXDMA2_IRQ 0 +#define BCM_6348_ENETSW_RXDMA3_IRQ 0 +#define BCM_6348_ENETSW_TXDMA0_IRQ 0 +#define BCM_6348_ENETSW_TXDMA1_IRQ 0 +#define BCM_6348_ENETSW_TXDMA2_IRQ 0 +#define BCM_6348_ENETSW_TXDMA3_IRQ 0 +#define BCM_6348_XTM_IRQ 0 +#define BCM_6348_XTM_DMA0_IRQ 0 /* * 6358 irqs @@ -407,6 +557,24 @@ enum bcm63xx_irq { #define BCM_6358_ENET1_TXDMA_IRQ (IRQ_INTERNAL_BASE + 18) #define BCM_6358_PCI_IRQ (IRQ_INTERNAL_BASE + 31) #define BCM_6358_PCMCIA_IRQ (IRQ_INTERNAL_BASE + 24) +#define BCM_6358_ATM_IRQ (IRQ_INTERNAL_BASE + 19) +#define BCM_6358_ENETSW_RXDMA0_IRQ 0 +#define BCM_6358_ENETSW_RXDMA1_IRQ 0 +#define BCM_6358_ENETSW_RXDMA2_IRQ 0 +#define BCM_6358_ENETSW_RXDMA3_IRQ 0 +#define BCM_6358_ENETSW_TXDMA0_IRQ 0 +#define BCM_6358_ENETSW_TXDMA1_IRQ 0 +#define BCM_6358_ENETSW_TXDMA2_IRQ 0 +#define BCM_6358_ENETSW_TXDMA3_IRQ 0 +#define BCM_6358_XTM_IRQ 0 +#define BCM_6358_XTM_DMA0_IRQ 0 + +#define BCM_6358_PCM_DMA0_IRQ (IRQ_INTERNAL_BASE + 23) +#define BCM_6358_PCM_DMA1_IRQ (IRQ_INTERNAL_BASE + 24) +#define BCM_6358_EXT_IRQ0 (IRQ_INTERNAL_BASE + 25) +#define BCM_6358_EXT_IRQ1 (IRQ_INTERNAL_BASE + 26) +#define BCM_6358_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27) +#define BCM_6358_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28) extern const int *bcm63xx_irqs; @@ -426,6 +594,17 @@ extern const int *bcm63xx_irqs; [IRQ_ENET1_TXDMA] = BCM_## __cpu ##_ENET1_TXDMA_IRQ, \ [IRQ_PCI] = BCM_## __cpu ##_PCI_IRQ, \ [IRQ_PCMCIA] = BCM_## __cpu ##_PCMCIA_IRQ, \ + [IRQ_ATM] = BCM_## __cpu ##_ATM_IRQ, \ + [IRQ_ENETSW_RXDMA0] = BCM_## __cpu ##_ENETSW_RXDMA0_IRQ, \ + [IRQ_ENETSW_RXDMA1] = BCM_## __cpu ##_ENETSW_RXDMA1_IRQ, \ + [IRQ_ENETSW_RXDMA2] = BCM_## __cpu ##_ENETSW_RXDMA2_IRQ, \ + [IRQ_ENETSW_RXDMA3] = BCM_## __cpu ##_ENETSW_RXDMA3_IRQ, \ + [IRQ_ENETSW_TXDMA0] = BCM_## __cpu ##_ENETSW_TXDMA0_IRQ, \ + [IRQ_ENETSW_TXDMA1] = BCM_## __cpu ##_ENETSW_TXDMA1_IRQ, \ + [IRQ_ENETSW_TXDMA2] = BCM_## __cpu ##_ENETSW_TXDMA2_IRQ, \ + [IRQ_ENETSW_TXDMA3] = BCM_## __cpu ##_ENETSW_TXDMA3_IRQ, \ + [IRQ_XTM] = BCM_## __cpu ##_XTM_IRQ, \ + [IRQ_XTM_DMA0] = BCM_## __cpu ##_XTM_DMA0_IRQ, \ static inline int bcm63xx_get_irq_number(enum bcm63xx_irq irq) { @@ -437,4 +616,8 @@ static inline int bcm63xx_get_irq_number(enum bcm63xx_irq irq) */ unsigned int bcm63xx_get_memory_size(void); +void bcm63xx_machine_halt(void); + +void bcm63xx_machine_reboot(void); + #endif /* !BCM63XX_CPU_H_ */ diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h index 0ed5230..3ea2681 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h @@ -548,6 +548,56 @@ /************************************************************************* + * _REG relative to RSET_ENETDMAC + *************************************************************************/ + +/* Channel Configuration register */ +#define ENETDMAC_CHANCFG_REG(x) ((x) * 0x10) +#define ENETDMAC_CHANCFG_EN_SHIFT 0 +#define ENETDMAC_CHANCFG_EN_MASK (1 << ENETDMA_CHANCFG_EN_SHIFT) +#define ENETDMAC_CHANCFG_PKTHALT_SHIFT 1 +#define ENETDMAC_CHANCFG_PKTHALT_MASK (1 << ENETDMA_CHANCFG_PKTHALT_SHIFT) + +/* Interrupt Control/Status register */ +#define ENETDMAC_IR_REG(x) (0x4 + (x) * 0x10) +#define ENETDMAC_IR_BUFDONE_MASK (1 << 0) +#define ENETDMAC_IR_PKTDONE_MASK (1 << 1) +#define ENETDMAC_IR_NOTOWNER_MASK (1 << 2) + +/* Interrupt Mask register */ +#define ENETDMAC_IRMASK_REG(x) (0x8 + (x) * 0x10) + +/* Maximum Burst Length */ +#define ENETDMAC_MAXBURST_REG(x) (0xc + (x) * 0x10) + + +/************************************************************************* + * _REG relative to RSET_ENETDMAS + *************************************************************************/ + +/* Ring Start Address register */ +#define ENETDMAS_RSTART_REG(x) ((x) * 0x10) + +/* State Ram Word 2 */ +#define ENETDMAS_SRAM2_REG(x) (0x4 + (x) * 0x10) + +/* State Ram Word 3 */ +#define ENETDMAS_SRAM3_REG(x) (0x8 + (x) * 0x10) + +/* State Ram Word 4 */ +#define ENETDMAS_SRAM4_REG(x) (0xc + (x) * 0x10) + + +/************************************************************************* + * _REG relative to RSET_ENETSW + *************************************************************************/ + +/* MIB register */ +#define ENETSW_MIB_REG(x) (0x2800 + (x) * 4) +#define ENETSW_MIB_REG_COUNT 47 + + +/************************************************************************* * _REG relative to RSET_OHCI_PRIV *************************************************************************/ @@ -768,4 +818,32 @@ #define DMIPSPLLCFG_N2_SHIFT 29 #define DMIPSPLLCFG_N2_MASK (0x7 << DMIPSPLLCFG_N2_SHIFT) +/************************************************************************* + * _REG relative to RSET_M2M + *************************************************************************/ + +#define M2M_RX 0 +#define M2M_TX 1 + +#define M2M_SRC_REG(x) ((x) * 0x40 + 0x00) +#define M2M_DST_REG(x) ((x) * 0x40 + 0x04) +#define M2M_SIZE_REG(x) ((x) * 0x40 + 0x08) + +#define M2M_CTRL_REG(x) ((x) * 0x40 + 0x0c) +#define M2M_CTRL_ENABLE_MASK (1 << 0) +#define M2M_CTRL_IRQEN_MASK (1 << 1) +#define M2M_CTRL_ERROR_CLR_MASK (1 << 6) +#define M2M_CTRL_DONE_CLR_MASK (1 << 7) +#define M2M_CTRL_NOINC_MASK (1 << 8) +#define M2M_CTRL_PCMCIASWAP_MASK (1 << 9) +#define M2M_CTRL_SWAPBYTE_MASK (1 << 10) +#define M2M_CTRL_ENDIAN_MASK (1 << 11) + +#define M2M_STAT_REG(x) ((x) * 0x40 + 0x10) +#define M2M_STAT_DONE (1 << 0) +#define M2M_STAT_ERROR (1 << 1) + +#define M2M_SRCID_REG(x) ((x) * 0x40 + 0x14) +#define M2M_DSTID_REG(x) ((x) * 0x40 + 0x18) + #endif /* BCM63XX_REGS_H_ */ -- 1.7.1.1 From mbizon@freebox.fr Fri Jun 10 23:47:43 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 23:50:03 +0200 (CEST) Received: from smtp4-g21.free.fr ([212.27.42.4]:52681 "EHLO smtp4-g21.free.fr" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491140Ab1FJVrn (ORCPT ); Fri, 10 Jun 2011 23:47:43 +0200 Received: from bobafett.staff.proxad.net (unknown [213.228.1.121]) by smtp4-g21.free.fr (Postfix) with ESMTP id 7AEF34C816A; Fri, 10 Jun 2011 23:47:38 +0200 (CEST) Received: from sakura.staff.proxad.net (unknown [172.18.3.156]) by bobafett.staff.proxad.net (Postfix) with ESMTP id D919A180663; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) Received: by sakura.staff.proxad.net (Postfix, from userid 1000) id CBAC655B091; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) From: Maxime Bizon To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org, florian@openwrt.org, Maxime Bizon Subject: [PATCH 07/11] MIPS: BCM63XX: change irq code to prepare for per-cpu peculiarity. Date: Fri, 10 Jun 2011 23:47:17 +0200 Message-Id: <1307742441-28284-8-git-send-email-mbizon@freebox.fr> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> References: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> X-archive-position: 30331 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mbizon@freebox.fr Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9577 Content-Length: 5156 Lines: 178 No functionnal change is introduced by this patch. Signed-off-by: Maxime Bizon --- arch/mips/bcm63xx/irq.c | 86 ++++++++++++++++++-- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 9 ++ 2 files changed, 86 insertions(+), 9 deletions(-) diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c index cea6021..d002831 100644 --- a/arch/mips/bcm63xx/irq.c +++ b/arch/mips/bcm63xx/irq.c @@ -19,19 +19,86 @@ #include #include +static void __dispatch_internal(void) __maybe_unused; + +#ifndef BCMCPU_RUNTIME_DETECT +#ifdef CONFIG_BCM63XX_CPU_6338 +#define irq_stat_reg PERF_IRQSTAT_6338_REG +#define irq_mask_reg PERF_IRQMASK_6338_REG +#endif +#ifdef CONFIG_BCM63XX_CPU_6345 +#define irq_stat_reg PERF_IRQSTAT_6345_REG +#define irq_mask_reg PERF_IRQMASK_6345_REG +#endif +#ifdef CONFIG_BCM63XX_CPU_6348 +#define irq_stat_reg PERF_IRQSTAT_6348_REG +#define irq_mask_reg PERF_IRQMASK_6348_REG +#endif +#ifdef CONFIG_BCM63XX_CPU_6358 +#define irq_stat_reg PERF_IRQSTAT_6358_REG +#define irq_mask_reg PERF_IRQMASK_6358_REG +#endif + +#define dispatch_internal __dispatch_internal + +#define irq_stat_addr (bcm63xx_regset_address(RSET_PERF) + irq_stat_reg) +#define irq_mask_addr (bcm63xx_regset_address(RSET_PERF) + irq_mask_reg) + +static inline void bcm63xx_init_irq(void) +{ +} +#else /* ! BCMCPU_RUNTIME_DETECT */ + +static u32 irq_stat_addr, irq_mask_addr; +static void (*dispatch_internal)(void); + +static void bcm63xx_init_irq(void) +{ + irq_stat_addr = bcm63xx_regset_address(RSET_PERF); + irq_mask_addr = bcm63xx_regset_address(RSET_PERF); + + switch (bcm63xx_get_cpu_id()) { + case BCM6338_CPU_ID: + irq_stat_addr += PERF_IRQSTAT_6338_REG; + irq_mask_addr += PERF_IRQMASK_6338_REG; + break; + case BCM6345_CPU_ID: + irq_stat_addr += PERF_IRQSTAT_6345_REG; + irq_mask_addr += PERF_IRQMASK_6345_REG; + break; + case BCM6348_CPU_ID: + irq_stat_addr += PERF_IRQSTAT_6348_REG; + irq_mask_addr += PERF_IRQMASK_6348_REG; + break; + case BCM6358_CPU_ID: + irq_stat_addr += PERF_IRQSTAT_6358_REG; + irq_mask_addr += PERF_IRQMASK_6358_REG; + break; + default: + BUG(); + } + + dispatch_internal = __dispatch_internal; +} +#endif /* ! BCMCPU_RUNTIME_DETECT */ + +static inline void handle_internal(int intbit) +{ + do_IRQ(intbit + IRQ_INTERNAL_BASE); +} + /* * dispatch internal devices IRQ (uart, enet, watchdog, ...). do not * prioritize any interrupt relatively to another. the static counter * will resume the loop where it ended the last time we left this * function. */ -static void bcm63xx_irq_dispatch_internal(void) +static void __dispatch_internal(void) { u32 pending; static int i; - pending = bcm_perf_readl(PERF_IRQMASK_REG) & - bcm_perf_readl(PERF_IRQSTAT_REG); + pending = bcm_readl(irq_stat_addr) & bcm_readl(irq_mask_addr); if (!pending) return ; @@ -41,7 +108,7 @@ static void bcm63xx_irq_dispatch_internal(void) i = (i + 1) & 0x1f; if (pending & (1 << to_call)) { - do_IRQ(to_call + IRQ_INTERNAL_BASE); + handle_internal(to_call); break; } } @@ -60,7 +127,7 @@ asmlinkage void plat_irq_dispatch(void) if (cause & CAUSEF_IP7) do_IRQ(7); if (cause & CAUSEF_IP2) - bcm63xx_irq_dispatch_internal(); + dispatch_internal(); if (cause & CAUSEF_IP3) do_IRQ(IRQ_EXT_0); if (cause & CAUSEF_IP4) @@ -81,9 +148,9 @@ static inline void bcm63xx_internal_irq_mask(struct irq_data *d) unsigned int irq = d->irq - IRQ_INTERNAL_BASE; u32 mask; - mask = bcm_perf_readl(PERF_IRQMASK_REG); + mask = bcm_readl(irq_mask_addr); mask &= ~(1 << irq); - bcm_perf_writel(mask, PERF_IRQMASK_REG); + bcm_writel(mask, irq_mask_addr); } static void bcm63xx_internal_irq_unmask(struct irq_data *d) @@ -91,9 +158,9 @@ static void bcm63xx_internal_irq_unmask(struct irq_data *d) unsigned int irq = d->irq - IRQ_INTERNAL_BASE; u32 mask; - mask = bcm_perf_readl(PERF_IRQMASK_REG); + mask = bcm_readl(irq_mask_addr); mask |= (1 << irq); - bcm_perf_writel(mask, PERF_IRQMASK_REG); + bcm_writel(mask, irq_mask_addr); } /* @@ -228,6 +295,7 @@ void __init arch_init_irq(void) { int i; + bcm63xx_init_irq(); mips_cpu_irq_init(); for (i = IRQ_INTERNAL_BASE; i < NR_IRQS; ++i) irq_set_chip_and_handler(i, &bcm63xx_internal_irq_chip, diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h index 3ea2681..4354be1 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h @@ -89,9 +89,18 @@ /* Interrupt Mask register */ #define PERF_IRQMASK_REG 0xc +#define PERF_IRQSTAT_REG 0x10 +#define PERF_IRQMASK_6338_REG 0xc +#define PERF_IRQMASK_6345_REG 0xc +#define PERF_IRQMASK_6348_REG 0xc +#define PERF_IRQMASK_6358_REG 0xc /* Interrupt Status register */ #define PERF_IRQSTAT_REG 0x10 +#define PERF_IRQSTAT_6338_REG 0x10 +#define PERF_IRQSTAT_6345_REG 0x10 +#define PERF_IRQSTAT_6348_REG 0x10 +#define PERF_IRQSTAT_6358_REG 0x10 /* External Interrupt Configuration register */ #define PERF_EXTIRQ_CFG_REG 0x14 -- 1.7.1.1 From mbizon@freebox.fr Fri Jun 10 23:47:43 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 23:50:26 +0200 (CEST) Received: from smtp4-g21.free.fr ([212.27.42.4]:52687 "EHLO smtp4-g21.free.fr" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491143Ab1FJVrn (ORCPT ); Fri, 10 Jun 2011 23:47:43 +0200 Received: from bobafett.staff.proxad.net (unknown [213.228.1.121]) by smtp4-g21.free.fr (Postfix) with ESMTP id 9D55D4C816E; Fri, 10 Jun 2011 23:47:38 +0200 (CEST) Received: from sakura.staff.proxad.net (unknown [172.18.3.156]) by bobafett.staff.proxad.net (Postfix) with ESMTP id E76F8180665; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) Received: by sakura.staff.proxad.net (Postfix, from userid 1000) id D7A7655B08D; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) From: Maxime Bizon To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org, florian@openwrt.org, Maxime Bizon Subject: [PATCH 09/11] MIPS: BCM63XX: handle 64 bits irq stat register in irq code. Date: Fri, 10 Jun 2011 23:47:19 +0200 Message-Id: <1307742441-28284-10-git-send-email-mbizon@freebox.fr> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> References: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> X-archive-position: 30332 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mbizon@freebox.fr Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9578 Content-Length: 5924 Lines: 198 bcm6368 has larger irq registers, prepare for this. Signed-off-by: Maxime Bizon --- arch/mips/bcm63xx/irq.c | 82 +++++++++++++++++++++++++++++++++++++++++++--- 1 files changed, 76 insertions(+), 6 deletions(-) diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c index 2e4f317..07909a9 100644 --- a/arch/mips/bcm63xx/irq.c +++ b/arch/mips/bcm63xx/irq.c @@ -20,11 +20,17 @@ #include static void __dispatch_internal(void) __maybe_unused; +static void __dispatch_internal_64(void) __maybe_unused; +static void __internal_irq_mask_32(unsigned int irq) __maybe_unused; +static void __internal_irq_mask_64(unsigned int irq) __maybe_unused; +static void __internal_irq_unmask_32(unsigned int irq) __maybe_unused; +static void __internal_irq_unmask_64(unsigned int irq) __maybe_unused; #ifndef BCMCPU_RUNTIME_DETECT #ifdef CONFIG_BCM63XX_CPU_6338 #define irq_stat_reg PERF_IRQSTAT_6338_REG #define irq_mask_reg PERF_IRQMASK_6338_REG +#define irq_bits 32 #define is_ext_irq_cascaded 0 #define ext_irq_start 0 #define ext_irq_end 0 @@ -32,6 +38,7 @@ static void __dispatch_internal(void) __maybe_unused; #ifdef CONFIG_BCM63XX_CPU_6345 #define irq_stat_reg PERF_IRQSTAT_6345_REG #define irq_mask_reg PERF_IRQMASK_6345_REG +#define irq_bits 32 #define is_ext_irq_cascaded 0 #define ext_irq_start 0 #define ext_irq_end 0 @@ -39,7 +46,7 @@ static void __dispatch_internal(void) __maybe_unused; #ifdef CONFIG_BCM63XX_CPU_6348 #define irq_stat_reg PERF_IRQSTAT_6348_REG #define irq_mask_reg PERF_IRQMASK_6348_REG -#define dispatch_internal __dispatch_internal +#define irq_bits 32 #define is_ext_irq_cascaded 0 #define ext_irq_start 0 #define ext_irq_end 0 @@ -47,13 +54,21 @@ static void __dispatch_internal(void) __maybe_unused; #ifdef CONFIG_BCM63XX_CPU_6358 #define irq_stat_reg PERF_IRQSTAT_6358_REG #define irq_mask_reg PERF_IRQMASK_6358_REG -#define dispatch_internal __dispatch_internal +#define irq_bits 32 #define is_ext_irq_cascaded 1 #define ext_irq_start (BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE) #define ext_irq_end (BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE) #endif -#define dispatch_internal __dispatch_internal +#if irq_bits == 32 +#define dispatch_internal __dispatch_internal +#define internal_irq_mask __internal_irq_mask_32 +#define internal_irq_unmask __internal_irq_unmask_32 +#else +#define dispatch_internal __dispatch_internal_64 +#define internal_irq_mask __internal_irq_mask_64 +#define internal_irq_unmask __internal_irq_unmask_64 +#endif #define irq_stat_addr (bcm63xx_regset_address(RSET_PERF) + irq_stat_reg) #define irq_mask_addr (bcm63xx_regset_address(RSET_PERF) + irq_mask_reg) @@ -67,9 +82,13 @@ static u32 irq_stat_addr, irq_mask_addr; static void (*dispatch_internal)(void); static int is_ext_irq_cascaded; static unsigned int ext_irq_start, ext_irq_end; +static void (*internal_irq_mask)(unsigned int irq); +static void (*internal_irq_unmask)(unsigned int irq); static void bcm63xx_init_irq(void) { + int irq_bits; + irq_stat_addr = bcm63xx_regset_address(RSET_PERF); irq_mask_addr = bcm63xx_regset_address(RSET_PERF); @@ -77,18 +96,22 @@ static void bcm63xx_init_irq(void) case BCM6338_CPU_ID: irq_stat_addr += PERF_IRQSTAT_6338_REG; irq_mask_addr += PERF_IRQMASK_6338_REG; + irq_bits = 32; break; case BCM6345_CPU_ID: irq_stat_addr += PERF_IRQSTAT_6345_REG; irq_mask_addr += PERF_IRQMASK_6345_REG; + irq_bits = 32; break; case BCM6348_CPU_ID: irq_stat_addr += PERF_IRQSTAT_6348_REG; irq_mask_addr += PERF_IRQMASK_6348_REG; + irq_bits = 32; break; case BCM6358_CPU_ID: irq_stat_addr += PERF_IRQSTAT_6358_REG; irq_mask_addr += PERF_IRQMASK_6358_REG; + irq_bits = 32; is_ext_irq_cascaded = 1; ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE; ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE; @@ -97,7 +120,15 @@ static void bcm63xx_init_irq(void) BUG(); } - dispatch_internal = __dispatch_internal; + if (irq_bits == 32) { + dispatch_internal = __dispatch_internal; + internal_irq_mask = __internal_irq_mask_32; + internal_irq_unmask = __internal_irq_unmask_32; + } else { + dispatch_internal = __dispatch_internal_64; + internal_irq_mask = __internal_irq_mask_64; + internal_irq_unmask = __internal_irq_unmask_64; + } } #endif /* ! BCMCPU_RUNTIME_DETECT */ @@ -137,6 +168,27 @@ static void __dispatch_internal(void) } } +static void __dispatch_internal_64(void) +{ + u64 pending; + static int i; + + pending = bcm_readll(irq_stat_addr) & bcm_readll(irq_mask_addr); + + if (!pending) + return ; + + while (1) { + int to_call = i; + + i = (i + 1) & 0x3f; + if (pending & (1ull << to_call)) { + handle_internal(to_call); + break; + } + } +} + asmlinkage void plat_irq_dispatch(void) { u32 cause; @@ -168,7 +220,7 @@ asmlinkage void plat_irq_dispatch(void) * internal IRQs operations: only mask/unmask on PERF irq mask * register. */ -static void internal_irq_mask(unsigned int irq) +static void __internal_irq_mask_32(unsigned int irq) { u32 mask; @@ -177,7 +229,16 @@ static void internal_irq_mask(unsigned int irq) bcm_writel(mask, irq_mask_addr); } -static void internal_irq_unmask(unsigned int irq) +static void __internal_irq_mask_64(unsigned int irq) +{ + u64 mask; + + mask = bcm_readll(irq_mask_addr); + mask &= ~(1ull << irq); + bcm_writell(mask, irq_mask_addr); +} + +static void __internal_irq_unmask_32(unsigned int irq) { u32 mask; @@ -186,6 +247,15 @@ static void internal_irq_unmask(unsigned int irq) bcm_writel(mask, irq_mask_addr); } +static void __internal_irq_unmask_64(unsigned int irq) +{ + u64 mask; + + mask = bcm_readll(irq_mask_addr); + mask |= (1ull << irq); + bcm_writell(mask, irq_mask_addr); +} + static void bcm63xx_internal_irq_mask(struct irq_data *d) { internal_irq_mask(d->irq - IRQ_INTERNAL_BASE); -- 1.7.1.1 From mbizon@freebox.fr Fri Jun 10 23:47:43 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 23:50:48 +0200 (CEST) Received: from smtp4-g21.free.fr ([212.27.42.4]:52688 "EHLO smtp4-g21.free.fr" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491145Ab1FJVrn (ORCPT ); Fri, 10 Jun 2011 23:47:43 +0200 Received: from bobafett.staff.proxad.net (unknown [213.228.1.121]) by smtp4-g21.free.fr (Postfix) with ESMTP id 9AB274C80DE; Fri, 10 Jun 2011 23:47:38 +0200 (CEST) Received: from sakura.staff.proxad.net (unknown [172.18.3.156]) by bobafett.staff.proxad.net (Postfix) with ESMTP id BED7018065D; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) Received: by sakura.staff.proxad.net (Postfix, from userid 1000) id A8F8755B08E; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) From: Maxime Bizon To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org, florian@openwrt.org, Maxime Bizon Subject: [PATCH 05/11] MIPS: BCM63XX: cleanup cpu registers. Date: Fri, 10 Jun 2011 23:47:15 +0200 Message-Id: <1307742441-28284-6-git-send-email-mbizon@freebox.fr> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> References: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> X-archive-position: 30333 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mbizon@freebox.fr Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9580 Content-Length: 19468 Lines: 588 Use preprocessor when possible to avoid duplicated and error-prone code. Signed-off-by: Maxime Bizon --- arch/mips/bcm63xx/cpu.c | 145 +---------- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 311 +++++++--------------- 2 files changed, 109 insertions(+), 347 deletions(-) diff --git a/arch/mips/bcm63xx/cpu.c b/arch/mips/bcm63xx/cpu.c index 7c7e4d4..027ac30 100644 --- a/arch/mips/bcm63xx/cpu.c +++ b/arch/mips/bcm63xx/cpu.c @@ -33,162 +33,37 @@ static unsigned int bcm63xx_memory_size; * 6338 register sets and irqs */ static const unsigned long bcm96338_regs_base[] = { - [RSET_DSL_LMEM] = BCM_6338_DSL_LMEM_BASE, - [RSET_PERF] = BCM_6338_PERF_BASE, - [RSET_TIMER] = BCM_6338_TIMER_BASE, - [RSET_WDT] = BCM_6338_WDT_BASE, - [RSET_UART0] = BCM_6338_UART0_BASE, - [RSET_UART1] = BCM_6338_UART1_BASE, - [RSET_GPIO] = BCM_6338_GPIO_BASE, - [RSET_SPI] = BCM_6338_SPI_BASE, - [RSET_OHCI0] = BCM_6338_OHCI0_BASE, - [RSET_OHCI_PRIV] = BCM_6338_OHCI_PRIV_BASE, - [RSET_USBH_PRIV] = BCM_6338_USBH_PRIV_BASE, - [RSET_UDC0] = BCM_6338_UDC0_BASE, - [RSET_MPI] = BCM_6338_MPI_BASE, - [RSET_PCMCIA] = BCM_6338_PCMCIA_BASE, - [RSET_SDRAM] = BCM_6338_SDRAM_BASE, - [RSET_DSL] = BCM_6338_DSL_BASE, - [RSET_ENET0] = BCM_6338_ENET0_BASE, - [RSET_ENET1] = BCM_6338_ENET1_BASE, - [RSET_ENETDMA] = BCM_6338_ENETDMA_BASE, - [RSET_MEMC] = BCM_6338_MEMC_BASE, - [RSET_DDR] = BCM_6338_DDR_BASE, + __GEN_CPU_REGS_TABLE(6338) }; static const int bcm96338_irqs[] = { - [IRQ_TIMER] = BCM_6338_TIMER_IRQ, - [IRQ_UART0] = BCM_6338_UART0_IRQ, - [IRQ_DSL] = BCM_6338_DSL_IRQ, - [IRQ_ENET0] = BCM_6338_ENET0_IRQ, - [IRQ_ENET_PHY] = BCM_6338_ENET_PHY_IRQ, - [IRQ_ENET0_RXDMA] = BCM_6338_ENET0_RXDMA_IRQ, - [IRQ_ENET0_TXDMA] = BCM_6338_ENET0_TXDMA_IRQ, + __GEN_CPU_IRQ_TABLE(6338) }; -/* - * 6345 register sets and irqs - */ static const unsigned long bcm96345_regs_base[] = { - [RSET_DSL_LMEM] = BCM_6345_DSL_LMEM_BASE, - [RSET_PERF] = BCM_6345_PERF_BASE, - [RSET_TIMER] = BCM_6345_TIMER_BASE, - [RSET_WDT] = BCM_6345_WDT_BASE, - [RSET_UART0] = BCM_6345_UART0_BASE, - [RSET_UART1] = BCM_6345_UART1_BASE, - [RSET_GPIO] = BCM_6345_GPIO_BASE, - [RSET_SPI] = BCM_6345_SPI_BASE, - [RSET_UDC0] = BCM_6345_UDC0_BASE, - [RSET_OHCI0] = BCM_6345_OHCI0_BASE, - [RSET_OHCI_PRIV] = BCM_6345_OHCI_PRIV_BASE, - [RSET_USBH_PRIV] = BCM_6345_USBH_PRIV_BASE, - [RSET_MPI] = BCM_6345_MPI_BASE, - [RSET_PCMCIA] = BCM_6345_PCMCIA_BASE, - [RSET_DSL] = BCM_6345_DSL_BASE, - [RSET_ENET0] = BCM_6345_ENET0_BASE, - [RSET_ENET1] = BCM_6345_ENET1_BASE, - [RSET_ENETDMA] = BCM_6345_ENETDMA_BASE, - [RSET_EHCI0] = BCM_6345_EHCI0_BASE, - [RSET_SDRAM] = BCM_6345_SDRAM_BASE, - [RSET_MEMC] = BCM_6345_MEMC_BASE, - [RSET_DDR] = BCM_6345_DDR_BASE, + __GEN_CPU_REGS_TABLE(6345) }; static const int bcm96345_irqs[] = { - [IRQ_TIMER] = BCM_6345_TIMER_IRQ, - [IRQ_UART0] = BCM_6345_UART0_IRQ, - [IRQ_DSL] = BCM_6345_DSL_IRQ, - [IRQ_ENET0] = BCM_6345_ENET0_IRQ, - [IRQ_ENET_PHY] = BCM_6345_ENET_PHY_IRQ, - [IRQ_ENET0_RXDMA] = BCM_6345_ENET0_RXDMA_IRQ, - [IRQ_ENET0_TXDMA] = BCM_6345_ENET0_TXDMA_IRQ, + __GEN_CPU_IRQ_TABLE(6345) }; -/* - * 6348 register sets and irqs - */ static const unsigned long bcm96348_regs_base[] = { - [RSET_DSL_LMEM] = BCM_6348_DSL_LMEM_BASE, - [RSET_PERF] = BCM_6348_PERF_BASE, - [RSET_TIMER] = BCM_6348_TIMER_BASE, - [RSET_WDT] = BCM_6348_WDT_BASE, - [RSET_UART0] = BCM_6348_UART0_BASE, - [RSET_UART1] = BCM_6348_UART1_BASE, - [RSET_GPIO] = BCM_6348_GPIO_BASE, - [RSET_SPI] = BCM_6348_SPI_BASE, - [RSET_OHCI0] = BCM_6348_OHCI0_BASE, - [RSET_OHCI_PRIV] = BCM_6348_OHCI_PRIV_BASE, - [RSET_USBH_PRIV] = BCM_6348_USBH_PRIV_BASE, - [RSET_MPI] = BCM_6348_MPI_BASE, - [RSET_PCMCIA] = BCM_6348_PCMCIA_BASE, - [RSET_SDRAM] = BCM_6348_SDRAM_BASE, - [RSET_DSL] = BCM_6348_DSL_BASE, - [RSET_ENET0] = BCM_6348_ENET0_BASE, - [RSET_ENET1] = BCM_6348_ENET1_BASE, - [RSET_ENETDMA] = BCM_6348_ENETDMA_BASE, - [RSET_MEMC] = BCM_6348_MEMC_BASE, - [RSET_DDR] = BCM_6348_DDR_BASE, + __GEN_CPU_REGS_TABLE(6348) }; static const int bcm96348_irqs[] = { - [IRQ_TIMER] = BCM_6348_TIMER_IRQ, - [IRQ_UART0] = BCM_6348_UART0_IRQ, - [IRQ_DSL] = BCM_6348_DSL_IRQ, - [IRQ_ENET0] = BCM_6348_ENET0_IRQ, - [IRQ_ENET1] = BCM_6348_ENET1_IRQ, - [IRQ_ENET_PHY] = BCM_6348_ENET_PHY_IRQ, - [IRQ_OHCI0] = BCM_6348_OHCI0_IRQ, - [IRQ_PCMCIA] = BCM_6348_PCMCIA_IRQ, - [IRQ_ENET0_RXDMA] = BCM_6348_ENET0_RXDMA_IRQ, - [IRQ_ENET0_TXDMA] = BCM_6348_ENET0_TXDMA_IRQ, - [IRQ_ENET1_RXDMA] = BCM_6348_ENET1_RXDMA_IRQ, - [IRQ_ENET1_TXDMA] = BCM_6348_ENET1_TXDMA_IRQ, - [IRQ_PCI] = BCM_6348_PCI_IRQ, + __GEN_CPU_IRQ_TABLE(6348) + }; -/* - * 6358 register sets and irqs - */ static const unsigned long bcm96358_regs_base[] = { - [RSET_DSL_LMEM] = BCM_6358_DSL_LMEM_BASE, - [RSET_PERF] = BCM_6358_PERF_BASE, - [RSET_TIMER] = BCM_6358_TIMER_BASE, - [RSET_WDT] = BCM_6358_WDT_BASE, - [RSET_UART0] = BCM_6358_UART0_BASE, - [RSET_UART1] = BCM_6358_UART1_BASE, - [RSET_GPIO] = BCM_6358_GPIO_BASE, - [RSET_SPI] = BCM_6358_SPI_BASE, - [RSET_OHCI0] = BCM_6358_OHCI0_BASE, - [RSET_EHCI0] = BCM_6358_EHCI0_BASE, - [RSET_OHCI_PRIV] = BCM_6358_OHCI_PRIV_BASE, - [RSET_USBH_PRIV] = BCM_6358_USBH_PRIV_BASE, - [RSET_MPI] = BCM_6358_MPI_BASE, - [RSET_PCMCIA] = BCM_6358_PCMCIA_BASE, - [RSET_SDRAM] = BCM_6358_SDRAM_BASE, - [RSET_DSL] = BCM_6358_DSL_BASE, - [RSET_ENET0] = BCM_6358_ENET0_BASE, - [RSET_ENET1] = BCM_6358_ENET1_BASE, - [RSET_ENETDMA] = BCM_6358_ENETDMA_BASE, - [RSET_MEMC] = BCM_6358_MEMC_BASE, - [RSET_DDR] = BCM_6358_DDR_BASE, + __GEN_CPU_REGS_TABLE(6358) }; static const int bcm96358_irqs[] = { - [IRQ_TIMER] = BCM_6358_TIMER_IRQ, - [IRQ_UART0] = BCM_6358_UART0_IRQ, - [IRQ_UART1] = BCM_6358_UART1_IRQ, - [IRQ_DSL] = BCM_6358_DSL_IRQ, - [IRQ_ENET0] = BCM_6358_ENET0_IRQ, - [IRQ_ENET1] = BCM_6358_ENET1_IRQ, - [IRQ_ENET_PHY] = BCM_6358_ENET_PHY_IRQ, - [IRQ_OHCI0] = BCM_6358_OHCI0_IRQ, - [IRQ_EHCI0] = BCM_6358_EHCI0_IRQ, - [IRQ_PCMCIA] = BCM_6358_PCMCIA_IRQ, - [IRQ_ENET0_RXDMA] = BCM_6358_ENET0_RXDMA_IRQ, - [IRQ_ENET0_TXDMA] = BCM_6358_ENET0_TXDMA_IRQ, - [IRQ_ENET1_RXDMA] = BCM_6358_ENET1_RXDMA_IRQ, - [IRQ_ENET1_TXDMA] = BCM_6358_ENET1_TXDMA_IRQ, - [IRQ_PCI] = BCM_6358_PCI_IRQ, + __GEN_CPU_IRQ_TABLE(6358) + }; u16 __bcm63xx_get_cpu_id(void) diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h index 96a2391..464f948 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h @@ -234,202 +234,77 @@ enum bcm63xx_regs_set { extern const unsigned long *bcm63xx_regs_base; +#define __GEN_RSET_BASE(__cpu, __rset) \ + case RSET_## __rset : \ + return BCM_## __cpu ##_## __rset ##_BASE; + +#define __GEN_RSET(__cpu) \ + switch (set) { \ + __GEN_RSET_BASE(__cpu, DSL_LMEM) \ + __GEN_RSET_BASE(__cpu, PERF) \ + __GEN_RSET_BASE(__cpu, TIMER) \ + __GEN_RSET_BASE(__cpu, WDT) \ + __GEN_RSET_BASE(__cpu, UART0) \ + __GEN_RSET_BASE(__cpu, UART1) \ + __GEN_RSET_BASE(__cpu, GPIO) \ + __GEN_RSET_BASE(__cpu, SPI) \ + __GEN_RSET_BASE(__cpu, UDC0) \ + __GEN_RSET_BASE(__cpu, OHCI0) \ + __GEN_RSET_BASE(__cpu, OHCI_PRIV) \ + __GEN_RSET_BASE(__cpu, USBH_PRIV) \ + __GEN_RSET_BASE(__cpu, MPI) \ + __GEN_RSET_BASE(__cpu, PCMCIA) \ + __GEN_RSET_BASE(__cpu, DSL) \ + __GEN_RSET_BASE(__cpu, ENET0) \ + __GEN_RSET_BASE(__cpu, ENET1) \ + __GEN_RSET_BASE(__cpu, ENETDMA) \ + __GEN_RSET_BASE(__cpu, EHCI0) \ + __GEN_RSET_BASE(__cpu, SDRAM) \ + __GEN_RSET_BASE(__cpu, MEMC) \ + __GEN_RSET_BASE(__cpu, DDR) \ + } + +#define __GEN_CPU_REGS_TABLE(__cpu) \ + [RSET_DSL_LMEM] = BCM_## __cpu ##_DSL_LMEM_BASE, \ + [RSET_PERF] = BCM_## __cpu ##_PERF_BASE, \ + [RSET_TIMER] = BCM_## __cpu ##_TIMER_BASE, \ + [RSET_WDT] = BCM_## __cpu ##_WDT_BASE, \ + [RSET_UART0] = BCM_## __cpu ##_UART0_BASE, \ + [RSET_UART1] = BCM_## __cpu ##_UART1_BASE, \ + [RSET_GPIO] = BCM_## __cpu ##_GPIO_BASE, \ + [RSET_SPI] = BCM_## __cpu ##_SPI_BASE, \ + [RSET_UDC0] = BCM_## __cpu ##_UDC0_BASE, \ + [RSET_OHCI0] = BCM_## __cpu ##_OHCI0_BASE, \ + [RSET_OHCI_PRIV] = BCM_## __cpu ##_OHCI_PRIV_BASE, \ + [RSET_USBH_PRIV] = BCM_## __cpu ##_USBH_PRIV_BASE, \ + [RSET_MPI] = BCM_## __cpu ##_MPI_BASE, \ + [RSET_PCMCIA] = BCM_## __cpu ##_PCMCIA_BASE, \ + [RSET_DSL] = BCM_## __cpu ##_DSL_BASE, \ + [RSET_ENET0] = BCM_## __cpu ##_ENET0_BASE, \ + [RSET_ENET1] = BCM_## __cpu ##_ENET1_BASE, \ + [RSET_ENETDMA] = BCM_## __cpu ##_ENETDMA_BASE, \ + [RSET_EHCI0] = BCM_## __cpu ##_EHCI0_BASE, \ + [RSET_SDRAM] = BCM_## __cpu ##_SDRAM_BASE, \ + [RSET_MEMC] = BCM_## __cpu ##_MEMC_BASE, \ + [RSET_DDR] = BCM_## __cpu ##_DDR_BASE, \ + + static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set) { #ifdef BCMCPU_RUNTIME_DETECT return bcm63xx_regs_base[set]; #else #ifdef CONFIG_BCM63XX_CPU_6338 - switch (set) { - case RSET_DSL_LMEM: - return BCM_6338_DSL_LMEM_BASE; - case RSET_PERF: - return BCM_6338_PERF_BASE; - case RSET_TIMER: - return BCM_6338_TIMER_BASE; - case RSET_WDT: - return BCM_6338_WDT_BASE; - case RSET_UART0: - return BCM_6338_UART0_BASE; - case RSET_UART1: - return BCM_6338_UART1_BASE; - case RSET_GPIO: - return BCM_6338_GPIO_BASE; - case RSET_SPI: - return BCM_6338_SPI_BASE; - case RSET_UDC0: - return BCM_6338_UDC0_BASE; - case RSET_OHCI0: - return BCM_6338_OHCI0_BASE; - case RSET_OHCI_PRIV: - return BCM_6338_OHCI_PRIV_BASE; - case RSET_USBH_PRIV: - return BCM_6338_USBH_PRIV_BASE; - case RSET_MPI: - return BCM_6338_MPI_BASE; - case RSET_PCMCIA: - return BCM_6338_PCMCIA_BASE; - case RSET_DSL: - return BCM_6338_DSL_BASE; - case RSET_ENET0: - return BCM_6338_ENET0_BASE; - case RSET_ENET1: - return BCM_6338_ENET1_BASE; - case RSET_ENETDMA: - return BCM_6338_ENETDMA_BASE; - case RSET_EHCI0: - return BCM_6338_EHCI0_BASE; - case RSET_SDRAM: - return BCM_6338_SDRAM_BASE; - case RSET_MEMC: - return BCM_6338_MEMC_BASE; - case RSET_DDR: - return BCM_6338_DDR_BASE; - } + __GEN_RSET(6338) #endif #ifdef CONFIG_BCM63XX_CPU_6345 - switch (set) { - case RSET_DSL_LMEM: - return BCM_6345_DSL_LMEM_BASE; - case RSET_PERF: - return BCM_6345_PERF_BASE; - case RSET_TIMER: - return BCM_6345_TIMER_BASE; - case RSET_WDT: - return BCM_6345_WDT_BASE; - case RSET_UART0: - return BCM_6345_UART0_BASE; - case RSET_UART1: - return BCM_6345_UART1_BASE; - case RSET_GPIO: - return BCM_6345_GPIO_BASE; - case RSET_SPI: - return BCM_6345_SPI_BASE; - case RSET_UDC0: - return BCM_6345_UDC0_BASE; - case RSET_OHCI0: - return BCM_6345_OHCI0_BASE; - case RSET_OHCI_PRIV: - return BCM_6345_OHCI_PRIV_BASE; - case RSET_USBH_PRIV: - return BCM_6345_USBH_PRIV_BASE; - case RSET_MPI: - return BCM_6345_MPI_BASE; - case RSET_PCMCIA: - return BCM_6345_PCMCIA_BASE; - case RSET_DSL: - return BCM_6345_DSL_BASE; - case RSET_ENET0: - return BCM_6345_ENET0_BASE; - case RSET_ENET1: - return BCM_6345_ENET1_BASE; - case RSET_ENETDMA: - return BCM_6345_ENETDMA_BASE; - case RSET_EHCI0: - return BCM_6345_EHCI0_BASE; - case RSET_SDRAM: - return BCM_6345_SDRAM_BASE; - case RSET_MEMC: - return BCM_6345_MEMC_BASE; - case RSET_DDR: - return BCM_6345_DDR_BASE; - } + __GEN_RSET(6345) #endif #ifdef CONFIG_BCM63XX_CPU_6348 - switch (set) { - case RSET_DSL_LMEM: - return BCM_6348_DSL_LMEM_BASE; - case RSET_PERF: - return BCM_6348_PERF_BASE; - case RSET_TIMER: - return BCM_6348_TIMER_BASE; - case RSET_WDT: - return BCM_6348_WDT_BASE; - case RSET_UART0: - return BCM_6348_UART0_BASE; - case RSET_UART1: - return BCM_6348_UART1_BASE; - case RSET_GPIO: - return BCM_6348_GPIO_BASE; - case RSET_SPI: - return BCM_6348_SPI_BASE; - case RSET_UDC0: - return BCM_6348_UDC0_BASE; - case RSET_OHCI0: - return BCM_6348_OHCI0_BASE; - case RSET_OHCI_PRIV: - return BCM_6348_OHCI_PRIV_BASE; - case RSET_USBH_PRIV: - return BCM_6348_USBH_PRIV_BASE; - case RSET_MPI: - return BCM_6348_MPI_BASE; - case RSET_PCMCIA: - return BCM_6348_PCMCIA_BASE; - case RSET_DSL: - return BCM_6348_DSL_BASE; - case RSET_ENET0: - return BCM_6348_ENET0_BASE; - case RSET_ENET1: - return BCM_6348_ENET1_BASE; - case RSET_ENETDMA: - return BCM_6348_ENETDMA_BASE; - case RSET_EHCI0: - return BCM_6348_EHCI0_BASE; - case RSET_SDRAM: - return BCM_6348_SDRAM_BASE; - case RSET_MEMC: - return BCM_6348_MEMC_BASE; - case RSET_DDR: - return BCM_6348_DDR_BASE; - } + __GEN_RSET(6348) #endif #ifdef CONFIG_BCM63XX_CPU_6358 - switch (set) { - case RSET_DSL_LMEM: - return BCM_6358_DSL_LMEM_BASE; - case RSET_PERF: - return BCM_6358_PERF_BASE; - case RSET_TIMER: - return BCM_6358_TIMER_BASE; - case RSET_WDT: - return BCM_6358_WDT_BASE; - case RSET_UART0: - return BCM_6358_UART0_BASE; - case RSET_UART1: - return BCM_6358_UART1_BASE; - case RSET_GPIO: - return BCM_6358_GPIO_BASE; - case RSET_SPI: - return BCM_6358_SPI_BASE; - case RSET_UDC0: - return BCM_6358_UDC0_BASE; - case RSET_OHCI0: - return BCM_6358_OHCI0_BASE; - case RSET_OHCI_PRIV: - return BCM_6358_OHCI_PRIV_BASE; - case RSET_USBH_PRIV: - return BCM_6358_USBH_PRIV_BASE; - case RSET_MPI: - return BCM_6358_MPI_BASE; - case RSET_PCMCIA: - return BCM_6358_PCMCIA_BASE; - case RSET_ENET0: - return BCM_6358_ENET0_BASE; - case RSET_ENET1: - return BCM_6358_ENET1_BASE; - case RSET_ENETDMA: - return BCM_6358_ENETDMA_BASE; - case RSET_DSL: - return BCM_6358_DSL_BASE; - case RSET_EHCI0: - return BCM_6358_EHCI0_BASE; - case RSET_SDRAM: - return BCM_6358_SDRAM_BASE; - case RSET_MEMC: - return BCM_6358_MEMC_BASE; - case RSET_DDR: - return BCM_6358_DDR_BASE; - } + __GEN_RSET(6358) #endif #endif /* unreached */ @@ -449,7 +324,6 @@ enum bcm63xx_irq { IRQ_ENET_PHY, IRQ_OHCI0, IRQ_EHCI0, - IRQ_PCMCIA0, IRQ_ENET0_RXDMA, IRQ_ENET0_TXDMA, IRQ_ENET1_RXDMA, @@ -462,62 +336,58 @@ enum bcm63xx_irq { * 6338 irqs */ #define BCM_6338_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) -#define BCM_6338_SPI_IRQ (IRQ_INTERNAL_BASE + 1) #define BCM_6338_UART0_IRQ (IRQ_INTERNAL_BASE + 2) -#define BCM_6338_DG_IRQ (IRQ_INTERNAL_BASE + 4) +#define BCM_6338_UART1_IRQ 0 #define BCM_6338_DSL_IRQ (IRQ_INTERNAL_BASE + 5) -#define BCM_6338_ATM_IRQ (IRQ_INTERNAL_BASE + 6) -#define BCM_6338_UDC0_IRQ (IRQ_INTERNAL_BASE + 7) #define BCM_6338_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) +#define BCM_6338_ENET1_IRQ 0 #define BCM_6338_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9) -#define BCM_6338_SDRAM_IRQ (IRQ_INTERNAL_BASE + 10) -#define BCM_6338_USB_CNTL_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 11) -#define BCM_6338_USB_CNTL_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 12) -#define BCM_6338_USB_BULK_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 13) -#define BCM_6338_USB_BULK_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 14) +#define BCM_6338_OHCI0_IRQ 0 +#define BCM_6338_EHCI0_IRQ 0 #define BCM_6338_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 15) #define BCM_6338_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 16) -#define BCM_6338_SDIO_IRQ (IRQ_INTERNAL_BASE + 17) +#define BCM_6338_ENET1_RXDMA_IRQ 0 +#define BCM_6338_ENET1_TXDMA_IRQ 0 +#define BCM_6338_PCI_IRQ 0 +#define BCM_6338_PCMCIA_IRQ 0 /* * 6345 irqs */ #define BCM_6345_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) #define BCM_6345_UART0_IRQ (IRQ_INTERNAL_BASE + 2) +#define BCM_6345_UART1_IRQ 0 #define BCM_6345_DSL_IRQ (IRQ_INTERNAL_BASE + 3) -#define BCM_6345_ATM_IRQ (IRQ_INTERNAL_BASE + 4) -#define BCM_6345_USB_IRQ (IRQ_INTERNAL_BASE + 5) #define BCM_6345_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) +#define BCM_6345_ENET1_IRQ 0 #define BCM_6345_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12) +#define BCM_6345_OHCI0_IRQ 0 +#define BCM_6345_EHCI0_IRQ 0 #define BCM_6345_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 13 + 1) #define BCM_6345_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 13 + 2) -#define BCM_6345_EBI_RX_IRQ (IRQ_INTERNAL_BASE + 13 + 5) -#define BCM_6345_EBI_TX_IRQ (IRQ_INTERNAL_BASE + 13 + 6) -#define BCM_6345_RESERVED_RX_IRQ (IRQ_INTERNAL_BASE + 13 + 9) -#define BCM_6345_RESERVED_TX_IRQ (IRQ_INTERNAL_BASE + 13 + 10) -#define BCM_6345_USB_BULK_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 13 + 13) -#define BCM_6345_USB_BULK_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 13 + 14) -#define BCM_6345_USB_CNTL_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 13 + 15) -#define BCM_6345_USB_CNTL_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 13 + 16) -#define BCM_6345_USB_ISO_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 13 + 17) -#define BCM_6345_USB_ISO_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 13 + 18) +#define BCM_6345_ENET1_RXDMA_IRQ 0 +#define BCM_6345_ENET1_TXDMA_IRQ 0 +#define BCM_6345_PCI_IRQ 0 +#define BCM_6345_PCMCIA_IRQ 0 /* * 6348 irqs */ #define BCM_6348_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) #define BCM_6348_UART0_IRQ (IRQ_INTERNAL_BASE + 2) +#define BCM_6348_UART1_IRQ 0 #define BCM_6348_DSL_IRQ (IRQ_INTERNAL_BASE + 4) -#define BCM_6348_ENET1_IRQ (IRQ_INTERNAL_BASE + 7) #define BCM_6348_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) +#define BCM_6348_ENET1_IRQ (IRQ_INTERNAL_BASE + 7) #define BCM_6348_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9) #define BCM_6348_OHCI0_IRQ (IRQ_INTERNAL_BASE + 12) +#define BCM_6348_EHCI0_IRQ 0 #define BCM_6348_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 20) #define BCM_6348_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 21) #define BCM_6348_ENET1_RXDMA_IRQ (IRQ_INTERNAL_BASE + 22) #define BCM_6348_ENET1_TXDMA_IRQ (IRQ_INTERNAL_BASE + 23) -#define BCM_6348_PCMCIA_IRQ (IRQ_INTERNAL_BASE + 24) #define BCM_6348_PCI_IRQ (IRQ_INTERNAL_BASE + 24) +#define BCM_6348_PCMCIA_IRQ (IRQ_INTERNAL_BASE + 24) /* * 6358 irqs @@ -525,21 +395,38 @@ enum bcm63xx_irq { #define BCM_6358_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) #define BCM_6358_UART0_IRQ (IRQ_INTERNAL_BASE + 2) #define BCM_6358_UART1_IRQ (IRQ_INTERNAL_BASE + 3) -#define BCM_6358_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5) -#define BCM_6358_ENET1_IRQ (IRQ_INTERNAL_BASE + 6) +#define BCM_6358_DSL_IRQ (IRQ_INTERNAL_BASE + 29) #define BCM_6358_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) +#define BCM_6358_ENET1_IRQ (IRQ_INTERNAL_BASE + 6) #define BCM_6358_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9) +#define BCM_6358_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5) #define BCM_6358_EHCI0_IRQ (IRQ_INTERNAL_BASE + 10) #define BCM_6358_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 15) #define BCM_6358_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 16) #define BCM_6358_ENET1_RXDMA_IRQ (IRQ_INTERNAL_BASE + 17) #define BCM_6358_ENET1_TXDMA_IRQ (IRQ_INTERNAL_BASE + 18) -#define BCM_6358_DSL_IRQ (IRQ_INTERNAL_BASE + 29) #define BCM_6358_PCI_IRQ (IRQ_INTERNAL_BASE + 31) #define BCM_6358_PCMCIA_IRQ (IRQ_INTERNAL_BASE + 24) extern const int *bcm63xx_irqs; +#define __GEN_CPU_IRQ_TABLE(__cpu) \ + [IRQ_TIMER] = BCM_## __cpu ##_TIMER_IRQ, \ + [IRQ_UART0] = BCM_## __cpu ##_UART0_IRQ, \ + [IRQ_UART1] = BCM_## __cpu ##_UART1_IRQ, \ + [IRQ_DSL] = BCM_## __cpu ##_DSL_IRQ, \ + [IRQ_ENET0] = BCM_## __cpu ##_ENET0_IRQ, \ + [IRQ_ENET1] = BCM_## __cpu ##_ENET1_IRQ, \ + [IRQ_ENET_PHY] = BCM_## __cpu ##_ENET_PHY_IRQ, \ + [IRQ_OHCI0] = BCM_## __cpu ##_OHCI0_IRQ, \ + [IRQ_EHCI0] = BCM_## __cpu ##_EHCI0_IRQ, \ + [IRQ_ENET0_RXDMA] = BCM_## __cpu ##_ENET0_RXDMA_IRQ, \ + [IRQ_ENET0_TXDMA] = BCM_## __cpu ##_ENET0_TXDMA_IRQ, \ + [IRQ_ENET1_RXDMA] = BCM_## __cpu ##_ENET1_RXDMA_IRQ, \ + [IRQ_ENET1_TXDMA] = BCM_## __cpu ##_ENET1_TXDMA_IRQ, \ + [IRQ_PCI] = BCM_## __cpu ##_PCI_IRQ, \ + [IRQ_PCMCIA] = BCM_## __cpu ##_PCMCIA_IRQ, \ + static inline int bcm63xx_get_irq_number(enum bcm63xx_irq irq) { return bcm63xx_irqs[irq]; -- 1.7.1.1 From mbizon@freebox.fr Fri Jun 10 23:47:43 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 23:51:12 +0200 (CEST) Received: from smtp4-g21.free.fr ([212.27.42.4]:52695 "EHLO smtp4-g21.free.fr" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491146Ab1FJVrn (ORCPT ); Fri, 10 Jun 2011 23:47:43 +0200 Received: from bobafett.staff.proxad.net (unknown [213.228.1.121]) by smtp4-g21.free.fr (Postfix) with ESMTP id D9E8B4C8178; Fri, 10 Jun 2011 23:47:38 +0200 (CEST) Received: from sakura.staff.proxad.net (unknown [172.18.3.156]) by bobafett.staff.proxad.net (Postfix) with ESMTP id F0678180669; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) Received: by sakura.staff.proxad.net (Postfix, from userid 1000) id E5D0355AEB4; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) From: Maxime Bizon To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org, florian@openwrt.org, Maxime Bizon Subject: [PATCH 08/11] MIPS: BCM63XX: prepare irq code to handle different external irq hardware implementation. Date: Fri, 10 Jun 2011 23:47:18 +0200 Message-Id: <1307742441-28284-9-git-send-email-mbizon@freebox.fr> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> References: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> X-archive-position: 30334 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mbizon@freebox.fr Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9581 Content-Length: 5960 Lines: 194 External irq only works for 6348, change code to prepare support of other CPUs. Signed-off-by: Maxime Bizon --- arch/mips/bcm63xx/irq.c | 77 ++++++++++++++++++++++++++++++++++++---------- 1 files changed, 60 insertions(+), 17 deletions(-) diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c index d002831..2e4f317 100644 --- a/arch/mips/bcm63xx/irq.c +++ b/arch/mips/bcm63xx/irq.c @@ -25,18 +25,32 @@ static void __dispatch_internal(void) __maybe_unused; #ifdef CONFIG_BCM63XX_CPU_6338 #define irq_stat_reg PERF_IRQSTAT_6338_REG #define irq_mask_reg PERF_IRQMASK_6338_REG +#define is_ext_irq_cascaded 0 +#define ext_irq_start 0 +#define ext_irq_end 0 #endif #ifdef CONFIG_BCM63XX_CPU_6345 #define irq_stat_reg PERF_IRQSTAT_6345_REG #define irq_mask_reg PERF_IRQMASK_6345_REG +#define is_ext_irq_cascaded 0 +#define ext_irq_start 0 +#define ext_irq_end 0 #endif #ifdef CONFIG_BCM63XX_CPU_6348 #define irq_stat_reg PERF_IRQSTAT_6348_REG #define irq_mask_reg PERF_IRQMASK_6348_REG +#define dispatch_internal __dispatch_internal +#define is_ext_irq_cascaded 0 +#define ext_irq_start 0 +#define ext_irq_end 0 #endif #ifdef CONFIG_BCM63XX_CPU_6358 #define irq_stat_reg PERF_IRQSTAT_6358_REG #define irq_mask_reg PERF_IRQMASK_6358_REG +#define dispatch_internal __dispatch_internal +#define is_ext_irq_cascaded 1 +#define ext_irq_start (BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE) +#define ext_irq_end (BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE) #endif #define dispatch_internal __dispatch_internal @@ -51,6 +65,8 @@ static inline void bcm63xx_init_irq(void) static u32 irq_stat_addr, irq_mask_addr; static void (*dispatch_internal)(void); +static int is_ext_irq_cascaded; +static unsigned int ext_irq_start, ext_irq_end; static void bcm63xx_init_irq(void) { @@ -73,6 +89,9 @@ static void bcm63xx_init_irq(void) case BCM6358_CPU_ID: irq_stat_addr += PERF_IRQSTAT_6358_REG; irq_mask_addr += PERF_IRQMASK_6358_REG; + is_ext_irq_cascaded = 1; + ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE; + ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE; break; default: BUG(); @@ -84,7 +103,11 @@ static void bcm63xx_init_irq(void) static inline void handle_internal(int intbit) { - do_IRQ(intbit + IRQ_INTERNAL_BASE); + if (is_ext_irq_cascaded && + intbit >= ext_irq_start && intbit <= ext_irq_end) + do_IRQ(intbit - ext_irq_start + IRQ_EXT_BASE); + else + do_IRQ(intbit + IRQ_INTERNAL_BASE); } /* @@ -128,14 +151,16 @@ asmlinkage void plat_irq_dispatch(void) do_IRQ(7); if (cause & CAUSEF_IP2) dispatch_internal(); - if (cause & CAUSEF_IP3) - do_IRQ(IRQ_EXT_0); - if (cause & CAUSEF_IP4) - do_IRQ(IRQ_EXT_1); - if (cause & CAUSEF_IP5) - do_IRQ(IRQ_EXT_2); - if (cause & CAUSEF_IP6) - do_IRQ(IRQ_EXT_3); + if (!is_ext_irq_cascaded) { + if (cause & CAUSEF_IP3) + do_IRQ(IRQ_EXT_0); + if (cause & CAUSEF_IP4) + do_IRQ(IRQ_EXT_1); + if (cause & CAUSEF_IP5) + do_IRQ(IRQ_EXT_2); + if (cause & CAUSEF_IP6) + do_IRQ(IRQ_EXT_3); + } } while (1); } @@ -143,9 +168,8 @@ asmlinkage void plat_irq_dispatch(void) * internal IRQs operations: only mask/unmask on PERF irq mask * register. */ -static inline void bcm63xx_internal_irq_mask(struct irq_data *d) +static void internal_irq_mask(unsigned int irq) { - unsigned int irq = d->irq - IRQ_INTERNAL_BASE; u32 mask; mask = bcm_readl(irq_mask_addr); @@ -153,9 +177,8 @@ static inline void bcm63xx_internal_irq_mask(struct irq_data *d) bcm_writel(mask, irq_mask_addr); } -static void bcm63xx_internal_irq_unmask(struct irq_data *d) +static void internal_irq_unmask(unsigned int irq) { - unsigned int irq = d->irq - IRQ_INTERNAL_BASE; u32 mask; mask = bcm_readl(irq_mask_addr); @@ -163,6 +186,16 @@ static void bcm63xx_internal_irq_unmask(struct irq_data *d) bcm_writel(mask, irq_mask_addr); } +static void bcm63xx_internal_irq_mask(struct irq_data *d) +{ + internal_irq_mask(d->irq - IRQ_INTERNAL_BASE); +} + +static void bcm63xx_internal_irq_unmask(struct irq_data *d) +{ + internal_irq_unmask(d->irq - IRQ_INTERNAL_BASE); +} + /* * external IRQs operations: mask/unmask and clear on PERF external * irq control register. @@ -175,6 +208,8 @@ static void bcm63xx_external_irq_mask(struct irq_data *d) reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); reg &= ~EXTIRQ_CFG_MASK(irq); bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); + if (is_ext_irq_cascaded) + internal_irq_mask(irq + ext_irq_start); } static void bcm63xx_external_irq_unmask(struct irq_data *d) @@ -185,6 +220,8 @@ static void bcm63xx_external_irq_unmask(struct irq_data *d) reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); reg |= EXTIRQ_CFG_MASK(irq); bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); + if (is_ext_irq_cascaded) + internal_irq_unmask(irq + ext_irq_start); } static void bcm63xx_external_irq_clear(struct irq_data *d) @@ -195,12 +232,16 @@ static void bcm63xx_external_irq_clear(struct irq_data *d) reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); reg |= EXTIRQ_CFG_CLEAR(irq); bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); + if (is_ext_irq_cascaded) + internal_irq_mask(irq + ext_irq_start); } static unsigned int bcm63xx_external_irq_startup(struct irq_data *d) { - set_c0_status(0x100 << (d->irq - IRQ_MIPS_BASE)); - irq_enable_hazard(); + if (!is_ext_irq_cascaded) { + set_c0_status(0x100 << (d->irq - IRQ_MIPS_BASE)); + irq_enable_hazard(); + } bcm63xx_external_irq_unmask(d); return 0; } @@ -208,8 +249,10 @@ static unsigned int bcm63xx_external_irq_startup(struct irq_data *d) static void bcm63xx_external_irq_shutdown(struct irq_data *d) { bcm63xx_external_irq_mask(d); - clear_c0_status(0x100 << (d->irq - IRQ_MIPS_BASE)); - irq_disable_hazard(); + if (!is_ext_irq_cascaded) { + clear_c0_status(0x100 << (d->irq - IRQ_MIPS_BASE)); + irq_disable_hazard(); + } } static int bcm63xx_external_irq_set_type(struct irq_data *d, -- 1.7.1.1 From mbizon@freebox.fr Fri Jun 10 23:47:45 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 23:51:36 +0200 (CEST) Received: from smtp4-g21.free.fr ([212.27.42.4]:52716 "EHLO smtp4-g21.free.fr" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491148Ab1FJVrp (ORCPT ); Fri, 10 Jun 2011 23:47:45 +0200 Received: from bobafett.staff.proxad.net (unknown [213.228.1.121]) by smtp4-g21.free.fr (Postfix) with ESMTP id 7D2204C8037; Fri, 10 Jun 2011 23:47:39 +0200 (CEST) Received: from sakura.staff.proxad.net (unknown [172.18.3.156]) by bobafett.staff.proxad.net (Postfix) with ESMTP id 01F5D18066C; Fri, 10 Jun 2011 23:47:31 +0200 (CEST) Received: by sakura.staff.proxad.net (Postfix, from userid 1000) id EEAB655B08D; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) From: Maxime Bizon To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org, florian@openwrt.org, Maxime Bizon Subject: [PATCH 10/11] MIPS: BCM63XX: add external irq support for non 6348 CPUs. Date: Fri, 10 Jun 2011 23:47:20 +0200 Message-Id: <1307742441-28284-11-git-send-email-mbizon@freebox.fr> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> References: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> X-archive-position: 30335 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mbizon@freebox.fr Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9582 Content-Length: 4968 Lines: 173 Signed-off-by: Maxime Bizon --- arch/mips/bcm63xx/irq.c | 74 ++++++++++++++++----- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 20 ++++-- 2 files changed, 73 insertions(+), 21 deletions(-) diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c index 07909a9..f2d5e30 100644 --- a/arch/mips/bcm63xx/irq.c +++ b/arch/mips/bcm63xx/irq.c @@ -276,7 +276,12 @@ static void bcm63xx_external_irq_mask(struct irq_data *d) u32 reg; reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); - reg &= ~EXTIRQ_CFG_MASK(irq); + + if (BCMCPU_IS_6348()) + reg &= ~EXTIRQ_CFG_MASK_6348(irq); + else + reg &= ~EXTIRQ_CFG_MASK(irq); + bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); if (is_ext_irq_cascaded) internal_irq_mask(irq + ext_irq_start); @@ -288,7 +293,12 @@ static void bcm63xx_external_irq_unmask(struct irq_data *d) u32 reg; reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); - reg |= EXTIRQ_CFG_MASK(irq); + + if (BCMCPU_IS_6348()) + reg |= EXTIRQ_CFG_MASK_6348(irq); + else + reg |= EXTIRQ_CFG_MASK(irq); + bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); if (is_ext_irq_cascaded) internal_irq_unmask(irq + ext_irq_start); @@ -300,7 +310,12 @@ static void bcm63xx_external_irq_clear(struct irq_data *d) u32 reg; reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); - reg |= EXTIRQ_CFG_CLEAR(irq); + + if (BCMCPU_IS_6348()) + reg |= EXTIRQ_CFG_CLEAR_6348(irq); + else + reg |= EXTIRQ_CFG_CLEAR(irq); + bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); if (is_ext_irq_cascaded) internal_irq_mask(irq + ext_irq_start); @@ -330,45 +345,72 @@ static int bcm63xx_external_irq_set_type(struct irq_data *d, { unsigned int irq = d->irq - IRQ_EXT_BASE; u32 reg; + int levelsense, sense, bothedge; flow_type &= IRQ_TYPE_SENSE_MASK; if (flow_type == IRQ_TYPE_NONE) flow_type = IRQ_TYPE_LEVEL_LOW; - reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); + levelsense = sense = bothedge = 0; switch (flow_type) { case IRQ_TYPE_EDGE_BOTH: - reg &= ~EXTIRQ_CFG_LEVELSENSE(irq); - reg |= EXTIRQ_CFG_BOTHEDGE(irq); + bothedge = 1; break; case IRQ_TYPE_EDGE_RISING: - reg &= ~EXTIRQ_CFG_LEVELSENSE(irq); - reg |= EXTIRQ_CFG_SENSE(irq); - reg &= ~EXTIRQ_CFG_BOTHEDGE(irq); + sense = 1; break; case IRQ_TYPE_EDGE_FALLING: - reg &= ~EXTIRQ_CFG_LEVELSENSE(irq); - reg &= ~EXTIRQ_CFG_SENSE(irq); - reg &= ~EXTIRQ_CFG_BOTHEDGE(irq); break; case IRQ_TYPE_LEVEL_HIGH: - reg |= EXTIRQ_CFG_LEVELSENSE(irq); - reg |= EXTIRQ_CFG_SENSE(irq); + levelsense = 1; + sense = 1; break; case IRQ_TYPE_LEVEL_LOW: - reg |= EXTIRQ_CFG_LEVELSENSE(irq); - reg &= ~EXTIRQ_CFG_SENSE(irq); + levelsense = 1; break; default: printk(KERN_ERR "bogus flow type combination given !\n"); return -EINVAL; } + + reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); + + if (BCMCPU_IS_6348()) { + if (levelsense) + reg |= EXTIRQ_CFG_LEVELSENSE_6348(irq); + else + reg &= ~EXTIRQ_CFG_LEVELSENSE_6348(irq); + if (sense) + reg |= EXTIRQ_CFG_SENSE_6348(irq); + else + reg &= ~EXTIRQ_CFG_SENSE_6348(irq); + if (bothedge) + reg |= EXTIRQ_CFG_BOTHEDGE_6348(irq); + else + reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq); + } + + if (BCMCPU_IS_6338() || BCMCPU_IS_6358() || BCMCPU_IS_6368()) { + if (levelsense) + reg |= EXTIRQ_CFG_LEVELSENSE(irq); + else + reg &= ~EXTIRQ_CFG_LEVELSENSE(irq); + if (sense) + reg |= EXTIRQ_CFG_SENSE(irq); + else + reg &= ~EXTIRQ_CFG_SENSE(irq); + if (bothedge) + reg |= EXTIRQ_CFG_BOTHEDGE(irq); + else + reg &= ~EXTIRQ_CFG_BOTHEDGE(irq); + } + bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); irqd_set_trigger_type(d, flow_type); diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h index 4354be1..0fa613c 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h @@ -104,12 +104,22 @@ /* External Interrupt Configuration register */ #define PERF_EXTIRQ_CFG_REG 0x14 + +/* for 6348 only */ +#define EXTIRQ_CFG_SENSE_6348(x) (1 << (x)) +#define EXTIRQ_CFG_STAT_6348(x) (1 << (x + 5)) +#define EXTIRQ_CFG_CLEAR_6348(x) (1 << (x + 10)) +#define EXTIRQ_CFG_MASK_6348(x) (1 << (x + 15)) +#define EXTIRQ_CFG_BOTHEDGE_6348(x) (1 << (x + 20)) +#define EXTIRQ_CFG_LEVELSENSE_6348(x) (1 << (x + 25)) + +/* for all others */ #define EXTIRQ_CFG_SENSE(x) (1 << (x)) -#define EXTIRQ_CFG_STAT(x) (1 << (x + 5)) -#define EXTIRQ_CFG_CLEAR(x) (1 << (x + 10)) -#define EXTIRQ_CFG_MASK(x) (1 << (x + 15)) -#define EXTIRQ_CFG_BOTHEDGE(x) (1 << (x + 20)) -#define EXTIRQ_CFG_LEVELSENSE(x) (1 << (x + 25)) +#define EXTIRQ_CFG_STAT(x) (1 << (x + 4)) +#define EXTIRQ_CFG_CLEAR(x) (1 << (x + 8)) +#define EXTIRQ_CFG_MASK(x) (1 << (x + 12)) +#define EXTIRQ_CFG_BOTHEDGE(x) (1 << (x + 16)) +#define EXTIRQ_CFG_LEVELSENSE(x) (1 << (x + 20)) #define EXTIRQ_CFG_CLEAR_ALL (0xf << 10) #define EXTIRQ_CFG_MASK_ALL (0xf << 15) -- 1.7.1.1 From mbizon@freebox.fr Fri Jun 10 23:47:45 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jun 2011 23:51:59 +0200 (CEST) Received: from smtp4-g21.free.fr ([212.27.42.4]:52715 "EHLO smtp4-g21.free.fr" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491151Ab1FJVrp (ORCPT ); Fri, 10 Jun 2011 23:47:45 +0200 Received: from bobafett.staff.proxad.net (unknown [213.228.1.121]) by smtp4-g21.free.fr (Postfix) with ESMTP id C0FE54C8089; Fri, 10 Jun 2011 23:47:39 +0200 (CEST) Received: from sakura.staff.proxad.net (unknown [172.18.3.156]) by bobafett.staff.proxad.net (Postfix) with ESMTP id 0B34618066F; Fri, 10 Jun 2011 23:47:31 +0200 (CEST) Received: by sakura.staff.proxad.net (Postfix, from userid 1000) id 006F855AEB4; Fri, 10 Jun 2011 23:47:30 +0200 (CEST) From: Maxime Bizon To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org, florian@openwrt.org, Maxime Bizon Subject: [PATCH 11/11] MIPS: BCM63XX: add support for bcm6368 CPU. Date: Fri, 10 Jun 2011 23:47:21 +0200 Message-Id: <1307742441-28284-12-git-send-email-mbizon@freebox.fr> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> References: <1307742441-28284-1-git-send-email-mbizon@freebox.fr> X-archive-position: 30336 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mbizon@freebox.fr Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9583 Content-Length: 22771 Lines: 703 Signed-off-by: Maxime Bizon --- arch/mips/bcm63xx/Kconfig | 4 + arch/mips/bcm63xx/clk.c | 70 +++++++++++++- arch/mips/bcm63xx/cpu.c | 76 ++++++++++++--- arch/mips/bcm63xx/dev-uart.c | 2 +- arch/mips/bcm63xx/irq.c | 16 +++ arch/mips/bcm63xx/prom.c | 7 +- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 99 +++++++++++++++++++ arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h | 2 + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 106 ++++++++++++++++++++- arch/mips/include/asm/mach-bcm63xx/ioremap.h | 4 + arch/mips/pci/pci-bcm63xx.c | 4 +- 11 files changed, 364 insertions(+), 26 deletions(-) diff --git a/arch/mips/bcm63xx/Kconfig b/arch/mips/bcm63xx/Kconfig index fb177d6..6b1b9ad 100644 --- a/arch/mips/bcm63xx/Kconfig +++ b/arch/mips/bcm63xx/Kconfig @@ -20,6 +20,10 @@ config BCM63XX_CPU_6348 config BCM63XX_CPU_6358 bool "support 6358 CPU" select HW_HAS_PCI + +config BCM63XX_CPU_6368 + bool "support 6368 CPU" + select HW_HAS_PCI endmenu source "arch/mips/bcm63xx/boards/Kconfig" diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c index 2c68ee9..9d57c71 100644 --- a/arch/mips/bcm63xx/clk.c +++ b/arch/mips/bcm63xx/clk.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -113,6 +114,34 @@ static struct clk clk_ephy = { }; /* + * Ethernet switch clock + */ +static void enetsw_set(struct clk *clk, int enable) +{ + if (!BCMCPU_IS_6368()) + return; + bcm_hwclock_set(CKCTL_6368_ROBOSW_CLK_EN | + CKCTL_6368_SWPKT_USB_EN | + CKCTL_6368_SWPKT_SAR_EN, enable); + if (enable) { + u32 val; + + /* reset switch core afer clock change */ + val = bcm_perf_readl(PERF_SOFTRESET_6368_REG); + val &= ~SOFTRESET_6368_ENETSW_MASK; + bcm_perf_writel(val, PERF_SOFTRESET_6368_REG); + msleep(10); + val |= SOFTRESET_6368_ENETSW_MASK; + bcm_perf_writel(val, PERF_SOFTRESET_6368_REG); + msleep(10); + } +} + +static struct clk clk_enetsw = { + .set = enetsw_set, +}; + +/* * PCM clock */ static void pcm_set(struct clk *clk, int enable) @@ -131,9 +160,10 @@ static struct clk clk_pcm = { */ static void usbh_set(struct clk *clk, int enable) { - if (!BCMCPU_IS_6348()) - return; - bcm_hwclock_set(CKCTL_6348_USBH_EN, enable); + if (BCMCPU_IS_6348()) + bcm_hwclock_set(CKCTL_6348_USBH_EN, enable); + else if (BCMCPU_IS_6368()) + bcm_hwclock_set(CKCTL_6368_USBH_CLK_EN, enable); } static struct clk clk_usbh = { @@ -162,6 +192,36 @@ static struct clk clk_spi = { }; /* + * XTM clock + */ +static void xtm_set(struct clk *clk, int enable) +{ + if (!BCMCPU_IS_6368()) + return; + + bcm_hwclock_set(CKCTL_6368_SAR_CLK_EN | + CKCTL_6368_SWPKT_SAR_EN, enable); + + if (enable) { + u32 val; + + /* reset sar core afer clock change */ + val = bcm_perf_readl(PERF_SOFTRESET_6368_REG); + val &= ~SOFTRESET_6368_SAR_MASK; + bcm_perf_writel(val, PERF_SOFTRESET_6368_REG); + mdelay(1); + val |= SOFTRESET_6368_SAR_MASK; + bcm_perf_writel(val, PERF_SOFTRESET_6368_REG); + mdelay(1); + } +} + + +static struct clk clk_xtm = { + .set = xtm_set, +}; + +/* * Internal peripheral clock */ static struct clk clk_periph = { @@ -204,12 +264,16 @@ struct clk *clk_get(struct device *dev, const char *id) return &clk_enet0; if (!strcmp(id, "enet1")) return &clk_enet1; + if (!strcmp(id, "enetsw")) + return &clk_enetsw; if (!strcmp(id, "ephy")) return &clk_ephy; if (!strcmp(id, "usbh")) return &clk_usbh; if (!strcmp(id, "spi")) return &clk_spi; + if (!strcmp(id, "xtm")) + return &clk_xtm; if (!strcmp(id, "periph")) return &clk_periph; if (BCMCPU_IS_6358() && !strcmp(id, "pcm")) diff --git a/arch/mips/bcm63xx/cpu.c b/arch/mips/bcm63xx/cpu.c index 027ac30..3ea2533 100644 --- a/arch/mips/bcm63xx/cpu.c +++ b/arch/mips/bcm63xx/cpu.c @@ -66,6 +66,15 @@ static const int bcm96358_irqs[] = { }; +static const unsigned long bcm96368_regs_base[] = { + __GEN_CPU_REGS_TABLE(6368) +}; + +static const int bcm96368_irqs[] = { + __GEN_CPU_IRQ_TABLE(6368) + +}; + u16 __bcm63xx_get_cpu_id(void) { return bcm63xx_cpu_id; @@ -92,20 +101,19 @@ unsigned int bcm63xx_get_memory_size(void) static unsigned int detect_cpu_clock(void) { - unsigned int tmp, n1 = 0, n2 = 0, m1 = 0; - - /* BCM6338 has a fixed 240 Mhz frequency */ - if (BCMCPU_IS_6338()) + switch (bcm63xx_get_cpu_id()) { + case BCM6338_CPU_ID: + /* BCM6338 has a fixed 240 Mhz frequency */ return 240000000; - /* BCM6345 has a fixed 140Mhz frequency */ - if (BCMCPU_IS_6345()) + case BCM6345_CPU_ID: + /* BCM6345 has a fixed 140Mhz frequency */ return 140000000; - /* - * frequency depends on PLL configuration: - */ - if (BCMCPU_IS_6348()) { + case BCM6348_CPU_ID: + { + unsigned int tmp, n1, n2, m1; + /* 16MHz * (N1 + 1) * (N2 + 2) / (M1_CPU + 1) */ tmp = bcm_perf_readl(PERF_MIPSPLLCTL_REG); n1 = (tmp & MIPSPLLCTL_N1_MASK) >> MIPSPLLCTL_N1_SHIFT; @@ -114,17 +122,47 @@ static unsigned int detect_cpu_clock(void) n1 += 1; n2 += 2; m1 += 1; + return (16 * 1000000 * n1 * n2) / m1; } - if (BCMCPU_IS_6358()) { + case BCM6358_CPU_ID: + { + unsigned int tmp, n1, n2, m1; + /* 16MHz * N1 * N2 / M1_CPU */ tmp = bcm_ddr_readl(DDR_DMIPSPLLCFG_REG); n1 = (tmp & DMIPSPLLCFG_N1_MASK) >> DMIPSPLLCFG_N1_SHIFT; n2 = (tmp & DMIPSPLLCFG_N2_MASK) >> DMIPSPLLCFG_N2_SHIFT; m1 = (tmp & DMIPSPLLCFG_M1_MASK) >> DMIPSPLLCFG_M1_SHIFT; + return (16 * 1000000 * n1 * n2) / m1; } - return (16 * 1000000 * n1 * n2) / m1; + case BCM6368_CPU_ID: + { + unsigned int tmp, p1, p2, ndiv, m1; + + /* (64MHz / P1) * P2 * NDIV / M1_CPU */ + tmp = bcm_ddr_readl(DDR_DMIPSPLLCFG_6368_REG); + + p1 = (tmp & DMIPSPLLCFG_6368_P1_MASK) >> + DMIPSPLLCFG_6368_P1_SHIFT; + + p2 = (tmp & DMIPSPLLCFG_6368_P2_MASK) >> + DMIPSPLLCFG_6368_P2_SHIFT; + + ndiv = (tmp & DMIPSPLLCFG_6368_NDIV_MASK) >> + DMIPSPLLCFG_6368_NDIV_SHIFT; + + tmp = bcm_ddr_readl(DDR_DMIPSPLLDIV_6368_REG); + m1 = (tmp & DMIPSPLLDIV_6368_MDIV_MASK) >> + DMIPSPLLDIV_6368_MDIV_SHIFT; + + return (((64 * 1000000) / p1) * p2 * ndiv) / m1; + } + + default: + BUG(); + } } /* @@ -146,7 +184,7 @@ static unsigned int detect_memory_size(void) banks = (val & SDRAM_CFG_BANK_MASK) ? 2 : 1; } - if (BCMCPU_IS_6358()) { + if (BCMCPU_IS_6358() || BCMCPU_IS_6368()) { val = bcm_memc_readl(MEMC_CFG_REG); rows = (val & MEMC_CFG_ROW_MASK) >> MEMC_CFG_ROW_SHIFT; cols = (val & MEMC_CFG_COL_MASK) >> MEMC_CFG_COL_SHIFT; @@ -191,9 +229,15 @@ void __init bcm63xx_cpu_init(void) bcm63xx_irqs = bcm96345_irqs; break; case CPU_BMIPS4350: - expected_cpu_id = BCM6358_CPU_ID; - bcm63xx_regs_base = bcm96358_regs_base; - bcm63xx_irqs = bcm96358_irqs; + if ((read_c0_prid() & 0xf0) == 0x0030) { + expected_cpu_id = BCM6368_CPU_ID; + bcm63xx_regs_base = bcm96368_regs_base; + bcm63xx_irqs = bcm96368_irqs; + } else { + expected_cpu_id = BCM6358_CPU_ID; + bcm63xx_regs_base = bcm96358_regs_base; + bcm63xx_irqs = bcm96358_irqs; + } break; } diff --git a/arch/mips/bcm63xx/dev-uart.c b/arch/mips/bcm63xx/dev-uart.c index c2963da..d6e42c6 100644 --- a/arch/mips/bcm63xx/dev-uart.c +++ b/arch/mips/bcm63xx/dev-uart.c @@ -54,7 +54,7 @@ int __init bcm63xx_uart_register(unsigned int id) if (id >= ARRAY_SIZE(bcm63xx_uart_devices)) return -ENODEV; - if (id == 1 && !BCMCPU_IS_6358()) + if (id == 1 && (!BCMCPU_IS_6358() && !BCMCPU_IS_6368())) return -ENODEV; if (id == 0) { diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c index f2d5e30..f111ccd 100644 --- a/arch/mips/bcm63xx/irq.c +++ b/arch/mips/bcm63xx/irq.c @@ -59,6 +59,14 @@ static void __internal_irq_unmask_64(unsigned int irq) __maybe_unused; #define ext_irq_start (BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE) #define ext_irq_end (BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE) #endif +#ifdef CONFIG_BCM63XX_CPU_6368 +#define irq_stat_reg PERF_IRQSTAT_6368_REG +#define irq_mask_reg PERF_IRQMASK_6368_REG +#define irq_bits 64 +#define is_ext_irq_cascaded 1 +#define ext_irq_start (BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE) +#define ext_irq_end (BCM_6368_EXT_IRQ3 - IRQ_INTERNAL_BASE) +#endif #if irq_bits == 32 #define dispatch_internal __dispatch_internal @@ -116,6 +124,14 @@ static void bcm63xx_init_irq(void) ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE; ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE; break; + case BCM6368_CPU_ID: + irq_stat_addr += PERF_IRQSTAT_6368_REG; + irq_mask_addr += PERF_IRQMASK_6368_REG; + irq_bits = 64; + is_ext_irq_cascaded = 1; + ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE; + ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE; + break; default: BUG(); } diff --git a/arch/mips/bcm63xx/prom.c b/arch/mips/bcm63xx/prom.c index be252ef..99d7f40 100644 --- a/arch/mips/bcm63xx/prom.c +++ b/arch/mips/bcm63xx/prom.c @@ -32,9 +32,12 @@ void __init prom_init(void) mask = CKCTL_6345_ALL_SAFE_EN; else if (BCMCPU_IS_6348()) mask = CKCTL_6348_ALL_SAFE_EN; - else - /* BCMCPU_IS_6358() */ + else if (BCMCPU_IS_6358()) mask = CKCTL_6358_ALL_SAFE_EN; + else if (BCMCPU_IS_6368()) + mask = CKCTL_6368_ALL_SAFE_EN; + else + mask = 0; reg = bcm_perf_readl(PERF_CKCTL_REG); reg &= ~mask; diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h index ce6b3ca..cf145ea 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h @@ -13,6 +13,7 @@ #define BCM6345_CPU_ID 0x6345 #define BCM6348_CPU_ID 0x6348 #define BCM6358_CPU_ID 0x6358 +#define BCM6368_CPU_ID 0x6368 void __init bcm63xx_cpu_init(void); u16 __bcm63xx_get_cpu_id(void); @@ -71,6 +72,19 @@ unsigned int bcm63xx_get_cpu_freq(void); # define BCMCPU_IS_6358() (0) #endif +#ifdef CONFIG_BCM63XX_CPU_6368 +# ifdef bcm63xx_get_cpu_id +# undef bcm63xx_get_cpu_id +# define bcm63xx_get_cpu_id() __bcm63xx_get_cpu_id() +# define BCMCPU_RUNTIME_DETECT +# else +# define bcm63xx_get_cpu_id() BCM6368_CPU_ID +# endif +# define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID) +#else +# define BCMCPU_IS_6368() (0) +#endif + #ifndef bcm63xx_get_cpu_id #error "No CPU support configured" #endif @@ -309,6 +323,47 @@ enum bcm63xx_regs_set { #define BCM_6358_PCMDMAS_BASE (0xfffe1a00) +/* + * 6368 register sets base address + */ +#define BCM_6368_DSL_LMEM_BASE (0xdeadbeef) +#define BCM_6368_PERF_BASE (0xb0000000) +#define BCM_6368_TIMER_BASE (0xb0000040) +#define BCM_6368_WDT_BASE (0xb000005c) +#define BCM_6368_UART0_BASE (0xb0000100) +#define BCM_6368_UART1_BASE (0xb0000120) +#define BCM_6368_GPIO_BASE (0xb0000080) +#define BCM_6368_SPI_BASE (0xdeadbeef) +#define BCM_6368_SPI2_BASE (0xb0000800) +#define BCM_6368_UDC0_BASE (0xdeadbeef) +#define BCM_6368_OHCI0_BASE (0xb0001600) +#define BCM_6368_OHCI_PRIV_BASE (0xdeadbeef) +#define BCM_6368_USBH_PRIV_BASE (0xb0001700) +#define BCM_6368_MPI_BASE (0xb0001000) +#define BCM_6368_PCMCIA_BASE (0xb0001054) +#define BCM_6368_SDRAM_REGS_BASE (0xdeadbeef) +#define BCM_6368_M2M_BASE (0xdeadbeef) +#define BCM_6368_DSL_BASE (0xdeadbeef) +#define BCM_6368_ENET0_BASE (0xdeadbeef) +#define BCM_6368_ENET1_BASE (0xdeadbeef) +#define BCM_6368_ENETDMA_BASE (0xb0006800) +#define BCM_6368_ENETDMAC_BASE (0xb0006a00) +#define BCM_6368_ENETDMAS_BASE (0xb0006c00) +#define BCM_6368_ENETSW_BASE (0xb0f00000) +#define BCM_6368_EHCI0_BASE (0xb0001500) +#define BCM_6368_SDRAM_BASE (0xdeadbeef) +#define BCM_6368_MEMC_BASE (0xb0001200) +#define BCM_6368_DDR_BASE (0xb0001280) +#define BCM_6368_ATM_BASE (0xdeadbeef) +#define BCM_6368_XTM_BASE (0xb0001800) +#define BCM_6368_XTMDMA_BASE (0xb0005000) +#define BCM_6368_XTMDMAC_BASE (0xb0005200) +#define BCM_6368_XTMDMAS_BASE (0xb0005400) +#define BCM_6368_PCM_BASE (0xb0004000) +#define BCM_6368_PCMDMA_BASE (0xb0005800) +#define BCM_6368_PCMDMAC_BASE (0xb0005a00) +#define BCM_6368_PCMDMAS_BASE (0xb0005c00) + extern const unsigned long *bcm63xx_regs_base; @@ -412,6 +467,9 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set) #ifdef CONFIG_BCM63XX_CPU_6358 __GEN_RSET(6358) #endif +#ifdef CONFIG_BCM63XX_CPU_6368 + __GEN_RSET(6368) +#endif #endif /* unreached */ return 0; @@ -576,6 +634,47 @@ enum bcm63xx_irq { #define BCM_6358_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27) #define BCM_6358_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28) +/* + * 6368 irqs + */ +#define BCM_6368_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32) + +#define BCM_6368_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) +#define BCM_6368_UART0_IRQ (IRQ_INTERNAL_BASE + 2) +#define BCM_6368_UART1_IRQ (IRQ_I