From f.fainelli@gmail.com Sun May 2 11:39:08 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 02 May 2010 11:39:17 +0200 (CEST) Received: from mail-wy0-f177.google.com ([74.125.82.177]:49912 "EHLO mail-wy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491868Ab0EBJjI (ORCPT ); Sun, 2 May 2010 11:39:08 +0200 Received: by wyg36 with SMTP id 36so777545wyg.36 for ; Sun, 02 May 2010 02:39:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:sender:from:date:subject :mime-version:x-length:x-uid:to:reply-to:content-type :content-transfer-encoding:message-id; bh=O6hjGn9w0EZywxEOF7G43cshwE8Z3dYDy93JzNPp6Dk=; b=rTxd8Bov7Fa4pi77R7wp8nNreEUZRgBknbIvB5aOtFlF0Hn/0RaimfPKqWQMklu2Am /2/5SrFAucdmfgYciKiJRJt5rcVqP0PhQ8k9CJocNJ2VNj5AntJfny3OMC6FaElHKSD5 f2wm4Btv5eb2OdFygqfLLhWidlabm+gmeShS0= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:date:subject:mime-version:x-length:x-uid:to:reply-to :content-type:content-transfer-encoding:message-id; b=TadEC8PCbtA1t/Y0xqtngrELhaRSw12iko9zNp5RnZFv71zWNklRqigSkxeoAH1MAW 9VRn5ApvWPywG3ywmYmSqn3yoKvUdAIZ++52MTeLjJZThzUr/kcE4kScMzU7++cITOaP 8R1jqSOs74UXPlSTPJ1OCiE/NMwZG6l31Yyg8= Received: by 10.216.89.193 with SMTP id c43mr6075765wef.151.1272793141274; Sun, 02 May 2010 02:39:01 -0700 (PDT) Received: from lenovo.localnet (208.59.76-86.rev.gaoland.net [86.76.59.208]) by mx.google.com with ESMTPS id z33sm10094467wbd.1.2010.05.02.02.38.59 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sun, 02 May 2010 02:39:00 -0700 (PDT) From: Florian Fainelli Date: Sun, 2 May 2010 11:38:57 +0200 Subject: [PATCH 1/4] AR7: update defconfig MIME-Version: 1.0 X-Length: 15929 X-UID: 190 To: linux-mips@linux-mips.org, Ralf Baechle Reply-To: Florian Fainelli Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201005021138.58177.florian@openwrt.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26543 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Update Texas Instruments AR7 defconfig with: - tiny RCU - LEDs GPIO - disable SSB - enable zboot support - enable GPIO sysfs support Signed-off-by: Florian Fainelli --- diff --git a/arch/mips/configs/ar7_defconfig b/arch/mips/configs/ar7_defconfig index 5a5b6ba..e700095 100644 --- a/arch/mips/configs/ar7_defconfig +++ b/arch/mips/configs/ar7_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.30 -# Wed Jun 24 14:08:59 2009 +# Linux kernel version: 2.6.34-rc6 +# Sat May 1 11:35:01 2010 # CONFIG_MIPS=y @@ -11,11 +11,12 @@ CONFIG_MIPS=y # CONFIG_MACH_ALCHEMY is not set CONFIG_AR7=y # CONFIG_BCM47XX is not set +# CONFIG_BCM63XX is not set # CONFIG_MIPS_COBALT is not set # CONFIG_MACH_DECSTATION is not set # CONFIG_MACH_JAZZ is not set # CONFIG_LASAT is not set -# CONFIG_LEMOTE_FULONG is not set +# CONFIG_MACH_LOONGSON is not set # CONFIG_MIPS_MALTA is not set # CONFIG_MIPS_SIM is not set # CONFIG_NEC_MARKEINS is not set @@ -26,6 +27,7 @@ CONFIG_AR7=y # CONFIG_PNX8550_STB810 is not set # CONFIG_PMC_MSP is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_POWERTV is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP28 is not set @@ -46,6 +48,7 @@ CONFIG_AR7=y # CONFIG_CAVIUM_OCTEON_SIMULATOR is not set # CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set # CONFIG_ALCHEMY_GPIO_INDIRECT is not set +CONFIG_LOONGSON_UART_BASE=y CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_ARCH_HAS_ILOG2_U32 is not set # CONFIG_ARCH_HAS_ILOG2_U64 is not set @@ -63,10 +66,8 @@ CONFIG_CEVT_R4K=y CONFIG_CSRC_R4K_LIB=y CONFIG_CSRC_R4K=y CONFIG_DMA_NONCOHERENT=y -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_EARLY_PRINTK=y +CONFIG_NEED_DMA_MAP_STATE=y CONFIG_SYS_HAS_EARLY_PRINTK=y -# CONFIG_HOTPLUG_CPU is not set # CONFIG_NO_IOPORT is not set CONFIG_GENERIC_GPIO=y # CONFIG_CPU_BIG_ENDIAN is not set @@ -81,7 +82,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5 # # CPU selection # -# CONFIG_CPU_LOONGSON2 is not set +# CONFIG_CPU_LOONGSON2E is not set +# CONFIG_CPU_LOONGSON2F is not set CONFIG_CPU_MIPS32_R1=y # CONFIG_CPU_MIPS32_R2 is not set # CONFIG_CPU_MIPS64_R1 is not set @@ -103,6 +105,8 @@ CONFIG_CPU_MIPS32_R1=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set # CONFIG_CPU_CAVIUM_OCTEON is not set +CONFIG_SYS_SUPPORTS_ZBOOT=y +CONFIG_SYS_SUPPORTS_ZBOOT_UART16550=y CONFIG_SYS_HAS_CPU_MIPS32_R1=y CONFIG_CPU_MIPS32=y CONFIG_CPU_MIPSR1=y @@ -124,6 +128,7 @@ CONFIG_CPU_HAS_PREFETCH=y CONFIG_MIPS_MT_DISABLED=y # CONFIG_MIPS_MT_SMP is not set # CONFIG_MIPS_MT_SMTC is not set +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y @@ -141,8 +146,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 # CONFIG_PHYS_ADDR_T_64BIT is not set CONFIG_ZONE_DMA_FLAG=0 CONFIG_VIRT_TO_BUS=y -CONFIG_HAVE_MLOCK=y -CONFIG_HAVE_MLOCKED_PAGE_BIT=y +# CONFIG_KSM is not set CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_TICK_ONESHOT=y # CONFIG_NO_HZ is not set @@ -165,6 +169,7 @@ CONFIG_KEXEC=y CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y # # General setup @@ -174,6 +179,14 @@ CONFIG_BROKEN_ON_SMP=y CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_LOCALVERSION="" # CONFIG_LOCALVERSION_AUTO is not set +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_BZIP2=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_LZO=y +# CONFIG_KERNEL_GZIP is not set +# CONFIG_KERNEL_BZIP2 is not set +CONFIG_KERNEL_LZMA=y +# CONFIG_KERNEL_LZO is not set CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y @@ -186,14 +199,12 @@ CONFIG_BSD_PROCESS_ACCT=y # # RCU Subsystem # -CONFIG_CLASSIC_RCU=y # CONFIG_TREE_RCU is not set -# CONFIG_PREEMPT_RCU is not set +# CONFIG_TREE_PREEMPT_RCU is not set +CONFIG_TINY_RCU=y # CONFIG_TREE_RCU_TRACE is not set -# CONFIG_PREEMPT_RCU_TRACE is not set # CONFIG_IKCONFIG is not set CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_GROUP_SCHED is not set # CONFIG_CGROUPS is not set CONFIG_SYSFS_DEPRECATED=y CONFIG_SYSFS_DEPRECATED_V2=y @@ -204,6 +215,7 @@ CONFIG_INITRAMFS_SOURCE="" CONFIG_RD_GZIP=y # CONFIG_RD_BZIP2 is not set CONFIG_RD_LZMA=y +# CONFIG_RD_LZO is not set CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL=y CONFIG_ANON_INODES=y @@ -225,19 +237,22 @@ CONFIG_SHMEM=y CONFIG_AIO=y # -# Performance Counters +# Kernel Performance Events And Counters # # CONFIG_VM_EVENT_COUNTERS is not set -CONFIG_STRIP_ASM_SYMS=y # CONFIG_COMPAT_BRK is not set CONFIG_SLAB=y # CONFIG_SLUB is not set # CONFIG_SLOB is not set # CONFIG_PROFILING is not set -# CONFIG_MARKERS is not set CONFIG_HAVE_OPROFILE=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set # CONFIG_SLOW_WORK is not set -# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y CONFIG_BASE_SMALL=0 @@ -248,7 +263,7 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set CONFIG_BLOCK=y -# CONFIG_LBD is not set +# CONFIG_LBDAF is not set # CONFIG_BLK_DEV_BSG is not set # CONFIG_BLK_DEV_INTEGRITY is not set @@ -256,14 +271,41 @@ CONFIG_BLOCK=y # IO Schedulers # CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_AS is not set CONFIG_IOSCHED_DEADLINE=y # CONFIG_IOSCHED_CFQ is not set -# CONFIG_DEFAULT_AS is not set CONFIG_DEFAULT_DEADLINE=y # CONFIG_DEFAULT_CFQ is not set # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="deadline" +# CONFIG_INLINE_SPIN_TRYLOCK is not set +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK is not set +# CONFIG_INLINE_SPIN_LOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set +CONFIG_INLINE_SPIN_UNLOCK=y +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_READ_TRYLOCK is not set +# CONFIG_INLINE_READ_LOCK is not set +# CONFIG_INLINE_READ_LOCK_BH is not set +# CONFIG_INLINE_READ_LOCK_IRQ is not set +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set +CONFIG_INLINE_READ_UNLOCK=y +# CONFIG_INLINE_READ_UNLOCK_BH is not set +CONFIG_INLINE_READ_UNLOCK_IRQ=y +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_WRITE_TRYLOCK is not set +# CONFIG_INLINE_WRITE_LOCK is not set +# CONFIG_INLINE_WRITE_LOCK_BH is not set +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set +CONFIG_INLINE_WRITE_UNLOCK=y +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set +# CONFIG_MUTEX_SPIN_ON_OWNER is not set # CONFIG_FREEZER is not set # @@ -293,7 +335,6 @@ CONFIG_NET=y # Networking options # CONFIG_PACKET=y -CONFIG_PACKET_MMAP=y CONFIG_UNIX=y # CONFIG_NET_KEY is not set CONFIG_INET=y @@ -377,6 +418,7 @@ CONFIG_NF_CONNTRACK_TFTP=m CONFIG_NETFILTER_XTABLES=m # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_CT is not set # CONFIG_NETFILTER_XT_TARGET_DSCP is not set # CONFIG_NETFILTER_XT_TARGET_HL is not set # CONFIG_NETFILTER_XT_TARGET_LED is not set @@ -458,6 +500,7 @@ CONFIG_IP_NF_RAW=m # CONFIG_IP_NF_ARPTABLES is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set # CONFIG_TIPC is not set CONFIG_ATM=m # CONFIG_ATM_CLIP is not set @@ -466,6 +509,7 @@ CONFIG_ATM_BR2684=m CONFIG_ATM_BR2684_IPFILTER=y CONFIG_STP=y CONFIG_BRIDGE=y +CONFIG_BRIDGE_IGMP_SNOOPING=y # CONFIG_NET_DSA is not set CONFIG_VLAN_8021Q=y # CONFIG_VLAN_8021Q_GVRP is not set @@ -541,20 +585,19 @@ CONFIG_HAMRADIO=y # CONFIG_AF_RXRPC is not set CONFIG_FIB_RULES=y CONFIG_WIRELESS=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y CONFIG_CFG80211=m +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set # CONFIG_CFG80211_REG_DEBUG is not set +CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set -# CONFIG_WIRELESS_OLD_REGULATORY is not set -CONFIG_WIRELESS_EXT=y +# CONFIG_CFG80211_INTERNAL_REGDB is not set +CONFIG_CFG80211_WEXT=y CONFIG_WIRELESS_EXT_SYSFS=y # CONFIG_LIB80211 is not set CONFIG_MAC80211=m -CONFIG_MAC80211_DEFAULT_PS=y -CONFIG_MAC80211_DEFAULT_PS_VALUE=1 - -# -# Rate control algorithm selection -# CONFIG_MAC80211_RC_PID=y CONFIG_MAC80211_RC_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT_PID=y @@ -576,6 +619,7 @@ CONFIG_MAC80211_RC_DEFAULT="pid" # Generic Driver Options # CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +# CONFIG_DEVTMPFS is not set CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=y @@ -585,9 +629,9 @@ CONFIG_EXTRA_FIRMWARE="" # CONFIG_CONNECTOR is not set CONFIG_MTD=y # CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_TESTS is not set # CONFIG_MTD_CONCAT is not set CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_TESTS is not set # CONFIG_MTD_REDBOOT_PARTS is not set # CONFIG_MTD_CMDLINE_PARTS is not set # CONFIG_MTD_AR7_PARTS is not set @@ -636,6 +680,7 @@ CONFIG_MTD_CFI_UTIL=y CONFIG_MTD_COMPLEX_MAPPINGS=y CONFIG_MTD_PHYSMAP=y # CONFIG_MTD_PHYSMAP_COMPAT is not set +# CONFIG_MTD_GPIO_ADDR is not set # CONFIG_MTD_PLATRAM is not set # @@ -668,6 +713,10 @@ CONFIG_MTD_PHYSMAP=y CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_COW_COMMON is not set # CONFIG_BLK_DEV_LOOP is not set + +# +# DRBD disabled because PROC_FS, INET or CONNECTOR not selected +# # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set # CONFIG_CDROM_PKTCDVD is not set @@ -687,6 +736,7 @@ CONFIG_HAVE_IDE=y # # SCSI device support # +CONFIG_SCSI_MOD=y # CONFIG_RAID_ATTRS is not set # CONFIG_SCSI is not set # CONFIG_SCSI_DMA is not set @@ -727,6 +777,7 @@ CONFIG_MII=y # CONFIG_SMC91X is not set # CONFIG_DM9000 is not set # CONFIG_ETHOC is not set +# CONFIG_SMSC911X is not set # CONFIG_DNET is not set # CONFIG_IBM_NEW_EMAC_ZMII is not set # CONFIG_IBM_NEW_EMAC_RGMII is not set @@ -737,23 +788,21 @@ CONFIG_MII=y # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set # CONFIG_B44 is not set # CONFIG_KS8842 is not set +# CONFIG_KS8851_MLL is not set CONFIG_CPMAC=y # CONFIG_NETDEV_1000 is not set # CONFIG_NETDEV_10000 is not set - -# -# Wireless LAN -# -# CONFIG_WLAN_PRE80211 is not set -CONFIG_WLAN_80211=y -# CONFIG_LIBERTAS is not set +CONFIG_WLAN=y # CONFIG_LIBERTAS_THINFIRM is not set # CONFIG_MAC80211_HWSIM is not set -# CONFIG_P54_COMMON is not set -# CONFIG_HOSTAP is not set +# CONFIG_ATH_COMMON is not set # CONFIG_B43 is not set # CONFIG_B43LEGACY is not set +# CONFIG_HOSTAP is not set +# CONFIG_LIBERTAS is not set +# CONFIG_P54_COMMON is not set # CONFIG_RT2X00 is not set +# CONFIG_WL12XX is not set # # Enable WiMAX (Networking options) to see the WiMAX drivers @@ -813,6 +862,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=2 # CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_TIMBERDALE is not set CONFIG_UNIX98_PTYS=y # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set # CONFIG_LEGACY_PTYS is not set @@ -824,11 +874,39 @@ CONFIG_HW_RANDOM=y # CONFIG_TCG_TPM is not set # CONFIG_I2C is not set # CONFIG_SPI is not set + +# +# PPS support +# +# CONFIG_PPS is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_SYSFS=y + +# +# Memory mapped GPIO expanders: +# +# CONFIG_GPIO_IT8761E is not set + +# +# I2C GPIO expanders: +# + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# + +# +# AC97 GPIO expanders: +# # CONFIG_W1 is not set # CONFIG_POWER_SUPPLY is not set # CONFIG_HWMON is not set # CONFIG_THERMAL is not set -# CONFIG_THERMAL_HWMON is not set CONFIG_WATCHDOG=y # CONFIG_WATCHDOG_NOWAYOUT is not set @@ -842,13 +920,7 @@ CONFIG_SSB_POSSIBLE=y # # Sonics Silicon Backplane # -CONFIG_SSB=y -# CONFIG_SSB_SILENT is not set -# CONFIG_SSB_DEBUG is not set -CONFIG_SSB_SERIAL=y -CONFIG_SSB_DRIVER_MIPS=y -CONFIG_SSB_EMBEDDED=y -CONFIG_SSB_DRIVER_EXTIF=y +# CONFIG_SSB is not set # # Multifunction device drivers @@ -882,15 +954,18 @@ CONFIG_LEDS_CLASS=y # # LED drivers # -# CONFIG_LEDS_GPIO is not set +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_GPIO_PLATFORM=y +# CONFIG_LEDS_LT3593 is not set +CONFIG_LEDS_TRIGGERS=y # # LED Triggers # -CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set CONFIG_LEDS_TRIGGER_DEFAULT_ON=y # @@ -921,6 +996,7 @@ CONFIG_VLYNQ=y # CONFIG_XFS_FS is not set # CONFIG_OCFS2_FS is not set # CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set CONFIG_FILE_LOCKING=y CONFIG_FSNOTIFY=y # CONFIG_DNOTIFY is not set @@ -984,6 +1060,7 @@ CONFIG_JFFS2_RTIME=y CONFIG_JFFS2_CMODE_PRIORITY=y # CONFIG_JFFS2_CMODE_SIZE is not set # CONFIG_JFFS2_CMODE_FAVOURLZO is not set +# CONFIG_LOGFS is not set # CONFIG_CRAMFS is not set CONFIG_SQUASHFS=y # CONFIG_SQUASHFS_EMBEDDED is not set @@ -996,11 +1073,11 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_ROMFS_FS is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set -# CONFIG_NILFS2_FS is not set CONFIG_NETWORK_FILESYSTEMS=y # CONFIG_NFS_FS is not set # CONFIG_NFSD is not set # CONFIG_SMB_FS is not set +# CONFIG_CEPH_FS is not set # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set @@ -1039,21 +1116,29 @@ CONFIG_ENABLE_WARN_DEPRECATED=y # CONFIG_ENABLE_MUST_CHECK is not set CONFIG_FRAME_WARN=1024 # CONFIG_MAGIC_SYSRQ is not set +CONFIG_STRIP_ASM_SYMS=y # CONFIG_UNUSED_SYMBOLS is not set CONFIG_DEBUG_FS=y # CONFIG_HEADERS_CHECK is not set # CONFIG_DEBUG_KERNEL is not set # CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_LKDTM is not set CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_TRACING_SUPPORT=y # CONFIG_FTRACE is not set # CONFIG_DYNAMIC_DEBUG is not set # CONFIG_SAMPLES is not set CONFIG_HAVE_ARCH_KGDB=y +CONFIG_EARLY_PRINTK=y CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="rootfstype=squashfs,jffs2" # CONFIG_CMDLINE_OVERRIDE is not set +# CONFIG_SPINLOCK_TEST is not set # # Security options @@ -1061,13 +1146,16 @@ CONFIG_CMDLINE="rootfstype=squashfs,jffs2" # CONFIG_KEYS is not set # CONFIG_SECURITY is not set # CONFIG_SECURITYFS is not set -# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set +# CONFIG_DEFAULT_SECURITY_SMACK is not set +# CONFIG_DEFAULT_SECURITY_TOMOYO is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" CONFIG_CRYPTO=y # # Crypto core or helper # -# CONFIG_CRYPTO_FIPS is not set CONFIG_CRYPTO_ALGAPI=m CONFIG_CRYPTO_ALGAPI2=m CONFIG_CRYPTO_AEAD2=m @@ -1108,11 +1196,13 @@ CONFIG_CRYPTO_ECB=m # # CONFIG_CRYPTO_HMAC is not set # CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set # # Digest # # CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_GHASH is not set # CONFIG_CRYPTO_MD4 is not set # CONFIG_CRYPTO_MD5 is not set # CONFIG_CRYPTO_MICHAEL_MIC is not set From f.fainelli@gmail.com Sun May 2 11:39:36 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 02 May 2010 11:39:44 +0200 (CEST) Received: from mail-wy0-f177.google.com ([74.125.82.177]:56484 "EHLO mail-wy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491901Ab0EBJjL (ORCPT ); Sun, 2 May 2010 11:39:11 +0200 Received: by wyg36 with SMTP id 36so777565wyg.36 for ; Sun, 02 May 2010 02:39:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:sender:from:date:subject :mime-version:x-uid:x-length:to:reply-to:content-type :content-transfer-encoding:message-id; bh=MAz+VIUoUdmk+3l949NKNLDxFC63WFcKyrHcvgdRqhY=; b=xvg9DT3Fas0P9rhZ90VjOhheAfMvIK8HhQK6t2aHxwTONp/B/CLk+WT3+jR92d9mOs SlBN9csbCC5eybmgyURCnQvr8Lpu6Lh/0TweeUixR3WV/LV6VcA7kYtCxAc4vJuLDRgQ w9cOFhmvUMi8aQtY5BBQBaobEjiZ6LUBLwJCc= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:date:subject:mime-version:x-uid:x-length:to:reply-to :content-type:content-transfer-encoding:message-id; b=kF2ndWvGwXhJihb0avb16P9+pdXOgaLKTTpe5zh6Nfr9Y7rTomRcckAA5oloZ+RwEO rfAW+R4IF8Ru65ESAgss1tkte6FgtlWiZmjg6x8tUuP0duMq2yxDJcpJJYyQIx3dAn4n TQXavgI51w2k7qt5/p7S93U42qmwE/Ans6w8I= Received: by 10.216.160.12 with SMTP id t12mr10497875wek.154.1272793145423; Sun, 02 May 2010 02:39:05 -0700 (PDT) Received: from lenovo.localnet (208.59.76-86.rev.gaoland.net [86.76.59.208]) by mx.google.com with ESMTPS id z33sm10094543wbd.13.2010.05.02.02.39.03 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sun, 02 May 2010 02:39:04 -0700 (PDT) From: Florian Fainelli Date: Sun, 2 May 2010 11:39:02 +0200 Subject: [PATCH 2/4] RB532: update defconfig MIME-Version: 1.0 X-UID: 187 X-Length: 35268 To: linux-mips@linux-mips.org, Ralf Baechle Reply-To: Florian Fainelli Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201005021139.02260.florian@openwrt.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26544 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips This updates the Mikrotik RB532 defconfig with: - tiny RCU - RB532 input buttons driver - RB532 LED driver - RC32434 watchdog driver - GPIO sysfs support - Wireless support - SquashFS support - more LED triggers Signed-off-by: Florian Fainelli --- diff --git a/arch/mips/configs/rb532_defconfig b/arch/mips/configs/rb532_defconfig index 57a5048..90a032a 100644 --- a/arch/mips/configs/rb532_defconfig +++ b/arch/mips/configs/rb532_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.25 -# Mon Apr 28 12:24:17 2008 +# Linux kernel version: 2.6.34-rc6 +# Sat May 1 11:49:51 2010 # CONFIG_MIPS=y @@ -9,22 +9,25 @@ CONFIG_MIPS=y # Machine selection # # CONFIG_MACH_ALCHEMY is not set +# CONFIG_AR7 is not set # CONFIG_BCM47XX is not set +# CONFIG_BCM63XX is not set # CONFIG_MIPS_COBALT is not set # CONFIG_MACH_DECSTATION is not set # CONFIG_MACH_JAZZ is not set # CONFIG_LASAT is not set -# CONFIG_LEMOTE_FULONG is not set -# CONFIG_MIPS_ATLAS is not set +# CONFIG_MACH_LOONGSON is not set # CONFIG_MIPS_MALTA is not set -# CONFIG_MIPS_SEAD is not set # CONFIG_MIPS_SIM is not set -# CONFIG_MARKEINS is not set +# CONFIG_NEC_MARKEINS is not set # CONFIG_MACH_VR41XX is not set +# CONFIG_NXP_STB220 is not set +# CONFIG_NXP_STB225 is not set # CONFIG_PNX8550_JBS is not set # CONFIG_PNX8550_STB810 is not set # CONFIG_PMC_MSP is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_POWERTV is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP28 is not set @@ -38,11 +41,14 @@ CONFIG_MIPS=y # CONFIG_SIBYTE_SENTOSA is not set # CONFIG_SIBYTE_BIGSUR is not set # CONFIG_SNI_RM is not set -# CONFIG_TOSHIBA_JMR3927 is not set +# CONFIG_MACH_TX39XX is not set +# CONFIG_MACH_TX49XX is not set CONFIG_MIKROTIK_RB532=y -# CONFIG_TOSHIBA_RBTX4927 is not set -# CONFIG_TOSHIBA_RBTX4938 is not set # CONFIG_WR_PPMC is not set +# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set +# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set +# CONFIG_ALCHEMY_GPIO_INDIRECT is not set +CONFIG_LOONGSON_UART_BASE=y CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_ARCH_HAS_ILOG2_U32 is not set # CONFIG_ARCH_HAS_ILOG2_U64 is not set @@ -53,14 +59,15 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_TIME=y CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_SCHED_OMIT_FRAME_POINTER=y CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y CONFIG_BOOT_RAW=y +CONFIG_CEVT_R4K_LIB=y CONFIG_CEVT_R4K=y +CONFIG_CSRC_R4K_LIB=y CONFIG_CSRC_R4K=y CONFIG_DMA_NONCOHERENT=y -CONFIG_DMA_NEED_PCI_MAP_STATE=y -# CONFIG_HOTPLUG_CPU is not set +CONFIG_NEED_DMA_MAP_STATE=y # CONFIG_NO_IOPORT is not set CONFIG_GENERIC_GPIO=y # CONFIG_CPU_BIG_ENDIAN is not set @@ -73,7 +80,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=4 # # CPU selection # -# CONFIG_CPU_LOONGSON2 is not set +# CONFIG_CPU_LOONGSON2E is not set +# CONFIG_CPU_LOONGSON2F is not set CONFIG_CPU_MIPS32_R1=y # CONFIG_CPU_MIPS32_R2 is not set # CONFIG_CPU_MIPS64_R1 is not set @@ -86,6 +94,7 @@ CONFIG_CPU_MIPS32_R1=y # CONFIG_CPU_TX49XX is not set # CONFIG_CPU_R5000 is not set # CONFIG_CPU_R5432 is not set +# CONFIG_CPU_R5500 is not set # CONFIG_CPU_R6000 is not set # CONFIG_CPU_NEVADA is not set # CONFIG_CPU_R8000 is not set @@ -93,11 +102,13 @@ CONFIG_CPU_MIPS32_R1=y # CONFIG_CPU_RM7000 is not set # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set +# CONFIG_CPU_CAVIUM_OCTEON is not set CONFIG_SYS_HAS_CPU_MIPS32_R1=y CONFIG_CPU_MIPS32=y CONFIG_CPU_MIPSR1=y CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_HARDWARE_WATCHPOINTS=y # # Kernel type @@ -107,11 +118,13 @@ CONFIG_32BIT=y CONFIG_PAGE_SIZE_4KB=y # CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set +# CONFIG_PAGE_SIZE_32KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_CPU_HAS_PREFETCH=y CONFIG_MIPS_MT_DISABLED=y # CONFIG_MIPS_MT_SMP is not set # CONFIG_MIPS_MT_SMTC is not set +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y @@ -124,12 +137,13 @@ CONFIG_FLATMEM_MANUAL=y # CONFIG_SPARSEMEM_MANUAL is not set CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_RESOURCES_64BIT is not set +# CONFIG_PHYS_ADDR_T_64BIT is not set CONFIG_ZONE_DMA_FLAG=0 CONFIG_VIRT_TO_BUS=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_TICK_ONESHOT=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y @@ -151,6 +165,7 @@ CONFIG_PREEMPT_NONE=y CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y # # General setup @@ -168,23 +183,31 @@ CONFIG_BSD_PROCESS_ACCT=y # CONFIG_BSD_PROCESS_ACCT_V3 is not set # CONFIG_TASKSTATS is not set # CONFIG_AUDIT is not set + +# +# RCU Subsystem +# +# CONFIG_TREE_RCU is not set +# CONFIG_TREE_PREEMPT_RCU is not set +CONFIG_TINY_RCU=y +# CONFIG_TREE_RCU_TRACE is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 # CONFIG_CGROUPS is not set -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set CONFIG_SYSFS_DEPRECATED=y CONFIG_SYSFS_DEPRECATED_V2=y # CONFIG_RELAY is not set # CONFIG_NAMESPACES is not set CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +# CONFIG_RD_LZO is not set CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y CONFIG_EMBEDDED=y CONFIG_SYSCTL_SYSCALL=y # CONFIG_KALLSYMS is not set @@ -192,54 +215,87 @@ CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y # CONFIG_ELF_CORE is not set -CONFIG_COMPAT_BRK=y +CONFIG_PCSPKR_PLATFORM=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y -CONFIG_ANON_INODES=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y +CONFIG_AIO=y + +# +# Kernel Performance Events And Counters +# # CONFIG_VM_EVENT_COUNTERS is not set +# CONFIG_PCI_QUIRKS is not set +CONFIG_COMPAT_BRK=y CONFIG_SLAB=y # CONFIG_SLUB is not set # CONFIG_SLOB is not set # CONFIG_PROFILING is not set -# CONFIG_MARKERS is not set CONFIG_HAVE_OPROFILE=y -# CONFIG_HAVE_KPROBES is not set -# CONFIG_HAVE_KRETPROBES is not set -CONFIG_PROC_PAGE_MONITOR=y + +# +# GCOV-based kernel profiling +# +# CONFIG_SLOW_WORK is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y -# CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set -# CONFIG_KMOD is not set CONFIG_BLOCK=y -# CONFIG_LBD is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_LSF is not set +# CONFIG_LBDAF is not set # CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set # # IO Schedulers # CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_AS is not set CONFIG_IOSCHED_DEADLINE=y # CONFIG_IOSCHED_CFQ is not set -# CONFIG_DEFAULT_AS is not set CONFIG_DEFAULT_DEADLINE=y # CONFIG_DEFAULT_CFQ is not set # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="deadline" -CONFIG_CLASSIC_RCU=y +# CONFIG_INLINE_SPIN_TRYLOCK is not set +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK is not set +# CONFIG_INLINE_SPIN_LOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set +CONFIG_INLINE_SPIN_UNLOCK=y +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_READ_TRYLOCK is not set +# CONFIG_INLINE_READ_LOCK is not set +# CONFIG_INLINE_READ_LOCK_BH is not set +# CONFIG_INLINE_READ_LOCK_IRQ is not set +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set +CONFIG_INLINE_READ_UNLOCK=y +# CONFIG_INLINE_READ_UNLOCK_BH is not set +CONFIG_INLINE_READ_UNLOCK_IRQ=y +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_WRITE_TRYLOCK is not set +# CONFIG_INLINE_WRITE_LOCK is not set +# CONFIG_INLINE_WRITE_LOCK_BH is not set +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set +CONFIG_INLINE_WRITE_UNLOCK=y +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set +# CONFIG_MUTEX_SPIN_ON_OWNER is not set +# CONFIG_FREEZER is not set # # Bus options (PCI, PCMCIA, EISA, ISA, TC) @@ -248,7 +304,8 @@ CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_DOMAINS=y # CONFIG_ARCH_SUPPORTS_MSI is not set -CONFIG_PCI_LEGACY=y +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_IOV is not set CONFIG_MMU=y # CONFIG_PCCARD is not set # CONFIG_HOTPLUG_PCI is not set @@ -257,25 +314,22 @@ CONFIG_MMU=y # Executable file formats # CONFIG_BINFMT_ELF=y +# CONFIG_HAVE_AOUT is not set # CONFIG_BINFMT_MISC is not set CONFIG_TRAD_SIGNALS=y # # Power management options # +CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_SUSPEND_POSSIBLE=y # CONFIG_PM is not set - -# -# Networking -# CONFIG_NET=y # # Networking options # CONFIG_PACKET=y -CONFIG_PACKET_MMAP=y CONFIG_UNIX=y # CONFIG_NET_KEY is not set CONFIG_INET=y @@ -325,7 +379,6 @@ CONFIG_DEFAULT_VEGAS=y # CONFIG_DEFAULT_RENO is not set CONFIG_DEFAULT_TCP_CONG="vegas" # CONFIG_TCP_MD5SIG is not set -# CONFIG_IP_VS is not set # CONFIG_IPV6 is not set # CONFIG_NETWORK_SECMARK is not set CONFIG_NETFILTER=y @@ -336,8 +389,9 @@ CONFIG_NETFILTER_ADVANCED=y # # Core Netfilter Configuration # +CONFIG_NETFILTER_NETLINK=m # CONFIG_NETFILTER_NETLINK_QUEUE is not set -# CONFIG_NETFILTER_NETLINK_LOG is not set +CONFIG_NETFILTER_NETLINK_LOG=m CONFIG_NF_CONNTRACK=y CONFIG_NF_CT_ACCT=y CONFIG_NF_CONNTRACK_MARK=y @@ -355,18 +409,23 @@ CONFIG_NF_CONNTRACK_IRC=m # CONFIG_NF_CONNTRACK_SIP is not set CONFIG_NF_CONNTRACK_TFTP=m # CONFIG_NF_CT_NETLINK is not set +# CONFIG_NETFILTER_TPROXY is not set CONFIG_NETFILTER_XTABLES=y # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_CT is not set # CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_HL is not set +# CONFIG_NETFILTER_XT_TARGET_LED is not set # CONFIG_NETFILTER_XT_TARGET_MARK is not set -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m CONFIG_NETFILTER_XT_TARGET_NFLOG=m +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set CONFIG_NETFILTER_XT_TARGET_TRACE=m # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set CONFIG_NETFILTER_XT_MATCH_COMMENT=m # CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m @@ -375,18 +434,21 @@ CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m CONFIG_NETFILTER_XT_MATCH_DCCP=m # CONFIG_NETFILTER_XT_MATCH_DSCP is not set # CONFIG_NETFILTER_XT_MATCH_ESP is not set +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m # CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set # CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set # CONFIG_NETFILTER_XT_MATCH_LENGTH is not set CONFIG_NETFILTER_XT_MATCH_LIMIT=y # CONFIG_NETFILTER_XT_MATCH_MAC is not set # CONFIG_NETFILTER_XT_MATCH_MARK is not set -# CONFIG_NETFILTER_XT_MATCH_OWNER is not set CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set # CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set # CONFIG_NETFILTER_XT_MATCH_QUOTA is not set # CONFIG_NETFILTER_XT_MATCH_RATEEST is not set CONFIG_NETFILTER_XT_MATCH_REALM=m +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set CONFIG_NETFILTER_XT_MATCH_SCTP=m CONFIG_NETFILTER_XT_MATCH_STATE=y # CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set @@ -394,20 +456,21 @@ CONFIG_NETFILTER_XT_MATCH_STATE=y # CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set # CONFIG_NETFILTER_XT_MATCH_TIME is not set CONFIG_NETFILTER_XT_MATCH_U32=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +# CONFIG_IP_VS is not set # # IP: Netfilter Configuration # +CONFIG_NF_DEFRAG_IPV4=y CONFIG_NF_CONNTRACK_IPV4=y CONFIG_NF_CONNTRACK_PROC_COMPAT=y # CONFIG_IP_NF_QUEUE is not set CONFIG_IP_NF_IPTABLES=y -# CONFIG_IP_NF_MATCH_RECENT is not set -# CONFIG_IP_NF_MATCH_ECN is not set +CONFIG_IP_NF_MATCH_ADDRTYPE=m # CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set # CONFIG_IP_NF_MATCH_TTL is not set -CONFIG_IP_NF_MATCH_ADDRTYPE=m CONFIG_IP_NF_FILTER=y CONFIG_IP_NF_TARGET_REJECT=y # CONFIG_IP_NF_TARGET_LOG is not set @@ -415,8 +478,8 @@ CONFIG_IP_NF_TARGET_REJECT=y CONFIG_NF_NAT=y CONFIG_NF_NAT_NEEDED=y CONFIG_IP_NF_TARGET_MASQUERADE=y -# CONFIG_IP_NF_TARGET_REDIRECT is not set # CONFIG_IP_NF_TARGET_NETMAP is not set +# CONFIG_IP_NF_TARGET_REDIRECT is not set # CONFIG_NF_NAT_SNMP_BASIC is not set CONFIG_NF_NAT_FTP=m CONFIG_NF_NAT_IRC=m @@ -426,17 +489,22 @@ CONFIG_NF_NAT_TFTP=m # CONFIG_NF_NAT_H323 is not set # CONFIG_NF_NAT_SIP is not set CONFIG_IP_NF_MANGLE=y +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set # CONFIG_IP_NF_TARGET_ECN is not set # CONFIG_IP_NF_TARGET_TTL is not set -# CONFIG_IP_NF_TARGET_CLUSTERIP is not set CONFIG_IP_NF_RAW=m # CONFIG_IP_NF_ARPTABLES is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set # CONFIG_TIPC is not set # CONFIG_ATM is not set +CONFIG_STP=y CONFIG_BRIDGE=y +CONFIG_BRIDGE_IGMP_SNOOPING=y +# CONFIG_NET_DSA is not set CONFIG_VLAN_8021Q=y +# CONFIG_VLAN_8021Q_GVRP is not set # CONFIG_DECNET is not set CONFIG_LLC=y CONFIG_LLC2=m @@ -446,6 +514,8 @@ CONFIG_LLC2=m # CONFIG_LAPB is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set CONFIG_NET_SCHED=y # @@ -455,7 +525,7 @@ CONFIG_NET_SCH_CBQ=m # CONFIG_NET_SCH_HTB is not set # CONFIG_NET_SCH_HFSC is not set CONFIG_NET_SCH_PRIO=m -CONFIG_NET_SCH_RR=m +# CONFIG_NET_SCH_MULTIQ is not set # CONFIG_NET_SCH_RED is not set # CONFIG_NET_SCH_SFQ is not set # CONFIG_NET_SCH_TEQL is not set @@ -463,6 +533,7 @@ CONFIG_NET_SCH_RR=m # CONFIG_NET_SCH_GRED is not set # CONFIG_NET_SCH_DSMARK is not set CONFIG_NET_SCH_NETEM=m +# CONFIG_NET_SCH_DRR is not set # CONFIG_NET_SCH_INGRESS is not set # @@ -496,8 +567,10 @@ CONFIG_NET_ACT_IPT=m # CONFIG_NET_ACT_NAT is not set CONFIG_NET_ACT_PEDIT=m # CONFIG_NET_ACT_SIMP is not set +# CONFIG_NET_ACT_SKBEDIT is not set CONFIG_NET_CLS_IND=y CONFIG_NET_SCH_FIFO=y +# CONFIG_DCB is not set # # Network testing @@ -514,14 +587,19 @@ CONFIG_HAMRADIO=y # CONFIG_BT is not set # CONFIG_AF_RXRPC is not set CONFIG_FIB_RULES=y +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_PRIV=y +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_EXT_SYSFS=y +# CONFIG_LIB80211 is not set # -# Wireless +# CFG80211 needs to be enabled for MAC80211 # -# CONFIG_CFG80211 is not set -CONFIG_WIRELESS_EXT=y -# CONFIG_MAC80211 is not set -# CONFIG_IEEE80211 is not set +# CONFIG_WIMAX is not set # CONFIG_RFKILL is not set # CONFIG_NET_9P is not set @@ -533,13 +611,17 @@ CONFIG_WIRELESS_EXT=y # Generic Driver Options # CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +# CONFIG_DEVTMPFS is not set CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" # CONFIG_SYS_HYPERVISOR is not set # CONFIG_CONNECTOR is not set CONFIG_MTD=y # CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_TESTS is not set # CONFIG_MTD_CONCAT is not set CONFIG_MTD_PARTITIONS=y # CONFIG_MTD_REDBOOT_PARTS is not set @@ -612,6 +694,11 @@ CONFIG_MTD_NAND_PLATFORM=y # CONFIG_MTD_ONENAND is not set # +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# # UBI - Unsorted block images # # CONFIG_MTD_UBI is not set @@ -623,23 +710,36 @@ CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_UMEM is not set # CONFIG_BLK_DEV_COW_COMMON is not set # CONFIG_BLK_DEV_LOOP is not set + +# +# DRBD disabled because PROC_FS, INET or CONNECTOR not selected +# # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_RAM is not set # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set +# CONFIG_BLK_DEV_HD is not set CONFIG_MISC_DEVICES=y # CONFIG_PHANTOM is not set -# CONFIG_EEPROM_93CX6 is not set # CONFIG_SGI_IOC4 is not set # CONFIG_TIFM_CORE is not set # CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_CB710_CORE is not set CONFIG_HAVE_IDE=y # CONFIG_IDE is not set # # SCSI device support # +CONFIG_SCSI_MOD=y # CONFIG_RAID_ATTRS is not set CONFIG_SCSI=y CONFIG_SCSI_DMA=y @@ -656,10 +756,6 @@ CONFIG_SCSI_PROC_FS=y # CONFIG_BLK_DEV_SR is not set # CONFIG_CHR_DEV_SG is not set # CONFIG_CHR_DEV_SCH is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# # CONFIG_SCSI_MULTI_LUN is not set # CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_LOGGING is not set @@ -676,27 +772,35 @@ CONFIG_SCSI_WAIT_SCAN=m # CONFIG_SCSI_SRP_ATTRS is not set CONFIG_SCSI_LOWLEVEL=y # CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set # CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set # CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set # CONFIG_SCSI_ACARD is not set # CONFIG_SCSI_AACRAID is not set # CONFIG_SCSI_AIC7XXX is not set # CONFIG_SCSI_AIC7XXX_OLD is not set # CONFIG_SCSI_AIC79XX is not set # CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_MVSAS is not set # CONFIG_SCSI_DPT_I2O is not set # CONFIG_SCSI_ADVANSYS is not set # CONFIG_SCSI_ARCMSR is not set # CONFIG_MEGARAID_NEWGEN is not set # CONFIG_MEGARAID_LEGACY is not set # CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT2SAS is not set # CONFIG_SCSI_HPTIOP is not set +# CONFIG_LIBFC is not set +# CONFIG_LIBFCOE is not set +# CONFIG_FCOE is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_FUTURE_DOMAIN is not set # CONFIG_SCSI_IPS is not set # CONFIG_SCSI_INITIO is not set # CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_MVSAS is not set # CONFIG_SCSI_STEX is not set # CONFIG_SCSI_SYM53C8XX_2 is not set # CONFIG_SCSI_IPR is not set @@ -708,9 +812,15 @@ CONFIG_SCSI_LOWLEVEL=y # CONFIG_SCSI_DC390T is not set # CONFIG_SCSI_NSP32 is not set # CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set # CONFIG_SCSI_SRP is not set +# CONFIG_SCSI_BFA_FC is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set CONFIG_ATA=y # CONFIG_ATA_NONSTANDARD is not set +# CONFIG_ATA_VERBOSE_ERROR is not set # CONFIG_SATA_PMP is not set # CONFIG_SATA_AHCI is not set # CONFIG_SATA_SIL24 is not set @@ -732,6 +842,7 @@ CONFIG_ATA_SFF=y # CONFIG_PATA_ALI is not set # CONFIG_PATA_AMD is not set # CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATP867X is not set # CONFIG_PATA_ATIIXP is not set # CONFIG_PATA_CMD640_PCI is not set # CONFIG_PATA_CMD64X is not set @@ -747,6 +858,7 @@ CONFIG_ATA_SFF=y # CONFIG_PATA_IT821X is not set # CONFIG_PATA_IT8213 is not set # CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_LEGACY is not set # CONFIG_PATA_TRIFLEX is not set # CONFIG_PATA_MARVELL is not set # CONFIG_PATA_MPIIX is not set @@ -757,29 +869,39 @@ CONFIG_ATA_SFF=y # CONFIG_PATA_NS87415 is not set # CONFIG_PATA_OPTI is not set # CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set # CONFIG_PATA_PDC_OLD is not set # CONFIG_PATA_RADISYS is not set CONFIG_PATA_RB532=y +# CONFIG_PATA_RDC is not set # CONFIG_PATA_RZ1000 is not set # CONFIG_PATA_SC1200 is not set # CONFIG_PATA_SERVERWORKS is not set -# CONFIG_PATA_PDC2027X is not set # CONFIG_PATA_SIL680 is not set # CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set # CONFIG_PATA_VIA is not set # CONFIG_PATA_WINBOND is not set # CONFIG_PATA_PLATFORM is not set +# CONFIG_PATA_SCH is not set # CONFIG_MD is not set # CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support # + +# +# You can enable one or both FireWire driver stacks. +# + +# +# The newer stack is recommended. +# # CONFIG_FIREWIRE is not set # CONFIG_IEEE1394 is not set # CONFIG_I2O is not set CONFIG_NETDEVICES=y -# CONFIG_NETDEVICES_MULTIQUEUE is not set CONFIG_IFB=m # CONFIG_DUMMY is not set # CONFIG_BONDING is not set @@ -797,21 +919,28 @@ CONFIG_KORINA=y # CONFIG_SUNGEM is not set # CONFIG_CASSINI is not set # CONFIG_NET_VENDOR_3COM is not set +# CONFIG_SMC91X is not set # CONFIG_DM9000 is not set +# CONFIG_ETHOC is not set +# CONFIG_SMSC911X is not set +# CONFIG_DNET is not set # CONFIG_NET_TULIP is not set # CONFIG_HP100 is not set # CONFIG_IBM_NEW_EMAC_ZMII is not set # CONFIG_IBM_NEW_EMAC_RGMII is not set # CONFIG_IBM_NEW_EMAC_TAH is not set # CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set CONFIG_NET_PCI=y # CONFIG_PCNET32 is not set # CONFIG_AMD8111_ETH is not set # CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_KSZ884X_PCI is not set # CONFIG_B44 is not set # CONFIG_FORCEDETH is not set # CONFIG_TC35815 is not set -# CONFIG_EEPRO100 is not set # CONFIG_E100 is not set # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set @@ -821,30 +950,27 @@ CONFIG_NET_PCI=y # CONFIG_R6040 is not set # CONFIG_SIS900 is not set # CONFIG_EPIC100 is not set +# CONFIG_SMSC9420 is not set # CONFIG_SUNDANCE is not set # CONFIG_TLAN is not set +# CONFIG_KS8842 is not set +# CONFIG_KS8851_MLL is not set CONFIG_VIA_RHINE=y # CONFIG_VIA_RHINE_MMIO is not set -CONFIG_VIA_RHINE_NAPI=y # CONFIG_SC92031 is not set +# CONFIG_ATL2 is not set # CONFIG_NETDEV_1000 is not set # CONFIG_NETDEV_10000 is not set # CONFIG_TR is not set - -# -# Wireless LAN -# -# CONFIG_WLAN_PRE80211 is not set -CONFIG_WLAN_80211=y -# CONFIG_IPW2100 is not set -# CONFIG_IPW2200 is not set -# CONFIG_LIBERTAS is not set -# CONFIG_HERMES is not set +CONFIG_WLAN=y CONFIG_ATMEL=m # CONFIG_PCI_ATMEL is not set # CONFIG_PRISM54 is not set -# CONFIG_IWLWIFI_LEDS is not set # CONFIG_HOSTAP is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# # CONFIG_WAN is not set # CONFIG_FDDI is not set # CONFIG_HIPPI is not set @@ -864,6 +990,7 @@ CONFIG_SLHC=m # CONFIG_NETCONSOLE is not set # CONFIG_NETPOLL is not set # CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_VMXNET3 is not set # CONFIG_ISDN is not set # CONFIG_PHONE is not set @@ -872,7 +999,8 @@ CONFIG_SLHC=m # CONFIG_INPUT=y # CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set +CONFIG_INPUT_POLLDEV=y +# CONFIG_INPUT_SPARSEKMAP is not set # # Userland interfaces @@ -887,17 +1015,29 @@ CONFIG_INPUT=y # CONFIG_INPUT_KEYBOARD=y # CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_KEYBOARD_SUNKBD is not set # CONFIG_KEYBOARD_LKKBD is not set -# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_KEYBOARD_MATRIX is not set # CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_INPUT_JOYSTICK is not set # CONFIG_INPUT_TABLET is not set # CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_PCSPKR is not set +# CONFIG_INPUT_ATI_REMOTE is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_UINPUT is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +CONFIG_INPUT_RB532_BUTTON=y # # Hardware I/O ports @@ -909,6 +1049,7 @@ CONFIG_INPUT_KEYBOARD=y # Character devices # # CONFIG_VT is not set +CONFIG_DEVKMEM=y # CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_NOZOMI is not set @@ -928,105 +1069,95 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=2 CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y # CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_TIMBERDALE is not set CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set # CONFIG_LEGACY_PTYS is not set # CONFIG_IPMI_HANDLER is not set CONFIG_HW_RANDOM=y -# CONFIG_RTC is not set +# CONFIG_HW_RANDOM_TIMERIOMEM is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set # CONFIG_RAW_DRIVER is not set # CONFIG_TCG_TPM is not set CONFIG_DEVPORT=y # CONFIG_I2C is not set - -# -# SPI support -# # CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_HWMON is not set -# CONFIG_THERMAL is not set -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_NOWAYOUT is not set # -# Watchdog Device Drivers +# PPS support # -# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_PPS is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_SYSFS=y # -# PCI-based Watchdog Cards +# Memory mapped GPIO expanders: # -# CONFIG_PCIPCWATCHDOG is not set -# CONFIG_WDTPCI is not set +# CONFIG_GPIO_IT8761E is not set +# CONFIG_GPIO_SCH is not set # -# Sonics Silicon Backplane +# I2C GPIO expanders: # -CONFIG_SSB_POSSIBLE=y -# CONFIG_SSB is not set # -# Multifunction device drivers -# -# CONFIG_MFD_SM501 is not set -# CONFIG_HTC_PASIC3 is not set - -# -# Multimedia devices -# -CONFIG_VIDEO_DEV=m -CONFIG_VIDEO_V4L2_COMMON=m -CONFIG_VIDEO_ALLOW_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -CONFIG_VIDEO_V4L2=m -CONFIG_VIDEO_V4L1=m -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set - -# -# Encoders/decoders and other helper chips +# PCI GPIO expanders: # +# CONFIG_GPIO_CS5535 is not set +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_LANGWELL is not set # -# Audio decoders +# SPI GPIO expanders: # # -# Video decoders +# AC97 GPIO expanders: # +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y # -# Video and audio decoders +# Watchdog Device Drivers # +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_ALIM7101_WDT is not set +CONFIG_RC32434_WDT=y # -# MPEG video encoders +# PCI-based Watchdog Cards # -# CONFIG_VIDEO_CX2341X is not set +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set +CONFIG_SSB_POSSIBLE=y # -# Video encoders +# Sonics Silicon Backplane # +# CONFIG_SSB is not set # -# Video improvement chips +# Multifunction device drivers # -# CONFIG_VIDEO_VIVI is not set -# CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_STRADIS is not set -# CONFIG_SOC_CAMERA is not set -# CONFIG_RADIO_ADAPTERS is not set -# CONFIG_DVB_CORE is not set -# CONFIG_DAB is not set +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_TIMBERDALE is not set +# CONFIG_LPC_SCH is not set +# CONFIG_REGULATOR is not set +# CONFIG_MEDIA_SUPPORT is not set # # Graphics support # +# CONFIG_VGA_ARB is not set # CONFIG_DRM is not set # CONFIG_VGASTATE is not set # CONFIG_VIDEO_OUTPUT_CONTROL is not set @@ -1037,13 +1168,10 @@ CONFIG_VIDEO_CAPTURE_DRIVERS=y # Display device support # # CONFIG_DISPLAY_SUPPORT is not set - -# -# Sound -# # CONFIG_SOUND is not set CONFIG_HID_SUPPORT=y # CONFIG_HID is not set +# CONFIG_HID_PID is not set CONFIG_USB_SUPPORT=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y @@ -1053,9 +1181,18 @@ CONFIG_USB_ARCH_HAS_EHCI=y # CONFIG_USB_OTG_BLACKLIST_HUB is not set # -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# Enable Host or Gadget support to see Inventra options +# + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may # # CONFIG_USB_GADGET is not set + +# +# OTG and related infrastructure +# +# CONFIG_UWB is not set # CONFIG_MMC is not set # CONFIG_MEMSTICK is not set CONFIG_NEW_LEDS=y @@ -1064,41 +1201,67 @@ CONFIG_LEDS_CLASS=y # # LED drivers # +CONFIG_LEDS_MIKROTIK_RB532=y # CONFIG_LEDS_GPIO is not set +# CONFIG_LEDS_LT3593 is not set +CONFIG_LEDS_TRIGGERS=y # # LED Triggers # -CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y -# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_ACCESSIBILITY is not set # CONFIG_INFINIBAND is not set CONFIG_RTC_LIB=y # CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set # CONFIG_UIO is not set # +# TI VLYNQ +# +# CONFIG_STAGING is not set + +# # File systems # CONFIG_EXT2_FS=y # CONFIG_EXT2_FS_XATTR is not set # CONFIG_EXT2_FS_XIP is not set # CONFIG_EXT3_FS is not set -# CONFIG_EXT4DEV_FS is not set +# CONFIG_EXT4_FS is not set # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set # CONFIG_FS_POSIX_ACL is not set # CONFIG_XFS_FS is not set # CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y # CONFIG_DNOTIFY is not set # CONFIG_INOTIFY is not set +CONFIG_INOTIFY_USER=y # CONFIG_QUOTA is not set # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set # CONFIG_FUSE_FS is not set # +# Caches +# +# CONFIG_FSCACHE is not set + +# # CD-ROM/DVD Filesystems # # CONFIG_ISO9660_FS is not set @@ -1117,15 +1280,13 @@ CONFIG_EXT2_FS=y CONFIG_PROC_FS=y CONFIG_PROC_KCORE=y CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y CONFIG_SYSFS=y CONFIG_TMPFS=y # CONFIG_TMPFS_POSIX_ACL is not set # CONFIG_HUGETLB_PAGE is not set CONFIG_CONFIGFS_FS=y - -# -# Miscellaneous filesystems -# +CONFIG_MISC_FILESYSTEMS=y # CONFIG_ADFS_FS is not set # CONFIG_AFFS_FS is not set # CONFIG_HFS_FS is not set @@ -1148,9 +1309,14 @@ CONFIG_JFFS2_RTIME=y CONFIG_JFFS2_CMODE_PRIORITY=y # CONFIG_JFFS2_CMODE_SIZE is not set # CONFIG_JFFS2_CMODE_FAVOURLZO is not set +# CONFIG_LOGFS is not set # CONFIG_CRAMFS is not set +CONFIG_SQUASHFS=y +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_VXFS_FS is not set # CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set # CONFIG_ROMFS_FS is not set @@ -1160,6 +1326,7 @@ CONFIG_NETWORK_FILESYSTEMS=y # CONFIG_NFS_FS is not set # CONFIG_NFSD is not set # CONFIG_SMB_FS is not set +# CONFIG_CEPH_FS is not set # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set @@ -1198,11 +1365,22 @@ CONFIG_ENABLE_WARN_DEPRECATED=y # CONFIG_ENABLE_MUST_CHECK is not set CONFIG_FRAME_WARN=1024 # CONFIG_MAGIC_SYSRQ is not set +CONFIG_STRIP_ASM_SYMS=y # CONFIG_UNUSED_SYMBOLS is not set # CONFIG_DEBUG_FS is not set # CONFIG_HEADERS_CHECK is not set # CONFIG_DEBUG_KERNEL is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_SYSCTL_SYSCALL_CHECK is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set # CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y # CONFIG_CMDLINE_BOOL is not set # @@ -1210,18 +1388,32 @@ CONFIG_FRAME_WARN=1024 # # CONFIG_KEYS is not set # CONFIG_SECURITY is not set -# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_SECURITYFS is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set +# CONFIG_DEFAULT_SECURITY_SMACK is not set +# CONFIG_DEFAULT_SECURITY_TOMOYO is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" CONFIG_CRYPTO=y # # Crypto core or helper # +# CONFIG_CRYPTO_FIPS is not set CONFIG_CRYPTO_ALGAPI=m -CONFIG_CRYPTO_AEAD=m -CONFIG_CRYPTO_BLKCIPHER=m -# CONFIG_CRYPTO_MANAGER is not set +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD2=m +CONFIG_CRYPTO_BLKCIPHER2=m +CONFIG_CRYPTO_HASH=m +CONFIG_CRYPTO_HASH2=m +CONFIG_CRYPTO_RNG=m +CONFIG_CRYPTO_RNG2=m +CONFIG_CRYPTO_PCOMP=y +CONFIG_CRYPTO_MANAGER=m +CONFIG_CRYPTO_MANAGER2=m # CONFIG_CRYPTO_GF128MUL is not set # CONFIG_CRYPTO_NULL is not set +CONFIG_CRYPTO_WORKQUEUE=m # CONFIG_CRYPTO_CRYPTD is not set # CONFIG_CRYPTO_AUTHENC is not set CONFIG_CRYPTO_TEST=m @@ -1249,14 +1441,20 @@ CONFIG_CRYPTO_TEST=m # # CONFIG_CRYPTO_HMAC is not set # CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set # # Digest # -# CONFIG_CRYPTO_CRC32C is not set +CONFIG_CRYPTO_CRC32C=m +# CONFIG_CRYPTO_GHASH is not set # CONFIG_CRYPTO_MD4 is not set # CONFIG_CRYPTO_MD5 is not set # CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set # CONFIG_CRYPTO_SHA1 is not set # CONFIG_CRYPTO_SHA256 is not set # CONFIG_CRYPTO_SHA512 is not set @@ -1266,7 +1464,7 @@ CONFIG_CRYPTO_TEST=m # # Ciphers # -# CONFIG_CRYPTO_AES is not set +CONFIG_CRYPTO_AES=m # CONFIG_CRYPTO_ANUBIS is not set # CONFIG_CRYPTO_ARC4 is not set # CONFIG_CRYPTO_BLOWFISH is not set @@ -1286,27 +1484,36 @@ CONFIG_CRYPTO_TEST=m # Compression # # CONFIG_CRYPTO_DEFLATE is not set +CONFIG_CRYPTO_ZLIB=y # CONFIG_CRYPTO_LZO is not set + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=m # CONFIG_CRYPTO_HW is not set +# CONFIG_BINARY_PRINTF is not set # # Library routines # CONFIG_BITREVERSE=y -# CONFIG_GENERIC_FIND_FIRST_BIT is not set +CONFIG_GENERIC_FIND_LAST_BIT=y CONFIG_CRC_CCITT=m CONFIG_CRC16=m +# CONFIG_CRC_T10DIF is not set # CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y # CONFIG_CRC7 is not set CONFIG_LIBCRC32C=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y +CONFIG_DECOMPRESS_GZIP=y CONFIG_TEXTSEARCH=y CONFIG_TEXTSEARCH_KMP=m CONFIG_TEXTSEARCH_BM=m CONFIG_TEXTSEARCH_FSM=m -CONFIG_PLIST=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_DMA=y +CONFIG_NLATTR=y From f.fainelli@gmail.com Sun May 2 11:40:03 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 02 May 2010 11:40:15 +0200 (CEST) Received: from mail-wy0-f177.google.com ([74.125.82.177]:49912 "EHLO mail-wy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491909Ab0EBJjL (ORCPT ); Sun, 2 May 2010 11:39:11 +0200 Received: by mail-wy0-f177.google.com with SMTP id 36so777545wyg.36 for ; Sun, 02 May 2010 02:39:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:sender:from:date:subject :mime-version:x-uid:x-length:to:reply-to:content-type :content-transfer-encoding:message-id; bh=7t9YwXtj/zxN00HUXJpiUE6CoYurCjQCeJiROa9zD8k=; b=yIKbuE4NX2IbFH1w9CQErw2gsQ0Yk+I8W2Js/CtgKzow34ikUj0g94u3V3OZHbe+bu JDbr1HVAh8dYeSPqUWBpJtqW0APAgHy0G9J710GsvmaRs07XB9Qsvgyz+27MPGUUVts/ O+wrqqthDxgpWdivVahYDVSwpA8vYTa9x4VZE= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:date:subject:mime-version:x-uid:x-length:to:reply-to :content-type:content-transfer-encoding:message-id; b=G88qQQpn+o98/Htl9Tk3/tDD7XCmAmIHpJw4bGfrC2cvR7chJx/Db/g3WjTazmRAao DG2xHF2I1OWw5/U6d4OQmsrKu953IRh4SxkZIooYtN27nQj9IvVn3t9Gh/nZbj/XctSj 57wedF2TOAUUOKBNfwbfWSRFWlIiueXN6RLqM= Received: by 10.216.179.18 with SMTP id g18mr6255293wem.52.1272793150520; Sun, 02 May 2010 02:39:10 -0700 (PDT) Received: from lenovo.localnet (208.59.76-86.rev.gaoland.net [86.76.59.208]) by mx.google.com with ESMTPS id z3sm31698715wbs.10.2010.05.02.02.39.08 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sun, 02 May 2010 02:39:09 -0700 (PDT) From: Florian Fainelli Date: Sun, 2 May 2010 11:39:07 +0200 Subject: [PATCH 3/4] BCM47xx: update defconfig MIME-Version: 1.0 X-UID: 188 X-Length: 54031 To: linux-mips@linux-mips.org, Ralf Baechle Reply-To: Florian Fainelli Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201005021139.07656.florian@openwrt.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26545 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Update Broadcom BCM47xx defconfig with: - tiny RCU - BCM47xx watchdog driver - b43/b43legacy wireless as modules - SSB Gigabit Ethernet driver - disabled IRDA Signed-off-by: Florian Fainelli --- diff --git a/arch/mips/configs/bcm47xx_defconfig b/arch/mips/configs/bcm47xx_defconfig index 267bd46..bbd826b 100644 --- a/arch/mips/configs/bcm47xx_defconfig +++ b/arch/mips/configs/bcm47xx_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.25-rc2 -# Mon Feb 18 11:55:24 2008 +# Linux kernel version: 2.6.34-rc6 +# Sat May 1 12:14:30 2010 # CONFIG_MIPS=y @@ -9,20 +9,25 @@ CONFIG_MIPS=y # Machine selection # # CONFIG_MACH_ALCHEMY is not set +# CONFIG_AR7 is not set CONFIG_BCM47XX=y +# CONFIG_BCM63XX is not set # CONFIG_MIPS_COBALT is not set # CONFIG_MACH_DECSTATION is not set # CONFIG_MACH_JAZZ is not set # CONFIG_LASAT is not set -# CONFIG_LEMOTE_FULONG is not set +# CONFIG_MACH_LOONGSON is not set # CONFIG_MIPS_MALTA is not set # CONFIG_MIPS_SIM is not set -# CONFIG_MARKEINS is not set +# CONFIG_NEC_MARKEINS is not set # CONFIG_MACH_VR41XX is not set +# CONFIG_NXP_STB220 is not set +# CONFIG_NXP_STB225 is not set # CONFIG_PNX8550_JBS is not set # CONFIG_PNX8550_STB810 is not set # CONFIG_PMC_MSP is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_POWERTV is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP28 is not set @@ -36,10 +41,14 @@ CONFIG_BCM47XX=y # CONFIG_SIBYTE_SENTOSA is not set # CONFIG_SIBYTE_BIGSUR is not set # CONFIG_SNI_RM is not set -# CONFIG_TOSHIBA_JMR3927 is not set -# CONFIG_TOSHIBA_RBTX4927 is not set -# CONFIG_TOSHIBA_RBTX4938 is not set +# CONFIG_MACH_TX39XX is not set +# CONFIG_MACH_TX49XX is not set +# CONFIG_MIKROTIK_RB532 is not set # CONFIG_WR_PPMC is not set +# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set +# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set +# CONFIG_ALCHEMY_GPIO_INDIRECT is not set +CONFIG_LOONGSON_UART_BASE=y CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_ARCH_HAS_ILOG2_U32 is not set # CONFIG_ARCH_HAS_ILOG2_U64 is not set @@ -50,16 +59,16 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_TIME=y CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y -# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set +CONFIG_SCHED_OMIT_FRAME_POINTER=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_CEVT_R4K_LIB=y CONFIG_CEVT_R4K=y +CONFIG_CSRC_R4K_LIB=y CONFIG_CSRC_R4K=y CONFIG_CFE=y CONFIG_DMA_NONCOHERENT=y -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_EARLY_PRINTK=y +CONFIG_NEED_DMA_MAP_STATE=y CONFIG_SYS_HAS_EARLY_PRINTK=y -# CONFIG_HOTPLUG_CPU is not set # CONFIG_NO_IOPORT is not set CONFIG_GENERIC_GPIO=y # CONFIG_CPU_BIG_ENDIAN is not set @@ -71,7 +80,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5 # # CPU selection # -# CONFIG_CPU_LOONGSON2 is not set +# CONFIG_CPU_LOONGSON2E is not set +# CONFIG_CPU_LOONGSON2F is not set CONFIG_CPU_MIPS32_R1=y # CONFIG_CPU_MIPS32_R2 is not set # CONFIG_CPU_MIPS64_R1 is not set @@ -84,6 +94,7 @@ CONFIG_CPU_MIPS32_R1=y # CONFIG_CPU_TX49XX is not set # CONFIG_CPU_R5000 is not set # CONFIG_CPU_R5432 is not set +# CONFIG_CPU_R5500 is not set # CONFIG_CPU_R6000 is not set # CONFIG_CPU_NEVADA is not set # CONFIG_CPU_R8000 is not set @@ -91,11 +102,13 @@ CONFIG_CPU_MIPS32_R1=y # CONFIG_CPU_RM7000 is not set # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set +# CONFIG_CPU_CAVIUM_OCTEON is not set CONFIG_SYS_HAS_CPU_MIPS32_R1=y CONFIG_CPU_MIPS32=y CONFIG_CPU_MIPSR1=y CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_HARDWARE_WATCHPOINTS=y # # Kernel type @@ -105,11 +118,13 @@ CONFIG_32BIT=y CONFIG_PAGE_SIZE_4KB=y # CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set +# CONFIG_PAGE_SIZE_32KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_CPU_HAS_PREFETCH=y CONFIG_MIPS_MT_DISABLED=y # CONFIG_MIPS_MT_SMP is not set # CONFIG_MIPS_MT_SMTC is not set +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y @@ -122,12 +137,13 @@ CONFIG_FLATMEM_MANUAL=y # CONFIG_SPARSEMEM_MANUAL is not set CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_RESOURCES_64BIT is not set +# CONFIG_PHYS_ADDR_T_64BIT is not set CONFIG_ZONE_DMA_FLAG=0 CONFIG_VIRT_TO_BUS=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_TICK_ONESHOT=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y @@ -144,12 +160,12 @@ CONFIG_HZ=250 CONFIG_PREEMPT_NONE=y # CONFIG_PREEMPT_VOLUNTARY is not set # CONFIG_PREEMPT is not set -CONFIG_RCU_TRACE=y CONFIG_KEXEC=y # CONFIG_SECCOMP is not set CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y # # General setup @@ -163,6 +179,7 @@ CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_TASKSTATS=y @@ -170,25 +187,37 @@ CONFIG_TASK_DELAY_ACCT=y CONFIG_TASK_XACCT=y CONFIG_TASK_IO_ACCOUNTING=y CONFIG_AUDIT=y + +# +# RCU Subsystem +# +# CONFIG_TREE_RCU is not set +# CONFIG_TREE_PREEMPT_RCU is not set +CONFIG_TINY_RCU=y +# CONFIG_TREE_RCU_TRACE is not set # CONFIG_IKCONFIG is not set CONFIG_LOG_BUF_SHIFT=17 CONFIG_CGROUPS=y # CONFIG_CGROUP_DEBUG is not set CONFIG_CGROUP_NS=y -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set +# CONFIG_CGROUP_FREEZER is not set +# CONFIG_CGROUP_DEVICE is not set +# CONFIG_CPUSETS is not set CONFIG_CGROUP_CPUACCT=y # CONFIG_RESOURCE_COUNTERS is not set -CONFIG_SYSFS_DEPRECATED=y +# CONFIG_CGROUP_SCHED is not set +# CONFIG_SYSFS_DEPRECATED_V2 is not set CONFIG_RELAY=y # CONFIG_NAMESPACES is not set CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +# CONFIG_RD_BZIP2 is not set +CONFIG_RD_LZMA=y +# CONFIG_RD_LZO is not set CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y CONFIG_EMBEDDED=y CONFIG_SYSCTL_SYSCALL=y CONFIG_KALLSYMS=y @@ -197,54 +226,90 @@ CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y -CONFIG_COMPAT_BRK=y +CONFIG_PCSPKR_PLATFORM=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y -CONFIG_ANON_INODES=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y +CONFIG_AIO=y + +# +# Kernel Performance Events And Counters +# CONFIG_VM_EVENT_COUNTERS=y +CONFIG_PCI_QUIRKS=y +CONFIG_COMPAT_BRK=y CONFIG_SLAB=y # CONFIG_SLUB is not set # CONFIG_SLOB is not set # CONFIG_PROFILING is not set -# CONFIG_MARKERS is not set CONFIG_HAVE_OPROFILE=y -# CONFIG_HAVE_KPROBES is not set -CONFIG_PROC_PAGE_MONITOR=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_SLOW_WORK=y +# CONFIG_SLOW_WORK_DEBUG is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y -# CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y CONFIG_MODVERSIONS=y # CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_KMOD=y CONFIG_BLOCK=y -CONFIG_LBD=y -CONFIG_BLK_DEV_IO_TRACE=y -CONFIG_LSF=y +CONFIG_LBDAF=y # CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set # # IO Schedulers # CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y CONFIG_IOSCHED_DEADLINE=y CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_AS is not set +# CONFIG_CFQ_GROUP_IOSCHED is not set # CONFIG_DEFAULT_DEADLINE is not set CONFIG_DEFAULT_CFQ=y # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="cfq" -CONFIG_CLASSIC_RCU=y -# CONFIG_PREEMPT_RCU is not set +# CONFIG_INLINE_SPIN_TRYLOCK is not set +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK is not set +# CONFIG_INLINE_SPIN_LOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set +CONFIG_INLINE_SPIN_UNLOCK=y +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_READ_TRYLOCK is not set +# CONFIG_INLINE_READ_LOCK is not set +# CONFIG_INLINE_READ_LOCK_BH is not set +# CONFIG_INLINE_READ_LOCK_IRQ is not set +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set +CONFIG_INLINE_READ_UNLOCK=y +# CONFIG_INLINE_READ_UNLOCK_BH is not set +CONFIG_INLINE_READ_UNLOCK_IRQ=y +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_WRITE_TRYLOCK is not set +# CONFIG_INLINE_WRITE_LOCK is not set +# CONFIG_INLINE_WRITE_LOCK_BH is not set +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set +CONFIG_INLINE_WRITE_UNLOCK=y +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set +# CONFIG_MUTEX_SPIN_ON_OWNER is not set +# CONFIG_FREEZER is not set # # Bus options (PCI, PCMCIA, EISA, ISA, TC) @@ -253,7 +318,8 @@ CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_DOMAINS=y # CONFIG_ARCH_SUPPORTS_MSI is not set -CONFIG_PCI_LEGACY=y +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_IOV is not set CONFIG_MMU=y # CONFIG_PCCARD is not set # CONFIG_HOTPLUG_PCI is not set @@ -262,31 +328,30 @@ CONFIG_MMU=y # Executable file formats # CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +# CONFIG_HAVE_AOUT is not set CONFIG_BINFMT_MISC=m CONFIG_TRAD_SIGNALS=y # # Power management options # +CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_SUSPEND_POSSIBLE=y # CONFIG_PM is not set - -# -# Networking -# CONFIG_NET=y # # Networking options # CONFIG_PACKET=y -CONFIG_PACKET_MMAP=y CONFIG_UNIX=y CONFIG_XFRM=y CONFIG_XFRM_USER=m # CONFIG_XFRM_SUB_POLICY is not set # CONFIG_XFRM_MIGRATE is not set # CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_IPCOMP=m CONFIG_NET_KEY=m # CONFIG_NET_KEY_MIGRATE is not set CONFIG_INET=y @@ -315,7 +380,7 @@ CONFIG_INET_TUNNEL=m CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_BEET=m -CONFIG_INET_LRO=m +CONFIG_INET_LRO=y CONFIG_INET_DIAG=m CONFIG_INET_TCP_DIAG=m CONFIG_TCP_CONG_ADVANCED=y @@ -339,36 +404,6 @@ CONFIG_DEFAULT_BIC=y # CONFIG_DEFAULT_RENO is not set CONFIG_DEFAULT_TCP_CONG="bic" # CONFIG_TCP_MD5SIG is not set -CONFIG_IP_VS=m -# CONFIG_IP_VS_DEBUG is not set -CONFIG_IP_VS_TAB_BITS=12 - -# -# IPVS transport protocol load balancing support -# -CONFIG_IP_VS_PROTO_TCP=y -CONFIG_IP_VS_PROTO_UDP=y -CONFIG_IP_VS_PROTO_ESP=y -CONFIG_IP_VS_PROTO_AH=y - -# -# IPVS scheduler -# -CONFIG_IP_VS_RR=m -CONFIG_IP_VS_WRR=m -CONFIG_IP_VS_LC=m -CONFIG_IP_VS_WLC=m -CONFIG_IP_VS_LBLC=m -CONFIG_IP_VS_LBLCR=m -CONFIG_IP_VS_DH=m -CONFIG_IP_VS_SH=m -CONFIG_IP_VS_SED=m -CONFIG_IP_VS_NQ=m - -# -# IPVS application helper -# -CONFIG_IP_VS_FTP=m CONFIG_IPV6=m CONFIG_IPV6_PRIVACY=y # CONFIG_IPV6_ROUTER_PREF is not set @@ -384,9 +419,12 @@ CONFIG_INET6_XFRM_MODE_TUNNEL=m CONFIG_INET6_XFRM_MODE_BEET=m CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m CONFIG_IPV6_SIT=m +# CONFIG_IPV6_SIT_6RD is not set +CONFIG_IPV6_NDISC_NODETYPE=y CONFIG_IPV6_TUNNEL=m CONFIG_IPV6_MULTIPLE_TABLES=y CONFIG_IPV6_SUBTREES=y +# CONFIG_IPV6_MROUTE is not set CONFIG_NETWORK_SECMARK=y CONFIG_NETFILTER=y # CONFIG_NETFILTER_DEBUG is not set @@ -404,6 +442,7 @@ CONFIG_NF_CT_ACCT=y CONFIG_NF_CONNTRACK_MARK=y CONFIG_NF_CONNTRACK_SECMARK=y CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CT_PROTO_DCCP=m CONFIG_NF_CT_PROTO_GRE=m CONFIG_NF_CT_PROTO_SCTP=m CONFIG_NF_CT_PROTO_UDPLITE=m @@ -417,20 +456,25 @@ CONFIG_NF_CONNTRACK_SANE=m CONFIG_NF_CONNTRACK_SIP=m CONFIG_NF_CONNTRACK_TFTP=m CONFIG_NF_CT_NETLINK=m +# CONFIG_NETFILTER_TPROXY is not set CONFIG_NETFILTER_XTABLES=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m +# CONFIG_NETFILTER_XT_TARGET_CT is not set CONFIG_NETFILTER_XT_TARGET_DSCP=m +CONFIG_NETFILTER_XT_TARGET_HL=m +# CONFIG_NETFILTER_XT_TARGET_LED is not set CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m CONFIG_NETFILTER_XT_TARGET_NFLOG=m +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m CONFIG_NETFILTER_XT_TARGET_NOTRACK=m # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set CONFIG_NETFILTER_XT_TARGET_TRACE=m CONFIG_NETFILTER_XT_TARGET_SECMARK=m -CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m CONFIG_NETFILTER_XT_TARGET_TCPMSS=m # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set CONFIG_NETFILTER_XT_MATCH_COMMENT=m CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m @@ -439,20 +483,23 @@ CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m CONFIG_NETFILTER_XT_MATCH_DCCP=m CONFIG_NETFILTER_XT_MATCH_DSCP=m CONFIG_NETFILTER_XT_MATCH_ESP=m +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m CONFIG_NETFILTER_XT_MATCH_HELPER=m +CONFIG_NETFILTER_XT_MATCH_HL=m # CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set CONFIG_NETFILTER_XT_MATCH_LENGTH=m CONFIG_NETFILTER_XT_MATCH_LIMIT=m CONFIG_NETFILTER_XT_MATCH_MAC=m CONFIG_NETFILTER_XT_MATCH_MARK=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m # CONFIG_NETFILTER_XT_MATCH_OWNER is not set CONFIG_NETFILTER_XT_MATCH_POLICY=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m CONFIG_NETFILTER_XT_MATCH_QUOTA=m # CONFIG_NETFILTER_XT_MATCH_RATEEST is not set CONFIG_NETFILTER_XT_MATCH_REALM=m +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set CONFIG_NETFILTER_XT_MATCH_SCTP=m CONFIG_NETFILTER_XT_MATCH_STATE=m CONFIG_NETFILTER_XT_MATCH_STATISTIC=m @@ -460,20 +507,53 @@ CONFIG_NETFILTER_XT_MATCH_STRING=m CONFIG_NETFILTER_XT_MATCH_TCPMSS=m CONFIG_NETFILTER_XT_MATCH_TIME=m CONFIG_NETFILTER_XT_MATCH_U32=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +CONFIG_IP_VS=m +# CONFIG_IP_VS_IPV6 is not set +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_TAB_BITS=12 + +# +# IPVS transport protocol load balancing support +# +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +CONFIG_IP_VS_PROTO_AH_ESP=y +CONFIG_IP_VS_PROTO_ESP=y +CONFIG_IP_VS_PROTO_AH=y +# CONFIG_IP_VS_PROTO_SCTP is not set + +# +# IPVS scheduler +# +CONFIG_IP_VS_RR=m +CONFIG_IP_VS_WRR=m +CONFIG_IP_VS_LC=m +CONFIG_IP_VS_WLC=m +CONFIG_IP_VS_LBLC=m +CONFIG_IP_VS_LBLCR=m +CONFIG_IP_VS_DH=m +CONFIG_IP_VS_SH=m +CONFIG_IP_VS_SED=m +CONFIG_IP_VS_NQ=m + +# +# IPVS application helper +# +CONFIG_IP_VS_FTP=m # # IP: Netfilter Configuration # +CONFIG_NF_DEFRAG_IPV4=m CONFIG_NF_CONNTRACK_IPV4=m CONFIG_NF_CONNTRACK_PROC_COMPAT=y CONFIG_IP_NF_QUEUE=m CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_RECENT=m -CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_ADDRTYPE=m CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_ECN=m CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_MATCH_ADDRTYPE=m CONFIG_IP_NF_FILTER=m CONFIG_IP_NF_TARGET_REJECT=m CONFIG_IP_NF_TARGET_LOG=m @@ -481,10 +561,13 @@ CONFIG_IP_NF_TARGET_ULOG=m CONFIG_NF_NAT=m CONFIG_NF_NAT_NEEDED=y CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_REDIRECT=m CONFIG_IP_NF_TARGET_NETMAP=m +CONFIG_IP_NF_TARGET_REDIRECT=m CONFIG_NF_NAT_SNMP_BASIC=m +CONFIG_NF_NAT_PROTO_DCCP=m CONFIG_NF_NAT_PROTO_GRE=m +CONFIG_NF_NAT_PROTO_UDPLITE=m +CONFIG_NF_NAT_PROTO_SCTP=m CONFIG_NF_NAT_FTP=m CONFIG_NF_NAT_IRC=m CONFIG_NF_NAT_TFTP=m @@ -493,9 +576,9 @@ CONFIG_NF_NAT_PPTP=m CONFIG_NF_NAT_H323=m CONFIG_NF_NAT_SIP=m CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_TARGET_CLUSTERIP=m CONFIG_IP_NF_TARGET_ECN=m CONFIG_IP_NF_TARGET_TTL=m -CONFIG_IP_NF_TARGET_CLUSTERIP=m CONFIG_IP_NF_RAW=m CONFIG_IP_NF_ARPTABLES=m CONFIG_IP_NF_ARPFILTER=m @@ -507,24 +590,20 @@ CONFIG_IP_NF_ARP_MANGLE=m CONFIG_NF_CONNTRACK_IPV6=m CONFIG_IP6_NF_QUEUE=m CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_MATCH_RT=m -CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_EUI64=m CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_OPTS=m CONFIG_IP6_NF_MATCH_HL=m CONFIG_IP6_NF_MATCH_IPV6HEADER=m -CONFIG_IP6_NF_MATCH_AH=m CONFIG_IP6_NF_MATCH_MH=m -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_TARGET_HL=m CONFIG_IP6_NF_TARGET_LOG=m +CONFIG_IP6_NF_FILTER=m CONFIG_IP6_NF_TARGET_REJECT=m CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_TARGET_HL=m CONFIG_IP6_NF_RAW=m - -# -# Bridge: Netfilter Configuration -# CONFIG_BRIDGE_NF_EBTABLES=m CONFIG_BRIDGE_EBT_BROUTE=m CONFIG_BRIDGE_EBT_T_FILTER=m @@ -533,6 +612,7 @@ CONFIG_BRIDGE_EBT_802_3=m CONFIG_BRIDGE_EBT_AMONG=m CONFIG_BRIDGE_EBT_ARP=m CONFIG_BRIDGE_EBT_IP=m +# CONFIG_BRIDGE_EBT_IP6 is not set CONFIG_BRIDGE_EBT_LIMIT=m CONFIG_BRIDGE_EBT_MARK=m CONFIG_BRIDGE_EBT_PKTTYPE=m @@ -545,31 +625,30 @@ CONFIG_BRIDGE_EBT_REDIRECT=m CONFIG_BRIDGE_EBT_SNAT=m CONFIG_BRIDGE_EBT_LOG=m CONFIG_BRIDGE_EBT_ULOG=m +# CONFIG_BRIDGE_EBT_NFLOG is not set CONFIG_IP_DCCP=m CONFIG_INET_DCCP_DIAG=m -CONFIG_IP_DCCP_ACKVEC=y # # DCCP CCIDs Configuration (EXPERIMENTAL) # -CONFIG_IP_DCCP_CCID2=m # CONFIG_IP_DCCP_CCID2_DEBUG is not set -CONFIG_IP_DCCP_CCID3=m +CONFIG_IP_DCCP_CCID3=y # CONFIG_IP_DCCP_CCID3_DEBUG is not set CONFIG_IP_DCCP_CCID3_RTO=100 -CONFIG_IP_DCCP_TFRC_LIB=m +CONFIG_IP_DCCP_TFRC_LIB=y CONFIG_IP_SCTP=m # CONFIG_SCTP_DBG_MSG is not set # CONFIG_SCTP_DBG_OBJCNT is not set # CONFIG_SCTP_HMAC_NONE is not set # CONFIG_SCTP_HMAC_SHA1 is not set CONFIG_SCTP_HMAC_MD5=y +# CONFIG_RDS is not set CONFIG_TIPC=m CONFIG_TIPC_ADVANCED=y CONFIG_TIPC_ZONES=3 CONFIG_TIPC_CLUSTERS=1 CONFIG_TIPC_NODES=255 -CONFIG_TIPC_SLAVE_NODES=0 CONFIG_TIPC_PORTS=8191 CONFIG_TIPC_LOG=0 # CONFIG_TIPC_DEBUG is not set @@ -580,8 +659,12 @@ CONFIG_ATM_LANE=m CONFIG_ATM_MPOA=m CONFIG_ATM_BR2684=m # CONFIG_ATM_BR2684_IPFILTER is not set +CONFIG_STP=m CONFIG_BRIDGE=m +CONFIG_BRIDGE_IGMP_SNOOPING=y +# CONFIG_NET_DSA is not set CONFIG_VLAN_8021Q=m +# CONFIG_VLAN_8021Q_GVRP is not set # CONFIG_DECNET is not set CONFIG_LLC=m # CONFIG_LLC2 is not set @@ -591,6 +674,8 @@ CONFIG_LLC=m # CONFIG_LAPB is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set CONFIG_NET_SCHED=y # @@ -601,7 +686,7 @@ CONFIG_NET_SCH_HTB=m CONFIG_NET_SCH_HFSC=m CONFIG_NET_SCH_ATM=m CONFIG_NET_SCH_PRIO=m -CONFIG_NET_SCH_RR=m +# CONFIG_NET_SCH_MULTIQ is not set CONFIG_NET_SCH_RED=m CONFIG_NET_SCH_SFQ=m CONFIG_NET_SCH_TEQL=m @@ -609,6 +694,7 @@ CONFIG_NET_SCH_TBF=m CONFIG_NET_SCH_GRED=m CONFIG_NET_SCH_DSMARK=m CONFIG_NET_SCH_NETEM=m +# CONFIG_NET_SCH_DRR is not set CONFIG_NET_SCH_INGRESS=m # @@ -626,6 +712,7 @@ CONFIG_CLS_U32_MARK=y CONFIG_NET_CLS_RSVP=m CONFIG_NET_CLS_RSVP6=m # CONFIG_NET_CLS_FLOW is not set +# CONFIG_NET_CLS_CGROUP is not set CONFIG_NET_EMATCH=y CONFIG_NET_EMATCH_STACK=32 CONFIG_NET_EMATCH_CMP=m @@ -642,8 +729,10 @@ CONFIG_NET_ACT_IPT=m CONFIG_NET_ACT_NAT=m CONFIG_NET_ACT_PEDIT=m CONFIG_NET_ACT_SIMP=m +# CONFIG_NET_ACT_SKBEDIT is not set CONFIG_NET_CLS_IND=y CONFIG_NET_SCH_FIFO=y +# CONFIG_DCB is not set # # Network testing @@ -651,58 +740,7 @@ CONFIG_NET_SCH_FIFO=y CONFIG_NET_PKTGEN=m # CONFIG_HAMRADIO is not set # CONFIG_CAN is not set -CONFIG_IRDA=m - -# -# IrDA protocols -# -CONFIG_IRLAN=m -CONFIG_IRNET=m -CONFIG_IRCOMM=m -# CONFIG_IRDA_ULTRA is not set - -# -# IrDA options -# -CONFIG_IRDA_CACHE_LAST_LSAP=y -CONFIG_IRDA_FAST_RR=y -# CONFIG_IRDA_DEBUG is not set - -# -# Infrared-port device drivers -# - -# -# SIR device drivers -# -CONFIG_IRTTY_SIR=m - -# -# Dongle support -# -CONFIG_DONGLE=y -CONFIG_ESI_DONGLE=m -CONFIG_ACTISYS_DONGLE=m -CONFIG_TEKRAM_DONGLE=m -CONFIG_TOIM3232_DONGLE=m -CONFIG_LITELINK_DONGLE=m -CONFIG_MA600_DONGLE=m -CONFIG_GIRBIL_DONGLE=m -CONFIG_MCP2120_DONGLE=m -CONFIG_OLD_BELKIN_DONGLE=m -CONFIG_ACT200L_DONGLE=m -CONFIG_KINGSUN_DONGLE=m -CONFIG_KSDAZZLE_DONGLE=m -CONFIG_KS959_DONGLE=m - -# -# FIR device drivers -# -CONFIG_USB_IRDA=m -CONFIG_SIGMATEL_FIR=m -CONFIG_TOSHIBA_FIR=m -CONFIG_VLSI_FIR=m -CONFIG_MCS_FIR=m +# CONFIG_IRDA is not set CONFIG_BT=m # CONFIG_BT_L2CAP is not set # CONFIG_BT_SCO is not set @@ -710,8 +748,7 @@ CONFIG_BT=m # # Bluetooth device drivers # -CONFIG_BT_HCIUSB=m -CONFIG_BT_HCIUSB_SCO=y +# CONFIG_BT_HCIBTUSB is not set CONFIG_BT_HCIUART=m CONFIG_BT_HCIUART_H4=y CONFIG_BT_HCIUART_BCSP=y @@ -720,51 +757,37 @@ CONFIG_BT_HCIBCM203X=m CONFIG_BT_HCIBPA10X=m CONFIG_BT_HCIBFUSB=m CONFIG_BT_HCIVHCI=m +# CONFIG_BT_MRVL is not set # CONFIG_AF_RXRPC is not set CONFIG_FIB_RULES=y - -# -# Wireless -# +CONFIG_WIRELESS=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y CONFIG_CFG80211=m -CONFIG_NL80211=y -CONFIG_WIRELESS_EXT=y +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_REG_DEBUG is not set +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +# CONFIG_CFG80211_INTERNAL_REGDB is not set +CONFIG_CFG80211_WEXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +# CONFIG_LIB80211 is not set CONFIG_MAC80211=m - -# -# Rate control algorithm selection -# +CONFIG_MAC80211_RC_PID=y +CONFIG_MAC80211_RC_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT_PID=y -# CONFIG_MAC80211_RC_DEFAULT_SIMPLE is not set -# CONFIG_MAC80211_RC_DEFAULT_NONE is not set - -# -# Selecting 'y' for an algorithm will -# - -# -# build the algorithm into mac80211. -# +# CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set CONFIG_MAC80211_RC_DEFAULT="pid" -CONFIG_MAC80211_RC_PID=y -# CONFIG_MAC80211_RC_SIMPLE is not set +CONFIG_MAC80211_MESH=y CONFIG_MAC80211_LEDS=y # CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_DEBUG_PACKET_ALIGNMENT is not set -# CONFIG_MAC80211_DEBUG is not set -CONFIG_IEEE80211=m -# CONFIG_IEEE80211_DEBUG is not set -CONFIG_IEEE80211_CRYPT_WEP=m -CONFIG_IEEE80211_CRYPT_CCMP=m -CONFIG_IEEE80211_CRYPT_TKIP=m -CONFIG_IEEE80211_SOFTMAC=m -# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +# CONFIG_WIMAX is not set CONFIG_RFKILL=m -CONFIG_RFKILL_INPUT=m CONFIG_RFKILL_LEDS=y -CONFIG_NET_9P=m -CONFIG_NET_9P_FD=m -# CONFIG_NET_9P_DEBUG is not set +CONFIG_RFKILL_INPUT=y +# CONFIG_NET_9P is not set # # Device Drivers @@ -774,17 +797,22 @@ CONFIG_NET_9P_FD=m # Generic Driver Options # CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +# CONFIG_DEVTMPFS is not set CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=m +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" # CONFIG_SYS_HYPERVISOR is not set CONFIG_CONNECTOR=m CONFIG_MTD=y # CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_TESTS is not set CONFIG_MTD_CONCAT=y CONFIG_MTD_PARTITIONS=y # CONFIG_MTD_REDBOOT_PARTS is not set # CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set # # User Modules And Translation Layers @@ -829,9 +857,7 @@ CONFIG_MTD_ABSENT=y # # CONFIG_MTD_COMPLEX_MAPPINGS is not set CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_PHYSMAP_START=0x8000000 -CONFIG_MTD_PHYSMAP_LEN=0x0 -CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +# CONFIG_MTD_PHYSMAP_COMPAT is not set # CONFIG_MTD_INTEL_VR_NOR is not set # CONFIG_MTD_PLATRAM is not set @@ -854,6 +880,11 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2 # CONFIG_MTD_ONENAND is not set # +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# # UBI - Unsorted block images # # CONFIG_MTD_UBI is not set @@ -866,6 +897,7 @@ CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=m CONFIG_BLK_DEV_CRYPTOLOOP=m +# CONFIG_BLK_DEV_DRBD is not set CONFIG_BLK_DEV_NBD=m # CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_UB is not set @@ -875,18 +907,27 @@ CONFIG_BLK_DEV_RAM_SIZE=16384 # CONFIG_BLK_DEV_XIP is not set # CONFIG_CDROM_PKTCDVD is not set CONFIG_ATA_OVER_ETH=m +# CONFIG_BLK_DEV_HD is not set CONFIG_MISC_DEVICES=y # CONFIG_PHANTOM is not set -# CONFIG_EEPROM_93CX6 is not set # CONFIG_SGI_IOC4 is not set # CONFIG_TIFM_CORE is not set # CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_CB710_CORE is not set CONFIG_HAVE_IDE=y # CONFIG_IDE is not set # # SCSI device support # +CONFIG_SCSI_MOD=y CONFIG_RAID_ATTRS=m CONFIG_SCSI=y CONFIG_SCSI_DMA=y @@ -904,10 +945,6 @@ CONFIG_BLK_DEV_SR=m CONFIG_BLK_DEV_SR_VENDOR=y CONFIG_CHR_DEV_SG=m CONFIG_CHR_DEV_SCH=m - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# CONFIG_SCSI_MULTI_LUN=y CONFIG_SCSI_CONSTANTS=y CONFIG_SCSI_LOGGING=y @@ -924,21 +961,30 @@ CONFIG_SCSI_ISCSI_ATTRS=m # CONFIG_SCSI_SRP_ATTRS is not set CONFIG_SCSI_LOWLEVEL=y CONFIG_ISCSI_TCP=m +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set # CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set # CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set # CONFIG_SCSI_ACARD is not set # CONFIG_SCSI_AACRAID is not set # CONFIG_SCSI_AIC7XXX is not set # CONFIG_SCSI_AIC7XXX_OLD is not set # CONFIG_SCSI_AIC79XX is not set # CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_MVSAS is not set # CONFIG_SCSI_DPT_I2O is not set # CONFIG_SCSI_ADVANSYS is not set # CONFIG_SCSI_ARCMSR is not set # CONFIG_MEGARAID_NEWGEN is not set # CONFIG_MEGARAID_LEGACY is not set # CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT2SAS is not set # CONFIG_SCSI_HPTIOP is not set +# CONFIG_LIBFC is not set +# CONFIG_LIBFCOE is not set +# CONFIG_FCOE is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_FUTURE_DOMAIN is not set # CONFIG_SCSI_IPS is not set @@ -954,7 +1000,12 @@ CONFIG_ISCSI_TCP=m # CONFIG_SCSI_DC390T is not set # CONFIG_SCSI_NSP32 is not set # CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set # CONFIG_SCSI_SRP is not set +# CONFIG_SCSI_BFA_FC is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set # CONFIG_ATA is not set # CONFIG_MD is not set # CONFIG_FUSION is not set @@ -962,11 +1013,18 @@ CONFIG_ISCSI_TCP=m # # IEEE 1394 (FireWire) support # + +# +# You can enable one or both FireWire driver stacks. +# + +# +# The newer stack is recommended. +# # CONFIG_FIREWIRE is not set # CONFIG_IEEE1394 is not set # CONFIG_I2O is not set CONFIG_NETDEVICES=y -# CONFIG_NETDEVICES_MULTIQUEUE is not set # CONFIG_IFB is not set CONFIG_DUMMY=m # CONFIG_BONDING is not set @@ -990,8 +1048,11 @@ CONFIG_SMSC_PHY=m CONFIG_BROADCOM_PHY=m CONFIG_ICPLUS_PHY=m # CONFIG_REALTEK_PHY is not set -# CONFIG_FIXED_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set CONFIG_MDIO_BITBANG=m +# CONFIG_MDIO_GPIO is not set CONFIG_NET_ETHERNET=y CONFIG_MII=y # CONFIG_AX88796 is not set @@ -999,24 +1060,31 @@ CONFIG_MII=y # CONFIG_SUNGEM is not set # CONFIG_CASSINI is not set # CONFIG_NET_VENDOR_3COM is not set +# CONFIG_SMC91X is not set # CONFIG_DM9000 is not set +# CONFIG_ETHOC is not set +# CONFIG_SMSC911X is not set +# CONFIG_DNET is not set # CONFIG_NET_TULIP is not set # CONFIG_HP100 is not set # CONFIG_IBM_NEW_EMAC_ZMII is not set # CONFIG_IBM_NEW_EMAC_RGMII is not set # CONFIG_IBM_NEW_EMAC_TAH is not set # CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set CONFIG_NET_PCI=y # CONFIG_PCNET32 is not set # CONFIG_AMD8111_ETH is not set # CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_KSZ884X_PCI is not set CONFIG_B44=y CONFIG_B44_PCI_AUTOSELECT=y CONFIG_B44_PCICORE_AUTOSELECT=y CONFIG_B44_PCI=y # CONFIG_FORCEDETH is not set # CONFIG_TC35815 is not set -# CONFIG_EEPRO100 is not set # CONFIG_E100 is not set # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set @@ -1026,41 +1094,67 @@ CONFIG_B44_PCI=y # CONFIG_R6040 is not set # CONFIG_SIS900 is not set # CONFIG_EPIC100 is not set +# CONFIG_SMSC9420 is not set # CONFIG_SUNDANCE is not set # CONFIG_TLAN is not set +# CONFIG_KS8842 is not set +# CONFIG_KS8851_MLL is not set # CONFIG_VIA_RHINE is not set # CONFIG_SC92031 is not set +# CONFIG_ATL2 is not set # CONFIG_NETDEV_1000 is not set # CONFIG_NETDEV_10000 is not set # CONFIG_TR is not set - -# -# Wireless LAN -# -# CONFIG_WLAN_PRE80211 is not set -CONFIG_WLAN_80211=y -# CONFIG_IPW2100 is not set -# CONFIG_IPW2200 is not set -# CONFIG_LIBERTAS is not set -# CONFIG_HERMES is not set +CONFIG_WLAN=y +# CONFIG_LIBERTAS_THINFIRM is not set # CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set # CONFIG_PRISM54 is not set # CONFIG_USB_ZD1201 is not set # CONFIG_USB_NET_RNDIS_WLAN is not set # CONFIG_RTL8180 is not set # CONFIG_RTL8187 is not set # CONFIG_ADM8211 is not set -# CONFIG_P54_COMMON is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_MWL8K is not set +CONFIG_ATH_COMMON=m +# CONFIG_ATH_DEBUG is not set CONFIG_ATH5K=m -# CONFIG_IWL4965 is not set -# CONFIG_IWL3945 is not set +# CONFIG_ATH5K_DEBUG is not set +# CONFIG_ATH9K is not set +# CONFIG_AR9170_USB is not set +CONFIG_B43=m +CONFIG_B43_PCI_AUTOSELECT=y +CONFIG_B43_PCICORE_AUTOSELECT=y +CONFIG_B43_PIO=y +CONFIG_B43_PHY_LP=y +CONFIG_B43_LEDS=y +# CONFIG_B43_DEBUG is not set +CONFIG_B43LEGACY=m +CONFIG_B43LEGACY_PCI_AUTOSELECT=y +CONFIG_B43LEGACY_PCICORE_AUTOSELECT=y +CONFIG_B43LEGACY_LEDS=y +CONFIG_B43LEGACY_DEBUG=y +CONFIG_B43LEGACY_DMA=y +CONFIG_B43LEGACY_PIO=y +CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y +# CONFIG_B43LEGACY_DMA_MODE is not set +# CONFIG_B43LEGACY_PIO_MODE is not set # CONFIG_HOSTAP is not set -# CONFIG_BCM43XX is not set -# CONFIG_B43 is not set -# CONFIG_B43LEGACY is not set +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWLWIFI is not set +# CONFIG_LIBERTAS is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_RT2X00 is not set +# CONFIG_WL12XX is not set CONFIG_ZD1211RW=m # CONFIG_ZD1211RW_DEBUG is not set -# CONFIG_RT2X00 is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# # # USB Network Adapters @@ -1072,7 +1166,10 @@ CONFIG_USB_RTL8150=m CONFIG_USB_USBNET=m CONFIG_USB_NET_AX8817X=m CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_CDC_EEM is not set CONFIG_USB_NET_DM9601=m +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set CONFIG_USB_NET_GL620A=m CONFIG_USB_NET_NET1080=m CONFIG_USB_NET_PLUSB=m @@ -1086,6 +1183,10 @@ CONFIG_USB_ARMLINUX=y CONFIG_USB_EPSON2888=y CONFIG_USB_KC2190=y CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +CONFIG_USB_SIERRA_NET=m # CONFIG_WAN is not set CONFIG_ATM_DRIVERS=y CONFIG_ATM_DUMMY=m @@ -1099,8 +1200,9 @@ CONFIG_ATM_TCP=m # CONFIG_ATM_AMBASSADOR is not set # CONFIG_ATM_HORIZON is not set # CONFIG_ATM_IA is not set -# CONFIG_ATM_FORE200E_MAYBE is not set +# CONFIG_ATM_FORE200E is not set # CONFIG_ATM_HE is not set +# CONFIG_ATM_SOLOS is not set # CONFIG_FDDI is not set # CONFIG_HIPPI is not set CONFIG_PPP=m @@ -1120,11 +1222,10 @@ CONFIG_SLHC=m # CONFIG_SLIP_SMART is not set # CONFIG_SLIP_MODE_SLIP6 is not set # CONFIG_NET_FC is not set -CONFIG_NETCONSOLE=y -# CONFIG_NETCONSOLE_DYNAMIC is not set -CONFIG_NETPOLL=y -# CONFIG_NETPOLL_TRAP is not set -CONFIG_NET_POLL_CONTROLLER=y +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_VMXNET3 is not set # CONFIG_ISDN is not set # CONFIG_PHONE is not set @@ -1134,6 +1235,7 @@ CONFIG_NET_POLL_CONTROLLER=y CONFIG_INPUT=y # CONFIG_INPUT_FF_MEMLESS is not set # CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set # # Userland interfaces @@ -1166,6 +1268,7 @@ CONFIG_INPUT_EVDEV=m # Character devices # # CONFIG_VT is not set +CONFIG_DEVKMEM=y # CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_NOZOMI is not set @@ -1185,23 +1288,24 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=2 CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y # CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_TIMBERDALE is not set CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set # CONFIG_LEGACY_PTYS is not set # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set -# CONFIG_RTC is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set # CONFIG_RAW_DRIVER is not set # CONFIG_TCG_TPM is not set CONFIG_DEVPORT=y # CONFIG_I2C is not set +# CONFIG_SPI is not set # -# SPI support +# PPS support # -# CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set +# CONFIG_PPS is not set CONFIG_W1=m CONFIG_W1_CON=y @@ -1217,21 +1321,45 @@ CONFIG_W1_MASTER_DS2490=m # CONFIG_W1_SLAVE_THERM=m CONFIG_W1_SLAVE_SMEM=m +# CONFIG_W1_SLAVE_DS2431 is not set CONFIG_W1_SLAVE_DS2433=m # CONFIG_W1_SLAVE_DS2433_CRC is not set CONFIG_W1_SLAVE_DS2760=m +# CONFIG_W1_SLAVE_BQ27000 is not set # CONFIG_POWER_SUPPLY is not set # CONFIG_HWMON is not set CONFIG_THERMAL=y -# CONFIG_WATCHDOG is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y # -# Sonics Silicon Backplane +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_ALIM7101_WDT is not set +CONFIG_BCM47XX_WDT=y + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + # +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# CONFIG_SSB=y +CONFIG_SSB_SPROM=y +CONFIG_SSB_BLOCKIO=y CONFIG_SSB_PCIHOST_POSSIBLE=y CONFIG_SSB_PCIHOST=y +CONFIG_SSB_B43_PCI_BRIDGE=y # CONFIG_SSB_SILENT is not set # CONFIG_SSB_DEBUG is not set CONFIG_SSB_SERIAL=y @@ -1239,24 +1367,26 @@ CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y CONFIG_SSB_DRIVER_PCICORE=y CONFIG_SSB_PCICORE_HOSTMODE=y CONFIG_SSB_DRIVER_MIPS=y +CONFIG_SSB_EMBEDDED=y CONFIG_SSB_DRIVER_EXTIF=y +CONFIG_SSB_DRIVER_GIGE=y # # Multifunction device drivers # +# CONFIG_MFD_CORE is not set # CONFIG_MFD_SM501 is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set -# CONFIG_DVB_CORE is not set -CONFIG_DAB=y -CONFIG_USB_DABUSB=m +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_LPC_SCH is not set +# CONFIG_REGULATOR is not set +# CONFIG_MEDIA_SUPPORT is not set # # Graphics support # +CONFIG_VGA_ARB=y +CONFIG_VGA_ARB_MAX_GPUS=16 # CONFIG_DRM is not set # CONFIG_VGASTATE is not set # CONFIG_VIDEO_OUTPUT_CONTROL is not set @@ -1271,15 +1401,9 @@ CONFIG_DISPLAY_SUPPORT=m # # Display hardware drivers # - -# -# Sound -# CONFIG_SOUND=m - -# -# Advanced Linux Sound Architecture -# +CONFIG_SOUND_OSS_CORE=y +CONFIG_SOUND_OSS_CORE_PRECLAIM=y CONFIG_SND=m CONFIG_SND_TIMER=m CONFIG_SND_PCM=m @@ -1292,24 +1416,24 @@ CONFIG_SND_MIXER_OSS=m CONFIG_SND_PCM_OSS=m CONFIG_SND_PCM_OSS_PLUGINS=y CONFIG_SND_SEQUENCER_OSS=y +# CONFIG_SND_HRTIMER is not set # CONFIG_SND_DYNAMIC_MINORS is not set CONFIG_SND_SUPPORT_OLD_API=y CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set - -# -# Generic devices -# +CONFIG_SND_RAWMIDI_SEQ=m +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_DRIVERS=y CONFIG_SND_DUMMY=m CONFIG_SND_VIRMIDI=m # CONFIG_SND_MTPAV is not set # CONFIG_SND_SERIAL_U16550 is not set # CONFIG_SND_MPU401 is not set - -# -# PCI devices -# +CONFIG_SND_PCI=y # CONFIG_SND_AD1889 is not set # CONFIG_SND_ALS300 is not set # CONFIG_SND_ALI5451 is not set @@ -1318,6 +1442,7 @@ CONFIG_SND_VIRMIDI=m # CONFIG_SND_AU8810 is not set # CONFIG_SND_AU8820 is not set # CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set # CONFIG_SND_AZT3328 is not set # CONFIG_SND_BT87X is not set # CONFIG_SND_CA0106 is not set @@ -1325,6 +1450,8 @@ CONFIG_SND_VIRMIDI=m # CONFIG_SND_OXYGEN is not set # CONFIG_SND_CS4281 is not set # CONFIG_SND_CS46XX is not set +# CONFIG_SND_CS5535AUDIO is not set +# CONFIG_SND_CTXFI is not set # CONFIG_SND_DARLA20 is not set # CONFIG_SND_GINA20 is not set # CONFIG_SND_LAYLA20 is not set @@ -1337,6 +1464,8 @@ CONFIG_SND_VIRMIDI=m # CONFIG_SND_INDIGO is not set # CONFIG_SND_INDIGOIO is not set # CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_INDIGOIOX is not set +# CONFIG_SND_INDIGODJX is not set # CONFIG_SND_EMU10K1 is not set # CONFIG_SND_EMU10K1X is not set # CONFIG_SND_ENS1370 is not set @@ -1353,6 +1482,7 @@ CONFIG_SND_VIRMIDI=m # CONFIG_SND_INTEL8X0 is not set # CONFIG_SND_INTEL8X0M is not set # CONFIG_SND_KORG1212 is not set +# CONFIG_SND_LX6464ES is not set # CONFIG_SND_MAESTRO3 is not set # CONFIG_SND_MIXART is not set # CONFIG_SND_NM256 is not set @@ -1368,45 +1498,22 @@ CONFIG_SND_VIRMIDI=m # CONFIG_SND_VIRTUOSO is not set # CONFIG_SND_VX222 is not set # CONFIG_SND_YMFPCI is not set - -# -# ALSA MIPS devices -# - -# -# USB devices -# +CONFIG_SND_MIPS=y +CONFIG_SND_USB=y CONFIG_SND_USB_AUDIO=m +# CONFIG_SND_USB_UA101 is not set # CONFIG_SND_USB_CAIAQ is not set - -# -# System on Chip audio support -# # CONFIG_SND_SOC is not set - -# -# SoC Audio support for SuperH -# - -# -# ALSA SoC audio for Freescale SOCs -# - -# -# Open Sound System -# # CONFIG_SOUND_PRIME is not set CONFIG_HID_SUPPORT=y CONFIG_HID=m -# CONFIG_HID_DEBUG is not set # CONFIG_HIDRAW is not set # # USB Input Devices # CONFIG_USB_HID=m -# CONFIG_USB_HIDINPUT_POWERBOOK is not set -# CONFIG_HID_FF is not set +# CONFIG_HID_PID is not set CONFIG_USB_HIDDEV=y # @@ -1414,6 +1521,41 @@ CONFIG_USB_HIDDEV=y # # CONFIG_USB_KBD is not set # CONFIG_USB_MOUSE is not set + +# +# Special HID drivers +# +# CONFIG_HID_3M_PCT is not set +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MOSART is not set +# CONFIG_HID_MONTEREY is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_QUANTA is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_STANTUM is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_ZEROPLUS is not set CONFIG_USB_SUPPORT=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y @@ -1429,14 +1571,24 @@ CONFIG_USB_DEVICEFS=y # CONFIG_USB_DEVICE_CLASS is not set # CONFIG_USB_DYNAMIC_MINORS is not set # CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_MON is not set +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set # # USB Host Controller Drivers # +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_XHCI_HCD is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y +# CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set CONFIG_USB_OHCI_HCD=y # CONFIG_USB_OHCI_HCD_SSB is not set # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set @@ -1446,26 +1598,30 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_U132_HCD=m # CONFIG_USB_SL811_HCD is not set CONFIG_USB_R8A66597_HCD=m +# CONFIG_USB_WHCI_HCD is not set +# CONFIG_USB_HWA_HCD is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set # # USB Device Class drivers # CONFIG_USB_ACM=m CONFIG_USB_PRINTER=m +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set # -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may # # -# may also be needed; see USB_STORAGE Help for more information +# also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_DEBUG is not set CONFIG_USB_STORAGE_DATAFAB=y CONFIG_USB_STORAGE_FREECOM=y # CONFIG_USB_STORAGE_ISD200 is not set -CONFIG_USB_STORAGE_DPCM=y CONFIG_USB_STORAGE_USBAT=y CONFIG_USB_STORAGE_SDDR09=y CONFIG_USB_STORAGE_SDDR55=y @@ -1473,6 +1629,7 @@ CONFIG_USB_STORAGE_JUMPSHOT=y CONFIG_USB_STORAGE_ALAUDA=y CONFIG_USB_STORAGE_ONETOUCH=y CONFIG_USB_STORAGE_KARMA=y +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set # CONFIG_USB_LIBUSUAL is not set # @@ -1480,7 +1637,6 @@ CONFIG_USB_STORAGE_KARMA=y # CONFIG_USB_MDC800=m CONFIG_USB_MICROTEK=m -# CONFIG_USB_MON is not set # # USB port drivers @@ -1489,13 +1645,12 @@ CONFIG_USB_SERIAL=m CONFIG_USB_EZUSB=y CONFIG_USB_SERIAL_GENERIC=y CONFIG_USB_SERIAL_AIRCABLE=m -CONFIG_USB_SERIAL_AIRPRIME=m CONFIG_USB_SERIAL_ARK3116=m CONFIG_USB_SERIAL_BELKIN=m CONFIG_USB_SERIAL_CH341=m # CONFIG_USB_SERIAL_WHITEHEAT is not set CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -CONFIG_USB_SERIAL_CP2101=m +# CONFIG_USB_SERIAL_CP210X is not set CONFIG_USB_SERIAL_CYPRESS_M8=m CONFIG_USB_SERIAL_EMPEG=m CONFIG_USB_SERIAL_FTDI_SIO=m @@ -1515,18 +1670,26 @@ CONFIG_USB_SERIAL_KOBIL_SCT=m CONFIG_USB_SERIAL_MCT_U232=m CONFIG_USB_SERIAL_MOS7720=m CONFIG_USB_SERIAL_MOS7840=m +# CONFIG_USB_SERIAL_MOTOROLA is not set CONFIG_USB_SERIAL_NAVMAN=m CONFIG_USB_SERIAL_PL2303=m CONFIG_USB_SERIAL_OTI6858=m +# CONFIG_USB_SERIAL_QCAUX is not set +# CONFIG_USB_SERIAL_QUALCOMM is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set CONFIG_USB_SERIAL_HP4X=m CONFIG_USB_SERIAL_SAFE=m # CONFIG_USB_SERIAL_SAFE_PADDED is not set +# CONFIG_USB_SERIAL_SIEMENS_MPI is not set CONFIG_USB_SERIAL_SIERRAWIRELESS=m +# CONFIG_USB_SERIAL_SYMBOL is not set # CONFIG_USB_SERIAL_TI is not set CONFIG_USB_SERIAL_CYBERJACK=m CONFIG_USB_SERIAL_XIRCOM=m CONFIG_USB_SERIAL_OPTION=m CONFIG_USB_SERIAL_OMNINET=m +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set CONFIG_USB_SERIAL_DEBUG=m # @@ -1535,18 +1698,13 @@ CONFIG_USB_SERIAL_DEBUG=m # CONFIG_USB_EMI62 is not set # CONFIG_USB_EMI26 is not set CONFIG_USB_ADUTUX=m -CONFIG_USB_AUERSWALD=m +# CONFIG_USB_SEVSEG is not set CONFIG_USB_RIO500=m CONFIG_USB_LEGOTOWER=m CONFIG_USB_LCD=m -CONFIG_USB_BERRY_CHARGE=m CONFIG_USB_LED=m CONFIG_USB_CYPRESS_CY7C63=m CONFIG_USB_CYTHERM=m -CONFIG_USB_PHIDGET=m -CONFIG_USB_PHIDGETKIT=m -CONFIG_USB_PHIDGETMOTORCONTROL=m -CONFIG_USB_PHIDGETSERVO=m CONFIG_USB_IDMOUSE=m CONFIG_USB_FTDI_ELAN=m # CONFIG_USB_APPLEDISPLAY is not set @@ -1555,6 +1713,7 @@ CONFIG_USB_LD=m CONFIG_USB_TRANCEVIBRATOR=m CONFIG_USB_IOWARRIOR=m CONFIG_USB_TEST=m +# CONFIG_USB_ISIGHTFW is not set CONFIG_USB_ATM=m CONFIG_USB_SPEEDTOUCH=m CONFIG_USB_CXACRU=m @@ -1563,30 +1722,51 @@ CONFIG_USB_XUSBATM=m CONFIG_USB_GADGET=m # CONFIG_USB_GADGET_DEBUG_FILES is not set # CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 CONFIG_USB_GADGET_SELECTED=y -# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_AT91 is not set # CONFIG_USB_GADGET_ATMEL_USBA is not set # CONFIG_USB_GADGET_FSL_USB2 is not set -CONFIG_USB_GADGET_NET2280=y -CONFIG_USB_NET2280=m -# CONFIG_USB_GADGET_PXA2XX is not set -# CONFIG_USB_GADGET_M66592 is not set -# CONFIG_USB_GADGET_GOKU is not set # CONFIG_USB_GADGET_LH7A40X is not set # CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_R8A66597 is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set +# CONFIG_USB_GADGET_IMX is not set # CONFIG_USB_GADGET_S3C2410 is not set -# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_CI13XXX is not set +CONFIG_USB_GADGET_NET2280=y +CONFIG_USB_NET2280=m +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LANGWELL is not set # CONFIG_USB_GADGET_DUMMY_HCD is not set CONFIG_USB_GADGET_DUALSPEED=y CONFIG_USB_ZERO=m +# CONFIG_USB_AUDIO is not set CONFIG_USB_ETH=m CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_ETH_EEM is not set CONFIG_USB_GADGETFS=m CONFIG_USB_FILE_STORAGE=m # CONFIG_USB_FILE_STORAGE_TEST is not set +# CONFIG_USB_MASS_STORAGE is not set CONFIG_USB_G_SERIAL=m CONFIG_USB_MIDI_GADGET=m # CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_NOKIA is not set +# CONFIG_USB_G_MULTI is not set + +# +# OTG and related infrastructure +# +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_UWB is not set # CONFIG_MMC is not set # CONFIG_MEMSTICK is not set CONFIG_NEW_LEDS=y @@ -1596,21 +1776,33 @@ CONFIG_LEDS_CLASS=y # LED drivers # CONFIG_LEDS_GPIO=y +CONFIG_LEDS_GPIO_PLATFORM=y +# CONFIG_LEDS_LT3593 is not set +CONFIG_LEDS_TRIGGERS=y # # LED Triggers # -CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_ACCESSIBILITY is not set # CONFIG_INFINIBAND is not set CONFIG_RTC_LIB=y # CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set # -# Userspace I/O +# TI VLYNQ # -# CONFIG_UIO is not set +# CONFIG_STAGING is not set # # File systems @@ -1621,10 +1813,11 @@ CONFIG_EXT2_FS_POSIX_ACL=y CONFIG_EXT2_FS_SECURITY=y # CONFIG_EXT2_FS_XIP is not set CONFIG_EXT3_FS=y +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set CONFIG_EXT3_FS_XATTR=y CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y -# CONFIG_EXT4DEV_FS is not set +# CONFIG_EXT4_FS is not set CONFIG_JBD=y # CONFIG_JBD_DEBUG is not set CONFIG_FS_MBCACHE=y @@ -1642,28 +1835,39 @@ CONFIG_JFS_SECURITY=y CONFIG_FS_POSIX_ACL=y CONFIG_XFS_FS=m CONFIG_XFS_QUOTA=y -CONFIG_XFS_SECURITY=y CONFIG_XFS_POSIX_ACL=y CONFIG_XFS_RT=y +# CONFIG_XFS_DEBUG is not set CONFIG_GFS2_FS=m -CONFIG_GFS2_FS_LOCKING_NOLOCK=m -CONFIG_GFS2_FS_LOCKING_DLM=m +# CONFIG_GFS2_FS_LOCKING_DLM is not set # CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y CONFIG_INOTIFY=y CONFIG_INOTIFY_USER=y CONFIG_QUOTA=y CONFIG_QUOTA_NETLINK_INTERFACE=y CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QUOTA_DEBUG is not set +CONFIG_QUOTA_TREE=m CONFIG_QFMT_V1=m CONFIG_QFMT_V2=m CONFIG_QUOTACTL=y CONFIG_AUTOFS_FS=m CONFIG_AUTOFS4_FS=m CONFIG_FUSE_FS=m +# CONFIG_CUSE is not set CONFIG_GENERIC_ACL=y # +# Caches +# +# CONFIG_FSCACHE is not set + +# # CD-ROM/DVD Filesystems # CONFIG_ISO9660_FS=m @@ -1690,15 +1894,13 @@ CONFIG_NTFS_RW=y CONFIG_PROC_FS=y CONFIG_PROC_KCORE=y CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y CONFIG_SYSFS=y CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y # CONFIG_HUGETLB_PAGE is not set CONFIG_CONFIGFS_FS=m - -# -# Miscellaneous filesystems -# +CONFIG_MISC_FILESYSTEMS=y CONFIG_ADFS_FS=m # CONFIG_ADFS_FS_RW is not set CONFIG_AFFS_FS=m @@ -1721,12 +1923,19 @@ CONFIG_JFFS2_ZLIB=y # CONFIG_JFFS2_LZO is not set CONFIG_JFFS2_RTIME=y # CONFIG_JFFS2_RUBIN is not set +# CONFIG_LOGFS is not set CONFIG_CRAMFS=m +# CONFIG_SQUASHFS is not set CONFIG_VXFS_FS=m CONFIG_MINIX_FS=m +# CONFIG_OMFS_FS is not set CONFIG_HPFS_FS=m CONFIG_QNX4FS_FS=m CONFIG_ROMFS_FS=m +CONFIG_ROMFS_BACKED_BY_BLOCK=y +# CONFIG_ROMFS_BACKED_BY_MTD is not set +# CONFIG_ROMFS_BACKED_BY_BOTH is not set +CONFIG_ROMFS_ON_BLOCK=y CONFIG_SYSV_FS=m CONFIG_UFS_FS=m # CONFIG_UFS_FS_WRITE is not set @@ -1736,13 +1945,12 @@ CONFIG_NFS_FS=m CONFIG_NFS_V3=y CONFIG_NFS_V3_ACL=y CONFIG_NFS_V4=y -# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFS_V4_1 is not set CONFIG_NFSD=m CONFIG_NFSD_V2_ACL=y CONFIG_NFSD_V3=y CONFIG_NFSD_V3_ACL=y CONFIG_NFSD_V4=y -CONFIG_NFSD_TCP=y CONFIG_LOCKD=m CONFIG_LOCKD_V4=y CONFIG_EXPORTFS=m @@ -1750,10 +1958,10 @@ CONFIG_NFS_ACL_SUPPORT=m CONFIG_NFS_COMMON=y CONFIG_SUNRPC=m CONFIG_SUNRPC_GSS=m -CONFIG_SUNRPC_BIND34=y CONFIG_RPCSEC_GSS_KRB5=m CONFIG_RPCSEC_GSS_SPKM3=m # CONFIG_SMB_FS is not set +# CONFIG_CEPH_FS is not set CONFIG_CIFS=m # CONFIG_CIFS_STATS is not set # CONFIG_CIFS_WEAK_PW_HASH is not set @@ -1771,9 +1979,7 @@ CONFIG_NCPFS_OS2_NS=y CONFIG_NCPFS_NLS=y CONFIG_NCPFS_EXTRAS=y CONFIG_CODA_FS=m -# CONFIG_CODA_FS_OLD_API is not set # CONFIG_AFS_FS is not set -CONFIG_9P_FS=m # # Partition Types @@ -1846,90 +2052,167 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y # CONFIG_PRINTK_TIME is not set CONFIG_ENABLE_WARN_DEPRECATED=y CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 # CONFIG_MAGIC_SYSRQ is not set +# CONFIG_STRIP_ASM_SYMS is not set # CONFIG_UNUSED_SYMBOLS is not set CONFIG_DEBUG_FS=y # CONFIG_HEADERS_CHECK is not set # CONFIG_DEBUG_KERNEL is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_LKDTM is not set +# CONFIG_SYSCTL_SYSCALL_CHECK is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_DYNAMIC_DEBUG is not set # CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_EARLY_PRINTK=y # CONFIG_CMDLINE_BOOL is not set +# CONFIG_SPINLOCK_TEST is not set # # Security options # # CONFIG_KEYS is not set # CONFIG_SECURITY is not set -# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_SECURITYFS is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set +# CONFIG_DEFAULT_SECURITY_SMACK is not set +# CONFIG_DEFAULT_SECURITY_TOMOYO is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_FIPS is not set CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y CONFIG_CRYPTO_AEAD=m +CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_BLKCIPHER=m -# CONFIG_CRYPTO_SEQIV is not set +CONFIG_CRYPTO_BLKCIPHER2=y CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=m +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_PCOMP=y CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_GF128MUL=m +CONFIG_CRYPTO_NULL=m +CONFIG_CRYPTO_WORKQUEUE=y +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_AUTHENC=m +CONFIG_CRYPTO_TEST=m + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_XTS=m + +# +# Hash modes +# CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_XCBC=m -CONFIG_CRYPTO_NULL=m +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=m +# CONFIG_CRYPTO_GHASH is not set CONFIG_CRYPTO_MD4=m CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=m +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set CONFIG_CRYPTO_SHA1=m CONFIG_CRYPTO_SHA256=m CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_GF128MUL=m -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_CBC=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_XTS=m -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_CRYPTD is not set -CONFIG_CRYPTO_DES=m -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_TWOFISH_COMMON=m -CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_WP512=m + +# +# Ciphers +# CONFIG_CRYPTO_AES=m +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAST5=m CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_DES=m +CONFIG_CRYPTO_FCRYPT=m CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_SEED=m # CONFIG_CRYPTO_SALSA20 is not set +CONFIG_CRYPTO_SEED=m +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m + +# +# Compression +# CONFIG_CRYPTO_DEFLATE=m -CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_CRC32C=m -CONFIG_CRYPTO_CAMELLIA=m -CONFIG_CRYPTO_TEST=m -CONFIG_CRYPTO_AUTHENC=m +# CONFIG_CRYPTO_ZLIB is not set # CONFIG_CRYPTO_LZO is not set + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=m CONFIG_CRYPTO_HW=y # CONFIG_CRYPTO_DEV_HIFN_795X is not set +# CONFIG_BINARY_PRINTF is not set # # Library routines # CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_LAST_BIT=y CONFIG_CRC_CCITT=m CONFIG_CRC16=m +# CONFIG_CRC_T10DIF is not set CONFIG_CRC_ITU_T=m CONFIG_CRC32=y CONFIG_CRC7=m CONFIG_LIBCRC32C=m CONFIG_AUDIT_GENERIC=y -CONFIG_ZLIB_INFLATE=m +CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=m +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_LZMA=y CONFIG_TEXTSEARCH=y CONFIG_TEXTSEARCH_KMP=m CONFIG_TEXTSEARCH_BM=m CONFIG_TEXTSEARCH_FSM=m -CONFIG_PLIST=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_DMA=y +CONFIG_NLATTR=y From f.fainelli@gmail.com Sun May 2 11:40:33 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 02 May 2010 11:40:46 +0200 (CEST) Received: from mail-wy0-f177.google.com ([74.125.82.177]:56484 "EHLO mail-wy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491914Ab0EBJjP (ORCPT ); Sun, 2 May 2010 11:39:15 +0200 Received: by mail-wy0-f177.google.com with SMTP id 36so777565wyg.36 for ; Sun, 02 May 2010 02:39:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:sender:from:date:subject :mime-version:x-uid:x-length:to:reply-to:content-type :content-transfer-encoding:message-id; bh=J8EddcIBx16fQelfFQ1fRVij4x5COjFUtVoIRng7Cd8=; b=qHaks8mZ5SIa5EvkwDitM4VJdGwA/xff2vZwRS5zwp/I2is0IQilILAt0wnnHSf++4 1GuJuGQiTEQaejJqwlrUUeiHiOsTX2AxwWuVhjp9FAuAqGhR3Uzr64/kjeuUFEp2dty6 qpGj42Oy1lPN9E0spEfft4RT5RFmwjPBDcPvE= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:date:subject:mime-version:x-uid:x-length:to:reply-to :content-type:content-transfer-encoding:message-id; b=GSTocIkuFp7UuwJj9M1PhRebXxuwfqhxyLyrB0o8nlIEVFLOHEPiytyH0okI6uQB50 WStBAqhVkDzICj1njQMupzirt34Bp2Y14qpFzRMVaQsGMdeUq1fazBpfVT9Qm9UymSWp buMc7BJ6KjSaReN2O1nxq8cBNZGspPQYtzQmg= Received: by 10.216.90.202 with SMTP id e52mr43404wef.150.1272793155475; Sun, 02 May 2010 02:39:15 -0700 (PDT) Received: from lenovo.localnet (208.59.76-86.rev.gaoland.net [86.76.59.208]) by mx.google.com with ESMTPS id z3sm31713669wbs.4.2010.05.02.02.39.13 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sun, 02 May 2010 02:39:14 -0700 (PDT) From: Florian Fainelli Date: Sun, 2 May 2010 11:39:11 +0200 Subject: [PATCH 4/4] MTX-1: update defconfig MIME-Version: 1.0 X-UID: 189 X-Length: 92046 To: linux-mips@linux-mips.org, Ralf Baechle Reply-To: Florian Fainelli Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201005021139.12100.florian@openwrt.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26546 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips This updates the 4-G Systems MTX-1 defconfig, and removes unavailable subystems on this platform. Changes include: - built-in MTD char/block support - GPIO sysfs support - MTX-1 watchdog driver - I2C over GPIO driver as a module - SquashFS support Signed-off-by: Florian Fainelli --- diff --git a/arch/mips/configs/mtx1_defconfig b/arch/mips/configs/mtx1_defconfig index 144b94d..cff8f4c 100644 --- a/arch/mips/configs/mtx1_defconfig +++ b/arch/mips/configs/mtx1_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.23-rc8 -# Sun Sep 30 12:56:10 2007 +# Linux kernel version: 2.6.34-rc6 +# Sat May 1 13:39:10 2010 # CONFIG_MIPS=y @@ -9,20 +9,28 @@ CONFIG_MIPS=y # Machine selection # CONFIG_MACH_ALCHEMY=y +# CONFIG_AR7 is not set +# CONFIG_BCM47XX is not set +# CONFIG_BCM63XX is not set # CONFIG_MIPS_COBALT is not set # CONFIG_MACH_DECSTATION is not set # CONFIG_MACH_JAZZ is not set -# CONFIG_LEMOTE_FULONG is not set +# CONFIG_LASAT is not set +# CONFIG_MACH_LOONGSON is not set # CONFIG_MIPS_MALTA is not set # CONFIG_MIPS_SIM is not set -# CONFIG_MARKEINS is not set +# CONFIG_NEC_MARKEINS is not set # CONFIG_MACH_VR41XX is not set +# CONFIG_NXP_STB220 is not set +# CONFIG_NXP_STB225 is not set # CONFIG_PNX8550_JBS is not set # CONFIG_PNX8550_STB810 is not set # CONFIG_PMC_MSP is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_POWERTV is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set +# CONFIG_SGI_IP28 is not set # CONFIG_SGI_IP32 is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CARMEL is not set @@ -33,10 +41,14 @@ CONFIG_MACH_ALCHEMY=y # CONFIG_SIBYTE_SENTOSA is not set # CONFIG_SIBYTE_BIGSUR is not set # CONFIG_SNI_RM is not set -# CONFIG_TOSHIBA_JMR3927 is not set -# CONFIG_TOSHIBA_RBTX4927 is not set -# CONFIG_TOSHIBA_RBTX4938 is not set +# CONFIG_MACH_TX39XX is not set +# CONFIG_MACH_TX49XX is not set +# CONFIG_MIKROTIK_RB532 is not set # CONFIG_WR_PPMC is not set +# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set +# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set +CONFIG_ALCHEMY_GPIOINT_AU1000=y +# CONFIG_ALCHEMY_GPIO_INDIRECT is not set CONFIG_MIPS_MTX1=y # CONFIG_MIPS_BOSPORUS is not set # CONFIG_MIPS_DB1000 is not set @@ -53,29 +65,38 @@ CONFIG_MIPS_MTX1=y # CONFIG_MIPS_XXS1500 is not set CONFIG_SOC_AU1500=y CONFIG_SOC_AU1X00=y +CONFIG_LOONGSON_UART_BASE=y CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_ARCH_HAS_ILOG2_U32 is not set # CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_ARCH_SUPPORTS_OPROFILE=y CONFIG_GENERIC_FIND_NEXT_BIT=y CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_TIME=y -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y -# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_SCHED_OMIT_FRAME_POINTER=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_CEVT_R4K_LIB=y +CONFIG_CSRC_R4K_LIB=y CONFIG_DMA_NONCOHERENT=y -CONFIG_DMA_NEED_PCI_MAP_STATE=y -# CONFIG_HOTPLUG_CPU is not set +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_SYS_HAS_EARLY_PRINTK=y # CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_GPIO=y # CONFIG_CPU_BIG_ENDIAN is not set CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_IRQ_CPU=y CONFIG_MIPS_L1_CACHE_SHIFT=5 # # CPU selection # -# CONFIG_CPU_LOONGSON2 is not set +# CONFIG_CPU_LOONGSON2E is not set +# CONFIG_CPU_LOONGSON2F is not set CONFIG_CPU_MIPS32_R1=y # CONFIG_CPU_MIPS32_R2 is not set # CONFIG_CPU_MIPS64_R1 is not set @@ -88,6 +109,7 @@ CONFIG_CPU_MIPS32_R1=y # CONFIG_CPU_TX49XX is not set # CONFIG_CPU_R5000 is not set # CONFIG_CPU_R5432 is not set +# CONFIG_CPU_R5500 is not set # CONFIG_CPU_R6000 is not set # CONFIG_CPU_NEVADA is not set # CONFIG_CPU_R8000 is not set @@ -95,11 +117,14 @@ CONFIG_CPU_MIPS32_R1=y # CONFIG_CPU_RM7000 is not set # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set +# CONFIG_CPU_CAVIUM_OCTEON is not set +CONFIG_SYS_SUPPORTS_ZBOOT=y CONFIG_SYS_HAS_CPU_MIPS32_R1=y CONFIG_CPU_MIPS32=y CONFIG_CPU_MIPSR1=y CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_HARDWARE_WATCHPOINTS=y # # Kernel type @@ -109,28 +134,36 @@ CONFIG_32BIT=y CONFIG_PAGE_SIZE_4KB=y # CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set +# CONFIG_PAGE_SIZE_32KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_CPU_HAS_PREFETCH=y CONFIG_MIPS_MT_DISABLED=y # CONFIG_MIPS_MT_SMP is not set # CONFIG_MIPS_MT_SMTC is not set CONFIG_64BIT_PHYS_ADDR=y +CONFIG_ARCH_PHYS_ADDR_T_64BIT=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y CONFIG_CPU_SUPPORTS_HIGHMEM=y CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_POPULATES_NODE_MAP=y CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y # CONFIG_DISCONTIGMEM_MANUAL is not set # CONFIG_SPARSEMEM_MANUAL is not set CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_SPLIT_PTLOCK_CPUS=4 -CONFIG_RESOURCES_64BIT=y +CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_ZONE_DMA_FLAG=0 CONFIG_VIRT_TO_BUS=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y # CONFIG_HZ_48 is not set # CONFIG_HZ_100 is not set # CONFIG_HZ_128 is not set @@ -148,6 +181,7 @@ CONFIG_SECCOMP=y CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y # # General setup @@ -157,23 +191,49 @@ CONFIG_BROKEN_ON_SMP=y CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_LOCALVERSION="" # CONFIG_LOCALVERSION_AUTO is not set +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_BZIP2=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_BZIP2 is not set +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_LZO is not set CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y # CONFIG_TASKSTATS is not set -# CONFIG_USER_NS is not set CONFIG_AUDIT=y + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_TREE_PREEMPT_RCU is not set +# CONFIG_TINY_RCU is not set +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_FANOUT=32 +# CONFIG_RCU_FANOUT_EXACT is not set +# CONFIG_TREE_RCU_TRACE is not set # CONFIG_IKCONFIG is not set CONFIG_LOG_BUF_SHIFT=17 -CONFIG_SYSFS_DEPRECATED=y +# CONFIG_CGROUPS is not set +# CONFIG_SYSFS_DEPRECATED_V2 is not set CONFIG_RELAY=y +# CONFIG_NAMESPACES is not set CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +# CONFIG_RD_LZO is not set # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y CONFIG_EMBEDDED=y CONFIG_SYSCTL_SYSCALL=y CONFIG_KALLSYMS=y @@ -182,61 +242,104 @@ CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y +CONFIG_PCSPKR_PLATFORM=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y -CONFIG_ANON_INODES=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y +CONFIG_AIO=y + +# +# Kernel Performance Events And Counters +# CONFIG_VM_EVENT_COUNTERS=y +CONFIG_PCI_QUIRKS=y +CONFIG_COMPAT_BRK=y CONFIG_SLAB=y # CONFIG_SLUB is not set # CONFIG_SLOB is not set +CONFIG_PROFILING=y +CONFIG_OPROFILE=m +CONFIG_HAVE_OPROFILE=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_SLOW_WORK=y +# CONFIG_SLOW_WORK_DEBUG is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y -# CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_KMOD=y CONFIG_BLOCK=y -CONFIG_LBD=y -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_LSF is not set +CONFIG_LBDAF=y # CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set # # IO Schedulers # CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y CONFIG_IOSCHED_DEADLINE=y CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_AS is not set # CONFIG_DEFAULT_DEADLINE is not set CONFIG_DEFAULT_CFQ=y # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="cfq" +# CONFIG_INLINE_SPIN_TRYLOCK is not set +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK is not set +# CONFIG_INLINE_SPIN_LOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set +CONFIG_INLINE_SPIN_UNLOCK=y +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_READ_TRYLOCK is not set +# CONFIG_INLINE_READ_LOCK is not set +# CONFIG_INLINE_READ_LOCK_BH is not set +# CONFIG_INLINE_READ_LOCK_IRQ is not set +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set +CONFIG_INLINE_READ_UNLOCK=y +# CONFIG_INLINE_READ_UNLOCK_BH is not set +CONFIG_INLINE_READ_UNLOCK_IRQ=y +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_WRITE_TRYLOCK is not set +# CONFIG_INLINE_WRITE_LOCK is not set +# CONFIG_INLINE_WRITE_LOCK_BH is not set +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set +CONFIG_INLINE_WRITE_UNLOCK=y +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set +# CONFIG_MUTEX_SPIN_ON_OWNER is not set +CONFIG_FREEZER=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # CONFIG_HW_HAS_PCI=y CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y # CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_IOV is not set CONFIG_MMU=y - -# -# PCCARD (PCMCIA/CardBus) support -# CONFIG_PCCARD=m -# CONFIG_PCMCIA_DEBUG is not set CONFIG_PCMCIA=m CONFIG_PCMCIA_LOAD_CIS=y -CONFIG_PCMCIA_IOCTL=y CONFIG_CARDBUS=y # @@ -251,6 +354,7 @@ CONFIG_YENTA_TOSHIBA=y CONFIG_PD6729=m CONFIG_I82092=m # CONFIG_PCMCIA_AU1X00 is not set +# CONFIG_PCMCIA_ALCHEMY_DEVBOARD is not set CONFIG_PCCARD_NONSTATIC=m # CONFIG_HOTPLUG_PCI is not set @@ -258,35 +362,38 @@ CONFIG_PCCARD_NONSTATIC=m # Executable file formats # CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +# CONFIG_HAVE_AOUT is not set CONFIG_BINFMT_MISC=m CONFIG_TRAD_SIGNALS=y # # Power management options # +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_PM=y -# CONFIG_PM_LEGACY is not set # CONFIG_PM_DEBUG is not set CONFIG_PM_SLEEP=y -CONFIG_SUSPEND_UP_POSSIBLE=y CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_HIBERNATION is not set # CONFIG_APM_EMULATION is not set - -# -# Networking -# +# CONFIG_PM_RUNTIME is not set +CONFIG_PM_OPS=y CONFIG_NET=y # # Networking options # CONFIG_PACKET=m -CONFIG_PACKET_MMAP=y CONFIG_UNIX=y CONFIG_XFRM=y CONFIG_XFRM_USER=m # CONFIG_XFRM_SUB_POLICY is not set # CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_IPCOMP=m CONFIG_NET_KEY=m # CONFIG_NET_KEY_MIGRATE is not set CONFIG_INET=y @@ -315,42 +422,13 @@ CONFIG_INET_TUNNEL=m CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_BEET=m +CONFIG_INET_LRO=y CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_CUBIC=y CONFIG_DEFAULT_TCP_CONG="cubic" # CONFIG_TCP_MD5SIG is not set -CONFIG_IP_VS=m -# CONFIG_IP_VS_DEBUG is not set -CONFIG_IP_VS_TAB_BITS=12 - -# -# IPVS transport protocol load balancing support -# -CONFIG_IP_VS_PROTO_TCP=y -CONFIG_IP_VS_PROTO_UDP=y -CONFIG_IP_VS_PROTO_ESP=y -CONFIG_IP_VS_PROTO_AH=y - -# -# IPVS scheduler -# -CONFIG_IP_VS_RR=m -CONFIG_IP_VS_WRR=m -CONFIG_IP_VS_LC=m -CONFIG_IP_VS_WLC=m -CONFIG_IP_VS_LBLC=m -CONFIG_IP_VS_LBLCR=m -CONFIG_IP_VS_DH=m -CONFIG_IP_VS_SH=m -CONFIG_IP_VS_SED=m -CONFIG_IP_VS_NQ=m - -# -# IPVS application helper -# -CONFIG_IP_VS_FTP=m CONFIG_IPV6=m CONFIG_IPV6_PRIVACY=y # CONFIG_IPV6_ROUTER_PREF is not set @@ -366,12 +444,15 @@ CONFIG_INET6_XFRM_MODE_TUNNEL=m CONFIG_INET6_XFRM_MODE_BEET=m CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m CONFIG_IPV6_SIT=m +# CONFIG_IPV6_SIT_6RD is not set +CONFIG_IPV6_NDISC_NODETYPE=y CONFIG_IPV6_TUNNEL=m # CONFIG_IPV6_MULTIPLE_TABLES is not set -# CONFIG_NETLABEL is not set +# CONFIG_IPV6_MROUTE is not set CONFIG_NETWORK_SECMARK=y CONFIG_NETFILTER=y # CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y CONFIG_BRIDGE_NETFILTER=y # @@ -380,57 +461,97 @@ CONFIG_BRIDGE_NETFILTER=y CONFIG_NETFILTER_NETLINK=m CONFIG_NETFILTER_NETLINK_QUEUE=m CONFIG_NETFILTER_NETLINK_LOG=m -# CONFIG_NF_CONNTRACK_ENABLED is not set # CONFIG_NF_CONNTRACK is not set +# CONFIG_NETFILTER_TPROXY is not set CONFIG_NETFILTER_XTABLES=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_DSCP=m +CONFIG_NETFILTER_XT_TARGET_HL=m +# CONFIG_NETFILTER_XT_TARGET_LED is not set CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set # CONFIG_NETFILTER_XT_TARGET_TRACE is not set CONFIG_NETFILTER_XT_TARGET_SECMARK=m # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set CONFIG_NETFILTER_XT_MATCH_COMMENT=m CONFIG_NETFILTER_XT_MATCH_DCCP=m CONFIG_NETFILTER_XT_MATCH_DSCP=m CONFIG_NETFILTER_XT_MATCH_ESP=m +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +CONFIG_NETFILTER_XT_MATCH_HL=m +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set CONFIG_NETFILTER_XT_MATCH_LENGTH=m CONFIG_NETFILTER_XT_MATCH_LIMIT=m CONFIG_NETFILTER_XT_MATCH_MAC=m CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +CONFIG_NETFILTER_XT_MATCH_POLICY=m CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m CONFIG_NETFILTER_XT_MATCH_QUOTA=m +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set CONFIG_NETFILTER_XT_MATCH_REALM=m +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set CONFIG_NETFILTER_XT_MATCH_SCTP=m CONFIG_NETFILTER_XT_MATCH_STATISTIC=m CONFIG_NETFILTER_XT_MATCH_STRING=m CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +# CONFIG_NETFILTER_XT_MATCH_TIME is not set # CONFIG_NETFILTER_XT_MATCH_U32 is not set -# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +CONFIG_IP_VS=m +# CONFIG_IP_VS_IPV6 is not set +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_TAB_BITS=12 + +# +# IPVS transport protocol load balancing support +# +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +CONFIG_IP_VS_PROTO_AH_ESP=y +CONFIG_IP_VS_PROTO_ESP=y +CONFIG_IP_VS_PROTO_AH=y +# CONFIG_IP_VS_PROTO_SCTP is not set + +# +# IPVS scheduler +# +CONFIG_IP_VS_RR=m +CONFIG_IP_VS_WRR=m +CONFIG_IP_VS_LC=m +CONFIG_IP_VS_WLC=m +CONFIG_IP_VS_LBLC=m +CONFIG_IP_VS_LBLCR=m +CONFIG_IP_VS_DH=m +CONFIG_IP_VS_SH=m +CONFIG_IP_VS_SED=m +CONFIG_IP_VS_NQ=m + +# +# IPVS application helper +# +CONFIG_IP_VS_FTP=m # # IP: Netfilter Configuration # +# CONFIG_NF_DEFRAG_IPV4 is not set CONFIG_IP_NF_QUEUE=m CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_IPRANGE=m -CONFIG_IP_NF_MATCH_TOS=m -CONFIG_IP_NF_MATCH_RECENT=m -CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_ADDRTYPE=m CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_ECN=m CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_MATCH_OWNER=m -CONFIG_IP_NF_MATCH_ADDRTYPE=m CONFIG_IP_NF_FILTER=m CONFIG_IP_NF_TARGET_REJECT=m CONFIG_IP_NF_TARGET_LOG=m CONFIG_IP_NF_TARGET_ULOG=m CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_TARGET_TOS=m CONFIG_IP_NF_TARGET_ECN=m CONFIG_IP_NF_TARGET_TTL=m CONFIG_IP_NF_RAW=m @@ -439,34 +560,29 @@ CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m # -# IPv6: Netfilter Configuration (EXPERIMENTAL) +# IPv6: Netfilter Configuration # CONFIG_IP6_NF_QUEUE=m CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_MATCH_RT=m -CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_EUI64=m CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_OPTS=m CONFIG_IP6_NF_MATCH_HL=m -CONFIG_IP6_NF_MATCH_OWNER=m CONFIG_IP6_NF_MATCH_IPV6HEADER=m -CONFIG_IP6_NF_MATCH_AH=m # CONFIG_IP6_NF_MATCH_MH is not set -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_TARGET_HL=m CONFIG_IP6_NF_TARGET_LOG=m +CONFIG_IP6_NF_FILTER=m CONFIG_IP6_NF_TARGET_REJECT=m CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_TARGET_HL=m CONFIG_IP6_NF_RAW=m # # DECnet: Netfilter Configuration # CONFIG_DECNET_NF_GRABULATOR=m - -# -# Bridge: Netfilter Configuration -# CONFIG_BRIDGE_NF_EBTABLES=m CONFIG_BRIDGE_EBT_BROUTE=m CONFIG_BRIDGE_EBT_T_FILTER=m @@ -475,6 +591,7 @@ CONFIG_BRIDGE_EBT_802_3=m CONFIG_BRIDGE_EBT_AMONG=m CONFIG_BRIDGE_EBT_ARP=m CONFIG_BRIDGE_EBT_IP=m +# CONFIG_BRIDGE_EBT_IP6 is not set CONFIG_BRIDGE_EBT_LIMIT=m CONFIG_BRIDGE_EBT_MARK=m CONFIG_BRIDGE_EBT_PKTTYPE=m @@ -487,25 +604,25 @@ CONFIG_BRIDGE_EBT_REDIRECT=m CONFIG_BRIDGE_EBT_SNAT=m CONFIG_BRIDGE_EBT_LOG=m CONFIG_BRIDGE_EBT_ULOG=m +# CONFIG_BRIDGE_EBT_NFLOG is not set CONFIG_IP_DCCP=m CONFIG_INET_DCCP_DIAG=m -CONFIG_IP_DCCP_ACKVEC=y # # DCCP CCIDs Configuration (EXPERIMENTAL) # -CONFIG_IP_DCCP_CCID2=m # CONFIG_IP_DCCP_CCID2_DEBUG is not set -CONFIG_IP_DCCP_CCID3=m -CONFIG_IP_DCCP_TFRC_LIB=m +CONFIG_IP_DCCP_CCID3=y # CONFIG_IP_DCCP_CCID3_DEBUG is not set CONFIG_IP_DCCP_CCID3_RTO=100 +CONFIG_IP_DCCP_TFRC_LIB=y CONFIG_IP_SCTP=m # CONFIG_SCTP_DBG_MSG is not set # CONFIG_SCTP_DBG_OBJCNT is not set # CONFIG_SCTP_HMAC_NONE is not set # CONFIG_SCTP_HMAC_SHA1 is not set CONFIG_SCTP_HMAC_MD5=y +# CONFIG_RDS is not set CONFIG_TIPC=m # CONFIG_TIPC_ADVANCED is not set # CONFIG_TIPC_DEBUG is not set @@ -516,8 +633,12 @@ CONFIG_ATM_LANE=m CONFIG_ATM_MPOA=m CONFIG_ATM_BR2684=m # CONFIG_ATM_BR2684_IPFILTER is not set +CONFIG_STP=m CONFIG_BRIDGE=m +CONFIG_BRIDGE_IGMP_SNOOPING=y +# CONFIG_NET_DSA is not set CONFIG_VLAN_8021Q=m +# CONFIG_VLAN_8021Q_GVRP is not set CONFIG_DECNET=m # CONFIG_DECNET_ROUTER is not set CONFIG_LLC=y @@ -535,12 +656,9 @@ CONFIG_ECONET=m CONFIG_ECONET_AUNUDP=y CONFIG_ECONET_NATIVE=y CONFIG_WAN_ROUTER=m - -# -# QoS and/or fair queueing -# +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set CONFIG_NET_SCHED=y -CONFIG_NET_SCH_FIFO=y # # Queueing/Scheduling @@ -550,7 +668,7 @@ CONFIG_NET_SCH_HTB=m CONFIG_NET_SCH_HFSC=m CONFIG_NET_SCH_ATM=m CONFIG_NET_SCH_PRIO=m -# CONFIG_NET_SCH_RR is not set +# CONFIG_NET_SCH_MULTIQ is not set CONFIG_NET_SCH_RED=m CONFIG_NET_SCH_SFQ=m CONFIG_NET_SCH_TEQL=m @@ -558,6 +676,7 @@ CONFIG_NET_SCH_TBF=m CONFIG_NET_SCH_GRED=m CONFIG_NET_SCH_DSMARK=m CONFIG_NET_SCH_NETEM=m +# CONFIG_NET_SCH_DRR is not set CONFIG_NET_SCH_INGRESS=m # @@ -574,6 +693,7 @@ CONFIG_NET_CLS_U32=m CONFIG_CLS_U32_MARK=y CONFIG_NET_CLS_RSVP=m CONFIG_NET_CLS_RSVP6=m +# CONFIG_NET_CLS_FLOW is not set CONFIG_NET_EMATCH=y CONFIG_NET_EMATCH_STACK=32 CONFIG_NET_EMATCH_CMP=m @@ -586,10 +706,13 @@ CONFIG_NET_ACT_POLICE=y # CONFIG_NET_ACT_GACT is not set # CONFIG_NET_ACT_MIRRED is not set # CONFIG_NET_ACT_IPT is not set +# CONFIG_NET_ACT_NAT is not set # CONFIG_NET_ACT_PEDIT is not set # CONFIG_NET_ACT_SIMP is not set -CONFIG_NET_CLS_POLICE=y +# CONFIG_NET_ACT_SKBEDIT is not set # CONFIG_NET_CLS_IND is not set +CONFIG_NET_SCH_FIFO=y +# CONFIG_DCB is not set # # Network testing @@ -613,9 +736,8 @@ CONFIG_6PACK=m CONFIG_BPQETHER=m CONFIG_BAYCOM_SER_FDX=m CONFIG_BAYCOM_SER_HDX=m -CONFIG_BAYCOM_PAR=m -CONFIG_BAYCOM_EPP=m CONFIG_YAM=m +# CONFIG_CAN is not set CONFIG_IRDA=m # @@ -657,15 +779,8 @@ CONFIG_MCP2120_DONGLE=m CONFIG_OLD_BELKIN_DONGLE=m CONFIG_ACT200L_DONGLE=m # CONFIG_KINGSUN_DONGLE is not set - -# -# Old SIR device drivers -# -# CONFIG_IRPORT_SIR is not set - -# -# Old Serial dongle support -# +# CONFIG_KSDAZZLE_DONGLE is not set +# CONFIG_KS959_DONGLE is not set # # FIR device drivers @@ -683,17 +798,17 @@ CONFIG_BT_RFCOMM_TTY=y CONFIG_BT_BNEP=m CONFIG_BT_BNEP_MC_FILTER=y CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_CMTP=m CONFIG_BT_HIDP=m # # Bluetooth device drivers # -CONFIG_BT_HCIUSB=m -CONFIG_BT_HCIUSB_SCO=y +# CONFIG_BT_HCIBTUSB is not set +# CONFIG_BT_HCIBTSDIO is not set CONFIG_BT_HCIUART=m CONFIG_BT_HCIUART_H4=y CONFIG_BT_HCIUART_BCSP=y +# CONFIG_BT_HCIUART_LL is not set CONFIG_BT_HCIBCM203X=m CONFIG_BT_HCIBPA10X=m CONFIG_BT_HCIBFUSB=m @@ -702,24 +817,19 @@ CONFIG_BT_HCIBT3C=m CONFIG_BT_HCIBLUECARD=m CONFIG_BT_HCIBTUART=m CONFIG_BT_HCIVHCI=m +# CONFIG_BT_MRVL is not set CONFIG_AF_RXRPC=m # CONFIG_AF_RXRPC_DEBUG is not set # CONFIG_RXKAD is not set CONFIG_FIB_RULES=y +CONFIG_WIRELESS=y +# CONFIG_CFG80211 is not set +# CONFIG_LIB80211 is not set # -# Wireless +# CFG80211 needs to be enabled for MAC80211 # -# CONFIG_CFG80211 is not set -CONFIG_WIRELESS_EXT=y -# CONFIG_MAC80211 is not set -CONFIG_IEEE80211=m -# CONFIG_IEEE80211_DEBUG is not set -CONFIG_IEEE80211_CRYPT_WEP=m -CONFIG_IEEE80211_CRYPT_CCMP=m -CONFIG_IEEE80211_CRYPT_TKIP=m -CONFIG_IEEE80211_SOFTMAC=m -# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set +# CONFIG_WIMAX is not set # CONFIG_RFKILL is not set # CONFIG_NET_9P is not set @@ -730,40 +840,43 @@ CONFIG_IEEE80211_SOFTMAC=m # # Generic Driver Options # +CONFIG_UEVENT_HELPER_PATH="" +# CONFIG_DEVTMPFS is not set CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" # CONFIG_SYS_HYPERVISOR is not set CONFIG_CONNECTOR=m -CONFIG_MTD=m +CONFIG_MTD=y # CONFIG_MTD_DEBUG is not set -CONFIG_MTD_CONCAT=m +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_CONCAT is not set CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_REDBOOT_PARTS=m -CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 -# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set -# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set # # User Modules And Translation Layers # -CONFIG_MTD_CHAR=m -CONFIG_MTD_BLKDEVS=m -CONFIG_MTD_BLOCK=m -CONFIG_MTD_BLOCK_RO=m -CONFIG_FTL=m -CONFIG_NFTL=m -CONFIG_NFTL_RW=y -CONFIG_INFTL=m -CONFIG_RFD_FTL=m -CONFIG_SSFDC=m +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set # # RAM/ROM/Flash chip drivers # -CONFIG_MTD_CFI=m -CONFIG_MTD_JEDECPROBE=m -CONFIG_MTD_GEN_PROBE=m +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y # CONFIG_MTD_CFI_ADV_OPTIONS is not set CONFIG_MTD_MAP_BANK_WIDTH_1=y CONFIG_MTD_MAP_BANK_WIDTH_2=y @@ -775,206 +888,81 @@ CONFIG_MTD_CFI_I1=y CONFIG_MTD_CFI_I2=y # CONFIG_MTD_CFI_I4 is not set # CONFIG_MTD_CFI_I8 is not set -CONFIG_MTD_CFI_INTELEXT=m -CONFIG_MTD_CFI_AMDSTD=m -CONFIG_MTD_CFI_STAA=m -CONFIG_MTD_CFI_UTIL=m +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y CONFIG_MTD_RAM=m -CONFIG_MTD_ROM=m -CONFIG_MTD_ABSENT=m +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set # # Mapping drivers for chip access # CONFIG_MTD_COMPLEX_MAPPINGS=y -CONFIG_MTD_PHYSMAP=m -CONFIG_MTD_PHYSMAP_START=0x8000000 -CONFIG_MTD_PHYSMAP_LEN=0x4000000 -CONFIG_MTD_PHYSMAP_BANKWIDTH=2 -# CONFIG_MTD_ALCHEMY is not set -# CONFIG_MTD_MTX1 is not set -CONFIG_MTD_PCI=m -CONFIG_MTD_PLATRAM=m +CONFIG_MTD_PHYSMAP=y +# CONFIG_MTD_PHYSMAP_COMPAT is not set +# CONFIG_MTD_PCI is not set +# CONFIG_MTD_GPIO_ADDR is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set # # Self-contained MTD device drivers # -CONFIG_MTD_PMC551=m -# CONFIG_MTD_PMC551_BUGFIX is not set -# CONFIG_MTD_PMC551_DEBUG is not set -CONFIG_MTD_DATAFLASH=m -CONFIG_MTD_M25P80=m -CONFIG_MTD_SLRAM=m -CONFIG_MTD_PHRAM=m -CONFIG_MTD_MTDRAM=m -CONFIG_MTDRAM_TOTAL_SIZE=4096 -CONFIG_MTDRAM_ERASE_SIZE=128 -CONFIG_MTD_BLOCK2MTD=m +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set # # Disk-On-Chip Device Drivers # -CONFIG_MTD_DOC2000=m -CONFIG_MTD_DOC2001=m -CONFIG_MTD_DOC2001PLUS=m -CONFIG_MTD_DOCPROBE=m -CONFIG_MTD_DOCECC=m -# CONFIG_MTD_DOCPROBE_ADVANCED is not set -CONFIG_MTD_DOCPROBE_ADDRESS=0 -CONFIG_MTD_NAND=m -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -CONFIG_MTD_NAND_IDS=m -CONFIG_MTD_NAND_DISKONCHIP=m -# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set -CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0 -# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set -# CONFIG_MTD_NAND_CAFE is not set -CONFIG_MTD_NAND_NANDSIM=m -# CONFIG_MTD_NAND_PLATFORM is not set -CONFIG_MTD_ONENAND=m -CONFIG_MTD_ONENAND_VERIFY_WRITE=y -# CONFIG_MTD_ONENAND_OTP is not set +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set # # UBI - Unsorted block images # # CONFIG_MTD_UBI is not set -CONFIG_PARPORT=m -CONFIG_PARPORT_PC=m -CONFIG_PARPORT_SERIAL=m -CONFIG_PARPORT_PC_FIFO=y -CONFIG_PARPORT_PC_SUPERIO=y -CONFIG_PARPORT_PC_PCMCIA=m -# CONFIG_PARPORT_GSC is not set -CONFIG_PARPORT_AX88796=m -CONFIG_PARPORT_1284=y -CONFIG_PARPORT_NOT_PC=y +# CONFIG_PARPORT is not set CONFIG_BLK_DEV=y -CONFIG_PARIDE=m - -# -# Parallel IDE high-level drivers -# -CONFIG_PARIDE_PD=m -CONFIG_PARIDE_PCD=m -CONFIG_PARIDE_PF=m -CONFIG_PARIDE_PT=m -CONFIG_PARIDE_PG=m - -# -# Parallel IDE protocol modules -# -CONFIG_PARIDE_ATEN=m -CONFIG_PARIDE_BPCK=m -CONFIG_PARIDE_BPCK6=m -CONFIG_PARIDE_COMM=m -CONFIG_PARIDE_DSTR=m -CONFIG_PARIDE_FIT2=m -CONFIG_PARIDE_FIT3=m -CONFIG_PARIDE_EPAT=m -CONFIG_PARIDE_EPATC8=y -CONFIG_PARIDE_EPIA=m -CONFIG_PARIDE_FRIQ=m -CONFIG_PARIDE_FRPW=m -CONFIG_PARIDE_KBIC=m -CONFIG_PARIDE_KTTI=m -CONFIG_PARIDE_ON20=m -CONFIG_PARIDE_ON26=m -CONFIG_BLK_CPQ_DA=m -CONFIG_BLK_CPQ_CISS_DA=m -CONFIG_CISS_SCSI_TAPE=y -CONFIG_BLK_DEV_DAC960=m -CONFIG_BLK_DEV_UMEM=m +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set # CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=m -CONFIG_BLK_DEV_CRYPTOLOOP=m +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_DRBD is not set CONFIG_BLK_DEV_NBD=m -CONFIG_BLK_DEV_SX8=m +# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_UB is not set CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=65536 -CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 -CONFIG_CDROM_PKTCDVD=m -CONFIG_CDROM_PKTCDVD_BUFFERS=8 -# CONFIG_CDROM_PKTCDVD_WCACHE is not set -CONFIG_ATA_OVER_ETH=m -CONFIG_MISC_DEVICES=y -# CONFIG_PHANTOM is not set -# CONFIG_EEPROM_93CX6 is not set -CONFIG_SGI_IOC4=m -CONFIG_TIFM_CORE=m -CONFIG_TIFM_7XX1=m -CONFIG_IDE=y -CONFIG_IDE_MAX_HWIFS=4 -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_IDE_SATA is not set -CONFIG_BLK_DEV_IDEDISK=m -# CONFIG_IDEDISK_MULTI_MODE is not set -CONFIG_BLK_DEV_IDECS=m -# CONFIG_BLK_DEV_DELKIN is not set -CONFIG_BLK_DEV_IDECD=m -CONFIG_BLK_DEV_IDETAPE=m -CONFIG_BLK_DEV_IDEFLOPPY=m -CONFIG_BLK_DEV_IDESCSI=m -# CONFIG_IDE_TASK_IOCTL is not set -CONFIG_IDE_PROC_FS=y - -# -# IDE chipset support/bugfixes -# -CONFIG_IDE_GENERIC=m -CONFIG_BLK_DEV_IDEPCI=y -CONFIG_IDEPCI_SHARE_IRQ=y -CONFIG_IDEPCI_PCIBUS_ORDER=y -# CONFIG_BLK_DEV_OFFBOARD is not set -CONFIG_BLK_DEV_GENERIC=m -CONFIG_BLK_DEV_OPTI621=m -CONFIG_BLK_DEV_IDEDMA_PCI=y -# CONFIG_BLK_DEV_IDEDMA_FORCED is not set -# CONFIG_IDEDMA_ONLYDISK is not set -CONFIG_BLK_DEV_AEC62XX=m -CONFIG_BLK_DEV_ALI15X3=m -# CONFIG_WDC_ALI15X3 is not set -CONFIG_BLK_DEV_AMD74XX=m -CONFIG_BLK_DEV_CMD64X=m -CONFIG_BLK_DEV_TRIFLEX=m -CONFIG_BLK_DEV_CY82C693=m -# CONFIG_BLK_DEV_CS5520 is not set -CONFIG_BLK_DEV_CS5530=m -CONFIG_BLK_DEV_HPT34X=m -# CONFIG_HPT34X_AUTODMA is not set -CONFIG_BLK_DEV_HPT366=m -# CONFIG_BLK_DEV_JMICRON is not set -CONFIG_BLK_DEV_SC1200=m -CONFIG_BLK_DEV_PIIX=m -# CONFIG_BLK_DEV_IT8213 is not set -CONFIG_BLK_DEV_IT821X=m -CONFIG_BLK_DEV_NS87415=m -CONFIG_BLK_DEV_PDC202XX_OLD=m -CONFIG_PDC202XX_BURST=y -CONFIG_BLK_DEV_PDC202XX_NEW=m -CONFIG_BLK_DEV_SVWKS=m -CONFIG_BLK_DEV_SIIMAGE=m -# CONFIG_BLK_DEV_SLC90E66 is not set -CONFIG_BLK_DEV_TRM290=m -# CONFIG_BLK_DEV_VIA82CXXX is not set -# CONFIG_BLK_DEV_TC86C001 is not set -# CONFIG_IDE_ARM is not set -CONFIG_BLK_DEV_IDEDMA=y -# CONFIG_IDEDMA_IVB is not set +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set # CONFIG_BLK_DEV_HD is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_TIFM_CORE=m +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set # # SCSI device support # -CONFIG_RAID_ATTRS=m +CONFIG_SCSI_MOD=m +# CONFIG_RAID_ATTRS is not set CONFIG_SCSI=m CONFIG_SCSI_DMA=y # CONFIG_SCSI_TGT is not set @@ -985,18 +973,13 @@ CONFIG_SCSI_PROC_FS=y # SCSI support type (disk, tape, CD-ROM) # CONFIG_BLK_DEV_SD=m -CONFIG_CHR_DEV_ST=m -CONFIG_CHR_DEV_OSST=m -CONFIG_BLK_DEV_SR=m -# CONFIG_BLK_DEV_SR_VENDOR is not set +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set CONFIG_CHR_DEV_SG=m -CONFIG_CHR_DEV_SCH=m - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# +# CONFIG_CHR_DEV_SCH is not set CONFIG_SCSI_MULTI_LUN=y -CONFIG_SCSI_CONSTANTS=y +# CONFIG_SCSI_CONSTANTS is not set CONFIG_SCSI_LOGGING=y # CONFIG_SCSI_SCAN_ASYNC is not set CONFIG_SCSI_WAIT_SCAN=m @@ -1009,198 +992,39 @@ CONFIG_SCSI_FC_ATTRS=m CONFIG_SCSI_ISCSI_ATTRS=m CONFIG_SCSI_SAS_ATTRS=m CONFIG_SCSI_SAS_LIBSAS=m -# CONFIG_SCSI_SAS_ATA is not set +CONFIG_SCSI_SAS_HOST_SMP=y # CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set -CONFIG_SCSI_LOWLEVEL=y -CONFIG_ISCSI_TCP=m -CONFIG_BLK_DEV_3W_XXXX_RAID=m -CONFIG_SCSI_3W_9XXX=m -CONFIG_SCSI_ACARD=m -CONFIG_SCSI_AACRAID=m -CONFIG_SCSI_AIC7XXX=m -CONFIG_AIC7XXX_CMDS_PER_DEVICE=8 -CONFIG_AIC7XXX_RESET_DELAY_MS=15000 -CONFIG_AIC7XXX_DEBUG_ENABLE=y -CONFIG_AIC7XXX_DEBUG_MASK=0 -CONFIG_AIC7XXX_REG_PRETTY_PRINT=y -# CONFIG_SCSI_AIC7XXX_OLD is not set -CONFIG_SCSI_AIC79XX=m -CONFIG_AIC79XX_CMDS_PER_DEVICE=32 -CONFIG_AIC79XX_RESET_DELAY_MS=15000 -CONFIG_AIC79XX_DEBUG_ENABLE=y -CONFIG_AIC79XX_DEBUG_MASK=0 -CONFIG_AIC79XX_REG_PRETTY_PRINT=y -CONFIG_SCSI_AIC94XX=m -# CONFIG_AIC94XX_DEBUG is not set -CONFIG_SCSI_DPT_I2O=m -CONFIG_SCSI_ARCMSR=m -CONFIG_MEGARAID_NEWGEN=y -CONFIG_MEGARAID_MM=m -CONFIG_MEGARAID_MAILBOX=m -CONFIG_MEGARAID_LEGACY=m -CONFIG_MEGARAID_SAS=m -CONFIG_SCSI_HPTIOP=m -CONFIG_SCSI_DMX3191D=m -CONFIG_SCSI_FUTURE_DOMAIN=m -CONFIG_SCSI_IPS=m -CONFIG_SCSI_INITIO=m -# CONFIG_SCSI_INIA100 is not set -CONFIG_SCSI_PPA=m -CONFIG_SCSI_IMM=m -# CONFIG_SCSI_IZIP_EPP16 is not set -# CONFIG_SCSI_IZIP_SLOW_CTR is not set -CONFIG_SCSI_STEX=m -CONFIG_SCSI_SYM53C8XX_2=m -CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1 -CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16 -CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64 -CONFIG_SCSI_SYM53C8XX_MMIO=y -CONFIG_SCSI_IPR=m -# CONFIG_SCSI_IPR_TRACE is not set -# CONFIG_SCSI_IPR_DUMP is not set -CONFIG_SCSI_QLOGIC_1280=m -CONFIG_SCSI_QLA_FC=m -CONFIG_SCSI_QLA_ISCSI=m -CONFIG_SCSI_LPFC=m -CONFIG_SCSI_DC395x=m -CONFIG_SCSI_DC390T=m -CONFIG_SCSI_NSP32=m -CONFIG_SCSI_DEBUG=m -# CONFIG_SCSI_SRP is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# CONFIG_SCSI_LOWLEVEL is not set # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set -CONFIG_ATA=m -# CONFIG_ATA_NONSTANDARD is not set -CONFIG_SATA_AHCI=m -CONFIG_SATA_SVW=m -CONFIG_ATA_PIIX=m -CONFIG_SATA_MV=m -CONFIG_SATA_NV=m -CONFIG_PDC_ADMA=m -CONFIG_SATA_QSTOR=m -CONFIG_SATA_PROMISE=m -CONFIG_SATA_SX4=m -CONFIG_SATA_SIL=m -CONFIG_SATA_SIL24=m -CONFIG_SATA_SIS=m -CONFIG_SATA_ULI=m -CONFIG_SATA_VIA=m -CONFIG_SATA_VITESSE=m -# CONFIG_SATA_INIC162X is not set -# CONFIG_PATA_ALI is not set -# CONFIG_PATA_AMD is not set -# CONFIG_PATA_ARTOP is not set -# CONFIG_PATA_ATIIXP is not set -# CONFIG_PATA_CMD640_PCI is not set -# CONFIG_PATA_CMD64X is not set -CONFIG_PATA_CS5520=m -# CONFIG_PATA_CS5530 is not set -# CONFIG_PATA_CYPRESS is not set -CONFIG_PATA_EFAR=m -CONFIG_ATA_GENERIC=m -# CONFIG_PATA_HPT366 is not set -# CONFIG_PATA_HPT37X is not set -# CONFIG_PATA_HPT3X2N is not set -# CONFIG_PATA_HPT3X3 is not set -# CONFIG_PATA_IT821X is not set -# CONFIG_PATA_IT8213 is not set -CONFIG_PATA_JMICRON=m -CONFIG_PATA_TRIFLEX=m -# CONFIG_PATA_MARVELL is not set -CONFIG_PATA_MPIIX=m -# CONFIG_PATA_OLDPIIX is not set -CONFIG_PATA_NETCELL=m -# CONFIG_PATA_NS87410 is not set -# CONFIG_PATA_OPTI is not set -# CONFIG_PATA_OPTIDMA is not set -CONFIG_PATA_PCMCIA=m -# CONFIG_PATA_PDC_OLD is not set -# CONFIG_PATA_RADISYS is not set -CONFIG_PATA_RZ1000=m -# CONFIG_PATA_SC1200 is not set -# CONFIG_PATA_SERVERWORKS is not set -CONFIG_PATA_PDC2027X=m -CONFIG_PATA_SIL680=m -CONFIG_PATA_SIS=m -CONFIG_PATA_VIA=m -CONFIG_PATA_WINBOND=m -# CONFIG_PATA_PLATFORM is not set -CONFIG_MD=y -CONFIG_BLK_DEV_MD=m -CONFIG_MD_LINEAR=m -CONFIG_MD_RAID0=m -CONFIG_MD_RAID1=m -CONFIG_MD_RAID10=m -CONFIG_MD_RAID456=m -# CONFIG_MD_RAID5_RESHAPE is not set -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m -CONFIG_BLK_DEV_DM=m -# CONFIG_DM_DEBUG is not set -CONFIG_DM_CRYPT=m -CONFIG_DM_SNAPSHOT=m -CONFIG_DM_MIRROR=m -CONFIG_DM_ZERO=m -CONFIG_DM_MULTIPATH=m -CONFIG_DM_MULTIPATH_EMC=m -# CONFIG_DM_MULTIPATH_RDAC is not set -# CONFIG_DM_DELAY is not set - -# -# Fusion MPT device support -# -CONFIG_FUSION=y -CONFIG_FUSION_SPI=m -CONFIG_FUSION_FC=m -CONFIG_FUSION_SAS=m -CONFIG_FUSION_MAX_SGE=128 -CONFIG_FUSION_CTL=m -CONFIG_FUSION_LAN=m -# CONFIG_FUSION_LOGGING is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support # -# CONFIG_FIREWIRE is not set -CONFIG_IEEE1394=m - -# -# Subsystem Options -# -# CONFIG_IEEE1394_VERBOSEDEBUG is not set # -# Controllers +# You can enable one or both FireWire driver stacks. # -CONFIG_IEEE1394_PCILYNX=m -CONFIG_IEEE1394_OHCI1394=m # -# Protocols +# The newer stack is recommended. # -CONFIG_IEEE1394_VIDEO1394=m -CONFIG_IEEE1394_SBP2=m -# CONFIG_IEEE1394_SBP2_PHYS_DMA is not set -CONFIG_IEEE1394_ETH1394_ROM_ENTRY=y -CONFIG_IEEE1394_ETH1394=m -CONFIG_IEEE1394_DV1394=m -CONFIG_IEEE1394_RAWIO=m -CONFIG_I2O=m -CONFIG_I2O_LCT_NOTIFY_ON_CHANGES=y -CONFIG_I2O_EXT_ADAPTEC=y -CONFIG_I2O_CONFIG=m -CONFIG_I2O_CONFIG_OLD_IOCTL=y -CONFIG_I2O_BUS=m -CONFIG_I2O_BLOCK=m -CONFIG_I2O_SCSI=m -CONFIG_I2O_PROC=m +# CONFIG_FIREWIRE is not set +# CONFIG_IEEE1394 is not set +# CONFIG_I2O is not set CONFIG_NETDEVICES=y -# CONFIG_NETDEVICES_MULTIQUEUE is not set # CONFIG_IFB is not set CONFIG_DUMMY=m CONFIG_BONDING=m # CONFIG_MACVLAN is not set CONFIG_EQUALIZER=m CONFIG_TUN=m +# CONFIG_VETH is not set CONFIG_ARCNET=m CONFIG_ARCNET_1201=m CONFIG_ARCNET_1051=m @@ -1225,9 +1049,11 @@ CONFIG_VITESSE_PHY=m CONFIG_SMSC_PHY=m # CONFIG_BROADCOM_PHY is not set # CONFIG_ICPLUS_PHY is not set -CONFIG_FIXED_PHY=m -# CONFIG_FIXED_MII_10_FDX is not set -# CONFIG_FIXED_MII_100_FDX is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_MDIO_BITBANG is not set CONFIG_NET_ETHERNET=y CONFIG_MII=m # CONFIG_AX88796 is not set @@ -1240,8 +1066,12 @@ CONFIG_VORTEX=m CONFIG_TYPHOON=m # CONFIG_SMC91X is not set # CONFIG_DM9000 is not set +# CONFIG_ETHOC is not set +# CONFIG_SMSC911X is not set +# CONFIG_DNET is not set CONFIG_NET_TULIP=y CONFIG_DE2104X=m +CONFIG_DE2104X_DSL=0 CONFIG_TULIP=m # CONFIG_TULIP_MWI is not set # CONFIG_TULIP_MMIO is not set @@ -1251,21 +1081,26 @@ CONFIG_WINBOND_840=m CONFIG_DM9102=m CONFIG_ULI526X=m CONFIG_PCMCIA_XIRCOM=m -# CONFIG_PCMCIA_XIRTULIP is not set CONFIG_HP100=m +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set CONFIG_NET_PCI=y CONFIG_PCNET32=m -# CONFIG_PCNET32_NAPI is not set CONFIG_AMD8111_ETH=m -# CONFIG_AMD8111E_NAPI is not set CONFIG_ADAPTEC_STARFIRE=m -# CONFIG_ADAPTEC_STARFIRE_NAPI is not set +# CONFIG_KSZ884X_PCI is not set CONFIG_B44=m +CONFIG_B44_PCI_AUTOSELECT=y +CONFIG_B44_PCICORE_AUTOSELECT=y +CONFIG_B44_PCI=y CONFIG_FORCEDETH=m # CONFIG_FORCEDETH_NAPI is not set # CONFIG_TC35815 is not set -CONFIG_DGRS=m -CONFIG_EEPRO100=m CONFIG_E100=m CONFIG_FEALNX=m CONFIG_NATSEMI=m @@ -1276,52 +1111,71 @@ CONFIG_8139TOO=m # CONFIG_8139TOO_TUNE_TWISTER is not set CONFIG_8139TOO_8129=y # CONFIG_8139_OLD_RX_RESET is not set +# CONFIG_R6040 is not set CONFIG_SIS900=m CONFIG_EPIC100=m +# CONFIG_SMSC9420 is not set CONFIG_SUNDANCE=m # CONFIG_SUNDANCE_MMIO is not set CONFIG_TLAN=m +# CONFIG_KS8842 is not set +# CONFIG_KS8851_MLL is not set CONFIG_VIA_RHINE=m # CONFIG_VIA_RHINE_MMIO is not set -# CONFIG_VIA_RHINE_NAPI is not set # CONFIG_SC92031 is not set -CONFIG_NET_POCKET=y -CONFIG_DE600=m -CONFIG_DE620=m +# CONFIG_ATL2 is not set CONFIG_NETDEV_1000=y CONFIG_ACENIC=m # CONFIG_ACENIC_OMIT_TIGON_I is not set CONFIG_DL2K=m CONFIG_E1000=m -# CONFIG_E1000_NAPI is not set -# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set +# CONFIG_E1000E is not set +# CONFIG_IP1000 is not set +# CONFIG_IGB is not set +# CONFIG_IGBVF is not set CONFIG_NS83820=m CONFIG_HAMACHI=m CONFIG_YELLOWFIN=m CONFIG_R8169=m -# CONFIG_R8169_NAPI is not set CONFIG_R8169_VLAN=y CONFIG_SIS190=m CONFIG_SKGE=m +# CONFIG_SKGE_DEBUG is not set CONFIG_SKY2=m -CONFIG_SK98LIN=m +# CONFIG_SKY2_DEBUG is not set CONFIG_VIA_VELOCITY=m CONFIG_TIGON3=m CONFIG_BNX2=m +# CONFIG_CNIC is not set CONFIG_QLA3XXX=m # CONFIG_ATL1 is not set +# CONFIG_ATL1E is not set +# CONFIG_ATL1C is not set +# CONFIG_JME is not set CONFIG_NETDEV_10000=y +CONFIG_MDIO=m CONFIG_CHELSIO_T1=m # CONFIG_CHELSIO_T1_1G is not set -CONFIG_CHELSIO_T1_NAPI=y +CONFIG_CHELSIO_T3_DEPENDS=y # CONFIG_CHELSIO_T3 is not set +CONFIG_CHELSIO_T4_DEPENDS=y +# CONFIG_CHELSIO_T4 is not set +# CONFIG_ENIC is not set +# CONFIG_IXGBE is not set CONFIG_IXGB=m -# CONFIG_IXGB_NAPI is not set CONFIG_S2IO=m -# CONFIG_S2IO_NAPI is not set +# CONFIG_VXGE is not set CONFIG_MYRI10GE=m # CONFIG_NETXEN_NIC is not set +# CONFIG_NIU is not set +# CONFIG_MLX4_EN is not set # CONFIG_MLX4_CORE is not set +# CONFIG_TEHUTI is not set +# CONFIG_BNX2X is not set +# CONFIG_QLCNIC is not set +# CONFIG_QLGE is not set +# CONFIG_SFC is not set +# CONFIG_BE2NET is not set CONFIG_TR=y CONFIG_IBMOL=m CONFIG_IBMLS=m @@ -1329,12 +1183,18 @@ CONFIG_3C359=m CONFIG_TMS380TR=m CONFIG_TMSPCI=m CONFIG_ABYSS=m +CONFIG_WLAN=y +# CONFIG_PCMCIA_RAYCS is not set +# CONFIG_ATMEL is not set +# CONFIG_AIRO_CS is not set +# CONFIG_PCMCIA_WL3501 is not set +# CONFIG_PRISM54 is not set +# CONFIG_USB_ZD1201 is not set +# CONFIG_HOSTAP is not set # -# Wireless LAN +# Enable WiMAX (Networking options) to see the WiMAX drivers # -# CONFIG_WLAN_PRE80211 is not set -# CONFIG_WLAN_80211 is not set # # USB Network Adapters @@ -1343,11 +1203,13 @@ CONFIG_USB_CATC=m CONFIG_USB_KAWETH=m CONFIG_USB_PEGASUS=m CONFIG_USB_RTL8150=m -CONFIG_USB_USBNET_MII=m CONFIG_USB_USBNET=m CONFIG_USB_NET_AX8817X=m CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_CDC_EEM is not set # CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set CONFIG_USB_NET_GL620A=m CONFIG_USB_NET_NET1080=m CONFIG_USB_NET_PLUSB=m @@ -1361,6 +1223,9 @@ CONFIG_USB_ARMLINUX=y CONFIG_USB_EPSON2888=y # CONFIG_USB_KC2190 is not set CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +CONFIG_USB_SIERRA_NET=m CONFIG_NET_PCMCIA=y CONFIG_PCMCIA_3C589=m CONFIG_PCMCIA_3C574=m @@ -1383,16 +1248,6 @@ CONFIG_HDLC_PPP=m CONFIG_HDLC_X25=m CONFIG_PCI200SYN=m CONFIG_WANXL=m -CONFIG_PC300=m -CONFIG_PC300_MLPPP=y - -# -# Cyclades-PC300 MLPPP support is disabled. -# - -# -# Refer to the file README.mlppp, provided by PC300 package. -# # CONFIG_PC300TOO is not set CONFIG_FARSYNC=m CONFIG_DSCC4=m @@ -1428,15 +1283,13 @@ CONFIG_ATM_HORIZON=m # CONFIG_ATM_HORIZON_DEBUG is not set CONFIG_ATM_IA=m # CONFIG_ATM_IA_DEBUG is not set -CONFIG_ATM_FORE200E_MAYBE=m -CONFIG_ATM_FORE200E_PCA=y -CONFIG_ATM_FORE200E_PCA_DEFAULT_FW=y +CONFIG_ATM_FORE200E=m # CONFIG_ATM_FORE200E_USE_TASKLET is not set CONFIG_ATM_FORE200E_TX_RETRY=16 CONFIG_ATM_FORE200E_DEBUG=0 -CONFIG_ATM_FORE200E=m CONFIG_ATM_HE=m CONFIG_ATM_HE_USE_SUNI=y +# CONFIG_ATM_SOLOS is not set CONFIG_FDDI=y CONFIG_DEFXX=m # CONFIG_DEFXX_MMIO is not set @@ -1444,7 +1297,6 @@ CONFIG_SKFP=m CONFIG_HIPPI=y CONFIG_ROADRUNNER=m # CONFIG_ROADRUNNER_LARGE_RINGS is not set -CONFIG_PLIP=m CONFIG_PPP=m CONFIG_PPP_MULTILINK=y CONFIG_PPP_FILTER=y @@ -1462,219 +1314,53 @@ CONFIG_SLHC=m CONFIG_SLIP_SMART=y CONFIG_SLIP_MODE_SLIP6=y CONFIG_NET_FC=y -CONFIG_SHAPER=m CONFIG_NETCONSOLE=m +# CONFIG_NETCONSOLE_DYNAMIC is not set CONFIG_NETPOLL=y # CONFIG_NETPOLL_TRAP is not set CONFIG_NET_POLL_CONTROLLER=y -CONFIG_ISDN=m -CONFIG_ISDN_I4L=m -CONFIG_ISDN_PPP=y -CONFIG_ISDN_PPP_VJ=y -CONFIG_ISDN_MPP=y -CONFIG_IPPP_FILTER=y -CONFIG_ISDN_PPP_BSDCOMP=m -CONFIG_ISDN_AUDIO=y -CONFIG_ISDN_TTY_FAX=y -CONFIG_ISDN_X25=y - -# -# ISDN feature submodules -# -# CONFIG_ISDN_DRV_LOOP is not set -CONFIG_ISDN_DIVERSION=m - -# -# ISDN4Linux hardware drivers -# - -# -# Passive cards -# -CONFIG_ISDN_DRV_HISAX=m - -# -# D-channel protocol features -# -CONFIG_HISAX_EURO=y -CONFIG_DE_AOC=y -# CONFIG_HISAX_NO_SENDCOMPLETE is not set -# CONFIG_HISAX_NO_LLC is not set -# CONFIG_HISAX_NO_KEYPAD is not set -CONFIG_HISAX_1TR6=y -CONFIG_HISAX_NI1=y -CONFIG_HISAX_MAX_CARDS=8 - -# -# HiSax supported cards -# -CONFIG_HISAX_16_3=y -CONFIG_HISAX_TELESPCI=y -CONFIG_HISAX_S0BOX=y -CONFIG_HISAX_FRITZPCI=y -CONFIG_HISAX_AVM_A1_PCMCIA=y -CONFIG_HISAX_ELSA=y -CONFIG_HISAX_DIEHLDIVA=y -CONFIG_HISAX_SEDLBAUER=y -CONFIG_HISAX_NETJET=y -CONFIG_HISAX_NETJET_U=y -CONFIG_HISAX_NICCY=y -CONFIG_HISAX_BKM_A4T=y -CONFIG_HISAX_SCT_QUADRO=y -CONFIG_HISAX_GAZEL=y -CONFIG_HISAX_HFC_PCI=y -CONFIG_HISAX_W6692=y -CONFIG_HISAX_HFC_SX=y -CONFIG_HISAX_ENTERNOW_PCI=y -# CONFIG_HISAX_DEBUG is not set - -# -# HiSax PCMCIA card service modules -# -CONFIG_HISAX_SEDLBAUER_CS=m -CONFIG_HISAX_ELSA_CS=m -CONFIG_HISAX_AVM_A1_CS=m -CONFIG_HISAX_TELES_CS=m - -# -# HiSax sub driver modules -# -CONFIG_HISAX_ST5481=m -CONFIG_HISAX_HFCUSB=m -CONFIG_HISAX_HFC4S8S=m -CONFIG_HISAX_FRITZ_PCIPNP=m -CONFIG_HISAX_HDLC=y - -# -# Active cards -# -# CONFIG_HYSDN is not set -CONFIG_ISDN_DRV_GIGASET=m -CONFIG_GIGASET_BASE=m -CONFIG_GIGASET_M105=m -# CONFIG_GIGASET_M101 is not set -# CONFIG_GIGASET_DEBUG is not set -# CONFIG_GIGASET_UNDOCREQ is not set -CONFIG_ISDN_CAPI=m -CONFIG_ISDN_DRV_AVMB1_VERBOSE_REASON=y -CONFIG_CAPI_TRACE=y -CONFIG_ISDN_CAPI_MIDDLEWARE=y -CONFIG_ISDN_CAPI_CAPI20=m -CONFIG_ISDN_CAPI_CAPIFS_BOOL=y -CONFIG_ISDN_CAPI_CAPIFS=m -CONFIG_ISDN_CAPI_CAPIDRV=m - -# -# CAPI hardware drivers -# -CONFIG_CAPI_AVM=y -CONFIG_ISDN_DRV_AVMB1_B1PCI=m -CONFIG_ISDN_DRV_AVMB1_B1PCIV4=y -CONFIG_ISDN_DRV_AVMB1_B1PCMCIA=m -CONFIG_ISDN_DRV_AVMB1_AVM_CS=m -CONFIG_ISDN_DRV_AVMB1_T1PCI=m -CONFIG_ISDN_DRV_AVMB1_C4=m -CONFIG_CAPI_EICON=y -CONFIG_ISDN_DIVAS=m -CONFIG_ISDN_DIVAS_BRIPCI=y -CONFIG_ISDN_DIVAS_PRIPCI=y -CONFIG_ISDN_DIVAS_DIVACAPI=m -CONFIG_ISDN_DIVAS_USERIDI=m -CONFIG_ISDN_DIVAS_MAINT=m -CONFIG_PHONE=m -CONFIG_PHONE_IXJ=m -CONFIG_PHONE_IXJ_PCMCIA=m +# CONFIG_VMXNET3 is not set +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set # # Input device support # CONFIG_INPUT=y -CONFIG_INPUT_FF_MEMLESS=m +# CONFIG_INPUT_FF_MEMLESS is not set # CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set # # Userland interfaces # -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_INPUT_JOYDEV=m -CONFIG_INPUT_TSDEV=m -CONFIG_INPUT_TSDEV_SCREEN_X=240 -CONFIG_INPUT_TSDEV_SCREEN_Y=320 -CONFIG_INPUT_EVDEV=m -CONFIG_INPUT_EVBUG=m +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set # # Input Device Drivers # CONFIG_INPUT_KEYBOARD=y -CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_QT2160 is not set +# CONFIG_KEYBOARD_LKKBD is not set CONFIG_KEYBOARD_GPIO=y -CONFIG_KEYBOARD_SUNKBD=m -CONFIG_KEYBOARD_LKKBD=m -CONFIG_KEYBOARD_XTKBD=m -CONFIG_KEYBOARD_NEWTON=m -CONFIG_KEYBOARD_STOWAWAY=m -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=m -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_LIFEBOOK=y -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -CONFIG_MOUSE_SERIAL=m -# CONFIG_MOUSE_APPLETOUCH is not set -CONFIG_MOUSE_VSXXXAA=m -CONFIG_INPUT_JOYSTICK=y -CONFIG_JOYSTICK_ANALOG=m -CONFIG_JOYSTICK_A3D=m -CONFIG_JOYSTICK_ADI=m -CONFIG_JOYSTICK_COBRA=m -CONFIG_JOYSTICK_GF2K=m -CONFIG_JOYSTICK_GRIP=m -CONFIG_JOYSTICK_GRIP_MP=m -CONFIG_JOYSTICK_GUILLEMOT=m -CONFIG_JOYSTICK_INTERACT=m -CONFIG_JOYSTICK_SIDEWINDER=m -CONFIG_JOYSTICK_TMDC=m -CONFIG_JOYSTICK_IFORCE=m -CONFIG_JOYSTICK_IFORCE_USB=y -CONFIG_JOYSTICK_IFORCE_232=y -CONFIG_JOYSTICK_WARRIOR=m -CONFIG_JOYSTICK_MAGELLAN=m -CONFIG_JOYSTICK_SPACEORB=m -CONFIG_JOYSTICK_SPACEBALL=m -CONFIG_JOYSTICK_STINGER=m -CONFIG_JOYSTICK_TWIDJOY=m -CONFIG_JOYSTICK_DB9=m -CONFIG_JOYSTICK_GAMECON=m -CONFIG_JOYSTICK_TURBOGRAFX=m -CONFIG_JOYSTICK_JOYDUMP=m -# CONFIG_JOYSTICK_XPAD is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set # CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=m -# CONFIG_TOUCHSCREEN_FUJITSU is not set -CONFIG_TOUCHSCREEN_GUNZE=m -CONFIG_TOUCHSCREEN_ELO=m -CONFIG_TOUCHSCREEN_MTOUCH=m -CONFIG_TOUCHSCREEN_MK712=m -CONFIG_TOUCHSCREEN_PENMOUNT=m -CONFIG_TOUCHSCREEN_TOUCHRIGHT=m -CONFIG_TOUCHSCREEN_TOUCHWIN=m -# CONFIG_TOUCHSCREEN_UCB1400 is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -CONFIG_INPUT_MISC=y -CONFIG_INPUT_PCSPKR=m -# CONFIG_INPUT_ATI_REMOTE is not set -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -# CONFIG_INPUT_POWERMATE is not set -# CONFIG_INPUT_YEALINK is not set -CONFIG_INPUT_UINPUT=m +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set # # Hardware I/O ports @@ -1682,10 +1368,10 @@ CONFIG_INPUT_UINPUT=m CONFIG_SERIO=y CONFIG_SERIO_I8042=y CONFIG_SERIO_SERPORT=m -CONFIG_SERIO_PARKBD=m CONFIG_SERIO_PCIPS2=m CONFIG_SERIO_LIBPS2=y CONFIG_SERIO_RAW=m +# CONFIG_SERIO_ALTERA_PS2 is not set CONFIG_GAMEPORT=m CONFIG_GAMEPORT_NS558=m CONFIG_GAMEPORT_L4=m @@ -1696,30 +1382,13 @@ CONFIG_GAMEPORT_FM801=m # Character devices # CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_SERIAL_NONSTANDARD=y -# CONFIG_COMPUTONE is not set -CONFIG_ROCKETPORT=m -CONFIG_CYCLADES=m -# CONFIG_CYZ_INTR is not set -CONFIG_DIGIEPCA=m -# CONFIG_MOXA_INTELLIO is not set -CONFIG_MOXA_SMARTIO=m -# CONFIG_MOXA_SMARTIO_NEW is not set -# CONFIG_ISI is not set -CONFIG_SYNCLINKMP=m -CONFIG_SYNCLINK_GT=m -CONFIG_N_HDLC=m -# CONFIG_RISCOM8 is not set -CONFIG_SPECIALIX=m -# CONFIG_SPECIALIX_RTSCTS is not set -CONFIG_SX=m -# CONFIG_RIO is not set -CONFIG_STALDRV=y -# CONFIG_STALLION is not set -# CONFIG_ISTALLION is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set # # Serial drivers @@ -1741,161 +1410,128 @@ CONFIG_SERIAL_8250_RSA=y # CONFIG_SERIAL_CORE=m CONFIG_SERIAL_JSM=m +# CONFIG_SERIAL_TIMBERDALE is not set CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 -CONFIG_PRINTER=m -# CONFIG_LP_CONSOLE is not set -CONFIG_PPDEV=m -CONFIG_TIPAR=m -CONFIG_IPMI_HANDLER=m -# CONFIG_IPMI_PANIC_EVENT is not set -CONFIG_IPMI_DEVICE_INTERFACE=m -CONFIG_IPMI_SI=m -CONFIG_IPMI_WATCHDOG=m -CONFIG_IPMI_POWEROFF=m -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_NOWAYOUT is not set - -# -# Watchdog Device Drivers -# -CONFIG_SOFT_WATCHDOG=m -# CONFIG_WDT_MTX1 is not set - -# -# PCI-based Watchdog Cards -# -CONFIG_PCIPCWATCHDOG=m -CONFIG_WDTPCI=m -CONFIG_WDT_501_PCI=y - -# -# USB-based Watchdog Cards -# -CONFIG_USBPCWATCHDOG=m +# CONFIG_IPMI_HANDLER is not set CONFIG_HW_RANDOM=y -CONFIG_RTC=y -CONFIG_R3964=m -CONFIG_APPLICOM=m -CONFIG_DRM=m -CONFIG_DRM_TDFX=m -CONFIG_DRM_R128=m -CONFIG_DRM_RADEON=m -CONFIG_DRM_MGA=m -CONFIG_DRM_VIA=m -CONFIG_DRM_SAVAGE=m +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set # # PCMCIA character devices # -CONFIG_SYNCLINK_CS=m -CONFIG_CARDMAN_4000=m -CONFIG_CARDMAN_4040=m -CONFIG_RAW_DRIVER=m -CONFIG_MAX_RAW_DEVS=256 -CONFIG_TCG_TPM=m -CONFIG_TCG_ATMEL=m +# CONFIG_SYNCLINK_CS is not set +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_IPWIRELESS is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set CONFIG_DEVPORT=y CONFIG_I2C=m CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=m +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=m # -# I2C Algorithms +# I2C Hardware Bus support # -CONFIG_I2C_ALGOBIT=m -CONFIG_I2C_ALGOPCF=m -CONFIG_I2C_ALGOPCA=m # -# I2C Hardware Bus support +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) # -CONFIG_I2C_ALI1535=m -CONFIG_I2C_ALI1563=m -CONFIG_I2C_ALI15X3=m -CONFIG_I2C_AMD756=m -CONFIG_I2C_AMD756_S4882=m -CONFIG_I2C_AMD8111=m -CONFIG_I2C_I801=m -CONFIG_I2C_I810=m -CONFIG_I2C_PIIX4=m -CONFIG_I2C_NFORCE2=m -CONFIG_I2C_OCORES=m -CONFIG_I2C_PARPORT=m -CONFIG_I2C_PARPORT_LIGHT=m -CONFIG_I2C_PROSAVAGE=m -CONFIG_I2C_SAVAGE4=m +CONFIG_I2C_GPIO=m +# CONFIG_I2C_OCORES is not set # CONFIG_I2C_SIMTEC is not set -CONFIG_I2C_SIS5595=m -CONFIG_I2C_SIS630=m -CONFIG_I2C_SIS96X=m +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set # CONFIG_I2C_TAOS_EVM is not set -CONFIG_I2C_STUB=m # CONFIG_I2C_TINY_USB is not set -CONFIG_I2C_VIA=m -CONFIG_I2C_VIAPRO=m -CONFIG_I2C_VOODOO3=m # -# Miscellaneous I2C Chip support +# Other I2C/SMBus bus drivers # -CONFIG_SENSORS_DS1337=m -CONFIG_SENSORS_DS1374=m -# CONFIG_DS1682 is not set -CONFIG_EEPROM_LEGACY=m -CONFIG_SENSORS_PCF8574=m -CONFIG_SENSORS_PCA9539=m -CONFIG_SENSORS_PCF8591=m -CONFIG_EEPROM_MAX6875=m -# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_SPI is not set # -# SPI support +# PPS support # -CONFIG_SPI=y -CONFIG_SPI_MASTER=y +# CONFIG_PPS is not set +CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_SYSFS=y # -# SPI Master Controller Drivers +# Memory mapped GPIO expanders: # -CONFIG_SPI_BITBANG=m -CONFIG_SPI_BUTTERFLY=m -# CONFIG_SPI_LM70_LLP is not set +# CONFIG_GPIO_IT8761E is not set +# CONFIG_GPIO_SCH is not set # -# SPI Protocol Masters +# I2C GPIO expanders: # -# CONFIG_EEPROM_AT25 is not set -# CONFIG_SPI_SPIDEV is not set -# CONFIG_SPI_TLE62X0 is not set -CONFIG_W1=m -CONFIG_W1_CON=y +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_ADP5588 is not set # -# 1-wire Bus Masters +# PCI GPIO expanders: # -CONFIG_W1_MASTER_MATROX=m -CONFIG_W1_MASTER_DS2490=m -CONFIG_W1_MASTER_DS2482=m +# CONFIG_GPIO_CS5535 is not set +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_LANGWELL is not set # -# 1-wire Slaves +# SPI GPIO expanders: # -CONFIG_W1_SLAVE_THERM=m -CONFIG_W1_SLAVE_SMEM=m -CONFIG_W1_SLAVE_DS2433=m -# CONFIG_W1_SLAVE_DS2433_CRC is not set -# CONFIG_W1_SLAVE_DS2760 is not set + +# +# AC97 GPIO expanders: +# +# CONFIG_W1 is not set # CONFIG_POWER_SUPPLY is not set CONFIG_HWMON=y CONFIG_HWMON_VID=m -CONFIG_SENSORS_ABITUGURU=m -# CONFIG_SENSORS_ABITUGURU3 is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7414 is not set # CONFIG_SENSORS_AD7418 is not set CONFIG_SENSORS_ADM1021=m CONFIG_SENSORS_ADM1025=m @@ -1903,17 +1539,23 @@ CONFIG_SENSORS_ADM1026=m # CONFIG_SENSORS_ADM1029 is not set CONFIG_SENSORS_ADM1031=m CONFIG_SENSORS_ADM9240=m -CONFIG_SENSORS_ASB100=m +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_ASC7621 is not set CONFIG_SENSORS_ATXP1=m CONFIG_SENSORS_DS1621=m +# CONFIG_SENSORS_I5K_AMB is not set CONFIG_SENSORS_F71805F=m -CONFIG_SENSORS_FSCHER=m -CONFIG_SENSORS_FSCPOS=m +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_G760A is not set CONFIG_SENSORS_GL518SM=m CONFIG_SENSORS_GL520SM=m CONFIG_SENSORS_IT87=m CONFIG_SENSORS_LM63=m -CONFIG_SENSORS_LM70=m +# CONFIG_SENSORS_LM73 is not set CONFIG_SENSORS_LM75=m CONFIG_SENSORS_LM77=m CONFIG_SENSORS_LM78=m @@ -1924,16 +1566,25 @@ CONFIG_SENSORS_LM87=m CONFIG_SENSORS_LM90=m CONFIG_SENSORS_LM92=m # CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LM95241 is not set CONFIG_SENSORS_MAX1619=m # CONFIG_SENSORS_MAX6650 is not set CONFIG_SENSORS_PC87360=m # CONFIG_SENSORS_PC87427 is not set +CONFIG_SENSORS_PCF8591=m +# CONFIG_SENSORS_SHT15 is not set CONFIG_SENSORS_SIS5595=m # CONFIG_SENSORS_DME1737 is not set CONFIG_SENSORS_SMSC47M1=m CONFIG_SENSORS_SMSC47M192=m CONFIG_SENSORS_SMSC47B397=m +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_AMC6821 is not set # CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set CONFIG_SENSORS_VIA686A=m CONFIG_SENSORS_VT1211=m CONFIG_SENSORS_VT8231=m @@ -1942,370 +1593,94 @@ CONFIG_SENSORS_W83791D=m CONFIG_SENSORS_W83792D=m # CONFIG_SENSORS_W83793 is not set CONFIG_SENSORS_W83L785TS=m +# CONFIG_SENSORS_W83L786NG is not set CONFIG_SENSORS_W83627HF=m CONFIG_SENSORS_W83627EHF=m -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_SM501 is not set - -# -# Multimedia devices -# -CONFIG_VIDEO_DEV=m -CONFIG_VIDEO_V4L1=y -CONFIG_VIDEO_V4L1_COMPAT=y -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -CONFIG_VIDEO_HELPER_CHIPS_AUTO=y -CONFIG_VIDEO_TVAUDIO=m -CONFIG_VIDEO_TDA7432=m -CONFIG_VIDEO_TDA9840=m -CONFIG_VIDEO_TDA9875=m -CONFIG_VIDEO_TEA6415C=m -CONFIG_VIDEO_TEA6420=m -CONFIG_VIDEO_MSP3400=m -CONFIG_VIDEO_WM8775=m -CONFIG_VIDEO_BT819=m -CONFIG_VIDEO_BT856=m -CONFIG_VIDEO_KS0127=m -CONFIG_VIDEO_SAA7110=m -CONFIG_VIDEO_SAA7111=m -CONFIG_VIDEO_SAA7114=m -CONFIG_VIDEO_SAA711X=m -CONFIG_VIDEO_TVP5150=m -CONFIG_VIDEO_VPX3220=m -CONFIG_VIDEO_CX25840=m -CONFIG_VIDEO_CX2341X=m -CONFIG_VIDEO_SAA7185=m -CONFIG_VIDEO_ADV7170=m -CONFIG_VIDEO_ADV7175=m -CONFIG_VIDEO_VIVI=m -CONFIG_VIDEO_BT848=m -CONFIG_VIDEO_BT848_DVB=y -CONFIG_VIDEO_SAA6588=m -CONFIG_VIDEO_BWQCAM=m -CONFIG_VIDEO_CQCAM=m -CONFIG_VIDEO_W9966=m -CONFIG_VIDEO_CPIA=m -CONFIG_VIDEO_CPIA_PP=m -CONFIG_VIDEO_CPIA_USB=m -CONFIG_VIDEO_CPIA2=m -CONFIG_VIDEO_SAA5246A=m -CONFIG_VIDEO_SAA5249=m -CONFIG_TUNER_3036=m -# CONFIG_TUNER_TEA5761 is not set -CONFIG_VIDEO_STRADIS=m -CONFIG_VIDEO_ZORAN_ZR36060=m -CONFIG_VIDEO_ZORAN=m -CONFIG_VIDEO_ZORAN_BUZ=m -CONFIG_VIDEO_ZORAN_DC10=m -CONFIG_VIDEO_ZORAN_DC30=m -CONFIG_VIDEO_ZORAN_LML33=m -CONFIG_VIDEO_ZORAN_LML33R10=m -CONFIG_VIDEO_ZORAN_AVS6EYES=m -CONFIG_VIDEO_SAA7134=m -CONFIG_VIDEO_SAA7134_ALSA=m -CONFIG_VIDEO_SAA7134_OSS=m -CONFIG_VIDEO_SAA7134_DVB=m -CONFIG_VIDEO_MXB=m -CONFIG_VIDEO_DPC=m -CONFIG_VIDEO_HEXIUM_ORION=m -CONFIG_VIDEO_HEXIUM_GEMINI=m -CONFIG_VIDEO_CX88=m -CONFIG_VIDEO_CX88_ALSA=m -CONFIG_VIDEO_CX88_BLACKBIRD=m -CONFIG_VIDEO_CX88_DVB=m -CONFIG_VIDEO_CX88_VP3054=m -# CONFIG_VIDEO_IVTV is not set -# CONFIG_VIDEO_CAFE_CCIC is not set -CONFIG_V4L_USB_DRIVERS=y -CONFIG_VIDEO_PVRUSB2=m -CONFIG_VIDEO_PVRUSB2_29XXX=y -CONFIG_VIDEO_PVRUSB2_24XXX=y -CONFIG_VIDEO_PVRUSB2_SYSFS=y -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set -CONFIG_VIDEO_EM28XX=m -# CONFIG_VIDEO_USBVISION is not set -CONFIG_VIDEO_USBVIDEO=m -CONFIG_USB_VICAM=m -CONFIG_USB_IBMCAM=m -CONFIG_USB_KONICAWC=m -CONFIG_USB_QUICKCAM_MESSENGER=m -CONFIG_USB_ET61X251=m -CONFIG_VIDEO_OVCAMCHIP=m -CONFIG_USB_W9968CF=m -# CONFIG_USB_OV511 is not set -CONFIG_USB_SE401=m -CONFIG_USB_SN9C102=m -CONFIG_USB_STV680=m -CONFIG_USB_ZC0301=m -CONFIG_USB_PWC=m -# CONFIG_USB_PWC_DEBUG is not set -# CONFIG_USB_ZR364XX is not set -CONFIG_RADIO_ADAPTERS=y -CONFIG_RADIO_GEMTEK_PCI=m -CONFIG_RADIO_MAXIRADIO=m -CONFIG_RADIO_MAESTRO=m -CONFIG_USB_DSBR=m -CONFIG_DVB_CORE=m -CONFIG_DVB_CORE_ATTACH=y -CONFIG_DVB_CAPTURE_DRIVERS=y - -# -# Supported SAA7146 based PCI Adapters -# -CONFIG_DVB_AV7110=m -CONFIG_DVB_AV7110_OSD=y -CONFIG_DVB_BUDGET=m -CONFIG_DVB_BUDGET_CI=m -CONFIG_DVB_BUDGET_AV=m -CONFIG_DVB_BUDGET_PATCH=m - -# -# Supported USB Adapters -# -CONFIG_DVB_USB=m -# CONFIG_DVB_USB_DEBUG is not set -CONFIG_DVB_USB_A800=m -CONFIG_DVB_USB_DIBUSB_MB=m -CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y -CONFIG_DVB_USB_DIBUSB_MC=m -CONFIG_DVB_USB_DIB0700=m -CONFIG_DVB_USB_UMT_010=m -CONFIG_DVB_USB_CXUSB=m -# CONFIG_DVB_USB_M920X is not set -# CONFIG_DVB_USB_GL861 is not set -# CONFIG_DVB_USB_AU6610 is not set -CONFIG_DVB_USB_DIGITV=m -CONFIG_DVB_USB_VP7045=m -CONFIG_DVB_USB_VP702X=m -CONFIG_DVB_USB_GP8PSK=m -CONFIG_DVB_USB_NOVA_T_USB2=m -# CONFIG_DVB_USB_TTUSB2 is not set -CONFIG_DVB_USB_DTT200U=m -# CONFIG_DVB_USB_OPERA1 is not set -# CONFIG_DVB_USB_AF9005 is not set -CONFIG_DVB_TTUSB_BUDGET=m -CONFIG_DVB_TTUSB_DEC=m -CONFIG_DVB_CINERGYT2=m -CONFIG_DVB_CINERGYT2_TUNING=y -CONFIG_DVB_CINERGYT2_STREAM_URB_COUNT=32 -CONFIG_DVB_CINERGYT2_STREAM_BUF_SIZE=512 -CONFIG_DVB_CINERGYT2_QUERY_INTERVAL=250 -CONFIG_DVB_CINERGYT2_ENABLE_RC_INPUT_DEVICE=y -CONFIG_DVB_CINERGYT2_RC_QUERY_INTERVAL=100 - -# -# Supported FlexCopII (B2C2) Adapters -# -CONFIG_DVB_B2C2_FLEXCOP=m -CONFIG_DVB_B2C2_FLEXCOP_PCI=m -CONFIG_DVB_B2C2_FLEXCOP_USB=m -# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set - -# -# Supported BT878 Adapters -# -CONFIG_DVB_BT8XX=m - -# -# Supported Pluto2 Adapters -# -CONFIG_DVB_PLUTO2=m - -# -# Supported DVB Frontends -# - -# -# Customise DVB Frontends -# -# CONFIG_DVB_FE_CUSTOMISE is not set - -# -# DVB-S (satellite) frontends -# -CONFIG_DVB_STV0299=m -CONFIG_DVB_CX24110=m -CONFIG_DVB_CX24123=m -CONFIG_DVB_TDA8083=m -CONFIG_DVB_MT312=m -CONFIG_DVB_VES1X93=m -CONFIG_DVB_S5H1420=m -CONFIG_DVB_TDA10086=m +# CONFIG_SENSORS_LIS3_I2C is not set +# CONFIG_THERMAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y # -# DVB-T (terrestrial) frontends +# Watchdog Device Drivers # -CONFIG_DVB_SP8870=m -CONFIG_DVB_SP887X=m -CONFIG_DVB_CX22700=m -CONFIG_DVB_CX22702=m -CONFIG_DVB_L64781=m -CONFIG_DVB_TDA1004X=m -CONFIG_DVB_NXT6000=m -CONFIG_DVB_MT352=m -CONFIG_DVB_ZL10353=m -CONFIG_DVB_DIB3000MB=m -CONFIG_DVB_DIB3000MC=m -CONFIG_DVB_DIB7000M=m -CONFIG_DVB_DIB7000P=m +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_ALIM7101_WDT is not set +CONFIG_WDT_MTX1=y # -# DVB-C (cable) frontends +# PCI-based Watchdog Cards # -CONFIG_DVB_VES1820=m -CONFIG_DVB_TDA10021=m -CONFIG_DVB_TDA10023=m -CONFIG_DVB_STV0297=m +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set # -# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# USB-based Watchdog Cards # -CONFIG_DVB_NXT200X=m -CONFIG_DVB_OR51211=m -CONFIG_DVB_OR51132=m -CONFIG_DVB_BCM3510=m -CONFIG_DVB_LGDT330X=m +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y # -# Tuners/PLL support +# Sonics Silicon Backplane # -CONFIG_DVB_PLL=m -CONFIG_DVB_TDA826X=m -CONFIG_DVB_TDA827X=m -# CONFIG_DVB_TUNER_QT1010 is not set -CONFIG_DVB_TUNER_MT2060=m +CONFIG_SSB=m +CONFIG_SSB_SPROM=y +CONFIG_SSB_PCIHOST_POSSIBLE=y +CONFIG_SSB_PCIHOST=y +# CONFIG_SSB_B43_PCI_BRIDGE is not set +CONFIG_SSB_PCMCIAHOST_POSSIBLE=y +# CONFIG_SSB_PCMCIAHOST is not set +CONFIG_SSB_SDIOHOST_POSSIBLE=y +# CONFIG_SSB_SDIOHOST is not set +# CONFIG_SSB_SILENT is not set +# CONFIG_SSB_DEBUG is not set +CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y +CONFIG_SSB_DRIVER_PCICORE=y +# CONFIG_SSB_DRIVER_MIPS is not set # -# Miscellaneous devices +# Multifunction device drivers # -CONFIG_DVB_LNBP21=m -CONFIG_DVB_ISL6421=m -CONFIG_DVB_TUA6100=m -CONFIG_VIDEO_SAA7146=m -CONFIG_VIDEO_SAA7146_VV=m -CONFIG_VIDEO_TUNER=m -CONFIG_VIDEO_BUF=m -CONFIG_VIDEO_BUF_DVB=m -CONFIG_VIDEO_BTCX=m -CONFIG_VIDEO_IR_I2C=m -CONFIG_VIDEO_IR=m -CONFIG_VIDEO_TVEEPROM=m -CONFIG_DAB=y -CONFIG_USB_DABUSB=m +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_UCB1400_CORE is not set +# CONFIG_TPS65010 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_TIMBERDALE is not set +# CONFIG_LPC_SCH is not set +# CONFIG_REGULATOR is not set +# CONFIG_MEDIA_SUPPORT is not set # # Graphics support # +# CONFIG_VGA_ARB is not set +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_LCD_CLASS_DEVICE=m +# CONFIG_LCD_CLASS_DEVICE is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set # # Display device support # # CONFIG_DISPLAY_SUPPORT is not set -CONFIG_VGASTATE=m -CONFIG_VIDEO_OUTPUT_CONTROL=m -CONFIG_FB=y -CONFIG_FIRMWARE_EDID=y -CONFIG_FB_DDC=m -CONFIG_FB_CFB_FILLRECT=m -CONFIG_FB_CFB_COPYAREA=m -CONFIG_FB_CFB_IMAGEBLIT=m -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_SYS_FOPS is not set -CONFIG_FB_DEFERRED_IO=y -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -CONFIG_FB_BACKLIGHT=y -CONFIG_FB_MODE_HELPERS=y -CONFIG_FB_TILEBLITTING=y - -# -# Frame buffer hardware drivers -# -CONFIG_FB_CIRRUS=m -CONFIG_FB_PM2=m -CONFIG_FB_PM2_FIFO_DISCONNECT=y -CONFIG_FB_CYBER2000=m -# CONFIG_FB_ASILIANT is not set -# CONFIG_FB_IMSTT is not set -CONFIG_FB_S1D13XXX=m -CONFIG_FB_NVIDIA=m -CONFIG_FB_NVIDIA_I2C=y -# CONFIG_FB_NVIDIA_DEBUG is not set -CONFIG_FB_NVIDIA_BACKLIGHT=y -CONFIG_FB_RIVA=m -CONFIG_FB_RIVA_I2C=y -# CONFIG_FB_RIVA_DEBUG is not set -CONFIG_FB_RIVA_BACKLIGHT=y -CONFIG_FB_MATROX=m -CONFIG_FB_MATROX_MILLENIUM=y -CONFIG_FB_MATROX_MYSTIQUE=y -CONFIG_FB_MATROX_G=y -CONFIG_FB_MATROX_I2C=m -CONFIG_FB_MATROX_MAVEN=m -CONFIG_FB_MATROX_MULTIHEAD=y -CONFIG_FB_RADEON=m -CONFIG_FB_RADEON_I2C=y -CONFIG_FB_RADEON_BACKLIGHT=y -# CONFIG_FB_RADEON_DEBUG is not set -CONFIG_FB_ATY128=m -CONFIG_FB_ATY128_BACKLIGHT=y -CONFIG_FB_ATY=m -CONFIG_FB_ATY_CT=y -CONFIG_FB_ATY_GENERIC_LCD=y -CONFIG_FB_ATY_GX=y -CONFIG_FB_ATY_BACKLIGHT=y -# CONFIG_FB_S3 is not set -CONFIG_FB_SAVAGE=m -CONFIG_FB_SAVAGE_I2C=y -CONFIG_FB_SAVAGE_ACCEL=y -CONFIG_FB_SIS=m -CONFIG_FB_SIS_300=y -CONFIG_FB_SIS_315=y -CONFIG_FB_NEOMAGIC=m -CONFIG_FB_KYRO=m -CONFIG_FB_3DFX=m -# CONFIG_FB_3DFX_ACCEL is not set -CONFIG_FB_VOODOO1=m -# CONFIG_FB_VT8623 is not set -CONFIG_FB_TRIDENT=m -# CONFIG_FB_TRIDENT_ACCEL is not set -# CONFIG_FB_ARK is not set -# CONFIG_FB_PM3 is not set -# CONFIG_FB_VIRTUAL is not set # # Console display driver support # -CONFIG_VGA_CONSOLE=y -# CONFIG_VGACON_SOFT_SCROLLBACK is not set +# CONFIG_VGA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=m -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -# CONFIG_LOGO is not set - -# -# Sound -# CONFIG_SOUND=m - -# -# Advanced Linux Sound Architecture -# +CONFIG_SOUND_OSS_CORE=y +CONFIG_SOUND_OSS_CORE_PRECLAIM=y CONFIG_SND=m CONFIG_SND_TIMER=m CONFIG_SND_PCM=m @@ -2318,32 +1693,29 @@ CONFIG_SND_MIXER_OSS=m CONFIG_SND_PCM_OSS=m CONFIG_SND_PCM_OSS_PLUGINS=y CONFIG_SND_SEQUENCER_OSS=y -CONFIG_SND_RTCTIMER=m -CONFIG_SND_SEQ_RTCTIMER_DEFAULT=y CONFIG_SND_DYNAMIC_MINORS=y CONFIG_SND_SUPPORT_OLD_API=y CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set - -# -# Generic devices -# +CONFIG_SND_VMASTER=y +CONFIG_SND_RAWMIDI_SEQ=m +CONFIG_SND_OPL3_LIB_SEQ=m +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +CONFIG_SND_EMU10K1_SEQ=m CONFIG_SND_MPU401_UART=m CONFIG_SND_OPL3_LIB=m CONFIG_SND_VX_LIB=m CONFIG_SND_AC97_CODEC=m +CONFIG_SND_DRIVERS=y CONFIG_SND_DUMMY=m CONFIG_SND_VIRMIDI=m CONFIG_SND_MTPAV=m -CONFIG_SND_MTS64=m CONFIG_SND_SERIAL_U16550=m CONFIG_SND_MPU401=m -# CONFIG_SND_PORTMAN2X4 is not set - -# -# PCI devices -# +# CONFIG_SND_AC97_POWER_SAVE is not set +CONFIG_SND_PCI=y CONFIG_SND_AD1889=m CONFIG_SND_ALS300=m CONFIG_SND_ALI5451=m @@ -2352,14 +1724,18 @@ CONFIG_SND_ATIIXP_MODEM=m CONFIG_SND_AU8810=m CONFIG_SND_AU8820=m CONFIG_SND_AU8830=m +# CONFIG_SND_AW2 is not set CONFIG_SND_AZT3328=m CONFIG_SND_BT87X=m # CONFIG_SND_BT87X_OVERCLOCK is not set CONFIG_SND_CA0106=m CONFIG_SND_CMIPCI=m +# CONFIG_SND_OXYGEN is not set CONFIG_SND_CS4281=m CONFIG_SND_CS46XX=m CONFIG_SND_CS46XX_NEW_DSP=y +# CONFIG_SND_CS5535AUDIO is not set +# CONFIG_SND_CTXFI is not set CONFIG_SND_DARLA20=m CONFIG_SND_GINA20=m CONFIG_SND_LAYLA20=m @@ -2372,6 +1748,8 @@ CONFIG_SND_ECHO3G=m CONFIG_SND_INDIGO=m CONFIG_SND_INDIGOIO=m CONFIG_SND_INDIGODJ=m +# CONFIG_SND_INDIGOIOX is not set +# CONFIG_SND_INDIGODJX is not set CONFIG_SND_EMU10K1=m CONFIG_SND_EMU10K1X=m CONFIG_SND_ENS1370=m @@ -2379,19 +1757,36 @@ CONFIG_SND_ENS1371=m CONFIG_SND_ES1938=m CONFIG_SND_ES1968=m CONFIG_SND_FM801=m -CONFIG_SND_FM801_TEA575X_BOOL=y -CONFIG_SND_FM801_TEA575X=m CONFIG_SND_HDA_INTEL=m +# CONFIG_SND_HDA_HWDEP is not set +# CONFIG_SND_HDA_INPUT_BEEP is not set +# CONFIG_SND_HDA_INPUT_JACK is not set +# CONFIG_SND_HDA_PATCH_LOADER is not set +CONFIG_SND_HDA_CODEC_REALTEK=y +CONFIG_SND_HDA_CODEC_ANALOG=y +CONFIG_SND_HDA_CODEC_SIGMATEL=y +CONFIG_SND_HDA_CODEC_VIA=y +CONFIG_SND_HDA_CODEC_ATIHDMI=y +CONFIG_SND_HDA_CODEC_NVHDMI=y +CONFIG_SND_HDA_CODEC_INTELHDMI=y +CONFIG_SND_HDA_ELD=y +CONFIG_SND_HDA_CODEC_CIRRUS=y +CONFIG_SND_HDA_CODEC_CONEXANT=y +CONFIG_SND_HDA_CODEC_CA0110=y +CONFIG_SND_HDA_CODEC_CMEDIA=y +CONFIG_SND_HDA_CODEC_SI3054=y +CONFIG_SND_HDA_GENERIC=y +# CONFIG_SND_HDA_POWER_SAVE is not set CONFIG_SND_HDSP=m CONFIG_SND_HDSPM=m +# CONFIG_SND_HIFIER is not set CONFIG_SND_ICE1712=m CONFIG_SND_ICE1724=m CONFIG_SND_INTEL8X0=m CONFIG_SND_INTEL8X0M=m CONFIG_SND_KORG1212=m -CONFIG_SND_KORG1212_FIRMWARE_IN_KERNEL=y +# CONFIG_SND_LX6464ES is not set CONFIG_SND_MAESTRO3=m -CONFIG_SND_MAESTRO3_FIRMWARE_IN_KERNEL=y CONFIG_SND_MIXART=m CONFIG_SND_NM256=m CONFIG_SND_PCXHR=m @@ -2403,55 +1798,30 @@ CONFIG_SND_SONICVIBES=m CONFIG_SND_TRIDENT=m CONFIG_SND_VIA82XX=m CONFIG_SND_VIA82XX_MODEM=m +# CONFIG_SND_VIRTUOSO is not set CONFIG_SND_VX222=m CONFIG_SND_YMFPCI=m -CONFIG_SND_YMFPCI_FIRMWARE_IN_KERNEL=y -# CONFIG_SND_AC97_POWER_SAVE is not set - -# -# ALSA MIPS devices -# +CONFIG_SND_MIPS=y # CONFIG_SND_AU1X00 is not set - -# -# USB devices -# +CONFIG_SND_USB=y CONFIG_SND_USB_AUDIO=m +# CONFIG_SND_USB_UA101 is not set # CONFIG_SND_USB_CAIAQ is not set - -# -# PCMCIA devices -# +CONFIG_SND_PCMCIA=y CONFIG_SND_VXPOCKET=m CONFIG_SND_PDAUDIOCF=m - -# -# System on Chip audio support -# # CONFIG_SND_SOC is not set - -# -# SoC Audio support for SuperH -# - -# -# Open Sound System -# CONFIG_SOUND_PRIME=m -CONFIG_SOUND_TRIDENT=m -# CONFIG_SOUND_MSNDCLAS is not set -# CONFIG_SOUND_MSNDPIN is not set CONFIG_AC97_BUS=m CONFIG_HID_SUPPORT=y CONFIG_HID=y -# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set # # USB Input Devices # CONFIG_USB_HID=m -CONFIG_USB_HIDINPUT_POWERBOOK=y -# CONFIG_HID_FF is not set +# CONFIG_HID_PID is not set CONFIG_USB_HIDDEV=y # @@ -2459,12 +1829,50 @@ CONFIG_USB_HIDDEV=y # CONFIG_USB_KBD=m CONFIG_USB_MOUSE=m + +# +# Special HID drivers +# +# CONFIG_HID_3M_PCT is not set +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MOSART is not set +# CONFIG_HID_MONTEREY is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_QUANTA is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_STANTUM is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_ZEROPLUS is not set CONFIG_USB_SUPPORT=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_EHCI=y CONFIG_USB=m # CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set # # Miscellaneous USB options @@ -2472,19 +1880,27 @@ CONFIG_USB=m CONFIG_USB_DEVICEFS=y CONFIG_USB_DEVICE_CLASS=y # CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_SUSPEND=y -# CONFIG_USB_PERSIST is not set # CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +CONFIG_USB_MON=m +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set # # USB Host Controller Drivers # +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_XHCI_HCD is not set CONFIG_USB_EHCI_HCD=m -CONFIG_USB_EHCI_SPLIT_ISO=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y +# CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set CONFIG_USB_OHCI_HCD=m +# CONFIG_USB_OHCI_HCD_SSB is not set # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set CONFIG_USB_OHCI_LITTLE_ENDIAN=y @@ -2493,32 +1909,38 @@ CONFIG_USB_U132_HCD=m CONFIG_USB_SL811_HCD=m CONFIG_USB_SL811_CS=m # CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_WHCI_HCD is not set +# CONFIG_USB_HWA_HCD is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set # # USB Device Class drivers # CONFIG_USB_ACM=m CONFIG_USB_PRINTER=m +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set # -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may # # -# may also be needed; see USB_STORAGE Help for more information +# also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=m # CONFIG_USB_STORAGE_DEBUG is not set -CONFIG_USB_STORAGE_DATAFAB=y -CONFIG_USB_STORAGE_FREECOM=y -CONFIG_USB_STORAGE_ISD200=y -CONFIG_USB_STORAGE_DPCM=y -CONFIG_USB_STORAGE_USBAT=y -CONFIG_USB_STORAGE_SDDR09=y -CONFIG_USB_STORAGE_SDDR55=y -CONFIG_USB_STORAGE_JUMPSHOT=y -CONFIG_USB_STORAGE_ALAUDA=y -CONFIG_USB_STORAGE_KARMA=y +CONFIG_USB_STORAGE_DATAFAB=m +CONFIG_USB_STORAGE_FREECOM=m +CONFIG_USB_STORAGE_ISD200=m +CONFIG_USB_STORAGE_USBAT=m +CONFIG_USB_STORAGE_SDDR09=m +CONFIG_USB_STORAGE_SDDR55=m +CONFIG_USB_STORAGE_JUMPSHOT=m +CONFIG_USB_STORAGE_ALAUDA=m +# CONFIG_USB_STORAGE_ONETOUCH is not set +CONFIG_USB_STORAGE_KARMA=m +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set CONFIG_USB_LIBUSUAL=y # @@ -2526,25 +1948,20 @@ CONFIG_USB_LIBUSUAL=y # CONFIG_USB_MDC800=m CONFIG_USB_MICROTEK=m -CONFIG_USB_MON=y # # USB port drivers # -CONFIG_USB_USS720=m - -# -# USB Serial Converter support -# CONFIG_USB_SERIAL=m +CONFIG_USB_EZUSB=y CONFIG_USB_SERIAL_GENERIC=y CONFIG_USB_SERIAL_AIRCABLE=m -CONFIG_USB_SERIAL_AIRPRIME=m CONFIG_USB_SERIAL_ARK3116=m CONFIG_USB_SERIAL_BELKIN=m +# CONFIG_USB_SERIAL_CH341 is not set CONFIG_USB_SERIAL_WHITEHEAT=m CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -CONFIG_USB_SERIAL_CP2101=m +# CONFIG_USB_SERIAL_CP210X is not set CONFIG_USB_SERIAL_CYPRESS_M8=m CONFIG_USB_SERIAL_EMPEG=m CONFIG_USB_SERIAL_FTDI_SIO=m @@ -2556,6 +1973,7 @@ CONFIG_USB_SERIAL_EDGEPORT=m CONFIG_USB_SERIAL_EDGEPORT_TI=m CONFIG_USB_SERIAL_GARMIN=m CONFIG_USB_SERIAL_IPW=m +# CONFIG_USB_SERIAL_IUU is not set CONFIG_USB_SERIAL_KEYSPAN_PDA=m CONFIG_USB_SERIAL_KEYSPAN=m # CONFIG_USB_SERIAL_KEYSPAN_MPR is not set @@ -2575,20 +1993,27 @@ CONFIG_USB_SERIAL_KOBIL_SCT=m CONFIG_USB_SERIAL_MCT_U232=m CONFIG_USB_SERIAL_MOS7720=m CONFIG_USB_SERIAL_MOS7840=m +# CONFIG_USB_SERIAL_MOTOROLA is not set CONFIG_USB_SERIAL_NAVMAN=m CONFIG_USB_SERIAL_PL2303=m # CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_QCAUX is not set +# CONFIG_USB_SERIAL_QUALCOMM is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set CONFIG_USB_SERIAL_HP4X=m CONFIG_USB_SERIAL_SAFE=m # CONFIG_USB_SERIAL_SAFE_PADDED is not set +# CONFIG_USB_SERIAL_SIEMENS_MPI is not set CONFIG_USB_SERIAL_SIERRAWIRELESS=m +# CONFIG_USB_SERIAL_SYMBOL is not set CONFIG_USB_SERIAL_TI=m CONFIG_USB_SERIAL_CYBERJACK=m CONFIG_USB_SERIAL_XIRCOM=m CONFIG_USB_SERIAL_OPTION=m CONFIG_USB_SERIAL_OMNINET=m +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set # CONFIG_USB_SERIAL_DEBUG is not set -CONFIG_USB_EZUSB=y # # USB Miscellaneous drivers @@ -2596,18 +2021,13 @@ CONFIG_USB_EZUSB=y CONFIG_USB_EMI62=m CONFIG_USB_EMI26=m CONFIG_USB_ADUTUX=m -CONFIG_USB_AUERSWALD=m +# CONFIG_USB_SEVSEG is not set CONFIG_USB_RIO500=m CONFIG_USB_LEGOTOWER=m CONFIG_USB_LCD=m -# CONFIG_USB_BERRY_CHARGE is not set CONFIG_USB_LED=m CONFIG_USB_CYPRESS_CY7C63=m CONFIG_USB_CYTHERM=m -CONFIG_USB_PHIDGET=m -CONFIG_USB_PHIDGETKIT=m -CONFIG_USB_PHIDGETMOTORCONTROL=m -CONFIG_USB_PHIDGETSERVO=m CONFIG_USB_IDMOUSE=m CONFIG_USB_FTDI_ELAN=m CONFIG_USB_APPLEDISPLAY=m @@ -2617,86 +2037,113 @@ CONFIG_USB_LD=m CONFIG_USB_TRANCEVIBRATOR=m # CONFIG_USB_IOWARRIOR is not set CONFIG_USB_TEST=m - -# -# USB DSL modem support -# +# CONFIG_USB_ISIGHTFW is not set CONFIG_USB_ATM=m CONFIG_USB_SPEEDTOUCH=m CONFIG_USB_CXACRU=m CONFIG_USB_UEAGLEATM=m CONFIG_USB_XUSBATM=m - -# -# USB Gadget Support -# CONFIG_USB_GADGET=m # CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 CONFIG_USB_GADGET_SELECTED=y -# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set # CONFIG_USB_GADGET_FSL_USB2 is not set -CONFIG_USB_GADGET_NET2280=y -CONFIG_USB_NET2280=m -# CONFIG_USB_GADGET_PXA2XX is not set -# CONFIG_USB_GADGET_M66592 is not set -# CONFIG_USB_GADGET_GOKU is not set # CONFIG_USB_GADGET_LH7A40X is not set # CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_R8A66597 is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set +# CONFIG_USB_GADGET_IMX is not set # CONFIG_USB_GADGET_S3C2410 is not set -# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_CI13XXX is not set +CONFIG_USB_GADGET_NET2280=y +CONFIG_USB_NET2280=m +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LANGWELL is not set # CONFIG_USB_GADGET_DUMMY_HCD is not set CONFIG_USB_GADGET_DUALSPEED=y CONFIG_USB_ZERO=m +# CONFIG_USB_AUDIO is not set CONFIG_USB_ETH=m CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_ETH_EEM is not set CONFIG_USB_GADGETFS=m CONFIG_USB_FILE_STORAGE=m # CONFIG_USB_FILE_STORAGE_TEST is not set +# CONFIG_USB_MASS_STORAGE is not set CONFIG_USB_G_SERIAL=m CONFIG_USB_MIDI_GADGET=m +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_NOKIA is not set +# CONFIG_USB_G_MULTI is not set + +# +# OTG and related infrastructure +# +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_UWB is not set CONFIG_MMC=m # CONFIG_MMC_DEBUG is not set # CONFIG_MMC_UNSAFE_RESUME is not set # -# MMC/SD Card Drivers +# MMC/SD/SDIO Card Drivers # CONFIG_MMC_BLOCK=m CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set # -# MMC/SD Host Controller Drivers +# MMC/SD/SDIO Host Controller Drivers # CONFIG_MMC_SDHCI=m +# CONFIG_MMC_SDHCI_PCI is not set +# CONFIG_MMC_SDHCI_PLTFM is not set CONFIG_MMC_TIFM_SD=m +# CONFIG_MMC_SDRICOH_CS is not set +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +# CONFIG_MEMSTICK is not set CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=m +CONFIG_LEDS_CLASS=y # # LED drivers # +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_GPIO_PLATFORM=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +CONFIG_LEDS_TRIGGERS=y # # LED Triggers # -# CONFIG_LEDS_TRIGGERS is not set -CONFIG_INFINIBAND=m -CONFIG_INFINIBAND_USER_MAD=m -CONFIG_INFINIBAND_USER_ACCESS=m -CONFIG_INFINIBAND_USER_MEM=y -CONFIG_INFINIBAND_ADDR_TRANS=y -CONFIG_INFINIBAND_MTHCA=m -CONFIG_INFINIBAND_MTHCA_DEBUG=y -CONFIG_INFINIBAND_AMSO1100=m -CONFIG_INFINIBAND_AMSO1100_DEBUG=y -# CONFIG_MLX4_INFINIBAND is not set -CONFIG_INFINIBAND_IPOIB=m -# CONFIG_INFINIBAND_IPOIB_CM is not set -CONFIG_INFINIBAND_IPOIB_DEBUG=y -# CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set -CONFIG_INFINIBAND_SRP=m -CONFIG_INFINIBAND_ISER=m -CONFIG_RTC_LIB=m +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_RTC_LIB=y CONFIG_RTC_CLASS=m # @@ -2712,6 +2159,7 @@ CONFIG_RTC_DRV_TEST=m # I2C RTC drivers # CONFIG_RTC_DRV_DS1307=m +# CONFIG_RTC_DRV_DS1374 is not set CONFIG_RTC_DRV_DS1672=m # CONFIG_RTC_DRV_MAX6900 is not set CONFIG_RTC_DRV_RS5C372=m @@ -2720,48 +2168,45 @@ CONFIG_RTC_DRV_X1205=m CONFIG_RTC_DRV_PCF8563=m CONFIG_RTC_DRV_PCF8583=m # CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set # # SPI RTC drivers # -CONFIG_RTC_DRV_RS5C348=m -CONFIG_RTC_DRV_MAX6902=m # # Platform RTC drivers # # CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set CONFIG_RTC_DRV_DS1553=m -# CONFIG_RTC_DRV_STK17TA8 is not set CONFIG_RTC_DRV_DS1742=m +# CONFIG_RTC_DRV_STK17TA8 is not set CONFIG_RTC_DRV_M48T86=m +# CONFIG_RTC_DRV_M48T35 is not set # CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set CONFIG_RTC_DRV_V3020=m # # on-CPU RTC drivers # - -# -# DMA Engine support -# -CONFIG_DMA_ENGINE=y - -# -# DMA Clients -# -CONFIG_NET_DMA=y - -# -# DMA Devices -# -CONFIG_INTEL_IOATDMA=m +# CONFIG_RTC_DRV_AU1XXX is not set +# CONFIG_DMADEVICES is not set # CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set # -# Userspace I/O +# TI VLYNQ # -# CONFIG_UIO is not set +# CONFIG_STAGING is not set # # File systems @@ -2772,44 +2217,43 @@ CONFIG_EXT2_FS_POSIX_ACL=y CONFIG_EXT2_FS_SECURITY=y # CONFIG_EXT2_FS_XIP is not set CONFIG_EXT3_FS=m +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set CONFIG_EXT3_FS_XATTR=y CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y -# CONFIG_EXT4DEV_FS is not set +# CONFIG_EXT4_FS is not set CONFIG_JBD=m # CONFIG_JBD_DEBUG is not set CONFIG_FS_MBCACHE=m -CONFIG_REISERFS_FS=m -# CONFIG_REISERFS_CHECK is not set -# CONFIG_REISERFS_PROC_INFO is not set -CONFIG_REISERFS_FS_XATTR=y -CONFIG_REISERFS_FS_POSIX_ACL=y -CONFIG_REISERFS_FS_SECURITY=y -CONFIG_JFS_FS=m -CONFIG_JFS_POSIX_ACL=y -CONFIG_JFS_SECURITY=y -# CONFIG_JFS_DEBUG is not set -CONFIG_JFS_STATISTICS=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set CONFIG_FS_POSIX_ACL=y -CONFIG_XFS_FS=m -CONFIG_XFS_QUOTA=y -CONFIG_XFS_SECURITY=y -CONFIG_XFS_POSIX_ACL=y -CONFIG_XFS_RT=y +# CONFIG_XFS_FS is not set # CONFIG_GFS2_FS is not set # CONFIG_OCFS2_FS is not set -CONFIG_MINIX_FS=m -CONFIG_ROMFS_FS=m +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y CONFIG_INOTIFY=y CONFIG_INOTIFY_USER=y CONFIG_QUOTA=y -CONFIG_QFMT_V1=m -CONFIG_QFMT_V2=m +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QUOTA_DEBUG is not set +# CONFIG_QFMT_V1 is not set +# CONFIG_QFMT_V2 is not set CONFIG_QUOTACTL=y -CONFIG_DNOTIFY=y -CONFIG_AUTOFS_FS=m -CONFIG_AUTOFS4_FS=m +# CONFIG_AUTOFS_FS is not set +CONFIG_AUTOFS4_FS=y CONFIG_FUSE_FS=m +# CONFIG_CUSE is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set # # CD-ROM/DVD Filesystems @@ -2838,73 +2282,79 @@ CONFIG_NTFS_FS=m CONFIG_PROC_FS=y CONFIG_PROC_KCORE=y CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y CONFIG_SYSFS=y CONFIG_TMPFS=y # CONFIG_TMPFS_POSIX_ACL is not set # CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y CONFIG_CONFIGFS_FS=m - -# -# Miscellaneous filesystems -# -CONFIG_ADFS_FS=m -# CONFIG_ADFS_FS_RW is not set -CONFIG_AFFS_FS=m -CONFIG_ECRYPT_FS=m -CONFIG_HFS_FS=m -CONFIG_HFSPLUS_FS=m -CONFIG_BEFS_FS=m -# CONFIG_BEFS_DEBUG is not set -CONFIG_BFS_FS=m -CONFIG_EFS_FS=m -CONFIG_JFFS2_FS=m +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y CONFIG_JFFS2_FS_DEBUG=0 CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set # CONFIG_JFFS2_SUMMARY is not set -# CONFIG_JFFS2_FS_XATTR is not set -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_FS_XATTR=y +CONFIG_JFFS2_FS_POSIX_ACL=y +CONFIG_JFFS2_FS_SECURITY=y +CONFIG_JFFS2_COMPRESSION_OPTIONS=y CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set CONFIG_JFFS2_RTIME=y # CONFIG_JFFS2_RUBIN is not set +# CONFIG_JFFS2_CMODE_NONE is not set +CONFIG_JFFS2_CMODE_PRIORITY=y +# CONFIG_JFFS2_CMODE_SIZE is not set +# CONFIG_JFFS2_CMODE_FAVOURLZO is not set +# CONFIG_LOGFS is not set CONFIG_CRAMFS=y -CONFIG_VXFS_FS=m -CONFIG_HPFS_FS=m -CONFIG_QNX4FS_FS=m -CONFIG_SYSV_FS=m -CONFIG_UFS_FS=m -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_UFS_DEBUG is not set - -# -# Network File Systems -# +CONFIG_SQUASHFS=y +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=m CONFIG_NFS_V3=y # CONFIG_NFS_V3_ACL is not set CONFIG_NFS_V4=y -CONFIG_NFS_DIRECTIO=y +# CONFIG_NFS_V4_1 is not set CONFIG_NFSD=m CONFIG_NFSD_V3=y # CONFIG_NFSD_V3_ACL is not set CONFIG_NFSD_V4=y -CONFIG_NFSD_TCP=y CONFIG_LOCKD=m CONFIG_LOCKD_V4=y CONFIG_EXPORTFS=m CONFIG_NFS_COMMON=y CONFIG_SUNRPC=m CONFIG_SUNRPC_GSS=m -# CONFIG_SUNRPC_BIND34 is not set CONFIG_RPCSEC_GSS_KRB5=m CONFIG_RPCSEC_GSS_SPKM3=m CONFIG_SMB_FS=m # CONFIG_SMB_NLS_DEFAULT is not set +# CONFIG_CEPH_FS is not set CONFIG_CIFS=m # CONFIG_CIFS_STATS is not set # CONFIG_CIFS_WEAK_PW_HASH is not set +# CONFIG_CIFS_UPCALL is not set # CONFIG_CIFS_XATTR is not set # CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DFS_UPCALL is not set # CONFIG_CIFS_EXPERIMENTAL is not set CONFIG_NCP_FS=m CONFIG_NCPFS_PACKET_SIGNING=y @@ -2916,7 +2366,6 @@ CONFIG_NCPFS_OS2_NS=y CONFIG_NCPFS_NLS=y CONFIG_NCPFS_EXTRAS=y CONFIG_CODA_FS=m -# CONFIG_CODA_FS_OLD_API is not set CONFIG_AFS_FS=m # CONFIG_AFS_DEBUG is not set @@ -2948,10 +2397,6 @@ CONFIG_SUN_PARTITION=y CONFIG_KARMA_PARTITION=y CONFIG_EFI_PARTITION=y # CONFIG_SYSV68_PARTITION is not set - -# -# Native Language Support -# CONFIG_NLS=y CONFIG_NLS_DEFAULT="cp437" CONFIG_NLS_CODEPAGE_437=m @@ -2992,118 +2437,179 @@ CONFIG_NLS_ISO8859_15=m CONFIG_NLS_KOI8_R=m CONFIG_NLS_KOI8_U=m CONFIG_NLS_UTF8=m - -# -# Distributed Lock Manager -# -CONFIG_DLM=m -# CONFIG_DLM_DEBUG is not set - -# -# Profiling support -# -CONFIG_PROFILING=y -CONFIG_OPROFILE=m +# CONFIG_DLM is not set # # Kernel hacking # CONFIG_TRACE_IRQFLAGS_SUPPORT=y # CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y # CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_FRAME_WARN=1024 CONFIG_MAGIC_SYSRQ=y +# CONFIG_STRIP_ASM_SYMS is not set # CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_FS is not set +CONFIG_DEBUG_FS=y # CONFIG_HEADERS_CHECK is not set # CONFIG_DEBUG_KERNEL is not set -CONFIG_CROSSCOMPILE=y +# CONFIG_DEBUG_MEMORY_INIT is not set +CONFIG_RCU_CPU_STALL_DETECTOR=y +# CONFIG_LKDTM is not set +# CONFIG_SYSCTL_SYSCALL_CHECK is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_RING_BUFFER=y +CONFIG_RING_BUFFER_ALLOW_SWAP=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_EARLY_PRINTK=y # CONFIG_CMDLINE_BOOL is not set +# CONFIG_SPINLOCK_TEST is not set # # Security options # CONFIG_KEYS=y # CONFIG_KEYS_DEBUG_PROC_KEYS is not set -CONFIG_SECURITY=y -CONFIG_SECURITY_NETWORK=y -# CONFIG_SECURITY_NETWORK_XFRM is not set -CONFIG_SECURITY_CAPABILITIES=m -CONFIG_SECURITY_ROOTPLUG=m -CONFIG_SECURITY_SELINUX=y -CONFIG_SECURITY_SELINUX_BOOTPARAM=y -CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0 -CONFIG_SECURITY_SELINUX_DISABLE=y -CONFIG_SECURITY_SELINUX_DEVELOP=y -CONFIG_SECURITY_SELINUX_AVC_STATS=y -CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 -# CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set -# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set -CONFIG_XOR_BLOCKS=m -CONFIG_ASYNC_CORE=m -CONFIG_ASYNC_MEMCPY=m -CONFIG_ASYNC_XOR=m +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set +# CONFIG_DEFAULT_SECURITY_SMACK is not set +# CONFIG_DEFAULT_SECURITY_TOMOYO is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_FIPS is not set CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=m +CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_BLKCIPHER=m +CONFIG_CRYPTO_BLKCIPHER2=y CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=m +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_PCOMP=y CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_GF128MUL is not set +CONFIG_CRYPTO_NULL=m +CONFIG_CRYPTO_WORKQUEUE=y +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_AUTHENC=m +CONFIG_CRYPTO_TEST=m + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# CONFIG_CRYPTO_HMAC=y # CONFIG_CRYPTO_XCBC is not set -CONFIG_CRYPTO_NULL=m +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=m +# CONFIG_CRYPTO_GHASH is not set CONFIG_CRYPTO_MD4=m CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=m +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set CONFIG_CRYPTO_SHA1=m CONFIG_CRYPTO_SHA256=m CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_TGR192=m -# CONFIG_CRYPTO_GF128MUL is not set -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_CBC=m -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_CRYPTD is not set -CONFIG_CRYPTO_DES=m -# CONFIG_CRYPTO_FCRYPT is not set -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_TWOFISH_COMMON=m -CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_WP512=m + +# +# Ciphers +# CONFIG_CRYPTO_AES=m +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_BLOWFISH=m +# CONFIG_CRYPTO_CAMELLIA is not set CONFIG_CRYPTO_CAST5=m CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_DES=m +# CONFIG_CRYPTO_FCRYPT is not set CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_ANUBIS=m +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m + +# +# Compression +# CONFIG_CRYPTO_DEFLATE=m -CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_CRC32C=m -# CONFIG_CRYPTO_CAMELLIA is not set -CONFIG_CRYPTO_TEST=m +# CONFIG_CRYPTO_ZLIB is not set +# CONFIG_CRYPTO_LZO is not set + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=m CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_HIFN_795X is not set +# CONFIG_BINARY_PRINTF is not set # # Library routines # CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_LAST_BIT=y CONFIG_CRC_CCITT=m CONFIG_CRC16=m -# CONFIG_CRC_ITU_T is not set +# CONFIG_CRC_T10DIF is not set +CONFIG_CRC_ITU_T=m CONFIG_CRC32=y # CONFIG_CRC7 is not set CONFIG_LIBCRC32C=m CONFIG_AUDIT_GENERIC=y CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=m -CONFIG_REED_SOLOMON=m -CONFIG_REED_SOLOMON_DEC16=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_DECOMPRESS_GZIP=y CONFIG_TEXTSEARCH=y CONFIG_TEXTSEARCH_KMP=m CONFIG_TEXTSEARCH_BM=m CONFIG_TEXTSEARCH_FSM=m -CONFIG_PLIST=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_DMA=y -CONFIG_CHECK_SIGNATURE=y +CONFIG_NLATTR=y From cernekee@gmail.com Sun May 2 23:53:45 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 02 May 2010 23:53:48 +0200 (CEST) Received: from [69.28.251.93] ([69.28.251.93]:54971 "EHLO b32.net" rhost-flags-FAIL-FAIL-OK-OK) by eddie.linux-mips.org with ESMTP id S1492384Ab0EBVxp (ORCPT ); Sun, 2 May 2010 23:53:45 +0200 Received: (qmail 8059 invoked from network); 2 May 2010 21:53:41 -0000 Received: from unknown (HELO vps-1001064-677.cp.jvds.com) (127.0.0.1) by 127.0.0.1 with (DHE-RSA-AES128-SHA encrypted) SMTP; 2 May 2010 21:53:41 -0000 Received: by vps-1001064-677.cp.jvds.com (sSMTP sendmail emulation); Sun, 02 May 2010 14:53:41 -0700 From: Kevin Cernekee To: Ralf Baechle Cc: , Date: Sun, 2 May 2010 14:43:52 -0700 Subject: [PATCH] MIPS: nofpu and nodsp only affect CPU0 Message-Id: <0b6db1ee1efbe0daa1320b59ab5093ba5af377b8@localhost.localdomain> User-Agent: vim 7.1 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26547 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: cernekee@gmail.com Precedence: bulk X-list: linux-mips The "nofpu" and "nodsp" kernel command line options currently do not affect CPUs that are brought online later in the boot process or hotplugged at runtime. It is desirable to apply the nofpu/nodsp options to all CPUs in the system, so that surprising results are not seen when a process migrates from one CPU to another. Signed-off-by: Kevin Cernekee --- arch/mips/include/asm/cpu-info.h | 2 ++ arch/mips/kernel/cpu-probe.c | 6 ++++++ arch/mips/kernel/setup.c | 11 +++++++---- 3 files changed, 15 insertions(+), 4 deletions(-) diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h index b39def3..55b156b 100644 --- a/arch/mips/include/asm/cpu-info.h +++ b/arch/mips/include/asm/cpu-info.h @@ -84,6 +84,8 @@ extern struct cpuinfo_mips cpu_data[]; #define current_cpu_data cpu_data[smp_processor_id()] #define raw_current_cpu_data cpu_data[raw_smp_processor_id()] +extern int mips_fpu_disabled, mips_dsp_disabled; + extern void cpu_probe(void); extern void cpu_report(void); diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index be5bb16..baba603 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -982,6 +982,12 @@ __cpuinit void cpu_probe(void) */ BUG_ON(current_cpu_type() != c->cputype); + if (mips_fpu_disabled) + c->options &= ~MIPS_CPU_FPU; + + if (mips_dsp_disabled) + c->ases &= ~MIPS_ASE_DSP; + if (c->options & MIPS_CPU_FPU) { c->fpu_id = cpu_get_fpu_id(); diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index f9513f9..1664dc2 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -569,21 +569,24 @@ void __init setup_arch(char **cmdline_p) plat_smp_setup(); } +int __cpuinitdata mips_fpu_disabled; + static int __init fpu_disable(char *s) { - int i; - - for (i = 0; i < NR_CPUS; i++) - cpu_data[i].options &= ~MIPS_CPU_FPU; + cpu_data[0].options &= ~MIPS_CPU_FPU; + mips_fpu_disabled = 1; return 1; } __setup("nofpu", fpu_disable); +int __cpuinitdata mips_dsp_disabled; + static int __init dsp_disable(char *s) { cpu_data[0].ases &= ~MIPS_ASE_DSP; + mips_dsp_disabled = 1; return 1; } -- 1.6.3.1 From mcdonald.shane@gmail.com Mon May 3 04:17:32 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 03 May 2010 04:17:37 +0200 (CEST) Received: from mail-gw0-f49.google.com ([74.125.83.49]:36970 "EHLO mail-gw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490998Ab0ECCRc (ORCPT ); Mon, 3 May 2010 04:17:32 +0200 Received: by gwaa12 with SMTP id a12so917544gwa.36 for ; Sun, 02 May 2010 19:17:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:received:to:subject :message-id:from:date; bh=SFnLroP715+cuivI+P+r7rvGobcTjRZtEVbh+JHVvwg=; b=V04sM1BEjt2dsJ4dhKBq3PLvudrgtrQaDIxlMzzy2DfLv0f2VxLeNYxg3yvGD9ix4a lS49p35jeoi4NSCwdkHCyJ1E6zRpp82yb+dwF71+/lRwoqtQZjDlmhNcb2pUINk9KdtI eX4nOXiCZT5ZjEb+/ONLECOlhSxuL5Lz5YzoI= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=to:subject:message-id:from:date; b=mShrfjJxyAEZ1QgfQTqbcXW61wWHt5EBVpZCJldWSPZQtUxQzN6RWA1aHd8fcHzNLw ucoupeNPNeeJw3ySJESUng5tnzGyY1vhGxsAFTn1kLxhw5k5Sg0avg/nDAJAbgBgU3Qq Vz7h/wwxNKvba1j7KxGf7ZRcowq/SzGczeDyY= Received: by 10.101.173.17 with SMTP id a17mr1346670anp.89.1272853045994; Sun, 02 May 2010 19:17:25 -0700 (PDT) Received: from localhost ([207.47.250.203]) by mx.google.com with ESMTPS id 22sm3915701iwn.0.2010.05.02.19.17.24 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sun, 02 May 2010 19:17:24 -0700 (PDT) Received: from shane by localhost with local (Exim 4.69) (envelope-from ) id 1O8lDn-0000Sk-86 for linux-mips@linux-mips.org; Sun, 02 May 2010 20:17:23 -0600 To: linux-mips@linux-mips.org Subject: Unexpected behaviour when catching SIGFPE on FPU-less system Message-Id: From: Shane McDonald Date: Sun, 02 May 2010 20:17:23 -0600 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26548 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mcdonald.shane@gmail.com Precedence: bulk X-list: linux-mips I have run into some strange behaviour involving using the FPU emulation software in the MIPS kernel when trying to handle a divide-by-zero-caused floating point exception. I have come up with a simple test case to demonstrate this problem. -- #include #include #include #include #include void fpe_handler(int); jmp_buf env; main() { double x; feenableexcept( FE_DIVBYZERO ); signal( SIGFPE, fpe_handler ); if ( setjmp( env ) == 0 ) { printf( "About to try calculation\n" ); x = 5.0 / 0.0; printf( "Value is %f\n", x ); } else { printf( "Calculation causes divide by zero\n" ); } } void fpe_handler(int x) { feclearexcept( FE_DIVBYZERO ); longjmp( env, 1 ); } -- The program sets up to generate a SIGFPE when a divide-by-zero occurs, rather than setting the result to infinity. Then, I've created a handler to catch the exception, and the end result is to print out the "Calculation causes divide by zero" message. I have two MIPS-based systems, both running Debian Etch. One of the systems is a PMC-Sierra RM7035C-based system, which includes an FPU. My other system is a PMC-Sierra MSP7120-based system, which does not include an FPU. The RM7035C system is running the 2.6.34-rc6 kernel, but the MSP7120 system is running 2.6.28. When I run this program on the system with the FPU, I see the results that I expect to see. The program outputs: About to try calculation Calculation causes divide by zero I see the same results when I run the program on an x86 Debian Etch system. When I run the program on the system without the FPU, I see: About to try calculation Floating point exception So, it appears that the floating point exception is not caught. However, when I run strace, the last few lines of output are: old_mmap(NULL, 65536, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0x2ace9000 write(1, "About to try calculation\n"..., 25About to try calculation ) = 25 --- SIGFPE (Floating point exception) @ 0 (0) --- --- SIGFPE (Floating point exception) @ 0 (0) --- +++ killed by SIGFPE +++ Running it on the system with the FPU, I see: old_mmap(NULL, 65536, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0x2ace5000 write(1, "About to try calculation\n"..., 25About to try calculation ) = 25 --- SIGFPE (Floating point exception) @ 0 (0) --- write(1, "Calculation causes divide by zero"..., 34Calculation causes divide by zero ) = 34 exit_group(34) = ? After poking around for a while, and trying to account for differences between the systems (endianness, FPUness, kernel version), I believe the problem is related to the lack of FPU. If I run the RM7035C with a disabled FPU (kernel parameter nofpu), I see the same results as on the FPU-less MSP7120. So, I suspect this difference in behaviour is caused by the FPU emulation software. Now, I don't know if this is a problem, but it does seem strange. My level of understanding of the FPU emulation software is very low, so I'm not quite sure where to look. This isn't actually something that I typically do. I noticed this problem when trying to understand why the Debian package "yorick" failed to build (see http://lists.debian.org/debian-mips/2010/04/msg00019.html). I'd appreciate any insight that anyone can provide. Thanks! Shane McDonald From kevink@paralogos.com Mon May 3 22:39:54 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 03 May 2010 22:39:58 +0200 (CEST) Received: from gateway09.websitewelcome.com ([64.5.50.3]:58294 "HELO gateway09.websitewelcome.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with SMTP id S1492081Ab0ECUjy (ORCPT ); Mon, 3 May 2010 22:39:54 +0200 Received: (qmail 25047 invoked from network); 3 May 2010 20:42:48 -0000 Received: from gator750.hostgator.com (174.132.194.2) by gateway09.websitewelcome.com with SMTP; 3 May 2010 20:42:48 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=paralogos.com; h=Received:Message-ID:Date:From:User-Agent:MIME-Version:To:CC:Subject:References:In-Reply-To:Content-Type:Content-Transfer-Encoding; b=Q4Chmt9EMKtS/j8qeQMBhY/sdEVmiIU88sHzOYWZcNUsDKT9gOwO8kyG9PITt9kLgFd6ZoI45HnTiYYuNsKs/h6GgBFA4y8P45ULv7RyCNZmyNgoNQ9VW06hFu4zFpn4; Received: from 216-239-45-4.google.com ([216.239.45.4]:40731 helo=epiktistes.mtv.corp.google.com) by gator750.hostgator.com with esmtpa (Exim 4.69) (envelope-from ) id 1O92QR-0001GI-9x; Mon, 03 May 2010 15:39:35 -0500 Message-ID: <4BDF3490.40606@paralogos.com> Date: Mon, 03 May 2010 13:39:44 -0700 From: "Kevin D. Kissell" User-Agent: Thunderbird 2.0.0.24 (X11/20100317) MIME-Version: 1.0 To: Shane McDonald CC: linux-mips@linux-mips.org Subject: Re: Unexpected behaviour when catching SIGFPE on FPU-less system References: In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - gator750.hostgator.com X-AntiAbuse: Original Domain - linux-mips.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - paralogos.com Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26549 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kevink@paralogos.com Precedence: bulk X-list: linux-mips Shane McDonald wrote: > I have run into some strange behaviour involving using the FPU > emulation software in the MIPS kernel when trying to handle > a divide-by-zero-caused floating point exception. > > I have come up with a simple test case to demonstrate this problem. > -- > #include > #include > #include > #include > #include > > void fpe_handler(int); > > jmp_buf env; > > main() > { > double x; > > feenableexcept( FE_DIVBYZERO ); > signal( SIGFPE, fpe_handler ); > > if ( setjmp( env ) == 0 ) > { > printf( "About to try calculation\n" ); > > x = 5.0 / 0.0; > printf( "Value is %f\n", x ); > } > else > { > printf( "Calculation causes divide by zero\n" ); > } > } > > void fpe_handler(int x) > { > feclearexcept( FE_DIVBYZERO ); > longjmp( env, 1 ); > } > -- > > The program sets up to generate a SIGFPE when a divide-by-zero occurs, > rather than setting the result to infinity. Then, I've created a > handler to catch the exception, and the end result is to print out > the "Calculation causes divide by zero" message. > > I have two MIPS-based systems, both running Debian Etch. One of the > systems is a PMC-Sierra RM7035C-based system, which includes an FPU. My > other system is a PMC-Sierra MSP7120-based system, which does not > include an FPU. The RM7035C system is running the 2.6.34-rc6 kernel, > but the MSP7120 system is running 2.6.28. > > When I run this program on the system with the FPU, I see the results > that I expect to see. The program outputs: > > About to try calculation > Calculation causes divide by zero > > I see the same results when I run the program on an x86 Debian Etch system. > > When I run the program on the system without the FPU, I see: > > About to try calculation > Floating point exception > > So, it appears that the floating point exception is not caught. > However, when I run strace, the last few lines of output are: > > old_mmap(NULL, 65536, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0x2ace9000 > write(1, "About to try calculation\n"..., 25About to try calculation > ) = 25 > --- SIGFPE (Floating point exception) @ 0 (0) --- > --- SIGFPE (Floating point exception) @ 0 (0) --- > +++ killed by SIGFPE +++ > > Running it on the system with the FPU, I see: > > old_mmap(NULL, 65536, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0x2ace5000 > write(1, "About to try calculation\n"..., 25About to try calculation > ) = 25 > --- SIGFPE (Floating point exception) @ 0 (0) --- > write(1, "Calculation causes divide by zero"..., 34Calculation causes divide by zero > ) = 34 > exit_group(34) = ? > > After poking around for a while, and trying to account for differences > between the systems (endianness, FPUness, kernel version), I believe the > problem is related to the lack of FPU. If I run the RM7035C with a > disabled FPU (kernel parameter nofpu), I see the same results as on > the FPU-less MSP7120. So, I suspect this difference in behaviour > is caused by the FPU emulation software. > > Now, I don't know if this is a problem, but it does seem strange. > My level of understanding of the FPU emulation software is very low, > so I'm not quite sure where to look. > > This isn't actually something that I typically do. I noticed this > problem when trying to understand why the Debian package "yorick" > failed to build (see > http://lists.debian.org/debian-mips/2010/04/msg00019.html). > > I'd appreciate any insight that anyone can provide. Thanks! > > Shane McDonald > > From kevink@paralogos.com Mon May 3 22:47:46 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 03 May 2010 22:47:49 +0200 (CEST) Received: from gateway06.websitewelcome.com ([67.18.55.3]:49384 "HELO gateway06.websitewelcome.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with SMTP id S1492086Ab0ECUrp (ORCPT ); Mon, 3 May 2010 22:47:45 +0200 Received: (qmail 4716 invoked from network); 3 May 2010 20:51:36 -0000 Received: from gator750.hostgator.com (174.132.194.2) by gateway06.websitewelcome.com with SMTP; 3 May 2010 20:51:36 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=paralogos.com; h=Received:Message-ID:Date:From:User-Agent:MIME-Version:To:CC:Subject:References:In-Reply-To:Content-Type:Content-Transfer-Encoding; b=SqLlIE6wVtHL6P/lfTCgpPIsJxbaQlcgEEzbBU4BWNIQKozwI0OPNJAHSRTk9n1XwwVfhtacP3Rw4IWP21xJ8aVtriL1dg/aZazDXgy2+fqcgd8cK7otH8gYv9EtFS3F; Received: from 216-239-45-4.google.com ([216.239.45.4]:9164 helo=epiktistes.mtv.corp.google.com) by gator750.hostgator.com with esmtpa (Exim 4.69) (envelope-from ) id 1O92Y9-0004XK-1B; Mon, 03 May 2010 15:47:33 -0500 Message-ID: <4BDF366E.5000501@paralogos.com> Date: Mon, 03 May 2010 13:47:42 -0700 From: "Kevin D. Kissell" User-Agent: Thunderbird 2.0.0.24 (X11/20100317) MIME-Version: 1.0 To: Shane McDonald CC: linux-mips@linux-mips.org Subject: Re: Unexpected behaviour when catching SIGFPE on FPU-less system References: In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - gator750.hostgator.com X-AntiAbuse: Original Domain - linux-mips.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - paralogos.com Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26550 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kevink@paralogos.com Precedence: bulk X-list: linux-mips Sorry about my previous message having escaped with no value added. I think you need to look at just what it is that your feclearexcept() does. From the strace information, it looks as if it may be that the FPU emulator is erroneously throwing an exception in response to some manipulation of the emulated FPU registers by feclearexcept(), so that it's taking a second FP exception within the signal handler. That's the simplest explanation for the macroscopic behavior, anyway. Regards, Kevin K. Shane McDonald wrote: > I have run into some strange behaviour involving using the FPU > emulation software in the MIPS kernel when trying to handle > a divide-by-zero-caused floating point exception. > > I have come up with a simple test case to demonstrate this problem. > -- > #include > #include > #include > #include > #include > > void fpe_handler(int); > > jmp_buf env; > > main() > { > double x; > > feenableexcept( FE_DIVBYZERO ); > signal( SIGFPE, fpe_handler ); > > if ( setjmp( env ) == 0 ) > { > printf( "About to try calculation\n" ); > > x = 5.0 / 0.0; > printf( "Value is %f\n", x ); > } > else > { > printf( "Calculation causes divide by zero\n" ); > } > } > > void fpe_handler(int x) > { > feclearexcept( FE_DIVBYZERO ); > longjmp( env, 1 ); > } > -- > > The program sets up to generate a SIGFPE when a divide-by-zero occurs, > rather than setting the result to infinity. Then, I've created a > handler to catch the exception, and the end result is to print out > the "Calculation causes divide by zero" message. > > I have two MIPS-based systems, both running Debian Etch. One of the > systems is a PMC-Sierra RM7035C-based system, which includes an FPU. My > other system is a PMC-Sierra MSP7120-based system, which does not > include an FPU. The RM7035C system is running the 2.6.34-rc6 kernel, > but the MSP7120 system is running 2.6.28. > > When I run this program on the system with the FPU, I see the results > that I expect to see. The program outputs: > > About to try calculation > Calculation causes divide by zero > > I see the same results when I run the program on an x86 Debian Etch system. > > When I run the program on the system without the FPU, I see: > > About to try calculation > Floating point exception > > So, it appears that the floating point exception is not caught. > However, when I run strace, the last few lines of output are: > > old_mmap(NULL, 65536, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0x2ace9000 > write(1, "About to try calculation\n"..., 25About to try calculation > ) = 25 > --- SIGFPE (Floating point exception) @ 0 (0) --- > --- SIGFPE (Floating point exception) @ 0 (0) --- > +++ killed by SIGFPE +++ > > Running it on the system with the FPU, I see: > > old_mmap(NULL, 65536, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0x2ace5000 > write(1, "About to try calculation\n"..., 25About to try calculation > ) = 25 > --- SIGFPE (Floating point exception) @ 0 (0) --- > write(1, "Calculation causes divide by zero"..., 34Calculation causes divide by zero > ) = 34 > exit_group(34) = ? > > After poking around for a while, and trying to account for differences > between the systems (endianness, FPUness, kernel version), I believe the > problem is related to the lack of FPU. If I run the RM7035C with a > disabled FPU (kernel parameter nofpu), I see the same results as on > the FPU-less MSP7120. So, I suspect this difference in behaviour > is caused by the FPU emulation software. > > Now, I don't know if this is a problem, but it does seem strange. > My level of understanding of the FPU emulation software is very low, > so I'm not quite sure where to look. > > This isn't actually something that I typically do. I noticed this > problem when trying to understand why the Debian package "yorick" > failed to build (see > http://lists.debian.org/debian-mips/2010/04/msg00019.html). > > I'd appreciate any insight that anyone can provide. Thanks! > > Shane McDonald > > From dediao@cisco.com Tue May 4 01:40:11 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 01:40:16 +0200 (CEST) Received: from rtp-iport-2.cisco.com ([64.102.122.149]:3452 "EHLO rtp-iport-2.cisco.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492343Ab0ECXkL convert rfc822-to-8bit (ORCPT ); Tue, 4 May 2010 01:40:11 +0200 Authentication-Results: rtp-iport-2.cisco.com; dkim=neutral (message not signed) header.i=none X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: AvsEALn73kutJV2b/2dsb2JhbACdL3GjC5lShRIEgz4 X-IronPort-AV: E=Sophos;i="4.52,322,1270425600"; d="scan'208";a="107726689" Received: from rcdn-core-4.cisco.com ([173.37.93.155]) by rtp-iport-2.cisco.com with ESMTP; 03 May 2010 23:40:04 +0000 Received: from xbh-rcd-202.cisco.com (xbh-rcd-202.cisco.com [72.163.62.201]) by rcdn-core-4.cisco.com (8.14.3/8.14.3) with ESMTP id o43Ne4p8015600 for ; Mon, 3 May 2010 23:40:04 GMT Received: from xmb-rcd-208.cisco.com ([72.163.62.215]) by xbh-rcd-202.cisco.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 3 May 2010 18:40:04 -0500 X-MimeOLE: Produced By Microsoft Exchange V6.5 Content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT Subject: [PATCH] Apply kmap_high_get with MIPS Date: Mon, 3 May 2010 18:40:04 -0500 Message-ID: <7A9214B0DEB2074FBCA688B30B04400DBBA5E5@XMB-RCD-208.cisco.com> X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: [PATCH] Apply kmap_high_get with MIPS Thread-Index: AcrrGfR3mULuXIX/T1CGox04GHFUYg== From: "Dezhong Diao (dediao)" To: X-OriginalArrivalTime: 03 May 2010 23:40:04.0175 (UTC) FILETIME=[F478D5F0:01CAEB19] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26551 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dediao@cisco.com Precedence: bulk X-list: linux-mips Hi all, The changes mentioned in the link below are intended to apply on MIPS dma functions. http://lkml.org/lkml/2009/3/7/137 From fa118ecc3e67d6dd00f1b99c98e79f0c83cb5115 Mon Sep 17 00:00:00 2001 From: Dezhong Diao Date: Mon, 3 May 2010 19:32:07 -0400 Subject: [PATCH] Apply kmap_high_get with MIPS --- arch/mips/include/asm/highmem.h | 3 + arch/mips/mm/dma-default.c | 156 ++++++++++++++++++++------------------ arch/mips/mm/highmem.c | 17 ++++- 3 files changed, 101 insertions(+), 75 deletions(-) diff --git a/arch/mips/include/asm/highmem.h b/arch/mips/include/asm/highmem.h index 25adfb0..2d7f0f2 100644 --- a/arch/mips/include/asm/highmem.h +++ b/arch/mips/include/asm/highmem.h @@ -42,7 +42,10 @@ extern pte_t *pkmap_page_table; #define PKMAP_NR(virt) ((virt-PKMAP_BASE) >> PAGE_SHIFT) #define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT)) +#define ARCH_NEEDS_KMAP_HIGH_GET + extern void * kmap_high(struct page *page); +extern void *kmap_high_get(struct page *page); extern void kunmap_high(struct page *page); extern void *__kmap(struct page *page); diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c index 9547bc0..7583a3f 100644 --- a/arch/mips/mm/dma-default.c +++ b/arch/mips/mm/dma-default.c @@ -15,18 +15,18 @@ #include #include #include +#include #include #include #include -static inline unsigned long dma_addr_to_virt(struct device *dev, +static inline struct page *dma_addr_to_page(struct device *dev, dma_addr_t dma_addr) { - unsigned long addr = plat_dma_addr_to_phys(dev, dma_addr); - - return (unsigned long)phys_to_virt(addr); + return pfn_to_page( + plat_dma_addr_to_phys(dev, dma_addr) >> PAGE_SHIFT); } /* @@ -141,7 +141,7 @@ void dma_free_coherent(struct device *dev, size_t size, void *vaddr, EXPORT_SYMBOL(dma_free_coherent); -static inline void __dma_sync(unsigned long addr, size_t size, +static inline void __dma_sync_virtual(unsigned long addr, size_t size, enum dma_data_direction direction) { switch (direction) { @@ -162,13 +162,60 @@ static inline void __dma_sync(unsigned long addr, size_t size, } } +static inline void __dma_sync_contiguous(struct page *page, + unsigned long offset, size_t size, enum dma_data_direction direction) +{ + unsigned long addr; + + if (!PageHighMem(page)) { + addr = (unsigned long)page_address(page) + offset; + __dma_sync_virtual(addr, size, direction); + } else { + addr = (unsigned long)kmap_high_get(page); + if (addr) { + addr += offset; + __dma_sync_virtual(addr, size, direction); + kunmap_high(page); + } + } +} + +/* + * A single sg entry may refer to multiple physically contiguous + * pages. But we still need to process highmem pages individually. + * If highmem is not configured then the bulk of this loop gets + * optimized out. + */ +static inline void __dma_sync(struct page *page, + unsigned long offset, size_t size, enum dma_data_direction direction) +{ + size_t left = size; + + BUG_ON(direction == DMA_NONE); + + do { + size_t len = left; + if (PageHighMem(page) && (offset + len > PAGE_SIZE)) { + if (offset >= PAGE_SIZE) { + page += offset >> PAGE_SHIFT; + offset &= ~PAGE_MASK; + } + len = PAGE_SIZE - offset; + } + __dma_sync_contiguous(page, offset, len, direction); + offset = 0; + page++; + left -= len; + } while (left); +} + dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size, enum dma_data_direction direction) { unsigned long addr = (unsigned long) ptr; if (!plat_device_is_coherent(dev)) - __dma_sync(addr, size, direction); + __dma_sync_virtual(addr, size, direction); return plat_map_dma_mem(dev, ptr, size); } @@ -179,8 +226,8 @@ void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, enum dma_data_direction direction) { if (cpu_is_noncoherent_r10000(dev)) - __dma_sync(dma_addr_to_virt(dev, dma_addr), size, - direction); + __dma_sync(dma_addr_to_page(dev, dma_addr), + (dma_addr & ~PAGE_MASK), size, direction); plat_unmap_dma_mem(dev, dma_addr, size, direction); } @@ -192,16 +239,12 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, { int i; - BUG_ON(direction == DMA_NONE); - for (i = 0; i < nents; i++, sg++) { - unsigned long addr; - - addr = (unsigned long) sg_virt(sg); - if (!plat_device_is_coherent(dev) && addr) - __dma_sync(addr, sg->length, direction); - sg->dma_address = plat_map_dma_mem(dev, - (void *)addr, sg->length); + if (!plat_device_is_coherent(dev) ) + __dma_sync(sg_page(sg), sg->offset, sg->length, + direction); + sg->dma_address = plat_map_dma_mem_page(dev, sg_page(sg)) + + sg->offset; } return nents; @@ -212,14 +255,8 @@ EXPORT_SYMBOL(dma_map_sg); dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset, size_t size, enum dma_data_direction direction) { - BUG_ON(direction == DMA_NONE); - - if (!plat_device_is_coherent(dev)) { - unsigned long addr; - - addr = (unsigned long) page_address(page) + offset; - __dma_sync(addr, size, direction); - } + if (!plat_device_is_coherent(dev)) + __dma_sync(page, offset, size, direction); return plat_map_dma_mem_page(dev, page) + offset; } @@ -229,18 +266,13 @@ EXPORT_SYMBOL(dma_map_page); void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, enum dma_data_direction direction) { - unsigned long addr; int i; - BUG_ON(direction == DMA_NONE); - for (i = 0; i < nhwentries; i++, sg++) { if (!plat_device_is_coherent(dev) && - direction != DMA_TO_DEVICE) { - addr = (unsigned long) sg_virt(sg); - if (addr) - __dma_sync(addr, sg->length, direction); - } + direction != DMA_TO_DEVICE) + __dma_sync(sg_page(sg), sg->offset, sg->length, + direction); plat_unmap_dma_mem(dev, sg->dma_address, sg->length, direction); } } @@ -250,14 +282,9 @@ EXPORT_SYMBOL(dma_unmap_sg); void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size, enum dma_data_direction direction) { - BUG_ON(direction == DMA_NONE); - - if (cpu_is_noncoherent_r10000(dev)) { - unsigned long addr; - - addr = dma_addr_to_virt(dev, dma_handle); - __dma_sync(addr, size, direction); - } + if (cpu_is_noncoherent_r10000(dev)) + __dma_sync(dma_addr_to_page(dev, dma_handle), + (dma_handle & ~PAGE_MASK), size, direction); } EXPORT_SYMBOL(dma_sync_single_for_cpu); @@ -265,15 +292,10 @@ EXPORT_SYMBOL(dma_sync_single_for_cpu); void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size, enum dma_data_direction direction) { - BUG_ON(direction == DMA_NONE); - plat_extra_sync_for_device(dev); - if (!plat_device_is_coherent(dev)) { - unsigned long addr; - - addr = dma_addr_to_virt(dev, dma_handle); - __dma_sync(addr, size, direction); - } + if (!plat_device_is_coherent(dev)) + __dma_sync(dma_addr_to_page(dev, dma_handle), + (dma_handle & ~PAGE_MASK), size, direction); } EXPORT_SYMBOL(dma_sync_single_for_device); @@ -281,14 +303,9 @@ EXPORT_SYMBOL(dma_sync_single_for_device); void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle, unsigned long offset, size_t size, enum dma_data_direction direction) { - BUG_ON(direction == DMA_NONE); - - if (cpu_is_noncoherent_r10000(dev)) { - unsigned long addr; - - addr = dma_addr_to_virt(dev, dma_handle); - __dma_sync(addr + offset, size, direction); - } + if (cpu_is_noncoherent_r10000(dev)) + __dma_sync(dma_addr_to_page(dev, dma_handle), offset, size, + direction); } EXPORT_SYMBOL(dma_sync_single_range_for_cpu); @@ -296,15 +313,10 @@ EXPORT_SYMBOL(dma_sync_single_range_for_cpu); void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, unsigned long offset, size_t size, enum dma_data_direction direction) { - BUG_ON(direction == DMA_NONE); - plat_extra_sync_for_device(dev); - if (!plat_device_is_coherent(dev)) { - unsigned long addr; - - addr = dma_addr_to_virt(dev, dma_handle); - __dma_sync(addr + offset, size, direction); - } + if (!plat_device_is_coherent(dev)) + __dma_sync(dma_addr_to_page(dev, dma_handle), offset, size, + direction); } EXPORT_SYMBOL(dma_sync_single_range_for_device); @@ -314,13 +326,11 @@ void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, { int i; - BUG_ON(direction == DMA_NONE); - /* Make sure that gcc doesn't leave the empty loop body. */ for (i = 0; i < nelems; i++, sg++) { if (cpu_is_noncoherent_r10000(dev)) - __dma_sync((unsigned long)page_address(sg_page(sg)), - sg->length, direction); + __dma_sync(sg_page(sg), sg->offset, sg->length, + direction); } } @@ -331,13 +341,11 @@ void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nele { int i; - BUG_ON(direction == DMA_NONE); - /* Make sure that gcc doesn't leave the empty loop body. */ for (i = 0; i < nelems; i++, sg++) { if (!plat_device_is_coherent(dev)) - __dma_sync((unsigned long)page_address(sg_page(sg)), - sg->length, direction); + __dma_sync(sg_page(sg), sg->offset, sg->length, + direction); } } @@ -371,7 +379,7 @@ void dma_cache_sync(struct device *dev, void *vaddr, size_t size, plat_extra_sync_for_device(dev); if (!plat_device_is_coherent(dev)) - __dma_sync((unsigned long)vaddr, size, direction); + __dma_sync_virtual((unsigned long)vaddr, size, direction); } EXPORT_SYMBOL(dma_cache_sync); diff --git a/arch/mips/mm/highmem.c b/arch/mips/mm/highmem.c index 127d732..ed27217 100644 --- a/arch/mips/mm/highmem.c +++ b/arch/mips/mm/highmem.c @@ -45,6 +45,7 @@ void *__kmap_atomic(struct page *page, enum km_type type) { enum fixed_addresses idx; unsigned long vaddr; + void *kmap; /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */ pagefault_disable(); @@ -52,6 +53,11 @@ void *__kmap_atomic(struct page *page, enum km_type type) return page_address(page); debug_kmap_atomic(type); + + kmap = kmap_high_get(page); + if (kmap) + return kmap; + idx = type + KM_TYPE_NR*smp_processor_id(); vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); #ifdef CONFIG_DEBUG_HIGHMEM @@ -66,10 +72,19 @@ EXPORT_SYMBOL(__kmap_atomic); void __kunmap_atomic(void *kvaddr, enum km_type type) { -#ifdef CONFIG_DEBUG_HIGHMEM unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK; +#ifdef CONFIG_DEBUG_HIGHMEM enum fixed_addresses idx = type + KM_TYPE_NR*smp_processor_id(); +#endif + if (vaddr >= PKMAP_ADDR(0) && vaddr < PKMAP_ADDR(LAST_PKMAP)) { + /* this address was obtained through kmap_high_get() */ + kunmap_high(pte_page(pkmap_page_table[PKMAP_NR(vaddr)])); + pagefault_enable(); + return; + } + +#ifdef CONFIG_DEBUG_HIGHMEM if (vaddr < FIXADDR_START) { // FIXME pagefault_enable(); return; -- 1.6.0.6 From kevink@paralogos.com Tue May 4 04:04:23 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 04:04:28 +0200 (CEST) Received: from gateway05.websitewelcome.com ([69.93.179.12]:47573 "HELO gateway05.websitewelcome.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with SMTP id S1492540Ab0EDCEX (ORCPT ); Tue, 4 May 2010 04:04:23 +0200 Received: (qmail 26250 invoked from network); 4 May 2010 02:06:29 -0000 Received: from gator750.hostgator.com (174.132.194.2) by gateway05.websitewelcome.com with SMTP; 4 May 2010 02:06:29 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=paralogos.com; h=Received:Message-ID:Date:From:User-Agent:MIME-Version:To:CC:Subject:References:In-Reply-To:Content-Type:Content-Transfer-Encoding; b=woJOuJBQaK+J8aUq0puw0ZRYAFcHkF3lC9LNLJkbza8f8VlU2oAe2juzIsZRS2nZv/dBxDPZPqnMwx3OkYEXR0WL2+aADzC2CJuimEGiFr8lSQVw/iOV2vuueHnELRAy; Received: from 216-239-45-4.google.com ([216.239.45.4]:19275 helo=epiktistes.mtv.corp.google.com) by gator750.hostgator.com with esmtpa (Exim 4.69) (envelope-from ) id 1O97UE-0000qg-5m; Mon, 03 May 2010 21:03:50 -0500 Message-ID: <4BDF8092.1060401@paralogos.com> Date: Mon, 03 May 2010 19:04:02 -0700 From: "Kevin D. Kissell" User-Agent: Thunderbird 2.0.0.24 (X11/20100317) MIME-Version: 1.0 To: Shane McDonald CC: linux-mips@linux-mips.org Subject: Re: Unexpected behaviour when catching SIGFPE on FPU-less system References: <4BDF366E.5000501@paralogos.com> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - gator750.hostgator.com X-AntiAbuse: Original Domain - linux-mips.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - paralogos.com Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26552 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kevink@paralogos.com Precedence: bulk X-list: linux-mips Shane McDonald wrote: > Hi Kevin: > > On Mon, May 3, 2010 at 2:47 PM, Kevin D. Kissell wrote: > >> Sorry about my previous message having escaped with no value added. >> >> I think you need to look at just what it is that your feclearexcept() does. >> From the strace information, it looks as if it may be that the FPU emulator >> is erroneously throwing an exception in response to some manipulation of the >> emulated FPU registers by feclearexcept(), so that it's taking a second FP >> exception within the signal handler. That's the simplest explanation for >> the macroscopic behavior, anyway. >> >> Regards, >> >> Kevin K. >> > > Commenting out the feclearexcept() line gives the same result: > > old_mmap(NULL, 65536, PROT_READ|PROT_WRITE, > MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0x2ace9000 > write(1, "About to try calculation\n"..., 25About to try calculation > ) = 25 > --- SIGFPE (Floating point exception) @ 0 (0) --- > --- SIGFPE (Floating point exception) @ 0 (0) --- > +++ killed by SIGFPE +++ > > So, it must not be the feclearexcept() causing the problem. > Well, that nested floating point exception must be coming from *somewhere*. If it's not library code being betrayed by the emulator, perhaps some kernel-mode code is being invoked which is carelessly assuming the existence of a hardware FPU and throwing us back into the exception handler. If it was me, at this point, I'd turn on some kind of logging of FP exception PCs to see where that second one is coming from. There was a time when I had the necessary equipment on my desk to hunt this down and kill it, out of a lingering sense of responsibility for having bolted that FPE into the kernel way back when. I no longer have that setup, so I'm free to speculate. ;o) Regards, Kevin K. From mcdonald.shane@gmail.com Tue May 4 06:35:56 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 06:36:00 +0200 (CEST) Received: from mail-vw0-f49.google.com ([209.85.212.49]:52525 "EHLO mail-vw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491171Ab0EDEf4 convert rfc822-to-8bit (ORCPT ); Tue, 4 May 2010 06:35:56 +0200 Received: by vws8 with SMTP id 8so796972vws.36 for ; Mon, 03 May 2010 21:35:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:received:in-reply-to :references:date:message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=TBYnzKy539UZklv2GxCIIwemDLHJTVl5jXKC+SZBBJ0=; b=Ig1pjOLLby9vunFRaL9W3XL5cFtsDe7+jF4pZsMJKnnRh4Uva+vT2ukdOxU1BtjaCk +SRN/eOZVyhi4M0uhZkGbqSaNGoOoXxxkKr02+W974k9O2jfSBFosLAyvYqCv2byeXyv lKCiJdpbiB4QP4zNPlOLCIpIntfS0GFhnxWxc= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=hfvYxiQ4iuaRf04jJxPwtQvx6uTkubWIo6r25WRq8vgLcVnrADH8QlRHPxHUgt9xC4 T/hrkBqdipJzIidg0OlFvpinBAeldsNv5nBQ77kVyA5zeJwX0GcsCts8dDyPjwHqWkRX PbEm95Yb04MEyIuGo0ranoWuZNfJXGPvShIn8= MIME-Version: 1.0 Received: by 10.220.63.10 with SMTP id z10mr10956827vch.70.1272947749377; Mon, 03 May 2010 21:35:49 -0700 (PDT) Received: by 10.220.19.212 with HTTP; Mon, 3 May 2010 21:35:49 -0700 (PDT) In-Reply-To: References: <4BDF366E.5000501@paralogos.com> <4BDF8092.1060401@paralogos.com> Date: Mon, 3 May 2010 22:35:49 -0600 Message-ID: Subject: Re: Unexpected behaviour when catching SIGFPE on FPU-less system From: Shane McDonald To: "Kevin D. Kissell" Cc: linux-mips@linux-mips.org Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26553 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mcdonald.shane@gmail.com Precedence: bulk X-list: linux-mips On Mon, May 3, 2010 at 9:49 PM, Shane McDonald wrote: > Looking at env[0], I see that the __fpc_csr field has a value of 1024, > indicating a divide-by-zero.  As soon as that ctc1 instruction > is executed, the exception is raised.  I guess that makes > sense, but I don't understand why __fpc_csr has a value of 1024. > When I step through the call to setjmp(), it gets set to a value of 0. > In longjmp(), every other field in env[0] has the value that it was > set to in the call to setjmp(). Wait, I take that back -- I was looking at the wrong env[0] variable! I can see that __fpc_csr actually does have a value of 1024 when I call setjmp(), and that's why longjmp() is setting the FCSR register to indicate divide-by-zero. If I comment out my call to feenableexcept( FE_DIVBYZERO ), it is set to 0; if I include that call, it is set to 1024. Looking further, I also see that I confused the Cause bits and the Enable bits of the FCSR -- the Enable divide-by-zero bit is set, not the Cause bit. Clearly, the call to feenableexcept() must be setting that bit. But, it no longer makes sense that an exception is raised when the FCSR register is restored to the value 1024. Shane From mcdonald.shane@gmail.com Tue May 4 08:57:02 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 08:57:06 +0200 (CEST) Received: from mail-vw0-f49.google.com ([209.85.212.49]:44598 "EHLO mail-vw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491874Ab0EDG5C convert rfc822-to-8bit (ORCPT ); Tue, 4 May 2010 08:57:02 +0200 Received: by vws8 with SMTP id 8so850541vws.36 for ; Mon, 03 May 2010 23:56:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:received:in-reply-to :references:date:message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=37J2d+2MKoHFaK6wvRgL00P3aoH2Lkp+yBGosmFQ+ow=; b=WgzrHhTa5rkyGP4H5YjclyxfX2T3SVdH4UmskP1VV9XrtWO1Gsv/aIKWg5KpddgWlx WFBUWkHfOwWfSnjs/b2+ie9QOnv+hxdCUp1U8p6enEfR6jrYcYYQD8MKZLwWjlEdbyGQ C3h48UuwAZnd1JTyqaQq8ZN4zTRjx2poqpzSg= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=K+6IM7jOiDHcSTsaiKLptNxhZqnGvkpTulvvFEXgo32HrOqSZ6ClQ3IVmP7WciZjGS ccVkpBdFTwN4eLeyRVF4Gof9l8y5UCQ751LK+WvNz59BxzwKiI/xbUovRePNAq6ATHvG mIjTwr/k8TCDqac1e9Jxf7SG6U2CFAkYnVJo4= MIME-Version: 1.0 Received: by 10.220.129.14 with SMTP id m14mr394066vcs.75.1272956216146; Mon, 03 May 2010 23:56:56 -0700 (PDT) Received: by 10.220.19.212 with HTTP; Mon, 3 May 2010 23:56:56 -0700 (PDT) In-Reply-To: References: <4BDF366E.5000501@paralogos.com> <4BDF8092.1060401@paralogos.com> Date: Tue, 4 May 2010 00:56:56 -0600 Message-ID: Subject: Re: Unexpected behaviour when catching SIGFPE on FPU-less system From: Shane McDonald To: "Kevin D. Kissell" Cc: linux-mips@linux-mips.org Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26554 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mcdonald.shane@gmail.com Precedence: bulk X-list: linux-mips OK, I think I've found the line that's causing me the problem. On Mon, May 3, 2010 at 10:35 PM, Shane McDonald wrote: > On Mon, May 3, 2010 at 9:49 PM, Shane McDonald wrote: >> Looking at env[0], I see that the __fpc_csr field has a value of 1024, >> indicating a divide-by-zero.  As soon as that ctc1 instruction >> is executed, the exception is raised.  I guess that makes >> sense, but I don't understand why __fpc_csr has a value of 1024. >> When I step through the call to setjmp(), it gets set to a value of 0. >> In longjmp(), every other field in env[0] has the value that it was >> set to in the call to setjmp(). > > Wait, I take that back -- I was looking at the wrong env[0] variable! > I can see that __fpc_csr actually does have a value of 1024 when > I call setjmp(), and that's why longjmp() is setting the FCSR > register to indicate divide-by-zero.  If I comment out my call to > feenableexcept( FE_DIVBYZERO ), it is set to 0; if I include that call, > it is set to 1024. > > Looking further, I also see that I confused the Cause bits and the > Enable bits of the FCSR -- the Enable divide-by-zero bit is set, > not the Cause bit.  Clearly, the call to feenableexcept() must > be setting that bit.  But, it no longer makes sense that an exception > is raised when the FCSR register is restored to the value 1024. When I'm inside my handler, I see the FCSR register has the value 0x8420, indicating that the Z bit is set in each of the Cause, Enables, and Flags fields. When longjmp() is called, it tries to write the old FCSR value of 0x400 (just the Z bit of the Enables field). In the emulation code, at lines 392 - 394 of file cp1emu.c, is the code: if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) { return SIGFPE; } Given the original FCSR value of 0x8420 and the new value to set of 0x400, the Z bit of the Cause field is still set, and as a result, the above code causes the SIGFPE exception to be thrown. Now that I've figured that out, I have to admit that I don't know if the emulator has the proper behaviour, or if not, what the fix is. Kevin, what do you think? Shane From mcdonald.shane@gmail.com Tue May 4 09:13:26 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 09:13:30 +0200 (CEST) Received: from mail-vw0-f49.google.com ([209.85.212.49]:41122 "EHLO mail-vw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491874Ab0EDHN0 (ORCPT ); Tue, 4 May 2010 09:13:26 +0200 Received: by vws8 with SMTP id 8so856549vws.36 for ; Tue, 04 May 2010 00:13:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:received:in-reply-to :references:date:message-id:subject:from:to:cc:content-type; bh=kgd/EWwl8vrQ42caOEectcX3bw7K21iGvt6Pd/kgBg0=; b=pu3c/fWXlvnRGAOe7b1+6gXHPK5fHaNsW4qzEClubgpNWIG3EXVOWVIaSZN8fCYsr+ TAITcZb1YJYJWr/IN61e5CVUSqP9J5UXOhpsMtWBXhGm/mWGGvvShaIGO3tmkwetJTap 8E67g1/tDmkpFzHrCd80qZc+P4Imrr/nhkHzA= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; b=GztCAWYP73n77ENIcKwkvbFmXfYO9iN8AdBq02TmctcCKbzNXqX/L37J6SEQEp7tIc ADa2U3GEpBUzDdg2XMLcri0XIiurJ1vbAvXF+n69bqvvVYPu+ZZmu0KhphVGSMbFeY3R JauJ4QDs+SYhfMouVE345380FSvThwgVSch5I= MIME-Version: 1.0 Received: by 10.220.129.14 with SMTP id m14mr405120vcs.75.1272957200655; Tue, 04 May 2010 00:13:20 -0700 (PDT) Received: by 10.220.19.212 with HTTP; Tue, 4 May 2010 00:13:20 -0700 (PDT) In-Reply-To: References: <4BDF366E.5000501@paralogos.com> <4BDF8092.1060401@paralogos.com> Date: Tue, 4 May 2010 01:13:20 -0600 Message-ID: Subject: Re: Unexpected behaviour when catching SIGFPE on FPU-less system From: Shane McDonald To: "Kevin D. Kissell" Cc: linux-mips@linux-mips.org Content-Type: text/plain; charset=ISO-8859-1 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26555 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mcdonald.shane@gmail.com Precedence: bulk X-list: linux-mips Sorry to the list for all the noise... One final data point: On Tue, May 4, 2010 at 12:56 AM, Shane McDonald wrote: > When I'm inside my handler, I see the FCSR register has the value 0x8420, On a machine with an FPU, when I'm inside the handler, the FCSR register seems to have the value 0x400 (no Causes or Flags bits set), rather than the 0x8420 that the FP emulator has. Shane From f.fainelli@gmail.com Tue May 4 10:39:41 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 10:39:48 +0200 (CEST) Received: from mail-ww0-f49.google.com ([74.125.82.49]:65286 "EHLO mail-ww0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491837Ab0EDIjl (ORCPT ); Tue, 4 May 2010 10:39:41 +0200 Received: by wwb39 with SMTP id 39so368395wwb.36 for ; Tue, 04 May 2010 01:39:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:sender:from:date:subject :mime-version:x-uid:x-length:to:cc:content-type :content-transfer-encoding:message-id; bh=rbjRXH8tZ58nbX53qOfJTQnl2FUfIRwITprd9yxF9kY=; b=VaOja2U8OPOyH1wOb7nEDFX5QXFR4JBhz0xXmSHX05iSrJU6Li8uLYlFaeWSiCLXb3 bCY2taP3DfjqIvKXVaY6GN0nhqRmzgJMjhUkIoxt8hLV7hRco7ywVA0dvs+2oqG3F2iQ y0zrSKDRzhKOABuT1HQeOAv0E/AwXCh13MX3w= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:date:subject:mime-version:x-uid:x-length:to:cc :content-type:content-transfer-encoding:message-id; b=tXoo2ixt1LeZwbbTqo+8ZAE12Nq1fp+gsRFfkmXvvo8YQqAPYYEYGw7VBYl5c9wu2d oxGf5UvucL/WAy41zbB9jeNTqdXmIDHKXs9f4YOPpKXfw5YhawV5TOc/3Prt9KFnuGyI 1sPq3U9j3JvV8s9Ur0WdxL0KY2m6r5z6fHbiE= Received: by 10.216.89.12 with SMTP id b12mr6793183wef.93.1272962376088; Tue, 04 May 2010 01:39:36 -0700 (PDT) Received: from flexo.localnet (bobafett.staff.proxad.net [213.228.1.121]) by mx.google.com with ESMTPS id v59sm1939261wec.3.2010.05.04.01.39.34 (version=SSLv3 cipher=RC4-MD5); Tue, 04 May 2010 01:39:35 -0700 (PDT) From: Florian Fainelli Date: Tue, 4 May 2010 10:38:57 +0200 Subject: [PATCH -queue] BCM63xx: avoid namespace clash on GPIO_DIR_{IN,OUT} MIME-Version: 1.0 X-UID: 59 X-Length: 2594 To: linux-mips@linux-mips.org Cc: Ralf Baechle Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201005041038.57783.ffainelli@freebox.fr> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26556 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips This is too generic a name, so prefix it with BCM63XX_ to avoid potential namespace clashes when including . Signed-off-by: Florian Fainelli --- diff --git a/arch/mips/bcm63xx/gpio.c b/arch/mips/bcm63xx/gpio.c index 315bc7f..f560fe7 100644 --- a/arch/mips/bcm63xx/gpio.c +++ b/arch/mips/bcm63xx/gpio.c @@ -91,7 +91,7 @@ static int bcm63xx_gpio_set_direction(struct gpio_chip *chip, spin_lock_irqsave(&bcm63xx_gpio_lock, flags); tmp = bcm_gpio_readl(reg); - if (dir == GPIO_DIR_IN) + if (dir == BCM63XX_GPIO_DIR_IN) tmp &= ~mask; else tmp |= mask; @@ -103,14 +103,14 @@ static int bcm63xx_gpio_set_direction(struct gpio_chip *chip, static int bcm63xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) { - return bcm63xx_gpio_set_direction(chip, gpio, GPIO_DIR_IN); + return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_IN); } static int bcm63xx_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, int value) { bcm63xx_gpio_set(chip, gpio, value); - return bcm63xx_gpio_set_direction(chip, gpio, GPIO_DIR_OUT); + return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_OUT); } diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h index 43d4da0..3999ec0 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h @@ -20,7 +20,7 @@ static inline unsigned long bcm63xx_gpio_count(void) } } -#define GPIO_DIR_OUT 0x0 -#define GPIO_DIR_IN 0x1 +#define BCM63XX_GPIO_DIR_OUT 0x0 +#define BCM63XX_GPIO_DIR_IN 0x1 #endif /* !BCM63XX_GPIO_H */ From yajinzhou@vm-kernel.org Tue May 4 11:55:00 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 11:55:03 +0200 (CEST) Received: from mail-qy0-f192.google.com ([209.85.221.192]:62054 "EHLO mail-qy0-f192.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491822Ab0EDJzA (ORCPT ); Tue, 4 May 2010 11:55:00 +0200 Received: by qyk30 with SMTP id 30so5119599qyk.16 for ; Tue, 04 May 2010 02:54:51 -0700 (PDT) MIME-Version: 1.0 Received: by 10.229.181.142 with SMTP id by14mr2808265qcb.18.1272966891678; Tue, 04 May 2010 02:54:51 -0700 (PDT) Received: by 10.229.212.206 with HTTP; Tue, 4 May 2010 02:54:51 -0700 (PDT) Date: Tue, 4 May 2010 17:54:51 +0800 Message-ID: Subject: [PATCH 0/12] add basic gdium support From: yajin To: linux-mips@linux-mips.org, loongson-dev , wuzhangjin@gmail.com, apatard@mandriva.com Content-Type: text/plain; charset=UTF-8 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26557 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yajinzhou@vm-kernel.org Precedence: bulk X-list: linux-mips Gdium is a netbook based on loongson2f CPU and sm502 SOC. It does NOT have a south bridge. The sm502 SOC is used for LCD controller and audio output. This series of patches are adding gdium support to ralf's linux-mips repository. From yajinzhou@vm-kernel.org Tue May 4 11:55:21 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 11:55:30 +0200 (CEST) Received: from mail-qy0-f192.google.com ([209.85.221.192]:62054 "EHLO mail-qy0-f192.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491853Ab0EDJzE (ORCPT ); Tue, 4 May 2010 11:55:04 +0200 Received: by mail-qy0-f192.google.com with SMTP id 30so5119599qyk.16 for ; Tue, 04 May 2010 02:55:03 -0700 (PDT) MIME-Version: 1.0 Received: by 10.224.66.211 with SMTP id o19mr4144594qai.112.1272966903253; Tue, 04 May 2010 02:55:03 -0700 (PDT) Received: by 10.229.212.206 with HTTP; Tue, 4 May 2010 02:55:03 -0700 (PDT) Date: Tue, 4 May 2010 17:55:03 +0800 Message-ID: Subject: [PATCH 2/12] add basic gdium support From: yajin To: linux-mips@linux-mips.org, loongson-dev , wuzhangjin@gmail.com, apatard@mandriva.com Content-Type: text/plain; charset=UTF-8 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26558 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yajinzhou@vm-kernel.org Precedence: bulk X-list: linux-mips Gdium is same to most of the loongson2f based machines except that it does NOT use the cs5536 south bridge. Signed-off-by: yajin --- arch/mips/Makefile | 1 + arch/mips/include/asm/mach-loongson/machine.h | 7 +++ arch/mips/loongson/Kconfig | 25 +++++++++ arch/mips/loongson/Makefile | 6 ++ arch/mips/loongson/gdium/Makefile | 3 + arch/mips/loongson/gdium/irq.c | 66 +++++++++++++++++++++++++ arch/mips/loongson/gdium/reset.c | 25 +++++++++ 7 files changed, 133 insertions(+), 0 deletions(-) create mode 100644 arch/mips/loongson/gdium/Makefile create mode 100644 arch/mips/loongson/gdium/irq.c create mode 100644 arch/mips/loongson/gdium/reset.c diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 0b9c01a..c1470af 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -359,6 +359,7 @@ cflags-$(CONFIG_MACH_LOONGSON) += -I$(srctree)/arch/mips/include/asm/mach-loongs -mno-branch-likely load-$(CONFIG_LEMOTE_FULOONG2E) += 0xffffffff80100000 load-$(CONFIG_LEMOTE_MACH2F) += 0xffffffff80200000 +load-$(CONFIG_DEXXON_GDIUM) += 0xffffffff80200000 # # MIPS Malta board diff --git a/arch/mips/include/asm/mach-loongson/machine.h b/arch/mips/include/asm/mach-loongson/machine.h index 4321338..fb9554c 100644 --- a/arch/mips/include/asm/mach-loongson/machine.h +++ b/arch/mips/include/asm/mach-loongson/machine.h @@ -24,4 +24,11 @@ #endif +/* use gdium as the default machine of LEMOTE_MACH2F */ +#ifdef CONFIG_DEXXON_GDIUM + +#define LOONGSON_MACHTYPE MACH_DEXXON_GDIUM2F10 + +#endif + #endif /* __ASM_MACH_LOONGSON_MACHINE_H */ diff --git a/arch/mips/loongson/Kconfig b/arch/mips/loongson/Kconfig index 3df1967..90a02b4 100644 --- a/arch/mips/loongson/Kconfig +++ b/arch/mips/loongson/Kconfig @@ -57,6 +57,31 @@ config LEMOTE_MACH2F These family machines include fuloong2f mini PC, yeeloong2f notebook, LingLoong allinone PC and so forth. + +config DEXXON_GDIUM + bool "Dexxon Gdium Netbook" + select ARCH_SPARSEMEM_ENABLE + select BOARD_SCACHE + select BOOT_ELF32 + select CEVT_R4K + select CPU_HAS_WB + select CSRC_R4K + select DMA_NONCOHERENT + select GENERIC_HARDIRQS_NO__DO_IRQ + select GENERIC_ISA_DMA_SUPPORT_BROKEN + select HW_HAS_PCI + select I8259 + select IRQ_CPU + select ISA + select SYS_HAS_CPU_LOONGSON2F + select SYS_HAS_EARLY_PRINTK + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_HIGHMEM + select SYS_SUPPORTS_LITTLE_ENDIAN + select ARCH_REQUIRE_GPIOLIB + help + Dexxon gdium netbook based on Loongson 2F and SM502. endchoice config CS5536 diff --git a/arch/mips/loongson/Makefile b/arch/mips/loongson/Makefile index 2b76cb0..6002109 100644 --- a/arch/mips/loongson/Makefile +++ b/arch/mips/loongson/Makefile @@ -15,3 +15,9 @@ obj-$(CONFIG_LEMOTE_FULOONG2E) += fuloong-2e/ # obj-$(CONFIG_LEMOTE_MACH2F) += lemote-2f/ + +# +# gdium +# + +obj-$(CONFIG_DEXXON_GDIUM) += gdium/ diff --git a/arch/mips/loongson/gdium/Makefile b/arch/mips/loongson/gdium/Makefile new file mode 100644 index 0000000..31a8e57 --- /dev/null +++ b/arch/mips/loongson/gdium/Makefile @@ -0,0 +1,3 @@ +# Makefile for gdium + +obj-y += irq.o reset.o diff --git a/arch/mips/loongson/gdium/irq.c b/arch/mips/loongson/gdium/irq.c new file mode 100644 index 0000000..b0679eb --- /dev/null +++ b/arch/mips/loongson/gdium/irq.c @@ -0,0 +1,66 @@ +/* + * Copyright (C) 2007 Lemote Inc. + * Author: Fuxin Zhang, zhangfx@lemote.com + * + * Copyright (c) 2010 yajin + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include + +#include +#include + +#include +#include + +#define LOONGSON_TIMER_IRQ (MIPS_CPU_IRQ_BASE + 7) /* cpu timer */ +#define LOONGSON_PERFCNT_IRQ (MIPS_CPU_IRQ_BASE + 6) /* cpu perf counter */ +#define LOONGSON_NORTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 6) /* bonito */ +#define LOONGSON_UART_IRQ (MIPS_CPU_IRQ_BASE + 3) /* cpu serial port */ + +void mach_irq_dispatch(unsigned int pending) +{ + if (pending & CAUSEF_IP7) + do_IRQ(LOONGSON_TIMER_IRQ); + else if (pending & CAUSEF_IP6) { /* North Bridge, Perf counter */ +#ifdef CONFIG_OPROFILE + do_IRQ(LOONGSON2_PERFCNT_IRQ); +#endif + bonito_irqdispatch(); + } else if (pending & CAUSEF_IP3) /* CPU UART */ + do_IRQ(LOONGSON_UART_IRQ); + else + spurious_interrupt(); +} + +static irqreturn_t ip6_action(int cpl, void *dev_id) +{ + return IRQ_HANDLED; +} + +struct irqaction ip6_irqaction = { + .handler = ip6_action, + .name = "cascade", + .flags = IRQF_SHARED, +}; + +void __init mach_init_irq(void) +{ + /* init all controller + * 16-23 ------> mips cpu interrupt + * 32-63 ------> bonito irq + */ + + /* Sets the first-level interrupt dispatcher. */ + mips_cpu_irq_init(); + bonito_irq_init(); + + /* setup north bridge irq (bonito) */ + setup_irq(LOONGSON_NORTH_BRIDGE_IRQ, &ip6_irqaction); +} diff --git a/arch/mips/loongson/gdium/reset.c b/arch/mips/loongson/gdium/reset.c new file mode 100644 index 0000000..da7752d --- /dev/null +++ b/arch/mips/loongson/gdium/reset.c @@ -0,0 +1,25 @@ +/* Board-specific reboot/shutdown routines + * + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + * + * Copyright (C) 2010 yajin + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#include + +void mach_prepare_shutdown(void) +{ + LOONGSON_GPIOIE &= ~(1<<1); + LOONGSON_GPIODATA |= (1<<1); +} + +void mach_prepare_reboot(void) +{ + LOONGSON_GPIOIE &= ~(1<<2); + LOONGSON_GPIODATA &= ~(1<<2); +} -- 1.5.6.5 From yajinzhou@vm-kernel.org Tue May 4 11:55:50 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 11:55:55 +0200 (CEST) Received: from mail-qy0-f192.google.com ([209.85.221.192]:46335 "EHLO mail-qy0-f192.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492181Ab0EDJzE (ORCPT ); Tue, 4 May 2010 11:55:04 +0200 Received: by qyk30 with SMTP id 30so5119707qyk.16 for ; Tue, 04 May 2010 02:54:58 -0700 (PDT) MIME-Version: 1.0 Received: by 10.224.39.76 with SMTP id f12mr7273232qae.304.1272966897806; Tue, 04 May 2010 02:54:57 -0700 (PDT) Received: by 10.229.212.206 with HTTP; Tue, 4 May 2010 02:54:57 -0700 (PDT) Date: Tue, 4 May 2010 17:54:57 +0800 Message-ID: Subject: [PATCH 1/12] remove set_irq_trigger_mode to mach_init_irq From: yajin To: linux-mips@linux-mips.org, loongson-dev Cc: wuzhangjin@gmail.com, apatard@mandriva.com Content-Type: text/plain; charset=UTF-8 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26559 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yajinzhou@vm-kernel.org Precedence: bulk X-list: linux-mips The function set_irq_trigger_mode is used to set the interrupt trigger level and it should be machine specific. That means we need to remove this function from common/irq.c to irq.c of different loongson machines. Signed-off-by: yajin --- arch/mips/loongson/common/irq.c | 3 --- arch/mips/loongson/fuloong-2e/irq.c | 3 +++ arch/mips/loongson/lemote-2f/irq.c | 3 +++ 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/mips/loongson/common/irq.c b/arch/mips/loongson/common/irq.c index 20e7328..987feeb 100644 --- a/arch/mips/loongson/common/irq.c +++ b/arch/mips/loongson/common/irq.c @@ -56,9 +56,6 @@ void __init arch_init_irq(void) */ clear_c0_status(ST0_IM | ST0_BEV); - /* setting irq trigger mode */ - set_irq_trigger_mode(); - /* no steer */ LOONGSON_INTSTEER = 0; diff --git a/arch/mips/loongson/fuloong-2e/irq.c b/arch/mips/loongson/fuloong-2e/irq.c index 320e937..3881bd3 100644 --- a/arch/mips/loongson/fuloong-2e/irq.c +++ b/arch/mips/loongson/fuloong-2e/irq.c @@ -59,6 +59,9 @@ void __init mach_init_irq(void) * 32-63 ------> bonito irq */ + /* setting irq trigger mode */ + set_irq_trigger_mode(); + /* Sets the first-level interrupt dispatcher. */ mips_cpu_irq_init(); init_i8259_irqs(); diff --git a/arch/mips/loongson/lemote-2f/irq.c b/arch/mips/loongson/lemote-2f/irq.c index 1d8b4d2..f3eee56 100644 --- a/arch/mips/loongson/lemote-2f/irq.c +++ b/arch/mips/loongson/lemote-2f/irq.c @@ -122,6 +122,9 @@ void __init mach_init_irq(void) * 32-63 ------> bonito irq */ + /* setting irq trigger mode */ + set_irq_trigger_mode(); + /* Sets the first-level interrupt dispatcher. */ mips_cpu_irq_init(); init_i8259_irqs(); -- 1.5.6.5 From yajinzhou@vm-kernel.org Tue May 4 11:56:15 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 11:56:21 +0200 (CEST) Received: from mail-qy0-f192.google.com ([209.85.221.192]:62054 "EHLO mail-qy0-f192.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492254Ab0EDJzI (ORCPT ); Tue, 4 May 2010 11:55:08 +0200 Received: by mail-qy0-f192.google.com with SMTP id 30so5119599qyk.16 for ; Tue, 04 May 2010 02:55:07 -0700 (PDT) MIME-Version: 1.0 Received: by 10.224.96.81 with SMTP id g17mr5037669qan.108.1272966907629; Tue, 04 May 2010 02:55:07 -0700 (PDT) Received: by 10.229.212.206 with HTTP; Tue, 4 May 2010 02:55:07 -0700 (PDT) Date: Tue, 4 May 2010 17:55:07 +0800 Message-ID: Subject: [PATCH 3/12] add pci fixup for gdium From: yajin To: linux-mips@linux-mips.org, loongson-dev , wuzhangjin@gmail.com, apatard@mandriva.com Content-Type: text/plain; charset=UTF-8 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26560 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yajinzhou@vm-kernel.org Precedence: bulk X-list: linux-mips Add the PCI fixup for gdium. Signed-off-by: yajin --- arch/mips/pci/Makefile | 1 + arch/mips/pci/fixup-gdium.c | 60 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 61 insertions(+), 0 deletions(-) create mode 100644 arch/mips/pci/fixup-gdium.c diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index c9209ca..95be72f 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile @@ -29,6 +29,7 @@ obj-$(CONFIG_SOC_AU1550) += fixup-au1000.o ops-au1000.o obj-$(CONFIG_SOC_PNX8550) += fixup-pnx8550.o ops-pnx8550.o obj-$(CONFIG_LEMOTE_FULOONG2E) += fixup-fuloong2e.o ops-loongson2.o obj-$(CONFIG_LEMOTE_MACH2F) += fixup-lemote2f.o ops-loongson2.o +obj-$(CONFIG_DEXXON_GDIUM) += fixup-gdium.o ops-loongson2.o obj-$(CONFIG_MIPS_MALTA) += fixup-malta.o obj-$(CONFIG_PMC_MSP7120_GW) += fixup-pmcmsp.o ops-pmcmsp.o obj-$(CONFIG_PMC_MSP7120_EVAL) += fixup-pmcmsp.o ops-pmcmsp.o diff --git a/arch/mips/pci/fixup-gdium.c b/arch/mips/pci/fixup-gdium.c new file mode 100644 index 0000000..f692ada --- /dev/null +++ b/arch/mips/pci/fixup-gdium.c @@ -0,0 +1,60 @@ +/* + * Copyright (C) 2010 yajin + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include + +/* + * http://www.pcidatabase.com + * GDIUM has different PCI mapping + * slot 13 (0x1814/0x0301) -> RaLink rt2561 Wireless-G PCI + * slog 14 (0x126f/0x0501) -> sm501 + * slot 15 (0x1033/0x0035) -> NEC Dual OHCI controllers + * plus Single EHCI controller + * slot 16 (0x10ec/0x8139) -> Realtek 8139c + * slot 17 (0x1033/0x00e0) -> NEC USB 2.0 Host Controller + * + */ +int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) +{ + switch (slot) { + case 13: + return LOONGSON_IRQ_BASE + ((pin - 1) & 3); + case 14: + return LOONGSON_IRQ_BASE + 4; /*36*/ + case 15: + return LOONGSON_IRQ_BASE + 5; /*37*/ + case 16: + return LOONGSON_IRQ_BASE + 7; /*39*/ + case 17: + return LOONGSON_IRQ_BASE + 6; /*38*/ + default: + printk(KERN_INFO " strange pci slot number %d " + "on gdium.\n", slot); + return 0; + } +} + +/* Fixups for the NEC USB host controllers */ +static void __init gdium_usb_host_fixup(struct pci_dev *dev) +{ + unsigned int val; + pci_read_config_dword(dev, 0xe0, &val); + pci_write_config_dword(dev, 0xe0, (val & ~3) | 0x3); +} +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB, + gdium_usb_host_fixup); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, 0x00e0, + gdium_usb_host_fixup); + +/* Do platform specific device initialization at pci_enable_device() time */ +int pcibios_plat_dev_init(struct pci_dev *dev) +{ + return 0; +} -- 1.5.6.5 From yajinzhou@vm-kernel.org Tue May 4 11:56:40 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 11:56:45 +0200 (CEST) Received: from mail-qy0-f192.google.com ([209.85.221.192]:46335 "EHLO mail-qy0-f192.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492310Ab0EDJzM (ORCPT ); Tue, 4 May 2010 11:55:12 +0200 Received: by mail-qy0-f192.google.com with SMTP id 30so5119707qyk.16 for ; Tue, 04 May 2010 02:55:12 -0700 (PDT) MIME-Version: 1.0 Received: by 10.229.187.208 with SMTP id cx16mr1975759qcb.66.1272966911992; Tue, 04 May 2010 02:55:11 -0700 (PDT) Received: by 10.229.212.206 with HTTP; Tue, 4 May 2010 02:55:11 -0700 (PDT) Date: Tue, 4 May 2010 17:55:11 +0800 Message-ID: Subject: [PATCH 4/12] add loongson2f gpio interfact support From: yajin To: linux-mips@linux-mips.org, loongson-dev , wuzhangjin@gmail.com, apatard@mandriva.com Content-Type: text/plain; charset=UTF-8 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26561 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yajinzhou@vm-kernel.org Precedence: bulk X-list: linux-mips Add loongson2f GPIO interfact support. GPIOLIB needs these functions. Signed-off-by: yajin --- arch/mips/include/asm/mach-loongson/gpio.h | 34 +++++++ arch/mips/loongson/common/Makefile | 5 + arch/mips/loongson/common/gpio.c | 145 ++++++++++++++++++++++++++++ 3 files changed, 184 insertions(+), 0 deletions(-) create mode 100644 arch/mips/include/asm/mach-loongson/gpio.h create mode 100644 arch/mips/loongson/common/gpio.c diff --git a/arch/mips/include/asm/mach-loongson/gpio.h b/arch/mips/include/asm/mach-loongson/gpio.h new file mode 100644 index 0000000..00a7fae --- /dev/null +++ b/arch/mips/include/asm/mach-loongson/gpio.h @@ -0,0 +1,34 @@ +/* + * STLS2F GPIO Support + * + * Copyright (c) 2008 Richard Liu, STMicroelectronics + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __STLS2F_GPIO_H +#define __STLS2F_GPIO_H + +#include + +extern void gpio_set_value(unsigned gpio, int value); +extern int gpio_get_value(unsigned gpio); +extern int gpio_cansleep(unsigned gpio); + +/* The chip can do interrupt + * but it has not been tested and doc not clear + */ +static inline int gpio_to_irq(int gpio) +{ + return -EINVAL; +} + +static inline int irq_to_gpio(int gpio) +{ + return -EINVAL; +} + +#endif /* __STLS2F_GPIO_H */ diff --git a/arch/mips/loongson/common/Makefile b/arch/mips/loongson/common/Makefile index 7668c4d..404dbb5 100644 --- a/arch/mips/loongson/common/Makefile +++ b/arch/mips/loongson/common/Makefile @@ -23,3 +23,8 @@ obj-$(CONFIG_CS5536) += cs5536/ # obj-$(CONFIG_LOONGSON_SUSPEND) += pm.o + +# +# Loongson 2f gpio +# +obj-$(CONFIG_GENERIC_GPIO) += gpio.o diff --git a/arch/mips/loongson/common/gpio.c b/arch/mips/loongson/common/gpio.c new file mode 100644 index 0000000..346418a --- /dev/null +++ b/arch/mips/loongson/common/gpio.c @@ -0,0 +1,145 @@ +/* + * STLS2F GPIO Support + * + * Copyright(c) 2008 Richard Liu, STMicroelectronics + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include + +/* + * North bridge of loongson 2f has 4 gpio pins. + * GPIO_Data: reg offset 0X1C + * bit [3:0] gpio_out + * bit [19:16] gpio_in + */ +#define LOONGSON_GPIO_PINS 4 +#define LOONGSON_GPIO_IN_SHIFT 16 + +static DEFINE_SPINLOCK(gpio_lock); + +int gpio_get_value(unsigned gpio) +{ + u32 val; + u32 mask; + + if (gpio >= LOONGSON_GPIO_PINS) + return __gpio_get_value(gpio); + + mask = 1 << (gpio + LOONGSON_GPIO_IN_SHIFT); + spin_lock(&gpio_lock); + val = LOONGSON_GPIODATA; + spin_unlock(&gpio_lock); + + return ((val & mask) != 0); +} +EXPORT_SYMBOL(gpio_get_value); + +void gpio_set_value(unsigned gpio, int state) +{ + u32 val; + u32 mask; + + if (gpio >= LOONGSON_GPIO_PINS) { + __gpio_set_value(gpio, state); + return ; + } + + mask = 1 << gpio; + + spin_lock(&gpio_lock); + val = LOONGSON_GPIODATA; + if (state) + val |= mask; + else + val &= (~mask); + LOONGSON_GPIODATA = val; + spin_unlock(&gpio_lock); +} +EXPORT_SYMBOL(gpio_set_value); + +int gpio_cansleep(unsigned gpio) +{ + if (gpio < LOONGSON_GPIO_PINS) + return 0; + else + return __gpio_cansleep(gpio); +} +EXPORT_SYMBOL(gpio_cansleep); + +static int loongson_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) +{ + u32 temp; + u32 mask; + + if (gpio >= LOONGSON_GPIO_PINS) + return -EINVAL; + + spin_lock(&gpio_lock); + mask = 1 << gpio; + temp = LOONGSON_GPIOIE; + temp |= mask; + LOONGSON_GPIOIE = temp; + spin_unlock(&gpio_lock); + + return 0; +} + +static int loongson_gpio_direction_output(struct gpio_chip *chip, + unsigned gpio, int level) +{ + u32 temp; + u32 mask; + + if (gpio >= LOONGSON_GPIO_PINS) + return -EINVAL; + + gpio_set_value(gpio, level); + spin_lock(&gpio_lock); + mask = 1 << gpio; + temp = LOONGSON_GPIOIE; + temp &= (~mask); + LOONGSON_GPIOIE = temp; + spin_unlock(&gpio_lock); + + return 0; +} + +static int loongson_gpio_get_value(struct gpio_chip *chip, unsigned gpio) +{ + return gpio_get_value(gpio); +} + +static void loongson_gpio_set_value(struct gpio_chip *chip, + unsigned gpio, int value) +{ + gpio_set_value(gpio, value); +} + +static struct gpio_chip loongson_gpio_chip = { + .label = "loongson-gpio", + .direction_input = loongson_gpio_direction_input, + .get = loongson_gpio_get_value, + .direction_output = loongson_gpio_direction_output, + .set = loongson_gpio_set_value, + .base = 0, + .ngpio = LOONGSON_GPIO_PINS, +}; + +static int __init loongson_gpio_setup(void) +{ + return gpiochip_add(&loongson_gpio_chip); +} +arch_initcall(loongson_gpio_setup); -- 1.5.6.5 From yajinzhou@vm-kernel.org Tue May 4 11:57:04 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 11:57:08 +0200 (CEST) Received: from mail-qy0-f192.google.com ([209.85.221.192]:62054 "EHLO mail-qy0-f192.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492321Ab0EDJzR (ORCPT ); Tue, 4 May 2010 11:55:17 +0200 Received: by mail-qy0-f192.google.com with SMTP id 30so5119599qyk.16 for ; Tue, 04 May 2010 02:55:17 -0700 (PDT) MIME-Version: 1.0 Received: by 10.224.100.144 with SMTP id y16mr2235278qan.332.1272966917065; Tue, 04 May 2010 02:55:17 -0700 (PDT) Received: by 10.229.212.206 with HTTP; Tue, 4 May 2010 02:55:16 -0700 (PDT) Date: Tue, 4 May 2010 17:55:16 +0800 Message-ID: Subject: [PATCH 5/12] add sm501 pwm support. From: yajin To: linux-mips@linux-mips.org, loongson-dev , wuzhangjin@gmail.com, apatard@mandriva.com, ben@simtec.co.uk, vince@simtec.co.uk Content-Type: text/plain; charset=UTF-8 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26562 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yajinzhou@vm-kernel.org Precedence: bulk X-list: linux-mips Gdium uses sm501 PWM for LCD backlight adjust. So we need to add the PWM support into sm501. Signed-off-by: yajin --- drivers/mfd/sm501.c | 16 ++++++++++++++++ include/linux/sm501.h | 1 + 2 files changed, 17 insertions(+), 0 deletions(-) diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c index bc9275c..ab560fe 100644 --- a/drivers/mfd/sm501.c +++ b/drivers/mfd/sm501.c @@ -1219,6 +1219,20 @@ static int sm501_register_gpio_i2c(struct sm501_devdata *sm, return 0; } +/* register sm501 PWM device */ +static int sm501_register_pwm(struct sm501_devdata *sm) +{ + struct platform_device *pdev; + + pdev = sm501_create_subdev(sm, "sm501-pwm", 2, 0); + if (!pdev) + return -ENOMEM; + sm501_create_subio(sm, &pdev->resource[0], 0x10020, 0xC); + sm501_create_irq(sm, &pdev->resource[1]); + + return sm501_register_device(sm, pdev); +} + /* sm501_dbg_regs * * Debug attribute to attach to parent device to show core registers @@ -1377,6 +1391,8 @@ static int __devinit sm501_init_dev(struct sm501_devdata *sm) sm501_register_uart(sm, idata->devices); if (idata->devices & SM501_USE_GPIO) sm501_register_gpio(sm); + if (idata->devices & SM501_USE_PWM) + sm501_register_pwm(sm); } if (pdata->gpio_i2c != NULL && pdata->gpio_i2c_nr > 0) { diff --git a/include/linux/sm501.h b/include/linux/sm501.h index 214f932..0a4287e 100644 --- a/include/linux/sm501.h +++ b/include/linux/sm501.h @@ -122,6 +122,7 @@ struct sm501_reg_init { #define SM501_USE_AC97 (1<<7) #define SM501_USE_I2S (1<<8) #define SM501_USE_GPIO (1<<9) +#define SM501_USE_PWM (1<<10) #define SM501_USE_ALL (0xffffffff) -- 1.5.6.5 From yajinzhou@vm-kernel.org Tue May 4 11:57:27 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 11:57:33 +0200 (CEST) Received: from mail-qy0-f192.google.com ([209.85.221.192]:46335 "EHLO mail-qy0-f192.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491822Ab0EDJzW (ORCPT ); Tue, 4 May 2010 11:55:22 +0200 Received: by mail-qy0-f192.google.com with SMTP id 30so5119707qyk.16 for ; Tue, 04 May 2010 02:55:21 -0700 (PDT) MIME-Version: 1.0 Received: by 10.224.27.202 with SMTP id j10mr4195362qac.260.1272966921333; Tue, 04 May 2010 02:55:21 -0700 (PDT) Received: by 10.229.212.206 with HTTP; Tue, 4 May 2010 02:55:21 -0700 (PDT) Date: Tue, 4 May 2010 17:55:21 +0800 Message-ID: Subject: [PATCH 6/12] add sm501_configure_gpio function From: yajin To: linux-mips@linux-mips.org, loongson-dev , wuzhangjin@gmail.com, apatard@mandriva.com Cc: vince@simtec.co.uk, ben@simtec.co.uk Content-Type: text/plain; charset=UTF-8 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26563 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yajinzhou@vm-kernel.org Precedence: bulk X-list: linux-mips Add this function to allow other modules to configure the GPIO interface of SM501 Signed-off-by: yajin --- drivers/mfd/sm501.c | 28 ++++++++++++++++++++++++++++ include/linux/sm501.h | 3 +++ 2 files changed, 31 insertions(+), 0 deletions(-) diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c index ab560fe..ce5dfce 100644 --- a/drivers/mfd/sm501.c +++ b/drivers/mfd/sm501.c @@ -1145,6 +1145,27 @@ static inline int sm501_gpio_isregistered(struct sm501_devdata *sm) { return sm->gpio.registered; } + +int sm501_configure_gpio(struct device *dev, unsigned int gpio, + unsigned char mode) +{ + int reg, offset, set; + + offset = 0; + set = 0; + + if (offset >= 32) { + reg = SM501_GPIO63_32_CONTROL; + offset = gpio - 32; + } else + reg = SM501_GPIO31_0_CONTROL; + + if (mode) + set = 1<); Tue, 4 May 2010 11:55:28 +0200 Received: by mail-qy0-f192.google.com with SMTP id 30so5119599qyk.16 for ; Tue, 04 May 2010 02:55:27 -0700 (PDT) MIME-Version: 1.0 Received: by 10.229.222.144 with SMTP id ig16mr2756819qcb.74.1272966926905; Tue, 04 May 2010 02:55:26 -0700 (PDT) Received: by 10.229.212.206 with HTTP; Tue, 4 May 2010 02:55:26 -0700 (PDT) Date: Tue, 4 May 2010 17:55:26 +0800 Message-ID: Subject: [PATCH 7/12] add gdium platform devices From: yajin To: linux-mips@linux-mips.org, loongson-dev , wuzhangjin@gmail.com, apatard@mandriva.com Content-Type: text/plain; charset=UTF-8 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26564 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yajinzhou@vm-kernel.org Precedence: bulk X-list: linux-mips Add the gdium platform devices such as lm75 sensor and m41t83 rtc. Signed-off-by: yajin --- arch/mips/loongson/Kconfig | 4 + arch/mips/loongson/gdium/Makefile | 2 +- arch/mips/loongson/gdium/platform.c | 133 ++++++++++ arch/mips/loongson/gdium/pwm-clock.c | 465 ++++++++++++++++++++++++++++++++++ 4 files changed, 603 insertions(+), 1 deletions(-) create mode 100644 arch/mips/loongson/gdium/platform.c create mode 100644 arch/mips/loongson/gdium/pwm-clock.c diff --git a/arch/mips/loongson/Kconfig b/arch/mips/loongson/Kconfig index 90a02b4..c264a84 100644 --- a/arch/mips/loongson/Kconfig +++ b/arch/mips/loongson/Kconfig @@ -80,10 +80,14 @@ config DEXXON_GDIUM select SYS_SUPPORTS_HIGHMEM select SYS_SUPPORTS_LITTLE_ENDIAN select ARCH_REQUIRE_GPIOLIB + select HAVE_PWM if MFD_SM501 help Dexxon gdium netbook based on Loongson 2F and SM502. endchoice +config HAVE_PWM + bool + config CS5536 bool diff --git a/arch/mips/loongson/gdium/Makefile b/arch/mips/loongson/gdium/Makefile index 31a8e57..4fb096d 100644 --- a/arch/mips/loongson/gdium/Makefile +++ b/arch/mips/loongson/gdium/Makefile @@ -1,3 +1,3 @@ # Makefile for gdium -obj-y += irq.o reset.o +obj-y += irq.o reset.o platform.o pwm-clock.o diff --git a/arch/mips/loongson/gdium/platform.c b/arch/mips/loongson/gdium/platform.c new file mode 100644 index 0000000..a6d5968 --- /dev/null +++ b/arch/mips/loongson/gdium/platform.c @@ -0,0 +1,133 @@ +/* + * Copyright (c) 2009 Philippe Vachon + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + + +#include +#include +#include +#include +#include +#include + +#include + +#define GDIUM_GPIO_BASE 224 + +static struct i2c_board_info __initdata sm502dev_i2c_devices[] = { + { + I2C_BOARD_INFO("lm75", 0x48), + .type = "lm75", + }, + { + I2C_BOARD_INFO("rtc-m41t80", 0x68), + .type = "m41t83", + }, + { + I2C_BOARD_INFO("gdium-laptop", 0x40), + }, +}; + +static int sm502dev_backlight_init(struct device *dev) +{ + /* Add gpio request stuff here */ + return 0; +} + +static void sm502dev_backlight_exit(struct device *dev) +{ + /* Add gpio free stuff here */ +} + +static struct platform_pwm_backlight_data backlight_data = { + .pwm_id = 0, + .max_brightness = 100, + .dft_brightness = 50, + .pwm_period_ns = 50000, /* 20 kHz */ + .init = sm502dev_backlight_init, + .exit = sm502dev_backlight_exit, +}; + +static struct platform_device backlight = { + .name = "pwm-backlight", + .dev = { + .platform_data = &backlight_data, + }, + .id = -1, +}; + +/* + * Warning this stunt is very dangerous + * as the sm501 gpio have dynamic numbers... + */ +/* bus 0 is the one for the ST7, DS75 etc... */ +static struct i2c_gpio_platform_data i2c_gpio0_data = { + .sda_pin = GDIUM_GPIO_BASE + 13, + .scl_pin = GDIUM_GPIO_BASE + 6, + .udelay = 5, + .timeout = HZ / 10, + .sda_is_open_drain = 0, + .scl_is_open_drain = 0, +}; + +static struct platform_device i2c_gpio0_device = { + .name = "i2c-gpio", + .id = 0, + .dev = { + .platform_data = &i2c_gpio0_data, + }, +}; + +/* bus 1 is for the CRT/VGA external screen */ +static struct i2c_gpio_platform_data i2c_gpio1_data = { + .sda_pin = GDIUM_GPIO_BASE + 10, + .scl_pin = GDIUM_GPIO_BASE + 9, + .udelay = 5, + .timeout = HZ / 10, + .sda_is_open_drain = 0, + .scl_is_open_drain = 0, +}; + +static struct platform_device i2c_gpio1_device = { + .name = "i2c-gpio", + .id = 1, + .dev = { + .platform_data = &i2c_gpio1_data, + }, +}; + +static struct platform_device *devices[] __initdata = { + &i2c_gpio0_device, + &i2c_gpio1_device, + &backlight, +}; + +static int __init gdium_platform_devices_setup(void) +{ + int ret; + printk(KERN_INFO "Registering gdium platform devices\n"); + + platform_add_devices(devices, ARRAY_SIZE(devices)); + + ret = i2c_register_board_info(0, sm502dev_i2c_devices, + ARRAY_SIZE(sm502dev_i2c_devices)); + + if (ret != 0) { + printk(KERN_INFO "Error while registering gdium platform" + " devices: %d\n", ret); + return ret; + } + + return 0; +} + +/* + * some devices are on the pwm stuff which is behind the mfd which is + * behind the pci bus so arch_initcall can't work because too early + */ +late_initcall(gdium_platform_devices_setup); diff --git a/arch/mips/loongson/gdium/pwm-clock.c b/arch/mips/loongson/gdium/pwm-clock.c new file mode 100644 index 0000000..5af3b23 --- /dev/null +++ b/arch/mips/loongson/gdium/pwm-clock.c @@ -0,0 +1,465 @@ +/* + * SM501 PWM clock + * Copyright (C) 2009-2010 Arnaud Patard + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static const char drv_name[] = "sm501-pwm"; + +#define INPUT_CLOCK 96 /* MHz */ +#define PWM_COUNT 3 + +#define SM501PWM_HIGH_COUNTER (1<<20) +#define SM501PWM_LOW_COUNTER (1<<8) +#define SM501PWM_CLOCK_DIVIDE (1>>4) +#define SM501PWM_IP (1<<3) +#define SM501PWM_I (1<<2) +#define SM501PWM_E (1<<0) + +struct pwm_device { + struct list_head node; + struct device *dev; + void __iomem *regs; + int duty_ns; + int period_ns; + char enabled; + void (*handler)(struct pwm_device *pwm); + + const char *label; + unsigned int use_count; + unsigned int pwm_id; +}; + +struct sm501pwm_info { + void __iomem *regs; + int irq; + struct resource *res; + struct device *dev; + struct dentry *debugfs; + + struct pwm_device pwm[3]; +}; + +int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) +{ + unsigned int high, low, divider; + int divider1, divider2; + unsigned long long delay; + + if (!pwm || !pwm->regs || period_ns == 0 || duty_ns > period_ns) + return -EINVAL; + + /* Get delay + * We're loosing some precision but multiplying then dividing + * will overflow + */ + if (period_ns > 1000) { + delay = period_ns / 1000; + delay *= INPUT_CLOCK; + } else { + delay = period_ns * 96; + delay /= 1000; + } + + /* Get the number of clock low and high */ + high = delay * duty_ns / period_ns; + low = delay - high; + + /* Get divider to make 'low' and 'high' fit into 12 bits */ + /* No need to say that the divider must be >= 0 */ + divider1 = fls(low)-12; + divider2 = fls(high)-12; + + if (divider1 < 0) + divider1 = 0; + if (divider2 < 0) + divider2 = 0; + + divider = max(divider1, divider2); + + low >>= divider; + high >>= divider; + + pwm->duty_ns = duty_ns; + pwm->period_ns = period_ns; + + writel((high<<20)|(low<<8)|(divider<<4), pwm->regs); + return 0; +} +EXPORT_SYMBOL(pwm_config); + +int pwm_enable(struct pwm_device *pwm) +{ + u32 reg; + + if (!pwm) + return -EINVAL; + + switch (pwm->pwm_id) { + case 0: + sm501_configure_gpio(pwm->dev->parent, 29, 1); + break; + case 1: + sm501_configure_gpio(pwm->dev->parent, 30, 1); + break; + case 2: + sm501_configure_gpio(pwm->dev->parent, 31, 1); + break; + default: + return -EINVAL; + } + + reg = readl(pwm->regs); + reg |= (SM501PWM_IP | SM501PWM_E); + writel(reg, pwm->regs); + pwm->enabled = 1; + + return 0; +} +EXPORT_SYMBOL(pwm_enable); + +void pwm_disable(struct pwm_device *pwm) +{ + u32 reg; + + if (!pwm) + return; + + reg = readl(pwm->regs); + reg &= ~(SM501PWM_IP | SM501PWM_E); + writel(reg, pwm->regs); + + switch (pwm->pwm_id) { + case 0: + sm501_configure_gpio(pwm->dev->parent, 29, 0); + break; + case 1: + sm501_configure_gpio(pwm->dev->parent, 30, 0); + break; + case 2: + sm501_configure_gpio(pwm->dev->parent, 31, 0); + break; + default: + break; + } + pwm->enabled = 0; +} +EXPORT_SYMBOL(pwm_disable); + +static DEFINE_MUTEX(pwm_lock); +static LIST_HEAD(pwm_list); + +struct pwm_device *pwm_request(int pwm_id, const char *label) +{ + struct pwm_device *pwm; + int found = 0; + + mutex_lock(&pwm_lock); + + list_for_each_entry(pwm, &pwm_list, node) { + if (pwm->pwm_id == pwm_id && pwm->use_count == 0) { + pwm->use_count++; + pwm->label = label; + found = 1; + break; + } + } + + mutex_unlock(&pwm_lock); + + return (found) ? pwm : NULL; +} +EXPORT_SYMBOL(pwm_request); + +void pwm_free(struct pwm_device *pwm) +{ + mutex_lock(&pwm_lock); + + if (pwm->use_count) { + pwm->use_count--; + pwm->label = NULL; + } else + dev_warn(pwm->dev, "PWM device already freed\n"); + + mutex_unlock(&pwm_lock); +} +EXPORT_SYMBOL(pwm_free); + +int pwm_int_enable(struct pwm_device *pwm) +{ + unsigned long conf; + + if (!pwm || !pwm->regs || !pwm->handler) + return -EINVAL; + + conf = readl(pwm->regs); + conf |= SM501PWM_I; + writel(conf, pwm->regs); + return 0; +} +EXPORT_SYMBOL(pwm_int_enable); + +int pwm_int_disable(struct pwm_device *pwm) +{ + unsigned long conf; + + if (!pwm || !pwm->regs || !pwm->handler) + return -EINVAL; + + conf = readl(pwm->regs); + conf &= ~SM501PWM_I; + writel(conf, pwm->regs); + return 0; +} +EXPORT_SYMBOL(pwm_int_disable); + +int pwm_set_handler(struct pwm_device *pwm, + void (*handler)(struct pwm_device *pwm)) +{ + if (!pwm || !handler) + return -EINVAL; + pwm->handler = handler; + return 0; +} +EXPORT_SYMBOL(pwm_set_handler); + +static irqreturn_t sm501pwm_irq(int irq, void *dev_id) +{ + unsigned long value; + struct sm501pwm_info *info = (struct sm501pwm_info *)dev_id; + struct pwm_device *pwm; + int i; + + value = sm501_modify_reg(info->dev->parent, SM501_IRQ_STATUS, 0, 0); + + /* Check is the interrupt is for us */ + if (value & (1<<22)) { + for (i = 0 ; i < PWM_COUNT ; i++) { + /* + * Find which pwm triggered the interrupt + * and ack + */ + value = readl(info->regs + i*4); + if (value & SM501PWM_IP) + writel(value | SM501PWM_IP, info->regs + i*4); + + pwm = &info->pwm[i]; + if (pwm->handler) + pwm->handler(pwm); + } + return IRQ_HANDLED; + } + + return IRQ_NONE; +} + +static void add_pwm(int id, struct sm501pwm_info *info) +{ + struct pwm_device *pwm = &info->pwm[id]; + + pwm->use_count = 0; + pwm->pwm_id = id; + pwm->dev = info->dev; + pwm->regs = info->regs + id * 4; + + mutex_lock(&pwm_lock); + list_add_tail(&pwm->node, &pwm_list); + mutex_unlock(&pwm_lock); +} + +static void del_pwm(int id, struct sm501pwm_info *info) +{ + struct pwm_device *pwm = &info->pwm[id]; + + pwm->use_count = 0; + pwm->pwm_id = -1; + mutex_lock(&pwm_lock); + list_del(&pwm->node); + mutex_unlock(&pwm_lock); +} + +/* Debug fs */ +static int sm501pwm_show(struct seq_file *s, void *p) +{ + struct pwm_device *pwm; + + mutex_lock(&pwm_lock); + list_for_each_entry(pwm, &pwm_list, node) { + if (pwm->use_count) { + seq_printf(s, "pwm-%d (%12s) %d %d %s\n", + pwm->pwm_id, pwm->label, + pwm->duty_ns, pwm->period_ns, + pwm->enabled ? "on" : "off"); + seq_printf(s, " %08x\n", readl(pwm->regs)); + } + } + mutex_unlock(&pwm_lock); + + return 0; +} + +static int sm501pwm_open(struct inode *inode, struct file *file) +{ + return single_open(file, sm501pwm_show, inode->i_private); +} + +static const struct file_operations sm501pwm_fops = { + .open = sm501pwm_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, + .owner = THIS_MODULE, +}; + +static int __init sm501pwm_probe(struct platform_device *pdev) +{ + struct sm501pwm_info *info; + struct device *dev = &pdev->dev; + struct resource *res; + int ret = 0; + int res_len; + int i; + + info = kzalloc(sizeof(struct sm501pwm_info), GFP_KERNEL); + if (!info) { + dev_err(dev, "Allocation failure\n"); + ret = -ENOMEM; + goto err; + } + info->dev = dev; + platform_set_drvdata(pdev, info); + + /* Get irq number */ + info->irq = platform_get_irq(pdev, 0); + if (!info->irq) { + dev_err(dev, "no irq found\n"); + ret = -ENODEV; + goto err_alloc; + } + + /* Get regs address */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (res == NULL) { + dev_err(dev, "No memory resource found\n"); + ret = -ENODEV; + goto err_alloc; + } + info->res = res; + res_len = (res->end - res->start)+1; + + if (!request_mem_region(res->start, res_len, drv_name)) { + dev_err(dev, "Can't request iomem resource\n"); + ret = -EBUSY; + goto err_alloc; + } + + info->regs = ioremap(res->start, res_len); + if (!info->regs) { + dev_err(dev, "ioremap failed\n"); + ret = -ENOMEM; + goto err_mem; + } + + ret = request_irq(info->irq, sm501pwm_irq, IRQF_SHARED, drv_name, info); + if (ret != 0) { + dev_err(dev, "can't get irq\n"); + goto err_map; + } + + + sm501_unit_power(info->dev->parent, SM501_GATE_GPIO, 1); + + for (i = 0; i < 3; i++) + add_pwm(i, info); + + dev_info(dev, "SM501 PWM Found at %lx irq %d\n", + (unsigned long)info->res->start, info->irq); + + info->debugfs = debugfs_create_file("pwm", S_IFREG | S_IRUGO, + NULL, info, &sm501pwm_fops); + + + return 0; + +err_map: + iounmap(info->regs); + +err_mem: + release_mem_region(res->start, res_len); + +err_alloc: + kfree(info); + platform_set_drvdata(pdev, NULL); +err: + return ret; +} + +static int sm501pwm_remove(struct platform_device *pdev) +{ + struct sm501pwm_info *info = platform_get_drvdata(pdev); + int i; + + if (info->debugfs) + debugfs_remove(info->debugfs); + + for (i = 0; i < 3; i++) { + pwm_disable(&info->pwm[i]); + del_pwm(i, info); + } + + sm501_unit_power(info->dev->parent, SM501_GATE_GPIO, 0); + sm501_modify_reg(info->dev->parent, SM501_IRQ_STATUS, 0, 1<<22); + + free_irq(info->irq, info); + iounmap(info->regs); + release_mem_region(info->res->start, + (info->res->end - info->res->start)+1); + kfree(info); + platform_set_drvdata(pdev, NULL); + + return 0; +} + +static struct platform_driver sm501pwm_driver = { + .probe = sm501pwm_probe, + .remove = sm501pwm_remove, + .driver = { + .name = drv_name, + .owner = THIS_MODULE, + }, +}; + +static int __devinit sm501pwm_init(void) +{ + return platform_driver_register(&sm501pwm_driver); +} + +static void __exit sm501pwm_cleanup(void) +{ + platform_driver_unregister(&sm501pwm_driver); +} + +module_init(sm501pwm_init); +module_exit(sm501pwm_cleanup); + +MODULE_AUTHOR("Arnaud Patard "); +MODULE_DESCRIPTION("SM501 PWM driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:sm501-pwm"); -- 1.5.6.5 From yajinzhou@vm-kernel.org Tue May 4 11:58:17 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 11:58:22 +0200 (CEST) Received: from mail-qy0-f192.google.com ([209.85.221.192]:46335 "EHLO mail-qy0-f192.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492378Ab0EDJzb (ORCPT ); Tue, 4 May 2010 11:55:31 +0200 Received: by mail-qy0-f192.google.com with SMTP id 30so5119707qyk.16 for ; Tue, 04 May 2010 02:55:31 -0700 (PDT) MIME-Version: 1.0 Received: by 10.224.99.210 with SMTP id v18mr4165631qan.87.1272966931111; Tue, 04 May 2010 02:55:31 -0700 (PDT) Received: by 10.229.212.206 with HTTP; Tue, 4 May 2010 02:55:31 -0700 (PDT) Date: Tue, 4 May 2010 17:55:31 +0800 Message-ID: Subject: [PATCH 8/12] gdium uses different freq of mclk&m1xclk of sm501 From: yajin To: linux-mips@linux-mips.org, loongson-dev , wuzhangjin@gmail.com, apatard@mandriva.com Cc: vince@simtec.co.uk, ben@simtec.co.uk Content-Type: text/plain; charset=UTF-8 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26565 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yajinzhou@vm-kernel.org Precedence: bulk X-list: linux-mips Gdium uses different freq of mclk&m1xclk of sm501. This seems a dirty hack. Maybe we need a configuration option for changing the freq of these clocks. Signed-off-by: yajin --- drivers/mfd/sm501.c | 9 +++++++-- 1 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c index ce5dfce..5e55cbd 100644 --- a/drivers/mfd/sm501.c +++ b/drivers/mfd/sm501.c @@ -1606,10 +1606,15 @@ static struct sm501_initdata sm501_pci_initdata = { .devices = SM501_USE_ALL, /* Errata AB-3 says that 72MHz is the fastest available - * for 33MHZ PCI with proper bus-mastering operation */ - + * for 33MHZ PCI with proper bus-mastering operation + * For gdium, it works under 84&112M clock freq.*/ +#ifdef CONFIG_DEXXON_GDIUM + .mclk = 84 * MHZ, + .m1xclk = 112 * MHZ, +#else .mclk = 72 * MHZ, .m1xclk = 144 * MHZ, +#endif }; static struct sm501_platdata_fbsub sm501_pdata_fbsub = { -- 1.5.6.5 From yajinzhou@vm-kernel.org Tue May 4 11:58:41 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 11:58:47 +0200 (CEST) Received: from mail-qy0-f192.google.com ([209.85.221.192]:62054 "EHLO mail-qy0-f192.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492396Ab0EDJzf (ORCPT ); Tue, 4 May 2010 11:55:35 +0200 Received: by mail-qy0-f192.google.com with SMTP id 30so5119599qyk.16 for ; Tue, 04 May 2010 02:55:35 -0700 (PDT) MIME-Version: 1.0 Received: by 10.229.217.204 with SMTP id hn12mr1746110qcb.100.1272966935417; Tue, 04 May 2010 02:55:35 -0700 (PDT) Received: by 10.229.212.206 with HTTP; Tue, 4 May 2010 02:55:35 -0700 (PDT) Date: Tue, 4 May 2010 17:55:35 +0800 Message-ID: Subject: [PATCH 9/12] add video command line for gdium From: yajin To: linux-mips@linux-mips.org, loongson-dev , wuzhangjin@gmail.com, apatard@mandriva.com Content-Type: text/plain; charset=UTF-8 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26566 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yajinzhou@vm-kernel.org Precedence: bulk X-list: linux-mips Gdium uses 1024x600 resolution. We need to pass an option to sm501 fb driver. Signed-off-by: yajin --- arch/mips/loongson/common/cmdline.c | 11 +++++++++++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/mips/loongson/common/cmdline.c b/arch/mips/loongson/common/cmdline.c index 1a06def..0c33f9f 100644 --- a/arch/mips/loongson/common/cmdline.c +++ b/arch/mips/loongson/common/cmdline.c @@ -50,4 +50,15 @@ void __init prom_init_cmdline(void) strcat(arcs_cmdline, " root=/dev/hda1"); prom_init_machtype(); + + /* append machine specific command line */ + switch (mips_machtype) { + case MACH_DEXXON_GDIUM2F10: + /* gdium has a 1024x600 screen */ + if ((strstr(arcs_cmdline, "video=")) == NULL) + strcat(arcs_cmdline, " video=sm501fb:1024x600@60"); + break; + default: + break; + } } -- 1.5.6.5 From yajinzhou@vm-kernel.org Tue May 4 11:59:06 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 11:59:12 +0200 (CEST) Received: from mail-qy0-f192.google.com ([209.85.221.192]:46335 "EHLO mail-qy0-f192.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492421Ab0EDJzk (ORCPT ); Tue, 4 May 2010 11:55:40 +0200 Received: by mail-qy0-f192.google.com with SMTP id 30so5119707qyk.16 for ; Tue, 04 May 2010 02:55:39 -0700 (PDT) MIME-Version: 1.0 Received: by 10.229.232.137 with SMTP id ju9mr2773326qcb.54.1272966939729; Tue, 04 May 2010 02:55:39 -0700 (PDT) Received: by 10.229.212.206 with HTTP; Tue, 4 May 2010 02:55:39 -0700 (PDT) Date: Tue, 4 May 2010 17:55:39 +0800 Message-ID: Subject: [PATCH 10/12] add the sm501fb option to sm501 fb driver From: yajin To: linux-mips@linux-mips.org, loongson-dev , wuzhangjin@gmail.com, apatard@mandriva.com, vince@simtec.co.uk, ben@simtec.co.uk Content-Type: text/plain; charset=UTF-8 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26567 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yajinzhou@vm-kernel.org Precedence: bulk X-list: linux-mips Currently the sm501 mode can only be fetched from modedb.c. Unfortunately the modes in modedb.c are not complete. For example it lacks the resolution of 1024x600. So the sm501 fb driver should have the ability to accept the mode option from linux command line. Signed-off-by: yajin --- drivers/video/sm501fb.c | 67 +++++++++++++++++++++++++++++++++++++++++++++- 1 files changed, 65 insertions(+), 2 deletions(-) diff --git a/drivers/video/sm501fb.c b/drivers/video/sm501fb.c index b7dc180..f2c69ca 100644 --- a/drivers/video/sm501fb.c +++ b/drivers/video/sm501fb.c @@ -43,6 +43,37 @@ #define NR_PALETTE 256 +static char *mode_option; +module_param_named(mode, mode_option, charp, 0); +MODULE_PARM_DESC(mode, "Initial mode"); + +/* + * SM501 Mode + * 1024X600 is not defined in default mode(modedb.c). + */ +static const struct fb_videomode sm501_modedb[] __initdata = { + { + /* 1024x600-60 */ + NULL, 60, 1024, 600, 20423, 144, 40, 18, 1, 104, 3, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED + }, + { + /* 1024x600-70 */ + NULL, 70, 1024, 600, 17211, 152, 48, 21, 1, 104, 3, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED + }, + { + /* 1024x600-75 */ + NULL, 75, 1024, 600, 15822, 160, 56, 23, 1, 104, 3, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED + }, + { + /* 1024x600-85 */ + NULL, 85, 1024, 600, 13730, 168, 56, 26, 1, 112, 3, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED + } +}; + enum sm501_controller { HEAD_CRT = 0, HEAD_PANEL = 1, @@ -1729,8 +1760,16 @@ static int sm501fb_init_fb(struct fb_info *fb, fb->var.xres_virtual = fb->var.xres; fb->var.yres_virtual = fb->var.yres; } else { - ret = fb_find_mode(&fb->var, fb, - NULL, NULL, 0, NULL, 8); + if (mode_option) { + dev_info(info->dev, "using user defined mode:" + " %s\n", mode_option); + ret = fb_find_mode(&fb->var, fb, + mode_option, sm501_modedb, + ARRAY_SIZE(sm501_modedb), + NULL, fb->var.bits_per_pixel); + } else + ret = fb_find_mode(&fb->var, fb, + NULL, NULL, 0, NULL, 8); if (ret == 0 || ret == 4) { dev_err(info->dev, @@ -2136,8 +2175,32 @@ static struct platform_driver sm501fb_driver = { }, }; +#ifndef MODULE +static int __devinit sm501fb_setup(char *options) +{ + char *this_opt; + + if (!options || !*options) + return 0; + + while ((this_opt = strsep(&options, ",")) != NULL) { + if (!*this_opt) + continue; + mode_option = this_opt; + } + return 0; +} +#endif + static int __devinit sm501fb_init(void) { +#ifndef MODULE + char *option = NULL; + + if (fb_get_options("sm501fb", &option)) + return -ENODEV; + sm501fb_setup(option); +#endif return platform_driver_register(&sm501fb_driver); } -- 1.5.6.5 From yajinzhou@vm-kernel.org Tue May 4 11:59:31 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 11:59:37 +0200 (CEST) Received: from mail-qy0-f192.google.com ([209.85.221.192]:62054 "EHLO mail-qy0-f192.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492424Ab0EDJzo (ORCPT ); Tue, 4 May 2010 11:55:44 +0200 Received: by mail-qy0-f192.google.com with SMTP id 30so5119599qyk.16 for ; Tue, 04 May 2010 02:55:44 -0700 (PDT) MIME-Version: 1.0 Received: by 10.224.45.29 with SMTP id c29mr4141995qaf.92.1272966943963; Tue, 04 May 2010 02:55:43 -0700 (PDT) Received: by 10.229.212.206 with HTTP; Tue, 4 May 2010 02:55:43 -0700 (PDT) Date: Tue, 4 May 2010 17:55:43 +0800 Message-ID: Subject: [PATCH 11/12] start the panel which is enabled earlier than other panel. From: yajin To: linux-mips@linux-mips.org, loongson-dev , wuzhangjin@gmail.com, apatard@mandriva.com, vince@simtec.co.uk, ben@simtec.co.uk Content-Type: text/plain; charset=UTF-8 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26568 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yajinzhou@vm-kernel.org Precedence: bulk X-list: linux-mips SM501 has two panels, one is LCD panel and the other is CRT panel. We need to start the panel which is enabled earlier than the other panel. Signed-off-by: yajin --- drivers/video/sm501fb.c | 42 +++++++++++++++++++++++++++++------------- 1 files changed, 29 insertions(+), 13 deletions(-) diff --git a/drivers/video/sm501fb.c b/drivers/video/sm501fb.c index f2c69ca..c3b717b 100644 --- a/drivers/video/sm501fb.c +++ b/drivers/video/sm501fb.c @@ -1895,7 +1895,11 @@ static int __devinit sm501fb_probe(struct platform_device *pdev) { struct sm501fb_info *info; struct device *dev = &pdev->dev; + unsigned int panel_enabled, head[2]; + char *driver_name[2]; + unsigned long ctrl; int ret; + int i; /* allocate our framebuffers */ @@ -1946,23 +1950,37 @@ static int __devinit sm501fb_probe(struct platform_device *pdev) goto err_probed_panel; } - ret = sm501fb_start_one(info, HEAD_CRT, driver_name_crt); - if (ret) { - dev_err(dev, "failed to start CRT\n"); - goto err_started; + ctrl = readl(info->regs + SM501_DC_PANEL_CONTROL); + panel_enabled = (ctrl & SM501_DC_PANEL_CONTROL_EN) ? 1 : 0; + if (panel_enabled) { + head[0] = HEAD_PANEL; + driver_name[0] = driver_name_pnl; + head[1] = HEAD_CRT; + driver_name[1] = driver_name_crt; + } else { + head[0] = HEAD_CRT; + driver_name[0] = driver_name_crt; + head[1] = HEAD_PANEL; + driver_name[1] = driver_name_pnl; } - ret = sm501fb_start_one(info, HEAD_PANEL, driver_name_pnl); - if (ret) { - dev_err(dev, "failed to start Panel\n"); - goto err_started_crt; + for (i = 0; i < ARRAY_SIZE(head); i++) { + ret = sm501fb_start_one(info, head[i], driver_name[i]); + if (ret) { + dev_err(dev, "failed to start %s\n", driver_name[i]); + if (i == 1) { + unregister_framebuffer(info->fb[head[0]]); + sm501_free_init_fb(info, head[0]); + } + goto err_start_one; + } } /* create device files */ ret = device_create_file(dev, &dev_attr_crt_src); if (ret) - goto err_started_panel; + goto err_started; ret = device_create_file(dev, &dev_attr_fbregs_pnl); if (ret) @@ -1981,15 +1999,13 @@ err_attached_pnlregs_file: err_attached_crtsrc_file: device_remove_file(dev, &dev_attr_crt_src); -err_started_panel: +err_started: unregister_framebuffer(info->fb[HEAD_PANEL]); sm501_free_init_fb(info, HEAD_PANEL); - -err_started_crt: unregister_framebuffer(info->fb[HEAD_CRT]); sm501_free_init_fb(info, HEAD_CRT); -err_started: +err_start_one: sm501fb_stop(info); err_probed_panel: -- 1.5.6.5 From yajinzhou@vm-kernel.org Tue May 4 11:59:56 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 12:00:05 +0200 (CEST) Received: from mail-qy0-f192.google.com ([209.85.221.192]:46335 "EHLO mail-qy0-f192.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492398Ab0EDJzy (ORCPT ); Tue, 4 May 2010 11:55:54 +0200 Received: by mail-qy0-f192.google.com with SMTP id 30so5119707qyk.16 for ; Tue, 04 May 2010 02:55:54 -0700 (PDT) MIME-Version: 1.0 Received: by 10.229.181.203 with SMTP id bz11mr2796019qcb.94.1272966953845; Tue, 04 May 2010 02:55:53 -0700 (PDT) Received: by 10.229.212.206 with HTTP; Tue, 4 May 2010 02:55:53 -0700 (PDT) Date: Tue, 4 May 2010 17:55:53 +0800 Message-ID: Subject: [PATCH 12/12] add gdium default config file From: yajin To: linux-mips@linux-mips.org, loongson-dev , wuzhangjin@gmail.com Content-Type: text/plain; charset=UTF-8 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26569 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yajinzhou@vm-kernel.org Precedence: bulk X-list: linux-mips add gdium default config file. Signed-off-by: yajin --- arch/mips/configs/gdium_defconfig | 2534 +++++++++++++++++++++++++++++++++++++ 1 files changed, 2534 insertions(+), 0 deletions(-) create mode 100644 arch/mips/configs/gdium_defconfig diff --git a/arch/mips/configs/gdium_defconfig b/arch/mips/configs/gdium_defconfig new file mode 100644 index 0000000..225431f --- /dev/null +++ b/arch/mips/configs/gdium_defconfig @@ -0,0 +1,2534 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.34-rc6 +# Tue May 4 16:53:41 2010 +# +CONFIG_MIPS=y + +# +# Machine selection +# +# CONFIG_MACH_ALCHEMY is not set +# CONFIG_AR7 is not set +# CONFIG_BCM47XX is not set +# CONFIG_BCM63XX is not set +# CONFIG_MIPS_COBALT is not set +# CONFIG_MACH_DECSTATION is not set +# CONFIG_MACH_JAZZ is not set +# CONFIG_LASAT is not set +CONFIG_MACH_LOONGSON=y +# CONFIG_MIPS_MALTA is not set +# CONFIG_MIPS_SIM is not set +# CONFIG_NEC_MARKEINS is not set +# CONFIG_MACH_VR41XX is not set +# CONFIG_NXP_STB220 is not set +# CONFIG_NXP_STB225 is not set +# CONFIG_PNX8550_JBS is not set +# CONFIG_PNX8550_STB810 is not set +# CONFIG_PMC_MSP is not set +# CONFIG_PMC_YOSEMITE is not set +# CONFIG_POWERTV is not set +# CONFIG_SGI_IP22 is not set +# CONFIG_SGI_IP27 is not set +# CONFIG_SGI_IP28 is not set +# CONFIG_SGI_IP32 is not set +# CONFIG_SIBYTE_CRHINE is not set +# CONFIG_SIBYTE_CARMEL is not set +# CONFIG_SIBYTE_CRHONE is not set +# CONFIG_SIBYTE_RHONE is not set +# CONFIG_SIBYTE_SWARM is not set +# CONFIG_SIBYTE_LITTLESUR is not set +# CONFIG_SIBYTE_SENTOSA is not set +# CONFIG_SIBYTE_BIGSUR is not set +# CONFIG_SNI_RM is not set +# CONFIG_MACH_TX39XX is not set +# CONFIG_MACH_TX49XX is not set +# CONFIG_MIKROTIK_RB532 is not set +# CONFIG_WR_PPMC is not set +# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set +# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set +# CONFIG_ALCHEMY_GPIO_INDIRECT is not set +CONFIG_ARCH_SPARSEMEM_ENABLE=y +# CONFIG_LEMOTE_FULOONG2E is not set +# CONFIG_LEMOTE_MACH2F is not set +CONFIG_DEXXON_GDIUM=y +CONFIG_HAVE_PWM=y +CONFIG_LOONGSON_UART_BASE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_ARCH_SUPPORTS_OPROFILE=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_SCHED_OMIT_FRAME_POINTER=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_CEVT_R4K_LIB=y +CONFIG_CEVT_R4K=y +CONFIG_CSRC_R4K_LIB=y +CONFIG_CSRC_R4K=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_I8259=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_ISA_DMA=y +CONFIG_GENERIC_ISA_DMA_SUPPORT_BROKEN=y +CONFIG_GENERIC_GPIO=y +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_IRQ_CPU=y +CONFIG_BOOT_ELF32=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 + +# +# CPU selection +# +# CONFIG_CPU_LOONGSON2E is not set +CONFIG_CPU_LOONGSON2F=y +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS32_R2 is not set +# CONFIG_CPU_MIPS64_R1 is not set +# CONFIG_CPU_MIPS64_R2 is not set +# CONFIG_CPU_R3000 is not set +# CONFIG_CPU_TX39XX is not set +# CONFIG_CPU_VR41XX is not set +# CONFIG_CPU_R4300 is not set +# CONFIG_CPU_R4X00 is not set +# CONFIG_CPU_TX49XX is not set +# CONFIG_CPU_R5000 is not set +# CONFIG_CPU_R5432 is not set +# CONFIG_CPU_R5500 is not set +# CONFIG_CPU_R6000 is not set +# CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R8000 is not set +# CONFIG_CPU_R10000 is not set +# CONFIG_CPU_RM7000 is not set +# CONFIG_CPU_RM9000 is not set +# CONFIG_CPU_SB1 is not set +# CONFIG_CPU_CAVIUM_OCTEON is not set +# CONFIG_CPU_LOONGSON2F_WORKAROUNDS is not set +CONFIG_SYS_SUPPORTS_ZBOOT=y +CONFIG_CPU_LOONGSON2=y +CONFIG_SYS_HAS_CPU_LOONGSON2F=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_CPUFREQ=y +CONFIG_CPU_SUPPORTS_ADDRWINCFG=y +CONFIG_CPU_SUPPORTS_UNCACHED_ACCELERATED=y + +# +# Kernel type +# +# CONFIG_32BIT is not set +CONFIG_64BIT=y +# CONFIG_PAGE_SIZE_4KB is not set +# CONFIG_PAGE_SIZE_8KB is not set +CONFIG_PAGE_SIZE_16KB=y +# CONFIG_PAGE_SIZE_32KB is not set +# CONFIG_PAGE_SIZE_64KB is not set +CONFIG_BOARD_SCACHE=y +CONFIG_MIPS_MT_DISABLED=y +# CONFIG_MIPS_MT_SMP is not set +# CONFIG_MIPS_MT_SMTC is not set +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set +CONFIG_CPU_HAS_WB=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_SYS_SUPPORTS_HIGHMEM=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +# CONFIG_DISCONTIGMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_SPARSEMEM_STATIC=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_VIRT_TO_BUS=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_HZ_48 is not set +# CONFIG_HZ_100 is not set +# CONFIG_HZ_128 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_256 is not set +# CONFIG_HZ_1000 is not set +# CONFIG_HZ_1024 is not set +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_HZ=250 +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_KEXEC=y +# CONFIG_SECCOMP is not set +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_BZIP2=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_BZIP2 is not set +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_LZO is not set +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +# CONFIG_TASKSTATS is not set +CONFIG_AUDIT=y + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_TREE_PREEMPT_RCU is not set +# CONFIG_TINY_RCU is not set +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_FANOUT=64 +# CONFIG_RCU_FANOUT_EXACT is not set +# CONFIG_TREE_RCU_TRACE is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=15 +# CONFIG_CGROUPS is not set +# CONFIG_SYSFS_DEPRECATED_V2 is not set +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +# CONFIG_RD_LZO is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_EMBEDDED=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_PCSPKR_PLATFORM=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y + +# +# Kernel Performance Events And Counters +# +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_PCI_QUIRKS=y +# CONFIG_SLUB_DEBUG is not set +CONFIG_COMPAT_BRK=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +CONFIG_OPROFILE=m +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_SYSCALL_WRAPPERS=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_SLOW_WORK=y +# CONFIG_SLOW_WORK_DEBUG is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_BLOCK=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_BLOCK_COMPAT=y + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_DEADLINE=m +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +# CONFIG_INLINE_SPIN_TRYLOCK is not set +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK is not set +# CONFIG_INLINE_SPIN_LOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set +# CONFIG_INLINE_SPIN_UNLOCK is not set +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set +# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_READ_TRYLOCK is not set +# CONFIG_INLINE_READ_LOCK is not set +# CONFIG_INLINE_READ_LOCK_BH is not set +# CONFIG_INLINE_READ_LOCK_IRQ is not set +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set +# CONFIG_INLINE_READ_UNLOCK is not set +# CONFIG_INLINE_READ_UNLOCK_BH is not set +# CONFIG_INLINE_READ_UNLOCK_IRQ is not set +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_WRITE_TRYLOCK is not set +# CONFIG_INLINE_WRITE_LOCK is not set +# CONFIG_INLINE_WRITE_LOCK_BH is not set +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set +# CONFIG_INLINE_WRITE_UNLOCK is not set +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set +# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set +# CONFIG_MUTEX_SPIN_ON_OWNER is not set +# CONFIG_FREEZER is not set + +# +# Bus options (PCI, PCMCIA, EISA, ISA, TC) +# +CONFIG_HW_HAS_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_IOV is not set +CONFIG_ISA=y +CONFIG_MMU=y +# CONFIG_PCCARD is not set +# CONFIG_HOTPLUG_PCI is not set + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +# CONFIG_HAVE_AOUT is not set +CONFIG_BINFMT_MISC=m +CONFIG_MIPS32_COMPAT=y +CONFIG_COMPAT=y +CONFIG_SYSVIPC_COMPAT=y +CONFIG_MIPS32_O32=y +CONFIG_MIPS32_N32=y +CONFIG_BINFMT_ELF32=y + +# +# Power management options +# +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# CONFIG_PM is not set +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM=y +CONFIG_XFRM_USER=m +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_NET_KEY=m +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_ASK_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +CONFIG_NET_IPIP=m +CONFIG_NET_IPGRE=m +# CONFIG_NET_IPGRE_BROADCAST is not set +CONFIG_IP_MROUTE=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +CONFIG_ARPD=y +CONFIG_SYN_COOKIES=y +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_TRANSPORT=m +CONFIG_INET_XFRM_MODE_TUNNEL=m +CONFIG_INET_XFRM_MODE_BEET=m +CONFIG_INET_LRO=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +CONFIG_TCP_CONG_ADVANCED=y +CONFIG_TCP_CONG_BIC=y +CONFIG_TCP_CONG_CUBIC=y +CONFIG_TCP_CONG_WESTWOOD=m +CONFIG_TCP_CONG_HTCP=m +# CONFIG_TCP_CONG_HSTCP is not set +# CONFIG_TCP_CONG_HYBLA is not set +# CONFIG_TCP_CONG_VEGAS is not set +# CONFIG_TCP_CONG_SCALABLE is not set +# CONFIG_TCP_CONG_LP is not set +# CONFIG_TCP_CONG_VENO is not set +# CONFIG_TCP_CONG_YEAH is not set +# CONFIG_TCP_CONG_ILLINOIS is not set +CONFIG_DEFAULT_BIC=y +# CONFIG_DEFAULT_CUBIC is not set +# CONFIG_DEFAULT_HTCP is not set +# CONFIG_DEFAULT_VEGAS is not set +# CONFIG_DEFAULT_WESTWOOD is not set +# CONFIG_DEFAULT_RENO is not set +CONFIG_DEFAULT_TCP_CONG="bic" +CONFIG_TCP_MD5SIG=y +CONFIG_IPV6=m +CONFIG_IPV6_PRIVACY=y +CONFIG_IPV6_ROUTER_PREF=y +# CONFIG_IPV6_ROUTE_INFO is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +CONFIG_INET6_TUNNEL=m +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=m +# CONFIG_IPV6_SIT_6RD is not set +CONFIG_IPV6_NDISC_NODETYPE=y +CONFIG_IPV6_TUNNEL=m +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +# CONFIG_IPV6_MROUTE is not set +CONFIG_NETWORK_SECMARK=y +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=y + +# +# Core Netfilter Configuration +# +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NF_CONNTRACK is not set +# CONFIG_NETFILTER_XTABLES is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +# CONFIG_NF_DEFRAG_IPV4 is not set +# CONFIG_IP_NF_QUEUE is not set +# CONFIG_IP_NF_IPTABLES is not set +# CONFIG_IP_NF_ARPTABLES is not set + +# +# IPv6: Netfilter Configuration +# +# CONFIG_IP6_NF_QUEUE is not set +# CONFIG_IP6_NF_IPTABLES is not set +# CONFIG_BRIDGE_NF_EBTABLES is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +CONFIG_STP=m +CONFIG_BRIDGE=m +CONFIG_BRIDGE_IGMP_SNOOPING=y +# CONFIG_NET_DSA is not set +CONFIG_VLAN_8021Q=m +# CONFIG_VLAN_8021Q_GVRP is not set +# CONFIG_DECNET is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +CONFIG_IPX=m +# CONFIG_IPX_INTERN is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +# CONFIG_NET_SCH_CBQ is not set +# CONFIG_NET_SCH_HTB is not set +# CONFIG_NET_SCH_HFSC is not set +# CONFIG_NET_SCH_PRIO is not set +# CONFIG_NET_SCH_MULTIQ is not set +# CONFIG_NET_SCH_RED is not set +# CONFIG_NET_SCH_SFQ is not set +# CONFIG_NET_SCH_TEQL is not set +# CONFIG_NET_SCH_TBF is not set +# CONFIG_NET_SCH_GRED is not set +# CONFIG_NET_SCH_DSMARK is not set +# CONFIG_NET_SCH_NETEM is not set +# CONFIG_NET_SCH_DRR is not set +# CONFIG_NET_SCH_INGRESS is not set + +# +# Classification +# +CONFIG_NET_CLS=y +# CONFIG_NET_CLS_BASIC is not set +# CONFIG_NET_CLS_TCINDEX is not set +# CONFIG_NET_CLS_ROUTE4 is not set +# CONFIG_NET_CLS_FW is not set +# CONFIG_NET_CLS_U32 is not set +# CONFIG_NET_CLS_RSVP is not set +# CONFIG_NET_CLS_RSVP6 is not set +# CONFIG_NET_CLS_FLOW is not set +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_STACK=32 +# CONFIG_NET_EMATCH_CMP is not set +# CONFIG_NET_EMATCH_NBYTE is not set +# CONFIG_NET_EMATCH_U32 is not set +# CONFIG_NET_EMATCH_META is not set +# CONFIG_NET_EMATCH_TEXT is not set +CONFIG_NET_CLS_ACT=y +# CONFIG_NET_ACT_POLICE is not set +# CONFIG_NET_ACT_GACT is not set +# CONFIG_NET_ACT_MIRRED is not set +# CONFIG_NET_ACT_NAT is not set +# CONFIG_NET_ACT_PEDIT is not set +# CONFIG_NET_ACT_SIMP is not set +# CONFIG_NET_ACT_SKBEDIT is not set +CONFIG_NET_SCH_FIFO=y +# CONFIG_DCB is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +CONFIG_BT=m +CONFIG_BT_L2CAP=m +CONFIG_BT_SCO=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m + +# +# Bluetooth device drivers +# +CONFIG_BT_HCIBTUSB=m +# CONFIG_BT_HCIBTSDIO is not set +# CONFIG_BT_HCIUART is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +CONFIG_BT_HCIBFUSB=m +CONFIG_BT_HCIVHCI=m +# CONFIG_BT_MRVL is not set +# CONFIG_BT_ATH3K is not set +# CONFIG_AF_RXRPC is not set +CONFIG_FIB_RULES=y +CONFIG_WIRELESS=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_CFG80211=m +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_REG_DEBUG is not set +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +# CONFIG_CFG80211_INTERNAL_REGDB is not set +CONFIG_CFG80211_WEXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +CONFIG_LIB80211=m +CONFIG_LIB80211_DEBUG=y +CONFIG_MAC80211=m +# CONFIG_MAC80211_RC_PID is not set +CONFIG_MAC80211_RC_MINSTREL=y +# CONFIG_MAC80211_RC_DEFAULT_PID is not set +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel" +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +# CONFIG_WIMAX is not set +CONFIG_RFKILL=m +CONFIG_RFKILL_LEDS=y +CONFIG_RFKILL_INPUT=y +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +# CONFIG_DEVTMPFS is not set +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_CONNECTOR=m +# CONFIG_MTD is not set +# CONFIG_PARPORT is not set +# CONFIG_PNP is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_CRYPTOLOOP=m +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=8192 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_BLK_DEV_HD is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_EEPROM_93CX6=m +CONFIG_HAVE_IDE=y +CONFIG_IDE=y + +# +# Please see Documentation/ide/ide.txt for help/info on IDE drives +# +CONFIG_IDE_XFER_MODE=y +CONFIG_IDE_TIMINGS=y +# CONFIG_BLK_DEV_IDE_SATA is not set +CONFIG_IDE_GD=y +CONFIG_IDE_GD_ATA=y +# CONFIG_IDE_GD_ATAPI is not set +# CONFIG_BLK_DEV_IDECD is not set +# CONFIG_BLK_DEV_IDETAPE is not set +CONFIG_IDE_TASK_IOCTL=y +CONFIG_IDE_PROC_FS=y + +# +# IDE chipset support/bugfixes +# +# CONFIG_IDE_GENERIC is not set +# CONFIG_BLK_DEV_PLATFORM is not set +CONFIG_BLK_DEV_IDEDMA_SFF=y + +# +# PCI IDE chipsets support +# +CONFIG_BLK_DEV_IDEPCI=y +# CONFIG_IDEPCI_PCIBUS_ORDER is not set +# CONFIG_BLK_DEV_GENERIC is not set +# CONFIG_BLK_DEV_OPTI621 is not set +CONFIG_BLK_DEV_IDEDMA_PCI=y +# CONFIG_BLK_DEV_AEC62XX is not set +# CONFIG_BLK_DEV_ALI15X3 is not set +CONFIG_BLK_DEV_AMD74XX=y +# CONFIG_BLK_DEV_CMD64X is not set +# CONFIG_BLK_DEV_TRIFLEX is not set +# CONFIG_BLK_DEV_CS5520 is not set +# CONFIG_BLK_DEV_CS5530 is not set +# CONFIG_BLK_DEV_HPT366 is not set +# CONFIG_BLK_DEV_JMICRON is not set +# CONFIG_BLK_DEV_SC1200 is not set +# CONFIG_BLK_DEV_PIIX is not set +# CONFIG_BLK_DEV_IT8172 is not set +# CONFIG_BLK_DEV_IT8213 is not set +# CONFIG_BLK_DEV_IT821X is not set +# CONFIG_BLK_DEV_NS87415 is not set +# CONFIG_BLK_DEV_PDC202XX_OLD is not set +# CONFIG_BLK_DEV_PDC202XX_NEW is not set +# CONFIG_BLK_DEV_SVWKS is not set +# CONFIG_BLK_DEV_SIIMAGE is not set +# CONFIG_BLK_DEV_SLC90E66 is not set +# CONFIG_BLK_DEV_TRM290 is not set +# CONFIG_BLK_DEV_VIA82CXXX is not set +# CONFIG_BLK_DEV_TC86C001 is not set + +# +# Other IDE chipsets support +# + +# +# Note: most of these also require special kernel boot parameters +# +# CONFIG_BLK_DEV_4DRIVES is not set +# CONFIG_BLK_DEV_ALI14XX is not set +# CONFIG_BLK_DEV_DTC2278 is not set +# CONFIG_BLK_DEV_HT6560B is not set +# CONFIG_BLK_DEV_QD65XX is not set +# CONFIG_BLK_DEV_UMC8672 is not set +CONFIG_BLK_DEV_IDEDMA=y + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +CONFIG_SCSI_TGT=y +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=m +CONFIG_BLK_DEV_SR_VENDOR=y +CONFIG_CHR_DEV_SG=y +# CONFIG_CHR_DEV_SCH is not set +CONFIG_SCSI_MULTI_LUN=y +CONFIG_SCSI_CONSTANTS=y +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +CONFIG_SCSI_ISCSI_ATTRS=m +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +CONFIG_ISCSI_TCP=m +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_IN2000 is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_LIBFC is not set +# CONFIG_LIBFCOE is not set +# CONFIG_FCOE is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_DTC3280 is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_GENERIC_NCR5380 is not set +# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_NCR53C406A is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_PAS16 is not set +# CONFIG_SCSI_QLOGIC_FAS is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_FC is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_SYM53C416 is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_T128 is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_SRP is not set +# CONFIG_SCSI_BFA_FC is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +# CONFIG_ATA is not set +CONFIG_MD=y +CONFIG_BLK_DEV_MD=m +CONFIG_MD_LINEAR=m +CONFIG_MD_RAID0=m +CONFIG_MD_RAID1=m +CONFIG_MD_RAID10=m +CONFIG_MD_RAID456=m +CONFIG_MD_RAID6_PQ=m +# CONFIG_ASYNC_RAID6_TEST is not set +CONFIG_MD_MULTIPATH=m +CONFIG_MD_FAULTY=m +CONFIG_BLK_DEV_DM=m +CONFIG_DM_DEBUG=y +CONFIG_DM_CRYPT=m +CONFIG_DM_SNAPSHOT=m +CONFIG_DM_MIRROR=m +CONFIG_DM_LOG_USERSPACE=m +CONFIG_DM_ZERO=m +CONFIG_DM_MULTIPATH=m +CONFIG_DM_MULTIPATH_QL=m +CONFIG_DM_MULTIPATH_ST=m +CONFIG_DM_DELAY=m +CONFIG_DM_UEVENT=y +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# You can enable one or both FireWire driver stacks. +# + +# +# The newer stack is recommended. +# +# CONFIG_FIREWIRE is not set +# CONFIG_IEEE1394 is not set +# CONFIG_I2O is not set +CONFIG_NETDEVICES=y +# CONFIG_IFB is not set +CONFIG_DUMMY=m +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +CONFIG_TUN=m +CONFIG_VETH=m +# CONFIG_ARCNET is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_SMC is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_ETHOC is not set +# CONFIG_SMSC911X is not set +# CONFIG_NET_VENDOR_RACAL is not set +# CONFIG_DNET is not set +# CONFIG_NET_TULIP is not set +# CONFIG_AT1700 is not set +# CONFIG_DEPCA is not set +# CONFIG_HP100 is not set +# CONFIG_NET_ISA is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +CONFIG_NET_PCI=y +# CONFIG_PCNET32 is not set +# CONFIG_AMD8111_ETH is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_AC3200 is not set +# CONFIG_KSZ884X_PCI is not set +# CONFIG_APRICOT is not set +# CONFIG_B44 is not set +# CONFIG_FORCEDETH is not set +# CONFIG_CS89x0 is not set +# CONFIG_TC35815 is not set +# CONFIG_E100 is not set +# CONFIG_FEALNX is not set +# CONFIG_NATSEMI is not set +# CONFIG_NE2K_PCI is not set +# CONFIG_8139CP is not set +CONFIG_8139TOO=y +# CONFIG_8139TOO_PIO is not set +# CONFIG_8139TOO_TUNE_TWISTER is not set +# CONFIG_8139TOO_8129 is not set +# CONFIG_8139_OLD_RX_RESET is not set +# CONFIG_R6040 is not set +# CONFIG_SIS900 is not set +# CONFIG_EPIC100 is not set +# CONFIG_SMSC9420 is not set +# CONFIG_SUNDANCE is not set +# CONFIG_TLAN is not set +# CONFIG_KS8842 is not set +# CONFIG_KS8851_MLL is not set +# CONFIG_VIA_RHINE is not set +# CONFIG_SC92031 is not set +# CONFIG_ATL2 is not set +CONFIG_NETDEV_1000=y +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_E1000E is not set +# CONFIG_IP1000 is not set +# CONFIG_IGB is not set +# CONFIG_IGBVF is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +CONFIG_R8169=m +CONFIG_R8169_VLAN=y +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_VIA_VELOCITY is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +# CONFIG_CNIC is not set +# CONFIG_QLA3XXX is not set +# CONFIG_ATL1 is not set +# CONFIG_ATL1E is not set +# CONFIG_ATL1C is not set +# CONFIG_JME is not set +# CONFIG_NETDEV_10000 is not set +# CONFIG_TR is not set +CONFIG_WLAN=y +# CONFIG_LIBERTAS_THINFIRM is not set +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +# CONFIG_PRISM54 is not set +# CONFIG_USB_ZD1201 is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +# CONFIG_ADM8211 is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_MWL8K is not set +CONFIG_ATH_COMMON=m +# CONFIG_ATH_DEBUG is not set +CONFIG_ATH5K=m +CONFIG_ATH5K_DEBUG=y +CONFIG_ATH9K_HW=m +CONFIG_ATH9K_COMMON=m +CONFIG_ATH9K=m +CONFIG_ATH9K_DEBUGFS=y +CONFIG_AR9170_USB=m +CONFIG_AR9170_LEDS=y +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +# CONFIG_HOSTAP is not set +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWLWIFI is not set +# CONFIG_IWM is not set +# CONFIG_LIBERTAS is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +CONFIG_RT2X00=m +CONFIG_RT2400PCI=m +CONFIG_RT2500PCI=m +CONFIG_RT61PCI=m +CONFIG_RT2800PCI_PCI=y +CONFIG_RT2800PCI=m +CONFIG_RT2800PCI_RT30XX=y +CONFIG_RT2800PCI_RT35XX=y +CONFIG_RT2500USB=m +CONFIG_RT73USB=m +CONFIG_RT2800USB=m +CONFIG_RT2800USB_RT30XX=y +CONFIG_RT2800USB_RT35XX=y +CONFIG_RT2800USB_UNKNOWN=y +CONFIG_RT2800_LIB=m +CONFIG_RT2X00_LIB_PCI=m +CONFIG_RT2X00_LIB_USB=m +CONFIG_RT2X00_LIB=m +CONFIG_RT2X00_LIB_HT=y +CONFIG_RT2X00_LIB_FIRMWARE=y +CONFIG_RT2X00_LIB_CRYPTO=y +CONFIG_RT2X00_LIB_LEDS=y +CONFIG_RT2X00_DEBUG=y +CONFIG_WL12XX=m +CONFIG_WL1251=m +CONFIG_WL1251_SDIO=m +# CONFIG_ZD1211RW is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_CDCETHER=m +CONFIG_USB_NET_CDC_EEM=m +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=m +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +# CONFIG_USB_NET_RNDIS_HOST is not set +CONFIG_USB_NET_CDC_SUBSET=m +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +CONFIG_USB_SIERRA_NET=m +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NET_FC is not set +CONFIG_NETCONSOLE=m +CONFIG_NETCONSOLE_DYNAMIC=y +CONFIG_NETPOLL=y +# CONFIG_NETPOLL_TRAP is not set +CONFIG_NET_POLL_CONTROLLER=y +# CONFIG_VMXNET3 is not set +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_FF_MEMLESS=m +CONFIG_INPUT_POLLDEV=m +CONFIG_INPUT_SPARSEKMAP=m + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=m +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=m +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADP5588 is not set +CONFIG_KEYBOARD_ATKBD=m +# CONFIG_QT2160 is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=m +# CONFIG_MOUSE_PS2_ALPS is not set +# CONFIG_MOUSE_PS2_LOGIPS2PP is not set +CONFIG_MOUSE_PS2_SYNAPTICS=y +# CONFIG_MOUSE_PS2_TRACKPOINT is not set +# CONFIG_MOUSE_PS2_ELANTECH is not set +# CONFIG_MOUSE_PS2_SENTELIC is not set +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +# CONFIG_MOUSE_SERIAL is not set +CONFIG_MOUSE_APPLETOUCH=m +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_INPORT is not set +# CONFIG_MOUSE_LOGIBM is not set +# CONFIG_MOUSE_PC110PAD is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_I8042=y +# CONFIG_SERIO_SERPORT is not set +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +# CONFIG_SERIAL_8250_PCI is not set +CONFIG_SERIAL_8250_NR_UARTS=16 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_FOURPORT=y +# CONFIG_SERIAL_8250_ACCENT is not set +# CONFIG_SERIAL_8250_BOCA is not set +# CONFIG_SERIAL_8250_EXAR_ST16C554 is not set +# CONFIG_SERIAL_8250_HUB6 is not set +# CONFIG_SERIAL_8250_SHARE_IRQ is not set +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_RSA is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_TIMBERDALE is not set +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=m + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +CONFIG_I2C_GPIO=m +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_ELEKTOR is not set +# CONFIG_I2C_PCA_ISA is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_SPI is not set + +# +# PPS support +# +# CONFIG_PPS is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# +# CONFIG_GPIO_IT8761E is not set +# CONFIG_GPIO_SCH is not set + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_ADP5588 is not set + +# +# PCI GPIO expanders: +# +# CONFIG_GPIO_CS5535 is not set +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_LANGWELL is not set + +# +# SPI GPIO expanders: +# + +# +# AC97 GPIO expanders: +# +# CONFIG_W1 is not set +CONFIG_POWER_SUPPLY=m +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_BATTERY_DS2760 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_BQ27x00 is not set +# CONFIG_BATTERY_MAX17040 is not set +CONFIG_HWMON=m +# CONFIG_HWMON_VID is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM73 is not set +CONFIG_SENSORS_LM75=m +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +CONFIG_SENSORS_LM80=m +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_SENSORS_LIS3_I2C is not set +CONFIG_THERMAL=y +# CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_88PM860X is not set +CONFIG_MFD_SM501=y +CONFIG_MFD_SM501_GPIO=y +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_UCB1400_CORE is not set +# CONFIG_TPS65010 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_AB3100_CORE is not set +# CONFIG_MFD_TIMBERDALE is not set +# CONFIG_LPC_SCH is not set +# CONFIG_REGULATOR is not set +CONFIG_MEDIA_SUPPORT=m + +# +# Multimedia core support +# +CONFIG_VIDEO_DEV=m +CONFIG_VIDEO_V4L2_COMMON=m +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y +# CONFIG_DVB_CORE is not set +CONFIG_VIDEO_MEDIA=m + +# +# Multimedia drivers +# +CONFIG_IR_CORE=m +CONFIG_VIDEO_IR=m +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=m +# CONFIG_MEDIA_TUNER_CUSTOMISE is not set +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_MEDIA_TUNER_MC44S803=m +CONFIG_VIDEO_V4L2=m +CONFIG_VIDEO_V4L1=m +CONFIG_VIDEOBUF_GEN=m +CONFIG_VIDEOBUF_VMALLOC=m +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y +CONFIG_VIDEO_IR_I2C=m +# CONFIG_VIDEO_VIVI is not set +# CONFIG_VIDEO_BT848 is not set +# CONFIG_VIDEO_PMS is not set +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_VIDEO_SAA5246A is not set +# CONFIG_VIDEO_SAA5249 is not set +# CONFIG_VIDEO_STRADIS is not set +# CONFIG_VIDEO_ZORAN is not set +# CONFIG_VIDEO_SAA7134 is not set +# CONFIG_VIDEO_MXB is not set +# CONFIG_VIDEO_HEXIUM_ORION is not set +# CONFIG_VIDEO_HEXIUM_GEMINI is not set +# CONFIG_VIDEO_CX88 is not set +# CONFIG_VIDEO_IVTV is not set +# CONFIG_VIDEO_CAFE_CCIC is not set +# CONFIG_SOC_CAMERA is not set +CONFIG_V4L_USB_DRIVERS=y +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +CONFIG_USB_M5602=m +CONFIG_USB_STV06XX=m +# CONFIG_USB_GL860 is not set +# CONFIG_USB_GSPCA_BENQ is not set +CONFIG_USB_GSPCA_CONEX=m +# CONFIG_USB_GSPCA_CPIA1 is not set +CONFIG_USB_GSPCA_ETOMS=m +CONFIG_USB_GSPCA_FINEPIX=m +# CONFIG_USB_GSPCA_JEILINJ is not set +CONFIG_USB_GSPCA_MARS=m +CONFIG_USB_GSPCA_MR97310A=m +CONFIG_USB_GSPCA_OV519=m +CONFIG_USB_GSPCA_OV534=m +# CONFIG_USB_GSPCA_OV534_9 is not set +CONFIG_USB_GSPCA_PAC207=m +# CONFIG_USB_GSPCA_PAC7302 is not set +CONFIG_USB_GSPCA_PAC7311=m +# CONFIG_USB_GSPCA_SN9C2028 is not set +CONFIG_USB_GSPCA_SN9C20X=m +CONFIG_USB_GSPCA_SN9C20X_EVDEV=y +CONFIG_USB_GSPCA_SONIXB=m +CONFIG_USB_GSPCA_SONIXJ=m +CONFIG_USB_GSPCA_SPCA500=m +CONFIG_USB_GSPCA_SPCA501=m +CONFIG_USB_GSPCA_SPCA505=m +CONFIG_USB_GSPCA_SPCA506=m +CONFIG_USB_GSPCA_SPCA508=m +CONFIG_USB_GSPCA_SPCA561=m +CONFIG_USB_GSPCA_SQ905=m +CONFIG_USB_GSPCA_SQ905C=m +CONFIG_USB_GSPCA_STK014=m +# CONFIG_USB_GSPCA_STV0680 is not set +CONFIG_USB_GSPCA_SUNPLUS=m +CONFIG_USB_GSPCA_T613=m +CONFIG_USB_GSPCA_TV8532=m +CONFIG_USB_GSPCA_VC032X=m +CONFIG_USB_GSPCA_ZC3XX=m +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_VIDEO_CX231XX is not set +# CONFIG_VIDEO_USBVISION is not set +# CONFIG_USB_VICAM is not set +# CONFIG_USB_IBMCAM is not set +# CONFIG_USB_KONICAWC is not set +# CONFIG_USB_QUICKCAM_MESSENGER is not set +CONFIG_USB_ET61X251=m +# CONFIG_VIDEO_OVCAMCHIP is not set +# CONFIG_USB_OV511 is not set +# CONFIG_USB_SE401 is not set +CONFIG_USB_SN9C102=m +# CONFIG_USB_STV680 is not set +CONFIG_USB_ZC0301=m +# CONFIG_USB_PWC is not set +CONFIG_USB_PWC_INPUT_EVDEV=y +CONFIG_USB_ZR364XX=m +CONFIG_USB_STKWEBCAM=m +CONFIG_USB_S2255=m +# CONFIG_RADIO_ADAPTERS is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +CONFIG_VGA_ARB=y +CONFIG_VGA_ARB_MAX_GPUS=16 +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +CONFIG_VIDEO_OUTPUT_CONTROL=y +CONFIG_FB=y +CONFIG_FIRMWARE_EDID=y +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +CONFIG_FB_MODE_HELPERS=y +CONFIG_FB_TILEBLITTING=y + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_VIA is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +CONFIG_FB_SM501=y +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=m +CONFIG_BACKLIGHT_PWM=m + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +# CONFIG_MDA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_FONT_6x11=y +CONFIG_FONT_7x14=y +CONFIG_FONT_PEARL_8x8=y +CONFIG_FONT_ACORN_8x8=y +CONFIG_FONT_MINI_4x6=y +CONFIG_FONT_SUN8x16=y +CONFIG_FONT_SUN12x22=y +CONFIG_FONT_10x18=y +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=m +CONFIG_SOUND_OSS_CORE=y +CONFIG_SOUND_OSS_CORE_PRECLAIM=y +CONFIG_SND=m +CONFIG_SND_TIMER=m +CONFIG_SND_PCM=m +CONFIG_SND_HWDEP=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_SEQUENCER=m +CONFIG_SND_SEQ_DUMMY=m +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=m +CONFIG_SND_PCM_OSS=m +CONFIG_SND_PCM_OSS_PLUGINS=y +CONFIG_SND_SEQUENCER_OSS=y +CONFIG_SND_HRTIMER=m +CONFIG_SND_SEQ_HRTIMER_DEFAULT=y +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +CONFIG_SND_VMASTER=y +CONFIG_SND_RAWMIDI_SEQ=m +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_MPU401_UART=m +CONFIG_SND_AC97_CODEC=m +CONFIG_SND_DRIVERS=y +CONFIG_SND_DUMMY=m +CONFIG_SND_VIRMIDI=m +# CONFIG_SND_MTPAV is not set +CONFIG_SND_SERIAL_U16550=m +CONFIG_SND_MPU401=m +CONFIG_SND_AC97_POWER_SAVE=y +CONFIG_SND_AC97_POWER_SAVE_DEFAULT=10 +CONFIG_SND_PCI=y +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ALS300 is not set +# CONFIG_SND_ALI5451 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +# CONFIG_SND_AZT3328 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +CONFIG_SND_CS5535AUDIO=m +# CONFIG_SND_CTXFI is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_INDIGOIOX is not set +# CONFIG_SND_INDIGODJX is not set +# CONFIG_SND_EMU10K1 is not set +# CONFIG_SND_EMU10K1X is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_ES1938 is not set +# CONFIG_SND_ES1968 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDA_INTEL is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_HIFIER is not set +# CONFIG_SND_ICE1712 is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_LX6464ES is not set +# CONFIG_SND_MAESTRO3 is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SONICVIBES is not set +# CONFIG_SND_TRIDENT is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set +# CONFIG_SND_MIPS is not set +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m +# CONFIG_SND_USB_UA101 is not set +CONFIG_SND_USB_CAIAQ=m +CONFIG_SND_USB_CAIAQ_INPUT=y +# CONFIG_SND_SOC is not set +# CONFIG_SOUND_PRIME is not set +CONFIG_AC97_BUS=m +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +CONFIG_HIDRAW=y + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +CONFIG_USB_HIDDEV=y + +# +# Special HID drivers +# +# CONFIG_HID_3M_PCT is not set +CONFIG_HID_A4TECH=m +CONFIG_HID_APPLE=m +CONFIG_HID_BELKIN=m +CONFIG_HID_CHERRY=m +CONFIG_HID_CHICONY=m +CONFIG_HID_CYPRESS=m +CONFIG_HID_DRAGONRISE=m +CONFIG_DRAGONRISE_FF=y +CONFIG_HID_EZKEY=m +CONFIG_HID_KYE=m +CONFIG_HID_GYRATION=m +CONFIG_HID_TWINHAN=m +CONFIG_HID_KENSINGTON=m +CONFIG_HID_LOGITECH=m +CONFIG_LOGITECH_FF=y +CONFIG_LOGIRUMBLEPAD2_FF=y +# CONFIG_LOGIG940_FF is not set +# CONFIG_HID_MAGICMOUSE is not set +CONFIG_HID_MICROSOFT=m +# CONFIG_HID_MOSART is not set +CONFIG_HID_MONTEREY=m +CONFIG_HID_NTRIG=m +# CONFIG_HID_ORTEK is not set +CONFIG_HID_PANTHERLORD=m +CONFIG_PANTHERLORD_FF=y +CONFIG_HID_PETALYNX=m +# CONFIG_HID_QUANTA is not set +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SONY=m +# CONFIG_HID_STANTUM is not set +CONFIG_HID_SUNPLUS=m +CONFIG_HID_GREENASIA=m +CONFIG_GREENASIA_FF=y +CONFIG_HID_SMARTJOYPLUS=m +CONFIG_SMARTJOYPLUS_FF=y +CONFIG_HID_TOPSEED=m +CONFIG_HID_THRUSTMASTER=m +CONFIG_THRUSTMASTER_FF=y +CONFIG_HID_WACOM=m +CONFIG_HID_ZEROPLUS=m +CONFIG_ZEROPLUS_FF=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +# CONFIG_USB_DEVICE_CLASS is not set +CONFIG_USB_DYNAMIC_MINORS=y +CONFIG_USB_OTG_WHITELIST=y +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +CONFIG_USB_MON=m +CONFIG_USB_WUSB=m +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_XHCI_HCD is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_UHCI_HCD=m +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +CONFIG_USB_WHCI_HCD=m +CONFIG_USB_HWA_HCD=m +# CONFIG_USB_GADGET_MUSB_HDRC is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=m +CONFIG_USB_PRINTER=m +CONFIG_USB_WDM=m +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_DATAFAB=m +CONFIG_USB_STORAGE_FREECOM=m +CONFIG_USB_STORAGE_ISD200=m +CONFIG_USB_STORAGE_USBAT=m +CONFIG_USB_STORAGE_SDDR09=m +CONFIG_USB_STORAGE_SDDR55=m +CONFIG_USB_STORAGE_JUMPSHOT=m +CONFIG_USB_STORAGE_ALAUDA=m +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +CONFIG_USB_LIBUSUAL=y + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=m +# CONFIG_USB_EZUSB is not set +CONFIG_USB_SERIAL_GENERIC=y +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP210X is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +# CONFIG_USB_SERIAL_FTDI_SIO is not set +# CONFIG_USB_SERIAL_FUNSOFT is not set +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MOTOROLA is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +# CONFIG_USB_SERIAL_PL2303 is not set +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_QCAUX is not set +# CONFIG_USB_SERIAL_QUALCOMM is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_HP4X is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIEMENS_MPI is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +CONFIG_USB_SERIAL_OPTION=m +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +CONFIG_USB_LED=m +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_R8A66597 is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set +# CONFIG_USB_GADGET_IMX is not set +# CONFIG_USB_GADGET_S3C2410 is not set +CONFIG_USB_GADGET_M66592=y +CONFIG_USB_M66592=m +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_CI13XXX is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LANGWELL is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_MASS_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_NOKIA is not set +# CONFIG_USB_G_MULTI is not set + +# +# OTG and related infrastructure +# +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_NOP_USB_XCEIV is not set +CONFIG_UWB=m +CONFIG_UWB_HWA=m +CONFIG_UWB_WHCI=m +# CONFIG_UWB_WLP is not set +# CONFIG_UWB_I1480U is not set +CONFIG_MMC=m +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=m +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=m + +# +# LED drivers +# +# CONFIG_LEDS_PCA9532 is not set +# CONFIG_LEDS_GPIO is not set +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PWM is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +CONFIG_LEDS_TRIGGERS=y + +# +# LED Triggers +# +# CONFIG_LEDS_TRIGGER_TIMER is not set +# CONFIG_LEDS_TRIGGER_IDE_DISK is not set +# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_HCTOSYS is not set +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +CONFIG_RTC_DRV_M41T80=m +# CONFIG_RTC_DRV_M41T80_WDT is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set + +# +# TI VLYNQ +# +CONFIG_STAGING=y +# CONFIG_STAGING_EXCLUDE_BUILD is not set +# CONFIG_ET131X is not set +# CONFIG_VIDEO_GO7007 is not set +# CONFIG_USB_IP_COMMON is not set +# CONFIG_W35UND is not set +# CONFIG_PRISM2_USB is not set +# CONFIG_ECHO is not set +# CONFIG_OTUS is not set +# CONFIG_COMEDI is not set +# CONFIG_ASUS_OLED is not set +# CONFIG_R8187SE is not set +# CONFIG_RTL8192SU is not set +# CONFIG_RTL8192U is not set +# CONFIG_RTL8192E is not set +# CONFIG_TRANZPORT is not set + +# +# Qualcomm MSM Camera And Video +# + +# +# Camera Sensor Selection +# +# CONFIG_INPUT_GPIO is not set +# CONFIG_POHMELFS is not set +# CONFIG_LINE6_USB is not set +# CONFIG_USB_SERIAL_QUATECH2 is not set +# CONFIG_USB_SERIAL_QUATECH_USB2 is not set +# CONFIG_VT6655 is not set +# CONFIG_VT6656 is not set +# CONFIG_FB_UDL is not set +# CONFIG_VME_BUS is not set + +# +# RAR Register Driver +# +# CONFIG_RAR_REGISTER is not set +# CONFIG_IIO is not set +# CONFIG_RAMZSWAP is not set +# CONFIG_BATMAN_ADV is not set +# CONFIG_STRIP is not set +# CONFIG_WAVELAN is not set +CONFIG_FB_SM7XX=y +# CONFIG_DT3155 is not set +# CONFIG_CRYSTALHD is not set + +# +# File systems +# +CONFIG_EXT2_FS=m +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set +CONFIG_EXT3_FS_XATTR=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_XATTR=y +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +CONFIG_REISERFS_PROC_INFO=y +CONFIG_REISERFS_FS_XATTR=y +# CONFIG_REISERFS_FS_POSIX_ACL is not set +# CONFIG_REISERFS_FS_SECURITY is not set +CONFIG_JFS_FS=m +CONFIG_JFS_POSIX_ACL=y +# CONFIG_JFS_SECURITY is not set +# CONFIG_JFS_DEBUG is not set +# CONFIG_JFS_STATISTICS is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_XFS_FS=m +CONFIG_XFS_QUOTA=y +CONFIG_XFS_POSIX_ACL=y +# CONFIG_XFS_RT is not set +# CONFIG_XFS_DEBUG is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_BTRFS_FS=m +# CONFIG_BTRFS_FS_POSIX_ACL is not set +# CONFIG_NILFS2_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QUOTA_DEBUG is not set +CONFIG_QUOTA_TREE=m +# CONFIG_QFMT_V1 is not set +CONFIG_QFMT_V2=m +CONFIG_QUOTACTL=y +CONFIG_AUTOFS_FS=m +CONFIG_AUTOFS4_FS=m +CONFIG_FUSE_FS=m +CONFIG_CUSE=m + +# +# Caches +# +CONFIG_FSCACHE=m +# CONFIG_FSCACHE_STATS is not set +# CONFIG_FSCACHE_HISTOGRAM is not set +# CONFIG_FSCACHE_DEBUG is not set +# CONFIG_FSCACHE_OBJECT_LIST is not set +CONFIG_CACHEFILES=m +# CONFIG_CACHEFILES_DEBUG is not set +# CONFIG_CACHEFILES_HISTOGRAM is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +CONFIG_NTFS_FS=m +# CONFIG_NTFS_DEBUG is not set +CONFIG_NTFS_RW=y + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_CONFIGFS_FS=m +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_LOGFS is not set +CONFIG_CRAMFS=m +CONFIG_SQUASHFS=m +CONFIG_SQUASHFS_EMBEDDED=y +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +CONFIG_ROMFS_FS=m +CONFIG_ROMFS_BACKED_BY_BLOCK=y +# CONFIG_ROMFS_BACKED_BY_MTD is not set +# CONFIG_ROMFS_BACKED_BY_BOTH is not set +CONFIG_ROMFS_ON_BLOCK=y +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NFS_V4_1=y +CONFIG_ROOT_NFS=y +CONFIG_NFSD=m +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +CONFIG_NFSD_V4=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=m +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CEPH_FS is not set +CONFIG_CIFS=m +# CONFIG_CIFS_STATS is not set +# CONFIG_CIFS_WEAK_PW_HASH is not set +# CONFIG_CIFS_UPCALL is not set +# CONFIG_CIFS_XATTR is not set +# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DFS_UPCALL is not set +# CONFIG_CIFS_EXPERIMENTAL is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=m +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_UTF8=y +# CONFIG_DLM is not set + +# +# Kernel hacking +# +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_PRINTK_TIME=y +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +CONFIG_STRIP_ASM_SYMS=y +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_LKDTM is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_RING_BUFFER=y +CONFIG_RING_BUFFER_ALLOW_SWAP=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_EARLY_PRINTK=y +# CONFIG_CMDLINE_BOOL is not set +# CONFIG_SPINLOCK_TEST is not set + +# +# Security options +# +CONFIG_KEYS=y +CONFIG_KEYS_DEBUG_PROC_KEYS=y +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set +# CONFIG_DEFAULT_SECURITY_SMACK is not set +# CONFIG_DEFAULT_SECURITY_TOMOYO is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +CONFIG_XOR_BLOCKS=m +CONFIG_ASYNC_CORE=m +CONFIG_ASYNC_MEMCPY=m +CONFIG_ASYNC_XOR=m +CONFIG_ASYNC_PQ=m +CONFIG_ASYNC_RAID6_RECOV=m +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_FIPS=y +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=m +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=m +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_PCOMP=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_GF128MUL=m +CONFIG_CRYPTO_NULL=m +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_CRYPTO_CRYPTD=m +CONFIG_CRYPTO_AUTHENC=m +CONFIG_CRYPTO_TEST=m + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=m +CONFIG_CRYPTO_SEQIV=m + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CTR=m +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_XTS=m + +# +# Hash modes +# +CONFIG_CRYPTO_HMAC=m +CONFIG_CRYPTO_XCBC=m +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=m +CONFIG_CRYPTO_GHASH=m +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_RMD128=m +CONFIG_CRYPTO_RMD160=m +CONFIG_CRYPTO_RMD256=m +CONFIG_CRYPTO_RMD320=m +CONFIG_CRYPTO_SHA1=m +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_TGR192=m +CONFIG_CRYPTO_WP512=m + +# +# Ciphers +# +CONFIG_CRYPTO_AES=m +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_CAMELLIA=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_FCRYPT=m +CONFIG_CRYPTO_KHAZAD=m +CONFIG_CRYPTO_SALSA20=m +CONFIG_CRYPTO_SEED=m +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=m +CONFIG_CRYPTO_ZLIB=m +CONFIG_CRYPTO_LZO=m + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=m +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_HIFN_795X is not set +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_CRC_CCITT=m +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=m +CONFIG_CRC32=y +CONFIG_CRC7=m +CONFIG_LIBCRC32C=m +CONFIG_AUDIT_GENERIC=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=m +CONFIG_LZO_COMPRESS=m +CONFIG_LZO_DECOMPRESS=m +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_NLATTR=y -- 1.5.6.5 From sshtylyov@mvista.com Tue May 4 12:19:55 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 12:19:58 +0200 (CEST) Received: from mail-ew0-f221.google.com ([209.85.219.221]:40983 "EHLO mail-ew0-f221.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492356Ab0EDKTz (ORCPT ); Tue, 4 May 2010 12:19:55 +0200 Received: by ewy21 with SMTP id 21so983745ewy.25 for ; Tue, 04 May 2010 03:19:49 -0700 (PDT) Received: by 10.213.77.13 with SMTP id e13mr1403561ebk.7.1272968388771; Tue, 04 May 2010 03:19:48 -0700 (PDT) Received: from [192.168.2.2] (ppp91-77-52-154.pppoe.mtu-net.ru [91.77.52.154]) by mx.google.com with ESMTPS id 14sm3651182ewy.14.2010.05.04.03.19.46 (version=TLSv1/SSLv3 cipher=RC4-MD5); Tue, 04 May 2010 03:19:48 -0700 (PDT) Message-ID: <4BDFF49A.9000404@mvista.com> Date: Tue, 04 May 2010 14:19:06 +0400 From: Sergei Shtylyov User-Agent: Thunderbird 2.0.0.24 (Windows/20100228) MIME-Version: 1.0 To: yajin CC: linux-mips@linux-mips.org, loongson-dev , wuzhangjin@gmail.com, apatard@mandriva.com, vince@simtec.co.uk, ben@simtec.co.uk Subject: Re: [PATCH 8/12] gdium uses different freq of mclk&m1xclk of sm501 References: In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26570 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sshtylyov@mvista.com Precedence: bulk X-list: linux-mips Hello. yajin wrote: > Gdium uses different freq of mclk&m1xclk of sm501. This seems a dirty > hack. Maybe we need a configuration option for changing the freq of > these clocks. > > Signed-off-by: yajin > --- > drivers/mfd/sm501.c | 9 +++++++-- > 1 files changed, 7 insertions(+), 2 deletions(-) > > diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c > index ce5dfce..5e55cbd 100644 > --- a/drivers/mfd/sm501.c > +++ b/drivers/mfd/sm501.c > @@ -1606,10 +1606,15 @@ static struct sm501_initdata sm501_pci_initdata = { > .devices = SM501_USE_ALL, > > /* Errata AB-3 says that 72MHz is the fastest available > - * for 33MHZ PCI with proper bus-mastering operation */ > - > + * for 33MHZ PCI with proper bus-mastering operation > + * For gdium, it works under 84&112M clock freq.*/ > According to CodingStyle, style of multiline comments should preferably be: /* * bla * bla * bla */ WBR, Sergei From wuzhangjin@gmail.com Tue May 4 12:52:33 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 12:52:37 +0200 (CEST) Received: from mail-pz0-f194.google.com ([209.85.222.194]:36977 "EHLO mail-pz0-f194.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492426Ab0EDKwd (ORCPT ); Tue, 4 May 2010 12:52:33 +0200 Received: by pzk32 with SMTP id 32so868751pzk.21 for ; Tue, 04 May 2010 03:52:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:subject:from:reply-to:to:cc :in-reply-to:references:content-type:organization:date:message-id :mime-version:x-mailer:content-transfer-encoding; bh=oRoeYF71wZh8ntp2+ehgwYk/hg4my8HXQQ3sgu3zurI=; b=TBFHdy/irSJTTgelAu/8m8vXHoVdSTBvokYj1ombuGANryosxw6zeBA8Lq9wrNRA90 FxyLnS+F/Fifav2Jp8bCkbOr2tUPAnMFY8wBWTaHbLFKOMvGktD9g5RGzGhaI4+n20GV 1QNJEqY/zxSWAQRwiSYkYq/D7ivraQJ6TjVuQ= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=subject:from:reply-to:to:cc:in-reply-to:references:content-type :organization:date:message-id:mime-version:x-mailer :content-transfer-encoding; b=A6Juu99Ngoi63Maw01RbRpq4nP/NhfZs35t2gOZcpQpJxh0hvuSgwmVP9Uf/JeD0lv ojOr6PMKZuL5HhYmZ7sNOc9+TVuhMlrdCrXLscTKmCG1sNaVVxaKvQ8a0DWyMkjjWHUT LUB6YL02Q+EQjlKPuTf7JN4iRJSE2J6zAYWbQ= Received: by 10.114.215.12 with SMTP id n12mr5309785wag.68.1272970345982; Tue, 04 May 2010 03:52:25 -0700 (PDT) Received: from [192.168.2.214] ([202.201.14.140]) by mx.google.com with ESMTPS id c14sm29055051waa.1.2010.05.04.03.52.23 (version=TLSv1/SSLv3 cipher=RC4-MD5); Tue, 04 May 2010 03:52:24 -0700 (PDT) Subject: Re: [PATCH 1/12] remove set_irq_trigger_mode to mach_init_irq From: Wu Zhangjin Reply-To: wuzhangjin@gmail.com To: yajin Cc: linux-mips@linux-mips.org, loongson-dev , apatard@mandriva.com In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Organization: DSLab, Lanzhou University, China Date: Tue, 04 May 2010 18:52:20 +0800 Message-ID: <1272970340.9547.2.camel@localhost> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26571 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips Hi, Yajin Perhaps we can remove this set_irq_trigger_mode() completely via merging ti into mach_init_irq(). Then We also need to remove the related declaration in arch/mips/include/asm/mach-loongson/loongson.h. Regards, Wu Zhangjin On Tue, 2010-05-04 at 17:54 +0800, yajin wrote: > The function set_irq_trigger_mode is used to set the interrupt trigger > level and it should be machine specific. That means we need to remove > this function from common/irq.c to irq.c of different loongson > machines. > > > Signed-off-by: yajin > --- > arch/mips/loongson/common/irq.c | 3 --- > arch/mips/loongson/fuloong-2e/irq.c | 3 +++ > arch/mips/loongson/lemote-2f/irq.c | 3 +++ > 3 files changed, 6 insertions(+), 3 deletions(-) > > diff --git a/arch/mips/loongson/common/irq.c b/arch/mips/loongson/common/irq.c > index 20e7328..987feeb 100644 > --- a/arch/mips/loongson/common/irq.c > +++ b/arch/mips/loongson/common/irq.c > @@ -56,9 +56,6 @@ void __init arch_init_irq(void) > */ > clear_c0_status(ST0_IM | ST0_BEV); > > - /* setting irq trigger mode */ > - set_irq_trigger_mode(); > - > /* no steer */ > LOONGSON_INTSTEER = 0; > > diff --git a/arch/mips/loongson/fuloong-2e/irq.c > b/arch/mips/loongson/fuloong-2e/irq.c > index 320e937..3881bd3 100644 > --- a/arch/mips/loongson/fuloong-2e/irq.c > +++ b/arch/mips/loongson/fuloong-2e/irq.c > @@ -59,6 +59,9 @@ void __init mach_init_irq(void) > * 32-63 ------> bonito irq > */ > > + /* setting irq trigger mode */ > + set_irq_trigger_mode(); > + > /* Sets the first-level interrupt dispatcher. */ > mips_cpu_irq_init(); > init_i8259_irqs(); > diff --git a/arch/mips/loongson/lemote-2f/irq.c > b/arch/mips/loongson/lemote-2f/irq.c > index 1d8b4d2..f3eee56 100644 > --- a/arch/mips/loongson/lemote-2f/irq.c > +++ b/arch/mips/loongson/lemote-2f/irq.c > @@ -122,6 +122,9 @@ void __init mach_init_irq(void) > * 32-63 ------> bonito irq > */ > > + /* setting irq trigger mode */ > + set_irq_trigger_mode(); > + > /* Sets the first-level interrupt dispatcher. */ > mips_cpu_irq_init(); > init_i8259_irqs(); From kevink@paralogos.com Tue May 4 13:16:56 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 13:17:01 +0200 (CEST) Received: from gateway11.websitewelcome.com ([67.18.68.8]:60304 "HELO gateway11.websitewelcome.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with SMTP id S1492433Ab0EDLQ4 (ORCPT ); Tue, 4 May 2010 13:16:56 +0200 Received: (qmail 5285 invoked from network); 4 May 2010 11:20:39 -0000 Received: from gator750.hostgator.com (174.132.194.2) by gateway11.websitewelcome.com with SMTP; 4 May 2010 11:20:39 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=paralogos.com; h=Received:Message-ID:Date:From:User-Agent:MIME-Version:To:CC:Subject:References:In-Reply-To:Content-Type:Content-Transfer-Encoding; b=QhVU7FGiRKW4mfAHKP6wb1PcXj7HR/rnkoi8WiG1YHrQR/SJTrYg2+1mLwf7KN/tnSTVsuErssGVz3UUX9q1BApMDjPusJYYYQWu/QzTJFbv4sMH5E3Tqw8V5p75iYaL; Received: from c-98-207-157-135.hsd1.ca.comcast.net ([98.207.157.135]:3093 helo=[127.0.0.1]) by gator750.hostgator.com with esmtpa (Exim 4.69) (envelope-from ) id 1O9G78-0000EF-FS; Tue, 04 May 2010 06:16:34 -0500 Message-ID: <4BE00207.6030506@paralogos.com> Date: Tue, 04 May 2010 04:16:23 -0700 From: "Kevin D. Kissell" User-Agent: Thunderbird 2.0.0.24 (Windows/20100228) MIME-Version: 1.0 To: Shane McDonald CC: linux-mips@linux-mips.org Subject: Re: Unexpected behaviour when catching SIGFPE on FPU-less system References: <4BDF366E.5000501@paralogos.com> <4BDF8092.1060401@paralogos.com> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - gator750.hostgator.com X-AntiAbuse: Original Domain - linux-mips.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - paralogos.com Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26572 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kevink@paralogos.com Precedence: bulk X-list: linux-mips Shane McDonald wrote: > OK, I think I've found the line that's causing me the problem. > > On Mon, May 3, 2010 at 10:35 PM, Shane McDonald > wrote: > >> On Mon, May 3, 2010 at 9:49 PM, Shane McDonald wrote: >> >>> Looking at env[0], I see that the __fpc_csr field has a value of 1024, >>> indicating a divide-by-zero. As soon as that ctc1 instruction >>> is executed, the exception is raised. I guess that makes >>> sense, but I don't understand why __fpc_csr has a value of 1024. >>> When I step through the call to setjmp(), it gets set to a value of 0. >>> In longjmp(), every other field in env[0] has the value that it was >>> set to in the call to setjmp(). >>> >> Wait, I take that back -- I was looking at the wrong env[0] variable! >> I can see that __fpc_csr actually does have a value of 1024 when >> I call setjmp(), and that's why longjmp() is setting the FCSR >> register to indicate divide-by-zero. If I comment out my call to >> feenableexcept( FE_DIVBYZERO ), it is set to 0; if I include that call, >> it is set to 1024. >> >> Looking further, I also see that I confused the Cause bits and the >> Enable bits of the FCSR -- the Enable divide-by-zero bit is set, >> not the Cause bit. Clearly, the call to feenableexcept() must >> be setting that bit. But, it no longer makes sense that an exception >> is raised when the FCSR register is restored to the value 1024. >> > > When I'm inside my handler, I see the FCSR register has the value 0x8420, > indicating that the Z bit is set in each of the Cause, Enables, and Flags > fields. When longjmp() is called, it tries to write the old FCSR value > of 0x400 (just the Z bit of the Enables field). In the emulation code, > at lines 392 - 394 of file cp1emu.c, is the code: > > if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) { > return SIGFPE; > } > > Given the original FCSR value of 0x8420 and the new value to set > of 0x400, the Z bit of the Cause field is still set, and as a result, the > above code causes the SIGFPE exception to be thrown. > That's not how I read the code. If ctx->fcr31 is 0x400, then the result of the AND should be zero. > Now that I've figured that out, I have to admit that I don't know > if the emulator has the proper behaviour, or if not, what the fix is. > Kevin, what do you think? > I don't know where the bug is, but it doesn't look to be here. I wonder if someone hasn't added some code somewhere that does an extra save/restore of the FCSR from the kernel stack, so that the explicit write to clear the exception is undone by the restore from the stack being emulated. I note that there's a __build_clear_fpe macro that now appears to clear the status bits of a real FPU on entry to the FPU exception handler, but that there's nothing analogous which clears the bits of the emulated register file in the emulated exception case - because, after all, there's no new exception, just an invocation of signal logic within the coprocessor unavailable handling of the emulator. That's presumably the cause of the different values you see in the signal handlers, and very possibly a reason why we only see the failure with the emulator. I don't remember the name of the thing, but when I was with MIPS, there was an old gradware test program that we used to test IEEE compliance of the FPU and emulator. Does this still pass with the emulator on the kernels showing this bug? If it does, the problem is subtle and the test needs to be enhanced. If it doesn't, whoever wrenches on anything to do with the FPU in the kernel should really be running it before committing. Regards, Kevin K. From arnaud.patard@mandriva.com Tue May 4 13:25:20 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 13:25:23 +0200 (CEST) Received: from mx1.moondrake.net ([212.85.150.166]:54989 "EHLO mx1.mandriva.com" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1492479Ab0EDLZU (ORCPT ); Tue, 4 May 2010 13:25:20 +0200 Received: by mx1.mandriva.com (Postfix, from userid 501) id 54489274016; Tue, 4 May 2010 13:25:19 +0200 (CEST) Received: from office-abk.mandriva.com (unknown [195.7.104.248]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.mandriva.com (Postfix) with ESMTP id A5E40274015; Tue, 4 May 2010 13:25:17 +0200 (CEST) Received: from anduin.mandriva.com (fw2.mandriva.com [192.168.2.3]) by office-abk.mandriva.com (Postfix) with ESMTP id 7F141835BA; Tue, 4 May 2010 13:43:13 +0200 (CEST) Received: from anduin.mandriva.com (localhost [127.0.0.1]) by anduin.mandriva.com (Postfix) with ESMTP id 0E2AEFF855; Tue, 4 May 2010 13:25:49 +0200 (CEST) From: Arnaud Patard To: yajin Cc: linux-mips@linux-mips.org, loongson-dev , wuzhangjin@gmail.com Subject: Re: [PATCH 0/12] add basic gdium support References: Organization: Mandriva Date: Tue, 04 May 2010 13:25:48 +0200 In-Reply-To: (yajin's message of "Tue, 4 May 2010 17:54:51 +0800") Message-ID: User-Agent: Gnus/5.1008 (Gnus v5.10.8) Emacs/22.1 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26573 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: apatard@mandriva.com Precedence: bulk X-list: linux-mips yajin writes: Hi, > Gdium is a netbook based on loongson2f CPU and sm502 SOC. It does NOT > have a south bridge. The sm502 SOC is used for LCD controller and > audio output. This series of patches are adding gdium support to > ralf's linux-mips repository. what's wrong with you ? I told you I was going to send patches and now you're sending yours (judging by a quick look) which: - are incomplete and/or broken - no respect of patch authorship The gpio patch is even a dup of a patch I sent last week... What's the aim here ? Sending your patches before mines to annoy me ? Arnaud From wuzhangjin@gmail.com Tue May 4 13:25:58 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 13:26:01 +0200 (CEST) Received: from mail-pv0-f177.google.com ([74.125.83.177]:46818 "EHLO mail-pv0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492479Ab0EDLZ6 (ORCPT ); Tue, 4 May 2010 13:25:58 +0200 Received: by pvg4 with SMTP id 4so1513525pvg.36 for ; Tue, 04 May 2010 04:25:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:subject:from:reply-to:to:cc :in-reply-to:references:content-type:organization:date:message-id :mime-version:x-mailer:content-transfer-encoding; bh=YH7PhPhXhpX+xYg9HMn1vSZShUZ+FBZ3EFBRO56yoBo=; b=P1coYcJKsx6MEw8n5d6jnHgQXxoMztdh3Fs9f40NDDN7wsjZYG+7gZ97xxtW8Q9cUM xqOHHaWOeKPqBQQkZDCPtSw+mAlqZ/eCMPAgbXfvWULlL5nZFQBe41in58MZWO+lvsGq wJ0kY8k+3Y1YYARryKcIQUA0084vHp5dRhdAI= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=subject:from:reply-to:to:cc:in-reply-to:references:content-type :organization:date:message-id:mime-version:x-mailer :content-transfer-encoding; b=JkyfSUCe6QD9uc3vp6lPMOky8Zly4t+GNb5rPdXQTVR7CBG6qkOm6Ggr/bNMPJCzzT XfL1MFJ528KQdTgiSlkTpq4yRaMkFUnPyXnw0Q7C2cbhuBVUU4cVO24rOyGLsAiLaDAg CKzxBL0aqXfmA1iSd3WKx9ALRWPrQPUQq1LSE= Received: by 10.114.215.30 with SMTP id n30mr820677wag.27.1272972349638; Tue, 04 May 2010 04:25:49 -0700 (PDT) Received: from [192.168.2.214] ([202.201.14.140]) by mx.google.com with ESMTPS id v13sm29159980wav.14.2010.05.04.04.25.46 (version=TLSv1/SSLv3 cipher=RC4-MD5); Tue, 04 May 2010 04:25:49 -0700 (PDT) Subject: Re: [PATCH 2/12] add basic gdium support From: Wu Zhangjin Reply-To: wuzhangjin@gmail.com To: yajin Cc: linux-mips@linux-mips.org, loongson-dev , apatard@mandriva.com In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Organization: DSLab, Lanzhou University, China Date: Tue, 04 May 2010 19:25:43 +0800 Message-ID: <1272972343.9547.31.camel@localhost> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26574 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips Hi, Yajin On Tue, 2010-05-04 at 17:55 +0800, yajin wrote: > Gdium is same to most of the loongson2f based machines except that it > does NOT use the cs5536 south bridge. > > Signed-off-by: yajin [...] > # > # MIPS Malta board > diff --git a/arch/mips/include/asm/mach-loongson/machine.h > b/arch/mips/include/asm/mach-loongson/machine.h > index 4321338..fb9554c 100644 > --- a/arch/mips/include/asm/mach-loongson/machine.h > +++ b/arch/mips/include/asm/mach-loongson/machine.h > @@ -24,4 +24,11 @@ > > #endif > > +/* use gdium as the default machine of LEMOTE_MACH2F */ Several machines shared the same LEMOTE_MACH2F config, I have added the above comment for the default one, therefore, this is not needed for gdium, you can remove it directly. > +#ifdef CONFIG_DEXXON_GDIUM > + > +#define LOONGSON_MACHTYPE MACH_DEXXON_GDIUM2F10 > + > +#endif > + Suggest you remove the 'useless' blank line between the #ifdef and #endif and also the other blank lines in the original machine.h added by me, just found they are really useless. > #endif /* __ASM_MACH_LOONGSON_MACHINE_H */ > diff --git a/arch/mips/loongson/Kconfig b/arch/mips/loongson/Kconfig > index 3df1967..90a02b4 100644 > --- a/arch/mips/loongson/Kconfig > +++ b/arch/mips/loongson/Kconfig > @@ -57,6 +57,31 @@ config LEMOTE_MACH2F > > These family machines include fuloong2f mini PC, yeeloong2f notebook, > LingLoong allinone PC and so forth. > + > +config DEXXON_GDIUM > + bool "Dexxon Gdium Netbook" > + select ARCH_SPARSEMEM_ENABLE > + select BOARD_SCACHE > + select BOOT_ELF32 > + select CEVT_R4K > + select CPU_HAS_WB > + select CSRC_R4K > + select DMA_NONCOHERENT > + select GENERIC_HARDIRQS_NO__DO_IRQ > + select GENERIC_ISA_DMA_SUPPORT_BROKEN > + select HW_HAS_PCI > + select I8259 > + select IRQ_CPU > + select ISA > + select SYS_HAS_CPU_LOONGSON2F > + select SYS_HAS_EARLY_PRINTK > + select SYS_SUPPORTS_32BIT_KERNEL > + select SYS_SUPPORTS_64BIT_KERNEL > + select SYS_SUPPORTS_HIGHMEM > + select SYS_SUPPORTS_LITTLE_ENDIAN > + select ARCH_REQUIRE_GPIOLIB Perhaps you can move "select ARCH_REQUIRE_GPIOLIB" before "select ARCH_SPARSEMEM_ENABLE" to make them in alphabetical order. > + help > + Dexxon gdium netbook based on Loongson 2F and SM502. > endchoice > > config CS5536 > diff --git a/arch/mips/loongson/Makefile b/arch/mips/loongson/Makefile > index 2b76cb0..6002109 100644 > --- a/arch/mips/loongson/Makefile > +++ b/arch/mips/loongson/Makefile > @@ -15,3 +15,9 @@ obj-$(CONFIG_LEMOTE_FULOONG2E) += fuloong-2e/ > # > > obj-$(CONFIG_LEMOTE_MACH2F) += lemote-2f/ > + > +# > +# gdium > +# > + > +obj-$(CONFIG_DEXXON_GDIUM) += gdium/ > diff --git a/arch/mips/loongson/gdium/Makefile > b/arch/mips/loongson/gdium/Makefile > new file mode 100644 > index 0000000..31a8e57 > --- /dev/null > +++ b/arch/mips/loongson/gdium/Makefile > @@ -0,0 +1,3 @@ > +# Makefile for gdium > + > +obj-y += irq.o reset.o > diff --git a/arch/mips/loongson/gdium/irq.c b/arch/mips/loongson/gdium/irq.c > new file mode 100644 > index 0000000..b0679eb > --- /dev/null > +++ b/arch/mips/loongson/gdium/irq.c > @@ -0,0 +1,66 @@ > +/* > + * Copyright (C) 2007 Lemote Inc. > + * Author: Fuxin Zhang, zhangfx@lemote.com > + * > + * Copyright (c) 2010 yajin > + * > + * This program is free software; you can redistribute it and/or modify it > + * under the terms of the GNU General Public License as published by the > + * Free Software Foundation; either version 2 of the License, or (at your > + * option) any later version. > + */ > + > +#include > +#include > + > +#include > +#include > + > +#include > +#include > + > +#define LOONGSON_TIMER_IRQ (MIPS_CPU_IRQ_BASE + 7) /* cpu timer */ > +#define LOONGSON_PERFCNT_IRQ (MIPS_CPU_IRQ_BASE + 6) /* cpu perf counter */ > +#define LOONGSON_NORTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 6) /* bonito */ > +#define LOONGSON_UART_IRQ (MIPS_CPU_IRQ_BASE + 3) /* cpu serial port */ > + > +void mach_irq_dispatch(unsigned int pending) > +{ > + if (pending & CAUSEF_IP7) > + do_IRQ(LOONGSON_TIMER_IRQ); > + else if (pending & CAUSEF_IP6) { /* North Bridge, Perf counter */ > +#ifdef CONFIG_OPROFILE > + do_IRQ(LOONGSON2_PERFCNT_IRQ); > +#endif Ralf just applied one patch from me for the Oprofile problem when it is configured as module, that commit is: "MIPS: oprofile: Fix breakage when CONFIG_OPROFILE=m" The #ifdef condition should be changed to "#if defined(CONFIG_OPROFILE) || defined(CONFIG_OPROFILE_MODULE)" to ensure the do_IRQ() is called when the Oprofile driver is configured as a module. To reduce the duplication and make it maintainable, Perhaps we can add an inline function to loongson.h for this specific stuff. static inline do_perfcnt_IRQ() { #if defined(CONFIG_OPROFILE) || defined(CONFIG_OPROFILE_MODULE) do_IRQ(LOONGSON2_PERFCNT_IRQ); #endif } Regards, Wu Zhangjin From wuzhangjin@gmail.com Tue May 4 13:33:08 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 13:33:14 +0200 (CEST) Received: from mail-px0-f177.google.com ([209.85.212.177]:59482 "EHLO mail-px0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492479Ab0EDLdI (ORCPT ); Tue, 4 May 2010 13:33:08 +0200 Received: by pxi1 with SMTP id 1so1671457pxi.36 for ; Tue, 04 May 2010 04:33:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:subject:from:reply-to:to:cc :in-reply-to:references:content-type:organization:date:message-id :mime-version:x-mailer:content-transfer-encoding; bh=ZUVC1kPdmeRgiz1QcWKC2v8/9lluutFJtxxLye5cZfc=; b=NdZtU4w6fz28jUVb+USN1gVKKrfln8O2+4zWM0TvSFn5GILV6y3t6FhRG472Na7xs2 nkXlNBugjlIdLE/lnsYJOkY+flZ1bNoYgX0wPWrhzxHfYsu/X0WWjxAu4FXM3MKqMk0t r6tlqYWT6BHBzQDg1gq/+/ZDAZSXiUKZSlUP0= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=subject:from:reply-to:to:cc:in-reply-to:references:content-type :organization:date:message-id:mime-version:x-mailer :content-transfer-encoding; b=DYUEi/KtLLCHQIS0fLaX6cdXPOsuEJgEdb2TBm3qDnU9zyBb+6g5MkKD4h2usfU2yX DnNhbgMjMbO1EXj+vpYlrT2B/Dtj11hUTFAT9i0ugo5sh3buPbd3daJXwGC0xXhjkDDu +cyF4931lYjoXjHVNLiW8D1riFwdqu/MCp3ss= Received: by 10.114.187.40 with SMTP id k40mr6342080waf.30.1272972781115; Tue, 04 May 2010 04:33:01 -0700 (PDT) Received: from [192.168.2.214] ([202.201.14.140]) by mx.google.com with ESMTPS id n32sm29183765wae.10.2010.05.04.04.32.58 (version=TLSv1/SSLv3 cipher=RC4-MD5); Tue, 04 May 2010 04:33:00 -0700 (PDT) Subject: Re: [PATCH 4/12] add loongson2f gpio interfact support From: Wu Zhangjin Reply-To: wuzhangjin@gmail.com To: yajin Cc: linux-mips@linux-mips.org, loongson-dev , apatard@mandriva.com In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Organization: DSLab, Lanzhou University, China Date: Tue, 04 May 2010 19:32:55 +0800 Message-ID: <1272972775.9547.37.camel@localhost> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26575 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips Hi, Yajin Arnaud Patard have sent the gpio related patch out before: "MIPS: Loongson 2F: Add gpio/gpioilb support" It has been applied into the git://www.linux-mips.org/pub/scm/linux-queue.git by Ralf and can be browsed here: http://www.linux-mips.org/git?p=linux-queue.git;a=commit;h=625c483738cc4609eaff7b2f69b51fb1ebff636c So this patch is not needed and seems you are using the wrong git repo, you need to use the linux-queue.git not the linux.git. Regards, Wu Zhangjin On Tue, 2010-05-04 at 17:55 +0800, yajin wrote: > Add loongson2f GPIO interfact support. GPIOLIB needs these functions. > > Signed-off-by: yajin > --- > arch/mips/include/asm/mach-loongson/gpio.h | 34 +++++++ > arch/mips/loongson/common/Makefile | 5 + > arch/mips/loongson/common/gpio.c | 145 ++++++++++++++++++++++++++++ > 3 files changed, 184 insertions(+), 0 deletions(-) > create mode 100644 arch/mips/include/asm/mach-loongson/gpio.h > create mode 100644 arch/mips/loongson/common/gpio.c > > diff --git a/arch/mips/include/asm/mach-loongson/gpio.h > b/arch/mips/include/asm/mach-loongson/gpio.h > new file mode 100644 > index 0000000..00a7fae > --- /dev/null > +++ b/arch/mips/include/asm/mach-loongson/gpio.h > @@ -0,0 +1,34 @@ > +/* > + * STLS2F GPIO Support > + * > + * Copyright (c) 2008 Richard Liu, STMicroelectronics > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License as published by > + * the Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + */ > + > +#ifndef __STLS2F_GPIO_H > +#define __STLS2F_GPIO_H > + > +#include > + > +extern void gpio_set_value(unsigned gpio, int value); > +extern int gpio_get_value(unsigned gpio); > +extern int gpio_cansleep(unsigned gpio); > + > +/* The chip can do interrupt > + * but it has not been tested and doc not clear > + */ > +static inline int gpio_to_irq(int gpio) > +{ > + return -EINVAL; > +} > + > +static inline int irq_to_gpio(int gpio) > +{ > + return -EINVAL; > +} > + > +#endif /* __STLS2F_GPIO_H */ > diff --git a/arch/mips/loongson/common/Makefile > b/arch/mips/loongson/common/Makefile > index 7668c4d..404dbb5 100644 > --- a/arch/mips/loongson/common/Makefile > +++ b/arch/mips/loongson/common/Makefile > @@ -23,3 +23,8 @@ obj-$(CONFIG_CS5536) += cs5536/ > # > > obj-$(CONFIG_LOONGSON_SUSPEND) += pm.o > + > +# > +# Loongson 2f gpio > +# > +obj-$(CONFIG_GENERIC_GPIO) += gpio.o > diff --git a/arch/mips/loongson/common/gpio.c b/arch/mips/loongson/common/gpio.c > new file mode 100644 > index 0000000..346418a > --- /dev/null > +++ b/arch/mips/loongson/common/gpio.c > @@ -0,0 +1,145 @@ > +/* > + * STLS2F GPIO Support > + * > + * Copyright(c) 2008 Richard Liu, STMicroelectronics > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License as published by > + * the Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include > +#include > + > +/* > + * North bridge of loongson 2f has 4 gpio pins. > + * GPIO_Data: reg offset 0X1C > + * bit [3:0] gpio_out > + * bit [19:16] gpio_in > + */ > +#define LOONGSON_GPIO_PINS 4 > +#define LOONGSON_GPIO_IN_SHIFT 16 > + > +static DEFINE_SPINLOCK(gpio_lock); > + > +int gpio_get_value(unsigned gpio) > +{ > + u32 val; > + u32 mask; > + > + if (gpio >= LOONGSON_GPIO_PINS) > + return __gpio_get_value(gpio); > + > + mask = 1 << (gpio + LOONGSON_GPIO_IN_SHIFT); > + spin_lock(&gpio_lock); > + val = LOONGSON_GPIODATA; > + spin_unlock(&gpio_lock); > + > + return ((val & mask) != 0); > +} > +EXPORT_SYMBOL(gpio_get_value); > + > +void gpio_set_value(unsigned gpio, int state) > +{ > + u32 val; > + u32 mask; > + > + if (gpio >= LOONGSON_GPIO_PINS) { > + __gpio_set_value(gpio, state); > + return ; > + } > + > + mask = 1 << gpio; > + > + spin_lock(&gpio_lock); > + val = LOONGSON_GPIODATA; > + if (state) > + val |= mask; > + else > + val &= (~mask); > + LOONGSON_GPIODATA = val; > + spin_unlock(&gpio_lock); > +} > +EXPORT_SYMBOL(gpio_set_value); > + > +int gpio_cansleep(unsigned gpio) > +{ > + if (gpio < LOONGSON_GPIO_PINS) > + return 0; > + else > + return __gpio_cansleep(gpio); > +} > +EXPORT_SYMBOL(gpio_cansleep); > + > +static int loongson_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) > +{ > + u32 temp; > + u32 mask; > + > + if (gpio >= LOONGSON_GPIO_PINS) > + return -EINVAL; > + > + spin_lock(&gpio_lock); > + mask = 1 << gpio; > + temp = LOONGSON_GPIOIE; > + temp |= mask; > + LOONGSON_GPIOIE = temp; > + spin_unlock(&gpio_lock); > + > + return 0; > +} > + > +static int loongson_gpio_direction_output(struct gpio_chip *chip, > + unsigned gpio, int level) > +{ > + u32 temp; > + u32 mask; > + > + if (gpio >= LOONGSON_GPIO_PINS) > + return -EINVAL; > + > + gpio_set_value(gpio, level); > + spin_lock(&gpio_lock); > + mask = 1 << gpio; > + temp = LOONGSON_GPIOIE; > + temp &= (~mask); > + LOONGSON_GPIOIE = temp; > + spin_unlock(&gpio_lock); > + > + return 0; > +} > + > +static int loongson_gpio_get_value(struct gpio_chip *chip, unsigned gpio) > +{ > + return gpio_get_value(gpio); > +} > + > +static void loongson_gpio_set_value(struct gpio_chip *chip, > + unsigned gpio, int value) > +{ > + gpio_set_value(gpio, value); > +} > + > +static struct gpio_chip loongson_gpio_chip = { > + .label = "loongson-gpio", > + .direction_input = loongson_gpio_direction_input, > + .get = loongson_gpio_get_value, > + .direction_output = loongson_gpio_direction_output, > + .set = loongson_gpio_set_value, > + .base = 0, > + .ngpio = LOONGSON_GPIO_PINS, > +}; > + > +static int __init loongson_gpio_setup(void) > +{ > + return gpiochip_add(&loongson_gpio_chip); > +} > +arch_initcall(loongson_gpio_setup); From wuzhangjin@gmail.com Tue May 4 13:50:41 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 13:50:46 +0200 (CEST) Received: from mail-pv0-f177.google.com ([74.125.83.177]:57383 "EHLO mail-pv0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492500Ab0EDLul (ORCPT ); Tue, 4 May 2010 13:50:41 +0200 Received: by pvg4 with SMTP id 4so1522144pvg.36 for ; Tue, 04 May 2010 04:50:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:subject:from:reply-to:to:cc :in-reply-to:references:content-type:organization:date:message-id :mime-version:x-mailer:content-transfer-encoding; bh=dZZL4iaaVYu7UVisQf+P3bWjoITH8qsuE8D5kEqUeJw=; b=i+pXyunh7GA7DG6gCJNa6BQCmdWBdGpFeCLID7stCG2DOXfC8kq/gM3dksNmwSsoy+ Vm5HLR+eNRQ8UUTcpJi7MgKy3T7b9dr/BP6It+j6sHTZ5VOikwjkj6FdTD0TVMkeSEHD AU1bmMrfSAy8LBvrfJJlRgGWTrRd4Ez938E+0= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=subject:from:reply-to:to:cc:in-reply-to:references:content-type :organization:date:message-id:mime-version:x-mailer :content-transfer-encoding; b=rkEc6LVckym/Ll+qfJXVZu9ENxDPUQ7cR9ehOAKRqKRh+DbWNzxEW0So6CfQtjRUNI GgRmMb+VoVD0IJRfj1qeDr/AVme/zC0qsC3FAeCm6PV0ZgGJM4Yk2PQyg2zEL/8zaUdf xxVGUUVP6tAQ+HZRsqVK9FNxqJbYNEP0wed4k= Received: by 10.115.102.20 with SMTP id e20mr1318212wam.194.1272973834237; Tue, 04 May 2010 04:50:34 -0700 (PDT) Received: from [192.168.2.214] ([202.201.14.140]) by mx.google.com with ESMTPS id b6sm29238559wam.21.2010.05.04.04.50.31 (version=TLSv1/SSLv3 cipher=RC4-MD5); Tue, 04 May 2010 04:50:33 -0700 (PDT) Subject: Re: [PATCH 0/12] add basic gdium support From: Wu Zhangjin Reply-To: wuzhangjin@gmail.com To: Arnaud Patard Cc: yajin , linux-mips@linux-mips.org, loongson-dev In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Organization: DSLab, Lanzhou University, China Date: Tue, 04 May 2010 19:50:18 +0800 Message-ID: <1272973818.9547.52.camel@localhost> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26576 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips Hi, Arnaud On Tue, 2010-05-04 at 13:25 +0200, Arnaud Patard wrote: > yajin writes: > > Hi, > > > Gdium is a netbook based on loongson2f CPU and sm502 SOC. It does NOT > > have a south bridge. The sm502 SOC is used for LCD controller and > > audio output. This series of patches are adding gdium support to > > ralf's linux-mips repository. > > what's wrong with you ? I told you I was going to send patches and now > you're sending yours (judging by a quick look) which: > - are incomplete and/or broken > - no respect of patch authorship > > The gpio patch is even a dup of a patch I sent last week... > > What's the aim here ? Sending your patches before mines to annoy me ? > Seems Yajin was sending the patches for the first time, I guess he was not intended. Perhaps you two can cooperate with each other to add the gdium support ;) Best Regards, Wu Zhangjin From ralf@linux-mips.org Tue May 4 14:25:50 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 14:25:53 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:37370 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492547Ab0EDMZu (ORCPT ); Tue, 4 May 2010 14:25:50 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o44CPhtq011492; Tue, 4 May 2010 13:25:44 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o44CPg9s011489; Tue, 4 May 2010 13:25:42 +0100 Date: Tue, 4 May 2010 13:25:41 +0100 From: Ralf Baechle To: yajin Cc: linux-mips@linux-mips.org, loongson-dev , wuzhangjin@gmail.com, apatard@mandriva.com, ben@simtec.co.uk, vince@simtec.co.uk Subject: Re: [PATCH 5/12] add sm501 pwm support. Message-ID: <20100504122541.GB27286@linux-mips.org> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26577 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips This should be sent to the MFD maintainer. I can merge it but only with his approval. Ralf From yajinzhou@vm-kernel.org Tue May 4 14:43:48 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 14:43:51 +0200 (CEST) Received: from mail-qy0-f192.google.com ([209.85.221.192]:46994 "EHLO mail-qy0-f192.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492575Ab0EDMns (ORCPT ); Tue, 4 May 2010 14:43:48 +0200 Received: by qyk30 with SMTP id 30so5338515qyk.16 for ; Tue, 04 May 2010 05:43:41 -0700 (PDT) MIME-Version: 1.0 Received: by 10.229.251.72 with SMTP id mr8mr2998272qcb.30.1272977021001; Tue, 04 May 2010 05:43:41 -0700 (PDT) Received: by 10.229.212.206 with HTTP; Tue, 4 May 2010 05:43:40 -0700 (PDT) In-Reply-To: References: Date: Tue, 4 May 2010 20:43:40 +0800 Message-ID: Subject: Re: [PATCH 0/12] add basic gdium support From: yajin To: Arnaud Patard Cc: linux-mips@linux-mips.org, loongson-dev , wuzhangjin@gmail.com Content-Type: text/plain; charset=UTF-8 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26578 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yajinzhou@vm-kernel.org Precedence: bulk X-list: linux-mips Hi, I am not sending of MY patches, but the patches based on the previous work of many other people, of course including yours. I have mailed you several days ago about what I am currently doing AND told you my repository URL on repo.or.cz AND suggested about cooperation AND suggested we can share the same repository. So it is not fair for you to say that. > - no respect of patch authorship What do you mean? I remained all the copyright information of original author and NOT adding anything else. > > The gpio patch is even a dup of a patch I sent last week... Sorry for this. I use the wrong repository. Just as wu said, I should use linux-queue.git, not the linux-mips. > What's the aim here ? Sending your patches before mines to annoy me ? Hey, guy. Take it easy. I am sending the patches here because I have got them work and want to be reviewed by both the linux-loongson and linux-mips maillist. I do not intend to annoy anyone. Again, I suggest we can share the same repository, either yours or mine on repo.or.cz. yajin http://vm-kernel.org 2010/5/4 Arnaud Patard : > yajin writes: > > Hi, > >> Gdium is a netbook based on loongson2f CPU and sm502 SOC. It does NOT >> have a south bridge. The sm502 SOC is used for LCD controller and >> audio output. This series of patches are adding gdium support to >> ralf's linux-mips repository. > > what's wrong with you ? I told you I was going to send patches and now > you're sending yours (judging by a quick look) which: > - are incomplete and/or broken > - no respect of patch authorship > > The gpio patch is even a dup of a patch I sent last week... > > What's the aim here ? Sending your patches before mines to annoy me ? > > > Arnaud > From mcdonald.shane@gmail.com Tue May 4 14:56:15 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 15:05:35 +0200 (CEST) Received: from mail-vw0-f49.google.com ([209.85.212.49]:62450 "EHLO mail-vw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492181Ab0EDM4P convert rfc822-to-8bit (ORCPT ); Tue, 4 May 2010 14:56:15 +0200 Received: by vws8 with SMTP id 8so1025034vws.36 for ; Tue, 04 May 2010 05:56:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:received:in-reply-to :references:date:message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=haJAor6uk6i7dggpbjKmgukAwtf3Iy9KXCovjQg42ls=; b=V6J6LJ0soxkWKU8gebSGQiGo5LEtR8esPmjyo3Nh102XGxRK22C7DQKNSbxfIg9LYA 8RUq9lcWBReG1sRjOK0UiYfgKU1MH8U7CVRW1MxYplVcAbRQ07c8r8VsND0g+qz/KGJI FsgbR79aaG4Qlih5i9sTOcsfm78J/sDf5x0Ns= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=gZg2gC/jZE5klrKMVd5OhEE8hF6YORKts4BaY5JdWpcD5LbllylGwovYOhBTdZDhdF sAaKdamlqSOZu9v0gXDFdpadyNrMpCa3i/ZHj31P9CaxE+/CnA4EWHI7ncjpoPiRIWpc +CV5t4oAAf+wYkRFUL4aVBZwz4K782VLLCRSA= MIME-Version: 1.0 Received: by 10.220.124.84 with SMTP id t20mr5460611vcr.114.1272977768698; Tue, 04 May 2010 05:56:08 -0700 (PDT) Received: by 10.220.19.212 with HTTP; Tue, 4 May 2010 05:56:08 -0700 (PDT) In-Reply-To: <4BE00207.6030506@paralogos.com> References: <4BDF366E.5000501@paralogos.com> <4BDF8092.1060401@paralogos.com> <4BE00207.6030506@paralogos.com> Date: Tue, 4 May 2010 06:56:08 -0600 Message-ID: Subject: Re: Unexpected behaviour when catching SIGFPE on FPU-less system From: Shane McDonald To: "Kevin D. Kissell" Cc: linux-mips@linux-mips.org Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26579 X-Approved-By: ralf@linux-mips.org X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mcdonald.shane@gmail.com Precedence: bulk X-list: linux-mips On Tue, May 4, 2010 at 5:16 AM, Kevin D. Kissell wrote: > Shane McDonald wrote: >> When I'm inside my handler, I see the FCSR register has the value 0x8420, >> indicating that the Z bit is set in each of the Cause, Enables, and Flags >> fields.  When longjmp() is called, it tries to write the old FCSR value >> of 0x400 (just the Z bit of the Enables field).  In the emulation code, >> at lines 392 - 394 of file cp1emu.c, is the code: >> >>     if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) { >>             return SIGFPE; >>     } >> >> Given the original FCSR value of 0x8420 and the new value to set >> of 0x400, the Z bit of the Cause field is still set, and as a result, the >> above code causes the SIGFPE exception to be thrown. >> > That's not how I read the code.  If ctx->fcr31 is 0x400, then the result > of the AND should be zero. Sorry, I should have been more clear. In the following chunk of code from cp1emu.c: case ctc_op:{ /* copregister rd <- rt */ u32 value; if (MIPSInst_RT(ir) == 0) value = 0; else value = xcp->regs[MIPSInst_RT(ir)]; /* we only have one writable control reg */ if (MIPSInst_RD(ir) == FPCREG_CSR) { #ifdef CSRTRACE printk("%p gpr[%d]->csr=%08x\n", (void *) (xcp->cp0_epc), MIPSInst_RT(ir), value); #endif value &= (FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03); ctx->fcr31 &= ~(FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03); /* convert to ieee library modes */ ctx->fcr31 |= (value & ~0x3) | ieee_rm[value & 0x3]; } if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) { return SIGFPE; } break; value gets set to an initial value of 0x400, and ctx->fcr31 comes in with an initial value of 0x8420. By the time we hit the if statement around the return SIGFPE, ctx->fcr31 has been set to 0x8400, not the 0x400 I implied. Nevertheless, that's not the problem. You've given me some good pointers for where to begin searching for the problem. If anyone out there has a verification suite they can run on the emulator, that would be much appreciated! Shane From kevink@paralogos.com Tue May 4 18:13:57 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 18:14:00 +0200 (CEST) Received: from gateway05.websitewelcome.com ([69.93.154.37]:59542 "HELO gateway05.websitewelcome.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with SMTP id S1492033Ab0EDQN4 (ORCPT ); Tue, 4 May 2010 18:13:56 +0200 Received: (qmail 7748 invoked from network); 4 May 2010 16:15:47 -0000 Received: from gator750.hostgator.com (174.132.194.2) by gateway05.websitewelcome.com with SMTP; 4 May 2010 16:15:47 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=paralogos.com; h=Received:Message-ID:Date:From:User-Agent:MIME-Version:To:CC:Subject:References:In-Reply-To:Content-Type:Content-Transfer-Encoding; b=FQRMIA2+mRKO2cVJHXTkegtB4GBTOQQfFomtsHMu8mh5BO3UShGUq1sD0W0i1M0YYilHBgu69D3wsJ/Zm/VRwlUsohLm0RHhET23daW/36lhAQYl31n9Ytv5A+3y5jUX; Received: from c-98-207-157-135.hsd1.ca.comcast.net ([98.207.157.135]:3350 helo=[127.0.0.1]) by gator750.hostgator.com with esmtpa (Exim 4.69) (envelope-from ) id 1O9KkF-0006cN-RC; Tue, 04 May 2010 11:13:15 -0500 Message-ID: <4BE0479E.6060506@paralogos.com> Date: Tue, 04 May 2010 09:13:18 -0700 From: "Kevin D. Kissell" User-Agent: Thunderbird 2.0.0.24 (Windows/20100228) MIME-Version: 1.0 To: Shane McDonald CC: linux-mips@linux-mips.org Subject: Re: Unexpected behaviour when catching SIGFPE on FPU-less system References: <4BDF366E.5000501@paralogos.com> <4BDF8092.1060401@paralogos.com> <4BE00207.6030506@paralogos.com> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - gator750.hostgator.com X-AntiAbuse: Original Domain - linux-mips.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - paralogos.com Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26580 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kevink@paralogos.com Precedence: bulk X-list: linux-mips Shane McDonald wrote: > > In the following chunk of code from cp1emu.c: > [snip] > value gets set to an initial value of 0x400, and ctx->fcr31 > comes in with an initial value of 0x8420. > By the time we hit the if statement around the return SIGFPE, ctx->fcr31 > has been set to 0x8400, not the 0x400 I implied. > Ah, well that would rather change things, and you *would* get an exception there. As written, the code doesn't seem to allow the pending exception (.._X) bits to be cleared by the CTC. > Nevertheless, that's not the problem. Maybe it is. I don't have my MIPS specs handy anymore, but just what is supposed to clear a pending exception bit in a real FPU? > You've given me some good pointers > for where to begin searching for the problem. > > If anyone out there has a verification suite they can run on the emulator, > that would be much appreciated! > What we used to use was what I *thought* was an old public domain program whose name was an English word that had something to do with being exacting. Googling with obvious keywords didn't turn it up. Regards, Kevin K. From ralf@linux-mips.org Tue May 4 20:45:01 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 20:45:04 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:41157 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492618Ab0EDSpB (ORCPT ); Tue, 4 May 2010 20:45:01 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o44Iiw5m026114; Tue, 4 May 2010 19:44:59 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o44IivN5026112; Tue, 4 May 2010 19:44:57 +0100 Date: Tue, 4 May 2010 19:44:57 +0100 From: Ralf Baechle To: "Kevin D. Kissell" Cc: Shane McDonald , linux-mips@linux-mips.org Subject: Re: Unexpected behaviour when catching SIGFPE on FPU-less system Message-ID: <20100504184457.GA21929@linux-mips.org> References: <4BDF366E.5000501@paralogos.com> <4BDF8092.1060401@paralogos.com> <4BE00207.6030506@paralogos.com> <4BE0479E.6060506@paralogos.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4BE0479E.6060506@paralogos.com> User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26581 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Tue, May 04, 2010 at 09:13:18AM -0700, Kevin D. Kissell wrote: > What we used to use was what I *thought* was an old public domain > program whose name was an English word that had something to do with > being exacting. Googling with obvious keywords didn't turn it up. Is it paranoia by any chance? Paranoia is available as single files at: http://www.math.utah.edu/~beebe/software/ieee/paranoia.c http://www.math.utah.edu/~beebe/software/ieee/paranoia.h It's ages that soembody last ran it but last known status is that there were no paranoia fault. Ralf From kevink@paralogos.com Tue May 4 20:56:02 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 20:56:06 +0200 (CEST) Received: from gateway05.websitewelcome.com ([69.93.35.13]:57093 "HELO gateway05.websitewelcome.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with SMTP id S1492629Ab0EDS4C (ORCPT ); Tue, 4 May 2010 20:56:02 +0200 Received: (qmail 20699 invoked from network); 4 May 2010 18:58:10 -0000 Received: from gator750.hostgator.com (174.132.194.2) by gateway05.websitewelcome.com with SMTP; 4 May 2010 18:58:10 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=paralogos.com; h=Received:Message-ID:Date:From:User-Agent:MIME-Version:To:CC:Subject:References:In-Reply-To:Content-Type:Content-Transfer-Encoding; b=fa6Kd8HQeoARhSGLrt7I+R57lCSZnyyq1NFsMsVHuAsMPRYAkU2nvICGnQdJQ1Y1qQeQ/Cu5TgJ8iBNpnfTP9Xr7NXXImEbwIeb0VUjW5oBpDiZTOn21CUZvIcBPk0V9; Received: from 216-239-45-4.google.com ([216.239.45.4]:55985 helo=epiktistes.mtv.corp.google.com) by gator750.hostgator.com with esmtpa (Exim 4.69) (envelope-from ) id 1O9NHa-0008D6-JS; Tue, 04 May 2010 13:55:50 -0500 Message-ID: <4BE06DBF.3070409@paralogos.com> Date: Tue, 04 May 2010 11:55:59 -0700 From: "Kevin D. Kissell" User-Agent: Thunderbird 2.0.0.24 (X11/20100317) MIME-Version: 1.0 To: Shane McDonald CC: linux-mips@linux-mips.org Subject: Re: Unexpected behaviour when catching SIGFPE on FPU-less system References: <4BDF366E.5000501@paralogos.com> <4BDF8092.1060401@paralogos.com> <4BE00207.6030506@paralogos.com> <4BE0479E.6060506@paralogos.com> In-Reply-To: <4BE0479E.6060506@paralogos.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - gator750.hostgator.com X-AntiAbuse: Original Domain - linux-mips.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - paralogos.com Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26582 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kevink@paralogos.com Precedence: bulk X-list: linux-mips Kevin D. Kissell wrote: > Shane McDonald wrote: > >> In the following chunk of code from cp1emu.c: >> >> > [snip] > >> value gets set to an initial value of 0x400, and ctx->fcr31 >> comes in with an initial value of 0x8420. >> By the time we hit the if statement around the return SIGFPE, ctx->fcr31 >> has been set to 0x8400, not the 0x400 I implied. >> >> > Ah, well that would rather change things, and you *would* get an > exception there. As written, the code doesn't seem to allow the pending > exception (.._X) bits to be cleared by the CTC. > >> Nevertheless, that's not the problem. >> > Maybe it is. I don't have my MIPS specs handy anymore, but just what is > supposed to clear a pending exception bit in a real FPU? > From old-ish MIPS32 specs out there on the web, it looks like the emulator was doing the right thing in raising the exception - it's specifically called out in the CTC1 definition that writing a value with both a Cause and an Enable (_X and _E) bit set will throw an exception. The question is: Why wasn't the Cause bit cleared? As I mentioned last night, in current kernels running on a real FPU, it gets cleared as part of the assembly-language preamble to servicing a FPU exception, a path which is definitely not taken in the emulator case, which is driven by coprocessor unusable exceptions. So now I'm actually confused by two things: One is where the emulator *should* have its _X flags cleared, and the other is how the current kernel/signal code communicates the nature of a floating point exception to the user. I had thought that either we had a model where a SIGFPE signal carried the FPCR bits as part of its payload (something I've done for other architectures and could have sworn I'd done for MIPS at one point or another), or that the signal handler can inspect the FPCR to know what kind of exception it was. As near as I can tell, when there's a real FPU, we wipe out the evidence before we save the context. Regards, Kevin K. From kevink@paralogos.com Tue May 4 20:58:33 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 20:58:38 +0200 (CEST) Received: from gateway14.websitewelcome.com ([69.93.243.15]:37602 "HELO gateway14.websitewelcome.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with SMTP id S1492709Ab0EDS6d (ORCPT ); Tue, 4 May 2010 20:58:33 +0200 Received: (qmail 11237 invoked from network); 4 May 2010 19:03:24 -0000 Received: from gator750.hostgator.com (174.132.194.2) by gateway14.websitewelcome.com with SMTP; 4 May 2010 19:03:24 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=paralogos.com; h=Received:Message-ID:Date:From:User-Agent:MIME-Version:To:CC:Subject:References:In-Reply-To:Content-Type:Content-Transfer-Encoding; b=WPK27LMTCp/yrI9KeJ2UB1/OwONMj2e12OX4Ld0XHOUEi3+KRRoCvu9uhNyjP4WhUlrZxHkTS2QL/e3JpcVZCBPSFrZQVe+nBjX0Ce72LBUO0Mab0OpVUNmTD4umZWNI; Received: from 216-239-45-4.google.com ([216.239.45.4]:30017 helo=epiktistes.mtv.corp.google.com) by gator750.hostgator.com with esmtpa (Exim 4.69) (envelope-from ) id 1O9NK0-0000IT-Mn; Tue, 04 May 2010 13:58:20 -0500 Message-ID: <4BE06E55.4030002@paralogos.com> Date: Tue, 04 May 2010 11:58:29 -0700 From: "Kevin D. Kissell" User-Agent: Thunderbird 2.0.0.24 (X11/20100317) MIME-Version: 1.0 To: Ralf Baechle CC: Shane McDonald , linux-mips@linux-mips.org Subject: Re: Unexpected behaviour when catching SIGFPE on FPU-less system References: <4BDF366E.5000501@paralogos.com> <4BDF8092.1060401@paralogos.com> <4BE00207.6030506@paralogos.com> <4BE0479E.6060506@paralogos.com> <20100504184457.GA21929@linux-mips.org> In-Reply-To: <20100504184457.GA21929@linux-mips.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - gator750.hostgator.com X-AntiAbuse: Original Domain - linux-mips.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - paralogos.com Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26583 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kevink@paralogos.com Precedence: bulk X-list: linux-mips Ralf Baechle wrote: > On Tue, May 04, 2010 at 09:13:18AM -0700, Kevin D. Kissell wrote: > > >> What we used to use was what I *thought* was an old public domain >> program whose name was an English word that had something to do with >> being exacting. Googling with obvious keywords didn't turn it up. >> > > Is it paranoia by any chance? Paranoia is available as single files at: > > http://www.math.utah.edu/~beebe/software/ieee/paranoia.c > http://www.math.utah.edu/~beebe/software/ieee/paranoia.h > > It's ages that soembody last ran it but last known status is that there > were no paranoia fault. > Yes, that's it! I used to run it all the time when I was working on SMTC FPU support. Shane, does it work on your system with the emulator?? /K. From geert.uytterhoeven@gmail.com Tue May 4 21:28:17 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 21:28:22 +0200 (CEST) Received: from mail-ww0-f49.google.com ([74.125.82.49]:59402 "EHLO mail-ww0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492722Ab0EDT2R convert rfc822-to-8bit (ORCPT ); Tue, 4 May 2010 21:28:17 +0200 Received: by wwf26 with SMTP id 26so78931wwf.36 for ; Tue, 04 May 2010 12:28:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:sender:received :in-reply-to:references:date:x-google-sender-auth:message-id:subject :from:to:cc:content-type:content-transfer-encoding; bh=0VTDwgDTaaEGPuDDOZAM+X/ZrEo6ISvLqhtc9Xgs1SU=; b=rnZCo+TreQ65ogQyZib0YL8r3Qf1fm0c5G2vZ90SGH44IbJq3poqNgDtsk4xdLcS/u 0dzXLlkZoIgXxavIr1GXdKxyWxX8sW2kFuP77C72axU5nTJmFg8C4kZ89ZqURVUEyE+2 i775IH9KKRSncpLRpzcLDxei3Y/2+eqyL9Xrc= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type :content-transfer-encoding; b=ets14hXEy8WzMNIHgDWucwAgf+jpKWpg5C0zpdQce2cJSdgUbJBiXM5CcwtEOgzkAs iecJGNfC/D7J+0oqKYXJ0sTSy/c9elLMuH30j2nqwv+9rzKwr5/KR33aTv9rvGqUvc8A qLIgS1Y6asUUmCqP+6TqB9ZzwqP+VJad8oNws= MIME-Version: 1.0 Received: by 10.216.178.148 with SMTP id f20mr1337746wem.43.1273001290942; Tue, 04 May 2010 12:28:10 -0700 (PDT) Received: by 10.216.93.131 with HTTP; Tue, 4 May 2010 12:28:09 -0700 (PDT) In-Reply-To: <20100504184457.GA21929@linux-mips.org> References: <4BDF8092.1060401@paralogos.com> <4BE00207.6030506@paralogos.com> <4BE0479E.6060506@paralogos.com> <20100504184457.GA21929@linux-mips.org> Date: Tue, 4 May 2010 21:28:09 +0200 X-Google-Sender-Auth: 40a425a0cc9ede97 Message-ID: Subject: Re: Unexpected behaviour when catching SIGFPE on FPU-less system From: Geert Uytterhoeven To: Ralf Baechle Cc: "Kevin D. Kissell" , Shane McDonald , linux-mips@linux-mips.org Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26584 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: geert@linux-m68k.org Precedence: bulk X-list: linux-mips On Tue, May 4, 2010 at 20:44, Ralf Baechle wrote: > On Tue, May 04, 2010 at 09:13:18AM -0700, Kevin D. Kissell wrote: > >> What we used to use was what I *thought* was an old public domain >> program whose name was an English word that had something to do with >> being exacting.  Googling with obvious keywords didn't turn it up. > > Is it paranoia by any chance?  Paranoia is available as single files at: > >  http://www.math.utah.edu/~beebe/software/ieee/paranoia.c >  http://www.math.utah.edu/~beebe/software/ieee/paranoia.h You also need http://www.math.utah.edu/~beebe/software/ieee/args.h Ran fine on: - Toshiba RBTX4927 (with FPU :-) - Mikrotik RouterBOARD 150 (without FPU), using an older 2.6.x OpenWRT kernel Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds From manuel.lauss@googlemail.com Tue May 4 21:30:26 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 21:42:21 +0200 (CEST) Received: from mail-fx0-f49.google.com ([209.85.161.49]:40795 "EHLO mail-fx0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492655Ab0EDTa0 convert rfc822-to-8bit (ORCPT ); Tue, 4 May 2010 21:30:26 +0200 Received: by fxm17 with SMTP id 17so3384724fxm.36 for ; Tue, 04 May 2010 12:30:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=domainkey-signature:mime-version:received:received:in-reply-to :references:date:message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=YwN/iRmqlQBB529NSRsACEofVTOtdPct2yos23QS+3o=; b=hU6EJn2VIZ+kd1z3VB0IIOtfWfWmvbIhc3IOPiwzb34Gr8OxWDwiUu/GlvroFp1PrH AdZSMkPW6niMuS9Q3qUvN4nM4uMIa2ccwRr3UR1fFPLm6SuzSccVEruzb+xOIH13MUFv zM+ecRFqt9C3SBjz9J1QH5mrRIeV3HaEA583Y= DomainKey-Signature: a=rsa-sha1; c=nofws; d=googlemail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=NZINp62MQJTyht6bOpdU56F1RWNYGEEkb9/so3kWcBKNEX7mLb7ieu2OmFXXFPcyWD o8xiK7MDvMR1YIVhsGL6U/el1fXxdR+JZUrmzrJMyf9C0lIYplISdGHEJCzavzdZC7sK ralm+/SypRNKhCw5OBCqt0RlL2WIsKTWtjOOw= MIME-Version: 1.0 Received: by 10.223.5.13 with SMTP id 13mr4529691fat.68.1273001420361; Tue, 04 May 2010 12:30:20 -0700 (PDT) Received: by 10.223.106.12 with HTTP; Tue, 4 May 2010 12:30:20 -0700 (PDT) In-Reply-To: References: <4BDF8092.1060401@paralogos.com> <4BE00207.6030506@paralogos.com> <4BE0479E.6060506@paralogos.com> <20100504184457.GA21929@linux-mips.org> Date: Tue, 4 May 2010 21:30:20 +0200 Message-ID: Subject: Re: Unexpected behaviour when catching SIGFPE on FPU-less system From: Manuel Lauss To: Geert Uytterhoeven Cc: Ralf Baechle , "Kevin D. Kissell" , Shane McDonald , linux-mips@linux-mips.org Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26585 X-Approved-By: ralf@linux-mips.org X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: manuel.lauss@googlemail.com Precedence: bulk X-list: linux-mips On Tue, May 4, 2010 at 9:28 PM, Geert Uytterhoeven wrote: > On Tue, May 4, 2010 at 20:44, Ralf Baechle wrote: >> On Tue, May 04, 2010 at 09:13:18AM -0700, Kevin D. Kissell wrote: >> >>> What we used to use was what I *thought* was an old public domain >>> program whose name was an English word that had something to do with >>> being exacting.  Googling with obvious keywords didn't turn it up. >> >> Is it paranoia by any chance?  Paranoia is available as single files at: >> >>  http://www.math.utah.edu/~beebe/software/ieee/paranoia.c >>  http://www.math.utah.edu/~beebe/software/ieee/paranoia.h > > You also need > > http://www.math.utah.edu/~beebe/software/ieee/args.h > > Ran fine on: >  - Toshiba RBTX4927 (with FPU :-) >  - Mikrotik RouterBOARD 150 (without FPU), using an older 2.6.x OpenWRT kernel and runs into an endless loop around line 806 when built with a softfloat toolchain (gcc-4.4.3). Manuel From geert.uytterhoeven@gmail.com Tue May 4 21:44:42 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 21:44:45 +0200 (CEST) Received: from mail-wy0-f177.google.com ([74.125.82.177]:58808 "EHLO mail-wy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492716Ab0EDTom convert rfc822-to-8bit (ORCPT ); Tue, 4 May 2010 21:44:42 +0200 Received: by wyg36 with SMTP id 36so2378341wyg.36 for ; Tue, 04 May 2010 12:44:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:sender:received :in-reply-to:references:date:x-google-sender-auth:message-id:subject :from:to:cc:content-type:content-transfer-encoding; bh=t1XZyxvIaEfsAQkmISyfvc95YDouLNsMQa8ElGADFs0=; b=qankxMMsmgt3t4wyIXD7pCDFn0W8w8HQQrLdJlOQp87nFeRmG4heZnhGNArS0pETtM L7VF2wNxLYhzm4RGvklrCzuLazb9YXI5ypcQEE+46k3dd97ircrk0Kh8XExUu2TL4Isy oxdeuFXsO5b70YjJ99JIw8uGLPxHJt2f6eY9Y= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type :content-transfer-encoding; b=LLr+qV0D/gSXIZRSaJeQ9Pz3ImeoRhxslnKZebPqCRcb1vfvH8wKhtOGT80FS3CNVn eiHd3qS5VADC++MdlabUZFYXtV6EnNAcNDG+NlM90cYSDTyulBO0pPEhxaWq9TTz7I7e SsTZCf+5lfLI7Fx4Xnlbx6gfE8pjMdBCzDvao= MIME-Version: 1.0 Received: by 10.216.85.70 with SMTP id t48mr2005289wee.59.1273002274577; Tue, 04 May 2010 12:44:34 -0700 (PDT) Received: by 10.216.93.131 with HTTP; Tue, 4 May 2010 12:44:34 -0700 (PDT) In-Reply-To: References: <4BE00207.6030506@paralogos.com> <4BE0479E.6060506@paralogos.com> <20100504184457.GA21929@linux-mips.org> Date: Tue, 4 May 2010 21:44:34 +0200 X-Google-Sender-Auth: e5c6875f379b105b Message-ID: Subject: Re: Unexpected behaviour when catching SIGFPE on FPU-less system From: Geert Uytterhoeven To: Manuel Lauss Cc: Ralf Baechle , "Kevin D. Kissell" , Shane McDonald , linux-mips@linux-mips.org Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26586 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: geert@linux-m68k.org Precedence: bulk X-list: linux-mips On Tue, May 4, 2010 at 21:30, Manuel Lauss wrote: > On Tue, May 4, 2010 at 9:28 PM, Geert Uytterhoeven wrote: >> On Tue, May 4, 2010 at 20:44, Ralf Baechle wrote: >>> On Tue, May 04, 2010 at 09:13:18AM -0700, Kevin D. Kissell wrote: >>> >>>> What we used to use was what I *thought* was an old public domain >>>> program whose name was an English word that had something to do with >>>> being exacting.  Googling with obvious keywords didn't turn it up. >>> >>> Is it paranoia by any chance?  Paranoia is available as single files at: >>> >>>  http://www.math.utah.edu/~beebe/software/ieee/paranoia.c >>>  http://www.math.utah.edu/~beebe/software/ieee/paranoia.h >> >> You also need >> >> http://www.math.utah.edu/~beebe/software/ieee/args.h >> >> Ran fine on: >>  - Toshiba RBTX4927 (with FPU :-) >>  - Mikrotik RouterBOARD 150 (without FPU), using an older 2.6.x OpenWRT kernel > > and runs into an endless loop around line 806 when built with > a softfloat toolchain (gcc-4.4.3). I used my kernel cross-toolchain (gcc version 4.1.2 20061115 (prerelease) (Ubuntu 4.1.1-21)), with Debian libs, and -static to make it run on the RB150. I retried with the OpenWRT toolchain (also 4.1.2, presumably softfloat) I had still lying around, and it worked, too. I got small differences in the last 2 digits, though, so I guess it actually is softfloat. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds From David.Daney@caviumnetworks.com Tue May 4 22:02:13 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 22:02:19 +0200 (CEST) Received: from mail3.caviumnetworks.com ([12.108.191.235]:11809 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492741Ab0EDUCN (ORCPT ); Tue, 4 May 2010 22:02:13 +0200 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Tue, 04 May 2010 13:02:24 -0700 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Tue, 4 May 2010 13:01:28 -0700 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Tue, 4 May 2010 13:01:28 -0700 Message-ID: <4BE07D13.6010105@caviumnetworks.com> Date: Tue, 04 May 2010 13:01:23 -0700 From: David Daney User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.9) Gecko/20100330 Fedora/3.0.4-1.fc12 Thunderbird/3.0.4 MIME-Version: 1.0 To: Manuel Lauss CC: Geert Uytterhoeven , Ralf Baechle , "Kevin D. Kissell" , Shane McDonald , linux-mips@linux-mips.org Subject: Re: Unexpected behaviour when catching SIGFPE on FPU-less system References: <4BDF8092.1060401@paralogos.com> <4BE00207.6030506@paralogos.com> <4BE0479E.6060506@paralogos.com> <20100504184457.GA21929@linux-mips.org> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 04 May 2010 20:01:28.0189 (UTC) FILETIME=[9525F2D0:01CAEBC4] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26587 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips On 05/04/2010 12:30 PM, Manuel Lauss wrote: > On Tue, May 4, 2010 at 9:28 PM, Geert Uytterhoeven wrote: >> On Tue, May 4, 2010 at 20:44, Ralf Baechle wrote: >>> On Tue, May 04, 2010 at 09:13:18AM -0700, Kevin D. Kissell wrote: >>> >>>> What we used to use was what I *thought* was an old public domain >>>> program whose name was an English word that had something to do with >>>> being exacting. Googling with obvious keywords didn't turn it up. >>> >>> Is it paranoia by any chance? Paranoia is available as single files at: >>> >>> http://www.math.utah.edu/~beebe/software/ieee/paranoia.c >>> http://www.math.utah.edu/~beebe/software/ieee/paranoia.h >> >> You also need >> >> http://www.math.utah.edu/~beebe/software/ieee/args.h >> >> Ran fine on: >> - Toshiba RBTX4927 (with FPU :-) >> - Mikrotik RouterBOARD 150 (without FPU), using an older 2.6.x OpenWRT kernel > > and runs into an endless loop around line 806 when built with > a softfloat toolchain (gcc-4.4.3). > From the point of view of this specific problem, using a softfloat toolchain isn't what you want to do. The question is if the kernel's FP emulator is operating correctly, if you never execute any FP instructions (due to the use of a softfloat toolchain), you would not be testing the emulator. David Daney From kevink@paralogos.com Tue May 4 23:23:52 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 23:23:57 +0200 (CEST) Received: from gateway16.websitewelcome.com ([69.56.185.3]:44416 "HELO gateway16.websitewelcome.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with SMTP id S1492741Ab0EDVXw (ORCPT ); Tue, 4 May 2010 23:23:52 +0200 Received: (qmail 22696 invoked from network); 4 May 2010 21:27:10 -0000 Received: from gator750.hostgator.com (174.132.194.2) by gateway16.websitewelcome.com with SMTP; 4 May 2010 21:27:10 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=paralogos.com; h=Received:Message-ID:Date:From:User-Agent:MIME-Version:To:CC:Subject:References:In-Reply-To:Content-Type:Content-Transfer-Encoding; b=r6VebV5DTgEuMOyQVmk7GLhwwnR5G9SQiopG1FCeGRf3kLNQOpsPkSSOvGRxzrXL990BHcLvPIaqe3HIGgIRVUeD+zfilZphjUmwgkf3n6tayv9QtMpMvBfMYqIJvBfl; Received: from 216-239-45-4.google.com ([216.239.45.4]:48297 helo=epiktistes.mtv.corp.google.com) by gator750.hostgator.com with esmtpa (Exim 4.69) (envelope-from ) id 1O9Pad-0004Ey-2V; Tue, 04 May 2010 16:23:39 -0500 Message-ID: <4BE09064.8010001@paralogos.com> Date: Tue, 04 May 2010 14:23:48 -0700 From: "Kevin D. Kissell" User-Agent: Thunderbird 2.0.0.24 (X11/20100317) MIME-Version: 1.0 To: David Daney CC: Manuel Lauss , Geert Uytterhoeven , Ralf Baechle , Shane McDonald , linux-mips@linux-mips.org Subject: Re: Unexpected behaviour when catching SIGFPE on FPU-less system References: <4BDF8092.1060401@paralogos.com> <4BE00207.6030506@paralogos.com> <4BE0479E.6060506@paralogos.com> <20100504184457.GA21929@linux-mips.org> <4BE07D13.6010105@caviumnetworks.com> In-Reply-To: <4BE07D13.6010105@caviumnetworks.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - gator750.hostgator.com X-AntiAbuse: Original Domain - linux-mips.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - paralogos.com Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26588 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kevink@paralogos.com Precedence: bulk X-list: linux-mips David Daney wrote: > On 05/04/2010 12:30 PM, Manuel Lauss wrote: >> On Tue, May 4, 2010 at 9:28 PM, Geert >> Uytterhoeven wrote: >>> On Tue, May 4, 2010 at 20:44, Ralf Baechle wrote: >>>> Is it paranoia by any chance? Paranoia is available as single >>>> files at: >>>> >>>> http://www.math.utah.edu/~beebe/software/ieee/paranoia.c >>>> http://www.math.utah.edu/~beebe/software/ieee/paranoia.h >>> >>> You also need >>> >>> http://www.math.utah.edu/~beebe/software/ieee/args.h >>> >>> Ran fine on: >>> - Toshiba RBTX4927 (with FPU :-) >>> - Mikrotik RouterBOARD 150 (without FPU), using an older 2.6.x >>> OpenWRT kernel >> >> and runs into an endless loop around line 806 when built with >> a softfloat toolchain (gcc-4.4.3). >> > > From the point of view of this specific problem, using a softfloat > toolchain isn't what you want to do. That's absolutely true. I would mention, however, that in ancient times, I built and ran paranoia with a couple of different softfloat libraries, and was able to make it work with them. If people care about softfloat (and I think they should), this should probably be investigated. Easy for me to say, though... ;o) Regards, Kevin K. From kevink@paralogos.com Tue May 4 23:52:09 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 May 2010 23:52:12 +0200 (CEST) Received: from gateway09.websitewelcome.com ([69.93.82.29]:59493 "HELO gateway09.websitewelcome.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with SMTP id S1492152Ab0EDVwJ (ORCPT ); Tue, 4 May 2010 23:52:09 +0200 Received: (qmail 14289 invoked from network); 4 May 2010 21:55:13 -0000 Received: from gator750.hostgator.com (174.132.194.2) by gateway09.websitewelcome.com with SMTP; 4 May 2010 21:55:13 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=paralogos.com; h=Received:Message-ID:Date:From:User-Agent:MIME-Version:To:CC:Subject:References:In-Reply-To:Content-Type:Content-Transfer-Encoding; b=AcCaa/e/Tmr3PuLkyBa92NB5xPEyotIvu7OGlhxT/z2wFW5sx8utmcYlkRHFyOVqpAI3xLAZeimOtpakCjKeL70AiLCV3ZBBGSHz4h29gKnMlHA+iFfr2kBrXCiKOaye; Received: from 216-239-45-4.google.com ([216.239.45.4]:19064 helo=epiktistes.mtv.corp.google.com) by gator750.hostgator.com with esmtpa (Exim 4.69) (envelope-from ) id 1O9Q1z-0002C2-0M; Tue, 04 May 2010 16:51:55 -0500 Message-ID: <4BE09705.6030705@paralogos.com> Date: Tue, 04 May 2010 14:52:05 -0700 From: "Kevin D. Kissell" User-Agent: Thunderbird 2.0.0.24 (X11/20100317) MIME-Version: 1.0 To: Shane McDonald CC: linux-mips@linux-mips.org Subject: Re: Unexpected behaviour when catching SIGFPE on FPU-less system References: <4BDF366E.5000501@paralogos.com> <4BDF8092.1060401@paralogos.com> <4BE00207.6030506@paralogos.com> <4BE0479E.6060506@paralogos.com> In-Reply-To: <4BE0479E.6060506@paralogos.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - gator750.hostgator.com X-AntiAbuse: Original Domain - linux-mips.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - paralogos.com Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26589 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kevink@paralogos.com Precedence: bulk X-list: linux-mips Kevin D. Kissell wrote: > Shane McDonald wrote: > >> In the following chunk of code from cp1emu.c: >> >> > [snip] > >> value gets set to an initial value of 0x400, and ctx->fcr31 >> comes in with an initial value of 0x8420. >> By the time we hit the if statement around the return SIGFPE, ctx->fcr31 >> has been set to 0x8400, not the 0x400 I implied. >> >> > Ah, well that would rather change things, and you *would* get an > exception there. As written, the code doesn't seem to allow the pending > exception (.._X) bits to be cleared by the CTC. > >> Nevertheless, that's not the problem. >> > Maybe it is. OK, sorry to have been looking at this in fits and starts, but indeed, I submit that the bug is indeed in that ctc_op: case of the emulator. The Cause bits (17:12) are supposed to be writable by that instruction, but the CTC1 emulation won't let them be updated by the instruction. I don't have the means to generate, test, and submit a proper patch, but I think that actually if you just completely removed lines 387-388: value &= (FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03); ctx->fcr31 &= ~(FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S |0x03); Things would work a good deal better. At least, it would be a more accurate emulation of the architecturally defined FPU. If I wanted to be really, really pedantic (which I sometimes do), I'd also protect the reserved bits that aren't necessarily writable, so we'd nuke those two lines, then have /* Don't write reserved bits, and convert to ieee library modes */ ctx->fcr31 = (value & ~0x1c0003) | ieee_rm[value & 0x3]; Note that I've changed the existing |= to a direct assignment here. Hope this helps. /K. From mcdonald.shane@gmail.com Wed May 5 06:02:28 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 May 2010 06:02:33 +0200 (CEST) Received: from mail-iw0-f177.google.com ([209.85.223.177]:56335 "EHLO mail-iw0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491047Ab0EEEC1 (ORCPT ); Wed, 5 May 2010 06:02:27 +0200 Received: by iwn7 with SMTP id 7so5636791iwn.24 for ; Tue, 04 May 2010 21:02:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:received:to:subject :message-id:from:date; bh=/HktCbY8dS3hwuiuuFyaSgj9T2ZbceAXK6QENjaVjaM=; b=EZgDyId6QiuCkIlgzJTMkmh6A1Y7WX4xLO7BAgXEMPt1ZDGX6Lgorh/obG1JhOG/2M ogapWvHpObSKO+For0F2Rd94nB4ummjZLeXNZK1aUMXv6r8/TeeSGETkccMO0Qfh+Tes 814WOHrqolisuRf7JmJL1QjROfTi2Uzp7q7Ms= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=to:subject:message-id:from:date; b=fmENg3NU8ZBOwRdJlRd5d7O/d65RlofMF97H4mEacg+b0jUjK5xAiMDmU0QDSZ3JSw He2ECEY48Aecoo6QwstZO5cU864tLRy6F/98HbtcY40a2e6alAs507OyJCw7OAPNXeHo 6GKteJqXbZ8fQRVfTZrbpNcZTFkl2PHFyXNDo= Received: by 10.231.166.8 with SMTP id k8mr1497435iby.93.1273032141416; Tue, 04 May 2010 21:02:21 -0700 (PDT) Received: from localhost ([207.47.250.203]) by mx.google.com with ESMTPS id 21sm5846176iwn.15.2010.05.04.21.02.20 (version=TLSv1/SSLv3 cipher=RC4-MD5); Tue, 04 May 2010 21:02:20 -0700 (PDT) Received: from shane by localhost with local (Exim 4.69) (envelope-from ) id 1O9VoP-0001Zl-Qw; Tue, 04 May 2010 22:02:17 -0600 To: kevink@paralogos.com, linux-mips@linux-mips.org, ralf@linux-mips.org Subject: [MIPS] FPU emulator: allow Cause bits of FCSR to be writeable by ctc1 Message-Id: From: Shane McDonald Date: Tue, 04 May 2010 22:02:17 -0600 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26590 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mcdonald.shane@gmail.com Precedence: bulk X-list: linux-mips In the FPU emulator code of the MIPS, the Cause bits of the FCSR register are not currently writeable by the ctc1 instruction. In odd corner cases, this can cause problems. For example, a case existed where a divide-by-zero exception was generated by the FPU, and the signal handler attempted to restore the FPU registers to their state before the exception occurred. In this particular setup, writing the old value to the FCSR register would cause another divide-by-zero exception to occur immediately. The solution is to change the ctc1 instruction emulator code to allow the Cause bits of the FCSR register to be writeable. This is the behaviour of the hardware that the code is emulating. This problem was found by Shane McDonald, but the credit for the fix goes to Kevin Kissell. In Kevin's words: I submit that the bug is indeed in that ctc_op: case of the emulator. The Cause bits (17:12) are supposed to be writable by that instruction, but the CTC1 emulation won't let them be updated by the instruction. I think that actually if you just completely removed lines 387-388 [...] things would work a good deal better. At least, it would be a more accurate emulation of the architecturally defined FPU. If I wanted to be really, really pedantic (which I sometimes do), I'd also protect the reserved bits that aren't necessarily writable. Signed-off-by: Shane McDonald --- arch/mips/math-emu/cp1emu.c | 9 +++++---- 1 files changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c index 8f2f8e9..c756fd9 100644 --- a/arch/mips/math-emu/cp1emu.c +++ b/arch/mips/math-emu/cp1emu.c @@ -384,10 +384,11 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) (void *) (xcp->cp0_epc), MIPSInst_RT(ir), value); #endif - value &= (FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03); - ctx->fcr31 &= ~(FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03); - /* convert to ieee library modes */ - ctx->fcr31 |= (value & ~0x3) | ieee_rm[value & 0x3]; + + /* Don't write reserved bits, + and convert to ieee library modes */ + ctx->fcr31 = (value & ~0x1c0003) | + ieee_rm[value & 0x3]; } if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) { return SIGFPE; -- 1.6.2.4 From kevink@paralogos.com Wed May 5 09:48:37 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 May 2010 09:48:40 +0200 (CEST) Received: from gateway09.websitewelcome.com ([67.18.22.68]:60191 "HELO gateway09.websitewelcome.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with SMTP id S1491860Ab0EEHsg (ORCPT ); Wed, 5 May 2010 09:48:36 +0200 Received: (qmail 28273 invoked from network); 5 May 2010 07:51:41 -0000 Received: from gator750.hostgator.com (174.132.194.2) by gateway09.websitewelcome.com with SMTP; 5 May 2010 07:51:41 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=paralogos.com; h=Received:Message-ID:Date:From:User-Agent:MIME-Version:To:CC:Subject:References:In-Reply-To:Content-Type:Content-Transfer-Encoding; b=ivs9+/MjjRlRpsrIqOouE/nJo4KqLSYY24vrCebp35qVVNzmYpW6IYDwVxcqoaP1YIsMOeRrAWdFMdVsI0jkN7M94LVXw9NijClTLUS6S6VupBUJeurJJykjqiGPje7v; Received: from c-98-207-157-135.hsd1.ca.comcast.net ([98.207.157.135]:4411 helo=[127.0.0.1]) by gator750.hostgator.com with esmtpa (Exim 4.69) (envelope-from ) id 1O9ZLK-0006IL-9s; Wed, 05 May 2010 02:48:30 -0500 Message-ID: <4BE122D1.3000609@paralogos.com> Date: Wed, 05 May 2010 00:48:33 -0700 From: "Kevin D. Kissell" User-Agent: Thunderbird 2.0.0.24 (Windows/20100228) MIME-Version: 1.0 To: Shane McDonald CC: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [MIPS] FPU emulator: allow Cause bits of FCSR to be writeable by ctc1 References: In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - gator750.hostgator.com X-AntiAbuse: Original Domain - linux-mips.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - paralogos.com Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26591 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kevink@paralogos.com Precedence: bulk X-list: linux-mips I'm glad to hear that the patch is functional. It was pretty clear that it would solve your problem, but I was concerned that the inability to write the Cause bits was done as a way around some other problem. Someone went to a certain amount of trouble to not accept them as inputs, in violation of spec. I just looked back, and the bug was introduced as part of a patch of Ralf's from April 2005 entitled "Fix Preemption and SMP problems in the FP emulator". It's unlikely that overriding CTC semantics actually fixed any underlying problems, but it may have masked symptoms of problems that we can only hope have been fixed in the mean time. Anyone run this patch on an FPUless SMP? Oh, for a 34Kf with a bunch of TCs! ;o) Shane McDonald wrote: > In the FPU emulator code of the MIPS, the Cause bits of the FCSR > register are not currently writeable by the ctc1 instruction. > In odd corner cases, this can cause problems. For example, > a case existed where a divide-by-zero exception was generated > by the FPU, and the signal handler attempted to restore the FPU > registers to their state before the exception occurred. In this > particular setup, writing the old value to the FCSR register > would cause another divide-by-zero exception to occur immediately. > The solution is to change the ctc1 instruction emulator code to > allow the Cause bits of the FCSR register to be writeable. > This is the behaviour of the hardware that the code is emulating. > > This problem was found by Shane McDonald, but the credit for the > fix goes to Kevin Kissell. In Kevin's words: > > I submit that the bug is indeed in that ctc_op: case of the emulator. The > Cause bits (17:12) are supposed to be writable by that instruction, but the > CTC1 emulation won't let them be updated by the instruction. I think that > actually if you just completely removed lines 387-388 [...] > things would work a good deal better. At least, it would be a more accurate > emulation of the architecturally defined FPU. If I wanted to be really, > really pedantic (which I sometimes do), I'd also protect the reserved bits > that aren't necessarily writable. > > Signed-off-by: Shane McDonald > --- > arch/mips/math-emu/cp1emu.c | 9 +++++---- > 1 files changed, 5 insertions(+), 4 deletions(-) > > diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c > index 8f2f8e9..c756fd9 100644 > --- a/arch/mips/math-emu/cp1emu.c > +++ b/arch/mips/math-emu/cp1emu.c > @@ -384,10 +384,11 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) > (void *) (xcp->cp0_epc), > MIPSInst_RT(ir), value); > #endif > - value &= (FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03); > - ctx->fcr31 &= ~(FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03); > - /* convert to ieee library modes */ > - ctx->fcr31 |= (value & ~0x3) | ieee_rm[value & 0x3]; > + > + /* Don't write reserved bits, > + and convert to ieee library modes */ > + ctx->fcr31 = (value & ~0x1c0003) | > + ieee_rm[value & 0x3]; > } > if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) { > return SIGFPE; > From ralf@linux-mips.org Wed May 5 11:12:20 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 May 2010 11:12:44 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:34112 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491862Ab0EEJMU (ORCPT ); Wed, 5 May 2010 11:12:20 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o459CFf9019261; Wed, 5 May 2010 10:12:16 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o459C04d019250; Wed, 5 May 2010 10:12:00 +0100 Date: Wed, 5 May 2010 10:11:59 +0100 From: Ralf Baechle To: "Kevin D. Kissell" Cc: Shane McDonald , linux-mips@linux-mips.org, Atsushi Nemoto Subject: Re: [MIPS] FPU emulator: allow Cause bits of FCSR to be writeable by ctc1 Message-ID: <20100505091159.GA4016@linux-mips.org> References: <4BE122D1.3000609@paralogos.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4BE122D1.3000609@paralogos.com> User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26592 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Wed, May 05, 2010 at 12:48:33AM -0700, Kevin D. Kissell wrote: > I'm glad to hear that the patch is functional. It was pretty clear that > it would solve your problem, but I was concerned that the inability to > write the Cause bits was done as a way around some other problem. > Someone went to a certain amount of trouble to not accept them as > inputs, in violation of spec. I just looked back, and the bug was > introduced as part of a patch of Ralf's from April 2005 entitled "Fix > Preemption and SMP problems in the FP emulator". It's unlikely that > overriding CTC semantics actually fixed any underlying problems, but it > may have masked symptoms of problems that we can only hope have been > fixed in the mean time. Anyone run this patch on an FPUless SMP? Oh, > for a 34Kf with a bunch of TCs! ;o) That's commit ID 72402ec9efdb2ea7e0ec6223cf20e7301a57da02 and the patch was comitted during the CVS days which only records the comitter but not the author. The actual author is Atsushi Nemoto. Ralf From ben@simtec.co.uk Wed May 5 14:15:27 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 May 2010 14:15:30 +0200 (CEST) Received: from hull.simtec.co.uk ([78.105.113.97]:55871 "EHLO preston.local.simtec.co.uk" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491199Ab0EEMP0 (ORCPT ); Wed, 5 May 2010 14:15:26 +0200 Received: from [192.168.101.34] by preston.local.simtec.co.uk with esmtp (Exim 4.69) (envelope-from ) id 1O9dVZ-0002mE-8d; Wed, 05 May 2010 13:15:21 +0100 Message-ID: <4BE1614D.1090008@simtec.co.uk> Date: Wed, 05 May 2010 21:15:09 +0900 From: Ben Dooks User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.9) Gecko/20100423 Thunderbird/3.0.4 MIME-Version: 1.0 To: yajin CC: linux-mips@linux-mips.org Subject: Re: [PATCH 10/12] add the sm501fb option to sm501 fb driver References: In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26593 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ben@simtec.co.uk Precedence: bulk X-list: linux-mips On 04/05/10 18:55, yajin wrote: > Currently the sm501 mode can only be fetched from modedb.c. > Unfortunately the modes in modedb.c are not complete. For example it > lacks the resolution of 1024x600. So the sm501 fb driver should have > the ability to accept the mode option from linux command line. Why not get this added to the main mode database instead of adding a new one into the sm501 driver? Secondly, why isn't this on the framebuffer list or linux-kernel? > Signed-off-by: yajin > --- > drivers/video/sm501fb.c | 67 +++++++++++++++++++++++++++++++++++++++++++++- > 1 files changed, 65 insertions(+), 2 deletions(-) > > diff --git a/drivers/video/sm501fb.c b/drivers/video/sm501fb.c > index b7dc180..f2c69ca 100644 > --- a/drivers/video/sm501fb.c > +++ b/drivers/video/sm501fb.c > @@ -43,6 +43,37 @@ > > #define NR_PALETTE 256 > > +static char *mode_option; > +module_param_named(mode, mode_option, charp, 0); > +MODULE_PARM_DESC(mode, "Initial mode"); > + > +/* > + * SM501 Mode > + * 1024X600 is not defined in default mode(modedb.c). > + */ > +static const struct fb_videomode sm501_modedb[] __initdata = { > + { > + /* 1024x600-60 */ > + NULL, 60, 1024, 600, 20423, 144, 40, 18, 1, 104, 3, > + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED > + }, > + { > + /* 1024x600-70 */ > + NULL, 70, 1024, 600, 17211, 152, 48, 21, 1, 104, 3, > + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED > + }, > + { > + /* 1024x600-75 */ > + NULL, 75, 1024, 600, 15822, 160, 56, 23, 1, 104, 3, > + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED > + }, > + { > + /* 1024x600-85 */ > + NULL, 85, 1024, 600, 13730, 168, 56, 26, 1, 112, 3, > + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED > + } > +}; > + > enum sm501_controller { > HEAD_CRT = 0, > HEAD_PANEL = 1, > @@ -1729,8 +1760,16 @@ static int sm501fb_init_fb(struct fb_info *fb, > fb->var.xres_virtual = fb->var.xres; > fb->var.yres_virtual = fb->var.yres; > } else { > - ret = fb_find_mode(&fb->var, fb, > - NULL, NULL, 0, NULL, 8); > + if (mode_option) { > + dev_info(info->dev, "using user defined mode:" > + " %s\n", mode_option); > + ret = fb_find_mode(&fb->var, fb, > + mode_option, sm501_modedb, > + ARRAY_SIZE(sm501_modedb), > + NULL, fb->var.bits_per_pixel); > + } else > + ret = fb_find_mode(&fb->var, fb, > + NULL, NULL, 0, NULL, 8); > > if (ret == 0 || ret == 4) { > dev_err(info->dev, > @@ -2136,8 +2175,32 @@ static struct platform_driver sm501fb_driver = { > }, > }; > > +#ifndef MODULE > +static int __devinit sm501fb_setup(char *options) > +{ > + char *this_opt; > + > + if (!options || !*options) > + return 0; > + > + while ((this_opt = strsep(&options, ",")) != NULL) { > + if (!*this_opt) > + continue; > + mode_option = this_opt; > + } > + return 0; > +} > +#endif > + > static int __devinit sm501fb_init(void) > { > +#ifndef MODULE > + char *option = NULL; > + > + if (fb_get_options("sm501fb", &option)) > + return -ENODEV; > + sm501fb_setup(option); > +#endif > return platform_driver_register(&sm501fb_driver); > } > From arnaud.patard@mandriva.com Wed May 5 14:32:11 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 May 2010 14:32:14 +0200 (CEST) Received: from mx1.moondrake.net ([212.85.150.166]:44652 "EHLO mx1.mandriva.com" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1490984Ab0EEMcL (ORCPT ); Wed, 5 May 2010 14:32:11 +0200 Received: by mx1.mandriva.com (Postfix, from userid 501) id 17E3C27C010; Wed, 5 May 2010 14:32:09 +0200 (CEST) Received: from office-abk.mandriva.com (unknown [195.7.104.248]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.mandriva.com (Postfix) with ESMTP id 099FB27C009; Wed, 5 May 2010 14:32:09 +0200 (CEST) Received: from anduin.mandriva.com (fw2.mandriva.com [192.168.2.3]) by office-abk.mandriva.com (Postfix) with ESMTP id 0CCA58458A; Wed, 5 May 2010 14:50:08 +0200 (CEST) Received: from anduin.mandriva.com (localhost [127.0.0.1]) by anduin.mandriva.com (Postfix) with ESMTP id 0400FFF855; Wed, 5 May 2010 14:32:15 +0200 (CEST) From: Arnaud Patard To: Ben Dooks Cc: yajin , linux-mips@linux-mips.org Subject: Re: [PATCH 10/12] add the sm501fb option to sm501 fb driver References: <4BE1614D.1090008@simtec.co.uk> Organization: Mandriva Date: Wed, 05 May 2010 14:32:15 +0200 In-Reply-To: <4BE1614D.1090008@simtec.co.uk> (Ben Dooks's message of "Wed, 05 May 2010 21:15:09 +0900") Message-ID: User-Agent: Gnus/5.1008 (Gnus v5.10.8) Emacs/22.1 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26594 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: apatard@mandriva.com Precedence: bulk X-list: linux-mips Ben Dooks writes: Hi, > On 04/05/10 18:55, yajin wrote: >> Currently the sm501 mode can only be fetched from modedb.c. >> Unfortunately the modes in modedb.c are not complete. For example it >> lacks the resolution of 1024x600. So the sm501 fb driver should have >> the ability to accept the mode option from linux command line. > > Why not get this added to the main mode database instead of > adding a new one into the sm501 driver? fwiw, the original patch is putting it in the main database. Please wait that all this stuff is sorted out. Theses patches are based on the patches I'm working on and are adding some bugs in them. Arnaud From yajinzhou@vm-kernel.org Wed May 5 15:17:37 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 May 2010 15:17:41 +0200 (CEST) Received: from mail-vw0-f48.google.com ([209.85.212.48]:62580 "EHLO mail-vw0-f48.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492061Ab0EENRh (ORCPT ); Wed, 5 May 2010 15:17:37 +0200 Received: by vws13 with SMTP id 13so4067211vws.35 for ; Wed, 05 May 2010 06:17:30 -0700 (PDT) MIME-Version: 1.0 Received: by 10.229.214.147 with SMTP id ha19mr4201094qcb.90.1273065449454; Wed, 05 May 2010 06:17:29 -0700 (PDT) Received: by 10.229.212.206 with HTTP; Wed, 5 May 2010 06:17:29 -0700 (PDT) In-Reply-To: References: <4BE1614D.1090008@simtec.co.uk> Date: Wed, 5 May 2010 21:17:29 +0800 Message-ID: Subject: Re: [PATCH 10/12] add the sm501fb option to sm501 fb driver From: yajin To: Arnaud Patard Cc: Ben Dooks , linux-mips@linux-mips.org Content-Type: text/plain; charset=UTF-8 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26595 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yajinzhou@vm-kernel.org Precedence: bulk X-list: linux-mips Hi, >> Why not get this added to the main mode database instead of >> adding a new one into the sm501 driver? > fwiw, the original patch is putting it in the main database. According to the Documentation/fb/modedb.txt, that's because the modedb.c provides one generic video mode database with a fair amount of standard videomodes. Yes, 1024x600 can be added to maindb, but I am wondering whether it is a generic video mode. If so, there should be 1024x600 in main database already. yajin http://vm-kernel.org 2010/5/5 Arnaud Patard : > Ben Dooks writes: > > Hi, > >> On 04/05/10 18:55, yajin wrote: >>> Currently the sm501 mode can only be fetched from modedb.c. >>> Unfortunately the modes in modedb.c are not complete. For example it >>> lacks the resolution of 1024x600. So the sm501 fb driver should have >>> the ability to accept the mode option from linux command line. >> >> Why not get this added to the main mode database instead of >> adding a new one into the sm501 driver? > > fwiw, the original patch is putting it in the main database. Please > wait that all this stuff is sorted out. Theses patches are based on the > patches I'm working on and are adding some bugs in them. > > Arnaud > From arnaud.patard@mandriva.com Wed May 5 15:31:10 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 May 2010 15:31:13 +0200 (CEST) Received: from mx1.moondrake.net ([212.85.150.166]:37278 "EHLO mx1.mandriva.com" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1492083Ab0EENbK (ORCPT ); Wed, 5 May 2010 15:31:10 +0200 Received: by mx1.mandriva.com (Postfix, from userid 501) id 9144727C016; Wed, 5 May 2010 15:31:08 +0200 (CEST) Received: from office-abk.mandriva.com (unknown [195.7.104.248]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.mandriva.com (Postfix) with ESMTP id A79F827C015; Wed, 5 May 2010 15:31:07 +0200 (CEST) Received: from anduin.mandriva.com (fw2.mandriva.com [192.168.2.3]) by office-abk.mandriva.com (Postfix) with ESMTP id E44AA8427F; Wed, 5 May 2010 15:49:06 +0200 (CEST) Received: from anduin.mandriva.com (localhost [127.0.0.1]) by anduin.mandriva.com (Postfix) with ESMTP id B2203FF855; Wed, 5 May 2010 15:31:14 +0200 (CEST) From: Arnaud Patard To: yajin Cc: Ben Dooks , linux-mips@linux-mips.org Subject: Re: [PATCH 10/12] add the sm501fb option to sm501 fb driver References: <4BE1614D.1090008@simtec.co.uk> Organization: Mandriva Date: Wed, 05 May 2010 15:31:14 +0200 In-Reply-To: (yajin's message of "Wed, 5 May 2010 21:17:29 +0800") Message-ID: User-Agent: Gnus/5.1008 (Gnus v5.10.8) Emacs/22.1 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26596 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: apatard@mandriva.com Precedence: bulk X-list: linux-mips yajin writes: > Hi, > >>> Why not get this added to the main mode database instead of >>> adding a new one into the sm501 driver? > >> fwiw, the original patch is putting it in the main database. > > According to the Documentation/fb/modedb.txt, that's because the > modedb.c provides one generic video mode database with a fair amount > of standard videomodes. Yes, 1024x600 can be added to maindb, but I am > wondering whether it is a generic video mode. If so, there should be afair it is fairly generic > 1024x600 in main database already. Not seeing a mode is the database doesn't mean it shouldn't go there. It may only mean that nobody needed it before. Arnaud From dengcheng.zhu@gmail.com Wed May 5 15:55:57 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 May 2010 15:56:01 +0200 (CEST) Received: from mail-pv0-f177.google.com ([74.125.83.177]:44386 "EHLO mail-pv0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492122Ab0EENz5 (ORCPT ); Wed, 5 May 2010 15:55:57 +0200 Received: by pvg7 with SMTP id 7so310699pvg.36 for ; Wed, 05 May 2010 06:55:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer; bh=U3jh5kmvVrdQTTJBSvNoPXt/HeLXy10vqdIBQA1Amlw=; b=kgrd6TR97GGBJj/ZBMpq4OVpCdUHwYUPzP3UeIFcyiutTxJ8bXbrPBAkOBzYNPdjfp ogbbiK9XOBAYgBje1RvPjsu8cLnCNoh7jLl5MtapiMBDm5vM5YYyNNn5CetchhYhG0sA ljf+23hasHr/Zm5/VxewFzQ2H7cI+wvuj0rLY= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; b=bgRDphPLANsdHAsvMqomQJroasvgsgvVkhrEqtz+mgMB1S1NMh9LxIHpzuNCR1AeU/ 37L9/2ynCxebiv+T/N7y8q8xiq5Z0youDsFRALwIw4SWIfbxFhKG5UOeZTnT7mbzKDSn 33BTRIb5J86QY+auu6Rk+hjA3yPf0KT67ovrE= Received: by 10.142.119.20 with SMTP id r20mr4827063wfc.15.1273067749728; Wed, 05 May 2010 06:55:49 -0700 (PDT) Received: from localhost.localdomain ([114.84.73.209]) by mx.google.com with ESMTPS id 23sm6598217pzk.2.2010.05.05.06.55.45 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 05 May 2010 06:55:49 -0700 (PDT) From: Deng-Cheng Zhu To: linux-mips@linux-mips.org, ralf@linux-mips.org Cc: a.p.zijlstra@chello.nl, paulus@samba.org, mingo@elte.hu, acme@redhat.com, jamie.iles@picochip.com, Deng-Cheng Zhu Subject: [PATCH v3 0/4] MIPS performance event support v3 Date: Wed, 5 May 2010 21:55:30 +0800 Message-Id: <1273067734-4758-1-git-send-email-dengcheng.zhu@gmail.com> X-Mailer: git-send-email 1.6.3.3 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26597 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dengcheng.zhu@gmail.com Precedence: bulk X-list: linux-mips This patch series implemented the low-level logic for the Linux performance counter subsystem on MIPS, which enables the collection of all sorts of HW/SW performance events based on per-CPU or per-task. For more information, please refer to tools/perf/Documentation/perf.txt. Development tests were carried out on the Malta-R board. 24K/34K/74K/1004K cores and SMVP/UP kernels have been basically tested. CHANGES: ----------------------------- v3 - v2: - adding 1004K core support. - slightly adjusting the code structure. - adding more comments in the code. - fixing some small coding style issues. v2 - v1: - Adjusting code structure as suggested by Wu Zhangjin. With this change, hardware performance event support for loongson2 and rm9000 can be conveniently implemented by adding and including new files like perf_event_loongson2.c; Oprofile and Perf for MIPS are now sharing pmu.h; Naming changes were made to some functions. - Fixing the generic atomic64 issue reported by David Daney. Currently, 32bit kernel is using the generic version from lib. When Ralf Baechle's common atomic64 version is ready, this may change. - Adding raw event support. For more details, please refer to the code comments for mipsxx_pmu_map_raw_event(). - Adding new software events - PERF_COUNT_SW_ALIGNMENT_FAULTS and PERF_COUNT_SW_EMULATION_FAULTS. - Fixing some small bugs. - Adding new comments for the code. - Making some code style changes. v1: - Using generic atomic64 operations from lib. - SMVP/UP kernels are supported (not for SMTC). - 24K/34K/74K cores are implemented. - Currently working when Oprofile is _not_ available. - Minimal software perf events are supported. ----------------------------- Deng-Cheng Zhu (4): MIPS/Oprofile: extract PMU defines/helper functions for sharing MIPS: use generic atomic64 in non-64bit kernels MIPS: add support for software performance events MIPS: add support for hardware performance events arch/mips/Kconfig | 11 + arch/mips/include/asm/atomic.h | 4 + arch/mips/include/asm/perf_event.h | 28 + arch/mips/include/asm/pmu.h | 244 +++++++++ arch/mips/kernel/Makefile | 2 + arch/mips/kernel/perf_event.c | 604 +++++++++++++++++++++ arch/mips/kernel/perf_event_mipsxx.c | 869 +++++++++++++++++++++++++++++++ arch/mips/kernel/traps.c | 18 +- arch/mips/kernel/unaligned.c | 5 + arch/mips/math-emu/cp1emu.c | 3 + arch/mips/mm/fault.c | 11 +- arch/mips/oprofile/op_model_loongson2.c | 23 +- arch/mips/oprofile/op_model_mipsxx.c | 164 +------ arch/mips/oprofile/op_model_rm9000.c | 16 +- 14 files changed, 1797 insertions(+), 205 deletions(-) create mode 100644 arch/mips/include/asm/perf_event.h create mode 100644 arch/mips/include/asm/pmu.h create mode 100644 arch/mips/kernel/perf_event.c create mode 100644 arch/mips/kernel/perf_event_mipsxx.c From dengcheng.zhu@gmail.com Wed May 5 15:56:20 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 May 2010 15:56:25 +0200 (CEST) Received: from mail-pw0-f49.google.com ([209.85.160.49]:34141 "EHLO mail-pw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492146Ab0EEN4O (ORCPT ); Wed, 5 May 2010 15:56:14 +0200 Received: by pwj3 with SMTP id 3so2343598pwj.36 for ; Wed, 05 May 2010 06:56:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references; bh=/oUFljwA/4724fzY2RfcutEmulSObGpx9Meck0k2QaI=; b=G41UwH6GQY1m/D+rbNdNuawM6EQibFIRx4eFro6gu9K7aXzMBaWfPM2JINSmuFPsb2 xn3tGSz8aFdwU9sCTgL8rcvYUyCiWZticVHDxL8mnfQVEudhXYP11ov7p0wuFvm/xXga fr0F8WBDOf48uiV21XaY7yRSu3e0B4tpoXn70= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=OOmb67ESeGQLaFKRFudr6fMXD5obvzzjCLv0v1Hk9MARZIZgrVAIF1BHvyodBKTrUX mUKJjT2CBpes2S5T3t+NWufp3D+N78nKGNCvoOH9Y1uc99eRfznz+Ah6Pthu9i8xO9Ks uEScCbKndSwC0FrStb8yFkjg0uuHoiwUSZ1kM= Received: by 10.142.119.6 with SMTP id r6mr427306wfc.34.1273067767384; Wed, 05 May 2010 06:56:07 -0700 (PDT) Received: from localhost.localdomain ([114.84.73.209]) by mx.google.com with ESMTPS id 23sm6598217pzk.2.2010.05.05.06.55.58 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 05 May 2010 06:56:06 -0700 (PDT) From: Deng-Cheng Zhu To: linux-mips@linux-mips.org, ralf@linux-mips.org Cc: a.p.zijlstra@chello.nl, paulus@samba.org, mingo@elte.hu, acme@redhat.com, jamie.iles@picochip.com, Deng-Cheng Zhu Subject: [PATCH v3 1/4] MIPS/Oprofile: extract PMU defines/helper functions for sharing Date: Wed, 5 May 2010 21:55:31 +0800 Message-Id: <1273067734-4758-2-git-send-email-dengcheng.zhu@gmail.com> X-Mailer: git-send-email 1.6.3.3 In-Reply-To: <1273067734-4758-1-git-send-email-dengcheng.zhu@gmail.com> References: <1273067734-4758-1-git-send-email-dengcheng.zhu@gmail.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26598 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dengcheng.zhu@gmail.com Precedence: bulk X-list: linux-mips Moving performance counter/control defines/helper functions into a single header file, so that software using the MIPS PMU can share the code. Signed-off-by: Deng-Cheng Zhu --- arch/mips/include/asm/pmu.h | 244 +++++++++++++++++++++++++++++++ arch/mips/oprofile/op_model_loongson2.c | 23 +--- arch/mips/oprofile/op_model_mipsxx.c | 164 +--------------------- arch/mips/oprofile/op_model_rm9000.c | 16 +-- 4 files changed, 247 insertions(+), 200 deletions(-) create mode 100644 arch/mips/include/asm/pmu.h diff --git a/arch/mips/include/asm/pmu.h b/arch/mips/include/asm/pmu.h new file mode 100644 index 0000000..6da943c --- /dev/null +++ b/arch/mips/include/asm/pmu.h @@ -0,0 +1,244 @@ +/* + * linux/arch/mips/include/asm/pmu.h + * + * Copyright (C) 2004, 05, 06 by Ralf Baechle + * Copyright (C) 2005 by MIPS Technologies, Inc. + * Copyright (C) 2009 Lemote Inc. + * Author: Yanhua + * Author: Wu Zhangjin + * Copyright (C) 2010 MIPS Technologies, Inc. Deng-Cheng Zhu + * + * This file is shared by Oprofile and Perf. It is also shared across the + * Oprofile implementation for different MIPS CPUs. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __MIPS_PMU_H__ +#define __MIPS_PMU_H__ + +#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) || \ + defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_SB1) + +#define M_CONFIG1_PC (1 << 4) + +#define M_PERFCTL_EXL (1UL << 0) +#define M_PERFCTL_KERNEL (1UL << 1) +#define M_PERFCTL_SUPERVISOR (1UL << 2) +#define M_PERFCTL_USER (1UL << 3) +#define M_PERFCTL_INTERRUPT_ENABLE (1UL << 4) +#define M_PERFCTL_EVENT(event) (((event) & 0x3ff) << 5) +#define M_PERFCTL_VPEID(vpe) ((vpe) << 16) +#define M_PERFCTL_MT_EN(filter) ((filter) << 20) +#define M_TC_EN_ALL M_PERFCTL_MT_EN(0) +#define M_TC_EN_VPE M_PERFCTL_MT_EN(1) +#define M_TC_EN_TC M_PERFCTL_MT_EN(2) +#define M_PERFCTL_TCID(tcid) ((tcid) << 22) +#define M_PERFCTL_WIDE (1UL << 30) +#define M_PERFCTL_MORE (1UL << 31) + +#define M_COUNTER_OVERFLOW (1UL << 31) + +static int (*save_perf_irq)(void); + +#ifdef CONFIG_MIPS_MT_SMP +static int cpu_has_mipsmt_pertccounters; +#define WHAT (M_TC_EN_VPE | \ + M_PERFCTL_VPEID(cpu_data[smp_processor_id()].vpe_id)) +/* + * FIXME: For VSMP, vpe_id() is redefined for Perf, because + * cpu_data[cpuid].vpe_id reports 0 for _both_ CPUs. WHAT is not + * redefined because Perf does not use it. + */ +#if defined(CONFIG_HW_PERF_EVENTS) +#define vpe_id() (cpu_has_mipsmt_pertccounters ? \ + 0 : smp_processor_id()) +#else +#define vpe_id() (cpu_has_mipsmt_pertccounters ? \ + 0 : cpu_data[smp_processor_id()].vpe_id) +#endif +/* + * The number of bits to shift to convert between counters per core and + * counters per VPE. There is no reasonable interface atm to obtain the + * number of VPEs used by Linux and in the 34K this number is fixed to two + * anyways so we hardcore a few things here for the moment. The way it's + * done here will ensure that oprofile VSMP kernel will run right on a lesser + * core like a 24K also or with maxcpus=1. + */ +static inline unsigned int vpe_shift(void) +{ + if (num_possible_cpus() > 1) + return 1; + + return 0; +} +#else +#define WHAT 0 +#define vpe_id() 0 +static inline unsigned int vpe_shift(void) +{ + return 0; +} +#endif + +static inline unsigned int +counters_total_to_per_cpu(unsigned int counters) +{ + return counters >> vpe_shift(); +} + +static inline unsigned int +counters_per_cpu_to_total(unsigned int counters) +{ + return counters << vpe_shift(); +} + +#define __define_perf_accessors(r, n, np) \ + \ +static inline unsigned int r_c0_ ## r ## n(void) \ +{ \ + unsigned int cpu = vpe_id(); \ + \ + switch (cpu) { \ + case 0: \ + return read_c0_ ## r ## n(); \ + case 1: \ + return read_c0_ ## r ## np(); \ + default: \ + BUG(); \ + } \ + return 0; \ +} \ + \ +static inline void w_c0_ ## r ## n(unsigned int value) \ +{ \ + unsigned int cpu = vpe_id(); \ + \ + switch (cpu) { \ + case 0: \ + write_c0_ ## r ## n(value); \ + return; \ + case 1: \ + write_c0_ ## r ## np(value); \ + return; \ + default: \ + BUG(); \ + } \ + return; \ +} \ + +__define_perf_accessors(perfcntr, 0, 2) +__define_perf_accessors(perfcntr, 1, 3) +__define_perf_accessors(perfcntr, 2, 0) +__define_perf_accessors(perfcntr, 3, 1) + +__define_perf_accessors(perfctrl, 0, 2) +__define_perf_accessors(perfctrl, 1, 3) +__define_perf_accessors(perfctrl, 2, 0) +__define_perf_accessors(perfctrl, 3, 1) + +static inline int __n_counters(void) +{ + if (!(read_c0_config1() & M_CONFIG1_PC)) + return 0; + if (!(read_c0_perfctrl0() & M_PERFCTL_MORE)) + return 1; + if (!(read_c0_perfctrl1() & M_PERFCTL_MORE)) + return 2; + if (!(read_c0_perfctrl2() & M_PERFCTL_MORE)) + return 3; + + return 4; +} + +static inline int n_counters(void) +{ + int counters; + + switch (current_cpu_type()) { + case CPU_R10000: + counters = 2; + break; + + case CPU_R12000: + case CPU_R14000: + counters = 4; + break; + + default: + counters = __n_counters(); + } + + return counters; +} + +static void reset_counters(void *arg) +{ + int counters = (int)(long)arg; + switch (counters) { + case 4: + w_c0_perfctrl3(0); + w_c0_perfcntr3(0); + case 3: + w_c0_perfctrl2(0); + w_c0_perfcntr2(0); + case 2: + w_c0_perfctrl1(0); + w_c0_perfcntr1(0); + case 1: + w_c0_perfctrl0(0); + w_c0_perfcntr0(0); + } +} + +/* Used by Perf */ +#define MIPS_MAX_HWEVENTS 4 + +#elif defined(CONFIG_CPU_RM9000) + +#define RM9K_COUNTER1_EVENT(event) ((event) << 0) +#define RM9K_COUNTER1_SUPERVISOR (1ULL << 7) +#define RM9K_COUNTER1_KERNEL (1ULL << 8) +#define RM9K_COUNTER1_USER (1ULL << 9) +#define RM9K_COUNTER1_ENABLE (1ULL << 10) +#define RM9K_COUNTER1_OVERFLOW (1ULL << 15) + +#define RM9K_COUNTER2_EVENT(event) ((event) << 16) +#define RM9K_COUNTER2_SUPERVISOR (1ULL << 23) +#define RM9K_COUNTER2_KERNEL (1ULL << 24) +#define RM9K_COUNTER2_USER (1ULL << 25) +#define RM9K_COUNTER2_ENABLE (1ULL << 26) +#define RM9K_COUNTER2_OVERFLOW (1ULL << 31) + +extern unsigned int rm9000_perfcount_irq; + +#elif defined(CONFIG_CPU_LOONGSON2) + +/* + * a patch should be sent to oprofile with the loongson-specific support. + * otherwise, the oprofile tool will not recognize this and complain about + * "cpu_type 'unset' is not valid". + */ +#define LOONGSON2_CPU_TYPE "mips/loongson2" + +#define LOONGSON2_COUNTER1_EVENT(event) ((event & 0x0f) << 5) +#define LOONGSON2_COUNTER2_EVENT(event) ((event & 0x0f) << 9) + +#define LOONGSON2_PERFCNT_EXL (1UL << 0) +#define LOONGSON2_PERFCNT_KERNEL (1UL << 1) +#define LOONGSON2_PERFCNT_SUPERVISOR (1UL << 2) +#define LOONGSON2_PERFCNT_USER (1UL << 3) +#define LOONGSON2_PERFCNT_INT_EN (1UL << 4) +#define LOONGSON2_PERFCNT_OVERFLOW (1ULL << 31) + +/* Loongson2 performance counter register */ +#define read_c0_perfctrl() __read_64bit_c0_register($24, 0) +#define write_c0_perfctrl(val) __write_64bit_c0_register($24, 0, val) +#define read_c0_perfcnt() __read_64bit_c0_register($25, 0) +#define write_c0_perfcnt(val) __write_64bit_c0_register($25, 0, val) + +#endif /* CONFIG_CPU_* */ + +#endif /* __MIPS_PMU_H__ */ diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c index 29e2326..59b4c93 100644 --- a/arch/mips/oprofile/op_model_loongson2.c +++ b/arch/mips/oprofile/op_model_loongson2.c @@ -13,32 +13,11 @@ #include #include #include +#include #include /* LOONGSON2_PERFCNT_IRQ */ #include "op_impl.h" -/* - * a patch should be sent to oprofile with the loongson-specific support. - * otherwise, the oprofile tool will not recognize this and complain about - * "cpu_type 'unset' is not valid". - */ -#define LOONGSON2_CPU_TYPE "mips/loongson2" - -#define LOONGSON2_COUNTER1_EVENT(event) ((event & 0x0f) << 5) -#define LOONGSON2_COUNTER2_EVENT(event) ((event & 0x0f) << 9) - -#define LOONGSON2_PERFCNT_EXL (1UL << 0) -#define LOONGSON2_PERFCNT_KERNEL (1UL << 1) -#define LOONGSON2_PERFCNT_SUPERVISOR (1UL << 2) -#define LOONGSON2_PERFCNT_USER (1UL << 3) -#define LOONGSON2_PERFCNT_INT_EN (1UL << 4) -#define LOONGSON2_PERFCNT_OVERFLOW (1ULL << 31) - -/* Loongson2 performance counter register */ -#define read_c0_perfctrl() __read_64bit_c0_register($24, 0) -#define write_c0_perfctrl(val) __write_64bit_c0_register($24, 0, val) -#define read_c0_perfcnt() __read_64bit_c0_register($25, 0) -#define write_c0_perfcnt(val) __write_64bit_c0_register($25, 0, val) static struct loongson2_register_config { unsigned int ctrl; diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c index 54759f1..48461f7 100644 --- a/arch/mips/oprofile/op_model_mipsxx.c +++ b/arch/mips/oprofile/op_model_mipsxx.c @@ -11,116 +11,10 @@ #include #include #include +#include #include "op_impl.h" -#define M_PERFCTL_EXL (1UL << 0) -#define M_PERFCTL_KERNEL (1UL << 1) -#define M_PERFCTL_SUPERVISOR (1UL << 2) -#define M_PERFCTL_USER (1UL << 3) -#define M_PERFCTL_INTERRUPT_ENABLE (1UL << 4) -#define M_PERFCTL_EVENT(event) (((event) & 0x3ff) << 5) -#define M_PERFCTL_VPEID(vpe) ((vpe) << 16) -#define M_PERFCTL_MT_EN(filter) ((filter) << 20) -#define M_TC_EN_ALL M_PERFCTL_MT_EN(0) -#define M_TC_EN_VPE M_PERFCTL_MT_EN(1) -#define M_TC_EN_TC M_PERFCTL_MT_EN(2) -#define M_PERFCTL_TCID(tcid) ((tcid) << 22) -#define M_PERFCTL_WIDE (1UL << 30) -#define M_PERFCTL_MORE (1UL << 31) - -#define M_COUNTER_OVERFLOW (1UL << 31) - -static int (*save_perf_irq)(void); - -#ifdef CONFIG_MIPS_MT_SMP -static int cpu_has_mipsmt_pertccounters; -#define WHAT (M_TC_EN_VPE | \ - M_PERFCTL_VPEID(cpu_data[smp_processor_id()].vpe_id)) -#define vpe_id() (cpu_has_mipsmt_pertccounters ? \ - 0 : cpu_data[smp_processor_id()].vpe_id) - -/* - * The number of bits to shift to convert between counters per core and - * counters per VPE. There is no reasonable interface atm to obtain the - * number of VPEs used by Linux and in the 34K this number is fixed to two - * anyways so we hardcore a few things here for the moment. The way it's - * done here will ensure that oprofile VSMP kernel will run right on a lesser - * core like a 24K also or with maxcpus=1. - */ -static inline unsigned int vpe_shift(void) -{ - if (num_possible_cpus() > 1) - return 1; - - return 0; -} - -#else - -#define WHAT 0 -#define vpe_id() 0 - -static inline unsigned int vpe_shift(void) -{ - return 0; -} - -#endif - -static inline unsigned int counters_total_to_per_cpu(unsigned int counters) -{ - return counters >> vpe_shift(); -} - -static inline unsigned int counters_per_cpu_to_total(unsigned int counters) -{ - return counters << vpe_shift(); -} - -#define __define_perf_accessors(r, n, np) \ - \ -static inline unsigned int r_c0_ ## r ## n(void) \ -{ \ - unsigned int cpu = vpe_id(); \ - \ - switch (cpu) { \ - case 0: \ - return read_c0_ ## r ## n(); \ - case 1: \ - return read_c0_ ## r ## np(); \ - default: \ - BUG(); \ - } \ - return 0; \ -} \ - \ -static inline void w_c0_ ## r ## n(unsigned int value) \ -{ \ - unsigned int cpu = vpe_id(); \ - \ - switch (cpu) { \ - case 0: \ - write_c0_ ## r ## n(value); \ - return; \ - case 1: \ - write_c0_ ## r ## np(value); \ - return; \ - default: \ - BUG(); \ - } \ - return; \ -} \ - -__define_perf_accessors(perfcntr, 0, 2) -__define_perf_accessors(perfcntr, 1, 3) -__define_perf_accessors(perfcntr, 2, 0) -__define_perf_accessors(perfcntr, 3, 1) - -__define_perf_accessors(perfctrl, 0, 2) -__define_perf_accessors(perfctrl, 1, 3) -__define_perf_accessors(perfctrl, 2, 0) -__define_perf_accessors(perfctrl, 3, 1) struct op_mips_model op_model_mipsxx_ops; @@ -242,62 +136,6 @@ static int mipsxx_perfcount_handler(void) return handled; } -#define M_CONFIG1_PC (1 << 4) - -static inline int __n_counters(void) -{ - if (!(read_c0_config1() & M_CONFIG1_PC)) - return 0; - if (!(read_c0_perfctrl0() & M_PERFCTL_MORE)) - return 1; - if (!(read_c0_perfctrl1() & M_PERFCTL_MORE)) - return 2; - if (!(read_c0_perfctrl2() & M_PERFCTL_MORE)) - return 3; - - return 4; -} - -static inline int n_counters(void) -{ - int counters; - - switch (current_cpu_type()) { - case CPU_R10000: - counters = 2; - break; - - case CPU_R12000: - case CPU_R14000: - counters = 4; - break; - - default: - counters = __n_counters(); - } - - return counters; -} - -static void reset_counters(void *arg) -{ - int counters = (int)(long)arg; - switch (counters) { - case 4: - w_c0_perfctrl3(0); - w_c0_perfcntr3(0); - case 3: - w_c0_perfctrl2(0); - w_c0_perfcntr2(0); - case 2: - w_c0_perfctrl1(0); - w_c0_perfcntr1(0); - case 1: - w_c0_perfctrl0(0); - w_c0_perfcntr0(0); - } -} - static int __init mipsxx_init(void) { int counters; diff --git a/arch/mips/oprofile/op_model_rm9000.c b/arch/mips/oprofile/op_model_rm9000.c index 3aa8138..48e7487 100644 --- a/arch/mips/oprofile/op_model_rm9000.c +++ b/arch/mips/oprofile/op_model_rm9000.c @@ -9,24 +9,10 @@ #include #include #include +#include #include "op_impl.h" -#define RM9K_COUNTER1_EVENT(event) ((event) << 0) -#define RM9K_COUNTER1_SUPERVISOR (1ULL << 7) -#define RM9K_COUNTER1_KERNEL (1ULL << 8) -#define RM9K_COUNTER1_USER (1ULL << 9) -#define RM9K_COUNTER1_ENABLE (1ULL << 10) -#define RM9K_COUNTER1_OVERFLOW (1ULL << 15) - -#define RM9K_COUNTER2_EVENT(event) ((event) << 16) -#define RM9K_COUNTER2_SUPERVISOR (1ULL << 23) -#define RM9K_COUNTER2_KERNEL (1ULL << 24) -#define RM9K_COUNTER2_USER (1ULL << 25) -#define RM9K_COUNTER2_ENABLE (1ULL << 26) -#define RM9K_COUNTER2_OVERFLOW (1ULL << 31) - -extern unsigned int rm9000_perfcount_irq; static struct rm9k_register_config { unsigned int control; -- 1.7.0.4 From dengcheng.zhu@gmail.com Wed May 5 15:56:45 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 May 2010 15:56:53 +0200 (CEST) Received: from mail-pv0-f177.google.com ([74.125.83.177]:60246 "EHLO mail-pv0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492165Ab0EEN4g (ORCPT ); Wed, 5 May 2010 15:56:36 +0200 Received: by pvg7 with SMTP id 7so311016pvg.36 for ; Wed, 05 May 2010 06:56:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references; bh=1pC2DJcFV+wyveRrqy8A19S/wuSd+/p442trJrgrulE=; b=Bxn7xaNAPClF+Kpe34/nrhTem/O5jSl73i9uolZGRG5EGtfJkG3xX/hV8Ckk1UwENH ILfvy0LiF4j05p2kbqt4j0QinNORO+n5UlKi+9CsNQyBgzvx8WKAaQnEJD8MWAD1ElwJ ycP6jqPW3Lz4k+zvXvc0v5VLZj5L05XioHKng= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=CnJJXLnClooOTZGWcBzPsCNuv/09fLk7w58z8QOTW9OP7fxkCkc22co9txhO4Lkgez 79RzAqEWWLy5KRnfhDCnOyBbqPb9yzoWIK8nBsJAe6HufSfdiIkf7Tyb/NjTOqB4wp8i XkPkmEcrhKM+KLYOrqNolF1mf4GV/T0uENAmI= Received: by 10.143.20.30 with SMTP id x30mr1048574wfi.57.1273067788556; Wed, 05 May 2010 06:56:28 -0700 (PDT) Received: from localhost.localdomain ([114.84.73.209]) by mx.google.com with ESMTPS id 23sm6598217pzk.2.2010.05.05.06.56.15 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 05 May 2010 06:56:27 -0700 (PDT) From: Deng-Cheng Zhu To: linux-mips@linux-mips.org, ralf@linux-mips.org Cc: a.p.zijlstra@chello.nl, paulus@samba.org, mingo@elte.hu, acme@redhat.com, jamie.iles@picochip.com, Deng-Cheng Zhu Subject: [PATCH v3 2/4] MIPS: use generic atomic64 in non-64bit kernels Date: Wed, 5 May 2010 21:55:32 +0800 Message-Id: <1273067734-4758-3-git-send-email-dengcheng.zhu@gmail.com> X-Mailer: git-send-email 1.6.3.3 In-Reply-To: <1273067734-4758-1-git-send-email-dengcheng.zhu@gmail.com> References: <1273067734-4758-1-git-send-email-dengcheng.zhu@gmail.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26599 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dengcheng.zhu@gmail.com Precedence: bulk X-list: linux-mips 64bit kernel has already had its atomic64 functions. Except for that, we use the generic spinlocked version. The atomic64 types and related functions are needed for the Linux performance counter subsystem. Signed-off-by: Deng-Cheng Zhu --- arch/mips/Kconfig | 1 + arch/mips/include/asm/atomic.h | 4 ++++ 2 files changed, 5 insertions(+), 0 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 7e6fd1c..7d19c62 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -4,6 +4,7 @@ config MIPS select HAVE_GENERIC_DMA_COHERENT select HAVE_IDE select HAVE_OPROFILE + select GENERIC_ATOMIC64 if !64BIT select HAVE_ARCH_KGDB select HAVE_FUNCTION_TRACER select HAVE_FUNCTION_TRACE_MCOUNT_TEST diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h index 519197e..afe6e79 100644 --- a/arch/mips/include/asm/atomic.h +++ b/arch/mips/include/asm/atomic.h @@ -782,6 +782,10 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u) */ #define atomic64_add_negative(i, v) (atomic64_add_return(i, (v)) < 0) +#else /* ! CONFIG_64BIT */ + +#include + #endif /* CONFIG_64BIT */ /* -- 1.7.0.4 From dengcheng.zhu@gmail.com Wed May 5 15:57:12 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 May 2010 15:57:17 +0200 (CEST) Received: from mail-pz0-f194.google.com ([209.85.222.194]:34817 "EHLO mail-pz0-f194.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492146Ab0EEN4s (ORCPT ); Wed, 5 May 2010 15:56:48 +0200 Received: by pzk32 with SMTP id 32so263587pzk.21 for ; Wed, 05 May 2010 06:56:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references; bh=T4QrHEwWqXgPLiAKHaUmlhjvvChC0vRHfJRthnsxZSU=; b=jH032ldBcz4/E042JXD9gLs1vtp6KJ9mXslte1hIUKvmCZ/APKECXpfpp/dqt/qzfI NN8qWfUE0U4OOgDvxYQa211NPjG5NQsO8kGqldzlULFRhVXnbRXJh6q6gkeepQJjoKzy y2XJkkhjjEmLeYADSmKQXDBeJmB5NBLX+Rx/Y= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=kLKGsonBIIJi8bW5dpJD62oGZx9DZWrFKlYxJ825cJ7t6IIXFo57mrrAxOk/1DRF8+ zzHpuU84g7zEsRZ06pNxL38iMLkek+1uxMrjX2Q+b2OMrq0hG4w6ldU5AdMpnH7LTzZl WCmuaQ/qZHwpYakKp2BoFAnZArwx3jnrjPkag= Received: by 10.142.5.25 with SMTP id 25mr2466688wfe.78.1273067800018; Wed, 05 May 2010 06:56:40 -0700 (PDT) Received: from localhost.localdomain ([114.84.73.209]) by mx.google.com with ESMTPS id 23sm6598217pzk.2.2010.05.05.06.56.33 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 05 May 2010 06:56:39 -0700 (PDT) From: Deng-Cheng Zhu To: linux-mips@linux-mips.org, ralf@linux-mips.org Cc: a.p.zijlstra@chello.nl, paulus@samba.org, mingo@elte.hu, acme@redhat.com, jamie.iles@picochip.com, Deng-Cheng Zhu Subject: [PATCH v3 3/4] MIPS: add support for software performance events Date: Wed, 5 May 2010 21:55:33 +0800 Message-Id: <1273067734-4758-4-git-send-email-dengcheng.zhu@gmail.com> X-Mailer: git-send-email 1.6.3.3 In-Reply-To: <1273067734-4758-1-git-send-email-dengcheng.zhu@gmail.com> References: <1273067734-4758-1-git-send-email-dengcheng.zhu@gmail.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26600 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dengcheng.zhu@gmail.com Precedence: bulk X-list: linux-mips Software events are required as part of the measurable stuff by the Linux performance counter subsystem. Here is the list of events added by this patch: PERF_COUNT_SW_PAGE_FAULTS PERF_COUNT_SW_PAGE_FAULTS_MIN PERF_COUNT_SW_PAGE_FAULTS_MAJ PERF_COUNT_SW_ALIGNMENT_FAULTS PERF_COUNT_SW_EMULATION_FAULTS Signed-off-by: Deng-Cheng Zhu --- arch/mips/Kconfig | 2 ++ arch/mips/kernel/traps.c | 18 +++++++++++++++--- arch/mips/kernel/unaligned.c | 5 +++++ arch/mips/math-emu/cp1emu.c | 3 +++ arch/mips/mm/fault.c | 11 +++++++++-- 5 files changed, 34 insertions(+), 5 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 7d19c62..aee2cda 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -4,6 +4,8 @@ config MIPS select HAVE_GENERIC_DMA_COHERENT select HAVE_IDE select HAVE_OPROFILE + select HAVE_PERF_EVENTS + select PERF_USE_VMALLOC select GENERIC_ATOMIC64 if !64BIT select HAVE_ARCH_KGDB select HAVE_FUNCTION_TRACER diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index d612c6d..bdaa5d7 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -562,10 +563,16 @@ static inline int simulate_sc(struct pt_regs *regs, unsigned int opcode) */ static int simulate_llsc(struct pt_regs *regs, unsigned int opcode) { - if ((opcode & OPCODE) == LL) + if ((opcode & OPCODE) == LL) { + perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, + 1, 0, regs, 0); return simulate_ll(regs, opcode); - if ((opcode & OPCODE) == SC) + } + if ((opcode & OPCODE) == SC) { + perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, + 1, 0, regs, 0); return simulate_sc(regs, opcode); + } return -1; /* Must be something else ... */ } @@ -581,6 +588,8 @@ static int simulate_rdhwr(struct pt_regs *regs, unsigned int opcode) if ((opcode & OPCODE) == SPEC3 && (opcode & FUNC) == RDHWR) { int rd = (opcode & RD) >> 11; int rt = (opcode & RT) >> 16; + perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, + 1, 0, regs, 0); switch (rd) { case 0: /* CPU number */ regs->regs[rt] = smp_processor_id(); @@ -616,8 +625,11 @@ static int simulate_rdhwr(struct pt_regs *regs, unsigned int opcode) static int simulate_sync(struct pt_regs *regs, unsigned int opcode) { - if ((opcode & OPCODE) == SPEC0 && (opcode & FUNC) == SYNC) + if ((opcode & OPCODE) == SPEC0 && (opcode & FUNC) == SYNC) { + perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, + 1, 0, regs, 0); return 0; + } return -1; /* Must be something else ... */ } diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c index 69b039c..a319c7a 100644 --- a/arch/mips/kernel/unaligned.c +++ b/arch/mips/kernel/unaligned.c @@ -78,6 +78,7 @@ #include #include #include +#include #include #include #include @@ -109,6 +110,8 @@ static void emulate_load_store_insn(struct pt_regs *regs, unsigned long value; unsigned int res; + perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, + 1, 0, regs, 0); regs->regs[0] = 0; /* @@ -513,6 +516,8 @@ asmlinkage void do_ade(struct pt_regs *regs) unsigned int __user *pc; mm_segment_t seg; + perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, + 1, 0, regs, regs->cp0_badvaddr); /* * Did we catch a fault trying to load an instruction? * Or are we running in MIPS16 mode? diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c index 8f2f8e9..b3fa153 100644 --- a/arch/mips/math-emu/cp1emu.c +++ b/arch/mips/math-emu/cp1emu.c @@ -37,6 +37,7 @@ #include #include #include +#include #include #include @@ -256,6 +257,8 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) } emul: + perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, + 1, 0, xcp, 0); MIPS_FPU_EMU_INC_STATS(emulated); switch (MIPSInst_OPCODE(ir)) { case ldc1_op:{ diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c index b78f7d9..5987d2b 100644 --- a/arch/mips/mm/fault.c +++ b/arch/mips/mm/fault.c @@ -18,6 +18,7 @@ #include #include /* For unblank_screen() */ #include +#include #include #include @@ -132,6 +133,7 @@ good_area: * the fault. */ fault = handle_mm_fault(mm, vma, address, write ? FAULT_FLAG_WRITE : 0); + perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address); if (unlikely(fault & VM_FAULT_ERROR)) { if (fault & VM_FAULT_OOM) goto out_of_memory; @@ -139,10 +141,15 @@ good_area: goto do_sigbus; BUG(); } - if (fault & VM_FAULT_MAJOR) + if (fault & VM_FAULT_MAJOR) { + perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, + 1, 0, regs, address); tsk->maj_flt++; - else + } else { + perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, + 1, 0, regs, address); tsk->min_flt++; + } up_read(&mm->mmap_sem); return; -- 1.7.0.4 From dengcheng.zhu@gmail.com Wed May 5 15:57:38 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 May 2010 15:57:45 +0200 (CEST) Received: from mail-px0-f177.google.com ([209.85.212.177]:45529 "EHLO mail-px0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492184Ab0EEN5h (ORCPT ); Wed, 5 May 2010 15:57:37 +0200 Received: by pxi1 with SMTP id 1so2339714pxi.36 for ; Wed, 05 May 2010 06:57:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references; bh=IpLhAXOMTQfubLImgDNqRQ4OkkxkoTKyxWeWEZVWQJs=; b=UdDUOuLX/BOd1Jxi+UehjGUQsWxEfdjdfgR4ilsbTQdjW4n0qG27lBEQC+bXYb8SBK irTogQlskoNVxlx8dqDvWXZENDch+suZmewmh3CsNBA+K/O/EEPvcGj3UF3HB19T8cHB 068kLSmw/tkkV/cO9Ns6o4XXs9Zy2h3HiPitA= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=XvgmASREIPAZIc0mZ0toK4pbCzkjpbTtP3K34SPeJ/LMcHFtgNY7SqdKEG0Cse57Of 66msdtwLSmXw5g4dbfwLnPbKBkPk4qXwLfxn0ZmsAQst17HsXgV8xz1Ybnj4M0zG3S+/ JBjoBOhmLMU2Rla6QQQjEzKkvDvlOyj1dHYyo= Received: by 10.142.5.28 with SMTP id 28mr1067837wfe.205.1273067847840; Wed, 05 May 2010 06:57:27 -0700 (PDT) Received: from localhost.localdomain ([114.84.73.209]) by mx.google.com with ESMTPS id 23sm6598217pzk.2.2010.05.05.06.56.46 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 05 May 2010 06:57:27 -0700 (PDT) From: Deng-Cheng Zhu To: linux-mips@linux-mips.org, ralf@linux-mips.org Cc: a.p.zijlstra@chello.nl, paulus@samba.org, mingo@elte.hu, acme@redhat.com, jamie.iles@picochip.com, Deng-Cheng Zhu Subject: [PATCH v3 4/4] MIPS: add support for hardware performance events Date: Wed, 5 May 2010 21:55:34 +0800 Message-Id: <1273067734-4758-5-git-send-email-dengcheng.zhu@gmail.com> X-Mailer: git-send-email 1.6.3.3 In-Reply-To: <1273067734-4758-1-git-send-email-dengcheng.zhu@gmail.com> References: <1273067734-4758-1-git-send-email-dengcheng.zhu@gmail.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26601 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dengcheng.zhu@gmail.com Precedence: bulk X-list: linux-mips This patch is the HW perf event support. To enable this feature, we can not choose the SMTC kernel; Oprofile should be disabled; kernel performance events be selected. Then we can enable it in Kernel type menu. Oprofile for MIPS platforms initializes irq at arch init time. Currently we do not change this logic to allow PMU reservation. If a platform has EIC, we can use the irq base and perf counter irq offset defines for the interrupt controller in mipspmu_get_irq(). Besides generic hardware events and cache events, raw events are also supported by this patch. Please refer to processor core software user's manual and the comments for mipsxx_pmu_map_raw_event() for more details. Signed-off-by: Deng-Cheng Zhu --- arch/mips/Kconfig | 8 + arch/mips/include/asm/perf_event.h | 28 ++ arch/mips/kernel/Makefile | 2 + arch/mips/kernel/perf_event.c | 604 +++++++++++++++++++++++ arch/mips/kernel/perf_event_mipsxx.c | 869 ++++++++++++++++++++++++++++++++++ 5 files changed, 1511 insertions(+), 0 deletions(-) create mode 100644 arch/mips/include/asm/perf_event.h create mode 100644 arch/mips/kernel/perf_event.c create mode 100644 arch/mips/kernel/perf_event_mipsxx.c diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index aee2cda..978e633 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1886,6 +1886,14 @@ config NODES_SHIFT default "6" depends on NEED_MULTIPLE_NODES +config HW_PERF_EVENTS + bool "Enable hardware performance counter support for perf events" + depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && CPU_MIPS32 + default y + help + Enable hardware performance counter support for perf events. If + disabled, perf events will use software events only. + source "mm/Kconfig" config SMP diff --git a/arch/mips/include/asm/perf_event.h b/arch/mips/include/asm/perf_event.h new file mode 100644 index 0000000..bcf54bc --- /dev/null +++ b/arch/mips/include/asm/perf_event.h @@ -0,0 +1,28 @@ +/* + * linux/arch/mips/include/asm/perf_event.h + * + * Copyright (C) 2010 MIPS Technologies, Inc. Deng-Cheng Zhu + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef __MIPS_PERF_EVENT_H__ +#define __MIPS_PERF_EVENT_H__ + +extern int (*perf_irq)(void); + +/* + * MIPS performance counters do not raise NMI upon overflow, a regular + * interrupt will be signaled. Hence we can do the pending perf event + * work at the tail of the irq handler. + */ +static inline void +set_perf_event_pending(void) +{ +} + +#endif /* __MIPS_PERF_EVENT_H__ */ + diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index 7a6ac50..c934ab7 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -101,6 +101,8 @@ obj-$(CONFIG_HAVE_STD_PC_SERIAL_PORT) += 8250-platform.o obj-$(CONFIG_MIPS_CPUFREQ) += cpufreq/ +obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o + EXTRA_CFLAGS += -Werror CPPFLAGS_vmlinux.lds := $(KBUILD_CFLAGS) diff --git a/arch/mips/kernel/perf_event.c b/arch/mips/kernel/perf_event.c new file mode 100644 index 0000000..20b415f --- /dev/null +++ b/arch/mips/kernel/perf_event.c @@ -0,0 +1,604 @@ +/* + * Linux performance counter support for MIPS. + * + * Copyright (C) 2010 MIPS Technologies, Inc. Deng-Cheng Zhu + * + * This code is based on the implementation for ARM, which is in turn + * based on the sparc64 perf event code and the x86 code. Performance + * counter access is based on the MIPS Oprofile code. And the callchain + * support references the code of MIPS traps.c. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + + +#define MAX_PERIOD ((1ULL << 32) - 1) + +struct cpu_hw_events { + /* Array of events on this cpu. */ + struct perf_event *events[MIPS_MAX_HWEVENTS]; + + /* + * Set the bit (indexed by the counter number) when the counter + * is used for an event. + */ + unsigned long used_mask[BITS_TO_LONGS(MIPS_MAX_HWEVENTS)]; + + /* + * The borrowed MSB for the performance counter. A MIPS performance + * counter uses its bit 31 as a factor of determining whether a counter + * overflow should be signaled. So here we use a separate MSB for each + * counter to make things easy. + */ + unsigned long msbs[BITS_TO_LONGS(MIPS_MAX_HWEVENTS)]; + + /* + * Software copy of the control register for each performance counter. + * MIPS CPUs vary in performance counters. They use this differently, + * and even may not use it. + */ + unsigned int saved_ctrl[MIPS_MAX_HWEVENTS]; +}; +DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events) = { + .saved_ctrl = {0}, +}; + +/* The description of MIPS performance events. */ +struct mips_perf_event { + unsigned int event_id; + /* + * MIPS performance counters are indexed starting from 0. + * CNTR_EVEN indicates the indexes of the counters to be used are + * even numbers. + */ + unsigned int cntr_mask; + #define CNTR_EVEN 0x55555555 + #define CNTR_ODD 0xaaaaaaaa +#ifdef CONFIG_MIPS_MT_SMP + enum { + T = 0, + V = 1, + P = 2, + } range; +#else + #define T + #define V + #define P +#endif +}; + +static struct mips_perf_event raw_event; +static DEFINE_MUTEX(raw_event_mutex); + +#define UNSUPPORTED_PERF_EVENT_ID 0xffffffff +#define C(x) PERF_COUNT_HW_CACHE_##x + +struct mips_pmu { + const char *name; + irqreturn_t (*handle_irq)(int irq, void *dev); + int (*handle_shared_irq)(void); + void (*start)(void); + void (*stop)(void); + int (*alloc_counter)(struct cpu_hw_events *cpuc, + struct hw_perf_event *hwc); + unsigned int (*read_counter)(unsigned int idx); + void (*write_counter)(unsigned int idx, unsigned int val); + void (*enable_event)(struct hw_perf_event *evt, int idx); + void (*disable_event)(int idx); + const struct mips_perf_event *(*map_raw_event)(u64 config); + const struct mips_perf_event (*general_event_map)[PERF_COUNT_HW_MAX]; + const struct mips_perf_event (*cache_event_map) + [PERF_COUNT_HW_CACHE_MAX] + [PERF_COUNT_HW_CACHE_OP_MAX] + [PERF_COUNT_HW_CACHE_RESULT_MAX]; + unsigned int num_counters; +}; + +static const struct mips_pmu *mipspmu; + +static int +mipspmu_event_set_period(struct perf_event *event, + struct hw_perf_event *hwc, + int idx) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + s64 left = atomic64_read(&hwc->period_left); + s64 period = hwc->sample_period; + int ret = 0; + unsigned long flags, uleft; + + if (unlikely(left <= -period)) { + left = period; + atomic64_set(&hwc->period_left, left); + hwc->last_period = period; + ret = 1; + } + + if (unlikely(left <= 0)) { + left += period; + atomic64_set(&hwc->period_left, left); + hwc->last_period = period; + ret = 1; + } + + if (left > (s64)MAX_PERIOD) + left = MAX_PERIOD; + + atomic64_set(&hwc->prev_count, (u64)-left); + + local_irq_save(flags); + uleft = (u64)(-left) & 0xffffffff; + test_bit(31, &uleft) ? + set_bit(idx, cpuc->msbs) : clear_bit(idx, cpuc->msbs); + mipspmu->write_counter(idx, (u64)(-left) & 0x7fffffff); + local_irq_restore(flags); + + perf_event_update_userpage(event); + + return ret; +} + +static int mipspmu_enable(struct perf_event *event) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + struct hw_perf_event *hwc = &event->hw; + int idx; + int err = 0; + + /* To look for a free counter for this event. */ + idx = mipspmu->alloc_counter(cpuc, hwc); + if (idx < 0) { + err = idx; + goto out; + } + + /* + * If there is an event in the counter we are going to use then + * make sure it is disabled. + */ + event->hw.idx = idx; + mipspmu->disable_event(idx); + cpuc->events[idx] = event; + + /* Set the period for the event. */ + mipspmu_event_set_period(event, hwc, idx); + + /* Enable the event. */ + mipspmu->enable_event(hwc, idx); + + /* Propagate our changes to the userspace mapping. */ + perf_event_update_userpage(event); + +out: + return err; +} + +static void mipspmu_event_update(struct perf_event *event, + struct hw_perf_event *hwc, + int idx) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + unsigned long flags; + int shift = 64 - 32; + s64 prev_raw_count, new_raw_count; + s64 delta; + +again: + prev_raw_count = atomic64_read(&hwc->prev_count); + local_irq_save(flags); + /* Make the counter value be a "real" one. */ + new_raw_count = mipspmu->read_counter(idx); + if (new_raw_count & (test_bit(idx, cpuc->msbs) << 31)) { + new_raw_count &= 0x7fffffff; + clear_bit(idx, cpuc->msbs); + } else + new_raw_count |= (test_bit(idx, cpuc->msbs) << 31); + local_irq_restore(flags); + + if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count, + new_raw_count) != prev_raw_count) + goto again; + + delta = (new_raw_count << shift) - (prev_raw_count << shift); + delta >>= shift; + + atomic64_add(delta, &event->count); + atomic64_sub(delta, &hwc->period_left); + + return; +} + +static void mipspmu_disable(struct perf_event *event) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + struct hw_perf_event *hwc = &event->hw; + int idx = hwc->idx; + + + WARN_ON(idx < 0 || idx >= mipspmu->num_counters); + + /* We are working on a local event. */ + mipspmu->disable_event(idx); + + barrier(); + + mipspmu_event_update(event, hwc, idx); + cpuc->events[idx] = NULL; + clear_bit(idx, cpuc->used_mask); + + perf_event_update_userpage(event); +} + +static void mipspmu_unthrottle(struct perf_event *event) +{ + struct hw_perf_event *hwc = &event->hw; + + mipspmu->enable_event(hwc, hwc->idx); +} + +static void mipspmu_read(struct perf_event *event) +{ + struct hw_perf_event *hwc = &event->hw; + + /* Don't read disabled counters! */ + if (hwc->idx < 0) + return; + + mipspmu_event_update(event, hwc, hwc->idx); +} + +static struct pmu pmu = { + .enable = mipspmu_enable, + .disable = mipspmu_disable, + .unthrottle = mipspmu_unthrottle, + .read = mipspmu_read, +}; + +static atomic_t active_events = ATOMIC_INIT(0); +static DEFINE_MUTEX(pmu_reserve_mutex); +static int mips_pmu_irq = -1; + +static int mipspmu_get_irq(void) +{ + int err; + + if (cpu_has_veic) { + /* + * Using platform specific interrupt controller defines. + */ +#ifdef MSC01E_INT_BASE + mips_pmu_irq = MSC01E_INT_BASE + MSC01E_INT_PERFCTR; +#endif + } else if (cp0_perfcount_irq >= 0) { + /* + * Some CPUs have explicitly defined their perfcount irq. + */ +#if defined(CONFIG_CPU_RM9000) + mips_pmu_irq = rm9000_perfcount_irq; +#elif defined(CONFIG_CPU_LOONGSON2) + mips_pmu_irq = LOONGSON2_PERFCNT_IRQ; +#else + mips_pmu_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq; +#endif + } + + if (mips_pmu_irq >= 0) { + /* Request my own irq handler. */ + err = request_irq(mips_pmu_irq, mipspmu->handle_irq, + IRQF_DISABLED | IRQF_NOBALANCING, + "mips_perf_pmu", NULL); + if (err) { + pr_warning("Unable to request IRQ%d for MIPS " + "performance counters!\n", mips_pmu_irq); + } + } else if (cp0_perfcount_irq < 0) { + /* + * We are sharing the irq number with the timer interrupt. + */ + save_perf_irq = perf_irq; + perf_irq = mipspmu->handle_shared_irq; + err = 0; + } else { + pr_warning("The platform hasn't properly defined its " + "interrupt controller.\n"); + err = -ENOENT; + } + + return err; +} + +static void mipspmu_free_irq(void) +{ + if (mips_pmu_irq >= 0) + free_irq(mips_pmu_irq, NULL); + else if (cp0_perfcount_irq < 0) + perf_irq = save_perf_irq; + + mips_pmu_irq = -1; +} + +static inline unsigned int +mipspmu_perf_event_encode(const struct mips_perf_event *pev) +{ +/* + * Top 8 bits for range, next 16 bits for cntr_mask, lowest 8 bits for + * event_id. + */ +#ifdef CONFIG_MIPS_MT_SMP + return ((unsigned int)pev->range << 24) | + (pev->cntr_mask & 0xffff00) | + (pev->event_id & 0xff); +#else + return (pev->cntr_mask & 0xffff00) | + (pev->event_id & 0xff); +#endif +} + +static const struct mips_perf_event * +mipspmu_map_general_event(int idx) +{ + const struct mips_perf_event *pev; + + pev = ((*mipspmu->general_event_map)[idx].event_id == + UNSUPPORTED_PERF_EVENT_ID ? ERR_PTR(-EOPNOTSUPP) : + &(*mipspmu->general_event_map)[idx]); + + return pev; +} + +static const struct mips_perf_event * +mipspmu_map_cache_event(u64 config) +{ + unsigned int cache_type, cache_op, cache_result; + const struct mips_perf_event *pev; + + cache_type = (config >> 0) & 0xff; + if (cache_type >= PERF_COUNT_HW_CACHE_MAX) + return ERR_PTR(-EINVAL); + + cache_op = (config >> 8) & 0xff; + if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX) + return ERR_PTR(-EINVAL); + + cache_result = (config >> 16) & 0xff; + if (cache_result >= PERF_COUNT_HW_CACHE_RESULT_MAX) + return ERR_PTR(-EINVAL); + + pev = &((*mipspmu->cache_event_map) + [cache_type] + [cache_op] + [cache_result]); + + if (pev->event_id == UNSUPPORTED_PERF_EVENT_ID) + return ERR_PTR(-EOPNOTSUPP); + + return pev; + +} + +static int validate_event(struct cpu_hw_events *cpuc, + struct perf_event *event) +{ + struct hw_perf_event fake_hwc = event->hw; + + if (event->pmu && event->pmu != &pmu) + return 0; + + return mipspmu->alloc_counter(cpuc, &fake_hwc) >= 0; +} + +static int validate_group(struct perf_event *event) +{ + struct perf_event *sibling, *leader = event->group_leader; + struct cpu_hw_events fake_cpuc; + + memset(&fake_cpuc, 0, sizeof(fake_cpuc)); + + if (!validate_event(&fake_cpuc, leader)) + return -ENOSPC; + + list_for_each_entry(sibling, &leader->sibling_list, group_entry) { + if (!validate_event(&fake_cpuc, sibling)) + return -ENOSPC; + } + + if (!validate_event(&fake_cpuc, event)) + return -ENOSPC; + + return 0; +} + +/* + * mipsxx/rm9000/loongson2 have different performance counters, they have + * specific low-level init routines. + */ +static int __hw_perf_event_init(struct perf_event *event); + +static void hw_perf_event_destroy(struct perf_event *event) +{ + if (atomic_dec_and_mutex_lock(&active_events, + &pmu_reserve_mutex)) { + /* + * We must not call the destroy function with interrupts + * disabled. + */ + on_each_cpu(reset_counters, + (void *)(long)mipspmu->num_counters, 1); + mipspmu_free_irq(); + mutex_unlock(&pmu_reserve_mutex); + } +} + +const struct pmu *hw_perf_event_init(struct perf_event *event) +{ + int err = 0; + + if (!mipspmu || event->cpu >= nr_cpumask_bits || + (event->cpu >= 0 && !cpu_online(event->cpu))) + return ERR_PTR(-ENODEV); + + if (!atomic_inc_not_zero(&active_events)) { + if (atomic_read(&active_events) > MIPS_MAX_HWEVENTS) { + atomic_dec(&active_events); + return ERR_PTR(-ENOSPC); + } + + mutex_lock(&pmu_reserve_mutex); + if (atomic_read(&active_events) == 0) + err = mipspmu_get_irq(); + + if (!err) + atomic_inc(&active_events); + mutex_unlock(&pmu_reserve_mutex); + } + + if (err) + return ERR_PTR(err); + + err = __hw_perf_event_init(event); + if (err) + hw_perf_event_destroy(event); + + return err ? ERR_PTR(err) : &pmu; +} + +void hw_perf_enable(void) +{ + if (mipspmu) + mipspmu->start(); +} + +void hw_perf_disable(void) +{ + if (mipspmu) + mipspmu->stop(); +} + +/* This is needed by specific irq handlers in perf_event_*.c */ +static void +handle_associated_event(struct cpu_hw_events *cpuc, + int idx, struct perf_sample_data *data, struct pt_regs *regs) +{ + struct perf_event *event = cpuc->events[idx]; + struct hw_perf_event *hwc = &event->hw; + + mipspmu_event_update(event, hwc, idx); + data->period = event->hw.last_period; + if (!mipspmu_event_set_period(event, hwc, idx)) + return; + + if (perf_event_overflow(event, 0, data, regs)) + mipspmu->disable_event(idx); +} + +#include "perf_event_mipsxx.c" + +/* + * Callchain handling code. + */ +static inline void +callchain_store(struct perf_callchain_entry *entry, + u64 ip) +{ + if (entry->nr < PERF_MAX_STACK_DEPTH) + entry->ip[entry->nr++] = ip; +} + +static void +perf_callchain_user(struct pt_regs *regs, + struct perf_callchain_entry *entry) +{ + unsigned long *sp; + unsigned long addr; + + callchain_store(entry, PERF_CONTEXT_USER); + + if (!user_mode(regs)) + regs = task_pt_regs(current); + + sp = (unsigned long *)(regs->regs[29] & ~3); + + while (!kstack_end(sp)) { + unsigned long __user *p = + (unsigned long __user *)(unsigned long)sp++; + if (__get_user(addr, p)) { + pr_warning("Performance counter callchain " + "suppport: Bad stack address.\n"); + break; + } + callchain_store(entry, addr); + } +} + +static void +perf_callchain_kernel(struct pt_regs *regs, + struct perf_callchain_entry *entry) +{ + unsigned long sp = regs->regs[29]; + unsigned long ra = regs->regs[31]; + unsigned long pc = regs->cp0_epc; + + if (unlikely(!__kernel_text_address(pc))) { + pr_warning("Performance counter callchain support " + "error.\n"); + return; + } + + callchain_store(entry, PERF_CONTEXT_KERNEL); + + do { + callchain_store(entry, pc); + pc = unwind_stack(current, &sp, pc, &ra); + } while (pc); +} + +static void +perf_do_callchain(struct pt_regs *regs, + struct perf_callchain_entry *entry) +{ + int is_user; + + if (!regs) + return; + + is_user = user_mode(regs); + + if (!current || !current->pid) + return; + + if (is_user && current->state != TASK_RUNNING) + return; + + if (!is_user) + perf_callchain_kernel(regs, entry); + + if (current->mm) + perf_callchain_user(regs, entry); +} + +static DEFINE_PER_CPU(struct perf_callchain_entry, pmc_irq_entry); + +struct perf_callchain_entry * +perf_callchain(struct pt_regs *regs) +{ + struct perf_callchain_entry *entry = &__get_cpu_var(pmc_irq_entry); + + entry->nr = 0; + perf_do_callchain(regs, entry); + return entry; +} + diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c new file mode 100644 index 0000000..599e261 --- /dev/null +++ b/arch/mips/kernel/perf_event_mipsxx.c @@ -0,0 +1,869 @@ +#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) || \ + defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_SB1) + +#define M_PERFCTL_COUNT_EVENT_WHENEVER \ + (M_PERFCTL_EXL | M_PERFCTL_KERNEL | \ + M_PERFCTL_USER | M_PERFCTL_SUPERVISOR | \ + M_PERFCTL_INTERRUPT_ENABLE) + +#ifdef CONFIG_MIPS_MT_SMP +#define M_PERFCTL_CONFIG_MASK 0x3fff801f +#else +#define M_PERFCTL_CONFIG_MASK 0x1f +#endif +#define M_PERFCTL_EVENT_MASK 0xfe0 + +static inline unsigned int +mipsxx_pmu_read_counter(unsigned int idx) +{ + switch (idx) { + case 0: + return r_c0_perfcntr0(); + case 1: + return r_c0_perfcntr1(); + case 2: + return r_c0_perfcntr2(); + case 3: + return r_c0_perfcntr3(); + default: + WARN_ONCE(1, "Invalid performance counter number (%d)\n", idx); + return 0; + } +} + +static inline void +mipsxx_pmu_write_counter(unsigned int idx, unsigned int val) +{ + switch (idx) { + case 0: + w_c0_perfcntr0(val); + return; + case 1: + w_c0_perfcntr1(val); + return; + case 2: + w_c0_perfcntr2(val); + return; + case 3: + w_c0_perfcntr3(val); + return; + } +} + +static inline unsigned int +mipsxx_pmu_read_control(unsigned int idx) +{ + switch (idx) { + case 0: + return r_c0_perfctrl0(); + case 1: + return r_c0_perfctrl1(); + case 2: + return r_c0_perfctrl2(); + case 3: + return r_c0_perfctrl3(); + default: + WARN_ONCE(1, "Invalid performance counter number (%d)\n", idx); + return 0; + } +} + +static inline void +mipsxx_pmu_write_control(unsigned int idx, unsigned int val) +{ + switch (idx) { + case 0: + w_c0_perfctrl0(val); + return; + case 1: + w_c0_perfctrl1(val); + return; + case 2: + w_c0_perfctrl2(val); + return; + case 3: + w_c0_perfctrl3(val); + return; + } +} + +#ifdef CONFIG_MIPS_MT_SMP +static DEFINE_RWLOCK(pmuint_rwlock); +#endif + +/* 24K/34K/1004K cores can share the same event map. */ +static const struct mips_perf_event mipsxxcore_event_map + [PERF_COUNT_HW_MAX] = { + [PERF_COUNT_HW_CPU_CYCLES] = { 0x00, CNTR_EVEN | CNTR_ODD, P }, + [PERF_COUNT_HW_INSTRUCTIONS] = { 0x01, CNTR_EVEN | CNTR_ODD, T }, + [PERF_COUNT_HW_CACHE_REFERENCES] = { UNSUPPORTED_PERF_EVENT_ID }, + [PERF_COUNT_HW_CACHE_MISSES] = { UNSUPPORTED_PERF_EVENT_ID }, + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = { 0x02, CNTR_EVEN, T }, + [PERF_COUNT_HW_BRANCH_MISSES] = { 0x02, CNTR_ODD, T }, + [PERF_COUNT_HW_BUS_CYCLES] = { UNSUPPORTED_PERF_EVENT_ID }, +}; + +/* 74K core has different branch event code. */ +static const struct mips_perf_event mipsxx74Kcore_event_map + [PERF_COUNT_HW_MAX] = { + [PERF_COUNT_HW_CPU_CYCLES] = { 0x00, CNTR_EVEN | CNTR_ODD, P }, + [PERF_COUNT_HW_INSTRUCTIONS] = { 0x01, CNTR_EVEN | CNTR_ODD, T }, + [PERF_COUNT_HW_CACHE_REFERENCES] = { UNSUPPORTED_PERF_EVENT_ID }, + [PERF_COUNT_HW_CACHE_MISSES] = { UNSUPPORTED_PERF_EVENT_ID }, + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = { 0x27, CNTR_EVEN, T }, + [PERF_COUNT_HW_BRANCH_MISSES] = { 0x27, CNTR_ODD, T }, + [PERF_COUNT_HW_BUS_CYCLES] = { UNSUPPORTED_PERF_EVENT_ID }, +}; + +/* 24K/34K/1004K cores can share the same cache event map. */ +static const struct mips_perf_event mipsxxcore_cache_map + [PERF_COUNT_HW_CACHE_MAX] + [PERF_COUNT_HW_CACHE_OP_MAX] + [PERF_COUNT_HW_CACHE_RESULT_MAX] = { +[C(L1D)] = { + /* + * Like some other architectures (e.g. ARM), the performance + * counters don't differentiate between read and write + * accesses/misses, so this isn't strictly correct, but it's the + * best we can do. Writes and reads get combined. + */ + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = { 0x0a, CNTR_EVEN, T }, + [C(RESULT_MISS)] = { 0x0b, CNTR_EVEN | CNTR_ODD, T }, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = { 0x0a, CNTR_EVEN, T }, + [C(RESULT_MISS)] = { 0x0b, CNTR_EVEN | CNTR_ODD, T }, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, +}, +[C(L1I)] = { + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = { 0x09, CNTR_EVEN, T }, + [C(RESULT_MISS)] = { 0x09, CNTR_ODD, T }, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = { 0x09, CNTR_EVEN, T }, + [C(RESULT_MISS)] = { 0x09, CNTR_ODD, T }, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = { 0x14, CNTR_EVEN, T }, + /* + * Note that MIPS has only "hit" events countable for + * the prefetch operation. + */ + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, +}, +[C(LL)] = { + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = { 0x15, CNTR_ODD, P }, + [C(RESULT_MISS)] = { 0x16, CNTR_EVEN, P }, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = { 0x15, CNTR_ODD, P }, + [C(RESULT_MISS)] = { 0x16, CNTR_EVEN, P }, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, +}, +[C(DTLB)] = { + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = { 0x06, CNTR_EVEN, T }, + [C(RESULT_MISS)] = { 0x06, CNTR_ODD, T }, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = { 0x06, CNTR_EVEN, T }, + [C(RESULT_MISS)] = { 0x06, CNTR_ODD, T }, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, +}, +[C(ITLB)] = { + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = { 0x05, CNTR_EVEN, T }, + [C(RESULT_MISS)] = { 0x05, CNTR_ODD, T }, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = { 0x05, CNTR_EVEN, T }, + [C(RESULT_MISS)] = { 0x05, CNTR_ODD, T }, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, +}, +[C(BPU)] = { + /* Using the same code for *HW_BRANCH* */ + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = { 0x02, CNTR_EVEN, T }, + [C(RESULT_MISS)] = { 0x02, CNTR_ODD, T }, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = { 0x02, CNTR_EVEN, T }, + [C(RESULT_MISS)] = { 0x02, CNTR_ODD, T }, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, +}, +}; + +/* 74K core has completely different cache event map. */ +static const struct mips_perf_event mipsxx74Kcore_cache_map + [PERF_COUNT_HW_CACHE_MAX] + [PERF_COUNT_HW_CACHE_OP_MAX] + [PERF_COUNT_HW_CACHE_RESULT_MAX] = { +[C(L1D)] = { + /* + * Like some other architectures (e.g. ARM), the performance + * counters don't differentiate between read and write + * accesses/misses, so this isn't strictly correct, but it's the + * best we can do. Writes and reads get combined. + */ + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = { 0x17, CNTR_ODD, T }, + [C(RESULT_MISS)] = { 0x18, CNTR_ODD, T }, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = { 0x17, CNTR_ODD, T }, + [C(RESULT_MISS)] = { 0x18, CNTR_ODD, T }, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, +}, +[C(L1I)] = { + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = { 0x06, CNTR_EVEN, T }, + [C(RESULT_MISS)] = { 0x06, CNTR_ODD, T }, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = { 0x06, CNTR_EVEN, T }, + [C(RESULT_MISS)] = { 0x06, CNTR_ODD, T }, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = { 0x34, CNTR_EVEN, T }, + /* + * Note that MIPS has only "hit" events countable for + * the prefetch operation. + */ + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, +}, +[C(LL)] = { + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = { 0x1c, CNTR_ODD, P }, + [C(RESULT_MISS)] = { 0x1d, CNTR_EVEN | CNTR_ODD, P }, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = { 0x1c, CNTR_ODD, P }, + [C(RESULT_MISS)] = { 0x1d, CNTR_EVEN | CNTR_ODD, P }, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, +}, +[C(DTLB)] = { + /* 74K core does not have specific DTLB events. */ + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, +}, +[C(ITLB)] = { + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = { 0x04, CNTR_EVEN, T }, + [C(RESULT_MISS)] = { 0x04, CNTR_ODD, T }, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = { 0x04, CNTR_EVEN, T }, + [C(RESULT_MISS)] = { 0x04, CNTR_ODD, T }, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, +}, +[C(BPU)] = { + /* Using the same code for *HW_BRANCH* */ + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = { 0x27, CNTR_EVEN, T }, + [C(RESULT_MISS)] = { 0x27, CNTR_ODD, T }, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = { 0x27, CNTR_EVEN, T }, + [C(RESULT_MISS)] = { 0x27, CNTR_ODD, T }, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, +}, +}; + +#ifdef CONFIG_MIPS_MT_SMP +static void +check_and_calc_range(struct perf_event *event, + const struct mips_perf_event *pev) +{ + struct hw_perf_event *hwc = &event->hw; + + if (event->cpu >= 0) { + if (pev->range > V) { + /* + * The user selected an event that is processor + * wide, while expecting it to be VPE wide. + */ + hwc->config_base |= M_TC_EN_ALL; + } else { + /* + * FIXME: cpu_data[event->cpu].vpe_id reports 0 + * for both CPUs. + */ + hwc->config_base |= M_PERFCTL_VPEID(event->cpu); + hwc->config_base |= M_TC_EN_VPE; + } + } else + hwc->config_base |= M_TC_EN_ALL; +} +#else +static void +check_and_calc_range(struct perf_event *event, + const struct mips_perf_event *pev) +{ +} +#endif + +static int __hw_perf_event_init(struct perf_event *event) +{ + struct perf_event_attr *attr = &event->attr; + struct hw_perf_event *hwc = &event->hw; + const struct mips_perf_event *pev; + int err; + + /* Returning MIPS event descriptor for generic perf event. */ + if (PERF_TYPE_HARDWARE == event->attr.type) { + if (event->attr.config >= PERF_COUNT_HW_MAX) + return -EINVAL; + pev = mipspmu_map_general_event(event->attr.config); + } else if (PERF_TYPE_HW_CACHE == event->attr.type) { + pev = mipspmu_map_cache_event(event->attr.config); + } else if (PERF_TYPE_RAW == event->attr.type) { + /* We are working on the global raw event. */ + mutex_lock(&raw_event_mutex); + pev = mipspmu->map_raw_event(event->attr.config); + } else { + /* The event type is not (yet) supported. */ + return -EOPNOTSUPP; + } + + if (IS_ERR(pev)) { + if (PERF_TYPE_RAW == event->attr.type) + mutex_unlock(&raw_event_mutex); + return PTR_ERR(pev); + } + + /* + * We allow max flexibility on how each individual counter shared + * by the single CPU operates (the mode exclusion and the range). + */ + hwc->config_base = M_PERFCTL_INTERRUPT_ENABLE; + + /* Calculate range bits and validate it. */ + if (num_possible_cpus() > 1) + check_and_calc_range(event, pev); + + hwc->event_base = mipspmu_perf_event_encode(pev); + if (PERF_TYPE_RAW == event->attr.type) + mutex_unlock(&raw_event_mutex); + + if (!attr->exclude_user) + hwc->config_base |= M_PERFCTL_USER; + if (!attr->exclude_kernel) { + hwc->config_base |= M_PERFCTL_KERNEL; + /* MIPS kernel mode: KSU == 00b || EXL == 1 || ERL == 1 */ + hwc->config_base |= M_PERFCTL_EXL; + } + if (!attr->exclude_hv) + hwc->config_base |= M_PERFCTL_SUPERVISOR; + + hwc->config_base &= M_PERFCTL_CONFIG_MASK; + /* + * The event can belong to another cpu. We do not assign a local + * counter for it for now. + */ + hwc->idx = -1; + hwc->config = 0; + + if (!hwc->sample_period) { + hwc->sample_period = MAX_PERIOD; + hwc->last_period = hwc->sample_period; + atomic64_set(&hwc->period_left, hwc->sample_period); + } + + err = 0; + if (event->group_leader != event) { + err = validate_group(event); + if (err) + return -EINVAL; + } + + event->destroy = hw_perf_event_destroy; + + return err; +} + +static void pause_local_counters(void) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + int counters = mipspmu->num_counters; + unsigned long flags; + + local_irq_save(flags); + switch (counters) { + case 4: + cpuc->saved_ctrl[3] = r_c0_perfctrl3(); + w_c0_perfctrl3(cpuc->saved_ctrl[3] & + ~M_PERFCTL_COUNT_EVENT_WHENEVER); + case 3: + cpuc->saved_ctrl[2] = r_c0_perfctrl2(); + w_c0_perfctrl2(cpuc->saved_ctrl[2] & + ~M_PERFCTL_COUNT_EVENT_WHENEVER); + case 2: + cpuc->saved_ctrl[1] = r_c0_perfctrl1(); + w_c0_perfctrl1(cpuc->saved_ctrl[1] & + ~M_PERFCTL_COUNT_EVENT_WHENEVER); + case 1: + cpuc->saved_ctrl[0] = r_c0_perfctrl0(); + w_c0_perfctrl0(cpuc->saved_ctrl[0] & + ~M_PERFCTL_COUNT_EVENT_WHENEVER); + } + local_irq_restore(flags); +} + +static void resume_local_counters(void) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + int counters = mipspmu->num_counters; + unsigned long flags; + + local_irq_save(flags); + switch (counters) { + case 4: + w_c0_perfctrl3(cpuc->saved_ctrl[3]); + case 3: + w_c0_perfctrl2(cpuc->saved_ctrl[2]); + case 2: + w_c0_perfctrl1(cpuc->saved_ctrl[1]); + case 1: + w_c0_perfctrl0(cpuc->saved_ctrl[0]); + } + local_irq_restore(flags); +} + +static int mipsxx_pmu_handle_shared_irq(void) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + struct perf_sample_data data; + unsigned int counters = mipspmu->num_counters; + unsigned int counter; + int handled = IRQ_NONE; + struct pt_regs *regs; + + if (cpu_has_mips_r2 && !(read_c0_cause() & (1 << 26))) + return handled; + + /* + * First we pause the local counters, so that when we are locked + * here, the counters are all paused. When it gets locked due to + * perf_disable(), the timer interrupt handler will be delayed. + * + * See also mipsxx_pmu_start(). + */ + pause_local_counters(); +#ifdef CONFIG_MIPS_MT_SMP + read_lock(&pmuint_rwlock); +#endif + + regs = get_irq_regs(); + + perf_sample_data_init(&data, 0); + + switch (counters) { +#define HANDLE_COUNTER(n) \ + case n + 1: \ + if (test_bit(n, cpuc->used_mask)) { \ + counter = r_c0_perfcntr ## n(); \ + if (counter & M_COUNTER_OVERFLOW) { \ + w_c0_perfcntr ## n(counter & \ + 0x7fffffff); \ + if (test_and_change_bit(n, cpuc->msbs)) \ + handle_associated_event(cpuc, \ + n, &data, regs); \ + handled = IRQ_HANDLED; \ + } \ + } + HANDLE_COUNTER(3) + HANDLE_COUNTER(2) + HANDLE_COUNTER(1) + HANDLE_COUNTER(0) + } + + /* + * Do all the work for the pending perf events. We can do this + * in here because the performance counter interrupt is a regular + * interrupt, not NMI. + */ + if (handled == IRQ_HANDLED) + perf_event_do_pending(); + +#ifdef CONFIG_MIPS_MT_SMP + read_unlock(&pmuint_rwlock); +#endif + resume_local_counters(); + return handled; +} + +static irqreturn_t +mipsxx_pmu_handle_irq(int irq, void *dev) +{ + return mipsxx_pmu_handle_shared_irq(); +} + +static void mipsxx_pmu_start(void) +{ +#ifdef CONFIG_MIPS_MT_SMP + write_unlock(&pmuint_rwlock); +#endif + resume_local_counters(); +} + +/* + * MIPS performance counters can be per-TC. The control registers can + * not be directly accessed accross CPUs. Hence if we want to do global + * control, we need cross CPU calls. on_each_cpu() can help us, but we + * can not make sure this function is called with interrupts enabled. So + * here we pause local counters and then grab a rwlock and leave the + * counters on other CPUs alone. If any counter interrupt raises while + * we own the write lock, simply pause local counters on that CPU and + * spin in the handler. Also we know we won't be switched to another + * CPU after pausing local counters and before grabbing the lock. + */ +static void mipsxx_pmu_stop(void) +{ + pause_local_counters(); +#ifdef CONFIG_MIPS_MT_SMP + write_lock(&pmuint_rwlock); +#endif +} + +static int +mipsxx_pmu_alloc_counter(struct cpu_hw_events *cpuc, + struct hw_perf_event *hwc) +{ + int i; + + /* + * We only need to care the counter mask. The range has been + * checked definitely. + */ + unsigned long cntr_mask = (hwc->event_base >> 8) & 0xffff; + + for (i = mipspmu->num_counters - 1; i >= 0; i--) { + /* + * Note that some MIPS perf events can be counted by both + * even and odd counters, wheresas many other are only by + * even _or_ odd counters. This introduces an issue that + * when the former kind of event takes the counter the + * latter kind of event wants to use, then the "counter + * allocation" for the latter event will fail. In fact if + * they can be dynamically swapped, they both feel happy. + * But here we leave this issue alone for now. + */ + if (test_bit(i, &cntr_mask) && + !test_and_set_bit(i, cpuc->used_mask)) + return i; + } + + return -EAGAIN; +} + +static void +mipsxx_pmu_enable_event(struct hw_perf_event *evt, int idx) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + unsigned long flags; + + WARN_ON(idx < 0 || idx >= mipspmu->num_counters); + + local_irq_save(flags); + cpuc->saved_ctrl[idx] = M_PERFCTL_EVENT(evt->event_base & 0xff) | + (evt->config_base & M_PERFCTL_CONFIG_MASK) | + /* Make sure interrupt enabled. */ + M_PERFCTL_INTERRUPT_ENABLE; + /* + * We do not actually let the counter run. Leave it until start(). + */ + local_irq_restore(flags); +} + +static void +mipsxx_pmu_disable_event(int idx) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + unsigned long flags; + + WARN_ON(idx < 0 || idx >= mipspmu->num_counters); + + local_irq_save(flags); + cpuc->saved_ctrl[idx] = mipsxx_pmu_read_control(idx) & + ~M_PERFCTL_COUNT_EVENT_WHENEVER; + mipsxx_pmu_write_control(idx, cpuc->saved_ctrl[idx]); + local_irq_restore(flags); +} + +/* 24K */ +#define IS_UNSUPPORTED_24K_EVENT(r, b) \ + ((b) == 12 || (r) == 151 || (r) == 152 || (b) == 26 || \ + (b) == 27 || (r) == 28 || (r) == 158 || (b) == 31 || \ + (b) == 32 || (b) == 34 || (b) == 36 || (r) == 168 || \ + (r) == 172 || (b) == 47 || ((b) >= 56 && (b) <= 63) || \ + ((b) >= 68 && (b) <= 127)) +#define IS_BOTH_COUNTERS_24K_EVENT(b) \ + ((b) == 0 || (b) == 1 || (b) == 11) + +/* 34K */ +#define IS_UNSUPPORTED_34K_EVENT(r, b) \ + ((b) == 12 || (r) == 27 || (r) == 158 || (b) == 36 || \ + (b) == 38 || (r) == 175 || ((b) >= 56 && (b) <= 63) || \ + ((b) >= 68 && (b) <= 127)) +#define IS_BOTH_COUNTERS_34K_EVENT(b) \ + ((b) == 0 || (b) == 1 || (b) == 11) +#ifdef CONFIG_MIPS_MT_SMP +#define IS_RANGE_P_34K_EVENT(r, b) \ + ((b) == 0 || (r) == 18 || (b) == 21 || (b) == 22 || \ + (b) == 25 || (b) == 39 || (r) == 44 || (r) == 174 || \ + (r) == 176 || ((b) >= 50 && (b) <= 55) || \ + ((b) >= 64 && (b) <= 67)) +#define IS_RANGE_V_34K_EVENT(r) ((r) == 47) +#endif + +/* 74K */ +#define IS_UNSUPPORTED_74K_EVENT(r, b) \ + ((r) == 5 || ((r) >= 135 && (r) <= 137) || \ + ((b) >= 10 && (b) <= 12) || (b) == 22 || (b) == 27 || \ + (b) == 33 || (b) == 34 || ((b) >= 47 && (b) <= 49) || \ + (r) == 178 || (b) == 55 || (b) == 57 || (b) == 60 || \ + (b) == 61 || (r) == 62 || (r) == 191 || \ + ((b) >= 64 && (b) <= 127)) +#define IS_BOTH_COUNTERS_74K_EVENT(b) \ + ((b) == 0 || (b) == 1) + +/* 1004K */ +#define IS_UNSUPPORTED_1004K_EVENT(r, b) \ + ((b) == 12 || (r) == 27 || (r) == 158 || (b) == 38 || \ + (r) == 175 || (b) == 63 || ((b) >= 68 && (b) <= 127)) +#define IS_BOTH_COUNTERS_1004K_EVENT(b) \ + ((b) == 0 || (b) == 1 || (b) == 11) +#ifdef CONFIG_MIPS_MT_SMP +#define IS_RANGE_P_1004K_EVENT(r, b) \ + ((b) == 0 || (r) == 18 || (b) == 21 || (b) == 22 || \ + (b) == 25 || (b) == 36 || (b) == 39 || (r) == 44 || \ + (r) == 174 || (r) == 176 || ((b) >= 50 && (b) <= 59) || \ + (r) == 188 || (b) == 61 || (b) == 62 || \ + ((b) >= 64 && (b) <= 67)) +#define IS_RANGE_V_1004K_EVENT(r) ((r) == 47) +#endif + +/* + * User can use 0-255 raw events, where 0-127 for the events of even + * counters, and 128-255 for odd counters. Note that bit 7 is used to + * indicate the parity. So, for example, when user wants to take the + * Event Num of 15 for odd counters (by referring to the user manual), + * then 128 needs to be added to 15 as the input for the event config, + * i.e., 143 (0x8F) to be used. + */ +static const struct mips_perf_event * +mipsxx_pmu_map_raw_event(u64 config) +{ + unsigned int raw_id = config & 0xff; + unsigned int base_id = raw_id & 0x7f; + + switch (current_cpu_type()) { + case CPU_24K: + if (IS_UNSUPPORTED_24K_EVENT(raw_id, base_id)) + return ERR_PTR(-EOPNOTSUPP); + raw_event.event_id = base_id; + if (IS_BOTH_COUNTERS_24K_EVENT(base_id)) + raw_event.cntr_mask = CNTR_EVEN | CNTR_ODD; + else + raw_event.cntr_mask = + raw_id > 127 ? CNTR_ODD : CNTR_EVEN; +#ifdef CONFIG_MIPS_MT_SMP + /* + * This is actually doing nothing. Non-multithreading + * CPUs will not check and calculate the range. + */ + raw_event.range = P; +#endif + break; + case CPU_34K: + if (IS_UNSUPPORTED_34K_EVENT(raw_id, base_id)) + return ERR_PTR(-EOPNOTSUPP); + raw_event.event_id = base_id; + if (IS_BOTH_COUNTERS_34K_EVENT(base_id)) + raw_event.cntr_mask = CNTR_EVEN | CNTR_ODD; + else + raw_event.cntr_mask = + raw_id > 127 ? CNTR_ODD : CNTR_EVEN; +#ifdef CONFIG_MIPS_MT_SMP + if (IS_RANGE_P_34K_EVENT(raw_id, base_id)) + raw_event.range = P; + else if (unlikely(IS_RANGE_V_34K_EVENT(raw_id))) + raw_event.range = V; + else + raw_event.range = T; +#endif + break; + case CPU_74K: + if (IS_UNSUPPORTED_74K_EVENT(raw_id, base_id)) + return ERR_PTR(-EOPNOTSUPP); + raw_event.event_id = base_id; + if (IS_BOTH_COUNTERS_74K_EVENT(base_id)) + raw_event.cntr_mask = CNTR_EVEN | CNTR_ODD; + else + raw_event.cntr_mask = + raw_id > 127 ? CNTR_ODD : CNTR_EVEN; +#ifdef CONFIG_MIPS_MT_SMP + raw_event.range = P; +#endif + break; + case CPU_1004K: + if (IS_UNSUPPORTED_1004K_EVENT(raw_id, base_id)) + return ERR_PTR(-EOPNOTSUPP); + raw_event.event_id = base_id; + if (IS_BOTH_COUNTERS_1004K_EVENT(base_id)) + raw_event.cntr_mask = CNTR_EVEN | CNTR_ODD; + else + raw_event.cntr_mask = + raw_id > 127 ? CNTR_ODD : CNTR_EVEN; +#ifdef CONFIG_MIPS_MT_SMP + if (IS_RANGE_P_1004K_EVENT(raw_id, base_id)) + raw_event.range = P; + else if (unlikely(IS_RANGE_V_1004K_EVENT(raw_id))) + raw_event.range = V; + else + raw_event.range = T; +#endif + break; + } + + return &raw_event; +} + +static struct mips_pmu mipsxxcore_pmu = { + .handle_irq = mipsxx_pmu_handle_irq, + .handle_shared_irq = mipsxx_pmu_handle_shared_irq, + .start = mipsxx_pmu_start, + .stop = mipsxx_pmu_stop, + .alloc_counter = mipsxx_pmu_alloc_counter, + .read_counter = mipsxx_pmu_read_counter, + .write_counter = mipsxx_pmu_write_counter, + .enable_event = mipsxx_pmu_enable_event, + .disable_event = mipsxx_pmu_disable_event, + .map_raw_event = mipsxx_pmu_map_raw_event, + .general_event_map = &mipsxxcore_event_map, + .cache_event_map = &mipsxxcore_cache_map, +}; + +static struct mips_pmu mipsxx74Kcore_pmu = { + .handle_irq = mipsxx_pmu_handle_irq, + .handle_shared_irq = mipsxx_pmu_handle_shared_irq, + .start = mipsxx_pmu_start, + .stop = mipsxx_pmu_stop, + .alloc_counter = mipsxx_pmu_alloc_counter, + .read_counter = mipsxx_pmu_read_counter, + .write_counter = mipsxx_pmu_write_counter, + .enable_event = mipsxx_pmu_enable_event, + .disable_event = mipsxx_pmu_disable_event, + .map_raw_event = mipsxx_pmu_map_raw_event, + .general_event_map = &mipsxx74Kcore_event_map, + .cache_event_map = &mipsxx74Kcore_cache_map, +}; + +static int __init +init_hw_perf_events(void) +{ + int counters; + + pr_info("Performance counters: "); + + counters = n_counters(); + if (counters == 0) { + pr_cont("No available PMU.\n"); + return -ENODEV; + } + +#ifdef CONFIG_MIPS_MT_SMP + cpu_has_mipsmt_pertccounters = read_c0_config7() & (1<<19); + if (!cpu_has_mipsmt_pertccounters) + counters = counters_total_to_per_cpu(counters); +#endif + + on_each_cpu(reset_counters, (void *)(long)counters, 1); + + switch (current_cpu_type()) { + case CPU_24K: + mipsxxcore_pmu.name = "mips/24K"; + mipsxxcore_pmu.num_counters = counters; + mipspmu = &mipsxxcore_pmu; + break; + case CPU_34K: + mipsxxcore_pmu.name = "mips/34K"; + mipsxxcore_pmu.num_counters = counters; + mipspmu = &mipsxxcore_pmu; + break; + case CPU_74K: + mipsxx74Kcore_pmu.name = "mips/74K"; + mipsxx74Kcore_pmu.num_counters = counters; + mipspmu = &mipsxx74Kcore_pmu; + break; + case CPU_1004K: + mipsxxcore_pmu.name = "mips/1004K"; + mipsxxcore_pmu.num_counters = counters; + mipspmu = &mipsxxcore_pmu; + break; + default: + pr_cont("Either hardware does not support performance " + "counters, or not yet implemented.\n"); + return -ENODEV; + } + + if (mipspmu) + pr_cont("%s PMU enabled, %d counters available to each " + "CPU\n", mipspmu->name, mipspmu->num_counters); + + return 0; +} +arch_initcall(init_hw_perf_events); + +#endif -- 1.7.0.4 From jamie.iles@picochip.com Wed May 5 17:17:07 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 May 2010 17:17:10 +0200 (CEST) Received: from mail2.picochip.com ([82.111.145.34]:58961 "EHLO thurne.picochip.com" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491927Ab0EEPRH (ORCPT ); Wed, 5 May 2010 17:17:07 +0200 Received: from localhost (wear.picochip.com [172.17.1.47]) by thurne.picochip.com (8.13.8/8.13.8) with ESMTP id o45FGeiZ004274; Wed, 5 May 2010 16:16:40 +0100 Date: Wed, 5 May 2010 16:18:25 +0100 From: Jamie Iles To: Deng-Cheng Zhu Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, a.p.zijlstra@chello.nl, paulus@samba.org, mingo@elte.hu, acme@redhat.com, jamie.iles@picochip.com Subject: Re: [PATCH v3 4/4] MIPS: add support for hardware performance events Message-ID: <20100505151825.GF5971@wear.picochip.com> References: <1273067734-4758-1-git-send-email-dengcheng.zhu@gmail.com> <1273067734-4758-5-git-send-email-dengcheng.zhu@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1273067734-4758-5-git-send-email-dengcheng.zhu@gmail.com> User-Agent: Mutt/1.5.18 (2008-05-17) X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-3.0 (thurne.picochip.com [172.17.0.105]); Wed, 05 May 2010 16:16:47 +0100 (BST) X-Virus-Scanned: clamav-milter 0.95.3 at thurne.picochip.com X-Virus-Status: Clean Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26602 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jamie.iles@picochip.com Precedence: bulk X-list: linux-mips On Wed, May 05, 2010 at 09:55:34PM +0800, Deng-Cheng Zhu wrote: > This patch is the HW perf event support. To enable this feature, we can > not choose the SMTC kernel; Oprofile should be disabled; kernel > performance events be selected. Then we can enable it in Kernel type menu. > > Oprofile for MIPS platforms initializes irq at arch init time. Currently > we do not change this logic to allow PMU reservation. > > If a platform has EIC, we can use the irq base and perf counter irq > offset defines for the interrupt controller in mipspmu_get_irq(). > > Besides generic hardware events and cache events, raw events are also > supported by this patch. Please refer to processor core software user's > manual and the comments for mipsxx_pmu_map_raw_event() for more details. This looks good to me. I'm not familiar with MIPS so I can't offer many comments in that respect but as a general question, is there a reason that OProfile can't be enabled as well? In ARM we have a method to reserve the PMU so that we can build both but only one can run at the same time. Recently, Will Deacon has posted a patch series that makes OProfile use perf events as the counter backend so you could even use both at the same time. Jamie From PeterHuewe@gmx.de Wed May 5 17:20:34 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 May 2010 17:20:38 +0200 (CEST) Received: from mail.gmx.net ([213.165.64.20]:47422 "HELO mail.gmx.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with SMTP id S1491881Ab0EEPUe (ORCPT ); Wed, 5 May 2010 17:20:34 +0200 Received: (qmail invoked by alias); 05 May 2010 15:20:25 -0000 Received: from dslb-084-056-016-121.pools.arcor-ip.net (EHLO lamer.localnet) [84.56.16.121] by mail.gmx.net (mp051) with SMTP; 05 May 2010 17:20:25 +0200 X-Authenticated: #12255092 X-Provags-ID: V01U2FsdGVkX18pY/R/rIIpJ9uiu2JJcJX/dK/00VibGwhRrrD3Pf UT28aMR26MyiFu From: Peter =?iso-8859-1?q?H=FCwe?= To: Mauro Carvalho Chehab , linuxppc-dev@ozlabs.org Subject: [PATCH] media/IR: Add missing include file to rc-map.c Date: Wed, 5 May 2010 17:20:21 +0200 User-Agent: KMail/1.12.4 (Linux/2.6.33.2; KDE/4.3.5; x86_64; ; ) Cc: "David =?iso-8859-1?q?H=E4rdeman?=" , linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sh@vger.kernel.org, linux-mips@linux-mips.org, linux-m68k@lists.linux-m68k.org MIME-Version: 1.0 Content-Type: Text/Plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Message-Id: <201005051720.22617.PeterHuewe@gmx.de> X-Y-GMX-Trusted: 0 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26603 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: PeterHuewe@gmx.de Precedence: bulk X-list: linux-mips From: Peter Huewe This patch adds a missing include linux/delay.h to prevent build failures[1-5] Signed-off-by: Peter Huewe --- KernelVersion: linux-next-20100505 References: [1] http://kisskb.ellerman.id.au/kisskb/buildresult/2571452/ [2] http://kisskb.ellerman.id.au/kisskb/buildresult/2571188/ [3] http://kisskb.ellerman.id.au/kisskb/buildresult/2571479/ [4] http://kisskb.ellerman.id.au/kisskb/buildresult/2571429/ [5] http://kisskb.ellerman.id.au/kisskb/buildresult/2571432/ drivers/media/IR/rc-map.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/media/IR/rc-map.c b/drivers/media/IR/rc-map.c index caf6a27..46a8f15 100644 --- a/drivers/media/IR/rc-map.c +++ b/drivers/media/IR/rc-map.c @@ -14,6 +14,7 @@ #include #include +#include /* Used to handle IR raw handler extensions */ static LIST_HEAD(rc_map_list); -- 1.6.4.4 From kevink@paralogos.com Wed May 5 17:43:18 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 May 2010 17:43:22 +0200 (CEST) Received: from gateway14.websitewelcome.com ([67.18.44.10]:51506 "HELO gateway14.websitewelcome.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with SMTP id S1492084Ab0EEPnS (ORCPT ); Wed, 5 May 2010 17:43:18 +0200 Received: (qmail 17164 invoked from network); 5 May 2010 15:48:14 -0000 Received: from gator750.hostgator.com (174.132.194.2) by gateway14.websitewelcome.com with SMTP; 5 May 2010 15:48:14 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=paralogos.com; h=Received:Message-ID:Date:From:User-Agent:MIME-Version:To:CC:Subject:References:In-Reply-To:Content-Type:Content-Transfer-Encoding; b=QtyVELYXXpm+RgltGeJhlC/IWrUk9DkoEzoraWQLRZbtOgnH3W5tE0aQpIAKB8Z8Q4FDrB1zyjnBh2KRoHrv2SraHQoy4HDTX4dVtaZgvzC47MHznfMG5LZkYo7zbU9m; Received: from c-98-207-157-135.hsd1.ca.comcast.net ([98.207.157.135]:1141 helo=[127.0.0.1]) by gator750.hostgator.com with esmtpa (Exim 4.69) (envelope-from ) id 1O9gkd-0004gy-TI; Wed, 05 May 2010 10:43:08 -0500 Message-ID: <4BE19214.4010209@paralogos.com> Date: Wed, 05 May 2010 08:43:16 -0700 From: "Kevin D. Kissell" User-Agent: Thunderbird 2.0.0.24 (Windows/20100228) MIME-Version: 1.0 To: Ralf Baechle CC: Shane McDonald , linux-mips@linux-mips.org, Atsushi Nemoto Subject: Re: [MIPS] FPU emulator: allow Cause bits of FCSR to be writeable by ctc1 References: <4BE122D1.3000609@paralogos.com> <20100505091159.GA4016@linux-mips.org> In-Reply-To: <20100505091159.GA4016@linux-mips.org> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - gator750.hostgator.com X-AntiAbuse: Original Domain - linux-mips.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - paralogos.com Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26604 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kevink@paralogos.com Precedence: bulk X-list: linux-mips Ralf Baechle wrote: >> I'm glad to hear that the patch is functional. It was pretty clear that >> it would solve your problem, but I was concerned that the inability to >> write the Cause bits was done as a way around some other problem. >> Someone went to a certain amount of trouble to not accept them as >> inputs, in violation of spec. I just looked back, and the bug was >> introduced as part of a patch of Ralf's from April 2005 entitled "Fix >> Preemption and SMP problems in the FP emulator". It's unlikely that >> overriding CTC semantics actually fixed any underlying problems, but it >> may have masked symptoms of problems that we can only hope have been >> fixed in the mean time. Anyone run this patch on an FPUless SMP? Oh, >> for a 34Kf with a bunch of TCs! ;o) >> > > That's commit ID 72402ec9efdb2ea7e0ec6223cf20e7301a57da02 and the patch > was comitted during the CVS days which only records the comitter but not > the author. The actual author is Atsushi Nemoto. > Well,. I certainly understood that you were simply the guy who did the commit. Didn't mean to make it sound like an accusation, but it was marginally easier to type your name and date than to find, cut, and paste the commit ID. Sorry if it came off wrong. It would be cool if Atsushi remembered the reasoning behind the change, but empirical proof that undoing it doesn't create a subtle problem for current SMP kernels would be better still. Regards, Kevin K. From anemo@mba.ocn.ne.jp Wed May 5 18:22:47 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 May 2010 18:22:51 +0200 (CEST) Received: from mv-drv-hcb003.ocn.ad.jp ([118.23.109.133]:56763 "EHLO mv-drv-hcb003.ocn.ad.jp" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492149Ab0EEQWr (ORCPT ); Wed, 5 May 2010 18:22:47 +0200 Received: from vcmba.ocn.ne.jp (localhost.localdomain [127.0.0.1]) by mv-drv-hcb003.ocn.ad.jp (Postfix) with ESMTP id A80A656421D; Thu, 6 May 2010 01:22:42 +0900 (JST) Received: from localhost (softbank221040169135.bbtec.net [221.40.169.135]) by vcmba.ocn.ne.jp (Postfix) with ESMTP; Thu, 6 May 2010 01:22:42 +0900 (JST) Date: Thu, 06 May 2010 01:22:40 +0900 (JST) Message-Id: <20100506.012240.118951273.anemo@mba.ocn.ne.jp> To: kevink@paralogos.com Cc: ralf@linux-mips.org, mcdonald.shane@gmail.com, linux-mips@linux-mips.org Subject: Re: [MIPS] FPU emulator: allow Cause bits of FCSR to be writeable by ctc1 From: Atsushi Nemoto In-Reply-To: <4BE19214.4010209@paralogos.com> References: <4BE122D1.3000609@paralogos.com> <20100505091159.GA4016@linux-mips.org> <4BE19214.4010209@paralogos.com> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 22.2 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26605 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Wed, 05 May 2010 08:43:16 -0700, "Kevin D. Kissell" wrote: > >> I'm glad to hear that the patch is functional. It was pretty clear that > >> it would solve your problem, but I was concerned that the inability to > >> write the Cause bits was done as a way around some other problem. > >> Someone went to a certain amount of trouble to not accept them as > >> inputs, in violation of spec. I just looked back, and the bug was > >> introduced as part of a patch of Ralf's from April 2005 entitled "Fix > >> Preemption and SMP problems in the FP emulator". It's unlikely that > >> overriding CTC semantics actually fixed any underlying problems, but it > >> may have masked symptoms of problems that we can only hope have been > >> fixed in the mean time. Anyone run this patch on an FPUless SMP? Oh, > >> for a 34Kf with a bunch of TCs! ;o) > >> > > > > That's commit ID 72402ec9efdb2ea7e0ec6223cf20e7301a57da02 and the patch > > was comitted during the CVS days which only records the comitter but not > > the author. The actual author is Atsushi Nemoto. > > > Well,. I certainly understood that you were simply the guy who did the > commit. Didn't mean to make it sound like an accusation, but it was > marginally easier to type your name and date than to find, cut, and > paste the commit ID. Sorry if it came off wrong. It would be cool if > Atsushi remembered the reasoning behind the change, but empirical proof > that undoing it doesn't create a subtle problem for current SMP kernels > would be better still. Yes, that's my patch. Though I cannot remember precisely, maybe I just had (mis)thought Cause bits in FCSR are read-only at that time. I have never used real SMP MIPS platforms, so there must be no SMP-related issues. I'm OK with Kevin's fix. Thank you very much for reporting and investigating. --- Atsushi Nemoto From kevink@paralogos.com Wed May 5 21:20:15 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 May 2010 21:20:19 +0200 (CEST) Received: from gateway12.websitewelcome.com ([69.93.243.6]:48851 "HELO gateway12.websitewelcome.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with SMTP id S1492428Ab0EETUP (ORCPT ); Wed, 5 May 2010 21:20:15 +0200 Received: (qmail 21082 invoked from network); 5 May 2010 19:23:18 -0000 Received: from gator750.hostgator.com (174.132.194.2) by gateway12.websitewelcome.com with SMTP; 5 May 2010 19:23:18 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=paralogos.com; h=Received:Message-ID:Date:From:User-Agent:MIME-Version:To:CC:Subject:References:In-Reply-To:Content-Type:Content-Transfer-Encoding; b=S7T5NXASQ2ttYMgdjbb4sw0S2dLAL1Q2EVFyD0IJv2AWveWviGFu6LqPXu0l3PO8p6z1UYqV45sZaAvg7LalIIZYGQZTcNROWyCIGQQGdTkN3aQIemnxz0oSyiPO6342; Received: from 216-239-45-4.google.com ([216.239.45.4]:39454 helo=epiktistes.mtv.corp.google.com) by gator750.hostgator.com with esmtpa (Exim 4.69) (envelope-from ) id 1O9k8Y-0000Dw-75; Wed, 05 May 2010 14:20:02 -0500 Message-ID: <4BE1C4EA.1020202@paralogos.com> Date: Wed, 05 May 2010 12:20:10 -0700 From: "Kevin D. Kissell" User-Agent: Thunderbird 2.0.0.24 (X11/20100317) MIME-Version: 1.0 To: Atsushi Nemoto CC: ralf@linux-mips.org, mcdonald.shane@gmail.com, linux-mips@linux-mips.org Subject: Re: [MIPS] FPU emulator: allow Cause bits of FCSR to be writeable by ctc1 References: <4BE122D1.3000609@paralogos.com> <20100505091159.GA4016@linux-mips.org> <4BE19214.4010209@paralogos.com> <20100506.012240.118951273.anemo@mba.ocn.ne.jp> In-Reply-To: <20100506.012240.118951273.anemo@mba.ocn.ne.jp> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - gator750.hostgator.com X-AntiAbuse: Original Domain - linux-mips.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - paralogos.com Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26606 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kevink@paralogos.com Precedence: bulk X-list: linux-mips Atsushi Nemoto wrote: > On Wed, 05 May 2010 08:43:16 -0700, "Kevin D. Kissell" wrote: > >>>> I'm glad to hear that the patch is functional. It was pretty clear that >>>> it would solve your problem, but I was concerned that the inability to >>>> write the Cause bits was done as a way around some other problem. >>>> Someone went to a certain amount of trouble to not accept them as >>>> inputs, in violation of spec. I just looked back, and the bug was >>>> introduced as part of a patch of Ralf's from April 2005 entitled "Fix >>>> Preemption and SMP problems in the FP emulator". It's unlikely that >>>> overriding CTC semantics actually fixed any underlying problems, but it >>>> may have masked symptoms of problems that we can only hope have been >>>> fixed in the mean time. Anyone run this patch on an FPUless SMP? Oh, >>>> for a 34Kf with a bunch of TCs! ;o) >>>> >>> That's commit ID 72402ec9efdb2ea7e0ec6223cf20e7301a57da02 and the patch >>> was comitted during the CVS days which only records the comitter but not >>> the author. The actual author is Atsushi Nemoto. >>> >> Well,. I certainly understood that you were simply the guy who did the >> commit. Didn't mean to make it sound like an accusation, but it was >> marginally easier to type your name and date than to find, cut, and >> paste the commit ID. Sorry if it came off wrong. It would be cool if >> Atsushi remembered the reasoning behind the change, but empirical proof >> that undoing it doesn't create a subtle problem for current SMP kernels >> would be better still. >> > > Yes, that's my patch. Though I cannot remember precisely, maybe I > just had (mis)thought Cause bits in FCSR are read-only at that time. > I have never used real SMP MIPS platforms, so there must be no > SMP-related issues. > > I'm OK with Kevin's fix. Thank you very much for reporting and > investigating. > The patch was labeled for "preemption and SMP problems", and if you weren't working on an SMP system, I'd guess that you were working with full preemption and seeing a problem that you might have assumed was also relevant to SMP. The FPU emulator *shouldn't* have pre-emption issues, since it works off of data structures that are instantiated per thread context. The FCSR seen by thread A is logically independent of that seen by thread B, so that even if one emulation was preempted in the middle by another, they shouldn't be able to interfere with one another. That was the concept, anyway. I'm cool with the patch as is, but in the general spirit of regarding numeric constants other than 0 and 1 as instruments of Satan, it would probably be even better if those reserved bits were defined (FPU_CSR_RSVD, or whatever is compatible with existing convention for such bits) along with the other FCSR bit masks in mipsregs.h, so that the assigment looks like: ctx->fcr31 = (value & ~(FPU_CSR_RSVD | 0x3)) | ieee_rm[value & 0x3]; That way, in the unlikely event that those reserved bits get architecturally assigned, the definition of the field can be changed, and that absolute hex mask won't be hardwired and burried in the code to screw things up. If you don't want to touch mipsregs.h, then you should consider just using 0x3 as the value mask, and not 0x1c0003 as I proposed. I honestly can't think of any problems that would arise from implementing those bits as R/W, even though they aren't in hardware, apart from maybe not successfully running AVPs as user-mode Linux binaries. Regards, Kevin K. From David.Daney@caviumnetworks.com Thu May 6 01:03:51 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 01:03:55 +0200 (CEST) Received: from mail3.caviumnetworks.com ([12.108.191.235]:1661 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492511Ab0EEXDv (ORCPT ); Thu, 6 May 2010 01:03:51 +0200 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Wed, 05 May 2010 16:04:05 -0700 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 5 May 2010 16:03:23 -0700 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Wed, 5 May 2010 16:03:23 -0700 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.3/8.14.3) with ESMTP id o45N3J6s011087; Wed, 5 May 2010 16:03:19 -0700 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.3/8.14.3/Submit) id o45N3Jco011086; Wed, 5 May 2010 16:03:19 -0700 From: David Daney To: netdev@vger.kernel.org Cc: linux-mips@linux-mips.org, David Daney Subject: [PATCH 1/6] netdev: octeon_mgmt: Use proper MAC addresses. Date: Wed, 5 May 2010 16:03:08 -0700 Message-Id: <1273100593-11043-2-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.6.1 In-Reply-To: <1273100593-11043-1-git-send-email-ddaney@caviumnetworks.com> References: <1273100593-11043-1-git-send-email-ddaney@caviumnetworks.com> X-OriginalArrivalTime: 05 May 2010 23:03:23.0864 (UTC) FILETIME=[29CF8580:01CAECA7] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26607 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips The original implementation incorrectly uses netdev->dev_addrs. Use netdev->uc instead. Also use netdev_for_each_uc_addr to iterate over the addresses. Fix comment. Signed-off-by: David Daney --- drivers/net/octeon/octeon_mgmt.c | 15 +++++---------- 1 files changed, 5 insertions(+), 10 deletions(-) diff --git a/drivers/net/octeon/octeon_mgmt.c b/drivers/net/octeon/octeon_mgmt.c index 6b1d443..bbbd737 100644 --- a/drivers/net/octeon/octeon_mgmt.c +++ b/drivers/net/octeon/octeon_mgmt.c @@ -475,12 +475,11 @@ static void octeon_mgmt_set_rx_filtering(struct net_device *netdev) unsigned int multicast_mode = 1; /* 1 - Reject all multicast. */ struct octeon_mgmt_cam_state cam_state; struct netdev_hw_addr *ha; - struct list_head *pos; int available_cam_entries; memset(&cam_state, 0, sizeof(cam_state)); - if ((netdev->flags & IFF_PROMISC) || netdev->dev_addrs.count > 7) { + if ((netdev->flags & IFF_PROMISC) || netdev->uc.count > 7) { cam_mode = 0; available_cam_entries = 8; } else { @@ -488,13 +487,13 @@ static void octeon_mgmt_set_rx_filtering(struct net_device *netdev) * One CAM entry for the primary address, leaves seven * for the secondary addresses. */ - available_cam_entries = 7 - netdev->dev_addrs.count; + available_cam_entries = 7 - netdev->uc.count; } if (netdev->flags & IFF_MULTICAST) { if (cam_mode == 0 || (netdev->flags & IFF_ALLMULTI) || netdev_mc_count(netdev) > available_cam_entries) - multicast_mode = 2; /* 1 - Accept all multicast. */ + multicast_mode = 2; /* 2 - Accept all multicast. */ else multicast_mode = 0; /* 0 - Use CAM. */ } @@ -502,12 +501,8 @@ static void octeon_mgmt_set_rx_filtering(struct net_device *netdev) if (cam_mode == 1) { /* Add primary address. */ octeon_mgmt_cam_state_add(&cam_state, netdev->dev_addr); - list_for_each(pos, &netdev->dev_addrs.list) { - struct netdev_hw_addr *hw_addr; - hw_addr = list_entry(pos, struct netdev_hw_addr, list); - octeon_mgmt_cam_state_add(&cam_state, hw_addr->addr); - list = list->next; - } + netdev_for_each_uc_addr(ha, netdev) + octeon_mgmt_cam_state_add(&cam_state, ha->addr); } if (multicast_mode == 0) { netdev_for_each_mc_addr(ha, netdev) -- 1.6.6.1 From David.Daney@caviumnetworks.com Thu May 6 01:04:14 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 01:04:19 +0200 (CEST) Received: from mail3.caviumnetworks.com ([12.108.191.235]:1665 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492510Ab0EEXDv (ORCPT ); Thu, 6 May 2010 01:03:51 +0200 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Wed, 05 May 2010 16:04:05 -0700 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 5 May 2010 16:03:24 -0700 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Wed, 5 May 2010 16:03:23 -0700 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.3/8.14.3) with ESMTP id o45N3JMc011091; Wed, 5 May 2010 16:03:19 -0700 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.3/8.14.3/Submit) id o45N3Jdd011090; Wed, 5 May 2010 16:03:19 -0700 From: David Daney To: netdev@vger.kernel.org Cc: linux-mips@linux-mips.org, David Daney Subject: [PATCH 2/6] netdev: octeon_mgmt: Fix race condition freeing TX buffers. Date: Wed, 5 May 2010 16:03:09 -0700 Message-Id: <1273100593-11043-3-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.6.1 In-Reply-To: <1273100593-11043-1-git-send-email-ddaney@caviumnetworks.com> References: <1273100593-11043-1-git-send-email-ddaney@caviumnetworks.com> X-OriginalArrivalTime: 05 May 2010 23:03:24.0020 (UTC) FILETIME=[29E75340:01CAECA7] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26608 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Under heavy load the TX cleanup tasklet and xmit threads would race and try to free too many buffers. Signed-off-by: David Daney --- drivers/net/octeon/octeon_mgmt.c | 11 +++++++++-- 1 files changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/net/octeon/octeon_mgmt.c b/drivers/net/octeon/octeon_mgmt.c index bbbd737..b975a2f 100644 --- a/drivers/net/octeon/octeon_mgmt.c +++ b/drivers/net/octeon/octeon_mgmt.c @@ -189,12 +189,19 @@ static void octeon_mgmt_clean_tx_buffers(struct octeon_mgmt *p) mix_orcnt.u64 = cvmx_read_csr(CVMX_MIXX_ORCNT(port)); while (mix_orcnt.s.orcnt) { + spin_lock_irqsave(&p->tx_list.lock, flags); + + mix_orcnt.u64 = cvmx_read_csr(CVMX_MIXX_ORCNT(port)); + + if (mix_orcnt.s.orcnt == 0) { + spin_unlock_irqrestore(&p->tx_list.lock, flags); + break; + } + dma_sync_single_for_cpu(p->dev, p->tx_ring_handle, ring_size_to_bytes(OCTEON_MGMT_TX_RING_SIZE), DMA_BIDIRECTIONAL); - spin_lock_irqsave(&p->tx_list.lock, flags); - re.d64 = p->tx_ring[p->tx_next_clean]; p->tx_next_clean = (p->tx_next_clean + 1) % OCTEON_MGMT_TX_RING_SIZE; -- 1.6.6.1 From David.Daney@caviumnetworks.com Thu May 6 01:04:38 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 01:04:46 +0200 (CEST) Received: from mail3.caviumnetworks.com ([12.108.191.235]:1663 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492509Ab0EEXDv (ORCPT ); Thu, 6 May 2010 01:03:51 +0200 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Wed, 05 May 2010 16:04:05 -0700 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 5 May 2010 16:03:23 -0700 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Wed, 5 May 2010 16:03:23 -0700 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.3/8.14.3) with ESMTP id o45N3IM9011083; Wed, 5 May 2010 16:03:19 -0700 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.3/8.14.3/Submit) id o45N3GFF011082; Wed, 5 May 2010 16:03:16 -0700 From: David Daney To: netdev@vger.kernel.org Cc: linux-mips@linux-mips.org, David Daney Subject: [PATCH 0/6] netdev: octeon_mgmt: A few fixes for 2.6.35. Date: Wed, 5 May 2010 16:03:07 -0700 Message-Id: <1273100593-11043-1-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.6.1 X-OriginalArrivalTime: 05 May 2010 23:03:23.0864 (UTC) FILETIME=[29CF8580:01CAECA7] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26609 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips The 1/6 corrects a compile error that seems to have crept in, as well as correcting the dev_addrs/uc snafu. 2/6 - 5/6 are some other small bug fixes. 6/6 just re-formats the code some. They are relative to commit 0a12761bcd5646691c5d16dd93df84d1b8849285 in net-next-2.6/master If OK please apply. Thanks, David Daney David Daney (6): netdev: octeon_mgmt: Use proper MAC addresses. netdev: octeon_mgmt: Fix race condition freeing TX buffers. netdev: octeon_mgmt: Fix race manipulating irq bits. netdev: octeon_mgmt: Free TX skbufs in a timely manner. netdev: octeon_mgmt: Try not to drop TX packets when stopping the queue. netdev: octeon_mgmt: Remove some gratuitous blank lines. drivers/net/octeon/octeon_mgmt.c | 57 ++++++++++++++++++------------------- 1 files changed, 28 insertions(+), 29 deletions(-) From David.Daney@caviumnetworks.com Thu May 6 01:05:05 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 01:05:10 +0200 (CEST) Received: from mail3.caviumnetworks.com ([12.108.191.235]:1675 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492513Ab0EEXDx (ORCPT ); Thu, 6 May 2010 01:03:53 +0200 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Wed, 05 May 2010 16:04:05 -0700 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 5 May 2010 16:03:24 -0700 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Wed, 5 May 2010 16:03:24 -0700 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.3/8.14.3) with ESMTP id o45N3JCj011103; Wed, 5 May 2010 16:03:19 -0700 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.3/8.14.3/Submit) id o45N3J9u011102; Wed, 5 May 2010 16:03:19 -0700 From: David Daney To: netdev@vger.kernel.org Cc: linux-mips@linux-mips.org, David Daney Subject: [PATCH 5/6] netdev: octeon_mgmt: Try not to drop TX packets when stopping the queue. Date: Wed, 5 May 2010 16:03:12 -0700 Message-Id: <1273100593-11043-6-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.6.1 In-Reply-To: <1273100593-11043-1-git-send-email-ddaney@caviumnetworks.com> References: <1273100593-11043-1-git-send-email-ddaney@caviumnetworks.com> X-OriginalArrivalTime: 05 May 2010 23:03:24.0395 (UTC) FILETIME=[2A208BB0:01CAECA7] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26610 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Stop the queue when we add the packet that will fill it instead of dropping the packet Signed-off-by: David Daney --- drivers/net/octeon/octeon_mgmt.c | 16 +++++++++++----- 1 files changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/net/octeon/octeon_mgmt.c b/drivers/net/octeon/octeon_mgmt.c index 3cf6f62..1fdc7b3 100644 --- a/drivers/net/octeon/octeon_mgmt.c +++ b/drivers/net/octeon/octeon_mgmt.c @@ -955,6 +955,7 @@ static int octeon_mgmt_xmit(struct sk_buff *skb, struct net_device *netdev) int port = p->port; union mgmt_port_ring_entry re; unsigned long flags; + int rv = NETDEV_TX_BUSY; re.d64 = 0; re.s.len = skb->len; @@ -964,15 +965,18 @@ static int octeon_mgmt_xmit(struct sk_buff *skb, struct net_device *netdev) spin_lock_irqsave(&p->tx_list.lock, flags); + if (unlikely(p->tx_current_fill >= ring_max_fill(OCTEON_MGMT_TX_RING_SIZE) - 1)) { + spin_unlock_irqrestore(&p->tx_list.lock, flags); + netif_stop_queue(netdev); + spin_lock_irqsave(&p->tx_list.lock, flags); + } + if (unlikely(p->tx_current_fill >= ring_max_fill(OCTEON_MGMT_TX_RING_SIZE))) { spin_unlock_irqrestore(&p->tx_list.lock, flags); - dma_unmap_single(p->dev, re.s.addr, re.s.len, DMA_TO_DEVICE); - - netif_stop_queue(netdev); - return NETDEV_TX_BUSY; + goto out; } __skb_queue_tail(&p->tx_list, skb); @@ -995,8 +999,10 @@ static int octeon_mgmt_xmit(struct sk_buff *skb, struct net_device *netdev) cvmx_write_csr(CVMX_MIXX_ORING2(port), 1); netdev->trans_start = jiffies; + rv = NETDEV_TX_OK; +out: octeon_mgmt_update_tx_stats(netdev); - return NETDEV_TX_OK; + return rv; } #ifdef CONFIG_NET_POLL_CONTROLLER -- 1.6.6.1 From David.Daney@caviumnetworks.com Thu May 6 01:05:29 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 01:05:34 +0200 (CEST) Received: from mail3.caviumnetworks.com ([12.108.191.235]:1673 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492516Ab0EEXDx (ORCPT ); Thu, 6 May 2010 01:03:53 +0200 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Wed, 05 May 2010 16:04:05 -0700 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 5 May 2010 16:03:24 -0700 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Wed, 5 May 2010 16:03:24 -0700 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.3/8.14.3) with ESMTP id o45N3Jtm011095; Wed, 5 May 2010 16:03:19 -0700 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.3/8.14.3/Submit) id o45N3JLe011094; Wed, 5 May 2010 16:03:19 -0700 From: David Daney To: netdev@vger.kernel.org Cc: linux-mips@linux-mips.org, David Daney Subject: [PATCH 3/6] netdev: octeon_mgmt: Fix race manipulating irq bits. Date: Wed, 5 May 2010 16:03:10 -0700 Message-Id: <1273100593-11043-4-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.6.1 In-Reply-To: <1273100593-11043-1-git-send-email-ddaney@caviumnetworks.com> References: <1273100593-11043-1-git-send-email-ddaney@caviumnetworks.com> X-OriginalArrivalTime: 05 May 2010 23:03:24.0145 (UTC) FILETIME=[29FA6610:01CAECA7] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26611 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Don't re-read the interrupt status register, clear the exact bits we will be testing. Signed-off-by: David Daney --- drivers/net/octeon/octeon_mgmt.c | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/drivers/net/octeon/octeon_mgmt.c b/drivers/net/octeon/octeon_mgmt.c index b975a2f..633fa89 100644 --- a/drivers/net/octeon/octeon_mgmt.c +++ b/drivers/net/octeon/octeon_mgmt.c @@ -598,8 +598,7 @@ static irqreturn_t octeon_mgmt_interrupt(int cpl, void *dev_id) mixx_isr.u64 = cvmx_read_csr(CVMX_MIXX_ISR(port)); /* Clear any pending interrupts */ - cvmx_write_csr(CVMX_MIXX_ISR(port), - cvmx_read_csr(CVMX_MIXX_ISR(port))); + cvmx_write_csr(CVMX_MIXX_ISR(port), mixx_isr.u64); cvmx_read_csr(CVMX_MIXX_ISR(port)); if (mixx_isr.s.irthresh) { -- 1.6.6.1 From David.Daney@caviumnetworks.com Thu May 6 01:05:53 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 01:05:59 +0200 (CEST) Received: from mail3.caviumnetworks.com ([12.108.191.235]:1674 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492519Ab0EEXDx (ORCPT ); Thu, 6 May 2010 01:03:53 +0200 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Wed, 05 May 2010 16:04:05 -0700 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 5 May 2010 16:03:24 -0700 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Wed, 5 May 2010 16:03:24 -0700 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.3/8.14.3) with ESMTP id o45N3JaD011099; Wed, 5 May 2010 16:03:19 -0700 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.3/8.14.3/Submit) id o45N3JcO011098; Wed, 5 May 2010 16:03:19 -0700 From: David Daney To: netdev@vger.kernel.org Cc: linux-mips@linux-mips.org, David Daney Subject: [PATCH 4/6] netdev: octeon_mgmt: Free TX skbufs in a timely manner. Date: Wed, 5 May 2010 16:03:11 -0700 Message-Id: <1273100593-11043-5-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.6.1 In-Reply-To: <1273100593-11043-1-git-send-email-ddaney@caviumnetworks.com> References: <1273100593-11043-1-git-send-email-ddaney@caviumnetworks.com> X-OriginalArrivalTime: 05 May 2010 23:03:24.0270 (UTC) FILETIME=[2A0D78E0:01CAECA7] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26612 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips We also reduce the high water mark to 1 so skbufs are not stranded for long periods of time. Since we are cleaning after each packet, no need to do it in the transmit path. Signed-off-by: David Daney --- drivers/net/octeon/octeon_mgmt.c | 5 ++--- 1 files changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/net/octeon/octeon_mgmt.c b/drivers/net/octeon/octeon_mgmt.c index 633fa89..3cf6f62 100644 --- a/drivers/net/octeon/octeon_mgmt.c +++ b/drivers/net/octeon/octeon_mgmt.c @@ -832,9 +832,9 @@ static int octeon_mgmt_open(struct net_device *netdev) mix_irhwm.s.irhwm = 0; cvmx_write_csr(CVMX_MIXX_IRHWM(port), mix_irhwm.u64); - /* Interrupt when we have 5 or more packets to clean. */ + /* Interrupt when we have 1 or more packets to clean. */ mix_orhwm.u64 = 0; - mix_orhwm.s.orhwm = 5; + mix_orhwm.s.orhwm = 1; cvmx_write_csr(CVMX_MIXX_ORHWM(port), mix_orhwm.u64); /* Enable receive and transmit interrupts */ @@ -995,7 +995,6 @@ static int octeon_mgmt_xmit(struct sk_buff *skb, struct net_device *netdev) cvmx_write_csr(CVMX_MIXX_ORING2(port), 1); netdev->trans_start = jiffies; - octeon_mgmt_clean_tx_buffers(p); octeon_mgmt_update_tx_stats(netdev); return NETDEV_TX_OK; } -- 1.6.6.1 From David.Daney@caviumnetworks.com Thu May 6 01:06:17 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 01:06:24 +0200 (CEST) Received: from mail3.caviumnetworks.com ([12.108.191.235]:1676 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492521Ab0EEXDz (ORCPT ); Thu, 6 May 2010 01:03:55 +0200 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Wed, 05 May 2010 16:04:05 -0700 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 5 May 2010 16:03:24 -0700 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Wed, 5 May 2010 16:03:24 -0700 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.3/8.14.3) with ESMTP id o45N3JTX011107; Wed, 5 May 2010 16:03:19 -0700 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.3/8.14.3/Submit) id o45N3JPa011106; Wed, 5 May 2010 16:03:19 -0700 From: David Daney To: netdev@vger.kernel.org Cc: linux-mips@linux-mips.org, David Daney Subject: [PATCH 6/6] netdev: octeon_mgmt: Remove some gratuitous blank lines. Date: Wed, 5 May 2010 16:03:13 -0700 Message-Id: <1273100593-11043-7-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.6.1 In-Reply-To: <1273100593-11043-1-git-send-email-ddaney@caviumnetworks.com> References: <1273100593-11043-1-git-send-email-ddaney@caviumnetworks.com> X-OriginalArrivalTime: 05 May 2010 23:03:24.0520 (UTC) FILETIME=[2A339E80:01CAECA7] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26613 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Signed-off-by: David Daney --- drivers/net/octeon/octeon_mgmt.c | 7 ------- 1 files changed, 0 insertions(+), 7 deletions(-) diff --git a/drivers/net/octeon/octeon_mgmt.c b/drivers/net/octeon/octeon_mgmt.c index 1fdc7b3..3924703 100644 --- a/drivers/net/octeon/octeon_mgmt.c +++ b/drivers/net/octeon/octeon_mgmt.c @@ -380,7 +380,6 @@ done: mix_ircnt.s.ircnt = 1; cvmx_write_csr(CVMX_MIXX_IRCNT(port), mix_ircnt.u64); return rc; - } static int octeon_mgmt_receive_packets(struct octeon_mgmt *p, int budget) @@ -390,7 +389,6 @@ static int octeon_mgmt_receive_packets(struct octeon_mgmt *p, int budget) union cvmx_mixx_ircnt mix_ircnt; int rc; - mix_ircnt.u64 = cvmx_read_csr(CVMX_MIXX_IRCNT(port)); while (work_done < budget && mix_ircnt.s.ircnt) { @@ -516,7 +514,6 @@ static void octeon_mgmt_set_rx_filtering(struct net_device *netdev) octeon_mgmt_cam_state_add(&cam_state, ha->addr); } - spin_lock_irqsave(&p->lock, flags); /* Disable packet I/O. */ @@ -525,7 +522,6 @@ static void octeon_mgmt_set_rx_filtering(struct net_device *netdev) agl_gmx_prtx.s.en = 0; cvmx_write_csr(CVMX_AGL_GMX_PRTX_CFG(port), agl_gmx_prtx.u64); - adr_ctl.u64 = 0; adr_ctl.s.cam_mode = cam_mode; adr_ctl.s.mcst = multicast_mode; @@ -928,7 +924,6 @@ static int octeon_mgmt_stop(struct net_device *netdev) octeon_mgmt_reset_hw(p); - free_irq(p->irq, netdev); /* dma_unmap is a nop on Octeon, so just free everything. */ @@ -945,7 +940,6 @@ static int octeon_mgmt_stop(struct net_device *netdev) DMA_BIDIRECTIONAL); kfree(p->tx_ring); - return 0; } @@ -1112,7 +1106,6 @@ static int __init octeon_mgmt_probe(struct platform_device *pdev) netdev->netdev_ops = &octeon_mgmt_ops; netdev->ethtool_ops = &octeon_mgmt_ethtool_ops; - /* The mgmt ports get the first N MACs. */ for (i = 0; i < 6; i++) netdev->dev_addr[i] = octeon_bootinfo->mac_addr_base[i]; -- 1.6.6.1 From dengcheng.zhu@gmail.com Thu May 6 06:23:49 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 06:23:52 +0200 (CEST) Received: from mail-yw0-f201.google.com ([209.85.211.201]:59195 "EHLO mail-yw0-f201.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491154Ab0EFEXs (ORCPT ); Thu, 6 May 2010 06:23:48 +0200 Received: by ywh39 with SMTP id 39so2475488ywh.21 for ; Wed, 05 May 2010 21:23:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:received:in-reply-to :references:date:message-id:subject:from:to:cc:content-type; bh=3EwXFyCvzPxal1PAC+I1/kIhIf0nk4AYgkQL9nm6BzA=; b=DncThrMtvvIcx0/8d0R8kUowdyeW5G7TI+lwW7tQIwBd5HRQ9RyG4YRfUxCgGbErew AIH/Weul+or6naVcpYi5r6EZnJibvEi/cWIo6518MPpfoqg9tbQw9itS2bsOKNR3CB/X ImA3eZm3zvWZbp267RiIXXYQPnUHQwsT7cFd4= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; b=mCAmN0c8KWcEH0smfHSgCbpEuqAaWBCr/HrWDB9FvAoYqp90uEn9EwsHRpDKLBbOgz B58FpqQM9CL7dlX/kVX9kXTqxuzNQys7umcAFAqwSH8mVJLXDqqqTP5HamhCe4R78ZCj 1zLyB7PWg3pPDz0yBnjaqKIJ4xgyHXcIgzsYM= MIME-Version: 1.0 Received: by 10.150.120.35 with SMTP id s35mr721546ybc.224.1273119820416; Wed, 05 May 2010 21:23:40 -0700 (PDT) Received: by 10.150.157.8 with HTTP; Wed, 5 May 2010 21:23:40 -0700 (PDT) In-Reply-To: <20100505151825.GF5971@wear.picochip.com> References: <1273067734-4758-1-git-send-email-dengcheng.zhu@gmail.com> <1273067734-4758-5-git-send-email-dengcheng.zhu@gmail.com> <20100505151825.GF5971@wear.picochip.com> Date: Thu, 6 May 2010 12:23:40 +0800 Message-ID: Subject: Re: [PATCH v3 4/4] MIPS: add support for hardware performance events From: Deng-Cheng Zhu To: Jamie Iles , Wu Zhangjin , ralf@linux-mips.org Cc: linux-mips@linux-mips.org, a.p.zijlstra@chello.nl, paulus@samba.org, mingo@elte.hu, acme@redhat.com Content-Type: text/plain; charset=ISO-8859-1 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26614 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dengcheng.zhu@gmail.com Precedence: bulk X-list: linux-mips 2010/5/5 Jamie Iles : > On Wed, May 05, 2010 at 09:55:34PM +0800, Deng-Cheng Zhu wrote: >> This patch is the HW perf event support. To enable this feature, we can >> not choose the SMTC kernel; Oprofile should be disabled; kernel >> performance events be selected. Then we can enable it in Kernel type menu. >> >> Oprofile for MIPS platforms initializes irq at arch init time. Currently >> we do not change this logic to allow PMU reservation. >> >> If a platform has EIC, we can use the irq base and perf counter irq >> offset defines for the interrupt controller in mipspmu_get_irq(). >> >> Besides generic hardware events and cache events, raw events are also >> supported by this patch. Please refer to processor core software user's >> manual and the comments for mipsxx_pmu_map_raw_event() for more details. > > This looks good to me. I'm not familiar with MIPS so I can't offer many > comments in that respect but as a general question, is there a reason that > OProfile can't be enabled as well? In ARM we have a method to reserve the PMU > so that we can build both but only one can run at the same time. Recently, > Will Deacon has posted a patch series that makes OProfile use perf events > as the counter backend so you could even use both at the same time. > > Jamie > Hi, Jamie Thanks for your review! Yes, I noticed ARM had a PMU reservation mechanism between Oprofile and Perf. It's a run-time method (irqs are requested/freed in start/stop), not an arch init method (requested/freed in init/exit). And this mechanism is great for sure. But in current MIPS/Oprofile code, this is done in init/exit. MIPS/Oprofile authors may have special concerns to do so. So I'm adding Zhangjin and Ralf in the TO-list, hoping to hear more comments about this. To reduce the risk introduced by changing this mechanism, I didn't add the PMU reservation/sharing and placed an extra comment in this patch's introduction (see above). Deng-Cheng From mcdonald.shane@gmail.com Thu May 6 07:45:21 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 07:45:29 +0200 (CEST) Received: from mail-qy0-f172.google.com ([209.85.221.172]:65365 "EHLO mail-qy0-f172.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491889Ab0EFFpV (ORCPT ); Thu, 6 May 2010 07:45:21 +0200 Received: by qyk2 with SMTP id 2so8996977qyk.20 for ; Wed, 05 May 2010 22:45:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:received:to:subject :message-id:from:date; bh=d/qfyxPFJrNIOyrMe1AYnthUaHC3k3FDB4DTBlw8p7g=; b=sEm87r9dQaB9pzD4NB3pUcL8u3Giw5wDFbJB4s2kk0q4+sUDIWKWNcDLII7lzKPEWR Luc9ZkQYnaaN5yM3KOboomsug7EZlLuMMsWpQEbPsBJdkKqE66ME080wh28Ym9DEvRHG KBmkLJejhApUbJK94ZSeWax10NQxxr450V5rI= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=to:subject:message-id:from:date; b=Bo3JYZZ/ggi9zT+mGnUvvUJsfw+WCR2p847gRFkZEge9GcBkaIGZWJNe+oB1p3sJSV n0oagfPQjFqDi8zAygWRq8CKMA9NmrRChRPgaRvngBq9xfheKCaOdRj40bNOJULZ1esV SV8BeA7GukoWRCGz+F8zgW69RcLy1XBcqQTvE= Received: by 10.224.79.92 with SMTP id o28mr6405409qak.2.1273124714872; Wed, 05 May 2010 22:45:14 -0700 (PDT) Received: from localhost ([207.47.250.203]) by mx.google.com with ESMTPS id 22sm400517qyk.10.2010.05.05.22.45.13 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 05 May 2010 22:45:14 -0700 (PDT) Received: from shane by localhost with local (Exim 4.69) (envelope-from ) id 1O9ttX-0002M5-Ku; Wed, 05 May 2010 23:45:11 -0600 To: anemo@mba.ocn.ne.jp, kevink@paralogos.com, linux-mips@linux-mips.org, ralf@linux-mips.org Subject: [PATCH v2] MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1 Message-Id: From: Shane McDonald Date: Wed, 05 May 2010 23:45:11 -0600 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26615 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mcdonald.shane@gmail.com Precedence: bulk X-list: linux-mips In the FPU emulator code of the MIPS, the Cause bits of the FCSR register are not currently writeable by the ctc1 instruction. In odd corner cases, this can cause problems. For example, a case existed where a divide-by-zero exception was generated by the FPU, and the signal handler attempted to restore the FPU registers to their state before the exception occurred. In this particular setup, writing the old value to the FCSR register would cause another divide-by-zero exception to occur immediately. The solution is to change the ctc1 instruction emulator code to allow the Cause bits of the FCSR register to be writeable. This is the behaviour of the hardware that the code is emulating. This problem was found by Shane McDonald, but the credit for the fix goes to Kevin Kissell. In Kevin's words: I submit that the bug is indeed in that ctc_op: case of the emulator. The Cause bits (17:12) are supposed to be writable by that instruction, but the CTC1 emulation won't let them be updated by the instruction. I think that actually if you just completely removed lines 387-388 [...] things would work a good deal better. At least, it would be a more accurate emulation of the architecturally defined FPU. If I wanted to be really, really pedantic (which I sometimes do), I'd also protect the reserved bits that aren't necessarily writable. Signed-off-by: Shane McDonald --- v2: Replaced an ugly magic number with a constant for the reserved bits of the FPU CSR. arch/mips/include/asm/mipsregs.h | 6 ++++++ arch/mips/math-emu/cp1emu.c | 9 +++++---- 2 files changed, 11 insertions(+), 4 deletions(-) diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 49382d5..1b17a21 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -135,6 +135,12 @@ #define FPU_CSR_COND7 0x80000000 /* $fcc7 */ /* + * Bits 18 - 20 of the FPU Status Register will be read as 0, + * and should be written as zero. +*/ +#define FPU_CSR_RSVD 0x001c0000 + +/* * X the exception cause indicator * E the exception enable * S the sticky/flag bit diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c index 8f2f8e9..ebecec6 100644 --- a/arch/mips/math-emu/cp1emu.c +++ b/arch/mips/math-emu/cp1emu.c @@ -384,10 +384,11 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) (void *) (xcp->cp0_epc), MIPSInst_RT(ir), value); #endif - value &= (FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03); - ctx->fcr31 &= ~(FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03); - /* convert to ieee library modes */ - ctx->fcr31 |= (value & ~0x3) | ieee_rm[value & 0x3]; + + /* Don't write reserved bits, + and convert to ieee library modes */ + ctx->fcr31 = (value & ~(FPU_CSR_RSVD | 0x3)) | + ieee_rm[value & 0x3]; } if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) { return SIGFPE; -- 1.6.2.4 From davem@davemloft.net Thu May 6 09:18:39 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 09:18:44 +0200 (CEST) Received: from 74-93-104-97-Washington.hfc.comcastbusiness.net ([74.93.104.97]:33433 "EHLO sunset.davemloft.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492063Ab0EFHSj (ORCPT ); Thu, 6 May 2010 09:18:39 +0200 Received: from localhost (localhost [127.0.0.1]) by sunset.davemloft.net (Postfix) with ESMTP id 6521D24C090; Thu, 6 May 2010 00:18:43 -0700 (PDT) Date: Thu, 06 May 2010 00:18:43 -0700 (PDT) Message-Id: <20100506.001843.229750901.davem@davemloft.net> To: ddaney@caviumnetworks.com Cc: netdev@vger.kernel.org, linux-mips@linux-mips.org Subject: Re: [PATCH 1/6] netdev: octeon_mgmt: Use proper MAC addresses. From: David Miller In-Reply-To: <1273100593-11043-2-git-send-email-ddaney@caviumnetworks.com> References: <1273100593-11043-1-git-send-email-ddaney@caviumnetworks.com> <1273100593-11043-2-git-send-email-ddaney@caviumnetworks.com> X-Mailer: Mew version 6.3 on Emacs 23.1 / Mule 6.0 (HANACHIRUSATO) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26616 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: davem@davemloft.net Precedence: bulk X-list: linux-mips From: David Daney Date: Wed, 5 May 2010 16:03:08 -0700 > The original implementation incorrectly uses netdev->dev_addrs. > > Use netdev->uc instead. Also use netdev_for_each_uc_addr to iterate > over the addresses. Fix comment. > > Signed-off-by: David Daney Applied. From davem@davemloft.net Thu May 6 09:19:03 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 09:19:12 +0200 (CEST) Received: from 74-93-104-97-Washington.hfc.comcastbusiness.net ([74.93.104.97]:33437 "EHLO sunset.davemloft.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492091Ab0EFHSo (ORCPT ); Thu, 6 May 2010 09:18:44 +0200 Received: from localhost (localhost [127.0.0.1]) by sunset.davemloft.net (Postfix) with ESMTP id 6A8BC24C090; Thu, 6 May 2010 00:18:50 -0700 (PDT) Date: Thu, 06 May 2010 00:18:50 -0700 (PDT) Message-Id: <20100506.001850.35041932.davem@davemloft.net> To: ddaney@caviumnetworks.com Cc: netdev@vger.kernel.org, linux-mips@linux-mips.org Subject: Re: [PATCH 2/6] netdev: octeon_mgmt: Fix race condition freeing TX buffers. From: David Miller In-Reply-To: <1273100593-11043-3-git-send-email-ddaney@caviumnetworks.com> References: <1273100593-11043-1-git-send-email-ddaney@caviumnetworks.com> <1273100593-11043-3-git-send-email-ddaney@caviumnetworks.com> X-Mailer: Mew version 6.3 on Emacs 23.1 / Mule 6.0 (HANACHIRUSATO) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26617 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: davem@davemloft.net Precedence: bulk X-list: linux-mips From: David Daney Date: Wed, 5 May 2010 16:03:09 -0700 > Under heavy load the TX cleanup tasklet and xmit threads would race > and try to free too many buffers. > > Signed-off-by: David Daney Applied. From davem@davemloft.net Thu May 6 09:19:31 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 09:19:37 +0200 (CEST) Received: from 74-93-104-97-Washington.hfc.comcastbusiness.net ([74.93.104.97]:33441 "EHLO sunset.davemloft.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491108Ab0EFHSt (ORCPT ); Thu, 6 May 2010 09:18:49 +0200 Received: from localhost (localhost [127.0.0.1]) by sunset.davemloft.net (Postfix) with ESMTP id F1E9624C090; Thu, 6 May 2010 00:18:55 -0700 (PDT) Date: Thu, 06 May 2010 00:18:55 -0700 (PDT) Message-Id: <20100506.001855.15241347.davem@davemloft.net> To: ddaney@caviumnetworks.com Cc: netdev@vger.kernel.org, linux-mips@linux-mips.org Subject: Re: [PATCH 3/6] netdev: octeon_mgmt: Fix race manipulating irq bits. From: David Miller In-Reply-To: <1273100593-11043-4-git-send-email-ddaney@caviumnetworks.com> References: <1273100593-11043-1-git-send-email-ddaney@caviumnetworks.com> <1273100593-11043-4-git-send-email-ddaney@caviumnetworks.com> X-Mailer: Mew version 6.3 on Emacs 23.1 / Mule 6.0 (HANACHIRUSATO) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26618 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: davem@davemloft.net Precedence: bulk X-list: linux-mips From: David Daney Date: Wed, 5 May 2010 16:03:10 -0700 > Don't re-read the interrupt status register, clear the exact bits we > will be testing. > > Signed-off-by: David Daney Applied. From davem@davemloft.net Thu May 6 09:19:56 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 09:20:02 +0200 (CEST) Received: from 74-93-104-97-Washington.hfc.comcastbusiness.net ([74.93.104.97]:33446 "EHLO sunset.davemloft.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492125Ab0EFHSz (ORCPT ); Thu, 6 May 2010 09:18:55 +0200 Received: from localhost (localhost [127.0.0.1]) by sunset.davemloft.net (Postfix) with ESMTP id D582C24C090; Thu, 6 May 2010 00:19:01 -0700 (PDT) Date: Thu, 06 May 2010 00:19:01 -0700 (PDT) Message-Id: <20100506.001901.242136151.davem@davemloft.net> To: ddaney@caviumnetworks.com Cc: netdev@vger.kernel.org, linux-mips@linux-mips.org Subject: Re: [PATCH 4/6] netdev: octeon_mgmt: Free TX skbufs in a timely manner. From: David Miller In-Reply-To: <1273100593-11043-5-git-send-email-ddaney@caviumnetworks.com> References: <1273100593-11043-1-git-send-email-ddaney@caviumnetworks.com> <1273100593-11043-5-git-send-email-ddaney@caviumnetworks.com> X-Mailer: Mew version 6.3 on Emacs 23.1 / Mule 6.0 (HANACHIRUSATO) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26619 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: davem@davemloft.net Precedence: bulk X-list: linux-mips From: David Daney Date: Wed, 5 May 2010 16:03:11 -0700 > We also reduce the high water mark to 1 so skbufs are not stranded for > long periods of time. Since we are cleaning after each packet, no > need to do it in the transmit path. > > Signed-off-by: David Daney Applied. From davem@davemloft.net Thu May 6 09:20:21 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 09:20:29 +0200 (CEST) Received: from 74-93-104-97-Washington.hfc.comcastbusiness.net ([74.93.104.97]:33452 "EHLO sunset.davemloft.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492128Ab0EFHTB (ORCPT ); Thu, 6 May 2010 09:19:01 +0200 Received: from localhost (localhost [127.0.0.1]) by sunset.davemloft.net (Postfix) with ESMTP id 89D2824C090; Thu, 6 May 2010 00:19:07 -0700 (PDT) Date: Thu, 06 May 2010 00:19:07 -0700 (PDT) Message-Id: <20100506.001907.116374531.davem@davemloft.net> To: ddaney@caviumnetworks.com Cc: netdev@vger.kernel.org, linux-mips@linux-mips.org Subject: Re: [PATCH 5/6] netdev: octeon_mgmt: Try not to drop TX packets when stopping the queue. From: David Miller In-Reply-To: <1273100593-11043-6-git-send-email-ddaney@caviumnetworks.com> References: <1273100593-11043-1-git-send-email-ddaney@caviumnetworks.com> <1273100593-11043-6-git-send-email-ddaney@caviumnetworks.com> X-Mailer: Mew version 6.3 on Emacs 23.1 / Mule 6.0 (HANACHIRUSATO) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26620 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: davem@davemloft.net Precedence: bulk X-list: linux-mips From: David Daney Date: Wed, 5 May 2010 16:03:12 -0700 > Stop the queue when we add the packet that will fill it instead of dropping the packet > > Signed-off-by: David Daney Applied. From davem@davemloft.net Thu May 6 09:20:48 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 09:20:59 +0200 (CEST) Received: from 74-93-104-97-Washington.hfc.comcastbusiness.net ([74.93.104.97]:33458 "EHLO sunset.davemloft.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492123Ab0EFHTU (ORCPT ); Thu, 6 May 2010 09:19:20 +0200 Received: from localhost (localhost [127.0.0.1]) by sunset.davemloft.net (Postfix) with ESMTP id 3740224C090; Thu, 6 May 2010 00:19:26 -0700 (PDT) Date: Thu, 06 May 2010 00:19:25 -0700 (PDT) Message-Id: <20100506.001925.200377699.davem@davemloft.net> To: ddaney@caviumnetworks.com Cc: netdev@vger.kernel.org, linux-mips@linux-mips.org Subject: Re: [PATCH 6/6] netdev: octeon_mgmt: Remove some gratuitous blank lines. From: David Miller In-Reply-To: <1273100593-11043-7-git-send-email-ddaney@caviumnetworks.com> References: <1273100593-11043-1-git-send-email-ddaney@caviumnetworks.com> <1273100593-11043-7-git-send-email-ddaney@caviumnetworks.com> X-Mailer: Mew version 6.3 on Emacs 23.1 / Mule 6.0 (HANACHIRUSATO) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26621 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: davem@davemloft.net Precedence: bulk X-list: linux-mips From: David Daney Date: Wed, 5 May 2010 16:03:13 -0700 > Signed-off-by: David Daney Applied. From ralf@linux-mips.org Thu May 6 11:01:17 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 11:01:21 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:55709 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491966Ab0EFJBR (ORCPT ); Thu, 6 May 2010 11:01:17 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o4691BtP001378; Thu, 6 May 2010 10:01:12 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o46919pr001368; Thu, 6 May 2010 10:01:09 +0100 Date: Thu, 6 May 2010 10:01:08 +0100 From: Ralf Baechle To: "Kevin D. Kissell" Cc: Shane McDonald , linux-mips@linux-mips.org, Atsushi Nemoto Subject: Re: [MIPS] FPU emulator: allow Cause bits of FCSR to be writeable by ctc1 Message-ID: <20100506090108.GA28066@linux-mips.org> References: <4BE122D1.3000609@paralogos.com> <20100505091159.GA4016@linux-mips.org> <4BE19214.4010209@paralogos.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4BE19214.4010209@paralogos.com> User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26622 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Wed, May 05, 2010 at 08:43:16AM -0700, Kevin D. Kissell wrote: > > That's commit ID 72402ec9efdb2ea7e0ec6223cf20e7301a57da02 and the patch > > was comitted during the CVS days which only records the comitter but not > > the author. The actual author is Atsushi Nemoto. > > > Well,. I certainly understood that you were simply the guy who did the > commit. Didn't mean to make it sound like an accusation, but it was > marginally easier to type your name and date than to find, cut, and > paste the commit ID. Sorry if it came off wrong. It would be cool if > Atsushi remembered the reasoning behind the change, but empirical proof > that undoing it doesn't create a subtle problem for current SMP kernels > would be better still. Oh, I didn't take it for an accusation but it's interesting if not useful to get the original author involved. In the dark past I accepted many patches that were sent to me directly with none of the usual lists on cc. In addition there are the limitations of what was recorded by CVS. Some history information is only available in my mail folders so occasionally I have to dig deep. Ralf From sshtylyov@mvista.com Thu May 6 13:18:22 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 13:18:27 +0200 (CEST) Received: from mail-wy0-f177.google.com ([74.125.82.177]:36082 "EHLO mail-wy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492263Ab0EFLSW (ORCPT ); Thu, 6 May 2010 13:18:22 +0200 Received: by wyi11 with SMTP id 11so197491wyi.36 for ; Thu, 06 May 2010 04:18:15 -0700 (PDT) Received: by 10.227.143.149 with SMTP id v21mr4048077wbu.125.1273144695280; Thu, 06 May 2010 04:18:15 -0700 (PDT) Received: from [192.168.2.2] (ppp91-77-53-176.pppoe.mtu-net.ru [91.77.53.176]) by mx.google.com with ESMTPS id x34sm1182403wbd.22.2010.05.06.04.18.13 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 06 May 2010 04:18:14 -0700 (PDT) Message-ID: <4BE2A54D.3020602@mvista.com> Date: Thu, 06 May 2010 15:17:33 +0400 From: Sergei Shtylyov User-Agent: Thunderbird 2.0.0.24 (Windows/20100228) MIME-Version: 1.0 To: Shane McDonald CC: anemo@mba.ocn.ne.jp, kevink@paralogos.com, linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH v2] MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1 References: In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26623 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sshtylyov@mvista.com Precedence: bulk X-list: linux-mips Hello. Shane McDonald wrote: > In the FPU emulator code of the MIPS, the Cause bits of the FCSR > register are not currently writeable by the ctc1 instruction. > In odd corner cases, this can cause problems. For example, > a case existed where a divide-by-zero exception was generated > by the FPU, and the signal handler attempted to restore the FPU > registers to their state before the exception occurred. In this > particular setup, writing the old value to the FCSR register > would cause another divide-by-zero exception to occur immediately. > The solution is to change the ctc1 instruction emulator code to > allow the Cause bits of the FCSR register to be writeable. > This is the behaviour of the hardware that the code is emulating. > > This problem was found by Shane McDonald, but the credit for the > fix goes to Kevin Kissell. In Kevin's words: > > I submit that the bug is indeed in that ctc_op: case of the emulator. The > Cause bits (17:12) are supposed to be writable by that instruction, but the > CTC1 emulation won't let them be updated by the instruction. I think that > actually if you just completely removed lines 387-388 [...] > things would work a good deal better. At least, it would be a more accurate > emulation of the architecturally defined FPU. If I wanted to be really, > really pedantic (which I sometimes do), I'd also protect the reserved bits > that aren't necessarily writable. > > Signed-off-by: Shane McDonald > --- > v2: Replaced an ugly magic number with a constant for the reserved > bits of the FPU CSR. > > arch/mips/include/asm/mipsregs.h | 6 ++++++ > arch/mips/math-emu/cp1emu.c | 9 +++++---- > 2 files changed, 11 insertions(+), 4 deletions(-) > > diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h > index 49382d5..1b17a21 100644 > --- a/arch/mips/include/asm/mipsregs.h > +++ b/arch/mips/include/asm/mipsregs.h > @@ -135,6 +135,12 @@ > #define FPU_CSR_COND7 0x80000000 /* $fcc7 */ > > /* > + * Bits 18 - 20 of the FPU Status Register will be read as 0, > + * and should be written as zero. > +*/ > +#define FPU_CSR_RSVD 0x001c0000 > + > +/* > * X the exception cause indicator > * E the exception enable > * S the sticky/flag bit > diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c > index 8f2f8e9..ebecec6 100644 > --- a/arch/mips/math-emu/cp1emu.c > +++ b/arch/mips/math-emu/cp1emu.c > @@ -384,10 +384,11 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) > (void *) (xcp->cp0_epc), > MIPSInst_RT(ir), value); > #endif > - value &= (FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03); > - ctx->fcr31 &= ~(FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03); > - /* convert to ieee library modes */ > - ctx->fcr31 |= (value & ~0x3) | ieee_rm[value & 0x3]; > + > + /* Don't write reserved bits, > + and convert to ieee library modes */ > According to CodingStyle, the preferred style of multi-line comments is: /* * bla * bla */ WBR, Sergei From sshtylyov@mvista.com Thu May 6 13:25:18 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 13:25:23 +0200 (CEST) Received: from mail-wy0-f177.google.com ([74.125.82.177]:56297 "EHLO mail-wy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492290Ab0EFLZS (ORCPT ); Thu, 6 May 2010 13:25:18 +0200 Received: by wyi11 with SMTP id 11so201414wyi.36 for ; Thu, 06 May 2010 04:25:13 -0700 (PDT) Received: by 10.227.152.76 with SMTP id f12mr4098822wbw.54.1273145113042; Thu, 06 May 2010 04:25:13 -0700 (PDT) Received: from [192.168.2.2] (ppp91-77-53-176.pppoe.mtu-net.ru [91.77.53.176]) by mx.google.com with ESMTPS id u8sm6657904wbc.17.2010.05.06.04.25.11 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 06 May 2010 04:25:12 -0700 (PDT) Message-ID: <4BE2A6EE.80705@mvista.com> Date: Thu, 06 May 2010 15:24:30 +0400 From: Sergei Shtylyov User-Agent: Thunderbird 2.0.0.24 (Windows/20100228) MIME-Version: 1.0 To: "Kevin D. Kissell" CC: Atsushi Nemoto , ralf@linux-mips.org, mcdonald.shane@gmail.com, linux-mips@linux-mips.org Subject: Re: [MIPS] FPU emulator: allow Cause bits of FCSR to be writeable by ctc1 References: <4BE122D1.3000609@paralogos.com> <20100505091159.GA4016@linux-mips.org> <4BE19214.4010209@paralogos.com> <20100506.012240.118951273.anemo@mba.ocn.ne.jp> <4BE1C4EA.1020202@paralogos.com> In-Reply-To: <4BE1C4EA.1020202@paralogos.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26624 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sshtylyov@mvista.com Precedence: bulk X-list: linux-mips Hello. Kevin D. Kissell wrote: > I'm cool with the patch as is, but in the general spirit of regarding > numeric constants other than 0 and 1 as instruments of Satan, it would > probably be even better if those reserved bits were defined > (FPU_CSR_RSVD, or whatever is compatible with existing convention for > such bits) along with the other FCSR bit masks in mipsregs.h, so that > the assigment looks like: > > ctx->fcr31 = (value & ~(FPU_CSR_RSVD | 0x3)) | > ieee_rm[value & 0x3]; 0x3 is still neither 0 nor 1, and so remains an instrument of Satan. How about #defining it also? :-) WBR, Sergei From kevink@paralogos.com Thu May 6 17:46:19 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 17:46:26 +0200 (CEST) Received: from gateway01.websitewelcome.com ([69.56.236.19]:48614 "HELO gateway01.websitewelcome.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with SMTP id S1492585Ab0EFPqT (ORCPT ); Thu, 6 May 2010 17:46:19 +0200 Received: (qmail 26260 invoked from network); 6 May 2010 15:49:08 -0000 Received: from gator750.hostgator.com (174.132.194.2) by gateway01.websitewelcome.com with SMTP; 6 May 2010 15:49:08 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=paralogos.com; h=Received:Message-ID:Date:From:User-Agent:MIME-Version:To:CC:Subject:References:In-Reply-To:Content-Type:Content-Transfer-Encoding; b=X7IeQkFmM3EAXtLl/sS6yI+k2dIx9cTzj8S+Y0Ez9oHCfwOc+YinBIXZg7KCdBGyN+omV7vmh6wxvYuGhJ+friTHyRaElEEH81yx8CFc0P6wDy5wmQgUAZl32BN5vV23; Received: from c-98-207-157-135.hsd1.ca.comcast.net ([98.207.157.135]:2892 helo=[127.0.0.1]) by gator750.hostgator.com with esmtpa (Exim 4.69) (envelope-from ) id 1OA3H6-00052V-Kc; Thu, 06 May 2010 10:46:08 -0500 Message-ID: <4BE2E445.5050809@paralogos.com> Date: Thu, 06 May 2010 08:46:13 -0700 From: "Kevin D. Kissell" User-Agent: Thunderbird 2.0.0.24 (Windows/20100228) MIME-Version: 1.0 To: Sergei Shtylyov CC: Atsushi Nemoto , ralf@linux-mips.org, mcdonald.shane@gmail.com, linux-mips@linux-mips.org Subject: Re: [MIPS] FPU emulator: allow Cause bits of FCSR to be writeable by ctc1 References: <4BE122D1.3000609@paralogos.com> <20100505091159.GA4016@linux-mips.org> <4BE19214.4010209@paralogos.com> <20100506.012240.118951273.anemo@mba.ocn.ne.jp> <4BE1C4EA.1020202@paralogos.com> <4BE2A6EE.80705@mvista.com> In-Reply-To: <4BE2A6EE.80705@mvista.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - gator750.hostgator.com X-AntiAbuse: Original Domain - linux-mips.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - paralogos.com Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26625 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kevink@paralogos.com Precedence: bulk X-list: linux-mips Sergei Shtylyov wrote: > Kevin D. Kissell wrote: > >> I'm cool with the patch as is, but in the general spirit of regarding >> numeric constants other than 0 and 1 as instruments of Satan, it >> would probably be even better if those reserved bits were defined >> (FPU_CSR_RSVD, or whatever is compatible with existing convention for >> such bits) along with the other FCSR bit masks in mipsregs.h, so that >> the assigment looks like: >> >> ctx->fcr31 = (value & ~(FPU_CSR_RSVD | 0x3)) | >> ieee_rm[value & 0x3]; > > 0x3 is still neither 0 nor 1, and so remains an instrument of Satan. > How about #defining it also? :-) In some software engineering cultures, that would be considered a good idea or even mandatory. This being the Linux kernel, I think it's OK, because, as Shane remarked, it's a mask that's local to the module and whose value is "obvious", and such things are pretty commonly handled as numeric constants in the kernel. There actually *is* a #define for that field, FPU_CSR_RD, which could be used here in place of the 0x3, but I'm a little torn about its use. On one hand "value & ~(FPU_CSR_RSVD | FPU_CSR_RD)" is more clear about what we're doing, but on the other hand, it's less obvious that "value & FPU_CSR_RD" is generating an integer in the range 0-3 for an index. So I'm absolutely fine with the code as written, but wouldn't complain if someone wanted to make it use the symbolic constant. Yours in excessive geekery, Kevin K. From manuel.lauss@googlemail.com Thu May 6 17:50:49 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 17:50:53 +0200 (CEST) Received: from fg-out-1718.google.com ([72.14.220.154]:43865 "EHLO fg-out-1718.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492472Ab0EFPus (ORCPT ); Thu, 6 May 2010 17:50:48 +0200 Received: by fg-out-1718.google.com with SMTP id 19so334833fgg.6 for ; Thu, 06 May 2010 08:50:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer; bh=AKFtKrwk+gJskUqI0w8/e/QadUKmrzbATaFEtzig0YQ=; b=M8n/g/Z1QF7kLyM9kSpWDJewi4eJnK2hqR+ISRd0maUZZp4e9chsz8bJc868CiAiQ9 aKxdvEjQt+0vmabOYFSFvDdsYFGjzEPz9eGVVkhRMWXA6iV4xCgtGEJZoxBIVVxxiEk3 65k+GXFasaj8Z9jtXvqRGBAf9XZMwBavyekvE= DomainKey-Signature: a=rsa-sha1; c=nofws; d=googlemail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; b=T62dcZcxVPlxIMNrTuytoBndxbDSOnx03C98l9EoR/wA+tAysVXRa6Pn4/xdHVsvm5 F8J8I4EdyvVKsqLU0+P/+7+rJFm08EyPGXNnuo81Z0EJTxdEYQY4LlLV02lDATRd6oR6 CjrheiVNhU0E2Q0DJM5LbEB25XbG9hkskV4Mg= Received: by 10.87.68.26 with SMTP id v26mr1859408fgk.40.1273161048328; Thu, 06 May 2010 08:50:48 -0700 (PDT) Received: from localhost.localdomain (p5496C548.dip.t-dialin.net [84.150.197.72]) by mx.google.com with ESMTPS id d4sm3186265fga.0.2010.05.06.08.50.46 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 06 May 2010 08:50:47 -0700 (PDT) From: Manuel Lauss To: linux-crypto@vger.kernel.org Cc: Linux-MIPS , Manuel Lauss Subject: [RFC PATCH] crypto: Alchemy AES engine driver Date: Thu, 6 May 2010 17:50:45 +0200 Message-Id: <1273161045-21945-1-git-send-email-manuel.lauss@gmail.com> X-Mailer: git-send-email 1.7.0.4 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26626 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: manuel.lauss@googlemail.com Precedence: bulk X-list: linux-mips Driver for the AES engine in ECB and CBC modes found on some Alchemy Au1200/Au1300 SoCs. Signed-off-by: Manuel Lauss --- lightly "tested" with the tcrypt module on Au1200; I have no idea whether it really works correctly: # modprobe alchemy-aes alg: skcipher: setkey failed on test 2 for ecb-aes-alchemy: flags=200000 # modprobe tcrypt mode=10 alg: skcipher: setkey failed on test 3 for cbc-aes-alchemy: flags=0 alg: skcipher: Failed to load transform for cbc(aes): -2 alg: skcipher: Failed to load transform for cbc(aes): -2 tcrypt: one or more tests failed! FATAL: Error inserting tcrypt (/lib/modules/2.6.34-rc6-db1200-00214-g9f84af9/kernel/crypto/tcrypt.ko): Unknown symbol in module, or unknown parameter (see dmesg) The error in "test 3 for cbc-aes-alchemy" probably comes from the inability to process keys larger than 128 bits. Please have a look. Thanks! drivers/crypto/Kconfig | 8 + drivers/crypto/Makefile | 1 + drivers/crypto/alchemy-aes.c | 579 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 588 insertions(+), 0 deletions(-) create mode 100644 drivers/crypto/alchemy-aes.c diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig index b08403d..7705b13 100644 --- a/drivers/crypto/Kconfig +++ b/drivers/crypto/Kconfig @@ -222,4 +222,12 @@ config CRYPTO_DEV_PPC4XX help This option allows you to have support for AMCC crypto acceleration. +config CRYPTO_DEV_ALCHEMY_AES + tristate "Au1200/Au1300 AES engine" + depends on MACH_ALCHEMY + select CRYPTO_ALGAPI + select CRYPTO_BLKCIPHER + help + Driver for the AES engine in Alchemy Au1200/Au1300 series SoCs. + endif # CRYPTO_HW diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile index 6ffcb3f..624777f 100644 --- a/drivers/crypto/Makefile +++ b/drivers/crypto/Makefile @@ -6,3 +6,4 @@ obj-$(CONFIG_CRYPTO_DEV_MV_CESA) += mv_cesa.o obj-$(CONFIG_CRYPTO_DEV_TALITOS) += talitos.o obj-$(CONFIG_CRYPTO_DEV_IXP4XX) += ixp4xx_crypto.o obj-$(CONFIG_CRYPTO_DEV_PPC4XX) += amcc/ +obj-$(CONFIG_CRYPTO_DEV_ALCHEMY_AES) += alchemy-aes.o diff --git a/drivers/crypto/alchemy-aes.c b/drivers/crypto/alchemy-aes.c new file mode 100644 index 0000000..14e8ace --- /dev/null +++ b/drivers/crypto/alchemy-aes.c @@ -0,0 +1,579 @@ +/* + * alchemy-aes.c -- Driver for the Alchemy Au1200/Au1300 AES engine. + * + * (c) 2010 Manuel Lauss + * + * Licensed under the GPLv2. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +/*#define DEBUG*/ + +#ifdef DEBUG +#define DBG(x...) printk(KERN_ALERT "AES: " x) +#define DBGHEX(x...) print_hex_dump(x) +#else +#define DBG(x...) +#define DBGHEX(x...) +#endif + +#define DRVNAME "alchemy-aes" + +/* the AES engine likes the number 16 */ +#define ALCHEMY_AES_KEY_SIZE 16 +#define ALCHEMY_AES_IV_SIZE 16 +#define ALCHEMY_AES_BLK_SIZE 16 +#define ALCHEMY_AES_DDMA_DSCRS 16 + +/* register offsets */ +#define AES_STATUS 0x00 +#define AES_INDATA 0x04 +#define AES_OUTDATA 0x08 +#define AES_INTCAUSE 0x0c +#define AES_CONFIG 0x10 + +#define AES_S_PS 0x01 /* start crypto */ +#define AES_S_IE 0x02 /* int enable */ +#define AES_S_CR_1 0x00 /* periph. clock */ +#define AES_S_CR_2 0x04 /* periph. clock div 2 */ +#define AES_S_CR_4 0x08 /* periph. clock div 4 */ +#define AES_S_CR_8 0x0c /* periph. clock div 8 */ +#define AES_S_CR_MASK 0x0c +#define AES_S_OUT 0x10 /* set if out fifo has space */ +#define AES_S_IN 0x20 /* set if in fifo has space */ + +#define AES_CAUSE_RDY 0x01 /* process complete */ +#define AES_CAUSE_OVR 0x02 /* in fifo overflow */ +#define AES_CAUSE_UND 0x04 /* out fifo underflow */ + +#define AES_C_ED 0x01 /* set to DE/clear to ENcrypt */ +#define AES_C_IKG 0x02 /* do internal key generation */ +#define AES_C_RPK 0x04 /* replay key (output 10th key) */ +#define AES_C_RK 0x08 /* reuse internal key store */ +#define AES_C_UC 0x10 /* undefined block count */ +#define AES_C_OP_ECB 0x00 +#define AES_C_OP_CBC 0x20 +#define AES_C_OP_CFB 0x40 +#define AES_C_OP_OFB 0x60 +#define AES_C_OP_MASK 0x60 + + +struct alchemy_aes_priv { + void __iomem *base; + int irq; + + /* dbdma */ + u32 dmatx; + u32 dmarx; + int txid; + int rxid; + + unsigned char key[ALCHEMY_AES_KEY_SIZE]; + + struct completion done; + struct list_head alg_list; + struct resource *ioarea; +}; + +/* need to improvise to stash private data */ +struct alchemy_aes_alg { + struct crypto_alg alg; + struct alchemy_aes_priv *priv; + struct list_head entry; +}; + +#define crypto_alg_to_alchemy(a) \ + container_of(a, struct alchemy_aes_alg, alg) + + +/* 8 bit memory device */ +static dbdev_tab_t alchemy_aes_mem_dbdev = { + .dev_id = DSCR_CMD0_ALWAYS, + .dev_flags = DEV_FLAGS_ANYUSE, + .dev_tsize = 0, + .dev_devwidth = 8, + .dev_physaddr = 0x00000000, + .dev_intlevel = 0, + .dev_intpolarity = 0, +}; +static int __alchemy_aes_memid; + +/**********************************************************************/ + +static inline void aes_write(struct alchemy_aes_priv *p, int reg, + unsigned long val) +{ + __raw_writel(val, p->base + reg); +} + +static inline unsigned long aes_read(struct alchemy_aes_priv *p, int reg) +{ + return __raw_readl(p->base + reg); +} + +static inline void aes_infifo_write(struct alchemy_aes_priv *p, + unsigned long data) +{ + /* poll for open space */ + while (!(aes_read(p, AES_STATUS) & AES_S_IN)) + cpu_relax(); + aes_write(p, AES_INDATA, data); +} + +/**********************************************************************/ + +static void alchemy_aes_dmacb(int irq, void *data) +{ + struct alchemy_aes_priv *p = data; + + au1xxx_dbdma_stop(p->dmarx); + au1xxx_dbdma_stop(p->dmatx); + + complete(&p->done); +} + +static irqreturn_t alchemy_aes_irq(int irq, void *data) +{ + struct alchemy_aes_priv *p = data; + unsigned long istat; + + istat = aes_read(p, AES_INTCAUSE); + aes_write(p, AES_INTCAUSE, 0); + + if (istat & AES_CAUSE_RDY) + complete(&p->done); + /* fifo over/underruns shouldn't happen with DMA */ + + return IRQ_HANDLED; +} + +/**********************************************************************/ + +static int alchemy_aes_crypt(struct blkcipher_desc *desc, + struct scatterlist *sdst, + struct scatterlist *ssrc, + unsigned int nbytes, + unsigned long cryptmode) +{ + struct crypto_alg *alg = desc->tfm->base.__crt_alg; + struct alchemy_aes_alg *aa = crypto_alg_to_alchemy(alg); + struct alchemy_aes_priv *p = aa->priv; + struct blkcipher_walk walk; + int ret, i, blks, len; + unsigned long k; + dma_addr_t src, dst; + unsigned char *iv; + + DBG("crypt: ALG %s base %p nbytes %d mode %08lx\n", + alg->cra_name, p->base, nbytes, cryptmode); + + blkcipher_walk_init(&walk, sdst, ssrc, nbytes); + ret = blkcipher_walk_virt(desc, &walk); + iv = walk.iv; + + /* create DMA descriptor lists */ + i = blks = 0; + au1xxx_dbdma_reset(p->dmatx); + au1xxx_dbdma_reset(p->dmarx); + while ((nbytes = walk.nbytes)) { + src = (dma_addr_t)virt_to_phys(walk.src.virt.addr); + dst = (dma_addr_t)virt_to_phys(walk.dst.virt.addr); + + blks += nbytes / ALCHEMY_AES_BLK_SIZE; + len = nbytes - (nbytes % ALCHEMY_AES_BLK_SIZE); + + DBG("SRC %p DST %p bytes %d blks %d dscr %d len %d\n", + (void *)src, (void *)dst, nbytes, blks, i, len); + DBGHEX(KERN_ERR, "AES DATA ", 0, 16, 1, walk.src.virt.addr, + len, false); + + nbytes -= len; + ret = blkcipher_walk_done(desc, &walk, nbytes); + + /* let DBDMA interrupt when last block of data has been + * fetched from AES output fifo. + */ + au1xxx_dbdma_put_dest(p->dmarx, dst, len, + walk.nbytes ? 0 : DDMA_FLAGS_IE); + au1xxx_dbdma_put_source(p->dmatx, src, len, 0); + + if (++i > ALCHEMY_AES_DDMA_DSCRS) { + ret = -ENOMEM; + printk(KERN_ERR DRVNAME ": DMA descriptor limit" + " reached!\n"); + goto out; + } + } + + /* drain output fifo, clear interrupts, configure and enable */ + init_completion(&p->done); + for (i = 0; i < 8; i++) + k = aes_read(p, AES_OUTDATA); + aes_write(p, AES_INTCAUSE, 0); + aes_write(p, AES_CONFIG, cryptmode); + aes_write(p, AES_STATUS, AES_S_PS | AES_S_IE); /* start engine */ + + /* block count comes first */ + if (!(cryptmode & AES_C_UC)) { + DBG("BLKCNT %d\n", blks); + aes_infifo_write(p, blks); + } + + /* then new key if necessary */ + if (!(cryptmode & AES_C_RK)) { + DBGHEX(KERN_ERR, "AES: KEY ", 0, 16, 1, p->key, 16, false); + + k = (p->key[0] << 24) | (p->key[1] << 16) | + (p->key[2] << 8) | p->key[3]; + aes_infifo_write(p, k); + k = (p->key[4] << 24) | (p->key[5] << 16) | + (p->key[6] << 8) | p->key[7]; + aes_infifo_write(p, k); + k = (p->key[8] << 24) | (p->key[9] << 16) | + (p->key[10] << 8) | p->key[11]; + aes_infifo_write(p, k); + k = (p->key[12] << 24) | (p->key[13] << 16) | + (p->key[14] << 8) | p->key[15]; + aes_infifo_write(p, k); + } + + /* then IV for non-ECB modes */ + if ((cryptmode & AES_C_OP_MASK) != AES_C_OP_ECB) { + DBGHEX(KERN_ERR, "AES: IV ", 0, 16, 1, iv, 16, false); + + k = (iv[0] << 24) | (iv[1] << 16) | + (iv[2] << 8) | iv[3]; + aes_infifo_write(p, k); + k = (iv[4] << 24) | (iv[5] << 16) | + (iv[6] << 8) | iv[7]; + aes_infifo_write(p, k); + k = (iv[8] << 24) | (iv[9] << 16) | + (iv[10] << 8) | iv[11]; + aes_infifo_write(p, k); + k = (iv[12] << 24) | (iv[13] << 16) | + (iv[14] << 8) | iv[15]; + aes_infifo_write(p, k); + } + + /* DMA engine does data transfer */ + au1xxx_dbdma_start(p->dmarx); + au1xxx_dbdma_start(p->dmatx); + ret = wait_for_completion_interruptible(&p->done); + +out: + aes_write(p, AES_STATUS, 0); + au1xxx_dbdma_stop(p->dmatx); + au1xxx_dbdma_stop(p->dmarx); + + /* read replayed key if necessary */ + if ((!ret) && ((cryptmode & AES_C_OP_MASK) == AES_C_OP_ECB) && + (cryptmode & (AES_C_ED | AES_C_RPK)) && + (!(cryptmode & AES_C_UC))) { + k = aes_read(p, AES_OUTDATA); + k = aes_read(p, AES_OUTDATA); + k = aes_read(p, AES_OUTDATA); + k = aes_read(p, AES_OUTDATA); + /* FIXME: does cryptoapi acutally want it? */ + } + + return ret; +} + +static int alchemy_aes_setkey(struct crypto_tfm *tfm, const u8 *key, + unsigned int len) +{ + struct crypto_alg *alg = tfm->__crt_alg; + struct alchemy_aes_alg *aa = crypto_alg_to_alchemy(alg); + struct alchemy_aes_priv *p = aa->priv; + + DBGHEX(KERN_ERR, "AES: SETKEY ", 0, 16, 1, key, len, false); + + if (len != AES_KEYSIZE_128) { + tfm->crt_flags |= CRYPTO_TFM_RES_BAD_KEY_LEN; + return -EINVAL; + } + + memcpy(p->key, key, ALCHEMY_AES_KEY_SIZE); + return 0; +} + +static int alchemy_aes_ecb_enc(struct blkcipher_desc *desc, + struct scatterlist *dst, + struct scatterlist *src, + unsigned int nbytes) +{ + return alchemy_aes_crypt(desc, dst, src, nbytes, + AES_C_OP_ECB); +} + +static int alchemy_aes_ecb_dec(struct blkcipher_desc *desc, + struct scatterlist *dst, + struct scatterlist *src, + unsigned int nbytes) +{ + return alchemy_aes_crypt(desc, dst, src, nbytes, + AES_C_OP_ECB | AES_C_ED); +} + +static struct crypto_alg alchemy_aes_ecb_alg = { + .cra_name = "ecb(aes)", + .cra_driver_name = "ecb-aes-alchemy", + .cra_u = { + .blkcipher = { + .min_keysize = ALCHEMY_AES_KEY_SIZE, + .max_keysize = ALCHEMY_AES_KEY_SIZE, + .setkey = alchemy_aes_setkey, + .encrypt = alchemy_aes_ecb_enc, + .decrypt = alchemy_aes_ecb_dec, + }, + }, +}; + +static int alchemy_aes_cbc_enc(struct blkcipher_desc *desc, + struct scatterlist *dst, + struct scatterlist *src, + unsigned int nbytes) +{ + return alchemy_aes_crypt(desc, dst, src, nbytes, + AES_C_OP_CBC); +} + +static int alchemy_aes_cbc_dec(struct blkcipher_desc *desc, + struct scatterlist *dst, + struct scatterlist *src, + unsigned int nbytes) +{ + return alchemy_aes_crypt(desc, dst, src, nbytes, + AES_C_OP_CBC | AES_C_ED); +} + +static struct crypto_alg alchemy_aes_cbc_alg = { + .cra_name = "cbc(aes)", + .cra_driver_name = "cbc-aes-alchemy", + .cra_u = { + .blkcipher = { + .min_keysize = ALCHEMY_AES_KEY_SIZE, + .max_keysize = ALCHEMY_AES_KEY_SIZE, + .ivsize = ALCHEMY_AES_IV_SIZE, + .setkey = alchemy_aes_setkey, + .encrypt = alchemy_aes_cbc_enc, + .decrypt = alchemy_aes_cbc_dec, + }, + }, +}; + +static int __init add_algo(struct alchemy_aes_priv *p, + struct crypto_alg *calg) +{ + struct alchemy_aes_alg *alg; + int ret; + + alg = kzalloc(sizeof(struct alchemy_aes_alg), GFP_KERNEL); + if (!alg) + return -ENOMEM; + + alg->priv = p; + alg->alg.cra_priority = 300; + alg->alg.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER | CRYPTO_ALG_ASYNC; + alg->alg.cra_blocksize = ALCHEMY_AES_BLK_SIZE; + alg->alg.cra_ctxsize = 0; + alg->alg.cra_alignmask = 3; + alg->alg.cra_type = &crypto_blkcipher_type; + alg->alg.cra_module = THIS_MODULE; + INIT_LIST_HEAD(&alg->alg.cra_list); + alg->alg.cra_u.blkcipher = calg->cra_u.blkcipher; + sprintf(alg->alg.cra_name, "%s", calg->cra_name); + sprintf(alg->alg.cra_driver_name, "%s", calg->cra_driver_name); + + list_add_tail(&alg->entry, &p->alg_list); + + ret = crypto_register_alg(&alg->alg); + if (ret) { + list_del(&alg->entry); + kfree(alg); + } + return ret; +} + +static void delete_algos(struct alchemy_aes_priv *p) +{ + struct alchemy_aes_alg *a, *n; + + list_for_each_entry_safe(a, n, &p->alg_list, entry) { + list_del(&a->entry); + crypto_unregister_alg(&a->alg); + kfree(a); + } +} + +static int __init alchemy_aes_probe(struct platform_device *pdev) +{ + struct resource *r; + struct alchemy_aes_priv *p; + int ret; + + p = kzalloc(sizeof(struct alchemy_aes_priv), GFP_KERNEL); + if (!p) + return -ENOMEM; + + ret = -ENODEV; + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!r) + goto out1; + + p->ioarea = request_mem_region(r->start, resource_size(r), + DRVNAME); + if (!p->ioarea) + goto out1; + + p->base = ioremap_nocache(r->start, resource_size(r)); + if (!p->base) + goto out2; + + r = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (!r) + goto out3; + p->irq = r->start; + + r = platform_get_resource_byname(pdev, IORESOURCE_DMA, "dmatx"); + if (!r) { + r = platform_get_resource(pdev, IORESOURCE_DMA, 0); + if (!r) + goto out3; + } + p->txid = r->start; + + r = platform_get_resource_byname(pdev, IORESOURCE_DMA, "dmarx"); + if (!r) { + r = platform_get_resource(pdev, IORESOURCE_DMA, 1); + if (!r) + goto out3; + } + p->rxid = r->start; + + p->dmatx = au1xxx_dbdma_chan_alloc(__alchemy_aes_memid, p->txid, + alchemy_aes_dmacb, p); + if (!p->dmatx) + goto out3; + + p->dmarx = au1xxx_dbdma_chan_alloc(p->rxid, __alchemy_aes_memid, + alchemy_aes_dmacb, p); + if (!p->dmarx) + goto out4; + + au1xxx_dbdma_ring_alloc(p->dmatx, ALCHEMY_AES_DDMA_DSCRS); + au1xxx_dbdma_ring_alloc(p->dmarx, ALCHEMY_AES_DDMA_DSCRS); + + aes_write(p, AES_STATUS, 0); + aes_write(p, AES_CONFIG, 0); + aes_write(p, AES_INTCAUSE, 0); + + ret = request_irq(p->irq, alchemy_aes_irq, IRQF_DISABLED, + DRVNAME, p); + if (ret) + goto out5; + + INIT_LIST_HEAD(&p->alg_list); + + ret = add_algo(p, &alchemy_aes_ecb_alg); + if (ret) + goto out6; + + ret = add_algo(p, &alchemy_aes_cbc_alg); + if (ret) + goto out6; + + platform_set_drvdata(pdev, p); + return 0; + +out6: + delete_algos(p); + free_irq(p->irq, p); +out5: + au1xxx_dbdma_chan_free(p->dmarx); +out4: + au1xxx_dbdma_chan_free(p->dmatx); +out3: + iounmap(p->base); +out2: + release_resource(p->ioarea); + kfree(p->ioarea); +out1: + kfree(p); + return ret; +} + +static int __exit alchemy_aes_remove(struct platform_device *pdev) +{ + struct alchemy_aes_priv *p = platform_get_drvdata(pdev); + + delete_algos(p); + + au1xxx_dbdma_stop(p->dmatx); + au1xxx_dbdma_stop(p->dmarx); + + aes_write(p, AES_STATUS, 0); + aes_write(p, AES_CONFIG, 0); + aes_write(p, AES_INTCAUSE, 0); + + free_irq(p->irq, p); + au1xxx_dbdma_chan_free(p->dmarx); + au1xxx_dbdma_chan_free(p->dmatx); + iounmap(p->base); + release_resource(p->ioarea); + kfree(p->ioarea); + kfree(p); + + return 0; +} + +static struct platform_driver alchemy_aes_driver = { + .driver.name = DRVNAME, + .driver.owner = THIS_MODULE, + .probe = alchemy_aes_probe, + .remove = __devexit_p(alchemy_aes_remove), +}; + +static int __init alchemy_aes_load(void) +{ + /* FIXME: hier sollte auch noch der PRId des prozessors getestet + * werden; Au1210 (0x0503xxxx) und einige Au1300 haben lt. Daten- + * blatt keine AES engine. + */ + + /* need to do 8bit accesses to memory to get correct data */ + __alchemy_aes_memid = au1xxx_ddma_add_device(&alchemy_aes_mem_dbdev); + if (!__alchemy_aes_memid) + return -ENODEV; + + return platform_driver_register(&alchemy_aes_driver); +} + +static void __exit alchemy_aes_unload(void) +{ + if (__alchemy_aes_memid) + au1xxx_ddma_del_device(__alchemy_aes_memid); + platform_driver_unregister(&alchemy_aes_driver); +} + +module_init(alchemy_aes_load); +module_exit(alchemy_aes_unload); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Alchemy Au1200 AES engine driver"); +MODULE_AUTHOR("Manuel Lauss "); -- 1.7.0.4 From wuzhangjin@gmail.com Thu May 6 18:22:04 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 18:22:08 +0200 (CEST) Received: from mail-pv0-f177.google.com ([74.125.83.177]:44661 "EHLO mail-pv0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492472Ab0EFQWE (ORCPT ); Thu, 6 May 2010 18:22:04 +0200 Received: by pvg16 with SMTP id 16so58698pvg.36 for ; Thu, 06 May 2010 09:21:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:subject:from:reply-to:to:cc :in-reply-to:references:content-type:organization:date:message-id :mime-version:x-mailer:content-transfer-encoding; bh=dfGiwAWOqR0JTkj38atc6a/e0X28YbVhk1erfMtZcvc=; b=eK6Vhov3iCaupFMLFcEnvg1Mz2lrIGRI11QJ3/fDe4o/KnA1jzHYekq6eQeLKj34aD rLpsgL90GMcyMRY024gsrYu93OMI6zeUVBYqC9Rz6eq4YALFO1qx99WpAj10tJyjy1M/ TkRxtWqF09Lpb/S71J4FK/QQ25Q93LzN27P4U= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=subject:from:reply-to:to:cc:in-reply-to:references:content-type :organization:date:message-id:mime-version:x-mailer :content-transfer-encoding; b=BFyoU7143AugJsH/mqlydLc9ZuXKItMhRd7fFPSjOn+QwDSW59iIb44hc5Jkv5D6as c2AkGbf5N1RpvsT9k3qK1FEGumPJ9fPIJvhSu/LER/T2JW7QG4pmKBw7B/IUCVw/eS1d W2xNzi76ONL5HogC2Lo3mGDw3Us0Fgl8p9HKc= Received: by 10.114.237.21 with SMTP id k21mr2695376wah.141.1273162915785; Thu, 06 May 2010 09:21:55 -0700 (PDT) Received: from [192.168.2.201] ([202.201.14.140]) by mx.google.com with ESMTPS id c1sm5026854wam.7.2010.05.06.09.21.52 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 06 May 2010 09:21:54 -0700 (PDT) Subject: Re: [PATCH v3 1/4] MIPS/Oprofile: extract PMU defines/helper functions for sharing From: Wu Zhangjin Reply-To: wuzhangjin@gmail.com To: Deng-Cheng Zhu Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, a.p.zijlstra@chello.nl, paulus@samba.org, mingo@elte.hu, acme@redhat.com, jamie.iles@picochip.com In-Reply-To: <1273067734-4758-2-git-send-email-dengcheng.zhu@gmail.com> References: <1273067734-4758-1-git-send-email-dengcheng.zhu@gmail.com> <1273067734-4758-2-git-send-email-dengcheng.zhu@gmail.com> Content-Type: text/plain; charset="UTF-8" Organization: DSLab, Lanzhou University, China Date: Fri, 07 May 2010 00:21:49 +0800 Message-ID: <1273162909.23734.4.camel@localhost> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26627 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips Hi, On Wed, 2010-05-05 at 21:55 +0800, Deng-Cheng Zhu wrote: > Moving performance counter/control defines/helper functions into a single > header file, so that software using the MIPS PMU can share the code. > > Signed-off-by: Deng-Cheng Zhu > --- > arch/mips/include/asm/pmu.h | 244 +++++++++++++++++++++++++++++++ > arch/mips/oprofile/op_model_loongson2.c | 23 +--- > arch/mips/oprofile/op_model_mipsxx.c | 164 +--------------------- > arch/mips/oprofile/op_model_rm9000.c | 16 +-- > 4 files changed, 247 insertions(+), 200 deletions(-) > create mode 100644 arch/mips/include/asm/pmu.h > > diff --git a/arch/mips/include/asm/pmu.h b/arch/mips/include/asm/pmu.h [...] > + > +#ifndef __MIPS_PMU_H__ > +#define __MIPS_PMU_H__ > + > +#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) || \ > + defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_SB1) [...] > +static int (*save_perf_irq)(void); For we will use the save_perf_irq in the common function: mipspmu_get_irq() of the next patch, so, we need to move the definition of it out of the #if ... and put it before the #if: ... +static int (*save_perf_irq)(void); #if defined(CONFIG_CPU_MIPS32) ... Regards, Wu Zhangjin From wuzhangjin@gmail.com Thu May 6 18:54:30 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 18:54:35 +0200 (CEST) Received: from mail-px0-f177.google.com ([209.85.212.177]:39529 "EHLO mail-px0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492639Ab0EFQya (ORCPT ); Thu, 6 May 2010 18:54:30 +0200 Received: by pxi1 with SMTP id 1so71635pxi.36 for ; Thu, 06 May 2010 09:54:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:subject:from:reply-to:to:cc :in-reply-to:references:content-type:organization:date:message-id :mime-version:x-mailer:content-transfer-encoding; bh=3nx5AUqB8CiibyPqOU15BPwCbsDVJmHxsjGtA3EqHpw=; b=Uk8NhkgQHW7rfbm+c+BXiZpSPXJxMgT1GnH1ftXWHlQooMaw8OAi1eKthiRAQSic9+ T27S2jz8h93iNRS2znmKCShTuKQXowRFamLXi8Z/VhllxZ4Hg4hKhAVGdmv5PNYhiQXB 6LORsJQH2NgH5pY0sTN82h1HaHlGy/DXK5LTI= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=subject:from:reply-to:to:cc:in-reply-to:references:content-type :organization:date:message-id:mime-version:x-mailer :content-transfer-encoding; b=fytqpxSFS909hmnziX1Dn/dEi8RB3+/rgaD9WkshrsCo9QkAmVmWrmJ+5EiGrRarFd E4shsWy2iLDnuRFZvAZ8Xbuvh4IqGuIycmzqfOhmQMt+1c8W6nEBRxX8OLGqf3AanwOn 1yJfHuIoOPmQrv4ltFWSBoR5GYNL+jwAl5Qfw= Received: by 10.114.187.37 with SMTP id k37mr2445929waf.37.1273164858961; Thu, 06 May 2010 09:54:18 -0700 (PDT) Received: from [192.168.2.201] ([202.201.14.140]) by mx.google.com with ESMTPS id c1sm5113308wam.19.2010.05.06.09.54.15 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 06 May 2010 09:54:18 -0700 (PDT) Subject: Re: [PATCH v3 1/4] MIPS/Oprofile: extract PMU defines/helper functions for sharing From: Wu Zhangjin Reply-To: wuzhangjin@gmail.com To: Deng-Cheng Zhu Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, a.p.zijlstra@chello.nl, paulus@samba.org, mingo@elte.hu, acme@redhat.com, jamie.iles@picochip.com In-Reply-To: <1273162909.23734.4.camel@localhost> References: <1273067734-4758-1-git-send-email-dengcheng.zhu@gmail.com> <1273067734-4758-2-git-send-email-dengcheng.zhu@gmail.com> <1273162909.23734.4.camel@localhost> Content-Type: text/plain; charset="UTF-8" Organization: DSLab, Lanzhou University, China Date: Fri, 07 May 2010 00:54:12 +0800 Message-ID: <1273164852.23734.6.camel@localhost> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26628 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips On Fri, 2010-05-07 at 00:21 +0800, Wu Zhangjin wrote: > Hi, > > On Wed, 2010-05-05 at 21:55 +0800, Deng-Cheng Zhu wrote: > > Moving performance counter/control defines/helper functions into a single > > header file, so that software using the MIPS PMU can share the code. > > > > Signed-off-by: Deng-Cheng Zhu > > --- > > arch/mips/include/asm/pmu.h | 244 +++++++++++++++++++++++++++++++ > > arch/mips/oprofile/op_model_loongson2.c | 23 +--- > > arch/mips/oprofile/op_model_mipsxx.c | 164 +--------------------- > > arch/mips/oprofile/op_model_rm9000.c | 16 +-- > > 4 files changed, 247 insertions(+), 200 deletions(-) > > create mode 100644 arch/mips/include/asm/pmu.h > > > > diff --git a/arch/mips/include/asm/pmu.h b/arch/mips/include/asm/pmu.h > [...] > > + > > +#ifndef __MIPS_PMU_H__ > > +#define __MIPS_PMU_H__ > > + > > +#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) || \ > > + defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_SB1) > [...] > > +static int (*save_perf_irq)(void); > > For we will use the save_perf_irq in the common function: > mipspmu_get_irq() of the next patch, so, we need to move the definition > of it out of the #if ... and put it before the #if: > > ... > +static int (*save_perf_irq)(void); > > #if defined(CONFIG_CPU_MIPS32) > ... oh, no, For Oprofile not use it, we can define it before mipspmu_get_irq() directly. > > Regards, > Wu Zhangjin From wuzhangjin@gmail.com Thu May 6 19:00:04 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 19:00:07 +0200 (CEST) Received: from mail-px0-f177.google.com ([209.85.212.177]:44922 "EHLO mail-px0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492638Ab0EFRAE (ORCPT ); Thu, 6 May 2010 19:00:04 +0200 Received: by pxi1 with SMTP id 1so74341pxi.36 for ; Thu, 06 May 2010 09:59:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer; bh=fB0VCW2T/eWzDsCgRdD1nNCFLN0bOymoswRH3XKTjQc=; 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instead of enabled = read_c0_perfcnt() & LOONGSON2_PERFCNT_INT_EN; Reported-by: Xu Hengyang Signed-off-by: Wu Zhangjin --- arch/mips/oprofile/op_model_loongson2.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c index 29e2326..fa3bf66 100644 --- a/arch/mips/oprofile/op_model_loongson2.c +++ b/arch/mips/oprofile/op_model_loongson2.c @@ -122,7 +122,7 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id) */ /* Check whether the irq belongs to me */ - enabled = read_c0_perfcnt() & LOONGSON2_PERFCNT_INT_EN; + enabled = read_c0_perfctrl() & LOONGSON2_PERFCNT_INT_EN; if (!enabled) return IRQ_NONE; enabled = reg.cnt1_enabled | reg.cnt2_enabled; -- 1.7.0 From wuzhangjin@gmail.com Thu May 6 19:04:12 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 19:04:16 +0200 (CEST) Received: from mail-px0-f177.google.com ([209.85.212.177]:54131 "EHLO mail-px0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492665Ab0EFREM (ORCPT ); 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Thu, 06 May 2010 10:04:05 -0700 (PDT) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips@linux-mips.org, Wu Zhangjin Subject: [PATCH] Oprofile: Loongson: Fixup of loongson2_exit() Date: Fri, 7 May 2010 01:03:49 +0800 Message-Id: <1273165429-29766-1-git-send-email-wuzhangjin@gmail.com> X-Mailer: git-send-email 1.7.0 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26630 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips When exiting from loongson2_exit(), we need to reset the counter register too, this patch adds a function reset_counters() to do it, by the way, this function will be shared by Perf. Signed-off-by: Wu Zhangjin --- arch/mips/oprofile/op_model_loongson2.c | 8 +++++++- 1 files changed, 7 insertions(+), 1 deletions(-) diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c index fa3bf66..01f91a3 100644 --- a/arch/mips/oprofile/op_model_loongson2.c +++ b/arch/mips/oprofile/op_model_loongson2.c @@ -51,6 +51,12 @@ static char *oprofid = "LoongsonPerf"; static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id); /* Compute all of the registers in preparation for enabling profiling. */ +static void reset_counters(void *arg) +{ + write_c0_perfctrl(0); + write_c0_perfcnt(0); +} + static void loongson2_reg_setup(struct op_counter_config *cfg) { unsigned int ctrl = 0; @@ -157,7 +163,7 @@ static int __init loongson2_init(void) static void loongson2_exit(void) { - write_c0_perfctrl(0); + reset_counters(NULL); free_irq(LOONGSON2_PERFCNT_IRQ, oprofid); } -- 1.7.0 From wuzhangjin@gmail.com Thu May 6 19:30:07 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 19:30:10 +0200 (CEST) Received: from mail-pv0-f177.google.com ([74.125.83.177]:52541 "EHLO mail-pv0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492205Ab0EFRaH (ORCPT ); Thu, 6 May 2010 19:30:07 +0200 Received: by pvg16 with SMTP id 16so87989pvg.36 for ; Thu, 06 May 2010 10:29:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer; bh=t4A853Hj/QFyifrtpkYYtcXRepJLVKQm1VVeX5qIQeY=; b=ZOKNpDqND5pT8+Oh/LH3espkh9ZUDPoZnF1gtNlrETDDEGEcANsQ0c3Nr7jfwqbJFW VTaT6zzN7L62G2G+DwFh0kVxVhpo/0yXZy2KJKaH3qCusk1MB1K3BOBZeMGslqLqGBC2 cA7zSgaw5DopGm0CFca92Kw+alaTI8gomau3E= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; b=Zu43QKF9d63+GIoUt+mbTkzrYUrRpLC4yIeRk7uJbWGfXrSXE7XXkx1Cas+IP7p6S/ tQplAHoQTmIvfsOE6GBQ2zvZkaw3b/XaAq99PaEXWLMgB5n02lUGjqoVLYWlX1G03KX8 ESC4wY20VF3mxY8ERiYzBZBb4E6SR71Rq2Zww= Received: by 10.114.162.24 with SMTP id k24mr14412038wae.158.1273166999193; Thu, 06 May 2010 10:29:59 -0700 (PDT) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id r20sm5257084wam.5.2010.05.06.10.29.57 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 06 May 2010 10:29:58 -0700 (PDT) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips@linux-mips.org, Wu Zhangjin Subject: [PATCH 0/5] Oprofile: Loongson: add misc cleanups Date: Fri, 7 May 2010 01:29:43 +0800 Message-Id: X-Mailer: git-send-email 1.7.0 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26631 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips From: Wu Zhangjin This patchset add some cleanups for the Loongson specific oprofile support. Wu Zhangjin (5): Oprofile: Loongson: add an unified macro for setting events Oprofile: Loongson: Remove unneeded Parentheses Oprofile: Loongson: Remove unneeded variable from loongson2_cpu_setup() Oprofile: Loongson: Cleanup of the macros Oprofile: Loongson: Cleanup the comments arch/mips/oprofile/op_model_loongson2.c | 57 ++++++++++--------------------- 1 files changed, 18 insertions(+), 39 deletions(-) From wuzhangjin@gmail.com Thu May 6 19:30:39 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 19:30:46 +0200 (CEST) Received: from mail-pz0-f186.google.com ([209.85.222.186]:33357 "EHLO mail-pz0-f186.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492643Ab0EFRaL (ORCPT ); Thu, 6 May 2010 19:30:11 +0200 Received: by pzk16 with SMTP id 16so91263pzk.22 for ; Thu, 06 May 2010 10:30:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:in-reply-to:references; bh=lOAzQA25IVqUn5fVnz7nhORKt6aOIxn16z0HMKwgla0=; b=brxX+Zbqupu4w5DA7O6VP3qn6SvcRI29wEmB+tnPxZ+MmJAP9thUOJlKfFDtv2/G9P vxYeQt99O2xrE2U3pI9XABW87+fDU+pkrQ7r/RvYspt9lYzkxhm4bUxfzGrerHt2m5bx BlXvqeu92VmLIupcH8UrzrrH00BCtXd/PQ4Bw= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=StqNuhwCtlMWzqvN+F/eoHf/fPJZEPaAYzWJjYb6Bx3B5vVnHHCUwGk+gdNR3jmOwS ZPWs0I4e8in4T0xGSeyviPOSoIj/w3hw1eifKDNBwrZ1HHWdtRYm5vj4yj8Hm1TrchQ9 EWE4+w9u++macUbtQBLAnsaQzs5TGZ3LEzVHU= Received: by 10.115.65.27 with SMTP id s27mr12427302wak.144.1273167003402; Thu, 06 May 2010 10:30:03 -0700 (PDT) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id r20sm5257084wam.5.2010.05.06.10.30.01 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 06 May 2010 10:30:03 -0700 (PDT) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips@linux-mips.org, Wu Zhangjin Subject: [PATCH 1/5] Oprofile: Loongson: add an unified macro for setting events Date: Fri, 7 May 2010 01:29:44 +0800 Message-Id: <7e8ede5c83ccf30e08b9fd2966694d3bcaeec776.1273166351.git.wuzhangjin@gmail.com> X-Mailer: git-send-email 1.7.0 In-Reply-To: References: In-Reply-To: References: Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26632 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips From: Wu Zhangjin This patch adds an unified macro for counter0 and counter1 to set the events part in the control register. this macro is needed by Perf, we prepare it here at first. Signed-off-by: Wu Zhangjin --- arch/mips/oprofile/op_model_loongson2.c | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c index 01f91a3..afa0d7c 100644 --- a/arch/mips/oprofile/op_model_loongson2.c +++ b/arch/mips/oprofile/op_model_loongson2.c @@ -24,8 +24,8 @@ */ #define LOONGSON2_CPU_TYPE "mips/loongson2" -#define LOONGSON2_COUNTER1_EVENT(event) ((event & 0x0f) << 5) -#define LOONGSON2_COUNTER2_EVENT(event) ((event & 0x0f) << 9) +#define LOONGSON2_PERFCTRL_EVENT(idx, event) \ + (((event) & 0x0f) << ((idx) ? 9 : 5)) #define LOONGSON2_PERFCNT_EXL (1UL << 0) #define LOONGSON2_PERFCNT_KERNEL (1UL << 1) @@ -66,12 +66,12 @@ static void loongson2_reg_setup(struct op_counter_config *cfg) /* Compute the performance counter ctrl word. */ /* For now count kernel and user mode */ if (cfg[0].enabled) { - ctrl |= LOONGSON2_COUNTER1_EVENT(cfg[0].event); + ctrl |= LOONGSON2_PERFCTRL_EVENT(0, cfg[0].event); reg.reset_counter1 = 0x80000000ULL - cfg[0].count; } if (cfg[1].enabled) { - ctrl |= LOONGSON2_COUNTER2_EVENT(cfg[1].event); + ctrl |= LOONGSON2_PERFCTRL_EVENT(1, cfg[1].event); reg.reset_counter2 = (0x80000000ULL - cfg[1].count); } -- 1.7.0 From wuzhangjin@gmail.com Thu May 6 19:31:05 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 19:31:10 +0200 (CEST) Received: from mail-px0-f177.google.com ([209.85.212.177]:62885 "EHLO mail-px0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492659Ab0EFRaN (ORCPT ); Thu, 6 May 2010 19:30:13 +0200 Received: by pxi1 with SMTP id 1so87780pxi.36 for ; Thu, 06 May 2010 10:30:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:in-reply-to:references; bh=cGxNLxtGAmwMoBTLvay6CnmQHy0RaPXjevi0hWlWRrs=; b=pETGg2fayTpBsISVxay4I/92bAJxWpmiYZNmh8JiuF+RYT77b+hDmfs8DqDFLqmgUx HrKe6tCXNd0a6SBLDRnNqlhZCzaH/f4rC7QAXl/79A2BnHPBym03cbXPuXkf/AUvbiEW kY30h6Dww1kz4/Dx/n9Hp7rU4lkFIOecZy5vM= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=VJTJxLJHetvUdzqcPCLMfdciGrs3z0eufr17vlbh+dzrgEn8uPn5Cs/GI0RNMyy1uQ AxMC3jqAnZQpBhODhgXuxXa29G0Cl8hqjp1c3bGC+9Nqvi1LW6aqwz48Ztsmt37q728w alqS6Ug94HiTK2g0hZ6uRf4K8sntxm8jHn1DY= Received: by 10.114.250.6 with SMTP id x6mr9641753wah.33.1273167006759; Thu, 06 May 2010 10:30:06 -0700 (PDT) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id r20sm5257084wam.5.2010.05.06.10.30.04 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 06 May 2010 10:30:06 -0700 (PDT) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips@linux-mips.org, Wu Zhangjin Subject: [PATCH 2/5] Oprofile: Loongson: Remove unneeded Parentheses Date: Fri, 7 May 2010 01:29:45 +0800 Message-Id: <211d09af2c3e38694f6a1cdb3954402c20adb70e.1273166351.git.wuzhangjin@gmail.com> X-Mailer: git-send-email 1.7.0 In-Reply-To: References: In-Reply-To: References: Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26633 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips From: Wu Zhangjin Signed-off-by: Wu Zhangjin --- arch/mips/oprofile/op_model_loongson2.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c index afa0d7c..e2696d9 100644 --- a/arch/mips/oprofile/op_model_loongson2.c +++ b/arch/mips/oprofile/op_model_loongson2.c @@ -72,7 +72,7 @@ static void loongson2_reg_setup(struct op_counter_config *cfg) if (cfg[1].enabled) { ctrl |= LOONGSON2_PERFCTRL_EVENT(1, cfg[1].event); - reg.reset_counter2 = (0x80000000ULL - cfg[1].count); + reg.reset_counter2 = 0x80000000ULL - cfg[1].count; } if (cfg[0].enabled || cfg[1].enabled) { -- 1.7.0 From wuzhangjin@gmail.com Thu May 6 19:31:29 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 19:31:40 +0200 (CEST) Received: from mail-px0-f177.google.com ([209.85.212.177]:62885 "EHLO mail-px0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492665Ab0EFRaR (ORCPT ); Thu, 6 May 2010 19:30:17 +0200 Received: by mail-px0-f177.google.com with SMTP id 1so87780pxi.36 for ; Thu, 06 May 2010 10:30:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:in-reply-to:references; bh=iOziV7NIwmNfj91mLxOeWSxs6T6gvSnHuyo4LNVXzXk=; b=dXBqlXuzveplVWlhKba4ouv/UA0j2dqQdNif/UNywjczutJPcXbi5Ba05duQamXtbH vLzKeKHpDk6YJjgycGZPDb9U8FbRWMsvAAKqcDBty8jkXw9eiEXxt25iay3bfuicDQOs 7/eGQgYXyOKLbNIjCvb+ufjnJdDUEDcPomfLU= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=fSlbN2xFAacfPuWQ/FAzpGTqP1jEesyiLwaK28YNI6VykuBXvewvMNd82F5JBIpYPa YRmDcv8a6ERg41MS844f7SA6PbHw73nrQ9ITOC+qjP4+Iq471On0cvERlIMZWa/fnuXA 8cnpdkWXnxqE1JMxh9KOBmzDsUA2ix9KYR7nA= Received: by 10.115.117.31 with SMTP id u31mr3241425wam.70.1273167016247; Thu, 06 May 2010 10:30:16 -0700 (PDT) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id r20sm5257084wam.5.2010.05.06.10.30.14 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 06 May 2010 10:30:15 -0700 (PDT) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips@linux-mips.org, Wu Zhangjin Subject: [PATCH 3/5] Oprofile: Loongson: Remove unneeded variable from loongson2_cpu_setup() Date: Fri, 7 May 2010 01:29:46 +0800 Message-Id: <5ee1e74c10073d930580fe8e21f170a4986175e4.1273166351.git.wuzhangjin@gmail.com> X-Mailer: git-send-email 1.7.0 In-Reply-To: References: In-Reply-To: References: Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26634 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips From: Wu Zhangjin Signed-off-by: Wu Zhangjin --- arch/mips/oprofile/op_model_loongson2.c | 5 +---- 1 files changed, 1 insertions(+), 4 deletions(-) diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c index e2696d9..a03894e 100644 --- a/arch/mips/oprofile/op_model_loongson2.c +++ b/arch/mips/oprofile/op_model_loongson2.c @@ -94,10 +94,7 @@ static void loongson2_reg_setup(struct op_counter_config *cfg) static void loongson2_cpu_setup(void *args) { - uint64_t perfcount; - - perfcount = (reg.reset_counter2 << 32) | reg.reset_counter1; - write_c0_perfcnt(perfcount); + write_c0_perfcnt((reg.reset_counter2 << 32) | reg.reset_counter1); } static void loongson2_cpu_start(void *args) -- 1.7.0 From wuzhangjin@gmail.com Thu May 6 19:31:59 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 19:32:04 +0200 (CEST) Received: from mail-pz0-f186.google.com ([209.85.222.186]:33357 "EHLO mail-pz0-f186.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492679Ab0EFRaU (ORCPT ); Thu, 6 May 2010 19:30:20 +0200 Received: by mail-pz0-f186.google.com with SMTP id 16so91263pzk.22 for ; Thu, 06 May 2010 10:30:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:in-reply-to:references; bh=yAIMCVcVTtGN31ufVFeEefyyZ/MwPMtxPT9suL9rmxg=; b=hN4F5tkUotXEy9Cn+7+t5gguWACfDHFndHvNeXnMKluRI4MYt157BkIUlfF3XdXsx5 iPMs/Ha0TD3lEBell6Fly2kYeYXWzkgrbboCxf7VJjpHD2NatvjDQfdyEQ4BRpMBl33I iyPouC/gs1SLuCnekSKc1X3vpwh3LNHh3EEB0= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=TO+O9iq8fzg0idjeBZpXkucGb4ZT6P8eGtUKzfUJV94EPAWihBxbYqpm7cRqbzQuCe Az5GQCbcJiS4Wa2kpPT8sPaNV7gDhgkd2FGo+R7J8Cv9gIZx+QAMmxhHlGZB0jAYCp/+ Hjg1wFTaun5zCq8pvM25kPmZHFdJSeVly7plU= Received: by 10.114.18.7 with SMTP id 7mr2531889war.127.1273167019371; Thu, 06 May 2010 10:30:19 -0700 (PDT) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id r20sm5257084wam.5.2010.05.06.10.30.17 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 06 May 2010 10:30:18 -0700 (PDT) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips@linux-mips.org, Wu Zhangjin Subject: [PATCH 4/5] Oprofile: Loongson: Cleanup of the macros Date: Fri, 7 May 2010 01:29:47 +0800 Message-Id: <128dc97848b717b4a0b11ba481a602ba144249a6.1273166351.git.wuzhangjin@gmail.com> X-Mailer: git-send-email 1.7.0 In-Reply-To: References: In-Reply-To: References: Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26635 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips From: Wu Zhangjin The _EXL, _KERNEL ... bits are in the performance control register, so, use _PERFCTRL prefix instead of _PERFCNT. BTW: to make the macro readable, use _ENABLE instead of _INT_EN to describe the interrupt enable bit. Signed-off-by: Wu Zhangjin --- arch/mips/oprofile/op_model_loongson2.c | 22 +++++++++++----------- 1 files changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c index a03894e..23f7e13 100644 --- a/arch/mips/oprofile/op_model_loongson2.c +++ b/arch/mips/oprofile/op_model_loongson2.c @@ -24,16 +24,16 @@ */ #define LOONGSON2_CPU_TYPE "mips/loongson2" +#define LOONGSON2_PERFCNT_OVERFLOW (1ULL << 31) + +#define LOONGSON2_PERFCTRL_EXL (1UL << 0) +#define LOONGSON2_PERFCTRL_KERNEL (1UL << 1) +#define LOONGSON2_PERFCTRL_SUPERVISOR (1UL << 2) +#define LOONGSON2_PERFCTRL_USER (1UL << 3) +#define LOONGSON2_PERFCTRL_ENABLE (1UL << 4) #define LOONGSON2_PERFCTRL_EVENT(idx, event) \ (((event) & 0x0f) << ((idx) ? 9 : 5)) -#define LOONGSON2_PERFCNT_EXL (1UL << 0) -#define LOONGSON2_PERFCNT_KERNEL (1UL << 1) -#define LOONGSON2_PERFCNT_SUPERVISOR (1UL << 2) -#define LOONGSON2_PERFCNT_USER (1UL << 3) -#define LOONGSON2_PERFCNT_INT_EN (1UL << 4) -#define LOONGSON2_PERFCNT_OVERFLOW (1ULL << 31) - /* Loongson2 performance counter register */ #define read_c0_perfctrl() __read_64bit_c0_register($24, 0) #define write_c0_perfctrl(val) __write_64bit_c0_register($24, 0, val) @@ -76,11 +76,11 @@ static void loongson2_reg_setup(struct op_counter_config *cfg) } if (cfg[0].enabled || cfg[1].enabled) { - ctrl |= LOONGSON2_PERFCNT_EXL | LOONGSON2_PERFCNT_INT_EN; + ctrl |= LOONGSON2_PERFCTRL_EXL | LOONGSON2_PERFCTRL_ENABLE; if (cfg[0].kernel || cfg[1].kernel) - ctrl |= LOONGSON2_PERFCNT_KERNEL; + ctrl |= LOONGSON2_PERFCTRL_KERNEL; if (cfg[0].user || cfg[1].user) - ctrl |= LOONGSON2_PERFCNT_USER; + ctrl |= LOONGSON2_PERFCTRL_USER; } reg.ctrl = ctrl; @@ -125,7 +125,7 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id) */ /* Check whether the irq belongs to me */ - enabled = read_c0_perfctrl() & LOONGSON2_PERFCNT_INT_EN; + enabled = read_c0_perfctrl() & LOONGSON2_PERFCTRL_ENABLE; if (!enabled) return IRQ_NONE; enabled = reg.cnt1_enabled | reg.cnt2_enabled; -- 1.7.0 From wuzhangjin@gmail.com Thu May 6 19:32:22 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 19:32:28 +0200 (CEST) Received: from mail-pz0-f186.google.com ([209.85.222.186]:33357 "EHLO mail-pz0-f186.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492684Ab0EFRaX (ORCPT ); Thu, 6 May 2010 19:30:23 +0200 Received: by mail-pz0-f186.google.com with SMTP id 16so91263pzk.22 for ; Thu, 06 May 2010 10:30:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:in-reply-to:references; bh=yMzvNXuJKNUj5XHgV5B4sd3f5lEpkN5Ftd/gFplTDMk=; b=u0jmIsFnbzXnZZV9z1nn73EDg8j1m66KLeeEi+hzIQrDJt/ZWcH+3E83rLjlu+1daj Ang9zCvdqakmWv68sKDR71cKJ/eTVTtL0wyNlQ3y2u0Fpfuz8s7wxjfTz2iIC1J7t7zs Zbe3LIu78vqMT0oXU9hysAnQyngJ5UPv+s8y0= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=iLJwAyzwl5hlpkeiysfQC2fMlXeTbIL4DazTbjalmh/TTnvRXJk8PUXP3u4mfbltcW WgTjk76PnloIgHd4NtDFx+h38DrBdDh+eC9msZ9xagl60TRsSG6VgkkVuoZ1FQb5TS/A grd+2iwxLzE8J0RORRaAT42dzuQPf5Bopl8G4= Received: by 10.114.189.14 with SMTP id m14mr1233021waf.12.1273167022895; Thu, 06 May 2010 10:30:22 -0700 (PDT) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id r20sm5257084wam.5.2010.05.06.10.30.20 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 06 May 2010 10:30:21 -0700 (PDT) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips@linux-mips.org, Wu Zhangjin Subject: [PATCH 5/5] Oprofile: Loongson: Cleanup the comments Date: Fri, 7 May 2010 01:29:48 +0800 Message-Id: X-Mailer: git-send-email 1.7.0 In-Reply-To: References: In-Reply-To: References: Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26636 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips From: Wu Zhangjin This patch removes some out-of-date comments and unneeded blank lines. Signed-off-by: Wu Zhangjin --- arch/mips/oprofile/op_model_loongson2.c | 25 +++++-------------------- 1 files changed, 5 insertions(+), 20 deletions(-) diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c index 23f7e13..60d3ea6 100644 --- a/arch/mips/oprofile/op_model_loongson2.c +++ b/arch/mips/oprofile/op_model_loongson2.c @@ -8,7 +8,6 @@ * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. - * */ #include #include @@ -17,11 +16,6 @@ #include /* LOONGSON2_PERFCNT_IRQ */ #include "op_impl.h" -/* - * a patch should be sent to oprofile with the loongson-specific support. - * otherwise, the oprofile tool will not recognize this and complain about - * "cpu_type 'unset' is not valid". - */ #define LOONGSON2_CPU_TYPE "mips/loongson2" #define LOONGSON2_PERFCNT_OVERFLOW (1ULL << 31) @@ -34,7 +28,6 @@ #define LOONGSON2_PERFCTRL_EVENT(idx, event) \ (((event) & 0x0f) << ((idx) ? 9 : 5)) -/* Loongson2 performance counter register */ #define read_c0_perfctrl() __read_64bit_c0_register($24, 0) #define write_c0_perfctrl(val) __write_64bit_c0_register($24, 0, val) #define read_c0_perfcnt() __read_64bit_c0_register($25, 0) @@ -49,7 +42,6 @@ static struct loongson2_register_config { static char *oprofid = "LoongsonPerf"; static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id); -/* Compute all of the registers in preparation for enabling profiling. */ static void reset_counters(void *arg) { @@ -63,8 +55,11 @@ static void loongson2_reg_setup(struct op_counter_config *cfg) reg.reset_counter1 = 0; reg.reset_counter2 = 0; - /* Compute the performance counter ctrl word. */ - /* For now count kernel and user mode */ + + /* + * Compute the performance counter ctrl word. + * For now, count kernel and user mode. + */ if (cfg[0].enabled) { ctrl |= LOONGSON2_PERFCTRL_EVENT(0, cfg[0].event); reg.reset_counter1 = 0x80000000ULL - cfg[0].count; @@ -87,11 +82,8 @@ static void loongson2_reg_setup(struct op_counter_config *cfg) reg.cnt1_enabled = cfg[0].enabled; reg.cnt2_enabled = cfg[1].enabled; - } -/* Program all of the registers in preparation for enabling profiling. */ - static void loongson2_cpu_setup(void *args) { write_c0_perfcnt((reg.reset_counter2 << 32) | reg.reset_counter1); @@ -117,13 +109,6 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id) struct pt_regs *regs = get_irq_regs(); int enabled; - /* - * LOONGSON2 defines two 32-bit performance counters. - * To avoid a race updating the registers we need to stop the counters - * while we're messing with - * them ... - */ - /* Check whether the irq belongs to me */ enabled = read_c0_perfctrl() & LOONGSON2_PERFCTRL_ENABLE; if (!enabled) -- 1.7.0 From ralf@linux-mips.org Thu May 6 20:47:58 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 20:48:05 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:43918 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492723Ab0EFSr6 (ORCPT ); Thu, 6 May 2010 20:47:58 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o46IlrIj022536; Thu, 6 May 2010 19:47:54 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o46IlpPB022525; Thu, 6 May 2010 19:47:51 +0100 Date: Thu, 6 May 2010 19:47:51 +0100 From: Ralf Baechle To: Shane McDonald Cc: "Kevin D. Kissell" , Sergei Shtylyov , Atsushi Nemoto , linux-mips@linux-mips.org Subject: Re: [MIPS] FPU emulator: allow Cause bits of FCSR to be writeable by ctc1 Message-ID: <20100506184751.GF28066@linux-mips.org> References: <4BE122D1.3000609@paralogos.com> <20100505091159.GA4016@linux-mips.org> <4BE19214.4010209@paralogos.com> <20100506.012240.118951273.anemo@mba.ocn.ne.jp> <4BE1C4EA.1020202@paralogos.com> <4BE2A6EE.80705@mvista.com> <4BE2E445.5050809@paralogos.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26637 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Thu, May 06, 2010 at 12:42:35PM -0600, Shane McDonald wrote: > Date: Thu, 6 May 2010 12:42:35 -0600 > From: Shane McDonald > To: "Kevin D. Kissell" > Cc: Sergei Shtylyov , > Atsushi Nemoto , ralf@linux-mips.org, > linux-mips@linux-mips.org > Subject: Re: [MIPS] FPU emulator: allow Cause bits of FCSR to be writeable > by > ctc1 > Content-Type: text/plain; charset=ISO-8859-1 > > On Thu, May 6, 2010 at 9:46 AM, Kevin D. Kissell wrote: > > Sergei Shtylyov wrote: > >> Kevin D. Kissell wrote: > >> > >>> I'm cool with the patch as is, but in the general spirit of regarding > >>> numeric constants other than 0 and 1 as instruments of Satan, it > >>> would probably be even better if those reserved bits were defined > >>> (FPU_CSR_RSVD, or whatever is compatible with existing convention for > >>> such bits) along with the other FCSR bit masks in mipsregs.h, so that > >>> the assigment looks like: > >>> > >>>          ctx->fcr31 = (value & ~(FPU_CSR_RSVD | 0x3)) | > >>>                   ieee_rm[value & 0x3]; > >> > >>   0x3 is still neither 0 nor 1, and so remains an instrument of Satan. > >> How about #defining it also? :-) > > > > In some software engineering cultures, that would be considered a good > > idea or even mandatory.  This being the Linux kernel, I think it's OK, > > because, as Shane remarked, it's a mask that's local to the module and > > whose value is "obvious", and such things are pretty commonly handled as > > numeric constants in the kernel. > > > > There actually *is* a #define for that field, FPU_CSR_RD, which could be > > used here in place of the 0x3, but I'm a little torn about its use.  On > > one hand "value & ~(FPU_CSR_RSVD | FPU_CSR_RD)" is more clear about what > > we're doing, but on the other hand, it's less obvious that "value & > > FPU_CSR_RD" is generating an integer in the range 0-3 for an index.  So > > I'm absolutely fine with the code as written, but wouldn't complain if > > someone wanted to make it use the symbolic constant. > > I'm torn here, which is why I hadn't changed that at all. I'd rather not > use FPU_CSR_RD, because that defines a value in the rounding mode > bits (which happens to have all the bits set), rather than a mask for the > bits. I'd prefer to define a new constant FPU_CSR_RM with the > value 0x00000003 -- a better name might be FPU_CSR_RM_MASK, > but that's inconsistent with the names of the other FCSR fields. > And, as Kevin said, it doesn't make it clear that we're trying to generate > an index in the range of 0 - 3. I guess we could also define a constant > for the number of bits to shift to get the RM bits into the low order bits, > something like > > #define FPU_CSR_RM_SHIFT 0 > > at which point our code could look like > > ctx->fcr31 = (value & ~(FPU_CSR_RSVD | FPU_CSR_RM)) | > ieee_rm[(value & FPU_CSR_RM) >> FPU_CSR_RM_SHIFT]; > > I'm a little wary of adding the FPU_CSR_RM_SHIFT, because there aren't > any other SHIFT defines for the FCSR, and because the shift value is 0. > But, the above code doesn't look as bad as I originally thought it would, > and it probably is clearer. > > Comments? > > There's also use of the 0x3 magic number in a number of other cases > in this file. Do I make a similar change to those cases in this patch, > or should I create a separate patch for that? Or would that just be > one of those minor style change patches that no one likes? I'd certainly consider it. It's logically a separate change so I'd suggest a separate patch for -queue. Your earlier patch is 2.6.34 and -stable material however and that's another reason why this should be separate patches. Ralf From kevink@paralogos.com Thu May 6 21:07:08 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 May 2010 21:07:14 +0200 (CEST) Received: from gateway04.websitewelcome.com ([67.18.1.2]:39346 "HELO gateway04.websitewelcome.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with SMTP id S1492723Ab0EFTHI (ORCPT ); Thu, 6 May 2010 21:07:08 +0200 Received: (qmail 3707 invoked from network); 6 May 2010 19:10:40 -0000 Received: from gator750.hostgator.com (174.132.194.2) by gateway04.websitewelcome.com with SMTP; 6 May 2010 19:10:40 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=paralogos.com; h=Received:Message-ID:Date:From:User-Agent:MIME-Version:To:CC:Subject:References:In-Reply-To:Content-Type:Content-Transfer-Encoding; b=tzVbIVbsSzasHANvdAj88J9U1iu44w/pBboxw8xAezPKfLyiOrFXE4u0Xkly8JVGCqpFCW1SD9THj3SOBqX2QiiWCD1oyThu/7D2TINh5Rubod619DRI9X7Rtiz/JL78; Received: from 216-239-45-4.google.com ([216.239.45.4]:50575 helo=epiktistes.mtv.corp.google.com) by gator750.hostgator.com with esmtpa (Exim 4.69) (envelope-from ) id 1OA6PK-00031V-Lr; Thu, 06 May 2010 14:06:55 -0500 Message-ID: <4BE31353.2030007@paralogos.com> Date: Thu, 06 May 2010 12:06:59 -0700 From: "Kevin D. Kissell" User-Agent: Thunderbird 2.0.0.24 (X11/20100317) MIME-Version: 1.0 To: Shane McDonald CC: Sergei Shtylyov , Atsushi Nemoto , ralf@linux-mips.org, linux-mips@linux-mips.org Subject: Re: [MIPS] FPU emulator: allow Cause bits of FCSR to be writeable by ctc1 References: <4BE122D1.3000609@paralogos.com> <20100505091159.GA4016@linux-mips.org> <4BE19214.4010209@paralogos.com> <20100506.012240.118951273.anemo@mba.ocn.ne.jp> <4BE1C4EA.1020202@paralogos.com> <4BE2A6EE.80705@mvista.com> <4BE2E445.5050809@paralogos.com> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - gator750.hostgator.com X-AntiAbuse: Original Domain - linux-mips.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - paralogos.com Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26638 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kevink@paralogos.com Precedence: bulk X-list: linux-mips Shane McDonald wrote: > On Thu, May 6, 2010 at 9:46 AM, Kevin D. Kissell wrote: > >> Sergei Shtylyov wrote: >> >>> Kevin D. Kissell wrote: >>> >>> >>>> I'm cool with the patch as is, but in the general spirit of regarding >>>> numeric constants other than 0 and 1 as instruments of Satan, it >>>> would probably be even better if those reserved bits were defined >>>> (FPU_CSR_RSVD, or whatever is compatible with existing convention for >>>> such bits) along with the other FCSR bit masks in mipsregs.h, so that >>>> the assigment looks like: >>>> >>>> ctx->fcr31 = (value & ~(FPU_CSR_RSVD | 0x3)) | >>>> ieee_rm[value & 0x3]; >>>> >>> 0x3 is still neither 0 nor 1, and so remains an instrument of Satan. >>> How about #defining it also? :-) >>> >> In some software engineering cultures, that would be considered a good >> idea or even mandatory. This being the Linux kernel, I think it's OK, >> because, as Shane remarked, it's a mask that's local to the module and >> whose value is "obvious", and such things are pretty commonly handled as >> numeric constants in the kernel. >> >> There actually *is* a #define for that field, FPU_CSR_RD, which could be >> used here in place of the 0x3, but I'm a little torn about its use. On >> one hand "value & ~(FPU_CSR_RSVD | FPU_CSR_RD)" is more clear about what >> we're doing, but on the other hand, it's less obvious that "value & >> FPU_CSR_RD" is generating an integer in the range 0-3 for an index. So >> I'm absolutely fine with the code as written, but wouldn't complain if >> someone wanted to make it use the symbolic constant. >> > > I'm torn here, which is why I hadn't changed that at all. I'd rather not > use FPU_CSR_RD, because that defines a value in the rounding mode > bits (which happens to have all the bits set), rather than a mask for the > bits. I'd prefer to define a new constant FPU_CSR_RM with the > value 0x00000003 -- a better name might be FPU_CSR_RM_MASK, > but that's inconsistent with the names of the other FCSR fields. > And, as Kevin said, it doesn't make it clear that we're trying to generate > an index in the range of 0 - 3. I guess we could also define a constant > for the number of bits to shift to get the RM bits into the low order bits, > something like > > #define FPU_CSR_RM_SHIFT 0 > > at which point our code could look like > > ctx->fcr31 = (value & ~(FPU_CSR_RSVD | FPU_CSR_RM)) | > ieee_rm[(value & FPU_CSR_RM) >> FPU_CSR_RM_SHIFT]; > > I'm a little wary of adding the FPU_CSR_RM_SHIFT, because there aren't > any other SHIFT defines for the FCSR, and because the shift value is 0. > But, the above code doesn't look as bad as I originally thought it would, > and it probably is clearer. > > Comments? > I agree with Ralf's suggestion to make the further cleanup a separate patch. Since there isn't a precedent for having shift counts for the FCSR fields, another option would be to define a macro, let's call it modeindex() for the sake of the argument, that's defined wherever ieee_rm is declared, and which converts an FCSR value into the index: #define modeindex(v) ((v) & FPU_CSR_RM) Then the actual code in cop1emu.c could look like: ctx->fcr31 = (value & ~(FPU_CSR_RSVD | FPU_CSR_RM)) | ieee_rm[modeindex(value)]; Which is pretty clear, has no cursed constants, and doesn't create a universe of shift counts where the only one we care about is zero. > There's also use of the 0x3 magic number in a number of other cases > in this file. If all the others treat it as a mask, then your proposed FPR_CSR_RM should be fine for them. If they don't... Regards, Kevin K. From dengcheng.zhu@gmail.com Fri May 7 05:12:42 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 07 May 2010 05:12:47 +0200 (CEST) Received: from mail-gy0-f177.google.com ([209.85.160.177]:64246 "EHLO mail-gy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491000Ab0EGDMm (ORCPT ); Fri, 7 May 2010 05:12:42 +0200 Received: by gyb11 with SMTP id 11so398741gyb.36 for ; Thu, 06 May 2010 20:12:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:received:in-reply-to :references:date:message-id:subject:from:to:cc:content-type; bh=cjHROHrQAMq0Ym9a/eBHSbnHVtbJ6wHHwaekC4gYdqM=; b=bcCGTe7ppabznh/La7jU6U2dbVg0968HZIsYZBy5kwbeJ/EAMkIdWPJHh0D0tY/UE2 x7GWwzTyLcZ8wHnl+eyIDZtN66HoBQX3VI9jyBthP5Nixl2p5n34FTQA6E94yP7c+lqk Z1WF6yk1VVN72jfTwi/t/kP8ZInXEYCxCoIiQ= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; b=nWH2+hb+qyR5W7jxc/q1xTVuT1TXd3/mrTU8LKT9V7RkxpQAAWj4I1I50oXqNJUvQZ 9N7/fizpynlqzib1sxpImrJGzbhuqiqdSR9Y7+pT9TKcAUCuPUMejm+4S7UYjrx/5UMM HOeP4I9fRT0njp9WQIM5mSuLWlcqtf96rkgk4= MIME-Version: 1.0 Received: by 10.150.250.42 with SMTP id x42mr2914976ybh.193.1273201955359; Thu, 06 May 2010 20:12:35 -0700 (PDT) Received: by 10.150.157.8 with HTTP; Thu, 6 May 2010 20:12:35 -0700 (PDT) In-Reply-To: <1273164852.23734.6.camel@localhost> References: <1273067734-4758-1-git-send-email-dengcheng.zhu@gmail.com> <1273067734-4758-2-git-send-email-dengcheng.zhu@gmail.com> <1273162909.23734.4.camel@localhost> <1273164852.23734.6.camel@localhost> Date: Fri, 7 May 2010 11:12:35 +0800 Message-ID: Subject: Re: [PATCH v3 1/4] MIPS/Oprofile: extract PMU defines/helper functions for sharing From: Deng-Cheng Zhu To: wuzhangjin@gmail.com Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, a.p.zijlstra@chello.nl, paulus@samba.org, mingo@elte.hu, acme@redhat.com, jamie.iles@picochip.com Content-Type: text/plain; charset=ISO-8859-1 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26639 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dengcheng.zhu@gmail.com Precedence: bulk X-list: linux-mips >> For we will use the save_perf_irq in the common function: >> mipspmu_get_irq() of the next patch, so, we need to move the definition >> of it out of the #if ... and put it before the #if: >> >> ... >> +static int (*save_perf_irq)(void); >> >> #if defined(CONFIG_CPU_MIPS32) >> ... > > oh, no, For Oprofile not use it, we can define it before > mipspmu_get_irq() directly. > Thanks for your comments! Just a correction: op_model_mipsxx.c will also use save_perf_irq. So when taking your 2nd solution, we need to define another static save_perf_irq in op_model_mipsxx.c. From mcdonald.shane@gmail.com Fri May 7 07:27:09 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 07 May 2010 07:27:14 +0200 (CEST) Received: from mail-qy0-f185.google.com ([209.85.221.185]:36875 "EHLO mail-qy0-f185.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491796Ab0EGF1I (ORCPT ); Fri, 7 May 2010 07:27:08 +0200 Received: by qyk15 with SMTP id 15so1237405qyk.6 for ; Thu, 06 May 2010 22:27:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:received:to:subject :message-id:from:date; bh=3eXmyP0SgS1K6rVvuYozbjW+eftctR1O3ihIpcXaPHQ=; b=HbtZb7ffbE9NWd2vcRBZVcn/DzmWgobAChHHr+YO/CeBUIltZXynISrhZDxkAWXgod rYIM/pkEQ2qxqGC4xguncmoCVxf9FZG5rlybVMyp2sPsXRAXuooX8vnYQoQLVEEMoGPA aGOdekjlU01AG/qg75f9V8Ba2ITedV7W9WQGk= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=to:subject:message-id:from:date; b=o8b29hnkZzlT2F7JfkWGtWExK6M7v9bicgvHb2bdzTS4ZPyYHa9mlpu6U4nv+7NFwm jR5cOuxBuH0y1mWqry0Z5VEHLCgK46MbddJrDkwDU9bS5HtNYwT2yhPFYFD9XbIFtLPz GANIJs/C1b9LonFW2DDUw7w2ast1/a7FlqOrM= Received: by 10.224.24.203 with SMTP id w11mr9104472qab.296.1273210021455; Thu, 06 May 2010 22:27:01 -0700 (PDT) Received: from localhost ([207.47.250.203]) by mx.google.com with ESMTPS id 22sm1106418qyk.6.2010.05.06.22.26.59 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 06 May 2010 22:27:00 -0700 (PDT) Received: from shane by localhost with local (Exim 4.69) (envelope-from ) id 1OAG5R-0003hc-AY; Thu, 06 May 2010 23:26:57 -0600 To: anemo@mba.ocn.ne.jp, kevink@paralogos.com, linux-mips@linux-mips.org, ralf@linux-mips.org, sshtylyov@mvista.com Subject: [PATCH v3] MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1 Message-Id: From: Shane McDonald Date: Thu, 06 May 2010 23:26:57 -0600 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26640 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mcdonald.shane@gmail.com Precedence: bulk X-list: linux-mips In the FPU emulator code of the MIPS, the Cause bits of the FCSR register are not currently writeable by the ctc1 instruction. In odd corner cases, this can cause problems. For example, a case existed where a divide-by-zero exception was generated by the FPU, and the signal handler attempted to restore the FPU registers to their state before the exception occurred. In this particular setup, writing the old value to the FCSR register would cause another divide-by-zero exception to occur immediately. The solution is to change the ctc1 instruction emulator code to allow the Cause bits of the FCSR register to be writeable. This is the behaviour of the hardware that the code is emulating. This problem was found by Shane McDonald, but the credit for the fix goes to Kevin Kissell. In Kevin's words: I submit that the bug is indeed in that ctc_op: case of the emulator. The Cause bits (17:12) are supposed to be writable by that instruction, but the CTC1 emulation won't let them be updated by the instruction. I think that actually if you just completely removed lines 387-388 [...] things would work a good deal better. At least, it would be a more accurate emulation of the architecturally defined FPU. If I wanted to be really, really pedantic (which I sometimes do), I'd also protect the reserved bits that aren't necessarily writable. Signed-off-by: Shane McDonald --- v3: More coding style cleanups, and removed the 0x3 constant, replacing it with FPU_CSR_RM and modeindex(). v2: Replaced an ugly magic number with a constant for the reserved bits of the FPU CSR. arch/mips/include/asm/mipsregs.h | 9 ++++++++- arch/mips/math-emu/cp1emu.c | 15 +++++++++++---- 2 files changed, 19 insertions(+), 5 deletions(-) diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 49382d5..c6e3c93 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -135,6 +135,12 @@ #define FPU_CSR_COND7 0x80000000 /* $fcc7 */ /* + * Bits 18 - 20 of the FPU Status Register will be read as 0, + * and should be written as zero. + */ +#define FPU_CSR_RSVD 0x001c0000 + +/* * X the exception cause indicator * E the exception enable * S the sticky/flag bit @@ -161,7 +167,8 @@ #define FPU_CSR_UDF_S 0x00000008 #define FPU_CSR_INE_S 0x00000004 -/* rounding mode */ +/* Bits 0 and 1 of FPU Status Register specify the rounding mode */ +#define FPU_CSR_RM 0x00000003 #define FPU_CSR_RN 0x0 /* nearest */ #define FPU_CSR_RZ 0x1 /* towards zero */ #define FPU_CSR_RU 0x2 /* towards +Infinity */ diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c index 8f2f8e9..f2338d1 100644 --- a/arch/mips/math-emu/cp1emu.c +++ b/arch/mips/math-emu/cp1emu.c @@ -78,6 +78,9 @@ DEFINE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats); #define FPCREG_RID 0 /* $0 = revision id */ #define FPCREG_CSR 31 /* $31 = csr */ +/* Determine rounding mode from the RM bits of the FCSR */ +#define modeindex(v) ((v) & FPU_CSR_RM) + /* Convert Mips rounding mode (0..3) to IEEE library modes. */ static const unsigned char ieee_rm[4] = { [FPU_CSR_RN] = IEEE754_RN, @@ -384,10 +387,14 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) (void *) (xcp->cp0_epc), MIPSInst_RT(ir), value); #endif - value &= (FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03); - ctx->fcr31 &= ~(FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03); - /* convert to ieee library modes */ - ctx->fcr31 |= (value & ~0x3) | ieee_rm[value & 0x3]; + + /* + * Don't write reserved bits, + * and convert to ieee library modes + */ + ctx->fcr31 = (value & + ~(FPU_CSR_RSVD | FPU_CSR_RM)) | + ieee_rm[modeindex(value)]; } if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) { return SIGFPE; -- 1.6.2.4 From mcdonald.shane@gmail.com Fri May 7 08:02:21 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 07 May 2010 08:02:30 +0200 (CEST) Received: from mail-qy0-f185.google.com ([209.85.221.185]:60136 "EHLO mail-qy0-f185.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491180Ab0EGGCV (ORCPT ); Fri, 7 May 2010 08:02:21 +0200 Received: by qyk15 with SMTP id 15so1273726qyk.6 for ; Thu, 06 May 2010 23:02:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:received:to:subject :message-id:from:date; bh=4yUHrJ8qt1aOug5UzP86hp3fQAQtNvj8K2lKNih/IxI=; b=EZFUKDVx6xbqJBGhlWfgGQwQ3iNLNVG8CwLJjIQlAjYzSaxI6ho3rMj4UXqsS4HNaM 2E0JSpqj+7Z9G10bCpIhgaEf2PEg6ykjW3g8AfThcAoUY8udB2wFqZUPqMzdJ1KCmxVt CAvm6iTvE/Dl2aJBKtjyd+u+ffzosMGm59QJg= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=to:subject:message-id:from:date; b=nkbvKOTn4R9aq2zgOIZXFcgp+0mSOHfvSbz1IUrqBcgxmHvJkS9KJ94G6ikOiU+tEm HtuwPW0UUD30DNvJV+4mGnbyp6/rtMV+xaFq+ifLVjsL0ao93IZaVQ6YL1iO8My81g7P hVXPEH5vVQNu1kai86aLtIci9sZ1EIs29GeGQ= Received: by 10.224.27.1 with SMTP id g1mr4773496qac.212.1273212133385; Thu, 06 May 2010 23:02:13 -0700 (PDT) Received: from localhost ([207.47.250.203]) by mx.google.com with ESMTPS id 21sm1112829qyk.13.2010.05.06.23.02.11 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 06 May 2010 23:02:12 -0700 (PDT) Received: from shane by localhost with local (Exim 4.69) (envelope-from ) id 1OAGdV-0000MT-J5; Fri, 07 May 2010 00:02:09 -0600 To: anemo@mba.ocn.ne.jp, kevink@paralogos.com, linux-mips@linux-mips.org, ralf@linux-mips.org, sshtylyov@mvista.com Subject: [PATCH] MIPS: Coding style cleanups of access of FCSR rounding mode bits Message-Id: From: Shane McDonald Date: Fri, 07 May 2010 00:02:09 -0600 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26641 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mcdonald.shane@gmail.com Precedence: bulk X-list: linux-mips This patch replaces references to the magic number 0x3 with constants and macros indicating the real purpose of those bits. They are the rounding mode bits of the FCSR register. Signed-off-by: Shane McDonald --- NOTE: This patch depends on the patch "MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1" having already been applied. arch/mips/math-emu/cp1emu.c | 11 ++++++----- 1 files changed, 6 insertions(+), 5 deletions(-) diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c index f2338d1..47842b7 100644 --- a/arch/mips/math-emu/cp1emu.c +++ b/arch/mips/math-emu/cp1emu.c @@ -354,7 +354,8 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) if (MIPSInst_RD(ir) == FPCREG_CSR) { value = ctx->fcr31; - value = (value & ~0x3) | mips_rm[value & 0x3]; + value = (value & ~FPU_CSR_RM) | + mips_rm[modeindex(value)]; #ifdef CSRTRACE printk("%p gpr[%d]<-csr=%08x\n", (void *) (xcp->cp0_epc), @@ -907,7 +908,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, ieee754sp fs; SPFROMREG(fs, MIPSInst_FS(ir)); - ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3]; + ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))]; rv.w = ieee754sp_tint(fs); ieee754_csr.rm = oldrm; rfmt = w_fmt; @@ -933,7 +934,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, ieee754sp fs; SPFROMREG(fs, MIPSInst_FS(ir)); - ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3]; + ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))]; rv.l = ieee754sp_tlong(fs); ieee754_csr.rm = oldrm; rfmt = l_fmt; @@ -1081,7 +1082,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, ieee754dp fs; DPFROMREG(fs, MIPSInst_FS(ir)); - ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3]; + ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))]; rv.w = ieee754dp_tint(fs); ieee754_csr.rm = oldrm; rfmt = w_fmt; @@ -1107,7 +1108,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, ieee754dp fs; DPFROMREG(fs, MIPSInst_FS(ir)); - ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3]; + ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))]; rv.l = ieee754dp_tlong(fs); ieee754_csr.rm = oldrm; rfmt = l_fmt; -- 1.5.6.5 From linux-crypto@ml.breakpoint.cc Fri May 7 10:34:34 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 07 May 2010 10:34:38 +0200 (CEST) Received: from Chamillionaire.breakpoint.cc ([85.10.199.196]:60814 "EHLO Chamillionaire.breakpoint.cc" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491919Ab0EGIed (ORCPT ); Fri, 7 May 2010 10:34:33 +0200 Received: id: bigeasy by Chamillionaire.breakpoint.cc with local (easymta 1.00 BETA 1) id 1OAJ0x-0007iN-0W; Fri, 07 May 2010 10:34:31 +0200 Date: Fri, 7 May 2010 10:34:31 +0200 From: Sebastian Andrzej Siewior To: Manuel Lauss Cc: linux-crypto@vger.kernel.org, Linux-MIPS , Manuel Lauss Subject: Re: [RFC PATCH] crypto: Alchemy AES engine driver Message-ID: <20100507083430.GB29286@Chamillionaire.breakpoint.cc> Reply-To: Sebastian Andrzej Siewior References: <1273161045-21945-1-git-send-email-manuel.lauss@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <1273161045-21945-1-git-send-email-manuel.lauss@gmail.com> X-Key-Id: FE3F4706 X-Key-Fingerprint: FFDA BBBB 3563 1B27 75C9 925B 98D5 5C1C FE3F 4706 User-Agent: Mutt/1.5.20 (2009-06-14) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26642 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: linux-crypto@ml.breakpoint.cc Precedence: bulk X-list: linux-mips * Manuel Lauss | 2010-05-06 17:50:45 [+0200]: A brief look. >lightly "tested" with the tcrypt module on Au1200; I have no idea whether >it really works correctly: > ># modprobe alchemy-aes >alg: skcipher: setkey failed on test 2 for ecb-aes-alchemy: flags=200000 ># modprobe tcrypt mode=10 >alg: skcipher: setkey failed on test 3 for cbc-aes-alchemy: flags=0 >alg: skcipher: Failed to load transform for cbc(aes): -2 >alg: skcipher: Failed to load transform for cbc(aes): -2 >tcrypt: one or more tests failed! >FATAL: Error inserting tcrypt (/lib/modules/2.6.34-rc6-db1200-00214-g9f84af9/kernel/crypto/tcrypt.ko): Unknown symbol in module, or unknown parameter (see dmesg) >The error in "test 3 for cbc-aes-alchemy" probably comes from the inability >to process keys larger than 128 bits. You have to fix this, you have to be able to handle other keys as well. In case your hardware does not support it, you have to handle this in software. Look at the geode driver, via or s390. All of them have fallbacks for. If you fail the self test, you driver will no be used afaik. >Please have a look. > Thanks! > >diff --git a/drivers/crypto/alchemy-aes.c b/drivers/crypto/alchemy-aes.c >new file mode 100644 >index 0000000..14e8ace >--- /dev/null >+++ b/drivers/crypto/alchemy-aes.c >+static int __init alchemy_aes_load(void) >+{ >+ /* FIXME: hier sollte auch noch der PRId des prozessors getestet >+ * werden; Au1210 (0x0503xxxx) und einige Au1300 haben lt. Daten- >+ * blatt keine AES engine. >+ */ You German right? You should handle this in SoC code. So if you figure out, that you have an engine here you add the device. If you don't have it you don't do it and the probe call won't be called. Also the module won't be loaded by udev. >+ /* need to do 8bit accesses to memory to get correct data */ >+ __alchemy_aes_memid = au1xxx_ddma_add_device(&alchemy_aes_mem_dbdev); >+ if (!__alchemy_aes_memid) >+ return -ENODEV; What does it do? You don't want to add devices here. If you need something additional do it in SoC code and pass it via platform_data. >+ >+ return platform_driver_register(&alchemy_aes_driver); >+} >+ Sebastian From ralf@linux-mips.org Fri May 7 15:33:41 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 07 May 2010 15:33:44 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:43782 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491037Ab0EGNdl (ORCPT ); Fri, 7 May 2010 15:33:41 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o47DXZcG019013; Fri, 7 May 2010 14:33:36 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o47DXWTf018990; Fri, 7 May 2010 14:33:32 +0100 Date: Fri, 7 May 2010 14:33:31 +0100 From: Ralf Baechle To: Shane McDonald Cc: anemo@mba.ocn.ne.jp, kevink@paralogos.com, linux-mips@linux-mips.org, sshtylyov@mvista.com Subject: Re: [PATCH v3] MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1 Message-ID: <20100507133331.GA18814@linux-mips.org> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26643 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Thu, May 06, 2010 at 11:26:57PM -0600, Shane McDonald wrote: > In the FPU emulator code of the MIPS, the Cause bits of the FCSR > register are not currently writeable by the ctc1 instruction. > In odd corner cases, this can cause problems. For example, > a case existed where a divide-by-zero exception was generated > by the FPU, and the signal handler attempted to restore the FPU > registers to their state before the exception occurred. In this > particular setup, writing the old value to the FCSR register > would cause another divide-by-zero exception to occur immediately. > The solution is to change the ctc1 instruction emulator code to > allow the Cause bits of the FCSR register to be writeable. > This is the behaviour of the hardware that the code is emulating. > > This problem was found by Shane McDonald, but the credit for the > fix goes to Kevin Kissell. In Kevin's words: > > I submit that the bug is indeed in that ctc_op: case of the emulator. The > Cause bits (17:12) are supposed to be writable by that instruction, but the > CTC1 emulation won't let them be updated by the instruction. I think that > actually if you just completely removed lines 387-388 [...] > things would work a good deal better. At least, it would be a more accurate > emulation of the architecturally defined FPU. If I wanted to be really, > really pedantic (which I sometimes do), I'd also protect the reserved bits > that aren't necessarily writable. Committed a few your ago. Thanks Shane! Ralf From dvomlehn@cisco.com Sat May 8 00:17:12 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 08 May 2010 00:17:19 +0200 (CEST) Received: from sj-iport-1.cisco.com ([171.71.176.70]:58674 "EHLO sj-iport-1.cisco.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492261Ab0EGWRM (ORCPT ); Sat, 8 May 2010 00:17:12 +0200 Authentication-Results: sj-iport-1.cisco.com; dkim=neutral (message not signed) header.i=none X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: AvsEAEUu5EurR7Ht/2dsb2JhbACeHHGmDpk4glEFgj8Eg0I X-IronPort-AV: E=Sophos;i="4.52,350,1270425600"; d="scan'208";a="324111618" Received: from sj-core-1.cisco.com ([171.71.177.237]) by sj-iport-1.cisco.com with ESMTP; 07 May 2010 22:17:02 +0000 Received: from dvomlehn-lnx2.corp.sa.net ([64.101.20.155]) by sj-core-1.cisco.com (8.13.8/8.14.3) with ESMTP id o47MH1j3007812; Fri, 7 May 2010 22:17:01 GMT Date: Fri, 7 May 2010 15:17:02 -0700 From: David VomLehn To: to@dvomlehn-lnx2.corp.sa.net, "linux-mips@linux-mips.org"@cisco.com, linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: [PATCH] Clean up tables for bootmem allocation Message-ID: <20100507221702.GA17837@dvomlehn-lnx2.corp.sa.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.18 (2008-05-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26644 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dvomlehn@cisco.com Precedence: bulk X-list: linux-mips Modifications to the boot memory allocation structures to make them easier to read and maintain. Note that this will not pass checkpatch because it wants a structure element initializer to be enclosed in a do {...} while(...), which is obvious nonsensical. Signed-off-by: David VomLehn --- arch/mips/powertv/asic/prealloc-calliope.c | 675 +++++++++----------------- arch/mips/powertv/asic/prealloc-cronus.c | 670 ++++++++------------------ arch/mips/powertv/asic/prealloc-cronuslite.c | 304 ++++-------- arch/mips/powertv/asic/prealloc-zeus.c | 507 +++++++------------- arch/mips/powertv/asic/prealloc.h | 72 +++ 5 files changed, 767 insertions(+), 1461 deletions(-) diff --git a/arch/mips/powertv/asic/prealloc-calliope.c b/arch/mips/powertv/asic/prealloc-calliope.c old mode 100644 new mode 100755 index cd5b76a..218b0da --- a/arch/mips/powertv/asic/prealloc-calliope.c +++ b/arch/mips/powertv/asic/prealloc-calliope.c @@ -1,4 +1,6 @@ /* + * prealloc-calliope.c + * * Memory pre-allocations for Calliope boxes. * * Copyright (C) 2005-2009 Scientific-Atlanta, Inc. @@ -22,7 +24,9 @@ */ #include +#include #include +#include "prealloc.h" /* * NON_DVR_CAPABLE CALLIOPE RESOURCES @@ -32,432 +36,234 @@ struct resource non_dvr_calliope_resources[] __initdata = /* * VIDEO / LX1 */ - { - .name = "ST231aImage", /* Delta-Mu 1 image and ram */ - .start = 0x24000000, - .end = 0x24200000 - 1, /*2MiB */ - .flags = IORESOURCE_MEM, - }, - { - .name = "ST231aMonitor", /*8KiB block ST231a monitor */ - .start = 0x24200000, - .end = 0x24202000 - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "MediaMemory1", - .start = 0x24202000, - .end = 0x26700000 - 1, /*~36.9MiB (32MiB - (2MiB + 8KiB)) */ - .flags = IORESOURCE_MEM, - }, + /* Delta-Mu 1 image (2MiB) */ + PREALLOC_NORMAL("ST231aImage", 0x24000000, 0x24200000-1, + IORESOURCE_MEM) + /* Delta-Mu 1 monitor (8KiB) */ + PREALLOC_NORMAL("ST231aMonitor", 0x24200000, 0x24202000-1, + IORESOURCE_MEM) + /* Delta-Mu 1 RAM (~36.9MiB (32MiB - (2MiB + 8KiB))) */ + PREALLOC_NORMAL("MediaMemory1", 0x24202000, 0x26700000-1, + IORESOURCE_MEM) + /* * Sysaudio Driver */ - { - .name = "DSP_Image_Buff", - .start = 0x00000000, - .end = 0x000FFFFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_CPU_PCM_Buff", - .start = 0x00000000, - .end = 0x00009FFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_AUX_Buff", - .start = 0x00000000, - .end = 0x00003FFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_Main_Buff", - .start = 0x00000000, - .end = 0x00003FFF, - .flags = IORESOURCE_MEM, - }, + /* DSP code and data images (1MiB) */ + PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC CPU PCM buffer (40KiB) */ + PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC AUX buffer (128KiB) */ + PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00020000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC Main buffer (128KiB) */ + PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00020000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * STAVEM driver/STAPI */ - { - .name = "AVMEMPartition0", - .start = 0x00000000, - .end = 0x00600000 - 1, /* 6 MB total */ - .flags = IORESOURCE_MEM, - }, + /* 6MiB */ + PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00600000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * DOCSIS Subsystem */ - { - .name = "Docsis", - .start = 0x22000000, - .end = 0x22700000 - 1, - .flags = IORESOURCE_MEM, - }, + /* 7MiB */ + PREALLOC_DOCSIS("Docsis", 0x27500000, 0x27c00000-1, IORESOURCE_MEM) + /* * GHW HAL Driver */ - { - .name = "GraphicsHeap", - .start = 0x22700000, - .end = 0x23500000 - 1, /* 14 MB total */ - .flags = IORESOURCE_MEM, - }, + /* PowerTV Graphics Heap (14MiB) */ + PREALLOC_NORMAL("GraphicsHeap", 0x26700000, 0x26700000+(14*1048576)-1, + IORESOURCE_MEM) + /* * multi com buffer area */ - { - .name = "MulticomSHM", - .start = 0x23700000, - .end = 0x23720000 - 1, - .flags = IORESOURCE_MEM, - }, + /* 128KiB */ + PREALLOC_NORMAL("MulticomSHM", 0x23700000, 0x23720000-1, + IORESOURCE_MEM) + /* * DMA Ring buffer (don't need recording buffers) */ - { - .name = "BMM_Buffer", - .start = 0x00000000, - .end = 0x000AA000 - 1, - .flags = IORESOURCE_MEM, - }, + /* 680KiB */ + PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x000AA000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * Display bins buffer for unit0 */ - { - .name = "DisplayBins0", - .start = 0x00000000, - .end = 0x00000FFF, /* 4 KB total */ - .flags = IORESOURCE_MEM, - }, + /* 4KiB */ + PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * * AVFS: player HAL memory - * - * */ - { - .name = "AvfsDmaMem", - .start = 0x00000000, - .end = 0x002c4c00 - 1, /* 945K * 3 for playback */ - .flags = IORESOURCE_MEM, - }, + /* 945K * 3 for playback */ + PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x002c4c00-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * PMEM */ - { - .name = "DiagPersistentMemory", - .start = 0x00000000, - .end = 0x10000 - 1, - .flags = IORESOURCE_MEM, - }, + /* Persistent memory for diagnostics (64KiB) */ + PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * Smartcard */ - { - .name = "SmartCardInfo", - .start = 0x00000000, - .end = 0x2800 - 1, - .flags = IORESOURCE_MEM, - }, + /* Read and write buffers for Internal/External cards (10KiB) */ + PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * NAND Flash */ - { - .name = "NandFlash", - .start = NAND_FLASH_BASE, - .end = NAND_FLASH_BASE + 0x400 - 1, - .flags = IORESOURCE_IO, - }, + /* 10KiB */ + PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1, + IORESOURCE_MEM) + /* * Synopsys GMAC Memory Region */ - { - .name = "GMAC", - .start = 0x00000000, - .end = 0x00010000 - 1, - .flags = IORESOURCE_MEM, - }, + /* 64KiB */ + PREALLOC_NORMAL("GMAC", 0x00000000, 0x00010000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * Add other resources here + * TFTPBuffer * + * This buffer is used in some minimal configurations (e.g. two-way + * loader) for storing software images */ - { }, -}; + PREALLOC_TFTP("TFTPBuffer", 0x00000000, MEBIBYTE(80)-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) -struct resource non_dvr_vz_calliope_resources[] __initdata = -{ /* - * VIDEO / LX1 - */ - { - .name = "ST231aImage", /* Delta-Mu 1 image and ram */ - .start = 0x24000000, - .end = 0x24200000 - 1, /*2 Meg */ - .flags = IORESOURCE_MEM, - }, - { - .name = "ST231aMonitor", /* 8k block ST231a monitor */ - .start = 0x24200000, - .end = 0x24202000 - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "MediaMemory1", - .start = 0x22202000, - .end = 0x22C20B85 - 1, /* 10.12 Meg */ - .flags = IORESOURCE_MEM, - }, - /* - * Sysaudio Driver - */ - { - .name = "DSP_Image_Buff", - .start = 0x00000000, - .end = 0x000FFFFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_CPU_PCM_Buff", - .start = 0x00000000, - .end = 0x00009FFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_AUX_Buff", - .start = 0x00000000, - .end = 0x00003FFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_Main_Buff", - .start = 0x00000000, - .end = 0x00003FFF, - .flags = IORESOURCE_MEM, - }, - /* - * STAVEM driver/STAPI - */ - { - .name = "AVMEMPartition0", - .start = 0x20300000, - .end = 0x20620000-1, /*3.125 MB total */ - .flags = IORESOURCE_MEM, - }, - /* - * GHW HAL Driver - */ - { - .name = "GraphicsHeap", - .start = 0x20100000, - .end = 0x20300000 - 1, - .flags = IORESOURCE_MEM, - }, - /* - * multi com buffer area - */ - { - .name = "MulticomSHM", - .start = 0x23900000, - .end = 0x23920000 - 1, - .flags = IORESOURCE_MEM, - }, - /* - * DMA Ring buffer - */ - { - .name = "BMM_Buffer", - .start = 0x00000000, - .end = 0x000AA000 - 1, - .flags = IORESOURCE_MEM, - }, - /* - * Display bins buffer for unit0 - */ - { - .name = "DisplayBins0", - .start = 0x00000000, - .end = 0x00000FFF, - .flags = IORESOURCE_MEM, - }, - /* - * PMEM - */ - { - .name = "DiagPersistentMemory", - .start = 0x00000000, - .end = 0x10000 - 1, - .flags = IORESOURCE_MEM, - }, - /* - * Smartcard - */ - { - .name = "SmartCardInfo", - .start = 0x00000000, - .end = 0x2800 - 1, - .flags = IORESOURCE_MEM, - }, - /* - * NAND Flash + * Add other resources here */ - { - .name = "NandFlash", - .start = NAND_FLASH_BASE, - .end = NAND_FLASH_BASE+0x400 - 1, - .flags = IORESOURCE_IO, - }, + /* - * Synopsys GMAC Memory Region + * End of Resource marker */ { - .name = "GMAC", - .start = 0x00000000, - .end = 0x00010000 - 1, - .flags = IORESOURCE_MEM, + .flags = 0, }, - /* - * Add other resources here - */ - { }, }; + struct resource non_dvr_vze_calliope_resources[] __initdata = { /* * VIDEO / LX1 */ - { - .name = "ST231aImage", /* Delta-Mu 1 image and ram */ - .start = 0x22000000, - .end = 0x22200000 - 1, /*2 Meg */ - .flags = IORESOURCE_MEM, - }, - { - .name = "ST231aMonitor", /* 8k block ST231a monitor */ - .start = 0x22200000, - .end = 0x22202000 - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "MediaMemory1", - .start = 0x22202000, - .end = 0x22C20B85 - 1, /* 10.12 Meg */ - .flags = IORESOURCE_MEM, - }, + /* Delta-Mu 1 image (2MiB) */ + PREALLOC_NORMAL("ST231aImage", 0x22000000, 0x22200000-1, + IORESOURCE_MEM) + /* Delta-Mu 1 monitor (8KiB) */ + PREALLOC_NORMAL("ST231aMonitor", 0x22200000, 0x22202000-1, + IORESOURCE_MEM) + /* Delta-Mu 1 RAM (10.12MiB) */ + PREALLOC_NORMAL("MediaMemory1", 0x22202000, 0x22C20B85-1, + IORESOURCE_MEM) + /* * Sysaudio Driver */ - { - .name = "DSP_Image_Buff", - .start = 0x00000000, - .end = 0x000FFFFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_CPU_PCM_Buff", - .start = 0x00000000, - .end = 0x00009FFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_AUX_Buff", - .start = 0x00000000, - .end = 0x00003FFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_Main_Buff", - .start = 0x00000000, - .end = 0x00003FFF, - .flags = IORESOURCE_MEM, - }, + /* DSP code and data images (1MiB) */ + PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC CPU PCM buffer (40KiB) */ + PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC AUX buffer (16KiB) */ + PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00004000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC Main buffer (16KiB) */ + PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00004000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * STAVEM driver/STAPI */ - { - .name = "AVMEMPartition0", - .start = 0x20396000, - .end = 0x206B6000 - 1, /* 3.125 MB total */ - .flags = IORESOURCE_MEM, - }, + /* 3.125MiB */ + PREALLOC_NORMAL("AVMEMPartition0", 0x20396000, 0x206B6000-1, + IORESOURCE_MEM) + /* * GHW HAL Driver */ - { - .name = "GraphicsHeap", - .start = 0x20100000, - .end = 0x20396000 - 1, - .flags = IORESOURCE_MEM, - }, + /* PowerTV Graphics Heap (2.59MiB) */ + PREALLOC_NORMAL("GraphicsHeap", 0x20100000, 0x20396000-1, + IORESOURCE_MEM) + /* * multi com buffer area */ - { - .name = "MulticomSHM", - .start = 0x206B6000, - .end = 0x206D6000 - 1, - .flags = IORESOURCE_MEM, - }, + /* 128KiB */ + PREALLOC_NORMAL("MulticomSHM", 0x206B6000, 0x206D6000-1, + IORESOURCE_MEM) + /* - * DMA Ring buffer + * DMA Ring buffer (don't need recording buffers) */ - { - .name = "BMM_Buffer", - .start = 0x00000000, - .end = 0x000AA000 - 1, - .flags = IORESOURCE_MEM, - }, + /* 680KiB */ + PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x000AA000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * Display bins buffer for unit0 */ - { - .name = "DisplayBins0", - .start = 0x00000000, - .end = 0x00000FFF, - .flags = IORESOURCE_MEM, - }, + /* 4KiB */ + PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * PMEM */ - { - .name = "DiagPersistentMemory", - .start = 0x00000000, - .end = 0x10000 - 1, - .flags = IORESOURCE_MEM, - }, + /* Persistent memory for diagnostics (64KiB) */ + PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * Smartcard */ - { - .name = "SmartCardInfo", - .start = 0x00000000, - .end = 0x2800 - 1, - .flags = IORESOURCE_MEM, - }, + /* Read and write buffers for Internal/External cards (10KiB) */ + PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * NAND Flash */ - { - .name = "NandFlash", - .start = NAND_FLASH_BASE, - .end = NAND_FLASH_BASE+0x400 - 1, - .flags = IORESOURCE_MEM, - }, + /* 10KiB */ + PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1, + IORESOURCE_MEM) + /* * Synopsys GMAC Memory Region */ - { - .name = "GMAC", - .start = 0x00000000, - .end = 0x00010000 - 1, - .flags = IORESOURCE_MEM, - }, + /* 64KiB */ + PREALLOC_NORMAL("GMAC", 0x00000000, 0x00010000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * Add other resources here */ - { }, + + /* + * End of Resource marker + */ + { + .flags = 0, + }, }; struct resource non_dvr_vzf_calliope_resources[] __initdata = @@ -465,156 +271,117 @@ struct resource non_dvr_vzf_calliope_resources[] __initdata = /* * VIDEO / LX1 */ - { - .name = "ST231aImage", /*Delta-Mu 1 image and ram */ - .start = 0x24000000, - .end = 0x24200000 - 1, /*2MiB */ - .flags = IORESOURCE_MEM, - }, - { - .name = "ST231aMonitor", /*8KiB block ST231a monitor */ - .start = 0x24200000, - .end = 0x24202000 - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "MediaMemory1", - .start = 0x24202000, - /* ~19.4 (21.5MiB - (2MiB + 8KiB)) */ - .end = 0x25580000 - 1, - .flags = IORESOURCE_MEM, - }, + /* Delta-Mu 1 image (2MiB) */ + PREALLOC_NORMAL("ST231aImage", 0x24000000, 0x24200000-1, + IORESOURCE_MEM) + /* Delta-Mu 1 monitor (8KiB) */ + PREALLOC_NORMAL("ST231aMonitor", 0x24200000, 0x24202000-1, + IORESOURCE_MEM) + /* Delta-Mu 1 RAM (~19.4 (21.5MiB - (2MiB + 8KiB))) */ + PREALLOC_NORMAL("MediaMemory1", 0x24202000, 0x25580000-1, + IORESOURCE_MEM) + /* * Sysaudio Driver */ - { - .name = "DSP_Image_Buff", - .start = 0x00000000, - .end = 0x000FFFFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_CPU_PCM_Buff", - .start = 0x00000000, - .end = 0x00009FFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_AUX_Buff", - .start = 0x00000000, - .end = 0x00003FFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_Main_Buff", - .start = 0x00000000, - .end = 0x00003FFF, - .flags = IORESOURCE_MEM, - }, + /* DSP code and data images (1MiB) */ + PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC CPU PCM buffer (40KiB) */ + PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC AUX buffer (128KiB) */ + PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00020000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC Main buffer (128KiB) */ + PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00020000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * STAVEM driver/STAPI */ - { - .name = "AVMEMPartition0", - .start = 0x00000000, - .end = 0x00480000 - 1, /* 4.5 MB total */ - .flags = IORESOURCE_MEM, - }, + /* 4.5MiB */ + PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00480000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * GHW HAL Driver */ - { - .name = "GraphicsHeap", - .start = 0x22700000, - .end = 0x23500000 - 1, /* 14 MB total */ - .flags = IORESOURCE_MEM, - }, + /* PowerTV Graphics Heap (14MiB) */ + PREALLOC_NORMAL("GraphicsHeap", 0x25600000, 0x25600000+(14*1048576)-1, + IORESOURCE_MEM) + /* * multi com buffer area */ - { - .name = "MulticomSHM", - .start = 0x23700000, - .end = 0x23720000 - 1, - .flags = IORESOURCE_MEM, - }, + /* 128KiB */ + PREALLOC_NORMAL("MulticomSHM", 0x23700000, 0x23720000-1, + IORESOURCE_MEM) + /* * DMA Ring buffer (don't need recording buffers) */ - { - .name = "BMM_Buffer", - .start = 0x00000000, - .end = 0x000AA000 - 1, - .flags = IORESOURCE_MEM, - }, + /* 680KiB */ + PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x000AA000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * Display bins buffer for unit0 */ - { - .name = "DisplayBins0", - .start = 0x00000000, - .end = 0x00000FFF, /* 4 KB total */ - .flags = IORESOURCE_MEM, - }, + /* 4KiB */ + PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * Display bins buffer for unit1 */ - { - .name = "DisplayBins1", - .start = 0x00000000, - .end = 0x00000FFF, /* 4 KB total */ - .flags = IORESOURCE_MEM, - }, + /* 4KiB */ + PREALLOC_NORMAL("DisplayBins1", 0x00000000, 0x00001000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * * AVFS: player HAL memory - * - * */ - { - .name = "AvfsDmaMem", - .start = 0x00000000, - .end = 0x002c4c00 - 1, /* 945K * 3 for playback */ - .flags = IORESOURCE_MEM, - }, + /* 945K * 3 for playback */ + PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x002c4c00-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * PMEM */ - { - .name = "DiagPersistentMemory", - .start = 0x00000000, - .end = 0x10000 - 1, - .flags = IORESOURCE_MEM, - }, + /* Persistent memory for diagnostics (64KiB) */ + PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * Smartcard */ - { - .name = "SmartCardInfo", - .start = 0x00000000, - .end = 0x2800 - 1, - .flags = IORESOURCE_MEM, - }, + /* Read and write buffers for Internal/External cards (10KiB) */ + PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * NAND Flash */ - { - .name = "NandFlash", - .start = NAND_FLASH_BASE, - .end = NAND_FLASH_BASE + 0x400 - 1, - .flags = IORESOURCE_MEM, - }, + /* 10KiB */ + PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1, + IORESOURCE_MEM) + /* * Synopsys GMAC Memory Region */ - { - .name = "GMAC", - .start = 0x00000000, - .end = 0x00010000 - 1, - .flags = IORESOURCE_MEM, - }, + /* 64KiB */ + PREALLOC_NORMAL("GMAC", 0x00000000, 0x00010000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * Add other resources here */ - { }, + + /* + * End of Resource marker + */ + { + .flags = 0, + }, }; diff --git a/arch/mips/powertv/asic/prealloc-cronus.c b/arch/mips/powertv/asic/prealloc-cronus.c old mode 100644 new mode 100755 index 45a5c3e..291f237 --- a/arch/mips/powertv/asic/prealloc-cronus.c +++ b/arch/mips/powertv/asic/prealloc-cronus.c @@ -1,4 +1,6 @@ /* + * prealloc-cronus.c + * * Memory pre-allocations for Cronus boxes. * * Copyright (C) 2005-2009 Scientific-Atlanta, Inc. @@ -22,7 +24,9 @@ */ #include +#include #include +#include "prealloc.h" /* * DVR_CAPABLE CRONUS RESOURCES @@ -30,305 +34,161 @@ struct resource dvr_cronus_resources[] __initdata = { /* - * * VIDEO1 / LX1 - * */ - { - .name = "ST231aImage", /* Delta-Mu 1 image and ram */ - .start = 0x24000000, - .end = 0x241FFFFF, /* 2MiB */ - .flags = IORESOURCE_MEM, - }, - { - .name = "ST231aMonitor", /* 8KiB block ST231a monitor */ - .start = 0x24200000, - .end = 0x24201FFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "MediaMemory1", - .start = 0x24202000, - .end = 0x25FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ - .flags = IORESOURCE_MEM, - }, + /* Delta-Mu 1 image (2MiB) */ + PREALLOC_NORMAL("ST231aImage", 0x24000000, 0x24200000-1, + IORESOURCE_MEM) + /* Delta-Mu 1 monitor (8KiB) */ + PREALLOC_NORMAL("ST231aMonitor", 0x24200000, 0x24202000-1, + IORESOURCE_MEM) + /* Delta-Mu 1 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */ + PREALLOC_NORMAL("MediaMemory1", 0x24202000, 0x26000000-1, + IORESOURCE_MEM) + /* - * * VIDEO2 / LX2 - * */ - { - .name = "ST231bImage", /* Delta-Mu 2 image and ram */ - .start = 0x60000000, - .end = 0x601FFFFF, /* 2MiB */ - .flags = IORESOURCE_IO, - }, - { - .name = "ST231bMonitor", /* 8KiB block ST231b monitor */ - .start = 0x60200000, - .end = 0x60201FFF, - .flags = IORESOURCE_IO, - }, - { - .name = "MediaMemory2", - .start = 0x60202000, - .end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ - .flags = IORESOURCE_IO, - }, + /* Delta-Mu 2 image (2MiB) */ + PREALLOC_NORMAL("ST231bImage", 0x60000000, 0x60200000-1, + IORESOURCE_MEM) + /* Delta-Mu 2 monitor (8KiB) */ + PREALLOC_NORMAL("ST231bMonitor", 0x60200000, 0x60202000-1, + IORESOURCE_MEM) + /* Delta-Mu 2 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */ + PREALLOC_NORMAL("MediaMemory2", 0x60202000, 0x62000000-1, + IORESOURCE_MEM) + /* - * * Sysaudio Driver - * - * This driver requires: - * - * Arbitrary Based Buffers: - * DSP_Image_Buff - DSP code and data images (1MB) - * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB) - * ADSC_AUX_Buff - ADSC AUX buffer (16KB) - * ADSC_Main_Buff - ADSC Main buffer (16KB) - * */ - { - .name = "DSP_Image_Buff", - .start = 0x00000000, - .end = 0x000FFFFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_CPU_PCM_Buff", - .start = 0x00000000, - .end = 0x00009FFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_AUX_Buff", - .start = 0x00000000, - .end = 0x00003FFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_Main_Buff", - .start = 0x00000000, - .end = 0x00003FFF, - .flags = IORESOURCE_MEM, - }, + /* DSP code and data images (1MiB) */ + PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC CPU PCM buffer (40KiB) */ + PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC AUX buffer (128KiB) */ + PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00020000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC Main buffer (128KiB) */ + PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00020000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * * STAVEM driver/STAPI * - * This driver requires: - * - * Arbitrary Based Buffers: * This memory area is used for allocating buffers for Video decoding * purposes. Allocation/De-allocation within this buffer is managed * by the STAVMEM driver of the STAPI. They could be Decimated * Picture Buffers, Intermediate Buffers, as deemed necessary for * video decoding purposes, for any video decoders on Zeus. - * */ - { - .name = "AVMEMPartition0", - .start = 0x63580000, - .end = 0x64180000 - 1, /* 12 MB total */ - .flags = IORESOURCE_IO, - }, + /* 12MiB */ + PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00c00000-1, + IORESOURCE_MEM) + /* - * * DOCSIS Subsystem - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Docsis - - * */ - { - .name = "Docsis", - .start = 0x62000000, - .end = 0x62700000 - 1, /* 7 MB total */ - .flags = IORESOURCE_IO, - }, + /* 7MiB */ + PREALLOC_DOCSIS("Docsis", 0x67500000, 0x67c00000-1, IORESOURCE_MEM) + /* - * * GHW HAL Driver - * - * This driver requires: - * - * Arbitrary Based Buffers: - * GraphicsHeap - PowerTV Graphics Heap - * */ - { - .name = "GraphicsHeap", - .start = 0x62700000, - .end = 0x63500000 - 1, /* 14 MB total */ - .flags = IORESOURCE_IO, - }, + /* PowerTV Graphics Heap (14MiB) */ + PREALLOC_NORMAL("GraphicsHeap", 0x62700000, 0x63500000-1, + IORESOURCE_MEM) + /* - * * multi com buffer area - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Docsis - - * */ - { - .name = "MulticomSHM", - .start = 0x26000000, - .end = 0x26020000 - 1, - .flags = IORESOURCE_MEM, - }, + /* 128KiB */ + PREALLOC_NORMAL("MulticomSHM", 0x26000000, 0x26020000-1, + IORESOURCE_MEM) + /* - * * DMA Ring buffer - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Docsis - - * */ - { - .name = "BMM_Buffer", - .start = 0x00000000, - .end = 0x00280000 - 1, - .flags = IORESOURCE_MEM, - }, + PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x002EA000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * * Display bins buffer for unit0 - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Display Bins for unit0 - * */ - { - .name = "DisplayBins0", - .start = 0x00000000, - .end = 0x00000FFF, /* 4 KB total */ - .flags = IORESOURCE_MEM, - }, + /* 4KiB */ + PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * - * Display bins buffer - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Display Bins for unit1 - * + * Display bins buffer for unit1 */ - { - .name = "DisplayBins1", - .start = 0x64AD4000, - .end = 0x64AD5000 - 1, /* 4 KB total */ - .flags = IORESOURCE_IO, - }, + /* 4KiB */ + PREALLOC_NORMAL("DisplayBins1", 0x00000000, 0x00001000-1, + IORESOURCE_MEM) + /* - * * ITFS - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Docsis - - * */ - { - .name = "ITFS", - .start = 0x64180000, - /* 815,104 bytes each for 2 ITFS partitions. */ - .end = 0x6430DFFF, - .flags = IORESOURCE_IO, - }, + /* 815,104 bytes each for 2 ITFS partitions. */ + PREALLOC_NORMAL("ITFS", 0x00000000, 0x0018E000-1, IORESOURCE_MEM) + /* - * * AVFS - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Docsis - - * */ - { - .name = "AvfsDmaMem", - .start = 0x6430E000, - /* (945K * 8) = (128K *3) 5 playbacks / 3 server */ - .end = 0x64AD0000 - 1, - .flags = IORESOURCE_IO, - }, - { - .name = "AvfsFileSys", - .start = 0x64AD0000, - .end = 0x64AD1000 - 1, /* 4K */ - .flags = IORESOURCE_IO, - }, + /* (945K * 8) = (128K * 3) 5 playbacks / 3 server */ + PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x007c2000-1, + IORESOURCE_MEM) + + /* 4KiB */ + PREALLOC_NORMAL("AvfsFileSys", 0x00000000, 0x00001000-1, + IORESOURCE_MEM) + /* - * * PMEM - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Persistent memory for diagnostics. - * */ - { - .name = "DiagPersistentMemory", - .start = 0x00000000, - .end = 0x10000 - 1, - .flags = IORESOURCE_MEM, - }, + /* Persistent memory for diagnostics (64KiB) */ + PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * * Smartcard - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Read and write buffers for Internal/External cards - * */ - { - .name = "SmartCardInfo", - .start = 0x64AD1000, - .end = 0x64AD3800 - 1, - .flags = IORESOURCE_IO, - }, + /* Read and write buffers for Internal/External cards (10KiB) */ + PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1, + IORESOURCE_MEM) + /* - * * KAVNET - * NP Reset Vector - must be of the form xxCxxxxx - * NP Image - must be video bank 1 - * NP IPC - must be video bank 2 */ - { - .name = "NP_Reset_Vector", - .start = 0x27c00000, - .end = 0x27c01000 - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "NP_Image", - .start = 0x27020000, - .end = 0x27060000 - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "NP_IPC", - .start = 0x63500000, - .end = 0x63580000 - 1, - .flags = IORESOURCE_IO, - }, + /* NP Reset Vector - must be of the form xxCxxxxx (4KiB) */ + PREALLOC_NORMAL("NP_Reset_Vector", 0x27c00000, 0x27c01000-1, + IORESOURCE_MEM) + /* NP Image - must be video bank 1 (320KiB) */ + PREALLOC_NORMAL("NP_Image", 0x27020000, 0x27070000-1, IORESOURCE_MEM) + /* NP IPC - must be video bank 2 (512KiB) */ + PREALLOC_NORMAL("NP_IPC", 0x63500000, 0x63580000-1, IORESOURCE_MEM) + + /* + * TFTPBuffer + * + * This buffer is used in some minimal configurations (e.g. two-way + * loader) for storing software images + */ + PREALLOC_TFTP("TFTPBuffer", 0x00000000, MEBIBYTE(80)-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * Add other resources here */ - { }, + + /* + * End of Resource marker + */ + { + .flags = 0, + }, }; /* @@ -337,272 +197,146 @@ struct resource dvr_cronus_resources[] __initdata = struct resource non_dvr_cronus_resources[] __initdata = { /* - * * VIDEO1 / LX1 - * */ - { - .name = "ST231aImage", /* Delta-Mu 1 image and ram */ - .start = 0x24000000, - .end = 0x241FFFFF, /* 2MiB */ - .flags = IORESOURCE_MEM, - }, - { - .name = "ST231aMonitor", /* 8KiB block ST231a monitor */ - .start = 0x24200000, - .end = 0x24201FFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "MediaMemory1", - .start = 0x24202000, - .end = 0x25FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ - .flags = IORESOURCE_MEM, - }, + /* Delta-Mu 1 image (2MiB) */ + PREALLOC_NORMAL("ST231aImage", 0x24000000, 0x24200000-1, + IORESOURCE_MEM) + /* Delta-Mu 1 monitor (8KiB) */ + PREALLOC_NORMAL("ST231aMonitor", 0x24200000, 0x24202000-1, + IORESOURCE_MEM) + /* Delta-Mu 1 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */ + PREALLOC_NORMAL("MediaMemory1", 0x24202000, 0x26000000-1, + IORESOURCE_MEM) + /* - * * VIDEO2 / LX2 - * */ - { - .name = "ST231bImage", /* Delta-Mu 2 image and ram */ - .start = 0x60000000, - .end = 0x601FFFFF, /* 2MiB */ - .flags = IORESOURCE_IO, - }, - { - .name = "ST231bMonitor", /* 8KiB block ST231b monitor */ - .start = 0x60200000, - .end = 0x60201FFF, - .flags = IORESOURCE_IO, - }, - { - .name = "MediaMemory2", - .start = 0x60202000, - .end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ - .flags = IORESOURCE_IO, - }, + /* Delta-Mu 2 image (2MiB) */ + PREALLOC_NORMAL("ST231bImage", 0x60000000, 0x60200000-1, + IORESOURCE_MEM) + /* Delta-Mu 2 monitor (8KiB) */ + PREALLOC_NORMAL("ST231bMonitor", 0x60200000, 0x60202000-1, + IORESOURCE_MEM) + /* Delta-Mu 2 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */ + PREALLOC_NORMAL("MediaMemory2", 0x60202000, 0x62000000-1, + IORESOURCE_MEM) + /* - * * Sysaudio Driver - * - * This driver requires: - * - * Arbitrary Based Buffers: - * DSP_Image_Buff - DSP code and data images (1MB) - * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB) - * ADSC_AUX_Buff - ADSC AUX buffer (16KB) - * ADSC_Main_Buff - ADSC Main buffer (16KB) - * */ - { - .name = "DSP_Image_Buff", - .start = 0x00000000, - .end = 0x000FFFFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_CPU_PCM_Buff", - .start = 0x00000000, - .end = 0x00009FFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_AUX_Buff", - .start = 0x00000000, - .end = 0x00003FFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_Main_Buff", - .start = 0x00000000, - .end = 0x00003FFF, - .flags = IORESOURCE_MEM, - }, + /* DSP code and data images (1MiB) */ + PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC CPU PCM buffer (40KiB) */ + PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC AUX buffer (128KiB) */ + PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00020000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC Main buffer (128KiB) */ + PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00020000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * * STAVEM driver/STAPI * - * This driver requires: - * - * Arbitrary Based Buffers: * This memory area is used for allocating buffers for Video decoding * purposes. Allocation/De-allocation within this buffer is managed * by the STAVMEM driver of the STAPI. They could be Decimated * Picture Buffers, Intermediate Buffers, as deemed necessary for * video decoding purposes, for any video decoders on Zeus. - * */ - { - .name = "AVMEMPartition0", - .start = 0x63580000, - .end = 0x64180000 - 1, /* 12 MB total */ - .flags = IORESOURCE_IO, - }, + /* 12MiB */ + PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00c00000-1, + IORESOURCE_MEM) + /* - * * DOCSIS Subsystem - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Docsis - - * */ - { - .name = "Docsis", - .start = 0x62000000, - .end = 0x62700000 - 1, /* 7 MB total */ - .flags = IORESOURCE_IO, - }, + /* 7MiB */ + PREALLOC_DOCSIS("Docsis", 0x67500000, 0x67c00000-1, IORESOURCE_MEM) + /* - * * GHW HAL Driver - * - * This driver requires: - * - * Arbitrary Based Buffers: - * GraphicsHeap - PowerTV Graphics Heap - * */ - { - .name = "GraphicsHeap", - .start = 0x62700000, - .end = 0x63500000 - 1, /* 14 MB total */ - .flags = IORESOURCE_IO, - }, + /* PowerTV Graphics Heap (14MiB) */ + PREALLOC_NORMAL("GraphicsHeap", 0x62700000, 0x63500000-1, + IORESOURCE_MEM) + /* - * * multi com buffer area - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Docsis - - * */ - { - .name = "MulticomSHM", - .start = 0x26000000, - .end = 0x26020000 - 1, - .flags = IORESOURCE_MEM, - }, + /* 128KiB */ + PREALLOC_NORMAL("MulticomSHM", 0x26000000, 0x26020000-1, + IORESOURCE_MEM) + /* - * - * DMA Ring buffer - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Docsis - - * + * DMA Ring buffer (don't need recording buffers) */ - { - .name = "BMM_Buffer", - .start = 0x00000000, - .end = 0x000AA000 - 1, - .flags = IORESOURCE_MEM, - }, + /* 680KiB */ + PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x000AA000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * * Display bins buffer for unit0 - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Display Bins for unit0 - * */ - { - .name = "DisplayBins0", - .start = 0x00000000, - .end = 0x00000FFF, /* 4 KB total */ - .flags = IORESOURCE_MEM, - }, + /* 4KiB */ + PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * - * Display bins buffer - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Display Bins for unit1 - * + * Display bins buffer for unit1 */ - { - .name = "DisplayBins1", - .start = 0x64AD4000, - .end = 0x64AD5000 - 1, /* 4 KB total */ - .flags = IORESOURCE_IO, - }, + /* 4KiB */ + PREALLOC_NORMAL("DisplayBins1", 0x00000000, 0x00001000-1, + IORESOURCE_MEM) + /* - * * AVFS: player HAL memory - * - * */ - { - .name = "AvfsDmaMem", - .start = 0x6430E000, - .end = 0x645D2C00 - 1, /* 945K * 3 for playback */ - .flags = IORESOURCE_IO, - }, + /* 945K * 3 for playback */ + PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x002c4c00-1, IORESOURCE_MEM) + /* - * * PMEM - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Persistent memory for diagnostics. - * */ - { - .name = "DiagPersistentMemory", - .start = 0x00000000, - .end = 0x10000 - 1, - .flags = IORESOURCE_MEM, - }, + /* Persistent memory for diagnostics (64KiB) */ + PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * * Smartcard - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Read and write buffers for Internal/External cards - * */ - { - .name = "SmartCardInfo", - .start = 0x64AD1000, - .end = 0x64AD3800 - 1, - .flags = IORESOURCE_IO, - }, + /* Read and write buffers for Internal/External cards (10KiB) */ + PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1, IORESOURCE_MEM) + /* - * * KAVNET - * NP Reset Vector - must be of the form xxCxxxxx - * NP Image - must be video bank 1 - * NP IPC - must be video bank 2 + */ + /* NP Reset Vector - must be of the form xxCxxxxx (4KiB) */ + PREALLOC_NORMAL("NP_Reset_Vector", 0x27c00000, 0x27c01000-1, + IORESOURCE_MEM) + /* NP Image - must be video bank 1 (320KiB) */ + PREALLOC_NORMAL("NP_Image", 0x27020000, 0x27070000-1, IORESOURCE_MEM) + /* NP IPC - must be video bank 2 (512KiB) */ + PREALLOC_NORMAL("NP_IPC", 0x63500000, 0x63580000-1, IORESOURCE_MEM) + + /* + * NAND Flash + */ + /* 10KiB */ + PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1, + IORESOURCE_MEM) + + /* + * Add other resources here + */ + + /* + * End of Resource marker */ { - .name = "NP_Reset_Vector", - .start = 0x27c00000, - .end = 0x27c01000 - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "NP_Image", - .start = 0x27020000, - .end = 0x27060000 - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "NP_IPC", - .start = 0x63500000, - .end = 0x63580000 - 1, - .flags = IORESOURCE_IO, + .flags = 0, }, - { }, }; diff --git a/arch/mips/powertv/asic/prealloc-cronuslite.c b/arch/mips/powertv/asic/prealloc-cronuslite.c old mode 100644 new mode 100755 index 23a9056..1e7419d --- a/arch/mips/powertv/asic/prealloc-cronuslite.c +++ b/arch/mips/powertv/asic/prealloc-cronuslite.c @@ -1,4 +1,6 @@ /* + * prealloc-cronuslite.c + * * Memory pre-allocations for Cronus Lite boxes. * * Copyright (C) 2005-2009 Scientific-Atlanta, Inc. @@ -22,7 +24,9 @@ */ #include +#include #include +#include "prealloc.h" /* * NON_DVR_CAPABLE CRONUSLITE RESOURCES @@ -30,261 +34,143 @@ struct resource non_dvr_cronuslite_resources[] __initdata = { /* - * * VIDEO2 / LX2 - * */ - { - .name = "ST231aImage", /* Delta-Mu 2 image and ram */ - .start = 0x60000000, - .end = 0x601FFFFF, /* 2MiB */ - .flags = IORESOURCE_IO, - }, - { - .name = "ST231aMonitor", /* 8KiB block ST231b monitor */ - .start = 0x60200000, - .end = 0x60201FFF, - .flags = IORESOURCE_IO, - }, - { - .name = "MediaMemory1", - .start = 0x60202000, - .end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ - .flags = IORESOURCE_IO, - }, + /* Delta-Mu 1 image (2MiB) */ + PREALLOC_NORMAL("ST231aImage", 0x60000000, 0x60200000-1, + IORESOURCE_MEM) + /* Delta-Mu 1 monitor (8KiB) */ + PREALLOC_NORMAL("ST231aMonitor", 0x60200000, 0x60202000-1, + IORESOURCE_MEM) + /* Delta-Mu 1 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */ + PREALLOC_NORMAL("MediaMemory1", 0x60202000, 0x62000000-1, + IORESOURCE_MEM) + /* - * * Sysaudio Driver - * - * This driver requires: - * - * Arbitrary Based Buffers: - * DSP_Image_Buff - DSP code and data images (1MB) - * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB) - * ADSC_AUX_Buff - ADSC AUX buffer (16KB) - * ADSC_Main_Buff - ADSC Main buffer (16KB) - * */ - { - .name = "DSP_Image_Buff", - .start = 0x00000000, - .end = 0x000FFFFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_CPU_PCM_Buff", - .start = 0x00000000, - .end = 0x00009FFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_AUX_Buff", - .start = 0x00000000, - .end = 0x00003FFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_Main_Buff", - .start = 0x00000000, - .end = 0x00003FFF, - .flags = IORESOURCE_MEM, - }, + /* DSP code and data images (1MiB) */ + PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC CPU PCM buffer (40KiB) */ + PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC AUX buffer (128KiB) */ + PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00020000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC Main buffer (128KiB) */ + PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00020000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * * STAVEM driver/STAPI * - * This driver requires: - * - * Arbitrary Based Buffers: * This memory area is used for allocating buffers for Video decoding * purposes. Allocation/De-allocation within this buffer is managed * by the STAVMEM driver of the STAPI. They could be Decimated * Picture Buffers, Intermediate Buffers, as deemed necessary for * video decoding purposes, for any video decoders on Zeus. - * */ - { - .name = "AVMEMPartition0", - .start = 0x63580000, - .end = 0x63B80000 - 1, /* 6 MB total */ - .flags = IORESOURCE_IO, - }, + /* 6MiB */ + PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00600000-1, + IORESOURCE_MEM) + /* - * * DOCSIS Subsystem - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Docsis - - * */ - { - .name = "Docsis", - .start = 0x62000000, - .end = 0x62700000 - 1, /* 7 MB total */ - .flags = IORESOURCE_IO, - }, + /* 7MiB */ + PREALLOC_DOCSIS("Docsis", 0x67500000, 0x67c00000-1, IORESOURCE_MEM) + /* - * * GHW HAL Driver - * - * This driver requires: - * - * Arbitrary Based Buffers: - * GraphicsHeap - PowerTV Graphics Heap - * */ - { - .name = "GraphicsHeap", - .start = 0x62700000, - .end = 0x63500000 - 1, /* 14 MB total */ - .flags = IORESOURCE_IO, - }, + /* PowerTV Graphics Heap (14MiB) */ + PREALLOC_NORMAL("GraphicsHeap", 0x62700000, 0x63500000-1, + IORESOURCE_MEM) + /* - * * multi com buffer area - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Docsis - - * */ - { - .name = "MulticomSHM", - .start = 0x26000000, - .end = 0x26020000 - 1, - .flags = IORESOURCE_MEM, - }, + /* 128KiB */ + PREALLOC_NORMAL("MulticomSHM", 0x26000000, 0x26020000-1, + IORESOURCE_MEM) + /* - * - * DMA Ring buffer - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Docsis - - * + * DMA Ring buffer (don't need recording buffers) */ - { - .name = "BMM_Buffer", - .start = 0x00000000, - .end = 0x000AA000 - 1, - .flags = IORESOURCE_MEM, - }, + /* 680KiB */ + PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x000AA000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * * Display bins buffer for unit0 - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Display Bins for unit0 - * */ - { - .name = "DisplayBins0", - .start = 0x00000000, - .end = 0x00000FFF, /* 4 KB total */ - .flags = IORESOURCE_MEM, - }, + /* 4KiB */ + PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * - * Display bins buffer - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Display Bins for unit1 - * + * Display bins buffer for unit1 */ - { - .name = "DisplayBins1", - .start = 0x63B83000, - .end = 0x63B84000 - 1, /* 4 KB total */ - .flags = IORESOURCE_IO, - }, + /* 4KiB */ + PREALLOC_NORMAL("DisplayBins1", 0x00000000, 0x00001000-1, + IORESOURCE_MEM) + /* - * * AVFS: player HAL memory - * - * */ - { - .name = "AvfsDmaMem", - .start = 0x63B84000, - .end = 0x63E48C00 - 1, /* 945K * 3 for playback */ - .flags = IORESOURCE_IO, - }, + /* 945K * 3 for playback */ + PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x002c4c00-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * * PMEM - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Persistent memory for diagnostics. - * */ - { - .name = "DiagPersistentMemory", - .start = 0x00000000, - .end = 0x10000 - 1, - .flags = IORESOURCE_MEM, - }, + /* Persistent memory for diagnostics (64KiB) */ + PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * * Smartcard - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Read and write buffers for Internal/External cards - * */ - { - .name = "SmartCardInfo", - .start = 0x63B80000, - .end = 0x63B82800 - 1, - .flags = IORESOURCE_IO, - }, + /* Read and write buffers for Internal/External cards (10KiB) */ + PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1, IORESOURCE_MEM) + /* - * * KAVNET - * NP Reset Vector - must be of the form xxCxxxxx - * NP Image - must be video bank 1 - * NP IPC - must be video bank 2 */ - { - .name = "NP_Reset_Vector", - .start = 0x27c00000, - .end = 0x27c01000 - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "NP_Image", - .start = 0x27020000, - .end = 0x27060000 - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "NP_IPC", - .start = 0x63500000, - .end = 0x63580000 - 1, - .flags = IORESOURCE_IO, - }, + /* NP Reset Vector - must be of the form xxCxxxxx (4KiB) */ + PREALLOC_NORMAL("NP_Reset_Vector", 0x27c00000, 0x27c01000-1, + IORESOURCE_MEM) + /* NP Image - must be video bank 1 (320KiB) */ + PREALLOC_NORMAL("NP_Image", 0x27020000, 0x27070000-1, IORESOURCE_MEM) + /* NP IPC - must be video bank 2 (512KiB) */ + PREALLOC_NORMAL("NP_IPC", 0x63500000, 0x63580000-1, IORESOURCE_MEM) + /* * NAND Flash */ - { - .name = "NandFlash", - .start = NAND_FLASH_BASE, - .end = NAND_FLASH_BASE + 0x400 - 1, - .flags = IORESOURCE_IO, - }, + /* 10KiB */ + PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1, + IORESOURCE_MEM) + + /* + * TFTPBuffer + * + * This buffer is used in some minimal configurations (e.g. two-way + * loader) for storing software images + */ + PREALLOC_TFTP("TFTPBuffer", 0x00000000, MEBIBYTE(80)-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * Add other resources here */ - { }, + + /* + * End of Resource marker + */ + { + .flags = 0, + }, }; diff --git a/arch/mips/powertv/asic/prealloc-zeus.c b/arch/mips/powertv/asic/prealloc-zeus.c old mode 100644 new mode 100755 index 018d451..4333572 --- a/arch/mips/powertv/asic/prealloc-zeus.c +++ b/arch/mips/powertv/asic/prealloc-zeus.c @@ -1,4 +1,6 @@ /* + * prealloc-zeus.c + * * Memory pre-allocations for Zeus boxes. * * Copyright (C) 2005-2009 Scientific-Atlanta, Inc. @@ -22,7 +24,9 @@ */ #include +#include #include +#include "prealloc.h" /* * DVR_CAPABLE RESOURCES @@ -30,280 +34,151 @@ struct resource dvr_zeus_resources[] __initdata = { /* - * * VIDEO1 / LX1 - * */ - { - .name = "ST231aImage", /* Delta-Mu 1 image and ram */ - .start = 0x20000000, - .end = 0x201FFFFF, /* 2MiB */ - .flags = IORESOURCE_IO, - }, - { - .name = "ST231aMonitor", /* 8KiB block ST231a monitor */ - .start = 0x20200000, - .end = 0x20201FFF, - .flags = IORESOURCE_IO, - }, - { - .name = "MediaMemory1", - .start = 0x20202000, - .end = 0x21FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ - .flags = IORESOURCE_IO, - }, + /* Delta-Mu 1 image (2MiB) */ + PREALLOC_NORMAL("ST231aImage", 0x20000000, 0x20200000-1, + IORESOURCE_MEM) + /* Delta-Mu 1 monitor (8KiB) */ + PREALLOC_NORMAL("ST231aMonitor", 0x20200000, 0x20202000-1, + IORESOURCE_MEM) + /* Delta-Mu 1 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */ + PREALLOC_NORMAL("MediaMemory1", 0x20202000, 0x22000000-1, + IORESOURCE_MEM) + /* - * * VIDEO2 / LX2 - * */ - { - .name = "ST231bImage", /* Delta-Mu 2 image and ram */ - .start = 0x30000000, - .end = 0x301FFFFF, /* 2MiB */ - .flags = IORESOURCE_IO, - }, - { - .name = "ST231bMonitor", /* 8KiB block ST231b monitor */ - .start = 0x30200000, - .end = 0x30201FFF, - .flags = IORESOURCE_IO, - }, - { - .name = "MediaMemory2", - .start = 0x30202000, - .end = 0x31FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ - .flags = IORESOURCE_IO, - }, + /* Delta-Mu 2 image (2MiB) */ + PREALLOC_NORMAL("ST231bImage", 0x30000000, 0x30200000-1, + IORESOURCE_MEM) + /* Delta-Mu 2 monitor (8KiB) */ + PREALLOC_NORMAL("ST231bMonitor", 0x30200000, 0x30202000-1, + IORESOURCE_MEM) + /* Delta-Mu 2 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */ + PREALLOC_NORMAL("MediaMemory2", 0x30202000, 0x32000000-1, + IORESOURCE_MEM) + /* - * * Sysaudio Driver - * - * This driver requires: - * - * Arbitrary Based Buffers: - * DSP_Image_Buff - DSP code and data images (1MB) - * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB) - * ADSC_AUX_Buff - ADSC AUX buffer (16KB) - * ADSC_Main_Buff - ADSC Main buffer (16KB) - * */ - { - .name = "DSP_Image_Buff", - .start = 0x00000000, - .end = 0x000FFFFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_CPU_PCM_Buff", - .start = 0x00000000, - .end = 0x00009FFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_AUX_Buff", - .start = 0x00000000, - .end = 0x00003FFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_Main_Buff", - .start = 0x00000000, - .end = 0x00003FFF, - .flags = IORESOURCE_MEM, - }, + /* DSP code and data images (1MiB) */ + PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC CPU PCM buffer (40KiB) */ + PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC AUX buffer (16KiB) */ + PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00004000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC Main buffer (16KiB) */ + PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00004000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * * STAVEM driver/STAPI * - * This driver requires: - * - * Arbitrary Based Buffers: * This memory area is used for allocating buffers for Video decoding * purposes. Allocation/De-allocation within this buffer is managed * by the STAVMEM driver of the STAPI. They could be Decimated * Picture Buffers, Intermediate Buffers, as deemed necessary for * video decoding purposes, for any video decoders on Zeus. - * */ - { - .name = "AVMEMPartition0", - .start = 0x00000000, - .end = 0x00c00000 - 1, /* 12 MB total */ - .flags = IORESOURCE_MEM, - }, + /* 12MiB */ + PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00c00000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * * DOCSIS Subsystem - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Docsis - - * */ - { - .name = "Docsis", - .start = 0x40100000, - .end = 0x407fffff, - .flags = IORESOURCE_MEM, - }, + /* 7MiB */ + PREALLOC_DOCSIS("Docsis", 0x40100000, 0x40800000-1, IORESOURCE_MEM) + /* - * * GHW HAL Driver - * - * This driver requires: - * - * Arbitrary Based Buffers: - * GraphicsHeap - PowerTV Graphics Heap - * */ - { - .name = "GraphicsHeap", - .start = 0x46900000, - .end = 0x47700000 - 1, /* 14 MB total */ - .flags = IORESOURCE_MEM, - }, + /* PowerTV Graphics Heap (14MiB) */ + PREALLOC_NORMAL("GraphicsHeap", 0x46900000, 0x47700000-1, + IORESOURCE_MEM) + /* - * * multi com buffer area - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Docsis - - * */ - { - .name = "MulticomSHM", - .start = 0x47900000, - .end = 0x47920000 - 1, - .flags = IORESOURCE_MEM, - }, + /* 128KiB */ + PREALLOC_NORMAL("MulticomSHM", 0x47900000, 0x47920000-1, + IORESOURCE_MEM) + /* - * * DMA Ring buffer - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Docsis - - * */ - { - .name = "BMM_Buffer", - .start = 0x00000000, - .end = 0x00280000 - 1, - .flags = IORESOURCE_MEM, - }, + /* 2.5MiB */ + PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x00280000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * * Display bins buffer for unit0 - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Display Bins for unit0 - * */ - { - .name = "DisplayBins0", - .start = 0x00000000, - .end = 0x00000FFF, /* 4 KB total */ - .flags = IORESOURCE_MEM, - }, + /* 4KiB */ + PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * - * Display bins buffer - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Display Bins for unit1 - * + * Display bins buffer for unit1 */ - { - .name = "DisplayBins1", - .start = 0x00000000, - .end = 0x00000FFF, /* 4 KB total */ - .flags = IORESOURCE_MEM, - }, + /* 4KiB */ + PREALLOC_NORMAL("DisplayBins1", 0x00000000, 0x00001000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * * ITFS - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Docsis - - * */ - { - .name = "ITFS", - .start = 0x00000000, - /* 815,104 bytes each for 2 ITFS partitions. */ - .end = 0x0018DFFF, - .flags = IORESOURCE_MEM, - }, + /* 815,104 bytes each for 2 ITFS partitions. */ + PREALLOC_NORMAL("ITFS", 0x00000000, 0x0018E000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * * AVFS - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Docsis - - * */ - { - .name = "AvfsDmaMem", - .start = 0x00000000, - /* (945K * 8) = (128K * 3) 5 playbacks / 3 server */ - .end = 0x007c2000 - 1, - .flags = IORESOURCE_MEM, - }, - { - .name = "AvfsFileSys", - .start = 0x00000000, - .end = 0x00001000 - 1, /* 4K */ - .flags = IORESOURCE_MEM, - }, + /* (945K * 8) = (128K * 3) 5 playbacks / 3 server */ + PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x007c2000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* 4KiB */ + PREALLOC_NORMAL("AvfsFileSys", 0x00000000, 0x00001000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * * PMEM - * - * This driver requires: - * - * Arbitrary Based Buffers: - * Persistent memory for diagnostics. - * */ - { - .name = "DiagPersistentMemory", - .start = 0x00000000, - .end = 0x10000 - 1, - .flags = IORESOURCE_MEM, - }, + /* Persistent memory for diagnostics (64KiB) */ + PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * * Smartcard + */ + /* Read and write buffers for Internal/External cards (10KiB) */ + PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + + /* + * TFTPBuffer * - * This driver requires: - * - * Arbitrary Based Buffers: - * Read and write buffers for Internal/External cards - * + * This buffer is used in some minimal configurations (e.g. two-way + * loader) for storing software images */ - { - .name = "SmartCardInfo", - .start = 0x00000000, - .end = 0x2800 - 1, - .flags = IORESOURCE_MEM, - }, + PREALLOC_TFTP("TFTPBuffer", 0x00000000, MEBIBYTE(80)-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * Add other resources here */ - { }, + + /* + * End of Resource marker + */ + { + .flags = 0, + }, }; /* @@ -314,146 +189,118 @@ struct resource non_dvr_zeus_resources[] __initdata = /* * VIDEO1 / LX1 */ - { - .name = "ST231aImage", /* Delta-Mu 1 image and ram */ - .start = 0x20000000, - .end = 0x201FFFFF, /* 2MiB */ - .flags = IORESOURCE_IO, - }, - { - .name = "ST231aMonitor", /* 8KiB block ST231a monitor */ - .start = 0x20200000, - .end = 0x20201FFF, - .flags = IORESOURCE_IO, - }, - { - .name = "MediaMemory1", - .start = 0x20202000, - .end = 0x21FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ - .flags = IORESOURCE_IO, - }, + /* Delta-Mu 1 image (2MiB) */ + PREALLOC_NORMAL("ST231aImage", 0x20000000, 0x20200000-1, + IORESOURCE_MEM) + /* Delta-Mu 1 monitor (8KiB) */ + PREALLOC_NORMAL("ST231aMonitor", 0x20200000, 0x20202000-1, + IORESOURCE_MEM) + /* Delta-Mu 1 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */ + PREALLOC_NORMAL("MediaMemory1", 0x20202000, 0x22000000-1, + IORESOURCE_MEM) + /* * Sysaudio Driver */ - { - .name = "DSP_Image_Buff", - .start = 0x00000000, - .end = 0x000FFFFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_CPU_PCM_Buff", - .start = 0x00000000, - .end = 0x00009FFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_AUX_Buff", - .start = 0x00000000, - .end = 0x00003FFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "ADSC_Main_Buff", - .start = 0x00000000, - .end = 0x00003FFF, - .flags = IORESOURCE_MEM, - }, + /* DSP code and data images (1MiB) */ + PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC CPU PCM buffer (40KiB) */ + PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC AUX buffer (16KiB) */ + PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00004000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* ADSC Main buffer (16KiB) */ + PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00004000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * STAVEM driver/STAPI */ - { - .name = "AVMEMPartition0", - .start = 0x00000000, - .end = 0x00600000 - 1, /* 6 MB total */ - .flags = IORESOURCE_MEM, - }, + /* 6MiB */ + PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00600000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * DOCSIS Subsystem */ - { - .name = "Docsis", - .start = 0x40100000, - .end = 0x407fffff, - .flags = IORESOURCE_MEM, - }, + /* 7MiB */ + PREALLOC_DOCSIS("Docsis", 0x40100000, 0x40800000-1, IORESOURCE_MEM) + /* * GHW HAL Driver */ - { - .name = "GraphicsHeap", - .start = 0x46900000, - .end = 0x47700000 - 1, /* 14 MB total */ - .flags = IORESOURCE_MEM, - }, + /* PowerTV Graphics Heap (14MiB) */ + PREALLOC_NORMAL("GraphicsHeap", 0x46900000, 0x47700000-1, + IORESOURCE_MEM) + /* * multi com buffer area */ - { - .name = "MulticomSHM", - .start = 0x47900000, - .end = 0x47920000 - 1, - .flags = IORESOURCE_MEM, - }, + /* 128KiB */ + PREALLOC_NORMAL("MulticomSHM", 0x47900000, 0x47920000-1, + IORESOURCE_MEM) + /* * DMA Ring buffer */ - { - .name = "BMM_Buffer", - .start = 0x00000000, - .end = 0x00280000 - 1, - .flags = IORESOURCE_MEM, - }, + /* 2.5MiB */ + PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x00280000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * Display bins buffer for unit0 */ - { - .name = "DisplayBins0", - .start = 0x00000000, - .end = 0x00000FFF, /* 4 KB total */ - .flags = IORESOURCE_MEM, - }, + /* 4KiB */ + PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* - * * AVFS: player HAL memory - * - * */ - { - .name = "AvfsDmaMem", - .start = 0x00000000, - .end = 0x002c4c00 - 1, /* 945K * 3 for playback */ - .flags = IORESOURCE_MEM, - }, + /* 945K * 3 for playback */ + PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x002c4c00-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * PMEM */ - { - .name = "DiagPersistentMemory", - .start = 0x00000000, - .end = 0x10000 - 1, - .flags = IORESOURCE_MEM, - }, + /* Persistent memory for diagnostics (64KiB) */ + PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * Smartcard */ - { - .name = "SmartCardInfo", - .start = 0x00000000, - .end = 0x2800 - 1, - .flags = IORESOURCE_MEM, - }, + /* Read and write buffers for Internal/External cards (10KiB) */ + PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * NAND Flash */ - { - .name = "NandFlash", - .start = NAND_FLASH_BASE, - .end = NAND_FLASH_BASE + 0x400 - 1, - .flags = IORESOURCE_IO, - }, + /* 10KiB */ + PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1, + IORESOURCE_MEM) + + /* + * TFTPBuffer + * + * This buffer is used in some minimal configurations (e.g. two-way + * loader) for storing software images + */ + PREALLOC_TFTP("TFTPBuffer", 0x00000000, MEBIBYTE(80)-1, + (IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT)) + /* * Add other resources here */ - { }, + + /* + * End of Resource marker + */ + { + .flags = 0, + }, }; diff --git a/arch/mips/powertv/asic/prealloc.h b/arch/mips/powertv/asic/prealloc.h new file mode 100755 index 0000000..bc9588b --- /dev/null +++ b/arch/mips/powertv/asic/prealloc.h @@ -0,0 +1,72 @@ +/* + * prealloc.h + * + * Definitions for memory preallocations + * + * Copyright (C) 2005-2009 Scientific-Atlanta, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _ARCH_MIPS_POWERTV_ASIC_PREALLOC_H +#define _ARCH_MIPS_POWERTV_ASIC_PREALLOC_H + +#define KIBIBYTE(n) ((n) * 1024) /* Number of kibibytes */ +#define MEBIBYTE(n) ((n) * KIBIBYTE(1024)) /* Number of mebibytes */ + +/* "struct resource" array element definition */ +#define PREALLOC(NAME, START, END, FLAGS) { \ + .name = (NAME), \ + .start = (START), \ + .end = (END), \ + .flags = (FLAGS) \ + }, + +/* Individual resources in the preallocated resource arrays are defined using + * macros. These macros are conditionally defined based on their + * corresponding kernel configuration flag: + * - CONFIG_PREALLOC_NORMAL: preallocate resources for a normal settop box + * - CONFIG_PREALLOC_TFTP: preallocate the TFTP download resource + * - CONFIG_PREALLOC_DOCSIS: preallocate the DOCSIS resource + * - CONFIG_PREALLOC_PMEM: reserve space for persistent memory + */ +#ifdef CONFIG_PREALLOC_NORMAL +#define PREALLOC_NORMAL(name, start, end, flags) \ + PREALLOC(name, start, end, flags) +#else +#define PREALLOC_NORMAL(name, start, end, flags) +#endif + +#ifdef CONFIG_PREALLOC_TFTP +#define PREALLOC_TFTP(name, start, end, flags) \ + PREALLOC(name, start, end, flags) +#else +#define PREALLOC_TFTP(name, start, end, flags) +#endif + +#ifdef CONFIG_PREALLOC_DOCSIS +#define PREALLOC_DOCSIS(name, start, end, flags) \ + PREALLOC(name, start, end, flags) +#else +#define PREALLOC_DOCSIS(name, start, end, flags) +#endif + +#ifdef CONFIG_PREALLOC_PMEM +#define PREALLOC_PMEM(name, start, end, flags) \ + PREALLOC(name, start, end, flags) +#else +#define PREALLOC_PMEM(name, start, end, flags) +#endif +#endif From anemo@mba.ocn.ne.jp Sat May 8 18:46:11 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 08 May 2010 18:46:16 +0200 (CEST) Received: from mv-drv-hcb004.ocn.ad.jp ([118.23.109.134]:42036 "EHLO mv-drv-hcb004.ocn.ad.jp" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491868Ab0EHQqL (ORCPT ); Sat, 8 May 2010 18:46:11 +0200 Received: from vcmba.ocn.ne.jp (localhost.localdomain [127.0.0.1]) by mv-drv-hcb004.ocn.ad.jp (Postfix) with ESMTP id 07C7E1B402E; Sun, 9 May 2010 01:46:04 +0900 (JST) Received: from localhost (softbank221040169135.bbtec.net [221.40.169.135]) by vcmba.ocn.ne.jp (Postfix) with ESMTP; Sun, 9 May 2010 01:46:03 +0900 (JST) Date: Sun, 09 May 2010 01:46:02 +0900 (JST) Message-Id: <20100509.014602.173372140.anemo@mba.ocn.ne.jp> To: kevink@paralogos.com Cc: ralf@linux-mips.org, mcdonald.shane@gmail.com, linux-mips@linux-mips.org Subject: Re: [MIPS] FPU emulator: allow Cause bits of FCSR to be writeable by ctc1 From: Atsushi Nemoto In-Reply-To: <4BE1C4EA.1020202@paralogos.com> References: <4BE19214.4010209@paralogos.com> <20100506.012240.118951273.anemo@mba.ocn.ne.jp> <4BE1C4EA.1020202@paralogos.com> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 22.2 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26645 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Wed, 05 May 2010 12:20:10 -0700, "Kevin D. Kissell" wrote: > > Yes, that's my patch. Though I cannot remember precisely, maybe I > > just had (mis)thought Cause bits in FCSR are read-only at that time. > > I have never used real SMP MIPS platforms, so there must be no > > SMP-related issues. > > > The patch was labeled for "preemption and SMP problems", and if you > weren't working on an SMP system, I'd guess that you were working with > full preemption and seeing a problem that you might have assumed was > also relevant to SMP. The FPU emulator *shouldn't* have pre-emption > issues, since it works off of data structures that are instantiated per > thread context. The FCSR seen by thread A is logically independent of > that seen by thread B, so that even if one emulation was preempted in > the middle by another, they shouldn't be able to interfere with one > another. That was the concept, anyway. Yes, I created the patch for full preemption support. At that time, ieee754_csr was a global variable, not an alias of current->thread.fpu.soft.fcr31. The commmit 72402e was mixture of two patch: "just make FPU emulator fully-preemptive" and "fix FPU ownership issues on preemption". The wrong code is a part of the first one. So I don't think your fix causes any regressions on SMP/preemption point of view. I'm still trying to remember why I masked out some bits on CTC1 emulation, but no success. Maybe I was just confused. Anyway, thanks Shane and Kevin! --- Atsushi Nemoto From Gurumurthy.Gowdar@gmobis.com Sat May 8 22:12:41 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 08 May 2010 22:12:45 +0200 (CEST) Received: from anti.mobis.co.kr ([211.217.52.67]:55237 "HELO sniper.mobis.co.kr" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with SMTP id S1492162Ab0EHUMl convert rfc822-to-8bit (ORCPT ); Sat, 8 May 2010 22:12:41 +0200 Received: (snipe 13005 invoked by uid 0); 9 May 2010 05:12:29 +0900 Received: from gurumurthy.gowdar@gmobis.com with Spamsniper 2.94.22 (Processed in 0.034502 secs); Received: from unknown (HELO msmobiweb.mobis.co.kr) (10.240.100.165) by unknown with SMTP; 9 May 2010 05:12:29 +0900 X-RCPTTO: linux-mips@linux-mips.org Received: from mkegmal01.global.mobis.co.kr ([10.240.200.82]) by msmobiweb.mobis.co.kr with Microsoft SMTPSVC(6.0.3790.3959); Sun, 9 May 2010 05:12:30 +0900 X-MimeOLE: Produced By Microsoft Exchange V6.5 Content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 8BIT Subject: Exception in serial_init MIPS32 Date: Sun, 9 May 2010 05:12:29 +0900 Message-ID: <5858DE952C53A441BDA3408A0524130104CCE0AA@mkegmal01> X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: Exception in serial_init MIPS32 Thread-Index: Acru6skf+FuImQx+SNqjUkEZaaPOww== From: =?iso-8859-1?Q?=A0Gurumurthy_G_M?= To: X-OriginalArrivalTime: 08 May 2010 20:12:30.0140 (UTC) FILETIME=[C95AA7C0:01CAEEEA] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26646 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: Gurumurthy.Gowdar@gmobis.com Precedence: bulk X-list: linux-mips Hi All, I am getting a exception in board.c , at the end of serial_init function i.e. when i access to stack pointer (SP). The return address register ra value is not correct. I am porting U-boot-2010.03 for MIPS32 Au1350 processor. board specs:- CPU Frequency - 396 MHz System Bus Frequency - 198 MHz SDRAM (DDR2) Frequency - 198 MHz SDRAM Base address is - 0x80000000 SP offset is - 0x400000 I am able to read and write DDR2 SDRAM from BDI3000, but how to check whether my DDR2 SDRAM Configuration is working or not from U-Boot. below is the error log file:- Au1350>bi 0xbfc195c0 Breakpoint identification is 0 Au1350>go - TARGET: core #0 has entered debug mode Au1350>info Core number : 0 Core state : Debug Mode Debug entry cause : exception Current PC : 0xbfc195c0 Current SR : 0x00400000 Current LR (r31) : 0xbfc195bc Current SP (r29) : 0x803fff90 Current EPC : 0x18222521 Au1350>ti Core number : 0 Core state : Debug Mode Debug entry cause : single step Current PC : 0xbfc195c4 Current SR : 0x00400000 Current LR (r31) : 0x440c0050 Current SP (r29) : 0x803fff90 Au1350>ti Core number : 0 Core state : Debug Mode Debug entry cause : single step Current PC : 0xbfc195c8 Current SR : 0x00400000 Current LR (r31) : 0x440c0050 Current SP (r29) : 0x803fff90 Au1350>ti Core number : 0 Core state : Debug Mode Debug entry cause : single step Current PC : 0x440c0050 Current SR : 0x00400000 Current LR (r31) : 0x440c0050 Current SP (r29) : 0x803fffb0 Au1350>ti Core number : 0 Core state : Debug Mode Debug entry cause : single step Current PC : 0xbfc00200 Current SR : 0x00400002 Current LR (r31) : 0x440c0050 Current SP (r29) : 0x803fffb0 Au1350> please let me know whether SDRAM DDR2 configuration is wrong or am missing something. why am not able to access SP from U-boot. Also SDRAM initialzation in YAMON and U-boot is totally different. please let me know which one is working fine. With Thanks and Regards, Gurumurthy Gowdar KPIT Cummins Infosystems Pvt Ltd From wuzhangjin@gmail.com Sun May 9 03:35:36 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 09 May 2010 03:35:39 +0200 (CEST) Received: from mail-pw0-f49.google.com ([209.85.160.49]:51081 "EHLO mail-pw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492308Ab0EIBfg (ORCPT ); Sun, 9 May 2010 03:35:36 +0200 Received: by pwj3 with SMTP id 3so1042732pwj.36 for ; Sat, 08 May 2010 18:35:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:subject:from:reply-to:to:cc :in-reply-to:references:content-type:organization:date:message-id :mime-version:x-mailer:content-transfer-encoding; bh=37vauDz7v28zrIZDOUfeJhDjiaePYQ9ZHyA17GriS0I=; b=ZaMBCPm+YL2XxDo/k5iydLt/v18ET5aACK8RfvnSfGjBFw1KBAXMczVv2N8+B8+UiK ZfdkLC7U/irqwCCZa/wgn48e/1EE4BV9lMH9X0swc2V9SxDI8SYFstlMEX/ynPr/5ter HMxTSI9wPGt4QfuB54ZUsYeQOTiOmpEJXTKI0= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=subject:from:reply-to:to:cc:in-reply-to:references:content-type :organization:date:message-id:mime-version:x-mailer :content-transfer-encoding; b=gCDhYqjWJtUEyskCsTE2XZhyDBPaKXp+OASQskFdBg42Buac96YvUxwvidU1/fam1D f8YqIw/x/Ftsns6/LqbO1YJ9ok34tKEul3aI/PIe+LbuIsiqoVpYAFMSSnZFccFhAYia zc+6dzMcWvJkTrSDZ+/Z8guJvmdnIMeQ5a/UI= Received: by 10.114.10.19 with SMTP id 19mr1589919waj.75.1273368927076; Sat, 08 May 2010 18:35:27 -0700 (PDT) Received: from [192.168.2.244] ([202.201.14.140]) by mx.google.com with ESMTPS id n32sm17480967wae.22.2010.05.08.18.35.22 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sat, 08 May 2010 18:35:24 -0700 (PDT) Subject: Re: [PATCH] Oprofile: Loongson: Fixup of irq handler From: Wu Zhangjin Reply-To: wuzhangjin@gmail.com To: Ralf Baechle Cc: linux-mips@linux-mips.org In-Reply-To: <1273165186-29153-1-git-send-email-wuzhangjin@gmail.com> References: <1273165186-29153-1-git-send-email-wuzhangjin@gmail.com> Content-Type: text/plain; charset="UTF-8" Organization: DSLab, Lanzhou University, China Date: Sun, 09 May 2010 09:35:19 +0800 Message-ID: <1273368919.4914.0.camel@localhost> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26647 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips Hi, Ralf This one is urgent, could you please review it, thanks ;) Regards, Wu Zhangjin On Fri, 2010-05-07 at 00:59 +0800, Wu Zhangjin wrote: > The interrupt enable bit of performance counters of Loongson is in the > control register($24), not in the counter register, so, in > loongson2_perfcount_handler(), we need to use > > enabled = read_c0_perfctrl() & LOONGSON2_PERFCNT_INT_EN; > > instead of > > enabled = read_c0_perfcnt() & LOONGSON2_PERFCNT_INT_EN; > > Reported-by: Xu Hengyang > Signed-off-by: Wu Zhangjin > --- > arch/mips/oprofile/op_model_loongson2.c | 2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) > > diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c > index 29e2326..fa3bf66 100644 > --- a/arch/mips/oprofile/op_model_loongson2.c > +++ b/arch/mips/oprofile/op_model_loongson2.c > @@ -122,7 +122,7 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id) > */ > > /* Check whether the irq belongs to me */ > - enabled = read_c0_perfcnt() & LOONGSON2_PERFCNT_INT_EN; > + enabled = read_c0_perfctrl() & LOONGSON2_PERFCNT_INT_EN; > if (!enabled) > return IRQ_NONE; > enabled = reg.cnt1_enabled | reg.cnt2_enabled; From anemo@mba.ocn.ne.jp Mon May 10 16:49:55 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 10 May 2010 16:50:02 +0200 (CEST) Received: from mv-drv-hcb003.ocn.ad.jp ([118.23.109.133]:53064 "EHLO mv-drv-hcb003.ocn.ad.jp" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492283Ab0EJOtz (ORCPT ); Mon, 10 May 2010 16:49:55 +0200 Received: from vcmba.ocn.ne.jp (localhost.localdomain [127.0.0.1]) by mv-drv-hcb003.ocn.ad.jp (Postfix) with ESMTP id 987E256421D; Mon, 10 May 2010 23:49:49 +0900 (JST) Received: from localhost (softbank221040169135.bbtec.net [221.40.169.135]) by vcmba.ocn.ne.jp (Postfix) with ESMTP; Mon, 10 May 2010 23:49:49 +0900 (JST) Date: Mon, 10 May 2010 23:49:46 +0900 (JST) Message-Id: <20100510.234946.229279777.anemo@mba.ocn.ne.jp> To: chris@mips.com Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] Fix abs.[sd] and neg.[sd] emulation for NaN operands From: Atsushi Nemoto In-Reply-To: <20091012215718.30362.67068.stgit@localhost.localdomain> References: <20091012215522.30362.49399.stgit@localhost.localdomain> <20091012215718.30362.67068.stgit@localhost.localdomain> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 22.2 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26648 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips Excuse me for too late comment. On Mon, 12 Oct 2009 14:57:18 -0700, Chris Dearman wrote: > From: Nigel Stephens > > This patch ensures that the sign bit is always updated > for NaN operands. ... > @@ -76,15 +74,12 @@ ieee754dp ieee754dp_abs(ieee754dp x) > CLEARCX; > FLUSHXDP; > > + /* Clear sign ALWAYS, irrespective of NaN */ > + DPSIGN(x) = 0; > + > if (xc == IEEE754_CLASS_SNAN) { > - SETCX(IEEE754_INVALID_OPERATION); > - return ieee754dp_nanxcpt(ieee754dp_indef(), "neg"); > + return ieee754dp_nanxcpt(ieee754dp_indef(), "abs"); > } > > - if (ieee754dp_isnan(x)) /* but not infinity */ > - return ieee754dp_nanxcpt(x, "abs", x); > - > - /* quick fix up */ > - DPSIGN(x) = 0; > return x; > } Is there any reason for removal of SETCX(IEEE754_INVALID_OPERATION) line here? The older version of this fix ("Fix absd emulation" by Raghu Gandham) did not remove the line. Without this line, a signaling NaN will not raise a signal. It seems not expected behaviour. --- Atsushi Nemoto From chris@mips.com Mon May 10 20:37:21 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 10 May 2010 20:37:29 +0200 (CEST) Received: from dns1.mips.com ([63.167.95.197]:44877 "EHLO dns1.mips.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492463Ab0EJShV (ORCPT ); Mon, 10 May 2010 20:37:21 +0200 Received: from MTVEXCHANGE.mips.com ([192.168.36.60]) by dns1.mips.com (8.13.8/8.13.8) with ESMTP id o4AIbBRJ025672; Mon, 10 May 2010 11:37:12 -0700 Received: from [192.168.65.41] ([192.168.65.41]) by MTVEXCHANGE.mips.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 10 May 2010 11:36:32 -0700 Message-ID: <4BE85256.9010709@mips.com> Date: Mon, 10 May 2010 11:37:10 -0700 From: Chris Dearman Organization: MIPS Technologies User-Agent: Thunderbird 2.0.0.24 (X11/20100411) MIME-Version: 1.0 To: Atsushi Nemoto CC: linux-mips@linux-mips.org Subject: Re: [PATCH] Fix abs.[sd] and neg.[sd] emulation for NaN operands References: <20091012215522.30362.49399.stgit@localhost.localdomain> <20091012215718.30362.67068.stgit@localhost.localdomain> <20100510.234946.229279777.anemo@mba.ocn.ne.jp> In-Reply-To: <20100510.234946.229279777.anemo@mba.ocn.ne.jp> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 10 May 2010 18:36:32.0967 (UTC) FILETIME=[B6A34570:01CAF06F] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26649 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: chris@mips.com Precedence: bulk X-list: linux-mips Atsushi Nemoto wrote: > Excuse me for too late comment. > > On Mon, 12 Oct 2009 14:57:18 -0700, Chris Dearman wrote: >> From: Nigel Stephens >> >> This patch ensures that the sign bit is always updated >> for NaN operands. > ... >> @@ -76,15 +74,12 @@ ieee754dp ieee754dp_abs(ieee754dp x) >> CLEARCX; >> FLUSHXDP; >> >> + /* Clear sign ALWAYS, irrespective of NaN */ >> + DPSIGN(x) = 0; >> + >> if (xc == IEEE754_CLASS_SNAN) { >> - SETCX(IEEE754_INVALID_OPERATION); >> - return ieee754dp_nanxcpt(ieee754dp_indef(), "neg"); >> + return ieee754dp_nanxcpt(ieee754dp_indef(), "abs"); >> } >> >> - if (ieee754dp_isnan(x)) /* but not infinity */ >> - return ieee754dp_nanxcpt(x, "abs", x); >> - >> - /* quick fix up */ >> - DPSIGN(x) = 0; >> return x; >> } > > Is there any reason for removal of SETCX(IEEE754_INVALID_OPERATION) > line here? > > The older version of this fix ("Fix absd emulation" by Raghu Gandham) > did not remove the line. > > Without this line, a signaling NaN will not raise a signal. It seems > not expected behaviour. ieee754dp/sp_nanxcpt also sets the invalid exception bit so I think this is duplicated code. I think the same fix should have been applied to ieee754sp_neg/ieee754dp_neg for consistency. Chris -- Chris Dearman Desk: +1 408 530 5092 Cell: +1 408 398 5531 MIPS Technologies Inc 955 East Arques Ave, Sunnyvale CA 94085 From ralf@linux-mips.org Mon May 10 20:54:27 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 10 May 2010 20:54:32 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:40729 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492476Ab0EJSy1 (ORCPT ); Mon, 10 May 2010 20:54:27 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o4AIsLlM028515; Mon, 10 May 2010 19:54:22 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o4AIsIgu028505; Mon, 10 May 2010 19:54:18 +0100 Date: Mon, 10 May 2010 19:54:17 +0100 From: Ralf Baechle To: Shane McDonald Cc: anemo@mba.ocn.ne.jp, kevink@paralogos.com, linux-mips@linux-mips.org, sshtylyov@mvista.com Subject: Re: [PATCH] MIPS: Coding style cleanups of access of FCSR rounding mode bits Message-ID: <20100510185417.GA28201@linux-mips.org> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26650 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Thanks Shane, queued for 2.6.35. Ralf From ralf@linux-mips.org Mon May 10 21:18:54 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 10 May 2010 21:18:57 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:34350 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492477Ab0EJTSx (ORCPT ); Mon, 10 May 2010 21:18:53 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o4AJImKs030218; Mon, 10 May 2010 20:18:48 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o4AJImjr030216; Mon, 10 May 2010 20:18:48 +0100 Date: Mon, 10 May 2010 20:18:47 +0100 From: Ralf Baechle To: David VomLehn Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] Clean up tables for bootmem allocation Message-ID: <20100510191847.GA28820@linux-mips.org> References: <20100507221702.GA17837@dvomlehn-lnx2.corp.sa.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20100507221702.GA17837@dvomlehn-lnx2.corp.sa.net> User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26651 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Fri, May 07, 2010 at 03:17:02PM -0700, David VomLehn wrote: > Date: Fri, 7 May 2010 15:17:02 -0700 > From: David VomLehn > To: to@dvomlehn-lnx2.corp.sa.net, "linux-mips@linux-mips.org"@cisco.com, > linux-mips@linux-mips.org > Cc: ralf@linux-mips.org > Subject: [PATCH] Clean up tables for bootmem allocation > Content-Type: text/plain; charset=us-ascii Queued for 2.6.35. Thanks, Ralf From ralf@linux-mips.org Mon May 10 22:20:05 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 10 May 2010 22:20:08 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:37995 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492540Ab0EJUUF (ORCPT ); Mon, 10 May 2010 22:20:05 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o4AKK0Sk000450; Mon, 10 May 2010 21:20:01 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o4AKJxSf000448; Mon, 10 May 2010 21:19:59 +0100 Date: Mon, 10 May 2010 21:19:59 +0100 From: Ralf Baechle To: Kevin Cernekee Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] MIPS: nofpu and nodsp only affect CPU0 Message-ID: <20100510201959.GB28820@linux-mips.org> References: <0b6db1ee1efbe0daa1320b59ab5093ba5af377b8@localhost.localdomain> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <0b6db1ee1efbe0daa1320b59ab5093ba5af377b8@localhost.localdomain> User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26652 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Sun, May 02, 2010 at 02:43:52PM -0700, Kevin Cernekee wrote: > The "nofpu" and "nodsp" kernel command line options currently do not > affect CPUs that are brought online later in the boot process or > hotplugged at runtime. It is desirable to apply the nofpu/nodsp options > to all CPUs in the system, so that surprising results are not seen when > a process migrates from one CPU to another. I like this patch; this solution is also cleaner than iterating over the cpu data array. However as it constitutes a change in established kernel behaviour I prefer to queue this patch for 2.6.35 rather than applying it immediately. Thanks! Ralf From ralf@linux-mips.org Mon May 10 22:41:56 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 10 May 2010 22:41:59 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:52891 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492404Ab0EJUl4 (ORCPT ); Mon, 10 May 2010 22:41:56 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o4AKfr0F017086; Mon, 10 May 2010 21:41:54 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o4AKfnH5017082; Mon, 10 May 2010 21:41:50 +0100 Date: Mon, 10 May 2010 21:41:49 +0100 From: Ralf Baechle To: Kevin Cernekee Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] MIPS: nofpu and nodsp only affect CPU0 Message-ID: <20100510204148.GA959@linux-mips.org> References: <0b6db1ee1efbe0daa1320b59ab5093ba5af377b8@localhost.localdomain> <20100510201959.GB28820@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20100510201959.GB28820@linux-mips.org> User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26653 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Mon, May 10, 2010 at 09:19:59PM +0100, Ralf Baechle wrote: > > The "nofpu" and "nodsp" kernel command line options currently do not > > affect CPUs that are brought online later in the boot process or > > hotplugged at runtime. It is desirable to apply the nofpu/nodsp options > > to all CPUs in the system, so that surprising results are not seen when > > a process migrates from one CPU to another. > > I like this patch; this solution is also cleaner than iterating over the > cpu data array. However as it constitutes a change in established kernel > behaviour I prefer to queue this patch for 2.6.35 rather than applying it > immediately. I've moved definitions of mips_fpu_disabled, fpu_disable, mips_dsp_disabled and dsp_disable from setup.c to cpu-probe.c to allow mips_fpu_disabled and mips_dsp_disabled to become static. Ralf From dediao@cisco.com Mon May 10 23:32:42 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 10 May 2010 23:32:46 +0200 (CEST) Received: from rtp-iport-2.cisco.com ([64.102.122.149]:49427 "EHLO rtp-iport-2.cisco.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492457Ab0EJVcm convert rfc822-to-8bit (ORCPT ); Mon, 10 May 2010 23:32:42 +0200 Authentication-Results: rtp-iport-2.cisco.com; dkim=neutral (message not signed) header.i=none X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: AqwFAPIX6EutJV2a/2dsb2JhbACRX4xEcaMHmVGFFASDQQ X-IronPort-AV: E=Sophos;i="4.53,202,1272844800"; d="scan'208";a="109946947" Received: from rcdn-core-3.cisco.com ([173.37.93.154]) by rtp-iport-2.cisco.com with ESMTP; 10 May 2010 21:32:35 +0000 Received: from xbh-rcd-202.cisco.com (xbh-rcd-202.cisco.com [72.163.62.201]) by rcdn-core-3.cisco.com (8.14.3/8.14.3) with ESMTP id o4ALWZQ1012695; Mon, 10 May 2010 21:32:35 GMT Received: from xmb-rcd-208.cisco.com ([72.163.62.215]) by xbh-rcd-202.cisco.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 10 May 2010 16:32:35 -0500 X-MimeOLE: Produced By Microsoft Exchange V6.5 Content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT Subject: [RFC PATCH 0/2] The Device Tree Patch for MIPS Date: Mon, 10 May 2010 16:32:34 -0500 Message-ID: <7A9214B0DEB2074FBCA688B30B04400DC64133@XMB-RCD-208.cisco.com> X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: [RFC PATCH 0/2] The Device Tree Patch for MIPS Thread-Index: AcrwiE2Kxdp67lxkSEmhUR3BghfpGA== From: "Dezhong Diao (dediao)" To: Cc: "David VomLehn (dvomlehn)" , "Tony Colclough (colclot)" , "Grant Likely" X-OriginalArrivalTime: 10 May 2010 21:32:35.0309 (UTC) FILETIME=[4E48C1D0:01CAF088] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26654 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dediao@cisco.com Precedence: bulk X-list: linux-mips The device tree applies an ascii format to describe a hardware layout, which is then converted into a flattened binary representation by dtc (the "device tree compiler"). A bootloader supporting device trees loads the flattened device tree into memory as a binary blob, and passes the linux kernel a pointer to this blob. The kernel then uses a built-in device tree parser to interpret the hardware layout. The device tree code had been in some of platforms (powerpc, sparc, and microblaze) for a long period, it has been ported to ARM platform recently. Grant Likely (the device tree maintainer, glikely@secretlab.ca) has put a lot of effort to eliminate the duplication in arch-specific code (like prior 2.6.33.1 kernel) so that it becomes easy to get the device tree working with a new platform. The patches are intended to support the device tree in MIPS. It is ported against the new test branch (git://git.secretlab.ca/git/linux-2.6 test-devicetree). Dezhong From dediao@cisco.com Mon May 10 23:34:38 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 10 May 2010 23:34:43 +0200 (CEST) Received: from rtp-iport-2.cisco.com ([64.102.122.149]:53239 "EHLO rtp-iport-2.cisco.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492487Ab0EJVei convert rfc822-to-8bit (ORCPT ); Mon, 10 May 2010 23:34:38 +0200 Authentication-Results: rtp-iport-2.cisco.com; dkim=neutral (message not signed) header.i=none X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: AvsEAB4Z6EutJV2Z/2dsb2JhbACeI3GjAJlRhRQEg0E X-IronPort-AV: E=Sophos;i="4.53,202,1272844800"; d="scan'208";a="109947626" Received: from rcdn-core-2.cisco.com ([173.37.93.153]) by rtp-iport-2.cisco.com with ESMTP; 10 May 2010 21:34:31 +0000 Received: from xbh-rcd-201.cisco.com (xbh-rcd-201.cisco.com [72.163.62.200]) by rcdn-core-2.cisco.com (8.14.3/8.14.3) with ESMTP id o4ALYVd8020580; Mon, 10 May 2010 21:34:31 GMT Received: from xmb-rcd-208.cisco.com ([72.163.62.215]) by xbh-rcd-201.cisco.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 10 May 2010 16:34:31 -0500 X-MimeOLE: Produced By Microsoft Exchange V6.5 Content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT Subject: RE: [RFC PATCH 1/2] The Device Tree Patch for MIPS Date: Mon, 10 May 2010 16:34:30 -0500 Message-ID: <7A9214B0DEB2074FBCA688B30B04400DC64136@XMB-RCD-208.cisco.com> X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: [RFC PATCH 1/2] The Device Tree Patch for MIPS Thread-Index: AcrwiE2Kxdp67lxkSEmhUR3BghfpGAAAArHw From: "Dezhong Diao (dediao)" To: Cc: "David VomLehn (dvomlehn)" , "Tony Colclough (colclot)" , "Grant Likely" X-OriginalArrivalTime: 10 May 2010 21:34:31.0464 (UTC) FILETIME=[93849A80:01CAF088] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26655 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dediao@cisco.com Precedence: bulk X-list: linux-mips Add common device tree support for MIPS. --- arch/mips/Kconfig | 20 ++++ arch/mips/include/asm/of_device.h | 3 + arch/mips/include/asm/of_platform.h | 9 ++ arch/mips/include/asm/prom.h | 64 ++++++++++++++ arch/mips/kernel/Makefile | 2 + arch/mips/kernel/prom.c | 164 +++++++++++++++++++++++++++++++++++ arch/mips/kernel/setup.c | 2 + 7 files changed, 264 insertions(+), 0 deletions(-) create mode 100644 arch/mips/include/asm/of_device.h create mode 100644 arch/mips/include/asm/of_platform.h create mode 100644 arch/mips/include/asm/prom.h create mode 100644 arch/mips/kernel/prom.c diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 29e8692..55d8331 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -2052,6 +2052,26 @@ config SECCOMP If unsure, say Y. Only embedded should say N here. +config OF + bool "Device tree support" + select OF_FLATTREE + help + Support for OpenFirmware-style device trees + +config PROC_DEVICETREE + bool "Support for device tree in /proc" + depends on PROC_FS && OF + help + This option adds a device-tree directory under /proc which contains + an image of the device tree that the kernel copies from Open + Firmware or other boot firmware. If unsure, say Y here. + +config ARCH_HAS_DEVTREE_MEM + bool "Support user-defined memory scan function in device tree" + depends on OF + help + The user has a customized function to parse memory nodes. + endmenu config LOCKDEP_SUPPORT diff --git a/arch/mips/include/asm/of_device.h b/arch/mips/include/asm/of_device.h new file mode 100644 index 0000000..7a83477 --- /dev/null +++ b/arch/mips/include/asm/of_device.h @@ -0,0 +1,3 @@ +#ifndef _ASM_MIPS_OF_DEVICE_H +#define _ASM_MIPS_OF_DEVICE_H +#endif /* _ASM_MIPS_OF_DEVICE_H */ diff --git a/arch/mips/include/asm/of_platform.h b/arch/mips/include/asm/of_platform.h new file mode 100644 index 0000000..7a33827 --- /dev/null +++ b/arch/mips/include/asm/of_platform.h @@ -0,0 +1,9 @@ +#ifndef _ASM_MIPS_OF_PLATFORM_H +#define _ASM_MIPS_OF_PLATFORM_H + +static inline void of_device_make_bus_id(struct device *dev) { + __of_device_make_bus_id(dev); +} + +#endif /* _ASM_MIPS_OF_PLATFORM_H */ diff --git a/arch/mips/include/asm/prom.h b/arch/mips/include/asm/prom.h new file mode 100644 index 0000000..e72b0df --- /dev/null +++ b/arch/mips/include/asm/prom.h @@ -0,0 +1,64 @@ +/* + * arch/mips/include/asm/prom.h + * + * Copyright (C) 2010 Cisco Systems Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +#ifndef __ASM_MIPS_PROM_H +#define __ASM_MIPS_PROM_H + +#ifdef CONFIG_OF +#include + +#include +#include +#include + +/* _ALIGN expects upwards alignment */ +#define _ALIGN(addr, size) (((addr) + ((size) - 1)) & (~((size) - 1))) + +/* which is compatible with the flattened device tree (FDT) */ #define +cmd_line arcs_cmdline + +/* + * Use this value to indicate lack of interrupt + * capability + */ +#ifndef NO_IRQ +#define NO_IRQ ((unsigned int)(-1)) +#endif + +static inline unsigned long pci_address_to_pio(phys_addr_t address) { + return (unsigned long)-1; +} + +struct device_node; + +static inline int of_node_to_nid(struct device_node *device) { + return 0; +} + +static inline void __init early_init_dt_scan_chosen_arch(unsigned long node) +{ +} + +extern int __init early_init_dt_scan_memory_arch(unsigned long node, + const char *uname, int depth, void *data); + +extern int __init reserve_mem_mach(unsigned long addr, unsigned long size); +extern void __init free_mem_mach(unsigned long addr, unsigned long size); + +extern void __init device_tree_init(void); #else /* CONFIG_OF */ static +inline void __init device_tree_init(void) { } #endif /* CONFIG_OF */ + +#endif /* _ASM_MIPS_PROM_H */ diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index ef20957..4b10545 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -95,6 +95,8 @@ obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-$(CONFIG_SPINLOCK_TEST) += spinlock_test.o +obj-$(CONFIG_OF) += prom.o + CFLAGS_cpu-bugs64.o = $(shell if $(CC) $(KBUILD_CFLAGS) -Wa,-mdaddi -c -o /dev/null -xc /dev/null >/dev/null 2>&1; then echo "-DHAVE_AS_SET_DADDI"; fi) obj-$(CONFIG_HAVE_STD_PC_SERIAL_PORT) += 8250-platform.o diff --git a/arch/mips/kernel/prom.c b/arch/mips/kernel/prom.c new file mode 100644 index 0000000..2cbd43f --- /dev/null +++ b/arch/mips/kernel/prom.c @@ -0,0 +1,164 @@ +/* + * linux/arch/mips/kernel/prom.c + * + * Copyright (C) 2010 Cisco Systems Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +/* + * The list of OF IDs below is used for matching bus types in the + * system whose devices are to be exposed as of_platform_devices. + * + * This is the default list valid for most platforms. This file provides + * functions who can take an explicit list if necessary though + * + * The search is always performed recursively looking for children of + * the provided device_node and recursively if such a children matches + * a bus type in the list + */ +const struct of_device_id of_default_bus_ids[] = { + {}, +}; + +#ifndef CONFIG_ARCH_HAS_DEVTREE_MEM +int __init early_init_dt_scan_memory_arch(unsigned long node, + const char *uname, int depth, + void *data) +{ + return early_init_dt_scan_memory(node, uname, depth, data); } + +void __init early_init_dt_add_memory_arch(u64 base, u64 size) { + return add_memory_region(base, size, BOOT_MEM_RAM); } + +int __init reserve_mem_mach(unsigned long addr, unsigned long size) { + return reserve_bootmem(addr, size, BOOTMEM_DEFAULT); } + +void __init free_mem_mach(unsigned long addr, unsigned long size) { + return free_bootmem(addr, size); +} +#endif + +u64 __init early_init_dt_alloc_memory_arch(u64 size, u64 align) { + return virt_to_phys( + __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS)) + ); +} + +#ifdef CONFIG_BLK_DEV_INITRD +void __init early_init_dt_setup_initrd_arch(unsigned long start, + unsigned long end) +{ + initrd_start = (unsigned long)__va(start); + initrd_end = (unsigned long)__va(end); + initrd_below_start_ok = 1; +} +#endif + +/* + * Interrupt remapper + */ +struct device_node *of_irq_find_parent_by_phandle(phandle p) { + return of_find_node_by_phandle(p); +} + +int of_irq_map_one(struct device_node *device, + int index, struct of_irq *out_irq) { + return __of_irq_map_one(device, index, out_irq); } +EXPORT_SYMBOL_GPL(of_irq_map_one); + +/* + * irq_create_of_mapping - Hook to resolve OF irq specifier into a Linux irq# + * + * Currently the mapping mechanism is trivial; simple flat hwirq numbers are + * mapped 1:1 onto Linux irq numbers. Cascaded irq controllers are not + * supported. + */ +unsigned int irq_create_of_mapping(struct device_node *controller, + const u32 *intspec, unsigned int intsize) +{ + return intspec[0]; +} +EXPORT_SYMBOL_GPL(irq_create_of_mapping); + +void __init early_init_devtree(void *params) { + /* Setup flat device-tree pointer */ + initial_boot_params = params; + + /* Retrieve various informations from the /chosen node of the + * device-tree, including the platform type, initrd location and + * size, and more ... + */ + of_scan_flat_dt(early_init_dt_scan_chosen, NULL); + + /* Scan memory nodes */ + of_scan_flat_dt(early_init_dt_scan_root, NULL); + of_scan_flat_dt(early_init_dt_scan_memory_arch, NULL); } + +void __init device_tree_init(void) +{ + unsigned long base, size; + + if (!initial_boot_params) + return; + + base = virt_to_phys((void *)initial_boot_params); + size = initial_boot_params->totalsize; + + /* Before we do anything, lets reserve the dt blob */ + reserve_mem_mach(base, size); + + unflatten_device_tree(); + + /* free the space reserved for the dt blob */ + free_mem_mach(base, size); +} + +#if defined(CONFIG_DEBUG_FS) && defined(DEBUG) static struct +debugfs_blob_wrapper flat_dt_blob; + +static int __init export_flat_device_tree(void) { + struct dentry *d; + + flat_dt_blob.data = initial_boot_params; + flat_dt_blob.size = initial_boot_params->totalsize; + + d = debugfs_create_blob("flat-device-tree", S_IFREG | S_IRUSR, + powerpc_debugfs_root, &flat_dt_blob); + if (!d) + return 1; + + return 0; +} +__initcall(export_flat_device_tree); +#endif diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index f9513f9..55a85e4 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -31,6 +31,7 @@ #include #include #include +#include struct cpuinfo_mips cpu_data[NR_CPUS] __read_mostly; @@ -487,6 +488,7 @@ static void __init arch_mem_init(char **cmdline_p) } bootmem_init(); + device_tree_init(); sparse_init(); paging_init(); } -- 1.6.0.6 From dediao@cisco.com Mon May 10 23:36:02 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 10 May 2010 23:36:07 +0200 (CEST) Received: from rtp-iport-1.cisco.com ([64.102.122.148]:60861 "EHLO rtp-iport-1.cisco.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492523Ab0EJVgC convert rfc822-to-8bit (ORCPT ); Mon, 10 May 2010 23:36:02 +0200 Authentication-Results: rtp-iport-1.cisco.com; dkim=neutral (message not signed) header.i=none X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: AvsEAG0Y6EtAZnwN/2dsb2JhbACeI3GjD5lRglAFgj8Eg0E X-IronPort-AV: E=Sophos;i="4.53,202,1272844800"; d="scan'208";a="109810254" Received: from rtp-core-2.cisco.com ([64.102.124.13]) by rtp-iport-1.cisco.com with ESMTP; 10 May 2010 21:35:53 +0000 Received: from xbh-rcd-102.cisco.com (xbh-rcd-102.cisco.com [72.163.62.139]) by rtp-core-2.cisco.com (8.13.8/8.14.3) with ESMTP id o4ALZqDK010393; Mon, 10 May 2010 21:35:53 GMT Received: from xmb-rcd-208.cisco.com ([72.163.62.215]) by xbh-rcd-102.cisco.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 10 May 2010 16:35:53 -0500 X-MimeOLE: Produced By Microsoft Exchange V6.5 Content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT Subject: RE: [RFC PATCH 2/2] The Device Tree Patch for MIPS Date: Mon, 10 May 2010 16:35:51 -0500 Message-ID: <7A9214B0DEB2074FBCA688B30B04400DC6413A@XMB-RCD-208.cisco.com> X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: [RFC PATCH 2/2] The Device Tree Patch for MIPS Thread-Index: AcrwiE2Kxdp67lxkSEmhUR3BghfpGAAAE6KA From: "Dezhong Diao (dediao)" To: Cc: "David VomLehn (dvomlehn)" , "Tony Colclough (colclot)" , "Grant Likely" X-OriginalArrivalTime: 10 May 2010 21:35:53.0169 (UTC) FILETIME=[C437CC10:01CAF088] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26656 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dediao@cisco.com Precedence: bulk X-list: linux-mips It is the machine-dependent code. --- arch/mips/configs/powertv_defconfig | 174 +++++++++++++++------ arch/mips/include/asm/mach-powertv/asic.h | 8 +- arch/mips/include/asm/mach-powertv/mdesc.h | 51 ++++++ arch/mips/powertv/Makefile | 2 +- arch/mips/powertv/asic/asic_devices.c | 22 --- arch/mips/powertv/mdesc.c | 224 +++++++++++++++++++++++++ arch/mips/powertv/memory.c | 242 +++++++++++++++++----------- 7 files changed, 555 insertions(+), 168 deletions(-) create mode 100644 arch/mips/include/asm/mach-powertv/mdesc.h create mode 100644 arch/mips/powertv/mdesc.c diff --git a/arch/mips/configs/powertv_defconfig b/arch/mips/configs/powertv_defconfig index 7291633..b737432 100644 --- a/arch/mips/configs/powertv_defconfig +++ b/arch/mips/configs/powertv_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.31-rc5 -# Fri Aug 28 14:49:33 2009 +# Linux kernel version: 2.6.34-rc3 +# Thu May 6 18:17:35 2010 # CONFIG_MIPS=y @@ -11,11 +11,12 @@ CONFIG_MIPS=y # CONFIG_MACH_ALCHEMY is not set # CONFIG_AR7 is not set # CONFIG_BCM47XX is not set +# CONFIG_BCM63XX is not set # CONFIG_MIPS_COBALT is not set # CONFIG_MACH_DECSTATION is not set # CONFIG_MACH_JAZZ is not set # CONFIG_LASAT is not set -# CONFIG_LEMOTE_FULONG is not set +# CONFIG_MACH_LOONGSON is not set # CONFIG_MIPS_MALTA is not set # CONFIG_MIPS_SIM is not set # CONFIG_NEC_MARKEINS is not set @@ -50,7 +51,6 @@ CONFIG_POWERTV=y # CONFIG_MIN_RUNTIME_RESOURCES is not set # CONFIG_BOOTLOADER_DRIVER is not set CONFIG_BOOTLOADER_FAMILY="R2" -CONFIG_CSRC_POWERTV=y CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_ARCH_HAS_ILOG2_U32 is not set # CONFIG_ARCH_HAS_ILOG2_U64 is not set @@ -65,9 +65,9 @@ CONFIG_SCHED_OMIT_FRAME_POINTER=y CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y CONFIG_CEVT_R4K_LIB=y CONFIG_CEVT_R4K=y +CONFIG_CSRC_POWERTV=y CONFIG_DMA_NONCOHERENT=y -CONFIG_DMA_NEED_PCI_MAP_STATE=y -# CONFIG_EARLY_PRINTK is not set +CONFIG_NEED_DMA_MAP_STATE=y CONFIG_SYS_HAS_EARLY_PRINTK=y # CONFIG_NO_IOPORT is not set CONFIG_CPU_BIG_ENDIAN=y @@ -79,7 +79,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5 # # CPU selection # -# CONFIG_CPU_LOONGSON2 is not set +# CONFIG_CPU_LOONGSON2E is not set +# CONFIG_CPU_LOONGSON2F is not set # CONFIG_CPU_MIPS32_R1 is not set CONFIG_CPU_MIPS32_R2=y # CONFIG_CPU_MIPS64_R1 is not set @@ -122,7 +123,7 @@ CONFIG_CPU_HAS_PREFETCH=y CONFIG_MIPS_MT_DISABLED=y # CONFIG_MIPS_MT_SMP is not set # CONFIG_MIPS_MT_SMTC is not set -CONFIG_CPU_HAS_LLSC=y +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set CONFIG_CPU_MIPSR2_IRQ_VI=y CONFIG_CPU_MIPSR2_IRQ_EI=y CONFIG_CPU_HAS_SYNC=y @@ -144,8 +145,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 # CONFIG_PHYS_ADDR_T_64BIT is not set CONFIG_ZONE_DMA_FLAG=0 CONFIG_VIRT_TO_BUS=y -CONFIG_HAVE_MLOCK=y -CONFIG_HAVE_MLOCKED_PAGE_BIT=y +# CONFIG_KSM is not set CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_TICK_ONESHOT=y CONFIG_NO_HZ=y @@ -165,6 +165,9 @@ CONFIG_HZ=1000 CONFIG_PREEMPT=y # CONFIG_KEXEC is not set # CONFIG_SECCOMP is not set +CONFIG_OF=y +CONFIG_PROC_DEVICETREE=y +CONFIG_ARCH_HAS_DEVTREE_MEM=y CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" @@ -190,19 +193,15 @@ CONFIG_SYSVIPC_SYSCTL=y # # RCU Subsystem # -CONFIG_CLASSIC_RCU=y -# CONFIG_TREE_RCU is not set -# CONFIG_PREEMPT_RCU is not set +CONFIG_TREE_RCU=y +# CONFIG_TREE_PREEMPT_RCU is not set +# CONFIG_TINY_RCU is not set +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_FANOUT=32 +# CONFIG_RCU_FANOUT_EXACT is not set # CONFIG_TREE_RCU_TRACE is not set -# CONFIG_PREEMPT_RCU_TRACE is not set # CONFIG_IKCONFIG is not set CONFIG_LOG_BUF_SHIFT=16 -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -# CONFIG_CGROUPS is not set # CONFIG_SYSFS_DEPRECATED_V2 is not set CONFIG_RELAY=y # CONFIG_NAMESPACES is not set @@ -211,6 +210,7 @@ CONFIG_INITRAMFS_SOURCE="" # CONFIG_RD_GZIP is not set # CONFIG_RD_BZIP2 is not set # CONFIG_RD_LZMA is not set +# CONFIG_RD_LZO is not set # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_SYSCTL=y CONFIG_ANON_INODES=y @@ -234,18 +234,16 @@ CONFIG_SHMEM=y CONFIG_AIO=y # -# Performance Counters +# Kernel Performance Events And Counters # # CONFIG_VM_EVENT_COUNTERS is not set CONFIG_PCI_QUIRKS=y # CONFIG_SLUB_DEBUG is not set -# CONFIG_STRIP_ASM_SYMS is not set CONFIG_COMPAT_BRK=y # CONFIG_SLAB is not set CONFIG_SLUB=y # CONFIG_SLOB is not set # CONFIG_PROFILING is not set -# CONFIG_MARKERS is not set CONFIG_HAVE_OPROFILE=y # @@ -253,7 +251,7 @@ CONFIG_HAVE_OPROFILE=y # # CONFIG_GCOV_KERNEL is not set # CONFIG_SLOW_WORK is not set -# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y CONFIG_RT_MUTEXES=y CONFIG_BASE_SMALL=0 CONFIG_MODULES=y @@ -271,15 +269,41 @@ CONFIG_LBDAF=y # IO Schedulers # CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_AS is not set # CONFIG_IOSCHED_DEADLINE is not set # CONFIG_IOSCHED_CFQ is not set -# CONFIG_DEFAULT_AS is not set # CONFIG_DEFAULT_DEADLINE is not set # CONFIG_DEFAULT_CFQ is not set CONFIG_DEFAULT_NOOP=y CONFIG_DEFAULT_IOSCHED="noop" -# CONFIG_PROBE_INITRD_HEADER is not set +# CONFIG_INLINE_SPIN_TRYLOCK is not set # CONFIG_INLINE_SPIN_TRYLOCK_BH +is not set # CONFIG_INLINE_SPIN_LOCK is not set # +CONFIG_INLINE_SPIN_LOCK_BH is not set # CONFIG_INLINE_SPIN_LOCK_IRQ is +not set # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set # +CONFIG_INLINE_SPIN_UNLOCK is not set # CONFIG_INLINE_SPIN_UNLOCK_BH is +not set # CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set # +CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set # +CONFIG_INLINE_READ_TRYLOCK is not set # CONFIG_INLINE_READ_LOCK is not +set # CONFIG_INLINE_READ_LOCK_BH is not set # +CONFIG_INLINE_READ_LOCK_IRQ is not set # +CONFIG_INLINE_READ_LOCK_IRQSAVE is not set # CONFIG_INLINE_READ_UNLOCK +is not set # CONFIG_INLINE_READ_UNLOCK_BH is not set # +CONFIG_INLINE_READ_UNLOCK_IRQ is not set # +CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set # +CONFIG_INLINE_WRITE_TRYLOCK is not set # CONFIG_INLINE_WRITE_LOCK is +not set # CONFIG_INLINE_WRITE_LOCK_BH is not set # +CONFIG_INLINE_WRITE_LOCK_IRQ is not set # +CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set # +CONFIG_INLINE_WRITE_UNLOCK is not set # CONFIG_INLINE_WRITE_UNLOCK_BH +is not set # CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set # +CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set # +CONFIG_MUTEX_SPIN_ON_OWNER is not set # CONFIG_FREEZER is not set # @@ -289,7 +313,6 @@ CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_DOMAINS=y # CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCI_LEGACY is not set # CONFIG_PCI_DEBUG is not set # CONFIG_PCI_STUB is not set # CONFIG_PCI_IOV is not set @@ -318,7 +341,6 @@ CONFIG_NET=y # Networking options # CONFIG_PACKET=y -CONFIG_PACKET_MMAP=y CONFIG_UNIX=y CONFIG_XFRM=y # CONFIG_XFRM_USER is not set @@ -465,10 +487,12 @@ CONFIG_IP6_NF_FILTER=y # CONFIG_IP6_NF_RAW is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set # CONFIG_TIPC is not set # CONFIG_ATM is not set CONFIG_STP=y CONFIG_BRIDGE=y +CONFIG_BRIDGE_IGMP_SNOOPING=y # CONFIG_NET_DSA is not set # CONFIG_VLAN_8021Q is not set # CONFIG_DECNET is not set @@ -526,7 +550,13 @@ CONFIG_NET_SCH_FIFO=y # CONFIG_IRDA is not set # CONFIG_BT is not set # CONFIG_AF_RXRPC is not set -# CONFIG_WIRELESS is not set +CONFIG_WIRELESS=y +# CONFIG_CFG80211 is not set +# CONFIG_LIB80211 is not set + +# +# CFG80211 needs to be enabled for MAC80211 # # CONFIG_WIMAX is not set # CONFIG_RFKILL is not set # CONFIG_NET_9P is not set @@ -539,6 +569,7 @@ CONFIG_NET_SCH_FIFO=y # Generic Driver Options # CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +# CONFIG_DEVTMPFS is not set CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=y @@ -550,9 +581,9 @@ CONFIG_EXTRA_FIRMWARE="" # CONFIG_CONNECTOR is not set CONFIG_MTD=y # CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_TESTS is not set # CONFIG_MTD_CONCAT is not set CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_TESTS is not set # CONFIG_MTD_REDBOOT_PARTS is not set CONFIG_MTD_CMDLINE_PARTS=y # CONFIG_MTD_AR7_PARTS is not set @@ -632,6 +663,11 @@ CONFIG_MTD_NAND_IDS=y # UBI - Unsorted block images # # CONFIG_MTD_UBI is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_DEVICE=y +# CONFIG_OF_DEVICE_CLAIM_RESOURCES is not set # CONFIG_PARPORT is not set CONFIG_BLK_DEV=y # CONFIG_BLK_CPQ_DA is not set @@ -641,6 +677,10 @@ CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_CRYPTOLOOP is not set + +# +# DRBD disabled because PROC_FS, INET or CONNECTOR not selected # # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_UB is not set @@ -658,6 +698,7 @@ CONFIG_HAVE_IDE=y # # SCSI device support # +CONFIG_SCSI_MOD=y # CONFIG_RAID_ATTRS is not set CONFIG_SCSI=y CONFIG_SCSI_DMA=y @@ -693,6 +734,7 @@ CONFIG_SCSI_WAIT_SCAN=m # CONFIG_SCSI_OSD_INITIATOR is not set CONFIG_ATA=y # CONFIG_ATA_NONSTANDARD is not set +CONFIG_ATA_VERBOSE_ERROR=y CONFIG_SATA_PMP=y # CONFIG_SATA_AHCI is not set # CONFIG_SATA_SIL24 is not set @@ -714,6 +756,7 @@ CONFIG_ATA_SFF=y # CONFIG_PATA_ALI is not set # CONFIG_PATA_AMD is not set # CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATP867X is not set # CONFIG_PATA_ATIIXP is not set # CONFIG_PATA_CMD640_PCI is not set # CONFIG_PATA_CMD64X is not set @@ -729,6 +772,7 @@ CONFIG_ATA_SFF=y # CONFIG_PATA_IT821X is not set # CONFIG_PATA_IT8213 is not set # CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_LEGACY is not set # CONFIG_PATA_TRIFLEX is not set # CONFIG_PATA_MARVELL is not set # CONFIG_PATA_MPIIX is not set @@ -739,14 +783,16 @@ CONFIG_ATA_SFF=y # CONFIG_PATA_NS87415 is not set # CONFIG_PATA_OPTI is not set # CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set # CONFIG_PATA_PDC_OLD is not set # CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set # CONFIG_PATA_RZ1000 is not set # CONFIG_PATA_SC1200 is not set # CONFIG_PATA_SERVERWORKS is not set -# CONFIG_PATA_PDC2027X is not set # CONFIG_PATA_SIL680 is not set # CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set # CONFIG_PATA_VIA is not set # CONFIG_PATA_WINBOND is not set # CONFIG_PATA_PLATFORM is not set @@ -763,7 +809,7 @@ CONFIG_ATA_SFF=y # # -# See the help texts for more information. +# The newer stack is recommended. # # CONFIG_FIREWIRE is not set # CONFIG_IEEE1394 is not set @@ -787,6 +833,7 @@ CONFIG_MII=y # CONFIG_SMC91X is not set # CONFIG_DM9000 is not set # CONFIG_ETHOC is not set +# CONFIG_SMSC911X is not set # CONFIG_DNET is not set # CONFIG_NET_TULIP is not set # CONFIG_HP100 is not set @@ -800,6 +847,7 @@ CONFIG_MII=y # CONFIG_NET_PCI is not set # CONFIG_B44 is not set # CONFIG_KS8842 is not set +# CONFIG_KS8851_MLL is not set # CONFIG_ATL2 is not set CONFIG_NETDEV_1000=y # CONFIG_ACENIC is not set @@ -841,16 +889,16 @@ CONFIG_CHELSIO_T3_DEPENDS=y # CONFIG_MLX4_CORE is not set # CONFIG_TEHUTI is not set # CONFIG_BNX2X is not set +# CONFIG_QLCNIC is not set # CONFIG_QLGE is not set # CONFIG_SFC is not set # CONFIG_BE2NET is not set # CONFIG_TR is not set - -# -# Wireless LAN -# -# CONFIG_WLAN_PRE80211 is not set -# CONFIG_WLAN_80211 is not set +CONFIG_WLAN=y +# CONFIG_ATMEL is not set +# CONFIG_PRISM54 is not set +# CONFIG_USB_ZD1201 is not set +# CONFIG_HOSTAP is not set # # Enable WiMAX (Networking options) to see the WiMAX drivers @@ -873,6 +921,7 @@ CONFIG_USB_RTL8150=y # CONFIG_NETCONSOLE is not set # CONFIG_NETPOLL is not set # CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_VMXNET3 is not set # CONFIG_ISDN is not set # CONFIG_PHONE is not set @@ -882,6 +931,7 @@ CONFIG_USB_RTL8150=y CONFIG_INPUT=y # CONFIG_INPUT_FF_MEMLESS is not set # CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set # # Userland interfaces @@ -924,6 +974,8 @@ CONFIG_INPUT_EVDEV=y # Non-8250 serial port support # # CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_TIMBERDALE is not set +# CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set CONFIG_UNIX98_PTYS=y # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set # CONFIG_LEGACY_PTYS is not set @@ -945,7 +997,6 @@ CONFIG_DEVPORT=y # CONFIG_POWER_SUPPLY is not set # CONFIG_HWMON is not set # CONFIG_THERMAL is not set -# CONFIG_THERMAL_HWMON is not set # CONFIG_WATCHDOG is not set CONFIG_SSB_POSSIBLE=y @@ -961,12 +1012,15 @@ CONFIG_SSB_POSSIBLE=y # CONFIG_MFD_SM501 is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_MFD_TMIO is not set +# CONFIG_LPC_SCH is not set # CONFIG_REGULATOR is not set # CONFIG_MEDIA_SUPPORT is not set # # Graphics support # +CONFIG_VGA_ARB=y +CONFIG_VGA_ARB_MAX_GPUS=16 # CONFIG_DRM is not set # CONFIG_VGASTATE is not set # CONFIG_VIDEO_OUTPUT_CONTROL is not set @@ -980,7 +1034,6 @@ CONFIG_SSB_POSSIBLE=y # CONFIG_SOUND is not set CONFIG_HID_SUPPORT=y CONFIG_HID=y -# CONFIG_HID_DEBUG is not set # CONFIG_HIDRAW is not set # @@ -993,6 +1046,7 @@ CONFIG_USB_HIDDEV=y # # Special HID drivers # +# CONFIG_HID_3M_PCT is not set # CONFIG_HID_A4TECH is not set # CONFIG_HID_APPLE is not set # CONFIG_HID_BELKIN is not set @@ -1003,15 +1057,20 @@ CONFIG_USB_HIDDEV=y # CONFIG_HID_EZKEY is not set # CONFIG_HID_KYE is not set # CONFIG_HID_GYRATION is not set +# CONFIG_HID_TWINHAN is not set # CONFIG_HID_KENSINGTON is not set # CONFIG_HID_LOGITECH is not set # CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MOSART is not set # CONFIG_HID_MONTEREY is not set # CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set # CONFIG_HID_PANTHERLORD is not set # CONFIG_HID_PETALYNX is not set +# CONFIG_HID_QUANTA is not set # CONFIG_HID_SAMSUNG is not set # CONFIG_HID_SONY is not set +# CONFIG_HID_STANTUM is not set # CONFIG_HID_SUNPLUS is not set # CONFIG_HID_GREENASIA is not set # CONFIG_HID_SMARTJOYPLUS is not set @@ -1050,6 +1109,7 @@ CONFIG_USB_EHCI_HCD=y # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set CONFIG_USB_OHCI_HCD=y # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set @@ -1133,6 +1193,7 @@ CONFIG_USB_SERIAL_CP210X=y # CONFIG_USB_SERIAL_NAVMAN is not set # CONFIG_USB_SERIAL_PL2303 is not set # CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_QCAUX is not set # CONFIG_USB_SERIAL_QUALCOMM is not set # CONFIG_USB_SERIAL_SPCP8X5 is not set # CONFIG_USB_SERIAL_HP4X is not set @@ -1146,6 +1207,7 @@ CONFIG_USB_SERIAL_CP210X=y # CONFIG_USB_SERIAL_OPTION is not set # CONFIG_USB_SERIAL_OMNINET is not set # CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set # CONFIG_USB_SERIAL_DEBUG is not set # @@ -1158,7 +1220,6 @@ CONFIG_USB_SERIAL_CP210X=y # CONFIG_USB_RIO500 is not set # CONFIG_USB_LEGOTOWER is not set # CONFIG_USB_LCD is not set -# CONFIG_USB_BERRY_CHARGE is not set # CONFIG_USB_LED is not set # CONFIG_USB_CYPRESS_CY7C63 is not set # CONFIG_USB_CYTHERM is not set @@ -1171,7 +1232,6 @@ CONFIG_USB_SERIAL_CP210X=y # CONFIG_USB_IOWARRIOR is not set # CONFIG_USB_TEST is not set # CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_VST is not set # CONFIG_USB_GADGET is not set # @@ -1214,6 +1274,7 @@ CONFIG_JBD=y # CONFIG_GFS2_FS is not set # CONFIG_OCFS2_FS is not set # CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set CONFIG_FILE_LOCKING=y CONFIG_FSNOTIFY=y # CONFIG_DNOTIFY is not set @@ -1274,6 +1335,7 @@ CONFIG_JFFS2_ZLIB=y # CONFIG_JFFS2_LZO is not set CONFIG_JFFS2_RTIME=y # CONFIG_JFFS2_RUBIN is not set +# CONFIG_LOGFS is not set CONFIG_CRAMFS=y # CONFIG_SQUASHFS is not set # CONFIG_VXFS_FS is not set @@ -1284,7 +1346,6 @@ CONFIG_CRAMFS=y # CONFIG_ROMFS_FS is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set -# CONFIG_NILFS2_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V3=y @@ -1299,6 +1360,7 @@ CONFIG_SUNRPC=y # CONFIG_RPCSEC_GSS_KRB5 is not set # CONFIG_RPCSEC_GSS_SPKM3 is not set # CONFIG_SMB_FS is not set +# CONFIG_CEPH_FS is not set # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set @@ -1360,6 +1422,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y CONFIG_ENABLE_MUST_CHECK=y CONFIG_FRAME_WARN=1024 # CONFIG_MAGIC_SYSRQ is not set +# CONFIG_STRIP_ASM_SYMS is not set # CONFIG_UNUSED_SYMBOLS is not set CONFIG_DEBUG_FS=y # CONFIG_HEADERS_CHECK is not set @@ -1393,15 +1456,25 @@ CONFIG_DEBUG_INFO=y # CONFIG_DEBUG_LIST is not set # CONFIG_DEBUG_SG is not set # CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_CREDENTIALS is not set # CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_RCU_TORTURE_TEST is not set # CONFIG_RCU_CPU_STALL_DETECTOR is not set # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set # CONFIG_LKDTM is not set # CONFIG_FAULT_INJECTION is not set +# CONFIG_SYSCTL_SYSCALL_CHECK is not set # CONFIG_PAGE_POISONING is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_TRACING_SUPPORT=y CONFIG_FTRACE=y +# CONFIG_FUNCTION_TRACER is not set # CONFIG_IRQSOFF_TRACER is not set # CONFIG_PREEMPT_TRACER is not set # CONFIG_SCHED_TRACER is not set @@ -1410,6 +1483,7 @@ CONFIG_FTRACE=y CONFIG_BRANCH_PROFILE_NONE=y # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set # CONFIG_PROFILE_ALL_BRANCHES is not set +# CONFIG_STACK_TRACER is not set # CONFIG_KMEMTRACE is not set # CONFIG_WORKQUEUE_TRACER is not set # CONFIG_BLK_DEV_IO_TRACE is not set @@ -1417,12 +1491,13 @@ CONFIG_BRANCH_PROFILE_NONE=y # CONFIG_SAMPLES is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set -# CONFIG_KMEMCHECK is not set +# CONFIG_EARLY_PRINTK is not set CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="rw dhash_entries=1024 ihash_entries=1024 ip=10.0.1.3:10.0.1.1:10.0.1.1:255.255.255.0:zeus:eth0: root=/dev/nfs nfsroot=/nfsroot/cramfs,wsize=512,rsize=512,tcp nokgdb console=ttyUSB0,115200 memsize=252M" # CONFIG_CMDLINE_OVERRIDE is not set # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_RUNTIME_DEBUG is not set +# CONFIG_SPINLOCK_TEST is not set # # Security options @@ -1430,13 +1505,16 @@ CONFIG_CMDLINE="rw dhash_entries=1024 ihash_entries=1024 ip=10.0.1.3:10.0.1.1:10 # CONFIG_KEYS is not set # CONFIG_SECURITY is not set # CONFIG_SECURITYFS is not set -# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set # +CONFIG_DEFAULT_SECURITY_SMACK is not set # +CONFIG_DEFAULT_SECURITY_TOMOYO is not set CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" CONFIG_CRYPTO=y # # Crypto core or helper # -# CONFIG_CRYPTO_FIPS is not set CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_ALGAPI2=y CONFIG_CRYPTO_AEAD=y @@ -1479,11 +1557,13 @@ CONFIG_CRYPTO_CBC=y # CONFIG_CRYPTO_HMAC=y # CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set # # Digest # # CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_GHASH is not set # CONFIG_CRYPTO_MD4 is not set CONFIG_CRYPTO_MD5=y # CONFIG_CRYPTO_MICHAEL_MIC is not set diff --git a/arch/mips/include/asm/mach-powertv/asic.h b/arch/mips/include/asm/mach-powertv/asic.h index bcad43a..42f02da 100644 --- a/arch/mips/include/asm/mach-powertv/asic.h +++ b/arch/mips/include/asm/mach-powertv/asic.h @@ -1,5 +1,9 @@ /* - * Copyright (C) 2009 Cisco Systems, Inc. + * asic.h + * + * ASIC and resource specific information + * + * Copyright (C) 2009, Cisco Systems, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -20,7 +24,9 @@ #define _ASM_MACH_POWERTV_ASIC_H #include + #include +#include #define DVR_CAPABLE (1<<0) #define PCIE_CAPABLE (1<<1) diff --git a/arch/mips/include/asm/mach-powertv/mdesc.h b/arch/mips/include/asm/mach-powertv/mdesc.h new file mode 100644 index 0000000..d7dda02 --- /dev/null +++ b/arch/mips/include/asm/mach-powertv/mdesc.h @@ -0,0 +1,51 @@ +/* + * mdesc.h + * + * Copyright (C) 2009 Cisco Systems, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _ASM_MACH_POWERTV_MDESC_H +#define _ASM_MACH_POWERTV_MDESC_H + +#define MEM_EXTENT_MAX 8 + +enum Memory_Type { + MEM_EXTENT_OTHER, + MEM_EXTENT_LOW, + MEM_EXTENT_HIGH +}; + +struct mem_desc { + int nr_extent; + unsigned long mem_size; + struct mem_extent { + unsigned long phys_base; + unsigned long bus_base; + unsigned long size; + enum Memory_Type type; + } extent[MEM_EXTENT_MAX]; +}; + +extern struct mem_desc mdesc; + +extern bool is_bus_low(unsigned long addr); + +extern int mem_desc_add(unsigned long phys_base, unsigned long bus_base, + unsigned long size, enum Memory_Type type); extern void +mem_desc_init(void); + +#endif /* _ASM_MACH_POWERTV_MDESC_H */ diff --git a/arch/mips/powertv/Makefile b/arch/mips/powertv/Makefile index 0a0d73c..b1fce78 100644 --- a/arch/mips/powertv/Makefile +++ b/arch/mips/powertv/Makefile @@ -23,6 +23,6 @@ # under Linux. # -obj-y += init.o memory.o reset.o time.o powertv_setup.o asic/ pci/ +obj-y += init.o memory.o reset.o time.o powertv_setup.o mdesc.o asic/ pci/ EXTRA_CFLAGS += -Wall -Werror diff --git a/arch/mips/powertv/asic/asic_devices.c b/arch/mips/powertv/asic/asic_devices.c index 2174242..6b5f1e1 100644 --- a/arch/mips/powertv/asic/asic_devices.c +++ b/arch/mips/powertv/asic/asic_devices.c @@ -528,28 +528,6 @@ void __init configure_platform(void) pr_crit("Platform: UNKNOWN PLATFORM\n"); break; } - - switch (asic) { - case ASIC_ZEUS: - phys_to_bus_offset = 0x30000000; - break; - case ASIC_CALLIOPE: - phys_to_bus_offset = 0x10000000; - break; - case ASIC_CRONUSLITE: - /* Fall through */ - case ASIC_CRONUS: - /* - * TODO: We suppose 0x10000000 aliases into 0x20000000- - * 0x2XXXXXXX. If 0x10000000 aliases into 0x60000000- - * 0x6XXXXXXX, the offset should be 0x50000000, not 0x10000000. - */ - phys_to_bus_offset = 0x10000000; - break; - default: - phys_to_bus_offset = 0x00000000; - break; - } } /** diff --git a/arch/mips/powertv/mdesc.c b/arch/mips/powertv/mdesc.c new file mode 100644 index 0000000..7646292 --- /dev/null +++ b/arch/mips/powertv/mdesc.c @@ -0,0 +1,224 @@ +/* + * Copyright (C) 2010 Cisco Systems Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ +#include +#include +#include +#include +#include +#include + +#include +#include + +struct mem_desc mdesc; + +/* + * Determine whether the given bus address is in a low bank or not. + * Params: addr the bus address to check + * Returns: true if the bus address is in low, false if it isn't. + */ +bool is_bus_low(unsigned long addr) +{ + int i; + + for (i = 0; i < mdesc.nr_extent; i++) { + if ((mdesc.extent[i].type == MEM_EXTENT_LOW) && + ((addr >= mdesc.extent[i].bus_base) && + (addr < (mdesc.extent[i].bus_base + + mdesc.extent[i].size)))) + return true; + } + + return false; +} +EXPORT_SYMBOL(is_bus_low); + +int __init mem_desc_add(unsigned long phys_base, unsigned long bus_base, + unsigned long size, enum Memory_Type type) { + if (mdesc.nr_extent >= MEM_EXTENT_MAX) { + pr_err("mem_desc_add: The number of extents is too big!!!\n"); + return -1; + } + + if (size == 0) { + pr_err("mem_desc_add: Wrong memory size...\n"); + return -1; + } + + switch (type) { + case MEM_EXTENT_OTHER: + break; + case MEM_EXTENT_LOW: + mdesc.mem_size += size; + break; + case MEM_EXTENT_HIGH: +#ifdef CONFIG_HIGHMEM + mdesc.mem_size += size; +#endif + break; + default: + pr_err("mem_desc_add: Wrong memory type...\n"); + return -1; + } + + mdesc.extent[mdesc.nr_extent].phys_base = phys_base; + mdesc.extent[mdesc.nr_extent].bus_base = bus_base; + mdesc.extent[mdesc.nr_extent].size = size; + mdesc.extent[mdesc.nr_extent].type = type; + + mdesc.nr_extent++; + + return 0; +} + +void __init mem_desc_init(void) +{ + memset(&mdesc, 0, sizeof(mdesc)); +} + +#ifdef CONFIG_ARCH_HAS_DEVTREE_MEM +typedef u32 cell_t; + +static int num_addr_cells; +static int num_size_cells; + +static int num_extent; + +static inline int log10_extent(int nb) +{ + if (nb / 100) + return 3; + if (nb / 10) + return 2; + return 1; +} + +static int __init early_init_dt_scan_extent(unsigned long node, + const char *uname, int depth, void *data) { + char buf[8 + log10_extent(MEM_EXTENT_MAX)]; + unsigned long l; + char *memory_type; + enum Memory_Type type; + cell_t *reg, *endp; + unsigned long phys_base, bus_base; + unsigned long size; + + snprintf(buf, sizeof(buf), "memory@%d", num_extent); + + if (strcmp(uname, buf) != 0) + return 0; + + memory_type = of_get_flat_dt_prop(node, "memory_type", &l); + if (memory_type == NULL || l <= 0) + return 0; + + if (strcmp(memory_type, "low") == 0) + type = MEM_EXTENT_LOW; + else if (strcmp(memory_type, "high") == 0) + type = MEM_EXTENT_HIGH; + else + type = MEM_EXTENT_OTHER; + + reg = (cell_t *)of_get_flat_dt_prop(node, "reg", &l); + if (reg == NULL) + return 0; + + endp = reg + (l / sizeof(cell_t)); + + pr_info("memory scan node %s, reg size %ld, data: %x %x %x \n", + uname, l, reg[0], reg[1], reg[2]); + + while ((endp - reg) >= (num_addr_cells + num_size_cells)) { + phys_base = dt_mem_next_cell(1, ®); + bus_base = dt_mem_next_cell(1, ®); + size = dt_mem_next_cell(1, ®); + if (size == 0) + continue; + mem_desc_add(phys_base, bus_base, size, type); + } + + return 1; +} + +int __init early_init_dt_scan_memory_arch(unsigned long node, + const char *uname, int depth, void *data) { + u32 *prop; + + prop = of_get_flat_dt_prop(node, "#address-cells", NULL); + num_addr_cells = (prop == NULL) ? 2 : *prop; + + prop = of_get_flat_dt_prop(node, "#size-cells", NULL); + num_size_cells = (prop == NULL) ? 1 : *prop; + + do { + if (!of_scan_flat_dt(early_init_dt_scan_extent, NULL)) + break; + num_extent++; + } while (num_extent < MEM_EXTENT_MAX); + + return 0; +} + +void __init early_init_dt_add_memory_arch(u64 base, u64 size) { } + +/* + * The memory used by device tree blob may not be in the low system memory. + * If it is, the area of memory should be reserved by bootmem allocator in + * our platform; if not, i.e. the area of memory is in the bootloader area, + * no reservation is needed. + */ +int __init reserve_mem_mach(unsigned long addr, unsigned long size) { + int i; + + for (i = 0; i < mdesc.nr_extent; i++) { + if ((mdesc.extent[i].type == MEM_EXTENT_LOW) && + ((addr >= mdesc.extent[i].phys_base) && + (addr < (mdesc.extent[i].phys_base + + mdesc.extent[i].size)))) { + return reserve_bootmem(addr, size, BOOTMEM_DEFAULT); + } + } + + return 0; +} + +/* + * The same thing happens in freeing memory, please refer to comments in + * arch_reserve_mem. + */ +void __init free_mem_mach(unsigned long addr, unsigned long size) { + int i; + + for (i = 0; i < mdesc.nr_extent; i++) { + if ((mdesc.extent[i].type == MEM_EXTENT_LOW) && + ((addr >= mdesc.extent[i].phys_base) && + (addr < (mdesc.extent[i].phys_base + + mdesc.extent[i].size)))) { + free_bootmem(addr, size); + break; + } + } +} +#endif diff --git a/arch/mips/powertv/memory.c b/arch/mips/powertv/memory.c index f49eb3d..de89772 100644 --- a/arch/mips/powertv/memory.c +++ b/arch/mips/powertv/memory.c @@ -24,12 +24,16 @@ #include #include #include +#include +#include #include #include #include +#include #include +#include #include "init.h" @@ -46,36 +50,59 @@ char __initdata cmdline[COMMAND_LINE_SIZE]; void __init prom_meminit(void) { - char *memsize_str; - unsigned long memsize = 0; - unsigned int physend; char *ptr; + unsigned long memsize = 0; + char *memsize_str; int low_mem; - int high_mem; + int i; + + /* Initialize the memory description */ + mem_desc_init(); - /* Check the command line first for a memsize directive */ - strcpy(cmdline, arcs_cmdline); - ptr = strstr(cmdline, "memsize="); - if (ptr && (ptr != cmdline) && (*(ptr - 1) != ' ')) - ptr = strstr(ptr, " memsize="); + /* Check the command line first for a devicetree directive */ + strncpy(cmdline, arcs_cmdline, COMMAND_LINE_SIZE - 1); +#ifdef CONFIG_OF + ptr = strstr(cmdline, "devicetree="); + if (ptr && (ptr != cmdline) && (*(ptr - 1) != ' ')) + ptr = strstr(ptr, " devicetree="); if (ptr) { - memsize = memparse(ptr + 8, &ptr); - } else { - /* otherwise look in the environment */ - memsize_str = prom_getenv("memsize"); - - if (memsize_str != NULL) { - pr_info("prom memsize = %s\n", memsize_str); - memsize = simple_strtol(memsize_str, NULL, 0); - } + char buf[11]; + unsigned long devtree; + memcpy(buf, ptr + 11, 10); + buf[10] = '\0'; + strict_strtoul(buf, 16, &devtree); + early_init_devtree((void *)devtree); + memsize = mdesc.mem_size; + } +#endif - if (memsize == 0) { - if (_prom_memsize != 0) { + /* + * For backward compatibility (the device tree is not + * supported), we still check the command line for a + * memsize directive. + */ + if (0 == memsize) { + ptr = strstr(cmdline, "memsize="); + if (ptr && (ptr != cmdline) && (*(ptr - 1) != ' ')) + ptr = strstr(ptr, " memsize="); + + if (ptr) { + memsize = memparse(ptr + 8, &ptr); + } else { + /* otherwise look in the environment */ + memsize_str = prom_getenv("memsize"); + + if (memsize_str != NULL) { + pr_info("prom memsize = %s\n", memsize_str); + strict_strtol(memsize_str, 10, &memsize); + } else if (_prom_memsize != 0) { memsize = _prom_memsize; pr_info("_prom_memsize = 0x%lx\n", memsize); - /* add in memory that the bootloader doesn't - * report */ + /* + * add in memory that the bootloader + * doesn't report + */ memsize += BOOT_MEM_SIZE; } else { memsize = DEFAULT_MEMSIZE; @@ -83,86 +110,107 @@ void __init prom_meminit(void) "defaulting to 0x%lx\n", memsize); } } - } - physend = PFN_ALIGN(&_end) - 0x80000000; - if (memsize > LOW_MEM_MAX) { - low_mem = LOW_MEM_MAX; - high_mem = memsize - low_mem; - } else { - low_mem = memsize; - high_mem = 0; + if (memsize > LOW_MEM_MAX) + low_mem = LOW_MEM_MAX; + else + low_mem = memsize; + + switch (platform_get_family()) { + case FAMILY_1500: + case FAMILY_1500VZE: + case FAMILY_1500VZF: + /* generally used by the kernel in low. */ + mem_desc_add(PHYS_MEM_START, + 0x20000000, + low_mem, + MEM_EXTENT_LOW); + /* reserved for reset vector. */ + mem_desc_add(0x1fc00000, + 0x07fcffff, + MEBIBYTE(4), + MEM_EXTENT_OTHER); + break; + case FAMILY_4500: + case FAMILY_8500: + case FAMILY_8500RNG: + /* generally used by the kernel in low. */ + mem_desc_add(PHYS_MEM_START, + 0x40000000, + low_mem, + MEM_EXTENT_LOW); + /* reserved for reset vector. */ + mem_desc_add(0x1fc00000, + 0x07fcffff, + MEBIBYTE(4), + MEM_EXTENT_OTHER); + break; + case FAMILY_4600: + case FAMILY_4600VZA: + case FAMILY_8600: + case FAMILY_8600VZB: + /* generally used by the kernel in low. */ + mem_desc_add(PHYS_MEM_START, + 0x20000000, + low_mem, + MEM_EXTENT_LOW); + /* reserved for reset vector. */ + mem_desc_add(0x1fc00000, + 0x07fcffff, + MEBIBYTE(4), + MEM_EXTENT_OTHER); +#ifdef CONFIG_HIGHMEM + /* generally used by the kernel in high. */ + mem_desc_add(0x60000000, + 0x60000000, + MEBIBYTE(128), + MEM_EXTENT_HIGH); +#endif + break; + default: + /* generally used by the kernel in low. */ + mem_desc_add(PHYS_MEM_START, + 0x20000000, + MEBIBYTE(128), + MEM_EXTENT_LOW); + break; + } } -/* - * TODO: We will use the hard code for memory configuration until - * the bootloader releases their device tree to us. - */ - /* - * Add the memory reserved for use by the bootloader to the - * memory map. - */ - add_memory_region(PHYS_MEM_START, RES_BOOTLDR_MEMSIZE, - BOOT_MEM_RESERVED); -#ifdef CONFIG_HIGHMEM_256_128 - /* - * Add memory in low for general use by the kernel and its friends - * (like drivers, applications, etc). - */ - add_memory_region(PHYS_MEM_START + RES_BOOTLDR_MEMSIZE, - LOW_MEM_MAX - RES_BOOTLDR_MEMSIZE, BOOT_MEM_RAM); - /* - * Add the memory reserved for reset vector. - */ - add_memory_region(0x1fc00000, MEBIBYTE(4), BOOT_MEM_RESERVED); - /* - * Add the memory reserved. - */ - add_memory_region(0x20000000, MEBIBYTE(1024 + 75), BOOT_MEM_RESERVED); - /* - * Add memory in high for general use by the kernel and its friends - * (like drivers, applications, etc). - * - * 75MB is reserved for devices which are using the memory in high. - */ - add_memory_region(0x60000000 + MEBIBYTE(75), MEBIBYTE(128 - 75), - BOOT_MEM_RAM); -#elif defined CONFIG_HIGHMEM_128_128 - /* - * Add memory in low for general use by the kernel and its friends - * (like drivers, applications, etc). - */ - add_memory_region(PHYS_MEM_START + RES_BOOTLDR_MEMSIZE, - MEBIBYTE(128) - RES_BOOTLDR_MEMSIZE, BOOT_MEM_RAM); - /* - * Add the memory reserved. - */ - add_memory_region(PHYS_MEM_START + MEBIBYTE(128), - MEBIBYTE(128 + 1024 + 75), BOOT_MEM_RESERVED); - /* - * Add memory in high for general use by the kernel and its friends - * (like drivers, applications, etc). - * - * 75MB is reserved for devices which are using the memory in high. - */ - add_memory_region(0x60000000 + MEBIBYTE(75), MEBIBYTE(128 - 75), - BOOT_MEM_RAM); + /* Initialize the Boot Memory Map */ + for (i = 0; i < mdesc.nr_extent; i++) { + unsigned long start = mdesc.extent[i].phys_base; + unsigned long size = mdesc.extent[i].size; + long type; + switch (mdesc.extent[i].type) { + case MEM_EXTENT_LOW: + phys_to_bus_offset = mdesc.extent[i].bus_base - start; + /* reserved for bootloader. */ + add_memory_region(start, + BOOT_MEM_SIZE, + BOOT_MEM_RESERVED); + /* + * adjust the number of low memory after the + * space is reserved for bootloader. + */ + start += BOOT_MEM_SIZE; + size -= BOOT_MEM_SIZE; + type = BOOT_MEM_RAM; + break; + case MEM_EXTENT_HIGH: +#ifdef CONFIG_HIGHMEM + type = BOOT_MEM_RAM; #else - /* Add low memory regions for either: - * - no-highmemory configuration case -OR- - * - highmemory "HIGHMEM_LOWBANK_ONLY" case - */ - /* - * Add memory for general use by the kernel and its friends - * (like drivers, applications, etc). - */ - add_memory_region(PHYS_MEM_START + RES_BOOTLDR_MEMSIZE, - low_mem - RES_BOOTLDR_MEMSIZE, BOOT_MEM_RAM); - /* - * Add the memory reserved for reset vector. - */ - add_memory_region(0x1fc00000, MEBIBYTE(4), BOOT_MEM_RESERVED); + type = BOOT_MEM_RESERVED; #endif + break; + case MEM_EXTENT_OTHER: + default: + type = BOOT_MEM_RESERVED; + break; + } + add_memory_region(start, size, type); + } } void __init prom_free_prom_memory(void) -- 1.6.0.6 From David.Daney@caviumnetworks.com Tue May 11 02:12:24 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 May 2010 02:12:28 +0200 (CEST) Received: from mail3.caviumnetworks.com ([12.108.191.235]:10095 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492534Ab0EKAMY (ORCPT ); Tue, 11 May 2010 02:12:24 +0200 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Mon, 10 May 2010 17:12:37 -0700 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 10 May 2010 17:12:16 -0700 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Mon, 10 May 2010 17:12:16 -0700 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.3/8.14.3) with ESMTP id o4B0CCIg027581; Mon, 10 May 2010 17:12:12 -0700 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.3/8.14.3/Submit) id o4B0CAaN027580; Mon, 10 May 2010 17:12:10 -0700 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org Cc: Chandrakala Chavva , David Daney Subject: [PATCH] MIPS: Use compat version for n32 sys_ppoll. Date: Mon, 10 May 2010 17:11:54 -0700 Message-Id: <1273536714-27535-1-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.6.1 X-OriginalArrivalTime: 11 May 2010 00:12:16.0838 (UTC) FILETIME=[9D520E60:01CAF09E] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26657 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips From: Chandrakala Chavva The sys_ppoll() takes struct 'struct timespec'. This is different for n32 and n64 abi. Use the compat version to do the proper conversions. Signed-off-by: David Daney --- arch/mips/kernel/scall64-n32.S | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index 6ebc079..10f3343 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S @@ -385,7 +385,7 @@ EXPORT(sysn32_call_table) PTR sys_fchmodat PTR sys_faccessat PTR compat_sys_pselect6 - PTR sys_ppoll /* 6265 */ + PTR compat_sys_ppoll /* 6265 */ PTR sys_unshare PTR sys_splice PTR sys_sync_file_range -- 1.6.6.1 From ralf@linux-mips.org Tue May 11 02:31:57 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 May 2010 02:32:00 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:42156 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492491Ab0EKAb5 (ORCPT ); Tue, 11 May 2010 02:31:57 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o4B0Vrjn025787; Tue, 11 May 2010 01:31:54 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o4B0Vp5P025785; Tue, 11 May 2010 01:31:51 +0100 Date: Tue, 11 May 2010 01:31:51 +0100 From: Ralf Baechle To: David Daney Cc: linux-mips@linux-mips.org, Chandrakala Chavva Subject: Re: [PATCH] MIPS: Use compat version for n32 sys_ppoll. Message-ID: <20100511003150.GA22990@linux-mips.org> References: <1273536714-27535-1-git-send-email-ddaney@caviumnetworks.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1273536714-27535-1-git-send-email-ddaney@caviumnetworks.com> User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26658 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Mon, May 10, 2010 at 05:11:54PM -0700, David Daney wrote: > From: Chandrakala Chavva > > The sys_ppoll() takes struct 'struct timespec'. This is different > for n32 and n64 abi. Use the compat version to do the proper conversions. > > Signed-off-by: David Daney Sigh, this sort of fix has a long tradition. I'm glad we're maintaining it ;-) Patch applied. Thanks, Ralf From f.fainelli@gmail.com Tue May 11 11:19:40 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 May 2010 11:19:44 +0200 (CEST) Received: from mail-ww0-f49.google.com ([74.125.82.49]:35411 "EHLO mail-ww0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491111Ab0EKJTk (ORCPT ); Tue, 11 May 2010 11:19:40 +0200 Received: by wwb22 with SMTP id 22so2363042wwb.36 for ; Tue, 11 May 2010 02:19:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:sender:from:date:subject :mime-version:x-uid:x-length:organization:to:cc:content-type :content-transfer-encoding:message-id; bh=pbMVpo5rzswu2AWZFbFrR/dS6QYt5arYI0xs0PJJggg=; b=e3KtdDKBu1VAY/x4by5jhnNa4uOpgcLpIakuQMQNWCH0oMiMOKs0vbcWC+YKRr3Iga BXebz+vRknMkhKlIQxLuyvXorUl9D/5fh82s7hN8h6vEQqK5DfDR61XeIvRAbYjGhbSr SIj+u1vuUWUvo7Jrb5xuWprcFNrRFO0HAhx9I= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:date:subject:mime-version:x-uid:x-length:organization :to:cc:content-type:content-transfer-encoding:message-id; b=F4Zx5Q7n9FroVDyb4dBw1DtQyrdD/tMRImqvvr4G1bN0U2hHaDIqcUblrVqKgc2xyK ZnvrCBw/FyaGCxc9/vlVa1eKCi3jgX1keTwizihUAFkuSCKppkGV4oP+IsoSJkKA5PlA vFVJ5YdL+JhOBFr6wKcVDJfDdRPTxPfQF0sJ8= Received: by 10.216.156.133 with SMTP id m5mr3256589wek.115.1273569574153; Tue, 11 May 2010 02:19:34 -0700 (PDT) Received: from flexo.localnet (bobafett.staff.proxad.net [213.228.1.121]) by mx.google.com with ESMTPS id t70sm1990202weq.2.2010.05.11.02.19.32 (version=SSLv3 cipher=RC4-MD5); Tue, 11 May 2010 02:19:33 -0700 (PDT) From: Florian Fainelli Date: Tue, 11 May 2010 11:20:09 +0200 Subject: [PATCH 1/2] AR7: use ar7_has_high_vlynq() to determine watchdog base address MIME-Version: 1.0 X-UID: 64 X-Length: 1908 Organization: OpenWrt To: linux-mips@linux-mips.org Cc: Ralf Baechle Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201005111120.09710.florian@openwrt.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26659 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Instead of doing yet another switch/case on the chip_id, use existing inline function to set the watchdog base address. Signed-off-by: Florian Fainelli --- diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c index 2fafc78..1d4a466 100644 --- a/arch/mips/ar7/platform.c +++ b/arch/mips/ar7/platform.c @@ -576,7 +576,6 @@ static int __init ar7_register_devices(void) { void __iomem *bootcr; u32 val; - u16 chip_id; int res; res = ar7_register_uarts(); @@ -635,18 +634,10 @@ static int __init ar7_register_devices(void) val = readl(bootcr); iounmap(bootcr); if (val & AR7_WDT_HW_ENA) { - chip_id = ar7_chip_id(); - switch (chip_id) { - case AR7_CHIP_7100: - case AR7_CHIP_7200: - ar7_wdt_res.start = AR7_REGS_WDT; - break; - case AR7_CHIP_7300: + if (ar7_has_high_vlynq()) ar7_wdt_res.start = UR8_REGS_WDT; - break; - default: - break; - } + else + ar7_wdt_res.start = AR7_REGS_WDT; ar7_wdt_res.end = ar7_wdt_res.start + 0x20; res = platform_device_register(&ar7_wdt); From f.fainelli@gmail.com Tue May 11 11:20:03 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 May 2010 11:20:13 +0200 (CEST) Received: from mail-ww0-f49.google.com ([74.125.82.49]:38287 "EHLO mail-ww0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491121Ab0EKJTo (ORCPT ); Tue, 11 May 2010 11:19:44 +0200 Received: by wwb22 with SMTP id 22so2363077wwb.36 for ; Tue, 11 May 2010 02:19:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:sender:from:date:subject :mime-version:x-uid:x-length:organization:to:cc:content-type :content-transfer-encoding:message-id; bh=YzJloH84CeA6gRxYyBaw/R30Nz7cVx7M7JFuAEJKznA=; b=p0mT7kr5pyDHTpXWHN3v14/fyLY3+oCF5BqCIu3+KR77QgGuNeEyRACTkhM3j4Ne82 uSyYmGzJuwuhDU3iOsHF6ez/VvM+Pk51WArgWynZ3LX2rY3fYifMtIqp4f6oiBEYvxw/ w5iQRKGCh2oMVdg98FjqfX+p3f9KOv+omv0zE= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:date:subject:mime-version:x-uid:x-length:organization :to:cc:content-type:content-transfer-encoding:message-id; b=p/go7OT4tjCuNFhu1WI7sFk4hAqvKDKU7A9/E1ymncxJhiJhF/hBYHj0A4xr0nEdhU IxV52prIcrQ6B+SYyA6acJv64iabi/KDbSgEYimPT5ZqU6CsUL/7HRlk91HEB5aWRxsk WQgp/CCesHKbfs9BTvBu8k7FyglxAIG1CkWPI= Received: by 10.216.154.140 with SMTP id h12mr3247273wek.193.1273569578558; Tue, 11 May 2010 02:19:38 -0700 (PDT) Received: from flexo.localnet (bobafett.staff.proxad.net [213.228.1.121]) by mx.google.com with ESMTPS id g17sm1990000wee.5.2010.05.11.02.19.37 (version=SSLv3 cipher=RC4-MD5); Tue, 11 May 2010 02:19:37 -0700 (PDT) From: Florian Fainelli Date: Tue, 11 May 2010 11:20:14 +0200 Subject: [PATCH 2/2] AR7: prevent race between clock initialization and devices registration MIME-Version: 1.0 X-UID: 65 X-Length: 1535 Organization: OpenWrt To: linux-mips@linux-mips.org Cc: Ralf Baechle Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201005111120.14442.florian@openwrt.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26660 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips ar7_regiser_devices needs ar7_clocks_init to have been called first, however clock.o is currently linked later due to its order in the Makefile, therefore ar7_clocks_init always gets called later than ar7_register_devices because both have the same initcall level. Fix this by moving ar7_register_devices to the right initcall level. Reported-by: Michael J. Evans Signed-off-by: Florian Fainelli --- diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c index 1d4a466..566f2d7 100644 --- a/arch/mips/ar7/platform.c +++ b/arch/mips/ar7/platform.c @@ -647,4 +647,4 @@ static int __init ar7_register_devices(void) return 0; } -arch_initcall(ar7_register_devices); +device_initcall(ar7_register_devices); From ralf@linux-mips.org Tue May 11 12:00:16 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 May 2010 12:00:19 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:44724 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491105Ab0EKKAP (ORCPT ); Tue, 11 May 2010 12:00:15 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o4BA05wH014173; Tue, 11 May 2010 11:00:08 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o4BA03pX014171; Tue, 11 May 2010 11:00:03 +0100 Date: Tue, 11 May 2010 11:00:01 +0100 From: Ralf Baechle To: Wu Zhangjin Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] Oprofile: Loongson: Fixup of irq handler Message-ID: <20100511095958.GA13576@linux-mips.org> References: <1273165186-29153-1-git-send-email-wuzhangjin@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1273165186-29153-1-git-send-email-wuzhangjin@gmail.com> User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26661 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Thanks Wu, applied! Ralf From ralf@linux-mips.org Tue May 11 12:41:33 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 May 2010 12:41:37 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:39846 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491162Ab0EKKld (ORCPT ); Tue, 11 May 2010 12:41:33 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o4BAfTx5016704; Tue, 11 May 2010 11:41:30 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o4BAfSMO016702; Tue, 11 May 2010 11:41:28 +0100 Date: Tue, 11 May 2010 11:41:27 +0100 From: Ralf Baechle To: Wu Zhangjin Cc: linux-mips@linux-mips.org Subject: Re: [PATCH 1/5] Oprofile: Loongson: add an unified macro for setting events Message-ID: <20100511104127.GB13576@linux-mips.org> References: <7e8ede5c83ccf30e08b9fd2966694d3bcaeec776.1273166351.git.wuzhangjin@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <7e8ede5c83ccf30e08b9fd2966694d3bcaeec776.1273166351.git.wuzhangjin@gmail.com> User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26662 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Thanks, queued for 2.6.35. Ralf From ralf@linux-mips.org Tue May 11 12:41:55 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 May 2010 12:42:02 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:39849 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491166Ab0EKKll (ORCPT ); Tue, 11 May 2010 12:41:41 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o4BAfc38016713; Tue, 11 May 2010 11:41:38 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o4BAfcX8016712; Tue, 11 May 2010 11:41:38 +0100 Date: Tue, 11 May 2010 11:41:37 +0100 From: Ralf Baechle To: Wu Zhangjin Cc: linux-mips@linux-mips.org Subject: Re: [PATCH 2/5] Oprofile: Loongson: Remove unneeded Parentheses Message-ID: <20100511104137.GC13576@linux-mips.org> References: <211d09af2c3e38694f6a1cdb3954402c20adb70e.1273166351.git.wuzhangjin@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <211d09af2c3e38694f6a1cdb3954402c20adb70e.1273166351.git.wuzhangjin@gmail.com> User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26663 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Thanks, queued for 2.6.35. Ralf From ralf@linux-mips.org Tue May 11 12:42:21 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 May 2010 12:42:27 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:39852 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491169Ab0EKKlt (ORCPT ); Tue, 11 May 2010 12:41:49 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o4BAfk63016719; Tue, 11 May 2010 11:41:46 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o4BAfkKO016718; Tue, 11 May 2010 11:41:46 +0100 Date: Tue, 11 May 2010 11:41:46 +0100 From: Ralf Baechle To: Wu Zhangjin Cc: linux-mips@linux-mips.org Subject: Re: [PATCH 3/5] Oprofile: Loongson: Remove unneeded variable from loongson2_cpu_setup() Message-ID: <20100511104146.GD13576@linux-mips.org> References: <5ee1e74c10073d930580fe8e21f170a4986175e4.1273166351.git.wuzhangjin@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <5ee1e74c10073d930580fe8e21f170a4986175e4.1273166351.git.wuzhangjin@gmail.com> User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26664 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Thanks, queued for 2.6.35. Ralf From ralf@linux-mips.org Tue May 11 12:42:46 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 May 2010 12:42:51 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:39857 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491162Ab0EKKl4 (ORCPT ); Tue, 11 May 2010 12:41:56 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o4BAfsen016740; Tue, 11 May 2010 11:41:54 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o4BAfsw6016739; Tue, 11 May 2010 11:41:54 +0100 Date: Tue, 11 May 2010 11:41:54 +0100 From: Ralf Baechle To: Wu Zhangjin Cc: linux-mips@linux-mips.org Subject: Re: [PATCH 4/5] Oprofile: Loongson: Cleanup of the macros Message-ID: <20100511104154.GE13576@linux-mips.org> References: <128dc97848b717b4a0b11ba481a602ba144249a6.1273166351.git.wuzhangjin@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <128dc97848b717b4a0b11ba481a602ba144249a6.1273166351.git.wuzhangjin@gmail.com> User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26665 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Thanks, queued for 2.6.35. Ralf From ralf@linux-mips.org Tue May 11 12:43:10 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 May 2010 12:43:14 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:39860 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491173Ab0EKKmD (ORCPT ); Tue, 11 May 2010 12:42:03 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o4BAg1Gv016748; Tue, 11 May 2010 11:42:01 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o4BAg1B0016747; Tue, 11 May 2010 11:42:01 +0100 Date: Tue, 11 May 2010 11:42:01 +0100 From: Ralf Baechle To: Wu Zhangjin Cc: linux-mips@linux-mips.org Subject: Re: [PATCH 5/5] Oprofile: Loongson: Cleanup the comments Message-ID: <20100511104201.GF13576@linux-mips.org> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26666 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Thanks, queued for 2.6.35. Ralf From ralf@linux-mips.org Tue May 11 16:11:05 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 May 2010 16:11:08 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:32782 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491777Ab0EKOLE (ORCPT ); Tue, 11 May 2010 16:11:04 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o4BEAjjm027762; Tue, 11 May 2010 15:10:47 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o4BEAeKS027760; Tue, 11 May 2010 15:10:41 +0100 Date: Tue, 11 May 2010 15:10:40 +0100 From: Ralf Baechle To: Arnaud Patard Cc: linux-mips@linux-mips.org, rtc-linux@googlegroups.com, david-b@pacbell.net, a.zummo@towertech.it, akpm@linux-foundation.org Subject: Re: [PATCH] rtc-cmos: Fix binary mode support Message-ID: <20100511141039.GG13576@linux-mips.org> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26667 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Thu, Apr 29, 2010 at 11:58:44AM +0200, Arnaud Patard wrote: > [ I'm sending again this patch, hoping it'll get reviewed ] I'm showing mercy for the poor sod of a patch by merging it into -my tree for -next. Thanks Arnaud, Ralf From ralf@linux-mips.org Tue May 11 17:43:19 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 May 2010 17:43:22 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:48691 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491921Ab0EKPnT (ORCPT ); Tue, 11 May 2010 17:43:19 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o4BFhDWT000389; Tue, 11 May 2010 16:43:14 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o4BFhBEt000387; Tue, 11 May 2010 16:43:11 +0100 Date: Tue, 11 May 2010 16:43:08 +0100 From: Ralf Baechle To: Florian Fainelli Cc: linux-mips@linux-mips.org Subject: Re: [PATCH 1/4] AR7: update defconfig Message-ID: <20100511154308.GA29988@linux-mips.org> References: <201005021138.58177.florian@openwrt.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <201005021138.58177.florian@openwrt.org> User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26668 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Thanks, queued for 2.6.35. Ralf From ralf@linux-mips.org Tue May 11 17:43:41 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 May 2010 17:43:47 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:48694 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491926Ab0EKPnb (ORCPT ); Tue, 11 May 2010 17:43:31 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o4BFhT2w000744; Tue, 11 May 2010 16:43:29 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o4BFhTYV000736; Tue, 11 May 2010 16:43:29 +0100 Date: Tue, 11 May 2010 16:43:29 +0100 From: Ralf Baechle To: Florian Fainelli Cc: linux-mips@linux-mips.org Subject: Re: [PATCH 2/4] RB532: update defconfig Message-ID: <20100511154328.GB29988@linux-mips.org> References: <201005021139.02260.florian@openwrt.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <201005021139.02260.florian@openwrt.org> User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26669 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Thanks, queued for 2.6.35. Ralf From ralf@linux-mips.org Tue May 11 17:44:06 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 May 2010 17:44:11 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:48697 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491921Ab0EKPnn (ORCPT ); Tue, 11 May 2010 17:43:43 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o4BFhfr1001147; Tue, 11 May 2010 16:43:41 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o4BFhen0001143; Tue, 11 May 2010 16:43:40 +0100 Date: Tue, 11 May 2010 16:43:40 +0100 From: Ralf Baechle To: Florian Fainelli Cc: linux-mips@linux-mips.org Subject: Re: [PATCH 3/4] BCM47xx: update defconfig Message-ID: <20100511154340.GC29988@linux-mips.org> References: <201005021139.07656.florian@openwrt.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <201005021139.07656.florian@openwrt.org> User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26670 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Thanks, queued for 2.6.35. Ralf From ralf@linux-mips.org Tue May 11 17:44:30 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 May 2010 17:44:35 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:48703 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491935Ab0EKPn5 (ORCPT ); Tue, 11 May 2010 17:43:57 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o4BFhuDc001225; Tue, 11 May 2010 16:43:56 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o4BFhurx001224; Tue, 11 May 2010 16:43:56 +0100 Date: Tue, 11 May 2010 16:43:56 +0100 From: Ralf Baechle To: Florian Fainelli Cc: linux-mips@linux-mips.org Subject: Re: [PATCH 4/4] MTX-1: update defconfig Message-ID: <20100511154356.GD29988@linux-mips.org> References: <201005021139.12100.florian@openwrt.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <201005021139.12100.florian@openwrt.org> User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26671 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Thanks, queued for 2.6.35. Ralf From anemo@mba.ocn.ne.jp Tue May 11 17:45:21 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 May 2010 17:45:28 +0200 (CEST) Received: from mv-drv-hcb003.ocn.ad.jp ([118.23.109.133]:35381 "EHLO mv-drv-hcb003.ocn.ad.jp" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491935Ab0EKPpV (ORCPT ); Tue, 11 May 2010 17:45:21 +0200 Received: from vcmba.ocn.ne.jp (localhost.localdomain [127.0.0.1]) by mv-drv-hcb003.ocn.ad.jp (Postfix) with ESMTP id A5E7956421D; Wed, 12 May 2010 00:45:15 +0900 (JST) Received: from localhost (softbank221040169135.bbtec.net [221.40.169.135]) by vcmba.ocn.ne.jp (Postfix) with ESMTP; Wed, 12 May 2010 00:45:15 +0900 (JST) Date: Wed, 12 May 2010 00:45:12 +0900 (JST) Message-Id: <20100512.004512.39157093.anemo@mba.ocn.ne.jp> To: chris@mips.com Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] Fix abs.[sd] and neg.[sd] emulation for NaN operands From: Atsushi Nemoto In-Reply-To: <4BE85256.9010709@mips.com> References: <20091012215718.30362.67068.stgit@localhost.localdomain> <20100510.234946.229279777.anemo@mba.ocn.ne.jp> <4BE85256.9010709@mips.com> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 22.2 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26672 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Mon, 10 May 2010 11:37:10 -0700, Chris Dearman wrote: > >> if (xc == IEEE754_CLASS_SNAN) { > >> - SETCX(IEEE754_INVALID_OPERATION); > >> - return ieee754dp_nanxcpt(ieee754dp_indef(), "neg"); > >> + return ieee754dp_nanxcpt(ieee754dp_indef(), "abs"); > >> } ... > ieee754dp/sp_nanxcpt also sets the invalid exception bit so I think this > is duplicated code. I think the same fix should have been applied to > ieee754sp_neg/ieee754dp_neg for consistency. ieee754d/sp_nanxcpt will set the invalid exception bit if its first argument was a signaling NaN. And ieee754dp/sp_indef() is a quiet NaN. --- Atsushi Nemoto From ralf@linux-mips.org Tue May 11 19:22:55 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 May 2010 19:22:58 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:37872 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491889Ab0EKRWz (ORCPT ); Tue, 11 May 2010 19:22:55 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o4BHMrVI005539; Tue, 11 May 2010 18:22:54 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o4BHMrf3005537; Tue, 11 May 2010 18:22:53 +0100 Date: Tue, 11 May 2010 18:22:52 +0100 From: Ralf Baechle To: Florian Fainelli Cc: linux-mips@linux-mips.org Subject: Re: [PATCH -queue] BCM63xx: avoid namespace clash on GPIO_DIR_{IN,OUT} Message-ID: <20100511172252.GA3771@linux-mips.org> References: <201005041038.57783.ffainelli@freebox.fr> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <201005041038.57783.ffainelli@freebox.fr> User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26673 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Queued for 2.6.35. Thanks! Ralf From PeterHuewe@gmx.de Tue May 11 20:42:34 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 May 2010 20:42:37 +0200 (CEST) Received: from mail.gmx.net ([213.165.64.20]:36003 "HELO mail.gmx.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with SMTP id S1491942Ab0EKSme convert rfc822-to-8bit (ORCPT ); Tue, 11 May 2010 20:42:34 +0200 Received: (qmail invoked by alias); 11 May 2010 18:42:19 -0000 Received: from dslb-084-056-028-235.pools.arcor-ip.net (EHLO lamer.localnet) [84.56.28.235] by mail.gmx.net (mp004) with SMTP; 11 May 2010 20:42:19 +0200 X-Authenticated: #12255092 X-Provags-ID: V01U2FsdGVkX1/IvmtEpuzI/vNBXd0uWx3n38FlkPDZvnH6PzkcLx vq/2G2oDwrXpa8 From: Peter =?iso-8859-1?q?H=FCwe?= To: Mauro Carvalho Chehab Subject: Re: [PATCH] media/IR: Add missing include file to rc-map.c Date: Tue, 11 May 2010 20:42:14 +0200 User-Agent: KMail/1.12.4 (Linux/2.6.33.2; KDE/4.3.5; x86_64; ; ) Cc: linuxppc-dev@ozlabs.org, "David =?iso-8859-1?q?H=E4rdeman?=" , linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sh@vger.kernel.org, linux-mips@linux-mips.org, linux-m68k@lists.linux-m68k.org References: <201005051720.22617.PeterHuewe@gmx.de> In-Reply-To: <201005051720.22617.PeterHuewe@gmx.de> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-1" Content-Transfer-Encoding: 8BIT Message-Id: <201005112042.14889.PeterHuewe@gmx.de> X-Y-GMX-Trusted: 0 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26674 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: PeterHuewe@gmx.de Precedence: bulk X-list: linux-mips Am Mittwoch 05 Mai 2010 17:20:21 schrieb Peter Hüwe: > From: Peter Huewe > > This patch adds a missing include linux/delay.h to prevent > build failures[1-5] > > Signed-off-by: Peter Huewe > --- Any updates on this patch? Issue still exists with today's linux-next tree Thanks, Peter From ralf@linux-mips.org Tue May 11 20:48:50 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 May 2010 20:48:53 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:32878 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491967Ab0EKSst (ORCPT ); Tue, 11 May 2010 20:48:49 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o4BImjmR009215; Tue, 11 May 2010 19:48:46 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o4BImi6T009213; Tue, 11 May 2010 19:48:44 +0100 Date: Tue, 11 May 2010 19:48:44 +0100 From: Ralf Baechle To: Takashi Iwai Cc: wuzhangjin@gmail.com, linux-mips Subject: Re: About MIPS specific dma_mmap_coherent() Message-ID: <20100511184844.GA7978@linux-mips.org> References: <1271134735.25797.35.camel@falcon> <1271218889.25872.27.camel@falcon> <1271235619.25872.148.camel@falcon> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26675 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Wed, Apr 14, 2010 at 05:46:13PM +0200, Takashi Iwai wrote: > But, I remember vaguely that calling pgprot_noncached() > unconditionally is dangerous. It should be checked somehow, e.g. via > platform_device_is_coherent(). And, this found only in > dma-coherence.h, and adding it to pcm_native.c would become messy like > below... > > So, it'd be really better to add dma_mmap_coherent(), indeed. We agreed that this was only meant as a stop gap meassure. As such I do agree with either of http://patchwork.linux-mips.org/patch/1117/ http://patchwork.linux-mips.org/patch/1118/ Wu has tested the 1117 patch so that might make it preferable especially for 2.6.34 if we should go for that. Ralf From ralf@linux-mips.org Wed May 12 01:06:17 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 12 May 2010 01:06:20 +0200 (CEST) Received: from h5.dl5rb.org.uk ([81.2.74.5]:57953 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492097Ab0EKXGR (ORCPT ); Wed, 12 May 2010 01:06:17 +0200 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o4BN6BOn017047; Wed, 12 May 2010 00:06:12 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o4BN6Agc017045; Wed, 12 May 2010 00:06:10 +0100 Date: Wed, 12 May 2010 00:06:09 +0100 From: Ralf Baechle To: "Dezhong Diao (dediao)" Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] Apply kmap_high_get with MIPS Message-ID: <20100511230609.GB13271@linux-mips.org> References: <7A9214B0DEB2074FBCA688B30B04400DBBA5E5@XMB-RCD-208.cisco.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <7A9214B0DEB2074FBCA688B30B04400DBBA5E5@XMB-RCD-208.cisco.com> User-Agent: Mutt/1.5.20 (2009-08-17) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26676 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Mon, May 03, 2010 at 06:40:04PM -0500, Dezhong Diao (dediao) wrote: At a glance this looks sane. The patch got linewrapped however so you'd need to re-send it, please. I noticed that in http://patchwork.linux-mips.org/patch/1170/ the patch got truncated after the first segment for highmem.c but wasn't on the list. Hm... Ralf From chris@mips.com Wed May 12 03:30:18 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 12 May 2010 03:30:21 +0200 (CEST) Received: from dns1.mips.com ([63.167.95.197]:54824 "EHLO dns1.mips.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492152Ab0ELBaS (ORCPT ); Wed, 12 May 2010 03:30:18 +0200 Received: from MTVEXCHANGE.mips.com ([192.168.36.60]) by dns1.mips.com (8.13.8/8.13.8) with ESMTP id o4C1U9Xi030092; Tue, 11 May 2010 18:30:09 -0700 Received: from [192.168.65.41] ([192.168.65.41]) by MTVEXCHANGE.mips.com with Microsoft SMTPSVC(6.0.3790.3959); Tue, 11 May 2010 18:29:26 -0700 Message-ID: <4BEA04A1.5030207@mips.com> Date: Tue, 11 May 2010 18:30:09 -0700 From: Chris Dearman Organization: MIPS Technologies User-Agent: Thunderbird 2.0.0.24 (X11/20100411) MIME-Version: 1.0 To: Atsushi Nemoto CC: linux-mips@linux-mips.org Subject: Re: [PATCH] Fix abs.[sd] and neg.[sd] emulation for NaN operands References: <20091012215718.30362.67068.stgit@localhost.localdomain> <20100510.234946.229279777.anemo@mba.ocn.ne.jp> <4BE85256.9010709@mips.com> <20100512.004512.39157093.anemo@mba.ocn.ne.jp> In-Reply-To: <20100512.004512.39157093.anemo@mba.ocn.ne.jp> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 12 May 2010 01:29:26.0298 (UTC) FILETIME=[8F1B57A0:01CAF172] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26677 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: chris@mips.com Precedence: bulk X-list: linux-mips Atsushi Nemoto wrote: > > ieee754d/sp_nanxcpt will set the invalid exception bit if its first > argument was a signaling NaN. And ieee754dp/sp_indef() is a quiet > NaN. You're right! I'll send a separate patch with an appropriate subject to correct this. Thanks Chris -- Chris Dearman Desk: +1 408 530 5092 Cell: +1 408 398 5531 MIPS Technologies Inc 955 East Arques Ave, Sunnyvale CA 94085 From chris@mips.com Wed May 12 03:30:47 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 12 May 2010 03:30:54 +0200 (CEST) Received: from dns1.mips.com ([63.167.95.197]:43156 "EHLO dns1.mips.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492143Ab0ELBar (ORCPT ); Wed, 12 May 2010 03:30:47 +0200 Received: from MTVEXCHANGE.mips.com ([192.168.36.60]) by dns1.mips.com (8.13.8/8.13.8) with ESMTP id o4C1UYvH030096 for ; Tue, 11 May 2010 18:30:39 -0700 Received: from linux-chris2 ([192.168.65.41]) by MTVEXCHANGE.mips.com with Microsoft SMTPSVC(6.0.3790.3959); Tue, 11 May 2010 18:29:50 -0700 Received: from localhost ([127.0.0.1] helo=localhost.localdomain) by linux-chris2 with esmtp (Exim 4.69) (envelope-from ) id 1OC0mQ-0001hC-8R; Tue, 11 May 2010 18:30:34 -0700 From: Chris Dearman Subject: [PATCH] Restore signalling NaN behaviour for abs.[sd] To: linux-mips@linux-mips.org Date: Tue, 11 May 2010 18:30:34 -0700 Message-ID: <20100512013034.6493.20675.stgit@localhost.localdomain> In-Reply-To: <20100512.004512.39157093.anemo@mba.ocn.ne.jp> References: <20100512.004512.39157093.anemo@mba.ocn.ne.jp> User-Agent: StGIT/0.14.2 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 12 May 2010 01:29:51.0016 (UTC) FILETIME=[9DD70280:01CAF172] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26678 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: chris@mips.com Precedence: bulk X-list: linux-mips Atsushi Nemoto spotted that this had been incorrectly removed in a previous patch Signed-off-by: Chris Dearman --- arch/mips/math-emu/dp_simple.c | 1 + arch/mips/math-emu/sp_simple.c | 1 + 2 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/mips/math-emu/dp_simple.c b/arch/mips/math-emu/dp_simple.c index d9ae1db..b909742 100644 --- a/arch/mips/math-emu/dp_simple.c +++ b/arch/mips/math-emu/dp_simple.c @@ -78,6 +78,7 @@ ieee754dp ieee754dp_abs(ieee754dp x) DPSIGN(x) = 0; if (xc == IEEE754_CLASS_SNAN) { + SETCX(IEEE754_INVALID_OPERATION); return ieee754dp_nanxcpt(ieee754dp_indef(), "abs"); } diff --git a/arch/mips/math-emu/sp_simple.c b/arch/mips/math-emu/sp_simple.c index 3175477..2fd53c9 100644 --- a/arch/mips/math-emu/sp_simple.c +++ b/arch/mips/math-emu/sp_simple.c @@ -78,6 +78,7 @@ ieee754sp ieee754sp_abs(ieee754sp x) SPSIGN(x) = 0; if (xc == IEEE754_CLASS_SNAN) { + SETCX(IEEE754_INVALID_OPERATION); return ieee754sp_nanxcpt(ieee754sp_indef(), "abs"); } From wuzhangjin@gmail.com Wed May 12 08:42:23 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 12 May 2010 08:42:26 +0200 (CEST) Received: from mail-pw0-f49.google.com ([209.85.160.49]:35295 "EHLO mail-pw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491137Ab0ELGmX (ORCPT ); Wed, 12 May 2010 08:42:23 +0200 Received: by pwj6 with SMTP id 6so344222pwj.36 for ; Tue, 11 May 2010 23:42:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; 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Tue, 11 May 2010 23:42:13 -0700 (PDT) Subject: Re: About MIPS specific dma_mmap_coherent() From: Wu Zhangjin Reply-To: wuzhangjin@gmail.com To: Ralf Baechle Cc: Takashi Iwai , linux-mips In-Reply-To: <20100511184844.GA7978@linux-mips.org> References: <1271134735.25797.35.camel@falcon> <1271218889.25872.27.camel@falcon> <1271235619.25872.148.camel@falcon> <20100511184844.GA7978@linux-mips.org> Content-Type: text/plain; charset="UTF-8" Organization: DSLab, Lanzhou University, China Date: Wed, 12 May 2010 14:42:08 +0800 Message-ID: <1273646528.25828.1.camel@localhost> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26679 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips Hi, Ralf & Takashi On Tue, 2010-05-11 at 19:48 +0100, Ralf Baechle wrote: > On Wed, Apr 14, 2010 at 05:46:13PM +0200, Takashi Iwai wrote: > > > But, I remember vaguely that calling pgprot_noncached() > > unconditionally is dangerous. It should be checked somehow, e.g. via > > platform_device_is_coherent(). And, this found only in > > dma-coherence.h, and adding it to pcm_native.c would become messy like > > below... > > > > So, it'd be really better to add dma_mmap_coherent(), indeed. > > We agreed that this was only meant as a stop gap meassure. As such I do > agree with either of > > http://patchwork.linux-mips.org/patch/1117/ > http://patchwork.linux-mips.org/patch/1118/ > > Wu has tested the 1117 patch so that might make it preferable especially > for 2.6.34 if we should go for that. > Just tested 1118, it works too ;) Regards, Wu Zhangjin From tiwai@suse.de Wed May 12 10:41:28 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 12 May 2010 10:41:35 +0200 (CEST) Received: from cantor2.suse.de ([195.135.220.15]:34462 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491187Ab0ELIl2 (ORCPT ); Wed, 12 May 2010 10:41:28 +0200 Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.221.2]) by mx2.suse.de (Postfix) with ESMTP id 6A03987104; Wed, 12 May 2010 10:41:28 +0200 (CEST) Date: Wed, 12 May 2010 10:41:28 +0200 Message-ID: From: Takashi Iwai To: Ralf Baechle Cc: wuzhangjin@gmail.com, linux-mips Subject: Re: About MIPS specific dma_mmap_coherent() In-Reply-To: <20100511184844.GA7978@linux-mips.org> References: <1271134735.25797.35.camel@falcon> <1271218889.25872.27.camel@falcon> <1271235619.25872.148.camel@falcon> <20100511184844.GA7978@linux-mips.org> User-Agent: Wanderlust/2.15.6 (Almost Unreal) SEMI/1.14.6 (Maruoka) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.7 Emacs/23.1 (x86_64-suse-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-Type: text/plain; charset=US-ASCII Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26680 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiwai@suse.de Precedence: bulk X-list: linux-mips At Tue, 11 May 2010 19:48:44 +0100, Ralf Baechle wrote: > > On Wed, Apr 14, 2010 at 05:46:13PM +0200, Takashi Iwai wrote: > > > But, I remember vaguely that calling pgprot_noncached() > > unconditionally is dangerous. It should be checked somehow, e.g. via > > platform_device_is_coherent(). And, this found only in > > dma-coherence.h, and adding it to pcm_native.c would become messy like > > below... > > > > So, it'd be really better to add dma_mmap_coherent(), indeed. > > We agreed that this was only meant as a stop gap meassure. As such I do > agree with either of > > http://patchwork.linux-mips.org/patch/1117/ > http://patchwork.linux-mips.org/patch/1118/ > > Wu has tested the 1117 patch so that might make it preferable especially > for 2.6.34 if we should go for that. OK, I merged the patch now as Wu confirmed it's working. Will be included in the next pull request. thanks, Takashi From wuzhangjin@gmail.com Wed May 12 15:23:44 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 12 May 2010 15:23:48 +0200 (CEST) Received: from mail-pw0-f49.google.com ([209.85.160.49]:56482 "EHLO mail-pw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491917Ab0ELNXo (ORCPT ); Wed, 12 May 2010 15:23:44 +0200 Received: by pwj6 with SMTP id 6so511839pwj.36 for ; Wed, 12 May 2010 06:23:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer; bh=3TDN87lHPm1AlPhk7XbnOWgVybOvcKtcZe0swu3crnk=; b=Q5LGvZf8/AOeSJrmFZxw5QlozluVammd7ZRdondm0D5n2J9IqPcbrmnBtMB5LjRV0t 4EIe7xRrRUKkm6wWeuQgp6H9U6kO9ZikAf6dBG7v4CtRQNNjBmEq6oilzEGLM3yufRt9 G++zVIN+7CGvft/iKtk208oryQ4du4PMS+pOo= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; b=SLXlosydJoyG1gTHP2vhxh71YacSE1qt5AfyxcJra79b5a6O4ai5w2wzk1CqkEf2m4 wISYxsJc0+wN8OBbrnfljn0bgyaCvkK4JZrxLJYRx+jjNbeBNhonzx4x8NuGBQuJGVTR bAohVAiM90+UkgGcgznDcQGFd1zHXYeJBpHFY= Received: by 10.115.84.6 with SMTP id m6mr5841189wal.59.1273670616783; Wed, 12 May 2010 06:23:36 -0700 (PDT) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id b6sm1273475wam.21.2010.05.12.06.23.34 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 12 May 2010 06:23:36 -0700 (PDT) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips , Wu Zhangjin Subject: [PATCH v6 0/9] tracing: MIPS: add misc fixups and cleanups Date: Wed, 12 May 2010 21:23:08 +0800 Message-Id: X-Mailer: git-send-email 1.7.0.4 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26681 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips From: Wu Zhangjin This patchset adds misc fixups and cleanups for Ftrace of MIPS: + Fix the support of 32bit support with -mmcount-ra-address of gcc 4.5 o tracing: MIPS: mcount.S: Fixup of the 32bit support with gcc 4.5 The argument is passed by $12 in 32bit, not t0. o tracing: MIPS: Fixup of the 32bit support with -mmcount-ra-address For 32bit kernel, the offset of "b 1f" should be 5 instructions, not only 4. + Speedup the dynamic function tracer o tracing: MIPS: Reduce the overhead of dynamic Function Tracer In the old implementation, we have encode the 'nop' instruction and the instruction of calling to mcount at run-time, which may add some overhead. We reduce this overhead via encoding them when initializing the dynamic function tracer. + Lots of cleanups o The other patches. ---------------- Changes from v5: o splits up the old v5 revision into several patches to make the maintainer happier to review it. Regards, Wu Zhangjin Wu Zhangjin (9): tracing: MIPS: mcount.S: merge the same continuous #ifdefs tracing: MIPS: mcount.S: Fixup of the 32bit support with gcc 4.5 tracing: MIPS: mcount.S: cleanup the arguments of prepare_ftrace_return tracing: MIPS: mcount.S: cleanup of the comments tracing: MIPS: Fixup of the 32bit support with -mmcount-ra-address tracing: MIPS: cleanup of the instructions tracing: MIPS: Reduce the overhead of dynamic Function Tracer tracing: MIPS: cleanup of function graph tracer tracing: MIPS: cleanup of the address space checking arch/mips/kernel/ftrace.c | 179 +++++++++++++++++++++++++++------------------ arch/mips/kernel/mcount.S | 49 +++++++----- 2 files changed, 135 insertions(+), 93 deletions(-) From wuzhangjin@gmail.com Wed May 12 15:24:06 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 12 May 2010 15:24:13 +0200 (CEST) Received: from mail-pw0-f49.google.com ([209.85.160.49]:56482 "EHLO mail-pw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491924Ab0ELNX4 (ORCPT ); Wed, 12 May 2010 15:23:56 +0200 Received: by mail-pw0-f49.google.com with SMTP id 6so511839pwj.36 for ; Wed, 12 May 2010 06:23:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:in-reply-to:references; bh=XdwDEiJB1OR8QQQP7z/6LGY0uLnjSJF+kxyFjiC3dfY=; b=u04p7KWYmv80ow5nC2Fg1iGG2UOdvDH6UiZNg+0QCcucDzMw/MC/R31ZWilAhnbuz+ bh16WsG6XGjkna8JVFsFKhvKqg1tHFnjVDlyYw8mZNr41/OZw/LqSq7D8aXVHoV1aFBP HPreQhFdPjnyTmUeyMcwnIuyvzU28UtdPI22s= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=mV3iFNk5RQAj/T8mXQm7KNB3em0x5Bkr1I1pMyDsBph9G8LqY6W+i199HqFNxIBGJ8 uKtEKaPVAcRM/S11kC97l4udnf0m0RjbvRaf5de6ffrHqkHi4X+VFB+i2X82g33mu7Cr s/YJhG7iXG6kopLDsg3xbiaFCAjVei3aioVvY= Received: by 10.115.100.21 with SMTP id c21mr3453994wam.105.1273670635781; Wed, 12 May 2010 06:23:55 -0700 (PDT) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id b6sm1273475wam.21.2010.05.12.06.23.53 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 12 May 2010 06:23:55 -0700 (PDT) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips , Wu Zhangjin Subject: [PATCH 1/9] tracing: MIPS: mcount.S: merge the same continuous #ifdefs Date: Wed, 12 May 2010 21:23:09 +0800 Message-Id: <6727e6718df351f8f74f55520d3f7b093f72b92a.1273669419.git.wuzhangjin@gmail.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: In-Reply-To: References: Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26682 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips From: Wu Zhangjin There are two same continuous #ifdefs, this patch merges them to reduce two lines. Signed-off-by: Wu Zhangjin --- arch/mips/kernel/mcount.S | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-) diff --git a/arch/mips/kernel/mcount.S b/arch/mips/kernel/mcount.S index 6851fc9..e256bf9 100644 --- a/arch/mips/kernel/mcount.S +++ b/arch/mips/kernel/mcount.S @@ -45,8 +45,6 @@ PTR_L a5, PT_R9(sp) PTR_L a6, PT_R10(sp) PTR_L a7, PT_R11(sp) -#endif -#ifdef CONFIG_64BIT PTR_ADDIU sp, PT_SIZE #else PTR_ADDIU sp, (PT_SIZE + 8) -- 1.7.0.4 From wuzhangjin@gmail.com Wed May 12 15:24:33 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 12 May 2010 15:24:40 +0200 (CEST) Received: from mail-pv0-f177.google.com ([74.125.83.177]:58459 "EHLO mail-pv0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491929Ab0ELNYM (ORCPT ); Wed, 12 May 2010 15:24:12 +0200 Received: by pvc30 with SMTP id 30so40862pvc.36 for ; Wed, 12 May 2010 06:24:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:in-reply-to:references; bh=OXlyUj49EO2pBkuow6vJXRWkmMi9OGFwxKGGZcgnjZc=; b=bHO/CXCzOK17cQoHF4wKeJdKfJ5idmaFMlpH3zSMnB3nRR2jNQroIIyOm0x2adoVXX Cnbrf7LhM5cKBs7VzbYvUEdFEFy+PgA9cdvKfLyIJp/P6LGE6b2lnxd34ffFylH+AfTu 3mZMzsCCayi09NKlPV3PRUWK5mQywbja09Gpc= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=Ssm4AFBdYtwFRve59vv5hrnWNAg5FYm3JKjOT5Jj1ghVB1jVExEHF0Tbsfgl9pNnr4 sJeCpHj3d8Ndv1TakFh5iiOYpHphhPANNbSU6QatkyJWrK1tgBD97JZYpj9Aas8wyZEn IlmXL3r6YACYbvbs2v/7IFYo7YY/FWHW+v0ac= Received: by 10.114.7.35 with SMTP id 35mr5861351wag.4.1273670639259; Wed, 12 May 2010 06:23:59 -0700 (PDT) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id b6sm1273475wam.21.2010.05.12.06.23.57 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 12 May 2010 06:23:58 -0700 (PDT) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips , Wu Zhangjin Subject: [PATCH 2/9] tracing: MIPS: mcount.S: Fixup of the 32bit support with gcc 4.5 Date: Wed, 12 May 2010 21:23:10 +0800 Message-Id: X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: In-Reply-To: References: Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26683 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips From: Wu Zhangjin As the doc[1] of gcc-4.5 shows, the -mmcount-ra-address uses register $12 to transfer the stack offset of the return address to the _mcount function. in 64bit kernel, $12 is t0, but in 32bit kernel, it is t4, so, we need to use $12 instead of t0 here to cover the 64bit and 32bit support. [1] Gcc doc: MIPS Options http://gcc.gnu.org/onlinedocs/gcc/MIPS-Options.html Signed-off-by: Wu Zhangjin --- arch/mips/kernel/mcount.S | 10 +++++----- 1 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/mips/kernel/mcount.S b/arch/mips/kernel/mcount.S index e256bf9..92d1540 100644 --- a/arch/mips/kernel/mcount.S +++ b/arch/mips/kernel/mcount.S @@ -69,7 +69,7 @@ _mcount: MCOUNT_SAVE_REGS #ifdef KBUILD_MCOUNT_RA_ADDRESS - PTR_S t0, PT_R12(sp) /* t0 saved the location of the return address(at) by -mmcount-ra-address */ + PTR_S $12, PT_R12(sp) /* $12 saved the location of the return address(at) by -mmcount-ra-address */ #endif move a0, ra /* arg1: next ip, selfaddr */ @@ -135,7 +135,7 @@ NESTED(ftrace_graph_caller, PT_SIZE, ra) #ifdef CONFIG_DYNAMIC_FTRACE PTR_L a1, PT_R31(sp) /* load the original ra from the stack */ #ifdef KBUILD_MCOUNT_RA_ADDRESS - PTR_L t0, PT_R12(sp) /* load the original t0 from the stack */ + PTR_L $12, PT_R12(sp) /* load the original $12 from the stack */ #endif #else MCOUNT_SAVE_REGS @@ -143,10 +143,10 @@ NESTED(ftrace_graph_caller, PT_SIZE, ra) #endif #ifdef KBUILD_MCOUNT_RA_ADDRESS - bnez t0, 1f /* non-leaf func: t0 saved the location of the return address */ + bnez $12, 1f /* non-leaf func: $12 saved the location of the return address */ nop - PTR_LA t0, PT_R1(sp) /* leaf func: get the location of at(old ra) from our own stack */ -1: move a0, t0 /* arg1: the location of the return address */ + PTR_LA $12, PT_R1(sp) /* leaf func: get the location of at(old ra) from our own stack */ +1: move a0, $12 /* arg1: the location of the return address */ #else PTR_LA a0, PT_R1(sp) /* arg1: &AT -> a0 */ #endif -- 1.7.0.4 From wuzhangjin@gmail.com Wed May 12 15:24:59 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 12 May 2010 15:25:04 +0200 (CEST) Received: from mail-pv0-f177.google.com ([74.125.83.177]:58459 "EHLO mail-pv0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491961Ab0ELNYQ (ORCPT ); Wed, 12 May 2010 15:24:16 +0200 Received: by mail-pv0-f177.google.com with SMTP id 30so40862pvc.36 for ; Wed, 12 May 2010 06:24:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:in-reply-to:references; bh=WEj3lOc32U7T+DIUTdePusY6pim8mMz/xVyGgNafz2U=; b=bXBVU3ejARXc4otwNxQf86NrFxQIm38iC/Y9NxoSnhfcBRT/TKvsfj49pT/ajPX6tQ 0t7fswAJHuzSo8Pxx9D8BFTYU+yZmatmfOKHY68RYyis07vgsvlFDPr3OsQBJFzVFF9p 3O4z4TNaMxCSvsvx7vuZQfp8/ENVlnHIxRISw= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=pLxUS1Jh3G7TewWFD6x9GD40Iws/eFjbz08LJ3lyHwip1rrlAXJ3bCeRGQ0xAYiRJn phcBU/Yw/GiNssxJ/i7n2w9z/L0Ybji3Ye26CY0OJSWS8OP7oCSmMzqHHIUk5vZ7tccZ +aHZ7IWd5zyKegt8JLBM6ArOamdfJI9hW0G8I= Received: by 10.115.38.22 with SMTP id q22mr5856182waj.41.1273670655409; Wed, 12 May 2010 06:24:15 -0700 (PDT) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id b6sm1273475wam.21.2010.05.12.06.24.13 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 12 May 2010 06:24:14 -0700 (PDT) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips , Wu Zhangjin Subject: [PATCH 4/9] tracing: MIPS: mcount.S: cleanup of the comments Date: Wed, 12 May 2010 21:23:12 +0800 Message-Id: X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: In-Reply-To: References: Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26684 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips From: Wu Zhangjin This patch cleans the comments up. Signed-off-by: Wu Zhangjin --- arch/mips/kernel/mcount.S | 11 ++++++----- 1 files changed, 6 insertions(+), 5 deletions(-) diff --git a/arch/mips/kernel/mcount.S b/arch/mips/kernel/mcount.S index 991cbdf..84303bf 100644 --- a/arch/mips/kernel/mcount.S +++ b/arch/mips/kernel/mcount.S @@ -6,6 +6,7 @@ * more details. * * Copyright (C) 2009 Lemote Inc. & DSLab, Lanzhou University, China + * Copyright (C) 2010 DSLab, Lanzhou University, China * Author: Wu Zhangjin */ @@ -69,14 +70,14 @@ _mcount: MCOUNT_SAVE_REGS #ifdef KBUILD_MCOUNT_RA_ADDRESS - PTR_S $12, PT_R12(sp) /* $12 saved the location of the return address(at) by -mmcount-ra-address */ + PTR_S $12, PT_R12(sp) /* save location of parent's return address */ #endif - move a0, ra /* arg1: next ip, selfaddr */ + move a0, ra /* arg1: self return address */ .globl ftrace_call ftrace_call: nop /* a placeholder for the call to a real tracing function */ - move a1, AT /* arg2: the caller's next ip, parent */ + move a1, AT /* arg2: parent's return address */ #ifdef CONFIG_FUNCTION_GRAPH_TRACER .globl ftrace_graph_call @@ -117,9 +118,9 @@ NESTED(_mcount, PT_SIZE, ra) static_trace: MCOUNT_SAVE_REGS - move a0, ra /* arg1: next ip, selfaddr */ + move a0, ra /* arg1: self return address */ jalr t2 /* (1) call *ftrace_trace_function */ - move a1, AT /* arg2: the caller's next ip, parent */ + move a1, AT /* arg2: parent's return address */ MCOUNT_RESTORE_REGS .globl ftrace_stub -- 1.7.0.4 From wuzhangjin@gmail.com Wed May 12 15:25:24 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 12 May 2010 15:25:29 +0200 (CEST) Received: from mail-px0-f177.google.com ([209.85.212.177]:34407 "EHLO mail-px0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491968Ab0ELNYU (ORCPT ); Wed, 12 May 2010 15:24:20 +0200 Received: by pxi1 with SMTP id 1so2779303pxi.36 for ; Wed, 12 May 2010 06:24:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:in-reply-to:references; bh=fpwf52P9F1kOQXwwErJavg7NkLVsMTo6Keu9v66oxM4=; b=i5xe6FFQESgsCvh5YXlbLyjuzV0QWz0+ulJqDsemRnv1j94aKJE6Vg/4zgjXqgzMef xqMOBWxbWHrS//S0/QYtkvAr0ziJkYdMFXUsRQMwVgIDUtDr25CvFJhsyoan6yKAcirp jT9nD4dH/UjdG0aPEoXlpM/eePQWiStp5iSX4= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=YbEEENzf8IKEBHlAg/krLADT25zVRb4ZFTxy4+AybKOYFJZVXVMGqIMO0wtbVvEgM1 pYB8wWfJSwyJSmHG1S+2ncihkofIA6p/21yFGuwopPHinG9TsQ/BFlMmPjrkJBJsByVy PEua+QfRcrDZ9oIa3/bkG3hYJQDzSGysXX90Y= Received: by 10.114.189.18 with SMTP id m18mr5843754waf.28.1273670649128; Wed, 12 May 2010 06:24:09 -0700 (PDT) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id b6sm1273475wam.21.2010.05.12.06.24.07 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 12 May 2010 06:24:08 -0700 (PDT) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips , Wu Zhangjin Subject: [PATCH 3/9] tracing: MIPS: mcount.S: cleanup the arguments of prepare_ftrace_return Date: Wed, 12 May 2010 21:23:11 +0800 Message-Id: <165223875472dd5871309a7a794e286bdb2aba8f.1273669419.git.wuzhangjin@gmail.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: In-Reply-To: References: Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26685 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips From: Wu Zhangjin The old arguments handling for prepare_ftrace_return is awlful, this patch cleans it up. Signed-off-by: Wu Zhangjin --- arch/mips/kernel/mcount.S | 36 ++++++++++++++++++++++-------------- 1 files changed, 22 insertions(+), 14 deletions(-) diff --git a/arch/mips/kernel/mcount.S b/arch/mips/kernel/mcount.S index 92d1540..991cbdf 100644 --- a/arch/mips/kernel/mcount.S +++ b/arch/mips/kernel/mcount.S @@ -132,28 +132,34 @@ ftrace_stub: #ifdef CONFIG_FUNCTION_GRAPH_TRACER NESTED(ftrace_graph_caller, PT_SIZE, ra) -#ifdef CONFIG_DYNAMIC_FTRACE - PTR_L a1, PT_R31(sp) /* load the original ra from the stack */ -#ifdef KBUILD_MCOUNT_RA_ADDRESS - PTR_L $12, PT_R12(sp) /* load the original $12 from the stack */ -#endif -#else +#ifndef CONFIG_DYNAMIC_FTRACE MCOUNT_SAVE_REGS - move a1, ra /* arg2: next ip, selfaddr */ #endif + /* arg1: Get the location of the parent's return address */ #ifdef KBUILD_MCOUNT_RA_ADDRESS - bnez $12, 1f /* non-leaf func: $12 saved the location of the return address */ +#ifdef CONFIG_DYNAMIC_FTRACE + PTR_L a0, PT_R12(sp) +#else + move a0, $12 +#endif + bnez a0, 1f /* non-leaf func: stored in $12 */ nop - PTR_LA $12, PT_R1(sp) /* leaf func: get the location of at(old ra) from our own stack */ -1: move a0, $12 /* arg1: the location of the return address */ +#endif + PTR_LA a0, PT_R1(sp) /* leaf func: the location in current stack */ +1: + + /* arg2: Get self return address */ +#ifdef CONFIG_DYNAMIC_FTRACE + PTR_L a1, PT_R31(sp) #else - PTR_LA a0, PT_R1(sp) /* arg1: &AT -> a0 */ + move a1, ra #endif - jal prepare_ftrace_return + + /* arg3: Get frame pointer of current stack */ #ifdef CONFIG_FRAME_POINTER - move a2, fp /* arg3: frame pointer */ -#else + move a2, fp +#else /* ! CONFIG_FRAME_POINTER */ #ifdef CONFIG_64BIT PTR_LA a2, PT_SIZE(sp) #else @@ -161,6 +167,8 @@ NESTED(ftrace_graph_caller, PT_SIZE, ra) #endif #endif + jal prepare_ftrace_return + nop MCOUNT_RESTORE_REGS RETURN_BACK END(ftrace_graph_caller) -- 1.7.0.4 From wuzhangjin@gmail.com Wed May 12 15:25:47 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 12 May 2010 15:25:53 +0200 (CEST) Received: from mail-px0-f177.google.com ([209.85.212.177]:61699 "EHLO mail-px0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491973Ab0ELNY0 (ORCPT ); Wed, 12 May 2010 15:24:26 +0200 Received: by pxi1 with SMTP id 1so2779409pxi.36 for ; Wed, 12 May 2010 06:24:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:in-reply-to:references; bh=slwv/bbbjYCgVQoh39DAkg7F3zvkX2DSoVwGj1DVlS8=; b=BUekalYqk2U9HuKY39LlqA41HZhfGpp72/6CWE3ZPEoAoL7o84nNZRwMGN1rmfoM7z f1oRTw73tdfMYTnaBTPrEDJCYnx+J0Hi5TOflcNNiNDisM/K64Rd2S78UauDk+VOf9w3 ABDpezFcGHLXt48eAq4H3L5FX2H5mC+arlQw4= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=Yv3xs3VXn9HWqrBZV8yZv4EPFhjc1Q555CNgP+CM+PtxC0J6ap8x8rFZv6YPxOy6zJ Cu2IckXknBoe/87/wSG5nnA/SIv1Gh7QkPPvltA92CCCKtJkBE9zfq5G7TSkNzV6xN2s mBUfE61s6MRqXEmWFT3iXEJwzPzSgxeuuRI/Q= Received: by 10.115.81.33 with SMTP id i33mr5861827wal.46.1273670659229; Wed, 12 May 2010 06:24:19 -0700 (PDT) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id b6sm1273475wam.21.2010.05.12.06.24.17 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 12 May 2010 06:24:18 -0700 (PDT) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips , Wu Zhangjin Subject: [PATCH 5/9] tracing: MIPS: Fixup of the 32bit support with -mmcount-ra-address Date: Wed, 12 May 2010 21:23:13 +0800 Message-Id: <466344de77ee0aebc8832717391b02398ac6bd96.1273669419.git.wuzhangjin@gmail.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: In-Reply-To: References: Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26686 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips From: Wu Zhangjin For 32bit kernel, the -mmcount-ra-address option of gcc 4.5 has introduced one more instruction before calling to _mcount, so we need to use a different "b 1f" for it. Signed-off-by: Wu Zhangjin --- arch/mips/kernel/ftrace.c | 16 ++++++++++++++-- 1 files changed, 14 insertions(+), 2 deletions(-) diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c index e9e64e0..37aa767 100644 --- a/arch/mips/kernel/ftrace.c +++ b/arch/mips/kernel/ftrace.c @@ -62,14 +62,26 @@ int ftrace_make_nop(struct module *mod, return -EFAULT; } +#if defined(KBUILD_MCOUNT_RA_ADDRESS) && defined(CONFIG_32BIT) + /* lui v1, hi_16bit_of_mcount --> b 1f (0x10000005) + * addiu v1, v1, low_16bit_of_mcount + * move at, ra + * move $12, ra_address + * jalr v1 + * sub sp, sp, 8 + * 1: offset = 5 instructions + */ + new = 0x10000005; +#else /* lui v1, hi_16bit_of_mcount --> b 1f (0x10000004) * addiu v1, v1, low_16bit_of_mcount * move at, ra * jalr v1 - * nop - * 1f: (ip + 12) + * nop | move $12, ra_address | sub sp, sp, 8 + * 1: offset = 4 instructions */ new = 0x10000004; +#endif } else { /* record/calculate it for ftrace_make_call */ if (jal_mcount == 0) { -- 1.7.0.4 From wuzhangjin@gmail.com Wed May 12 15:26:12 2010 Received: with ECARTIS (v1.0.0; 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Wed, 12 May 2010 06:24:25 -0700 (PDT) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id b6sm1273475wam.21.2010.05.12.06.24.23 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 12 May 2010 06:24:25 -0700 (PDT) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips , Wu Zhangjin Subject: [PATCH 6/9] tracing: MIPS: cleanup of the instructions Date: Wed, 12 May 2010 21:23:14 +0800 Message-Id: <3f95088e5c815d10946eaba79c93eb5ed0ee9742.1273669419.git.wuzhangjin@gmail.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: In-Reply-To: References: Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26687 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips From: Wu Zhangjin This patch adds some cleanups of the instructions: o use macro instead of magic numbers o use macro instead of variables to reduce some overhead o add a new macro for the jal instruction Signed-off-by: Wu Zhangjin --- arch/mips/kernel/ftrace.c | 19 +++++++++++-------- 1 files changed, 11 insertions(+), 8 deletions(-) diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c index 37aa767..b1b8fec 100644 --- a/arch/mips/kernel/ftrace.c +++ b/arch/mips/kernel/ftrace.c @@ -23,7 +23,10 @@ #define jump_insn_encode(op_code, addr) \ ((unsigned int)((op_code) | (((addr) >> 2) & ADDR_MASK))) -static unsigned int ftrace_nop = 0x00000000; +#define INSN_B_1F_4 0x10000004 /* b 1f; offset = 4 */ +#define INSN_B_1F_5 0x10000005 /* b 1f; offset = 5 */ +#define INSN_NOP 0x00000000 /* nop */ +#define INSN_JAL(addr) jump_insn_encode(JAL, addr) static int ftrace_modify_code(unsigned long ip, unsigned int new_code) { @@ -71,7 +74,7 @@ int ftrace_make_nop(struct module *mod, * sub sp, sp, 8 * 1: offset = 5 instructions */ - new = 0x10000005; + new = INSN_B_1F_5; #else /* lui v1, hi_16bit_of_mcount --> b 1f (0x10000004) * addiu v1, v1, low_16bit_of_mcount @@ -80,7 +83,7 @@ int ftrace_make_nop(struct module *mod, * nop | move $12, ra_address | sub sp, sp, 8 * 1: offset = 4 instructions */ - new = 0x10000004; + new = INSN_B_1F_4; #endif } else { /* record/calculate it for ftrace_make_call */ @@ -88,13 +91,13 @@ int ftrace_make_nop(struct module *mod, /* We can record it directly like this: * jal_mcount = *(unsigned int *)ip; * Herein, jump over the first two nop instructions */ - jal_mcount = jump_insn_encode(JAL, (MCOUNT_ADDR + 8)); + jal_mcount = INSN_JAL(MCOUNT_ADDR + 8); } /* move at, ra * jalr v1 --> nop */ - new = ftrace_nop; + new = INSN_NOP; } return ftrace_modify_code(ip, new); } @@ -109,7 +112,7 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) /* We just need to remove the "b ftrace_stub" at the fist time! */ if (modified == 0) { modified = 1; - ftrace_modify_code(addr, ftrace_nop); + ftrace_modify_code(addr, INSN_NOP); } /* ip, module: 0xc0000000, kernel: 0x80000000 */ new = (ip & 0x40000000) ? lui_v1 : jal_mcount; @@ -123,7 +126,7 @@ int ftrace_update_ftrace_func(ftrace_func_t func) { unsigned int new; - new = jump_insn_encode(JAL, (unsigned long)func); + new = INSN_JAL((unsigned long)func); return ftrace_modify_code(FTRACE_CALL_IP, new); } @@ -155,7 +158,7 @@ int ftrace_enable_ftrace_graph_caller(void) int ftrace_disable_ftrace_graph_caller(void) { - return ftrace_modify_code(FTRACE_GRAPH_CALL_IP, ftrace_nop); + return ftrace_modify_code(FTRACE_GRAPH_CALL_IP, INSN_NOP); } #endif /* !CONFIG_DYNAMIC_FTRACE */ -- 1.7.0.4 From wuzhangjin@gmail.com Wed May 12 15:26:41 2010 Received: with ECARTIS (v1.0.0; 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Wed, 12 May 2010 06:24:34 -0700 (PDT) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id b6sm1273475wam.21.2010.05.12.06.24.33 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 12 May 2010 06:24:34 -0700 (PDT) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips , Wu Zhangjin Subject: [PATCH 7/9] tracing: MIPS: Reduce the overhead of dynamic Function Tracer Date: Wed, 12 May 2010 21:23:15 +0800 Message-Id: X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: In-Reply-To: References: Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26688 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips From: Wu Zhangjin With the help of uasm, this patch encodes the instructions of dynamic Function Tracer in ftrace_dyn_arch_init() when initializing it. As a result, we can remove the dynamic encoding of instructions in ftrace_make_nop()/call(), ftrace_enable_ftrace_graph_caller() and remove the macro jump_insn_encode() and at last, reduces the overhead of dynamic Function Tracer and also make the source code looks better. Signed-off-by: Wu Zhangjin --- arch/mips/kernel/ftrace.c | 93 +++++++++++++++++++++++--------------------- 1 files changed, 49 insertions(+), 44 deletions(-) diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c index b1b8fec..c4042ca 100644 --- a/arch/mips/kernel/ftrace.c +++ b/arch/mips/kernel/ftrace.c @@ -2,7 +2,7 @@ * Code for replacing ftrace calls with jumps. * * Copyright (C) 2007-2008 Steven Rostedt - * Copyright (C) 2009 DSLab, Lanzhou University, China + * Copyright (C) 2009, 2010 DSLab, Lanzhou University, China * Author: Wu Zhangjin * * Thanks goes to Steven Rostedt for writing the original x86 version. @@ -12,21 +12,46 @@ #include #include -#include #include #include +#include +#include #ifdef CONFIG_DYNAMIC_FTRACE #define JAL 0x0c000000 /* jump & link: ip --> ra, jump to target */ #define ADDR_MASK 0x03ffffff /* op_code|addr : 31...26|25 ....0 */ -#define jump_insn_encode(op_code, addr) \ - ((unsigned int)((op_code) | (((addr) >> 2) & ADDR_MASK))) #define INSN_B_1F_4 0x10000004 /* b 1f; offset = 4 */ #define INSN_B_1F_5 0x10000005 /* b 1f; offset = 5 */ #define INSN_NOP 0x00000000 /* nop */ -#define INSN_JAL(addr) jump_insn_encode(JAL, addr) +#define INSN_JAL(addr) \ + ((unsigned int)(JAL | (((addr) >> 2) & ADDR_MASK))) + +static unsigned int insn_jal_ftrace_caller __read_mostly; +static unsigned int insn_lui_v1_hi16_mcount __read_mostly; +static unsigned int insn_j_ftrace_graph_caller __maybe_unused __read_mostly; + +static inline void ftrace_dyn_arch_init_insns(void) +{ + u32 *buf; + unsigned int v1; + + /* lui v1, hi16_mcount */ + v1 = 3; + buf = (u32 *)&insn_lui_v1_hi16_mcount; + UASM_i_LA_mostly(&buf, v1, MCOUNT_ADDR); + + /* jal (ftrace_caller + 8), jump over the first two instruction */ + buf = (u32 *)&insn_jal_ftrace_caller; + uasm_i_jal(&buf, (FTRACE_ADDR + 8)); + +#ifdef CONFIG_FUNCTION_GRAPH_TRACER + /* j ftrace_graph_caller */ + buf = (u32 *)&insn_j_ftrace_graph_caller; + uasm_i_j(&buf, (unsigned long)ftrace_graph_caller); +#endif +} static int ftrace_modify_code(unsigned long ip, unsigned int new_code) { @@ -43,30 +68,20 @@ static int ftrace_modify_code(unsigned long ip, unsigned int new_code) return 0; } -static int lui_v1; -static int jal_mcount; - int ftrace_make_nop(struct module *mod, struct dyn_ftrace *rec, unsigned long addr) { unsigned int new; - int faulted; unsigned long ip = rec->ip; - /* We have compiled module with -mlong-calls, but compiled the kernel - * without it, we need to cope with them respectively. */ + /* + * We have compiled module with -mlong-calls, but compiled the kernel + * without it, we need to cope with them respectively. + */ if (ip & 0x40000000) { - /* record it for ftrace_make_call */ - if (lui_v1 == 0) { - /* lui_v1 = *(unsigned int *)ip; */ - safe_load_code(lui_v1, ip, faulted); - - if (unlikely(faulted)) - return -EFAULT; - } - #if defined(KBUILD_MCOUNT_RA_ADDRESS) && defined(CONFIG_32BIT) - /* lui v1, hi_16bit_of_mcount --> b 1f (0x10000005) + /* + * lui v1, hi_16bit_of_mcount --> b 1f (0x10000005) * addiu v1, v1, low_16bit_of_mcount * move at, ra * move $12, ra_address @@ -76,7 +91,8 @@ int ftrace_make_nop(struct module *mod, */ new = INSN_B_1F_5; #else - /* lui v1, hi_16bit_of_mcount --> b 1f (0x10000004) + /* + * lui v1, hi_16bit_of_mcount --> b 1f (0x10000004) * addiu v1, v1, low_16bit_of_mcount * move at, ra * jalr v1 @@ -86,36 +102,22 @@ int ftrace_make_nop(struct module *mod, new = INSN_B_1F_4; #endif } else { - /* record/calculate it for ftrace_make_call */ - if (jal_mcount == 0) { - /* We can record it directly like this: - * jal_mcount = *(unsigned int *)ip; - * Herein, jump over the first two nop instructions */ - jal_mcount = INSN_JAL(MCOUNT_ADDR + 8); - } - - /* move at, ra - * jalr v1 --> nop + /* + * move at, ra + * jal _mcount --> nop */ new = INSN_NOP; } return ftrace_modify_code(ip, new); } -static int modified; /* initialized as 0 by default */ - int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) { unsigned int new; unsigned long ip = rec->ip; - /* We just need to remove the "b ftrace_stub" at the fist time! */ - if (modified == 0) { - modified = 1; - ftrace_modify_code(addr, INSN_NOP); - } /* ip, module: 0xc0000000, kernel: 0x80000000 */ - new = (ip & 0x40000000) ? lui_v1 : jal_mcount; + new = (ip & 0x40000000) ? insn_lui_v1_hi16_mcount : insn_jal_ftrace_caller; return ftrace_modify_code(ip, new); } @@ -133,6 +135,12 @@ int ftrace_update_ftrace_func(ftrace_func_t func) int __init ftrace_dyn_arch_init(void *data) { + /* Encode the instructions when booting */ + ftrace_dyn_arch_init_insns(); + + /* Remove "b ftrace_stub" to ensure ftrace_caller() is executed */ + ftrace_modify_code(MCOUNT_ADDR, INSN_NOP); + /* The return code is retured via data */ *(unsigned long *)data = 0; @@ -145,15 +153,12 @@ int __init ftrace_dyn_arch_init(void *data) #ifdef CONFIG_DYNAMIC_FTRACE extern void ftrace_graph_call(void); -#define JMP 0x08000000 /* jump to target directly */ -#define CALL_FTRACE_GRAPH_CALLER \ - jump_insn_encode(JMP, (unsigned long)(&ftrace_graph_caller)) #define FTRACE_GRAPH_CALL_IP ((unsigned long)(&ftrace_graph_call)) int ftrace_enable_ftrace_graph_caller(void) { return ftrace_modify_code(FTRACE_GRAPH_CALL_IP, - CALL_FTRACE_GRAPH_CALLER); + insn_j_ftrace_graph_caller); } int ftrace_disable_ftrace_graph_caller(void) -- 1.7.0.4 From wuzhangjin@gmail.com Wed May 12 15:27:10 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 12 May 2010 15:27:16 +0200 (CEST) Received: from mail-pz0-f194.google.com ([209.85.222.194]:60015 "EHLO mail-pz0-f194.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492000Ab0ELNYj (ORCPT ); Wed, 12 May 2010 15:24:39 +0200 Received: by mail-pz0-f194.google.com with SMTP id 32so732pzk.21 for ; Wed, 12 May 2010 06:24:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:in-reply-to:references; bh=eIMj8NSHeiLDc6/Y4Rg2vSGjT1D/EozanUFoKIS35Dc=; b=VAvz0+jIpmP8pPSqJNxPbG6OwHsMnKetdZyWj1a0/YXBBe+v680BD/krTDJaFKAZtw n6FBWnIumYK73lTHciP9H5hW5FognPmgt1Q7TgfUChgchWdp3yI2vwhsin3avKYEAdda 87AtzuFl5yboK7yWucacA9WLNndkIqmugORDQ= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=WDAQIQmT0zKH6VwnRNSJqx47B1U7GbNWRJsL2ktSlAcCiZ1apd3QyxM8Pi9LhN0BTa LeAQixcv61MKGI8Twddnud5HVANzz0OQ7glO9yKzbovo/zcnmAg0S2lY8rI+Fhnc2+Ut ufE0vAknT4Nrv3pq2JZn8DEqCLwHuIij+1Es8= Received: by 10.115.98.19 with SMTP id a19mr5843261wam.82.1273670678396; Wed, 12 May 2010 06:24:38 -0700 (PDT) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id b6sm1273475wam.21.2010.05.12.06.24.36 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 12 May 2010 06:24:38 -0700 (PDT) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips , Wu Zhangjin Subject: [PATCH 8/9] tracing: MIPS: cleanup of function graph tracer Date: Wed, 12 May 2010 21:23:16 +0800 Message-Id: <68af048a40e348233a16b2ae94abfc1f7557102a.1273669419.git.wuzhangjin@gmail.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: In-Reply-To: References: Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26689 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips From: Wu Zhangjin This patch cleans up the comments and ftrace_get_parent_addr() of function graph tracer. Signed-off-by: Wu Zhangjin --- arch/mips/kernel/ftrace.c | 48 ++++++++++++++++++++++++-------------------- 1 files changed, 26 insertions(+), 22 deletions(-) diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c index c4042ca..628e90b 100644 --- a/arch/mips/kernel/ftrace.c +++ b/arch/mips/kernel/ftrace.c @@ -146,7 +146,7 @@ int __init ftrace_dyn_arch_init(void *data) return 0; } -#endif /* CONFIG_DYNAMIC_FTRACE */ +#endif /* CONFIG_DYNAMIC_FTRACE */ #ifdef CONFIG_FUNCTION_GRAPH_TRACER @@ -166,9 +166,10 @@ int ftrace_disable_ftrace_graph_caller(void) return ftrace_modify_code(FTRACE_GRAPH_CALL_IP, INSN_NOP); } -#endif /* !CONFIG_DYNAMIC_FTRACE */ +#endif /* CONFIG_DYNAMIC_FTRACE */ #ifndef KBUILD_MCOUNT_RA_ADDRESS + #define S_RA_SP (0xafbf << 16) /* s{d,w} ra, offset(sp) */ #define S_R_SP (0xafb0 << 16) /* s{d,w} R, offset(sp) */ #define OFFSET_MASK 0xffff /* stack offset range: 0 ~ PT_SIZE */ @@ -182,17 +183,17 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr, unsigned int code; int faulted; - /* in module or kernel? */ - if (self_addr & 0x40000000) { - /* module: move to the instruction "lui v1, HI_16BIT_OF_MCOUNT" */ - ip = self_addr - 20; - } else { - /* kernel: move to the instruction "move ra, at" */ - ip = self_addr - 12; - } + /* + * For module, move the ip from calling site of mcount to the + * instruction "lui v1, hi_16bit_of_mcount"(offset is 20), but for + * kernel, move to the instruction "move ra, at"(offset is 12) + */ + ip = self_addr - ((self_addr & 0x40000000) ? 20 : 12); - /* search the text until finding the non-store instruction or "s{d,w} - * ra, offset(sp)" instruction */ + /* + * search the text until finding the non-store instruction or "s{d,w} + * ra, offset(sp)" instruction + */ do { ip -= 4; @@ -201,10 +202,11 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr, if (unlikely(faulted)) return 0; - - /* If we hit the non-store instruction before finding where the + /* + * If we hit the non-store instruction before finding where the * ra is stored, then this is a leaf function and it does not - * store the ra on the stack. */ + * store the ra on the stack + */ if ((code & S_R_SP) != S_R_SP) return parent_addr; @@ -222,7 +224,7 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr, return 0; } -#endif +#endif /* !KBUILD_MCOUNT_RA_ADDRESS */ /* * Hook the return address and push it in the stack of return addrs @@ -240,7 +242,8 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr, if (unlikely(atomic_read(¤t->tracing_graph_pause))) return; - /* "parent" is the stack address saved the return address of the caller + /* + * "parent" is the stack address saved the return address of the caller * of _mcount. * * if the gcc < 4.5, a leaf function does not save the return address @@ -262,10 +265,11 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr, goto out; #ifndef KBUILD_MCOUNT_RA_ADDRESS parent = (unsigned long *)ftrace_get_parent_addr(self_addr, old, - (unsigned long)parent, - fp); - /* If fails when getting the stack address of the non-leaf function's - * ra, stop function graph tracer and return */ + (unsigned long)parent, fp); + /* + * If fails when getting the stack address of the non-leaf function's + * ra, stop function graph tracer and return + */ if (parent == 0) goto out; #endif @@ -292,4 +296,4 @@ out: ftrace_graph_stop(); WARN_ON(1); } -#endif /* CONFIG_FUNCTION_GRAPH_TRACER */ +#endif /* CONFIG_FUNCTION_GRAPH_TRACER */ -- 1.7.0.4 From wuzhangjin@gmail.com Wed May 12 15:27:36 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 12 May 2010 15:27:43 +0200 (CEST) Received: from mail-px0-f177.google.com ([209.85.212.177]:34407 "EHLO mail-px0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492003Ab0ELNYm (ORCPT ); Wed, 12 May 2010 15:24:42 +0200 Received: by mail-px0-f177.google.com with SMTP id 1so2779303pxi.36 for ; Wed, 12 May 2010 06:24:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:in-reply-to:references; bh=I8JRmkr+fV68WxqFuR83ENCOl9Xj+vJTPPakt5z9O7Y=; b=uVFXDYOmp30jJlEw6YC2QWejWyVPtMN8+aAPbwaPQ8owfW2NPHbgf+XFIPOdPVlJam u/kmAYJ6ivQE0+tg8wOuo9dxAFpqyKfj5SXI0IdiYwefJi9VTYlPCOPaHpdSsnvdQzYi YJ8KkQ/8Rh2xrd9DRg7WxN4/HeLUg1uV5F+zs= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=obY4ChJqwaD4FkSMVEuyjtcD6832urMyDE4qyP8i8zm9yroodAKhqB4NHQzHmiWeb5 5bdfo/XlhtV7aGvIx4BjTak2aH81R36wz9P0tafJhtnjpTwksqZJFQ1qcoV3Ae/xQPQI eD+xnq2Tgxq336b4AIfSY8a+MJvxcf2Imf0Fc= Received: by 10.115.87.32 with SMTP id p32mr5850985wal.86.1273670681351; Wed, 12 May 2010 06:24:41 -0700 (PDT) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id b6sm1273475wam.21.2010.05.12.06.24.39 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 12 May 2010 06:24:40 -0700 (PDT) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips , Wu Zhangjin Subject: [PATCH 9/9] tracing: MIPS: cleanup of the address space checking Date: Wed, 12 May 2010 21:23:17 +0800 Message-Id: <86404e31ca5c4c33b785bad7f6223ac775f4f879.1273669419.git.wuzhangjin@gmail.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: In-Reply-To: References: Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26690 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips From: Wu Zhangjin This patch adds an inline function in_module() to check which space the instruction pointer in, kernel space or module space. Note: This may not work when the kernel is compiled with -msym32. Signed-off-by: Wu Zhangjin --- arch/mips/kernel/ftrace.c | 17 ++++++++++++++--- 1 files changed, 14 insertions(+), 3 deletions(-) diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c index 628e90b..37f15b6 100644 --- a/arch/mips/kernel/ftrace.c +++ b/arch/mips/kernel/ftrace.c @@ -17,6 +17,17 @@ #include #include +/* + * If the Instruction Pointer is in module space (0xc0000000), return true; + * otherwise, it is in kernel space (0x80000000), return false. + * + * FIXME: This may not work when the kernel is compiled with -msym32. + */ +static inline int in_module(unsigned long ip) +{ + return ip & 0x40000000; +} + #ifdef CONFIG_DYNAMIC_FTRACE #define JAL 0x0c000000 /* jump & link: ip --> ra, jump to target */ @@ -78,7 +89,7 @@ int ftrace_make_nop(struct module *mod, * We have compiled module with -mlong-calls, but compiled the kernel * without it, we need to cope with them respectively. */ - if (ip & 0x40000000) { + if (in_module(ip)) { #if defined(KBUILD_MCOUNT_RA_ADDRESS) && defined(CONFIG_32BIT) /* * lui v1, hi_16bit_of_mcount --> b 1f (0x10000005) @@ -117,7 +128,7 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) unsigned long ip = rec->ip; /* ip, module: 0xc0000000, kernel: 0x80000000 */ - new = (ip & 0x40000000) ? insn_lui_v1_hi16_mcount : insn_jal_ftrace_caller; + new = in_module(ip) ? insn_lui_v1_hi16_mcount : insn_jal_ftrace_caller; return ftrace_modify_code(ip, new); } @@ -188,7 +199,7 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr, * instruction "lui v1, hi_16bit_of_mcount"(offset is 20), but for * kernel, move to the instruction "move ra, at"(offset is 12) */ - ip = self_addr - ((self_addr & 0x40000000) ? 20 : 12); + ip = self_addr - (in_module(self_addr) ? 20 : 12); /* * search the text until finding the non-store instruction or "s{d,w} -- 1.7.0.4 From david.s.daney@gmail.com Wed May 12 19:13:15 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 12 May 2010 19:13:20 +0200 (CEST) Received: from mail-fx0-f49.google.com ([209.85.161.49]:50751 "EHLO mail-fx0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492221Ab0ELRNP (ORCPT ); Wed, 12 May 2010 19:13:15 +0200 Received: by fxm17 with SMTP id 17so302412fxm.36 for ; Wed, 12 May 2010 10:13:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:message-id:date:from :user-agent:mime-version:to:cc:subject:references:in-reply-to :content-type:content-transfer-encoding; bh=34WVnblBImJZLD6LA5PzykPxABWBeOY/ELPrgSzhFvg=; b=FGo4uEM56I8/5AP06addza8Vg/PWHNJfMaCAzBykt2zVEmjktBL3I4Juu1mBt+ueJt NS4ETX/+ZAOXSNoPcGRSZ8gVHarxyK7QttxFoVfgWpiykurqf2jRaHGxYqkKkuJD+dZW JJe1IydJbtKuthCezPMfCt8DHsggn4JbIVTfU= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=message-id:date:from:user-agent:mime-version:to:cc:subject :references:in-reply-to:content-type:content-transfer-encoding; b=py/m9ivEozeGWid7VIP9VJ0iUFiVtzkiT7rvChKpt7YReSlyijXleu1F5KxbZKdBlK OzWgvphJ3+I3V/Cwm2u+OVtBnlCcYetYjlsHYej6Z6eCwNvw7I+pVcGDKbm2zmysLl+n z6F/K6Qomko9vg5LGkxkRsOiJ6S7vUAXgpPQY= Received: by 10.204.134.211 with SMTP id k19mr424998bkt.48.1273684388067; Wed, 12 May 2010 10:13:08 -0700 (PDT) Received: from dd1.caveonetworks.com ([12.108.191.226]) by mx.google.com with ESMTPS id d5sm113606bkd.19.2010.05.12.10.13.03 (version=SSLv3 cipher=RC4-MD5); Wed, 12 May 2010 10:13:05 -0700 (PDT) Message-ID: <4BEAE19D.40502@gmail.com> Date: Wed, 12 May 2010 10:13:01 -0700 From: David Daney User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.9) Gecko/20100330 Fedora/3.0.4-1.fc12 Thunderbird/3.0.4 MIME-Version: 1.0 To: Wu Zhangjin CC: Ralf Baechle , linux-mips Subject: Re: [PATCH 9/9] tracing: MIPS: cleanup of the address space checking References: <86404e31ca5c4c33b785bad7f6223ac775f4f879.1273669419.git.wuzhangjin@gmail.com> In-Reply-To: <86404e31ca5c4c33b785bad7f6223ac775f4f879.1273669419.git.wuzhangjin@gmail.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26691 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: david.s.daney@gmail.com Precedence: bulk X-list: linux-mips On 05/12/2010 06:23 AM, Wu Zhangjin wrote: > From: Wu Zhangjin > > This patch adds an inline function in_module() to check which space the > instruction pointer in, kernel space or module space. > > Note: This may not work when the kernel is compiled with -msym32. > The kernel is always compiled with -msym32, so the patch is a bit pointless. > Signed-off-by: Wu Zhangjin > --- > arch/mips/kernel/ftrace.c | 17 ++++++++++++++--- > 1 files changed, 14 insertions(+), 3 deletions(-) > > diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c > index 628e90b..37f15b6 100644 > --- a/arch/mips/kernel/ftrace.c > +++ b/arch/mips/kernel/ftrace.c > @@ -17,6 +17,17 @@ > #include > #include > > +/* > + * If the Instruction Pointer is in module space (0xc0000000), return true; > + * otherwise, it is in kernel space (0x80000000), return false. > + * > + * FIXME: This may not work when the kernel is compiled with -msym32. > + */ > +static inline int in_module(unsigned long ip) > +{ > + return ip& 0x40000000; > +} > + How about (untested): static inline int in_module(unsigned long ip) { return ip < _text || ip > _etext; } But why do we even care? Can't we just probe the function prologue and determine from that what needs to be done? David Daney > #ifdef CONFIG_DYNAMIC_FTRACE > > #define JAL 0x0c000000 /* jump& link: ip --> ra, jump to target */ > @@ -78,7 +89,7 @@ int ftrace_make_nop(struct module *mod, > * We have compiled module with -mlong-calls, but compiled the kernel > * without it, we need to cope with them respectively. > */ > - if (ip& 0x40000000) { > + if (in_module(ip)) { > #if defined(KBUILD_MCOUNT_RA_ADDRESS)&& defined(CONFIG_32BIT) > /* > * lui v1, hi_16bit_of_mcount --> b 1f (0x10000005) > @@ -117,7 +128,7 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) > unsigned long ip = rec->ip; > > /* ip, module: 0xc0000000, kernel: 0x80000000 */ > - new = (ip& 0x40000000) ? insn_lui_v1_hi16_mcount : insn_jal_ftrace_caller; > + new = in_module(ip) ? insn_lui_v1_hi16_mcount : insn_jal_ftrace_caller; > > return ftrace_modify_code(ip, new); > } > @@ -188,7 +199,7 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr, > * instruction "lui v1, hi_16bit_of_mcount"(offset is 20), but for > * kernel, move to the instruction "move ra, at"(offset is 12) > */ > - ip = self_addr - ((self_addr& 0x40000000) ? 20 : 12); > + ip = self_addr - (in_module(self_addr) ? 20 : 12); > > /* > * search the text until finding the non-store instruction or "s{d,w} From david.s.daney@gmail.com Wed May 12 19:16:21 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 12 May 2010 19:16:24 +0200 (CEST) Received: from fg-out-1718.google.com ([72.14.220.158]:7229 "EHLO fg-out-1718.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492221Ab0ELRQV (ORCPT ); Wed, 12 May 2010 19:16:21 +0200 Received: by fg-out-1718.google.com with SMTP id e12so418708fga.6 for ; Wed, 12 May 2010 10:16:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:message-id:date:from :user-agent:mime-version:to:cc:subject:references:in-reply-to :content-type:content-transfer-encoding; bh=4srsXly1t7bH28eQOzBR+vG+hOAwOwRXh1Ou819sYSE=; b=Vn4T8qd0pRRU2Y0+IUGL0bz3yQhY4QXIHhgJgi17RxauWxgQh4adnFZbxIs/WlCMmd cTdAdEGsO3A/+4cplS0vnc5XBa7J1lZrOoMMG7nwQQgwM8bl51FmubK4vLb9OnFpdRxl FCzJ8U82IHQvadgkOccpJIZ9uk2xNQV0IMtrE= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=message-id:date:from:user-agent:mime-version:to:cc:subject :references:in-reply-to:content-type:content-transfer-encoding; b=tCJgCHAvrIJlXQvOnvtIKcYrhQYJAHQ9znHD4JUw/R6U7HL/z2cldMFv7UN1uVdbIm IWgsRQ35YgdSfSk3um1yNSMTCtPih65oNd60Ay+TtQWYWQnkt2EKHwZ9dJRIi+gAsTKT vInV729ZYiof+O6SyEA3Z/miDZVFVqyUFqOzA= Received: by 10.204.3.23 with SMTP id 23mr670808bkl.142.1273684580970; Wed, 12 May 2010 10:16:20 -0700 (PDT) Received: from dd1.caveonetworks.com ([12.108.191.226]) by mx.google.com with ESMTPS id s17sm115075bkd.22.2010.05.12.10.16.18 (version=SSLv3 cipher=RC4-MD5); Wed, 12 May 2010 10:16:19 -0700 (PDT) Message-ID: <4BEAE260.9060805@gmail.com> Date: Wed, 12 May 2010 10:16:16 -0700 From: David Daney User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.9) Gecko/20100330 Fedora/3.0.4-1.fc12 Thunderbird/3.0.4 MIME-Version: 1.0 To: Wu Zhangjin CC: Ralf Baechle , linux-mips Subject: Re: [PATCH 2/9] tracing: MIPS: mcount.S: Fixup of the 32bit support with gcc 4.5 References: In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26692 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: david.s.daney@gmail.com Precedence: bulk X-list: linux-mips On 05/12/2010 06:23 AM, Wu Zhangjin wrote: > From: Wu Zhangjin > > As the doc[1] of gcc-4.5 shows, the -mmcount-ra-address uses register > $12 to transfer the stack offset of the return address to the _mcount > function. in 64bit kernel, $12 is t0, but in 32bit kernel, it is t4, so, > we need to use $12 instead of t0 here to cover the 64bit and 32bit > support. > > [1] Gcc doc: MIPS Options > http://gcc.gnu.org/onlinedocs/gcc/MIPS-Options.html > > Signed-off-by: Wu Zhangjin Would it be better to do?: #define MCOUNT_RA_ADDRESS_REG $12 s/t0/MCOUNT_RA_ADDRESS_REG/g David Daney > --- > arch/mips/kernel/mcount.S | 10 +++++----- > 1 files changed, 5 insertions(+), 5 deletions(-) > > diff --git a/arch/mips/kernel/mcount.S b/arch/mips/kernel/mcount.S > index e256bf9..92d1540 100644 > --- a/arch/mips/kernel/mcount.S > +++ b/arch/mips/kernel/mcount.S > @@ -69,7 +69,7 @@ _mcount: > > MCOUNT_SAVE_REGS > #ifdef KBUILD_MCOUNT_RA_ADDRESS > - PTR_S t0, PT_R12(sp) /* t0 saved the location of the return address(at) by -mmcount-ra-address */ > + PTR_S $12, PT_R12(sp) /* $12 saved the location of the return address(at) by -mmcount-ra-address */ > #endif > > move a0, ra /* arg1: next ip, selfaddr */ > @@ -135,7 +135,7 @@ NESTED(ftrace_graph_caller, PT_SIZE, ra) > #ifdef CONFIG_DYNAMIC_FTRACE > PTR_L a1, PT_R31(sp) /* load the original ra from the stack */ > #ifdef KBUILD_MCOUNT_RA_ADDRESS > - PTR_L t0, PT_R12(sp) /* load the original t0 from the stack */ > + PTR_L $12, PT_R12(sp) /* load the original $12 from the stack */ > #endif > #else > MCOUNT_SAVE_REGS > @@ -143,10 +143,10 @@ NESTED(ftrace_graph_caller, PT_SIZE, ra) > #endif > > #ifdef KBUILD_MCOUNT_RA_ADDRESS > - bnez t0, 1f /* non-leaf func: t0 saved the location of the return address */ > + bnez $12, 1f /* non-leaf func: $12 saved the location of the return address */ > nop > - PTR_LA t0, PT_R1(sp) /* leaf func: get the location of at(old ra) from our own stack */ > -1: move a0, t0 /* arg1: the location of the return address */ > + PTR_LA $12, PT_R1(sp) /* leaf func: get the location of at(old ra) from our own stack */ > +1: move a0, $12 /* arg1: the location of the return address */ > #else > PTR_LA a0, PT_R1(sp) /* arg1:&AT -> a0 */ > #endif From dediao@cisco.com Wed May 12 19:18:35 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 12 May 2010 19:18:39 +0200 (CEST) Received: from rtp-iport-1.cisco.com ([64.102.122.148]:14334 "EHLO rtp-iport-1.cisco.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492221Ab0ELRSf convert rfc822-to-8bit (ORCPT ); Wed, 12 May 2010 19:18:35 +0200 Authentication-Results: rtp-iport-1.cisco.com; dkim=neutral (message not signed) header.i=none X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: AiMFALF/6kutJV2Y/2dsb2JhbACRaoxEcaJTmV6FEgSDQA X-IronPort-AV: E=Sophos;i="4.53,216,1272844800"; d="scan'208";a="110444404" Received: from rcdn-core-1.cisco.com ([173.37.93.152]) by rtp-iport-1.cisco.com with ESMTP; 12 May 2010 17:18:28 +0000 Received: from xbh-rcd-302.cisco.com (xbh-rcd-302.cisco.com [72.163.63.9]) by rcdn-core-1.cisco.com (8.14.3/8.14.3) with ESMTP id o4CHIS7v023509; Wed, 12 May 2010 17:18:28 GMT Received: from xmb-rcd-208.cisco.com ([72.163.62.215]) by xbh-rcd-302.cisco.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 12 May 2010 12:18:28 -0500 X-MimeOLE: Produced By Microsoft Exchange V6.5 Content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT Subject: RE: [PATCH resend] Apply kmap_high_get on MIPS Date: Wed, 12 May 2010 12:18:26 -0500 Message-ID: <7A9214B0DEB2074FBCA688B30B04400DC645CC@XMB-RCD-208.cisco.com> In-Reply-To: <20100511230609.GB13271@linux-mips.org> X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: [PATCH resend] Apply kmap_high_get on MIPS Thread-Index: AcrxXpBfOoNutrGeRxue6FwB8zv2iAAl9VYw From: "Dezhong Diao (dediao)" To: Cc: "Ralf Baechle" X-OriginalArrivalTime: 12 May 2010 17:18:28.0306 (UTC) FILETIME=[23303B20:01CAF1F7] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26693 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dediao@cisco.com Precedence: bulk X-list: linux-mips Hi all, The changes mentioned in the link below are intended to apply on MIPS dma functions. http://lkml.org/lkml/2009/3/7/137 From dediao@cisco.com Wed May 12 19:22:51 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 12 May 2010 19:22:56 +0200 (CEST) Received: from rtp-iport-2.cisco.com ([64.102.122.149]:24169 "EHLO rtp-iport-2.cisco.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492228Ab0ELRWu convert rfc822-to-8bit (ORCPT ); Wed, 12 May 2010 19:22:50 +0200 Authentication-Results: rtp-iport-2.cisco.com; dkim=neutral (message not signed) header.i=none X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: AvsEAGSA6kutJV2Z/2dsb2JhbACeL3GiTZlehRIEg0A X-IronPort-AV: E=Sophos;i="4.53,216,1272844800"; d="scan'208";a="110584679" Received: from rcdn-core-2.cisco.com ([173.37.93.153]) by rtp-iport-2.cisco.com with ESMTP; 12 May 2010 17:22:43 +0000 Received: from xbh-rcd-101.cisco.com (xbh-rcd-101.cisco.com [72.163.62.138]) by rcdn-core-2.cisco.com (8.14.3/8.14.3) with ESMTP id o4CHMhDZ015671; Wed, 12 May 2010 17:22:43 GMT Received: from xmb-rcd-208.cisco.com ([72.163.62.215]) by xbh-rcd-101.cisco.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 12 May 2010 12:22:43 -0500 X-MimeOLE: Produced By Microsoft Exchange V6.5 Content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT Subject: RE: [PATCH resend] Apply kmap_high_get on MIPS Date: Wed, 12 May 2010 12:22:42 -0500 Message-ID: <7A9214B0DEB2074FBCA688B30B04400DC645D1@XMB-RCD-208.cisco.com> X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: [PATCH resend] Apply kmap_high_get on MIPS Thread-Index: AcrxXpBfOoNutrGeRxue6FwB8zv2iAAl9VYwAAAwTLA= From: "Dezhong Diao (dediao)" To: Cc: "Ralf Baechle" X-OriginalArrivalTime: 12 May 2010 17:22:43.0093 (UTC) FILETIME=[BB0DA450:01CAF1F7] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 26694 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dediao@cisco.com Precedence: bulk X-list: linux-mips Fix the problem in the patch which got truncated. Signed-off-by: Dezhong Diao --- arch/mips/include/asm/highmem.h | 3 + arch/mips/mm/dma-default.c | 156 ++++++++++++++++++++------------------ arch/mips/mm/highmem.c | 17 ++++- 3 files changed, 101 insertions(+), 75 deletions(-) diff --git a/arch/mips/include/asm/highmem.h b/arch/mips/include/asm/highmem.h index 25adfb0..2d7f0f2 100644 --- a/arch/mips/include/asm/highmem.h +++ b/arch/mips/include/asm/highmem.h @@ -42,7 +42,10 @@ extern pte_t *pkmap_page_table; #define PKMAP_NR(virt) ((virt-PKMAP_BASE) >> PAGE_SHIFT) #define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT)) +#define ARCH_NEEDS_KMAP_HIGH_GET + extern void * kmap_high(struct page *page); +extern void *kmap_high_get(struct page *page); extern void kunmap_high(struct page *page); extern void *__kmap(struct page *page); diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c index 9547bc0..7583a3f 100644 --- a/arch/mips/mm/dma-default.c +++ b/arch/mips/mm/dma-default.c @@ -15,18 +15,18 @@ #include #include #include +#include #include #include #include -static inline unsigned long dma_addr_to_virt(struct device *dev, +static inline struct page *dma_addr_to_page(struct device *dev, dma_addr_t dma_addr) { - unsigned long addr = plat_dma_addr_to_phys(dev, dma_addr); - - return (unsigned long)phys_to_virt(addr); + return pfn_to_page( + plat_dma_addr_to_phys(dev, dma_addr) >> PAGE_SHIFT); } /* @@ -141,7 +141,7 @@ void dma_free_coherent(struct device *dev, size_t size, void *vaddr, EXPORT_SYMBOL(dma_free_coherent); -static inline void __dma_sync(unsigned long addr, size_t size, +static inl