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From:   Paul Mundt <lethal@linux-sh.org>
To:     Andrea Gelmini <andrea.gelmini@gelma.net>
Cc:     linux-kernel@vger.kernel.org, Ralf Baechle <ralf@linux-mips.org>,
        linux-mips@linux-mips.org, linux-sh@vger.kernel.org
Subject: Re: [PATCH 42/66] arch/mips/lib/libgcc.h: Checkpatch cleanup
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On Sat, Feb 27, 2010 at 05:51:23PM +0100, Andrea Gelmini wrote:
> arch/mips/lib/libgcc.h:21: ERROR: open brace '{' following union go on the same line
> 
> Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net>
> ---
>  arch/mips/lib/libgcc.h |    3 +--
>  arch/sh/lib/libgcc.h   |    3 +--
>  2 files changed, 2 insertions(+), 4 deletions(-)
> 
I'll apply the sh part by itself, and I suppose Ralf will do the same for
MIPS. I'm a bit confused as to why these were lumped together when 65 out
of 66 oneliner patches made no use of ad-hoc grouping.

From davem@davemloft.net Mon Mar  1 03:34:13 2010
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Subject: Re: [PATCH 3/3] ide: move dcache flushing to generic ide code
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From: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
Date: Sun, 28 Feb 2010 16:35:41 +0100

> the pio callbacks are called with different kind of buffers. It could be
> a straight kernel addr, kernel stack or a kmaped highmem page.
> Some of this break the virt_to_page() assumptions.
> This patch moves the dcache flush from architecture code into generic
> ide code. ide_pio_bytes() is the only place where user pages might be
> written as far as I can see.
> The dcache flush is avoided in two cases:
> - data which is written to the device (i.e. they are comming from the
>   userland)

This needs a flush on sparc, otherwise an alias now exists in the
kernel side copy of the buffer.  The D-cache flush is intentionally
unconditional for PIO mode.  I definitely don't want to take the same
risks you guys seem to be willing to take for this optimization which
is of questionable value.

I also, intrinsically, really don't like these changes.

For one thing, you're optimizing PIO mode.

Secondly, IDE is in deep maintainence mode, if you want to optimize
cache flushing do it in the ATA layer.

Thanks.

From manuel.lauss@googlemail.com Mon Mar  1 17:57:46 2010
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From:   Manuel Lauss <manuel.lauss@googlemail.com>
To:     Linux-PCMCIA <linux-pcmcia@lists.infradead.org>
Cc:     Linux-MIPS <linux-mips@linux-mips.org>,
        Manuel Lauss <manuel.lauss@gmail.com>
Subject: [PATCH] pcmcia: alchemy: fixup wrong comments
Date:   Mon,  1 Mar 2010 17:58:38 +0100
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Commit 11b897cf84c37e6522db914793677e933ef311fb  changed expected
pcmcia area addresses from the 32bit pseudo to the real 36bit
addresses, but did not update the comments.
---
Applies to current linus-git.

 drivers/pcmcia/db1xxx_ss.c  |   19 ++++---------------
 drivers/pcmcia/xxs1500_ss.c |   16 +++-------------
 2 files changed, 7 insertions(+), 28 deletions(-)

diff --git a/drivers/pcmcia/db1xxx_ss.c b/drivers/pcmcia/db1xxx_ss.c
index 3889cf0..9254ab0 100644
--- a/drivers/pcmcia/db1xxx_ss.c
+++ b/drivers/pcmcia/db1xxx_ss.c
@@ -42,7 +42,6 @@ struct db1x_pcmcia_sock {
 	int		nr;		/* socket number */
 	void		*virt_io;
 
-	/* the "pseudo" addresses of the PCMCIA space. */
 	phys_addr_t	phys_io;
 	phys_addr_t	phys_attr;
 	phys_addr_t	phys_mem;
@@ -437,7 +436,7 @@ static int __devinit db1x_pcmcia_socket_probe(struct platform_device *pdev)
 	 * This includes IRQs for Carddetection/ejection, the card
 	 *  itself and optional status change detection.
 	 * Also, the memory areas covered by a socket.  For these
-	 *  we require the 32bit "pseudo" addresses (see the au1000.h
+	 *  we require the real 36bit addresses (see the au1000.h
 	 *  header for more information).
 	 */
 
@@ -459,11 +458,7 @@ static int __devinit db1x_pcmcia_socket_probe(struct platform_device *pdev)
 
 	ret = -ENODEV;
 
-	/*
-	 * pseudo-attr:  The 32bit address of the PCMCIA attribute space
-	 * for this socket (usually the 36bit address shifted 4 to the
-	 * right).
-	 */
+	/* 36bit PCMCIA Attribute area address */
 	r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pcmcia-attr");
 	if (!r) {
 		printk(KERN_ERR "pcmcia%d has no 'pseudo-attr' resource!\n",
@@ -472,10 +467,7 @@ static int __devinit db1x_pcmcia_socket_probe(struct platform_device *pdev)
 	}
 	sock->phys_attr = r->start;
 
-	/*
-	 * pseudo-mem:  The 32bit address of the PCMCIA memory space for
-	 * this socket (usually the 36bit address shifted 4 to the right)
-	 */
+	/* 36bit PCMCIA Memory area address */
 	r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pcmcia-mem");
 	if (!r) {
 		printk(KERN_ERR "pcmcia%d has no 'pseudo-mem' resource!\n",
@@ -484,10 +476,7 @@ static int __devinit db1x_pcmcia_socket_probe(struct platform_device *pdev)
 	}
 	sock->phys_mem = r->start;
 
-	/*
-	 * pseudo-io:  The 32bit address of the PCMCIA IO space for this
-	 * socket (usually the 36bit address shifted 4 to the right).
-	 */
+	/* 36bit PCMCIA IO area address */
 	r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pcmcia-io");
 	if (!r) {
 		printk(KERN_ERR "pcmcia%d has no 'pseudo-io' resource!\n",
diff --git a/drivers/pcmcia/xxs1500_ss.c b/drivers/pcmcia/xxs1500_ss.c
index 61560cd..f9009d3 100644
--- a/drivers/pcmcia/xxs1500_ss.c
+++ b/drivers/pcmcia/xxs1500_ss.c
@@ -218,11 +218,7 @@ static int __devinit xxs1500_pcmcia_probe(struct platform_device *pdev)
 
 	ret = -ENODEV;
 
-	/*
-	 * pseudo-attr:  The 32bit address of the PCMCIA attribute space
-	 * for this socket (usually the 36bit address shifted 4 to the
-	 * right).
-	 */
+	/* 36bit PCMCIA Attribute area address */
 	r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pcmcia-attr");
 	if (!r) {
 		dev_err(&pdev->dev, "missing 'pcmcia-attr' resource!\n");
@@ -230,10 +226,7 @@ static int __devinit xxs1500_pcmcia_probe(struct platform_device *pdev)
 	}
 	sock->phys_attr = r->start;
 
-	/*
-	 * pseudo-mem:  The 32bit address of the PCMCIA memory space for
-	 * this socket (usually the 36bit address shifted 4 to the right)
-	 */
+	/* 36bit PCMCIA Memory area address */
 	r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pcmcia-mem");
 	if (!r) {
 		dev_err(&pdev->dev, "missing 'pcmcia-mem' resource!\n");
@@ -241,10 +234,7 @@ static int __devinit xxs1500_pcmcia_probe(struct platform_device *pdev)
 	}
 	sock->phys_mem = r->start;
 
-	/*
-	 * pseudo-io:  The 32bit address of the PCMCIA IO space for this
-	 * socket (usually the 36bit address shifted 4 to the right).
-	 */
+	/* 36bit PCMCIA IO area address */
 	r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pcmcia-io");
 	if (!r) {
 		dev_err(&pdev->dev, "missing 'pcmcia-io' resource!\n");
-- 
1.7.0


From sebastian@breakpoint.cc Mon Mar  1 20:59:00 2010
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From:   Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
To:     David Miller <davem@davemloft.net>
Cc:     ralf@linux-mips.org, linux-mips@linux-mips.org,
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Subject: Re: [PATCH 3/3] ide: move dcache flushing to generic ide code
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* David Miller | 2010-02-28 18:34:17 [-0800]:

>From: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
>Date: Sun, 28 Feb 2010 16:35:41 +0100
>
>> the pio callbacks are called with different kind of buffers. It could be
>> a straight kernel addr, kernel stack or a kmaped highmem page.
>> Some of this break the virt_to_page() assumptions.
>> This patch moves the dcache flush from architecture code into generic
>> ide code. ide_pio_bytes() is the only place where user pages might be
>> written as far as I can see.
>> The dcache flush is avoided in two cases:
>> - data which is written to the device (i.e. they are comming from the
>>   userland)
>
>This needs a flush on sparc, otherwise an alias now exists in the
>kernel side copy of the buffer.  The D-cache flush is intentionally
>unconditional for PIO mode.  I definitely don't want to take the same
>risks you guys seem to be willing to take for this optimization which
>is of questionable value.
It is not us guys it is just me. And if it is a stupid thing to do then
I get probably punched by Ralf as well once he gets back.
The part I don't get is why you have to flush dcache after the copy
process. I would understand a flush before reading. The dcache alias in
kernel shouldn't hurt since it is not used anymore. Unless we read twice
from the same page. Is this the trick?

>I also, intrinsically, really don't like these changes.
>
>For one thing, you're optimizing PIO mode.
>
>Secondly, IDE is in deep maintainence mode, if you want to optimize
>cache flushing do it in the ATA layer.
This patch patch was mostly driven by the fact that the buffer can be a
normal kernel mapping or a virtual address. The latter doesn't work with
virt_to_page().
Anyway I should probably spent more time getting ATA layer wokring than
on the IDE layer since it is somehow working since patch#1.

>
>Thanks.

Sebastian

From linux@dominikbrodowski.net Mon Mar  1 21:30:19 2010
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From:   Dominik Brodowski <linux@dominikbrodowski.net>
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        Linux-MIPS <linux-mips@linux-mips.org>,
        Manuel Lauss <manuel.lauss@gmail.com>
Subject: Re: [PATCH] pcmcia: alchemy: fixup wrong comments
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Hey Manuel,

On Mon, Mar 01, 2010 at 05:58:38PM +0100, Manuel Lauss wrote:
> Commit 11b897cf84c37e6522db914793677e933ef311fb  changed expected
> pcmcia area addresses from the 32bit pseudo to the real 36bit
> addresses, but did not update the comments.

thanks for the patch. Could you add your Signed-off-by (as per
Documentation/SubmittingPatches), please?

Thanks
	Dominik

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From:   Florian Fainelli <florian@openwrt.org>
Date:   Mon, 1 Mar 2010 23:36:07 +0100
Subject: [PATCH 0/4] bcm63xx: misc fixes and new boards
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Hi Ralf,

These are some misc fixes and two new board definitions applying on top of 
Maxime's series:

bcm63xx updates for 2.6.34 and bcm63xx_uart updates for 2.6.34

Florian Fainelli (4):
  bcm63xx: fix tabs vs spaces in board_bcm963xx.c
  bcm63xx: add rta1025w_16 board
  bcm63xx: add DWVS0 board
  bcm63xx: fix BCM6338 and BCM6345 gpio count

Thanks!

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From:   Florian Fainelli <florian@openwrt.org>
Date:   Mon, 1 Mar 2010 23:36:15 +0100
Subject: [PATCH 1/4] bcm63xx: fix tabs vs spaces in board_bcm963xx.c
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Signed-off-by: Florian Fainelli <florian@openwrt.org>
---
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index 90faa37..00fa96b 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -361,9 +361,9 @@ static struct board_info __initdata board_FAST2404 = {
 	.expected_cpu_id		= 0x6348,
 
 	.has_uart0			= 1,
-        .has_enet0			= 1,
-        .has_enet1			= 1,
-        .has_pci			= 1,
+	.has_enet0			= 1,
+	.has_enet1			= 1,
+	.has_pci			= 1,
 
 	.enet0 = {
 		.has_phy		= 1,


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From:   Florian Fainelli <florian@openwrt.org>
Date:   Mon, 1 Mar 2010 23:36:22 +0100
Subject: [PATCH 2/4] bcm63xx: add rta1025w_16 board
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Add the RTA1025W-16 BCM6348-based board to the list of suppported boards.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
---
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index 00fa96b..0b1d60f 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -380,6 +380,25 @@ static struct board_info __initdata board_FAST2404 = {
 	.has_ehci0			= 1,
 };
 
+static struct board_info __initdata board_rta1025w_16 = {
+	.name				= "RTA1025W_16",
+	.expected_cpu_id		= 0x6348,
+
+	.has_enet0			= 1,
+	.has_enet1			= 1,
+	.has_pci			= 1,
+
+	.enet0 = {
+		.has_phy		= 1,
+		.use_internal_phy	= 1,
+	},
+	.enet1 = {
+		.force_speed_100	= 1,
+		.force_duplex_full	= 1,
+	},
+};
+
+
 static struct board_info __initdata board_DV201AMR = {
 	.name				= "DV201AMR",
 	.expected_cpu_id		= 0x6348,
@@ -569,6 +588,7 @@ static const struct board_info __initdata *bcm963xx_boards[] = {
 	&board_FAST2404,
 	&board_DV201AMR,
 	&board_96348gw_a,
+	&board_rta1025w_16,
 #endif
 
 #ifdef CONFIG_BCM63XX_CPU_6358

From f.fainelli@gmail.com Mon Mar  1 23:37:28 2010
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From:   Florian Fainelli <florian@openwrt.org>
Date:   Mon, 1 Mar 2010 23:36:27 +0100
Subject: [PATCH 3/4] bcm63xx: add DWVS0 board
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The DWVS0 board is a BCM6358-based board with an on-board OHCI controler.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
---
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index 0b1d60f..8bf2c01 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -567,6 +567,27 @@ static struct board_info __initdata board_AGPFS0 = {
 	.has_ohci0 = 1,
 	.has_ehci0 = 1,
 };
+
+static struct board_info __initdata board_DWVS0 = {
+	.name				= "DWV-S0",
+	.expected_cpu_id		= 0x6358,
+
+	.has_enet0			= 1,
+	.has_enet1			= 1,
+	.has_pci			= 1,
+
+	.enet0 = {
+		.has_phy		= 1,
+		.use_internal_phy	= 1,
+	},
+
+	.enet1 = {
+		.force_speed_100	= 1,
+		.force_duplex_full	= 1,
+	},
+
+	.has_ohci0 = 1,
+};
 #endif
 
 /*
@@ -595,6 +616,7 @@ static const struct board_info __initdata *bcm963xx_boards[] = {
 	&board_96358vw,
 	&board_96358vw2,
 	&board_AGPFS0,
+	&board_DWVS0,
 #endif
 };
 


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From:   Florian Fainelli <florian@openwrt.org>
Date:   Mon, 1 Mar 2010 23:36:32 +0100
Subject: [PATCH 4/4] bcm63xx: fix BCM6338 and BCM6345 gpio count
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The number of GPIOs on BCM6338 is 8, while BCM6345 has only 16 GPIOs
available.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
---
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
index 76a0b72..43d4da0 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
@@ -10,6 +10,10 @@ static inline unsigned long bcm63xx_gpio_count(void)
 	switch (bcm63xx_get_cpu_id()) {
 	case BCM6358_CPU_ID:
 		return 40;
+	case BCM6338_CPU_ID:
+		return 8;
+	case BCM6345_CPU_ID:
+		return 16;
 	case BCM6348_CPU_ID:
 	default:
 		return 37;



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From: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
Date: Mon, 1 Mar 2010 20:58:58 +0100

> The part I don't get is why you have to flush dcache after the copy
> process. I would understand a flush before reading. The dcache alias in
> kernel shouldn't hurt since it is not used anymore. Unless we read twice
> from the same page. Is this the trick?

Anything that puts the data into the cache on the kernel
side is a problem.  The page is still potentially in user
space, as a result there will be thus two active mappings
in the cache, one in the kernel side and one in the user
side.  The user can then do various operations which can
access either mapping.

Writing to it via write() system call, writing to it via
mmap(), making the kernel write to it by doing a read()
with the buffer pointing into the mmap() area.

All we need is a modification on either side for the other
one to potentially become stale.

>>Secondly, IDE is in deep maintainence mode, if you want to optimize
>>cache flushing do it in the ATA layer.
> This patch patch was mostly driven by the fact that the buffer can be a
> normal kernel mapping or a virtual address. The latter doesn't work with
> virt_to_page().
> Anyway I should probably spent more time getting ATA layer wokring than
> on the IDE layer since it is somehow working since patch#1.

All buffers passed to the architecture IDE ops should be PAGE_OFFSET
relative kernel virtual addresses for which __pa() works.

Are kmap()'d things ending up here?

It all works out on sparc64 because we don't have highmem and
kernel stacks are just in normal kernel pages.

From sshtylyov@mvista.com Tue Mar  2 11:34:23 2010
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Date:   Tue, 02 Mar 2010 13:33:49 +0300
From:   Sergei Shtylyov <sshtylyov@mvista.com>
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To:     Florian Fainelli <florian@openwrt.org>
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Subject: Re: [PATCH 3/4] bcm63xx: add DWVS0 board
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Hello.

Florian Fainelli wrote:

> The DWVS0 board is a BCM6358-based board with an on-board OHCI controler.
>
> Signed-off-by: Florian Fainelli <florian@openwrt.org>
> ---
> diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
> index 0b1d60f..8bf2c01 100644
> --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
> +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
> @@ -567,6 +567,27 @@ static struct board_info __initdata board_AGPFS0 = {
>  	.has_ohci0 = 1,
>  	.has_ehci0 = 1,
>  };
> +
> +static struct board_info __initdata board_DWVS0 = {
> +	.name				= "DWV-S0",
> +	.expected_cpu_id		= 0x6358,
> +
> +	.has_enet0			= 1,
> +	.has_enet1			= 1,
> +	.has_pci			= 1,
> +
> +	.enet0 = {
> +		.has_phy		= 1,
> +		.use_internal_phy	= 1,
> +	},
> +
> +	.enet1 = {
> +		.force_speed_100	= 1,
> +		.force_duplex_full	= 1,
> +	},
> +
> +	.has_ohci0 = 1,
>   

   Why it's not aligned with the rest of initializers?

WBR, Sergei


From ffainelli@freebox.fr Tue Mar  2 14:39:01 2010
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From:   Florian Fainelli <ffainelli@freebox.fr>
Organization: Freebox
To:     Maxime Bizon <mbizon@freebox.fr>
Subject: Re: [PATCH 6/7] MIPS: bcm63xx: call board_register_device from device_initcall()
Date:   Tue, 2 Mar 2010 14:38:47 +0100
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Hi Maxime,

On Saturday 30 January 2010 18:34:57 Maxime Bizon wrote:
> Some device registration (eg leds), expect subsystem initcall to be
> run first, so move board device registration to device_initcall().
> 
> Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
> ---
>  arch/mips/bcm63xx/setup.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/mips/bcm63xx/setup.c b/arch/mips/bcm63xx/setup.c
> index d005659..04a3499 100644
> --- a/arch/mips/bcm63xx/setup.c
> +++ b/arch/mips/bcm63xx/setup.c
> @@ -124,4 +124,4 @@ int __init bcm63xx_register_devices(void)
>  	return board_register_devices();
>  }
> 
> -arch_initcall(bcm63xx_register_devices);
> +device_initcall(bcm63xx_register_devices);

This breaks the fallback SPROM registration, that one needs to be set before
the PCI subsystem is intialized, otherwise b43 gets an empty WLAN MAC
address. This was the reason to move bcm63xx_register_devices to
the arch_initcall level in the first place.

Let's use the first stage board callback which also has to be called prior to
PCI initialization.

From: Florian Fainelli <ffainelli@freebox.fr>
Subject: [PATCH] bcm63xx: register SSB SPROM fallback in board's first stage callback

Signed-off-by: Florian Fainelli <ffainelli@freebox.fr>
---
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index 90faa37..f7e0be1 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -676,6 +676,17 @@ void __init board_prom_init(void)
 	}
 
 	bcm_gpio_writel(val, GPIO_MODE_REG);
+
+	/* Generate MAC address for WLAN and
+	 * register our SPROM */
+#ifdef CONFIG_SSB_PCIHOST
+	if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
+		memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+		memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+		if (ssb_arch_set_fallback_sprom(&bcm63xx_sprom) < 0)
+			printk(KERN_ERR "failed to register fallback SPROM\n");
+	}
+#endif
 }
 
 /*
@@ -835,17 +846,6 @@ int __init board_register_devices(void)
 	if (board.has_dsp)
 		bcm63xx_dsp_register(&board.dsp);
 
-	/* Generate MAC address for WLAN and
-	 * register our SPROM */
-#ifdef CONFIG_SSB_PCIHOST
-	if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
-		memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-		memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-		if (ssb_arch_set_fallback_sprom(&bcm63xx_sprom) < 0)
-			printk(KERN_ERR "failed to register fallback SPROM\n");
-	}
-#endif
-
 	/* read base address of boot chip select (0) */
 	if (BCMCPU_IS_6345())
 		val = 0x1fc00000;


From yad.naveen@gmail.com Tue Mar  2 14:54:23 2010
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Subject: kmemleak for MIPS
From:   naveen yadav <yad.naveen@gmail.com>
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        linux-mm@kvack.org
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Hi all,

I want to check kmemleak for both ARM/MIPS. i am able to find kernel
patch for ARM at
http://linux.derkeiler.com/Mailing-Lists/Kernel/2009-04/msg11830.html.
But I could not able to trace patch for MIPS.

Kind Regards
Naveen

From andrea.gelmini@gmail.com Tue Mar  2 16:13:12 2010
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Subject: Re: [PATCH 42/66] arch/mips/lib/libgcc.h: Checkpatch cleanup
From:   Andrea Gelmini <andrea.gelmini@gelma.net>
To:     Paul Mundt <lethal@linux-sh.org>
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2010/3/1 Paul Mundt <lethal@linux-sh.org>:
Hi Paul,
   thanks for your reply.

> I'll apply the sh part by itself, and I suppose Ralf will do the same for
> MIPS. I'm a bit confused as to why these were lumped together when 65 out
> of 66 oneliner patches made no use of ad-hoc grouping.

After the experience with GregKH, I was looking for others maintainer
interested in code cleanup. So I sent some patches over random files.
If you care, I can checkpatch.pl all mips subtree and send you patches (if any).

Thanks a lot for your work,
Andrea

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* David Miller | 2010-03-01 16:39:59 [-0800]:

>All buffers passed to the architecture IDE ops should be PAGE_OFFSET
>relative kernel virtual addresses for which __pa() works.
>
>Are kmap()'d things ending up here?
Ah, bounce buffers are used. So no, there no highmem which get kmap()ed.

Sebastian

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Subject: Octeon: Several misc fixes
Date:   Wed,  3 Mar 2010 15:26:09 +0800
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Hi David & Ralf,

These are some misc build fixes for Octeon.

Yang Shi (3):
  MIPS: Octeon: Remove superfluous on_each_cpu parameter
  MIPS: Octeon: Remove redundant declaration of octeon_reserve32_memory
  MIPS: Octeon: Add add_wired_entry decralation in header file

Thanks,
Yang

From yang.shi@windriver.com Wed Mar  3 08:26:49 2010
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From:   Yang Shi <yang.shi@windriver.com>
To:     ddaney@caviumnetworks.com, ralf@linux-mips.org
Cc:     linux-mips@linux-mips.org
Subject: [PATCH 2/3] MIPS: Octeon: Remove redundant declaration of octeon_reserve32_memory
Date:   Wed,  3 Mar 2010 15:26:11 +0800
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In Octeon's setup.c, octeon_reserve32_memory is defined, so remove the
redundant extern declaration of this variable.

Signed-off-by: Yang Shi <yang.shi@windriver.com>
---
 arch/mips/cavium-octeon/setup.c |    3 ---
 1 files changed, 0 insertions(+), 3 deletions(-)

diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 4eaa35f..8309d68 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -45,9 +45,6 @@ extern struct plat_smp_ops octeon_smp_ops;
 extern void pci_console_init(const char *arg);
 #endif
 
-#ifdef CONFIG_CAVIUM_RESERVE32
-extern uint64_t octeon_reserve32_memory;
-#endif
 static unsigned long long MAX_MEMORY = 512ull << 20;
 
 struct octeon_boot_descriptor *octeon_boot_desc_ptr;
-- 
1.6.3.3


From yang.shi@windriver.com Wed Mar  3 08:27:14 2010
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From:   Yang Shi <yang.shi@windriver.com>
To:     ddaney@caviumnetworks.com, ralf@linux-mips.org
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Subject: [PATCH 3/3] MIPS: Octeon: Add add_wired_entry decralation in header file
Date:   Wed,  3 Mar 2010 15:26:12 +0800
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Octeon's setup.c uses add_wired_entry, but it is not declared
anywhere. Copy add_wired_entry decralation fomr pgtable-32.h to
pgtable-64.h and include asm/pgtable.h into Octeon's setup.c.

Signed-off-by: Yang Shi <yang.shi@windriver.com>
---
 arch/mips/cavium-octeon/setup.c    |    1 +
 arch/mips/include/asm/pgtable-64.h |    6 ++++++
 2 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 8309d68..f35ba16 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -30,6 +30,7 @@
 #include <asm/bootinfo.h>
 #include <asm/sections.h>
 #include <asm/time.h>
+#include <asm/pagtable.h>
 
 #include <asm/octeon/octeon.h>
 
diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h
index 26dc69d..85ee34d 100644
--- a/arch/mips/include/asm/pgtable-64.h
+++ b/arch/mips/include/asm/pgtable-64.h
@@ -23,6 +23,12 @@
 #endif
 
 /*
+ * - add_wired_entry() add a fixed TLB entry, and move wired register
+ */
+extern void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
+			       unsigned long entryhi, unsigned long pagemask);
+
+/*
  * Each address space has 2 4K pages as its page directory, giving 1024
  * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
  * single 4K page, giving 512 (== PTRS_PER_PMD) 8 byte pointers to page
-- 
1.6.3.3


From yang.shi@windriver.com Wed Mar  3 08:27:39 2010
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From:   Yang Shi <yang.shi@windriver.com>
To:     ddaney@caviumnetworks.com, ralf@linux-mips.org
Cc:     linux-mips@linux-mips.org
Subject: [PATCH 1/3] MIPS: Octeon: Remove superfluous on_each_cpu parameter
Date:   Wed,  3 Mar 2010 15:26:10 +0800
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Now, on_each_cpu just need three parameters, but the on_each_cpu
still uses four parameters in Octeon's setup.c. So, remove the
superfluous parameter.

Signed-off-by: Yang Shi <yang.shi@windriver.com>
---
 arch/mips/cavium-octeon/setup.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index b321d3b..4eaa35f 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -230,7 +230,7 @@ static void octeon_hal_setup_per_cpu_reserved32(void *unused)
 void octeon_hal_setup_reserved32(void)
 {
 #ifdef CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB
-	on_each_cpu(octeon_hal_setup_per_cpu_reserved32, NULL, 0, 1);
+	on_each_cpu(octeon_hal_setup_per_cpu_reserved32, NULL, 1);
 #endif
 }
 
-- 
1.6.3.3


From f.fainelli@gmail.com Wed Mar  3 09:19:59 2010
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From:   Florian Fainelli <florian@openwrt.org>
Organization: OpenWrt
To:     Yang Shi <yang.shi@windriver.com>
Subject: Re: [PATCH 3/3] MIPS: Octeon: Add add_wired_entry decralation in header file
Date:   Wed, 3 Mar 2010 09:19:35 +0100
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Hi Yang,

On Wednesday 03 March 2010 08:26:12 Yang Shi wrote:
> Octeon's setup.c uses add_wired_entry, but it is not declared
> anywhere. Copy add_wired_entry decralation fomr pgtable-32.h to
> pgtable-64.h and include asm/pgtable.h into Octeon's setup.c.
> 
> Signed-off-by: Yang Shi <yang.shi@windriver.com>
> ---
>  arch/mips/cavium-octeon/setup.c    |    1 +
>  arch/mips/include/asm/pgtable-64.h |    6 ++++++
>  2 files changed, 7 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/mips/cavium-octeon/setup.c
>  b/arch/mips/cavium-octeon/setup.c index 8309d68..f35ba16 100644
> --- a/arch/mips/cavium-octeon/setup.c
> +++ b/arch/mips/cavium-octeon/setup.c
> @@ -30,6 +30,7 @@
>  #include <asm/bootinfo.h>
>  #include <asm/sections.h>
>  #include <asm/time.h>
> +#include <asm/pagtable.h>

You probably meant to include <asm/pgtable.h> instead.

> 
>  #include <asm/octeon/octeon.h>
> 
> diff --git a/arch/mips/include/asm/pgtable-64.h
>  b/arch/mips/include/asm/pgtable-64.h index 26dc69d..85ee34d 100644
> --- a/arch/mips/include/asm/pgtable-64.h
> +++ b/arch/mips/include/asm/pgtable-64.h
> @@ -23,6 +23,12 @@
>  #endif
> 
>  /*
> + * - add_wired_entry() add a fixed TLB entry, and move wired register
> + */
> +extern void add_wired_entry(unsigned long entrylo0, unsigned long
>  entrylo1, +			       unsigned long entryhi, unsigned long pagemask);
> +
> +/*
>   * Each address space has 2 4K pages as its page directory, giving 1024
>   * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
>   * single 4K page, giving 512 (== PTRS_PER_PMD) 8 byte pointers to page
> 

-- 
Regards, Florian

From Yang.Shi@windriver.com Wed Mar  3 09:25:32 2010
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Subject: Re: [PATCH 3/3] MIPS: Octeon: Add add_wired_entry decralation in
 header file
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Florian Fainelli å†™é“:
> Hi Yang,
>
> On Wednesday 03 March 2010 08:26:12 Yang Shi wrote:
>   
>> Octeon's setup.c uses add_wired_entry, but it is not declared
>> anywhere. Copy add_wired_entry decralation fomr pgtable-32.h to
>> pgtable-64.h and include asm/pgtable.h into Octeon's setup.c.
>>
>> Signed-off-by: Yang Shi <yang.shi@windriver.com>
>> ---
>>  arch/mips/cavium-octeon/setup.c    |    1 +
>>  arch/mips/include/asm/pgtable-64.h |    6 ++++++
>>  2 files changed, 7 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/mips/cavium-octeon/setup.c
>>  b/arch/mips/cavium-octeon/setup.c index 8309d68..f35ba16 100644
>> --- a/arch/mips/cavium-octeon/setup.c
>> +++ b/arch/mips/cavium-octeon/setup.c
>> @@ -30,6 +30,7 @@
>>  #include <asm/bootinfo.h>
>>  #include <asm/sections.h>
>>  #include <asm/time.h>
>> +#include <asm/pagtable.h>
>>     
>
> You probably meant to include <asm/pgtable.h> instead.
>   

Yes, thanks to point out this.

V2 will be sent soon.

Regards,
Yang

>   
>>  #include <asm/octeon/octeon.h>
>>
>> diff --git a/arch/mips/include/asm/pgtable-64.h
>>  b/arch/mips/include/asm/pgtable-64.h index 26dc69d..85ee34d 100644
>> --- a/arch/mips/include/asm/pgtable-64.h
>> +++ b/arch/mips/include/asm/pgtable-64.h
>> @@ -23,6 +23,12 @@
>>  #endif
>>
>>  /*
>> + * - add_wired_entry() add a fixed TLB entry, and move wired register
>> + */
>> +extern void add_wired_entry(unsigned long entrylo0, unsigned long
>>  entrylo1, +			       unsigned long entryhi, unsigned long pagemask);
>> +
>> +/*
>>   * Each address space has 2 4K pages as its page directory, giving 1024
>>   * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
>>   * single 4K page, giving 512 (== PTRS_PER_PMD) 8 byte pointers to page
>>
>>     
>
>   


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From:   Yang Shi <yang.shi@windriver.com>
To:     ddaney@caviumnetworks.com, ralf@linux-mips.org,
        f.fainelli@gmail.com
Cc:     linux-mips@linux-mips.org
Subject: [V2] Octeon: Several misc fixes
Date:   Wed,  3 Mar 2010 16:43:18 +0800
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Hi David & Ralf,

These are some misc build fixes for Octeon.

Fixed two spelling errors against the first version.

Yang Shi (3):
  MIPS: Octeon: Remove superfluous on_each_cpu parameter
  MIPS: Octeon: Remove redundant declaration of octeon_reserve32_memory
  MIPS: Octeon: Add add_wired_entry decralation in header file

Thanks,
Yang

From yang.shi@windriver.com Wed Mar  3 09:43:57 2010
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To:     ddaney@caviumnetworks.com, ralf@linux-mips.org,
        f.fainelli@gmail.com
Cc:     linux-mips@linux-mips.org
Subject: [PATCH 1/3] MIPS: Octeon: Remove superfluous on_each_cpu parameter
Date:   Wed,  3 Mar 2010 16:43:19 +0800
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Now, on_each_cpu just need three parameters, but the on_each_cpu
still uses four parameters in Octeon's setup.c. So, remove the
superfluous parameter.

Signed-off-by: Yang Shi <yang.shi@windriver.com>
---
 arch/mips/cavium-octeon/setup.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index b321d3b..4eaa35f 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -230,7 +230,7 @@ static void octeon_hal_setup_per_cpu_reserved32(void *unused)
 void octeon_hal_setup_reserved32(void)
 {
 #ifdef CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB
-	on_each_cpu(octeon_hal_setup_per_cpu_reserved32, NULL, 0, 1);
+	on_each_cpu(octeon_hal_setup_per_cpu_reserved32, NULL, 1);
 #endif
 }
 
-- 
1.6.3.3


From yang.shi@windriver.com Wed Mar  3 09:44:20 2010
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        f.fainelli@gmail.com
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Subject: [PATCH 2/3] MIPS: Octeon: Remove redundant declaration of octeon_reserve32_memory
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In Octeon's setup.c, octeon_reserve32_memory is defined, so remove the
redundant extern declaration of this variable.

Signed-off-by: Yang Shi <yang.shi@windriver.com>
---
 arch/mips/cavium-octeon/setup.c |    3 ---
 1 files changed, 0 insertions(+), 3 deletions(-)

diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 4eaa35f..8309d68 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -45,9 +45,6 @@ extern struct plat_smp_ops octeon_smp_ops;
 extern void pci_console_init(const char *arg);
 #endif
 
-#ifdef CONFIG_CAVIUM_RESERVE32
-extern uint64_t octeon_reserve32_memory;
-#endif
 static unsigned long long MAX_MEMORY = 512ull << 20;
 
 struct octeon_boot_descriptor *octeon_boot_desc_ptr;
-- 
1.6.3.3


From yang.shi@windriver.com Wed Mar  3 09:44:43 2010
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To:     ddaney@caviumnetworks.com, ralf@linux-mips.org,
        f.fainelli@gmail.com
Cc:     linux-mips@linux-mips.org
Subject: [PATCH 3/3] MIPS: Octeon: Add add_wired_entry decralation in header file
Date:   Wed,  3 Mar 2010 16:43:21 +0800
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Octeon's setup.c uses add_wired_entry, but it is not declared
anywhere. Copy add_wired_entry decralation from pgtable-32.h to
pgtable-64.h and include asm/pgtable.h into Octeon's setup.c.

Signed-off-by: Yang Shi <yang.shi@windriver.com>
---
 arch/mips/cavium-octeon/setup.c    |    1 +
 arch/mips/include/asm/pgtable-64.h |    6 ++++++
 2 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 8309d68..d63b8e6 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -30,6 +30,7 @@
 #include <asm/bootinfo.h>
 #include <asm/sections.h>
 #include <asm/time.h>
+#include <asm/pgtable.h>
 
 #include <asm/octeon/octeon.h>
 
diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h
index 26dc69d..85ee34d 100644
--- a/arch/mips/include/asm/pgtable-64.h
+++ b/arch/mips/include/asm/pgtable-64.h
@@ -23,6 +23,12 @@
 #endif
 
 /*
+ * - add_wired_entry() add a fixed TLB entry, and move wired register
+ */
+extern void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
+			       unsigned long entryhi, unsigned long pagemask);
+
+/*
  * Each address space has 2 4K pages as its page directory, giving 1024
  * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
  * single 4K page, giving 512 (== PTRS_PER_PMD) 8 byte pointers to page
-- 
1.6.3.3


From lists@nabble.com Wed Mar  3 11:11:35 2010
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From:   Dea_RU <dryukovz@mail.ru>
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Subject: TI AR7 7200 - no boot
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I build kernel 2.6.33 for TI AR7 cpu 7200 version.

boot halt on console init stage/

gcc 4.3.3
==============================
linwork:/opt/mipsel32/usr/bin# ./mipsel-linux-gcc-4.3.3 -v
Using built-in specs.
Target: mipsel-uclibc-linux
Configured with:
/Acorp/buildroot-2010.02-rc1/output/toolchain/gcc-4.3.3/configure
--prefix=/usr --build=i386-cross-linux-uclibc --host=i386-cross-linux-uclibc
--target=mipsel-uclibc-linux --enable-languages=c,c++
--with-sysroot=/opt/mipsel32/
--with-build-time-tools=/opt/mipsel32//usr/mipsel-uclibc-linux/bin
--disable-__cxa_atexit --enable-target-optspace --with-gnu-ld
--disable-libssp --enable-tls --enable-shared
--with-gmp=/Acorp/buildroot-2010.02-rc1/output/toolchain/gmp
--with-mpfr=/Acorp/buildroot-2010.02-rc1/output/toolchain/mpfr --disable-nls
--enable-threads --disable-multilib --disable-decimal-float --with-abi=32
--with-tune=mips1 --disable-largefile --with-endian=little,big
--with-pkgversion='Buildroot 2010.02-rc1'
--with-bugurl=http://bugs.buildroot.net/ : (reconfigured)
/Acorp/buildroot-2010.02-rc1/output/toolchain/gcc-4.3.3/configure
--prefix=/usr --build=i386-cross-linux-uclibc --host=i386-cross-linux-uclibc
--target=mipsel-uclibc-linux --enable-languages=c,c++
--with-sysroot=/opt/mipsel32/
--with-build-time-tools=/opt/mipsel32//usr/mipsel-uclibc-linux/bin
--disable-__cxa_atexit --enable-target-optspace --with-gnu-ld
--disable-libssp --enable-tls --enable-shared
--with-gmp=/Acorp/buildroot-2010.02-rc1/output/toolchain/gmp
--with-mpfr=/Acorp/buildroot-2010.02-rc1/output/toolchain/mpfr --disable-nls
--enable-threads --disable-multilib --disable-decimal-float --with-abi=32
--with-tune=mips1 --disable-largefile --with-pkgversion='Buildroot
2010.02-rc1' --with-bugurl=http://bugs.buildroot.net/
Thread model: posix
gcc version 4.3.3 (Buildroot 2010.02-rc1)
===========
kernel cfg

CONFIG_MIPS=y

CONFIG_AR7=y
CONFIG_LOONGSON_UART_BASE=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_SCHED_OMIT_FRAME_POINTER=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_BOOT_RAW=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CEVT_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_CSRC_R4K=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_GENERIC_GPIO=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y
CONFIG_NO_EXCEPT_FILL=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_MIPS_L1_CACHE_SHIFT=5

CONFIG_CPU_MIPS32_R1=y
CONFIG_SYS_SUPPORTS_ZBOOT=y
CONFIG_SYS_SUPPORTS_ZBOOT_UART16550=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPSR1=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_HARDWARE_WATCHPOINTS=y

CONFIG_32BIT=y
CONFIG_PAGE_SIZE_4KB=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_MIPS_MT_DISABLED=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_ARCH_FLATMEM_ENABLE=y
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_ZONE_DMA_FLAG=0
CONFIG_VIRT_TO_BUS=y
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_HZ_250=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_HZ=250
CONFIG_PREEMPT_NONE=y
CONFIG_SECCOMP=y
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_CONSTRUCTORS=y

# General setup
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_LOCALVERSION=""
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_BZIP2=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_KERNEL_LZMA=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y

# RCU Subsystem
CONFIG_TINY_RCU=y
CONFIG_LOG_BUF_SHIFT=17
CONFIG_GROUP_SCHED=y
CONFIG_FAIR_GROUP_SCHED=y
CONFIG_USER_SCHED=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
CONFIG_EMBEDDED=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
CONFIG_AIO=y

# Kernel Performance Events And Counters
CONFIG_SLAB=y
CONFIG_HAVE_OPROFILE=y

# GCOV-based kernel profiling
CONFIG_SLOW_WORK=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_INLINE_SPIN_UNLOCK=y
CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
CONFIG_INLINE_READ_UNLOCK=y
CONFIG_INLINE_READ_UNLOCK_IRQ=y
CONFIG_INLINE_WRITE_UNLOCK=y
CONFIG_INLINE_WRITE_UNLOCK_IRQ=y

# Bus options (PCI, PCMCIA, EISA, ISA, TC)
CONFIG_MMU=y

# Executable file formats
CONFIG_BINFMT_ELF=y
CONFIG_BINFMT_MISC=y
CONFIG_TRAD_SIGNALS=y

# Power management options
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y

# Device Drivers

# Generic Driver Options
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_MTD=y
CONFIG_MTD_DEBUG=y
CONFIG_MTD_DEBUG_VERBOSE=0
# CONFIG_MTD_TESTS is not set
# CONFIG_MTD_CONCAT is not set
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_AR7_PARTS=y

# RAM/ROM/Flash chip drivers
CONFIG_MTD_MAP_BANK_WIDTH_1=y
CONFIG_MTD_MAP_BANK_WIDTH_2=y
CONFIG_MTD_MAP_BANK_WIDTH_4=y
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y

# Input device support
CONFIG_INPUT=y

# Character devices
CONFIG_VT=y
CONFIG_HW_CONSOLE=y

# Serial drivers
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=2
CONFIG_SERIAL_8250_RUNTIME_UARTS=2


# Non-8250 serial port support
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256

# PPS support
CONFIG_PPS=y
CONFIG_PPS_DEBUG=y
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y

# Watchdog Device Drivers
CONFIG_AR7_WDT=y
CONFIG_SSB_POSSIBLE=y

# Console display driver support
CONFIG_DUMMY_CONSOLE=y
CONFIG_ACCESSIBILITY=y
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DEBUG=y

# RTC interfaces
CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
CONFIG_RTC_INTF_DEV_UIE_EMUL=y
CONFIG_RTC_DRV_TEST=y


# on-CPU RTC drivers
CONFIG_AUXDISPLAY=y
CONFIG_UIO=y

# TI VLYNQ
CONFIG_VLYNQ=y
CONFIG_STAGING=y
CONFIG_STAGING_EXCLUDE_BUILD=y

# File systems
CONFIG_FILE_LOCKING=y
CONFIG_FSNOTIFY=y
CONFIG_DNOTIFY=y
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
CONFIG_AUTOFS_FS=y
CONFIG_AUTOFS4_FS=y

# Caches
CONFIG_FSCACHE=y
CONFIG_FSCACHE_DEBUG=y

# Pseudo filesystems
CONFIG_PROC_FS=y
CONFIG_PROC_SYSCTL=y
CONFIG_PROC_PAGE_MONITOR=y
CONFIG_SYSFS=y

# Kernel hacking
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_FRAME_WARN=1024
CONFIG_UNUSED_SYMBOLS=y
CONFIG_DEBUG_MEMORY_INIT=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_TRACING_SUPPORT=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_EARLY_PRINTK=y
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="earlyprintk=ttyS0,9600n,keep"

# Security options
CONFIG_DEFAULT_SECURITY_DAC=y
CONFIG_DEFAULT_SECURITY=""
CONFIG_CRYPTO=y

# Crypto core or helper
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_ALGAPI2=y
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_PCOMP=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_NULL=y
CONFIG_CRYPTO_WORKQUEUE=y

# Hash modes
CONFIG_CRYPTO_HMAC=y

# Digest
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_SHA1=y

# Ciphers
CONFIG_CRYPTO_AES=y

# Compression
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_ZLIB=y
CONFIG_CRYPTO_LZO=y

# Library routines
CONFIG_BITREVERSE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_CRC_CCITT=y
CONFIG_CRC16=y
CONFIG_CRC_T10DIF=y
CONFIG_CRC_ITU_T=y
CONFIG_CRC32=y
CONFIG_CRC7=y
CONFIG_LIBCRC32C=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y
CONFIG_NLATTR=y
===========

booting process:

===========
(psbl) 

Booting...
Linux version 2.6.33 (root@linwork) (gcc version 4.3.3 (Buildroot
2010.02-rc1) ) #1 Wed Mar 3 15:31:18 OMST 2010
bootconsole [early0] enabled
CPU revision is: 00018448 (MIPS 4KEc)
TI AR7 (TNETD7200), ID: 0x002b, Revision: 0x11
Determined physical RAM map:
 memory: 01000000 @ 14000000 (usable)
Zone PFN ranges:
  Normal   0x00014000 -> 0x00015000
Movable zone start PFN for each node
early_node_map[1] active PFN ranges
    0: 0x00014000 -> 0x00015000
Built 1 zonelists in Zone order, mobility grouping off.  Total pages: 4064
Kernel command line:  console=ttyS0,9600n8 earlyprintk=ttyS0,9600
PID hash table entries: 64 (order: -4, 256 bytes)
Dentry cache hash table entries: 2048 (order: 1, 8192 bytes)
Inode-cache hash table entries: 1024 (order: 0, 4096 bytes)
Primary instruction cache 16kB, VIPT, 4-way, linesize 16 bytes.
Primary data cache 8kB, 4-way, VIPT, no aliases, linesize 16 bytes
Memory: 13164k/16384k available (1325k kernel code, 3220k reserved, 408k
data, 120k init, 0k highmem)
NR_IRQS:256
Console: colour dummy device 80x25

==============

stop booting...

what wrong ????

kernels from open-wrt booting with log:
==============================
(psbl) 

Booting...
Linux version 2.6.26.8 (agb@arrakis) (gcc version 4.1.2) #1 Wed Dec 2
15:14:35 UTC 2009
console [early0] enabled
CPU revision is: 00018448 (MIPS 4KEc)
Clocks: Sync 2:1 mode
Clocks: Setting CPU clock
Adjusted requested frequency 211000000 to 211968000
Clocks: base = 35328000, frequency = 211968000, prediv = 1, postdiv = 1,
postdiv2 = -1, mul = 6
Clocks: Setting DSP clock
Clocks: base = 25000000, frequency = 105984000, prediv = 1, postdiv = 2,
postdiv2 = 1, mul = 10
Clocks: Setting USB clock
Adjusted requested frequency 48000000 to 47863741
Clocks: base = 105984000, frequency = 48000000, prediv = 1, postdiv = 31,
postdiv2 = -1, mul = 14
TI AR7 (TNETD7200), ID: 0x002b, Revision: 0x11
Determined physical RAM map:
 memory: 01000000 @ 14000000 (usable)
Initrd not found or empty - disabling initrd
Zone PFN ranges:
  Normal      81920 ->    86016
Movable zone start PFN for each node
early_node_map[1] active PFN ranges
    0:    81920 ->    86016
Built 1 zonelists in Zone order, mobility grouping off.  Total pages: 4064
Kernel command line: init=/etc/preinit rootfstype=squashfs,jffs2,
console=ttyS0,9600n8
Primary instruction cache 16kB, VIPT, 4-way, linesize 16 bytes.
Primary data cache 8kB, 4-way, VIPT, no aliases, linesize 16 bytes
PID hash table entries: 64 (order: 6, 256 bytes)
Dentry cache hash table entries: 2048 (order: 1, 8192 bytes)
Inode-cache hash table entries: 1024 (order: 0, 4096 bytes)
Memory: 12560k/16384k available (2001k kernel code, 3824k reserved, 417k
data, 124k init, 0k highmem)
SLUB: Genslabs=6, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
Mount-cache hash table entries: 512
net_namespace: 644 bytes
NET: Registered protocol family 16
NET: Registered protocol family 2
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
TCP established hash table entries: 512 (order: 0, 4096 bytes)
TCP bind hash table entries: 512 (order: -1, 2048 bytes)
TCP: Hash tables configured (established 512 bind 512)
TCP reno registered
NET: Registered protocol family 1
squashfs: version 3.0 (2006/03/15) Phillip Lougher
Registering mini_fo version $Id$
JFFS2 version 2.2. (NAND) (SUMMARY)  Ã‚Â© 2001-2006 Red Hat, Inc.
msgmni has been set to 24
io scheduler noop registered
io scheduler deadline registered (default)
Serial: 8250/16550 driver $Revision: 1.90 $ 2 ports, IRQ sharing disabled
serial8250: ttyS0 at MMIO 0x8610e00 (irq = 15) is a TI-AR7
-- 
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From f.fainelli@gmail.com Wed Mar  3 11:25:11 2010
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From:   Florian Fainelli <florian@openwrt.org>
Organization: OpenWrt
To:     "Dea_RU" <dryukovz@mail.ru>
Subject: Re: TI AR7 7200 - no boot
Date:   Wed, 3 Mar 2010 11:24:45 +0100
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Hi,

On Wednesday 03 March 2010 11:11:31 Dea_RU wrote:
> I build kernel 2.6.33 for TI AR7 cpu 7200 version.
> 
> boot halt on console init stage/
[snip]
> 
> CONFIG_MIPS=y
> 
> CONFIG_AR7=y
> CONFIG_LOONGSON_UART_BASE=y
> CONFIG_RWSEM_GENERIC_SPINLOCK=y
> CONFIG_ARCH_SUPPORTS_OPROFILE=y
> CONFIG_GENERIC_FIND_NEXT_BIT=y
> CONFIG_GENERIC_HWEIGHT=y
> CONFIG_GENERIC_CALIBRATE_DELAY=y
> CONFIG_GENERIC_CLOCKEVENTS=y
> CONFIG_GENERIC_TIME=y
> CONFIG_GENERIC_CMOS_UPDATE=y
> CONFIG_SCHED_OMIT_FRAME_POINTER=y
> CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
> CONFIG_BOOT_RAW=y
[snip]
> 
> what wrong ????
> 
> kernels from open-wrt booting with log:
> ==============================
> (psbl)
> 
> Booting...
> Linux version 2.6.26.8 (agb@arrakis) (gcc version 4.1.2) #1 Wed Dec 2
> 15:14:35 UTC 2009
> console [early0] enabled
> CPU revision is: 00018448 (MIPS 4KEc)
> Clocks: Sync 2:1 mode
> Clocks: Setting CPU clock
> Adjusted requested frequency 211000000 to 211968000
> Clocks: base = 35328000, frequency = 211968000, prediv = 1, postdiv = 1,
> postdiv2 = -1, mul = 6
> Clocks: Setting DSP clock
> Clocks: base = 25000000, frequency = 105984000, prediv = 1, postdiv = 2,
> postdiv2 = 1, mul = 10
> Clocks: Setting USB clock
> Adjusted requested frequency 48000000 to 47863741
> Clocks: base = 105984000, frequency = 48000000, prediv = 1, postdiv = 31,
> postdiv2 = -1, mul = 14
> TI AR7 (TNETD7200), ID: 0x002b, Revision: 0x11
> Determined physical RAM map:
>  memory: 01000000 @ 14000000 (usable)
> Initrd not found or empty - disabling initrd
> Zone PFN ranges:
>   Normal      81920 ->    86016
> Movable zone start PFN for each node
> early_node_map[1] active PFN ranges
>     0:    81920 ->    86016
> Built 1 zonelists in Zone order, mobility grouping off.  Total pages: 4064
> Kernel command line: init=/etc/preinit rootfstype=squashfs,jffs2,
> console=ttyS0,9600n8
> Primary instruction cache 16kB, VIPT, 4-way, linesize 16 bytes.
> Primary data cache 8kB, 4-way, VIPT, no aliases, linesize 16 bytes
> PID hash table entries: 64 (order: 6, 256 bytes)
> Dentry cache hash table entries: 2048 (order: 1, 8192 bytes)
> Inode-cache hash table entries: 1024 (order: 0, 4096 bytes)
> Memory: 12560k/16384k available (2001k kernel code, 3824k reserved, 417k
> data, 124k init, 0k highmem)
> SLUB: Genslabs=6, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
> Mount-cache hash table entries: 512
> net_namespace: 644 bytes
> NET: Registered protocol family 16
> NET: Registered protocol family 2
> IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
> TCP established hash table entries: 512 (order: 0, 4096 bytes)
> TCP bind hash table entries: 512 (order: -1, 2048 bytes)
> TCP: Hash tables configured (established 512 bind 512)
> TCP reno registered
> NET: Registered protocol family 1
> squashfs: version 3.0 (2006/03/15) Phillip Lougher
> Registering mini_fo version $Id$
> JFFS2 version 2.2. (NAND) (SUMMARY)  Ã‚Â© 2001-2006 Red Hat, Inc.
> msgmni has been set to 24
> io scheduler noop registered
> io scheduler deadline registered (default)
> Serial: 8250/16550 driver $Revision: 1.90 $ 2 ports, IRQ sharing disabled
> serial8250: ttyS0 at MMIO 0x8610e00 (irq = 15) is a TI-AR7
> 

You have one of these devices with bogus UART, (there are quite some out there)
can you try with the following patch and tell me if that gives you an usable console:

diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c
index 246df7a..15cbeeb 100644
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -551,6 +551,7 @@ static int __init ar7_register_uarts(void)
        uart_port.irq           = AR7_IRQ_UART0;
        uart_port.mapbase       = AR7_REGS_UART0;
        uart_port.membase       = ioremap(uart_port.mapbase, 256);
+       uart_port.flags         = UPF_IOREMAP | UPF_BOOT_AUTOCONF;

        res = early_serial_setup(&uart_port);
        if (res)
@@ -562,6 +563,7 @@ static int __init ar7_register_uarts(void)
                uart_port.irq           = AR7_IRQ_UART1;
                uart_port.mapbase       = UR8_REGS_UART1;
                uart_port.membase       = ioremap(uart_port.mapbase, 256);
+               uart_port.flags         = UPF_IOREMAP | UPF_BOOT_AUTOCONF;

                res = early_serial_setup(&uart_port);
                if (res)


Thanks.
-- 
Regards, Florian

From lists@nabble.com Wed Mar  3 11:59:51 2010
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From:   Dea_RU <dryukovz@mail.ru>
To:     linux-mips@linux-mips.org
Subject: Re: TI AR7 7200 - no boot
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Florian Fainelli-4 wrote:
> 
> Hi,
> 
> You have one of these devices with bogus UART, (there are quite some out
> there)
> can you try with the following patch and tell me if that gives you an
> usable console:
> 
> diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c
> index 246df7a..15cbeeb 100644
> --- a/arch/mips/ar7/platform.c
> +++ b/arch/mips/ar7/platform.c
> @@ -551,6 +551,7 @@ static int __init ar7_register_uarts(void)
>         uart_port.irq           = AR7_IRQ_UART0;
>         uart_port.mapbase       = AR7_REGS_UART0;
>         uart_port.membase       = ioremap(uart_port.mapbase, 256);
> +       uart_port.flags         = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
> 
>         res = early_serial_setup(&uart_port);
>         if (res)
> @@ -562,6 +563,7 @@ static int __init ar7_register_uarts(void)
>                 uart_port.irq           = AR7_IRQ_UART1;
>                 uart_port.mapbase       = UR8_REGS_UART1;
>                 uart_port.membase       = ioremap(uart_port.mapbase, 256);
> +               uart_port.flags         = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
> 
>                 res = early_serial_setup(&uart_port);
>                 if (res)
> 
> Thanks.
> -- 
> Regards, Florian
> 



after remark printk with message console color  line 2927 /drivers/char/vt.c

boot process stop with:
====================
....
Primary data cache 8kB, 4-way, VIPT, no aliases, linesize 16 bytes
Memory: 13172k/16384k available (1314k kernel code, 3212k reserved, 411k
data, 120k init, 0k highmem)
NR_IRQS:256
Calibrating delay loop... 
===============
next freeze on delay loop clculation !? IRQ not init correctly ??? 

maby after send byte over USART cpu set flag "USART TX buffer cleared"? and
kernel go to interput vector ???

=========

in kernel src 2.6.33 from mips.org patch based code not present !
/arch/mips/ar7/platform.c 

i added port number flags for version 2.6.33 ....

uart_port[0].flags         = UPF_IOREMAP | UPF_BOOT_AUTOCONF; 
uart_port[1].flags         = UPF_IOREMAP | UPF_BOOT_AUTOCONF; 

==============

after added flags and remark console collor booting stop with:

......
Primary data cache 8kB, 4-way, VIPT, no aliases, linesize 16 bytes
Memory: 13172k/16384k available (1314k kernel code, 3212k reserved, 411k
data, 120k init, 0k highmem)
NR_IRQS:256
Calibrating delay loop... 


-- 
View this message in context: http://old.nabble.com/TI-AR7-7200---no-boot-tp27766331p27766728.html
Sent from the linux-mips main mailing list archive at Nabble.com.


From muvarov@gmail.com Wed Mar  3 12:05:39 2010
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To:     linux-mips@linux-mips.org, kexec@lists.infradead.org
Cc:     horms@verge.net.au, ralf@linux-mips.org
From:   Maxim Uvarov <muvarov@gmail.com>
Subject: [PATCH 1/2] MIPS kexec,kdump support
Date:   Wed, 03 Mar 2010 14:05:27 +0300
Message-ID: <20100303110527.11233.20400.stgit@muvarov>
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Hello folks,

Please find here MIPS crash and kdump patches.
This is patch set of 3 patches:
1. generic MIPS changes (kernel);
2. MIPS Cavium Octeon board kexec/kdump code (kernel);
3. Kexec user space MIPS changes.

Patches were tested on the latest linux-mips@ git kernel and the latest
kexec-tools git on Cavium Octeon 50xx board.

I also made the same code working on RMI XLR/XLS boards for both
mips32 and mips64 kernels.

Best regards,
Maxim Uvarov.


---

 arch/mips/Kconfig                  |   24 ++++++++++
 arch/mips/Makefile                 |    4 ++
 arch/mips/include/asm/kexec.h      |   31 +++++++++++--
 arch/mips/include/asm/smp.h        |    7 +++
 arch/mips/kernel/Makefile          |    3 +
 arch/mips/kernel/crash.c           |   75 +++++++++++++++++++++++++++++++
 arch/mips/kernel/crash_dump.c      |   86 +++++++++++++++++++++++++++++++++++
 arch/mips/kernel/machine_kexec.c   |   30 +++++++++++-
 arch/mips/kernel/relocate_kernel.S |   88 ++++++++++++++++++++++++++++++++++++
 arch/mips/kernel/setup.c           |   55 +++++++++++++++++++++++
 arch/mips/kernel/smp.c             |   18 +++++++
 11 files changed, 413 insertions(+), 8 deletions(-)
 create mode 100644 arch/mips/kernel/crash.c
 create mode 100644 arch/mips/kernel/crash_dump.c

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 591ca0c..8079260 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -2035,6 +2035,30 @@ config KEXEC
 	  support.  As of this writing the exact hardware interface is
 	  strongly in flux, so no good recommendation can be made.
 
+config CRASH_DUMP
+	  bool "kernel crash dumps (EXPERIMENTAL)"
+	  depends on EXPERIMENTAL
+	  help
+	  Generate crash dump after being started by kexec.
+	  This should be normally only set in special crash dump kernels
+	  which are loaded in the main kernel with kexec-tools into
+	  a specially reserved region and then later executed after
+	  a crash by kdump/kexec. The crash dump kernel must be compiled
+	  to a memory address not used by the main kernel or BIOS using
+	  PHYSICAL_START.
+
+config PHYSICAL_START
+	  hex "Physical address where the kernel is loaded"
+	  default "0xffffffff84000000" if 64BIT
+	  default "0x84000000" if 32BIT
+	  depends on CRASH_DUMP
+	  help
+	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
+	  If you plan to use kernel for capturing the crash dump change
+	  this value to start of the reserved region (the "X" value as
+			  specified in the "crashkernel=YM@XM" command line boot parameter
+			  passed to the panic-ed kernel).
+
 config SECCOMP
 	bool "Enable seccomp to safely compute untrusted bytecode"
 	depends on PROC_FS
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 2f2eac2..431283d 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -646,6 +646,10 @@ else
 load-$(CONFIG_CPU_CAVIUM_OCTEON) 	+= 0xffffffff81100000
 endif
 
+ifdef CONFIG_PHYSICAL_START
+load-y                                  = $(CONFIG_PHYSICAL_START)
+endif
+
 cflags-y			+= -I$(srctree)/arch/mips/include/asm/mach-generic
 drivers-$(CONFIG_PCI)		+= arch/mips/pci/
 
diff --git a/arch/mips/include/asm/kexec.h b/arch/mips/include/asm/kexec.h
index 4314892..e9eba1a 100644
--- a/arch/mips/include/asm/kexec.h
+++ b/arch/mips/include/asm/kexec.h
@@ -9,22 +9,45 @@
 #ifndef _MIPS_KEXEC
 # define _MIPS_KEXEC
 
+#include <asm/stacktrace.h>
+
+extern unsigned long long elfcorehdr_addr;
+
 /* Maximum physical address we can use pages from */
 #define KEXEC_SOURCE_MEMORY_LIMIT (0x20000000)
 /* Maximum address we can reach in physical address mode */
 #define KEXEC_DESTINATION_MEMORY_LIMIT (0x20000000)
  /* Maximum address we can use for the control code buffer */
 #define KEXEC_CONTROL_MEMORY_LIMIT (0x20000000)
-
-#define KEXEC_CONTROL_PAGE_SIZE 4096
+/* Reserve 3*4096 bytes for board-specific info */
+#define KEXEC_CONTROL_PAGE_SIZE (4096 + 3*4096)
 
 /* The native architecture */
 #define KEXEC_ARCH KEXEC_ARCH_MIPS
+#define MAX_NOTE_BYTES 1024
 
 static inline void crash_setup_regs(struct pt_regs *newregs,
-				    struct pt_regs *oldregs)
+					struct pt_regs *oldregs)
 {
-	/* Dummy implementation for now */
+	if (oldregs)
+		memcpy(newregs, oldregs, sizeof(*newregs));
+	else
+		prepare_frametrace(newregs);
 }
 
+#ifdef CONFIG_KEXEC
+struct kimage;
+extern unsigned long kexec_args[4];
+extern int (*_machine_kexec_prepare)(struct kimage *);
+extern void (*_machine_kexec_shutdown)(void);
+extern void (*_machine_crash_shutdown)(struct pt_regs *regs);
+extern void default_machine_crash_shutdown(struct pt_regs *regs);
+#ifdef CONFIG_SMP
+extern const unsigned char kexec_smp_wait[];
+extern unsigned long secondary_kexec_args[4];
+extern void (*relocated_kexec_smp_wait) (void *);
+extern atomic_t kexec_ready_to_reboot;
+#endif
+#endif
+
 #endif /* !_MIPS_KEXEC */
diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h
index af42385..9b50048 100644
--- a/arch/mips/include/asm/smp.h
+++ b/arch/mips/include/asm/smp.h
@@ -40,6 +40,8 @@ extern int __cpu_logical_map[NR_CPUS];
 #define SMP_CALL_FUNCTION	0x2
 /* Octeon - Tell another core to flush its icache */
 #define SMP_ICACHE_FLUSH	0x4
+/* Used by kexec crashdump to save all cpu's state */
+#define SMP_DUMP		0x8
 
 extern volatile cpumask_t cpu_callin_map;
 
@@ -91,4 +93,9 @@ static inline void arch_send_call_function_ipi_mask(const struct cpumask *mask)
 	mp_ops->send_ipi_mask(mask, SMP_CALL_FUNCTION);
 }
 
+extern void core_send_ipi(int cpu, unsigned int action);
+#if defined(CONFIG_KEXEC)
+extern void (*dump_ipi_function_ptr)(void *);
+void dump_send_ipi(void (*dump_ipi_callback)(void *));
+#endif
 #endif /* __ASM_SMP_H */
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index ef20957..7ae634d 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -91,7 +91,8 @@ obj-$(CONFIG_I8253)		+= i8253.o
 
 obj-$(CONFIG_GPIO_TXX9)		+= gpio_txx9.o
 
-obj-$(CONFIG_KEXEC)		+= machine_kexec.o relocate_kernel.o
+obj-$(CONFIG_KEXEC)		+= machine_kexec.o relocate_kernel.o crash.o
+obj-$(CONFIG_CRASH_DUMP)	+= crash_dump.o
 obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
 obj-$(CONFIG_SPINLOCK_TEST)	+= spinlock_test.o
 
diff --git a/arch/mips/kernel/crash.c b/arch/mips/kernel/crash.c
new file mode 100644
index 0000000..24247ea
--- /dev/null
+++ b/arch/mips/kernel/crash.c
@@ -0,0 +1,75 @@
+#include <linux/kernel.h>
+#include <linux/smp.h>
+#include <linux/reboot.h>
+#include <linux/kexec.h>
+#include <linux/bootmem.h>
+#include <linux/crash_dump.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/types.h>
+#include <linux/sched.h>
+
+#ifdef CONFIG_CRASH_DUMP
+unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX;
+#endif
+
+/* This keeps a track of which one is crashing cpu. */
+int crashing_cpu = -1;
+static cpumask_t cpus_in_crash = CPU_MASK_NONE;
+
+#ifdef CONFIG_SMP
+void crash_shutdown_secondary(void *ignore)
+{
+	struct pt_regs *regs;
+	int cpu = smp_processor_id();
+
+	regs = task_pt_regs(current);
+
+	if (!cpu_online(cpu))
+		return;
+
+	local_irq_disable();
+	if (!cpu_isset(cpu, cpus_in_crash))
+		crash_save_cpu(regs, cpu);
+	cpu_set(cpu, cpus_in_crash);
+
+	while (!atomic_read(&kexec_ready_to_reboot))
+		cpu_relax();
+	relocated_kexec_smp_wait(NULL);
+	/* NOTREACHED */
+}
+
+static void crash_kexec_prepare_cpus(void)
+{
+	unsigned int msecs;
+
+	unsigned int ncpus = num_online_cpus() - 1;/* Excluding the panic cpu */
+
+	dump_send_ipi(crash_shutdown_secondary);
+	smp_wmb();
+
+	/*
+	 * The crash CPU sends an IPI and wait for other CPUs to
+	 * respond. Delay of at least 10 seconds.
+	 */
+	printk(KERN_EMERG "Sending IPI to other cpus...\n");
+	msecs = 10000;
+	while ((cpus_weight(cpus_in_crash) < ncpus) && (--msecs > 0)) {
+		cpu_relax();
+		mdelay(1);
+	}
+}
+
+#else
+static void crash_kexec_prepare_cpus() {}
+#endif
+
+void default_machine_crash_shutdown(struct pt_regs *regs)
+{
+	local_irq_disable();
+	crashing_cpu = smp_processor_id();
+	crash_save_cpu(regs, crashing_cpu);
+	crash_kexec_prepare_cpus();
+	cpu_set(crashing_cpu, cpus_in_crash);
+}
diff --git a/arch/mips/kernel/crash_dump.c b/arch/mips/kernel/crash_dump.c
new file mode 100644
index 0000000..49e5efa
--- /dev/null
+++ b/arch/mips/kernel/crash_dump.c
@@ -0,0 +1,86 @@
+#include <linux/highmem.h>
+#include <linux/bootmem.h>
+#include <linux/crash_dump.h>
+#include <asm/uaccess.h>
+
+#ifdef CONFIG_PROC_VMCORE
+static int __init parse_elfcorehdr(char *p)
+{
+	if (p)
+		elfcorehdr_addr = memparse(p, &p);
+	return 1;
+}
+__setup("elfcorehdr=", parse_elfcorehdr);
+#endif
+
+static int __init parse_savemaxmem(char *p)
+{
+	if (p)
+		saved_max_pfn = (memparse(p, &p) >> PAGE_SHIFT) - 1;
+
+	return 1;
+}
+__setup("savemaxmem=", parse_savemaxmem);
+
+
+static void *kdump_buf_page;
+
+/**
+ * copy_oldmem_page - copy one page from "oldmem"
+ * @pfn: page frame number to be copied
+ * @buf: target memory address for the copy; this can be in kernel address
+ *	space or user address space (see @userbuf)
+ * @csize: number of bytes to copy
+ * @offset: offset in bytes into the page (based on pfn) to begin the copy
+ * @userbuf: if set, @buf is in user address space, use copy_to_user(),
+ *	otherwise @buf is in kernel address space, use memcpy().
+ *
+ * Copy a page from "oldmem". For this page, there is no pte mapped
+ * in the current kernel.
+ *
+ * Calling copy_to_user() in atomic context is not desirable. Hence first
+ * copying the data to a pre-allocated kernel page and then copying to user
+ * space in non-atomic context.
+ */
+ssize_t copy_oldmem_page(unsigned long pfn, char *buf,
+                               size_t csize, unsigned long offset, int userbuf)
+{
+	void  *vaddr;
+
+	if (!csize)
+		return 0;
+
+	vaddr = kmap_atomic_pfn(pfn, KM_PTE0);
+
+	if (!userbuf) {
+		memcpy(buf, (vaddr + offset), csize);
+		kunmap_atomic(vaddr, KM_PTE0);
+	} else {
+		if (!kdump_buf_page) {
+			printk(KERN_WARNING "Kdump: Kdump buffer page not"
+				" allocated\n");
+			return -EFAULT;
+		}
+		copy_page(kdump_buf_page, vaddr);
+		kunmap_atomic(vaddr, KM_PTE0);
+		if (copy_to_user(buf, (kdump_buf_page + offset), csize))
+			return -EFAULT;
+	}
+
+	return csize;
+}
+
+static int __init kdump_buf_page_init(void)
+{
+	int ret = 0;
+
+	kdump_buf_page = kmalloc(PAGE_SIZE, GFP_KERNEL);
+	if (!kdump_buf_page) {
+		printk(KERN_WARNING "Kdump: Failed to allocate kdump buffer"
+			 " page\n");
+		ret = -ENOMEM;
+	}
+
+	return ret;
+}
+arch_initcall(kdump_buf_page_init);
diff --git a/arch/mips/kernel/machine_kexec.c b/arch/mips/kernel/machine_kexec.c
index 85beb9b..4d25843 100644
--- a/arch/mips/kernel/machine_kexec.c
+++ b/arch/mips/kernel/machine_kexec.c
@@ -19,9 +19,19 @@ extern const size_t relocate_new_kernel_size;
 extern unsigned long kexec_start_address;
 extern unsigned long kexec_indirection_page;
 
+int (*_machine_kexec_prepare)(struct kimage *) = NULL;
+void (*_machine_kexec_shutdown)(void) = NULL;
+void (*_machine_crash_shutdown)(struct pt_regs *regs) = NULL;
+#ifdef CONFIG_SMP
+void (*relocated_kexec_smp_wait) (void *);
+atomic_t kexec_ready_to_reboot = ATOMIC_INIT(0);
+#endif
+
 int
 machine_kexec_prepare(struct kimage *kimage)
 {
+	if (_machine_kexec_prepare)
+		return _machine_kexec_prepare(kimage);
 	return 0;
 }
 
@@ -33,11 +43,17 @@ machine_kexec_cleanup(struct kimage *kimage)
 void
 machine_shutdown(void)
 {
+	if (_machine_kexec_shutdown)
+		_machine_kexec_shutdown();
 }
 
 void
 machine_crash_shutdown(struct pt_regs *regs)
 {
+	if (_machine_crash_shutdown)
+		_machine_crash_shutdown(regs);
+	else
+		default_machine_crash_shutdown(regs);
 }
 
 typedef void (*noretfun_t)(void) __attribute__((noreturn));
@@ -52,7 +68,9 @@ machine_kexec(struct kimage *image)
 	reboot_code_buffer =
 	  (unsigned long)page_address(image->control_code_page);
 
-	kexec_start_address = image->start;
+	kexec_start_address =
+		(unsigned long) phys_to_virt(image->start);
+
 	kexec_indirection_page =
 		(unsigned long) phys_to_virt(image->head & PAGE_MASK);
 
@@ -63,7 +81,7 @@ machine_kexec(struct kimage *image)
 	 * The generic kexec code builds a page list with physical
 	 * addresses. they are directly accessible through KSEG0 (or
 	 * CKSEG0 or XPHYS if on 64bit system), hence the
-	 * pys_to_virt() call.
+	 * phys_to_virt() call.
 	 */
 	for (ptr = &image->head; (entry = *ptr) && !(entry &IND_DONE);
 	     ptr = (entry & IND_INDIRECTION) ?
@@ -81,5 +99,13 @@ machine_kexec(struct kimage *image)
 	printk("Will call new kernel at %08lx\n", image->start);
 	printk("Bye ...\n");
 	__flush_cache_all();
+#ifdef CONFIG_SMP
+	/* All secondary cpus now may jump to kexec_wait cycle */
+	relocated_kexec_smp_wait = reboot_code_buffer +
+		(void *)(kexec_smp_wait - relocate_new_kernel);
+	smp_wmb();
+	atomic_set(&kexec_ready_to_reboot, 1);
+#endif
 	((noretfun_t) reboot_code_buffer)();
 }
+
diff --git a/arch/mips/kernel/relocate_kernel.S b/arch/mips/kernel/relocate_kernel.S
index 87481f9..0abaf7a 100644
--- a/arch/mips/kernel/relocate_kernel.S
+++ b/arch/mips/kernel/relocate_kernel.S
@@ -15,6 +15,11 @@
 #include <asm/addrspace.h>
 
 LEAF(relocate_new_kernel)
+	PTR_L a0,	arg0
+	PTR_L a1,	arg1
+	PTR_L a2,	arg2
+	PTR_L a3,	arg3
+
 	PTR_L		s0, kexec_indirection_page
 	PTR_L		s1, kexec_start_address
 
@@ -26,7 +31,6 @@ process_entry:
 	and		s3, s2, 0x1
 	beq		s3, zero, 1f
 	and		s4, s2, ~0x1	/* store destination addr in s4 */
-	move		a0, s4
 	b		process_entry
 
 1:
@@ -60,10 +64,92 @@ copy_word:
 	b		process_entry
 
 done:
+#ifdef CONFIG_SMP
+	/* kexec_flag reset is signal to other CPUs what kernel
+ 	   was moved to it's location. Note - we need relocated address
+ 	   of kexec_flag.  */
+
+ 	bal		1f
+ 1: 	move		t1,ra;
+ 	PTR_LA		t2,1b
+ 	PTR_LA		t0,kexec_flag
+ 	PTR_SUB		t0,t0,t2;
+ 	PTR_ADD		t0,t1,t0;
+ 	LONG_S		zero,(t0)
+#endif
+
+	sync
 	/* jump to kexec_start_address */
 	j		s1
 	END(relocate_new_kernel)
 
+#ifdef CONFIG_SMP
+/*
+ * Other CPUs should wait until code is relocated and
+ * then start at entry (?) point.
+ */
+LEAF(kexec_smp_wait)
+	PTR_L		a0, s_arg0
+	PTR_L		a1, s_arg1
+	PTR_L		a2, s_arg2
+	PTR_L		a3, s_arg3
+	PTR_L		s1, kexec_start_address
+
+	/* Non-relocated address works for args and kexec_start_address ( old
+	 * kernel is not overwritten). But we need relocated address of
+	 * kexec_flag.
+	 */
+
+	bal		1f
+1:	move		t1,ra;
+	PTR_LA		t2,1b
+	PTR_LA		t0,kexec_flag
+	PTR_SUB		t0,t0,t2;
+	PTR_ADD		t0,t1,t0;
+
+1:	LONG_L		s0, (t0)
+	bne		s0, zero,1b
+
+	sync
+	j		s1
+	END(kexec_smp_wait)
+#endif
+
+#ifdef __mips64
+       /* all PTR's must be aligned to 8 byte in 64-bit mode */
+       .align  3
+#endif
+
+/* All parameters to new kernel are passed in registers a0-a3.
+ * kexec_args[0..3] are uses to prepare register values.
+ */
+
+kexec_args:
+	EXPORT(kexec_args)
+arg0:	PTR		0x0
+arg1:	PTR		0x0
+arg2:	PTR		0x0
+arg3:	PTR		0x0
+	.size	kexec_args,PTRSIZE*4
+
+#ifdef CONFIG_SMP
+/*
+ * Secondary CPUs may have different kernel parameters in
+ * their registers a0-a3. secondary_kexec_args[0..3] are used
+ * to prepare register values.
+ */
+secondary_kexec_args:
+	EXPORT(secondary_kexec_args)
+s_arg0:	PTR		0x0
+s_arg1:	PTR		0x0
+s_arg2:	PTR		0x0
+s_arg3:	PTR		0x0
+	.size	secondary_kexec_args,PTRSIZE*4
+kexec_flag:
+	LONG		0x1
+
+#endif
+
 kexec_start_address:
 	EXPORT(kexec_start_address)
 	PTR		0x0
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index f9513f9..d706bd9 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -21,6 +21,7 @@
 #include <linux/console.h>
 #include <linux/pfn.h>
 #include <linux/debugfs.h>
+#include <linux/kexec.h>
 
 #include <asm/addrspace.h>
 #include <asm/bootinfo.h>
@@ -487,10 +488,61 @@ static void __init arch_mem_init(char **cmdline_p)
 	}
 
 	bootmem_init();
+#ifdef CONFIG_KEXEC
+	if (crashk_res.start != crashk_res.end)
+		reserve_bootmem(crashk_res.start,
+			crashk_res.end - crashk_res.start + 1,
+			BOOTMEM_DEFAULT);
+#endif
 	sparse_init();
 	paging_init();
 }
 
+#ifdef CONFIG_KEXEC
+static inline unsigned long long get_total_mem(void)
+{
+	unsigned long long total;
+
+	total = max_pfn - min_low_pfn;
+	return total << PAGE_SHIFT;
+}
+
+static void __init mips_parse_crashkernel(void)
+{
+	unsigned long long total_mem;
+	unsigned long long crash_size, crash_base;
+	int ret;
+
+	total_mem = get_total_mem();
+	ret = parse_crashkernel(boot_command_line, total_mem,
+			&crash_size, &crash_base);
+	if (ret != 0 || crash_size <= 0)
+		return;
+
+	crashk_res.start = crash_base;
+	crashk_res.end   = crash_base + crash_size - 1;
+}
+static void __init request_crashkernel(struct resource *res)
+{
+	int ret;
+
+	ret = request_resource(res, &crashk_res);
+	if (!ret)
+		printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "
+			"for crashkernel\n",
+			(unsigned long)((crashk_res.end -
+				crashk_res.start + 1) >> 20),
+			(unsigned long)(crashk_res.start  >> 20));
+}
+#else
+static void __init mips_parse_crashkernel(void)
+{
+}
+static void __init request_crashkernel(struct resource *res)
+{
+}
+#endif
+
 static void __init resource_init(void)
 {
 	int i;
@@ -506,6 +558,8 @@ static void __init resource_init(void)
 	/*
 	 * Request address space for all standard RAM.
 	 */
+	mips_parse_crashkernel();
+
 	for (i = 0; i < boot_mem_map.nr_map; i++) {
 		struct resource *res;
 		unsigned long start, end;
@@ -541,6 +595,7 @@ static void __init resource_init(void)
 		 */
 		request_resource(res, &code_resource);
 		request_resource(res, &data_resource);
+		request_crashkernel(res);
 	}
 }
 
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 6cdca19..e2f4d53 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -402,3 +402,21 @@ void flush_tlb_one(unsigned long vaddr)
 
 EXPORT_SYMBOL(flush_tlb_page);
 EXPORT_SYMBOL(flush_tlb_one);
+
+#if defined(CONFIG_KEXEC)
+void (*dump_ipi_function_ptr)(void *) = NULL;
+void dump_send_ipi(void (*dump_ipi_callback)(void *))
+{
+	int i;
+	int cpu = smp_processor_id();
+
+	dump_ipi_function_ptr = dump_ipi_callback;
+	smp_mb();
+	for_each_online_cpu(i)
+		if (i != cpu)
+			core_send_ipi(i, SMP_DUMP);
+
+}
+EXPORT_SYMBOL(dump_send_ipi);
+#endif
+


Signed-off-by: Maxim Uvarov <muvarov@gmail.com>


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To:     linux-mips@linux-mips.org, kexec@lists.infradead.org
Cc:     horms@verge.net.au, ralf@linux-mips.org
From:   Maxim Uvarov <muvarov@gmail.com>
Subject: [PATCH 2/2] MIPS Cavium Octeon board kexec,kdump support
Date:   Wed, 03 Mar 2010 14:05:36 +0300
Message-ID: <20100303110536.11233.99481.stgit@muvarov>
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Hello folks,

Please find here MIPS crash and kdump patches.
This is patch set of 3 patches:
1. generic MIPS changes (kernel);
2. MIPS Cavium Octeon board kexec/kdump code (kernel);
3. Kexec user space MIPS changes.

Patches were tested on the latest linux-mips@ git kernel and the latest
kexec-tools git on Cavium Octeon 50xx board.

I also made the same code working on RMI XLR/XLS boards for both
mips32 and mips64 kernels.

Best regards,
Maxim Uvarov.


---

 arch/mips/cavium-octeon/dma-octeon.c             |    6 
 arch/mips/cavium-octeon/executive/cvmx-bootmem.c |    5 
 arch/mips/cavium-octeon/setup.c                  |  309 +++++++++++++++++++++-
 arch/mips/cavium-octeon/smp.c                    |    5 
 arch/mips/include/asm/octeon/cvmx-bootmem.h      |    2 
 arch/mips/kernel/relocate_kernel.S               |   19 +
 6 files changed, 326 insertions(+), 20 deletions(-)

diff --git a/arch/mips/cavium-octeon/dma-octeon.c b/arch/mips/cavium-octeon/dma-octeon.c
index be531ec..679d7b5 100644
--- a/arch/mips/cavium-octeon/dma-octeon.c
+++ b/arch/mips/cavium-octeon/dma-octeon.c
@@ -105,7 +105,8 @@ dma_addr_t octeon_map_dma_mem(struct device *dev, void *ptr, size_t size)
 			pr_warning("dma_map_single: Warning: "
 				   "Mapping memory address that might "
 				   "conflict with devices 0x%llx-0x%llx\n",
-				   physical, physical+size-1);
+				   (unsigned long long) physical,
+				   (unsigned long long) (physical + size - 1));
 		/* The 2nd 256MB is mapped at 256<<20 instead of 0x410000000 */
 		if ((physical >= 0x410000000ull) && physical < 0x420000000ull)
 			result = physical - 0x400000000ull;
@@ -115,7 +116,8 @@ dma_addr_t octeon_map_dma_mem(struct device *dev, void *ptr, size_t size)
 			panic("dma_map_single: Attempt to map address "
 			      "0x%llx-0x%llx, which can't be accessed "
 			      "according to the dma mask 0x%llx\n",
-			      physical, physical+size-1, dma_mask);
+			      physical, (unsigned long long)(physical+size-1),
+			      dma_mask);
 		goto done;
 
 	case OCTEON_DMA_BAR_TYPE_BIG:
diff --git a/arch/mips/cavium-octeon/executive/cvmx-bootmem.c b/arch/mips/cavium-octeon/executive/cvmx-bootmem.c
index fdf5f19..1ae35ec 100644
--- a/arch/mips/cavium-octeon/executive/cvmx-bootmem.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-bootmem.c
@@ -688,3 +688,8 @@ int64_t cvmx_bootmem_phy_named_block_alloc(uint64_t size, uint64_t min_addr,
 		cvmx_spinlock_unlock((cvmx_spinlock_t *)&(cvmx_bootmem_desc->lock));
 	return addr_allocated;
 }
+
+void *cvmx_bootmem_get_desc(void)
+{
+    return cvmx_bootmem_desc;
+}
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index b321d3b..2f246d2 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -20,6 +20,7 @@
 #include <linux/platform_device.h>
 #include <linux/serial_core.h>
 #include <linux/serial_8250.h>
+#include <linux/kexec.h>
 
 #include <asm/processor.h>
 #include <asm/reboot.h>
@@ -55,11 +56,205 @@ struct octeon_boot_descriptor *octeon_boot_desc_ptr;
 struct cvmx_bootinfo *octeon_bootinfo;
 EXPORT_SYMBOL(octeon_bootinfo);
 
+static unsigned long long RESERVE_LOW_MEM = 0ull;
+#ifdef CONFIG_KEXEC
+#ifdef CONFIG_SMP
+/*
+ * Wait for relocation code is prepared and send
+ * secondary CPUs to spin until kernel is relocated.
+ */
+void octeon_kexec_smp_down(void *ignored)
+{
+	int cpu = smp_processor_id();
+	local_irq_disable();
+	cpu_clear(cpu, cpu_online_map);
+	while (!atomic_read(&kexec_ready_to_reboot))
+		cpu_relax();
+	asm volatile ("synci 0($0)\n");
+	relocated_kexec_smp_wait(NULL);
+}
+#endif
+
+#define OCTEON_DDR0_BASE    (0x0ULL)
+#define OCTEON_DDR0_SIZE    (0x010000000ULL)
+#define OCTEON_DDR1_BASE    (0x410000000ULL)
+#define OCTEON_DDR1_SIZE    (0x010000000ULL)
+#define OCTEON_DDR2_BASE    (0x020000000ULL)
+#define OCTEON_DDR2_SIZE    (0x3e0000000ULL)
+#define OCTEON_MAX_PHY_MEM_SIZE (16*1024*1024*1024ULL)
+
+static struct kimage *kimage_ptr;
+
+static void kexec_bootmem_init(uint64_t mem_size, uint32_t low_reserved_bytes)
+{
+	int64_t addr;
+	struct cvmx_bootmem_desc *bootmem_desc;
+
+	bootmem_desc =
+		(struct cvmx_bootmem_desc *)cvmx_bootmem_get_desc();
+
+	if (mem_size > OCTEON_MAX_PHY_MEM_SIZE) {
+		mem_size = OCTEON_MAX_PHY_MEM_SIZE;
+		printk(KERN_ERR "ERROR: requested memory size too large,"
+				"truncating to maximum size\n");
+	}
+
+	bootmem_desc->major_version = CVMX_BOOTMEM_DESC_MAJ_VER;
+	bootmem_desc->minor_version = CVMX_BOOTMEM_DESC_MIN_VER;
+
+	addr = (OCTEON_DDR0_BASE + RESERVE_LOW_MEM + low_reserved_bytes);
+	bootmem_desc->head_addr = 0;
+
+	if (mem_size <= OCTEON_DDR0_SIZE) {
+		__cvmx_bootmem_phy_free(addr,
+				mem_size - RESERVE_LOW_MEM -
+				low_reserved_bytes, 0);
+		return;
+	}
+
+	__cvmx_bootmem_phy_free(addr,
+			OCTEON_DDR0_SIZE - RESERVE_LOW_MEM -
+			low_reserved_bytes, 0);
+
+	mem_size -= OCTEON_DDR0_SIZE;
+
+	if (mem_size > OCTEON_DDR1_SIZE) {
+		__cvmx_bootmem_phy_free(OCTEON_DDR1_BASE, OCTEON_DDR1_SIZE, 0);
+		__cvmx_bootmem_phy_free(OCTEON_DDR2_BASE,
+				mem_size - OCTEON_DDR1_SIZE, 0);
+	} else
+		__cvmx_bootmem_phy_free(OCTEON_DDR1_BASE, mem_size, 0);
+}
+
+int octeon_kexec_prepare(struct kimage *image)
+{
+	int i;
+	char *bootloader = "kexec";
+
+	octeon_boot_desc_ptr->argc = 0;
+	for (i = 0; i < image->nr_segments; i++) {
+		if (!strncmp(bootloader, (char *)image->segment[i].buf,
+				strlen(bootloader))) {
+			/*
+			 * convert command line string to array
+			 * of parameters (as bootloader does).
+			 */
+			int argc = 0, offt;
+			char *str = (char *)image->segment[i].buf;
+			char *ptr = strchr(str, ' ');
+			while (ptr && (OCTEON_ARGV_MAX_ARGS > argc)) {
+				*ptr = '\0';
+				if (ptr[1] != ' ') {
+					offt = (int)(ptr - str + 1);
+					octeon_boot_desc_ptr->argv[argc] =
+						image->segment[i].mem + offt;
+					argc++;
+				}
+				ptr = strchr(ptr + 1, ' ');
+			}
+			octeon_boot_desc_ptr->argc = argc;
+			break;
+		}
+	}
+
+	/*
+	 * Information about segments will be needed during pre-boot memory
+	 * initialization.
+	 */
+	kimage_ptr = image;
+	return 0;
+}
+
+static void octeon_generic_shutdown(void)
+{
+	int cpu, i;
+	struct cvmx_bootmem_desc *bootmem_desc;
+	void *named_block_array_ptr;
+
+	bootmem_desc =
+		(struct cvmx_bootmem_desc *)cvmx_bootmem_get_desc();
+	named_block_array_ptr =
+		cvmx_phys_to_ptr(bootmem_desc->named_block_array_addr);
+
+#ifdef CONFIG_SMP
+	/* disable watchdogs */
+	for_each_online_cpu(cpu)
+		cvmx_write_csr(CVMX_CIU_WDOGX(cpu_logical_map(cpu)), 0);
+#else
+	cvmx_write_csr(CVMX_CIU_WDOGX(cvmx_get_core_num()), 0);
+#endif
+	if (kimage_ptr != kexec_crash_image) {
+		memset(named_block_array_ptr,
+			0x0,
+			CVMX_BOOTMEM_NUM_NAMED_BLOCKS *
+			sizeof(struct cvmx_bootmem_named_block_desc));
+		/*
+		 * Mark all memory (except low 0x100000 bytes) as free.
+		 * It is the same thing that bootloader does.
+		 */
+		kexec_bootmem_init(octeon_bootinfo->dram_size*1024ULL*1024ULL,
+				0x100000);
+		/*
+		 * Allocate all segments to avoid their corruption during boot.
+		 */
+		for (i = 0; i < kimage_ptr->nr_segments; i++)
+			cvmx_bootmem_alloc_address(
+				kimage_ptr->segment[i].memsz + 2*PAGE_SIZE,
+				kimage_ptr->segment[i].mem - PAGE_SIZE,
+				PAGE_SIZE);
+	} else {
+		/*
+		 * Do not mark all memory as free. Free only named sections
+		 * leaving the rest of memory unchanged.
+		 */
+		struct cvmx_bootmem_named_block_desc *ptr =
+			(struct cvmx_bootmem_named_block_desc *)
+			named_block_array_ptr;
+
+		for (i = 0; i < bootmem_desc->named_block_num_blocks; i++)
+			if (ptr[i].size)
+				cvmx_bootmem_free_named(ptr[i].name);
+	}
+	kexec_args[2] = 1UL; /* running on octeon_main_processor */
+	kexec_args[3] = (unsigned long)octeon_boot_desc_ptr;
+#ifdef CONFIG_SMP
+	secondary_kexec_args[2] = 0UL; /* running on secondary cpu */
+	secondary_kexec_args[3] = (unsigned long)octeon_boot_desc_ptr;
+#endif
+}
+
+void octeon_shutdown(void)
+{
+	octeon_generic_shutdown();
+#ifdef CONFIG_SMP
+	smp_call_function(octeon_kexec_smp_down, NULL, 0);
+	smp_wmb();
+	while (num_online_cpus() > 1) {
+		cpu_relax();
+		mdelay(1);
+	}
+#endif
+}
+
+void octeon_crash_shutdown(struct pt_regs *regs)
+{
+	octeon_generic_shutdown();
+	default_machine_crash_shutdown(regs);
+}
+
+#endif
+
 #ifdef CONFIG_CAVIUM_RESERVE32
 uint64_t octeon_reserve32_memory;
 EXPORT_SYMBOL(octeon_reserve32_memory);
 #endif
 
+#ifdef CONFIG_KEXEC
+/* crashkernel cmdline parameter is parsed _after_ memory setup
+ * we also parse it here (workaround for EHB5200) */
+static uint64_t crashk_size, crashk_base;
+#endif
+
 static int octeon_uart;
 
 extern asmlinkage void handle_int(void);
@@ -467,6 +662,8 @@ void __init prom_init(void)
 	int i;
 	int argc;
 	struct uart_port octeon_port;
+	char *p;
+	const char *arg;
 #ifdef CONFIG_CAVIUM_RESERVE32
 	int64_t addr = -1;
 #endif
@@ -629,6 +826,15 @@ void __init prom_init(void)
 	if (octeon_is_simulation())
 		MAX_MEMORY = 64ull << 20;
 
+	arg = strstr(arcs_cmdline, "mem=");
+	if (arg) {
+		MAX_MEMORY = memparse(arg + 4, &p);
+		if (MAX_MEMORY == 0)
+			MAX_MEMORY = 32ull << 30;
+		if (*p == '@')
+			RESERVE_LOW_MEM = memparse(p + 1, &p);
+	}
+
 	arcs_cmdline[0] = 0;
 	argc = octeon_boot_desc_ptr->argc;
 	for (i = 0; i < argc; i++) {
@@ -636,16 +842,25 @@ void __init prom_init(void)
 			cvmx_phys_to_ptr(octeon_boot_desc_ptr->argv[i]);
 		if ((strncmp(arg, "MEM=", 4) == 0) ||
 		    (strncmp(arg, "mem=", 4) == 0)) {
-			sscanf(arg + 4, "%llu", &MAX_MEMORY);
-			MAX_MEMORY <<= 20;
+			MAX_MEMORY = memparse(arg + 4, &p);
 			if (MAX_MEMORY == 0)
 				MAX_MEMORY = 32ull << 30;
+			if (*p == '@')
+				RESERVE_LOW_MEM = memparse(p + 1, &p);
 		} else if (strcmp(arg, "ecc_verbose") == 0) {
 #ifdef CONFIG_CAVIUM_REPORT_SINGLE_BIT_ECC
 			__cvmx_interrupt_ecc_report_single_bit_errors = 1;
 			pr_notice("Reporting of single bit ECC errors is "
 				  "turned on\n");
 #endif
+#ifdef CONFIG_KEXEC
+		} else if (strncmp(arg, "crashkernel=", 12) == 0) {
+			crashk_size = memparse(arg+12, &p);
+			if (*p == '@')
+				crashk_base = memparse(p+1, &p);
+			strcat(arcs_cmdline, " ");
+			strcat(arcs_cmdline, arg);
+#endif
 		} else if (strlen(arcs_cmdline) + strlen(arg) + 1 <
 			   sizeof(arcs_cmdline) - 1) {
 			strcat(arcs_cmdline, " ");
@@ -685,6 +900,12 @@ void __init prom_init(void)
 	_machine_restart = octeon_restart;
 	_machine_halt = octeon_halt;
 
+#ifdef CONFIG_KEXEC
+	_machine_kexec_shutdown = octeon_shutdown;
+	_machine_crash_shutdown = octeon_crash_shutdown;
+	_machine_kexec_prepare = octeon_kexec_prepare;
+#endif
+
 	memset(&octeon_port, 0, sizeof(octeon_port));
 	/*
 	 * For early_serial_setup we don't set the port type or
@@ -717,17 +938,15 @@ void __init plat_mem_setup(void)
 {
 	uint64_t mem_alloc_size;
 	uint64_t total;
+	uint64_t crashk_end;
+#ifndef CONFIG_CRASH_DUMP
 	int64_t memory;
+	uint64_t kernel_start;
+	uint64_t kernel_size;
+#endif
 
 	total = 0;
-
-	/* First add the init memory we will be returning.  */
-	memory = __pa_symbol(&__init_begin) & PAGE_MASK;
-	mem_alloc_size = (__pa_symbol(&__init_end) & PAGE_MASK) - memory;
-	if (mem_alloc_size > 0) {
-		add_memory_region(memory, mem_alloc_size, BOOT_MEM_RAM);
-		total += mem_alloc_size;
-	}
+	crashk_end = 0;
 
 	/*
 	 * The Mips memory init uses the first memory location for
@@ -740,6 +959,17 @@ void __init plat_mem_setup(void)
 	if (mem_alloc_size > MAX_MEMORY)
 		mem_alloc_size = MAX_MEMORY;
 
+/* Crashkernel ignores bootmem list. It relies on mem=X@Y option */
+#ifdef CONFIG_CRASH_DUMP
+	add_memory_region(RESERVE_LOW_MEM, MAX_MEMORY, BOOT_MEM_RAM);
+	total += MAX_MEMORY;
+#else
+#ifdef CONFIG_KEXEC
+	if (crashk_size > 0) {
+		add_memory_region(crashk_base, crashk_size, BOOT_MEM_RAM);
+		crashk_end = crashk_base + crashk_size;
+	}
+#endif
 	/*
 	 * When allocating memory, we want incrementing addresses from
 	 * bootmem_alloc so the code in add_memory_region can merge
@@ -750,9 +980,10 @@ void __init plat_mem_setup(void)
 		&& (total < MAX_MEMORY)) {
 #if defined(CONFIG_64BIT) || defined(CONFIG_64BIT_PHYS_ADDR)
 		memory = cvmx_bootmem_phy_alloc(mem_alloc_size,
-						__pa_symbol(&__init_end), -1,
-						0x100000,
+						RESERVE_LOW_MEM,
+						/*-1*/0, 0x100000,
 						CVMX_BOOTMEM_FLAG_NO_LOCKING);
+
 #elif defined(CONFIG_HIGHMEM)
 		memory = cvmx_bootmem_phy_alloc(mem_alloc_size, 0, 1ull << 31,
 						0x100000,
@@ -763,19 +994,61 @@ void __init plat_mem_setup(void)
 						CVMX_BOOTMEM_FLAG_NO_LOCKING);
 #endif
 		if (memory >= 0) {
-			/*
-			 * This function automatically merges address
-			 * regions next to each other if they are
-			 * received in incrementing order.
-			 */
-			add_memory_region(memory, mem_alloc_size, BOOT_MEM_RAM);
+#ifdef CONFIG_KEXEC
+				uint64_t end = memory + mem_alloc_size;
+			/* This function automatically merges address
+			   regions next to each other if they are
+			   received in incrementing order */
+			if (memory < crashk_base && end >  crashk_end) {
+				/* region is fully in */
+				add_memory_region(memory,
+						  crashk_base - memory,
+						  BOOT_MEM_RAM);
+				total += crashk_base - memory;
+				add_memory_region(crashk_end,
+						  end - crashk_end,
+						  BOOT_MEM_RAM);
+				total += end - crashk_end;
+				continue;
+			}
+
+			if (memory >= crashk_base && end <= crashk_end)
+				/* Entire memory region is within the
+				 * new kernel's memory, ignore it. */
+				continue;
+
+			if (memory > crashk_base && memory < crashk_end &&
+			    end > crashk_end) {
+				/* Overlap with the beginning of the
+				 * region, reserve the beginning. */
+				mem_alloc_size -= crashk_end - memory;
+				memory = crashk_end;
+			} else if (memory < crashk_base && end > crashk_base &&
+				   end < crashk_end)
+				/* Overlap with the beginning of the
+				 * region, chop of end. */
+				mem_alloc_size -= end - crashk_base;
+#endif
+			add_memory_region(memory, mem_alloc_size,
+					  BOOT_MEM_RAM);
 			total += mem_alloc_size;
+
+			/* Recovering mem_alloc_size */
+			mem_alloc_size = 4 << 20;
 		} else {
 			break;
 		}
 	}
 	cvmx_bootmem_unlock();
+	/* Add the memory region for the kernel. */
+	kernel_start = (unsigned long) _text;
+	kernel_size = ALIGN(_end - _text, 0x100000);
+
+	/* Adjust for physical offset. */
+	kernel_start &= ~0xffffffff80000000ULL;
+	add_memory_region(kernel_start, kernel_size, BOOT_MEM_RAM);
 
+#endif /* CONFIG_CRASH_DUMP */
 #ifdef CONFIG_CAVIUM_RESERVE32
 	/*
 	 * Now that we've allocated the kernel memory it is safe to
diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c
index 51e9802..06fe291 100644
--- a/arch/mips/cavium-octeon/smp.c
+++ b/arch/mips/cavium-octeon/smp.c
@@ -65,6 +65,11 @@ void octeon_send_ipi_single(int cpu, unsigned int action)
 	cvmx_write_csr(CVMX_CIU_MBOX_SETX(coreid), action);
 }
 
+void core_send_ipi(int cpu, unsigned int action)
+{
+	octeon_send_ipi_single(cpu, action);
+}
+
 static inline void octeon_send_ipi_mask(const struct cpumask *mask,
 					unsigned int action)
 {
diff --git a/arch/mips/include/asm/octeon/cvmx-bootmem.h b/arch/mips/include/asm/octeon/cvmx-bootmem.h
index 8e708bd..2f3cb9f 100644
--- a/arch/mips/include/asm/octeon/cvmx-bootmem.h
+++ b/arch/mips/include/asm/octeon/cvmx-bootmem.h
@@ -370,4 +370,6 @@ void cvmx_bootmem_lock(void);
  */
 void cvmx_bootmem_unlock(void);
 
+void  *cvmx_bootmem_get_desc(void);
+
 #endif /*   __CVMX_BOOTMEM_H__ */
diff --git a/arch/mips/kernel/relocate_kernel.S b/arch/mips/kernel/relocate_kernel.S
index 0abaf7a..961c10b 100644
--- a/arch/mips/kernel/relocate_kernel.S
+++ b/arch/mips/kernel/relocate_kernel.S
@@ -78,7 +78,19 @@ done:
  	LONG_S		zero,(t0)
 #endif
 
+#ifdef CONFIG_CPU_CAVIUM_OCTEON
+ 	/* We need to flush I-cache before jumping to new kernel.
+ 	 * Unfortunatelly, this code is cpu-specific.
+ 	 */
+ 	.set push
+ 	.set noreorder
+ 	syncw
+ 	syncw
+ 	synci		0($0)
+ 	.set pop
+#else
 	sync
+#endif
 	/* jump to kexec_start_address */
 	j		s1
 	END(relocate_new_kernel)
@@ -110,7 +122,14 @@ LEAF(kexec_smp_wait)
 1:	LONG_L		s0, (t0)
 	bne		s0, zero,1b
 
+#ifdef CONFIG_CPU_CAVIUM_OCTEON
+	.set push
+	.set noreorder
+	synci		0($0)
+	.set pop
+#else
 	sync
+#endif
 	j		s1
 	END(kexec_smp_wait)
 #endif


Signed-off-by: Maxim Uvarov <muvarov@gmail.com>


From muvarov@gmail.com Wed Mar  3 12:06:31 2010
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To:     linux-mips@linux-mips.org, kexec@lists.infradead.org
Cc:     horms@verge.net.au, ralf@linux-mips.org
From:   Maxim Uvarov <muvarov@gmail.com>
Subject: [PATCH] some kexec MIPS improvements
Date:   Wed, 03 Mar 2010 14:05:53 +0300
Message-ID: <20100303110553.11274.9038.stgit@muvarov>
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Hello folks,

Please find here MIPS crash and kdump patches.
This is patch set of 3 patches:
1. generic MIPS changes (kernel);
2. MIPS Cavium Octeon board kexec/kdump code (kernel);
3. Kexec user space MIPS changes.

Patches were tested on the latest linux-mips@ git kernel and the latest
kexec-tools git on Cavium Octeon 50xx board.

I also made the same code working on RMI XLR/XLS boards for both
mips32 and mips64 kernels.

Best regards,
Maxim Uvarov.

From: Maxim Uvarov <muvarov@gmail.com>

Changes are:

-  using simple   mips* ) in configure.ac to make it compilable on mips2
	and mips64
- remove kexec/arch/mips/mips-setup-simple.S which prepares cmdline for
new kernel, it is better to move this work to kernel code. BTW this code was
compilable only on o32 because of t4 is not defined on 64-64 or n32 MIPS ABIs.
- simple put cmdline as string, kernel code should catch cmdline like this
int board_kexec_prepare(struct kimage *image)
{
    int i;
    char *bootloader = "kexec";
    board_boot_desc_ptr->argc = 0;
    for(i=0;i<image->nr_segments;i++)
    {
        printk("segment %d
        if (!strncmp(bootloader, (char*)image->segment[i].buf,
                strlen(bootloader)))
        {
            /*
             * convert command line string to array
             * of parameters (as bootloader does).
             */
            int argc = 0, offt;
            char *str = (char *)image->segment[i].buf;
            char *ptr = strchr(str, ' ');
            while (ptr && (ARGV_MAX_ARGS > argc)) {
                *ptr = '\0';
                if (ptr[1] != ' ') {
                    offt = (int)(ptr - str + 1);
                    boot_desc_ptr->argv[argc] =
                        image->segment[i].mem + offt;
                    argc++;
                }
                ptr = strchr(ptr + 1, ' ');
            }
            boot_desc_ptr->argc = argc;
            break;
        }
    }
   Keep it as string make code simple and more readable.
- add crashdump support
- do not redefine syscalls numbers if they defined in system
 remove fixups for /proc/iomem. If your board provides wrong /proc/iomem please
 fix kernel, or at least you local version of kexec. No need to support it in
 main line. At least add option --fake-iomem
- some minor fixes

Signed-off-by: Maxim Uvarov <muvarov@gmail.com>
---

 configure.ac                        |    2 
 kexec/arch/mips/Makefile            |    4 
 kexec/arch/mips/crashdump-mips.c    |  377 +++++++++++++++++++++++++++++++++++
 kexec/arch/mips/crashdump-mips.h    |   27 +++
 kexec/arch/mips/kexec-elf-mips.c    |  141 +++++++------
 kexec/arch/mips/kexec-mips.c        |   51 +----
 kexec/arch/mips/kexec-mips.h        |    9 +
 kexec/arch/mips/mips-setup-simple.S |  110 ----------
 kexec/crashdump.h                   |    2 
 kexec/kexec-syscall.h               |    2 
 10 files changed, 510 insertions(+), 215 deletions(-)
 create mode 100644 kexec/arch/mips/crashdump-mips.c
 create mode 100644 kexec/arch/mips/crashdump-mips.h
 delete mode 100644 kexec/arch/mips/mips-setup-simple.S

diff --git a/configure.ac b/configure.ac
index a911f8a..88d2e0b 100644
--- a/configure.ac
+++ b/configure.ac
@@ -39,7 +39,7 @@ case $target_cpu in
 	sh4|sh4a|sh3|sh )
 		ARCH="sh"
 		;;
-	mips|mipsel )
+	mips* )
 		ARCH="mips"
 		;;
 	cris|crisv32 )
diff --git a/kexec/arch/mips/Makefile b/kexec/arch/mips/Makefile
index f94bd89..831b263 100644
--- a/kexec/arch/mips/Makefile
+++ b/kexec/arch/mips/Makefile
@@ -4,7 +4,7 @@
 mips_KEXEC_SRCS =  kexec/arch/mips/kexec-mips.c
 mips_KEXEC_SRCS += kexec/arch/mips/kexec-elf-mips.c
 mips_KEXEC_SRCS += kexec/arch/mips/kexec-elf-rel-mips.c
-mips_KEXEC_SRCS += kexec/arch/mips/mips-setup-simple.S
+mips_KEXEC_SRCS += kexec/arch/mips/crashdump-mips.c
 
 mips_ADD_BUFFER =
 mips_ADD_SEGMENT =
@@ -12,5 +12,7 @@ mips_VIRT_TO_PHYS =
 
 dist += kexec/arch/mips/Makefile $(mips_KEXEC_SRCS)			\
 	kexec/arch/mips/kexec-mips.h					\
+	kexec/arch/mips/crashdump-mips.h				\
 	kexec/arch/mips/include/arch/options.h
 
+CFLAGS +=-Wall -Werror
diff --git a/kexec/arch/mips/crashdump-mips.c b/kexec/arch/mips/crashdump-mips.c
new file mode 100644
index 0000000..17cf52d
--- /dev/null
+++ b/kexec/arch/mips/crashdump-mips.c
@@ -0,0 +1,377 @@
+/*
+ * kexec: Linux boots Linux
+ *
+ * 2005 (C) IBM Corporation.
+ * 2008 (C) MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation (version 2 of the License).
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <limits.h>
+#include <elf.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <unistd.h>
+#include "../../kexec.h"
+#include "../../kexec-elf.h"
+#include "../../kexec-syscall.h"
+#include "../../crashdump.h"
+#include "kexec-mips.h"
+#include "crashdump-mips.h"
+#include "unused.h"
+
+/* Stores a sorted list of RAM memory ranges for which to create elf headers.
+ * A separate program header is created for backup region */
+static struct memory_range crash_memory_range[CRASH_MAX_MEMORY_RANGES];
+
+/* Memory region reserved for storing panic kernel and other data. */
+static struct memory_range crash_reserved_mem;
+
+/*
+ * To store the memory size of the first kernel and this value will be
+ * passed to the second kernel as command line (savemaxmem=xM).
+ * The second kernel will be calculated saved_max_pfn based on this
+ * variable.
+ */
+unsigned long long saved_max_mem;
+
+/* Removes crash reserve region from list of memory chunks for whom elf program
+ * headers have to be created. Assuming crash reserve region to be a single
+ * continuous area fully contained inside one of the memory chunks */
+static int exclude_crash_reserve_region(int *nr_ranges)
+{
+	int i, j, tidx = -1;
+	unsigned long long cstart, cend;
+	struct memory_range temp_region = {
+		.start = 0,
+		.end = 0
+	};
+
+	/* Crash reserved region. */
+	cstart = crash_reserved_mem.start;
+	cend = crash_reserved_mem.end;
+
+	for (i = 0; i < (*nr_ranges); i++) {
+		unsigned long long mstart, mend;
+		mstart = crash_memory_range[i].start;
+		mend = crash_memory_range[i].end;
+		if (cstart < mend && cend > mstart) {
+			if (cstart != mstart && cend != mend) {
+				/* Split memory region */
+				crash_memory_range[i].end = cstart - 1;
+				temp_region.start = cend + 1;
+				temp_region.end = mend;
+				temp_region.type = RANGE_RAM;
+				tidx = i+1;
+			} else if (cstart != mstart)
+				crash_memory_range[i].end = cstart - 1;
+			else
+				crash_memory_range[i].start = cend + 1;
+		}
+	}
+	/* Insert split memory region, if any. */
+	if (tidx >= 0) {
+		if (*nr_ranges == CRASH_MAX_MEMORY_RANGES) {
+			/* No space to insert another element. */
+			fprintf(stderr, "Error: Number of crash memory ranges"
+					" excedeed the max limit\n");
+			return -1;
+		}
+		for (j = (*nr_ranges - 1); j >= tidx; j--)
+			crash_memory_range[j+1] = crash_memory_range[j];
+		crash_memory_range[tidx].start = temp_region.start;
+		crash_memory_range[tidx].end = temp_region.end;
+		crash_memory_range[tidx].type = temp_region.type;
+		(*nr_ranges)++;
+	}
+	return 0;
+}
+/* Reads the appropriate file and retrieves the SYSTEM RAM regions for whom to
+ * create Elf headers. Keeping it separate from get_memory_ranges() as
+ * requirements are different in the case of normal kexec and crashdumps.
+ *
+ * Normal kexec needs to look at all of available physical memory irrespective
+ * of the fact how much of it is being used by currently running kernel.
+ * Crashdumps need to have access to memory regions actually being used by
+ * running  kernel. Expecting a different file/data structure than /proc/iomem
+ * to look into down the line. May be something like /proc/kernelmem or may
+ * be zone data structures exported from kernel.
+ */
+static int get_crash_memory_ranges(struct memory_range **range, int *ranges)
+{
+	const char iomem[] = "/proc/iomem";
+	int i, memory_ranges = 0;
+	char line[MAX_LINE];
+	FILE *fp;
+	unsigned long long start, end;
+
+	fp = fopen(iomem, "r");
+	if (!fp) {
+		fprintf(stderr, "Cannot open %s: %s\n",
+			iomem, strerror(errno));
+		return -1;
+	}
+	/* Separate segment for backup region */
+	crash_memory_range[0].start = BACKUP_SRC_START;
+	crash_memory_range[0].end = BACKUP_SRC_END;
+	crash_memory_range[0].type = RANGE_RAM;
+	memory_ranges++;
+
+	while (fgets(line, sizeof(line), fp) != 0) {
+		char *str;
+		int type, consumed, count;
+		if (memory_ranges >= CRASH_MAX_MEMORY_RANGES)
+			break;
+		count = sscanf(line, "%Lx-%Lx : %n",
+			&start, &end, &consumed);
+		if (count != 2)
+			continue;
+		str = line + consumed;
+
+		/* Only Dumping memory of type System RAM. */
+		if (memcmp(str, "System RAM\n", 11) == 0) {
+			type = RANGE_RAM;
+		} else if (memcmp(str, "Crash kernel\n", 13) == 0) {
+				/* Reserved memory region. New kernel can
+				 * use this region to boot into. */
+				crash_reserved_mem.start = start;
+				crash_reserved_mem.end = end;
+				crash_reserved_mem.type = RANGE_RAM;
+				continue;
+		} else
+			continue;
+
+		if (start == BACKUP_SRC_START && end >= (BACKUP_SRC_END + 1))
+			start = BACKUP_SRC_END + 1;
+
+		crash_memory_range[memory_ranges].start = start;
+		crash_memory_range[memory_ranges].end = end;
+		crash_memory_range[memory_ranges].type = type;
+		memory_ranges++;
+
+		/* Segregate linearly mapped region. */
+		if ((MAXMEM - 1) >= start && (MAXMEM - 1) <= end) {
+			crash_memory_range[memory_ranges - 1].end = MAXMEM - 1;
+
+			/* Add segregated region. */
+			crash_memory_range[memory_ranges].start = MAXMEM;
+			crash_memory_range[memory_ranges].end = end;
+			crash_memory_range[memory_ranges].type = type;
+			memory_ranges++;
+		}
+	}
+	fclose(fp);
+
+	if (exclude_crash_reserve_region(&memory_ranges) < 0)
+		return -1;
+
+	for (i = 0; i < memory_ranges; i++)
+		if (saved_max_mem < crash_memory_range[i].end)
+			saved_max_mem = crash_memory_range[i].end + 1;
+
+	*range = crash_memory_range;
+	*ranges = memory_ranges;
+	return 0;
+}
+
+/* Converts unsigned long to ascii string. */
+static void ultoa(unsigned long i, char *str)
+{
+	int j = 0, k;
+	char tmp;
+
+	do {
+		str[j++] = i % 10 + '0';
+	} while ((i /= 10) > 0);
+	str[j] = '\0';
+
+	/* Reverse the string. */
+	for (j = 0, k = strlen(str) - 1; j < k; j++, k--) {
+		tmp = str[k];
+		str[k] = str[j];
+		str[j] = tmp;
+	}
+}
+
+/* Adds the appropriate mem= options to command line, indicating the
+ * memory region the new kernel can use to boot into. */
+static int cmdline_add_mem(char *cmdline, unsigned long addr,
+		unsigned long size)
+{
+	int cmdlen, len;
+	char str[50], *ptr;
+
+	addr = addr/1024;
+	size = size/1024;
+	ptr = str;
+	strcpy(str, " mem=");
+	ptr += strlen(str);
+	ultoa(size, ptr);
+	strcat(str, "K@");
+	ptr = str + strlen(str);
+	ultoa(addr, ptr);
+	strcat(str, "K");
+	len = strlen(str);
+	cmdlen = strlen(cmdline) + len;
+	if (cmdlen > (COMMAND_LINE_SIZE - 1))
+		die("Command line overflow\n");
+	strcat(cmdline, str);
+
+	return 0;
+}
+
+/* Adds the elfcorehdr= command line parameter to command line. */
+static int cmdline_add_elfcorehdr(char *cmdline, unsigned long addr)
+{
+	int cmdlen, len, align = 1024;
+	char str[30], *ptr;
+
+	/* Passing in elfcorehdr=xxxK format. Saves space required in cmdline.
+	 * Ensure 1K alignment*/
+	if (addr%align)
+		return -1;
+	addr = addr/align;
+	ptr = str;
+	strcpy(str, " elfcorehdr=");
+	ptr += strlen(str);
+	ultoa(addr, ptr);
+	strcat(str, "K");
+	len = strlen(str);
+	cmdlen = strlen(cmdline) + len;
+	if (cmdlen > (COMMAND_LINE_SIZE - 1))
+		die("Command line overflow\n");
+	strcat(cmdline, str);
+	return 0;
+}
+
+/* Adds the savemaxmem= command line parameter to command line. */
+static int cmdline_add_savemaxmem(char *cmdline, unsigned long long addr)
+{
+	int cmdlen, len, align = 1024;
+	char str[30], *ptr;
+
+	/* Passing in savemaxmem=xxxM format. Saves space required in cmdline.*/
+	addr = addr/(align*align);
+	ptr = str;
+	strcpy(str, " savemaxmem=");
+	ptr += strlen(str);
+	ultoa(addr, ptr);
+	strcat(str, "M");
+	len = strlen(str);
+	cmdlen = strlen(cmdline) + len;
+	if (cmdlen > (COMMAND_LINE_SIZE - 1))
+		die("Command line overflow\n");
+	strcat(cmdline, str);
+	return 0;
+}
+
+#ifdef __mips64
+static struct crash_elf_info elf_info64 = {
+	class: ELFCLASS64,
+	data : ELFDATA2MSB,
+	machine : EM_MIPS,
+	backup_src_start : BACKUP_SRC_START,
+	backup_src_end : BACKUP_SRC_END,
+	page_offset : PAGE_OFFSET,
+	lowmem_limit : MAXMEM,
+};
+#endif
+static struct crash_elf_info elf_info32 = {
+	class: ELFCLASS32,
+	data : ELFDATA2MSB,
+	machine : EM_MIPS,
+	backup_src_start : BACKUP_SRC_START,
+	backup_src_end : BACKUP_SRC_END,
+	page_offset : PAGE_OFFSET,
+	lowmem_limit : MAXMEM,
+};
+
+/* Loads additional segments in case of a panic kernel is being loaded.
+ * One segment for backup region, another segment for storing elf headers
+ * for crash memory image.
+ */
+int load_crashdump_segments(struct kexec_info *info, char* mod_cmdline,
+				unsigned long UNUSED(max_addr),
+				unsigned long UNUSED(min_base))
+{
+	void *tmp;
+	unsigned long sz, elfcorehdr;
+	int nr_ranges, align = 1024;
+	struct memory_range *mem_range;
+
+	if (get_crash_memory_ranges(&mem_range, &nr_ranges) < 0)
+		return -1;
+
+	/* Create a backup region segment to store backup data*/
+	sz = (BACKUP_SRC_SIZE + align - 1) & ~(align - 1);
+	tmp = xmalloc(sz);
+	memset(tmp, 0, sz);
+	info->backup_start = add_buffer(info, tmp, sz, sz, align,
+				crash_reserved_mem.start,
+				crash_reserved_mem.end, -1);
+
+#ifdef __mips64
+	/* Create elf header segment and store crash image data. */
+	if (arch_options.core_header_type == CORE_TYPE_ELF64) {
+		if (crash_create_elf64_headers(info, &elf_info64,
+			crash_memory_range, nr_ranges,
+			&tmp, &sz,
+			ELF_CORE_HEADER_ALIGN) < 0)
+			return -1;
+	} else {
+		if (crash_create_elf32_headers(info, &elf_info32,
+			crash_memory_range, nr_ranges,
+			&tmp, &sz,
+			ELF_CORE_HEADER_ALIGN) < 0)
+			return -1;
+	}
+#else
+	if (crash_create_elf32_headers(info, &elf_info32,
+		crash_memory_range, nr_ranges,
+		&tmp, &sz,
+		ELF_CORE_HEADER_ALIGN) < 0)
+		return -1;
+#endif
+	elfcorehdr = add_buffer(info, tmp, sz, sz, align,
+		crash_reserved_mem.start,
+		crash_reserved_mem.end, -1);
+
+	/*
+	 * backup segment is after elfcorehdr, so use elfcorehdr as top of
+	 * kernel's available memory
+	 */
+	cmdline_add_mem(mod_cmdline, crash_reserved_mem.start,
+		elfcorehdr - crash_reserved_mem.start);
+	cmdline_add_elfcorehdr(mod_cmdline, elfcorehdr);
+	cmdline_add_savemaxmem(mod_cmdline, saved_max_mem);
+
+#ifdef DEBUG
+	printf("CRASH MEMORY RANGES:\n");
+	printf("%016Lx-%016Lx\n", crash_reserved_mem.start,
+			crash_reserved_mem.end);
+#endif
+	return 0;
+}
+
+int is_crashkernel_mem_reserved(void)
+{
+	uint64_t start, end;
+
+	return parse_iomem_single("Crash kernel\n", &start, &end) == 0 ?
+		(start != end) : 0;
+}
+
diff --git a/kexec/arch/mips/crashdump-mips.h b/kexec/arch/mips/crashdump-mips.h
new file mode 100644
index 0000000..c986835
--- /dev/null
+++ b/kexec/arch/mips/crashdump-mips.h
@@ -0,0 +1,27 @@
+#ifndef CRASHDUMP_MIPS_H
+#define CRASHDUMP_MIPS_H
+
+struct kexec_info;
+int load_crashdump_segments(struct kexec_info *info, char *mod_cmdline,
+				unsigned long max_addr, unsigned long min_base);
+#ifdef __mips64
+#define PAGE_OFFSET	0xa800000000000000ULL
+#else
+#define PAGE_OFFSET	0x80000000
+#endif
+#define __pa(x)		((unsigned long)(X) & 0x7fffffff)
+
+#define MAXMEM		0x80000000
+
+#define CRASH_MAX_MEMMAP_NR	(KEXEC_MAX_SEGMENTS + 1)
+#define CRASH_MAX_MEMORY_RANGES	(MAX_MEMORY_RANGES + 2)
+
+#define COMMAND_LINE_SIZE	512
+
+/* Backup Region, First 1M of System RAM. */
+#define BACKUP_SRC_START	0x00000000
+#define BACKUP_SRC_END		0x000fffff
+#define BACKUP_SRC_SIZE	(BACKUP_SRC_END - BACKUP_SRC_START + 1)
+
+extern struct arch_options_t arch_options;
+#endif /* CRASHDUMP_MIPS_H */
diff --git a/kexec/arch/mips/kexec-elf-mips.c b/kexec/arch/mips/kexec-elf-mips.c
index 95695b6..ce6bf0c 100644
--- a/kexec/arch/mips/kexec-elf-mips.c
+++ b/kexec/arch/mips/kexec-elf-mips.c
@@ -25,55 +25,21 @@
 #include <ip_checksum.h>
 #include "../../kexec.h"
 #include "../../kexec-elf.h"
+#include "../../kexec-syscall.h"
 #include "kexec-mips.h"
+#include "crashdump-mips.h"
 #include <arch/options.h>
 
 static const int probe_debug = 0;
 
 #define BOOTLOADER         "kexec"
 #define MAX_COMMAND_LINE   256
-
 #define UPSZ(X) ((sizeof(X) + 3) & ~3)
-static struct boot_notes {
-	Elf_Bhdr hdr;
-	Elf_Nhdr bl_hdr;
-	unsigned char bl_desc[UPSZ(BOOTLOADER)];
-	Elf_Nhdr blv_hdr;
-	unsigned char blv_desc[UPSZ(BOOTLOADER_VERSION)];
-	Elf_Nhdr cmd_hdr;
-	unsigned char command_line[0];
-} elf_boot_notes = {
-	.hdr = {
-		.b_signature = 0x0E1FB007,
-		.b_size = sizeof(elf_boot_notes),
-		.b_checksum = 0,
-		.b_records = 3,
-	},
-	.bl_hdr = {
-		.n_namesz = 0,
-		.n_descsz = sizeof(BOOTLOADER),
-		.n_type = EBN_BOOTLOADER_NAME,
-	},
-	.bl_desc = BOOTLOADER,
-	.blv_hdr = {
-		.n_namesz = 0,
-		.n_descsz = sizeof(BOOTLOADER_VERSION),
-		.n_type = EBN_BOOTLOADER_VERSION,
-	},
-	.blv_desc = BOOTLOADER_VERSION,
-	.cmd_hdr = {
-		.n_namesz = 0,
-		.n_descsz = 0,
-		.n_type = EBN_COMMAND_LINE,
-	},
-};
-
-
 #define OPT_APPEND	(OPT_ARCH_MAX+0)
+static char cmdline_buf[256] = "kexec ";
 
 int elf_mips_probe(const char *buf, off_t len)
 {
-
 	struct mem_ehdr ehdr;
 	int result;
 	result = build_elf_exec_info(buf, len, &ehdr, 0);
@@ -108,16 +74,14 @@ int elf_mips_load(int argc, char **argv, const char *buf, off_t len,
 	struct kexec_info *info)
 {
 	struct mem_ehdr ehdr;
-	char *arg_buf;
-	size_t arg_bytes;
-	unsigned long arg_base;
-	struct boot_notes *notes;
-	size_t note_bytes;
 	const char *command_line;
 	int command_line_len;
-	unsigned char *setup_start;
-	uint32_t setup_size;
+	char *crash_cmdline;
 	int opt;
+	int result;
+	unsigned long cmdline_addr;
+	size_t i;
+	unsigned long bss_start = 0, bss_size = 0;
 	static const struct option options[] = {
 		KEXEC_ARCH_OPTIONS
 		{"command-line", 1, 0, OPT_APPEND},
@@ -144,38 +108,83 @@ int elf_mips_load(int argc, char **argv, const char *buf, off_t len,
 			break;
 		}
 	}
+
 	command_line_len = 0;
-	setup_simple_regs.spr9 = 0;
-	if (command_line) {
-		command_line_len = strlen(command_line) + 1;
-		setup_simple_regs.spr9 = 2;
+
+	/* Need to append some command line parameters internally in case of
+	 * taking crash dumps.
+	 */
+	if (info->kexec_flags & KEXEC_ON_CRASH) {
+		crash_cmdline = xmalloc(COMMAND_LINE_SIZE);
+		memset((void *)crash_cmdline, 0, COMMAND_LINE_SIZE);
+	} else
+		crash_cmdline = NULL;
+
+	result = build_elf_exec_info(buf, len, &ehdr, 0);
+	if (result < 0)
+		die("ELF exec parse failed\n");
+
+	/* Read in the PT_LOAD segments and remove CKSEG0 mask from address*/
+	for (i = 0; i < ehdr.e_phnum; i++) {
+		struct mem_phdr *phdr;
+		phdr = &ehdr.e_phdr[i];
+		if (phdr->p_type == PT_LOAD)
+			phdr->p_paddr = virt_to_phys(phdr->p_paddr);
 	}
 
-	/* Load the ELF executable */
-	elf_exec_build_load(info, &ehdr, buf, len, 0);
+	for (i = 0; i < ehdr.e_shnum; i++) {
+		struct mem_shdr *shdr;
+		unsigned char *strtab;
+		strtab = (unsigned char *)ehdr.e_shdr[ehdr.e_shstrndx].sh_data;
+
+		shdr = &ehdr.e_shdr[i];
+		if (shdr->sh_size &&
+				strcmp((char *)&strtab[shdr->sh_name],
+					".bss") == 0) {
+			bss_start = virt_to_phys(shdr->sh_addr);
+			bss_size = shdr->sh_size;
+			break;
+		}
 
-	setup_start = setup_simple_start;
-	setup_size = setup_simple_size;
-	setup_simple_regs.spr8 = ehdr.e_entry;
+	}
 
-	note_bytes = sizeof(elf_boot_notes) + ((command_line_len + 3) & ~3);
-	arg_bytes = note_bytes + ((setup_size + 3) & ~3);
+	/* Load the Elf data */
+	result = elf_exec_load(&ehdr, info);
+	if (result < 0)
+		die("ELF exec load failed\n");
 
-	arg_buf = xmalloc(arg_bytes);
-	arg_base = add_buffer_virt(info,
-		 arg_buf, arg_bytes, arg_bytes, 4, 0, elf_max_addr(&ehdr), 1);
+	info->entry = (void *)virt_to_phys(ehdr.e_entry);
 
-	notes = (struct boot_notes *)(arg_buf + ((setup_size + 3) & ~3));
+	/* Put cmdline right after bss for crash*/
+	if (info->kexec_flags & KEXEC_ON_CRASH)
+		cmdline_addr = bss_start + bss_size;
+	else
+		cmdline_addr = 0;
 
-	memcpy(arg_buf, setup_start, setup_size);
-	memcpy(notes, &elf_boot_notes, sizeof(elf_boot_notes));
-	memcpy(notes->command_line, command_line, command_line_len);
+	if (!bss_size)
+		die("No .bss segment present\n");
 
-	notes->hdr.b_size = note_bytes;
-	notes->cmd_hdr.n_descsz = command_line_len;
-	notes->hdr.b_checksum = compute_ip_checksum(notes, note_bytes);
+	if (command_line)
+		command_line_len = strlen(command_line) + 1;
+
+	if (info->kexec_flags & KEXEC_ON_CRASH) {
+		result = load_crashdump_segments(info, crash_cmdline,
+				0, 0);
+		if (result < 0) {
+			free(crash_cmdline);
+			return -1;
+		}
+	}
 
-	info->entry = (void *)arg_base;
+	if (command_line)
+		strncat(cmdline_buf, command_line, command_line_len);
+	if (crash_cmdline)
+		strncat(cmdline_buf, crash_cmdline,
+				sizeof(crash_cmdline) -
+				strlen(crash_cmdline) - 1);
+	add_buffer(info, cmdline_buf, sizeof(cmdline_buf),
+			sizeof(cmdline_buf), sizeof(void *),
+			cmdline_addr, 0x0fffffff, 1);
 
 	return 0;
 }
diff --git a/kexec/arch/mips/kexec-mips.c b/kexec/arch/mips/kexec-mips.c
index cb75a2d..bd12bb3 100644
--- a/kexec/arch/mips/kexec-mips.c
+++ b/kexec/arch/mips/kexec-mips.c
@@ -21,8 +21,6 @@
 #include "kexec-mips.h"
 #include <arch/options.h>
 
-#define MAX_MEMORY_RANGES  64
-#define MAX_LINE          160
 static struct memory_range memory_range[MAX_MEMORY_RANGES];
 
 /* Return a sorted list of memory ranges. */
@@ -31,16 +29,6 @@ int get_memory_ranges(struct memory_range **range, int *ranges,
 {
 	int memory_ranges = 0;
 
-#if 1
-	/* this is valid for gemini2 platform based on tx4938
-	 * in our case, /proc/iomem doesn't report ram space
-	 */
-	 memory_range[memory_ranges].start = 0x00000000;
-	 memory_range[memory_ranges].end = 0x04000000;
-	 memory_range[memory_ranges].type = RANGE_RAM;
-	 memory_ranges++;
-#else
-#error Please, fix this for your platform
 	const char iomem[] = "/proc/iomem";
 	char line[MAX_LINE];
 	FILE *fp;
@@ -61,31 +49,19 @@ int get_memory_ranges(struct memory_range **range, int *ranges,
 			continue;
 		str = line + consumed;
 		end = end + 1;
-#if 0
-		printf("%016Lx-%016Lx : %s\n", start, end, str);
-#endif
 		if (memcmp(str, "System RAM\n", 11) == 0) {
 			type = RANGE_RAM;
 		} else if (memcmp(str, "reserved\n", 9) == 0) {
 			type = RANGE_RESERVED;
-		} else if (memcmp(str, "ACPI Tables\n", 12) == 0) {
-			type = RANGE_ACPI;
-		} else if (memcmp(str, "ACPI Non-volatile Storage\n", 26) == 0) {
-			type = RANGE_ACPI_NVS;
 		} else {
 			continue;
 		}
 		memory_range[memory_ranges].start = start;
 		memory_range[memory_ranges].end = end;
 		memory_range[memory_ranges].type = type;
-#if 0
-		printf("%016Lx-%016Lx : %x\n", start, end, type);
-#endif
 		memory_ranges++;
 	}
 	fclose(fp);
-#endif
-
 	*range = memory_range;
 	*ranges = memory_ranges;
 	return 0;
@@ -98,8 +74,18 @@ int file_types = sizeof(file_type) / sizeof(file_type[0]);
 
 void arch_usage(void)
 {
+#ifdef __mips64
+	fprintf(stderr, "     --elf32-core-headers Prepare core headers in "
+			"ELF32 format\n");
+#endif
 }
 
+#ifdef __mips64
+struct arch_options_t arch_options = {
+	.core_header_type = CORE_TYPE_ELF64
+};
+#endif
+
 int arch_process_options(int argc, char **argv)
 {
 	static const struct option options[] = {
@@ -126,12 +112,14 @@ const struct arch_map_entry arches[] = {
 	/* For compatibility with older patches
 	 * use KEXEC_ARCH_DEFAULT instead of KEXEC_ARCH_MIPS here.
 	 */
-	{ "mips", KEXEC_ARCH_DEFAULT },
+	{ "mips", KEXEC_ARCH_MIPS },
+	{ "mips64", KEXEC_ARCH_MIPS },
 	{ NULL, 0 },
 };
 
 int arch_compat_trampoline(struct kexec_info *UNUSED(info))
 {
+
 	return 0;
 }
 
@@ -139,18 +127,9 @@ void arch_update_purgatory(struct kexec_info *UNUSED(info))
 {
 }
 
-/*
- * Adding a dummy function, so that build on mips will not break.
- * Need to implement the actual checking code
- */
-int is_crashkernel_mem_reserved(void)
-{
-	return 1;
-}
-
 unsigned long virt_to_phys(unsigned long addr)
 {
-	return addr - 0x80000000;
+	return addr & 0x7fffffff;
 }
 
 /*
@@ -159,7 +138,7 @@ unsigned long virt_to_phys(unsigned long addr)
 void add_segment(struct kexec_info *info, const void *buf, size_t bufsz,
 		 unsigned long base, size_t memsz)
 {
-	add_segment_phys_virt(info, buf, bufsz, base, memsz, 1);
+	add_segment_phys_virt(info, buf, bufsz, virt_to_phys(base), memsz, 1);
 }
 
 /*
diff --git a/kexec/arch/mips/kexec-mips.h b/kexec/arch/mips/kexec-mips.h
index 13f82be..6d062fc 100644
--- a/kexec/arch/mips/kexec-mips.h
+++ b/kexec/arch/mips/kexec-mips.h
@@ -1,6 +1,11 @@
 #ifndef KEXEC_MIPS_H
 #define KEXEC_MIPS_H
 
+#define MAX_MEMORY_RANGES  64
+#define MAX_LINE          160
+
+#define CORE_TYPE_ELF32 1
+#define CORE_TYPE_ELF64 2
 extern unsigned char setup_simple_start[];
 extern uint32_t setup_simple_size;
 
@@ -14,4 +19,8 @@ int elf_mips_load(int argc, char **argv, const char *buf, off_t len,
 	struct kexec_info *info);
 void elf_mips_usage(void);
 
+struct arch_options_t {
+	int      core_header_type;
+};
+
 #endif /* KEXEC_MIPS_H */
diff --git a/kexec/arch/mips/mips-setup-simple.S b/kexec/arch/mips/mips-setup-simple.S
deleted file mode 100644
index 1acdee3..0000000
--- a/kexec/arch/mips/mips-setup-simple.S
+++ /dev/null
@@ -1,110 +0,0 @@
-/*
- * mips-setup-simple.S - code to execute before kernel to handle command line
- * Copyright (C) 2007 Francesco Chiechi, Alessandro Rubini
- * Copyright (C) 2007 Tvblob s.r.l.
- *
- * derived from Albert Herranz idea (ppc) adding command line support
- * (boot_notes structure)
- *
- * This source code is licensed under the GNU General Public License,
- * Version 2.  See the file COPYING for more details.
- */
-
-/*
- * Only suitable for platforms booting with MMU turned off.
- * -- Albert Herranz
- */
-#include "regdef.h"
-
-/* returns  t0 = relocated address of sym */
-/* modifies t1 t2 */
-/* sym must not be global or this will not work (at least AFAIK up to now) */
-#define RELOC_SYM(sym)                                                 \
-	move    t0,ra;          /* save ra */                           \
-	bal 1f;                                                         \
-1:                                                                     \
-	move    t1,ra;          /* now t1 is 1b (where we are now) */   \
-	move    ra,t0;          /* restore ra */                        \
-	lui     t2,%hi(1b);                                             \
-	ori     t2,t2,%lo(1b);                                          \
-	lui     t0,%hi(sym);                                            \
-	ori     t0,t0,%lo(sym);                                         \
-	sub     t0,t0,t2;       /* t0 = offset between sym and 1b */    \
-	add     t0,t1,t0;       /* t0 = actual address in memory */
-
-	.data
-	.globl setup_simple_start
-setup_simple_start:
-
-	/* should perform here any required setup */
-
-	/* Initialize GOT pointer (verify if needed) */
-	bal     1f
-	nop
-	.word   _GLOBAL_OFFSET_TABLE_
-	1:
-	move    gp, ra
-	lw      t1, 0(ra)
-	move    gp, t1
-
-	/* spr8 relocation */
-	RELOC_SYM(spr8)
-
-	move    t4,t0           // save pointer to kernel start addr
-	lw      t3,0(t0)        // save kernel start address
-
-	/* spr9 relocation */
-	RELOC_SYM(spr9)
-	lw      a0,0(t0)        // load argc
-
-	// this code is to be changed if boot_notes struct changes
-	lw      t2,12(t4)       // t2 is size of boot_notes struct
-	addi    t2,t2,3
-	srl     t2,t2,2
-	sll     v1,t2,2         // v1 = size of boot_notes struct
-				// aligned to word boundary
-
-	addi    t0,t4,0x20      // t0 contains the address of "kexec" string
-	add     v0,t4,v1        // v0 points to last word of boot_notes
-	addi    v0,v0,8         // v0 points to address after boot_notes
-	sw      t0,0(v0)        // store pointer to "kexec" string there
-
-	lw      t2,-8(t0)       // t2 is size of "kexec" string in bytes
-	addi    t2,t2,3
-	srl     t2,t2,2
-	sll     v1,t2,2         // v1 = size of "kexec" string
-				// aligned to word boundary
-	add     t2,t0,v1
-	addi    t0,t2,4         // t0 points to size of version string
-
-	lw      t2,0(t0)        // t2 is size of version string in bytes
-	addi    t2,t2,3
-	srl     t2,t2,2
-	sll     v1,t2,2         // v1 = size of version string
-				// aligned to word boundary
-
-	addi    t0,t0,8         // t0 points to version string
-	add     t0,t0,v1        // t0 points to start of command_line record
-	addi    t0,t0,12        // t0 points command line
-
-	sw      t0,4(v0)        // store pointer to command line
-
-	move    a1,v0           // load argv
-	li      a2,0
-	li      a3,0
-
-	jr      t3
-	nop
-
-	.balign 4
-	.globl setup_simple_regs
-setup_simple_regs:
-spr8:	.long 0x00000000
-spr9:	.long 0x00000000
-
-setup_simple_end:
-
-	.globl setup_simple_size
-setup_simple_size:
-	.long setup_simple_end - setup_simple_start
-
diff --git a/kexec/crashdump.h b/kexec/crashdump.h
index 1789b53..30d6f29 100644
--- a/kexec/crashdump.h
+++ b/kexec/crashdump.h
@@ -26,7 +26,7 @@ struct crash_elf_info {
 	unsigned long backup_src_start;
 	unsigned long backup_src_end;
 
-	unsigned long page_offset;
+	unsigned long long page_offset;
 	unsigned long lowmem_limit;
 
 	int (*get_note_info)(int cpu, uint64_t *addr, uint64_t *len);
diff --git a/kexec/kexec-syscall.h b/kexec/kexec-syscall.h
index 69c9686..7f41a1b 100644
--- a/kexec/kexec-syscall.h
+++ b/kexec/kexec-syscall.h
@@ -22,6 +22,7 @@
 #define LINUX_REBOOT_CMD_KEXEC_OLD2	0x18263645
 #define LINUX_REBOOT_CMD_KEXEC		0x45584543
 
+#ifndef __NR_kexec_load
 #ifdef __i386__
 #define __NR_kexec_load		283
 #endif
@@ -60,6 +61,7 @@
 #ifndef __NR_kexec_load
 #error Unknown processor architecture.  Needs a kexec_load syscall number.
 #endif
+#endif /*ifndef __NR_kexec_load*/
 
 struct kexec_segment;
 


Signed-off-by: Maxim Uvarov <muvarov@gmail.com>


From lists@nabble.com Wed Mar  3 13:58:53 2010
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i adder printk(...) before all function in kernel init funktion /init/main.c

log show last message before called fundtion  local_irq_enable().

If delete my debug printk-s kernel stop after first console output
"Calibrating delay loop... "

I do not MIPS arch interput specific ..... Can be MIPS need init internel
timer and link overflow flag to interput ??


------ log with added printk ----
......
Memory: 13172k/16384k available (1314k kernel code, 3212k reserved, 411k
data, 120k init, 0k highmem)
early_irq_init
NR_IRQS:256 <- kernel
init_IRQ
prio_tree_init
init_timers
hrtimers_init
softirq_init
timerkepping_init
time init
profile_init
early_boot_irqs_on
local_irq_enable <- last my debug printk message before call to
local_irq_enable()
-------------------------------
-- 
View this message in context: http://old.nabble.com/TI-AR7-7200---no-boot-tp27766331p27767861.html
Sent from the linux-mips main mailing list archive at Nabble.com.


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From:   Florian Fainelli <florian@openwrt.org>
Organization: OpenWrt
To:     "Dea_RU" <dryukovz@mail.ru>
Subject: Re: TI AR7 7200 - no boot
Date:   Wed, 3 Mar 2010 14:04:52 +0100
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On Wednesday 03 March 2010 13:58:48 Dea_RU wrote:
> i adder printk(...) before all function in kernel init funktion
>  /init/main.c
> 
> log show last message before called fundtion  local_irq_enable().
> 
> If delete my debug printk-s kernel stop after first console output
> "Calibrating delay loop... "
> 
> I do not MIPS arch interput specific ..... Can be MIPS need init internel
> timer and link overflow flag to interput ??

All handlers are not correctly setup, so you should include this patch in your 
tree:

http://www.linux-mips.org/archives/linux-mips/2010-01/msg00019.html

> 
> 
> ------ log with added printk ----
> ......
> Memory: 13172k/16384k available (1314k kernel code, 3212k reserved, 411k
> data, 120k init, 0k highmem)
> early_irq_init
> NR_IRQS:256 <- kernel
> init_IRQ
> prio_tree_init
> init_timers
> hrtimers_init
> softirq_init
> timerkepping_init
> time init
> profile_init
> early_boot_irqs_on
> local_irq_enable <- last my debug printk message before call to
> local_irq_enable()
> -------------------------------
> 

-- 
Regards, Florian

From lists@nabble.com Wed Mar  3 15:24:07 2010
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it work !
great work !

why this patch not present in src 2.6.33 ??? 

============ log
(psbl) 

Booting...
Linux version 2.6.33 (root@linwork) (gcc version 4.3.3 (Buildroot
2010.02-rc1) ) #13 Wed Mar 3 20:04:20 OMST 2010
bootconsole [early0] enabled
CPU revision is: 00018448 (MIPS 4KEc)
TI AR7 (TNETD7200), ID: 0x002b, Revision: 0x11
Determined physical RAM map:
 memory: 01000000 @ 14000000 (usable)
Zone PFN ranges:
  Normal   0x00014000 -> 0x00015000
Movable zone start PFN for each node
early_node_map[1] active PFN ranges
    0: 0x00014000 -> 0x00015000
Built 1 zonelists in Zone order, mobility grouping off.  Total pages: 4064
Kernel command line:  console=ttyS0,9600n8 earlyprintk=ttyS0,9600
PID hash table entries: 64 (order: -4, 256 bytes)
Dentry cache hash table entries: 2048 (order: 1, 8192 bytes)
Inode-cache hash table entries: 1024 (order: 0, 4096 bytes)
Primary instruction cache 16kB, VIPT, 4-way, linesize 16 bytes.
Primary data cache 8kB, 4-way, VIPT, no aliases, linesize 16 bytes
Memory: 13172k/16384k available (1316k kernel code, 3212k reserved, 409k
data, 120k init, 0k highmem)
NR_IRQS:256
Console: colour dummy device 80x25
Calibrating delay loop... 149.50 BogoMIPS (lpj=299008)
Mount-cache hash table entries: 512
rest_init
Clocks: Sync 2:1 mode
Clocks: Setting CPU clock
Adjusted requested frequency 211000000 to 211968000
Clocks: base = 35328000, frequency = 211968000, prediv = 1, postdiv = 1,
postdiv2 = -1, mul = 6
Clocks: Setting DSP clock
Clocks: base = 25000000, frequency = 105984000, prediv = 1, postdiv = 2,
postdiv2 = 1, mul = 10
Clocks: Setting USB clock
Adjusted requested frequency 48000000 to 47863741
Clocks: base = 105984000, frequency = 48000000, prediv = 1, postdiv = 31,
postdiv2 = -1, mul = 14
LinuxPPS API ver. 1 registered
Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti
<giometti@linux.it>
Switching to clocksource MIPS
Slow work thread pool: Starting up
Slow work thread pool: Ready
FS-Cache: Loaded
msgmni has been set to 25
alg: No test for cipher_null (cipher_null-generic)
alg: No test for ecb(cipher_null) (ecb-cipher_null)
alg: No test for digest_null (digest_null-generic)
alg: No test for compress_null (compress_null-generic)
alg: No test for stdrng (krng)
Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
serial8250: ttyS0 at MMIO 0x8610e00 (irq = 15) is a XScale
Ãƒ}qâ„¢ya)Â¶â€°/Â½Â¾Â£ÂÃ–	Â².W,XvÃ!aâ„¢,Ã“Â¯\â€œÃ—
---------- can not select USART options for show it ...
-- 
View this message in context: http://old.nabble.com/TI-AR7-7200---no-boot-tp27766331p27768844.html
Sent from the linux-mips main mailing list archive at Nabble.com.


From sgi-linux-mips@m.gmane.org Wed Mar  3 17:08:59 2010
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From:   Alexander Clouter <alex@digriz.org.uk>
Subject: Re: TI AR7 7200 - no boot
Date:   Wed, 3 Mar 2010 15:54:39 +0000
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References: <27766331.post@talk.nabble.com> <27766728.post@talk.nabble.com> <27767861.post@talk.nabble.com> <201003031404.53039.florian@openwrt.org>
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Florian Fainelli <florian@openwrt.org> wrote:
>
> On Wednesday 03 March 2010 13:58:48 Dea_RU wrote:
>> 
>> If delete my debug printk-s kernel stop after first console output
>> "Calibrating delay loop... "
>> 
>> I do not MIPS arch interput specific ..... Can be MIPS need init internel
>> timer and link overflow flag to interput ??
> 
> All handlers are not correctly setup, so you should include this patch in your 
> tree:
> 
> http://www.linux-mips.org/archives/linux-mips/2010-01/msg00019.html
> 
If I could slip in with some shameless self advertising:

http://www.digriz.org.uk/wag54g

Same(ish) chipset, the 'Creating Firmwares' section should interest you 
and get you started on your buildroot journey.

Cheers

-- 
Alexander Clouter
.sigmonster says: guru, n:
                  	A computer owner who can read the manual.


From wilbur512@gmail.com Wed Mar  3 17:34:31 2010
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Date:   Thu, 4 Mar 2010 00:34:22 +0800
Message-ID: <e997b7421003030834r7bec3295s7917bb91a3fa2d27@mail.gmail.com>
Subject: Re: [PATCH 1/2] MIPS kexec,kdump support
From:   "wilbur.chan" <wilbur512@gmail.com>
To:     Maxim Uvarov <muvarov@gmail.com>
Cc:     linux-mips@linux-mips.org, kexec@lists.infradead.org,
        horms@verge.net.au, ralf@linux-mips.org
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2010/3/3 Maxim Uvarov <muvarov@gmail.com>:
> Hello folks,
>
> Please find here MIPS crash and kdump patches.
> This is patch set of 3 patches:
> 1. generic MIPS changes (kernel);
> 2. MIPS Cavium Octeon board kexec/kdump code (kernel);
> 3. Kexec user space MIPS changes.
>
> Patches were tested on the latest linux-mips@ git kernel and the latest
> kexec-tools git on Cavium Octeon 50xx board.
>
> I also made the same code working on RMI XLR/XLS boards for both
> mips32 and mips64 kernels.
>
> Best regards,
> Maxim Uvarov.
>

> Signed-off-by: Maxim Uvarov <muvarov@gmail.com>
>
>
>

Hi, Maxim

In XLR series ,

1)How to protect  boardinfo and pass it to second kernel ?

2)If all cpus jumped to same entry point , did you change head.s  ,if so , how ?



Thank you!

From David.Daney@caviumnetworks.com Wed Mar  3 18:37:24 2010
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On 03/03/2010 03:05 AM, Maxim Uvarov wrote:
> Hello folks,
>
> Please find here MIPS crash and kdump patches.
> This is patch set of 3 patches:
> 1. generic MIPS changes (kernel);
> 2. MIPS Cavium Octeon board kexec/kdump code (kernel);
> 3. Kexec user space MIPS changes.
>
> Patches were tested on the latest linux-mips@ git kernel and the latest
> kexec-tools git on Cavium Octeon 50xx board.
>
> I also made the same code working on RMI XLR/XLS boards for both
> mips32 and mips64 kernels.
>
> Best regards,
> Maxim Uvarov.
>
>
> ---
>
>   arch/mips/Kconfig                  |   24 ++++++++++
[...]
>
>
> Signed-off-by: Maxim Uvarov<muvarov@gmail.com>
>

That Signed-off-by: needs to be just above the '---' not at the end.

David Daney

From David.Daney@caviumnetworks.com Wed Mar  3 18:56:47 2010
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        linux-mips@linux-mips.org
Subject: Re: [PATCH 1/3] MIPS: Octeon: Remove superfluous on_each_cpu parameter
References: <1267605801-5305-1-git-send-email-yang.shi@windriver.com> <fd8fb199609e60a5b6c10e2073976a3f6b599109.1267604875.git.yang.shi@windriver.com>
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On 03/03/2010 12:43 AM, Yang Shi wrote:
> Now, on_each_cpu just need three parameters, but the on_each_cpu
> still uses four parameters in Octeon's setup.c. So, remove the
> superfluous parameter.
>
> Signed-off-by: Yang Shi<yang.shi@windriver.com>


NAK!  We are removing CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB completely.

I will send the removal patch soon.

David Daney

> ---
>   arch/mips/cavium-octeon/setup.c |    2 +-
>   1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
> index b321d3b..4eaa35f 100644
> --- a/arch/mips/cavium-octeon/setup.c
> +++ b/arch/mips/cavium-octeon/setup.c
> @@ -230,7 +230,7 @@ static void octeon_hal_setup_per_cpu_reserved32(void *unused)
>   void octeon_hal_setup_reserved32(void)
>   {
>   #ifdef CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB
> -	on_each_cpu(octeon_hal_setup_per_cpu_reserved32, NULL, 0, 1);
> +	on_each_cpu(octeon_hal_setup_per_cpu_reserved32, NULL, 1);
>   #endif
>   }
>


From David.Daney@caviumnetworks.com Wed Mar  3 19:24:53 2010
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        linux-mips@linux-mips.org
Subject: Re: [PATCH 3/3] MIPS: Octeon: Add add_wired_entry decralation in
 header file
References: <1267605801-5305-1-git-send-email-yang.shi@windriver.com> <fd8fb199609e60a5b6c10e2073976a3f6b599109.1267604875.git.yang.shi@windriver.com> <50e36e8549769a26986f99a23772d23fd039c230.1267604875.git.yang.shi@windriver.com> <004eb64c73b3bcec90612663598ada4cf678f236.1267604875.git.yang.shi@windriver.com>
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On 03/03/2010 12:43 AM, Yang Shi wrote:
> Octeon's setup.c uses add_wired_entry, but it is not declared
> anywhere. Copy add_wired_entry decralation from pgtable-32.h to
> pgtable-64.h and include asm/pgtable.h into Octeon's setup.c.
>
> Signed-off-by: Yang Shi<yang.shi@windriver.com>

NAK!

We are removing the use of add_wired_entry(), so adding a declaration 
will not be necessary.

David Daney


> ---
>   arch/mips/cavium-octeon/setup.c    |    1 +
>   arch/mips/include/asm/pgtable-64.h |    6 ++++++
>   2 files changed, 7 insertions(+), 0 deletions(-)
>
> diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
> index 8309d68..d63b8e6 100644
> --- a/arch/mips/cavium-octeon/setup.c
> +++ b/arch/mips/cavium-octeon/setup.c
> @@ -30,6 +30,7 @@
>   #include<asm/bootinfo.h>
>   #include<asm/sections.h>
>   #include<asm/time.h>
> +#include<asm/pgtable.h>
>
>   #include<asm/octeon/octeon.h>
>
> diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h
> index 26dc69d..85ee34d 100644
> --- a/arch/mips/include/asm/pgtable-64.h
> +++ b/arch/mips/include/asm/pgtable-64.h
> @@ -23,6 +23,12 @@
>   #endif
>
>   /*
> + * - add_wired_entry() add a fixed TLB entry, and move wired register
> + */
> +extern void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
> +			       unsigned long entryhi, unsigned long pagemask);
> +
> +/*
>    * Each address space has 2 4K pages as its page directory, giving 1024
>    * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
>    * single 4K page, giving 512 (== PTRS_PER_PMD) 8 byte pointers to page


From David.Daney@caviumnetworks.com Wed Mar  3 19:25:52 2010
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Subject: Re: [PATCH 2/3] MIPS: Octeon: Remove redundant declaration of octeon_reserve32_memory
References: <1267605801-5305-1-git-send-email-yang.shi@windriver.com> <fd8fb199609e60a5b6c10e2073976a3f6b599109.1267604875.git.yang.shi@windriver.com> <50e36e8549769a26986f99a23772d23fd039c230.1267604875.git.yang.shi@windriver.com>
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On 03/03/2010 12:43 AM, Yang Shi wrote:
> In Octeon's setup.c, octeon_reserve32_memory is defined, so remove the
> redundant extern declaration of this variable.
>
> Signed-off-by: Yang Shi<yang.shi@windriver.com>

Acked-by: David Daney <ddaney@caviumnetworks.com>

This looks good to me.  Thanks,
David Daney

> ---
>   arch/mips/cavium-octeon/setup.c |    3 ---
>   1 files changed, 0 insertions(+), 3 deletions(-)
>
> diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
> index 4eaa35f..8309d68 100644
> --- a/arch/mips/cavium-octeon/setup.c
> +++ b/arch/mips/cavium-octeon/setup.c
> @@ -45,9 +45,6 @@ extern struct plat_smp_ops octeon_smp_ops;
>   extern void pci_console_init(const char *arg);
>   #endif
>
> -#ifdef CONFIG_CAVIUM_RESERVE32
> -extern uint64_t octeon_reserve32_memory;
> -#endif
>   static unsigned long long MAX_MEMORY = 512ull<<  20;
>
>   struct octeon_boot_descriptor *octeon_boot_desc_ptr;


From David.Daney@caviumnetworks.com Wed Mar  3 20:07:58 2010
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Subject: [PATCH] MIPS: Octeon: Remove vestiges of CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB
Date:   Wed,  3 Mar 2010 11:07:07 -0800
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The config option CAVIUM_RESERVE32_USE_WIRED_TLB is not supported.
Remove the dead code controlled by it.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---
 arch/mips/cavium-octeon/setup.c |   67 +--------------------------------------
 1 files changed, 1 insertions(+), 66 deletions(-)

diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index f58eed6..4ba3277 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -186,54 +186,6 @@ void octeon_check_cpu_bist(void)
 	write_octeon_c0_dcacheerr(0);
 }
 
-#ifdef CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB
-/**
- * Called on every core to setup the wired tlb entry needed
- * if CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB is set.
- *
- */
-static void octeon_hal_setup_per_cpu_reserved32(void *unused)
-{
-	/*
-	 * The config has selected to wire the reserve32 memory for all
-	 * userspace applications. We need to put a wired TLB entry in for each
-	 * 512MB of reserve32 memory. We only handle double 256MB pages here,
-	 * so reserve32 must be multiple of 512MB.
-	 */
-	uint32_t size = CONFIG_CAVIUM_RESERVE32;
-	uint32_t entrylo0 =
-		0x7 | ((octeon_reserve32_memory & ((1ul << 40) - 1)) >> 6);
-	uint32_t entrylo1 = entrylo0 + (256 << 14);
-	uint32_t entryhi = (0x80000000UL - (CONFIG_CAVIUM_RESERVE32 << 20));
-	while (size >= 512) {
-#if 0
-		pr_info("CPU%d: Adding double wired TLB entry for 0x%lx\n",
-			smp_processor_id(), entryhi);
-#endif
-		add_wired_entry(entrylo0, entrylo1, entryhi, PM_256M);
-		entrylo0 += 512 << 14;
-		entrylo1 += 512 << 14;
-		entryhi += 512 << 20;
-		size -= 512;
-	}
-}
-#endif /* CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB */
-
-/**
- * Called to release the named block which was used to made sure
- * that nobody used the memory for something else during
- * init. Now we'll free it so userspace apps can use this
- * memory region with bootmem_alloc.
- *
- * This function is called only once from prom_free_prom_memory().
- */
-void octeon_hal_setup_reserved32(void)
-{
-#ifdef CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB
-	on_each_cpu(octeon_hal_setup_per_cpu_reserved32, NULL, 0, 1);
-#endif
-}
-
 /**
  * Reboot Octeon
  *
@@ -502,25 +454,13 @@ void __init prom_init(void)
 	 * memory when it is getting memory from the
 	 * bootloader. Later, after the memory allocations are
 	 * complete, the reserve32 will be freed.
-	 */
-#ifdef CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB
-	if (CONFIG_CAVIUM_RESERVE32 & 0x1ff)
-		pr_err("CAVIUM_RESERVE32 isn't a multiple of 512MB. "
-		       "This is required if CAVIUM_RESERVE32_USE_WIRED_TLB "
-		       "is set\n");
-	else
-		addr = cvmx_bootmem_phy_named_block_alloc(CONFIG_CAVIUM_RESERVE32 << 20,
-							0, 0, 512 << 20,
-							"CAVIUM_RESERVE32", 0);
-#else
-	/*
+	 *
 	 * Allocate memory for RESERVED32 aligned on 2MB boundary. This
 	 * is in case we later use hugetlb entries with it.
 	 */
 	addr = cvmx_bootmem_phy_named_block_alloc(CONFIG_CAVIUM_RESERVE32 << 20,
 						0, 0, 2 << 20,
 						"CAVIUM_RESERVE32", 0);
-#endif
 	if (addr < 0)
 		pr_err("Failed to allocate CAVIUM_RESERVE32 memory area\n");
 	else
@@ -822,9 +762,4 @@ void prom_free_prom_memory(void)
 		panic("Unable to request_irq(OCTEON_IRQ_RML)\n");
 	}
 #endif
-
-	/* This call is here so that it is performed after any TLB
-	   initializations. It needs to be after these in case the
-	   CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB option is set */
-	octeon_hal_setup_reserved32();
 }
-- 
1.6.6.1


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Subject: [PATCH] MIPS: Octeon: Remove #if 0 code.
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Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---
 arch/mips/cavium-octeon/setup.c |   12 ------------
 1 files changed, 0 insertions(+), 12 deletions(-)

diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 4ba3277..a7f8c9d 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -246,18 +246,6 @@ static void octeon_halt(void)
 	octeon_kill_core(NULL);
 }
 
-#if 0
-/**
- * Platform time init specifics.
- * Returns
- */
-void __init plat_time_init(void)
-{
-	/* Nothing special here, but we are required to have one */
-}
-
-#endif
-
 /**
  * Handle all the error condition interrupts that might occur.
  *
-- 
1.6.6.1


From lists@nabble.com Wed Mar  3 20:20:23 2010
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From:   Dea_RU <dryukovz@mail.ru>
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I show this rtunk left 10 day....

and patch src 2.6.33 from dir root/trunk/target/linux/ar7/patches-2.6.32

to day i see :

florian: [ar7] add missing patch to arch/mips/kernel/traps.c to allow ar7 to
setup â€¦ :confused:
 
------------------
for 2.6.33 need this modify ?? or not ?

arch/mips/include/asm/page.h
---------
#define UNCAC_ADDR(addr)        ((addr) - PAGE_OFFSET + UNCAC_BASE +
PHYS_OFFSET) 
#define CAC_ADDR(addr)          ((addr) - UNCAC_BASE + PAGE_OFFSET -
PHYS_OFFSET) 
---------


----------------
my console not work correctly - baudrate no standart ?!  :( i change port
type 

---- i change port type in ar7platform.c to:

uart_port[0].type = PORT_16550A
to 
uart_port[0].type = PORT_AR7

boot process ttyS0 detected as AR7.

Console baudrate not work correct again ....&-(

======= log ================
............
alg: No test for stdrng (krng)
Serial: 8250/16550 driver, 1 ports, IRQ sharing disabled
serial8250: ttyS0 at MMIO 0x8610e00 (irq = 15) is a AR7
IdÃIdÃIdÃIdÃIdÃIdÃYdÃYdÃYdÃYdÃYdÃYdÃYdÃYdÃYdÃYdÃYdÃYd
......

==========================

if remart set_termios() in serial_core.c i see all messages ... 
-- 
View this message in context: http://old.nabble.com/TI-AR7-7200---no-boot-tp27766331p27772495.html
Sent from the linux-mips main mailing list archive at Nabble.com.


From f.fainelli@gmail.com Wed Mar  3 21:05:53 2010
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From:   Florian Fainelli <florian@openwrt.org>
Reply-To: Florian Fainelli <florian@openwrt.org>
To:     "Dea_RU" <dryukovz@mail.ru>
Subject: Re: TI AR7 7200 - no boot
Date:   Wed, 3 Mar 2010 21:05:29 +0100
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Hi,

Le mercredi 3 mars 2010 20:20:22, Dea_RU a =C3=A9crit :
> I show this rtunk left 10 day....
>=20
> and patch src 2.6.33 from dir root/trunk/target/linux/ar7/patches-2.6.32

Ok, then why do not you simply use OpenWrt trunk?

>=20
> to day i see :
>=20
> florian: [ar7] add missing patch to arch/mips/kernel/traps.c to allow ar7
>  to setup =E2=80=A6 :confused:
>=20
> ------------------
> for 2.6.33 need this modify ?? or not ?
>=20
> arch/mips/include/asm/page.h
> ---------
> #define UNCAC_ADDR(addr)        ((addr) - PAGE_OFFSET + UNCAC_BASE +
> PHYS_OFFSET)
> #define CAC_ADDR(addr)          ((addr) - UNCAC_BASE + PAGE_OFFSET -
> PHYS_OFFSET)
> ---------

This is not needed.

>=20
>=20
> ----------------
> my console not work correctly - baudrate no standart ?!  :( i change port
> type
>=20
> ---- i change port type in ar7platform.c to:
>=20
> uart_port[0].type =3D PORT_16550A
> to
> uart_port[0].type =3D PORT_AR7
>=20
> boot process ttyS0 detected as AR7.
>=20
> Console baudrate not work correct again ....&-(

You will also need this patch:=20
https://dev.openwrt.org/browser/trunk/target/linux/ar7/patches-2.6.32/500-
serial_kludge.patch


>=20
> =3D=3D=3D=3D=3D=3D=3D log =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
> ............
> alg: No test for stdrng (krng)
> Serial: 8250/16550 driver, 1 ports, IRQ sharing disabled
> serial8250: ttyS0 at MMIO 0x8610e00 (irq =3D 15) is a AR7
> Id=10=C3=81=05=16Id=10=C3=81=05=12Id=10=C3=81=05=12Id=10=C3=81=05=12Id=10=
=C3=81=05=12Id=10=C3=81=05=12Yd=10=C3=81=05=12Yd=10=C3=81=05=12Yd=10=C3=81=
=05=12Yd=10=C3=81=05=12Yd=10=C3=81=05=12Yd=10=C3=81=05=12Yd=10
> =C3=81=05=12Yd=10=C3=81=05=12Yd=10=C3=81=05=16Yd=10=C3=81=05=16Yd=10=C3=
=81=05=16Yd=10 ......
>=20
> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D
>=20
> if remart set_termios() in serial_core.c i see all messages ...
>=20
=2D-=20
Best regards, Florian Fainelli
Email: florian@openwrt.org
Web: http://openwrt.org
IRC: [florian] on irc.freenode.net
=2D------------------------------

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From Yang.Shi@windriver.com Thu Mar  4 03:08:51 2010
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        linux-mips@linux-mips.org
Subject: Re: [PATCH 1/3] MIPS: Octeon: Remove superfluous on_each_cpu parameter
References: <1267605801-5305-1-git-send-email-yang.shi@windriver.com> <fd8fb199609e60a5b6c10e2073976a3f6b599109.1267604875.git.yang.shi@windriver.com> <4B8EA1FD.5050007@caviumnetworks.com>
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David Daney å†™é“:
> On 03/03/2010 12:43 AM, Yang Shi wrote:
>   
>> Now, on_each_cpu just need three parameters, but the on_each_cpu
>> still uses four parameters in Octeon's setup.c. So, remove the
>> superfluous parameter.
>>
>> Signed-off-by: Yang Shi<yang.shi@windriver.com>
>>     
>
>
> NAK!  We are removing CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB completely.
>
> I will send the removal patch soon.
>   

Thanks David. Will apply your patch to remove WIRED_TLB.

Regards,
Yang

> David Daney
>
>   
>> ---
>>   arch/mips/cavium-octeon/setup.c |    2 +-
>>   1 files changed, 1 insertions(+), 1 deletions(-)
>>
>> diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
>> index b321d3b..4eaa35f 100644
>> --- a/arch/mips/cavium-octeon/setup.c
>> +++ b/arch/mips/cavium-octeon/setup.c
>> @@ -230,7 +230,7 @@ static void octeon_hal_setup_per_cpu_reserved32(void *unused)
>>   void octeon_hal_setup_reserved32(void)
>>   {
>>   #ifdef CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB
>> -	on_each_cpu(octeon_hal_setup_per_cpu_reserved32, NULL, 0, 1);
>> +	on_each_cpu(octeon_hal_setup_per_cpu_reserved32, NULL, 1);
>>   #endif
>>   }
>>
>>     
>
>
>   


From r0bertz@gentoo.org Thu Mar  4 04:44:21 2010
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Date:   Thu, 4 Mar 2010 03:44:09 +0000
From:   Zhang Le <r0bertz@gentoo.org>
To:     Wu Zhangjin <wuzhangjin@gmail.com>
Cc:     Ralf Baechle <ralf@linux-mips.org>,
        Dmitry Torokhov <dmitry.torokhov@gmail.com>,
        Pavel Machek <pavel@ucw.cz>, "Rafael J. Wysocki" <rjw@sisk.pl>,
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Subject: Re: [PATCH v11 0/9] Loongson: YeeLoong: add platform drivers
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On 20:20 Sun 31 Jan     , Wu Zhangjin wrote:
> On Sun, 2010-01-31 at 20:15 +0800, Wu Zhangjin wrote:
> > From: Wu Zhangjin <wuzhangjin@gmail.com>
> 
> (ooh, just re-generate the patchset with "git format-patch" but forgot
> to put the comments, here it is!)
> 
> This patchset adds several platform specific drivers for the YeeLoong
> netbook
> made by Lemote.
> 
> It is completely based on the v10 revision and with the following
> changes:
> 
>   O Rebased on the latest linux-queue git tree of Ralf.
>   O Split the EC revision related handling out of the "input/hotkey"
> driver.
>   O Rewrite the AC & Battery driver with the new power_supply interface
> as "Pavel Machek" suggested.
> 
> All of them have been tested again.
> 
> Best Regards,
> 	Wu Zhangjin
> 
> > 
> > Wu Zhangjin (9):
> >   MIPS: add subdirectory for platform extension drivers
> >   Loongson: YeeLoong: add platform driver
> >   Loongson: YeeLoong: add backlight driver
> >   Loongson: YeeLoong: add hardware monitoring driver
> >   Loongson: YeeLoong: add video output driver
> >   Loongson: YeeLoong: add suspend support
> >   Loongson: YeeLoong: add input/hotkey driver
> >   Loongson: YeeLoong: Co-operate with the revisions of EC
> >   Loongson: YeeLoong: add power_supply based battery driver
> > 
> >  arch/mips/include/asm/mach-loongson/ec_kb3310b.h |  188 ++++
> >  arch/mips/include/asm/mach-loongson/loongson.h   |    6 +
> >  arch/mips/loongson/common/cmdline.c              |    8 +
> >  arch/mips/loongson/lemote-2f/Makefile            |    2 +-
> >  arch/mips/loongson/lemote-2f/ec_kb3310b.c        |   12 +-
> >  arch/mips/loongson/lemote-2f/ec_kb3310b.h        |  188 ----
> >  arch/mips/loongson/lemote-2f/platform.c          |   39 +
> >  arch/mips/loongson/lemote-2f/pm.c                |    4 +-
> >  arch/mips/loongson/lemote-2f/reset.c             |    2 +-
> >  drivers/platform/Kconfig                         |    4 +
> >  drivers/platform/Makefile                        |    1 +
> >  drivers/platform/mips/Kconfig                    |   32 +
> >  drivers/platform/mips/Makefile                   |    5 +
> >  drivers/platform/mips/yeeloong_laptop.c          | 1192 ++++++++++++++++++++++
> >  14 files changed, 1483 insertions(+), 200 deletions(-)
> >  create mode 100644 arch/mips/include/asm/mach-loongson/ec_kb3310b.h
> >  delete mode 100644 arch/mips/loongson/lemote-2f/ec_kb3310b.h
> >  create mode 100644 arch/mips/loongson/lemote-2f/platform.c
> >  create mode 100644 drivers/platform/mips/Kconfig
> >  create mode 100644 drivers/platform/mips/Makefile
> >  create mode 100644 drivers/platform/mips/yeeloong_laptop.c
> > 

What's the status of these patches?

Ralf, any chance for 2.6.34?
Thanks!

Zhang, Le

From yang.shi@windriver.com Thu Mar  4 10:39:44 2010
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From:   Yang Shi <yang.shi@windriver.com>
To:     ralf@linux-mips.org
Cc:     linux-mips@linux-mips.org
Subject: [PATCH] MIPS: Protect current_cpu_data with preempt disable in delay()
Date:   Thu,  4 Mar 2010 17:39:33 +0800
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During machine restart with reboot command, get the following
bug info:

BUG: using smp_processor_id() in preemptible [00000000] code: reboot/1989
caller is __udelay+0x14/0x70
Call Trace:
[<ffffffff8110ad28>] dump_stack+0x8/0x34
[<ffffffff812dde04>] debug_smp_processor_id+0xf4/0x110
[<ffffffff812d90bc>] __udelay+0x14/0x70
[<ffffffff81378274>] md_notify_reboot+0x12c/0x148
[<ffffffff81161054>] notifier_call_chain+0x64/0xc8
[<ffffffff811614dc>] __blocking_notifier_call_chain+0x64/0xc0
[<ffffffff8115566c>] kernel_restart_prepare+0x1c/0x38
[<ffffffff811556cc>] kernel_restart+0x14/0x50
[<ffffffff8115581c>] SyS_reboot+0x10c/0x1f0
[<ffffffff81103684>] handle_sysn32+0x44/0x84

The root cause is that current_cpu_data is accessed in preemptible
context, so protect it with preempt_disable/preempt_enable pair
in delay().

Signed-off-by: Yang Shi <yang.shi@windriver.com>
---
 arch/mips/lib/delay.c |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/arch/mips/lib/delay.c b/arch/mips/lib/delay.c
index 6b3b1de..dc38064 100644
--- a/arch/mips/lib/delay.c
+++ b/arch/mips/lib/delay.c
@@ -41,7 +41,11 @@ EXPORT_SYMBOL(__delay);
 
 void __udelay(unsigned long us)
 {
-	unsigned int lpj = current_cpu_data.udelay_val;
+	unsigned int lpj;
+
+	preempt_disable();
+	lpj = current_cpu_data.udelay_val;
+	preempt_enable();
 
 	__delay((us * 0x000010c7ull * HZ * lpj) >> 32);
 }
-- 
1.6.3.3


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         <4B8E9E0C.4050809@caviumnetworks.com>
Date:   Thu, 4 Mar 2010 14:35:37 +0300
Message-ID: <572af9171003040335w16434350y60a9f39676dbfa3d@mail.gmail.com>
Subject: Re: [PATCH 1/2] MIPS kexec,kdump support
From:   Maxim Uvarov <muvarov@gmail.com>
To:     David Daney <ddaney@caviumnetworks.com>
Cc:     linux-mips@linux-mips.org, kexec@lists.infradead.org,
        horms@verge.net.au, ralf@linux-mips.org
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2010/3/3 David Daney <ddaney@caviumnetworks.com>:
> On 03/03/2010 03:05 AM, Maxim Uvarov wrote:
>>
>> Hello folks,
>>
>> Please find here MIPS crash and kdump patches.
>> This is patch set of 3 patches:
>> 1. generic MIPS changes (kernel);
>> 2. MIPS Cavium Octeon board kexec/kdump code (kernel);
>> 3. Kexec user space MIPS changes.
>>
>> Patches were tested on the latest linux-mips@ git kernel and the latest
>> kexec-tools git on Cavium Octeon 50xx board.
>>
>> I also made the same code working on RMI XLR/XLS boards for both
>> mips32 and mips64 kernels.
>>
>> Best regards,
>> Maxim Uvarov.
>>
>>
>> ---
>>
>>  arch/mips/Kconfig                  |   24 ++++++++++
>
> [...]
>>
>>
>> Signed-off-by: Maxim Uvarov<muvarov@gmail.com>
>>
>
> That Signed-off-by: needs to be just above the '---' not at the end.
>
> David Daney
>
Thanks David, I corrected stgit email template. I think I don't need
resend patches with only this change.


-- 
Best regards,
Maxim Uvarov

From muvarov@gmail.com Thu Mar  4 12:58:42 2010
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Subject: Re: [PATCH 1/2] MIPS kexec,kdump support
From:   Maxim Uvarov <muvarov@gmail.com>
To:     "wilbur.chan" <wilbur512@gmail.com>
Cc:     linux-mips@linux-mips.org, kexec@lists.infradead.org,
        horms@verge.net.au, ralf@linux-mips.org
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2010/3/3 wilbur.chan <wilbur512@gmail.com>:
> 2010/3/3 Maxim Uvarov <muvarov@gmail.com>:
>> Hello folks,
>>
>> Please find here MIPS crash and kdump patches.
>> This is patch set of 3 patches:
>> 1. generic MIPS changes (kernel);
>> 2. MIPS Cavium Octeon board kexec/kdump code (kernel);
>> 3. Kexec user space MIPS changes.
>>
>> Patches were tested on the latest linux-mips@ git kernel and the latest
>> kexec-tools git on Cavium Octeon 50xx board.
>>
>> I also made the same code working on RMI XLR/XLS boards for both
>> mips32 and mips64 kernels.
>>
>> Best regards,
>> Maxim Uvarov.
>>
>
>> Signed-off-by: Maxim Uvarov <muvarov@gmail.com>
>>
>>
>>
>
> Hi, Maxim
>
> In XLR series ,
>
> 1)How to protect  boardinfo and pass it to second kernel ?
>
It is very simple. I just looked at physical addresses  where
boardinfo is and protect this
region.  For xls simple add additional exclude region to setup.c
static struct boot_mem_map_exclude_region static_exclude_regions[] = {
+	[1] = {0xc000000, 0xd000000 }, /*Bootloader stuctures*/

To pass it to second kernel copy pointer to original psb_info to
static variable in beginning of prom_init() and provide this pointer
as kexec_args[3].

kexec_args[0]  is argc on XLS
kexec_args[1] is argv on XLS

> 2)If all cpus jumped to same entry point , did you change head.s, if so , how ?
>
Please take a look how other platforms do this. You need write .macro
kernel_entry_setup which should be located in somewhere is
include/asm-mips/mach-rmi. Then you write this macro it will be
executed before kernel_entry. So after kexec all cpus jump to this
entry point and after they you can do all things what you want:
- make cpu0 boot new kernel and other cpus go to boot slaves procedure;
- take first cpu and make it boot, and all others go to boot slaves procedure;
- boot only cpu0 and infinite loop others  cpus (you might want to do
this for kdump)
>
>
> Thank you!
>

-- 
Best regards,
Maxim Uvarov

From David.Daney@caviumnetworks.com Thu Mar  4 19:24:52 2010
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Subject: Re: [PATCH] MIPS: Protect current_cpu_data with preempt disable in
 delay()
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On 03/04/2010 01:39 AM, Yang Shi wrote:
> During machine restart with reboot command, get the following
> bug info:
>
> BUG: using smp_processor_id() in preemptible [00000000] code: reboot/1989
> caller is __udelay+0x14/0x70
> Call Trace:
> [<ffffffff8110ad28>] dump_stack+0x8/0x34
> [<ffffffff812dde04>] debug_smp_processor_id+0xf4/0x110
> [<ffffffff812d90bc>] __udelay+0x14/0x70
> [<ffffffff81378274>] md_notify_reboot+0x12c/0x148
> [<ffffffff81161054>] notifier_call_chain+0x64/0xc8
> [<ffffffff811614dc>] __blocking_notifier_call_chain+0x64/0xc0
> [<ffffffff8115566c>] kernel_restart_prepare+0x1c/0x38
> [<ffffffff811556cc>] kernel_restart+0x14/0x50
> [<ffffffff8115581c>] SyS_reboot+0x10c/0x1f0
> [<ffffffff81103684>] handle_sysn32+0x44/0x84
>
> The root cause is that current_cpu_data is accessed in preemptible
> context, so protect it with preempt_disable/preempt_enable pair
> in delay().
>
> Signed-off-by: Yang Shi<yang.shi@windriver.com>
> ---
>   arch/mips/lib/delay.c |    6 +++++-
>   1 files changed, 5 insertions(+), 1 deletions(-)
>
> diff --git a/arch/mips/lib/delay.c b/arch/mips/lib/delay.c
> index 6b3b1de..dc38064 100644
> --- a/arch/mips/lib/delay.c
> +++ b/arch/mips/lib/delay.c
> @@ -41,7 +41,11 @@ EXPORT_SYMBOL(__delay);
>
>   void __udelay(unsigned long us)
>   {
> -	unsigned int lpj = current_cpu_data.udelay_val;
> +	unsigned int lpj;
> +
> +	preempt_disable();
> +	lpj = current_cpu_data.udelay_val;
> +	preempt_enable();
>
>   	__delay((us * 0x000010c7ull * HZ * lpj)>>  32);
>   }

This doesn't seem like the best approach.

Perhaps we should either use raw_current_cpu_data and no 
preempt_disable(), or if we are concerned about migrating to a CPU with 
a different lpj value, move the preempt_enable after the call to __delay().

David Daney

From Yang.Shi@windriver.com Fri Mar  5 02:10:34 2010
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David Daney å†™é“:
> On 03/04/2010 01:39 AM, Yang Shi wrote:
>   
>> During machine restart with reboot command, get the following
>> bug info:
>>
>> BUG: using smp_processor_id() in preemptible [00000000] code: reboot/1989
>> caller is __udelay+0x14/0x70
>> Call Trace:
>> [<ffffffff8110ad28>] dump_stack+0x8/0x34
>> [<ffffffff812dde04>] debug_smp_processor_id+0xf4/0x110
>> [<ffffffff812d90bc>] __udelay+0x14/0x70
>> [<ffffffff81378274>] md_notify_reboot+0x12c/0x148
>> [<ffffffff81161054>] notifier_call_chain+0x64/0xc8
>> [<ffffffff811614dc>] __blocking_notifier_call_chain+0x64/0xc0
>> [<ffffffff8115566c>] kernel_restart_prepare+0x1c/0x38
>> [<ffffffff811556cc>] kernel_restart+0x14/0x50
>> [<ffffffff8115581c>] SyS_reboot+0x10c/0x1f0
>> [<ffffffff81103684>] handle_sysn32+0x44/0x84
>>
>> The root cause is that current_cpu_data is accessed in preemptible
>> context, so protect it with preempt_disable/preempt_enable pair
>> in delay().
>>
>> Signed-off-by: Yang Shi<yang.shi@windriver.com>
>> ---
>>   arch/mips/lib/delay.c |    6 +++++-
>>   1 files changed, 5 insertions(+), 1 deletions(-)
>>
>> diff --git a/arch/mips/lib/delay.c b/arch/mips/lib/delay.c
>> index 6b3b1de..dc38064 100644
>> --- a/arch/mips/lib/delay.c
>> +++ b/arch/mips/lib/delay.c
>> @@ -41,7 +41,11 @@ EXPORT_SYMBOL(__delay);
>>
>>   void __udelay(unsigned long us)
>>   {
>> -	unsigned int lpj = current_cpu_data.udelay_val;
>> +	unsigned int lpj;
>> +
>> +	preempt_disable();
>> +	lpj = current_cpu_data.udelay_val;
>> +	preempt_enable();
>>
>>   	__delay((us * 0x000010c7ull * HZ * lpj)>>  32);
>>   }
>>     
>
> This doesn't seem like the best approach.
>
> Perhaps we should either use raw_current_cpu_data and no 
> preempt_disable(), or if we are concerned about migrating to a CPU with 
> a different lpj value, move the preempt_enable after the call to __delay().
>   

Thanks David.

Yes, actually I also has this concern, so this patch is just a rough 
fix. And I tried raw_current_cpu_data as well, but I'm not sure if it's 
safe or not. Another proposal is to change cpu_data and current_cpu_data 
to per CPU variables, of course this is a big change.

Regards,
Yang

> David Daney
>
>   


From yang.shi@windriver.com Fri Mar  5 08:09:00 2010
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Subject: [PATCH] MIPS: Octeon: Register EEPROM device on the I2C bus
Date:   Fri,  5 Mar 2010 15:08:15 +0800
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An EEPROM resides on 0x50 of I2C bus on CN56xx/57xx board,
register this device.

Signed-off-by: Yang Shi <yang.shi@windriver.com>
---
 arch/mips/cavium-octeon/octeon-platform.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c
index 62ac30e..5bfa513 100644
--- a/arch/mips/cavium-octeon/octeon-platform.c
+++ b/arch/mips/cavium-octeon/octeon-platform.c
@@ -164,6 +164,9 @@ static struct i2c_board_info __initdata octeon_i2c_devices[] = {
 	{
 		I2C_BOARD_INFO("ds1337", 0x68),
 	},
+	{
+		I2C_BOARD_INFO("eeprom", 0x50),
+	},
 };
 
 static int __init octeon_i2c_devices_init(void)
-- 
1.6.3.3


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> +	{
> +		I2C_BOARD_INFO("eeprom", 0x50),
> +	},

Is the use of 'eeprom' instead of 'at24' intentional?

Regards

--=20
Pengutronix e.K.                           | Wolfram Sang                |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

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From Yang.Shi@windriver.com Fri Mar  5 08:31:42 2010
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        ralf@linux-mips.org, linux-mips@linux-mips.org,
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Subject: Re: [PATCH] MIPS: Octeon: Register EEPROM device on the I2C bus
References: <1267772895-25409-1-git-send-email-yang.shi@windriver.com> <20100305071130.GB21925@pengutronix.de>
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Wolfram Sang Ð´µÀ:
>> +	{
>> +		I2C_BOARD_INFO("eeprom", 0x50),
>> +	},
>>     
>
> Is the use of 'eeprom' instead of 'at24' intentional?
>   

Unfortunately, at24 driver can't work on this board, I must use legacy
eeprom.

My config:

#CONFIG_EEPROM_AT24 is not set
CONFIG_EEPROM_LEGACY=y

Regards,
Yang

> Regards
>
>   


From wsa@pengutronix.de Fri Mar  5 08:42:14 2010
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Subject: Re: [PATCH] MIPS: Octeon: Register EEPROM device on the I2C bus
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> > Is the use of 'eeprom' instead of 'at24' intentional?
> >  =20
>=20
> Unfortunately, at24 driver can't work on this board, I must use legacy
> eeprom.

Well, you are of course free to choose here :)

I'd just be interested if there is a software limitation which prevents you=
 from
using AT24. Because, it _should_ work with all kind of eeproms the legacy d=
river
deals with. Otherwise it is probably a bug which needs to be fixed.

Regards,

   Wolfram

--=20
Pengutronix e.K.                           | Wolfram Sang                |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

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From Yang.Shi@windriver.com Fri Mar  5 08:54:14 2010
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Subject: Re: [PATCH] MIPS: Octeon: Register EEPROM device on the I2C bus
References: <1267772895-25409-1-git-send-email-yang.shi@windriver.com> <20100305071130.GB21925@pengutronix.de> <4B90B341.9000601@windriver.com> <20100305074155.GD21925@pengutronix.de>
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Wolfram Sang Ð´µÀ:
>>> Is the use of 'eeprom' instead of 'at24' intentional?
>>>   
>>>       
>> Unfortunately, at24 driver can't work on this board, I must use legacy
>> eeprom.
>>     
>
> Well, you are of course free to choose here :)
>
> I'd just be interested if there is a software limitation which prevents you from
> using AT24. Because, it _should_ work with all kind of eeproms the legacy driver
> deals with. Otherwise it is probably a bug which needs to be fixed.
>   

Thanks to point out this. Let me take a look at this.

Regards,
Yang

> Regards,
>
>    Wolfram
>
>   


From khali@linux-fr.org Fri Mar  5 09:50:43 2010
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From:   Jean Delvare <khali@linux-fr.org>
To:     Yang Shi <yang.shi@windriver.com>
Cc:     Wolfram Sang <w.sang@pengutronix.de>, ddaney@caviumnetworks.com,
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Subject: Re: [PATCH] MIPS: Octeon: Register EEPROM device on the I2C bus
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Hi Yang, Wolfram,

On Fri, 05 Mar 2010 15:53:44 +0800, Yang Shi wrote:
> Wolfram Sang å†™é“:
> >>> Is the use of 'eeprom' instead of 'at24' intentional?
> >>>   
> >>>       
> >> Unfortunately, at24 driver can't work on this board, I must use legacy
> >> eeprom.
> >>     
> >
> > Well, you are of course free to choose here :)
> >
> > I'd just be interested if there is a software limitation which prevents you from
> > using AT24. Because, it _should_ work with all kind of eeproms the legacy driver
> > deals with. Otherwise it is probably a bug which needs to be fixed.
> >   
> 
> Thanks to point out this. Let me take a look at this.

One limitation of the at24 driver is that it needs the underlying
controller to support either raw I2C access or at least I2C block
transactions. Konstantin Lazarev complained about that one month ago
already.

I am currently working on improving the at24 driver so that it falls
back to byte transactions when block transactions are not available. I
might also add word transaction support (as the eeprom driver has) as
it is often the best performance/compatibility trade-off. I'll post the
patch when I'm done.

I'm not yet sure what will happen to the legacy eeprom driver in the
long run, but I would prefer new designs to not rely on it.

-- 
Jean Delvare

From ml.lawnick@gmx.de Fri Mar  5 11:09:45 2010
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CC:     Yang Shi <yang.shi@windriver.com>,
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        Konstantin Lazarev <klazarev@sbcglobal.net>
Subject: Re: [PATCH] MIPS: Octeon: Register EEPROM device on the I2C bus
References: <1267772895-25409-1-git-send-email-yang.shi@windriver.com>  <20100305071130.GB21925@pengutronix.de> <4B90B341.9000601@windriver.com>        <20100305074155.GD21925@pengutronix.de> <4B90B888.6060005@windriver.com> <20100305095040.6ab4612c@hyperion.delvare>
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Jean Delvare said the following:
> Hi Yang, Wolfram,
> 
> On Fri, 05 Mar 2010 15:53:44 +0800, Yang Shi wrote:
>> Wolfram Sang å†™é“:
>> >>> Is the use of 'eeprom' instead of 'at24' intentional?
>> >>>   
>> >>>       
>> >> Unfortunately, at24 driver can't work on this board, I must use legacy
>> >> eeprom.
>> >>     
>> >
>> > Well, you are of course free to choose here :)
>> >
>> > I'd just be interested if there is a software limitation which prevents you from
>> > using AT24. Because, it _should_ work with all kind of eeproms the legacy driver
>> > deals with. Otherwise it is probably a bug which needs to be fixed.
>> >   
>> 
>> Thanks to point out this. Let me take a look at this.
> 
> One limitation of the at24 driver is that it needs the underlying
> controller to support either raw I2C access or at least I2C block
> transactions. Konstantin Lazarev complained about that one month ago
> already.
> 
> I am currently working on improving the at24 driver so that it falls
> back to byte transactions when block transactions are not available. I
> might also add word transaction support (as the eeprom driver has) as
> it is often the best performance/compatibility trade-off. I'll post the
> patch when I'm done.
> 
> I'm not yet sure what will happen to the legacy eeprom driver in the
> long run, but I would prefer new designs to not rely on it.
> 

If I don't get all wrong, my 2 Cents:
i2c-octeon will/should be based on raw i2c from kernel version .34 on.
(my patch :-) ) So it should support all transfer modes that i2c can.
Currently it is limited to 8 bytes per transaction.

If I misunderstood something, please ignore the noise.

-- 
KR
Michael

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Subject: Re: [PATCH] MIPS: Octeon: Register EEPROM device on the I2C bus
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Hi guys,

Thanks for you guys kind advice. I think I find the cause. I coded a 
wrong eeprom type, "at24" can't work here, it should be "24c64". It 
works with AT24 eeprom driver, but I'm not sure if this is the right type.

So, a possible correct to the patch is that:

+{
+    I2C_BOARD_INFO("24c64",Â·0x50),
+},

Regards,
Yang

Michael Lawnick å†™é“:
> Jean Delvare said the following:
>   
>> Hi Yang, Wolfram,
>>
>> On Fri, 05 Mar 2010 15:53:44 +0800, Yang Shi wrote:
>>     
>>> Wolfram Sang å†™é“:
>>>       
>>>>>> Is the use of 'eeprom' instead of 'at24' intentional?
>>>>>>   
>>>>>>       
>>>>>>             
>>>>> Unfortunately, at24 driver can't work on this board, I must use legacy
>>>>> eeprom.
>>>>>     
>>>>>           
>>>> Well, you are of course free to choose here :)
>>>>
>>>> I'd just be interested if there is a software limitation which prevents you from
>>>> using AT24. Because, it _should_ work with all kind of eeproms the legacy driver
>>>> deals with. Otherwise it is probably a bug which needs to be fixed.
>>>>   
>>>>         
>>> Thanks to point out this. Let me take a look at this.
>>>       
>> One limitation of the at24 driver is that it needs the underlying
>> controller to support either raw I2C access or at least I2C block
>> transactions. Konstantin Lazarev complained about that one month ago
>> already.
>>
>> I am currently working on improving the at24 driver so that it falls
>> back to byte transactions when block transactions are not available. I
>> might also add word transaction support (as the eeprom driver has) as
>> it is often the best performance/compatibility trade-off. I'll post the
>> patch when I'm done.
>>
>> I'm not yet sure what will happen to the legacy eeprom driver in the
>> long run, but I would prefer new designs to not rely on it.
>>
>>     
>
> If I don't get all wrong, my 2 Cents:
> i2c-octeon will/should be based on raw i2c from kernel version .34 on.
> (my patch :-) ) So it should support all transfer modes that i2c can.
> Currently it is limited to 8 bytes per transaction.
>
> If I misunderstood something, please ignore the noise.
>
>   


From khali@linux-fr.org Fri Mar  5 11:52:15 2010
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Date:   Fri, 5 Mar 2010 11:52:13 +0100
From:   Jean Delvare <khali@linux-fr.org>
To:     Yang Shi <yang.shi@windriver.com>
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Subject: Re: [PATCH] MIPS: Octeon: Register EEPROM device on the I2C bus
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On Fri, 05 Mar 2010 18:39:04 +0800, Yang Shi wrote:
> Hi guys,
> 
> Thanks for you guys kind advice. I think I find the cause. I coded a 
> wrong eeprom type, "at24" can't work here, it should be "24c64". It 
> works with AT24 eeprom driver, but I'm not sure if this is the right type.

Actually, "at24" can work but you have to provide extra parameters
detailing the size, page size etc. of the EEPROM. All the "24cXX" names
are shortcuts with predefined sizes.

> 
> So, a possible correct to the patch is that:
> 
> +{
> +    I2C_BOARD_INFO("24c64",Â·0x50),
> +},

Well, what EEPROM type do you have exactly? 24c64 is for 64 kbit (8
kByte) EEPROMs using 16-bit addressing. You must use the correct type,
otherwise the at24 driver will misbehave. I am a little surprised
because originally you went for "eeprom" which is not compatible with
"24c64" (8-bit vs. 16-bit addressing).

Also note that you may want to provide specific page size if you have
tight control over what hardware is used and you intend to write to the
EEPROM on a regular basis. The driver defaults to safe but slow
settings.

OTOH, if you do _not_ want to write to the EEPROM, you want to provide
the AT24_FLAG_READONLY flag.

-- 
Jean Delvare

From p2@psychaos.be Fri Mar  5 15:11:15 2010
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Date:   Fri, 5 Mar 2010 16:11:14 +0200
From:   Peter 'p2' De Schrijver <p2@debian.org>
To:     linux-mips@linux-mips.org
Subject: linux 2.6.33 on movidis x16
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Hi,

We are trying to get linux 2.6.33 to work on the movidis x16 board. Main thing
missing is the addresses of the PHYs. Does anyone know those ?
Unfortunately I don't have physical access to the board so I can't just look
for the PHY components being used.

Thanks,

Peter.

From mchehab@linuxtv.org Sat Mar  6 15:26:15 2010
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Subject: [git:v4l-dvb/master] MIPS: Fixup of the r4k timer
From:   Patch from Wu Zhangjin <linuxtv-commits-bounces@linuxtv.org>
To:     linuxtv-commits@linuxtv.org
Data:   Mon, 1 Feb 2010 17:10:55 +0800
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        Shane McDonald <mcdonald.shane@gmail.com>, mbizon@freebox.fr,
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From: Wu Zhangjin <wuzhangjin@gmail.com>

As reported by Maxime Bizon, the commit "MIPS: PowerTV: Fix support for
timer interrupts with > 64 external IRQs" have broken the r4k timer
since it didn't initialize the cp0_compare_irq_shift variable used in
c0_compare_int_pending() on the architectures whose cpu_has_mips_r2 is
false.

This patch fixes it via initializing the cp0_compare_irq_shift as the
cp0_compare_irq used in the old c0_compare_int_pending().

Reported-by: Maxime Bizon <mbizon@freebox.fr>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: David VomLehn <dvomlehn@cisco.com>
Cc: mbizon@freebox.fr
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/922/
Tested-by: Shane McDonald <mcdonald.shane@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 arch/mips/kernel/traps.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

---

http://git.linuxtv.org/v4l-dvb.git?a=commitdiff;h=f4fc580bec5fb76560329c8c537b9b71d8d032b6

diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 338dfe8..31b204b 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1501,6 +1501,7 @@ void __cpuinit per_cpu_trap_init(void)
 			cp0_perfcount_irq = -1;
 	} else {
 		cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
+		cp0_compare_irq_shift = cp0_compare_irq;
 		cp0_perfcount_irq = -1;
 	}
 

From mchehab@linuxtv.org Sat Mar  6 15:28:04 2010
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Subject: [git:v4l-dvb/master] MIPS: Add support of LZO-compressed kernels
From:   Patch from Wu Zhangjin <linuxtv-commits-bounces@linuxtv.org>
To:     linuxtv-commits@linuxtv.org
Data:   Fri, 15 Jan 2010 20:34:46 +0800
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From: Wu Zhangjin <wuzhangjin@gmail.com>

The necessary changes to the x86 Kconfig and boot/compressed to allow the
use of this new compression method.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Patchwork: http://patchwork.linux-mips.org/patch/857/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 arch/mips/Kconfig                      |    1 +
 arch/mips/boot/compressed/Makefile     |    2 ++
 arch/mips/boot/compressed/decompress.c |    4 ++++
 3 files changed, 7 insertions(+), 0 deletions(-)

---

http://git.linuxtv.org/v4l-dvb.git?a=commitdiff;h=fe1d45e08650213ec83a72d3499c3dd703243792

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 9541171..8b5d174 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1311,6 +1311,7 @@ config SYS_SUPPORTS_ZBOOT
 	select HAVE_KERNEL_GZIP
 	select HAVE_KERNEL_BZIP2
 	select HAVE_KERNEL_LZMA
+	select HAVE_KERNEL_LZO
 
 config SYS_SUPPORTS_ZBOOT_UART16550
 	bool
diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile
index 671d344..bdcfd49 100644
--- a/arch/mips/boot/compressed/Makefile
+++ b/arch/mips/boot/compressed/Makefile
@@ -41,9 +41,11 @@ $(obj)/vmlinux.bin: $(KBUILD_IMAGE)
 suffix_$(CONFIG_KERNEL_GZIP)  = gz
 suffix_$(CONFIG_KERNEL_BZIP2) = bz2
 suffix_$(CONFIG_KERNEL_LZMA)  = lzma
+suffix_$(CONFIG_KERNEL_LZO)   = lzo
 tool_$(CONFIG_KERNEL_GZIP)    = gzip
 tool_$(CONFIG_KERNEL_BZIP2)   = bzip2
 tool_$(CONFIG_KERNEL_LZMA)    = lzma
+tool_$(CONFIG_KERNEL_LZO)     = lzo
 $(obj)/vmlinux.$(suffix_y): $(obj)/vmlinux.bin
 	$(call if_changed,$(tool_y))
 
diff --git a/arch/mips/boot/compressed/decompress.c b/arch/mips/boot/compressed/decompress.c
index e48fd72..55d02b3 100644
--- a/arch/mips/boot/compressed/decompress.c
+++ b/arch/mips/boot/compressed/decompress.c
@@ -77,6 +77,10 @@ void *memset(void *s, int c, size_t n)
 #include "../../../../lib/decompress_unlzma.c"
 #endif
 
+#ifdef CONFIG_KERNEL_LZO
+#include "../../../../lib/decompress_unlzo.c"
+#endif
+
 void decompress_kernel(unsigned long boot_heap_start)
 {
 	int zimage_size;

From mchehab@linuxtv.org Sat Mar  6 15:35:55 2010
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Subject: [git:v4l-dvb/master] MIPS: Highmem: Fix build error
From:   Patch from Yoichi Yuasa <linuxtv-commits-bounces@linuxtv.org>
To:     linuxtv-commits@linuxtv.org
Data:   Sat, 20 Feb 2010 21:23:22 +0900
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From: Yoichi Yuasa <yuasa@linux-mips.org>

arch/mips/mm/highmem.c: In function 'kmap_init':
arch/mips/mm/highmem.c:130: error: 'init_mm' undeclared (first use in this function)
arch/mips/mm/highmem.c:130: error: (Each undeclared identifier is reported only once
arch/mips/mm/highmem.c:130: error: for each function it appears in.)

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/980/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 arch/mips/mm/highmem.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

---

http://git.linuxtv.org/v4l-dvb.git?a=commitdiff;h=52ab320ac560af3333191a473e56615fb48fff95

diff --git a/arch/mips/mm/highmem.c b/arch/mips/mm/highmem.c
index e274fda..127d732 100644
--- a/arch/mips/mm/highmem.c
+++ b/arch/mips/mm/highmem.c
@@ -1,5 +1,6 @@
 #include <linux/module.h>
 #include <linux/highmem.h>
+#include <linux/sched.h>
 #include <linux/smp.h>
 #include <asm/fixmap.h>
 #include <asm/tlbflush.h>

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Subject: [git:v4l-dvb/master] MIPS: BCM47xx: Fix 128MB RAM support
From:   Patch from Hauke Mehrtens <linuxtv-commits-bounces@linuxtv.org>
To:     linuxtv-commits@linuxtv.org
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From: Hauke Mehrtens <hauke@hauke-m.de>

Ignoring the last page when ddr size is 128M. Cached accesses to last page
is causing the processor to prefetch using address above 128M stepping out
of the DDR address space.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/981/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 arch/mips/bcm47xx/prom.c |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

---

http://git.linuxtv.org/v4l-dvb.git?a=commitdiff;h=84a6fcb368a080620d12fc4d79e07902dbee7335

diff --git a/arch/mips/bcm47xx/prom.c b/arch/mips/bcm47xx/prom.c
index c51405e..29d3cbf 100644
--- a/arch/mips/bcm47xx/prom.c
+++ b/arch/mips/bcm47xx/prom.c
@@ -141,6 +141,14 @@ static __init void prom_init_mem(void)
 			break;
 	}
 
+	/* Ignoring the last page when ddr size is 128M. Cached
+	 * accesses to last page is causing the processor to prefetch
+	 * using address above 128M stepping out of the ddr address
+	 * space.
+	 */
+	if (mem == 0x8000000)
+		mem -= 0x1000;
+
 	add_memory_region(0, mem, BOOT_MEM_RAM);
 }
 

From Yang.Shi@windriver.com Mon Mar  8 05:44:09 2010
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        Linux I2C <linux-i2c@vger.kernel.org>,
        linux-mips@linux-mips.org
Subject: Re: [PATCH] MIPS: Octeon: Register EEPROM device on the I2C bus
References: <1267772895-25409-1-git-send-email-yang.shi@windriver.com>  <20100305071130.GB21925@pengutronix.de> <4B90B341.9000601@windriver.com>        <20100305074155.GD21925@pengutronix.de> <4B90B888.6060005@windriver.com>        <20100305095040.6ab4612c@hyperion.delvare>      <4B90D85E.6040308@gmx.de>       <4B90DF48.50005@windriver.com>  <20100305115213.4b504710@hyperion.delvare>      <4B90E83A.5020106@gmx.de> <20100305124200.6f6eccfc@hyperion.delvare>
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Jean Delvare å†™é“:
> Hi Michael,
>
> On Fri, 05 Mar 2010 12:17:14 +0100, Michael Lawnick wrote:
>   
>> Jean Delvare said the following:
>>     
>>> Well, what EEPROM type do you have exactly? 24c64 is for 64 kbit (8
>>> kByte) EEPROMs using 16-bit addressing. You must use the correct type,
>>> otherwise the at24 driver will misbehave. I am a little surprised
>>> because originally you went for "eeprom" which is not compatible with
>>> "24c64" (8-bit vs. 16-bit addressing).
>>>       
>> Furthermore this brings up another issue:
>> 0x50 typically is SPD-eeprom (DDR initialisation). Corrupting the
>> contents might make your board unbootable - and using a 16bit driver
>> instead of an 8-bit one can corrupt your contents already on
>> (positioned) reading!
>>     
>
> This is totally correct, but better said loud to the list and the
> original poster than only privately to me ;)
>   

Thanks a lot to point out this.

I double checked the manual, the eeprom is SPD of the DIMMs.

I will rework my patch, then send V2 soon.

Regards,
Yang



From yang.shi@windriver.com Mon Mar  8 06:30:28 2010
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Subject: [PATCH V2] MIPS: Octeon: Register EEPROM device on the I2C bus
Date:   Mon,  8 Mar 2010 13:29:50 +0800
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An SPD resides on 0x50 of the I2C bus on CN56xx/57xx board,
register this device.

Signed-off-by: Yang Shi <yang.shi@windriver.com>
---
 arch/mips/cavium-octeon/octeon-platform.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c
index 62ac30e..3138982 100644
--- a/arch/mips/cavium-octeon/octeon-platform.c
+++ b/arch/mips/cavium-octeon/octeon-platform.c
@@ -164,6 +164,9 @@ static struct i2c_board_info __initdata octeon_i2c_devices[] = {
 	{
 		I2C_BOARD_INFO("ds1337", 0x68),
 	},
+	{
+		I2C_BOARD_INFO("spd", 0x50),
+	},
 };
 
 static int __init octeon_i2c_devices_init(void)
-- 
1.6.3.3


From wsa@pengutronix.de Mon Mar  8 07:02:24 2010
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Subject: Re: [PATCH V2] MIPS: Octeon: Register EEPROM device on the I2C bus
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On Mon, Mar 08, 2010 at 01:29:50PM +0800, Yang Shi wrote:
> An SPD resides on 0x50 of the I2C bus on CN56xx/57xx board,
> register this device.
>=20
> Signed-off-by: Yang Shi <yang.shi@windriver.com>

Glad it worked with at24, after all.

Acked-by: Wolfram Sang <w.sang@pengutronix.de>

--=20
Pengutronix e.K.                           | Wolfram Sang                |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

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From Yang.Shi@windriver.com Mon Mar  8 10:42:48 2010
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        linux-mips@linux-mips.org
Subject: Re: [PATCH] MIPS: Protect current_cpu_data with preempt disable in
 delay()
References: <1267695573-27360-1-git-send-email-yang.shi@windriver.com> <4B8FFAB3.1090409@caviumnetworks.com> <4B9059FE.3090801@windriver.com>
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Hi folks,

Any advice on this topic?

Thanks,
Yang

Yang Shi å†™é“:
> David Daney å†™é“:
>   
>> On 03/04/2010 01:39 AM, Yang Shi wrote:
>>   
>>     
>>> During machine restart with reboot command, get the following
>>> bug info:
>>>
>>> BUG: using smp_processor_id() in preemptible [00000000] code: reboot/1989
>>> caller is __udelay+0x14/0x70
>>> Call Trace:
>>> [<ffffffff8110ad28>] dump_stack+0x8/0x34
>>> [<ffffffff812dde04>] debug_smp_processor_id+0xf4/0x110
>>> [<ffffffff812d90bc>] __udelay+0x14/0x70
>>> [<ffffffff81378274>] md_notify_reboot+0x12c/0x148
>>> [<ffffffff81161054>] notifier_call_chain+0x64/0xc8
>>> [<ffffffff811614dc>] __blocking_notifier_call_chain+0x64/0xc0
>>> [<ffffffff8115566c>] kernel_restart_prepare+0x1c/0x38
>>> [<ffffffff811556cc>] kernel_restart+0x14/0x50
>>> [<ffffffff8115581c>] SyS_reboot+0x10c/0x1f0
>>> [<ffffffff81103684>] handle_sysn32+0x44/0x84
>>>
>>> The root cause is that current_cpu_data is accessed in preemptible
>>> context, so protect it with preempt_disable/preempt_enable pair
>>> in delay().
>>>
>>> Signed-off-by: Yang Shi<yang.shi@windriver.com>
>>> ---
>>>   arch/mips/lib/delay.c |    6 +++++-
>>>   1 files changed, 5 insertions(+), 1 deletions(-)
>>>
>>> diff --git a/arch/mips/lib/delay.c b/arch/mips/lib/delay.c
>>> index 6b3b1de..dc38064 100644
>>> --- a/arch/mips/lib/delay.c
>>> +++ b/arch/mips/lib/delay.c
>>> @@ -41,7 +41,11 @@ EXPORT_SYMBOL(__delay);
>>>
>>>   void __udelay(unsigned long us)
>>>   {
>>> -	unsigned int lpj = current_cpu_data.udelay_val;
>>> +	unsigned int lpj;
>>> +
>>> +	preempt_disable();
>>> +	lpj = current_cpu_data.udelay_val;
>>> +	preempt_enable();
>>>
>>>   	__delay((us * 0x000010c7ull * HZ * lpj)>>  32);
>>>   }
>>>     
>>>       
>> This doesn't seem like the best approach.
>>
>> Perhaps we should either use raw_current_cpu_data and no 
>> preempt_disable(), or if we are concerned about migrating to a CPU with 
>> a different lpj value, move the preempt_enable after the call to __delay().
>>   
>>     
>
> Thanks David.
>
> Yes, actually I also has this concern, so this patch is just a rough 
> fix. And I tried raw_current_cpu_data as well, but I'm not sure if it's 
> safe or not. Another proposal is to change cpu_data and current_cpu_data 
> to per CPU variables, of course this is a big change.
>
> Regards,
> Yang
>
>   
>> David Daney
>>
>>   
>>     
>
>
>
>   


From David.Daney@caviumnetworks.com Mon Mar  8 20:04:40 2010
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To:     linux-i2c@vger.kernel.org, ben-linux@fluff.org, khali@linux-fr.org
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        rade.bozic.ext@nsn.com, David Daney <ddaney@caviumnetworks.com>
Subject: [PATCH] i2c: Fix section mismatch errors in i2c-octeon.c
Date:   Mon,  8 Mar 2010 11:04:21 -0800
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Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---
 drivers/i2c/busses/i2c-octeon.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-octeon.c
index 6037550..be88d5b 100644
--- a/drivers/i2c/busses/i2c-octeon.c
+++ b/drivers/i2c/busses/i2c-octeon.c
@@ -446,7 +446,7 @@ static struct i2c_adapter octeon_i2c_ops = {
 /**
  * octeon_i2c_setclock - Calculate and set clock divisors.
  */
-static int __init octeon_i2c_setclock(struct octeon_i2c *i2c)
+static int __devinit octeon_i2c_setclock(struct octeon_i2c *i2c)
 {
 	int tclk, thp_base, inc, thp_idx, mdiv_idx, ndiv_idx, foscl, diff;
 	int thp = 0x18, mdiv = 2, ndiv = 0, delta_hz = 1000000;
@@ -489,7 +489,7 @@ static int __init octeon_i2c_setclock(struct octeon_i2c *i2c)
 	return 0;
 }
 
-static int __init octeon_i2c_initlowlevel(struct octeon_i2c *i2c)
+static int __devinit octeon_i2c_initlowlevel(struct octeon_i2c *i2c)
 {
 	u8 status;
 	int tries;
-- 
1.6.6.1


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From:   Manuel Lauss <manuel.lauss@googlemail.com>
To:     Linux-MIPS <linux-mips@linux-mips.org>
Cc:     Manuel Lauss <manuel.lauss@gmail.com>
Subject: [PATCH] MIPS: Alchemy: sleepcode without compile-time cputype dependencies
Date:   Mon,  8 Mar 2010 20:22:59 +0100
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Split the low-level sleepcode into per-memory-controller-generation
functions and figure out which one to call at runtime instead of
relying on compile-time-defined cpu types.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
---
Works on the DB1200.

 arch/mips/alchemy/common/power.c           |   12 +++-
 arch/mips/alchemy/common/sleeper.S         |   81 ++++++++++++++++++----------
 arch/mips/include/asm/mach-au1x00/au1000.h |    3 +-
 3 files changed, 64 insertions(+), 32 deletions(-)

diff --git a/arch/mips/alchemy/common/power.c b/arch/mips/alchemy/common/power.c
index 6ab7b42..c07101c 100644
--- a/arch/mips/alchemy/common/power.c
+++ b/arch/mips/alchemy/common/power.c
@@ -209,9 +209,15 @@ static void restore_core_regs(void)
 
 void au_sleep(void)
 {
-	save_core_regs();
-	au1xxx_save_and_sleep();
-	restore_core_regs();
+	int cpuid = alchemy_get_cputype();
+	if (cpuid != ALCHEMY_CPU_UNKNOWN) {
+		save_core_regs();
+		if (cpuid <= ALCHEMY_CPU_AU1500)
+			alchemy_sleep_au1000();
+		else if (cpuid <= ALCHEMY_CPU_AU1200)
+			alchemy_sleep_au1550();
+		restore_core_regs();
+	}
 }
 
 #endif	/* CONFIG_PM */
diff --git a/arch/mips/alchemy/common/sleeper.S b/arch/mips/alchemy/common/sleeper.S
index 4f4b167..77f3c74 100644
--- a/arch/mips/alchemy/common/sleeper.S
+++ b/arch/mips/alchemy/common/sleeper.S
@@ -22,10 +22,9 @@
 	.set noat
 	.align	5
 
-/* Save all of the processor general registers and go to sleep.
- * A wakeup condition will get us back here to restore the registers.
- */
-LEAF(au1xxx_save_and_sleep)
+
+/* preparatory stuff */
+.macro	SETUP_SLEEP
 	subu	sp, PT_SIZE
 	sw	$1, PT_R1(sp)
 	sw	$2, PT_R2(sp)
@@ -69,12 +68,32 @@ LEAF(au1xxx_save_and_sleep)
 	 */
 	lui	t3, 0xb190		/* sys_xxx */
 	sw	sp, 0x0018(t3)
-	la	k0, 3f			/* resume path */
+	la	k0, alchemy_sleep_wakeup	/* resume path */
 	sw	k0, 0x001c(t3)
+.endm
 
-	/* Put SDRAM into self refresh:  Preload instructions into cache,
-	 * issue a precharge, auto/self refresh, then sleep commands to it.
-	 */
+.macro	DO_SLEEP
+	/* put power supply and processor to sleep */
+	sw	zero, 0x0078(t3)	/* sys_slppwr */
+	sync
+	sw	zero, 0x007c(t3)	/* sys_sleep */
+	sync
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+.endm
+
+/* sleep code for Au1000/Au1100/Au1500 memory controller type */
+LEAF(alchemy_sleep_au1000)
+
+	SETUP_SLEEP
+
+	/* cache following instructions, as memory gets put to sleep */
 	la	t0, 1f
 	.set	mips3
 	cache	0x14, 0(t0)
@@ -84,17 +103,32 @@ LEAF(au1xxx_save_and_sleep)
 	.set	mips0
 
 1:	lui 	a0, 0xb400		/* mem_xxx */
-#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100) ||	\
-    defined(CONFIG_SOC_AU1500)
 	sw	zero, 0x001c(a0) 	/* Precharge */
 	sync
 	sw	zero, 0x0020(a0)	/* Auto Refresh */
 	sync
 	sw	zero, 0x0030(a0)  	/* Sleep */
 	sync
-#endif
 
-#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
+	DO_SLEEP
+
+END(alchemy_sleep_au1000)
+
+/* sleep code for Au1550/Au1200 memory controller type */
+LEAF(alchemy_sleep_au1550)
+
+	SETUP_SLEEP
+
+	/* cache following instructions, as memory gets put to sleep */
+	la	t0, 1f
+	.set	mips3
+	cache	0x14, 0(t0)
+	cache	0x14, 32(t0)
+	cache	0x14, 64(t0)
+	cache	0x14, 96(t0)
+	.set	mips0
+
+1:	lui 	a0, 0xb400		/* mem_xxx */
 	sw	zero, 0x08c0(a0) 	/* Precharge */
 	sync
 	sw	zero, 0x08d0(a0)	/* Self Refresh */
@@ -114,26 +148,17 @@ LEAF(au1xxx_save_and_sleep)
 	and 	t1, t0, t1		/* clear CE[1:0] */
 	sw 	t1, 0x0840(a0)		/* mem_sdconfiga */
 	sync
-#endif
 
-	/* put power supply and processor to sleep */
-	sw	zero, 0x0078(t3)	/* sys_slppwr */
-	sync
-	sw	zero, 0x007c(t3)	/* sys_sleep */
-	sync
-	nop
-	nop
-	nop
-	nop
-	nop
-	nop
-	nop
-	nop
+	DO_SLEEP
+
+END(alchemy_sleep_au1550)
+
 
 	/* This is where we return upon wakeup.
 	 * Reload all of the registers and return.
 	 */
-3:	lw	k0, 0x20(sp)
+LEAF(alchemy_sleep_wakeup)
+	lw	k0, 0x20(sp)
 	mtc0	k0, CP0_STATUS
 	lw	k0, 0x1c(sp)
 	mtc0	k0, CP0_CONTEXT
@@ -169,4 +194,4 @@ LEAF(au1xxx_save_and_sleep)
 	lw	$31, PT_R31(sp)
 	jr	ra
 	 addiu	sp, PT_SIZE
-END(au1xxx_save_and_sleep)
+END(alchemy_sleep_wakeup)
diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h
index ae07423..cb91714 100644
--- a/arch/mips/include/asm/mach-au1x00/au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/au1000.h
@@ -188,7 +188,8 @@ extern unsigned long get_au1x00_uart_baud_base(void);
 extern unsigned long au1xxx_calc_clock(void);
 
 /* PM: arch/mips/alchemy/common/sleeper.S, power.c, irq.c */
-void au1xxx_save_and_sleep(void);
+void alchemy_sleep_au1000(void);
+void alchemy_sleep_au1550(void);
 void au_sleep(void);
 void save_au1xxx_intctl(void);
 void restore_au1xxx_intctl(void);
-- 
1.7.0.2


From manuel.lauss@googlemail.com Mon Mar  8 20:22:23 2010
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From:   Manuel Lauss <manuel.lauss@googlemail.com>
To:     Linux-MIPS <linux-mips@linux-mips.org>
Cc:     Manuel Lauss <mano@roarinelk.homelinux.net>,
        Manuel Lauss <manuel.lauss@gmail.com>
Subject: [RFC PATCH] MIPS: Alchemy: add sysdev for both irq controllers
Date:   Mon,  8 Mar 2010 20:23:00 +0100
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From: Manuel Lauss <mano@roarinelk.homelinux.net>

Use a sysdev to implement PM methods for the Au1000 interrupt controllers.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
---
Works on DB1200, not sure though whether this is the correct approach. 
Applies cleanly only on top of "sleepcode-without-compile-time-cputype"
patch.

 arch/mips/alchemy/common/irq.c             |  196 ++++++++++++++++------------
 arch/mips/alchemy/common/power.c           |    5 -
 arch/mips/include/asm/mach-au1x00/au1000.h |    2 -
 3 files changed, 112 insertions(+), 91 deletions(-)

diff --git a/arch/mips/alchemy/common/irq.c b/arch/mips/alchemy/common/irq.c
index b2821ac..fd0e577 100644
--- a/arch/mips/alchemy/common/irq.c
+++ b/arch/mips/alchemy/common/irq.c
@@ -29,6 +29,7 @@
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
+#include <linux/sysdev.h>
 
 #include <asm/irq_cpu.h>
 #include <asm/mipsregs.h>
@@ -216,90 +217,6 @@ struct au1xxx_irqmap au1200_irqmap[] __initdata = {
 };
 
 
-#ifdef CONFIG_PM
-
-/*
- * Save/restore the interrupt controller state.
- * Called from the save/restore core registers as part of the
- * au_sleep function in power.c.....maybe I should just pm_register()
- * them instead?
- */
-static unsigned int	sleep_intctl_config0[2];
-static unsigned int	sleep_intctl_config1[2];
-static unsigned int	sleep_intctl_config2[2];
-static unsigned int	sleep_intctl_src[2];
-static unsigned int	sleep_intctl_assign[2];
-static unsigned int	sleep_intctl_wake[2];
-static unsigned int	sleep_intctl_mask[2];
-
-void save_au1xxx_intctl(void)
-{
-	sleep_intctl_config0[0] = au_readl(IC0_CFG0RD);
-	sleep_intctl_config1[0] = au_readl(IC0_CFG1RD);
-	sleep_intctl_config2[0] = au_readl(IC0_CFG2RD);
-	sleep_intctl_src[0] = au_readl(IC0_SRCRD);
-	sleep_intctl_assign[0] = au_readl(IC0_ASSIGNRD);
-	sleep_intctl_wake[0] = au_readl(IC0_WAKERD);
-	sleep_intctl_mask[0] = au_readl(IC0_MASKRD);
-
-	sleep_intctl_config0[1] = au_readl(IC1_CFG0RD);
-	sleep_intctl_config1[1] = au_readl(IC1_CFG1RD);
-	sleep_intctl_config2[1] = au_readl(IC1_CFG2RD);
-	sleep_intctl_src[1] = au_readl(IC1_SRCRD);
-	sleep_intctl_assign[1] = au_readl(IC1_ASSIGNRD);
-	sleep_intctl_wake[1] = au_readl(IC1_WAKERD);
-	sleep_intctl_mask[1] = au_readl(IC1_MASKRD);
-}
-
-/*
- * For most restore operations, we clear the entire register and
- * then set the bits we found during the save.
- */
-void restore_au1xxx_intctl(void)
-{
-	au_writel(0xffffffff, IC0_MASKCLR); au_sync();
-
-	au_writel(0xffffffff, IC0_CFG0CLR); au_sync();
-	au_writel(sleep_intctl_config0[0], IC0_CFG0SET); au_sync();
-	au_writel(0xffffffff, IC0_CFG1CLR); au_sync();
-	au_writel(sleep_intctl_config1[0], IC0_CFG1SET); au_sync();
-	au_writel(0xffffffff, IC0_CFG2CLR); au_sync();
-	au_writel(sleep_intctl_config2[0], IC0_CFG2SET); au_sync();
-	au_writel(0xffffffff, IC0_SRCCLR); au_sync();
-	au_writel(sleep_intctl_src[0], IC0_SRCSET); au_sync();
-	au_writel(0xffffffff, IC0_ASSIGNCLR); au_sync();
-	au_writel(sleep_intctl_assign[0], IC0_ASSIGNSET); au_sync();
-	au_writel(0xffffffff, IC0_WAKECLR); au_sync();
-	au_writel(sleep_intctl_wake[0], IC0_WAKESET); au_sync();
-	au_writel(0xffffffff, IC0_RISINGCLR); au_sync();
-	au_writel(0xffffffff, IC0_FALLINGCLR); au_sync();
-	au_writel(0x00000000, IC0_TESTBIT); au_sync();
-
-	au_writel(0xffffffff, IC1_MASKCLR); au_sync();
-
-	au_writel(0xffffffff, IC1_CFG0CLR); au_sync();
-	au_writel(sleep_intctl_config0[1], IC1_CFG0SET); au_sync();
-	au_writel(0xffffffff, IC1_CFG1CLR); au_sync();
-	au_writel(sleep_intctl_config1[1], IC1_CFG1SET); au_sync();
-	au_writel(0xffffffff, IC1_CFG2CLR); au_sync();
-	au_writel(sleep_intctl_config2[1], IC1_CFG2SET); au_sync();
-	au_writel(0xffffffff, IC1_SRCCLR); au_sync();
-	au_writel(sleep_intctl_src[1], IC1_SRCSET); au_sync();
-	au_writel(0xffffffff, IC1_ASSIGNCLR); au_sync();
-	au_writel(sleep_intctl_assign[1], IC1_ASSIGNSET); au_sync();
-	au_writel(0xffffffff, IC1_WAKECLR); au_sync();
-	au_writel(sleep_intctl_wake[1], IC1_WAKESET); au_sync();
-	au_writel(0xffffffff, IC1_RISINGCLR); au_sync();
-	au_writel(0xffffffff, IC1_FALLINGCLR); au_sync();
-	au_writel(0x00000000, IC1_TESTBIT); au_sync();
-
-	au_writel(sleep_intctl_mask[1], IC1_MASKSET); au_sync();
-
-	au_writel(sleep_intctl_mask[0], IC0_MASKSET); au_sync();
-}
-#endif /* CONFIG_PM */
-
-
 static void au1x_ic0_unmask(unsigned int irq_nr)
 {
 	unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE;
@@ -635,3 +552,114 @@ void __init arch_init_irq(void)
 		break;
 	}
 }
+
+struct alchemy_ic_sysdev {
+	struct sys_device sysdev;
+	unsigned long pmdata[7 * 2];
+};
+
+static int alchemy_ic_suspend(struct sys_device *dev, pm_message_t state)
+{
+	struct alchemy_ic_sysdev *icdev =
+			container_of(dev, struct alchemy_ic_sysdev, sysdev);
+
+	icdev->pmdata[ 0] = au_readl(IC0_CFG0RD);
+	icdev->pmdata[ 1] = au_readl(IC0_CFG1RD);
+	icdev->pmdata[ 2] = au_readl(IC0_CFG2RD);
+	icdev->pmdata[ 3] = au_readl(IC0_SRCRD);
+	icdev->pmdata[ 4] = au_readl(IC0_ASSIGNRD);
+	icdev->pmdata[ 5] = au_readl(IC0_WAKERD);
+	icdev->pmdata[ 6] = au_readl(IC0_MASKRD);
+
+	icdev->pmdata[ 7] = au_readl(IC1_CFG0RD);
+	icdev->pmdata[ 8] = au_readl(IC1_CFG1RD);
+	icdev->pmdata[ 9] = au_readl(IC1_CFG2RD);
+	icdev->pmdata[10] = au_readl(IC1_SRCRD);
+	icdev->pmdata[11] = au_readl(IC1_ASSIGNRD);
+	icdev->pmdata[12] = au_readl(IC1_WAKERD);
+	icdev->pmdata[13] = au_readl(IC1_MASKRD);
+
+	return 0;
+}
+
+static int alchemy_ic_resume(struct sys_device *dev)
+{
+	struct alchemy_ic_sysdev *icdev =
+			container_of(dev, struct alchemy_ic_sysdev, sysdev);
+
+	au_writel(0xffffffff, IC0_MASKCLR);
+	au_writel(0xffffffff, IC0_CFG0CLR);
+	au_writel(0xffffffff, IC0_CFG1CLR);
+	au_writel(0xffffffff, IC0_CFG2CLR);
+	au_writel(0xffffffff, IC0_SRCCLR);
+	au_writel(0xffffffff, IC0_ASSIGNCLR);
+	au_writel(0xffffffff, IC0_WAKECLR);
+	au_writel(0xffffffff, IC0_RISINGCLR);
+	au_writel(0xffffffff, IC0_FALLINGCLR);
+	au_writel(0x00000000, IC0_TESTBIT);
+	au_sync();
+	au_writel(icdev->pmdata[ 0], IC0_CFG0SET);
+	au_writel(icdev->pmdata[ 1], IC0_CFG1SET);
+	au_writel(icdev->pmdata[ 2], IC0_CFG2SET);
+	au_writel(icdev->pmdata[ 3], IC0_SRCSET);
+	au_writel(icdev->pmdata[ 4], IC0_ASSIGNSET);
+	au_writel(icdev->pmdata[ 5], IC0_WAKESET);
+	au_sync();
+
+	au_writel(0xffffffff, IC1_MASKCLR);
+	au_writel(0xffffffff, IC1_CFG0CLR);
+	au_writel(0xffffffff, IC1_CFG1CLR);
+	au_writel(0xffffffff, IC1_CFG2CLR);
+	au_writel(0xffffffff, IC1_SRCCLR);
+	au_writel(0xffffffff, IC1_ASSIGNCLR);
+	au_writel(0xffffffff, IC1_WAKECLR);
+	au_writel(0xffffffff, IC1_RISINGCLR);
+	au_writel(0xffffffff, IC1_FALLINGCLR);
+	au_writel(0x00000000, IC1_TESTBIT);
+	au_sync();
+	au_writel(icdev->pmdata[ 7], IC1_CFG0SET);
+	au_writel(icdev->pmdata[ 8], IC1_CFG1SET);
+	au_writel(icdev->pmdata[ 9], IC1_CFG2SET);
+	au_writel(icdev->pmdata[10], IC1_SRCSET);
+	au_writel(icdev->pmdata[11], IC1_ASSIGNSET);
+	au_writel(icdev->pmdata[12], IC1_WAKESET);
+	au_sync();
+
+	au_writel(icdev->pmdata[13], IC1_MASKSET);
+	au_sync();
+	au_writel(icdev->pmdata[ 6], IC0_MASKSET);
+	au_sync();
+
+	return 0;
+}
+
+static struct sysdev_class alchemy_ic_sysdev_class = {
+	.name		= "ic",
+	.suspend	= alchemy_ic_suspend,
+	.resume		= alchemy_ic_resume,
+};
+
+static int __init alchemy_ic_sysdev_init(void)
+{
+	struct alchemy_ic_sysdev *icdev;
+	int err;
+
+	icdev = kzalloc(sizeof(struct alchemy_ic_sysdev), GFP_KERNEL);
+	if (!icdev)
+		return -ENOMEM;
+
+	err = sysdev_class_register(&alchemy_ic_sysdev_class);
+	if (err) {
+		kfree(icdev);
+		return err;
+	}
+
+	icdev->sysdev.id = 0;
+	icdev->sysdev.cls = &alchemy_ic_sysdev_class;
+	err = sysdev_register(&icdev->sysdev);
+	if (err)
+		kfree(icdev);
+
+	return err;
+}
+device_initcall(alchemy_ic_sysdev_init);
diff --git a/arch/mips/alchemy/common/power.c b/arch/mips/alchemy/common/power.c
index c07101c..e097094 100644
--- a/arch/mips/alchemy/common/power.c
+++ b/arch/mips/alchemy/common/power.c
@@ -106,9 +106,6 @@ static void save_core_regs(void)
 	sleep_usb[1] = au_readl(0xb4020024);	/* OTG_MUX */
 #endif
 
-	/* Save interrupt controller state. */
-	save_au1xxx_intctl();
-
 	/* Clocks and PLLs. */
 	sleep_sys_clocks[0] = au_readl(SYS_FREQCTRL0);
 	sleep_sys_clocks[1] = au_readl(SYS_FREQCTRL1);
@@ -200,8 +197,6 @@ static void restore_core_regs(void)
 		au_writel(sleep_uart0_clkdiv, UART0_ADDR + UART_CLK); au_sync();
 	}
 
-	restore_au1xxx_intctl();
-
 #if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
 	au1xxx_dbdma_resume();
 #endif
diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h
index cb91714..c84fcd6 100644
--- a/arch/mips/include/asm/mach-au1x00/au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/au1000.h
@@ -191,8 +191,6 @@ extern unsigned long au1xxx_calc_clock(void);
 void alchemy_sleep_au1000(void);
 void alchemy_sleep_au1550(void);
 void au_sleep(void);
-void save_au1xxx_intctl(void);
-void restore_au1xxx_intctl(void);
 
 
 /* SOC Interrupt numbers */
-- 
1.7.0.2


From manuel.lauss@googlemail.com Mon Mar  8 20:22:50 2010
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From:   Manuel Lauss <manuel.lauss@googlemail.com>
To:     Linux-MIPS <linux-mips@linux-mips.org>
Cc:     Manuel Lauss <manuel.lauss@gmail.com>
Subject: [PATCH] MIPS: Alchemy: move MMC driver registration to board code.
Date:   Mon,  8 Mar 2010 20:23:01 +0100
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Where it really belongs to.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
---
 arch/mips/alchemy/common/platform.c           |   81 -------------------------
 arch/mips/alchemy/devboards/db1200/platform.c |   48 +++++++++++++--
 arch/mips/alchemy/devboards/pb1200/platform.c |   79 +++++++++++++++++++++++-
 3 files changed, 119 insertions(+), 89 deletions(-)

diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c
index 2580e77..e1ed1ad 100644
--- a/arch/mips/alchemy/common/platform.c
+++ b/arch/mips/alchemy/common/platform.c
@@ -18,7 +18,6 @@
 
 #include <asm/mach-au1x00/au1xxx.h>
 #include <asm/mach-au1x00/au1xxx_dbdma.h>
-#include <asm/mach-au1x00/au1100_mmc.h>
 #include <asm/mach-au1x00/au1xxx_eth.h>
 
 #define PORT(_base, _irq)					\
@@ -231,82 +230,6 @@ static struct platform_device au1200_lcd_device = {
 	.num_resources  = ARRAY_SIZE(au1200_lcd_resources),
 	.resource       = au1200_lcd_resources,
 };
-
-static u64 au1xxx_mmc_dmamask =  DMA_BIT_MASK(32);
-
-extern struct au1xmmc_platform_data au1xmmc_platdata[2];
-
-static struct resource au1200_mmc0_resources[] = {
-	[0] = {
-		.start          = SD0_PHYS_ADDR,
-		.end            = SD0_PHYS_ADDR + 0x7ffff,
-		.flags          = IORESOURCE_MEM,
-	},
-	[1] = {
-		.start		= AU1200_SD_INT,
-		.end		= AU1200_SD_INT,
-		.flags		= IORESOURCE_IRQ,
-	},
-	[2] = {
-		.start		= DSCR_CMD0_SDMS_TX0,
-		.end		= DSCR_CMD0_SDMS_TX0,
-		.flags		= IORESOURCE_DMA,
-	},
-	[3] = {
-		.start          = DSCR_CMD0_SDMS_RX0,
-		.end		= DSCR_CMD0_SDMS_RX0,
-		.flags          = IORESOURCE_DMA,
-	}
-};
-
-static struct platform_device au1200_mmc0_device = {
-	.name = "au1xxx-mmc",
-	.id = 0,
-	.dev = {
-		.dma_mask		= &au1xxx_mmc_dmamask,
-		.coherent_dma_mask	= DMA_BIT_MASK(32),
-		.platform_data		= &au1xmmc_platdata[0],
-	},
-	.num_resources	= ARRAY_SIZE(au1200_mmc0_resources),
-	.resource	= au1200_mmc0_resources,
-};
-
-#ifndef CONFIG_MIPS_DB1200
-static struct resource au1200_mmc1_resources[] = {
-	[0] = {
-		.start          = SD1_PHYS_ADDR,
-		.end            = SD1_PHYS_ADDR + 0x7ffff,
-		.flags          = IORESOURCE_MEM,
-	},
-	[1] = {
-		.start		= AU1200_SD_INT,
-		.end		= AU1200_SD_INT,
-		.flags		= IORESOURCE_IRQ,
-	},
-	[2] = {
-		.start		= DSCR_CMD0_SDMS_TX1,
-		.end		= DSCR_CMD0_SDMS_TX1,
-		.flags		= IORESOURCE_DMA,
-	},
-	[3] = {
-		.start          = DSCR_CMD0_SDMS_RX1,
-		.end		= DSCR_CMD0_SDMS_RX1,
-		.flags          = IORESOURCE_DMA,
-	}
-};
-
-static struct platform_device au1200_mmc1_device = {
-	.name = "au1xxx-mmc",
-	.id = 1,
-	.dev = {
-		.dma_mask		= &au1xxx_mmc_dmamask,
-		.coherent_dma_mask	= DMA_BIT_MASK(32),
-		.platform_data		= &au1xmmc_platdata[1],
-	},
-	.num_resources	= ARRAY_SIZE(au1200_mmc1_resources),
-	.resource	= au1200_mmc1_resources,
-};
-#endif /* #ifndef CONFIG_MIPS_DB1200 */
 #endif /* #ifdef CONFIG_SOC_AU1200 */
 
 /* All Alchemy demoboards with I2C have this #define in their headers */
@@ -421,10 +344,6 @@ static struct platform_device *au1xxx_platform_devices[] __initdata = {
 	&au1xxx_usb_gdt_device,
 	&au1xxx_usb_otg_device,
 	&au1200_lcd_device,
-	&au1200_mmc0_device,
-#ifndef CONFIG_MIPS_DB1200
-	&au1200_mmc1_device,
-#endif
 #endif
 #ifdef SMBUS_PSC_BASE
 	&pbdb_smbus_device,
diff --git a/arch/mips/alchemy/devboards/db1200/platform.c b/arch/mips/alchemy/devboards/db1200/platform.c
index 3cb95a9..9afb287 100644
--- a/arch/mips/alchemy/devboards/db1200/platform.c
+++ b/arch/mips/alchemy/devboards/db1200/platform.c
@@ -329,14 +329,49 @@ static struct led_classdev db1200_mmc_led = {
 };
 
 /* needed by arch/mips/alchemy/common/platform.c */
-struct au1xmmc_platform_data au1xmmc_platdata[] = {
+static struct au1xmmc_platform_data db1200_mmc_platdata = {
+	.cd_setup	= db1200_mmc_cd_setup,
+	.set_power	= db1200_mmc_set_power,
+	.card_inserted	= db1200_mmc_card_inserted,
+	.card_readonly	= db1200_mmc_card_readonly,
+	.led		= &db1200_mmc_led,
+};
+
+static u64 au1xxx_mmc_dmamask =  DMA_BIT_MASK(32);
+
+static struct resource au1200_mmc0_resources[] = {
 	[0] = {
-		.cd_setup	= db1200_mmc_cd_setup,
-		.set_power	= db1200_mmc_set_power,
-		.card_inserted	= db1200_mmc_card_inserted,
-		.card_readonly	= db1200_mmc_card_readonly,
-		.led		= &db1200_mmc_led,
+		.start          = SD0_PHYS_ADDR,
+		.end            = SD0_PHYS_ADDR + 0x7ffff,
+		.flags          = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start		= AU1200_SD_INT,
+		.end		= AU1200_SD_INT,
+		.flags		= IORESOURCE_IRQ,
+	},
+	[2] = {
+		.start		= DSCR_CMD0_SDMS_TX0,
+		.end		= DSCR_CMD0_SDMS_TX0,
+		.flags		= IORESOURCE_DMA,
+	},
+	[3] = {
+		.start          = DSCR_CMD0_SDMS_RX0,
+		.end		= DSCR_CMD0_SDMS_RX0,
+		.flags          = IORESOURCE_DMA,
+	}
+};
+
+static struct platform_device db1200_mmc0_dev = {
+	.name = "au1xxx-mmc",
+	.id = 0,
+	.dev = {
+		.dma_mask		= &au1xxx_mmc_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+		.platform_data		= &db1200_mmc_platdata,
 	},
+	.num_resources	= ARRAY_SIZE(au1200_mmc0_resources),
+	.resource	= au1200_mmc0_resources,
 };
 
 /**********************************************************************/
@@ -436,6 +471,7 @@ static struct platform_device *db1200_devs[] __initdata = {
 	&db1200_rtc_dev,
 	&db1200_nand_dev,
 	&db1200_audio_dev,
+	&db1200_mmc0_dev,
 };
 
 static int __init db1200_dev_init(void)
diff --git a/arch/mips/alchemy/devboards/pb1200/platform.c b/arch/mips/alchemy/devboards/pb1200/platform.c
index 3ef2dce..89e6f1d 100644
--- a/arch/mips/alchemy/devboards/pb1200/platform.c
+++ b/arch/mips/alchemy/devboards/pb1200/platform.c
@@ -25,6 +25,7 @@
 #include <linux/smc91x.h>
 
 #include <asm/mach-au1x00/au1xxx.h>
+#include <asm/mach-au1x00/au1xxx_dbdma.h>
 #include <asm/mach-au1x00/au1100_mmc.h>
 #include <asm/mach-db1x00/bcsr.h>
 
@@ -88,7 +89,7 @@ static int pb1200mmc1_card_inserted(void *mmc_host)
 	return (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD1INSERT) ? 1 : 0;
 }
 
-const struct au1xmmc_platform_data au1xmmc_platdata[2] = {
+static struct au1xmmc_platform_data pb1200_mmc_platdata[2] = {
 	[0] = {
 		.set_power	= pb1200mmc0_set_power,
 		.card_inserted	= pb1200mmc0_card_inserted,
@@ -105,6 +106,78 @@ const struct au1xmmc_platform_data au1xmmc_platdata[2] = {
 	},
 };
 
+static u64 au1xxx_mmc_dmamask =  DMA_BIT_MASK(32);
+
+static struct resource au1200_mmc0_resources[] = {
+	[0] = {
+		.start          = SD0_PHYS_ADDR,
+		.end            = SD0_PHYS_ADDR + 0x7ffff,
+		.flags          = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start		= AU1200_SD_INT,
+		.end		= AU1200_SD_INT,
+		.flags		= IORESOURCE_IRQ,
+	},
+	[2] = {
+		.start		= DSCR_CMD0_SDMS_TX0,
+		.end		= DSCR_CMD0_SDMS_TX0,
+		.flags		= IORESOURCE_DMA,
+	},
+	[3] = {
+		.start          = DSCR_CMD0_SDMS_RX0,
+		.end		= DSCR_CMD0_SDMS_RX0,
+		.flags          = IORESOURCE_DMA,
+	}
+};
+
+static struct platform_device pb1200_mmc0_device = {
+	.name = "au1xxx-mmc",
+	.id = 0,
+	.dev = {
+		.dma_mask		= &au1xxx_mmc_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+		.platform_data		= &pb1200_mmc_platdata[0],
+	},
+	.num_resources	= ARRAY_SIZE(au1200_mmc0_resources),
+	.resource	= au1200_mmc0_resources,
+};
+
+static struct resource au1200_mmc1_resources[] = {
+	[0] = {
+		.start          = SD1_PHYS_ADDR,
+		.end            = SD1_PHYS_ADDR + 0x7ffff,
+		.flags          = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start		= AU1200_SD_INT,
+		.end		= AU1200_SD_INT,
+		.flags		= IORESOURCE_IRQ,
+	},
+	[2] = {
+		.start		= DSCR_CMD0_SDMS_TX1,
+		.end		= DSCR_CMD0_SDMS_TX1,
+		.flags		= IORESOURCE_DMA,
+	},
+	[3] = {
+		.start          = DSCR_CMD0_SDMS_RX1,
+		.end		= DSCR_CMD0_SDMS_RX1,
+		.flags          = IORESOURCE_DMA,
+	}
+};
+
+static struct platform_device pb1200_mmc1_device = {
+	.name = "au1xxx-mmc",
+	.id = 1,
+	.dev = {
+		.dma_mask		= &au1xxx_mmc_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+		.platform_data		= &pb1200_mmc_platdata[1],
+	},
+	.num_resources	= ARRAY_SIZE(au1200_mmc1_resources),
+	.resource	= au1200_mmc1_resources,
+};
+
 static struct resource ide_resources[] = {
 	[0] = {
 		.start	= IDE_PHYS_ADDR,
@@ -163,7 +236,9 @@ static struct platform_device smc91c111_device = {
 
 static struct platform_device *board_platform_devices[] __initdata = {
 	&ide_device,
-	&smc91c111_device
+	&smc91c111_device,
+	&pb1200_mmc0_device,
+	&pb1200_mmc1_device
 };
 
 static int __init board_register_devices(void)
-- 
1.7.0.2


From manuel.lauss@googlemail.com Mon Mar  8 20:42:33 2010
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From:   Manuel Lauss <manuel.lauss@googlemail.com>
To:     linux-usb@vger.kernel.org
Cc:     linux-mips@linux-mips.org, Manuel Lauss <manuel.lauss@gmail.com>
Subject: [PATCH] USB: ehci-au1xxx does not need EHCI IO watchdog
Date:   Mon,  8 Mar 2010 20:43:32 +0100
Message-Id: <1268077412-29804-1-git-send-email-manuel.lauss@gmail.com>
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I've been running variations of this patch for well over a year now;
my usual zoo of test devices didn't trigger any ill effects even
under heavy load.  As a nice sideeffect idle-wakeups are reduced
from 20/s to about 2/s (EHCI hub with mouse and kbd).

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
---
 drivers/usb/host/ehci-au1xxx.c |   11 ++++++++++-
 1 files changed, 10 insertions(+), 1 deletions(-)

diff --git a/drivers/usb/host/ehci-au1xxx.c b/drivers/usb/host/ehci-au1xxx.c
index e3a74e7..7a27b7c 100644
--- a/drivers/usb/host/ehci-au1xxx.c
+++ b/drivers/usb/host/ehci-au1xxx.c
@@ -69,6 +69,15 @@ static void au1xxx_stop_ehc(void)
 	au_sync();
 }
 
+static int au1xxx_ehci_setup(struct usb_hcd *hcd)
+{
+	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
+	int ret = ehci_init(hcd);
+
+	ehci->need_io_watchdog = 0;
+	return ret;
+}
+
 static const struct hc_driver ehci_au1xxx_hc_driver = {
 	.description		= hcd_name,
 	.product_desc		= "Au1xxx EHCI",
@@ -86,7 +95,7 @@ static const struct hc_driver ehci_au1xxx_hc_driver = {
 	 * FIXME -- ehci_init() doesn't do enough here.
 	 * See ehci-ppc-soc for a complete implementation.
 	 */
-	.reset			= ehci_init,
+	.reset			= au1xxx_ehci_setup,
 	.start			= ehci_run,
 	.stop			= ehci_stop,
 	.shutdown		= ehci_shutdown,
-- 
1.7.0.2


From yang.shi@windriver.com Tue Mar  9 07:24:36 2010
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Subject: [PATCH] MIPS: Octeon: Fix wrong variable type in smp.c
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Change cvmx_ciu_wdogx_t type to "union cvmx_ciu_wdogx".

Signed-off-by: Yang Shi <yang.shi@windriver.com>
---
 arch/mips/cavium-octeon/smp.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c
index 51e9802..52d61ba 100644
--- a/arch/mips/cavium-octeon/smp.c
+++ b/arch/mips/cavium-octeon/smp.c
@@ -281,7 +281,7 @@ static void octeon_cpu_die(unsigned int cpu)
 
 #ifdef CONFIG_CAVIUM_OCTEON_WATCHDOG
 	/* Disable the watchdog */
-	cvmx_ciu_wdogx_t ciu_wdog;
+	union cvmx_ciu_wdogx ciu_wdog;
 	ciu_wdog.u64 = cvmx_read_csr(CVMX_CIU_WDOGX(cpu));
 	ciu_wdog.s.mode = 0;
 	cvmx_write_csr(CVMX_CIU_WDOGX(cpu), ciu_wdog.u64);
-- 
1.6.3.3


From sshtylyov@mvista.com Tue Mar  9 12:34:13 2010
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Subject: Re: [PATCH] MIPS: Alchemy: move MMC driver registration to board
 code.
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Hello.

Manuel Lauss wrote:

> Where it really belongs to.
>   

   I disagree (again). SoC platform devices dont belong with the board code.

WBR, Sergei


From manuel.lauss@googlemail.com Tue Mar  9 12:45:46 2010
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Date:   Tue, 9 Mar 2010 12:45:39 +0100
Message-ID: <f861ec6f1003090345n53570102je68aef14e8b3f3fb@mail.gmail.com>
Subject: Re: [PATCH] MIPS: Alchemy: move MMC driver registration to board 
        code.
From:   Manuel Lauss <manuel.lauss@googlemail.com>
To:     Sergei Shtylyov <sshtylyov@mvista.com>
Cc:     Linux-MIPS <linux-mips@linux-mips.org>,
        Manuel Lauss <manuel.lauss@gmail.com>
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On Tue, Mar 9, 2010 at 12:33 PM, Sergei Shtylyov <sshtylyov@mvista.com> wrote:
> Hello.
>
> Manuel Lauss wrote:
>
>> Where it really belongs to.
>>
>
>  I disagree (again). SoC platform devices dont belong with the board code.

Figured as much.  However with additional boards the #ifdef mess in
common/platform.c
is only going to get worse. MUCH worse. Just look at the au1000-eth
platform data situation!
I have these platform devices on Au1200/Au1300 even thought they don't have
a built-in MAC.

The board which uses the device should register it.  The UARTs are
kind of a special
case since they need to be fixed up with the correct busclock, but
that too could be
exported to an initialization wrapper.

But, consider the patch withdrawn.

Manuel

From sshtylyov@mvista.com Tue Mar  9 12:52:18 2010
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Manuel Lauss wrote:

>>> Where it really belongs to.
>> I disagree (again). SoC platform devices dont belong with the board code.
>>     
>
> Figured as much.  However with additional boards the #ifdef mess in
> common/platform.c
> is only going to get worse. MUCH worse.

   We could probably eliminate the board #ifdef in platfrom.c by not 
supplying the platfrom data for MMC1.

> Just look at the au1000-eth platform data situation!
> I have these platform devices on Au1200/Au1300 even thought they don't have
> a built-in MAC.
>   

   Need to add the SoC type checks then when registering the devices. Or 
at least the #ifdef's. :-)

> The board which uses the device should register it.

   Contrarywise, the SoC that has the devices, should register them.

> But, consider the patch withdrawn.
>   

   Thanks.

> Manuel
>   

WBR, Sergei


From manuel.lauss@googlemail.com Tue Mar  9 13:03:59 2010
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Date:   Tue, 9 Mar 2010 13:03:51 +0100
Message-ID: <f861ec6f1003090403j190d0ddbp7e245d0990a62a51@mail.gmail.com>
Subject: Re: [PATCH] MIPS: Alchemy: move MMC driver registration to board 
        code.
From:   Manuel Lauss <manuel.lauss@googlemail.com>
To:     Sergei Shtylyov <sshtylyov@mvista.com>
Cc:     Linux-MIPS <linux-mips@linux-mips.org>,
        Manuel Lauss <manuel.lauss@gmail.com>
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On Tue, Mar 9, 2010 at 12:51 PM, Sergei Shtylyov <sshtylyov@mvista.com> wrote:
> Manuel Lauss wrote:
>
>>>> Where it really belongs to.
>>>
>>> I disagree (again). SoC platform devices dont belong with the board code.
>>>
>>
>> Figured as much.  However with additional boards the #ifdef mess in
>> common/platform.c
>> is only going to get worse. MUCH worse.
>
>  We could probably eliminate the board #ifdef in platfrom.c by not supplying
> the platfrom data for MMC1.

What if I wanted to build a kernel which supports multiple different
Au1200-based systems, like the SH-port does with its mach vector?


>> Just look at the au1000-eth platform data situation!
>> I have these platform devices on Au1200/Au1300 even thought they don't
>> have
>> a built-in MAC.
>>
>
>  Need to add the SoC type checks then when registering the devices. Or at
> least the #ifdef's. :-)

I'd like to get rid of the ifdefs, not encourage them to mate and multiply ;-)


>> The board which uses the device should register it.
>
>  Contrarywise, the SoC that has the devices, should register them.

My point is that most drivers require additional information from the board, and
maybe due to hardware design the ids may need to be swapped.  Rather than
#ifdeffing these cases for every board in a central file I'd let the board using
the devices sort this out.

In my case, I don't need UART0 of the Au1200, but need UART1 to be ttyS0.

And on a personal note, that file just bothers me.  It's messy, can
cause merge conflicts,
it references structures defined inside board-specific code. In short,
it just plain annoys
my sense of aesthetics.

Manuel

From ralf@linux-mips.org Tue Mar  9 15:16:22 2010
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Date:   Tue, 9 Mar 2010 15:16:06 +0100
From:   Ralf Baechle <ralf@linux-mips.org>
To:     David Daney <ddaney@caviumnetworks.com>
Cc:     Yang Shi <yang.shi@windriver.com>, f.fainelli@gmail.com,
        linux-mips@linux-mips.org
Subject: Re: [PATCH 3/3] MIPS: Octeon: Add add_wired_entry decralation in
 header file
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On Wed, Mar 03, 2010 at 10:24:11AM -0800, David Daney wrote:

> On 03/03/2010 12:43 AM, Yang Shi wrote:
> >Octeon's setup.c uses add_wired_entry, but it is not declared
> >anywhere. Copy add_wired_entry decralation from pgtable-32.h to
> >pgtable-64.h and include asm/pgtable.h into Octeon's setup.c.
> >
> >Signed-off-by: Yang Shi<yang.shi@windriver.com>
> 
> NAK!
> 
> We are removing the use of add_wired_entry(), so adding a
> declaration will not be necessary.

For explanation - add_wired_entry is a horrible API; it requires the user
to have knowledge about the TLB structure, code differently for 32-bit and
64-bit kernels.  It's just the API of terror.

  Ralf

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On AR7, we already redefine PHYS_OFFSET to match the system specifities, it is
however not sufficient when unsing dma_{map,unmap}_single, specifically in the
Ethernet driver, we must also adjust CAC_ADDR and UNCAC_ADDR for DMA to work
correctly. This patch fixes the following issue, seen in cpmac_open:

ops[#1]:
Cpu 0
$ 0   : 00000000 10008400 a0f5b120 00000000
$ 4   : 94c59000 94270f64 00000020 00000010
$ 8   : 00000010 94103ce0 0000000a 94c03400
$12   : ffffffff 94c03408 94c03410 00000001
$16   : a0f5ba20 00000041 94c592c0 94c59200
$20   : 94c59000 000005ee 00002000 9438c8f0
$24   : 00000010 00000000
$28   : 94fac000 94fadd58 94390000 942724a8
Hi    : 00000000
Lo    : 00000001
epc   : 94272518 cpmac_open+0x208/0x3f8
    Not tainted
ra    : 942724a8 cpmac_open+0x198/0x3f8
Status: 10008403    KERNEL EXL IE
Cause : 3080000c
BadVA : 00000000
PrId  : 00018448 (MIPS 4KEc)
Modules linked in:
Process ifconfig (pid: 278, threadinfo=94fac000, task=94e79590, tls=00000000)
Stack : 7f8da120 2ab05cb0 94c59000 943356f0 00000000 943d0000 94c59000 943356f0
        94c59030 943d0000 943c27c0 94fade10 00000000 94fade20 94c59000 9428e5a4
        00000000 94c59000 00000041 94289768 94c59000 00000041 00001002 00001043
        00000000 9428d810 00000000 94fade10 7f8da4e8 9428e6b8 00000000 7f8da4a8
        7f8da4e8 00008914 00000000 942f7f2c 00000000 00000008 00408000 00008913
        ...
Call Trace:
[<94272518>] cpmac_open+0x208/0x3f8
[<9428e5a4>] dev_open+0x164/0x264
[<9428d810>] dev_change_flags+0xd0/0x1bc
[<942f7f2c>] devinet_ioctl+0x2d8/0x908
[<942771f8>] sock_ioctl+0x29c/0x2fc
[<941a0fb4>] vfs_ioctl+0x2c/0x7c
[<941a16ec>] do_vfs_ioctl+0x5dc/0x630
[<941a1790>] sys_ioctl+0x50/0x88
[<94101e10>] stack_done+0x20/0x3c

Signed-off-by: Regards, Florian Fainelli <florian@openwrt.org>
---
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h
index ac32572..7b11df5 100644
--- a/arch/mips/include/asm/page.h
+++ b/arch/mips/include/asm/page.h
@@ -188,8 +188,10 @@ typedef struct { unsigned long pgprot; } pgprot_t;
 #define VM_DATA_DEFAULT_FLAGS	(VM_READ | VM_WRITE | VM_EXEC | \
 				 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 
-#define UNCAC_ADDR(addr)	((addr) - PAGE_OFFSET + UNCAC_BASE)
-#define CAC_ADDR(addr)		((addr) - UNCAC_BASE + PAGE_OFFSET)
+#define UNCAC_ADDR(addr)	((addr) - PAGE_OFFSET + UNCAC_BASE + 	\
+								PHYS_OFFSET)
+#define CAC_ADDR(addr)		((addr) - UNCAC_BASE + PAGE_OFFSET +	\
+								PHYS_OFFSET)
 
 #include <asm-generic/memory_model.h>
 #include <asm-generic/getorder.h>


From wuzhangjin@gmail.com Tue Mar  9 17:34:06 2010
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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     linux-mips@linux-mips.org, Steven Rostedt <rostedt@goodmis.org>,
        Frederic Weisbecker <fweisbec@gmail.com>,
        Ingo Molnar <mingo@redhat.com>,
        Wu Zhangjin <wuzhangjin@gmail.com>
Subject: [PATCH] MIPS: Don't trace irqsoff for idle
Date:   Wed, 10 Mar 2010 00:27:28 +0800
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From: Wu Zhangjin <wuzhangjin@gmail.com>

As the X86 platform did in arch/x86/kernel/{process_32.c,process_64.c},
   we also don't trace irqsoff for idle.

If "There's no useful work to be done", we don't care about the irqsoff
duration. If we trace for idle, the max duration of irqsoff will be
always the idle time and eventually make the irqsoff tracer out of
action.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
---
 arch/mips/kernel/process.c |    7 ++++++-
 1 files changed, 6 insertions(+), 1 deletions(-)

diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index f3d73e1..87d19dd 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -64,8 +64,13 @@ void __noreturn cpu_idle(void)
 
 			smtc_idle_loop_hook();
 #endif
-			if (cpu_wait)
+
+			if (cpu_wait) {
+				/* Don't trace irqs off for idle */
+				stop_critical_timings();
 				(*cpu_wait)();
+				start_critical_timings();
+			}
 		}
 #ifdef CONFIG_HOTPLUG_CPU
 		if (!cpu_online(cpu) && !cpu_isset(cpu, cpu_callin_map) &&
-- 
1.7.0.1


From wuzhangjin@gmail.com Tue Mar  9 18:00:01 2010
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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     linux-mips@linux-mips.org, Wu Zhangjin <wuzhangjin@gmail.com>
Subject: [PATCH] Loongson: Add module info to the loongson2_clock driver
Date:   Wed, 10 Mar 2010 00:53:21 +0800
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From: Wu Zhangjin <wuzhangjin@gmail.com>

This patch fixes the warning of the tool which checks the module info of
the loongson2_clock driver when inserting it into the kernel:

"Feb 25 23:42:27 localhost kernel: [    4.965000] loongson2_clock: module
license 'unspecified' taints kernel."

Reported-by: Liu Shiwei <liushiwei@gmail.com>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
---
 arch/mips/kernel/cpufreq/loongson2_clock.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/arch/mips/kernel/cpufreq/loongson2_clock.c b/arch/mips/kernel/cpufreq/loongson2_clock.c
index d7ca256..3eaae1d 100644
--- a/arch/mips/kernel/cpufreq/loongson2_clock.c
+++ b/arch/mips/kernel/cpufreq/loongson2_clock.c
@@ -164,3 +164,7 @@ void loongson2_cpu_wait(void)
 	spin_unlock_irqrestore(&loongson2_wait_lock, flags);
 }
 EXPORT_SYMBOL_GPL(loongson2_cpu_wait);
+
+MODULE_AUTHOR("Yanhua <yanh@lemote.com>");
+MODULE_DESCRIPTION("cpuclock driver of Loongson2F");
+MODULE_LICENSE("GPL");
-- 
1.7.0.1


From wuzhangjin@gmail.com Tue Mar  9 18:19:15 2010
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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>, Greg KH <gregkh@suse.de>
Cc:     linux-mips@linux-mips.org, linux-kernel@vger.kernel.org,
        Wu Zhangjin <wuzhangjin@gmail.com>
Subject: [PATCH 0/3] Workaround the Out-of-order Issue of Loongson-2F
Date:   Wed, 10 Mar 2010 01:12:30 +0800
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From: Wu Zhangjin <wuzhangjin@gmail.com>

As the Chapter 15: "Errata: Issue of Out-of-order in loongson"[1] shows, to
workaround the Issue of Loongson-2Fï¼ŒWe need to do:

  o When switching from user model to kernel model, you should flush the branch
  target history such as BTB and RAS.
 
  o Doing some tricks to the indirect branch target to make sure that the
  indirect branch target can not be in the I/O region.

This patchset applied the above methods and for the binutils patch[3] have been
merged into binutils 2.20.1, so, it's time to upstream this patchset now.
without this patch, the machines will hang when the instruction sequence hit
the Out-of-order Issue of Loongson-2F, therefore, this patchset is very urgent
for both 2.6.33 and 2.6.34.

[1] Chinese Version: http://www.loongson.cn/uploadfile/file/20080821113149.pdf
[2] English Version of Chapter 15:
http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source
[3] http://sourceware.org/ml/binutils/2009-11/msg00387.html 

Regards,
 	Wu Zhangjin

Wu Zhangjin (3):
  Loongson-2F: Flush the branch target history such as BTB and RAS
  Loongson-2F: Enable fixups of binutils 2.20.1
  Loongson-2F: Fixup of problems introduced by -mfix-loongson2f-jump of
    binutils 2.20.1

 arch/mips/Makefile                 |    4 +++-
 arch/mips/include/asm/stackframe.h |   19 +++++++++++++++++++
 arch/mips/loongson/common/reset.c  |   12 +++++++++++-
 3 files changed, 33 insertions(+), 2 deletions(-)


From wuzhangjin@gmail.com Tue Mar  9 18:19:42 2010
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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>, Greg KH <gregkh@suse.de>
Cc:     linux-mips@linux-mips.org, linux-kernel@vger.kernel.org,
        Wu Zhangjin <wuzhangjin@gmail.com>
Subject: [PATCH 1/3] Loongson-2F: Flush the branch target history such as BTB and RAS
Date:   Wed, 10 Mar 2010 01:12:31 +0800
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From: Wu Zhangjin <wuzhangjin@gmail.com>

As the Chapter 15: "Errata: Issue of Out-of-order in loongson"[1] shows, to
workaround the Issue of Loongson-2Fï¼ŒWe need to do:

"When switching from user model to kernel model, you should flush the branch
target history such as BTB and RAS."

This patch did clear BTB(branch target buffer), forbid RAS(row address strobe)
via Loongson-2F's 64bit diagnostic register.

[1] Chinese Version: http://www.loongson.cn/uploadfile/file/200808211
[2] English Version of Chapter 15:
http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
---
 arch/mips/include/asm/stackframe.h |   19 +++++++++++++++++++
 1 files changed, 19 insertions(+), 0 deletions(-)

diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
index 3b6da33..b84cfda 100644
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -121,6 +121,25 @@
 		.endm
 #else
 		.macro	get_saved_sp	/* Uniprocessor variation */
+#ifdef CONFIG_CPU_LOONGSON2F
+		/*
+		 * Clear BTB(branch target buffer), forbid RAS(row address
+		 * strobe) to workaround the Out-of-oder Issue in Loongson2F
+		 * via it's diagnostic register.
+		 */
+		move k0, ra
+		jal	1f
+		nop
+1:		jal	1f
+		nop
+1:		jal	1f
+		nop
+1:		jal	1f
+		nop
+1:		move	ra, k0
+		li	k0, 3
+		mtc0	k0, $22
+#endif /* CONFIG_CPU_LOONGSON2F */
 #if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
 		lui	k1, %hi(kernelsp)
 #else
-- 
1.7.0.1


From wuzhangjin@gmail.com Tue Mar  9 18:20:08 2010
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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>, Greg KH <gregkh@suse.de>
Cc:     linux-mips@linux-mips.org, linux-kernel@vger.kernel.org,
        Wu Zhangjin <wuzhangjin@gmail.com>,
        Zhang Le <r0bertz@gentoo.org>, Wu Zhangjin <wuzj@lemote.com>
Subject: [PATCH 2/3] Loongson-2F: Enable fixups of binutils 2.20.1
Date:   Wed, 10 Mar 2010 01:12:32 +0800
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From: Wu Zhangjin <wuzhangjin@gmail.com>

As the "Fixups of Loongson2F" patch[1] to binutils have been applied
into binutils 2.20.1. It's time to enable the options provided by the
patch to compile the kernel.

Without these fixups, the system will hang unexpectedly for the bug of
processor.

To learn more about these fixups, please refer to the following
references.

[1] "Fixups of Loongson2F" patch for binutils(actually for gas)
http://sourceware.org/ml/binutils/2009-11/msg00387.html
[2] Chapter 15 of "Loongson2F User Manual"(Chinese Version)
http://www.loongson.cn/uploadfile/file/200808211
[3] English Version of the above chapter 15
http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source

Signed-off-by: Zhang Le <r0bertz@gentoo.org>
Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
---
 arch/mips/Makefile |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 2f2eac2..5ae342e 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -135,7 +135,9 @@ cflags-$(CONFIG_CPU_LOONGSON2)	+= -Wa,--trap
 cflags-$(CONFIG_CPU_LOONGSON2E) += \
 	$(call cc-option,-march=loongson2e,-march=r4600)
 cflags-$(CONFIG_CPU_LOONGSON2F) += \
-	$(call cc-option,-march=loongson2f,-march=r4600)
+	$(call cc-option,-march=loongson2f,-march=r4600) \
+	$(call as-option,-Wa$(comma)-mfix-loongson2f-nop,) \
+	$(call as-option,-Wa$(comma)-mfix-loongson2f-jump,)
 
 cflags-$(CONFIG_CPU_MIPS32_R1)	+= $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
 			-Wa,-mips32 -Wa,--trap
-- 
1.7.0.1


From wuzhangjin@gmail.com Tue Mar  9 18:20:32 2010
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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>, Greg KH <gregkh@suse.de>
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        Wu Zhangjin <wuzhangjin@gmail.com>
Subject: [PATCH 3/3] Loongson-2F: Fixup of problems introduced by -mfix-loongson2f-jump of binutils 2.20.1
Date:   Wed, 10 Mar 2010 01:12:33 +0800
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From: Wu Zhangjin <wuzhangjin@gmail.com>

The -mfix-loongson2f-jump option provided by the binutils 2.20.1 have fixed the
Out-of-order Issue of Loongson-2F described in Chapter 15 of "Loongson2F User
Manual"[1,2], but introduced some problems.

The option changes all of the jumping target to "addr & 0xcfffffff" through the
at($1) register, but for the REBOOT address of loongson-2F: 0xbfc00000, this is
totally wrong, so, this patch try to avoid the problem via telling the
assembler not to use at($1) register.

[1] Loongson2F User Manual(Chinese Version)
http://www.loongson.cn/uploadfile/file/200808211
[2] English Version of Chapter 15:
http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source

Reported-and-tested-by: Liu Shiwei <liushiwei@gmail.com>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
---
 arch/mips/loongson/common/reset.c |   12 +++++++++++-
 1 files changed, 11 insertions(+), 1 deletions(-)

diff --git a/arch/mips/loongson/common/reset.c b/arch/mips/loongson/common/reset.c
index 4bd9c18..d5f1a50 100644
--- a/arch/mips/loongson/common/reset.c
+++ b/arch/mips/loongson/common/reset.c
@@ -21,8 +21,18 @@ static void loongson_restart(char *command)
 	/* do preparation for reboot */
 	mach_prepare_reboot();
 
-	/* reboot via jumping to boot base address */
+	/* reboot via jumping to boot base address
+	 *
+	 * ".set noat" and ".set at" are used to ensure the address not broken
+	 * by the -mfix-loongson2f-jump option provided by binutils 2.20.1 and
+	 * higher which try to change the jumping address to "addr &
+	 * 0xcfffffff" via the at($1) register, this is totally wrong for
+	 * 0xbfc00000(LOONGSON_BOOT_BASE).
+	 */
+
+	__asm__ __volatile__(".set noat\n");
 	((void (*)(void))ioremap_nocache(LOONGSON_BOOT_BASE, 4)) ();
+	__asm__ __volatile__(".set at\n");
 }
 
 static void loongson_poweroff(void)
-- 
1.7.0.1


From ralf@linux-mips.org Tue Mar  9 20:03:13 2010
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From:   Ralf Baechle <ralf@linux-mips.org>
To:     Yang Shi <yang.shi@windriver.com>
Cc:     ddaney@caviumnetworks.com, linux-mips@linux-mips.org
Subject: Re: [PATCH] MIPS: Octeon: Fix wrong variable type in smp.c
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On Tue, Mar 09, 2010 at 02:24:22PM +0800, Yang Shi wrote:

> Change cvmx_ciu_wdogx_t type to "union cvmx_ciu_wdogx".
> 
> Signed-off-by: Yang Shi <yang.shi@windriver.com>
> ---
>  arch/mips/cavium-octeon/smp.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c
> index 51e9802..52d61ba 100644
> --- a/arch/mips/cavium-octeon/smp.c
> +++ b/arch/mips/cavium-octeon/smp.c
> @@ -281,7 +281,7 @@ static void octeon_cpu_die(unsigned int cpu)
>  
>  #ifdef CONFIG_CAVIUM_OCTEON_WATCHDOG
>  	/* Disable the watchdog */
> -	cvmx_ciu_wdogx_t ciu_wdog;
> +	union cvmx_ciu_wdogx ciu_wdog;
>  	ciu_wdog.u64 = cvmx_read_csr(CVMX_CIU_WDOGX(cpu));
>  	ciu_wdog.s.mode = 0;
>  	cvmx_write_csr(CVMX_CIU_WDOGX(cpu), ciu_wdog.u64);

David,

I think this ifdef should be replaced by a notifier called from
__cpu_die().

  Ralf

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Subject: Re: [PATCH] MIPS: Octeon: Fix wrong variable type in smp.c
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On Tue, Mar 09, 2010 at 08:03:09PM +0100, Ralf Baechle wrote:

> > @@ -281,7 +281,7 @@ static void octeon_cpu_die(unsigned int cpu)
> >  
> >  #ifdef CONFIG_CAVIUM_OCTEON_WATCHDOG
> >  	/* Disable the watchdog */
> > -	cvmx_ciu_wdogx_t ciu_wdog;
> > +	union cvmx_ciu_wdogx ciu_wdog;
> >  	ciu_wdog.u64 = cvmx_read_csr(CVMX_CIU_WDOGX(cpu));
> >  	ciu_wdog.s.mode = 0;
> >  	cvmx_write_csr(CVMX_CIU_WDOGX(cpu), ciu_wdog.u64);
> 
> David,
> 
> I think this ifdef should be replaced by a notifier called from
> __cpu_die().

Since this is unused I'll just remove it for now.

  Ralf

From post@pfrst.de Tue Mar  9 22:03:46 2010
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Hi Florian, thats funny!

On Tue, 9 Mar 2010, Florian Fainelli wrote:

  > Date: Tue, 9 Mar 2010 15:46:01 +0100
  > From: Florian Fainelli <florian@openwrt.org>
  > To: linux-mips@linux-mips.org
  > Cc: ralf@linux-mips.org
  > Subject: [PATCH] MIPS: make CAC_ADDR and UNCAC_ADDR account for
  >     PHYS_OFFSET
  > 
  > On AR7, ...
  > 
  > Signed-off-by: Regards, Florian Fainelli <florian@openwrt.org>
  > ---
  > diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h
  > index ac32572..7b11df5 100644
  > --- a/arch/mips/include/asm/page.h
  > +++ b/arch/mips/include/asm/page.h
  > @@ -188,8 +188,10 @@ typedef struct { unsigned long pgprot; } pgprot_t;
  >  #define VM_DATA_DEFAULT_FLAGS	(VM_READ | VM_WRITE | VM_EXEC | \
  >  				 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
  >  
  > -#define UNCAC_ADDR(addr)	((addr) - PAGE_OFFSET + UNCAC_BASE)
  > -#define CAC_ADDR(addr)		((addr) - UNCAC_BASE + PAGE_OFFSET)
  > +#define UNCAC_ADDR(addr)	((addr) - PAGE_OFFSET + UNCAC_BASE + 	\
  > +								PHYS_OFFSET)
  > +#define CAC_ADDR(addr)		((addr) - UNCAC_BASE + PAGE_OFFSET +	\
  > +								PHYS_OFFSET)
  >  
  >  #include <asm-generic/memory_model.h>
  >  #include <asm-generic/getorder.h>
  > 

I assume, you don't want "+" PHYS_OFFSET in both defines.

Two years and a month ago almost the same patch (which used to work on
the machine that needed it :) was submitted:

  --- a/linux-2.6.24/include/asm-mips/page.h	Fri Jan 25 12:23:51 2008
  +++ b/linux-2.6.24/include/asm-mips/page.h	Wed Feb  6 23:26:31 2008
  @@ -184,8 +184,8 @@
   #define VM_DATA_DEFAULT_FLAGS	(VM_READ | VM_WRITE | VM_EXEC | \
   				 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
  
  -#define UNCAC_ADDR(addr)	((addr) - PAGE_OFFSET + UNCAC_BASE)
  -#define CAC_ADDR(addr)		((addr) - UNCAC_BASE + PAGE_OFFSET)
  +#define UNCAC_ADDR(addr)	((addr) - PAGE_OFFSET + PHYS_OFFSET + UNCAC_BASE)
  +#define CAC_ADDR(addr)		((addr) - UNCAC_BASE + PAGE_OFFSET - PHYS_OFFSET)
  
   #include <asm-generic/memory_model.h>
   #include <asm-generic/page.h>

But correct versions of these macros seem to be essential for very
"exotic" systems only ;-)


kind regards

peter



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From:   Florian Fainelli <florian@openwrt.org>
Reply-To: Florian Fainelli <florian@openwrt.org>
To:     peter fuerst <post@pfrst.de>
Subject: Re: [PATCH] MIPS: make CAC_ADDR and UNCAC_ADDR account for PHYS_OFFSET
Date:   Tue, 9 Mar 2010 22:23:46 +0100
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Le mardi 9 mars 2010 22:03:27, peter fuerst a =E9crit :
> Hi Florian, thats funny!
>=20
> On Tue, 9 Mar 2010, Florian Fainelli wrote:
>   > Date: Tue, 9 Mar 2010 15:46:01 +0100
>   > From: Florian Fainelli <florian@openwrt.org>
>   > To: linux-mips@linux-mips.org
>   > Cc: ralf@linux-mips.org
>   > Subject: [PATCH] MIPS: make CAC_ADDR and UNCAC_ADDR account for
>   >     PHYS_OFFSET
>   >
>   > On AR7, ...
>   >
>   > Signed-off-by: Regards, Florian Fainelli <florian@openwrt.org>
>   > ---
>   > diff --git a/arch/mips/include/asm/page.h
>   > b/arch/mips/include/asm/page.h index ac32572..7b11df5 100644
>   > --- a/arch/mips/include/asm/page.h
>   > +++ b/arch/mips/include/asm/page.h
>   > @@ -188,8 +188,10 @@ typedef struct { unsigned long pgprot; } pgprot_=
t;
>   >  #define VM_DATA_DEFAULT_FLAGS	(VM_READ | VM_WRITE | VM_EXEC | \
>   >  				 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
>   >
>   > -#define UNCAC_ADDR(addr)	((addr) - PAGE_OFFSET + UNCAC_BASE)
>   > -#define CAC_ADDR(addr)		((addr) - UNCAC_BASE + PAGE_OFFSET)
>   > +#define UNCAC_ADDR(addr)	((addr) - PAGE_OFFSET + UNCAC_BASE + 	\
>   > +								PHYS_OFFSET)
>   > +#define CAC_ADDR(addr)		((addr) - UNCAC_BASE + PAGE_OFFSET +	\
>   > +								PHYS_OFFSET)
>   >
>   >  #include <asm-generic/memory_model.h>
>   >  #include <asm-generic/getorder.h>
>=20
> I assume, you don't want "+" PHYS_OFFSET in both defines.
>=20
> Two years and a month ago almost the same patch (which used to work on
> the machine that needed it :) was submitted:

Oh I actually did even search for that one.

>=20
>   --- a/linux-2.6.24/include/asm-mips/page.h	Fri Jan 25 12:23:51 2008
>   +++ b/linux-2.6.24/include/asm-mips/page.h	Wed Feb  6 23:26:31 2008
>   @@ -184,8 +184,8 @@
>    #define VM_DATA_DEFAULT_FLAGS	(VM_READ | VM_WRITE | VM_EXEC | \
>    				 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
>=20
>   -#define UNCAC_ADDR(addr)	((addr) - PAGE_OFFSET + UNCAC_BASE)
>   -#define CAC_ADDR(addr)		((addr) - UNCAC_BASE + PAGE_OFFSET)
>   +#define UNCAC_ADDR(addr)	((addr) - PAGE_OFFSET + PHYS_OFFSET +
>  UNCAC_BASE) +#define CAC_ADDR(addr)		((addr) - UNCAC_BASE + PAGE_OFFSET -
>  PHYS_OFFSET)
>=20
>    #include <asm-generic/memory_model.h>
>    #include <asm-generic/page.h>
>=20
> But correct versions of these macros seem to be essential for very
> "exotic" systems only ;-)

You are right. This is actually needed when people do weird designs, and th=
at=20
happens ;) Will resubmit with the proper fixing.
=2D- =20
Best regards, Florian Fainelli
Email: florian@openwrt.org
Web: http://openwrt.org
IRC: [florian] on irc.freenode.net
=2D------------------------------

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From ralf@linux-mips.org Wed Mar 10 00:29:38 2010
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From:   Ralf Baechle <ralf@linux-mips.org>
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Subject: Re: [PATCH] MIPS: Octeon: Remove vestiges of
 CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB
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On Wed, Mar 03, 2010 at 11:07:07AM -0800, David Daney wrote:

> The config option CAVIUM_RESERVE32_USE_WIRED_TLB is not supported.
> Remove the dead code controlled by it.

Thanks, applied.

  Ralf

From ralf@linux-mips.org Wed Mar 10 00:50:06 2010
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On Wed, Mar 03, 2010 at 11:07:43AM -0800, David Daney wrote:

> Signed-off-by: David Daney <ddaney@caviumnetworks.com>

Applied.  Thanks,

  Ralf

From yuasa.linux@gmail.com Wed Mar 10 07:58:09 2010
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Date:   Wed, 10 Mar 2010 15:57:56 +0900
From:   Yoichi Yuasa <yuasa@linux-mips.org>
To:     Dominik Brodowski <linux@dominikbrodowski.net>
Cc:     yuasa@linux-mips.org, linux-pcmcia@lists.infradead.org,
        Ralf Baechle <ralf@linux-mips.org>,
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Subject: [PATCH] pcmcia/vrc4171: use local spinlock for device local lock.
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struct pcmcia_socket lock had been used before.

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
---
 drivers/pcmcia/vrc4171_card.c |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/pcmcia/vrc4171_card.c b/drivers/pcmcia/vrc4171_card.c
index c9fcbdc..aaccdb9 100644
--- a/drivers/pcmcia/vrc4171_card.c
+++ b/drivers/pcmcia/vrc4171_card.c
@@ -105,6 +105,7 @@ typedef struct vrc4171_socket {
 	char name[24];
 	int csc_irq;
 	int io_irq;
+	spinlock_t lock;
 } vrc4171_socket_t;
 
 static vrc4171_socket_t vrc4171_sockets[CARD_MAX_SLOTS];
@@ -327,7 +328,7 @@ static int pccard_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
 	slot = sock->sock;
 	socket = &vrc4171_sockets[slot];
 
-	spin_lock_irq(&sock->lock);
+	spin_lock_irq(&socket->lock);
 
 	voltage = set_Vcc_value(state->Vcc);
 	exca_write_byte(slot, CARD_VOLTAGE_SELECT, voltage);
@@ -370,7 +371,7 @@ static int pccard_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
 		cscint |= I365_CSC_DETECT;
         exca_write_byte(slot, I365_CSCINT, cscint);
 
-	spin_unlock_irq(&sock->lock);
+	spin_unlock_irq(&socket->lock);
 
 	return 0;
 }
-- 
1.7.0.2


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From:   Florian Fainelli <florian@openwrt.org>
Date:   Wed, 10 Mar 2010 09:51:09 +0100
Subject: [PATCH v2] MIPS: make CAC_ADDR and UNCAC_ADDR account for PHYS_OFFSET
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On AR7, we already redefine PHYS_OFFSET to match the system specifities, it is
however not sufficient when unsing dma_{map,unmap}_single, specifically in the
Ethernet driver, we must also adjust CAC_ADDR and UNCAC_ADDR for DMA to work
correctly. This patch fixes the following issue, seen in cpmac_open:

ops[#1]:
Cpu 0
$ 0   : 00000000 10008400 a0f5b120 00000000
$ 4   : 94c59000 94270f64 00000020 00000010
$ 8   : 00000010 94103ce0 0000000a 94c03400
$12   : ffffffff 94c03408 94c03410 00000001
$16   : a0f5ba20 00000041 94c592c0 94c59200
$20   : 94c59000 000005ee 00002000 9438c8f0
$24   : 00000010 00000000
$28   : 94fac000 94fadd58 94390000 942724a8
Hi    : 00000000
Lo    : 00000001
epc   : 94272518 cpmac_open+0x208/0x3f8
    Not tainted
ra    : 942724a8 cpmac_open+0x198/0x3f8
Status: 10008403    KERNEL EXL IE
Cause : 3080000c
BadVA : 00000000
PrId  : 00018448 (MIPS 4KEc)
Modules linked in:
Process ifconfig (pid: 278, threadinfo=94fac000, task=94e79590, tls=00000000)
Stack : 7f8da120 2ab05cb0 94c59000 943356f0 00000000 943d0000 94c59000 943356f0
        94c59030 943d0000 943c27c0 94fade10 00000000 94fade20 94c59000 9428e5a4
        00000000 94c59000 00000041 94289768 94c59000 00000041 00001002 00001043
        00000000 9428d810 00000000 94fade10 7f8da4e8 9428e6b8 00000000 7f8da4a8
        7f8da4e8 00008914 00000000 942f7f2c 00000000 00000008 00408000 00008913
        ...
Call Trace:
[<94272518>] cpmac_open+0x208/0x3f8
[<9428e5a4>] dev_open+0x164/0x264
[<9428d810>] dev_change_flags+0xd0/0x1bc
[<942f7f2c>] devinet_ioctl+0x2d8/0x908
[<942771f8>] sock_ioctl+0x29c/0x2fc
[<941a0fb4>] vfs_ioctl+0x2c/0x7c
[<941a16ec>] do_vfs_ioctl+0x5dc/0x630
[<941a1790>] sys_ioctl+0x50/0x88
[<94101e10>] stack_done+0x20/0x3c

Signed-off-by: peter fuerst <post@pfrst.de>
Signed-off-by: Regards, Florian Fainelli <florian@openwrt.org>
---
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h
index ac32572..a16beaf 100644
--- a/arch/mips/include/asm/page.h
+++ b/arch/mips/include/asm/page.h
@@ -188,8 +188,10 @@ typedef struct { unsigned long pgprot; } pgprot_t;
 #define VM_DATA_DEFAULT_FLAGS	(VM_READ | VM_WRITE | VM_EXEC | \
 				 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 
-#define UNCAC_ADDR(addr)	((addr) - PAGE_OFFSET + UNCAC_BASE)
-#define CAC_ADDR(addr)		((addr) - UNCAC_BASE + PAGE_OFFSET)
+#define UNCAC_ADDR(addr)	((addr) - PAGE_OFFSET + UNCAC_BASE + 	\
+								PHYS_OFFSET)
+#define CAC_ADDR(addr)		((addr) - UNCAC_BASE + PAGE_OFFSET -	\
+								PHYS_OFFSET)
 
 #include <asm-generic/memory_model.h>
 #include <asm-generic/getorder.h>




From sshtylyov@mvista.com Wed Mar 10 11:45:12 2010
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Date:   Wed, 10 Mar 2010 13:44:37 +0300
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To:     Wu Zhangjin <wuzhangjin@gmail.com>
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        linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] Loongson-2F: Flush the branch target history such
 as BTB and RAS
References: <cover.1268153722.git.wuzhangjin@gmail.com> <d513f16856e499e82f0b4e428c97fe06afb5a426.1268153722.git.wuzhangjin@gmail.com>
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Hello.

Wu Zhangjin wrote:

> From: Wu Zhangjin <wuzhangjin@gmail.com>
>
> As the Chapter 15: "Errata: Issue of Out-of-order in loongson"[1] shows, to
> workaround the Issue of Loongson-2Fï¼ŒWe need to do:
>
> "When switching from user model to kernel model, you should flush the branch
> target history such as BTB and RAS."
>
> This patch did clear BTB(branch target buffer), forbid RAS(row address strobe)
> via Loongson-2F's 64bit diagnostic register.
>
> [1] Chinese Version: http://www.loongson.cn/uploadfile/file/200808211
> [2] English Version of Chapter 15:
> http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source
>
> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
> ---
>  arch/mips/include/asm/stackframe.h |   19 +++++++++++++++++++
>  1 files changed, 19 insertions(+), 0 deletions(-)
>
> diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
> index 3b6da33..b84cfda 100644
> --- a/arch/mips/include/asm/stackframe.h
> +++ b/arch/mips/include/asm/stackframe.h
> @@ -121,6 +121,25 @@
>  		.endm
>  #else
>  		.macro	get_saved_sp	/* Uniprocessor variation */
> +#ifdef CONFIG_CPU_LOONGSON2F
> +		/*
> +		 * Clear BTB(branch target buffer), forbid RAS(row address
> +		 * strobe)

   No spaces before the left paren...

>  to workaround the Out-of-oder Issue in Loongson2F
> +		 * via it's diagnostic register.
>   

   Only "its".

> +		 */
> +		move k0, ra
>   

   Operands misalined...

WBR, Sergei


From wuzhangjin@gmail.com Wed Mar 10 16:30:43 2010
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Subject: Re: [PATCH 1/3] Loongson-2F: Flush the branch target history such
 as BTB and RAS
From:   Wu Zhangjin <wuzhangjin@gmail.com>
Reply-To: wuzhangjin@gmail.com
To:     Sergei Shtylyov <sshtylyov@mvista.com>
Cc:     Ralf Baechle <ralf@linux-mips.org>, Greg KH <gregkh@suse.de>,
        linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
In-Reply-To: <4B977815.4000703@ru.mvista.com>
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         <d513f16856e499e82f0b4e428c97fe06afb5a426.1268153722.git.wuzhangjin@gmail.com>
         <4B977815.4000703@ru.mvista.com>
Content-Type: text/plain; charset="UTF-8"
Organization: DSLab, Lanzhou University, China
Date:   Wed, 10 Mar 2010 23:24:04 +0800
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Hi,

Thanks very much for your careful review, will resend a new one later.

Regards,
	Wu Zhangjin

On Wed, 2010-03-10 at 13:44 +0300, Sergei Shtylyov wrote:
[...]
> > diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
> > index 3b6da33..b84cfda 100644
> > --- a/arch/mips/include/asm/stackframe.h
> > +++ b/arch/mips/include/asm/stackframe.h
> > @@ -121,6 +121,25 @@
> >  		.endm
> >  #else
> >  		.macro	get_saved_sp	/* Uniprocessor variation */
> > +#ifdef CONFIG_CPU_LOONGSON2F
> > +		/*
> > +		 * Clear BTB(branch target buffer), forbid RAS(row address
> > +		 * strobe)
> 
>    No spaces before the left paren...
> 
> >  to workaround the Out-of-oder Issue in Loongson2F
> > +		 * via it's diagnostic register.
> >   
> 
>    Only "its".
> 
> > +		 */
> > +		move k0, ra
> >   
> 
>    Operands misalined...
> 
> WBR, Sergei
> 
> 



From ralf@linux-mips.org Wed Mar 10 16:33:23 2010
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From:   Ralf Baechle <ralf@linux-mips.org>
To:     David Daney <ddaney@caviumnetworks.com>
Cc:     Yang Shi <yang.shi@windriver.com>, linux-mips@linux-mips.org
Subject: Re: [PATCH] MIPS: Protect current_cpu_data with preempt disable in
 delay()
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On Thu, Mar 04, 2010 at 10:23:47AM -0800, David Daney wrote:

> On 03/04/2010 01:39 AM, Yang Shi wrote:
> >During machine restart with reboot command, get the following
> >bug info:
> >
> >BUG: using smp_processor_id() in preemptible [00000000] code: reboot/1989
> >caller is __udelay+0x14/0x70
> >Call Trace:
> >[<ffffffff8110ad28>] dump_stack+0x8/0x34
> >[<ffffffff812dde04>] debug_smp_processor_id+0xf4/0x110
> >[<ffffffff812d90bc>] __udelay+0x14/0x70
> >[<ffffffff81378274>] md_notify_reboot+0x12c/0x148
> >[<ffffffff81161054>] notifier_call_chain+0x64/0xc8
> >[<ffffffff811614dc>] __blocking_notifier_call_chain+0x64/0xc0
> >[<ffffffff8115566c>] kernel_restart_prepare+0x1c/0x38
> >[<ffffffff811556cc>] kernel_restart+0x14/0x50
> >[<ffffffff8115581c>] SyS_reboot+0x10c/0x1f0
> >[<ffffffff81103684>] handle_sysn32+0x44/0x84
> >
> >The root cause is that current_cpu_data is accessed in preemptible
> >context, so protect it with preempt_disable/preempt_enable pair
> >in delay().
> >
> >Signed-off-by: Yang Shi<yang.shi@windriver.com>
> >---
> >  arch/mips/lib/delay.c |    6 +++++-
> >  1 files changed, 5 insertions(+), 1 deletions(-)
> >
> >diff --git a/arch/mips/lib/delay.c b/arch/mips/lib/delay.c
> >index 6b3b1de..dc38064 100644
> >--- a/arch/mips/lib/delay.c
> >+++ b/arch/mips/lib/delay.c
> >@@ -41,7 +41,11 @@ EXPORT_SYMBOL(__delay);
> >
> >  void __udelay(unsigned long us)
> >  {
> >-	unsigned int lpj = current_cpu_data.udelay_val;
> >+	unsigned int lpj;
> >+
> >+	preempt_disable();
> >+	lpj = current_cpu_data.udelay_val;
> >+	preempt_enable();
> >
> >  	__delay((us * 0x000010c7ull * HZ * lpj)>>  32);
> >  }
> 
> This doesn't seem like the best approach.
> 
> Perhaps we should either use raw_current_cpu_data and no
> preempt_disable(), or if we are concerned about migrating to a CPU
> with a different lpj value, move the preempt_enable after the call
> to __delay().

Udelay() is supposed to guarantee a minimum delay and when being migrated
to another CPU with higher bogomips this guarantee might be violated.  So
it'd even have to be something like:

void __udelay(unsigned long us)
{
	unsigned int lpj = current_cpu_data.udelay_val;
	unsigned int lpj;

	preempt_disable();
	lpj = current_cpu_data.udelay_val;

	__delay((us * 0x000010c7ull * HZ * lpj)>>  32);
	preempt_enable();
}

But preempt_disable() itself is not atomic, so using it from bh or irq
context could result in a corrupted preemption counter.  So the raw_
version will have to do.  I doubt it's much of a problem but at some
point we will have to revisit the delay by c0_count patch submitted a
while ago.  The patch wasn't right but the problem it was addressing
is real.

  Ralf

From wuzhangjin@gmail.com Wed Mar 10 16:48:13 2010
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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     linux-mips@linux-mips.org, Wu Zhangjin <wuzhangjin@gmail.com>
Subject: [PATCH] Loongson: Lemote-2F: Fixup of _rdmsr and _wrmsr
Date:   Wed, 10 Mar 2010 23:41:34 +0800
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From: Wu Zhangjin <wuzhangjin@gmail.com>

The _rdmsr, _wrmsr operation must be atomic to ensure the accessing to msr
address is what we want.

Without this patch, in some cases, the reboot operation(fs2f_reboot) defined in
arch/mips/loongson/lemote-2f/reset.c may fail for it called _rdmsr, _wrmsr but
may be interrupted/preempted by the other related operations and make the
_rdmsr get the wrong value or make the _wrmsr write a wrong value to an
unexpected target.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
---
 arch/mips/pci/ops-loongson2.c |    9 +++++++++
 1 files changed, 9 insertions(+), 0 deletions(-)

diff --git a/arch/mips/pci/ops-loongson2.c b/arch/mips/pci/ops-loongson2.c
index 2bb4057..1f93dfb 100644
--- a/arch/mips/pci/ops-loongson2.c
+++ b/arch/mips/pci/ops-loongson2.c
@@ -180,15 +180,20 @@ struct pci_ops loongson_pci_ops = {
 };
 
 #ifdef CONFIG_CS5536
+DEFINE_SPINLOCK(msr_lock);
 void _rdmsr(u32 msr, u32 *hi, u32 *lo)
 {
 	struct pci_bus bus = {
 		.number = PCI_BUS_CS5536
 	};
 	u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
+	unsigned long flags;
+
+	spin_lock_irqsave(&msr_lock, flags);
 	loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
 	loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
 	loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
+	spin_unlock_irqrestore(&msr_lock, flags);
 }
 EXPORT_SYMBOL(_rdmsr);
 
@@ -198,9 +203,13 @@ void _wrmsr(u32 msr, u32 hi, u32 lo)
 		.number = PCI_BUS_CS5536
 	};
 	u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
+	unsigned long flags;
+
+	spin_lock_irqsave(&msr_lock, flags);
 	loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
 	loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
 	loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
+	spin_unlock_irqrestore(&msr_lock, flags);
 }
 EXPORT_SYMBOL(_wrmsr);
 #endif
-- 
1.7.0.1


From ralf@linux-mips.org Wed Mar 10 17:04:47 2010
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From:   Ralf Baechle <ralf@linux-mips.org>
To:     Manuel Lauss <manuel.lauss@googlemail.com>
Cc:     Linux-MIPS <linux-mips@linux-mips.org>,
        Manuel Lauss <manuel.lauss@gmail.com>
Subject: Re: [PATCH] MIPS: Alchemy: sleepcode without compile-time cputype
 dependencies
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On Mon, Mar 08, 2010 at 08:22:59PM +0100, Manuel Lauss wrote:

> Split the low-level sleepcode into per-memory-controller-generation
> functions and figure out which one to call at runtime instead of
> relying on compile-time-defined cpu types.
> 
> Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>

Thanks, queued for 2.6.35.

  Ralf

From ralf@linux-mips.org Wed Mar 10 17:13:15 2010
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        Manuel Lauss <mano@roarinelk.homelinux.net>,
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Subject: Re: [RFC PATCH] MIPS: Alchemy: add sysdev for both irq controllers
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On Mon, Mar 08, 2010 at 08:23:00PM +0100, Manuel Lauss wrote:

> From: Manuel Lauss <mano@roarinelk.homelinux.net>
> 
> Use a sysdev to implement PM methods for the Au1000 interrupt controllers.
> 
> Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
> ---
> Works on DB1200, not sure though whether this is the correct approach. 
> Applies cleanly only on top of "sleepcode-without-compile-time-cputype"
> patch.

At a quick glance this looks good but since you marked your patch as RFC
I'll do the same in patchwork (http://patchwork.linux-mips.org/patch/1039/)
until you ask me to queue it or resubmit.

Thanks,

  Ralf

From ralf@linux-mips.org Wed Mar 10 17:48:29 2010
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From:   Ralf Baechle <ralf@linux-mips.org>
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        Linux-MIPS <linux-mips@linux-mips.org>,
        Manuel Lauss <manuel.lauss@gmail.com>
Subject: Re: [PATCH] MIPS: Alchemy: move MMC driver registration to board
 code.
Message-ID: <20100310164824.GC15118@linux-mips.org>
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On Tue, Mar 09, 2010 at 01:03:51PM +0100, Manuel Lauss wrote:

> And on a personal note, that file just bothers me.  It's messy, can
> cause merge conflicts,

Eye cancer.

> it references structures defined inside board-specific code. In short,
> it just plain annoys
> my sense of aesthetics.

Indeed - and I don't think Sergej disagrees with that.  I agree with him
that device registration code should primarily be done in the SOC code -
but you'll need to somehow get that code to communicate with the platform
code about what really needs to be done then register the remainder of
the truely platform-specific platform devices.  Something like that.

  Ralf

From rollercow@sucs.org Wed Mar 10 18:50:32 2010
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Dear all,

The Swansea University Computer Society has been given an SGI Onxy4. We
would very much like to get Linux running on it but don't have any local
people with both the skills and time.

Would anyone be interested in helping to port Linux to it?

If so please let me know off list!

Many thanks!

--
Chris Jones, SUCS Admin
http://sucs.org

From manuel.lauss@googlemail.com Wed Mar 10 19:34:08 2010
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Date:   Wed, 10 Mar 2010 19:34:00 +0100
Message-ID: <f861ec6f1003101034u25d2acdcjd6dedc4c2221037e@mail.gmail.com>
Subject: Re: [PATCH] MIPS: Alchemy: move MMC driver registration to board 
        code.
From:   Manuel Lauss <manuel.lauss@googlemail.com>
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     Sergei Shtylyov <sshtylyov@mvista.com>,
        Linux-MIPS <linux-mips@linux-mips.org>,
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On Wed, Mar 10, 2010 at 5:48 PM, Ralf Baechle <ralf@linux-mips.org> wrote:
> On Tue, Mar 09, 2010 at 01:03:51PM +0100, Manuel Lauss wrote:
>
>> And on a personal note, that file just bothers me.  It's messy, can
>> cause merge conflicts,
>
> Eye cancer.
>
>> it references structures defined inside board-specific code. In short,
>> it just plain annoys
>> my sense of aesthetics.
>
> Indeed - and I don't think Sergej disagrees with that.  I agree with him
> that device registration code should primarily be done in the SOC code -

For things like fixed internal interrupts, sure.  But for pieces that depend
on where the (and which) chip is used, not so much.

By this logic there should be tons of ifdefs in the interrupt tables for every
in-tree board.


> but you'll need to somehow get that code to communicate with the platform
> code about what really needs to be done then register the remainder of
> the truely platform-specific platform devices.  Something like that.

I prefer a simpler solution.

Manuel

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Date:   Wed, 10 Mar 2010 20:03:29 +0100
Message-ID: <f861ec6f1003101103k39ba8b1cn4f80ecfe486f77ed@mail.gmail.com>
Subject: Re: [RFC PATCH] MIPS: Alchemy: add sysdev for both irq controllers
From:   Manuel Lauss <manuel.lauss@googlemail.com>
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     Linux-MIPS <linux-mips@linux-mips.org>,
        Manuel Lauss <manuel.lauss@gmail.com>
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On Wed, Mar 10, 2010 at 5:13 PM, Ralf Baechle <ralf@linux-mips.org> wrote:
> On Mon, Mar 08, 2010 at 08:23:00PM +0100, Manuel Lauss wrote:
>
>> From: Manuel Lauss <mano@roarinelk.homelinux.net>
>>
>> Use a sysdev to implement PM methods for the Au1000 interrupt controllers.
>>
>> Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
>> ---
>> Works on DB1200, not sure though whether this is the correct approach.
>> Applies cleanly only on top of "sleepcode-without-compile-time-cputype"
>> patch.
>
> At a quick glance this looks good but since you marked your patch as RFC
> I'll do the same in patchwork (http://patchwork.linux-mips.org/patch/1039/)
> until you ask me to queue it or resubmit.

I'll resend a refined version.

Manuel

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References: <20100310155756.496e2bbf.yuasa@linux-mips.org>
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Hey,

On Wed, Mar 10, 2010 at 03:57:56PM +0900, Yoichi Yuasa wrote:
> struct pcmcia_socket lock had been used before.

Applied, thanks.

	Dominik

From David.Daney@caviumnetworks.com Thu Mar 11 01:18:05 2010
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Subject: Re: [PATCH] Loongson: Lemote-2F: Fixup of _rdmsr and _wrmsr
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On 03/10/2010 07:41 AM, Wu Zhangjin wrote:
> From: Wu Zhangjin<wuzhangjin@gmail.com>
>
> The _rdmsr, _wrmsr operation must be atomic to ensure the accessing to msr
> address is what we want.
>
> Without this patch, in some cases, the reboot operation(fs2f_reboot) defined in
> arch/mips/loongson/lemote-2f/reset.c may fail for it called _rdmsr, _wrmsr but
> may be interrupted/preempted by the other related operations and make the
> _rdmsr get the wrong value or make the _wrmsr write a wrong value to an
> unexpected target.
>
> Signed-off-by: Wu Zhangjin<wuzhangjin@gmail.com>
> ---
>   arch/mips/pci/ops-loongson2.c |    9 +++++++++
>   1 files changed, 9 insertions(+), 0 deletions(-)
>
> diff --git a/arch/mips/pci/ops-loongson2.c b/arch/mips/pci/ops-loongson2.c
> index 2bb4057..1f93dfb 100644
> --- a/arch/mips/pci/ops-loongson2.c
> +++ b/arch/mips/pci/ops-loongson2.c
> @@ -180,15 +180,20 @@ struct pci_ops loongson_pci_ops = {
>   };
>
>   #ifdef CONFIG_CS5536
> +DEFINE_SPINLOCK(msr_lock);


Should this be DEFINE_RAW_SPINLOCK instead?

David Daney


>   void _rdmsr(u32 msr, u32 *hi, u32 *lo)
>   {
>   	struct pci_bus bus = {
>   		.number = PCI_BUS_CS5536
>   	};
>   	u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
> +	unsigned long flags;
> +
> +	spin_lock_irqsave(&msr_lock, flags);
>   	loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
>   	loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
>   	loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
> +	spin_unlock_irqrestore(&msr_lock, flags);
>   }
>   EXPORT_SYMBOL(_rdmsr);
>
> @@ -198,9 +203,13 @@ void _wrmsr(u32 msr, u32 hi, u32 lo)
>   		.number = PCI_BUS_CS5536
>   	};
>   	u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
> +	unsigned long flags;
> +
> +	spin_lock_irqsave(&msr_lock, flags);
>   	loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
>   	loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
>   	loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
> +	spin_unlock_irqrestore(&msr_lock, flags);
>   }
>   EXPORT_SYMBOL(_wrmsr);
>   #endif


From ralf@linux-mips.org Thu Mar 11 01:53:05 2010
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From:   Ralf Baechle <ralf@linux-mips.org>
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Subject: Re: [PATCH 2/3] MIPS: Octeon: Remove redundant declaration of
 octeon_reserve32_memory
Message-ID: <20100311005247.GA18065@linux-mips.org>
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On Wed, Mar 03, 2010 at 10:25:49AM -0800, David Daney wrote:

> On 03/03/2010 12:43 AM, Yang Shi wrote:
> >In Octeon's setup.c, octeon_reserve32_memory is defined, so remove the
> >redundant extern declaration of this variable.
> >
> >Signed-off-by: Yang Shi<yang.shi@windriver.com>
> 
> Acked-by: David Daney <ddaney@caviumnetworks.com>
> 
> This looks good to me.  Thanks,
> David Daney

Applied, thanks.

  Ralf

From wuzhangjin@gmail.com Thu Mar 11 02:22:18 2010
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Subject: Re: [PATCH] Loongson: Lemote-2F: Fixup of _rdmsr and _wrmsr
From:   Wu Zhangjin <wuzhangjin@gmail.com>
Reply-To: wuzhangjin@gmail.com
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On Wed, 2010-03-10 at 16:17 -0800, David Daney wrote:
> On 03/10/2010 07:41 AM, Wu Zhangjin wrote:
> > From: Wu Zhangjin<wuzhangjin@gmail.com>
> >
> > The _rdmsr, _wrmsr operation must be atomic to ensure the accessing to msr
> > address is what we want.
> >
> > Without this patch, in some cases, the reboot operation(fs2f_reboot) defined in
> > arch/mips/loongson/lemote-2f/reset.c may fail for it called _rdmsr, _wrmsr but
> > may be interrupted/preempted by the other related operations and make the
> > _rdmsr get the wrong value or make the _wrmsr write a wrong value to an
> > unexpected target.
> >
> > Signed-off-by: Wu Zhangjin<wuzhangjin@gmail.com>
> > ---
> >   arch/mips/pci/ops-loongson2.c |    9 +++++++++
> >   1 files changed, 9 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/mips/pci/ops-loongson2.c b/arch/mips/pci/ops-loongson2.c
> > index 2bb4057..1f93dfb 100644
> > --- a/arch/mips/pci/ops-loongson2.c
> > +++ b/arch/mips/pci/ops-loongson2.c
> > @@ -180,15 +180,20 @@ struct pci_ops loongson_pci_ops = {
> >   };
> >
> >   #ifdef CONFIG_CS5536
> > +DEFINE_SPINLOCK(msr_lock);
> 
> 
> Should this be DEFINE_RAW_SPINLOCK instead?
> 

It should be, thanks!

Regards,
	Wu Zhangjin


From Yang.Shi@windriver.com Thu Mar 11 03:53:51 2010
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Subject: Re: [PATCH] MIPS: Octeon: Fix wrong variable type in smp.c
References: <1268115862-25976-1-git-send-email-yang.shi@windriver.com> <20100309190309.GA301@linux-mips.org> <20100309191750.GA1960@linux-mips.org>
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Ralf Baechle å†™é“:
> On Tue, Mar 09, 2010 at 08:03:09PM +0100, Ralf Baechle wrote:
>
>   
>>> @@ -281,7 +281,7 @@ static void octeon_cpu_die(unsigned int cpu)
>>>  
>>>  #ifdef CONFIG_CAVIUM_OCTEON_WATCHDOG
>>>  	/* Disable the watchdog */
>>> -	cvmx_ciu_wdogx_t ciu_wdog;
>>> +	union cvmx_ciu_wdogx ciu_wdog;
>>>  	ciu_wdog.u64 = cvmx_read_csr(CVMX_CIU_WDOGX(cpu));
>>>  	ciu_wdog.s.mode = 0;
>>>  	cvmx_write_csr(CVMX_CIU_WDOGX(cpu), ciu_wdog.u64);
>>>       
>> David,
>>
>> I think this ifdef should be replaced by a notifier called from
>> __cpu_die().
>>     
>
> Since this is unused I'll just remove it for now.
>   

This breaks kernel build when HOTPLUG_CPU is enabled.

Regards,
Yang

>   Ralf
>
>   


From wuzhangjin@gmail.com Thu Mar 11 04:04:22 2010
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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     linux-mips@linux-mips.org, David Daney <ddaney@caviumnetworks.com>,
        Wu Zhangjin <wuzhangjin@gmail.com>
Subject: [PATCH v2] Loongson: Lemote-2F: Fixup of _rdmsr and _wrmsr
Date:   Thu, 11 Mar 2010 10:57:33 +0800
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From: Wu Zhangjin <wuzhangjin@gmail.com>

Changes from the old version:
  o Using raw spinlock instead of spinlock as suggested by David Daney.

The _rdmsr, _wrmsr operation must be atomic to ensure the accessing to msr
address is what we want.

Without this patch, in some cases, the reboot operation(fs2f_reboot) defined in
arch/mips/loongson/lemote-2f/reset.c may fail for it called _rdmsr, _wrmsr but
may be interrupted/preempted by the other related operations and make the
_rdmsr get the wrong value or make the _wrmsr write a wrong value to an
unexpected target.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
---
 arch/mips/pci/ops-loongson2.c |   10 ++++++++++
 1 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/arch/mips/pci/ops-loongson2.c b/arch/mips/pci/ops-loongson2.c
index 2bb4057..dc434ec 100644
--- a/arch/mips/pci/ops-loongson2.c
+++ b/arch/mips/pci/ops-loongson2.c
@@ -180,15 +180,21 @@ struct pci_ops loongson_pci_ops = {
 };
 
 #ifdef CONFIG_CS5536
+DEFINE_RAW_SPINLOCK(msr_lock);
+
 void _rdmsr(u32 msr, u32 *hi, u32 *lo)
 {
 	struct pci_bus bus = {
 		.number = PCI_BUS_CS5536
 	};
 	u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
+	unsigned long flags;
+
+	spin_lock_irqsave(&msr_lock, flags);
 	loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
 	loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
 	loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
+	spin_unlock_irqrestore(&msr_lock, flags);
 }
 EXPORT_SYMBOL(_rdmsr);
 
@@ -198,9 +204,13 @@ void _wrmsr(u32 msr, u32 hi, u32 lo)
 		.number = PCI_BUS_CS5536
 	};
 	u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
+	unsigned long flags;
+
+	spin_lock_irqsave(&msr_lock, flags);
 	loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
 	loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
 	loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
+	spin_unlock_irqrestore(&msr_lock, flags);
 }
 EXPORT_SYMBOL(_wrmsr);
 #endif
-- 
1.7.0.1


From wuzhangjin@gmail.com Thu Mar 11 04:11:52 2010
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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     linux-mips@linux-mips.org, Sergei Shtylyov <sshtylyov@mvista.com>,
        Wu Zhangjin <wuzhangjin@gmail.com>
Subject: [PATCH v2 0/3] Workaround the Out-of-order Issue of Loongson-2F
Date:   Thu, 11 Mar 2010 11:05:01 +0800
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From: Wu Zhangjin <wuzhangjin@gmail.com>

Changes from old version:

  o Cleanup some comments and align some instructions.
  
----

As the Chapter 15: "Errata: Issue of Out-of-order in loongson"[1] shows, to
workaround the Issue of Loongson-2Fï¼ŒWe need to do:

  o When switching from user model to kernel model, you should flush the branch
  target history such as BTB and RAS.
 
  o Doing some tricks to the indirect branch target to make sure that the
  indirect branch target can not be in the I/O region.

This patchset applied the above methods and for the binutils patch[3] have been
merged into binutils 2.20.1, so, it's time to upstream this patchset now.
without this patch, the machines will hang when the instruction sequence hit
the Out-of-order Issue of Loongson-2F, therefore, this patchset is very urgent
for both 2.6.33 and 2.6.34.

[1] Chinese Version: http://www.loongson.cn/uploadfile/file/20080821113149.pdf
[2] English Version of Chapter 15:
http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source
[3] http://sourceware.org/ml/binutils/2009-11/msg00387.html 

Regards,
 	Wu Zhangjin

Wu Zhangjin (3):
  Loongson-2F: Flush the branch target history such as BTB and RAS
  Loongson-2F: Enable fixups of binutils 2.20.1
  Loongson-2F: Fixup of problems introduced by -mfix-loongson2f-jump of
    binutils 2.20.1

 arch/mips/Makefile                 |    4 +++-
 arch/mips/include/asm/stackframe.h |   19 +++++++++++++++++++
 arch/mips/loongson/common/reset.c  |   11 ++++++++++-
 3 files changed, 32 insertions(+), 2 deletions(-)


From wuzhangjin@gmail.com Thu Mar 11 04:12:14 2010
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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>
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        Wu Zhangjin <wuzhangjin@gmail.com>
Subject: [PATCH v2 1/3] Loongson-2F: Flush the branch target history such as BTB and RAS
Date:   Thu, 11 Mar 2010 11:05:02 +0800
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From: Wu Zhangjin <wuzhangjin@gmail.com>

As the Chapter 15: "Errata: Issue of Out-of-order in loongson"[1] shows, to
workaround the Issue of Loongson-2Fï¼ŒWe need to do:

"When switching from user model to kernel model, you should flush the branch
target history such as BTB and RAS."

This patch did clear BTB(branch target buffer), forbid RAS(row address strobe)
via Loongson-2F's 64bit diagnostic register.

[1] Chinese Version: http://www.loongson.cn/uploadfile/file/200808211
[2] English Version of Chapter 15:
http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
---
 arch/mips/include/asm/stackframe.h |   19 +++++++++++++++++++
 1 files changed, 19 insertions(+), 0 deletions(-)

diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
index 3b6da33..52a62f5 100644
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -121,6 +121,25 @@
 		.endm
 #else
 		.macro	get_saved_sp	/* Uniprocessor variation */
+#ifdef CONFIG_CPU_LOONGSON2F
+		/*
+		 * Clear BTB (branch target buffer), forbid RAS (row address
+		 * strobe) to workaround the Out-of-order Issue in Loongson2F
+		 * via its diagnostic register.
+		 */
+		move	k0, ra
+		jal	1f
+		 nop
+1:		jal	1f
+		 nop
+1:		jal	1f
+		 nop
+1:		jal	1f
+		 nop
+1:		move	ra, k0
+		li	k0, 3
+		mtc0	k0, $22
+#endif /* CONFIG_CPU_LOONGSON2F */
 #if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
 		lui	k1, %hi(kernelsp)
 #else
-- 
1.7.0.1


From wuzhangjin@gmail.com Thu Mar 11 04:12:39 2010
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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     linux-mips@linux-mips.org, Sergei Shtylyov <sshtylyov@mvista.com>,
        Wu Zhangjin <wuzhangjin@gmail.com>,
        Zhang Le <r0bertz@gentoo.org>, Wu Zhangjin <wuzj@lemote.com>
Subject: [PATCH v2 2/3] Loongson-2F: Enable fixups of binutils 2.20.1
Date:   Thu, 11 Mar 2010 11:05:03 +0800
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From: Wu Zhangjin <wuzhangjin@gmail.com>

As the "Fixups of Loongson2F" patch[1] to binutils have been applied
into binutils 2.20.1. It's time to enable the options provided by the
patch to compile the kernel.

Without these fixups, the system will hang unexpectedly for the bug of
processor.

To learn more about these fixups, please refer to the following
references.

[1] "Fixups of Loongson2F" patch for binutils(actually for gas)
http://sourceware.org/ml/binutils/2009-11/msg00387.html
[2] Chapter 15 of "Loongson2F User Manual"(Chinese Version)
http://www.loongson.cn/uploadfile/file/200808211
[3] English Version of the above chapter 15
http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source

Signed-off-by: Zhang Le <r0bertz@gentoo.org>
Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
---
 arch/mips/Makefile |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 2f2eac2..5ae342e 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -135,7 +135,9 @@ cflags-$(CONFIG_CPU_LOONGSON2)	+= -Wa,--trap
 cflags-$(CONFIG_CPU_LOONGSON2E) += \
 	$(call cc-option,-march=loongson2e,-march=r4600)
 cflags-$(CONFIG_CPU_LOONGSON2F) += \
-	$(call cc-option,-march=loongson2f,-march=r4600)
+	$(call cc-option,-march=loongson2f,-march=r4600) \
+	$(call as-option,-Wa$(comma)-mfix-loongson2f-nop,) \
+	$(call as-option,-Wa$(comma)-mfix-loongson2f-jump,)
 
 cflags-$(CONFIG_CPU_MIPS32_R1)	+= $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
 			-Wa,-mips32 -Wa,--trap
-- 
1.7.0.1


From Yang.Shi@windriver.com Thu Mar 11 04:13:01 2010
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Date:   Thu, 11 Mar 2010 11:12:06 +0800
From:   Yang Shi <yang.shi@windriver.com>
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Subject: Re: [PATCH] MIPS: Protect current_cpu_data with preempt disable in
 delay()
References: <1267695573-27360-1-git-send-email-yang.shi@windriver.com> <4B8FFAB3.1090409@caviumnetworks.com> <20100310153315.GA12476@linux-mips.org>
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Ralf Baechle å†™é“:
> On Thu, Mar 04, 2010 at 10:23:47AM -0800, David Daney wrote:
>
>   
>> On 03/04/2010 01:39 AM, Yang Shi wrote:
>>     
>>> During machine restart with reboot command, get the following
>>> bug info:
>>>
>>> BUG: using smp_processor_id() in preemptible [00000000] code: reboot/1989
>>> caller is __udelay+0x14/0x70
>>> Call Trace:
>>> [<ffffffff8110ad28>] dump_stack+0x8/0x34
>>> [<ffffffff812dde04>] debug_smp_processor_id+0xf4/0x110
>>> [<ffffffff812d90bc>] __udelay+0x14/0x70
>>> [<ffffffff81378274>] md_notify_reboot+0x12c/0x148
>>> [<ffffffff81161054>] notifier_call_chain+0x64/0xc8
>>> [<ffffffff811614dc>] __blocking_notifier_call_chain+0x64/0xc0
>>> [<ffffffff8115566c>] kernel_restart_prepare+0x1c/0x38
>>> [<ffffffff811556cc>] kernel_restart+0x14/0x50
>>> [<ffffffff8115581c>] SyS_reboot+0x10c/0x1f0
>>> [<ffffffff81103684>] handle_sysn32+0x44/0x84
>>>
>>> The root cause is that current_cpu_data is accessed in preemptible
>>> context, so protect it with preempt_disable/preempt_enable pair
>>> in delay().
>>>
>>> Signed-off-by: Yang Shi<yang.shi@windriver.com>
>>> ---
>>>  arch/mips/lib/delay.c |    6 +++++-
>>>  1 files changed, 5 insertions(+), 1 deletions(-)
>>>
>>> diff --git a/arch/mips/lib/delay.c b/arch/mips/lib/delay.c
>>> index 6b3b1de..dc38064 100644
>>> --- a/arch/mips/lib/delay.c
>>> +++ b/arch/mips/lib/delay.c
>>> @@ -41,7 +41,11 @@ EXPORT_SYMBOL(__delay);
>>>
>>>  void __udelay(unsigned long us)
>>>  {
>>> -	unsigned int lpj = current_cpu_data.udelay_val;
>>> +	unsigned int lpj;
>>> +
>>> +	preempt_disable();
>>> +	lpj = current_cpu_data.udelay_val;
>>> +	preempt_enable();
>>>
>>>  	__delay((us * 0x000010c7ull * HZ * lpj)>>  32);
>>>  }
>>>       
>> This doesn't seem like the best approach.
>>
>> Perhaps we should either use raw_current_cpu_data and no
>> preempt_disable(), or if we are concerned about migrating to a CPU
>> with a different lpj value, move the preempt_enable after the call
>> to __delay().
>>     
>
> Udelay() is supposed to guarantee a minimum delay and when being migrated
> to another CPU with higher bogomips this guarantee might be violated.  So
> it'd even have to be something like:
>
> void __udelay(unsigned long us)
> {
> 	unsigned int lpj = current_cpu_data.udelay_val;
> 	unsigned int lpj;
>
> 	preempt_disable();
> 	lpj = current_cpu_data.udelay_val;
>
> 	__delay((us * 0x000010c7ull * HZ * lpj)>>  32);
> 	preempt_enable();
> }
>
> But preempt_disable() itself is not atomic, so using it from bh or irq
> context could result in a corrupted preemption counter.  So the raw_
> version will have to do.  I doubt it's much of a problem but at some
> point we will have to revisit the delay by c0_count patch submitted a
> while ago.  The patch wasn't right but the problem it was addressing
> is real.
>   

Thanks Ralf. Do we need raw_ version patch before revisiting the delay 
by c0_count patch although it's not an ideal fix.

Regards,
Yang

>   Ralf
>
>   


From wuzhangjin@gmail.com Thu Mar 11 04:13:24 2010
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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     linux-mips@linux-mips.org, Sergei Shtylyov <sshtylyov@mvista.com>,
        Wu Zhangjin <wuzhangjin@gmail.com>
Subject: [PATCH v2 3/3] Loongson-2F: Fixup of problems introduced by -mfix-loongson2f-jump of binutils 2.20.1
Date:   Thu, 11 Mar 2010 11:05:04 +0800
Message-Id: <1bd51326ffa900d034ee81825e803e3bdc46fdaf.1268276417.git.wuzhangjin@gmail.com>
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From: Wu Zhangjin <wuzhangjin@gmail.com>

The -mfix-loongson2f-jump option provided by the binutils 2.20.1 have fixed the
Out-of-order Issue of Loongson-2F described in Chapter 15 of "Loongson2F User
Manual"[1,2], but introduced some problems.

The option changes all of the jumping target to "addr & 0xcfffffff" through the
at($1) register, but for the REBOOT address of loongson-2F: 0xbfc00000, this is
totally wrong, so, this patch try to avoid the problem via telling the
assembler not to use at($1) register.

[1] Loongson2F User Manual(Chinese Version)
http://www.loongson.cn/uploadfile/file/200808211
[2] English Version of Chapter 15:
http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source

Reported-and-tested-by: Liu Shiwei <liushiwei@gmail.com>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
---
 arch/mips/loongson/common/reset.c |   11 ++++++++++-
 1 files changed, 10 insertions(+), 1 deletions(-)

diff --git a/arch/mips/loongson/common/reset.c b/arch/mips/loongson/common/reset.c
index 4bd9c18..dc311f2 100644
--- a/arch/mips/loongson/common/reset.c
+++ b/arch/mips/loongson/common/reset.c
@@ -21,8 +21,17 @@ static void loongson_restart(char *command)
 	/* do preparation for reboot */
 	mach_prepare_reboot();
 
-	/* reboot via jumping to boot base address */
+	/* reboot via jumping to boot base address
+	 *
+	 * ".set noat" and ".set at" are used to ensure the address not break
+	 * by the -mfix-loongson2f-jump option provided by binutils 2.20.1 (or
+	 * higher version) which try to change the jumping address to "addr &
+	 * 0xcfffffff" via the at($1) register, this is totally wrong for
+	 * 0xbfc00000 (LOONGSON_BOOT_BASE).
+	 */
+	__asm__ __volatile__(".set noat\n");
 	((void (*)(void))ioremap_nocache(LOONGSON_BOOT_BASE, 4)) ();
+	__asm__ __volatile__(".set at\n");
 }
 
 static void loongson_poweroff(void)
-- 
1.7.0.1


From wuzhangjin@gmail.com Thu Mar 11 04:18:23 2010
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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     Pavel Machek <pavel@ucw.cz>, "Rafael J. Wysocki" <rjw@sisk.pl>,
        linux-mips@linux-mips.org, Wu Zhangjin <wuzhangjin@gmail.com>,
        Liu Shiwei <liushiwei@gmail.com>
Subject: [v12 9/9] Loongson: YeeLoong: add power_supply based battery driver
Date:   Thu, 11 Mar 2010 11:11:21 +0800
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From: Wu Zhangjin <wuzhangjin@gmail.com>

(This patch is one of the "yeeloong platform driver" patchset.)

Changes from old revision:

  o Fixes the bugs
  In the old driver, it didn't show the current charging status and reported
  the wrong full charge and voltage value.

    Capacity = Charge_full_last (Dynamic) / Charge_full_design (Fixed)
    Percentage Charge = Charge_now (Dyn-Dynamic) / Charge_full_last (Dynamic)

Based on the old emulated APM battery driver and the power_supply class,
this patch adds a new battery driver.

References:
1. Documentation/power/power_supply_class.txt
2. drivers/power/

Signed-off-by: Liu Shiwei <liushiwei@gmail.com>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
---
 drivers/platform/mips/Kconfig           |    1 +
 drivers/platform/mips/yeeloong_laptop.c |  228 +++++++++++++++++++++++++++++++
 2 files changed, 229 insertions(+), 0 deletions(-)

diff --git a/drivers/platform/mips/Kconfig b/drivers/platform/mips/Kconfig
index 01560b0..cdfccea 100644
--- a/drivers/platform/mips/Kconfig
+++ b/drivers/platform/mips/Kconfig
@@ -21,6 +21,7 @@ config LEMOTE_YEELOONG2F
 	select HWMON
 	select VIDEO_OUTPUT_CONTROL
 	select INPUT_SPARSEKMAP
+	select POWER_SUPPLY
 	depends on INPUT
 	help
 	  YeeLoong netbook is a mini laptop made by Lemote, which is basically
diff --git a/drivers/platform/mips/yeeloong_laptop.c b/drivers/platform/mips/yeeloong_laptop.c
index 877257a..ead26e0 100644
--- a/drivers/platform/mips/yeeloong_laptop.c
+++ b/drivers/platform/mips/yeeloong_laptop.c
@@ -19,6 +19,7 @@
 #include <linux/input/sparse-keymap.h>
 #include <linux/interrupt.h>
 #include <linux/delay.h>
+#include <linux/power_supply.h>	/* for AC & Battery subdriver */
 
 #include <cs5536/cs5536.h>
 
@@ -349,6 +350,213 @@ static void yeeloong_hwmon_exit(void)
 	}
 }
 
+/* AC & Battery subdriver */
+
+static struct power_supply yeeloong_ac, yeeloong_bat;
+
+#define AC_OFFLINE          0
+#define AC_ONLINE           1
+
+static int yeeloong_get_ac_props(struct power_supply *psy,
+				enum power_supply_property psp,
+				union power_supply_propval *val)
+{
+	switch (psp) {
+	case POWER_SUPPLY_PROP_ONLINE:
+		val->intval = ((ec_read(REG_BAT_POWER)) & BIT_BAT_POWER_ACIN) ?
+			AC_ONLINE : AC_OFFLINE;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static enum power_supply_property yeeloong_ac_props[] = {
+	POWER_SUPPLY_PROP_ONLINE,
+};
+
+static struct power_supply yeeloong_ac = {
+	.name = "yeeloong-ac",
+	.type = POWER_SUPPLY_TYPE_MAINS,
+	.properties = yeeloong_ac_props,
+	.num_properties = ARRAY_SIZE(yeeloong_ac_props),
+	.get_property = yeeloong_get_ac_props,
+};
+
+#define BAT_CAP_CRITICAL 5
+#define BAT_CAP_HIGH     99
+
+static int yeeloong_bat_get_ex_property(enum power_supply_property psp,
+				     union power_supply_propval *val)
+{
+	int bat_in, curr_cap, cap_level, status, charge, health;
+
+	status = ec_read(REG_BAT_STATUS);
+	bat_in = status & BIT_BAT_STATUS_IN;
+	curr_cap = get_bat_info(RELATIVE_CAP);
+	if (status & BIT_BAT_STATUS_FULL)
+		curr_cap = 100;
+
+	switch (psp) {
+	case POWER_SUPPLY_PROP_PRESENT:
+		val->intval = bat_in;
+		break;
+	case POWER_SUPPLY_PROP_CAPACITY:
+		val->intval = curr_cap;
+		break;
+	case POWER_SUPPLY_PROP_CAPACITY_LEVEL:
+		cap_level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
+		if (status & BIT_BAT_STATUS_LOW) {
+			cap_level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
+			if (curr_cap <= BAT_CAP_CRITICAL)
+				cap_level =
+					POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
+		} else if (status & BIT_BAT_STATUS_FULL) {
+			cap_level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
+			if (curr_cap >= BAT_CAP_HIGH)
+				cap_level = POWER_SUPPLY_CAPACITY_LEVEL_HIGH;
+		} else if (status & BIT_BAT_STATUS_DESTROY)
+			cap_level = POWER_SUPPLY_CAPACITY_LEVEL_UNKNOWN;
+		val->intval = cap_level;
+		break;
+	case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW:
+		/* seconds */
+		val->intval = bat_in ? (curr_cap - 3) * 54 + 142 : 0;
+		break;
+	case POWER_SUPPLY_PROP_STATUS:
+		if (!bat_in)
+			charge = POWER_SUPPLY_STATUS_UNKNOWN;
+		else {
+			if (status & BIT_BAT_STATUS_FULL) {
+				val->intval = POWER_SUPPLY_STATUS_FULL;
+				break;
+			}
+
+			charge = ec_read(REG_BAT_CHARGE);
+			if (charge & FLAG_BAT_CHARGE_DISCHARGE)
+				charge = POWER_SUPPLY_STATUS_DISCHARGING;
+			else if (charge & FLAG_BAT_CHARGE_CHARGE)
+				charge = POWER_SUPPLY_STATUS_CHARGING;
+			else
+				charge = POWER_SUPPLY_STATUS_NOT_CHARGING;
+		}
+		val->intval = charge;
+		break;
+	case POWER_SUPPLY_PROP_HEALTH:
+		if (!bat_in) /* no battery present */
+			health = POWER_SUPPLY_HEALTH_UNKNOWN;
+		else { /* Assume it is good */
+			health = POWER_SUPPLY_HEALTH_GOOD;
+			if (status &
+				(BIT_BAT_STATUS_DESTROY | BIT_BAT_STATUS_LOW))
+				health = POWER_SUPPLY_HEALTH_DEAD;
+			if (ec_read(REG_BAT_CHARGE_STATUS) &
+				BIT_BAT_CHARGE_STATUS_OVERTEMP)
+				health = POWER_SUPPLY_HEALTH_OVERHEAT;
+		}
+		val->intval = health;
+		break;
+	case POWER_SUPPLY_PROP_CHARGE_NOW:	/* 1/100(%)*1000 ÂµAh */
+		val->intval = curr_cap * get_bat_info(FULLCHG_CAP) * 10;
+		break;
+	default:
+		return -EINVAL;
+	}
+	return 0;
+}
+
+static int yeeloong_get_bat_props(struct power_supply *psy,
+				     enum power_supply_property psp,
+				     union power_supply_propval *val)
+{
+	switch (psp) {
+	/* Fixed information */
+	case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN:
+		val->intval = get_bat_info(DESIGN_VOL) * 1000;	/* mV -> ÂµV */
+		break;
+	case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
+		val->intval = get_bat_info(DESIGN_CAP) * 1000;	/*mAh -> ÂµAh*/
+		break;
+	case POWER_SUPPLY_PROP_CHARGE_FULL:
+		val->intval = get_bat_info(FULLCHG_CAP) * 1000;	/* ÂµAh */
+		break;
+	case POWER_SUPPLY_PROP_MANUFACTURER:
+		val->strval =
+			(ec_read(REG_BAT_VENDOR) == FLAG_BAT_VENDOR_SANYO) ?
+			"SANYO" : "SIMPLO";
+		break;
+	/* Dynamic information */
+	case POWER_SUPPLY_PROP_CURRENT_NOW:
+		val->intval = get_battery_current() * 1000;	/* mA -> ÂµA */
+		break;
+	case POWER_SUPPLY_PROP_VOLTAGE_NOW:
+		val->intval = get_battery_voltage() * 1000;	/* mV -> ÂµV */
+		break;
+	case POWER_SUPPLY_PROP_TEMP:
+		val->intval = get_battery_temp();	/* Celcius */
+		break;
+	/* Dynamic but relative information */
+	default:
+		return yeeloong_bat_get_ex_property(psp, val);
+	}
+
+	return 0;
+}
+
+static enum power_supply_property yeeloong_bat_props[] = {
+	POWER_SUPPLY_PROP_STATUS,
+	POWER_SUPPLY_PROP_PRESENT,
+	POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN,
+	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
+	POWER_SUPPLY_PROP_CHARGE_FULL,
+	POWER_SUPPLY_PROP_CHARGE_NOW,
+	POWER_SUPPLY_PROP_CURRENT_NOW,
+	POWER_SUPPLY_PROP_VOLTAGE_NOW,
+	POWER_SUPPLY_PROP_HEALTH,
+	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
+	POWER_SUPPLY_PROP_CAPACITY,
+	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
+	POWER_SUPPLY_PROP_TEMP,
+	POWER_SUPPLY_PROP_MANUFACTURER,
+};
+
+static struct power_supply yeeloong_bat = {
+	.name = "yeeloong-bat",
+	.type = POWER_SUPPLY_TYPE_BATTERY,
+	.properties = yeeloong_bat_props,
+	.num_properties = ARRAY_SIZE(yeeloong_bat_props),
+	.get_property = yeeloong_get_bat_props,
+};
+
+static int ac_bat_initialized;
+
+static int yeeloong_bat_init(void)
+{
+	int ret;
+
+	ret = power_supply_register(NULL, &yeeloong_ac);
+	if (ret)
+		return ret;
+	ret = power_supply_register(NULL, &yeeloong_bat);
+	if (ret) {
+		power_supply_unregister(&yeeloong_ac);
+		return ret;
+	}
+	ac_bat_initialized = 1;
+
+	return 0;
+}
+
+static void yeeloong_bat_exit(void)
+{
+	ac_bat_initialized = 0;
+
+	power_supply_unregister(&yeeloong_ac);
+	power_supply_unregister(&yeeloong_bat);
+}
+
 /* video output subdriver */
 
 static int lcd_video_output_get(struct output_device *od)
@@ -623,6 +831,15 @@ static int usb0_handler(int status)
 	return status;
 }
 
+static int ac_bat_handler(int status)
+{
+	if (ac_bat_initialized) {
+		power_supply_changed(&yeeloong_ac);
+		power_supply_changed(&yeeloong_bat);
+	}
+	return status;
+}
+
 static void do_event_action(int event)
 {
 	sci_handler handler;
@@ -668,6 +885,9 @@ static void do_event_action(int event)
 	case EVENT_AUDIO_VOLUME:
 		reg = REG_AUDIO_VOLUME;
 		break;
+	case EVENT_AC_BAT:
+		handler = ac_bat_handler;
+		break;
 	default:
 		break;
 	}
@@ -926,6 +1146,13 @@ static int __init yeeloong_init(void)
 		return ret;
 	}
 
+	ret = yeeloong_bat_init();
+	if (ret) {
+		pr_err("Fail to register yeeloong battery driver.\n");
+		yeeloong_bat_exit();
+		return ret;
+	}
+
 	ret = yeeloong_hwmon_init();
 	if (ret) {
 		pr_err("Fail to register yeeloong hwmon driver.\n");
@@ -955,6 +1182,7 @@ static void __exit yeeloong_exit(void)
 	yeeloong_hotkey_exit();
 	yeeloong_vo_exit();
 	yeeloong_hwmon_exit();
+	yeeloong_bat_exit();
 	yeeloong_backlight_exit();
 	platform_driver_unregister(&platform_driver);
 
-- 
1.7.0.1


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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     linux-mips@linux-mips.org, David Daney <ddaney@caviumnetworks.com>,
        Wu Zhangjin <wuzhangjin@gmail.com>
Subject: [-queue v9 3/3] MIPS: r4k: Add a high resolution sched_clock()
Date:   Thu, 11 Mar 2010 11:18:20 +0800
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From: Wu Zhangjin <wuzhangjin@gmail.com>

(This patch is one of the "high resolution sched_clock()" patchset.)

(v8 -> v9:
 O Make it depends on 64BIT for the current mips_sched_clock() only
 support 64bit.

 v7 -> v8:

 O Make it works with the exisiting clocksource_mips.mult,
 clocksource_mips.shift and copes with the 64bit calculation's overflow
 problem with the method introduced by David Daney in "MIPS: Octeon: Use
 non-overflowing arithmetic in sched_clock".

 To reduce the duplication, I have abstracted an inline
 mips_sched_clock() function to arch/mips/include/asm/time.h from
 arch/mips/cavium-octeon/csrc-octeon.c.

 v6 -> v7:

 O Make it depends on !CPU_FREQ and CPU_HAS_FIXED_C0_COUNT

 This sched_clock() is only available with the processor has fixed cp0
 MIPS count register or even has dynamic cp0 MIPS count register but
 with CPU_FREQ disabled.

 NOTE: If your processor has fixed c0 count, please select
 CPU_HAS_FIXED_C0_COUNT for it and send a related patch to Ralf.

 v5 -> v6:

 o hard-codes the cycle2ns_scale_factor as 8 for 30(cs->shift) is too
 big. With 30, the return value of sched_clock() will also overflow quickly.
 o moves the sched_clock() back into csrc-r4k.c as David and Sergei
 recommended.
 o inits c0 count as zero for PRINTK_TIME=y.
 o drops the HR_SCHED_CLCOK option for the current sched_clock() is stable
 enough to replace the jiffies based one.
)

This patch adds a cnt32_to_63() and MIPS c0 count based sched_clock(),
which provides high resolution.

Without it, the Ftrace for MIPS will give useless timestamp information.

Because cnt32_to_63() needs to be called at least once per half period
to work properly, Differ from the old version, this v2 revision set up a
kernel timer to ensure the requirement of some MIPSs which have short c0
count period.

And also, we init the c0 count as ZERO(just as jiffies does) in
time_init() before plat_time_init(), without it, PRINTK_TIME=y will get
wrong timestamp information. (NOTE: some platforms have initiazlied c0
count as zero, but some not, this may introduce some duplication,
perhaps a new patch is needed to remove the initialized of c0 count in
the platforms later?)

This is originally from arch/arm/plat-orion/time.c

This revision works well for function graph tracer now, and also,
PRINTK_TIME=y will get normal timestamp informatin.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
---
 arch/mips/Kconfig           |   13 ++++++++++++
 arch/mips/kernel/csrc-r4k.c |   45 +++++++++++++++++++++++++++++++++++++++++++
 arch/mips/kernel/time.c     |    5 ++++
 3 files changed, 63 insertions(+), 0 deletions(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 591ca0c..791c21f 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1936,6 +1936,19 @@ config NR_CPUS
 source "kernel/time/Kconfig"
 
 #
+# High Resolution sched_clock() support
+#
+
+config CPU_HAS_FIXED_C0_COUNT
+	bool
+
+config CPU_SUPPORTS_HR_SCHED_CLOCK
+	bool
+	depends on CPU_HAS_FIXED_C0_COUNT || !CPU_FREQ
+	depends on 64BIT
+	default y
+
+#
 # Timer Interrupt Frequency Configuration
 #
 
diff --git a/arch/mips/kernel/csrc-r4k.c b/arch/mips/kernel/csrc-r4k.c
index e95a3cd..89473ba 100644
--- a/arch/mips/kernel/csrc-r4k.c
+++ b/arch/mips/kernel/csrc-r4k.c
@@ -6,7 +6,9 @@
  * Copyright (C) 2007 by Ralf Baechle
  */
 #include <linux/clocksource.h>
+#include <linux/cnt32_to_63.h>
 #include <linux/init.h>
+#include <linux/timer.h>
 
 #include <asm/time.h>
 
@@ -22,6 +24,47 @@ static struct clocksource clocksource_mips = {
 	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
+#ifdef CONFIG_CPU_SUPPORTS_HR_SCHED_CLOCK
+/*
+ * MIPS sched_clock implementation.
+ *
+ * Because the hardware timer period is quite short and because cnt32_to_63()
+ * needs to be called at least once per half period to work properly, a kernel
+ * timer is set up to ensure this requirement is always met.
+ *
+ * Please refer to include/linux/cnt32_to_63.h, arch/arm/plat-orion/time.c and
+ * arch/mips/include/asm/time.h (mips_sched_clock)
+ */
+unsigned long long notrace sched_clock(void)
+{
+	u64 cnt = cnt32_to_63(read_c0_count());
+
+	if (cnt & 0x8000000000000000)
+		cnt &= 0x7fffffffffffffff;
+
+	return mips_sched_clock(&clocksource_mips, cnt);
+}
+
+static struct timer_list cnt32_to_63_keepwarm_timer;
+
+static void cnt32_to_63_keepwarm(unsigned long data)
+{
+	mod_timer(&cnt32_to_63_keepwarm_timer, round_jiffies(jiffies + data));
+	sched_clock();
+}
+#endif
+
+static inline void setup_hres_sched_clock(unsigned long clock)
+{
+#ifdef CONFIG_CPU_SUPPORTS_HR_SCHED_CLOCK
+	unsigned long data;
+
+	data = 0x80000000UL / clock * HZ;
+	setup_timer(&cnt32_to_63_keepwarm_timer, cnt32_to_63_keepwarm, data);
+	mod_timer(&cnt32_to_63_keepwarm_timer, round_jiffies(jiffies + data));
+#endif
+}
+
 int __init init_r4k_clocksource(void)
 {
 	if (!cpu_has_counter || !mips_hpt_frequency)
@@ -32,6 +75,8 @@ int __init init_r4k_clocksource(void)
 
 	clocksource_set_clock(&clocksource_mips, mips_hpt_frequency);
 
+	setup_hres_sched_clock(mips_hpt_frequency);
+
 	clocksource_register(&clocksource_mips);
 
 	return 0;
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index fb74974..86cf18a 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -119,6 +119,11 @@ static __init int cpu_has_mfc0_count_bug(void)
 
 void __init time_init(void)
 {
+#ifdef CONFIG_CPU_SUPPORTS_HR_SCHED_CLOCK
+	if (!mips_clockevent_init() || !cpu_has_mfc0_count_bug())
+		write_c0_count(0);
+#endif
+
 	plat_time_init();
 
 	if (!mips_clockevent_init() || !cpu_has_mfc0_count_bug())
-- 
1.7.0.1


From shinya.kuribayashi@necel.com Thu Mar 11 04:27:45 2010
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From:   Shinya Kuribayashi <shinya.kuribayashi@necel.com>
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To:     Wu Zhangjin <wuzhangjin@gmail.com>
CC:     Ralf Baechle <ralf@linux-mips.org>, Greg KH <gregkh@suse.de>,
        linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] Loongson-2F: Flush the branch target history such
 as BTB and RAS
References: <cover.1268153722.git.wuzhangjin@gmail.com> <d513f16856e499e82f0b4e428c97fe06afb5a426.1268153722.git.wuzhangjin@gmail.com>
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Wu Zhangjin wrote:
> From: Wu Zhangjin <wuzhangjin@gmail.com>
> 
> As the Chapter 15: "Errata: Issue of Out-of-order in loongson"[1] shows, to
> workaround the Issue of Loongson-2Fï¼ŒWe need to do:
> 
> "When switching from user model to kernel model, you should flush the branch
> target history such as BTB and RAS."

Just wondered, model or mode?

> This patch did clear BTB(branch target buffer), forbid RAS(row address strobe)
> via Loongson-2F's 64bit diagnostic register.

Are you sure that RAS represents "Row Address Strobe", not "Return
Address Stack?"

By the way, we have a similar local workaround for vr55xx processors
when switching from kernel mode to user mode.  It's not necessarily
related to out-of-order issues, but we need to prevent the processor
from doing instruction prefetch beyond "eret" instruction.

In the long term, it would be appreciated that the kernel has a set
of hooks when switching KUX-modes, so that each machine could have
his own, processor-specific treatmens.

  Shinya

> [1] Chinese Version: http://www.loongson.cn/uploadfile/file/200808211
> [2] English Version of Chapter 15:
> http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source
> 
> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
> ---
>  arch/mips/include/asm/stackframe.h |   19 +++++++++++++++++++
>  1 files changed, 19 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
> index 3b6da33..b84cfda 100644
> --- a/arch/mips/include/asm/stackframe.h
> +++ b/arch/mips/include/asm/stackframe.h
> @@ -121,6 +121,25 @@
>  		.endm
>  #else
>  		.macro	get_saved_sp	/* Uniprocessor variation */
> +#ifdef CONFIG_CPU_LOONGSON2F
> +		/*
> +		 * Clear BTB(branch target buffer), forbid RAS(row address
> +		 * strobe) to workaround the Out-of-oder Issue in Loongson2F
> +		 * via it's diagnostic register.
> +		 */
> +		move k0, ra
> +		jal	1f
> +		nop
> +1:		jal	1f
> +		nop
> +1:		jal	1f
> +		nop
> +1:		jal	1f
> +		nop
> +1:		move	ra, k0
> +		li	k0, 3
> +		mtc0	k0, $22
> +#endif /* CONFIG_CPU_LOONGSON2F */
>  #if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
>  		lui	k1, %hi(kernelsp)
>  #else

From wuzhangjin@gmail.com Thu Mar 11 04:32:03 2010
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Subject: Re: [PATCH v2] Loongson: Lemote-2F: Fixup of _rdmsr and _wrmsr
From:   Wu Zhangjin <wuzhangjin@gmail.com>
Reply-To: wuzhangjin@gmail.com
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     linux-mips@linux-mips.org, David Daney <ddaney@caviumnetworks.com>
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Organization: DSLab, Lanzhou University, China
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On Thu, 2010-03-11 at 10:57 +0800, Wu Zhangjin wrote:
> From: Wu Zhangjin <wuzhangjin@gmail.com>
> 
> Changes from the old version:
>   o Using raw spinlock instead of spinlock as suggested by David Daney.
[...]
> --- a/arch/mips/pci/ops-loongson2.c
> +++ b/arch/mips/pci/ops-loongson2.c
> @@ -180,15 +180,21 @@ struct pci_ops loongson_pci_ops = {
>  };
>  
>  #ifdef CONFIG_CS5536
> +DEFINE_RAW_SPINLOCK(msr_lock);
> +
>  void _rdmsr(u32 msr, u32 *hi, u32 *lo)
>  {
>  	struct pci_bus bus = {
>  		.number = PCI_BUS_CS5536
>  	};
>  	u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
> +	unsigned long flags;
> +
> +	spin_lock_irqsave(&msr_lock, flags);

Please ignore this patch for the operations should be raw_ too.

Regards,
	Wu Zhangjin


From wuzhangjin@gmail.com Thu Mar 11 04:38:37 2010
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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     linux-mips@linux-mips.org, David Daney <ddaney@caviumnetworks.com>,
        Wu Zhangjin <wuzhangjin@gmail.com>
Subject: [PATCH v3] Loongson: Lemote-2F: Fixup of _rdmsr and _wrmsr
Date:   Thu, 11 Mar 2010 11:30:50 +0800
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From: Wu Zhangjin <wuzhangjin@gmail.com>

v2 --> v3:
  o Using the right operations for the raw spinlock.
v1 --> v2:
  o Using raw spinlock instead of spinlock as suggested by David Daney.

The _rdmsr, _wrmsr operation must be atomic to ensure the accessing to msr
address is what we want.

Without this patch, in some cases, the reboot operation(fs2f_reboot) defined in
arch/mips/loongson/lemote-2f/reset.c may fail for it called _rdmsr, _wrmsr but
may be interrupted/preempted by the other related operations and make the
_rdmsr get the wrong value or make the _wrmsr write a wrong value to an
unexpected target.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
---
 arch/mips/pci/ops-loongson2.c |   10 ++++++++++
 1 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/arch/mips/pci/ops-loongson2.c b/arch/mips/pci/ops-loongson2.c
index 2bb4057..d657ee0 100644
--- a/arch/mips/pci/ops-loongson2.c
+++ b/arch/mips/pci/ops-loongson2.c
@@ -180,15 +180,21 @@ struct pci_ops loongson_pci_ops = {
 };
 
 #ifdef CONFIG_CS5536
+DEFINE_RAW_SPINLOCK(msr_lock);
+
 void _rdmsr(u32 msr, u32 *hi, u32 *lo)
 {
 	struct pci_bus bus = {
 		.number = PCI_BUS_CS5536
 	};
 	u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
+	unsigned long flags;
+
+	raw_spin_lock_irqsave(&msr_lock, flags);
 	loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
 	loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
 	loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
+	raw_spin_unlock_irqrestore(&msr_lock, flags);
 }
 EXPORT_SYMBOL(_rdmsr);
 
@@ -198,9 +204,13 @@ void _wrmsr(u32 msr, u32 hi, u32 lo)
 		.number = PCI_BUS_CS5536
 	};
 	u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
+	unsigned long flags;
+
+	raw_spin_lock_irqsave(&msr_lock, flags);
 	loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
 	loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
 	loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
+	raw_spin_unlock_irqrestore(&msr_lock, flags);
 }
 EXPORT_SYMBOL(_wrmsr);
 #endif
-- 
1.7.0.1


From wuzhangjin@gmail.com Thu Mar 11 04:42:00 2010
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Subject: Re: [PATCH 1/3] Loongson-2F: Flush the branch target history such
 as BTB and RAS
From:   Wu Zhangjin <wuzhangjin@gmail.com>
Reply-To: wuzhangjin@gmail.com
To:     Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Cc:     Ralf Baechle <ralf@linux-mips.org>, Greg KH <gregkh@suse.de>,
        linux-mips@linux-mips.org, linux-kernel@vger.kernel.org,
        zhangfx <zhangfx@lemote.com>, yanh <yanh@lemtoe.com>
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         <d513f16856e499e82f0b4e428c97fe06afb5a426.1268153722.git.wuzhangjin@gmail.com>
         <4B98632E.70806@necel.com>
Content-Type: text/plain; charset="UTF-8"
Organization: DSLab, Lanzhou University, China
Date:   Thu, 11 Mar 2010 11:35:20 +0800
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On Thu, 2010-03-11 at 12:27 +0900, Shinya Kuribayashi wrote:
> Wu Zhangjin wrote:
> > From: Wu Zhangjin <wuzhangjin@gmail.com>
> > 
> > As the Chapter 15: "Errata: Issue of Out-of-order in loongson"[1] shows, to
> > workaround the Issue of Loongson-2Fï¼ŒWe need to do:
> > 
> > "When switching from user model to kernel model, you should flush the branch
> > target history such as BTB and RAS."
> 
> Just wondered, model or mode?
> 

Hmm, should be mode.

> > This patch did clear BTB(branch target buffer), forbid RAS(row address strobe)
> > via Loongson-2F's 64bit diagnostic register.
> 
> Are you sure that RAS represents "Row Address Strobe", not "Return
> Address Stack?"
> 

Hi, Yanhua(from Lemote), can you help to clear this part?

> By the way, we have a similar local workaround for vr55xx processors
> when switching from kernel mode to user mode.  It's not necessarily
> related to out-of-order issues, but we need to prevent the processor
> from doing instruction prefetch beyond "eret" instruction.
> 
> In the long term, it would be appreciated that the kernel has a set
> of hooks when switching KUX-modes, so that each machine could have
> his own, processor-specific treatmens.
> 

Good idea.

Thanks!

Regards,
	Wu Zhangjin


From yang.shi@windriver.com Thu Mar 11 06:42:36 2010
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From:   Yang Shi <yang.shi@windriver.com>
To:     ralf@linux-mips.org
Cc:     linux-mips@linux-mips.org
Subject: [PATCH] MIPS: Fix elfcore.c build warning
Date:   Thu, 11 Mar 2010 13:42:22 +0800
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kernel/elfcore.c includes elf.h which includes arch specific elf.h.
In MIPS elf.h, 'struct pt_regs' is declared inside the parameter
list of elf_dump_regs function. This cause kernel build warning.

So, move the declaration out of the function parameter list to
remove build warning.

Signed-off-by: Yang Shi <yang.shi@windriver.com>
---
 arch/mips/include/asm/elf.h |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h
index e53d7be..370bf50 100644
--- a/arch/mips/include/asm/elf.h
+++ b/arch/mips/include/asm/elf.h
@@ -311,8 +311,9 @@ do {									\
 #endif /* CONFIG_64BIT */
 
 struct task_struct;
+struct pt_regs;
 
-extern void elf_dump_regs(elf_greg_t *, struct pt_regs *regs);
+extern void elf_dump_regs(elf_greg_t *, struct pt_regs *);
 extern int dump_task_regs(struct task_struct *, elf_gregset_t *);
 extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
 
-- 
1.6.3.3


From ralf@linux-mips.org Thu Mar 11 08:51:58 2010
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From:   Ralf Baechle <ralf@linux-mips.org>
To:     Yang Shi <yang.shi@windriver.com>
Cc:     linux-mips@linux-mips.org
Subject: Re: [PATCH] MIPS: Fix elfcore.c build warning
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On Thu, Mar 11, 2010 at 01:42:22PM +0800, Yang Shi wrote:

> kernel/elfcore.c includes elf.h which includes arch specific elf.h.
> In MIPS elf.h, 'struct pt_regs' is declared inside the parameter
> list of elf_dump_regs function. This cause kernel build warning.
> 
> So, move the declaration out of the function parameter list to
> remove build warning.

What fixes the warning is the forward declaration of struct pt_regs not
removing the function parameter name.  So I've added a patch which does
just that.

Thanks!

  Ralf

From ralf@linux-mips.org Thu Mar 11 10:59:51 2010
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From:   Ralf Baechle <ralf@linux-mips.org>
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On Thu, Mar 11, 2010 at 12:27:42PM +0900, Shinya Kuribayashi wrote:

> Are you sure that RAS represents "Row Address Strobe", not "Return
> Address Stack?"
> 
> By the way, we have a similar local workaround for vr55xx processors
> when switching from kernel mode to user mode.  It's not necessarily
> related to out-of-order issues, but we need to prevent the processor
> from doing instruction prefetch beyond "eret" instruction.

Some R4000 revisions may do silly things in case of an NMI where c0_errorepc
is pointing is pointing to an ERET instruction.

There are various processors which want to save and restore core-specific
registers, for example the Cavium cnMIPS core.

> In the long term, it would be appreciated that the kernel has a set
> of hooks when switching KUX-modes, so that each machine could have
> his own, processor-specific treatmens.

It seems that uasm is the tool of choice.

  Ralf

From ralf@linux-mips.org Thu Mar 11 11:06:51 2010
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Date:   Thu, 11 Mar 2010 11:06:48 +0100
From:   Ralf Baechle <ralf@linux-mips.org>
To:     "Robert P. J. Day" <rpjday@crashcourse.ca>
Cc:     linux-mips@linux-mips.org
Subject: Re: [PATCH] MIPS: Initialize an atomic_t properly with
 ATOMIC_INIT(0).
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On Sat, Feb 27, 2010 at 12:02:51PM -0500, Robert P. J. Day wrote:

>   AFAIK, the technically correct way to initialize atomic variables is
> with ATOMIC_INIT(n).

Indeed, applied.

Thanks!

  Ralf

From mikael.starvik@axis.com Thu Mar 11 16:01:36 2010
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Date:   Thu, 11 Mar 2010 15:59:44 +0100
Subject: MIPS raw_local_irq_restore flags
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For the common case CONFIG_CPU_MIPSR2 && CONFIG_IRQ_CPU raw_local_irq_restore_flags is defined as:

"       beqz    \\flags, 1f                                     \n"
"       di                                                      \n"
"       ei                                                      \n"
"1:                                                             \n"

Doesn't this imply that you can't do recursive local_irq_save() (with different locks ofcourse)? 

Best Regards
/Mikael

From miloody@gmail.com Thu Mar 11 18:02:19 2010
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Subject: some question about memory usage in mips
From:   loody <miloody@gmail.com>
To:     "linux-mips@linux-mips.org" <linux-mips@linux-mips.org>
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Dear all:
I test usb driver under mips machine and I have some questions always bother me.
1. what is the difference between dma_pool_create and
dma_alloc_coherent and where they are defined? from the result it
return, dma_pool_create will return non-cache area, but
dma_alloc_coherent returns catched area.
why they get the dma in it? Does that have special meaning?

2. what are wmb() and rmb(). used for?
do they use to flush cache? and what these 3 leterr mean?
wmb, write memory back
rmb, read memory back
appreciate your help,
miloody

From David.Daney@caviumnetworks.com Thu Mar 11 18:26:24 2010
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To:     Mikael Starvik <mikael.starvik@axis.com>
CC:     "linux-mips@linux-mips.org" <linux-mips@linux-mips.org>
Subject: Re: MIPS raw_local_irq_restore flags
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On 03/11/2010 06:59 AM, Mikael Starvik wrote:
> For the common case CONFIG_CPU_MIPSR2&&  CONFIG_IRQ_CPU raw_local_irq_restore_flags is defined as:
>
> "       beqz    \\flags, 1f                                     \n"
> "       di                                                      \n"
> "       ei                                                      \n"
> "1:                                                             \n"
>
> Doesn't this imply that you can't do recursive local_irq_save() (with different locks ofcourse)?
>

No.  In fact local_irq_save() is intentionally designed to be used 
'recursively'.

David Daney

From wuzhangjin@gmail.com Thu Mar 11 19:14:28 2010
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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     Steven Rostedt <srostedt@redhat.com>, linux-mips@linux-mips.org,
        David Daney <ddaney@caviumnetworks.com>,
        Wu Zhangjin <wuzhangjin@gmail.com>
Subject: [PATCH] MIPS: tracing: Optimize the implementation
Date:   Fri, 12 Mar 2010 02:07:37 +0800
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From: Wu Zhangjin <wuzhangjin@gmail.com>

(All of the stuff have been tested for kernel and module, including static
 function tracer, dynamic function tracer and function graph tracer.)

Changes:

  + Reduce the runtime overhead

    o Uses macros instead of variables for the fixed instructions to
    reduce memory access

    o Moves the Initilization of the instructions which will be fixed
    after linking from ftrace_make_nop/ftrace_make_call to
    ftrace_dyn_arch_init() and encodes the instructions through
    uasm(arch/mips/include/asm/uasm.h).

    o A common macro in_module() is defined to determine which space the
    instruction pointer stays in and several related conditional
    statements are converted to conditional operator(? :) statement.

  + Cleanup the whole stuff

    Lots of comments/macros have been cleaned up to let it look better.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
---
 arch/mips/include/asm/ftrace.h |   10 ++-
 arch/mips/kernel/ftrace.c      |  201 ++++++++++++++++++++++------------------
 2 files changed, 119 insertions(+), 92 deletions(-)

diff --git a/arch/mips/include/asm/ftrace.h b/arch/mips/include/asm/ftrace.h
index ce35c9a..e58f9ff 100644
--- a/arch/mips/include/asm/ftrace.h
+++ b/arch/mips/include/asm/ftrace.h
@@ -3,7 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive for
  * more details.
  *
- * Copyright (C) 2009 DSLab, Lanzhou University, China
+ * Copyright (C) 2009, 2010 DSLab, Lanzhou University, China
  * Author: Wu Zhangjin <wuzhangjin@gmail.com>
  */
 
@@ -19,6 +19,12 @@
 extern void _mcount(void);
 #define mcount _mcount
 
+/*
+ * If the Instruction Pointer is in module space (0xc0000000), return ture;
+ * otherwise, it is in kernel space (0x80000000), return false.
+ */
+#define in_module(ip) (unlikely((ip) & 0x40000000))
+
 #define safe_load(load, src, dst, error)		\
 do {							\
 	asm volatile (					\
@@ -83,8 +89,8 @@ static inline unsigned long ftrace_call_adjust(unsigned long addr)
 
 struct dyn_arch_ftrace {
 };
+#endif /* CONFIG_DYNAMIC_FTRACE */
 
-#endif /*  CONFIG_DYNAMIC_FTRACE */
 #endif /* __ASSEMBLY__ */
 #endif /* CONFIG_FUNCTION_TRACER */
 #endif /* _ASM_MIPS_FTRACE_H */
diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c
index e9e64e0..c38e3d9 100644
--- a/arch/mips/kernel/ftrace.c
+++ b/arch/mips/kernel/ftrace.c
@@ -2,7 +2,7 @@
  * Code for replacing ftrace calls with jumps.
  *
  * Copyright (C) 2007-2008 Steven Rostedt <srostedt@redhat.com>
- * Copyright (C) 2009 DSLab, Lanzhou University, China
+ * Copyright (C) 2009, 2010 DSLab, Lanzhou University, China
  * Author: Wu Zhangjin <wuzhangjin@gmail.com>
  *
  * Thanks goes to Steven Rostedt for writing the original x86 version.
@@ -15,15 +15,50 @@
 #include <asm/cacheflush.h>
 #include <asm/asm.h>
 #include <asm/asm-offsets.h>
+#include <asm/uasm.h>
 
 #ifdef CONFIG_DYNAMIC_FTRACE
 
-#define JAL 0x0c000000		/* jump & link: ip --> ra, jump to target */
-#define ADDR_MASK 0x03ffffff	/*  op_code|addr : 31...26|25 ....0 */
-#define jump_insn_encode(op_code, addr) \
-	((unsigned int)((op_code) | (((addr) >> 2) & ADDR_MASK)))
+/* Before linking, the following instructions are fixed. */
+#ifdef CONFIG_CPU_LOONGSON2F
+/* insn: or at, at, zero */
+#define INSN_NOP 0x00200825
+#else
+/* insn: nop */
+#define INSN_NOP 0x00000000
+#endif
+
+/* insn: b 1f; offset = (16 >> 2) */
+#define INSN_B_1F 0x10000004
+
+/* After linking, the following instructions are fixed. */
+static unsigned int insn_jal_ftrace_caller __read_mostly;
+static unsigned int insn_lui_v1_hi16_mcount __read_mostly;
+static unsigned int insn_j_ftrace_graph_caller __read_mostly;
 
-static unsigned int ftrace_nop = 0x00000000;
+/* The following instructions are encoded in the run-time */
+/* insn: jal func; op_code|addr : 31...26|25 ....0 */
+#define jal(addr) \
+	((unsigned int)(0x0c000000 | (((addr) >> 2) & 0x03ffffff)))
+
+static inline void ftrace_dyn_arch_init_insns(void)
+{
+	u32 *buf;
+	unsigned int v1;
+
+	/* lui v1, hi16_mcount */
+	v1 = 3;
+	buf = (u32 *)&insn_lui_v1_hi16_mcount;
+	UASM_i_LA_mostly(&buf, v1, MCOUNT_ADDR);
+
+	/* jal (ftrace_caller + 8), jump over the first two instruction */
+	buf = (u32 *)&insn_jal_ftrace_caller;
+	uasm_i_jal(&buf, (FTRACE_ADDR + 8));
+
+	/* j ftrace_graph_caller */
+	buf = (u32 *)&insn_j_ftrace_graph_caller;
+	uasm_i_j(&buf, (unsigned long)ftrace_graph_caller);
+}
 
 static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
 {
@@ -31,7 +66,6 @@ static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
 
 	/* *(unsigned int *)ip = new_code; */
 	safe_store_code(new_code, ip, faulted);
-
 	if (unlikely(faulted))
 		return -EFAULT;
 
@@ -40,117 +74,101 @@ static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
 	return 0;
 }
 
-static int lui_v1;
-static int jal_mcount;
-
 int ftrace_make_nop(struct module *mod,
 		    struct dyn_ftrace *rec, unsigned long addr)
 {
 	unsigned int new;
-	int faulted;
 	unsigned long ip = rec->ip;
 
-	/* We have compiled module with -mlong-calls, but compiled the kernel
-	 * without it, we need to cope with them respectively. */
-	if (ip & 0x40000000) {
-		/* record it for ftrace_make_call */
-		if (lui_v1 == 0) {
-			/* lui_v1 = *(unsigned int *)ip; */
-			safe_load_code(lui_v1, ip, faulted);
-
-			if (unlikely(faulted))
-				return -EFAULT;
-		}
-
-		/* lui v1, hi_16bit_of_mcount        --> b 1f (0x10000004)
-		 * addiu v1, v1, low_16bit_of_mcount
-		 * move at, ra
-		 * jalr v1
-		 * nop
-		 * 				     1f: (ip + 12)
-		 */
-		new = 0x10000004;
-	} else {
-		/* record/calculate it for ftrace_make_call */
-		if (jal_mcount == 0) {
-			/* We can record it directly like this:
-			 *     jal_mcount = *(unsigned int *)ip;
-			 * Herein, jump over the first two nop instructions */
-			jal_mcount = jump_insn_encode(JAL, (MCOUNT_ADDR + 8));
-		}
-
-		/* move at, ra
-		 * jalr v1		--> nop
-		 */
-		new = ftrace_nop;
-	}
+	/*
+	 * We have compiled modules with -mlong-calls, but compiled kernel
+	 * without it, therefore, need to cope with them respectively.
+	 *
+	 * For module:
+	 *
+	 *	lui	v1, hi16_mcount		--> b	1f
+	 *	addiu	v1, v1, lo16_mcount
+	 *	move	at, ra
+	 *	jalr	v1
+	 *	 nop
+	 *					1f: (ip + 16)
+	 * For kernel:
+	 *
+	 *	move	at, ra
+	 *	jal	_mcount			--> nop
+	 *
+	 */
+	new = in_module(ip) ? INSN_B_1F : INSN_NOP;
+
 	return ftrace_modify_code(ip, new);
 }
 
-static int modified;	/* initialized as 0 by default */
-
 int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
 {
 	unsigned int new;
 	unsigned long ip = rec->ip;
 
-	/* We just need to remove the "b ftrace_stub" at the fist time! */
-	if (modified == 0) {
-		modified = 1;
-		ftrace_modify_code(addr, ftrace_nop);
-	}
-	/* ip, module: 0xc0000000, kernel: 0x80000000 */
-	new = (ip & 0x40000000) ? lui_v1 : jal_mcount;
+	new = in_module(ip) ? insn_lui_v1_hi16_mcount : insn_jal_ftrace_caller;
 
 	return ftrace_modify_code(ip, new);
 }
 
-#define FTRACE_CALL_IP ((unsigned long)(&ftrace_call))
-
 int ftrace_update_ftrace_func(ftrace_func_t func)
 {
 	unsigned int new;
 
-	new = jump_insn_encode(JAL, (unsigned long)func);
+	new = jal((unsigned long)func);
 
-	return ftrace_modify_code(FTRACE_CALL_IP, new);
+	return ftrace_modify_code((unsigned long)(&ftrace_call), new);
 }
 
 int __init ftrace_dyn_arch_init(void *data)
 {
+	ftrace_dyn_arch_init_insns();
+
+	/*
+	 * We are safe to remove the "b ftrace_stub" for the current
+	 * ftrace_caller() is almost empty (only the stack operations), and
+	 * most importantly, the calling to mcount will be disabled later in
+	 * ftrace_init(), then there is no 'big' overhead. And in the future,
+	 * we are hoping the function_trace_stop is initialized as 1 then we
+	 * can eventually remove that 'useless' "b ftrace_stub" and the
+	 * following nop. Currently, although we can call ftrace_stop() to set
+	 * function_trace_stop as 1, but it will change the behavior of the
+	 * Function Tracer.
+	 */
+	ftrace_modify_code(MCOUNT_ADDR, INSN_NOP);
+
 	/* The return code is retured via data */
 	*(unsigned long *)data = 0;
 
 	return 0;
 }
-#endif				/* CONFIG_DYNAMIC_FTRACE */
+#endif	/* CONFIG_DYNAMIC_FTRACE */
 
 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
 
 #ifdef CONFIG_DYNAMIC_FTRACE
 
 extern void ftrace_graph_call(void);
-#define JMP	0x08000000	/* jump to target directly */
-#define CALL_FTRACE_GRAPH_CALLER \
-	jump_insn_encode(JMP, (unsigned long)(&ftrace_graph_caller))
 #define FTRACE_GRAPH_CALL_IP	((unsigned long)(&ftrace_graph_call))
 
 int ftrace_enable_ftrace_graph_caller(void)
 {
 	return ftrace_modify_code(FTRACE_GRAPH_CALL_IP,
-				  CALL_FTRACE_GRAPH_CALLER);
+			insn_j_ftrace_graph_caller);
 }
 
 int ftrace_disable_ftrace_graph_caller(void)
 {
-	return ftrace_modify_code(FTRACE_GRAPH_CALL_IP, ftrace_nop);
+	return ftrace_modify_code(FTRACE_GRAPH_CALL_IP, INSN_NOP);
 }
 
-#endif				/* !CONFIG_DYNAMIC_FTRACE */
+#endif	/* !CONFIG_DYNAMIC_FTRACE */
 
 #ifndef KBUILD_MCOUNT_RA_ADDRESS
-#define S_RA_SP	(0xafbf << 16)	/* s{d,w} ra, offset(sp) */
-#define S_R_SP	(0xafb0 << 16)  /* s{d,w} R, offset(sp) */
+#define S_RA_SP	0xafbf0000	/* s{d,w} ra, offset(sp) */
+#define S_R_SP		0xafb00000	/* s{d,w} R, offset(sp) */
 #define OFFSET_MASK	0xffff	/* stack offset range: 0 ~ PT_SIZE */
 
 unsigned long ftrace_get_parent_addr(unsigned long self_addr,
@@ -162,32 +180,32 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr,
 	unsigned int code;
 	int faulted;
 
-	/* in module or kernel? */
-	if (self_addr & 0x40000000) {
-		/* module: move to the instruction "lui v1, HI_16BIT_OF_MCOUNT" */
-		ip = self_addr - 20;
-	} else {
-		/* kernel: move to the instruction "move ra, at" */
-		ip = self_addr - 12;
-	}
+	/*
+	 * For module, move the ip from calling site of mcount to the
+	 * instruction "lui v1, hi_16bit_of_mcount"(offset is 20), but for
+	 * kernel, move to the instruction "move ra, at"(offset is 12)
+	 */
+	ip = self_addr - (in_module(self_addr) ? 20 : 12);
 
-	/* search the text until finding the non-store instruction or "s{d,w}
-	 * ra, offset(sp)" instruction */
+	/*
+	 * search the text until finding the non-store instruction or "s{d,w}
+	 * ra, offset(sp)" instruction
+	 */
 	do {
 		ip -= 4;
 
 		/* get the code at "ip": code = *(unsigned int *)ip; */
 		safe_load_code(code, ip, faulted);
-
 		if (unlikely(faulted))
 			return 0;
 
-		/* If we hit the non-store instruction before finding where the
+		/*
+		 * If we hit the non-store instruction before finding where the
 		 * ra is stored, then this is a leaf function and it does not
-		 * store the ra on the stack. */
+		 * store the ra on the stack.
+		 */
 		if ((code & S_R_SP) != S_R_SP)
 			return parent_addr;
-
 	} while (((code & S_RA_SP) != S_RA_SP));
 
 	sp = fp + (code & OFFSET_MASK);
@@ -211,16 +229,17 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr,
 void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
 			   unsigned long fp)
 {
+	int faulted;
 	unsigned long old;
 	struct ftrace_graph_ent trace;
 	unsigned long return_hooker = (unsigned long)
 	    &return_to_handler;
-	int faulted;
 
 	if (unlikely(atomic_read(&current->tracing_graph_pause)))
 		return;
 
-	/* "parent" is the stack address saved the return address of the caller
+	/*
+	 * "parent" is the stack address saved the return address of the caller
 	 * of _mcount.
 	 *
 	 * if the gcc < 4.5, a leaf function does not save the return address
@@ -241,12 +260,14 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
 	if (unlikely(faulted))
 		goto out;
 #ifndef KBUILD_MCOUNT_RA_ADDRESS
-	parent = (unsigned long *)ftrace_get_parent_addr(self_addr, old,
-							 (unsigned long)parent,
-							 fp);
-	/* If fails when getting the stack address of the non-leaf function's
-	 * ra, stop function graph tracer and return */
-	if (parent == 0)
+	parent = (unsigned long *)ftrace_get_parent_addr(
+			self_addr, old, (unsigned long)parent, fp);
+
+	/*
+	 * If fails on getting the stack address of the non-leaf function's ra,
+	 * stop function graph tracer and return
+	 */
+	if (unlikely(parent == 0))
 		goto out;
 #endif
 	/* *parent = return_hooker; */
@@ -272,4 +293,4 @@ out:
 	ftrace_graph_stop();
 	WARN_ON(1);
 }
-#endif				/* CONFIG_FUNCTION_GRAPH_TRACER */
+#endif	/* CONFIG_FUNCTION_GRAPH_TRACER */
-- 
1.7.0.1


From ralf@linux-mips.org Thu Mar 11 21:14:55 2010
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Date:   Thu, 11 Mar 2010 21:14:47 +0100
From:   Ralf Baechle <ralf@linux-mips.org>
To:     Wu Zhangjin <wuzhangjin@gmail.com>
Cc:     linux-mips@linux-mips.org
Subject: Re: [PATCH] Loongson: Add module info to the loongson2_clock driver
Message-ID: <20100311201447.GA25163@linux-mips.org>
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On Wed, Mar 10, 2010 at 12:53:21AM +0800, Wu Zhangjin wrote:

> This patch fixes the warning of the tool which checks the module info of
> the loongson2_clock driver when inserting it into the kernel:
> 
> "Feb 25 23:42:27 localhost kernel: [    4.965000] loongson2_clock: module
> license 'unspecified' taints kernel."
> 
> Reported-by: Liu Shiwei <liushiwei@gmail.com>
> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>

Thanks, applied.

  Ralf

From w.sang@pengutronix.de Fri Mar 12 08:05:36 2010
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From:   Wolfram Sang <w.sang@pengutronix.de>
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Subject: [PATCH 1/3] arch/mips/txx9/generic: init dynamic bin_attribute structures
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Commit 6992f5334995af474c2b58d010d08bc597f0f2fe introduced this requirement.
Found with coccinelle, but fixed manually. Compile tested on X86 where
possible.

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Eric W. Biederman <ebiederm@xmission.com>
---
 arch/mips/txx9/generic/setup.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c
index 7174d83..95184a0 100644
--- a/arch/mips/txx9/generic/setup.c
+++ b/arch/mips/txx9/generic/setup.c
@@ -956,6 +956,7 @@ void __init txx9_sramc_init(struct resource *r)
 	if (!dev->base)
 		goto exit;
 	dev->dev.cls = &txx9_sramc_sysdev_class;
+	sysfs_bin_attr_init(&dev->bindata_attr);
 	dev->bindata_attr.attr.name = "bindata";
 	dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR;
 	dev->bindata_attr.read = txx9_sram_read;
-- 
1.7.0


From tsbogend@alpha.franken.de Fri Mar 12 09:59:07 2010
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From:   Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To:     Wu Zhangjin <wuzhangjin@gmail.com>
Cc:     Ralf Baechle <ralf@linux-mips.org>,
        Steven Rostedt <srostedt@redhat.com>,
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Subject: Re: [PATCH] MIPS: tracing: Optimize the implementation
Message-ID: <20100312085053.GB6364@alpha.franken.de>
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On Fri, Mar 12, 2010 at 02:07:37AM +0800, Wu Zhangjin wrote:
> +/*
> + * If the Instruction Pointer is in module space (0xc0000000), return ture;
> + * otherwise, it is in kernel space (0x80000000), return false.
> + */
> +#define in_module(ip) (unlikely((ip) & 0x40000000))
> +

looks broken for 64bit, but maybe this is a 32bit only feature...

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea.                                                [ RFC1925, 2.3 ]

From ralf@linux-mips.org Fri Mar 12 11:14:20 2010
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From:   Ralf Baechle <ralf@linux-mips.org>
To:     Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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        Steven Rostedt <srostedt@redhat.com>,
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Subject: Re: [PATCH] MIPS: tracing: Optimize the implementation
Message-ID: <20100312101413.GA22877@linux-mips.org>
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 <20100312085053.GB6364@alpha.franken.de>
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On Fri, Mar 12, 2010 at 09:50:53AM +0100, Thomas Bogendoerfer wrote:

> On Fri, Mar 12, 2010 at 02:07:37AM +0800, Wu Zhangjin wrote:
> > +/*
> > + * If the Instruction Pointer is in module space (0xc0000000), return ture;
> > + * otherwise, it is in kernel space (0x80000000), return false.
> > + */
> > +#define in_module(ip) (unlikely((ip) & 0x40000000))
> > +
> 
> looks broken for 64bit, but maybe this is a 32bit only feature...

This gem did already exist in the old code, so no regression:

	if (ip & 0x40000000) {

  Ralf

From wuzhangjin@gmail.com Fri Mar 12 11:18:18 2010
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Subject: Re: [PATCH] MIPS: tracing: Optimize the implementation
From:   Wu Zhangjin <wuzhangjin@gmail.com>
Reply-To: wuzhangjin@gmail.com
To:     Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc:     Ralf Baechle <ralf@linux-mips.org>,
        Steven Rostedt <srostedt@redhat.com>,
        linux-mips@linux-mips.org, David Daney <ddaney@caviumnetworks.com>
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         <20100312085053.GB6364@alpha.franken.de>
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Date:   Fri, 12 Mar 2010 18:11:35 +0800
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On Fri, 2010-03-12 at 09:50 +0100, Thomas Bogendoerfer wrote:
> On Fri, Mar 12, 2010 at 02:07:37AM +0800, Wu Zhangjin wrote:
> > +/*
> > + * If the Instruction Pointer is in module space (0xc0000000), return ture;
> > + * otherwise, it is in kernel space (0x80000000), return false.
> > + */
> > +#define in_module(ip) (unlikely((ip) & 0x40000000))
> > +
> 
> looks broken for 64bit, but maybe this is a 32bit only feature...

Actually, this works well on my 64bit YeeLoong laptop ;)

But we should find another better solution.

Regards,
	Wu Zhangjin



From wuzhangjin@gmail.com Fri Mar 12 12:50:20 2010
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Subject: Re: [PATCH] MIPS: tracing: Optimize the implementation
From:   Wu Zhangjin <wuzhangjin@gmail.com>
Reply-To: wuzhangjin@gmail.com
To:     David Daney <ddaney@caviumnetworks.com>
Cc:     Ralf Baechle <ralf@linux-mips.org>,
        Steven Rostedt <srostedt@redhat.com>, linux-mips@linux-mips.org
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Hi,

On Thu, 2010-03-11 at 10:49 -0800, David Daney wrote:
[...]
> > +/*
> > + * If the Instruction Pointer is in module space (0xc0000000), return ture;
> 
> s/ture/true/
> 

yeah.

> > + * otherwise, it is in kernel space (0x80000000), return false.
> > + */
> > +#define in_module(ip) (unlikely((ip)&  0x40000000))
> > +
> 
> This isn't universally true, but it does hold for most configurations I 
> think.

Although I'm not sure who is the exception, we always need an universal
solution, what about this:

Compare module with kernel:

module:

        <saving registers>

        lui     v1, hi16_mcount                <--- ip
        addiu   v1, v1, lo16_mcount
        move    at, ra
        jalr    v1
         nop

kernel:

        <saving registers>

         move    at, ra
         jal     _mcount                       <--- ip

The above _ip_ is the address have been recorded into the __mcount_loc
section of the kernel by scripts/recordmcount.pl, as we can see, for
kernel, the *(ip - 4) is "move at, ra": 03e0082d, a certain instruction,
but for module, there is no possibility(?) of existing a "move at, ra"
at *(ip -4) but a register saving operation("s {d,w} rs, offset(sp)",
prefixed by 0xffb0 for 64bit and 0xafb0 for 32bit. ), and reversly, for
kernel, there is no such instruction there.

And consider the new option -mmcount-ra-address of gcc, some more
instructions will be inserted between "move at, ra" and the calling site
to mcount, so, *(ip-4) will not always be "move at, ra", then we need to
check if there is a "s {d,w} rs, offset(sp)" there, if yes, it is in
module, otherwise, it should be in kernel.

#define S_RS_SP          0xafb00000      /* s{d,w} rs, offset(sp) */

static inline int in_module(ip)
{
	insn = *(ip - 4); /* need to use safe_load_code instead, what about big
endian? */

	return ((insn & S_RS_SP) == S_RS_SP)
}

> 
> [...]
> 
> > +	/*
> > +	 * We have compiled modules with -mlong-calls, but compiled kernel
> > +	 * without it, therefore, need to cope with them respectively.
> > +	 *
> > +	 * For module:
> > +	 *
> > +	 *	lui	v1, hi16_mcount		-->  b	1f
> > +	 *	addiu	v1, v1, lo16_mcount
> > +	 *	move	at, ra
> > +	 *	jalr	v1
> > +	 *	 nop
> > +	 *					1f: (ip + 16)
> 
> 
> Have you thought about just overwriting the jalr here instead of 
> branching around it?  In any event, I don't think you can count on a 
> fixed size code sequence for calling _mcount.  We are passing the 
> address of the save location of RA to _mcount too.  The size of the code 
> will depend on the size of the functions stack frame *and* weather or 
> not it is a leaf function.  Although in the kernel we are unlikely to 
> see functions with large stack frames.

So even with "b 1f", we need to use the right offset, the original
version for module with -mmcount-ra-address should have bugs here for
the offset should be 16 + 8 or 4 (two instructions for leaf function,
one instruction for non-leaf function).

but for we only recorded the position of "lui v1, hi16_mcount" in the
__mcount_loc section, so we need to search the position of the real
calling site of mcount(jalr v1), this will goes to what you have
suggested below.

> 
> 
> > +	 * For kernel:
> > +	 *
> > +	 *	move	at, ra
> > +	 *	jal	_mcount			-->  nop
> > +	 *
> > +	 */
> > +	new = in_module(ip) ? INSN_B_1F : INSN_NOP;
> 
> 
> What would happen if you read the code to find the first JAL or JALR, 
> and then overwrote it with a NOP instead of relying on the function 
> address to figure out which type of prolog it has?
> 
> The reason I suggest this is that sometimes we place the entire kernel 
> in CSSEG.  When this is done, everything has the same (short) _mcount 
> calling sequence.

Right, then, we can search the JAL or JALR, for kernel, will get it
immediatly, for module, will only several instructions, we can do this
searching in ftrace_make_nop and ftrace_make_call at run-time, but just
found we can use the following function to do it in ftrace_init(), looks
good.

static inline int is_call_mcount(unsigned int insn)
{
	return ((insn & JAL) == JAL) || (insn == JALR_V1);
}

static inline unsinged long mcount_callsite(unsigned long addr)
{
	unsigned int insn;

	insn = *(unsigned int *)addr; /*need safe_load_code*/
	if (is_call_mcount(insn))
		return addr;

	do {
		addr += 4;	/* what about big endian? */
		insn = *(unsigned int *)addr; /*need safe_load_code*/
	} while (!is_call_mcount(insn));

	return addr;
}

static inline unsigned long ftrace_call_adjust(unsigned long addr)
{
        return mcount_callsite(addr);
}

With the above support, we only need this new ftrace_make_nop:

*(unsigned int *)ip = INSN_NOP;

(But for module, this may need more overhead than "b 1f". )

and ftrace_make_call:

*(unsigned int *)ip = in_module(ip) : INSN_JALR_V1 : insn_jal_mcount;

(And here, for module, we need more time to determine which space we
are.)

Any more suggestion?

Thanks & Regards,
	Wu Zhangjin


From wuzhangjin@gmail.com Fri Mar 12 16:03:49 2010
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Subject: Re: [PATCH] MIPS: tracing: Optimize the implementation
From:   Wu Zhangjin <wuzhangjin@gmail.com>
Reply-To: wuzhangjin@gmail.com
To:     David Daney <ddaney@caviumnetworks.com>
Cc:     Ralf Baechle <ralf@linux-mips.org>,
        Steven Rostedt <srostedt@redhat.com>, linux-mips@linux-mips.org
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         <4B993B32.7000006@caviumnetworks.com>  <1268394209.6447.94.camel@falcon>
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Organization: DSLab, Lanzhou University, China
Date:   Fri, 12 Mar 2010 22:57:08 +0800
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On Fri, 2010-03-12 at 19:43 +0800, Wu Zhangjin wrote:
[...]
> Right, then, we can search the JAL or JALR, for kernel, will get it
> immediatly, for module, will only several instructions, we can do this
> searching in ftrace_make_nop and ftrace_make_call at run-time, but just
> found we can use the following function to do it in ftrace_init(), looks
> good.
> 
> static inline int is_call_mcount(unsigned int insn)
> {
> 	return ((insn & JAL) == JAL) || (insn == JALR_V1);
> }
> 
> static inline unsinged long mcount_callsite(unsigned long addr)
> {
> 	unsigned int insn;
> 
> 	insn = *(unsigned int *)addr; /*need safe_load_code*/
> 	if (is_call_mcount(insn))
> 		return addr;
> 
> 	do {
> 		addr += 4;	/* what about big endian? */
> 		insn = *(unsigned int *)addr; /*need safe_load_code*/
> 	} while (!is_call_mcount(insn));
> 

This is not possible for modules, for currently, the modules are not
loaded yet.

Regards,
	Wu Zhangjin


From David.Daney@caviumnetworks.com Fri Mar 12 17:46:09 2010
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        Ralf Baechle <ralf@linux-mips.org>,
        Steven Rostedt <srostedt@redhat.com>, linux-mips@linux-mips.org
Subject: Re: [PATCH] MIPS: tracing: Optimize the implementation
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On 03/12/2010 12:50 AM, Thomas Bogendoerfer wrote:
> On Fri, Mar 12, 2010 at 02:07:37AM +0800, Wu Zhangjin wrote:
>> +/*
>> + * If the Instruction Pointer is in module space (0xc0000000), return ture;
>> + * otherwise, it is in kernel space (0x80000000), return false.
>> + */
>> +#define in_module(ip) (unlikely((ip)&  0x40000000))
>> +
>
> looks broken for 64bit, but maybe this is a 32bit only feature...
>

I initially thought the same thing.  However for 64-bit kernels linked 
in ckseg0 it is still true.  If we use the -msym32 optimization, we are 
forced to be in the ckseg space, so for most cases it works.

David Daney.

From wuzhangjin@gmail.com Fri Mar 12 18:34:42 2010
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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     Steven Rostedt <srostedt@redhat.com>, linux-mips@linux-mips.org,
        David Daney <ddaney@caviumnetworks.com>,
        Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
        Wu Zhangjin <wuzhangjin@gmail.com>
Subject: [PATCH v2] MIPS: tracing: Optimize the implementation
Date:   Sat, 13 Mar 2010 01:27:46 +0800
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From: Wu Zhangjin <wuzhangjin@gmail.com>

This revision fixes the potential bugs (reported by David) when compiling the
kernel with -mmcount-ra-address of gcc 4.5, I only tested it without this
option for I don't have a gcc 4.5 currently.

------------

Changes:

v1 -> v2:

  + Fixup the support of -mmcount-ra-address

    The offset of "b 1f" instruction should be 20 for leaf-function and
    24 for non-leaf function when -mmcount-ra-address is enabled. This
    patch adds a new get_insn_b_1f() function to get the different "b
    1f" instruction.

  (only test without -mmcount-ra-address.)

v1:

  + Reduce the runtime overhead

    o Uses macros instead of variables for the fixed instructions to
    reduce memory access

    o Moves the Initilization of the instructions which will be fixed
    after linking from ftrace_make_nop/ftrace_make_call to
    ftrace_dyn_arch_init() and encodes the instructions through
    uasm(arch/mips/include/asm/uasm.h).

    o A common macro in_module() is defined to determine which space the
    instruction pointer stays in and several related conditional
    statements are converted to conditional operator(? :) statement.

  + Cleanup the whole stuff

    Lots of comments/macros have been cleaned up to let it look better.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
---
 arch/mips/include/asm/ftrace.h |   12 ++-
 arch/mips/kernel/ftrace.c      |  236 ++++++++++++++++++++++++----------------
 2 files changed, 153 insertions(+), 95 deletions(-)

diff --git a/arch/mips/include/asm/ftrace.h b/arch/mips/include/asm/ftrace.h
index ce35c9a..6dbfa1e 100644
--- a/arch/mips/include/asm/ftrace.h
+++ b/arch/mips/include/asm/ftrace.h
@@ -3,7 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive for
  * more details.
  *
- * Copyright (C) 2009 DSLab, Lanzhou University, China
+ * Copyright (C) 2009, 2010 DSLab, Lanzhou University, China
  * Author: Wu Zhangjin <wuzhangjin@gmail.com>
  */
 
@@ -19,6 +19,14 @@
 extern void _mcount(void);
 #define mcount _mcount
 
+/*
+ * If the Instruction Pointer is in module space (0xc0000000), return true;
+ * otherwise, it is in kernel space (0x80000000), return false.
+ *
+ * FIXME: This may not work in some cases.
+ */
+#define in_module(ip) (unlikely((ip) & 0x40000000))
+
 #define safe_load(load, src, dst, error)		\
 do {							\
 	asm volatile (					\
@@ -83,8 +91,8 @@ static inline unsigned long ftrace_call_adjust(unsigned long addr)
 
 struct dyn_arch_ftrace {
 };
+#endif /* CONFIG_DYNAMIC_FTRACE */
 
-#endif /*  CONFIG_DYNAMIC_FTRACE */
 #endif /* __ASSEMBLY__ */
 #endif /* CONFIG_FUNCTION_TRACER */
 #endif /* _ASM_MIPS_FTRACE_H */
diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c
index e9e64e0..b72107e 100644
--- a/arch/mips/kernel/ftrace.c
+++ b/arch/mips/kernel/ftrace.c
@@ -2,7 +2,7 @@
  * Code for replacing ftrace calls with jumps.
  *
  * Copyright (C) 2007-2008 Steven Rostedt <srostedt@redhat.com>
- * Copyright (C) 2009 DSLab, Lanzhou University, China
+ * Copyright (C) 2009, 2010 DSLab, Lanzhou University, China
  * Author: Wu Zhangjin <wuzhangjin@gmail.com>
  *
  * Thanks goes to Steven Rostedt for writing the original x86 version.
@@ -15,15 +15,48 @@
 #include <asm/cacheflush.h>
 #include <asm/asm.h>
 #include <asm/asm-offsets.h>
+#include <asm/uasm.h>
 
 #ifdef CONFIG_DYNAMIC_FTRACE
 
-#define JAL 0x0c000000		/* jump & link: ip --> ra, jump to target */
-#define ADDR_MASK 0x03ffffff	/*  op_code|addr : 31...26|25 ....0 */
-#define jump_insn_encode(op_code, addr) \
-	((unsigned int)((op_code) | (((addr) >> 2) & ADDR_MASK)))
+/* Before linking, the following instructions are fixed. */
+#ifdef CONFIG_CPU_LOONGSON2F
+#define INSN_NOP 0x00200825	/* or at, at, zero */
+#else
+#define INSN_NOP 0x00000000	/* nop */
+#endif
+#define INSN_B_1F_16 0x10000004	/* b 1f; offset = (16 >> 2) */
+#define INSN_B_1F_20 0x10000005	/* b 1f; offset = (20 >> 2) */
+#define INSN_B_1F_24 0x10000006	/* b 1f; offset = (24 >> 2) */
+
+/* After linking, the following instructions are fixed. */
+static unsigned int insn_jal_ftrace_caller __read_mostly;
+static unsigned int insn_lui_v1_hi16_mcount __read_mostly;
+static unsigned int insn_j_ftrace_graph_caller __read_mostly;
 
-static unsigned int ftrace_nop = 0x00000000;
+/* The following instructions are encoded in the run-time */
+/* insn: jal func; op_code|addr : 31...26|25 ....0 */
+#define INSN_JAL(addr) \
+	((unsigned int)(0x0c000000 | (((addr) >> 2) & 0x03ffffff)))
+
+static inline void ftrace_dyn_arch_init_insns(void)
+{
+	u32 *buf;
+	unsigned int v1;
+
+	/* lui v1, hi16_mcount */
+	v1 = 3;
+	buf = (u32 *)&insn_lui_v1_hi16_mcount;
+	UASM_i_LA_mostly(&buf, v1, MCOUNT_ADDR);
+
+	/* jal (ftrace_caller + 8), jump over the first two instruction */
+	buf = (u32 *)&insn_jal_ftrace_caller;
+	uasm_i_jal(&buf, (FTRACE_ADDR + 8));
+
+	/* j ftrace_graph_caller */
+	buf = (u32 *)&insn_j_ftrace_graph_caller;
+	uasm_i_j(&buf, (unsigned long)ftrace_graph_caller);
+}
 
 static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
 {
@@ -31,7 +64,6 @@ static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
 
 	/* *(unsigned int *)ip = new_code; */
 	safe_store_code(new_code, ip, faulted);
-
 	if (unlikely(faulted))
 		return -EFAULT;
 
@@ -40,118 +72,133 @@ static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
 	return 0;
 }
 
-static int lui_v1;
-static int jal_mcount;
+static inline unsigned int get_insn_b_1f(unsigned int *insn, unsigned long ip)
+{
+#ifndef KBUILD_MCOUNT_RA_ADDRESS
+	*insn = INSN_B_1F_16;
+	return 0;
+#else
+	int faulted;
+	unsigned int code;
+
+	ip -= 4;
+
+	/* code = *(unsigned int *)ip; */
+	safe_load_code(code, ip, faulted);
+	if (unlikely(faulted))
+		return -EFAULT;
+
+	if ((code & S_R_SP) != S_R_SP)
+		*insn = INSN_B_1F_20;
+	else
+		*insn = INSN_B_1F_24;
+
+	return 0;
+#endif
+}
 
 int ftrace_make_nop(struct module *mod,
 		    struct dyn_ftrace *rec, unsigned long addr)
 {
 	unsigned int new;
-	int faulted;
 	unsigned long ip = rec->ip;
 
-	/* We have compiled module with -mlong-calls, but compiled the kernel
-	 * without it, we need to cope with them respectively. */
-	if (ip & 0x40000000) {
-		/* record it for ftrace_make_call */
-		if (lui_v1 == 0) {
-			/* lui_v1 = *(unsigned int *)ip; */
-			safe_load_code(lui_v1, ip, faulted);
-
-			if (unlikely(faulted))
-				return -EFAULT;
-		}
-
-		/* lui v1, hi_16bit_of_mcount        --> b 1f (0x10000004)
-		 * addiu v1, v1, low_16bit_of_mcount
-		 * move at, ra
-		 * jalr v1
-		 * nop
-		 * 				     1f: (ip + 12)
-		 */
-		new = 0x10000004;
-	} else {
-		/* record/calculate it for ftrace_make_call */
-		if (jal_mcount == 0) {
-			/* We can record it directly like this:
-			 *     jal_mcount = *(unsigned int *)ip;
-			 * Herein, jump over the first two nop instructions */
-			jal_mcount = jump_insn_encode(JAL, (MCOUNT_ADDR + 8));
-		}
-
-		/* move at, ra
-		 * jalr v1		--> nop
-		 */
-		new = ftrace_nop;
-	}
+	/*
+	 * We have compiled modules with -mlong-calls, but compiled kernel
+	 * without it, therefore, need to cope with them respectively.
+	 *
+	 * For module:
+	 *
+	 *	lui	v1, hi16_mcount		--> b	1f
+	 *	addiu	v1, v1, lo16_mcount
+	 *	move	at, ra
+	 *	jalr	v1
+	 *	 nop
+	 *					1f: (ip + 16)
+	 * For kernel:
+	 *
+	 *	move	at, ra
+	 *	jal	_mcount			--> nop
+	 *
+	 * And with the -mmcount-ra-address option, the offset may be 20 for
+	 * leaf fuction and 24 for non-leaf function.
+	 */
+
+	if (!in_module(ip))
+		new = INSN_NOP;
+	else if (get_insn_b_1f(&new, ip))
+		return -EFAULT;
+
 	return ftrace_modify_code(ip, new);
 }
 
-static int modified;	/* initialized as 0 by default */
-
 int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
 {
 	unsigned int new;
 	unsigned long ip = rec->ip;
 
-	/* We just need to remove the "b ftrace_stub" at the fist time! */
-	if (modified == 0) {
-		modified = 1;
-		ftrace_modify_code(addr, ftrace_nop);
-	}
-	/* ip, module: 0xc0000000, kernel: 0x80000000 */
-	new = (ip & 0x40000000) ? lui_v1 : jal_mcount;
+	new = in_module(ip) ? insn_lui_v1_hi16_mcount : insn_jal_ftrace_caller;
 
 	return ftrace_modify_code(ip, new);
 }
 
-#define FTRACE_CALL_IP ((unsigned long)(&ftrace_call))
-
 int ftrace_update_ftrace_func(ftrace_func_t func)
 {
 	unsigned int new;
 
-	new = jump_insn_encode(JAL, (unsigned long)func);
+	new = INSN_JAL((unsigned long)func);
 
-	return ftrace_modify_code(FTRACE_CALL_IP, new);
+	return ftrace_modify_code((unsigned long)(&ftrace_call), new);
 }
 
 int __init ftrace_dyn_arch_init(void *data)
 {
+	ftrace_dyn_arch_init_insns();
+
+	/*
+	 * We are safe to remove the "b ftrace_stub" for the current
+	 * ftrace_caller() is almost empty (only the stack operations), and
+	 * most importantly, the calling to mcount will be disabled later in
+	 * ftrace_init(), then there is no 'big' overhead. And in the future,
+	 * we are hoping the function_trace_stop is initialized as 1 then we
+	 * can eventually remove that 'useless' "b ftrace_stub" and the
+	 * following nop. Currently, although we can call ftrace_stop() to set
+	 * function_trace_stop as 1, but it will change the behavior of the
+	 * Function Tracer.
+	 */
+	ftrace_modify_code(MCOUNT_ADDR, INSN_NOP);
+
 	/* The return code is retured via data */
 	*(unsigned long *)data = 0;
 
 	return 0;
 }
-#endif				/* CONFIG_DYNAMIC_FTRACE */
+#endif	/* CONFIG_DYNAMIC_FTRACE */
 
 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
 
 #ifdef CONFIG_DYNAMIC_FTRACE
 
 extern void ftrace_graph_call(void);
-#define JMP	0x08000000	/* jump to target directly */
-#define CALL_FTRACE_GRAPH_CALLER \
-	jump_insn_encode(JMP, (unsigned long)(&ftrace_graph_caller))
 #define FTRACE_GRAPH_CALL_IP	((unsigned long)(&ftrace_graph_call))
 
 int ftrace_enable_ftrace_graph_caller(void)
 {
 	return ftrace_modify_code(FTRACE_GRAPH_CALL_IP,
-				  CALL_FTRACE_GRAPH_CALLER);
+			insn_j_ftrace_graph_caller);
 }
 
 int ftrace_disable_ftrace_graph_caller(void)
 {
-	return ftrace_modify_code(FTRACE_GRAPH_CALL_IP, ftrace_nop);
+	return ftrace_modify_code(FTRACE_GRAPH_CALL_IP, INSN_NOP);
 }
 
-#endif				/* !CONFIG_DYNAMIC_FTRACE */
+#endif	/* !CONFIG_DYNAMIC_FTRACE */
 
 #ifndef KBUILD_MCOUNT_RA_ADDRESS
-#define S_RA_SP	(0xafbf << 16)	/* s{d,w} ra, offset(sp) */
-#define S_R_SP	(0xafb0 << 16)  /* s{d,w} R, offset(sp) */
-#define OFFSET_MASK	0xffff	/* stack offset range: 0 ~ PT_SIZE */
+#define INSN_S_RA_SP	0xafbf0000	/* s{d,w} ra, offset(sp) */
+#define INSN_S_R_SP	0xafb00000	/* s{d,w} R, offset(sp) */
+#define STACK_OFFSET_MASK	0xffff	/* stack offset range: 0 ~ PT_SIZE */
 
 unsigned long ftrace_get_parent_addr(unsigned long self_addr,
 				     unsigned long parent,
@@ -162,35 +209,35 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr,
 	unsigned int code;
 	int faulted;
 
-	/* in module or kernel? */
-	if (self_addr & 0x40000000) {
-		/* module: move to the instruction "lui v1, HI_16BIT_OF_MCOUNT" */
-		ip = self_addr - 20;
-	} else {
-		/* kernel: move to the instruction "move ra, at" */
-		ip = self_addr - 12;
-	}
+	/*
+	 * For module, move the ip from calling site of mcount to the
+	 * instruction "lui v1, hi_16bit_of_mcount"(offset is 20), but for
+	 * kernel, move to the instruction "move ra, at"(offset is 12)
+	 */
+	ip = self_addr - (in_module(self_addr) ? 20 : 12);
 
-	/* search the text until finding the non-store instruction or "s{d,w}
-	 * ra, offset(sp)" instruction */
+	/*
+	 * search the text until finding the non-store instruction or "s{d,w}
+	 * ra, offset(sp)" instruction
+	 */
 	do {
 		ip -= 4;
 
 		/* get the code at "ip": code = *(unsigned int *)ip; */
 		safe_load_code(code, ip, faulted);
-
 		if (unlikely(faulted))
 			return 0;
 
-		/* If we hit the non-store instruction before finding where the
+		/*
+		 * If we hit the non-store instruction before finding where the
 		 * ra is stored, then this is a leaf function and it does not
-		 * store the ra on the stack. */
-		if ((code & S_R_SP) != S_R_SP)
+		 * store the ra on the stack.
+		 */
+		if ((code & INSN_S_R_SP) != INSN_S_R_SP)
 			return parent_addr;
+	} while (((code & INSN_S_RA_SP) != INSN_S_RA_SP));
 
-	} while (((code & S_RA_SP) != S_RA_SP));
-
-	sp = fp + (code & OFFSET_MASK);
+	sp = fp + (code & STACK_OFFSET_MASK);
 
 	/* ra = *(unsigned long *)sp; */
 	safe_load_stack(ra, sp, faulted);
@@ -211,16 +258,17 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr,
 void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
 			   unsigned long fp)
 {
+	int faulted;
 	unsigned long old;
 	struct ftrace_graph_ent trace;
 	unsigned long return_hooker = (unsigned long)
 	    &return_to_handler;
-	int faulted;
 
 	if (unlikely(atomic_read(&current->tracing_graph_pause)))
 		return;
 
-	/* "parent" is the stack address saved the return address of the caller
+	/*
+	 * "parent" is the stack address saved the return address of the caller
 	 * of _mcount.
 	 *
 	 * if the gcc < 4.5, a leaf function does not save the return address
@@ -241,12 +289,14 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
 	if (unlikely(faulted))
 		goto out;
 #ifndef KBUILD_MCOUNT_RA_ADDRESS
-	parent = (unsigned long *)ftrace_get_parent_addr(self_addr, old,
-							 (unsigned long)parent,
-							 fp);
-	/* If fails when getting the stack address of the non-leaf function's
-	 * ra, stop function graph tracer and return */
-	if (parent == 0)
+	parent = (unsigned long *)ftrace_get_parent_addr(
+			self_addr, old, (unsigned long)parent, fp);
+
+	/*
+	 * If fails on getting the stack address of the non-leaf function's ra,
+	 * stop function graph tracer and return
+	 */
+	if (unlikely(parent == 0))
 		goto out;
 #endif
 	/* *parent = return_hooker; */
@@ -272,4 +322,4 @@ out:
 	ftrace_graph_stop();
 	WARN_ON(1);
 }
-#endif				/* CONFIG_FUNCTION_GRAPH_TRACER */
+#endif	/* CONFIG_FUNCTION_GRAPH_TRACER */
-- 
1.7.0.1


From wuzhangjin@gmail.com Fri Mar 12 18:39:25 2010
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Subject: Re: [PATCH v2] MIPS: tracing: Optimize the implementation
From:   Wu Zhangjin <wuzhangjin@gmail.com>
Reply-To: wuzhangjin@gmail.com
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     Steven Rostedt <srostedt@redhat.com>, linux-mips@linux-mips.org,
        David Daney <ddaney@caviumnetworks.com>,
        Thomas Bogendoerfer <tsbogend@alpha.franken.de>
In-Reply-To: <0c3597eeee4dbd69eb5a74c2b46179014b291d56.1268414797.git.wuzhangjin@gmail.com>
References: <0c3597eeee4dbd69eb5a74c2b46179014b291d56.1268414797.git.wuzhangjin@gmail.com>
Content-Type: text/plain; charset="UTF-8"
Organization: DSLab, Lanzhou University, China
Date:   Sat, 13 Mar 2010 01:32:44 +0800
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X-list: linux-mips

Please ignore this one, thanks!

On Sat, 2010-03-13 at 01:27 +0800, Wu Zhangjin wrote:
> From: Wu Zhangjin <wuzhangjin@gmail.com>
> 
> This revision fixes the potential bugs (reported by David) when compiling the
> kernel with -mmcount-ra-address of gcc 4.5, I only tested it without this
> option for I don't have a gcc 4.5 currently.
> 
> ------------
> 
> Changes:
> 
> v1 -> v2:
> 
>   + Fixup the support of -mmcount-ra-address
> 
>     The offset of "b 1f" instruction should be 20 for leaf-function and
>     24 for non-leaf function when -mmcount-ra-address is enabled. This
>     patch adds a new get_insn_b_1f() function to get the different "b
>     1f" instruction.
> 
>   (only test without -mmcount-ra-address.)
> 
> v1:
> 
>   + Reduce the runtime overhead
> 
>     o Uses macros instead of variables for the fixed instructions to
>     reduce memory access
> 
>     o Moves the Initilization of the instructions which will be fixed
>     after linking from ftrace_make_nop/ftrace_make_call to
>     ftrace_dyn_arch_init() and encodes the instructions through
>     uasm(arch/mips/include/asm/uasm.h).
> 
>     o A common macro in_module() is defined to determine which space the
>     instruction pointer stays in and several related conditional
>     statements are converted to conditional operator(? :) statement.
> 
>   + Cleanup the whole stuff
> 
>     Lots of comments/macros have been cleaned up to let it look better.
> 
> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
> ---
>  arch/mips/include/asm/ftrace.h |   12 ++-
>  arch/mips/kernel/ftrace.c      |  236 ++++++++++++++++++++++++----------------
>  2 files changed, 153 insertions(+), 95 deletions(-)
> 
> diff --git a/arch/mips/include/asm/ftrace.h b/arch/mips/include/asm/ftrace.h
> index ce35c9a..6dbfa1e 100644
> --- a/arch/mips/include/asm/ftrace.h
> +++ b/arch/mips/include/asm/ftrace.h
> @@ -3,7 +3,7 @@
>   * License.  See the file "COPYING" in the main directory of this archive for
>   * more details.
>   *
> - * Copyright (C) 2009 DSLab, Lanzhou University, China
> + * Copyright (C) 2009, 2010 DSLab, Lanzhou University, China
>   * Author: Wu Zhangjin <wuzhangjin@gmail.com>
>   */
>  
> @@ -19,6 +19,14 @@
>  extern void _mcount(void);
>  #define mcount _mcount
>  
> +/*
> + * If the Instruction Pointer is in module space (0xc0000000), return true;
> + * otherwise, it is in kernel space (0x80000000), return false.
> + *
> + * FIXME: This may not work in some cases.
> + */
> +#define in_module(ip) (unlikely((ip) & 0x40000000))
> +
>  #define safe_load(load, src, dst, error)		\
>  do {							\
>  	asm volatile (					\
> @@ -83,8 +91,8 @@ static inline unsigned long ftrace_call_adjust(unsigned long addr)
>  
>  struct dyn_arch_ftrace {
>  };
> +#endif /* CONFIG_DYNAMIC_FTRACE */
>  
> -#endif /*  CONFIG_DYNAMIC_FTRACE */
>  #endif /* __ASSEMBLY__ */
>  #endif /* CONFIG_FUNCTION_TRACER */
>  #endif /* _ASM_MIPS_FTRACE_H */
> diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c
> index e9e64e0..b72107e 100644
> --- a/arch/mips/kernel/ftrace.c
> +++ b/arch/mips/kernel/ftrace.c
> @@ -2,7 +2,7 @@
>   * Code for replacing ftrace calls with jumps.
>   *
>   * Copyright (C) 2007-2008 Steven Rostedt <srostedt@redhat.com>
> - * Copyright (C) 2009 DSLab, Lanzhou University, China
> + * Copyright (C) 2009, 2010 DSLab, Lanzhou University, China
>   * Author: Wu Zhangjin <wuzhangjin@gmail.com>
>   *
>   * Thanks goes to Steven Rostedt for writing the original x86 version.
> @@ -15,15 +15,48 @@
>  #include <asm/cacheflush.h>
>  #include <asm/asm.h>
>  #include <asm/asm-offsets.h>
> +#include <asm/uasm.h>
>  
>  #ifdef CONFIG_DYNAMIC_FTRACE
>  
> -#define JAL 0x0c000000		/* jump & link: ip --> ra, jump to target */
> -#define ADDR_MASK 0x03ffffff	/*  op_code|addr : 31...26|25 ....0 */
> -#define jump_insn_encode(op_code, addr) \
> -	((unsigned int)((op_code) | (((addr) >> 2) & ADDR_MASK)))
> +/* Before linking, the following instructions are fixed. */
> +#ifdef CONFIG_CPU_LOONGSON2F
> +#define INSN_NOP 0x00200825	/* or at, at, zero */
> +#else
> +#define INSN_NOP 0x00000000	/* nop */
> +#endif
> +#define INSN_B_1F_16 0x10000004	/* b 1f; offset = (16 >> 2) */
> +#define INSN_B_1F_20 0x10000005	/* b 1f; offset = (20 >> 2) */
> +#define INSN_B_1F_24 0x10000006	/* b 1f; offset = (24 >> 2) */
> +
> +/* After linking, the following instructions are fixed. */
> +static unsigned int insn_jal_ftrace_caller __read_mostly;
> +static unsigned int insn_lui_v1_hi16_mcount __read_mostly;
> +static unsigned int insn_j_ftrace_graph_caller __read_mostly;
>  
> -static unsigned int ftrace_nop = 0x00000000;
> +/* The following instructions are encoded in the run-time */
> +/* insn: jal func; op_code|addr : 31...26|25 ....0 */
> +#define INSN_JAL(addr) \
> +	((unsigned int)(0x0c000000 | (((addr) >> 2) & 0x03ffffff)))
> +
> +static inline void ftrace_dyn_arch_init_insns(void)
> +{
> +	u32 *buf;
> +	unsigned int v1;
> +
> +	/* lui v1, hi16_mcount */
> +	v1 = 3;
> +	buf = (u32 *)&insn_lui_v1_hi16_mcount;
> +	UASM_i_LA_mostly(&buf, v1, MCOUNT_ADDR);
> +
> +	/* jal (ftrace_caller + 8), jump over the first two instruction */
> +	buf = (u32 *)&insn_jal_ftrace_caller;
> +	uasm_i_jal(&buf, (FTRACE_ADDR + 8));
> +
> +	/* j ftrace_graph_caller */
> +	buf = (u32 *)&insn_j_ftrace_graph_caller;
> +	uasm_i_j(&buf, (unsigned long)ftrace_graph_caller);
> +}
>  
>  static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
>  {
> @@ -31,7 +64,6 @@ static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
>  
>  	/* *(unsigned int *)ip = new_code; */
>  	safe_store_code(new_code, ip, faulted);
> -
>  	if (unlikely(faulted))
>  		return -EFAULT;
>  
> @@ -40,118 +72,133 @@ static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
>  	return 0;
>  }
>  
> -static int lui_v1;
> -static int jal_mcount;
> +static inline unsigned int get_insn_b_1f(unsigned int *insn, unsigned long ip)
> +{
> +#ifndef KBUILD_MCOUNT_RA_ADDRESS
> +	*insn = INSN_B_1F_16;
> +	return 0;
> +#else
> +	int faulted;
> +	unsigned int code;
> +
> +	ip -= 4;
> +
> +	/* code = *(unsigned int *)ip; */
> +	safe_load_code(code, ip, faulted);
> +	if (unlikely(faulted))
> +		return -EFAULT;
> +
> +	if ((code & S_R_SP) != S_R_SP)
> +		*insn = INSN_B_1F_20;
> +	else
> +		*insn = INSN_B_1F_24;
> +
> +	return 0;
> +#endif
> +}
>  
>  int ftrace_make_nop(struct module *mod,
>  		    struct dyn_ftrace *rec, unsigned long addr)
>  {
>  	unsigned int new;
> -	int faulted;
>  	unsigned long ip = rec->ip;
>  
> -	/* We have compiled module with -mlong-calls, but compiled the kernel
> -	 * without it, we need to cope with them respectively. */
> -	if (ip & 0x40000000) {
> -		/* record it for ftrace_make_call */
> -		if (lui_v1 == 0) {
> -			/* lui_v1 = *(unsigned int *)ip; */
> -			safe_load_code(lui_v1, ip, faulted);
> -
> -			if (unlikely(faulted))
> -				return -EFAULT;
> -		}
> -
> -		/* lui v1, hi_16bit_of_mcount        --> b 1f (0x10000004)
> -		 * addiu v1, v1, low_16bit_of_mcount
> -		 * move at, ra
> -		 * jalr v1
> -		 * nop
> -		 * 				     1f: (ip + 12)
> -		 */
> -		new = 0x10000004;
> -	} else {
> -		/* record/calculate it for ftrace_make_call */
> -		if (jal_mcount == 0) {
> -			/* We can record it directly like this:
> -			 *     jal_mcount = *(unsigned int *)ip;
> -			 * Herein, jump over the first two nop instructions */
> -			jal_mcount = jump_insn_encode(JAL, (MCOUNT_ADDR + 8));
> -		}
> -
> -		/* move at, ra
> -		 * jalr v1		--> nop
> -		 */
> -		new = ftrace_nop;
> -	}
> +	/*
> +	 * We have compiled modules with -mlong-calls, but compiled kernel
> +	 * without it, therefore, need to cope with them respectively.
> +	 *
> +	 * For module:
> +	 *
> +	 *	lui	v1, hi16_mcount		--> b	1f
> +	 *	addiu	v1, v1, lo16_mcount
> +	 *	move	at, ra
> +	 *	jalr	v1
> +	 *	 nop
> +	 *					1f: (ip + 16)
> +	 * For kernel:
> +	 *
> +	 *	move	at, ra
> +	 *	jal	_mcount			--> nop
> +	 *
> +	 * And with the -mmcount-ra-address option, the offset may be 20 for
> +	 * leaf fuction and 24 for non-leaf function.
> +	 */
> +
> +	if (!in_module(ip))
> +		new = INSN_NOP;
> +	else if (get_insn_b_1f(&new, ip))
> +		return -EFAULT;
> +
>  	return ftrace_modify_code(ip, new);
>  }
>  
> -static int modified;	/* initialized as 0 by default */
> -
>  int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
>  {
>  	unsigned int new;
>  	unsigned long ip = rec->ip;
>  
> -	/* We just need to remove the "b ftrace_stub" at the fist time! */
> -	if (modified == 0) {
> -		modified = 1;
> -		ftrace_modify_code(addr, ftrace_nop);
> -	}
> -	/* ip, module: 0xc0000000, kernel: 0x80000000 */
> -	new = (ip & 0x40000000) ? lui_v1 : jal_mcount;
> +	new = in_module(ip) ? insn_lui_v1_hi16_mcount : insn_jal_ftrace_caller;
>  
>  	return ftrace_modify_code(ip, new);
>  }
>  
> -#define FTRACE_CALL_IP ((unsigned long)(&ftrace_call))
> -
>  int ftrace_update_ftrace_func(ftrace_func_t func)
>  {
>  	unsigned int new;
>  
> -	new = jump_insn_encode(JAL, (unsigned long)func);
> +	new = INSN_JAL((unsigned long)func);
>  
> -	return ftrace_modify_code(FTRACE_CALL_IP, new);
> +	return ftrace_modify_code((unsigned long)(&ftrace_call), new);
>  }
>  
>  int __init ftrace_dyn_arch_init(void *data)
>  {
> +	ftrace_dyn_arch_init_insns();
> +
> +	/*
> +	 * We are safe to remove the "b ftrace_stub" for the current
> +	 * ftrace_caller() is almost empty (only the stack operations), and
> +	 * most importantly, the calling to mcount will be disabled later in
> +	 * ftrace_init(), then there is no 'big' overhead. And in the future,
> +	 * we are hoping the function_trace_stop is initialized as 1 then we
> +	 * can eventually remove that 'useless' "b ftrace_stub" and the
> +	 * following nop. Currently, although we can call ftrace_stop() to set
> +	 * function_trace_stop as 1, but it will change the behavior of the
> +	 * Function Tracer.
> +	 */
> +	ftrace_modify_code(MCOUNT_ADDR, INSN_NOP);
> +
>  	/* The return code is retured via data */
>  	*(unsigned long *)data = 0;
>  
>  	return 0;
>  }
> -#endif				/* CONFIG_DYNAMIC_FTRACE */
> +#endif	/* CONFIG_DYNAMIC_FTRACE */
>  
>  #ifdef CONFIG_FUNCTION_GRAPH_TRACER
>  
>  #ifdef CONFIG_DYNAMIC_FTRACE
>  
>  extern void ftrace_graph_call(void);
> -#define JMP	0x08000000	/* jump to target directly */
> -#define CALL_FTRACE_GRAPH_CALLER \
> -	jump_insn_encode(JMP, (unsigned long)(&ftrace_graph_caller))
>  #define FTRACE_GRAPH_CALL_IP	((unsigned long)(&ftrace_graph_call))
>  
>  int ftrace_enable_ftrace_graph_caller(void)
>  {
>  	return ftrace_modify_code(FTRACE_GRAPH_CALL_IP,
> -				  CALL_FTRACE_GRAPH_CALLER);
> +			insn_j_ftrace_graph_caller);
>  }
>  
>  int ftrace_disable_ftrace_graph_caller(void)
>  {
> -	return ftrace_modify_code(FTRACE_GRAPH_CALL_IP, ftrace_nop);
> +	return ftrace_modify_code(FTRACE_GRAPH_CALL_IP, INSN_NOP);
>  }
>  
> -#endif				/* !CONFIG_DYNAMIC_FTRACE */
> +#endif	/* !CONFIG_DYNAMIC_FTRACE */
>  
>  #ifndef KBUILD_MCOUNT_RA_ADDRESS
> -#define S_RA_SP	(0xafbf << 16)	/* s{d,w} ra, offset(sp) */
> -#define S_R_SP	(0xafb0 << 16)  /* s{d,w} R, offset(sp) */
> -#define OFFSET_MASK	0xffff	/* stack offset range: 0 ~ PT_SIZE */
> +#define INSN_S_RA_SP	0xafbf0000	/* s{d,w} ra, offset(sp) */
> +#define INSN_S_R_SP	0xafb00000	/* s{d,w} R, offset(sp) */
> +#define STACK_OFFSET_MASK	0xffff	/* stack offset range: 0 ~ PT_SIZE */
>  
>  unsigned long ftrace_get_parent_addr(unsigned long self_addr,
>  				     unsigned long parent,
> @@ -162,35 +209,35 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr,
>  	unsigned int code;
>  	int faulted;
>  
> -	/* in module or kernel? */
> -	if (self_addr & 0x40000000) {
> -		/* module: move to the instruction "lui v1, HI_16BIT_OF_MCOUNT" */
> -		ip = self_addr - 20;
> -	} else {
> -		/* kernel: move to the instruction "move ra, at" */
> -		ip = self_addr - 12;
> -	}
> +	/*
> +	 * For module, move the ip from calling site of mcount to the
> +	 * instruction "lui v1, hi_16bit_of_mcount"(offset is 20), but for
> +	 * kernel, move to the instruction "move ra, at"(offset is 12)
> +	 */
> +	ip = self_addr - (in_module(self_addr) ? 20 : 12);
>  
> -	/* search the text until finding the non-store instruction or "s{d,w}
> -	 * ra, offset(sp)" instruction */
> +	/*
> +	 * search the text until finding the non-store instruction or "s{d,w}
> +	 * ra, offset(sp)" instruction
> +	 */
>  	do {
>  		ip -= 4;
>  
>  		/* get the code at "ip": code = *(unsigned int *)ip; */
>  		safe_load_code(code, ip, faulted);
> -
>  		if (unlikely(faulted))
>  			return 0;
>  
> -		/* If we hit the non-store instruction before finding where the
> +		/*
> +		 * If we hit the non-store instruction before finding where the
>  		 * ra is stored, then this is a leaf function and it does not
> -		 * store the ra on the stack. */
> -		if ((code & S_R_SP) != S_R_SP)
> +		 * store the ra on the stack.
> +		 */
> +		if ((code & INSN_S_R_SP) != INSN_S_R_SP)
>  			return parent_addr;
> +	} while (((code & INSN_S_RA_SP) != INSN_S_RA_SP));
>  
> -	} while (((code & S_RA_SP) != S_RA_SP));
> -
> -	sp = fp + (code & OFFSET_MASK);
> +	sp = fp + (code & STACK_OFFSET_MASK);
>  
>  	/* ra = *(unsigned long *)sp; */
>  	safe_load_stack(ra, sp, faulted);
> @@ -211,16 +258,17 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr,
>  void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
>  			   unsigned long fp)
>  {
> +	int faulted;
>  	unsigned long old;
>  	struct ftrace_graph_ent trace;
>  	unsigned long return_hooker = (unsigned long)
>  	    &return_to_handler;
> -	int faulted;
>  
>  	if (unlikely(atomic_read(&current->tracing_graph_pause)))
>  		return;
>  
> -	/* "parent" is the stack address saved the return address of the caller
> +	/*
> +	 * "parent" is the stack address saved the return address of the caller
>  	 * of _mcount.
>  	 *
>  	 * if the gcc < 4.5, a leaf function does not save the return address
> @@ -241,12 +289,14 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
>  	if (unlikely(faulted))
>  		goto out;
>  #ifndef KBUILD_MCOUNT_RA_ADDRESS
> -	parent = (unsigned long *)ftrace_get_parent_addr(self_addr, old,
> -							 (unsigned long)parent,
> -							 fp);
> -	/* If fails when getting the stack address of the non-leaf function's
> -	 * ra, stop function graph tracer and return */
> -	if (parent == 0)
> +	parent = (unsigned long *)ftrace_get_parent_addr(
> +			self_addr, old, (unsigned long)parent, fp);
> +
> +	/*
> +	 * If fails on getting the stack address of the non-leaf function's ra,
> +	 * stop function graph tracer and return
> +	 */
> +	if (unlikely(parent == 0))
>  		goto out;
>  #endif
>  	/* *parent = return_hooker; */
> @@ -272,4 +322,4 @@ out:
>  	ftrace_graph_stop();
>  	WARN_ON(1);
>  }
> -#endif				/* CONFIG_FUNCTION_GRAPH_TRACER */
> +#endif	/* CONFIG_FUNCTION_GRAPH_TRACER */



From wuzhangjin@gmail.com Fri Mar 12 18:39:48 2010
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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     Steven Rostedt <srostedt@redhat.com>, linux-mips@linux-mips.org,
        David Daney <ddaney@caviumnetworks.com>,
        Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
        Wu Zhangjin <wuzhangjin@gmail.com>
Subject: [PATCH v2] MIPS: tracing: Optimize the implementation
Date:   Sat, 13 Mar 2010 01:32:14 +0800
Message-Id: <33db7c603507d884eb4e3a27f84deb7eb4c016e8.1268415127.git.wuzhangjin@gmail.com>
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From: Wu Zhangjin <wuzhangjin@gmail.com>

Changes:

v2 -> v3:

  + Fixes the buidling error of the changes from v2.

v1 -> v2:

  + Fixup the support of -mmcount-ra-address

    The offset of "b 1f" instruction should be 20 for leaf-function and
    24 for non-leaf function when -mmcount-ra-address is enabled. This
    patch adds a new get_insn_b_1f() function to get the different "b
    1f" instruction.

  (only test without -mmcount-ra-address.)

v1:

  + Reduce the runtime overhead

    o Uses macros instead of variables for the fixed instructions to
    reduce memory access

    o Moves the Initilization of the instructions which will be fixed
    after linking from ftrace_make_nop/ftrace_make_call to
    ftrace_dyn_arch_init() and encodes the instructions through
    uasm(arch/mips/include/asm/uasm.h).

    o A common macro in_module() is defined to determine which space the
    instruction pointer stays in and several related conditional
    statements are converted to conditional operator(? :) statement.

  + Cleanup the whole stuff

    Lots of comments/macros have been cleaned up to let it look better.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
---
 arch/mips/include/asm/ftrace.h |   12 ++-
 arch/mips/kernel/ftrace.c      |  237 ++++++++++++++++++++++++----------------
 2 files changed, 154 insertions(+), 95 deletions(-)

diff --git a/arch/mips/include/asm/ftrace.h b/arch/mips/include/asm/ftrace.h
index ce35c9a..6dbfa1e 100644
--- a/arch/mips/include/asm/ftrace.h
+++ b/arch/mips/include/asm/ftrace.h
@@ -3,7 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive for
  * more details.
  *
- * Copyright (C) 2009 DSLab, Lanzhou University, China
+ * Copyright (C) 2009, 2010 DSLab, Lanzhou University, China
  * Author: Wu Zhangjin <wuzhangjin@gmail.com>
  */
 
@@ -19,6 +19,14 @@
 extern void _mcount(void);
 #define mcount _mcount
 
+/*
+ * If the Instruction Pointer is in module space (0xc0000000), return true;
+ * otherwise, it is in kernel space (0x80000000), return false.
+ *
+ * FIXME: This may not work in some cases.
+ */
+#define in_module(ip) (unlikely((ip) & 0x40000000))
+
 #define safe_load(load, src, dst, error)		\
 do {							\
 	asm volatile (					\
@@ -83,8 +91,8 @@ static inline unsigned long ftrace_call_adjust(unsigned long addr)
 
 struct dyn_arch_ftrace {
 };
+#endif /* CONFIG_DYNAMIC_FTRACE */
 
-#endif /*  CONFIG_DYNAMIC_FTRACE */
 #endif /* __ASSEMBLY__ */
 #endif /* CONFIG_FUNCTION_TRACER */
 #endif /* _ASM_MIPS_FTRACE_H */
diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c
index e9e64e0..88e05ae 100644
--- a/arch/mips/kernel/ftrace.c
+++ b/arch/mips/kernel/ftrace.c
@@ -2,7 +2,7 @@
  * Code for replacing ftrace calls with jumps.
  *
  * Copyright (C) 2007-2008 Steven Rostedt <srostedt@redhat.com>
- * Copyright (C) 2009 DSLab, Lanzhou University, China
+ * Copyright (C) 2009, 2010 DSLab, Lanzhou University, China
  * Author: Wu Zhangjin <wuzhangjin@gmail.com>
  *
  * Thanks goes to Steven Rostedt for writing the original x86 version.
@@ -15,15 +15,50 @@
 #include <asm/cacheflush.h>
 #include <asm/asm.h>
 #include <asm/asm-offsets.h>
+#include <asm/uasm.h>
+
+#define INSN_S_R_SP	0xafb00000	/* s{d,w} R, offset(sp) */
 
 #ifdef CONFIG_DYNAMIC_FTRACE
 
-#define JAL 0x0c000000		/* jump & link: ip --> ra, jump to target */
-#define ADDR_MASK 0x03ffffff	/*  op_code|addr : 31...26|25 ....0 */
-#define jump_insn_encode(op_code, addr) \
-	((unsigned int)((op_code) | (((addr) >> 2) & ADDR_MASK)))
+/* Before linking, the following instructions are fixed. */
+#ifdef CONFIG_CPU_LOONGSON2F
+#define INSN_NOP 0x00200825	/* or at, at, zero */
+#else
+#define INSN_NOP 0x00000000	/* nop */
+#endif
+#define INSN_B_1F_16 0x10000004	/* b 1f; offset = (16 >> 2) */
+#define INSN_B_1F_20 0x10000005	/* b 1f; offset = (20 >> 2) */
+#define INSN_B_1F_24 0x10000006	/* b 1f; offset = (24 >> 2) */
+
+/* After linking, the following instructions are fixed. */
+static unsigned int insn_jal_ftrace_caller __read_mostly;
+static unsigned int insn_lui_v1_hi16_mcount __read_mostly;
+static unsigned int insn_j_ftrace_graph_caller __read_mostly;
+
+/* The following instructions are encoded in the run-time */
+/* insn: jal func; op_code|addr : 31...26|25 ....0 */
+#define INSN_JAL(addr) \
+	((unsigned int)(0x0c000000 | (((addr) >> 2) & 0x03ffffff)))
+
+static inline void ftrace_dyn_arch_init_insns(void)
+{
+	u32 *buf;
+	unsigned int v1;
+
+	/* lui v1, hi16_mcount */
+	v1 = 3;
+	buf = (u32 *)&insn_lui_v1_hi16_mcount;
+	UASM_i_LA_mostly(&buf, v1, MCOUNT_ADDR);
 
-static unsigned int ftrace_nop = 0x00000000;
+	/* jal (ftrace_caller + 8), jump over the first two instruction */
+	buf = (u32 *)&insn_jal_ftrace_caller;
+	uasm_i_jal(&buf, (FTRACE_ADDR + 8));
+
+	/* j ftrace_graph_caller */
+	buf = (u32 *)&insn_j_ftrace_graph_caller;
+	uasm_i_j(&buf, (unsigned long)ftrace_graph_caller);
+}
 
 static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
 {
@@ -31,7 +66,6 @@ static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
 
 	/* *(unsigned int *)ip = new_code; */
 	safe_store_code(new_code, ip, faulted);
-
 	if (unlikely(faulted))
 		return -EFAULT;
 
@@ -40,118 +74,132 @@ static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
 	return 0;
 }
 
-static int lui_v1;
-static int jal_mcount;
+static inline unsigned int get_insn_b_1f(unsigned int *insn, unsigned long ip)
+{
+#ifndef KBUILD_MCOUNT_RA_ADDRESS
+	*insn = INSN_B_1F_16;
+	return 0;
+#else
+	int faulted;
+	unsigned int code;
+
+	ip -= 4;
+
+	/* code = *(unsigned int *)ip; */
+	safe_load_code(code, ip, faulted);
+	if (unlikely(faulted))
+		return -EFAULT;
+
+	if ((code & INSN_S_R_SP) != INSN_S_R_SP)
+		*insn = INSN_B_1F_20;
+	else
+		*insn = INSN_B_1F_24;
+
+	return 0;
+#endif
+}
 
 int ftrace_make_nop(struct module *mod,
 		    struct dyn_ftrace *rec, unsigned long addr)
 {
 	unsigned int new;
-	int faulted;
 	unsigned long ip = rec->ip;
 
-	/* We have compiled module with -mlong-calls, but compiled the kernel
-	 * without it, we need to cope with them respectively. */
-	if (ip & 0x40000000) {
-		/* record it for ftrace_make_call */
-		if (lui_v1 == 0) {
-			/* lui_v1 = *(unsigned int *)ip; */
-			safe_load_code(lui_v1, ip, faulted);
-
-			if (unlikely(faulted))
-				return -EFAULT;
-		}
-
-		/* lui v1, hi_16bit_of_mcount        --> b 1f (0x10000004)
-		 * addiu v1, v1, low_16bit_of_mcount
-		 * move at, ra
-		 * jalr v1
-		 * nop
-		 * 				     1f: (ip + 12)
-		 */
-		new = 0x10000004;
-	} else {
-		/* record/calculate it for ftrace_make_call */
-		if (jal_mcount == 0) {
-			/* We can record it directly like this:
-			 *     jal_mcount = *(unsigned int *)ip;
-			 * Herein, jump over the first two nop instructions */
-			jal_mcount = jump_insn_encode(JAL, (MCOUNT_ADDR + 8));
-		}
-
-		/* move at, ra
-		 * jalr v1		--> nop
-		 */
-		new = ftrace_nop;
-	}
+	/*
+	 * We have compiled modules with -mlong-calls, but compiled kernel
+	 * without it, therefore, need to cope with them respectively.
+	 *
+	 * For module:
+	 *
+	 *	lui	v1, hi16_mcount		--> b	1f
+	 *	addiu	v1, v1, lo16_mcount
+	 *	move	at, ra
+	 *	jalr	v1
+	 *	 nop
+	 *					1f: (ip + 16)
+	 * For kernel:
+	 *
+	 *	move	at, ra
+	 *	jal	_mcount			--> nop
+	 *
+	 * And with the -mmcount-ra-address option, the offset may be 20 for
+	 * leaf fuction and 24 for non-leaf function.
+	 */
+
+	if (!in_module(ip))
+		new = INSN_NOP;
+	else if (get_insn_b_1f(&new, ip))
+		return -EFAULT;
+
 	return ftrace_modify_code(ip, new);
 }
 
-static int modified;	/* initialized as 0 by default */
-
 int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
 {
 	unsigned int new;
 	unsigned long ip = rec->ip;
 
-	/* We just need to remove the "b ftrace_stub" at the fist time! */
-	if (modified == 0) {
-		modified = 1;
-		ftrace_modify_code(addr, ftrace_nop);
-	}
-	/* ip, module: 0xc0000000, kernel: 0x80000000 */
-	new = (ip & 0x40000000) ? lui_v1 : jal_mcount;
+	new = in_module(ip) ? insn_lui_v1_hi16_mcount : insn_jal_ftrace_caller;
 
 	return ftrace_modify_code(ip, new);
 }
 
-#define FTRACE_CALL_IP ((unsigned long)(&ftrace_call))
-
 int ftrace_update_ftrace_func(ftrace_func_t func)
 {
 	unsigned int new;
 
-	new = jump_insn_encode(JAL, (unsigned long)func);
+	new = INSN_JAL((unsigned long)func);
 
-	return ftrace_modify_code(FTRACE_CALL_IP, new);
+	return ftrace_modify_code((unsigned long)(&ftrace_call), new);
 }
 
 int __init ftrace_dyn_arch_init(void *data)
 {
+	ftrace_dyn_arch_init_insns();
+
+	/*
+	 * We are safe to remove the "b ftrace_stub" for the current
+	 * ftrace_caller() is almost empty (only the stack operations), and
+	 * most importantly, the calling to mcount will be disabled later in
+	 * ftrace_init(), then there is no 'big' overhead. And in the future,
+	 * we are hoping the function_trace_stop is initialized as 1 then we
+	 * can eventually remove that 'useless' "b ftrace_stub" and the
+	 * following nop. Currently, although we can call ftrace_stop() to set
+	 * function_trace_stop as 1, but it will change the behavior of the
+	 * Function Tracer.
+	 */
+	ftrace_modify_code(MCOUNT_ADDR, INSN_NOP);
+
 	/* The return code is retured via data */
 	*(unsigned long *)data = 0;
 
 	return 0;
 }
-#endif				/* CONFIG_DYNAMIC_FTRACE */
+#endif	/* CONFIG_DYNAMIC_FTRACE */
 
 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
 
 #ifdef CONFIG_DYNAMIC_FTRACE
 
 extern void ftrace_graph_call(void);
-#define JMP	0x08000000	/* jump to target directly */
-#define CALL_FTRACE_GRAPH_CALLER \
-	jump_insn_encode(JMP, (unsigned long)(&ftrace_graph_caller))
 #define FTRACE_GRAPH_CALL_IP	((unsigned long)(&ftrace_graph_call))
 
 int ftrace_enable_ftrace_graph_caller(void)
 {
 	return ftrace_modify_code(FTRACE_GRAPH_CALL_IP,
-				  CALL_FTRACE_GRAPH_CALLER);
+			insn_j_ftrace_graph_caller);
 }
 
 int ftrace_disable_ftrace_graph_caller(void)
 {
-	return ftrace_modify_code(FTRACE_GRAPH_CALL_IP, ftrace_nop);
+	return ftrace_modify_code(FTRACE_GRAPH_CALL_IP, INSN_NOP);
 }
 
-#endif				/* !CONFIG_DYNAMIC_FTRACE */
+#endif	/* !CONFIG_DYNAMIC_FTRACE */
 
 #ifndef KBUILD_MCOUNT_RA_ADDRESS
-#define S_RA_SP	(0xafbf << 16)	/* s{d,w} ra, offset(sp) */
-#define S_R_SP	(0xafb0 << 16)  /* s{d,w} R, offset(sp) */
-#define OFFSET_MASK	0xffff	/* stack offset range: 0 ~ PT_SIZE */
+#define INSN_S_RA_SP	0xafbf0000	/* s{d,w} ra, offset(sp) */
+#define STACK_OFFSET_MASK	0xffff	/* stack offset range: 0 ~ PT_SIZE */
 
 unsigned long ftrace_get_parent_addr(unsigned long self_addr,
 				     unsigned long parent,
@@ -162,35 +210,35 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr,
 	unsigned int code;
 	int faulted;
 
-	/* in module or kernel? */
-	if (self_addr & 0x40000000) {
-		/* module: move to the instruction "lui v1, HI_16BIT_OF_MCOUNT" */
-		ip = self_addr - 20;
-	} else {
-		/* kernel: move to the instruction "move ra, at" */
-		ip = self_addr - 12;
-	}
+	/*
+	 * For module, move the ip from calling site of mcount to the
+	 * instruction "lui v1, hi_16bit_of_mcount"(offset is 20), but for
+	 * kernel, move to the instruction "move ra, at"(offset is 12)
+	 */
+	ip = self_addr - (in_module(self_addr) ? 20 : 12);
 
-	/* search the text until finding the non-store instruction or "s{d,w}
-	 * ra, offset(sp)" instruction */
+	/*
+	 * search the text until finding the non-store instruction or "s{d,w}
+	 * ra, offset(sp)" instruction
+	 */
 	do {
 		ip -= 4;
 
 		/* get the code at "ip": code = *(unsigned int *)ip; */
 		safe_load_code(code, ip, faulted);
-
 		if (unlikely(faulted))
 			return 0;
 
-		/* If we hit the non-store instruction before finding where the
+		/*
+		 * If we hit the non-store instruction before finding where the
 		 * ra is stored, then this is a leaf function and it does not
-		 * store the ra on the stack. */
-		if ((code & S_R_SP) != S_R_SP)
+		 * store the ra on the stack.
+		 */
+		if ((code & INSN_S_R_SP) != INSN_S_R_SP)
 			return parent_addr;
+	} while (((code & INSN_S_RA_SP) != INSN_S_RA_SP));
 
-	} while (((code & S_RA_SP) != S_RA_SP));
-
-	sp = fp + (code & OFFSET_MASK);
+	sp = fp + (code & STACK_OFFSET_MASK);
 
 	/* ra = *(unsigned long *)sp; */
 	safe_load_stack(ra, sp, faulted);
@@ -211,16 +259,17 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr,
 void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
 			   unsigned long fp)
 {
+	int faulted;
 	unsigned long old;
 	struct ftrace_graph_ent trace;
 	unsigned long return_hooker = (unsigned long)
 	    &return_to_handler;
-	int faulted;
 
 	if (unlikely(atomic_read(&current->tracing_graph_pause)))
 		return;
 
-	/* "parent" is the stack address saved the return address of the caller
+	/*
+	 * "parent" is the stack address saved the return address of the caller
 	 * of _mcount.
 	 *
 	 * if the gcc < 4.5, a leaf function does not save the return address
@@ -241,12 +290,14 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
 	if (unlikely(faulted))
 		goto out;
 #ifndef KBUILD_MCOUNT_RA_ADDRESS
-	parent = (unsigned long *)ftrace_get_parent_addr(self_addr, old,
-							 (unsigned long)parent,
-							 fp);
-	/* If fails when getting the stack address of the non-leaf function's
-	 * ra, stop function graph tracer and return */
-	if (parent == 0)
+	parent = (unsigned long *)ftrace_get_parent_addr(
+			self_addr, old, (unsigned long)parent, fp);
+
+	/*
+	 * If fails on getting the stack address of the non-leaf function's ra,
+	 * stop function graph tracer and return
+	 */
+	if (unlikely(parent == 0))
 		goto out;
 #endif
 	/* *parent = return_hooker; */
@@ -272,4 +323,4 @@ out:
 	ftrace_graph_stop();
 	WARN_ON(1);
 }
-#endif				/* CONFIG_FUNCTION_GRAPH_TRACER */
+#endif	/* CONFIG_FUNCTION_GRAPH_TRACER */
-- 
1.7.0.1


From wuzhangjin@gmail.com Fri Mar 12 18:46:09 2010
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Subject: Re: [PATCH v3] MIPS: tracing: Optimize the implementation
From:   Wu Zhangjin <wuzhangjin@gmail.com>
Reply-To: wuzhangjin@gmail.com
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     Steven Rostedt <srostedt@redhat.com>, linux-mips@linux-mips.org,
        David Daney <ddaney@caviumnetworks.com>,
        Thomas Bogendoerfer <tsbogend@alpha.franken.de>
In-Reply-To: <33db7c603507d884eb4e3a27f84deb7eb4c016e8.1268415127.git.wuzhangjin@gmail.com>
References: <33db7c603507d884eb4e3a27f84deb7eb4c016e8.1268415127.git.wuzhangjin@gmail.com>
Content-Type: text/plain; charset="UTF-8"
Organization: DSLab, Lanzhou University, China
Date:   Sat, 13 Mar 2010 01:39:29 +0800
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Hi,

This one fixed the building error ;)

Regards,
	Wu Zhangjin

On Sat, 2010-03-13 at 01:32 +0800, Wu Zhangjin wrote:
> From: Wu Zhangjin <wuzhangjin@gmail.com>
> 
> Changes:
> 
> v2 -> v3:
> 
>   + Fixes the buidling error of the changes from v2.
> 
> v1 -> v2:
> 
>   + Fixup the support of -mmcount-ra-address
> 
>     The offset of "b 1f" instruction should be 20 for leaf-function and
>     24 for non-leaf function when -mmcount-ra-address is enabled. This
>     patch adds a new get_insn_b_1f() function to get the different "b
>     1f" instruction.
> 
>   (only test without -mmcount-ra-address.)
> 
> v1:
> 
>   + Reduce the runtime overhead
> 
>     o Uses macros instead of variables for the fixed instructions to
>     reduce memory access
> 
>     o Moves the Initilization of the instructions which will be fixed
>     after linking from ftrace_make_nop/ftrace_make_call to
>     ftrace_dyn_arch_init() and encodes the instructions through
>     uasm(arch/mips/include/asm/uasm.h).
> 
>     o A common macro in_module() is defined to determine which space the
>     instruction pointer stays in and several related conditional
>     statements are converted to conditional operator(? :) statement.
> 
>   + Cleanup the whole stuff
> 
>     Lots of comments/macros have been cleaned up to let it look better.
> 
> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
> ---
>  arch/mips/include/asm/ftrace.h |   12 ++-
>  arch/mips/kernel/ftrace.c      |  237 ++++++++++++++++++++++++----------------
>  2 files changed, 154 insertions(+), 95 deletions(-)
> 
> diff --git a/arch/mips/include/asm/ftrace.h b/arch/mips/include/asm/ftrace.h
> index ce35c9a..6dbfa1e 100644
> --- a/arch/mips/include/asm/ftrace.h
> +++ b/arch/mips/include/asm/ftrace.h
> @@ -3,7 +3,7 @@
>   * License.  See the file "COPYING" in the main directory of this archive for
>   * more details.
>   *
> - * Copyright (C) 2009 DSLab, Lanzhou University, China
> + * Copyright (C) 2009, 2010 DSLab, Lanzhou University, China
>   * Author: Wu Zhangjin <wuzhangjin@gmail.com>
>   */
>  
> @@ -19,6 +19,14 @@
>  extern void _mcount(void);
>  #define mcount _mcount
>  
> +/*
> + * If the Instruction Pointer is in module space (0xc0000000), return true;
> + * otherwise, it is in kernel space (0x80000000), return false.
> + *
> + * FIXME: This may not work in some cases.
> + */
> +#define in_module(ip) (unlikely((ip) & 0x40000000))
> +
>  #define safe_load(load, src, dst, error)		\
>  do {							\
>  	asm volatile (					\
> @@ -83,8 +91,8 @@ static inline unsigned long ftrace_call_adjust(unsigned long addr)
>  
>  struct dyn_arch_ftrace {
>  };
> +#endif /* CONFIG_DYNAMIC_FTRACE */
>  
> -#endif /*  CONFIG_DYNAMIC_FTRACE */
>  #endif /* __ASSEMBLY__ */
>  #endif /* CONFIG_FUNCTION_TRACER */
>  #endif /* _ASM_MIPS_FTRACE_H */
> diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c
> index e9e64e0..88e05ae 100644
> --- a/arch/mips/kernel/ftrace.c
> +++ b/arch/mips/kernel/ftrace.c
> @@ -2,7 +2,7 @@
>   * Code for replacing ftrace calls with jumps.
>   *
>   * Copyright (C) 2007-2008 Steven Rostedt <srostedt@redhat.com>
> - * Copyright (C) 2009 DSLab, Lanzhou University, China
> + * Copyright (C) 2009, 2010 DSLab, Lanzhou University, China
>   * Author: Wu Zhangjin <wuzhangjin@gmail.com>
>   *
>   * Thanks goes to Steven Rostedt for writing the original x86 version.
> @@ -15,15 +15,50 @@
>  #include <asm/cacheflush.h>
>  #include <asm/asm.h>
>  #include <asm/asm-offsets.h>
> +#include <asm/uasm.h>
> +
> +#define INSN_S_R_SP	0xafb00000	/* s{d,w} R, offset(sp) */
>  
>  #ifdef CONFIG_DYNAMIC_FTRACE
>  
> -#define JAL 0x0c000000		/* jump & link: ip --> ra, jump to target */
> -#define ADDR_MASK 0x03ffffff	/*  op_code|addr : 31...26|25 ....0 */
> -#define jump_insn_encode(op_code, addr) \
> -	((unsigned int)((op_code) | (((addr) >> 2) & ADDR_MASK)))
> +/* Before linking, the following instructions are fixed. */
> +#ifdef CONFIG_CPU_LOONGSON2F
> +#define INSN_NOP 0x00200825	/* or at, at, zero */
> +#else
> +#define INSN_NOP 0x00000000	/* nop */
> +#endif
> +#define INSN_B_1F_16 0x10000004	/* b 1f; offset = (16 >> 2) */
> +#define INSN_B_1F_20 0x10000005	/* b 1f; offset = (20 >> 2) */
> +#define INSN_B_1F_24 0x10000006	/* b 1f; offset = (24 >> 2) */
> +
> +/* After linking, the following instructions are fixed. */
> +static unsigned int insn_jal_ftrace_caller __read_mostly;
> +static unsigned int insn_lui_v1_hi16_mcount __read_mostly;
> +static unsigned int insn_j_ftrace_graph_caller __read_mostly;
> +
> +/* The following instructions are encoded in the run-time */
> +/* insn: jal func; op_code|addr : 31...26|25 ....0 */
> +#define INSN_JAL(addr) \
> +	((unsigned int)(0x0c000000 | (((addr) >> 2) & 0x03ffffff)))
> +
> +static inline void ftrace_dyn_arch_init_insns(void)
> +{
> +	u32 *buf;
> +	unsigned int v1;
> +
> +	/* lui v1, hi16_mcount */
> +	v1 = 3;
> +	buf = (u32 *)&insn_lui_v1_hi16_mcount;
> +	UASM_i_LA_mostly(&buf, v1, MCOUNT_ADDR);
>  
> -static unsigned int ftrace_nop = 0x00000000;
> +	/* jal (ftrace_caller + 8), jump over the first two instruction */
> +	buf = (u32 *)&insn_jal_ftrace_caller;
> +	uasm_i_jal(&buf, (FTRACE_ADDR + 8));
> +
> +	/* j ftrace_graph_caller */
> +	buf = (u32 *)&insn_j_ftrace_graph_caller;
> +	uasm_i_j(&buf, (unsigned long)ftrace_graph_caller);
> +}
>  
>  static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
>  {
> @@ -31,7 +66,6 @@ static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
>  
>  	/* *(unsigned int *)ip = new_code; */
>  	safe_store_code(new_code, ip, faulted);
> -
>  	if (unlikely(faulted))
>  		return -EFAULT;
>  
> @@ -40,118 +74,132 @@ static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
>  	return 0;
>  }
>  
> -static int lui_v1;
> -static int jal_mcount;
> +static inline unsigned int get_insn_b_1f(unsigned int *insn, unsigned long ip)
> +{
> +#ifndef KBUILD_MCOUNT_RA_ADDRESS
> +	*insn = INSN_B_1F_16;
> +	return 0;
> +#else
> +	int faulted;
> +	unsigned int code;
> +
> +	ip -= 4;
> +
> +	/* code = *(unsigned int *)ip; */
> +	safe_load_code(code, ip, faulted);
> +	if (unlikely(faulted))
> +		return -EFAULT;
> +
> +	if ((code & INSN_S_R_SP) != INSN_S_R_SP)
> +		*insn = INSN_B_1F_20;
> +	else
> +		*insn = INSN_B_1F_24;
> +
> +	return 0;
> +#endif
> +}
>  
>  int ftrace_make_nop(struct module *mod,
>  		    struct dyn_ftrace *rec, unsigned long addr)
>  {
>  	unsigned int new;
> -	int faulted;
>  	unsigned long ip = rec->ip;
>  
> -	/* We have compiled module with -mlong-calls, but compiled the kernel
> -	 * without it, we need to cope with them respectively. */
> -	if (ip & 0x40000000) {
> -		/* record it for ftrace_make_call */
> -		if (lui_v1 == 0) {
> -			/* lui_v1 = *(unsigned int *)ip; */
> -			safe_load_code(lui_v1, ip, faulted);
> -
> -			if (unlikely(faulted))
> -				return -EFAULT;
> -		}
> -
> -		/* lui v1, hi_16bit_of_mcount        --> b 1f (0x10000004)
> -		 * addiu v1, v1, low_16bit_of_mcount
> -		 * move at, ra
> -		 * jalr v1
> -		 * nop
> -		 * 				     1f: (ip + 12)
> -		 */
> -		new = 0x10000004;
> -	} else {
> -		/* record/calculate it for ftrace_make_call */
> -		if (jal_mcount == 0) {
> -			/* We can record it directly like this:
> -			 *     jal_mcount = *(unsigned int *)ip;
> -			 * Herein, jump over the first two nop instructions */
> -			jal_mcount = jump_insn_encode(JAL, (MCOUNT_ADDR + 8));
> -		}
> -
> -		/* move at, ra
> -		 * jalr v1		--> nop
> -		 */
> -		new = ftrace_nop;
> -	}
> +	/*
> +	 * We have compiled modules with -mlong-calls, but compiled kernel
> +	 * without it, therefore, need to cope with them respectively.
> +	 *
> +	 * For module:
> +	 *
> +	 *	lui	v1, hi16_mcount		--> b	1f
> +	 *	addiu	v1, v1, lo16_mcount
> +	 *	move	at, ra
> +	 *	jalr	v1
> +	 *	 nop
> +	 *					1f: (ip + 16)
> +	 * For kernel:
> +	 *
> +	 *	move	at, ra
> +	 *	jal	_mcount			--> nop
> +	 *
> +	 * And with the -mmcount-ra-address option, the offset may be 20 for
> +	 * leaf fuction and 24 for non-leaf function.
> +	 */
> +
> +	if (!in_module(ip))
> +		new = INSN_NOP;
> +	else if (get_insn_b_1f(&new, ip))
> +		return -EFAULT;
> +
>  	return ftrace_modify_code(ip, new);
>  }
>  
> -static int modified;	/* initialized as 0 by default */
> -
>  int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
>  {
>  	unsigned int new;
>  	unsigned long ip = rec->ip;
>  
> -	/* We just need to remove the "b ftrace_stub" at the fist time! */
> -	if (modified == 0) {
> -		modified = 1;
> -		ftrace_modify_code(addr, ftrace_nop);
> -	}
> -	/* ip, module: 0xc0000000, kernel: 0x80000000 */
> -	new = (ip & 0x40000000) ? lui_v1 : jal_mcount;
> +	new = in_module(ip) ? insn_lui_v1_hi16_mcount : insn_jal_ftrace_caller;
>  
>  	return ftrace_modify_code(ip, new);
>  }
>  
> -#define FTRACE_CALL_IP ((unsigned long)(&ftrace_call))
> -
>  int ftrace_update_ftrace_func(ftrace_func_t func)
>  {
>  	unsigned int new;
>  
> -	new = jump_insn_encode(JAL, (unsigned long)func);
> +	new = INSN_JAL((unsigned long)func);
>  
> -	return ftrace_modify_code(FTRACE_CALL_IP, new);
> +	return ftrace_modify_code((unsigned long)(&ftrace_call), new);
>  }
>  
>  int __init ftrace_dyn_arch_init(void *data)
>  {
> +	ftrace_dyn_arch_init_insns();
> +
> +	/*
> +	 * We are safe to remove the "b ftrace_stub" for the current
> +	 * ftrace_caller() is almost empty (only the stack operations), and
> +	 * most importantly, the calling to mcount will be disabled later in
> +	 * ftrace_init(), then there is no 'big' overhead. And in the future,
> +	 * we are hoping the function_trace_stop is initialized as 1 then we
> +	 * can eventually remove that 'useless' "b ftrace_stub" and the
> +	 * following nop. Currently, although we can call ftrace_stop() to set
> +	 * function_trace_stop as 1, but it will change the behavior of the
> +	 * Function Tracer.
> +	 */
> +	ftrace_modify_code(MCOUNT_ADDR, INSN_NOP);
> +
>  	/* The return code is retured via data */
>  	*(unsigned long *)data = 0;
>  
>  	return 0;
>  }
> -#endif				/* CONFIG_DYNAMIC_FTRACE */
> +#endif	/* CONFIG_DYNAMIC_FTRACE */
>  
>  #ifdef CONFIG_FUNCTION_GRAPH_TRACER
>  
>  #ifdef CONFIG_DYNAMIC_FTRACE
>  
>  extern void ftrace_graph_call(void);
> -#define JMP	0x08000000	/* jump to target directly */
> -#define CALL_FTRACE_GRAPH_CALLER \
> -	jump_insn_encode(JMP, (unsigned long)(&ftrace_graph_caller))
>  #define FTRACE_GRAPH_CALL_IP	((unsigned long)(&ftrace_graph_call))
>  
>  int ftrace_enable_ftrace_graph_caller(void)
>  {
>  	return ftrace_modify_code(FTRACE_GRAPH_CALL_IP,
> -				  CALL_FTRACE_GRAPH_CALLER);
> +			insn_j_ftrace_graph_caller);
>  }
>  
>  int ftrace_disable_ftrace_graph_caller(void)
>  {
> -	return ftrace_modify_code(FTRACE_GRAPH_CALL_IP, ftrace_nop);
> +	return ftrace_modify_code(FTRACE_GRAPH_CALL_IP, INSN_NOP);
>  }
>  
> -#endif				/* !CONFIG_DYNAMIC_FTRACE */
> +#endif	/* !CONFIG_DYNAMIC_FTRACE */
>  
>  #ifndef KBUILD_MCOUNT_RA_ADDRESS
> -#define S_RA_SP	(0xafbf << 16)	/* s{d,w} ra, offset(sp) */
> -#define S_R_SP	(0xafb0 << 16)  /* s{d,w} R, offset(sp) */
> -#define OFFSET_MASK	0xffff	/* stack offset range: 0 ~ PT_SIZE */
> +#define INSN_S_RA_SP	0xafbf0000	/* s{d,w} ra, offset(sp) */
> +#define STACK_OFFSET_MASK	0xffff	/* stack offset range: 0 ~ PT_SIZE */
>  
>  unsigned long ftrace_get_parent_addr(unsigned long self_addr,
>  				     unsigned long parent,
> @@ -162,35 +210,35 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr,
>  	unsigned int code;
>  	int faulted;
>  
> -	/* in module or kernel? */
> -	if (self_addr & 0x40000000) {
> -		/* module: move to the instruction "lui v1, HI_16BIT_OF_MCOUNT" */
> -		ip = self_addr - 20;
> -	} else {
> -		/* kernel: move to the instruction "move ra, at" */
> -		ip = self_addr - 12;
> -	}
> +	/*
> +	 * For module, move the ip from calling site of mcount to the
> +	 * instruction "lui v1, hi_16bit_of_mcount"(offset is 20), but for
> +	 * kernel, move to the instruction "move ra, at"(offset is 12)
> +	 */
> +	ip = self_addr - (in_module(self_addr) ? 20 : 12);
>  
> -	/* search the text until finding the non-store instruction or "s{d,w}
> -	 * ra, offset(sp)" instruction */
> +	/*
> +	 * search the text until finding the non-store instruction or "s{d,w}
> +	 * ra, offset(sp)" instruction
> +	 */
>  	do {
>  		ip -= 4;
>  
>  		/* get the code at "ip": code = *(unsigned int *)ip; */
>  		safe_load_code(code, ip, faulted);
> -
>  		if (unlikely(faulted))
>  			return 0;
>  
> -		/* If we hit the non-store instruction before finding where the
> +		/*
> +		 * If we hit the non-store instruction before finding where the
>  		 * ra is stored, then this is a leaf function and it does not
> -		 * store the ra on the stack. */
> -		if ((code & S_R_SP) != S_R_SP)
> +		 * store the ra on the stack.
> +		 */
> +		if ((code & INSN_S_R_SP) != INSN_S_R_SP)
>  			return parent_addr;
> +	} while (((code & INSN_S_RA_SP) != INSN_S_RA_SP));
>  
> -	} while (((code & S_RA_SP) != S_RA_SP));
> -
> -	sp = fp + (code & OFFSET_MASK);
> +	sp = fp + (code & STACK_OFFSET_MASK);
>  
>  	/* ra = *(unsigned long *)sp; */
>  	safe_load_stack(ra, sp, faulted);
> @@ -211,16 +259,17 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr,
>  void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
>  			   unsigned long fp)
>  {
> +	int faulted;
>  	unsigned long old;
>  	struct ftrace_graph_ent trace;
>  	unsigned long return_hooker = (unsigned long)
>  	    &return_to_handler;
> -	int faulted;
>  
>  	if (unlikely(atomic_read(&current->tracing_graph_pause)))
>  		return;
>  
> -	/* "parent" is the stack address saved the return address of the caller
> +	/*
> +	 * "parent" is the stack address saved the return address of the caller
>  	 * of _mcount.
>  	 *
>  	 * if the gcc < 4.5, a leaf function does not save the return address
> @@ -241,12 +290,14 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
>  	if (unlikely(faulted))
>  		goto out;
>  #ifndef KBUILD_MCOUNT_RA_ADDRESS
> -	parent = (unsigned long *)ftrace_get_parent_addr(self_addr, old,
> -							 (unsigned long)parent,
> -							 fp);
> -	/* If fails when getting the stack address of the non-leaf function's
> -	 * ra, stop function graph tracer and return */
> -	if (parent == 0)
> +	parent = (unsigned long *)ftrace_get_parent_addr(
> +			self_addr, old, (unsigned long)parent, fp);
> +
> +	/*
> +	 * If fails on getting the stack address of the non-leaf function's ra,
> +	 * stop function graph tracer and return
> +	 */
> +	if (unlikely(parent == 0))
>  		goto out;
>  #endif
>  	/* *parent = return_hooker; */
> @@ -272,4 +323,4 @@ out:
>  	ftrace_graph_stop();
>  	WARN_ON(1);
>  }
> -#endif				/* CONFIG_FUNCTION_GRAPH_TRACER */
> +#endif	/* CONFIG_FUNCTION_GRAPH_TRACER */



From dmitry.torokhov@gmail.com Fri Mar 12 19:35:02 2010
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Date:   Fri, 12 Mar 2010 10:34:51 -0800
From:   Dmitry Torokhov <dmitry.torokhov@gmail.com>
To:     Wolfram Sang <w.sang@pengutronix.de>
Cc:     kernel-janitors@vger.kernel.org,
        Ralf Baechle <ralf@linux-mips.org>,
        "Eric W. Biederman" <ebiederm@xmission.com>,
        linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] arch/mips/txx9/generic: init dynamic bin_attribute
 structures
Message-ID: <20100312183450.GC8736@core.coreip.homeip.net>
References: <1268377431-11671-1-git-send-email-w.sang@pengutronix.de>
 <1268377431-11671-2-git-send-email-w.sang@pengutronix.de>
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On Fri, Mar 12, 2010 at 08:03:49AM +0100, Wolfram Sang wrote:
> Commit 6992f5334995af474c2b58d010d08bc597f0f2fe introduced this requirement.
> Found with coccinelle, but fixed manually. Compile tested on X86 where
> possible.
> 

Regarding all 3 - it looks like these dynamically alocated attributes
could be converted to statically allocated ones. I'd recommend doing
that instead (in fact, I posted patch for the firmware_class couple days
ago).

> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: Eric W. Biederman <ebiederm@xmission.com>
> ---
>  arch/mips/txx9/generic/setup.c |    1 +
>  1 files changed, 1 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c
> index 7174d83..95184a0 100644
> --- a/arch/mips/txx9/generic/setup.c
> +++ b/arch/mips/txx9/generic/setup.c
> @@ -956,6 +956,7 @@ void __init txx9_sramc_init(struct resource *r)
>  	if (!dev->base)
>  		goto exit;
>  	dev->dev.cls = &txx9_sramc_sysdev_class;
> +	sysfs_bin_attr_init(&dev->bindata_attr);
>  	dev->bindata_attr.attr.name = "bindata";
>  	dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR;
>  	dev->bindata_attr.read = txx9_sram_read;

-- 
Dmitry

From sgi-linux-mips@m.gmane.org Fri Mar 12 20:40:22 2010
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To:     linux-mips@linux-mips.org
From:   Alexander Clouter <alex@digriz.org.uk>
Subject: [PATCH] MIPS: AR7: fix phat finger of reset bit in vlynq_high_data
Date:   Fri, 12 Mar 2010 19:39:48 +0000
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Seems in my whitespace cleanup 7084338eb8eb0cc021ba86c340157bad397f3f0b
caused AR7 to no longer get as far as init.  Fixed my phat fingering.

Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
---
 arch/mips/ar7/platform.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c
index 246df7a..0bd5f67 100644
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -168,7 +168,7 @@ static struct plat_vlynq_data vlynq_high_data = {
 		.on	= vlynq_on,
 		.off	= vlynq_off,
 	},
-	.reset_bit	= 26,
+	.reset_bit	= 16,
 	.gpio_bit	= 19,
 };
 
-- 
1.7.0


From sgi-linux-mips@m.gmane.org Sat Mar 13 01:09:47 2010
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From:   Alexander Clouter <alex@digriz.org.uk>
Subject: [PATCH] MIPS: AR7: fix phat finger of cpmac fixed_phy_add
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Seems I trimmed one too many lines in
7084338eb8eb0cc021ba86c340157bad397f3f0b which led to no functioning
Ethernet on my WAG54Gv2.  This patch restores the AWOL line.

Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
---
 arch/mips/ar7/platform.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c
index 0bd5f67..2fafc78 100644
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -600,6 +600,7 @@ static int __init ar7_register_devices(void)
 	}
 
 	if (ar7_has_high_cpmac()) {
+		res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status);
 		if (!res) {
 			cpmac_get_mac(1, cpmac_high_data.dev_addr);
 
-- 
1.7.0


From wsa@pengutronix.de Sat Mar 13 03:29:08 2010
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Date:   Sat, 13 Mar 2010 03:28:55 +0100
From:   Wolfram Sang <w.sang@pengutronix.de>
To:     Dmitry Torokhov <dmitry.torokhov@gmail.com>
Cc:     kernel-janitors@vger.kernel.org,
        Ralf Baechle <ralf@linux-mips.org>,
        "Eric W. Biederman" <ebiederm@xmission.com>,
        linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] arch/mips/txx9/generic: init dynamic bin_attribute
        structures
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On Fri, Mar 12, 2010 at 10:34:51AM -0800, Dmitry Torokhov wrote:
> On Fri, Mar 12, 2010 at 08:03:49AM +0100, Wolfram Sang wrote:
> > Commit 6992f5334995af474c2b58d010d08bc597f0f2fe introduced this require=
ment.
> > Found with coccinelle, but fixed manually. Compile tested on X86 where
> > possible.
> >=20
>=20
> Regarding all 3 - it looks like these dynamically alocated attributes
> could be converted to statically allocated ones. I'd recommend doing
> that instead (in fact, I posted patch for the firmware_class couple days
> ago).

I agree for the firmware-patch. Regarding the MIPS one, 'size' might differ=
 and
'private' will differ per instance. Regarding the RTC driver, 'size' might =
also
differ. I don't know if somebody really wants two RTCs or the SRAM for MIPS=
 can
be instantiated more than once. Unless somebody with actual hardware jumps =
in,
I'd say better safe than sorry.

Thanks for the comment!

   Wolfram

--=20
Pengutronix e.K.                           | Wolfram Sang                |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

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From wuzhangjin@gmail.com Sat Mar 13 04:59:04 2010
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Subject: Re: [PATCH 1/3] Loongson-2F: Flush the branch target history such
 as BTB and RAS
From:   Wu Zhangjin <wuzhangjin@gmail.com>
Reply-To: wuzhangjin@gmail.com
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     Shinya Kuribayashi <shinya.kuribayashi@necel.com>,
        Greg KH <gregkh@suse.de>, linux-mips@linux-mips.org,
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         <4B98632E.70806@necel.com>  <20100311095944.GC18065@linux-mips.org>
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Date:   Sat, 13 Mar 2010 11:52:21 +0800
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On Thu, 2010-03-11 at 10:59 +0100, Ralf Baechle wrote:
> On Thu, Mar 11, 2010 at 12:27:42PM +0900, Shinya Kuribayashi wrote:
> 
> > Are you sure that RAS represents "Row Address Strobe", not "Return
> > Address Stack?"

This should be Return Address Stack.

Will resend this patch later.

Thanks & Regards,
	Wu Zhangjin


From wuzhangjin@gmail.com Sat Mar 13 05:17:17 2010
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Subject: Re: [PATCH] MIPS: tracing: Optimize the implementation
From:   Wu Zhangjin <wuzhangjin@gmail.com>
Reply-To: wuzhangjin@gmail.com
To:     David Daney <ddaney@caviumnetworks.com>
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        Steven Rostedt <srostedt@redhat.com>, linux-mips@linux-mips.org
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On Fri, 2010-03-12 at 19:43 +0800, Wu Zhangjin wrote:
[...]
> > > + * otherwise, it is in kernel space (0x80000000), return false.
> > > + */
> > > +#define in_module(ip) (unlikely((ip)&  0x40000000))
> > > +
> > 
> > This isn't universally true, but it does hold for most configurations I 
> > think.
> 
> Although I'm not sure who is the exception, we always need an universal
> solution, what about this:
> 
> Compare module with kernel:
> 
> module:
> 
>         <saving registers>
> 
>         lui     v1, hi16_mcount                <--- ip
>         addiu   v1, v1, lo16_mcount
>         move    at, ra
>         jalr    v1
>          nop
> 
> kernel:
> 
>         <saving registers>
> 
>          move    at, ra
>          jal     _mcount                       <--- ip
> 
> The above _ip_ is the address have been recorded into the __mcount_loc
> section of the kernel by scripts/recordmcount.pl, as we can see, for
> kernel, the *(ip - 4) is "move at, ra": 03e0082d, a certain instruction,
> but for module, there is no possibility(?) of existing a "move at, ra"
> at *(ip -4) but a register saving operation("s {d,w} rs, offset(sp)",
> prefixed by 0xffb0 for 64bit and 0xafb0 for 32bit. ), and reversly, for
> kernel, there is no such instruction there.
> 
> And consider the new option -mmcount-ra-address of gcc, some more
> instructions will be inserted between "move at, ra" and the calling site
> to mcount, so, *(ip-4) will not always be "move at, ra", then we need to
> check if there is a "s {d,w} rs, offset(sp)" there, if yes, it is in
> module, otherwise, it should be in kernel.
> 
> #define S_RS_SP          0xafb00000      /* s{d,w} rs, offset(sp) */
> 
> static inline int in_module(ip)
> {
> 	insn = *(ip - 4); /* need to use safe_load_code instead, what about big
> endian? */
> 
> 	return ((insn & S_RS_SP) == S_RS_SP)
> }

The above method is not available for some cases, to avoid bring Ftrace
with extra overhead, currently, I will keep using the original version
although it may not work for some cases either.

And to let ftrace_make_nop/ftrace_make_call be lightweight, I will also
keep using the "b 1f" method in the old version.

Regards,
	Wu Zhangjin


From wuzhangjin@gmail.com Sat Mar 13 05:41:05 2010
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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     linux-mips@linux-mips.org,
        Shinya Kuribayashi <shinya.kuribayashi@necel.com>,
        Wu Zhangjin <wuzhangjin@gmail.com>
Subject: [PATCH v3 0/3] Workaround the Out-of-order Issue of Loongson-2F
Date:   Sat, 13 Mar 2010 12:34:14 +0800
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From: Wu Zhangjin <wuzhangjin@gmail.com>

Hi, Ralf

Is that possible to apply this patchset for both 2.6.33(the stable release) and
2.6.34? then we can get a not broken support for loongson-2f with the
options(-mfix-loongson2f-nop, -mfix-loongson2f-jump) provided by the latest
binutils (>=2.20.1).

Thanks & Regards,
       Wu Zhangjin

-------

Changes:

v2->v3:

  o Herein, RAS is short for Return Address Stack not Row Address Strobe, at
  the same time, the "model" in the translation of Chapter 15 should be "mode".
  (feedback from Shinya Kuribayashi)
	
v1->v2:

  o Cleanup some comments and align some instructions.
  
----

As the Chapter 15: "Errata: Issue of Out-of-order in loongson"[1] shows, to
workaround the Issue of Loongson-2Fï¼ŒWe need to do:

  o When switching from user mode to kernel mode, you should flush the branch
  target history such as BTB and RAS.
 
  o Doing some tricks to the indirect branch target to make sure that the
  indirect branch target can not be in the I/O region.

This patchset applied the above methods and for the binutils patch[3] have been
merged into binutils 2.20.1, so, it's time to upstream this patchset now.
without this patch, the machines will hang when the instruction sequence hit
the Out-of-order Issue of Loongson-2F, therefore, this patchset is very urgent
for both 2.6.33 and 2.6.34.

[1] Chinese Version: http://www.loongson.cn/uploadfile/file/20080821113149.pdf
[2] English Version of Chapter 15:
http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source
[3] http://sourceware.org/ml/binutils/2009-11/msg00387.html 

Regards,
        Wu Zhangjin

Wu Zhangjin (3):
  Loongson-2F: Flush the branch target history such as BTB and RAS
  Loongson-2F: Enable fixups of binutils 2.20.1
  Loongson-2F: Fixup of problems introduced by -mfix-loongson2f-jump of
    binutils 2.20.1

 arch/mips/Makefile                 |    4 +++-
 arch/mips/include/asm/stackframe.h |   19 +++++++++++++++++++
 arch/mips/loongson/common/reset.c  |   11 ++++++++++-
 3 files changed, 32 insertions(+), 2 deletions(-)


From wuzhangjin@gmail.com Sat Mar 13 05:45:55 2010
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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     linux-mips@linux-mips.org,
        Shinya Kuribayashi <shinya.kuribayashi@necel.com>,
        Wu Zhangjin <wuzhangjin@gmail.com>
Subject: [PATCH v3 1/3] Loongson-2F: Flush the branch target history such as BTB and RAS
Date:   Sat, 13 Mar 2010 12:34:15 +0800
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From: Wu Zhangjin <wuzhangjin@gmail.com>

As the Chapter 15: "Errata: Issue of Out-of-order in loongson"[1] shows, to
workaround the Issue of Loongson-2Fï¼ŒWe need to do:

"When switching from user mode to kernel mode, you should flush the
branch target history such as BTB and RAS."

This patch did clear BTB(branch target buffer), forbid RAS(return
address stack) via Loongson-2F's 64bit diagnostic register.

[1] Chinese Version: http://www.loongson.cn/uploadfile/file/200808211
[2] English Version of Chapter 15:
http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
---
 arch/mips/include/asm/stackframe.h |   19 +++++++++++++++++++
 1 files changed, 19 insertions(+), 0 deletions(-)

diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
index 3b6da33..c841912 100644
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -121,6 +121,25 @@
 		.endm
 #else
 		.macro	get_saved_sp	/* Uniprocessor variation */
+#ifdef CONFIG_CPU_LOONGSON2F
+		/*
+		 * Clear BTB (branch target buffer), forbid RAS (return address
+		 * stack) to workaround the Out-of-order Issue in Loongson2F
+		 * via its diagnostic register.
+		 */
+		move	k0, ra
+		jal	1f
+		 nop
+1:		jal	1f
+		 nop
+1:		jal	1f
+		 nop
+1:		jal	1f
+		 nop
+1:		move	ra, k0
+		li	k0, 3
+		mtc0	k0, $22
+#endif /* CONFIG_CPU_LOONGSON2F */
 #if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
 		lui	k1, %hi(kernelsp)
 #else
-- 
1.7.0.1


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Subject: [PATCH v3 2/3] Loongson-2F: Enable fixups of binutils 2.20.1
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From: Wu Zhangjin <wuzhangjin@gmail.com>

As the "Fixups of Loongson2F" patch[1] to binutils have been applied
into binutils 2.20.1. It's time to enable the options provided by the
patch to compile the kernel.

Without these fixups, the system will hang unexpectedly for the bug of
processor.

To learn more about these fixups, please refer to the following
references.

[1] "Fixups of Loongson2F" patch for binutils(actually for gas)
http://sourceware.org/ml/binutils/2009-11/msg00387.html
[2] Chapter 15 of "Loongson2F User Manual"(Chinese Version)
http://www.loongson.cn/uploadfile/file/200808211
[3] English Version of the above chapter 15
http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source

Signed-off-by: Zhang Le <r0bertz@gentoo.org>
Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
---
 arch/mips/Makefile |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 2f2eac2..5ae342e 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -135,7 +135,9 @@ cflags-$(CONFIG_CPU_LOONGSON2)	+= -Wa,--trap
 cflags-$(CONFIG_CPU_LOONGSON2E) += \
 	$(call cc-option,-march=loongson2e,-march=r4600)
 cflags-$(CONFIG_CPU_LOONGSON2F) += \
-	$(call cc-option,-march=loongson2f,-march=r4600)
+	$(call cc-option,-march=loongson2f,-march=r4600) \
+	$(call as-option,-Wa$(comma)-mfix-loongson2f-nop,) \
+	$(call as-option,-Wa$(comma)-mfix-loongson2f-jump,)
 
 cflags-$(CONFIG_CPU_MIPS32_R1)	+= $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
 			-Wa,-mips32 -Wa,--trap
-- 
1.7.0.1


From wuzhangjin@gmail.com Sat Mar 13 05:46:40 2010
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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     linux-mips@linux-mips.org,
        Shinya Kuribayashi <shinya.kuribayashi@necel.com>,
        Wu Zhangjin <wuzhangjin@gmail.com>
Subject: [PATCH v3 3/3] Loongson-2F: Fixup of problems introduced by -mfix-loongson2f-jump of binutils 2.20.1
Date:   Sat, 13 Mar 2010 12:34:17 +0800
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From: Wu Zhangjin <wuzhangjin@gmail.com>

The -mfix-loongson2f-jump option provided by the binutils 2.20.1 have fixed the
Out-of-order Issue of Loongson-2F described in Chapter 15 of "Loongson2F User
Manual"[1,2], but introduced some problems.

The option changes all of the jumping target to "addr & 0xcfffffff" through the
at($1) register, but for the REBOOT address of loongson-2F: 0xbfc00000, this is
totally wrong, so, this patch try to avoid the problem via telling the
assembler not to use at($1) register.

[1] Loongson2F User Manual(Chinese Version)
http://www.loongson.cn/uploadfile/file/200808211
[2] English Version of Chapter 15:
http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source

Reported-and-tested-by: Liu Shiwei <liushiwei@gmail.com>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
---
 arch/mips/loongson/common/reset.c |   11 ++++++++++-
 1 files changed, 10 insertions(+), 1 deletions(-)

diff --git a/arch/mips/loongson/common/reset.c b/arch/mips/loongson/common/reset.c
index 4bd9c18..dc311f2 100644
--- a/arch/mips/loongson/common/reset.c
+++ b/arch/mips/loongson/common/reset.c
@@ -21,8 +21,17 @@ static void loongson_restart(char *command)
 	/* do preparation for reboot */
 	mach_prepare_reboot();
 
-	/* reboot via jumping to boot base address */
+	/* reboot via jumping to boot base address
+	 *
+	 * ".set noat" and ".set at" are used to ensure the address not break
+	 * by the -mfix-loongson2f-jump option provided by binutils 2.20.1 (or
+	 * higher version) which try to change the jumping address to "addr &
+	 * 0xcfffffff" via the at($1) register, this is totally wrong for
+	 * 0xbfc00000 (LOONGSON_BOOT_BASE).
+	 */
+	__asm__ __volatile__(".set noat\n");
 	((void (*)(void))ioremap_nocache(LOONGSON_BOOT_BASE, 4)) ();
+	__asm__ __volatile__(".set at\n");
 }
 
 static void loongson_poweroff(void)
-- 
1.7.0.1


From dmitry.torokhov@gmail.com Sat Mar 13 09:34:12 2010
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Date:   Sat, 13 Mar 2010 00:33:59 -0800
From:   Dmitry Torokhov <dmitry.torokhov@gmail.com>
To:     Wolfram Sang <w.sang@pengutronix.de>
Cc:     kernel-janitors@vger.kernel.org,
        Ralf Baechle <ralf@linux-mips.org>,
        "Eric W. Biederman" <ebiederm@xmission.com>,
        linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] arch/mips/txx9/generic: init dynamic bin_attribute
 structures
Message-ID: <20100313083359.GB22494@core.coreip.homeip.net>
References: <1268377431-11671-1-git-send-email-w.sang@pengutronix.de>
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On Sat, Mar 13, 2010 at 03:28:55AM +0100, Wolfram Sang wrote:
> On Fri, Mar 12, 2010 at 10:34:51AM -0800, Dmitry Torokhov wrote:
> > On Fri, Mar 12, 2010 at 08:03:49AM +0100, Wolfram Sang wrote:
> > > Commit 6992f5334995af474c2b58d010d08bc597f0f2fe introduced this requirement.
> > > Found with coccinelle, but fixed manually. Compile tested on X86 where
> > > possible.
> > > 
> > 
> > Regarding all 3 - it looks like these dynamically alocated attributes
> > could be converted to statically allocated ones. I'd recommend doing
> > that instead (in fact, I posted patch for the firmware_class couple days
> > ago).
> 
> I agree for the firmware-patch. Regarding the MIPS one, 'size' might differ and
> 'private' will differ per instance. Regarding the RTC driver, 'size' might also
> differ. I don't know if somebody really wants two RTCs or the SRAM for MIPS can
> be instantiated more than once. Unless somebody with actual hardware jumps in,
> I'd say better safe than sorry.
> 

Ah, right, size... I forgot about it. You are right, making the other 2
static is not an option.

-- 
Dmitry

From shinya.kuribayashi@necel.com Mon Mar 15 00:42:02 2010
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        linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] Loongson-2F: Flush the branch target history such
 as BTB and RAS
References: <cover.1268153722.git.wuzhangjin@gmail.com>         <d513f16856e499e82f0b4e428c97fe06afb5a426.1268153722.git.wuzhangjin@gmail.com>         <4B98632E.70806@necel.com>  <20100311095944.GC18065@linux-mips.org> <1268452341.21443.3.camel@falcon>
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Wu Zhangjin wrote:
> On Thu, 2010-03-11 at 10:59 +0100, Ralf Baechle wrote:
>> On Thu, Mar 11, 2010 at 12:27:42PM +0900, Shinya Kuribayashi wrote:
>>
>>> Are you sure that RAS represents "Row Address Strobe", not "Return
>>> Address Stack?"
> 
> This should be Return Address Stack.
> 
> Will resend this patch later.

Thanks for the head's up.
-- 
Shinya Kuribayashi
NEC Electronics

From w.sang@pengutronix.de Mon Mar 15 01:33:13 2010
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Commit 6992f5334995af474c2b58d010d08bc597f0f2fe introduced this requirement.
First, at25 was fixed manually. Then, other occurences were found with
coccinelle and the following semantic patch. Results were reviewed and fixed
up:

@ init @
identifier struct_name, bin;
@@

	struct struct_name {
		...
		struct bin_attribute bin;
		...
	};

@ main extends init @
expression E;
statement S;
identifier name, err;
@@

(
	struct struct_name *name;
|
-	struct struct_name *name = NULL;
+	struct struct_name *name;
)
	...
(
	sysfs_bin_attr_init(&name->bin);
|
+	sysfs_bin_attr_init(&name->bin);
	if (sysfs_create_bin_file(E, &name->bin))
		S
|
+	sysfs_bin_attr_init(&name->bin);
	err = sysfs_create_bin_file(E, &name->bin);
)

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: Eric W. Biederman <ebiederm@xmission.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
---
 arch/mips/txx9/generic/setup.c |    1 +
 drivers/misc/eeprom/at25.c     |    1 +
 drivers/rtc/rtc-ds1742.c       |    1 +
 3 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c
index 7174d83..95184a0 100644
--- a/arch/mips/txx9/generic/setup.c
+++ b/arch/mips/txx9/generic/setup.c
@@ -956,6 +956,7 @@ void __init txx9_sramc_init(struct resource *r)
 	if (!dev->base)
 		goto exit;
 	dev->dev.cls = &txx9_sramc_sysdev_class;
+	sysfs_bin_attr_init(&dev->bindata_attr);
 	dev->bindata_attr.attr.name = "bindata";
 	dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR;
 	dev->bindata_attr.read = txx9_sram_read;
diff --git a/drivers/misc/eeprom/at25.c b/drivers/misc/eeprom/at25.c
index d902d81..d194212 100644
--- a/drivers/misc/eeprom/at25.c
+++ b/drivers/misc/eeprom/at25.c
@@ -347,6 +347,7 @@ static int at25_probe(struct spi_device *spi)
 	 * that's sensitive for read and/or write, like ethernet addresses,
 	 * security codes, board-specific manufacturing calibrations, etc.
 	 */
+	sysfs_bin_attr_init(&at25->bin);
 	at25->bin.attr.name = "eeprom";
 	at25->bin.attr.mode = S_IRUSR;
 	at25->bin.read = at25_bin_read;
diff --git a/drivers/rtc/rtc-ds1742.c b/drivers/rtc/rtc-ds1742.c
index a127336..cad9ceb 100644
--- a/drivers/rtc/rtc-ds1742.c
+++ b/drivers/rtc/rtc-ds1742.c
@@ -184,6 +184,7 @@ static int __devinit ds1742_rtc_probe(struct platform_device *pdev)
 	pdata->size_nvram = pdata->size - RTC_SIZE;
 	pdata->ioaddr_rtc = ioaddr + pdata->size_nvram;
 
+	sysfs_bin_attr_init(&pdata->nvram_attr);
 	pdata->nvram_attr.attr.name = "nvram";
 	pdata->nvram_attr.attr.mode = S_IRUGO | S_IWUSR;
 	pdata->nvram_attr.read = ds1742_nvram_read;
-- 
1.7.0


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From:   Jiri Kosina <jkosina@suse.cz>
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Subject: Re: [PATCH] init dynamic bin_attribute structures
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On Mon, 15 Mar 2010, Wolfram Sang wrote:

> Commit 6992f5334995af474c2b58d010d08bc597f0f2fe introduced this requirement.
> First, at25 was fixed manually. Then, other occurences were found with
> coccinelle and the following semantic patch. Results were reviewed and fixed
> up:
> 
> @ init @
> identifier struct_name, bin;
> @@
> 
> 	struct struct_name {
> 		...
> 		struct bin_attribute bin;
> 		...
> 	};
> 
> @ main extends init @
> expression E;
> statement S;
> identifier name, err;
> @@
> 
> (
> 	struct struct_name *name;
> |
> -	struct struct_name *name = NULL;
> +	struct struct_name *name;
> )
> 	...
> (
> 	sysfs_bin_attr_init(&name->bin);
> |
> +	sysfs_bin_attr_init(&name->bin);
> 	if (sysfs_create_bin_file(E, &name->bin))
> 		S
> |
> +	sysfs_bin_attr_init(&name->bin);
> 	err = sysfs_create_bin_file(E, &name->bin);
> )
> 
> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
> Cc: Eric W. Biederman <ebiederm@xmission.com>
> Cc: Linus Torvalds <torvalds@linux-foundation.org>
> ---
>  arch/mips/txx9/generic/setup.c |    1 +
>  drivers/misc/eeprom/at25.c     |    1 +
>  drivers/rtc/rtc-ds1742.c       |    1 +
>  3 files changed, 3 insertions(+), 0 deletions(-)

I don't understand how cocinelle works, but the resulting patch seems to 
be incomplete.

The fix is needed at least in firmware loader (for which Greg has already 
queued patch), in ACPI thermal driver [1], etc).

[1] http://lkml.indiana.edu/hypermail/linux/kernel/1003.1/02680.html

-- 
Jiri Kosina
SUSE Labs, Novell Inc.


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From:   Wolfram Sang <w.sang@pengutronix.de>
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Subject: Re: [rtc-linux] Re: [PATCH] init dynamic bin_attribute structures
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> I don't understand how cocinelle works, but the resulting patch seems to=
=20
> be incomplete.

Okay, will investigate, thanks for the pointer.

> The fix is needed at least in firmware loader (for which Greg has already=
=20
> queued patch), in ACPI thermal driver [1], etc).

Firmware loader should be handled differently, see other mails in the
originating thread, so I skipped it intentionally. at24 also needed a fix, =
but
that one was just applied via the i2c-tree, so I skipped it, too. Will check
the ACPI-case!

Regards,

   Wolfram

--=20
Pengutronix e.K.                           | Wolfram Sang                |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

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From ralf@linux-mips.org Mon Mar 15 18:13:02 2010
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From:   Ralf Baechle <ralf@linux-mips.org>
To:     Alexander Clouter <alex@digriz.org.uk>
Cc:     linux-mips@linux-mips.org
Subject: Re: [PATCH] MIPS: AR7: fix phat finger of reset bit in
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On Fri, Mar 12, 2010 at 07:39:48PM +0000, Alexander Clouter wrote:
> From: Alexander Clouter <alex@digriz.org.uk>
> Date:   Fri, 12 Mar 2010 19:39:48 +0000
> To: linux-mips@linux-mips.org
> Subject: [PATCH] MIPS: AR7: fix phat finger of reset bit in vlynq_high_data
> 
> Seems in my whitespace cleanup 7084338eb8eb0cc021ba86c340157bad397f3f0b
> caused AR7 to no longer get as far as init.  Fixed my phat fingering.

Patch looks good but it seems you phat fingered the commit ID which is
0f2536082d01448daeced8d9e82c3ba1751fefa3 (lmo) rsp.
8c2961da46abd85a71d20f2b169bf80618e (kernel.org).

Applied,

  Ralf

From ralf@linux-mips.org Mon Mar 15 18:17:30 2010
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Subject: Re: [PATCH] MIPS: AR7: fix phat finger of cpmac fixed_phy_add
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On Sat, Mar 13, 2010 at 12:09:15AM +0000, Alexander Clouter wrote:

> Seems I trimmed one too many lines in
> 7084338eb8eb0cc021ba86c340157bad397f3f0b which led to no functioning
> Ethernet on my WAG54Gv2.  This patch restores the AWOL line.

Phat-freely applied.  Thanks!

  Ralf

From ralf@linux-mips.org Mon Mar 15 18:49:09 2010
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On Sat, Mar 13, 2010 at 03:28:55AM +0100, Wolfram Sang wrote:

> > Regarding all 3 - it looks like these dynamically alocated attributes
> > could be converted to statically allocated ones. I'd recommend doing
> > that instead (in fact, I posted patch for the firmware_class couple days
> > ago).
> 
> I agree for the firmware-patch. Regarding the MIPS one, 'size' might differ and
> 'private' will differ per instance. Regarding the RTC driver, 'size' might also
> differ. I don't know if somebody really wants two RTCs or the SRAM for MIPS can
> be instantiated more than once. Unless somebody with actual hardware jumps in,
> I'd say better safe than sorry.

On the txx9 platform you've posted the patch for additional RTCs or SRAMs
would not normally be expected.  On other platforms such as IP27 there
would be one per node that is potencially very many.

  Ralf

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On Mon, 15 Mar 2010, Jiri Kosina wrote:
> 
> I don't understand how cocinelle works, but the resulting patch seems to 
> be incomplete.
> 
> The fix is needed at least in firmware loader (for which Greg has already 
> queued patch), in ACPI thermal driver [1], etc).

The firmware loader should be done differently:

	http://patchwork.kernel.org/patch/84814/

and I suspect that Wolfram may have skipped the thermal one as having been 
done by another patch (that I didn't merge, due to having questions about 
the whole issue, but that I don't have any objections to)

But maybe there is also some limitation to the coccinelle rule too.

		Linus

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Peter 'p2' De Schrijver wrote:
> Hi,
>
> We are trying to get linux 2.6.33 to work on the movidis x16 board. Main thing
> missing is the addresses of the PHYs. Does anyone know those ?
> Unfortunately I don't have physical access to the board so I can't just look
> for the PHY components being used.
>
> Thanks,
>
> Peter.
>
>   
Do you mean the Movidis x19 ?
We have 2 of these in our lab. They are running the old 2.6.21.7  from 
the CnUsers 1.8.1  tool chain.
They are currently being used by other developers for some application 
testing, but I can grab the serial console boot-up messages and send 
them to you, if the PHY info is in there.

Jan

From af@chaos-agency.de Tue Mar 16 12:35:58 2010
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Date:   Tue, 16 Mar 2010 12:35:51 +0100
From:   Andreas Ferber <af@chaos-agency.de>
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     Markus Wigge <markus@cultcom.de>, Michael Buesch <mb@bu3sch.de>,
        linux-mips@linux-mips.org
Subject: [PATCH] mips: Fix SSB PCIcore IO resource management
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The SSB PCIcore code reused the IO resource fixup code from the original
2.4.x Broadcom patch for BCM47xx based devices, which was a quick hack
for doing PCI IO resource configuration back then (the boot loader
doesn't configure PCI devices on this platform).

However, this code is no longer necessary since the kernel now can do
PCI resource management fine all by itself, so remove the old code.

When removing the code, it becomes obvious that the mem_offset setting
in the PCIcore driver was wrong, however this was masked by the fixup
code before, except in a few cases involving yenta_socket. For
BCM47xx, the correct offset is 0, and since this is the only device
using PCIcore in host mode, the offset can simply be removed
unconditionally.

Signed-off-by: Andreas Ferber <af@chaos-agency.de>
Signed-off-by: Michael Buesch <mb@bu3sch.de>

---

The patch has been tested on the following devices:

 - Linksys WRT54G3G V1.0
 - Asus WL500g Premium V1
 - Asus WL500g Premium V2
 - Netgear WGT634U

Regards,
Andreas

Index: linux-2.6.33/drivers/ssb/driver_pcicore.c
===================================================================
--- linux-2.6.33.orig/drivers/ssb/driver_pcicore.c	2010-03-15 14:52:55.000000000 +0100
+++ linux-2.6.33/drivers/ssb/driver_pcicore.c	2010-03-15 15:57:38.000000000 +0100
@@ -246,20 +246,12 @@
 	.pci_ops	= &ssb_pcicore_pciops,
 	.io_resource	= &ssb_pcicore_io_resource,
 	.mem_resource	= &ssb_pcicore_mem_resource,
-	.mem_offset	= 0x24000000,
 };
 
-static u32 ssb_pcicore_pcibus_iobase = 0x100;
-static u32 ssb_pcicore_pcibus_membase = SSB_PCI_DMA;
-
 /* This function is called when doing a pci_enable_device().
  * We must first check if the device is a device on the PCI-core bridge. */
 int ssb_pcicore_plat_dev_init(struct pci_dev *d)
 {
-	struct resource *res;
-	int pos, size;
-	u32 *base;
-
 	if (d->bus->ops != &ssb_pcicore_pciops) {
 		/* This is not a device on the PCI-core bridge. */
 		return -ENODEV;
@@ -268,27 +260,6 @@
 	ssb_printk(KERN_INFO "PCI: Fixing up device %s\n",
 		   pci_name(d));
 
-	/* Fix up resource bases */
-	for (pos = 0; pos < 6; pos++) {
-		res = &d->resource[pos];
-		if (res->flags & IORESOURCE_IO)
-			base = &ssb_pcicore_pcibus_iobase;
-		else
-			base = &ssb_pcicore_pcibus_membase;
-		res->flags |= IORESOURCE_PCI_FIXED;
-		if (res->end) {
-			size = res->end - res->start + 1;
-			if (*base & (size - 1))
-				*base = (*base + size) & ~(size - 1);
-			res->start = *base;
-			res->end = res->start + size - 1;
-			*base += size;
-			pci_write_config_dword(d, PCI_BASE_ADDRESS_0 + (pos << 2), res->start);
-		}
-		/* Fix up PCI bridge BAR0 only */
-		if (d->bus->number == 0 && PCI_SLOT(d->devfn) == 0)
-			break;
-	}
 	/* Fix up interrupt lines */
 	d->irq = ssb_mips_irq(extpci_core->dev) + 2;
 	pci_write_config_byte(d, PCI_INTERRUPT_LINE, d->irq);

From wuzhangjin@gmail.com Tue Mar 16 14:33:21 2010
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From:   Wu Zhangjin <wuzhangjin@gmail.com>
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     Steven Rostedt <rostedt@goodmis.org>, linux-mips@linux-mips.org,
        Wu Zhangjin <wuzhangjin@gmail.com>
Subject: [PATCH v4] MIPS: tracing: Optimize the implementation
Date:   Tue, 16 Mar 2010 21:26:25 +0800
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From: Wu Zhangjin <wuzhangjin@gmail.com>

Changes:

v3 -> v4:

  + Fixup of 'undefined ftrace_graph_caller'

    ftrace_graph_caller variable is only needed by
    CONFIG_FUNCTION_GRAPH_TRACER, so, wrap it with #ifdef.

v2 -> v3:

  + Fixes the buidling error of the changes from v2.

v1 -> v2:

  + Fixes the support of -mmcount-ra-address

    The offset of "b 1f" instruction should be 20 for leaf-function and
    24 for non-leaf function when -mmcount-ra-address is enabled. This
    patch adds a new get_insn_b_1f() function to get the different "b
    1f" instruction.

  (only test without -mmcount-ra-address.)

v1:

  + Reduce the runtime overhead

    o Uses macros instead of variables for the fixed instructions to
    reduce memory access

    o Moves the Initilization of the instructions which will be fixed
    after linking from ftrace_make_nop/ftrace_make_call to
    ftrace_dyn_arch_init() and encodes the instructions through
    uasm(arch/mips/include/asm/uasm.h).

    o A common macro in_module() is defined to determine which space the
    instruction pointer stays in and several related conditional
    statements are converted to conditional operator(? :) statement.

  + Cleanup the whole stuff

    Lots of comments/macros have been cleaned up to let it look better.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
---
 arch/mips/include/asm/ftrace.h |   12 ++-
 arch/mips/kernel/ftrace.c      |  244 ++++++++++++++++++++++++----------------
 2 files changed, 157 insertions(+), 99 deletions(-)

diff --git a/arch/mips/include/asm/ftrace.h b/arch/mips/include/asm/ftrace.h
index ce35c9a..6dbfa1e 100644
--- a/arch/mips/include/asm/ftrace.h
+++ b/arch/mips/include/asm/ftrace.h
@@ -3,7 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive for
  * more details.
  *
- * Copyright (C) 2009 DSLab, Lanzhou University, China
+ * Copyright (C) 2009, 2010 DSLab, Lanzhou University, China
  * Author: Wu Zhangjin <wuzhangjin@gmail.com>
  */
 
@@ -19,6 +19,14 @@
 extern void _mcount(void);
 #define mcount _mcount
 
+/*
+ * If the Instruction Pointer is in module space (0xc0000000), return true;
+ * otherwise, it is in kernel space (0x80000000), return false.
+ *
+ * FIXME: This may not work in some cases.
+ */
+#define in_module(ip) (unlikely((ip) & 0x40000000))
+
 #define safe_load(load, src, dst, error)		\
 do {							\
 	asm volatile (					\
@@ -83,8 +91,8 @@ static inline unsigned long ftrace_call_adjust(unsigned long addr)
 
 struct dyn_arch_ftrace {
 };
+#endif /* CONFIG_DYNAMIC_FTRACE */
 
-#endif /*  CONFIG_DYNAMIC_FTRACE */
 #endif /* __ASSEMBLY__ */
 #endif /* CONFIG_FUNCTION_TRACER */
 #endif /* _ASM_MIPS_FTRACE_H */
diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c
index e9e64e0..ae906b9 100644
--- a/arch/mips/kernel/ftrace.c
+++ b/arch/mips/kernel/ftrace.c
@@ -2,7 +2,7 @@
  * Code for replacing ftrace calls with jumps.
  *
  * Copyright (C) 2007-2008 Steven Rostedt <srostedt@redhat.com>
- * Copyright (C) 2009 DSLab, Lanzhou University, China
+ * Copyright (C) 2009, 2010 DSLab, Lanzhou University, China
  * Author: Wu Zhangjin <wuzhangjin@gmail.com>
  *
  * Thanks goes to Steven Rostedt for writing the original x86 version.
@@ -15,15 +15,52 @@
 #include <asm/cacheflush.h>
 #include <asm/asm.h>
 #include <asm/asm-offsets.h>
+#include <asm/uasm.h>
+
+#define INSN_S_R_SP	0xafb00000	/* s{d,w} R, offset(sp) */
 
 #ifdef CONFIG_DYNAMIC_FTRACE
 
-#define JAL 0x0c000000		/* jump & link: ip --> ra, jump to target */
-#define ADDR_MASK 0x03ffffff	/*  op_code|addr : 31...26|25 ....0 */
-#define jump_insn_encode(op_code, addr) \
-	((unsigned int)((op_code) | (((addr) >> 2) & ADDR_MASK)))
+/* Before linking, the following instructions are fixed. */
+#ifdef CONFIG_CPU_LOONGSON2F
+#define INSN_NOP 0x00200825	/* or at, at, zero */
+#else
+#define INSN_NOP 0x00000000	/* nop */
+#endif
+#define INSN_B_1F_16 0x10000004	/* b 1f; offset = (16 >> 2) */
+#define INSN_B_1F_20 0x10000005	/* b 1f; offset = (20 >> 2) */
+#define INSN_B_1F_24 0x10000006	/* b 1f; offset = (24 >> 2) */
+
+/* After linking, the following instructions are fixed. */
+static unsigned int insn_jal_ftrace_caller __read_mostly;
+static unsigned int insn_lui_v1_hi16_mcount __read_mostly;
+static unsigned int insn_j_ftrace_graph_caller __maybe_unused __read_mostly;
+
+/* The following instructions are encoded in the run-time */
+/* insn: jal func; op_code|addr : 31...26|25 ....0 */
+#define INSN_JAL(addr) \
+	((unsigned int)(0x0c000000 | (((addr) >> 2) & 0x03ffffff)))
 
-static unsigned int ftrace_nop = 0x00000000;
+static inline void ftrace_dyn_arch_init_insns(void)
+{
+	u32 *buf;
+	unsigned int v1;
+
+	/* lui v1, hi16_mcount */
+	v1 = 3;
+	buf = (u32 *)&insn_lui_v1_hi16_mcount;
+	UASM_i_LA_mostly(&buf, v1, MCOUNT_ADDR);
+
+	/* jal (ftrace_caller + 8), jump over the first two instruction */
+	buf = (u32 *)&insn_jal_ftrace_caller;
+	uasm_i_jal(&buf, (FTRACE_ADDR + 8));
+
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+	/* j ftrace_graph_caller */
+	buf = (u32 *)&insn_j_ftrace_graph_caller;
+	uasm_i_j(&buf, (unsigned long)ftrace_graph_caller);
+#endif
+}
 
 static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
 {
@@ -31,7 +68,6 @@ static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
 
 	/* *(unsigned int *)ip = new_code; */
 	safe_store_code(new_code, ip, faulted);
-
 	if (unlikely(faulted))
 		return -EFAULT;
 
@@ -40,118 +76,130 @@ static int ftrace_modify_code(unsigned long ip, unsigned int new_code)
 	return 0;
 }
 
-static int lui_v1;
-static int jal_mcount;
+static inline unsigned int get_insn_b_1f(unsigned int *insn, unsigned long ip)
+{
+#ifndef KBUILD_MCOUNT_RA_ADDRESS
+	*insn = INSN_B_1F_16;
+	return 0;
+#else
+	int faulted;
+	unsigned int code;
+
+	ip -= 4;
+
+	/* code = *(unsigned int *)ip; */
+	safe_load_code(code, ip, faulted);
+	if (unlikely(faulted))
+		return -EFAULT;
+
+	if ((code & INSN_S_R_SP) != INSN_S_R_SP)
+		*insn = INSN_B_1F_20;
+	else
+		*insn = INSN_B_1F_24;
+
+	return 0;
+#endif
+}
 
 int ftrace_make_nop(struct module *mod,
 		    struct dyn_ftrace *rec, unsigned long addr)
 {
 	unsigned int new;
-	int faulted;
 	unsigned long ip = rec->ip;
 
-	/* We have compiled module with -mlong-calls, but compiled the kernel
-	 * without it, we need to cope with them respectively. */
-	if (ip & 0x40000000) {
-		/* record it for ftrace_make_call */
-		if (lui_v1 == 0) {
-			/* lui_v1 = *(unsigned int *)ip; */
-			safe_load_code(lui_v1, ip, faulted);
-
-			if (unlikely(faulted))
-				return -EFAULT;
-		}
-
-		/* lui v1, hi_16bit_of_mcount        --> b 1f (0x10000004)
-		 * addiu v1, v1, low_16bit_of_mcount
-		 * move at, ra
-		 * jalr v1
-		 * nop
-		 * 				     1f: (ip + 12)
-		 */
-		new = 0x10000004;
-	} else {
-		/* record/calculate it for ftrace_make_call */
-		if (jal_mcount == 0) {
-			/* We can record it directly like this:
-			 *     jal_mcount = *(unsigned int *)ip;
-			 * Herein, jump over the first two nop instructions */
-			jal_mcount = jump_insn_encode(JAL, (MCOUNT_ADDR + 8));
-		}
-
-		/* move at, ra
-		 * jalr v1		--> nop
-		 */
-		new = ftrace_nop;
-	}
+	/*
+	 * We have compiled modules with -mlong-calls, but compiled kernel
+	 * without it, therefore, need to cope with them respectively.
+	 *
+	 * For module:
+	 *
+	 *	lui	v1, hi16_mcount		--> b	1f
+	 *	addiu	v1, v1, lo16_mcount
+	 *	move	at, ra
+	 *	jalr	v1
+	 *	 nop
+	 *					1f: (ip + 16)
+	 * For kernel:
+	 *
+	 *	move	at, ra
+	 *	jal	_mcount			--> nop
+	 *
+	 * And with the -mmcount-ra-address option, the offset may be 20 for
+	 * leaf fuction and 24 for non-leaf function.
+	 */
+
+	if (!in_module(ip))
+		new = INSN_NOP;
+	else if (get_insn_b_1f(&new, ip))
+		return -EFAULT;
+
 	return ftrace_modify_code(ip, new);
 }
 
-static int modified;	/* initialized as 0 by default */
-
 int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
 {
 	unsigned int new;
 	unsigned long ip = rec->ip;
 
-	/* We just need to remove the "b ftrace_stub" at the fist time! */
-	if (modified == 0) {
-		modified = 1;
-		ftrace_modify_code(addr, ftrace_nop);
-	}
-	/* ip, module: 0xc0000000, kernel: 0x80000000 */
-	new = (ip & 0x40000000) ? lui_v1 : jal_mcount;
+	new = in_module(ip) ? insn_lui_v1_hi16_mcount : insn_jal_ftrace_caller;
 
 	return ftrace_modify_code(ip, new);
 }
 
-#define FTRACE_CALL_IP ((unsigned long)(&ftrace_call))
-
 int ftrace_update_ftrace_func(ftrace_func_t func)
 {
 	unsigned int new;
 
-	new = jump_insn_encode(JAL, (unsigned long)func);
+	new = INSN_JAL((unsigned long)func);
 
-	return ftrace_modify_code(FTRACE_CALL_IP, new);
+	return ftrace_modify_code((unsigned long)(&ftrace_call), new);
 }
 
 int __init ftrace_dyn_arch_init(void *data)
 {
+	ftrace_dyn_arch_init_insns();
+
+	/*
+	 * We are safe to remove the "b ftrace_stub" for the current
+	 * ftrace_caller() is almost empty (only the stack operations), and
+	 * most importantly, the calling to mcount will be disabled later in
+	 * ftrace_init(), then there is no 'big' overhead. And in the future,
+	 * we are hoping the function_trace_stop is initialized as 1 then we
+	 * can eventually remove that 'useless' "b ftrace_stub" and the
+	 * following nop. Currently, although we can call ftrace_stop() to set
+	 * function_trace_stop as 1, but it will change the behavior of the
+	 * Function Tracer.
+	 */
+	ftrace_modify_code(MCOUNT_ADDR, INSN_NOP);
+
 	/* The return code is retured via data */
 	*(unsigned long *)data = 0;
 
 	return 0;
 }
-#endif				/* CONFIG_DYNAMIC_FTRACE */
+#endif	/* CONFIG_DYNAMIC_FTRACE */
 
 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
 
 #ifdef CONFIG_DYNAMIC_FTRACE
-
 extern void ftrace_graph_call(void);
-#define JMP	0x08000000	/* jump to target directly */
-#define CALL_FTRACE_GRAPH_CALLER \
-	jump_insn_encode(JMP, (unsigned long)(&ftrace_graph_caller))
 #define FTRACE_GRAPH_CALL_IP	((unsigned long)(&ftrace_graph_call))
 
 int ftrace_enable_ftrace_graph_caller(void)
 {
 	return ftrace_modify_code(FTRACE_GRAPH_CALL_IP,
-				  CALL_FTRACE_GRAPH_CALLER);
+			insn_j_ftrace_graph_caller);
 }
 
 int ftrace_disable_ftrace_graph_caller(void)
 {
-	return ftrace_modify_code(FTRACE_GRAPH_CALL_IP, ftrace_nop);
+	return ftrace_modify_code(FTRACE_GRAPH_CALL_IP, INSN_NOP);
 }
-
-#endif				/* !CONFIG_DYNAMIC_FTRACE */
+#endif	/* !CONFIG_DYNAMIC_FTRACE */
 
 #ifndef KBUILD_MCOUNT_RA_ADDRESS
-#define S_RA_SP	(0xafbf << 16)	/* s{d,w} ra, offset(sp) */
-#define S_R_SP	(0xafb0 << 16)  /* s{d,w} R, offset(sp) */
-#define OFFSET_MASK	0xffff	/* stack offset range: 0 ~ PT_SIZE */
+#define INSN_S_RA_SP	0xafbf0000	/* s{d,w} ra, offset(sp) */
+#define STACK_OFFSET_MASK	0xffff	/* stack offset range: 0 ~ PT_SIZE */
 
 unsigned long ftrace_get_parent_addr(unsigned long self_addr,
 				     unsigned long parent,
@@ -162,35 +210,35 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr,
 	unsigned int code;
 	int faulted;
 
-	/* in module or kernel? */
-	if (self_addr & 0x40000000) {
-		/* module: move to the instruction "lui v1, HI_16BIT_OF_MCOUNT" */
-		ip = self_addr - 20;
-	} else {
-		/* kernel: move to the instruction "move ra, at" */
-		ip = self_addr - 12;
-	}
+	/*
+	 * For module, move the ip from calling site of mcount to the
+	 * instruction "lui v1, hi_16bit_of_mcount"(offset is 20), but for
+	 * kernel, move to the instruction "move ra, at"(offset is 12)
+	 */
+	ip = self_addr - (in_module(self_addr) ? 20 : 12);
 
-	/* search the text until finding the non-store instruction or "s{d,w}
-	 * ra, offset(sp)" instruction */
+	/*
+	 * search the text until finding the non-store instruction or "s{d,w}
+	 * ra, offset(sp)" instruction
+	 */
 	do {
 		ip -= 4;
 
 		/* get the code at "ip": code = *(unsigned int *)ip; */
 		safe_load_code(code, ip, faulted);
-
 		if (unlikely(faulted))
 			return 0;
 
-		/* If we hit the non-store instruction before finding where the
+		/*
+		 * If we hit the non-store instruction before finding where the
 		 * ra is stored, then this is a leaf function and it does not
-		 * store the ra on the stack. */
-		if ((code & S_R_SP) != S_R_SP)
+		 * store the ra on the stack.
+		 */
+		if ((code & INSN_S_R_SP) != INSN_S_R_SP)
 			return parent_addr;
+	} while (((code & INSN_S_RA_SP) != INSN_S_RA_SP));
 
-	} while (((code & S_RA_SP) != S_RA_SP));
-
-	sp = fp + (code & OFFSET_MASK);
+	sp = fp + (code & STACK_OFFSET_MASK);
 
 	/* ra = *(unsigned long *)sp; */
 	safe_load_stack(ra, sp, faulted);
@@ -201,8 +249,7 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr,
 		return sp;
 	return 0;
 }
-
-#endif
+#endif	/* !KBUILD_MCOUNT_RA_ADDRESS */
 
 /*
  * Hook the return address and push it in the stack of return addrs
@@ -211,16 +258,17 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr,
 void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
 			   unsigned long fp)
 {
+	int faulted;
 	unsigned long old;
 	struct ftrace_graph_ent trace;
 	unsigned long return_hooker = (unsigned long)
 	    &return_to_handler;
-	int faulted;
 
 	if (unlikely(atomic_read(&current->tracing_graph_pause)))
 		return;
 
-	/* "parent" is the stack address saved the return address of the caller
+	/*
+	 * "parent" is the stack address saved the return address of the caller
 	 * of _mcount.
 	 *
 	 * if the gcc < 4.5, a leaf function does not save the return address
@@ -241,12 +289,14 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
 	if (unlikely(faulted))
 		goto out;
 #ifndef KBUILD_MCOUNT_RA_ADDRESS
-	parent = (unsigned long *)ftrace_get_parent_addr(self_addr, old,
-							 (unsigned long)parent,
-							 fp);
-	/* If fails when getting the stack address of the non-leaf function's
-	 * ra, stop function graph tracer and return */
-	if (parent == 0)
+	parent = (unsigned long *)ftrace_get_parent_addr(
+			self_addr, old, (unsigned long)parent, fp);
+
+	/*
+	 * If fails on getting the stack address of the non-leaf function's ra,
+	 * stop function graph tracer and return
+	 */
+	if (unlikely(parent == 0))
 		goto out;
 #endif
 	/* *parent = return_hooker; */
@@ -272,4 +322,4 @@ out:
 	ftrace_graph_stop();
 	WARN_ON(1);
 }
-#endif				/* CONFIG_FUNCTION_GRAPH_TRACER */
+#endif	/* CONFIG_FUNCTION_GRAPH_TRACER */
-- 
1.7.0.1


From ralf@linux-mips.org Tue Mar 16 15:03:31 2010
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Date:   Tue, 16 Mar 2010 15:03:28 +0100
From:   Ralf Baechle <ralf@linux-mips.org>
To:     Florian Fainelli <florian@openwrt.org>
Cc:     linux-mips@linux-mips.org, peter fuerst <post@pfrst.de>
Subject: Re: [PATCH v2] MIPS: make CAC_ADDR and UNCAC_ADDR account for
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On Wed, Mar 10, 2010 at 09:51:09AM +0100, Florian Fainelli wrote:

> On AR7, we already redefine PHYS_OFFSET to match the system specifities, it is
> however not sufficient when unsing dma_{map,unmap}_single, specifically in the
> Ethernet driver, we must also adjust CAC_ADDR and UNCAC_ADDR for DMA to work
> correctly. This patch fixes the following issue, seen in cpmac_open:

Thanks, applied.

  Ralf

From ralf@linux-mips.org Tue Mar 16 18:34:06 2010
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Date:   Tue, 16 Mar 2010 18:33:59 +0100
From:   Ralf Baechle <ralf@linux-mips.org>
To:     Andreas Ferber <af@chaos-agency.de>
Cc:     Markus Wigge <markus@cultcom.de>, Michael Buesch <mb@bu3sch.de>,
        linux-mips@linux-mips.org
Subject: Re: [PATCH] mips: Fix SSB PCIcore IO resource management
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On Tue, Mar 16, 2010 at 12:35:51PM +0100, Andreas Ferber wrote:

> The SSB PCIcore code reused the IO resource fixup code from the original
> 2.4.x Broadcom patch for BCM47xx based devices, which was a quick hack
> for doing PCI IO resource configuration back then (the boot loader
> doesn't configure PCI devices on this platform).
> 
> However, this code is no longer necessary since the kernel now can do
> PCI resource management fine all by itself, so remove the old code.
> 
> When removing the code, it becomes obvious that the mem_offset setting
> in the PCIcore driver was wrong, however this was masked by the fixup
> code before, except in a few cases involving yenta_socket. For
> BCM47xx, the correct offset is 0, and since this is the only device
> using PCIcore in host mode, the offset can simply be removed
> unconditionally.

Thanks, applied.

  Ralf

From ralf@linux-mips.org Tue Mar 16 19:09:55 2010
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From:   Ralf Baechle <ralf@linux-mips.org>
To:     Yang Shi <yang.shi@windriver.com>
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Subject: Re: [PATCH V2] MIPS: Octeon: Register EEPROM device on the I2C bus
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On Mon, Mar 08, 2010 at 01:29:50PM +0800, Yang Shi wrote:

> An SPD resides on 0x50 of the I2C bus on CN56xx/57xx board,
> register this device.

I wonder what the use case for this patch is?  Normally Linux doesn't care
about SPD.

I also wonder how this will work for configurations with multiple memory
modules thus multiple SPD EEPROMS.

  Ralf

From khali@linux-fr.org Tue Mar 16 20:06:49 2010
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Date:   Tue, 16 Mar 2010 20:06:47 +0100
From:   Jean Delvare <khali@linux-fr.org>
To:     Ralf Baechle <ralf@linux-mips.org>
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Hi Ralf,

On Tue, 16 Mar 2010 19:09:46 +0100, Ralf Baechle wrote:
> On Mon, Mar 08, 2010 at 01:29:50PM +0800, Yang Shi wrote:
> 
> > An SPD resides on 0x50 of the I2C bus on CN56xx/57xx board,
> > register this device.
> 
> I wonder what the use case for this patch is?  Normally Linux doesn't care
> about SPD.

The Linux kernel doesn't care, but user-space may. As a matter of fact,
there is a script out there (decode-dimms, in the i2c-tools package)
decoding the SPD data and presenting it to the user. Some people want
to know the details about their memory modules.

> I also wonder how this will work for configurations with multiple memory
> modules thus multiple SPD EEPROMS.

The kernel code should instantiate one spd device per memory module
(assuming they are all reachable.) Obviously this can't be done in a
static way.

-- 
Jean Delvare

From ralf@linux-mips.org Tue Mar 16 20:55:32 2010
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On Thu, Feb 18, 2010 at 04:13:03PM -0800, David Daney wrote:

Thanks, applied.

  Ralf

From ralf@linux-mips.org Tue Mar 16 20:55:54 2010
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From:   Ralf Baechle <ralf@linux-mips.org>
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Subject: Re: [PATCH 2/3] MIPS: Preliminary vdso.
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On Thu, Feb 18, 2010 at 04:13:04PM -0800, David Daney wrote:

> This is a preliminary patch to add a vdso to all user processes.
> Still missing are ELF headers and .eh_frame information.  But it is
> enough to allow us to move signal trampolines off of the stack.  Note
> that emulation of branch delay slots in the FPU emulator still
> requires the stack.
> 
> We allocate a single page (the vdso) and write all possible signal
> trampolines into it.  The stack is moved down by one page and the vdso
> is mapped into this space.

Thanks, applied.

  Ralf

From ralf@linux-mips.org Tue Mar 16 20:56:22 2010
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On Thu, Feb 18, 2010 at 04:13:05PM -0800, David Daney wrote:

> This is a follow on to the vdso patch.
> 
> Since all processes now have signal trampolines permanently mapped, we
> can use those instead of putting the trampoline on the stack and
> invalidating the corresponding icache across all CPUs.  We also get
> rid of a bunch of ICACHE_REFILLS_WORKAROUND_WAR code.

Thanks, applied.

  Ralf

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From:   "Ramgopal Kota" <rkota@broadcom.com>
To:     "linux-mips@linux-mips.org" <linux-mips@linux-mips.org>
Date:   Tue, 16 Mar 2010 22:27:24 -0700
Subject: RE: MIPS raw_local_irq_restore flags
Thread-Topic: MIPS raw_local_irq_restore flags
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Hi ,

Is there any moderation done to the messages posted to this mailing list. I posted couple of messages but none has come , just wondering what is wrong ? 

Thanks & Regards,
Ramgopal Kota
-----Original Message-----
From: linux-mips-bounce@linux-mips.org [mailto:linux-mips-bounce@linux-mips.org] On Behalf Of Mikael Starvik
Sent: Thursday, March 11, 2010 8:30 PM
To: linux-mips@linux-mips.org
Subject: MIPS raw_local_irq_restore flags

For the common case CONFIG_CPU_MIPSR2 && CONFIG_IRQ_CPU raw_local_irq_restore_flags is defined as:

"       beqz    \\flags, 1f                                     \n"
"       di                                                      \n"
"       ei                                                      \n"
"1:                                                             \n"

Doesn't this imply that you can't do recursive local_irq_save() (with different locks ofcourse)? 

Best Regards
/Mikael




From rkota@broadcom.com Wed Mar 17 07:05:03 2010
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From:   "Ramgopal Kota" <rkota@broadcom.com>
To:     "linux-mips@linux-mips.org" <linux-mips@linux-mips.org>
Date:   Tue, 16 Mar 2010 23:04:49 -0700
Subject: HIGHMEM not working.
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 Hi,

I need help in running CPU with HIGH_MEM.
Below is the processor memory map .. It is base on MIPS64K Core.

0x0000_0000  -- 0x07FF_FFFF   -> RAM (Region 1)
0x0800_0000  -- 0x0FFF_FFFF   -> PCI BUS 1
0x2000_0000  -- 0x2FFF_FFFF   -> Flash Region
0x4000_0000  -- 0x47FF_FFFF   -> PCI BUS 2
0x8000_0000  -- 0xCFFF_FFFF   -> RAM (Region 2) the first 128MB is remapped into 0x8000_0000 .. 

The system has 256MB of PHYSICAL RAM .. 

I configured TLB's and added memory regions. The system boots up correctly ..
If I show cat /proc/meminfo it shows 256MB , it could allocate memory ( I verified with a simple program allocating the memory and writing some data)

There is a PCI MAC device on PCI BUS 2. The CPU is not able to perform DMA to/from device.
The MAC driver is allocating DMA buffers using the following code ..
{
    phy = virt_to_bus(high_memory);  << Resulting in 0xa000_0000; 
    virt = ioremap(pbase);    
}
The Linux configuration has no ZONE_DMA configuration ..

Few questions ..
  A) HIGH_MEMORY START Address is configured to 0x2000_0000 , is it correct value.
  B) Are there any data which can be dumped to know more information ?
  C) Do I need to enable MEMORY Discontinuous Config also ?  ( As I did not see a reason to enable this as memory in Region 2 is contiguous)
  D) I read in some articles on internet that if HIGH_MEM is used,PCI bounce buffers needs to be used ? Can some body point me how to set this up ?

Thanks & Regards,
Ramgopal Kota


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Subject: Re: HIGHMEM not working.
From:   Adam Jiang <jiang.adam@gmail.com>
To:     "linux-mips@linux-mips.org" <linux-mips@linux-mips.org>
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2010/3/17 Ramgopal Kota <rkota@broadcom.com>
>
> Adam,
>
> Thanks for the response ...
>
> We enabled CONFIG_SPARSEMEM in place of CONFIG_DISCONTIGMEM .. It is specified that SPARSEMEM will eventually replaces DISCONTIGMEM
> (http://marc.info/?l=lhms-devel&m=111451976115580&w=2)

Yes. It seems a better way to do this.

> We have configured zones as below in paging_init function ..
> max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;
> max_zone_pfns[ZONE_NORMAL] = max_low_pfn;   <<  0x20000
> max_zone_pfns[ZONE_HIGHMEM] = highend_pfn;  <<  0x8FFFF
> We added 2 memory regions as below ..
> add_memory_region(0x00000000, 128MB, BOOT_MEM_RAM);
> add_memory_region(0x88000000  ,128MB, BOOT_MEM_RAM);
> Is this what you are refering as 2 memory nodes ??
>

OK. Physical memory is managed in nodes and zones. Because you have
mentioned that there would be 2 ranges of memory on your architecture
like

Node 0   [0x0000 0000, 0x0800 0000]
Node 1   [0x8000 0000, 0xcfff ffff]

I guess you can define these two nodes by add_memory_region function
but I am not sure... However, the start_addr of the second node would
be 0x8000 0000 rather than 0x8800 0000. On the other hand, I think the
following code is not correct

> max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;
> max_zone_pfns[ZONE_NORMAL] = max_low_pfn;   <<  0x20000
> max_zone_pfns[ZONE_HIGHMEM] = highend_pfn;  <<  0x8FFFF

if max_low_pfn is 0x20000, then your ZONE_NORMAL will end up at 0x2000
0000(PFN x PAGE_SIZE); but according to the information about physical
memory address you provided. 0x0800 0000 ~ 0x0fff ffff is used as PCI
device addresses. Em~, the highend_pfn is not correct either. Please
double check these address.

Bounce buffers are required for devices that cannnot access the full
range of memory available to the CPU, such as old ISA cards with only
24bit address. Is this the situation you have to face? If it is needed
you may look into function create_bounce_buffer() in the other drivers
for details, however, I still think you would not need it. By the way,
high memory just mapped to low memory by kmap() function. You don't
need to define a ZONE_HIGH in your configuration. Because 0x8000_0000
~ 0x8fff ffff is kseg0 on MIPS. You can handle them as ZONE_NORMAL in
much easier way.

Best regards,
/Adam

>
> What is the significance of MAX_PHYSMEM_BITS  & SECTION_SIZE_BITS .. Sorry for troubling with novoice questions ..
>
> Thanks & Regards,
> Ramgopal Kota
> ________________________________
> From: Adam Jiang [mailto:jiang.adam@gmail.com]
> Sent: Wednesday, March 17, 2010 12:36 PM
> To: Ramgopal Kota
> Subject: Re: HIGHMEM not working.
>
> 2010/3/17 Ramgopal Kota <rkota@broadcom.com>
>>
>>  Hi,
>>
>> I need help in running CPU with HIGH_MEM.
>> Below is the processor memory map .. It is base on MIPS64K Core.
>>
>> 0x0000_0000  -- 0x07FF_FFFF   -> RAM (Region 1)
>> 0x0800_0000  -- 0x0FFF_FFFF   -> PCI BUS 1
>> 0x2000_0000  -- 0x2FFF_FFFF   -> Flash Region
>> 0x4000_0000  -- 0x47FF_FFFF   -> PCI BUS 2
>> 0x8000_0000  -- 0xCFFF_FFFF   -> RAM (Region 2) the first 128MB is remapped into 0x8000_0000 ..
>>
>> The system has 256MB of PHYSICAL RAM ..
>>
>> I configured TLB's and added memory regions. The system boots up correctly ..
>> If I show cat /proc/meminfo it shows 256MB , it could allocate memory ( I verified with a simple program allocating the memory and writing some data)
>>
>> There is a PCI MAC device on PCI BUS 2. The CPU is not able to perform DMA to/from device.
>> The MAC driver is allocating DMA buffers using the following code ..
>> {
>>    phy = virt_to_bus(high_memory);  << Resulting in 0xa000_0000;
>>    virt = ioremap(pbase);
>> }
>> The Linux configuration has no ZONE_DMA configuration ..
>>
>>
>> Few questions ..
>>  A) HIGH_MEMORY START Address is configured to 0x2000_0000 , is it correct value.
>
> I don't think 0x2000_0000 is a correct value for HIGH_MEM in general meaning. The value depends on which architecture you're working on. And its start address could be initialed in
> LNX/arch/(arch)/kernel/setup.c
> LNX/arch/(arch)/mm/init.c
> in your case, I thing you can use all your memory as ZONE_NORMAL or ZONE_DMA but not ZONE_HIGH.
>
>>
>>  B) Are there any data which can be dumped to know more information ?
>
> Yes, of course. You could try to add some printk in the above two files in bootmem_init() function or function free_area_init_core() to see what's the memory layout exactly.
>
>>
>>  C) Do I need to enable MEMORY Discontinuous Config also ?  ( As I did not see a reason to enable this as memory in Region 2 is contiguous)
>
> Since you have two separated range fsyc memory on you board, I think you do really need CONFIG_DISCONTIGMEM_*; You may also need to define two memory nodes in bootmem.
>
>>
>>  D) I read in some articles on internet that if HIGH_MEM is used,PCI bounce buffers needs to be used ? Can some body point me how to set this up ?
>
> Usually, DMA data transferring could perform directly on fysc memory address. You may not need bounce buffer or scatter/gather operations if you can config all your memory to ZONE_NORMAL. ZONE_DMA is not necessary because this area is only required by kmalloc call with GFP_DMA flags.
> Best regards,
> /Adam
>
>>
>> Thanks & Regards,
>> Ramgopal Kota
>>
>>
>
> --
> Adam Jiang
> -----------------------------------
> e-mail:jiang.adam@gmail.com
> http://www.adamjiang.com
> -----------------------------------



--
Adam Jiang
-----------------------------------
e-mail:jiang.adam@gmail.com
http://www.adamjiang.com
-----------------------------------

From rkota@broadcom.com Wed Mar 17 13:07:13 2010
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From:   "Ramgopal Kota" <rkota@broadcom.com>
To:     "Adam Jiang" <jiang.adam@gmail.com>,
        "linux-mips@linux-mips.org" <linux-mips@linux-mips.org>
Date:   Wed, 17 Mar 2010 05:06:47 -0700
Subject: RE: HIGHMEM not working.
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Adam, 

The first 128MB of 0x8000_0000 is mapped to 0x0000_0000 address, hence I added them as 2 nodes with 0 & 0x8800_0000 ..
max_zone_pfns[ZONE_NORMAL] should be assigned with maximum physical address of the memory i.e. address >> page_size ...
As the physical address is 0x07FF_FFFF .. The ZONE_NORMAL PFN should be 0x07FFF ..

As ZONE_HIGH max address is 0x8FFF_FFFF .. The ZONE_HIGH PFN should be 0x8FFFF .. Why do you think this is wrong ?

I did not get how I can handle with out ZONE_HIGH ?? Can you explain me in more detail please ..

Thanks & Regards,
Ramgopal Kota

-----Original Message-----
From: Adam Jiang [mailto:jiang.adam@gmail.com] 
Sent: Wednesday, March 17, 2010 5:00 PM
To: linux-mips@linux-mips.org
Cc: Ramgopal Kota
Subject: Re: HIGHMEM not working.

2010/3/17 Ramgopal Kota <rkota@broadcom.com>
>
> Adam,
>
> Thanks for the response ...
>
> We enabled CONFIG_SPARSEMEM in place of CONFIG_DISCONTIGMEM .. It is specified that SPARSEMEM will eventually replaces DISCONTIGMEM
> (http://marc.info/?l=lhms-devel&m=111451976115580&w=2)

Yes. It seems a better way to do this.

> We have configured zones as below in paging_init function ..
> max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;
> max_zone_pfns[ZONE_NORMAL] = max_low_pfn;   <<  0x20000
> max_zone_pfns[ZONE_HIGHMEM] = highend_pfn;  <<  0x8FFFF
> We added 2 memory regions as below ..
> add_memory_region(0x00000000, 128MB, BOOT_MEM_RAM);
> add_memory_region(0x88000000  ,128MB, BOOT_MEM_RAM);
> Is this what you are refering as 2 memory nodes ??
>

OK. Physical memory is managed in nodes and zones. Because you have
mentioned that there would be 2 ranges of memory on your architecture
like

Node 0   [0x0000 0000, 0x0800 0000]
Node 1   [0x8000 0000, 0xcfff ffff]

I guess you can define these two nodes by add_memory_region function
but I am not sure... However, the start_addr of the second node would
be 0x8000 0000 rather than 0x8800 0000. On the other hand, I think the
following code is not correct

> max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;
> max_zone_pfns[ZONE_NORMAL] = max_low_pfn;   <<  0x20000
> max_zone_pfns[ZONE_HIGHMEM] = highend_pfn;  <<  0x8FFFF

if max_low_pfn is 0x20000, then your ZONE_NORMAL will end up at 0x2000
0000(PFN x PAGE_SIZE); but according to the information about physical
memory address you provided. 0x0800 0000 ~ 0x0fff ffff is used as PCI
device addresses. Em~, the highend_pfn is not correct either. Please
double check these address.

Bounce buffers are required for devices that cannnot access the full
range of memory available to the CPU, such as old ISA cards with only
24bit address. Is this the situation you have to face? If it is needed
you may look into function create_bounce_buffer() in the other drivers
for details, however, I still think you would not need it. By the way,
high memory just mapped to low memory by kmap() function. You don't
need to define a ZONE_HIGH in your configuration. Because 0x8000_0000
~ 0x8fff ffff is kseg0 on MIPS. You can handle them as ZONE_NORMAL in
much easier way.

Best regards,
/Adam

>
> What is the significance of MAX_PHYSMEM_BITS  & SECTION_SIZE_BITS .. Sorry for troubling with novoice questions ..
>
> Thanks & Regards,
> Ramgopal Kota
> ________________________________
> From: Adam Jiang [mailto:jiang.adam@gmail.com]
> Sent: Wednesday, March 17, 2010 12:36 PM
> To: Ramgopal Kota
> Subject: Re: HIGHMEM not working.
>
> 2010/3/17 Ramgopal Kota <rkota@broadcom.com>
>>
>>  Hi,
>>
>> I need help in running CPU with HIGH_MEM.
>> Below is the processor memory map .. It is base on MIPS64K Core.
>>
>> 0x0000_0000  -- 0x07FF_FFFF   -> RAM (Region 1)
>> 0x0800_0000  -- 0x0FFF_FFFF   -> PCI BUS 1
>> 0x2000_0000  -- 0x2FFF_FFFF   -> Flash Region
>> 0x4000_0000  -- 0x47FF_FFFF   -> PCI BUS 2
>> 0x8000_0000  -- 0xCFFF_FFFF   -> RAM (Region 2) the first 128MB is remapped into 0x8000_0000 ..
>>
>> The system has 256MB of PHYSICAL RAM ..
>>
>> I configured TLB's and added memory regions. The system boots up correctly ..
>> If I show cat /proc/meminfo it shows 256MB , it could allocate memory ( I verified with a simple program allocating the memory and writing some data)
>>
>> There is a PCI MAC device on PCI BUS 2. The CPU is not able to perform DMA to/from device.
>> The MAC driver is allocating DMA buffers using the following code ..
>> {
>>    phy = virt_to_bus(high_memory);  << Resulting in 0xa000_0000;
>>    virt = ioremap(pbase);
>> }
>> The Linux configuration has no ZONE_DMA configuration ..
>>
>>
>> Few questions ..
>>  A) HIGH_MEMORY START Address is configured to 0x2000_0000 , is it correct value.
>
> I don't think 0x2000_0000 is a correct value for HIGH_MEM in general meaning. The value depends on which architecture you're working on. And its start address could be initialed in
> LNX/arch/(arch)/kernel/setup.c
> LNX/arch/(arch)/mm/init.c
> in your case, I thing you can use all your memory as ZONE_NORMAL or ZONE_DMA but not ZONE_HIGH.
>
>>
>>  B) Are there any data which can be dumped to know more information ?
>
> Yes, of course. You could try to add some printk in the above two files in bootmem_init() function or function free_area_init_core() to see what's the memory layout exactly.
>
>>
>>  C) Do I need to enable MEMORY Discontinuous Config also ?  ( As I did not see a reason to enable this as memory in Region 2 is contiguous)
>
> Since you have two separated range fsyc memory on you board, I think you do really need CONFIG_DISCONTIGMEM_*; You may also need to define two memory nodes in bootmem.
>
>>
>>  D) I read in some articles on internet that if HIGH_MEM is used,PCI bounce buffers needs to be used ? Can some body point me how to set this up ?
>
> Usually, DMA data transferring could perform directly on fysc memory address. You may not need bounce buffer or scatter/gather operations if you can config all your memory to ZONE_NORMAL. ZONE_DMA is not necessary because this area is only required by kmalloc call with GFP_DMA flags.
> Best regards,
> /Adam
>
>>
>> Thanks & Regards,
>> Ramgopal Kota
>>
>>
>
> --
> Adam Jiang
> -----------------------------------
> e-mail:jiang.adam@gmail.com
> http://www.adamjiang.com
> -----------------------------------



--
Adam Jiang
-----------------------------------
e-mail:jiang.adam@gmail.com
http://www.adamjiang.com
-----------------------------------



From ralf@linux-mips.org Wed Mar 17 14:03:26 2010
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On Tue, Mar 16, 2010 at 10:27:24PM -0700, Ramgopal Kota wrote:

> Is there any moderation done to the messages posted to this mailing list. I posted couple of messages but none has come , just wondering what is wrong ? 

There is no general moderation for any of the lists on linux-mips but your
postings were false positives of the spamfilter and as such ended up in the
moderator queue (which I religiously ignore due to volume and it being
beyond 99% spam) anyway.  This was not the first time this happened so I've
disabled the tests.

And as a general rant, if you want to post some new topic to the list then
don't reply to another posting.  That totally screws mail threading so
start a new mail thread please.

  Ralf

From ralf@linux-mips.org Wed Mar 17 14:52:31 2010
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On Sat, Mar 13, 2010 at 12:34:16PM +0800, Wu Zhangjin wrote:

> diff --git a/arch/mips/Makefile b/arch/mips/Makefile
> index 2f2eac2..5ae342e 100644
> --- a/arch/mips/Makefile
> +++ b/arch/mips/Makefile
> @@ -135,7 +135,9 @@ cflags-$(CONFIG_CPU_LOONGSON2)	+= -Wa,--trap
>  cflags-$(CONFIG_CPU_LOONGSON2E) += \
>  	$(call cc-option,-march=loongson2e,-march=r4600)
>  cflags-$(CONFIG_CPU_LOONGSON2F) += \
> -	$(call cc-option,-march=loongson2f,-march=r4600)
> +	$(call cc-option,-march=loongson2f,-march=r4600) \
> +	$(call as-option,-Wa$(comma)-mfix-loongson2f-nop,) \
> +	$(call as-option,-Wa$(comma)-mfix-loongson2f-jump,)

Shouldn't these options be used unconditionally?  It seems a kernel build
should rather fail than a possibly unreliable kernel be built - possibly
even without the user noticing the problem.

  Ralf

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On Sat, Mar 13, 2010 at 12:34:17PM +0800, Wu Zhangjin wrote:

> -	/* reboot via jumping to boot base address */
> +	/* reboot via jumping to boot base address
> +	 *
> +	 * ".set noat" and ".set at" are used to ensure the address not break
> +	 * by the -mfix-loongson2f-jump option provided by binutils 2.20.1 (or
> +	 * higher version) which try to change the jumping address to "addr &
> +	 * 0xcfffffff" via the at($1) register, this is totally wrong for
> +	 * 0xbfc00000 (LOONGSON_BOOT_BASE).
> +	 */
> +	__asm__ __volatile__(".set noat\n");
>  	((void (*)(void))ioremap_nocache(LOONGSON_BOOT_BASE, 4)) ();
> +	__asm__ __volatile__(".set at\n");

Ouch.  This is fragile and totally puts the kernels fate at the mercy of
gcc and the ioremap_nocache() implementation.  GCC might emit a .set noat
at any time.  Something like

void loongson_restart(char *command)
{
	void (*func)(void);

	/* do preparation for reboot */
	mach_prepare_reboot();

	/* reboot via jumping to boot base address */
	func = (void *) ioremap_nocache(LOONGSON_BOOT_BASE, 4);

	__asm__ __volatile__(
	"	.set	noat						\n"
	"	jr	%[func]						\n"
	"	.set	at						\n"
	: /* No outputs */
	: [func] "r" (func));
}

should be safe against -mfix-loongson2f-jump I think.

The workaround in http://sourceware.org/ml/binutils/2009-11/msg00387.html
will also cause problems calling functions with bits 28..29 set, that is
in the ranges 0x81000000..0xbffffff and 0xd0000000..0xffffffff.  The
first range is not much of a problem as only the kernel proper resides
there and the kernel load address is manually selected in the Makefile.
The 2nd range might be used for under certain circumstances.

  Ralf

From ralf@linux-mips.org Wed Mar 17 16:11:26 2010
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On Sat, Mar 13, 2010 at 12:34:15PM +0800, Wu Zhangjin wrote:

> From: Wu Zhangjin <wuzhangjin@gmail.com>
> 
> As the Chapter 15: "Errata: Issue of Out-of-order in loongson"[1] shows, to
> workaround the Issue of Loongson-2Fï¼ŒWe need to do:
> 
> "When switching from user mode to kernel mode, you should flush the
> branch target history such as BTB and RAS."
> 
> This patch did clear BTB(branch target buffer), forbid RAS(return
> address stack) via Loongson-2F's 64bit diagnostic register.
> 
> [1] Chinese Version: http://www.loongson.cn/uploadfile/file/200808211
> [2] English Version of Chapter 15:
> http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source

Thanks, applied.

  Ralf

From ralf@linux-mips.org Wed Mar 17 16:39:24 2010
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On Sat, Feb 27, 2010 at 05:51:23PM +0100, Andrea Gelmini wrote:
> From: Andrea Gelmini <andrea.gelmini@gelma.net>
> Date:   Sat, 27 Feb 2010 17:51:23 +0100
> To: linux-kernel@vger.kernel.org
> Cc: Andrea Gelmini <andrea.gelmini@gelma.net>,
> 	Ralf Baechle <ralf@linux-mips.org>,
> 	Paul Mundt <lethal@linux-sh.org>, linux-mips@linux-mips.org,
> 	linux-sh@vger.kernel.org
> Subject: [PATCH 42/66] arch/mips/lib/libgcc.h: Checkpatch cleanup
> 
> arch/mips/lib/libgcc.h:21: ERROR: open brace '{' following union go on the same line
> 
> Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net>
> ---
>  arch/mips/lib/libgcc.h |    3 +--
>  arch/sh/lib/libgcc.h   |    3 +--
>  2 files changed, 2 insertions(+), 4 deletions(-)

I've applied the MIPS portion of the patch, thanks.

  Ralf

From ralf@linux-mips.org Wed Mar 17 16:51:46 2010
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On Tue, Mar 02, 2010 at 04:13:11PM +0100, Andrea Gelmini wrote:

> 2010/3/1 Paul Mundt <lethal@linux-sh.org>:
> Hi Paul,
>    thanks for your reply.
> 
> > I'll apply the sh part by itself, and I suppose Ralf will do the same for
> > MIPS. I'm a bit confused as to why these were lumped together when 65 out
> > of 66 oneliner patches made no use of ad-hoc grouping.
> 
> After the experience with GregKH, I was looking for others maintainer
> interested in code cleanup. So I sent some patches over random files.
> If you care, I can checkpatch.pl all mips subtree and send you patches (if any).

Feel free to - but remember that the coding style document is a guideline
not something to be followed unconditionally.

  Ralf

From ralf@linux-mips.org Wed Mar 17 17:17:48 2010
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Date:   Wed, 17 Mar 2010 17:17:44 +0100
From:   Ralf Baechle <ralf@linux-mips.org>
To:     Florian Fainelli <florian@openwrt.org>
Cc:     linux-mips@linux-mips.org
Subject: Re: [PATCH 4/4] bcm63xx: fix BCM6338 and BCM6345 gpio count
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On Mon, Mar 01, 2010 at 11:36:32PM +0100, Florian Fainelli wrote:

> The number of GPIOs on BCM6338 is 8, while BCM6345 has only 16 GPIOs
> available.

Thanks, applied.

  Ralf

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Date:   Thu, 18 Mar 2010 01:57:51 +0900
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Subject: Re: HIGHMEM not working.
From:   Adam Jiang <jiang.adam@gmail.com>
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Cc:     Ramgopal Kota <rkota@broadcom.com>
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Hi, Ramgopal

2010/3/17 Ramgopal Kota <rkota@broadcom.com>:
> The first 128MB of 0x8000_0000 is mapped to 0x0000_0000 address, hence I added them as 2 nodes with 0 & 0x8800_0000 ..
> max_zone_pfns[ZONE_NORMAL] should be assigned with maximum physical address of the memory i.e. address >> page_size ...
> As the physical address is 0x07FF_FFFF .. The ZONE_NORMAL PFN should be 0x07FFF ..
> As ZONE_HIGH max address is 0x8FFF_FFFF .. The ZONE_HIGH PFN should be 0x8FFFF .. Why do you think this is wrong ?

I get confusing with your memory mapping... What do you mean ZONE_HIGH
max address is 0x8fff ffff? Could you please clarify your memory
layout within physical address instead of mixed mapped virtual
address? And, what's the virtual addresses you planed to map them?

> I did not get how I can handle with out ZONE_HIGH ?? Can you explain me in more detail please ..

You are using a MIPS64 core, aren't you? If Linux kernel could only
access the virtual memory address lower than PAGE_OFFSET, you don't
need to define a ZONE_HIGH because you have only 128M + 128M memory <
(PAGE_OFFSET) on your target. You don't need map those memory because
you can access all your memory directly, I think.

If you have a 32-bit PCI controller on you board, you may need bounce
buffers because you CPU just has 64-bit address. I missed the most
important information you have provided. You can find out some sample
code on ARM at the following URL:

http://lxr.linux.no/linux+v2.6.33/arch/arm/common/dmabounce.c#L5

there're common routines you can try to port it to MIPS if you need them.

Regards,
/Adam

>
> Thanks & Regards,
> Ramgopal Kota
>
> -----Original Message-----
> From: Adam Jiang [mailto:jiang.adam@gmail.com]
> Sent: Wednesday, March 17, 2010 5:00 PM
> To: linux-mips@linux-mips.org
> Cc: Ramgopal Kota
> Subject: Re: HIGHMEM not working.
>
> 2010/3/17 Ramgopal Kota <rkota@broadcom.com>
>>
>> Adam,
>>
>> Thanks for the response ...
>>
>> We enabled CONFIG_SPARSEMEM in place of CONFIG_DISCONTIGMEM .. It is specified that SPARSEMEM will eventually replaces DISCONTIGMEM
>> (http://marc.info/?l=lhms-devel&m=111451976115580&w=2)
>
> Yes. It seems a better way to do this.
>
>> We have configured zones as below in paging_init function ..
>> max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;
>> max_zone_pfns[ZONE_NORMAL] = max_low_pfn;   <<  0x20000
>> max_zone_pfns[ZONE_HIGHMEM] = highend_pfn;  <<  0x8FFFF
>> We added 2 memory regions as below ..
>> add_memory_region(0x00000000, 128MB, BOOT_MEM_RAM);
>> add_memory_region(0x88000000  ,128MB, BOOT_MEM_RAM);
>> Is this what you are refering as 2 memory nodes ??
>>
>
> OK. Physical memory is managed in nodes and zones. Because you have
> mentioned that there would be 2 ranges of memory on your architecture
> like
>
> Node 0   [0x0000 0000, 0x0800 0000]
> Node 1   [0x8000 0000, 0xcfff ffff]
>
> I guess you can define these two nodes by add_memory_region function
> but I am not sure... However, the start_addr of the second node would
> be 0x8000 0000 rather than 0x8800 0000. On the other hand, I think the
> following code is not correct
>
>> max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;
>> max_zone_pfns[ZONE_NORMAL] = max_low_pfn;   <<  0x20000
>> max_zone_pfns[ZONE_HIGHMEM] = highend_pfn;  <<  0x8FFFF
>
> if max_low_pfn is 0x20000, then your ZONE_NORMAL will end up at 0x2000
> 0000(PFN x PAGE_SIZE); but according to the information about physical
> memory address you provided. 0x0800 0000 ~ 0x0fff ffff is used as PCI
> device addresses. Em~, the highend_pfn is not correct either. Please
> double check these address.
>
> Bounce buffers are required for devices that cannnot access the full
> range of memory available to the CPU, such as old ISA cards with only
> 24bit address. Is this the situation you have to face? If it is needed
> you may look into function create_bounce_buffer() in the other drivers
> for details, however, I still think you would not need it. By the way,
> high memory just mapped to low memory by kmap() function. You don't
> need to define a ZONE_HIGH in your configuration. Because 0x8000_0000
> ~ 0x8fff ffff is kseg0 on MIPS. You can handle them as ZONE_NORMAL in
> much easier way.
>
> Best regards,
> /Adam
>
>>
>> What is the significance of MAX_PHYSMEM_BITS  & SECTION_SIZE_BITS .. Sorry for troubling with novoice questions ..
>>
>> Thanks & Regards,
>> Ramgopal Kota
>> ________________________________
>> From: Adam Jiang [mailto:jiang.adam@gmail.com]
>> Sent: Wednesday, March 17, 2010 12:36 PM
>> To: Ramgopal Kota
>> Subject: Re: HIGHMEM not working.
>>
>> 2010/3/17 Ramgopal Kota <rkota@broadcom.com>
>>>
>>>  Hi,
>>>
>>> I need help in running CPU with HIGH_MEM.
>>> Below is the processor memory map .. It is base on MIPS64K Core.
>>>
>>> 0x0000_0000  -- 0x07FF_FFFF   -> RAM (Region 1)
>>> 0x0800_0000  -- 0x0FFF_FFFF   -> PCI BUS 1
>>> 0x2000_0000  -- 0x2FFF_FFFF   -> Flash Region
>>> 0x4000_0000  -- 0x47FF_FFFF   -> PCI BUS 2
>>> 0x8000_0000  -- 0xCFFF_FFFF   -> RAM (Region 2) the first 128MB is remapped into 0x8000_0000 ..
>>>
>>> The system has 256MB of PHYSICAL RAM ..
>>>
>>> I configured TLB's and added memory regions. The system boots up correctly ..
>>> If I show cat /proc/meminfo it shows 256MB , it could allocate memory ( I verified with a simple program allocating the memory and writing some data)
>>>
>>> There is a PCI MAC device on PCI BUS 2. The CPU is not able to perform DMA to/from device.
>>> The MAC driver is allocating DMA buffers using the following code ..
>>> {
>>>    phy = virt_to_bus(high_memory);  << Resulting in 0xa000_0000;
>>>    virt = ioremap(pbase);
>>> }
>>> The Linux configuration has no ZONE_DMA configuration ..
>>>
>>>
>>> Few questions ..
>>>  A) HIGH_MEMORY START Address is configured to 0x2000_0000 , is it correct value.
>>
>> I don't think 0x2000_0000 is a correct value for HIGH_MEM in general meaning. The value depends on which architecture you're working on. And its start address could be initialed in
>> LNX/arch/(arch)/kernel/setup.c
>> LNX/arch/(arch)/mm/init.c
>> in your case, I thing you can use all your memory as ZONE_NORMAL or ZONE_DMA but not ZONE_HIGH.
>>
>>>
>>>  B) Are there any data which can be dumped to know more information ?
>>
>> Yes, of course. You could try to add some printk in the above two files in bootmem_init() function or function free_area_init_core() to see what's the memory layout exactly.
>>
>>>
>>>  C) Do I need to enable MEMORY Discontinuous Config also ?  ( As I did not see a reason to enable this as memory in Region 2 is contiguous)
>>
>> Since you have two separated range fsyc memory on you board, I think you do really need CONFIG_DISCONTIGMEM_*; You may also need to define two memory nodes in bootmem.
>>
>>>
>>>  D) I read in some articles on internet that if HIGH_MEM is used,PCI bounce buffers needs to be used ? Can some body point me how to set this up ?
>>
>> Usually, DMA data transferring could perform directly on fysc memory address. You may not need bounce buffer or scatter/gather operations if you can config all your memory to ZONE_NORMAL. ZONE_DMA is not necessary because this area is only required by kmalloc call with GFP_DMA flags.
>> Best regards,
>> /Adam
>>
>>>
>>> Thanks & Regards,
>>> Ramgopal Kota
>>>
>>>
>>
>> --
>> Adam Jiang
>> -----------------------------------
>> e-mail:jiang.adam@gmail.com
>> http://www.adamjiang.com
>> -----------------------------------
>
>
>
> --
> Adam Jiang
> -----------------------------------
> e-mail:jiang.adam@gmail.com
> http://www.adamjiang.com
> -----------------------------------
>
>
>



-- 
Adam Jiang
-----------------------------------
e-mail:jiang.adam@gmail.com
http://www.adamjiang.com
-----------------------------------

From ralf@linux-mips.org Wed Mar 17 21:33:50 2010
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On Mon, Mar 01, 2010 at 11:36:15PM +0100, Florian Fainelli wrote:

Patch rejects.

From ralf@linux-mips.org Thu Mar 18 16:01:35 2010
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On Mon, Mar 01, 2010 at 11:36:22PM +0100, Florian Fainelli wrote:

Applied, thanks.

  Ralf

From ralf@linux-mips.org Thu Mar 18 16:02:10 2010
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Applied, thanks.

  Ralf

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On Tue, Mar 16, 2010 at 08:06:47PM +0100, Jean Delvare wrote:

> The Linux kernel doesn't care, but user-space may. As a matter of fact,
> there is a script out there (decode-dimms, in the i2c-tools package)
> decoding the SPD data and presenting it to the user. Some people want
> to know the details about their memory modules.
> 
> > I also wonder how this will work for configurations with multiple memory
> > modules thus multiple SPD EEPROMS.
> 
> The kernel code should instantiate one spd device per memory module
> (assuming they are all reachable.) Obviously this can't be done in a
> static way.

SPD is virtually omnipresent these days so I wonder if maybe there already
is some probing functionality already available?

  Ralf

From khali@linux-fr.org Thu Mar 18 18:48:51 2010
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From:   Jean Delvare <khali@linux-fr.org>
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Hi Ralf,

On Thu, 18 Mar 2010 18:00:30 +0100, Ralf Baechle wrote:
> On Tue, Mar 16, 2010 at 08:06:47PM +0100, Jean Delvare wrote:
> 
> > The Linux kernel doesn't care, but user-space may. As a matter of fact,
> > there is a script out there (decode-dimms, in the i2c-tools package)
> > decoding the SPD data and presenting it to the user. Some people want
> > to know the details about their memory modules.
> > 
> > > I also wonder how this will work for configurations with multiple memory
> > > modules thus multiple SPD EEPROMS.
> > 
> > The kernel code should instantiate one spd device per memory module
> > (assuming they are all reachable.) Obviously this can't be done in a
> > static way.
> 
> SPD is virtually omnipresent these days so I wonder if maybe there already
> is some probing functionality already available?

Not that I aware of, except for the fact that the "eeprom" driver will
probe all i2c adapters with class bit I2C_CLASS_SPD set for chips at
addresses 0x50-0x57, and it will instantiate a device for each of them.
This will instantiate devices for non-SPD EEPROM, and even non-EEPROMs
living at these addresses, so this can't really be considered a generic
solution.

A generic solution would let the platform (not the eeprom driver) probe
for devices at selected I2C addresses (the ones where SPD EEPROMs can
live of the specific platform) and instantiate spd devices (possibly
after integrity checking). This would avoid false positives.

-- 
Jean Delvare

From p2@psychaos.be Thu Mar 18 19:17:35 2010
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Subject: Re: linux 2.6.33 on movidis x16
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On 2010-03-15 18:27:41 (-0400), Jan Rovins <janr@adax.com> wrote:
> Peter 'p2' De Schrijver wrote:
>> Hi,
>>
>> We are trying to get linux 2.6.33 to work on the movidis x16 board. Main thing
>> missing is the addresses of the PHYs. Does anyone know those ?
>> Unfortunately I don't have physical access to the board so I can't just look
>> for the PHY components being used.
>>
>> Thanks,
>>
>> Peter.
>>
>>   
> Do you mean the Movidis x19 ?

Maybe. AFAIK ours is called x16, and uses a cavium octeon CN3860 chip.

> We have 2 of these in our lab. They are running the old 2.6.21.7  from  
> the CnUsers 1.8.1  tool chain.
> They are currently being used by other developers for some application  
> testing, but I can grab the serial console boot-up messages and send  
> them to you, if the PHY info is in there.

That would be helpful. Otherwise you could also try running ethtool on all the
interfaces. That should give you the PHY address as well.

Thanks !

Peter.

From David.Daney@caviumnetworks.com Thu Mar 18 19:26:42 2010
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On 03/18/2010 11:17 AM, Peter 'p2' De Schrijver wrote:
> On 2010-03-15 18:27:41 (-0400), Jan Rovins<janr@adax.com>  wrote:
>> Peter 'p2' De Schrijver wrote:
>>> Hi,
>>>
>>> We are trying to get linux 2.6.33 to work on the movidis x16 board. Main thing
>>> missing is the addresses of the PHYs. Does anyone know those ?
>>> Unfortunately I don't have physical access to the board so I can't just look
>>> for the PHY components being used.
>>>
>>> Thanks,
>>>
>>> Peter.
>>>
>>>
>> Do you mean the Movidis x19 ?
>
> Maybe. AFAIK ours is called x16, and uses a cavium octeon CN3860 chip.
>
>> We have 2 of these in our lab. They are running the old 2.6.21.7  from
>> the CnUsers 1.8.1  tool chain.
>> They are currently being used by other developers for some application
>> testing, but I can grab the serial console boot-up messages and send
>> them to you, if the PHY info is in there.
>
> That would be helpful. Otherwise you could also try running ethtool on all the
> interfaces. That should give you the PHY address as well.
>

I just found one of these.  Current theory is that the PHY addresses are 0-7

I don't think the PHY numbers are printed anywhere.

David Daney

From janr@adax.com Thu Mar 18 19:59:23 2010
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David Daney wrote:
> On 03/18/2010 11:17 AM, Peter 'p2' De Schrijver wrote:
>> On 2010-03-15 18:27:41 (-0400), Jan Rovins<janr@adax.com>  wrote:
>>> Peter 'p2' De Schrijver wrote:
>>>> Hi,
>>>>
>>>> We are trying to get linux 2.6.33 to work on the movidis x16 board. 
>>>> Main thing
>>>> missing is the addresses of the PHYs. Does anyone know those ?
>>>> Unfortunately I don't have physical access to the board so I can't 
>>>> just look
>>>> for the PHY components being used.
>>>>
>>>> Thanks,
>>>>
>>>> Peter.
>>>>
>>>>
>>> Do you mean the Movidis x19 ?
>>
>> Maybe. AFAIK ours is called x16, and uses a cavium octeon CN3860 chip.
>>
>>> We have 2 of these in our lab. They are running the old 2.6.21.7  from
>>> the CnUsers 1.8.1  tool chain.
>>> They are currently being used by other developers for some application
>>> testing, but I can grab the serial console boot-up messages and send
>>> them to you, if the PHY info is in there.
>>
>> That would be helpful. Otherwise you could also try running ethtool 
>> on all the
>> interfaces. That should give you the PHY address as well.
>>
>
> I just found one of these.  Current theory is that the PHY addresses 
> are 0-7
>
> I don't think the PHY numbers are printed anywhere.
>
> David Daney
You are right, it is called an x16.  My memory is failing me, I should 
have looked at the machine first.

from dmesg:

cavium-ethernet: Cavium Networks Octeon SDK version 1.8.1, build 294
Interface 0 has 4 ports (RGMII)
Interface 1 has 4 ports (RGMII)
Interface 2 has 4 ports (NPI)
Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2


looks like the PHYAD field has what you are loohing for,
ethtool output: ---------------------------

for i in 0 1 2 3 4 5 6 7; do ethtool eth$i; done
Settings for eth0:
        Supported ports: [ TP MII ]
        Supported link modes:   10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
                                1000baseT/Half 1000baseT/Full
        Supports auto-negotiation: Yes
        Advertised link modes:  10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
                                1000baseT/Half 1000baseT/Full
        Advertised auto-negotiation: Yes
        Speed: 10Mb/s
        Duplex: Half
        Port: MII
        PHYAD: 1
        Transceiver: internal
        Auto-negotiation: on
        Link detected: no
Settings for eth1:
        Supported ports: [ TP MII ]
        Supported link modes:   10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
                                1000baseT/Half 1000baseT/Full
        Supports auto-negotiation: Yes
        Advertised link modes:  10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
                                1000baseT/Half 1000baseT/Full
        Advertised auto-negotiation: Yes
        Speed: 10Mb/s
        Duplex: Half
        Port: MII
        PHYAD: 2
        Transceiver: internal
        Auto-negotiation: on
        Link detected: no
Settings for eth2:
        Supported ports: [ TP MII ]
        Supported link modes:   10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
                                1000baseT/Half 1000baseT/Full
        Supports auto-negotiation: Yes
        Advertised link modes:  10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
                                1000baseT/Half 1000baseT/Full
        Advertised auto-negotiation: Yes
        Speed: 10Mb/s
        Duplex: Half
        Port: MII
        PHYAD: 3
        Transceiver: internal
        Auto-negotiation: on
        Link detected: no
Settings for eth3:
        Supported ports: [ TP MII ]
        Supported link modes:   10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
                                1000baseT/Half 1000baseT/Full
        Supports auto-negotiation: Yes
        Advertised link modes:  10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
                                1000baseT/Half 1000baseT/Full
        Advertised auto-negotiation: Yes
        Speed: 10Mb/s
        Duplex: Half
        Port: MII
        PHYAD: 4
        Transceiver: internal
        Auto-negotiation: on
        Link detected: no
Settings for eth4:
        Supported ports: [ TP MII ]
        Supported link modes:   10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
        Supports auto-negotiation: Yes
        Advertised link modes:  10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
        Advertised auto-negotiation: Yes
        Speed: 100Mb/s
        Duplex: Full
        Port: MII
        PHYAD: 0
        Transceiver: internal
        Auto-negotiation: on
        Link detected: yes
Settings for eth5:
        Supported ports: [ TP MII ]
        Supported link modes:   10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
        Supports auto-negotiation: Yes
        Advertised link modes:  10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
        Advertised auto-negotiation: Yes
        Speed: 100Mb/s
        Duplex: Full
        Port: MII
        PHYAD: 0
        Transceiver: internal
        Auto-negotiation: on
        Link detected: yes
Settings for eth6:
        Supported ports: [ TP MII ]
        Supported link modes:   10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
        Supports auto-negotiation: Yes
        Advertised link modes:  10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
        Advertised auto-negotiation: Yes
        Speed: 100Mb/s
        Duplex: Full
        Port: MII
        PHYAD: 0
        Transceiver: internal
        Auto-negotiation: on
        Link detected: yes
Settings for eth7:
        Supported ports: [ TP MII ]
        Supported link modes:   10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
        Supports auto-negotiation: Yes
        Advertised link modes:  10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
        Advertised auto-negotiation: Yes
        Speed: 100Mb/s
        Duplex: Full
        Port: MII
        PHYAD: 0
        Transceiver: internal
        Auto-negotiation: on
        Link detected: yes

----------------------------------------------------------
You may want to re-map the interfaces so that they show up in a sane 
order, there is a cluster of 8 ethernet ports, 4 per row.  Right now on 
our boxes , eth0 shows up on the bottom row, second  from the right.

Jan



From ralf@linux-mips.org Fri Mar 19 13:00:56 2010
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From:   Ralf Baechle <ralf@linux-mips.org>
To:     Maxime Bizon <mbizon@freebox.fr>
Cc:     linux-mips@linux-mips.org
Subject: Re: [PATCH 3/7] MIPS: bcm63xx: fix double gpio registration.
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On Sat, Jan 30, 2010 at 06:34:54PM +0100, Maxime Bizon wrote:

> bcm63xx_gpio_init is already called from prom_init to allow board to
> use them early, so we can remove the unneeded arch_initcall.

Applied, thanks.

  Ralf

From ralf@linux-mips.org Fri Mar 19 13:19:27 2010
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From:   Ralf Baechle <ralf@linux-mips.org>
To:     Maxime Bizon <mbizon@freebox.fr>
Cc:     linux-mips@linux-mips.org
Subject: Re: [PATCH 4/7] MIPS: bcm63xx: add support for second uart.
Message-ID: <20100319121923.GL4554@linux-mips.org>
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On Sat, Jan 30, 2010 at 06:34:55PM +0100, Maxime Bizon wrote:

> The bcm63xx SOC has two uarts, some boards use the second one for
> bluetooth.  This patch changes platform device registration code to
> handle this. Changes to the uart driver are in a separate patch.

Applied.  Thanks,

  Ralf

From ralf@linux-mips.org Fri Mar 19 13:23:41 2010
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From:   Ralf Baechle <ralf@linux-mips.org>
To:     Maxime Bizon <mbizon@freebox.fr>
Cc:     linux-mips@linux-mips.org
Subject: Re: [PATCH 5/7] MIPS: bcm63xx: fix typo in cpu-feature-overrides
 file.
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On Sat, Jan 30, 2010 at 06:34:56PM +0100, Maxime Bizon wrote:

> Fix typo: CONFIG_BCMCPU_IS_63xx does not exists,
> CONFIG_BCM63XX_CPU_63xx is the valid config option.

Thanks, applied.

  Ralf

From ralf@linux-mips.org Fri Mar 19 13:34:43 2010
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Subject: Re: [PATCH 6/7] MIPS: bcm63xx: call board_register_device from
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On Sat, Jan 30, 2010 at 06:34:57PM +0100, Maxime Bizon wrote:

> Some device registration (eg leds), expect subsystem initcall to be
> run first, so move board device registration to device_initcall().

Applied.  Thanks,

  Ralf

From ralf@linux-mips.org Fri Mar 19 13:44:56 2010
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Subject: Re: [PATCH 6/7] MIPS: bcm63xx: call board_register_device from
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On Fri, Mar 19, 2010 at 01:34:31PM +0100, Ralf Baechle wrote:

> > Some device registration (eg leds), expect subsystem initcall to be
> > run first, so move board device registration to device_initcall().
> 
> Applied.  Thanks,

And pulled again.  Florian posted his NACK together with a new patch
which get sorted separately by patchworks so I didn't see the NACK right
away.

To avoid that sort of things do me a favor, post comments to an old
patch and submissions of new patches in separate emails.  Thanks.

  Ralf

From ralf@linux-mips.org Fri Mar 19 13:47:47 2010
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To:     Florian Fainelli <ffainelli@freebox.fr>
Cc:     Maxime Bizon <mbizon@freebox.fr>, linux-mips@linux-mips.org
Subject: Re: [PATCH 6/7] MIPS: bcm63xx: call board_register_device from
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On Tue, Mar 02, 2010 at 02:38:47PM +0100, Florian Fainelli wrote:

And applied this one.  Thanks,

  Ralf

From ralf@linux-mips.org Fri Mar 19 14:22:45 2010
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Subject: Re: [PATCH 7/7] MIPS: bcm63xx: initialize gpio_out_low & out_high to
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On Sat, Jan 30, 2010 at 06:34:58PM +0100, Maxime Bizon wrote:

> To avoid glitch during gpio initialisation, fetch gpio output
> registers values left by bootloader.

Applied as well.

Thanks,

  Ralf

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Hi,

> You are right, it is called an x16.  My memory is failing me, I should  
> have looked at the machine first.
>

Ok :)

> from dmesg:
>
> cavium-ethernet: Cavium Networks Octeon SDK version 1.8.1, build 294
> Interface 0 has 4 ports (RGMII)
> Interface 1 has 4 ports (RGMII)
> Interface 2 has 4 ports (NPI)
> Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
>
>
> looks like the PHYAD field has what you are loohing for,
> ethtool output: ---------------------------
>
> for i in 0 1 2 3 4 5 6 7; do ethtool eth$i; done
> Settings for eth0:
>        Supported ports: [ TP MII ]
>        Supported link modes:   10baseT/Half 10baseT/Full
>                                100baseT/Half 100baseT/Full
>                                1000baseT/Half 1000baseT/Full
>        Supports auto-negotiation: Yes
>        Advertised link modes:  10baseT/Half 10baseT/Full
>                                100baseT/Half 100baseT/Full
>                                1000baseT/Half 1000baseT/Full
>        Advertised auto-negotiation: Yes
>        Speed: 10Mb/s
>        Duplex: Half
>        Port: MII
>        PHYAD: 1
>        Transceiver: internal
>        Auto-negotiation: on
>        Link detected: no
> Settings for eth1:
>        Supported ports: [ TP MII ]
>        Supported link modes:   10baseT/Half 10baseT/Full
>                                100baseT/Half 100baseT/Full
>                                1000baseT/Half 1000baseT/Full
>        Supports auto-negotiation: Yes
>        Advertised link modes:  10baseT/Half 10baseT/Full
>                                100baseT/Half 100baseT/Full
>                                1000baseT/Half 1000baseT/Full
>        Advertised auto-negotiation: Yes
>        Speed: 10Mb/s
>        Duplex: Half
>        Port: MII
>        PHYAD: 2
>        Transceiver: internal
>        Auto-negotiation: on
>        Link detected: no
> Settings for eth2:
>        Supported ports: [ TP MII ]
>        Supported link modes:   10baseT/Half 10baseT/Full
>                                100baseT/Half 100baseT/Full
>                                1000baseT/Half 1000baseT/Full
>        Supports auto-negotiation: Yes
>        Advertised link modes:  10baseT/Half 10baseT/Full
>                                100baseT/Half 100baseT/Full
>                                1000baseT/Half 1000baseT/Full
>        Advertised auto-negotiation: Yes
>        Speed: 10Mb/s
>        Duplex: Half
>        Port: MII
>        PHYAD: 3
>        Transceiver: internal
>        Auto-negotiation: on
>        Link detected: no
> Settings for eth3:
>        Supported ports: [ TP MII ]
>        Supported link modes:   10baseT/Half 10baseT/Full
>                                100baseT/Half 100baseT/Full
>                                1000baseT/Half 1000baseT/Full
>        Supports auto-negotiation: Yes
>        Advertised link modes:  10baseT/Half 10baseT/Full
>                                100baseT/Half 100baseT/Full
>                                1000baseT/Half 1000baseT/Full
>        Advertised auto-negotiation: Yes
>        Speed: 10Mb/s
>        Duplex: Half
>        Port: MII
>        PHYAD: 4
>        Transceiver: internal
>        Auto-negotiation: on
>        Link detected: no
> Settings for eth4:
>        Supported ports: [ TP MII ]
>        Supported link modes:   10baseT/Half 10baseT/Full
>                                100baseT/Half 100baseT/Full
>        Supports auto-negotiation: Yes
>        Advertised link modes:  10baseT/Half 10baseT/Full
>                                100baseT/Half 100baseT/Full
>        Advertised auto-negotiation: Yes
>        Speed: 100Mb/s
>        Duplex: Full
>        Port: MII
>        PHYAD: 0
>        Transceiver: internal
>        Auto-negotiation: on
>        Link detected: yes
> Settings for eth5:
>        Supported ports: [ TP MII ]
>        Supported link modes:   10baseT/Half 10baseT/Full
>                                100baseT/Half 100baseT/Full
>        Supports auto-negotiation: Yes
>        Advertised link modes:  10baseT/Half 10baseT/Full
>                                100baseT/Half 100baseT/Full
>        Advertised auto-negotiation: Yes
>        Speed: 100Mb/s
>        Duplex: Full
>        Port: MII
>        PHYAD: 0
>        Transceiver: internal
>        Auto-negotiation: on
>        Link detected: yes
> Settings for eth6:
>        Supported ports: [ TP MII ]
>        Supported link modes:   10baseT/Half 10baseT/Full
>                                100baseT/Half 100baseT/Full
>        Supports auto-negotiation: Yes
>        Advertised link modes:  10baseT/Half 10baseT/Full
>                                100baseT/Half 100baseT/Full
>        Advertised auto-negotiation: Yes
>        Speed: 100Mb/s
>        Duplex: Full
>        Port: MII
>        PHYAD: 0
>        Transceiver: internal
>        Auto-negotiation: on
>        Link detected: yes
> Settings for eth7:
>        Supported ports: [ TP MII ]
>        Supported link modes:   10baseT/Half 10baseT/Full
>                                100baseT/Half 100baseT/Full
>        Supports auto-negotiation: Yes
>        Advertised link modes:  10baseT/Half 10baseT/Full
>                                100baseT/Half 100baseT/Full
>        Advertised auto-negotiation: Yes
>        Speed: 100Mb/s
>        Duplex: Full
>        Port: MII
>        PHYAD: 0
>        Transceiver: internal
>        Auto-negotiation: on
>        Link detected: yes
>

PHYAD 0 for ports 4 - 7 seems a bit strange to me. Do you have the sources of the
kernel you're running on those machines ? If so, could you look at 
int cvmx_helper_board_get_mii_address(int ipd_port) in cvmx-helper-board.c ?
It contains a large switch statement. case CVMX_BOARD_TYPE_CUST_WSX16: is what I'm
interested in.


> ----------------------------------------------------------
> You may want to re-map the interfaces so that they show up in a sane  
> order, there is a cluster of 8 ethernet ports, 4 per row.  Right now on  
> our boxes , eth0 shows up on the bottom row, second  from the right.

Thanks,

Peter.

From justinmattock@gmail.com Fri Mar 19 20:52:00 2010
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From:   "Justin P. Mattock" <justinmattock@gmail.com>
To:     trivial@kernel.org
Cc:     linux-arm-kernel@lists.infradead.org, linux-audit@redhat.com,
        uclinux-dist-devel@blackfin.uclinux.org,
        linux-cris-kernel@axis.com, linux-ia64@vger.kernel.org,
        linux-mips@linux-mips.org, linux-parisc@vger.kernel.org,
        linux-s390@vger.kernel.org, selinux@tycho.nsa.gov,
        sparclinux@vger.kernel.org, x86@kernel.org, netdev@vger.kernel.org,
        linux-kernel@vger.kernel.org,
        "Justin P. Mattock" <justinmattock@gmail.com>
Subject: [PATCH] Cosmetic:Partially remove deprecated __initcall() and change to
Date:   Fri, 19 Mar 2010 12:51:31 -0700
Message-Id: <1269028291-9103-1-git-send-email-justinmattock@gmail.com>
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After doing some things on a small issue,
I noticed through web surfing, that there were patches
submitted pertaining that __initcall is deprecated,
and device_initcall should be used.

So as a change of subject(since what I was looking at
was frustrating me),I decided to grep the whole tree
and make the change(partially).

Currently I'm running this patch on my system, kernel compiles
without any errors or warnings.(thought there would be a speed increase
but didn't see much(if any)).
Biggest problem I have though is testing this on other hardware types
(I only have a macbook,and an iMac).
So please if you have the access to other arch/hardware types please
test.

Now what I mean by partially is the __initcall function is still
there, so(if any) userspace apps/libs depend on this it's there
so they dont break and/or any other subsystem, that needs time
to make the changes.

Note:
the remaining files that still have __initcall in them are:
(according to grep)

arch/um/include/shared/init.h
include/linux/init.h
scripts/checkpatch.pl

either I or somebody else, can change this(although a bit
concerned about breaking things).

Signed-off-by: Justin P. Mattock <justinmattock@gmail.com>
---
 Documentation/DocBook/kernel-hacking.tmpl    |    4 ++--
 Documentation/cpu-freq/cpu-drivers.txt       |    2 +-
 Documentation/kbuild/makefiles.txt           |    2 +-
 arch/arm/mach-at91/leds.c                    |    2 +-
 arch/arm/mach-clps711x/p720t.c               |    2 +-
 arch/arm/mach-ebsa110/leds.c                 |    2 +-
 arch/arm/mach-footbridge/cats-hw.c           |    2 +-
 arch/arm/mach-footbridge/ebsa285-leds.c      |    2 +-
 arch/arm/mach-footbridge/netwinder-hw.c      |    2 +-
 arch/arm/mach-footbridge/netwinder-leds.c    |    2 +-
 arch/arm/mach-ks8695/leds.c                  |    2 +-
 arch/arm/mach-omap1/leds.c                   |    2 +-
 arch/arm/mach-omap1/pm.c                     |    2 +-
 arch/arm/mach-orion5x/db88f5281-setup.c      |    2 +-
 arch/arm/mach-orion5x/rd88f5182-setup.c      |    2 +-
 arch/arm/mach-pxa/generic.c                  |    2 +-
 arch/arm/mach-pxa/pxa25x.c                   |    2 +-
 arch/arm/mach-shark/leds.c                   |    2 +-
 arch/blackfin/kernel/bfin_gpio.c             |    2 +-
 arch/blackfin/mach-common/pm.c               |    2 +-
 arch/cris/arch-v10/kernel/debugport.c        |    2 +-
 arch/cris/arch-v10/kernel/fasttimer.c        |    2 +-
 arch/cris/arch-v10/mm/init.c                 |    2 +-
 arch/cris/arch-v32/kernel/fasttimer.c        |    2 +-
 arch/cris/arch-v32/kernel/pinmux.c           |    2 +-
 arch/cris/arch-v32/kernel/signal.c           |    2 +-
 arch/cris/arch-v32/mach-a3/io.c              |    2 +-
 arch/cris/arch-v32/mach-a3/pinmux.c          |    2 +-
 arch/cris/arch-v32/mach-fs/io.c              |    2 +-
 arch/cris/arch-v32/mach-fs/pinmux.c          |    2 +-
 arch/cris/kernel/profile.c                   |    2 +-
 arch/cris/kernel/time.c                      |    2 +-
 arch/cris/kernel/traps.c                     |    2 +-
 arch/frv/kernel/gdb-stub.c                   |    2 +-
 arch/frv/kernel/pm-mb93093.c                 |    2 +-
 arch/frv/kernel/pm.c                         |    2 +-
 arch/frv/kernel/sysctl.c                     |    2 +-
 arch/h8300/kernel/gpio.c                     |    2 +-
 arch/ia64/hp/sim/simeth.c                    |    2 +-
 arch/ia64/hp/sim/simserial.c                 |    2 +-
 arch/ia64/kernel/audit.c                     |    2 +-
 arch/ia64/kernel/crash.c                     |    2 +-
 arch/ia64/kernel/cyclone.c                   |    2 +-
 arch/ia64/kernel/perfmon.c                   |    2 +-
 arch/ia64/kernel/setup.c                     |    2 +-
 arch/ia64/kernel/uncached.c                  |    2 +-
 arch/ia64/kernel/unwind.c                    |    2 +-
 arch/ia64/mm/init.c                          |    2 +-
 arch/mips/Makefile                           |    2 +-
 arch/mips/kernel/unaligned.c                 |    2 +-
 arch/mips/lasat/sysctl.c                     |    2 +-
 arch/mips/math-emu/cp1emu.c                  |    2 +-
 arch/mips/nxp/pnx8550/common/proc.c          |    2 +-
 arch/mips/sibyte/sb1250/bus_watcher.c        |    2 +-
 arch/mn10300/kernel/gdb-stub.c               |    2 +-
 arch/mn10300/kernel/mn10300-serial.c         |    2 +-
 arch/mn10300/kernel/profile.c                |    2 +-
 arch/parisc/kernel/pci-dma.c                 |    2 +-
 arch/parisc/kernel/pdc_chassis.c             |    2 +-
 arch/powerpc/kernel/audit.c                  |    2 +-
 arch/powerpc/kernel/idle.c                   |    2 +-
 arch/powerpc/kernel/irq.c                    |    2 +-
 arch/powerpc/kernel/proc_powerpc.c           |    2 +-
 arch/powerpc/kernel/prom.c                   |    4 ++--
 arch/powerpc/kernel/rtas-proc.c              |    2 +-
 arch/powerpc/kernel/rtasd.c                  |    2 +-
 arch/powerpc/kernel/sysfs.c                  |    2 +-
 arch/powerpc/kernel/tau_6xx.c                |    2 +-
 arch/powerpc/kernel/vio.c                    |    2 +-
 arch/powerpc/platforms/iseries/lpevents.c    |    2 +-
 arch/powerpc/platforms/iseries/mf.c          |    2 +-
 arch/powerpc/platforms/iseries/proc.c        |    2 +-
 arch/powerpc/platforms/iseries/viopath.c     |    2 +-
 arch/powerpc/platforms/pseries/eeh.c         |    2 +-
 arch/powerpc/platforms/pseries/hvCall_inst.c |    2 +-
 arch/powerpc/platforms/pseries/power.c       |    2 +-
 arch/powerpc/platforms/pseries/ras.c         |    2 +-
 arch/powerpc/platforms/pseries/reconfig.c    |    2 +-
 arch/powerpc/xmon/xmon.c                     |    2 +-
 arch/s390/appldata/appldata_base.c           |    2 +-
 arch/s390/kernel/audit.c                     |    2 +-
 arch/s390/kernel/compat_exec_domain.c        |    2 +-
 arch/s390/kernel/ipl.c                       |    2 +-
 arch/s390/kernel/topology.c                  |    2 +-
 arch/sh/boards/board-edosk7760.c             |    2 +-
 arch/sh/boards/board-sh7785lcr.c             |    2 +-
 arch/sh/boards/mach-cayman/setup.c           |    2 +-
 arch/sh/boards/mach-landisk/setup.c          |    2 +-
 arch/sh/boards/mach-r2d/setup.c              |    2 +-
 arch/sh/boards/mach-sdk7786/setup.c          |    2 +-
 arch/sh/boards/mach-se/7206/setup.c          |    2 +-
 arch/sh/boards/mach-se/7751/setup.c          |    2 +-
 arch/sh/boards/mach-sh03/setup.c             |    2 +-
 arch/sh/kernel/traps_64.c                    |    2 +-
 arch/sparc/kernel/apc.c                      |    2 +-
 arch/sparc/kernel/audit.c                    |    2 +-
 arch/sparc/kernel/mdesc.c                    |    2 +-
 arch/sparc/kernel/pmc.c                      |    2 +-
 arch/um/drivers/mconsole_kern.c              |    8 ++++----
 arch/um/drivers/net_kern.c                   |    2 +-
 arch/um/drivers/stderr_console.c             |    2 +-
 arch/um/drivers/ubd_kern.c                   |    4 ++--
 arch/um/kernel/exitcode.c                    |    2 +-
 arch/um/kernel/physmem.c                     |    2 +-
 arch/um/os-Linux/aio.c                       |    4 ++--
 arch/um/os-Linux/skas/mem.c                  |    2 +-
 arch/um/os-Linux/skas/process.c              |    2 +-
 arch/um/os-Linux/umid.c                      |    2 +-
 arch/um/sys-i386/tls.c                       |    2 +-
 arch/x86/kernel/audit_64.c                   |    2 +-
 arch/x86/kernel/tlb_uv.c                     |    4 ++--
 arch/x86/kernel/vsyscall_64.c                |    4 ++--
 arch/x86/mm/dump_pagetables.c                |    2 +-
 arch/x86/vdso/vdso32-setup.c                 |    4 ++--
 arch/x86/vdso/vma.c                          |    2 +-
 arch/xtensa/platforms/iss/console.c          |    2 +-
 drivers/net/arm/am79c961a.c                  |    2 +-
 drivers/net/hamradio/baycom_epp.c            |    1 +
 drivers/net/hamradio/baycom_par.c            |    1 +
 drivers/net/hamradio/baycom_ser_fdx.c        |    1 +
 drivers/net/hamradio/baycom_ser_hdx.c        |    1 +
 drivers/s390/char/sclp_cmd.c                 |    2 +-
 drivers/s390/char/sclp_config.c              |    2 +-
 drivers/s390/char/sclp_cpi_sys.c             |    2 +-
 drivers/s390/char/sclp_vt220.c               |    2 +-
 drivers/s390/cio/blacklist.c                 |    2 +-
 drivers/staging/rtl8192u/ieee80211/api.c     |    2 +-
 fs/aio.c                                     |    2 +-
 fs/compat_ioctl.c                            |    2 +-
 ipc/ipc_sysctl.c                             |    2 +-
 ipc/mqueue.c                                 |    2 +-
 ipc/util.c                                   |    2 +-
 kernel/audit.c                               |    2 +-
 kernel/audit_tree.c                          |    2 +-
 kernel/dma.c                                 |    2 +-
 kernel/futex.c                               |    2 +-
 kernel/lockdep_proc.c                        |    2 +-
 kernel/pid_namespace.c                       |    2 +-
 kernel/posix-cpu-timers.c                    |    2 +-
 kernel/posix-timers.c                        |    2 +-
 kernel/resource.c                            |    2 +-
 kernel/sched_debug.c                         |    2 +-
 kernel/time/timer_list.c                     |    2 +-
 kernel/time/timer_stats.c                    |    2 +-
 kernel/tracepoint.c                          |    2 +-
 kernel/utsname_sysctl.c                      |    2 +-
 lib/audit.c                                  |    2 +-
 lib/debugobjects.c                           |    2 +-
 mm/bounce.c                                  |    2 +-
 mm/memory.c                                  |    2 +-
 mm/mm_init.c                                 |    2 +-
 mm/slab.c                                    |    2 +-
 mm/slub.c                                    |    2 +-
 mm/swapfile.c                                |    2 +-
 net/ipv4/syncookies.c                        |    2 +-
 net/ipv4/sysctl_net_ipv4.c                   |    2 +-
 security/keys/proc.c                         |    2 +-
 security/selinux/hooks.c                     |    2 +-
 security/selinux/netif.c                     |    2 +-
 security/selinux/netlink.c                   |    2 +-
 security/selinux/netnode.c                   |    2 +-
 security/selinux/netport.c                   |    2 +-
 security/selinux/selinuxfs.c                 |    2 +-
 security/selinux/ss/services.c               |    2 +-
 security/smack/smackfs.c                     |    2 +-
 sound/last.c                                 |    2 +-
 166 files changed, 176 insertions(+), 172 deletions(-)

diff --git a/Documentation/DocBook/kernel-hacking.tmpl b/Documentation/DocBook/kernel-hacking.tmpl
index 7b3f493..a682709 100644
--- a/Documentation/DocBook/kernel-hacking.tmpl
+++ b/Documentation/DocBook/kernel-hacking.tmpl
@@ -734,7 +734,7 @@ printk(KERN_INFO "my ip: %pI4\n", &amp;ipaddress);
   </sect1>
 
   <sect1 id="routines-init-again">
-   <title><function>__initcall()</function>/<function>module_init()</function>
+   <title><function>device_initcall()</function>/<function>module_init()</function>
     <filename class="headerfile">include/linux/init.h</filename></title>
    <para>
     Many parts of the kernel are well served as a module
@@ -750,7 +750,7 @@ printk(KERN_INFO "my ip: %pI4\n", &amp;ipaddress);
     function is to be called at module insertion time (if the file is
     compiled as a module), or at boot time: if the file is not
     compiled as a module the <function>module_init()</function> macro
-    becomes equivalent to <function>__initcall()</function>, which
+    becomes equivalent to <function>device_initcall()</function>, which
     through linker magic ensures that the function is called on boot.
    </para>
 
diff --git a/Documentation/cpu-freq/cpu-drivers.txt b/Documentation/cpu-freq/cpu-drivers.txt
index 6c30e93..12bb6e4 100644
--- a/Documentation/cpu-freq/cpu-drivers.txt
+++ b/Documentation/cpu-freq/cpu-drivers.txt
@@ -41,7 +41,7 @@ on what is necessary:
 1.1 Initialization
 ------------------
 
-First of all, in an __initcall level 7 (module_init()) or later
+First of all, in an device_initcall level 7 (module_init()) or later
 function check whether this kernel runs on the right CPU and the right
 chipset. If so, register a struct cpufreq_driver with the CPUfreq core
 using cpufreq_register_driver()
diff --git a/Documentation/kbuild/makefiles.txt b/Documentation/kbuild/makefiles.txt
index 71c602d..645ea71 100644
--- a/Documentation/kbuild/makefiles.txt
+++ b/Documentation/kbuild/makefiles.txt
@@ -159,7 +159,7 @@ more details, with real examples.
 	built-in.o and succeeding instances will be ignored.
 
 	Link order is significant, because certain functions
-	(module_init() / __initcall) will be called during boot in the
+	(module_init() / device_initcall) will be called during boot in the
 	order they appear. So keep in mind that changing the link
 	order may e.g. change the order in which your SCSI
 	controllers are detected, and thus your disks are renumbered.
diff --git a/arch/arm/mach-at91/leds.c b/arch/arm/mach-at91/leds.c
index 0415a83..08e342d 100644
--- a/arch/arm/mach-at91/leds.c
+++ b/arch/arm/mach-at91/leds.c
@@ -179,7 +179,7 @@ static int __init leds_init(void)
 	return 0;
 }
 
-__initcall(leds_init);
+device_initcall(leds_init);
 
 
 void __init at91_init_leds(u8 cpu_led, u8 timer_led)
diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c
index 0d94a30..1047b23 100644
--- a/arch/arm/mach-clps711x/p720t.c
+++ b/arch/arm/mach-clps711x/p720t.c
@@ -121,5 +121,5 @@ static int p720t_hw_init(void)
 	return 0;
 }
 
-__initcall(p720t_hw_init);
+device_initcall(p720t_hw_init);
 
diff --git a/arch/arm/mach-ebsa110/leds.c b/arch/arm/mach-ebsa110/leds.c
index 6a6ea57..8b57907 100644
--- a/arch/arm/mach-ebsa110/leds.c
+++ b/arch/arm/mach-ebsa110/leds.c
@@ -48,4 +48,4 @@ static int __init leds_init(void)
 	return 0;
 }
 
-__initcall(leds_init);
+device_initcall(leds_init);
diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c
index 1b996b2..1b616e5 100644
--- a/arch/arm/mach-footbridge/cats-hw.c
+++ b/arch/arm/mach-footbridge/cats-hw.c
@@ -69,7 +69,7 @@ static int __init cats_hw_init(void)
 	return 0;
 }
 
-__initcall(cats_hw_init);
+device_initcall(cats_hw_init);
 
 /*
  * CATS uses soft-reboot by default, since
diff --git a/arch/arm/mach-footbridge/ebsa285-leds.c b/arch/arm/mach-footbridge/ebsa285-leds.c
index 4e10090..f162fb2 100644
--- a/arch/arm/mach-footbridge/ebsa285-leds.c
+++ b/arch/arm/mach-footbridge/ebsa285-leds.c
@@ -136,4 +136,4 @@ static int __init leds_init(void)
 	return 0;
 }
 
-__initcall(leds_init);
+device_initcall(leds_init);
diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c
index ac7ffa6..090b4cf 100644
--- a/arch/arm/mach-footbridge/netwinder-hw.c
+++ b/arch/arm/mach-footbridge/netwinder-hw.c
@@ -623,7 +623,7 @@ static int __init nw_hw_init(void)
 	return 0;
 }
 
-__initcall(nw_hw_init);
+device_initcall(nw_hw_init);
 
 /*
  * Older NeTTroms either do not provide a parameters
diff --git a/arch/arm/mach-footbridge/netwinder-leds.c b/arch/arm/mach-footbridge/netwinder-leds.c
index 00269fe..f504682 100644
--- a/arch/arm/mach-footbridge/netwinder-leds.c
+++ b/arch/arm/mach-footbridge/netwinder-leds.c
@@ -136,4 +136,4 @@ static int __init leds_init(void)
 	return 0;
 }
 
-__initcall(leds_init);
+device_initcall(leds_init);
diff --git a/arch/arm/mach-ks8695/leds.c b/arch/arm/mach-ks8695/leds.c
index 184ef74..97c3828 100644
--- a/arch/arm/mach-ks8695/leds.c
+++ b/arch/arm/mach-ks8695/leds.c
@@ -90,4 +90,4 @@ static int __init leds_init(void)
 	return 0;
 }
 
-__initcall(leds_init);
+device_initcall(leds_init);
diff --git a/arch/arm/mach-omap1/leds.c b/arch/arm/mach-omap1/leds.c
index 277f356..bd447fa 100644
--- a/arch/arm/mach-omap1/leds.c
+++ b/arch/arm/mach-omap1/leds.c
@@ -63,4 +63,4 @@ omap_leds_init(void)
 	return 0;
 }
 
-__initcall(omap_leds_init);
+device_initcall(omap_leds_init);
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index b1d3f9f..fda5f60 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -724,4 +724,4 @@ static int __init omap_pm_init(void)
 
 	return 0;
 }
-__initcall(omap_pm_init);
+device_initcall(omap_pm_init);
diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c
index d318bea..0c76893 100644
--- a/arch/arm/mach-orion5x/db88f5281-setup.c
+++ b/arch/arm/mach-orion5x/db88f5281-setup.c
@@ -197,7 +197,7 @@ static int __init db88f5281_7seg_init(void)
 	return 0;
 }
 
-__initcall(db88f5281_7seg_init);
+device_initcall(db88f5281_7seg_init);
 
 /*****************************************************************************
  * PCI
diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c
index a04f9e4..43e9a49 100644
--- a/arch/arm/mach-orion5x/rd88f5182-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5182-setup.c
@@ -130,7 +130,7 @@ static int __init rd88f5182_dbgled_init(void)
 	return 0;
 }
 
-__initcall(rd88f5182_dbgled_init);
+device_initcall(rd88f5182_dbgled_init);
 
 #endif
 
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 3126a35..1d44a9a 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -12,7 +12,7 @@
  * published by the Free Software Foundation.
  *
  * Since this file should be linked before any other machine specific file,
- * the __initcall() here will be executed first.  This serves as default
+ * the device_initcall() here will be executed first.  This serves as default
  * initialization stuff for PXA machines which can be overridden later if
  * need be.
  */
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 0b9ad30..b0df545 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -12,7 +12,7 @@
  * published by the Free Software Foundation.
  *
  * Since this file should be linked before any other machine specific file,
- * the __initcall() here will be executed first.  This serves as default
+ * the device_initcall() here will be executed first.  This serves as default
  * initialization stuff for PXA machines which can be overridden later if
  * need be.
  */
diff --git a/arch/arm/mach-shark/leds.c b/arch/arm/mach-shark/leds.c
index c9e32de..511693a 100644
--- a/arch/arm/mach-shark/leds.c
+++ b/arch/arm/mach-shark/leds.c
@@ -163,4 +163,4 @@ static int __init leds_init(void)
 	return 0;
 }
 
-__initcall(leds_init);
+device_initcall(leds_init);
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c
index a174596..bc5ba54 100644
--- a/arch/blackfin/kernel/bfin_gpio.c
+++ b/arch/blackfin/kernel/bfin_gpio.c
@@ -1285,7 +1285,7 @@ static __init int gpio_register_proc(void)
 		proc_gpio->read_proc = gpio_proc_read;
 	return proc_gpio != NULL;
 }
-__initcall(gpio_register_proc);
+device_initcall(gpio_register_proc);
 #endif
 
 #ifdef CONFIG_GPIOLIB
diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c
index 8837be4..dc36d3a 100644
--- a/arch/blackfin/mach-common/pm.c
+++ b/arch/blackfin/mach-common/pm.c
@@ -266,4 +266,4 @@ static int __init bfin_pm_init(void)
 	return 0;
 }
 
-__initcall(bfin_pm_init);
+device_initcall(bfin_pm_init);
diff --git a/arch/cris/arch-v10/kernel/debugport.c b/arch/cris/arch-v10/kernel/debugport.c
index 99851ba..0348977 100644
--- a/arch/cris/arch-v10/kernel/debugport.c
+++ b/arch/cris/arch-v10/kernel/debugport.c
@@ -564,4 +564,4 @@ init_etrax_debug(void)
 #endif
 	return 0;
 }
-__initcall(init_etrax_debug);
+device_initcall(init_etrax_debug);
diff --git a/arch/cris/arch-v10/kernel/fasttimer.c b/arch/cris/arch-v10/kernel/fasttimer.c
index 5ff08a8..b991462 100644
--- a/arch/cris/arch-v10/kernel/fasttimer.c
+++ b/arch/cris/arch-v10/kernel/fasttimer.c
@@ -879,4 +879,4 @@ int fast_timer_init(void)
   }
 	return 0;
 }
-__initcall(fast_timer_init);
+device_initcall(fast_timer_init);
diff --git a/arch/cris/arch-v10/mm/init.c b/arch/cris/arch-v10/mm/init.c
index baa746c..908d829 100644
--- a/arch/cris/arch-v10/mm/init.c
+++ b/arch/cris/arch-v10/mm/init.c
@@ -217,7 +217,7 @@ __init init_ioremap(void)
 	return 0;
 }
 
-__initcall(init_ioremap);
+device_initcall(init_ioremap);
 
 /* Helper function for the two below */
 
diff --git a/arch/cris/arch-v32/kernel/fasttimer.c b/arch/cris/arch-v32/kernel/fasttimer.c
index 111caa1..221bcea 100644
--- a/arch/cris/arch-v32/kernel/fasttimer.c
+++ b/arch/cris/arch-v32/kernel/fasttimer.c
@@ -833,4 +833,4 @@ int fast_timer_init(void)
   }
 	return 0;
 }
-__initcall(fast_timer_init);
+device_initcall(fast_timer_init);
diff --git a/arch/cris/arch-v32/kernel/pinmux.c b/arch/cris/arch-v32/kernel/pinmux.c
index f6f3637..c2dfcd3 100644
--- a/arch/cris/arch-v32/kernel/pinmux.c
+++ b/arch/cris/arch-v32/kernel/pinmux.c
@@ -226,4 +226,4 @@ crisv32_pinmux_dump(void)
 	}
 }
 
-__initcall(crisv32_pinmux_init);
+device_initcall(crisv32_pinmux_init);
diff --git a/arch/cris/arch-v32/kernel/signal.c b/arch/cris/arch-v32/kernel/signal.c
index 372d0ca..d1e1b4e 100644
--- a/arch/cris/arch-v32/kernel/signal.c
+++ b/arch/cris/arch-v32/kernel/signal.c
@@ -672,4 +672,4 @@ cris_init_signal(void)
 	return 0;
 }
 
-__initcall(cris_init_signal);
+device_initcall(cris_init_signal);
diff --git a/arch/cris/arch-v32/mach-a3/io.c b/arch/cris/arch-v32/mach-a3/io.c
index 090ceb9..ea40a9b 100644
--- a/arch/cris/arch-v32/mach-a3/io.c
+++ b/arch/cris/arch-v32/mach-a3/io.c
@@ -95,7 +95,7 @@ static int __init crisv32_io_init(void)
 	return ret;
 }
 
-__initcall(crisv32_io_init);
+device_initcall(crisv32_io_init);
 
 int crisv32_io_get(struct crisv32_iopin *iopin,
 	unsigned int port, unsigned int pin)
diff --git a/arch/cris/arch-v32/mach-a3/pinmux.c b/arch/cris/arch-v32/mach-a3/pinmux.c
index 18648ef..14bbc78 100644
--- a/arch/cris/arch-v32/mach-a3/pinmux.c
+++ b/arch/cris/arch-v32/mach-a3/pinmux.c
@@ -383,4 +383,4 @@ crisv32_pinmux_dump(void)
 	}
 }
 
-__initcall(crisv32_pinmux_init);
+device_initcall(crisv32_pinmux_init);
diff --git a/arch/cris/arch-v32/mach-fs/io.c b/arch/cris/arch-v32/mach-fs/io.c
index a695866..fce8438 100644
--- a/arch/cris/arch-v32/mach-fs/io.c
+++ b/arch/cris/arch-v32/mach-fs/io.c
@@ -128,7 +128,7 @@ static int __init crisv32_io_init(void)
 	return ret;
 }
 
-__initcall(crisv32_io_init);
+device_initcall(crisv32_io_init);
 
 int crisv32_io_get(struct crisv32_iopin *iopin,
 		   unsigned int port, unsigned int pin)
diff --git a/arch/cris/arch-v32/mach-fs/pinmux.c b/arch/cris/arch-v32/mach-fs/pinmux.c
index 38f29ee..751f991 100644
--- a/arch/cris/arch-v32/mach-fs/pinmux.c
+++ b/arch/cris/arch-v32/mach-fs/pinmux.c
@@ -306,4 +306,4 @@ void crisv32_pinmux_dump(void)
 	}
 }
 
-__initcall(crisv32_pinmux_init);
+device_initcall(crisv32_pinmux_init);
diff --git a/arch/cris/kernel/profile.c b/arch/cris/kernel/profile.c
index 9aa5711..2472f3f 100644
--- a/arch/cris/kernel/profile.c
+++ b/arch/cris/kernel/profile.c
@@ -82,4 +82,4 @@ __init init_cris_profile(void)
 	return 0;
 }
 
-__initcall(init_cris_profile);
+device_initcall(init_cris_profile);
diff --git a/arch/cris/kernel/time.c b/arch/cris/kernel/time.c
index a05dd31..7554e96 100644
--- a/arch/cris/kernel/time.c
+++ b/arch/cris/kernel/time.c
@@ -160,4 +160,4 @@ __init init_udelay(void)
 	return 0;
 }
 
-__initcall(init_udelay);
+device_initcall(init_udelay);
diff --git a/arch/cris/kernel/traps.c b/arch/cris/kernel/traps.c
index 541efbf..8f77b68 100644
--- a/arch/cris/kernel/traps.c
+++ b/arch/cris/kernel/traps.c
@@ -177,7 +177,7 @@ oops_nmi_register(void)
 	return 0;
 }
 
-__initcall(oops_nmi_register);
+device_initcall(oops_nmi_register);
 
 #endif
 
diff --git a/arch/frv/kernel/gdb-stub.c b/arch/frv/kernel/gdb-stub.c
index 7ca8a6b..71d564c 100644
--- a/arch/frv/kernel/gdb-stub.c
+++ b/arch/frv/kernel/gdb-stub.c
@@ -2017,7 +2017,7 @@ static int __init gdbstub_postinit(void)
 	return 0;
 } /* end gdbstub_postinit() */
 
-__initcall(gdbstub_postinit);
+device_initcall(gdbstub_postinit);
 #endif
 
 /*****************************************************************************/
diff --git a/arch/frv/kernel/pm-mb93093.c b/arch/frv/kernel/pm-mb93093.c
index eaa7b58..3caa348 100644
--- a/arch/frv/kernel/pm-mb93093.c
+++ b/arch/frv/kernel/pm-mb93093.c
@@ -61,5 +61,5 @@ static int __init mb93093_pm_init(void)
 	return 0;
 }
 
-__initcall(mb93093_pm_init);
+device_initcall(mb93093_pm_init);
 
diff --git a/arch/frv/kernel/pm.c b/arch/frv/kernel/pm.c
index 5fa3889..b1aad48 100644
--- a/arch/frv/kernel/pm.c
+++ b/arch/frv/kernel/pm.c
@@ -348,6 +348,6 @@ static int __init pm_init(void)
 	return 0;
 }
 
-__initcall(pm_init);
+device_initcall(pm_init);
 
 #endif
diff --git a/arch/frv/kernel/sysctl.c b/arch/frv/kernel/sysctl.c
index 035516c..3280f8b 100644
--- a/arch/frv/kernel/sysctl.c
+++ b/arch/frv/kernel/sysctl.c
@@ -217,4 +217,4 @@ static int __init frv_sysctl_init(void)
 	return 0;
 }
 
-__initcall(frv_sysctl_init);
+device_initcall(frv_sysctl_init);
diff --git a/arch/h8300/kernel/gpio.c b/arch/h8300/kernel/gpio.c
index 6a25dd5..6ea7dd9 100644
--- a/arch/h8300/kernel/gpio.c
+++ b/arch/h8300/kernel/gpio.c
@@ -164,7 +164,7 @@ static __init int register_proc(void)
 	return proc_gpio != NULL;
 }
 
-__initcall(register_proc);
+device_initcall(register_proc);
 #endif
 
 void __init h8300_gpio_init(void)
diff --git a/arch/ia64/hp/sim/simeth.c b/arch/ia64/hp/sim/simeth.c
index 7e81966..e669908 100644
--- a/arch/ia64/hp/sim/simeth.c
+++ b/arch/ia64/hp/sim/simeth.c
@@ -524,4 +524,4 @@ set_multicast_list(struct net_device *dev)
 	printk(KERN_WARNING "%s: set_multicast_list called\n", dev->name);
 }
 
-__initcall(simeth_probe);
+device_initcall(simeth_probe);
diff --git a/arch/ia64/hp/sim/simserial.c b/arch/ia64/hp/sim/simserial.c
index 2bef526..470c0a1 100644
--- a/arch/ia64/hp/sim/simserial.c
+++ b/arch/ia64/hp/sim/simserial.c
@@ -980,5 +980,5 @@ simrs_init (void)
 }
 
 #ifndef MODULE
-__initcall(simrs_init);
+device_initcall(simrs_init);
 #endif
diff --git a/arch/ia64/kernel/audit.c b/arch/ia64/kernel/audit.c
index 96a9d18..c7d79ba 100644
--- a/arch/ia64/kernel/audit.c
+++ b/arch/ia64/kernel/audit.c
@@ -57,4 +57,4 @@ static int __init audit_classes_init(void)
 	return 0;
 }
 
-__initcall(audit_classes_init);
+device_initcall(audit_classes_init);
diff --git a/arch/ia64/kernel/crash.c b/arch/ia64/kernel/crash.c
index b942f40..07218af 100644
--- a/arch/ia64/kernel/crash.c
+++ b/arch/ia64/kernel/crash.c
@@ -282,5 +282,5 @@ machine_crash_setup(void)
 	return 0;
 }
 
-__initcall(machine_crash_setup);
+device_initcall(machine_crash_setup);
 
diff --git a/arch/ia64/kernel/cyclone.c b/arch/ia64/kernel/cyclone.c
index 71e3586..66fb97e 100644
--- a/arch/ia64/kernel/cyclone.c
+++ b/arch/ia64/kernel/cyclone.c
@@ -125,4 +125,4 @@ int __init init_cyclone_clock(void)
 	return 0;
 }
 
-__initcall(init_cyclone_clock);
+device_initcall(init_cyclone_clock);
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
index 703062c..cb7199a 100644
--- a/arch/ia64/kernel/perfmon.c
+++ b/arch/ia64/kernel/perfmon.c
@@ -6700,7 +6700,7 @@ pfm_init(void)
 	return 0;
 }
 
-__initcall(pfm_init);
+device_initcall(pfm_init);
 
 /*
  * this function is called before pfm_init()
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
index 41ae6a5..8322a01 100644
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -243,7 +243,7 @@ static int __init register_memory(void)
 	return 0;
 }
 
-__initcall(register_memory);
+device_initcall(register_memory);
 
 
 #ifdef CONFIG_KEXEC
diff --git a/arch/ia64/kernel/uncached.c b/arch/ia64/kernel/uncached.c
index a595823..4a9812f 100644
--- a/arch/ia64/kernel/uncached.c
+++ b/arch/ia64/kernel/uncached.c
@@ -279,4 +279,4 @@ static int __init uncached_init(void)
 	return 0;
 }
 
-__initcall(uncached_init);
+device_initcall(uncached_init);
diff --git a/arch/ia64/kernel/unwind.c b/arch/ia64/kernel/unwind.c
index b6c0e63..62de896 100644
--- a/arch/ia64/kernel/unwind.c
+++ b/arch/ia64/kernel/unwind.c
@@ -2223,7 +2223,7 @@ create_gate_table (void)
 	return 0;
 }
 
-__initcall(create_gate_table);
+device_initcall(create_gate_table);
 
 void __init
 unw_init (void)
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c
index ed41759..da31b31 100644
--- a/arch/ia64/mm/init.c
+++ b/arch/ia64/mm/init.c
@@ -716,4 +716,4 @@ per_linux32_init(void)
 	return 0;
 }
 
-__initcall(per_linux32_init);
+device_initcall(per_linux32_init);
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 2f2eac2..0341a9e 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -534,7 +534,7 @@ load-$(CONFIG_SGI_IP32)		+= 0xffffffff80004000
 #
 # This is a LIB so that it links at the end, and initcalls are later
 # the sequence; but it is built as an object so that modules don't get
-# removed (as happens, even if they have __initcall/module_init)
+# removed (as happens, even if they have device_initcall/module_init)
 #
 core-$(CONFIG_SIBYTE_BCM112X)	+= arch/mips/sibyte/sb1250/
 core-$(CONFIG_SIBYTE_BCM112X)	+= arch/mips/sibyte/common/
diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index 69b039c..7233ac8 100644
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -567,5 +567,5 @@ static int __init debugfs_unaligned(void)
 		return -ENOMEM;
 	return 0;
 }
-__initcall(debugfs_unaligned);
+device_initcall(debugfs_unaligned);
 #endif
diff --git a/arch/mips/lasat/sysctl.c b/arch/mips/lasat/sysctl.c
index d87ffd0..6cc8d2f 100644
--- a/arch/mips/lasat/sysctl.c
+++ b/arch/mips/lasat/sysctl.c
@@ -285,4 +285,4 @@ static int __init lasat_register_sysctl(void)
 	return 0;
 }
 
-__initcall(lasat_register_sysctl);
+device_initcall(lasat_register_sysctl);
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 8f2f8e9..3936be4 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -1325,5 +1325,5 @@ static int __init debugfs_fpuemu(void)
 
 	return 0;
 }
-__initcall(debugfs_fpuemu);
+device_initcall(debugfs_fpuemu);
 #endif
diff --git a/arch/mips/nxp/pnx8550/common/proc.c b/arch/mips/nxp/pnx8550/common/proc.c
index af094cd..9a10d8c 100644
--- a/arch/mips/nxp/pnx8550/common/proc.c
+++ b/arch/mips/nxp/pnx8550/common/proc.c
@@ -108,4 +108,4 @@ static int pnx8550_proc_init( void )
 	return 0;
 }
 
-__initcall(pnx8550_proc_init);
+device_initcall(pnx8550_proc_init);
diff --git a/arch/mips/sibyte/sb1250/bus_watcher.c b/arch/mips/sibyte/sb1250/bus_watcher.c
index 45274bd..e8e7f23 100644
--- a/arch/mips/sibyte/sb1250/bus_watcher.c
+++ b/arch/mips/sibyte/sb1250/bus_watcher.c
@@ -255,4 +255,4 @@ int __init sibyte_bus_watcher(void)
 	return 0;
 }
 
-__initcall(sibyte_bus_watcher);
+device_initcall(sibyte_bus_watcher);
diff --git a/arch/mn10300/kernel/gdb-stub.c b/arch/mn10300/kernel/gdb-stub.c
index 41b1170..22e0613 100644
--- a/arch/mn10300/kernel/gdb-stub.c
+++ b/arch/mn10300/kernel/gdb-stub.c
@@ -1884,7 +1884,7 @@ static int __init gdbstub_postinit(void)
 	return 0;
 }
 
-__initcall(gdbstub_postinit);
+device_initcall(gdbstub_postinit);
 #endif
 
 /*
diff --git a/arch/mn10300/kernel/mn10300-serial.c b/arch/mn10300/kernel/mn10300-serial.c
index ef34d5a..9cada2f 100644
--- a/arch/mn10300/kernel/mn10300-serial.c
+++ b/arch/mn10300/kernel/mn10300-serial.c
@@ -1350,7 +1350,7 @@ static int __init mn10300_serial_init(void)
 	return ret;
 }
 
-__initcall(mn10300_serial_init);
+device_initcall(mn10300_serial_init);
 
 
 #ifdef CONFIG_MN10300_TTYSM_CONSOLE
diff --git a/arch/mn10300/kernel/profile.c b/arch/mn10300/kernel/profile.c
index 20d7d03..e799032 100644
--- a/arch/mn10300/kernel/profile.c
+++ b/arch/mn10300/kernel/profile.c
@@ -48,4 +48,4 @@ static __init int profile_init(void)
 	return 0;
 }
 
-__initcall(profile_init);
+device_initcall(profile_init);
diff --git a/arch/parisc/kernel/pci-dma.c b/arch/parisc/kernel/pci-dma.c
index c07f618..e7c12c0 100644
--- a/arch/parisc/kernel/pci-dma.c
+++ b/arch/parisc/kernel/pci-dma.c
@@ -410,7 +410,7 @@ pcxl_dma_init(void)
 	return 0;
 }
 
-__initcall(pcxl_dma_init);
+device_initcall(pcxl_dma_init);
 
 static void * pa11_dma_alloc_consistent (struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flag)
 {
diff --git a/arch/parisc/kernel/pdc_chassis.c b/arch/parisc/kernel/pdc_chassis.c
index d47ba1a..35ad4cb 100644
--- a/arch/parisc/kernel/pdc_chassis.c
+++ b/arch/parisc/kernel/pdc_chassis.c
@@ -295,7 +295,7 @@ static int __init pdc_chassis_create_procfs(void)
 	return 0;
 }
 
-__initcall(pdc_chassis_create_procfs);
+device_initcall(pdc_chassis_create_procfs);
 
 #endif /* CONFIG_PROC_FS */
 #endif /* CONFIG_PDC_CHASSIS_WARN */
diff --git a/arch/powerpc/kernel/audit.c b/arch/powerpc/kernel/audit.c
index a4dab7c..e721e2e 100644
--- a/arch/powerpc/kernel/audit.c
+++ b/arch/powerpc/kernel/audit.c
@@ -80,4 +80,4 @@ static int __init audit_classes_init(void)
 	return 0;
 }
 
-__initcall(audit_classes_init);
+device_initcall(audit_classes_init);
diff --git a/arch/powerpc/kernel/idle.c b/arch/powerpc/kernel/idle.c
index 049dda6..694861f 100644
--- a/arch/powerpc/kernel/idle.c
+++ b/arch/powerpc/kernel/idle.c
@@ -134,5 +134,5 @@ register_powersave_nap_sysctl(void)
 
 	return 0;
 }
-__initcall(register_powersave_nap_sysctl);
+device_initcall(register_powersave_nap_sysctl);
 #endif
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 64f6f20..2e97ae9 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -1203,7 +1203,7 @@ static int __init irq_debugfs_init(void)
 
 	return 0;
 }
-__initcall(irq_debugfs_init);
+device_initcall(irq_debugfs_init);
 #endif /* CONFIG_VIRQ_DEBUG */
 
 #ifdef CONFIG_PPC64
diff --git a/arch/powerpc/kernel/proc_powerpc.c b/arch/powerpc/kernel/proc_powerpc.c
index 1ed3b8d..f53bdca 100644
--- a/arch/powerpc/kernel/proc_powerpc.c
+++ b/arch/powerpc/kernel/proc_powerpc.c
@@ -91,7 +91,7 @@ static int __init proc_ppc64_init(void)
 
 	return 0;
 }
-__initcall(proc_ppc64_init);
+device_initcall(proc_ppc64_init);
 
 #endif /* CONFIG_PPC64 */
 
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 05131d6..628d6df 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -845,7 +845,7 @@ static int __init prom_reconfig_setup(void)
 {
 	return pSeries_reconfig_notifier_register(&prom_reconfig_nb);
 }
-__initcall(prom_reconfig_setup);
+device_initcall(prom_reconfig_setup);
 #endif
 
 /* Find the device node for a given logical cpu number, also returns the cpu
@@ -909,5 +909,5 @@ static int __init export_flat_device_tree(void)
 
 	return 0;
 }
-__initcall(export_flat_device_tree);
+device_initcall(export_flat_device_tree);
 #endif
diff --git a/arch/powerpc/kernel/rtas-proc.c b/arch/powerpc/kernel/rtas-proc.c
index 8777fb0..7578df5 100644
--- a/arch/powerpc/kernel/rtas-proc.c
+++ b/arch/powerpc/kernel/rtas-proc.c
@@ -279,7 +279,7 @@ static int __init proc_rtas_init(void)
 	return 0;
 }
 
-__initcall(proc_rtas_init);
+device_initcall(proc_rtas_init);
 
 static int parse_number(const char __user *p, size_t count, unsigned long *val)
 {
diff --git a/arch/powerpc/kernel/rtasd.c b/arch/powerpc/kernel/rtasd.c
index 2e4832a..1bfd919 100644
--- a/arch/powerpc/kernel/rtasd.c
+++ b/arch/powerpc/kernel/rtasd.c
@@ -508,7 +508,7 @@ static int __init rtas_init(void)
 
 	return 0;
 }
-__initcall(rtas_init);
+device_initcall(rtas_init);
 
 static int __init surveillance_setup(char *str)
 {
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index e235e52..6ddb889 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -92,7 +92,7 @@ static int __init smt_setup(void)
 	of_node_put(options);
 	return 0;
 }
-__initcall(smt_setup);
+device_initcall(smt_setup);
 
 static int __init setup_smt_snooze_delay(char *str)
 {
diff --git a/arch/powerpc/kernel/tau_6xx.c b/arch/powerpc/kernel/tau_6xx.c
index a753b72..a38d207 100644
--- a/arch/powerpc/kernel/tau_6xx.c
+++ b/arch/powerpc/kernel/tau_6xx.c
@@ -248,7 +248,7 @@ int __init TAU_init(void)
 	return 0;
 }
 
-__initcall(TAU_init);
+device_initcall(TAU_init);
 
 /*
  * return current temp
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c
index 77f6421..c74aae9 100644
--- a/arch/powerpc/kernel/vio.c
+++ b/arch/powerpc/kernel/vio.c
@@ -1303,7 +1303,7 @@ static int __init vio_bus_init(void)
 
 	return 0;
 }
-__initcall(vio_bus_init);
+device_initcall(vio_bus_init);
 
 static ssize_t name_show(struct device *dev,
 		struct device_attribute *attr, char *buf)
diff --git a/arch/powerpc/platforms/iseries/lpevents.c b/arch/powerpc/platforms/iseries/lpevents.c
index b0f8a85..66bc6ff 100644
--- a/arch/powerpc/platforms/iseries/lpevents.c
+++ b/arch/powerpc/platforms/iseries/lpevents.c
@@ -337,5 +337,5 @@ static int __init proc_lpevents_init(void)
 		    &proc_lpevents_operations);
 	return 0;
 }
-__initcall(proc_lpevents_init);
+device_initcall(proc_lpevents_init);
 
diff --git a/arch/powerpc/platforms/iseries/mf.c b/arch/powerpc/platforms/iseries/mf.c
index 6617915..d140c09 100644
--- a/arch/powerpc/platforms/iseries/mf.c
+++ b/arch/powerpc/platforms/iseries/mf.c
@@ -1299,7 +1299,7 @@ static int __init mf_proc_init(void)
 	return 0;
 }
 
-__initcall(mf_proc_init);
+device_initcall(mf_proc_init);
 
 #endif /* CONFIG_PROC_FS */
 
diff --git a/arch/powerpc/platforms/iseries/proc.c b/arch/powerpc/platforms/iseries/proc.c
index 0676368..1e9ac90 100644
--- a/arch/powerpc/platforms/iseries/proc.c
+++ b/arch/powerpc/platforms/iseries/proc.c
@@ -117,4 +117,4 @@ static int __init iseries_proc_init(void)
 		    &proc_titantod_operations);
 	return 0;
 }
-__initcall(iseries_proc_init);
+device_initcall(iseries_proc_init);
diff --git a/arch/powerpc/platforms/iseries/viopath.c b/arch/powerpc/platforms/iseries/viopath.c
index 5aea94f..daac760 100644
--- a/arch/powerpc/platforms/iseries/viopath.c
+++ b/arch/powerpc/platforms/iseries/viopath.c
@@ -186,7 +186,7 @@ static int __init vio_proc_init(void)
 	proc_create("iSeries/config", 0, NULL, &proc_viopath_operations);
         return 0;
 }
-__initcall(vio_proc_init);
+device_initcall(vio_proc_init);
 
 /* See if a given LP is active.  Allow for invalid lps to be passed in
  * and just return invalid
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index 7df7fbb..cb72726 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -1287,4 +1287,4 @@ static int __init eeh_init_proc(void)
 		proc_create("ppc64/eeh", 0, NULL, &proc_eeh_operations);
 	return 0;
 }
-__initcall(eeh_init_proc);
+device_initcall(eeh_init_proc);
diff --git a/arch/powerpc/platforms/pseries/hvCall_inst.c b/arch/powerpc/platforms/pseries/hvCall_inst.c
index 1fefae7..ca1b4e2 100644
--- a/arch/powerpc/platforms/pseries/hvCall_inst.c
+++ b/arch/powerpc/platforms/pseries/hvCall_inst.c
@@ -164,4 +164,4 @@ static int __init hcall_inst_init(void)
 
 	return 0;
 }
-__initcall(hcall_inst_init);
+device_initcall(hcall_inst_init);
diff --git a/arch/powerpc/platforms/pseries/power.c b/arch/powerpc/platforms/pseries/power.c
index 6d62662..0eafaf8 100644
--- a/arch/powerpc/platforms/pseries/power.c
+++ b/arch/powerpc/platforms/pseries/power.c
@@ -77,5 +77,5 @@ static int __init apo_pm_init(void)
 {
 	return (sysfs_create_file(power_kobj, &auto_poweron_attr.attr));
 }
-__initcall(apo_pm_init);
+device_initcall(apo_pm_init);
 #endif
diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c
index d20b96e..247bad9 100644
--- a/arch/powerpc/platforms/pseries/ras.c
+++ b/arch/powerpc/platforms/pseries/ras.c
@@ -152,7 +152,7 @@ static int __init init_ras_IRQ(void)
 
 	return 0;
 }
-__initcall(init_ras_IRQ);
+device_initcall(init_ras_IRQ);
 
 /*
  * Handle power subsystem events (EPOW).
diff --git a/arch/powerpc/platforms/pseries/reconfig.c b/arch/powerpc/platforms/pseries/reconfig.c
index a2305d2..d82ca6c 100644
--- a/arch/powerpc/platforms/pseries/reconfig.c
+++ b/arch/powerpc/platforms/pseries/reconfig.c
@@ -557,4 +557,4 @@ static int proc_ppc64_create_ofdt(void)
 
 	return 0;
 }
-__initcall(proc_ppc64_create_ofdt);
+device_initcall(proc_ppc64_create_ofdt);
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 8bad7d5..cd1ce39 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -2751,7 +2751,7 @@ static int __init setup_xmon_sysrq(void)
 	register_sysrq_key('x', &sysrq_xmon_op);
 	return 0;
 }
-__initcall(setup_xmon_sysrq);
+device_initcall(setup_xmon_sysrq);
 #endif /* CONFIG_MAGIC_SYSRQ */
 
 static int __initdata xmon_early, xmon_off;
diff --git a/arch/s390/appldata/appldata_base.c b/arch/s390/appldata/appldata_base.c
index 5c91995..af7ccb3 100644
--- a/arch/s390/appldata/appldata_base.c
+++ b/arch/s390/appldata/appldata_base.c
@@ -659,7 +659,7 @@ out_driver:
 	return rc;
 }
 
-__initcall(appldata_init);
+device_initcall(appldata_init);
 
 /**************************** init / exit <END> ******************************/
 
diff --git a/arch/s390/kernel/audit.c b/arch/s390/kernel/audit.c
index f4932c2..8a9023a 100644
--- a/arch/s390/kernel/audit.c
+++ b/arch/s390/kernel/audit.c
@@ -75,4 +75,4 @@ static int __init audit_classes_init(void)
 	return 0;
 }
 
-__initcall(audit_classes_init);
+device_initcall(audit_classes_init);
diff --git a/arch/s390/kernel/compat_exec_domain.c b/arch/s390/kernel/compat_exec_domain.c
index 914d494..e0715f6 100644
--- a/arch/s390/kernel/compat_exec_domain.c
+++ b/arch/s390/kernel/compat_exec_domain.c
@@ -26,4 +26,4 @@ static int __init s390_init (void)
 	return 0;
 }
 
-__initcall(s390_init);
+device_initcall(s390_init);
diff --git a/arch/s390/kernel/ipl.c b/arch/s390/kernel/ipl.c
index 7eedbbc..19906a7 100644
--- a/arch/s390/kernel/ipl.c
+++ b/arch/s390/kernel/ipl.c
@@ -1806,7 +1806,7 @@ static int __init s390_ipl_init(void)
 	return 0;
 }
 
-__initcall(s390_ipl_init);
+device_initcall(s390_ipl_init);
 
 static void __init strncpy_skip_quote(char *dst, char *src, int n)
 {
diff --git a/arch/s390/kernel/topology.c b/arch/s390/kernel/topology.c
index 14ef6f0..1a1d7ee 100644
--- a/arch/s390/kernel/topology.c
+++ b/arch/s390/kernel/topology.c
@@ -291,7 +291,7 @@ out:
 	update_cpu_core_map();
 	return rc;
 }
-__initcall(init_topology_update);
+device_initcall(init_topology_update);
 
 void __init s390_init_cpu_topology(void)
 {
diff --git a/arch/sh/boards/board-edosk7760.c b/arch/sh/boards/board-edosk7760.c
index 35dc099..f47ac82 100644
--- a/arch/sh/boards/board-edosk7760.c
+++ b/arch/sh/boards/board-edosk7760.c
@@ -182,7 +182,7 @@ static int __init init_edosk7760_devices(void)
 	return platform_add_devices(edosk7760_devices,
 				    ARRAY_SIZE(edosk7760_devices));
 }
-__initcall(init_edosk7760_devices);
+device_initcall(init_edosk7760_devices);
 
 /*
  * The Machine Vector
diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c
index fe7e686..ee65ff0 100644
--- a/arch/sh/boards/board-sh7785lcr.c
+++ b/arch/sh/boards/board-sh7785lcr.c
@@ -284,7 +284,7 @@ static int __init sh7785lcr_devices_setup(void)
 	return platform_add_devices(sh7785lcr_devices,
 				    ARRAY_SIZE(sh7785lcr_devices));
 }
-__initcall(sh7785lcr_devices_setup);
+device_initcall(sh7785lcr_devices_setup);
 
 /* Initialize IRQ setting */
 void __init init_sh7785lcr_IRQ(void)
diff --git a/arch/sh/boards/mach-cayman/setup.c b/arch/sh/boards/mach-cayman/setup.c
index 7e8216a..e89e8e1 100644
--- a/arch/sh/boards/mach-cayman/setup.c
+++ b/arch/sh/boards/mach-cayman/setup.c
@@ -165,7 +165,7 @@ static int __init smsc_superio_setup(void)
 
 	return 0;
 }
-__initcall(smsc_superio_setup);
+device_initcall(smsc_superio_setup);
 
 static void __iomem *cayman_ioport_map(unsigned long port, unsigned int len)
 {
diff --git a/arch/sh/boards/mach-landisk/setup.c b/arch/sh/boards/mach-landisk/setup.c
index 50337ac..62f26f4 100644
--- a/arch/sh/boards/mach-landisk/setup.c
+++ b/arch/sh/boards/mach-landisk/setup.c
@@ -83,7 +83,7 @@ static int __init landisk_devices_setup(void)
 				    ARRAY_SIZE(landisk_devices));
 }
 
-__initcall(landisk_devices_setup);
+device_initcall(landisk_devices_setup);
 
 static void __init landisk_setup(char **cmdline_p)
 {
diff --git a/arch/sh/boards/mach-r2d/setup.c b/arch/sh/boards/mach-r2d/setup.c
index b84df6a..4b98a52 100644
--- a/arch/sh/boards/mach-r2d/setup.c
+++ b/arch/sh/boards/mach-r2d/setup.c
@@ -258,7 +258,7 @@ static int __init rts7751r2d_devices_setup(void)
 	return platform_add_devices(rts7751r2d_devices,
 				    ARRAY_SIZE(rts7751r2d_devices));
 }
-__initcall(rts7751r2d_devices_setup);
+device_initcall(rts7751r2d_devices_setup);
 
 static void rts7751r2d_power_off(void)
 {
diff --git a/arch/sh/boards/mach-sdk7786/setup.c b/arch/sh/boards/mach-sdk7786/setup.c
index f094ea2..ddcc73d 100644
--- a/arch/sh/boards/mach-sdk7786/setup.c
+++ b/arch/sh/boards/mach-sdk7786/setup.c
@@ -132,7 +132,7 @@ static int __init sdk7786_devices_setup(void)
 
 	return sdk7786_i2c_setup();
 }
-__initcall(sdk7786_devices_setup);
+device_initcall(sdk7786_devices_setup);
 
 static int sdk7786_mode_pins(void)
 {
diff --git a/arch/sh/boards/mach-se/7206/setup.c b/arch/sh/boards/mach-se/7206/setup.c
index 8f5c65d..91d0823 100644
--- a/arch/sh/boards/mach-se/7206/setup.c
+++ b/arch/sh/boards/mach-se/7206/setup.c
@@ -77,7 +77,7 @@ static int __init se7206_devices_setup(void)
 {
 	return platform_add_devices(se7206_devices, ARRAY_SIZE(se7206_devices));
 }
-__initcall(se7206_devices_setup);
+device_initcall(se7206_devices_setup);
 
 /*
  * The Machine Vector
diff --git a/arch/sh/boards/mach-se/7751/setup.c b/arch/sh/boards/mach-se/7751/setup.c
index 5057251..69e1479 100644
--- a/arch/sh/boards/mach-se/7751/setup.c
+++ b/arch/sh/boards/mach-se/7751/setup.c
@@ -48,7 +48,7 @@ static int __init se7751_devices_setup(void)
 {
 	return platform_add_devices(se7751_devices, ARRAY_SIZE(se7751_devices));
 }
-__initcall(se7751_devices_setup);
+device_initcall(se7751_devices_setup);
 
 /*
  * The Machine Vector
diff --git a/arch/sh/boards/mach-sh03/setup.c b/arch/sh/boards/mach-sh03/setup.c
index af4a0c0..d4f79b2 100644
--- a/arch/sh/boards/mach-sh03/setup.c
+++ b/arch/sh/boards/mach-sh03/setup.c
@@ -96,7 +96,7 @@ static int __init sh03_devices_setup(void)
 
 	return platform_add_devices(sh03_devices, ARRAY_SIZE(sh03_devices));
 }
-__initcall(sh03_devices_setup);
+device_initcall(sh03_devices_setup);
 
 static struct sh_machine_vector mv_sh03 __initmv = {
 	.mv_name		= "Interface (CTP/PCI-SH03)",
diff --git a/arch/sh/kernel/traps_64.c b/arch/sh/kernel/traps_64.c
index e3f92eb..0868d8d 100644
--- a/arch/sh/kernel/traps_64.c
+++ b/arch/sh/kernel/traps_64.c
@@ -923,7 +923,7 @@ static int __init init_sysctl(void)
 	return 0;
 }
 
-__initcall(init_sysctl);
+device_initcall(init_sysctl);
 
 
 asmlinkage void do_debug_interrupt(unsigned long code, struct pt_regs *regs)
diff --git a/arch/sparc/kernel/apc.c b/arch/sparc/kernel/apc.c
index 71ec90b..768b51b 100644
--- a/arch/sparc/kernel/apc.c
+++ b/arch/sparc/kernel/apc.c
@@ -188,4 +188,4 @@ static int __init apc_init(void)
  * and is easiest to ioremap when SBus is already
  * initialized, so we install ourselves thusly:
  */
-__initcall(apc_init);
+device_initcall(apc_init);
diff --git a/arch/sparc/kernel/audit.c b/arch/sparc/kernel/audit.c
index 8fff0ac..4be9a78 100644
--- a/arch/sparc/kernel/audit.c
+++ b/arch/sparc/kernel/audit.c
@@ -80,4 +80,4 @@ static int __init audit_classes_init(void)
 	return 0;
 }
 
-__initcall(audit_classes_init);
+device_initcall(audit_classes_init);
diff --git a/arch/sparc/kernel/mdesc.c b/arch/sparc/kernel/mdesc.c
index cdc91d9..0fb5a9c 100644
--- a/arch/sparc/kernel/mdesc.c
+++ b/arch/sparc/kernel/mdesc.c
@@ -903,7 +903,7 @@ static int __init mdesc_misc_init(void)
 	return misc_register(&mdesc_misc);
 }
 
-__initcall(mdesc_misc_init);
+device_initcall(mdesc_misc_init);
 
 void __init sun4v_mdesc_init(void)
 {
diff --git a/arch/sparc/kernel/pmc.c b/arch/sparc/kernel/pmc.c
index 5e4563d..74a99b5 100644
--- a/arch/sparc/kernel/pmc.c
+++ b/arch/sparc/kernel/pmc.c
@@ -93,4 +93,4 @@ static int __init pmc_init(void)
  * and is easiest to ioremap when SBus is already
  * initialized, so we install ourselves thusly:
  */
-__initcall(pmc_init);
+device_initcall(pmc_init);
diff --git a/arch/um/drivers/mconsole_kern.c b/arch/um/drivers/mconsole_kern.c
index de317d0..c55fa3a 100644
--- a/arch/um/drivers/mconsole_kern.c
+++ b/arch/um/drivers/mconsole_kern.c
@@ -493,7 +493,7 @@ static int __init mem_mc_init(void)
 	return 0;
 }
 
-__initcall(mem_mc_init);
+device_initcall(mem_mc_init);
 
 #define CONFIG_BUF_SIZE 64
 
@@ -816,7 +816,7 @@ static int __init mconsole_init(void)
 	return 1;
 }
 
-__initcall(mconsole_init);
+device_initcall(mconsole_init);
 
 static ssize_t mconsole_proc_write(struct file *file,
 		const char __user *buffer, size_t count, loff_t *pos)
@@ -873,7 +873,7 @@ void unlock_notify(void)
 	spin_unlock(&notify_spinlock);
 }
 
-__initcall(create_proc_mconsole);
+device_initcall(create_proc_mconsole);
 
 #define NOTIFY "notify:"
 
@@ -923,7 +923,7 @@ static int add_notifier(void)
 	return 0;
 }
 
-__initcall(add_notifier);
+device_initcall(add_notifier);
 
 char *mconsole_notify_socket(void)
 {
diff --git a/arch/um/drivers/net_kern.c b/arch/um/drivers/net_kern.c
index a74245a..3864903 100644
--- a/arch/um/drivers/net_kern.c
+++ b/arch/um/drivers/net_kern.c
@@ -824,7 +824,7 @@ static int uml_net_init(void)
 	return 0;
 }
 
-__initcall(uml_net_init);
+device_initcall(uml_net_init);
 
 static void close_devices(void)
 {
diff --git a/arch/um/drivers/stderr_console.c b/arch/um/drivers/stderr_console.c
index d07a97f..29eb7ce 100644
--- a/arch/um/drivers/stderr_console.c
+++ b/arch/um/drivers/stderr_console.c
@@ -59,4 +59,4 @@ static int __init unregister_stderr(void)
 	return 0;
 }
 
-__initcall(unregister_stderr);
+device_initcall(unregister_stderr);
diff --git a/arch/um/drivers/ubd_kern.c b/arch/um/drivers/ubd_kern.c
index c1ff690..d5de090 100644
--- a/arch/um/drivers/ubd_kern.c
+++ b/arch/um/drivers/ubd_kern.c
@@ -1010,7 +1010,7 @@ static int __init ubd_mc_init(void)
 	return 0;
 }
 
-__initcall(ubd_mc_init);
+device_initcall(ubd_mc_init);
 
 static int __init ubd0_init(void)
 {
@@ -1024,7 +1024,7 @@ static int __init ubd0_init(void)
 	return 0;
 }
 
-__initcall(ubd0_init);
+device_initcall(ubd0_init);
 
 /* Used in ubd_init, which is an initcall */
 static struct platform_driver ubd_driver = {
diff --git a/arch/um/kernel/exitcode.c b/arch/um/kernel/exitcode.c
index 829df49..cb05ff8 100644
--- a/arch/um/kernel/exitcode.c
+++ b/arch/um/kernel/exitcode.c
@@ -75,4 +75,4 @@ static int make_proc_exitcode(void)
 	return 0;
 }
 
-__initcall(make_proc_exitcode);
+device_initcall(make_proc_exitcode);
diff --git a/arch/um/kernel/physmem.c b/arch/um/kernel/physmem.c
index a1a9090..87537f0 100644
--- a/arch/um/kernel/physmem.c
+++ b/arch/um/kernel/physmem.c
@@ -209,4 +209,4 @@ static int setup_iomem(void)
 	return 0;
 }
 
-__initcall(setup_iomem);
+device_initcall(setup_iomem);
diff --git a/arch/um/os-Linux/aio.c b/arch/um/os-Linux/aio.c
index 57e3d46..337437e 100644
--- a/arch/um/os-Linux/aio.c
+++ b/arch/um/os-Linux/aio.c
@@ -343,13 +343,13 @@ static int init_aio(void)
 }
 
 /*
- * The reason for the __initcall/__uml_exitcall asymmetry is that init_aio
+ * The reason for the device_initcall/__uml_exitcall asymmetry is that init_aio
  * needs to be called when the kernel is running because it calls run_helper,
  * which needs get_free_page.  exit_aio is a __uml_exitcall because the generic
  * kernel does not run __exitcalls on shutdown, and can't because many of them
  * break when called outside of module unloading.
  */
-__initcall(init_aio);
+device_initcall(init_aio);
 
 static void exit_aio(void)
 {
diff --git a/arch/um/os-Linux/skas/mem.c b/arch/um/os-Linux/skas/mem.c
index d261f17..a0a816a 100644
--- a/arch/um/os-Linux/skas/mem.c
+++ b/arch/um/os-Linux/skas/mem.c
@@ -46,7 +46,7 @@ static int __init init_syscall_regs(void)
 	return 0;
 }
 
-__initcall(init_syscall_regs);
+device_initcall(init_syscall_regs);
 
 extern int proc_mm;
 
diff --git a/arch/um/os-Linux/skas/process.c b/arch/um/os-Linux/skas/process.c
index d6e0a22..25ef142 100644
--- a/arch/um/os-Linux/skas/process.c
+++ b/arch/um/os-Linux/skas/process.c
@@ -473,7 +473,7 @@ static int __init init_thread_regs(void)
 	return 0;
 }
 
-__initcall(init_thread_regs);
+device_initcall(init_thread_regs);
 
 int copy_context_skas0(unsigned long new_stack, int pid)
 {
diff --git a/arch/um/os-Linux/umid.c b/arch/um/os-Linux/umid.c
index a27defb..23f7b37 100644
--- a/arch/um/os-Linux/umid.c
+++ b/arch/um/os-Linux/umid.c
@@ -326,7 +326,7 @@ static int __init make_umid_init(void)
 	return 0;
 }
 
-__initcall(make_umid_init);
+device_initcall(make_umid_init);
 
 int __init umid_file_name(char *name, char *buf, int len)
 {
diff --git a/arch/um/sys-i386/tls.c b/arch/um/sys-i386/tls.c
index c6c7131..b285fd7 100644
--- a/arch/um/sys-i386/tls.c
+++ b/arch/um/sys-i386/tls.c
@@ -393,4 +393,4 @@ static int __init __setup_host_supports_tls(void)
 	return 0;
 }
 
-__initcall(__setup_host_supports_tls);
+device_initcall(__setup_host_supports_tls);
diff --git a/arch/x86/kernel/audit_64.c b/arch/x86/kernel/audit_64.c
index 06d3e5a..bab6ddc 100644
--- a/arch/x86/kernel/audit_64.c
+++ b/arch/x86/kernel/audit_64.c
@@ -78,4 +78,4 @@ static int __init audit_classes_init(void)
 	return 0;
 }
 
-__initcall(audit_classes_init);
+device_initcall(audit_classes_init);
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c
index 364d015..eb71685 100644
--- a/arch/x86/kernel/tlb_uv.c
+++ b/arch/x86/kernel/tlb_uv.c
@@ -860,5 +860,5 @@ static int __init uv_bau_init(void)
 
 	return 0;
 }
-__initcall(uv_bau_init);
-__initcall(uv_ptc_init);
+device_initcall(uv_bau_init);
+device_initcall(uv_ptc_init);
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c
index 1c0c6ab..df45aaf 100644
--- a/arch/x86/kernel/vsyscall_64.c
+++ b/arch/x86/kernel/vsyscall_64.c
@@ -244,7 +244,7 @@ static ctl_table kernel_root_table2[] = {
 };
 #endif
 
-/* Assume __initcall executes before all user space. Hopefully kmod
+/* Assume device_initcall executes before all user space. Hopefully kmod
    doesn't violate that. We'll find out if it does. */
 static void __cpuinit vsyscall_set_cpu(int cpu)
 {
@@ -306,4 +306,4 @@ static int __init vsyscall_init(void)
 	return 0;
 }
 
-__initcall(vsyscall_init);
+device_initcall(vsyscall_init);
diff --git a/arch/x86/mm/dump_pagetables.c b/arch/x86/mm/dump_pagetables.c
index a725b7f..a84535d 100644
--- a/arch/x86/mm/dump_pagetables.c
+++ b/arch/x86/mm/dump_pagetables.c
@@ -349,7 +349,7 @@ static int pt_dump_init(void)
 	return 0;
 }
 
-__initcall(pt_dump_init);
+device_initcall(pt_dump_init);
 MODULE_LICENSE("GPL");
 MODULE_AUTHOR("Arjan van de Ven <arjan@linux.intel.com>");
 MODULE_DESCRIPTION("Kernel debugging helper that dumps pagetables");
diff --git a/arch/x86/vdso/vdso32-setup.c b/arch/x86/vdso/vdso32-setup.c
index 02b442e..6c73b85 100644
--- a/arch/x86/vdso/vdso32-setup.c
+++ b/arch/x86/vdso/vdso32-setup.c
@@ -374,7 +374,7 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
 
 #ifdef CONFIG_X86_64
 
-__initcall(sysenter_setup);
+device_initcall(sysenter_setup);
 
 #ifdef CONFIG_SYSCTL
 /* Register vsyscall32 into the ABI table */
@@ -405,7 +405,7 @@ static __init int ia32_binfmt_init(void)
 	register_sysctl_table(abi_root_table2);
 	return 0;
 }
-__initcall(ia32_binfmt_init);
+device_initcall(ia32_binfmt_init);
 #endif
 
 #else  /* CONFIG_X86_32 */
diff --git a/arch/x86/vdso/vma.c b/arch/x86/vdso/vma.c
index 21e1aeb..860addc 100644
--- a/arch/x86/vdso/vma.c
+++ b/arch/x86/vdso/vma.c
@@ -73,7 +73,7 @@ static int __init init_vdso_vars(void)
 	vdso_enabled = 0;
 	return -ENOMEM;
 }
-__initcall(init_vdso_vars);
+device_initcall(init_vdso_vars);
 
 struct linux_binprm;
 
diff --git a/arch/xtensa/platforms/iss/console.c b/arch/xtensa/platforms/iss/console.c
index e60a1f5..cdf1715 100644
--- a/arch/xtensa/platforms/iss/console.c
+++ b/arch/xtensa/platforms/iss/console.c
@@ -248,7 +248,7 @@ static __exit void rs_exit(void)
 }
 
 
-/* We use `late_initcall' instead of just `__initcall' as a workaround for
+/* We use `late_initcall' instead of just `device_initcall' as a workaround for
  * the fact that (1) simcons_tty_init can't be called before tty_init,
  * (2) tty_init is called via `module_init', (3) if statically linked,
  * module_init == device_init, and (4) there's no ordering of init lists.
diff --git a/drivers/net/arm/am79c961a.c b/drivers/net/arm/am79c961a.c
index f1f58c5..cc2c734 100644
--- a/drivers/net/arm/am79c961a.c
+++ b/drivers/net/arm/am79c961a.c
@@ -775,4 +775,4 @@ static int __init am79c961_init(void)
 	return platform_driver_register(&am79c961_driver);
 }
 
-__initcall(am79c961_init);
+device_initcall(am79c961_init);
diff --git a/drivers/net/hamradio/baycom_epp.c b/drivers/net/hamradio/baycom_epp.c
index a3c0dc9..fc6f80e 100644
--- a/drivers/net/hamradio/baycom_epp.c
+++ b/drivers/net/hamradio/baycom_epp.c
@@ -35,6 +35,7 @@
  *                    removed some pre-2.2 kernel compatibility cruft
  *   0.6  10.08.1999  Check if parport can do SPP and is safe to access during interrupt contexts
  *   0.7  12.02.2000  adapted to softnet driver interface
+ *   0.8  03.18.2010  update deprecated __initcall to device_initcall
  *
  */
 
diff --git a/drivers/net/hamradio/baycom_par.c b/drivers/net/hamradio/baycom_par.c
index 5f5af9a..f2ddffa 100644
--- a/drivers/net/hamradio/baycom_par.c
+++ b/drivers/net/hamradio/baycom_par.c
@@ -64,6 +64,7 @@
  *   0.8  12.02.2000  adapted to softnet driver interface
  *                    removed direct parport access, uses parport driver methods
  *   0.9  03.07.2000  fix interface name handling
+ *   0.10 03.18.2010  update deprecated __initcall to device_initcall
  */
 
 /*****************************************************************************/
diff --git a/drivers/net/hamradio/baycom_ser_fdx.c b/drivers/net/hamradio/baycom_ser_fdx.c
index 0cab992..d90ad93 100644
--- a/drivers/net/hamradio/baycom_ser_fdx.c
+++ b/drivers/net/hamradio/baycom_ser_fdx.c
@@ -67,6 +67,7 @@
  *   0.8  10.08.1999  use module_init/module_exit
  *   0.9  12.02.2000  adapted to softnet driver interface
  *   0.10 03.07.2000  fix interface name handling
+ *   0.11 03.18.2010  update deprecated __initcall to device_initcall
  */
 
 /*****************************************************************************/
diff --git a/drivers/net/hamradio/baycom_ser_hdx.c b/drivers/net/hamradio/baycom_ser_hdx.c
index 1686f6d..3033cae 100644
--- a/drivers/net/hamradio/baycom_ser_hdx.c
+++ b/drivers/net/hamradio/baycom_ser_hdx.c
@@ -57,6 +57,7 @@
  *   0.8  10.08.1999  use module_init/module_exit
  *   0.9  12.02.2000  adapted to softnet driver interface
  *   0.10 03.07.2000  fix interface name handling
+ *   0.11 03.18.2010  update deprecated __initcall to device_initcall
  */
 
 /*****************************************************************************/
diff --git a/drivers/s390/char/sclp_cmd.c b/drivers/s390/char/sclp_cmd.c
index b3beab6..642b3bf 100644
--- a/drivers/s390/char/sclp_cmd.c
+++ b/drivers/s390/char/sclp_cmd.c
@@ -628,7 +628,7 @@ out:
 	free_page((unsigned long) sccb);
 	return rc;
 }
-__initcall(sclp_detect_standby_memory);
+device_initcall(sclp_detect_standby_memory);
 
 #endif /* CONFIG_MEMORY_HOTPLUG */
 
diff --git a/drivers/s390/char/sclp_config.c b/drivers/s390/char/sclp_config.c
index b497afe..c257eb3 100644
--- a/drivers/s390/char/sclp_config.c
+++ b/drivers/s390/char/sclp_config.c
@@ -87,4 +87,4 @@ static int __init sclp_conf_init(void)
 	return rc;
 }
 
-__initcall(sclp_conf_init);
+device_initcall(sclp_conf_init);
diff --git a/drivers/s390/char/sclp_cpi_sys.c b/drivers/s390/char/sclp_cpi_sys.c
index 62c2647..1ebb83c 100644
--- a/drivers/s390/char/sclp_cpi_sys.c
+++ b/drivers/s390/char/sclp_cpi_sys.c
@@ -426,4 +426,4 @@ static int __init cpi_init(void)
 	return rc;
 }
 
-__initcall(cpi_init);
+device_initcall(cpi_init);
diff --git a/drivers/s390/char/sclp_vt220.c b/drivers/s390/char/sclp_vt220.c
index 3796ffd..deff553 100644
--- a/drivers/s390/char/sclp_vt220.c
+++ b/drivers/s390/char/sclp_vt220.c
@@ -707,7 +707,7 @@ out_driver:
 	put_tty_driver(driver);
 	return rc;
 }
-__initcall(sclp_vt220_tty_init);
+device_initcall(sclp_vt220_tty_init);
 
 static void __sclp_vt220_flush_buffer(void)
 {
diff --git a/drivers/s390/cio/blacklist.c b/drivers/s390/cio/blacklist.c
index 7eab9ab..363fd02 100644
--- a/drivers/s390/cio/blacklist.c
+++ b/drivers/s390/cio/blacklist.c
@@ -398,6 +398,6 @@ cio_ignore_proc_init (void)
 	return 0;
 }
 
-__initcall (cio_ignore_proc_init);
+device_initcall(cio_ignore_proc_init);
 
 #endif /* CONFIG_PROC_FS */
diff --git a/drivers/staging/rtl8192u/ieee80211/api.c b/drivers/staging/rtl8192u/ieee80211/api.c
index c627d02..156d867 100644
--- a/drivers/staging/rtl8192u/ieee80211/api.c
+++ b/drivers/staging/rtl8192u/ieee80211/api.c
@@ -229,7 +229,7 @@ static int __init init_crypto(void)
 	return 0;
 }
 
-__initcall(init_crypto);
+device_initcall(init_crypto);
 
 /*
 EXPORT_SYMBOL_GPL(crypto_register_alg);
diff --git a/fs/aio.c b/fs/aio.c
index 1cf12b3..80ddf44 100644
--- a/fs/aio.c
+++ b/fs/aio.c
@@ -92,7 +92,7 @@ static int __init aio_setup(void)
 
 	return 0;
 }
-__initcall(aio_setup);
+device_initcall(aio_setup);
 
 static void aio_free_ring(struct kioctx *ctx)
 {
diff --git a/fs/compat_ioctl.c b/fs/compat_ioctl.c
index 6d55b61..b579a82 100644
--- a/fs/compat_ioctl.c
+++ b/fs/compat_ioctl.c
@@ -1780,4 +1780,4 @@ static int __init init_sys32_ioctl(void)
 		init_sys32_ioctl_cmp, NULL);
 	return 0;
 }
-__initcall(init_sys32_ioctl);
+device_initcall(init_sys32_ioctl);
diff --git a/ipc/ipc_sysctl.c b/ipc/ipc_sysctl.c
index 56410fa..3d59d44 100644
--- a/ipc/ipc_sysctl.c
+++ b/ipc/ipc_sysctl.c
@@ -209,4 +209,4 @@ static int __init ipc_sysctl_init(void)
 	return 0;
 }
 
-__initcall(ipc_sysctl_init);
+device_initcall(ipc_sysctl_init);
diff --git a/ipc/mqueue.c b/ipc/mqueue.c
index e4e3f04..c58ca57 100644
--- a/ipc/mqueue.c
+++ b/ipc/mqueue.c
@@ -1322,4 +1322,4 @@ out_sysctl:
 	return error;
 }
 
-__initcall(init_mqueue_fs);
+device_initcall(init_mqueue_fs);
diff --git a/ipc/util.c b/ipc/util.c
index 79ce84e..d82ec6c 100644
--- a/ipc/util.c
+++ b/ipc/util.c
@@ -106,7 +106,7 @@ static int __init ipc_init(void)
 	register_ipcns_notifier(&init_ipc_ns);
 	return 0;
 }
-__initcall(ipc_init);
+device_initcall(ipc_init);
 
 /**
  *	ipc_init_ids		-	initialise IPC identifiers
diff --git a/kernel/audit.c b/kernel/audit.c
index 78f7f86..d489f47 100644
--- a/kernel/audit.c
+++ b/kernel/audit.c
@@ -989,7 +989,7 @@ static int __init audit_init(void)
 
 	return 0;
 }
-__initcall(audit_init);
+device_initcall(audit_init);
 
 /* Process kernel command-line parameter at boot time.  audit=0 or audit=1. */
 static int __init audit_enable(char *str)
diff --git a/kernel/audit_tree.c b/kernel/audit_tree.c
index 028e856..e54d2c6 100644
--- a/kernel/audit_tree.c
+++ b/kernel/audit_tree.c
@@ -919,4 +919,4 @@ static int __init audit_tree_init(void)
 
 	return 0;
 }
-__initcall(audit_tree_init);
+device_initcall(audit_tree_init);
diff --git a/kernel/dma.c b/kernel/dma.c
index f903189..b54e161 100644
--- a/kernel/dma.c
+++ b/kernel/dma.c
@@ -153,7 +153,7 @@ static int __init proc_dma_init(void)
 	return 0;
 }
 
-__initcall(proc_dma_init);
+device_initcall(proc_dma_init);
 #endif
 
 EXPORT_SYMBOL(request_dma);
diff --git a/kernel/futex.c b/kernel/futex.c
index e7a35f1..94efb8c 100644
--- a/kernel/futex.c
+++ b/kernel/futex.c
@@ -2670,4 +2670,4 @@ static int __init futex_init(void)
 
 	return 0;
 }
-__initcall(futex_init);
+device_initcall(futex_init);
diff --git a/kernel/lockdep_proc.c b/kernel/lockdep_proc.c
index d4aba4f..a4088c9 100644
--- a/kernel/lockdep_proc.c
+++ b/kernel/lockdep_proc.c
@@ -687,5 +687,5 @@ static int __init lockdep_proc_init(void)
 	return 0;
 }
 
-__initcall(lockdep_proc_init);
+device_initcall(lockdep_proc_init);
 
diff --git a/kernel/pid_namespace.c b/kernel/pid_namespace.c
index 79aac93..2c7b5e7 100644
--- a/kernel/pid_namespace.c
+++ b/kernel/pid_namespace.c
@@ -189,4 +189,4 @@ static __init int pid_namespaces_init(void)
 	return 0;
 }
 
-__initcall(pid_namespaces_init);
+device_initcall(pid_namespaces_init);
diff --git a/kernel/posix-cpu-timers.c b/kernel/posix-cpu-timers.c
index 1a22dfd..036d64e 100644
--- a/kernel/posix-cpu-timers.c
+++ b/kernel/posix-cpu-timers.c
@@ -1727,4 +1727,4 @@ static __init int init_posix_cpu_timers(void)
 
 	return 0;
 }
-__initcall(init_posix_cpu_timers);
+device_initcall(init_posix_cpu_timers);
diff --git a/kernel/posix-timers.c b/kernel/posix-timers.c
index 00d1fda..e8c2d04 100644
--- a/kernel/posix-timers.c
+++ b/kernel/posix-timers.c
@@ -309,7 +309,7 @@ static __init int init_posix_timers(void)
 	return 0;
 }
 
-__initcall(init_posix_timers);
+device_initcall(init_posix_timers);
 
 static void schedule_next_timer(struct k_itimer *timr)
 {
diff --git a/kernel/resource.c b/kernel/resource.c
index 2d5be5d..e678177 100644
--- a/kernel/resource.c
+++ b/kernel/resource.c
@@ -136,7 +136,7 @@ static int __init ioresources_init(void)
 	proc_create("iomem", 0, NULL, &proc_iomem_operations);
 	return 0;
 }
-__initcall(ioresources_init);
+device_initcall(ioresources_init);
 
 #endif /* CONFIG_PROC_FS */
 
diff --git a/kernel/sched_debug.c b/kernel/sched_debug.c
index 67f95aa..c17988b 100644
--- a/kernel/sched_debug.c
+++ b/kernel/sched_debug.c
@@ -379,7 +379,7 @@ static int __init init_sched_debug_procfs(void)
 	return 0;
 }
 
-__initcall(init_sched_debug_procfs);
+device_initcall(init_sched_debug_procfs);
 
 void proc_sched_show_task(struct task_struct *p, struct seq_file *m)
 {
diff --git a/kernel/time/timer_list.c b/kernel/time/timer_list.c
index bdfb8dd..962b3b2 100644
--- a/kernel/time/timer_list.c
+++ b/kernel/time/timer_list.c
@@ -296,4 +296,4 @@ static int __init init_timer_list_procfs(void)
 		return -ENOMEM;
 	return 0;
 }
-__initcall(init_timer_list_procfs);
+device_initcall(init_timer_list_procfs);
diff --git a/kernel/time/timer_stats.c b/kernel/time/timer_stats.c
index 2f3b585..517552b 100644
--- a/kernel/time/timer_stats.c
+++ b/kernel/time/timer_stats.c
@@ -422,4 +422,4 @@ static int __init init_tstats_procfs(void)
 		return -ENOMEM;
 	return 0;
 }
-__initcall(init_tstats_procfs);
+device_initcall(init_tstats_procfs);
diff --git a/kernel/tracepoint.c b/kernel/tracepoint.c
index cc89be5..c4d12e8 100644
--- a/kernel/tracepoint.c
+++ b/kernel/tracepoint.c
@@ -580,7 +580,7 @@ static int init_tracepoints(void)
 {
 	return register_module_notifier(&tracepoint_module_nb);
 }
-__initcall(init_tracepoints);
+device_initcall(init_tracepoints);
 
 #endif /* CONFIG_MODULES */
 
diff --git a/kernel/utsname_sysctl.c b/kernel/utsname_sysctl.c
index a2cd77e..7cbb001 100644
--- a/kernel/utsname_sysctl.c
+++ b/kernel/utsname_sysctl.c
@@ -111,4 +111,4 @@ static int __init utsname_sysctl_init(void)
 	return 0;
 }
 
-__initcall(utsname_sysctl_init);
+device_initcall(utsname_sysctl_init);
diff --git a/lib/audit.c b/lib/audit.c
index 8e7dc1c..26f41a9 100644
--- a/lib/audit.c
+++ b/lib/audit.c
@@ -63,4 +63,4 @@ static int __init audit_classes_init(void)
 	return 0;
 }
 
-__initcall(audit_classes_init);
+device_initcall(audit_classes_init);
diff --git a/lib/debugobjects.c b/lib/debugobjects.c
index a9a8996..ee41495 100644
--- a/lib/debugobjects.c
+++ b/lib/debugobjects.c
@@ -666,7 +666,7 @@ err:
 
 	return -ENOMEM;
 }
-__initcall(debug_objects_init_debugfs);
+device_initcall(debug_objects_init_debugfs);
 
 #else
 static inline void debug_objects_init_debugfs(void) { }
diff --git a/mm/bounce.c b/mm/bounce.c
index a2b76a5..b6df140 100644
--- a/mm/bounce.c
+++ b/mm/bounce.c
@@ -39,7 +39,7 @@ static __init int init_emergency_pool(void)
 	return 0;
 }
 
-__initcall(init_emergency_pool);
+device_initcall(init_emergency_pool);
 
 /*
  * highmem version, map in to vec
diff --git a/mm/memory.c b/mm/memory.c
index 5b7f200..b39f34e 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -3231,7 +3231,7 @@ static int __init gate_vma_init(void)
 	gate_vma.vm_flags |= VM_ALWAYSDUMP;
 	return 0;
 }
-__initcall(gate_vma_init);
+device_initcall(gate_vma_init);
 #endif
 
 struct vm_area_struct *get_gate_vma(struct task_struct *tsk)
diff --git a/mm/mm_init.c b/mm/mm_init.c
index 4e0e265..6586ce5 100644
--- a/mm/mm_init.c
+++ b/mm/mm_init.c
@@ -149,4 +149,4 @@ static int __init mm_sysfs_init(void)
 	return 0;
 }
 
-__initcall(mm_sysfs_init);
+device_initcall(mm_sysfs_init);
diff --git a/mm/slab.c b/mm/slab.c
index a9f325b..891218c 100644
--- a/mm/slab.c
+++ b/mm/slab.c
@@ -1597,7 +1597,7 @@ static int __init cpucache_init(void)
 		start_cpu_timer(cpu);
 	return 0;
 }
-__initcall(cpucache_init);
+device_initcall(cpucache_init);
 
 /*
  * Interface to system's page allocator. No need to hold the cache-lock.
diff --git a/mm/slub.c b/mm/slub.c
index b364844..a048aa5 100644
--- a/mm/slub.c
+++ b/mm/slub.c
@@ -4577,7 +4577,7 @@ static int __init slab_sysfs_init(void)
 	return 0;
 }
 
-__initcall(slab_sysfs_init);
+device_initcall(slab_sysfs_init);
 #endif
 
 /*
diff --git a/mm/swapfile.c b/mm/swapfile.c
index 6cd0a8f..c1e2b6d 100644
--- a/mm/swapfile.c
+++ b/mm/swapfile.c
@@ -1764,7 +1764,7 @@ static int __init procswaps_init(void)
 	proc_create("swaps", 0, NULL, &proc_swaps_operations);
 	return 0;
 }
-__initcall(procswaps_init);
+device_initcall(procswaps_init);
 #endif /* CONFIG_PROC_FS */
 
 #ifdef MAX_SWAPFILES_CHECK
diff --git a/net/ipv4/syncookies.c b/net/ipv4/syncookies.c
index 5c24db4..5bdd7d2 100644
--- a/net/ipv4/syncookies.c
+++ b/net/ipv4/syncookies.c
@@ -32,7 +32,7 @@ static __init int init_syncookies(void)
 	get_random_bytes(syncookie_secret, sizeof(syncookie_secret));
 	return 0;
 }
-__initcall(init_syncookies);
+device_initcall(init_syncookies);
 
 #define COOKIEBITS 24	/* Upper bits store count */
 #define COOKIEMASK (((__u32)1 << COOKIEBITS) - 1)
diff --git a/net/ipv4/sysctl_net_ipv4.c b/net/ipv4/sysctl_net_ipv4.c
index c1bc074..6e61075 100644
--- a/net/ipv4/sysctl_net_ipv4.c
+++ b/net/ipv4/sysctl_net_ipv4.c
@@ -748,4 +748,4 @@ static __init int sysctl_ipv4_init(void)
 	return 0;
 }
 
-__initcall(sysctl_ipv4_init);
+device_initcall(sysctl_ipv4_init);
diff --git a/security/keys/proc.c b/security/keys/proc.c
index 9d01021..9412316 100644
--- a/security/keys/proc.c
+++ b/security/keys/proc.c
@@ -83,7 +83,7 @@ static int __init key_proc_init(void)
 
 } /* end key_proc_init() */
 
-__initcall(key_proc_init);
+device_initcall(key_proc_init);
 
 /*****************************************************************************/
 /*
diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c
index 5feecb4..db02af5 100644
--- a/security/selinux/hooks.c
+++ b/security/selinux/hooks.c
@@ -5783,7 +5783,7 @@ out:
 	return err;
 }
 
-__initcall(selinux_nf_ip_init);
+device_initcall(selinux_nf_ip_init);
 
 #ifdef CONFIG_SECURITY_SELINUX_DISABLE
 static void selinux_nf_ip_exit(void)
diff --git a/security/selinux/netif.c b/security/selinux/netif.c
index b4e14bc..9f89a94 100644
--- a/security/selinux/netif.c
+++ b/security/selinux/netif.c
@@ -315,5 +315,5 @@ static __init int sel_netif_init(void)
 	return err;
 }
 
-__initcall(sel_netif_init);
+device_initcall(sel_netif_init);
 
diff --git a/security/selinux/netlink.c b/security/selinux/netlink.c
index 1ae5564..403b707 100644
--- a/security/selinux/netlink.c
+++ b/security/selinux/netlink.c
@@ -113,4 +113,4 @@ static int __init selnl_init(void)
 	return 0;
 }
 
-__initcall(selnl_init);
+device_initcall(selnl_init);
diff --git a/security/selinux/netnode.c b/security/selinux/netnode.c
index 7100072..e7ae484 100644
--- a/security/selinux/netnode.c
+++ b/security/selinux/netnode.c
@@ -344,4 +344,4 @@ static __init int sel_netnode_init(void)
 	return ret;
 }
 
-__initcall(sel_netnode_init);
+device_initcall(sel_netnode_init);
diff --git a/security/selinux/netport.c b/security/selinux/netport.c
index fe7fba6..94c29f4 100644
--- a/security/selinux/netport.c
+++ b/security/selinux/netport.c
@@ -278,4 +278,4 @@ static __init int sel_netport_init(void)
 	return ret;
 }
 
-__initcall(sel_netport_init);
+device_initcall(sel_netport_init);
diff --git a/security/selinux/selinuxfs.c b/security/selinux/selinuxfs.c
index cd191bb..03eb7d8 100644
--- a/security/selinux/selinuxfs.c
+++ b/security/selinux/selinuxfs.c
@@ -1730,7 +1730,7 @@ static int __init init_sel_fs(void)
 	return err;
 }
 
-__initcall(init_sel_fs);
+device_initcall(init_sel_fs);
 
 #ifdef CONFIG_SECURITY_SELINUX_DISABLE
 void exit_sel_fs(void)
diff --git a/security/selinux/ss/services.c b/security/selinux/ss/services.c
index cf27b3e..e7eb598 100644
--- a/security/selinux/ss/services.c
+++ b/security/selinux/ss/services.c
@@ -2964,7 +2964,7 @@ static int __init aurule_init(void)
 
 	return err;
 }
-__initcall(aurule_init);
+device_initcall(aurule_init);
 
 #ifdef CONFIG_NETLABEL
 /**
diff --git a/security/smack/smackfs.c b/security/smack/smackfs.c
index aeead75..8faf43e 100644
--- a/security/smack/smackfs.c
+++ b/security/smack/smackfs.c
@@ -1366,4 +1366,4 @@ static int __init init_smk_fs(void)
 	return err;
 }
 
-__initcall(init_smk_fs);
+device_initcall(init_smk_fs);
diff --git a/sound/last.c b/sound/last.c
index bdd0857..5efc26a 100644
--- a/sound/last.c
+++ b/sound/last.c
@@ -38,4 +38,4 @@ static int __init alsa_sound_last_init(void)
 	return 0;
 }
 
-__initcall(alsa_sound_last_init);
+device_initcall(alsa_sound_last_init);
-- 
1.6.5.GIT


From janr@adax.com Fri Mar 19 21:27:46 2010
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CC:     David Daney <ddaney@caviumnetworks.com>, linux-mips@linux-mips.org
Subject: Re: linux 2.6.33 on movidis x16
References: <20100305141113.GD2437@apfelkorn> <4B9EB45D.8050106@adax.com> <20100318181734.GG2437@apfelkorn> <4BA27048.2010707@caviumnetworks.com> <4BA277FB.6080808@adax.com> <20100319175244.GH2437@apfelkorn>
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Peter 'p2' De Schrijver wrote:
> Hi,
>
>   
>> You are right, it is called an x16.  My memory is failing me, I should  
>> have looked at the machine first.
>>
>>     
>
> Ok :)
>
>   
>> from dmesg:
>>
>> cavium-ethernet: Cavium Networks Octeon SDK version 1.8.1, build 294
>> Interface 0 has 4 ports (RGMII)
>> Interface 1 has 4 ports (RGMII)
>> Interface 2 has 4 ports (NPI)
>> Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
>>
>>
>> looks like the PHYAD field has what you are loohing for,
>> ethtool output: ---------------------------
>>
>> for i in 0 1 2 3 4 5 6 7; do ethtool eth$i; done
>> Settings for eth0:
>>        Supported ports: [ TP MII ]
>>        Supported link modes:   10baseT/Half 10baseT/Full
>>                                100baseT/Half 100baseT/Full
>>                                1000baseT/Half 1000baseT/Full
>>        Supports auto-negotiation: Yes
>>        Advertised link modes:  10baseT/Half 10baseT/Full
>>                                100baseT/Half 100baseT/Full
>>                                1000baseT/Half 1000baseT/Full
>>        Advertised auto-negotiation: Yes
>>        Speed: 10Mb/s
>>        Duplex: Half
>>        Port: MII
>>        PHYAD: 1
>>        Transceiver: internal
>>        Auto-negotiation: on
>>        Link detected: no
>> Settings for eth1:
>>        Supported ports: [ TP MII ]
>>        Supported link modes:   10baseT/Half 10baseT/Full
>>                                100baseT/Half 100baseT/Full
>>                                1000baseT/Half 1000baseT/Full
>>        Supports auto-negotiation: Yes
>>        Advertised link modes:  10baseT/Half 10baseT/Full
>>                                100baseT/Half 100baseT/Full
>>                                1000baseT/Half 1000baseT/Full
>>        Advertised auto-negotiation: Yes
>>        Speed: 10Mb/s
>>        Duplex: Half
>>        Port: MII
>>        PHYAD: 2
>>        Transceiver: internal
>>        Auto-negotiation: on
>>        Link detected: no
>> Settings for eth2:
>>        Supported ports: [ TP MII ]
>>        Supported link modes:   10baseT/Half 10baseT/Full
>>                                100baseT/Half 100baseT/Full
>>                                1000baseT/Half 1000baseT/Full
>>        Supports auto-negotiation: Yes
>>        Advertised link modes:  10baseT/Half 10baseT/Full
>>                                100baseT/Half 100baseT/Full
>>                                1000baseT/Half 1000baseT/Full
>>        Advertised auto-negotiation: Yes
>>        Speed: 10Mb/s
>>        Duplex: Half
>>        Port: MII
>>        PHYAD: 3
>>        Transceiver: internal
>>        Auto-negotiation: on
>>        Link detected: no
>> Settings for eth3:
>>        Supported ports: [ TP MII ]
>>        Supported link modes:   10baseT/Half 10baseT/Full
>>                                100baseT/Half 100baseT/Full
>>                                1000baseT/Half 1000baseT/Full
>>        Supports auto-negotiation: Yes
>>        Advertised link modes:  10baseT/Half 10baseT/Full
>>                                100baseT/Half 100baseT/Full
>>                                1000baseT/Half 1000baseT/Full
>>        Advertised auto-negotiation: Yes
>>        Speed: 10Mb/s
>>        Duplex: Half
>>        Port: MII
>>        PHYAD: 4
>>        Transceiver: internal
>>        Auto-negotiation: on
>>        Link detected: no
>> Settings for eth4:
>>        Supported ports: [ TP MII ]
>>        Supported link modes:   10baseT/Half 10baseT/Full
>>                                100baseT/Half 100baseT/Full
>>        Supports auto-negotiation: Yes
>>        Advertised link modes:  10baseT/Half 10baseT/Full
>>                                100baseT/Half 100baseT/Full
>>        Advertised auto-negotiation: Yes
>>        Speed: 100Mb/s
>>        Duplex: Full
>>        Port: MII
>>        PHYAD: 0
>>        Transceiver: internal
>>        Auto-negotiation: on
>>        Link detected: yes
>> Settings for eth5:
>>        Supported ports: [ TP MII ]
>>        Supported link modes:   10baseT/Half 10baseT/Full
>>                                100baseT/Half 100baseT/Full
>>        Supports auto-negotiation: Yes
>>        Advertised link modes:  10baseT/Half 10baseT/Full
>>                                100baseT/Half 100baseT/Full
>>        Advertised auto-negotiation: Yes
>>        Speed: 100Mb/s
>>        Duplex: Full
>>        Port: MII
>>        PHYAD: 0
>>        Transceiver: internal
>>        Auto-negotiation: on
>>        Link detected: yes
>> Settings for eth6:
>>        Supported ports: [ TP MII ]
>>        Supported link modes:   10baseT/Half 10baseT/Full
>>                                100baseT/Half 100baseT/Full
>>        Supports auto-negotiation: Yes
>>        Advertised link modes:  10baseT/Half 10baseT/Full
>>                                100baseT/Half 100baseT/Full
>>        Advertised auto-negotiation: Yes
>>        Speed: 100Mb/s
>>        Duplex: Full
>>        Port: MII
>>        PHYAD: 0
>>        Transceiver: internal
>>        Auto-negotiation: on
>>        Link detected: yes
>> Settings for eth7:
>>        Supported ports: [ TP MII ]
>>        Supported link modes:   10baseT/Half 10baseT/Full
>>                                100baseT/Half 100baseT/Full
>>        Supports auto-negotiation: Yes
>>        Advertised link modes:  10baseT/Half 10baseT/Full
>>                                100baseT/Half 100baseT/Full
>>        Advertised auto-negotiation: Yes
>>        Speed: 100Mb/s
>>        Duplex: Full
>>        Port: MII
>>        PHYAD: 0
>>        Transceiver: internal
>>        Auto-negotiation: on
>>        Link detected: yes
>>
>>     
>
> PHYAD 0 for ports 4 - 7 seems a bit strange to me. Do you have the sources of the
> kernel you're running on those machines ? If so, could you look at 
> int cvmx_helper_board_get_mii_address(int ipd_port) in cvmx-helper-board.c ?
> It contains a large switch statement. case CVMX_BOARD_TYPE_CUST_WSX16: is what I'm
> interested in.
>
>   
I have attached the source of  cvmx_helper_board_get_mii_address().

In looking at it, it is all coming back to me now.  I had to modify that 
function to get the Ethernet to work. The Movidis folk had a working 
kernel based on the  CaviumNetworks 1.6.X or 1.7.X toolchain.  I ported 
it up to the 1.8.1 toolchain, and had to add the 
CVMX_BOARD_TYPE_CUST_WSX16 entry to get the ethernet working, so the 
strangeness is my fault, but it got the first 4 Ehernets working. I 
thought I patterned it after what they did in their earlier kernels, but 
perhaps I never saw the Movidis mods, and just did it by trial & error. 
(it was a few years ago).  If I have a chance I will dig around to see 
if I can find the source to the origonal 1.6.1 Movidis kernel that they 
provided. 
>   
>> ----------------------------------------------------------
>> You may want to re-map the interfaces so that they show up in a sane  
>> order, there is a cluster of 8 ethernet ports, 4 per row.  Right now on  
>> our boxes , eth0 shows up on the bottom row, second  from the right.
>>     
>
> Thanks,
>
> Peter.
>   


--------------010407080309010906040908
Content-Type: text/plain;
 name="cvmx_helper_board_get_mii_address.txt"
Content-Transfer-Encoding: 7bit
Content-Disposition: inline;
 filename="cvmx_helper_board_get_mii_address.txt"


/**
 * Return the MII PHY address associated with the given IPD
 * port. A result of -1 means there isn't a MII capable PHY
 * connected to this port. On chips supporting multiple MII
 * busses the bus number is encoded in bits <15:8>.
 *
 * This function must be modified for every new Octeon board.
 * Internally it uses switch statements based on the cvmx_sysinfo
 * data to determine board types and revisions. It replies on the
 * fact that every Octeon board receives a unique board type
 * enumeration from the bootloader.
 *
 * @param ipd_port Octeon IPD port to get the MII address for.
 *
 * @return MII PHY address and bus number or -1.
 */
int cvmx_helper_board_get_mii_address(int ipd_port)
{
    switch (cvmx_sysinfo_get()->board_type)
    {
        case CVMX_BOARD_TYPE_SIM:
            /* Simulator doesn't have MII */
            return -1;
        case CVMX_BOARD_TYPE_EBT3000:
        case CVMX_BOARD_TYPE_EBT5800:
        case CVMX_BOARD_TYPE_THUNDER:
        case CVMX_BOARD_TYPE_NICPRO2:
            /* Interface 0 is SPI4, interface 1 is RGMII */
            if ((ipd_port >= 16) && (ipd_port < 20))
                return ipd_port - 16;
            else
                return -1;
        case CVMX_BOARD_TYPE_KODAMA:
        case CVMX_BOARD_TYPE_EBH3100:
        case CVMX_BOARD_TYPE_HIKARI:
        case CVMX_BOARD_TYPE_CN3010_EVB_HS5:
        case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
        case CVMX_BOARD_TYPE_CN3020_EVB_HS5:
            /* Port 0 is WAN connected to a PHY, Port 1 is GMII connected to a
                switch */
            if (ipd_port == 0)
                return 4;
            else if (ipd_port == 1)
                return 9;
            else
                return -1;
        case CVMX_BOARD_TYPE_NAC38:
            /* Board has 8 RGMII ports PHYs are 0-7 */
            if ((ipd_port >= 0) && (ipd_port < 4))
                return ipd_port;
            else if ((ipd_port >= 16) && (ipd_port < 20))
                return ipd_port - 16 + 4;
            else
                return -1;
        case CVMX_BOARD_TYPE_EBH3000:
            /* Board has dual SPI4 and no PHYs */
            return -1;
        case CVMX_BOARD_TYPE_EBH5200:
        case CVMX_BOARD_TYPE_EBH5201:
        case CVMX_BOARD_TYPE_EBT5200:
            /* Board has 4 SGMII ports. The PHYs start right after the MII
                ports MII0 = 0, MII1 = 1, SGMII = 2-5 */
            if ((ipd_port >= 0) && (ipd_port < 4))
                return ipd_port+2;
            else
                return -1;
        case CVMX_BOARD_TYPE_EBH5600:
        case CVMX_BOARD_TYPE_EBH5601:
        case CVMX_BOARD_TYPE_KBP: /* JLR first Movidis X16 */
	case CVMX_BOARD_TYPE_CUST_WSX16: /* JLR second Movidis X16 */
            /* Board has 8 SGMII ports. 4 connect out, two connect to a switch,
                and 2 loop to each other */
            if ((ipd_port >= 0) && (ipd_port < 4))
                return ipd_port+1;
            else
                return -1;
        case CVMX_BOARD_TYPE_CUST_NB5:
            if (ipd_port == 2)
                return 4;
            else
                return -1;
        case CVMX_BOARD_TYPE_NIC_XLE_4G:
            /* Board has 4 SGMII ports. connected QLM3(interface 1) */
            if ((ipd_port >= 16) && (ipd_port < 20))
                return ipd_port - 16 + 1;
            else
                return -1;
        case CVMX_BOARD_TYPE_BBGW_REF:
            return -1;  /* No PHYs are connected to Octeon, everything is through switch */
    }

    /* Some unknown board. Somebody forgot to update this function... */
    cvmx_dprintf("cvmx_helper_board_get_mii_address: Unknown board type %d\n",
                 cvmx_sysinfo_get()->board_type);
    return -1;
}



--------------010407080309010906040908--

From David.Daney@caviumnetworks.com Fri Mar 19 23:04:15 2010
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CC:     Peter 'p2' De Schrijver <p2@debian.org>, linux-mips@linux-mips.org
Subject: Re: linux 2.6.33 on movidis x16
References: <20100305141113.GD2437@apfelkorn> <4B9EB45D.8050106@adax.com> <20100318181734.GG2437@apfelkorn> <4BA27048.2010707@caviumnetworks.com> <4BA277FB.6080808@adax.com> <20100319175244.GH2437@apfelkorn> <4BA3DE2D.1070801@adax.com>
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On 03/19/2010 01:27 PM, Jan Rovins wrote:


>       case CVMX_BOARD_TYPE_KBP: /* JLR first Movidis X16 */
>	case CVMX_BOARD_TYPE_CUST_WSX16: /* JLR second Movidis X16 */
>            /* Board has 8 SGMII ports. 4 connect out, two connect to a switch,
>                and 2 loop to each other */
>            if ((ipd_port >= 0) && (ipd_port < 4))
>                return ipd_port+1;
>            else
>                return -1;

I don't think that is correct.  I just verified that that PHYs are on
addresses 0-7.  That code makes them start at 1.

The Octeon mdio bus driver also needs a small change.

I am working on a patch.

David Daney

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David Daney wrote:
> On 03/19/2010 01:27 PM, Jan Rovins wrote:
>
>
>>       case CVMX_BOARD_TYPE_KBP: /* JLR first Movidis X16 */
>>     case CVMX_BOARD_TYPE_CUST_WSX16: /* JLR second Movidis X16 */
>>            /* Board has 8 SGMII ports. 4 connect out, two connect to 
>> a switch,
>>                and 2 loop to each other */
>>            if ((ipd_port >= 0) && (ipd_port < 4))
>>                return ipd_port+1;
>>            else
>>                return -1;
>
> I don't think that is correct.  I just verified that that PHYs are on
> addresses 0-7.  That code makes them start at 1.
>
> The Octeon mdio bus driver also needs a small change.
>
> I am working on a patch.
You are most likely right.
using  ipd_port+1 is probably what made my eth0 show up on the 2nd RJ45 
port.
We were just using those boxes for early development, to verify basic 
Octeon functionality of some of our hardware drivers, so once an 
Ethernet port started working, I did not look into it any further, since 
it was a temporary setup just to get things going.

I looked for the original source from Movidis, and all I found in their 
kernel source were broken symlinks to a tool chain they that they did 
not give me :-(

Jan

>
> David Daney
>


From rdunlap@xenotime.net Fri Mar 19 23:56:31 2010
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Date:   Fri, 19 Mar 2010 15:56:21 -0700
From:   Randy Dunlap <rdunlap@xenotime.net>
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Subject: Re: [PATCH] Cosmetic:Partially remove deprecated __initcall() and
 change to
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On 03/19/10 12:51, Justin P. Mattock wrote:
> After doing some things on a small issue,
> I noticed through web surfing, that there were patches
> submitted pertaining that __initcall is deprecated,
> and device_initcall should be used.

Where was this discussion?  Do you have any pointers to it?

I don't see any mention of __initcall being deprecated in
Linus' mainline git tree, or in linux-next, or in mmotm.
Where are those patches?


> So as a change of subject(since what I was looking at
> was frustrating me),I decided to grep the whole tree
> and make the change(partially).
> 
> Currently I'm running this patch on my system, kernel compiles
> without any errors or warnings.(thought there would be a speed increase
> but didn't see much(if any)).

No, __initcall(x) is just a shorthand version of typing
device_initcall(x).  They do the same thing.

> Biggest problem I have though is testing this on other hardware types
> (I only have a macbook,and an iMac).
> So please if you have the access to other arch/hardware types please
> test.
> 
> Now what I mean by partially is the __initcall function is still
> there, so(if any) userspace apps/libs depend on this it's there
> so they dont break and/or any other subsystem, that needs time
> to make the changes.

The only thing that might be affected is building out-of-tree drivers,
but those are easy to fix.

> Note:
> the remaining files that still have __initcall in them are:
> (according to grep)
> 
> arch/um/include/shared/init.h
> include/linux/init.h
> scripts/checkpatch.pl
> 
> either I or somebody else, can change this(although a bit
> concerned about breaking things).
> 
> Signed-off-by: Justin P. Mattock <justinmattock@gmail.com>
> ---
>  Documentation/DocBook/kernel-hacking.tmpl    |    4 ++--
>  Documentation/cpu-freq/cpu-drivers.txt       |    2 +-
>  Documentation/kbuild/makefiles.txt           |    2 +-
>  arch/arm/mach-at91/leds.c                    |    2 +-
>  arch/arm/mach-clps711x/p720t.c               |    2 +-
>  arch/arm/mach-ebsa110/leds.c                 |    2 +-
>  arch/arm/mach-footbridge/cats-hw.c           |    2 +-
>  arch/arm/mach-footbridge/ebsa285-leds.c      |    2 +-
>  arch/arm/mach-footbridge/netwinder-hw.c      |    2 +-
>  arch/arm/mach-footbridge/netwinder-leds.c    |    2 +-
>  arch/arm/mach-ks8695/leds.c                  |    2 +-
>  arch/arm/mach-omap1/leds.c                   |    2 +-
>  arch/arm/mach-omap1/pm.c                     |    2 +-
>  arch/arm/mach-orion5x/db88f5281-setup.c      |    2 +-
>  arch/arm/mach-orion5x/rd88f5182-setup.c      |    2 +-
>  arch/arm/mach-pxa/generic.c                  |    2 +-
>  arch/arm/mach-pxa/pxa25x.c                   |    2 +-
>  arch/arm/mach-shark/leds.c                   |    2 +-
>  arch/blackfin/kernel/bfin_gpio.c             |    2 +-
>  arch/blackfin/mach-common/pm.c               |    2 +-
>  arch/cris/arch-v10/kernel/debugport.c        |    2 +-
>  arch/cris/arch-v10/kernel/fasttimer.c        |    2 +-
>  arch/cris/arch-v10/mm/init.c                 |    2 +-
>  arch/cris/arch-v32/kernel/fasttimer.c        |    2 +-
>  arch/cris/arch-v32/kernel/pinmux.c           |    2 +-
>  arch/cris/arch-v32/kernel/signal.c           |    2 +-
>  arch/cris/arch-v32/mach-a3/io.c              |    2 +-
>  arch/cris/arch-v32/mach-a3/pinmux.c          |    2 +-
>  arch/cris/arch-v32/mach-fs/io.c              |    2 +-
>  arch/cris/arch-v32/mach-fs/pinmux.c          |    2 +-
>  arch/cris/kernel/profile.c                   |    2 +-
>  arch/cris/kernel/time.c                      |    2 +-
>  arch/cris/kernel/traps.c                     |    2 +-
>  arch/frv/kernel/gdb-stub.c                   |    2 +-
>  arch/frv/kernel/pm-mb93093.c                 |    2 +-
>  arch/frv/kernel/pm.c                         |    2 +-
>  arch/frv/kernel/sysctl.c                     |    2 +-
>  arch/h8300/kernel/gpio.c                     |    2 +-
>  arch/ia64/hp/sim/simeth.c                    |    2 +-
>  arch/ia64/hp/sim/simserial.c                 |    2 +-
>  arch/ia64/kernel/audit.c                     |    2 +-
>  arch/ia64/kernel/crash.c                     |    2 +-
>  arch/ia64/kernel/cyclone.c                   |    2 +-
>  arch/ia64/kernel/perfmon.c                   |    2 +-
>  arch/ia64/kernel/setup.c                     |    2 +-
>  arch/ia64/kernel/uncached.c                  |    2 +-
>  arch/ia64/kernel/unwind.c                    |    2 +-
>  arch/ia64/mm/init.c                          |    2 +-
>  arch/mips/Makefile                           |    2 +-
>  arch/mips/kernel/unaligned.c                 |    2 +-
>  arch/mips/lasat/sysctl.c                     |    2 +-
>  arch/mips/math-emu/cp1emu.c                  |    2 +-
>  arch/mips/nxp/pnx8550/common/proc.c          |    2 +-
>  arch/mips/sibyte/sb1250/bus_watcher.c        |    2 +-
>  arch/mn10300/kernel/gdb-stub.c               |    2 +-
>  arch/mn10300/kernel/mn10300-serial.c         |    2 +-
>  arch/mn10300/kernel/profile.c                |    2 +-
>  arch/parisc/kernel/pci-dma.c                 |    2 +-
>  arch/parisc/kernel/pdc_chassis.c             |    2 +-
>  arch/powerpc/kernel/audit.c                  |    2 +-
>  arch/powerpc/kernel/idle.c                   |    2 +-
>  arch/powerpc/kernel/irq.c                    |    2 +-
>  arch/powerpc/kernel/proc_powerpc.c           |    2 +-
>  arch/powerpc/kernel/prom.c                   |    4 ++--
>  arch/powerpc/kernel/rtas-proc.c              |    2 +-
>  arch/powerpc/kernel/rtasd.c                  |    2 +-
>  arch/powerpc/kernel/sysfs.c                  |    2 +-
>  arch/powerpc/kernel/tau_6xx.c                |    2 +-
>  arch/powerpc/kernel/vio.c                    |    2 +-
>  arch/powerpc/platforms/iseries/lpevents.c    |    2 +-
>  arch/powerpc/platforms/iseries/mf.c          |    2 +-
>  arch/powerpc/platforms/iseries/proc.c        |    2 +-
>  arch/powerpc/platforms/iseries/viopath.c     |    2 +-
>  arch/powerpc/platforms/pseries/eeh.c         |    2 +-
>  arch/powerpc/platforms/pseries/hvCall_inst.c |    2 +-
>  arch/powerpc/platforms/pseries/power.c       |    2 +-
>  arch/powerpc/platforms/pseries/ras.c         |    2 +-
>  arch/powerpc/platforms/pseries/reconfig.c    |    2 +-
>  arch/powerpc/xmon/xmon.c                     |    2 +-
>  arch/s390/appldata/appldata_base.c           |    2 +-
>  arch/s390/kernel/audit.c                     |    2 +-
>  arch/s390/kernel/compat_exec_domain.c        |    2 +-
>  arch/s390/kernel/ipl.c                       |    2 +-
>  arch/s390/kernel/topology.c                  |    2 +-
>  arch/sh/boards/board-edosk7760.c             |    2 +-
>  arch/sh/boards/board-sh7785lcr.c             |    2 +-
>  arch/sh/boards/mach-cayman/setup.c           |    2 +-
>  arch/sh/boards/mach-landisk/setup.c          |    2 +-
>  arch/sh/boards/mach-r2d/setup.c              |    2 +-
>  arch/sh/boards/mach-sdk7786/setup.c          |    2 +-
>  arch/sh/boards/mach-se/7206/setup.c          |    2 +-
>  arch/sh/boards/mach-se/7751/setup.c          |    2 +-
>  arch/sh/boards/mach-sh03/setup.c             |    2 +-
>  arch/sh/kernel/traps_64.c                    |    2 +-
>  arch/sparc/kernel/apc.c                      |    2 +-
>  arch/sparc/kernel/audit.c                    |    2 +-
>  arch/sparc/kernel/mdesc.c                    |    2 +-
>  arch/sparc/kernel/pmc.c                      |    2 +-
>  arch/um/drivers/mconsole_kern.c              |    8 ++++----
>  arch/um/drivers/net_kern.c                   |    2 +-
>  arch/um/drivers/stderr_console.c             |    2 +-
>  arch/um/drivers/ubd_kern.c                   |    4 ++--
>  arch/um/kernel/exitcode.c                    |    2 +-
>  arch/um/kernel/physmem.c                     |    2 +-
>  arch/um/os-Linux/aio.c                       |    4 ++--
>  arch/um/os-Linux/skas/mem.c                  |    2 +-
>  arch/um/os-Linux/skas/process.c              |    2 +-
>  arch/um/os-Linux/umid.c                      |    2 +-
>  arch/um/sys-i386/tls.c                       |    2 +-
>  arch/x86/kernel/audit_64.c                   |    2 +-
>  arch/x86/kernel/tlb_uv.c                     |    4 ++--
>  arch/x86/kernel/vsyscall_64.c                |    4 ++--
>  arch/x86/mm/dump_pagetables.c                |    2 +-
>  arch/x86/vdso/vdso32-setup.c                 |    4 ++--
>  arch/x86/vdso/vma.c                          |    2 +-
>  arch/xtensa/platforms/iss/console.c          |    2 +-
>  drivers/net/arm/am79c961a.c                  |    2 +-
>  drivers/net/hamradio/baycom_epp.c            |    1 +
>  drivers/net/hamradio/baycom_par.c            |    1 +
>  drivers/net/hamradio/baycom_ser_fdx.c        |    1 +
>  drivers/net/hamradio/baycom_ser_hdx.c        |    1 +
>  drivers/s390/char/sclp_cmd.c                 |    2 +-
>  drivers/s390/char/sclp_config.c              |    2 +-
>  drivers/s390/char/sclp_cpi_sys.c             |    2 +-
>  drivers/s390/char/sclp_vt220.c               |    2 +-
>  drivers/s390/cio/blacklist.c                 |    2 +-
>  drivers/staging/rtl8192u/ieee80211/api.c     |    2 +-
>  fs/aio.c                                     |    2 +-
>  fs/compat_ioctl.c                            |    2 +-
>  ipc/ipc_sysctl.c                             |    2 +-
>  ipc/mqueue.c                                 |    2 +-
>  ipc/util.c                                   |    2 +-
>  kernel/audit.c                               |    2 +-
>  kernel/audit_tree.c                          |    2 +-
>  kernel/dma.c                                 |    2 +-
>  kernel/futex.c                               |    2 +-
>  kernel/lockdep_proc.c                        |    2 +-
>  kernel/pid_namespace.c                       |    2 +-
>  kernel/posix-cpu-timers.c                    |    2 +-
>  kernel/posix-timers.c                        |    2 +-
>  kernel/resource.c                            |    2 +-
>  kernel/sched_debug.c                         |    2 +-
>  kernel/time/timer_list.c                     |    2 +-
>  kernel/time/timer_stats.c                    |    2 +-
>  kernel/tracepoint.c                          |    2 +-
>  kernel/utsname_sysctl.c                      |    2 +-
>  lib/audit.c                                  |    2 +-
>  lib/debugobjects.c                           |    2 +-
>  mm/bounce.c                                  |    2 +-
>  mm/memory.c                                  |    2 +-
>  mm/mm_init.c                                 |    2 +-
>  mm/slab.c                                    |    2 +-
>  mm/slub.c                                    |    2 +-
>  mm/swapfile.c                                |    2 +-
>  net/ipv4/syncookies.c                        |    2 +-
>  net/ipv4/sysctl_net_ipv4.c                   |    2 +-
>  security/keys/proc.c                         |    2 +-
>  security/selinux/hooks.c                     |    2 +-
>  security/selinux/netif.c                     |    2 +-
>  security/selinux/netlink.c                   |    2 +-
>  security/selinux/netnode.c                   |    2 +-
>  security/selinux/netport.c                   |    2 +-
>  security/selinux/selinuxfs.c                 |    2 +-
>  security/selinux/ss/services.c               |    2 +-
>  security/smack/smackfs.c                     |    2 +-
>  sound/last.c                                 |    2 +-
>  166 files changed, 176 insertions(+), 172 deletions(-)


-- 
~Randy

From david.s.daney@gmail.com Sat Mar 20 00:00:55 2010
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Date:   Fri, 19 Mar 2010 16:00:43 -0700
From:   David Daney <david.s.daney@gmail.com>
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To:     David Daney <ddaney@caviumnetworks.com>
CC:     Peter 'p2' De Schrijver <p2@debian.org>,
        Jan Rovins <janr@adax.com>, linux-mips@linux-mips.org
Subject: Re: linux 2.6.33 on movidis x16
References: <20100305141113.GD2437@apfelkorn> <4B9EB45D.8050106@adax.com> <20100318181734.GG2437@apfelkorn> <4BA27048.2010707@caviumnetworks.com>
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On 03/18/2010 11:26 AM, David Daney wrote:
> On 03/18/2010 11:17 AM, Peter 'p2' De Schrijver wrote:
>> On 2010-03-15 18:27:41 (-0400), Jan Rovins<janr@adax.com>  wrote:
>>> Peter 'p2' De Schrijver wrote:
>>>> Hi,
>>>>
>>>> We are trying to get linux 2.6.33 to work on the movidis x16 board. 
>>>> Main thing
>>>> missing is the addresses of the PHYs. Does anyone know those ?
>>>> Unfortunately I don't have physical access to the board so I can't 
>>>> just look
>>>> for the PHY components being used.
>>>>
>>>> Thanks,
>>>>
>>>> Peter.
>>>>
>>>>
>>> Do you mean the Movidis x19 ?
>>
>> Maybe. AFAIK ours is called x16, and uses a cavium octeon CN3860 chip.
>>
>>> We have 2 of these in our lab. They are running the old 2.6.21.7  from
>>> the CnUsers 1.8.1  tool chain.
>>> They are currently being used by other developers for some application
>>> testing, but I can grab the serial console boot-up messages and send
>>> them to you, if the PHY info is in there.
>>
>> That would be helpful. Otherwise you could also try running ethtool 
>> on all the
>> interfaces. That should give you the PHY address as well.
>>
>
> I just found one of these.  Current theory is that the PHY addresses 
> are 0-7
>
> I don't think the PHY numbers are printed anywhere.

Can you try the attached patch?


from the back of the box we have:

---------------------------------------
| eth5 | eth7 |  | eth1 | eth3 |
---------------------------------------
| eth4 | eth6 |  | eth0 | eth2 |
---------------------------------------

I was able to boot 2.6.34-rc1 to a Debian root nfs mounted via eth1.

I didn't verify that eth4 - eth7 worked.

David Daney


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diff --git a/drivers/net/phy/mdio-octeon.c b/drivers/net/phy/mdio-octeon.c
index 61a4461..dfaaf30 100644
--- a/drivers/net/phy/mdio-octeon.c
+++ b/drivers/net/phy/mdio-octeon.c
@@ -87,6 +87,7 @@ static int octeon_mdiobus_write(struct mii_bus *bus, int phy_id,
 static int __init octeon_mdiobus_probe(struct platform_device *pdev)
 {
 	struct octeon_mdiobus *bus;
+	union cvmx_smix_en smi_en;
 	int i;
 	int err = -ENOENT;
 
@@ -102,6 +103,10 @@ static int __init octeon_mdiobus_probe(struct platform_device *pdev)
 	if (!bus->mii_bus)
 		goto err;
 
+	smi_en.u64 = 0;
+	smi_en.s.en = 1;
+	cvmx_write_csr(CVMX_SMIX_EN(bus->unit), smi_en.u64);
+
 	/*
 	 * Standard Octeon evaluation boards don't support phy
 	 * interrupts, we need to poll.
@@ -132,17 +137,22 @@ err_register:
 
 err:
 	devm_kfree(&pdev->dev, bus);
+	smi_en.u64 = 0;
+	cvmx_write_csr(CVMX_SMIX_EN(bus->unit), smi_en.u64);
 	return err;
 }
 
 static int __exit octeon_mdiobus_remove(struct platform_device *pdev)
 {
 	struct octeon_mdiobus *bus;
+	union cvmx_smix_en smi_en;
 
 	bus = dev_get_drvdata(&pdev->dev);
 
 	mdiobus_unregister(bus->mii_bus);
 	mdiobus_free(bus->mii_bus);
+	smi_en.u64 = 0;
+	cvmx_write_csr(CVMX_SMIX_EN(bus->unit), smi_en.u64);
 	return 0;
 }
 
diff --git a/drivers/staging/octeon/cvmx-helper-board.c b/drivers/staging/octeon/cvmx-helper-board.c
index 3085e38..fb8d3ee 100644
--- a/drivers/staging/octeon/cvmx-helper-board.c
+++ b/drivers/staging/octeon/cvmx-helper-board.c
@@ -153,6 +153,13 @@ int cvmx_helper_board_get_mii_address(int ipd_port)
 		 * through switch.
 		 */
 		return -1;
+	case CVMX_BOARD_TYPE_CUST_WSX16:
+		if (ipd_port >= 0 && ipd_port <= 3)
+			return ipd_port;
+		else if (ipd_port >= 16 && ipd_port <= 19)
+			return ipd_port - 16 + 4;
+		else
+			return -1;
 	}
 
 	/* Some unknown board. Somebody forgot to update this function... */

--------------040609090508020401050503--

From justinmattock@gmail.com Sat Mar 20 00:24:33 2010
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Message-ID: <4BA407AC.5030506@gmail.com>
Date:   Fri, 19 Mar 2010 16:24:28 -0700
From:   "Justin P. Mattock" <justinmattock@gmail.com>
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To:     Randy Dunlap <rdunlap@xenotime.net>
CC:     trivial@kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-audit@redhat.com, uclinux-dist-devel@blackfin.uclinux.org,
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        sparclinux@vger.kernel.org, x86@kernel.org, netdev@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH] Cosmetic:Partially remove deprecated __initcall() and
 change to
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On 03/19/2010 03:56 PM, Randy Dunlap wrote:
> On 03/19/10 12:51, Justin P. Mattock wrote:
>> After doing some things on a small issue,
>> I noticed through web surfing, that there were patches
>> submitted pertaining that __initcall is deprecated,
>> and device_initcall should be used.
>
> Where was this discussion?  Do you have any pointers to it?
>

The best info on this is scripts/checkpatch.pl
line #2664

when I found this I just did a quick search of __initcall
(which gives hits here and there)
https://patchwork.kernel.org/patch/23344/
(also found others at around 2008 or so)

> I don't see any mention of __initcall being deprecated in
> Linus' mainline git tree, or in linux-next, or in mmotm.
> Where are those patches?
>

I don't know(I'm out of the social pipeline when it comes to Linux news, 
and updates)..
like in the explanation part of the patch
I was looking into something else, then ran into this,
so as a break(from what I was originally doing)
decided to do this and submit.

>
>> So as a change of subject(since what I was looking at
>> was frustrating me),I decided to grep the whole tree
>> and make the change(partially).
>>
>> Currently I'm running this patch on my system, kernel compiles
>> without any errors or warnings.(thought there would be a speed increase
>> but didn't see much(if any)).
>
> No, __initcall(x) is just a shorthand version of typing
> device_initcall(x).  They do the same thing.
>

yep, that's what I found out as well(reason for the cosmetic
in the subject line).

>> Biggest problem I have though is testing this on other hardware types
>> (I only have a macbook,and an iMac).
>> So please if you have the access to other arch/hardware types please
>> test.
>>
>> Now what I mean by partially is the __initcall function is still
>> there, so(if any) userspace apps/libs depend on this it's there
>> so they dont break and/or any other subsystem, that needs time
>> to make the changes.
>
> The only thing that might be affected is building out-of-tree drivers,
> but those are easy to fix.
>

alright..main concern is making sure things don't break in the 
kernel(even though things do).

I can have a go at the header files, submit
then if it's something people agree they want to do, then they
can go from there(if not it's fine as well).

>> Note:
>> the remaining files that still have __initcall in them are:
>> (according to grep)
>>
>> arch/um/include/shared/init.h
>> include/linux/init.h
>> scripts/checkpatch.pl
>>
>> either I or somebody else, can change this(although a bit
>> concerned about breaking things).
>>
>> Signed-off-by: Justin P. Mattock<justinmattock@gmail.com>
>> ---
>>   Documentation/DocBook/kernel-hacking.tmpl    |    4 ++--
>>   Documentation/cpu-freq/cpu-drivers.txt       |    2 +-
>>   Documentation/kbuild/makefiles.txt           |    2 +-
>>   arch/arm/mach-at91/leds.c                    |    2 +-
>>   arch/arm/mach-clps711x/p720t.c               |    2 +-
>>   arch/arm/mach-ebsa110/leds.c                 |    2 +-
>>   arch/arm/mach-footbridge/cats-hw.c           |    2 +-
>>   arch/arm/mach-footbridge/ebsa285-leds.c      |    2 +-
>>   arch/arm/mach-footbridge/netwinder-hw.c      |    2 +-
>>   arch/arm/mach-footbridge/netwinder-leds.c    |    2 +-
>>   arch/arm/mach-ks8695/leds.c                  |    2 +-
>>   arch/arm/mach-omap1/leds.c                   |    2 +-
>>   arch/arm/mach-omap1/pm.c                     |    2 +-
>>   arch/arm/mach-orion5x/db88f5281-setup.c      |    2 +-
>>   arch/arm/mach-orion5x/rd88f5182-setup.c      |    2 +-
>>   arch/arm/mach-pxa/generic.c                  |    2 +-
>>   arch/arm/mach-pxa/pxa25x.c                   |    2 +-
>>   arch/arm/mach-shark/leds.c                   |    2 +-
>>   arch/blackfin/kernel/bfin_gpio.c             |    2 +-
>>   arch/blackfin/mach-common/pm.c               |    2 +-
>>   arch/cris/arch-v10/kernel/debugport.c        |    2 +-
>>   arch/cris/arch-v10/kernel/fasttimer.c        |    2 +-
>>   arch/cris/arch-v10/mm/init.c                 |    2 +-
>>   arch/cris/arch-v32/kernel/fasttimer.c        |    2 +-
>>   arch/cris/arch-v32/kernel/pinmux.c           |    2 +-
>>   arch/cris/arch-v32/kernel/signal.c           |    2 +-
>>   arch/cris/arch-v32/mach-a3/io.c              |    2 +-
>>   arch/cris/arch-v32/mach-a3/pinmux.c          |    2 +-
>>   arch/cris/arch-v32/mach-fs/io.c              |    2 +-
>>   arch/cris/arch-v32/mach-fs/pinmux.c          |    2 +-
>>   arch/cris/kernel/profile.c                   |    2 +-
>>   arch/cris/kernel/time.c                      |    2 +-
>>   arch/cris/kernel/traps.c                     |    2 +-
>>   arch/frv/kernel/gdb-stub.c                   |    2 +-
>>   arch/frv/kernel/pm-mb93093.c                 |    2 +-
>>   arch/frv/kernel/pm.c                         |    2 +-
>>   arch/frv/kernel/sysctl.c                     |    2 +-
>>   arch/h8300/kernel/gpio.c                     |    2 +-
>>   arch/ia64/hp/sim/simeth.c                    |    2 +-
>>   arch/ia64/hp/sim/simserial.c                 |    2 +-
>>   arch/ia64/kernel/audit.c                     |    2 +-
>>   arch/ia64/kernel/crash.c                     |    2 +-
>>   arch/ia64/kernel/cyclone.c                   |    2 +-
>>   arch/ia64/kernel/perfmon.c                   |    2 +-
>>   arch/ia64/kernel/setup.c                     |    2 +-
>>   arch/ia64/kernel/uncached.c                  |    2 +-
>>   arch/ia64/kernel/unwind.c                    |    2 +-
>>   arch/ia64/mm/init.c                          |    2 +-
>>   arch/mips/Makefile                           |    2 +-
>>   arch/mips/kernel/unaligned.c                 |    2 +-
>>   arch/mips/lasat/sysctl.c                     |    2 +-
>>   arch/mips/math-emu/cp1emu.c                  |    2 +-
>>   arch/mips/nxp/pnx8550/common/proc.c          |    2 +-
>>   arch/mips/sibyte/sb1250/bus_watcher.c        |    2 +-
>>   arch/mn10300/kernel/gdb-stub.c               |    2 +-
>>   arch/mn10300/kernel/mn10300-serial.c         |    2 +-
>>   arch/mn10300/kernel/profile.c                |    2 +-
>>   arch/parisc/kernel/pci-dma.c                 |    2 +-
>>   arch/parisc/kernel/pdc_chassis.c             |    2 +-
>>   arch/powerpc/kernel/audit.c                  |    2 +-
>>   arch/powerpc/kernel/idle.c                   |    2 +-
>>   arch/powerpc/kernel/irq.c                    |    2 +-
>>   arch/powerpc/kernel/proc_powerpc.c           |    2 +-
>>   arch/powerpc/kernel/prom.c                   |    4 ++--
>>   arch/powerpc/kernel/rtas-proc.c              |    2 +-
>>   arch/powerpc/kernel/rtasd.c                  |    2 +-
>>   arch/powerpc/kernel/sysfs.c                  |    2 +-
>>   arch/powerpc/kernel/tau_6xx.c                |    2 +-
>>   arch/powerpc/kernel/vio.c                    |    2 +-
>>   arch/powerpc/platforms/iseries/lpevents.c    |    2 +-
>>   arch/powerpc/platforms/iseries/mf.c          |    2 +-
>>   arch/powerpc/platforms/iseries/proc.c        |    2 +-
>>   arch/powerpc/platforms/iseries/viopath.c     |    2 +-
>>   arch/powerpc/platforms/pseries/eeh.c         |    2 +-
>>   arch/powerpc/platforms/pseries/hvCall_inst.c |    2 +-
>>   arch/powerpc/platforms/pseries/power.c       |    2 +-
>>   arch/powerpc/platforms/pseries/ras.c         |    2 +-
>>   arch/powerpc/platforms/pseries/reconfig.c    |    2 +-
>>   arch/powerpc/xmon/xmon.c                     |    2 +-
>>   arch/s390/appldata/appldata_base.c           |    2 +-
>>   arch/s390/kernel/audit.c                     |    2 +-
>>   arch/s390/kernel/compat_exec_domain.c        |    2 +-
>>   arch/s390/kernel/ipl.c                       |    2 +-
>>   arch/s390/kernel/topology.c                  |    2 +-
>>   arch/sh/boards/board-edosk7760.c             |    2 +-
>>   arch/sh/boards/board-sh7785lcr.c             |    2 +-
>>   arch/sh/boards/mach-cayman/setup.c           |    2 +-
>>   arch/sh/boards/mach-landisk/setup.c          |    2 +-
>>   arch/sh/boards/mach-r2d/setup.c              |    2 +-
>>   arch/sh/boards/mach-sdk7786/setup.c          |    2 +-
>>   arch/sh/boards/mach-se/7206/setup.c          |    2 +-
>>   arch/sh/boards/mach-se/7751/setup.c          |    2 +-
>>   arch/sh/boards/mach-sh03/setup.c             |    2 +-
>>   arch/sh/kernel/traps_64.c                    |    2 +-
>>   arch/sparc/kernel/apc.c                      |    2 +-
>>   arch/sparc/kernel/audit.c                    |    2 +-
>>   arch/sparc/kernel/mdesc.c                    |    2 +-
>>   arch/sparc/kernel/pmc.c                      |    2 +-
>>   arch/um/drivers/mconsole_kern.c              |    8 ++++----
>>   arch/um/drivers/net_kern.c                   |    2 +-
>>   arch/um/drivers/stderr_console.c             |    2 +-
>>   arch/um/drivers/ubd_kern.c                   |    4 ++--
>>   arch/um/kernel/exitcode.c                    |    2 +-
>>   arch/um/kernel/physmem.c                     |    2 +-
>>   arch/um/os-Linux/aio.c                       |    4 ++--
>>   arch/um/os-Linux/skas/mem.c                  |    2 +-
>>   arch/um/os-Linux/skas/process.c              |    2 +-
>>   arch/um/os-Linux/umid.c                      |    2 +-
>>   arch/um/sys-i386/tls.c                       |    2 +-
>>   arch/x86/kernel/audit_64.c                   |    2 +-
>>   arch/x86/kernel/tlb_uv.c                     |    4 ++--
>>   arch/x86/kernel/vsyscall_64.c                |    4 ++--
>>   arch/x86/mm/dump_pagetables.c                |    2 +-
>>   arch/x86/vdso/vdso32-setup.c                 |    4 ++--
>>   arch/x86/vdso/vma.c                          |    2 +-
>>   arch/xtensa/platforms/iss/console.c          |    2 +-
>>   drivers/net/arm/am79c961a.c                  |    2 +-
>>   drivers/net/hamradio/baycom_epp.c            |    1 +
>>   drivers/net/hamradio/baycom_par.c            |    1 +
>>   drivers/net/hamradio/baycom_ser_fdx.c        |    1 +
>>   drivers/net/hamradio/baycom_ser_hdx.c        |    1 +
>>   drivers/s390/char/sclp_cmd.c                 |    2 +-
>>   drivers/s390/char/sclp_config.c              |    2 +-
>>   drivers/s390/char/sclp_cpi_sys.c             |    2 +-
>>   drivers/s390/char/sclp_vt220.c               |    2 +-
>>   drivers/s390/cio/blacklist.c                 |    2 +-
>>   drivers/staging/rtl8192u/ieee80211/api.c     |    2 +-
>>   fs/aio.c                                     |    2 +-
>>   fs/compat_ioctl.c                            |    2 +-
>>   ipc/ipc_sysctl.c                             |    2 +-
>>   ipc/mqueue.c                                 |    2 +-
>>   ipc/util.c                                   |    2 +-
>>   kernel/audit.c                               |    2 +-
>>   kernel/audit_tree.c                          |    2 +-
>>   kernel/dma.c                                 |    2 +-
>>   kernel/futex.c                               |    2 +-
>>   kernel/lockdep_proc.c                        |    2 +-
>>   kernel/pid_namespace.c                       |    2 +-
>>   kernel/posix-cpu-timers.c                    |    2 +-
>>   kernel/posix-timers.c                        |    2 +-
>>   kernel/resource.c                            |    2 +-
>>   kernel/sched_debug.c                         |    2 +-
>>   kernel/time/timer_list.c                     |    2 +-
>>   kernel/time/timer_stats.c                    |    2 +-
>>   kernel/tracepoint.c                          |    2 +-
>>   kernel/utsname_sysctl.c                      |    2 +-
>>   lib/audit.c                                  |    2 +-
>>   lib/debugobjects.c                           |    2 +-
>>   mm/bounce.c                                  |    2 +-
>>   mm/memory.c                                  |    2 +-
>>   mm/mm_init.c                                 |    2 +-
>>   mm/slab.c                                    |    2 +-
>>   mm/slub.c                                    |    2 +-
>>   mm/swapfile.c                                |    2 +-
>>   net/ipv4/syncookies.c                        |    2 +-
>>   net/ipv4/sysctl_net_ipv4.c                   |    2 +-
>>   security/keys/proc.c                         |    2 +-
>>   security/selinux/hooks.c                     |    2 +-
>>   security/selinux/netif.c                     |    2 +-
>>   security/selinux/netlink.c                   |    2 +-
>>   security/selinux/netnode.c                   |    2 +-
>>   security/selinux/netport.c                   |    2 +-
>>   security/selinux/selinuxfs.c                 |    2 +-
>>   security/selinux/ss/services.c               |    2 +-
>>   security/smack/smackfs.c                     |    2 +-
>>   sound/last.c                                 |    2 +-
>>   166 files changed, 176 insertions(+), 172 deletions(-)
>
>


From sebastian@breakpoint.cc Sun Mar 21 12:02:43 2010
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Date:   Sun, 21 Mar 2010 12:02:41 +0100
From:   Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
To:     Ralf Baechle <ralf@linux-mips.org>
Cc:     linux-mips@linux-mips.org
Subject: [PATCH] mips/mm: fix module support on SiByte
Message-ID: <20100321110241.GA25569@Chamillionaire.breakpoint.cc>
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Since commit 656be92f aka "Load modules to CKSEG0 if
CONFIG_BUILD_ELF64=n" module support is broken on 64bit. Since then
modules arr loaded into 32bit compat adresses which are sign extended
64bit addresses. The SiByte war handler was not updated and those
addresses were not recognized by the TLB hadling.
This patch fixes this by shifting away the upper bits including the R
and Fill bits. Now we compare VPN2 of C0_ENTRYHI against the matching
bits at C0_BADVADDR.

Cc: <stable@kernel.org>
Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
---
 arch/mips/mm/tlbex.c |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index badcf5e..47faeb4 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -745,6 +745,10 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
 		UASM_i_MFC0(&p, K1, C0_ENTRYHI);
 		uasm_i_xor(&p, K0, K0, K1);
 		UASM_i_SRL(&p, K0, K0, PAGE_SHIFT + 1);
+#ifdef CONFIG_64BIT
+		/* Make sure we have here just VPN2 */
+		uasm_i_dsll32(&p, K0, K0, PAGE_SHIFT + 1 + 24 - 32);
+#endif
 		uasm_il_bnez(&p, &r, K0, label_leave);
 		/* No need for uasm_i_nop */
 	}
@@ -1264,6 +1268,10 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
 		UASM_i_MFC0(&p, K1, C0_ENTRYHI);
 		uasm_i_xor(&p, K0, K0, K1);
 		UASM_i_SRL(&p, K0, K0, PAGE_SHIFT + 1);
+#ifdef CONFIG_64BIT
+		/* Make sure we have here just VPN2 */
+		uasm_i_dsll32(&p, K0, K0, PAGE_SHIFT + 1 + 24 - 32);
+#endif
 		uasm_il_bnez(&p, &r, K0, label_leave);
 		/* No need for uasm_i_nop */
 	}
-- 
1.6.6


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To:     David Daney <david.s.daney@gmail.com>
Cc:     David Daney <ddaney@caviumnetworks.com>,
        Jan Rovins <janr@adax.com>, linux-mips@linux-mips.org
Subject: Re: linux 2.6.33 on movidis x16
Message-ID: <20100321160027.GJ2437@apfelkorn>
References: <20100305141113.GD2437@apfelkorn> <4B9EB45D.8050106@adax.com> <20100318181734.GG2437@apfelkorn> <4BA27048.2010707@caviumnetworks.com> <4BA4021B.4010905@gmail.com>
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>
> Can you try the attached patch?
>
>
> from the back of the box we have:
>
> ---------------------------------------
> | eth5 | eth7 |  | eth1 | eth3 |
> ---------------------------------------
> | eth4 | eth6 |  | eth0 | eth2 |
> ---------------------------------------
>
> I was able to boot 2.6.34-rc1 to a Debian root nfs mounted via eth1.
>
> I didn't verify that eth4 - eth7 worked.
>

Yes ! That seems to work. We intend to use the machine as buildd, so 1 working 
ethernet is fine :)

Thanks,

Peter.

From adebex@gmail.com Sun Mar 21 18:08:08 2010
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From:   Adrian Byszuk <adebex@gmail.com>
To:     linux-mips@linux-mips.org
Subject: [PATCH] Fix kexec call on MIPS platform
Date:   Sun, 21 Mar 2010 17:06:47 +0000
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Dear developers,

This kernel patch fixes problems with kexec call on some devices.
I tested it on Asus WL-500gP v2. I suppose it would behave well on all MIPS 
machines.
Applicable to 2.6.32 and 2.6.33

Signed-off-by: Adrian Byszuk <adebex_at_gmail.com>

---

--- a/arch/mips/kernel/machine_kexec.c	2010-03-15 15:52:04.000000000 +0000
+++ b/arch/mips/kernel/machine_kexec.c	2010-03-21 15:25:13.953615489 +0000
@@ -52,7 +52,8 @@
 	reboot_code_buffer =
 	  (unsigned long)page_address(image->control_code_page);
 
-	kexec_start_address = image->start;
+	kexec_start_address = 
+		(unsigned long) phys_to_virt(image->start);
 	kexec_indirection_page =
 		(unsigned long) phys_to_virt(image->head & PAGE_MASK);
 

From rdunlap@xenotime.net Mon Mar 22 01:34:06 2010
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Date:   Sun, 21 Mar 2010 17:33:55 -0700
From:   Randy Dunlap <rdunlap@xenotime.net>
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CC:     trivial@kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-audit@redhat.com, uclinux-dist-devel@blackfin.uclinux.org,
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        sparclinux@vger.kernel.org, x86@kernel.org, netdev@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH] Cosmetic:Partially remove deprecated __initcall() and
 change to
References: <1269028291-9103-1-git-send-email-justinmattock@gmail.com> <4BA40115.2000509@xenotime.net> <4BA407AC.5030506@gmail.com>
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On 03/19/10 16:24, Justin P. Mattock wrote:
> On 03/19/2010 03:56 PM, Randy Dunlap wrote:
>> On 03/19/10 12:51, Justin P. Mattock wrote:
>>> After doing some things on a small issue,
>>> I noticed through web surfing, that there were patches
>>> submitted pertaining that __initcall is deprecated,
>>> and device_initcall should be used.
>>
>> Where was this discussion?  Do you have any pointers to it?
>>
> 
> The best info on this is scripts/checkpatch.pl
> line #2664
> 
> when I found this I just did a quick search of __initcall
> (which gives hits here and there)
> https://patchwork.kernel.org/patch/23344/
> (also found others at around 2008 or so)

Thanks.  IMO there should be something in the kernel source tree
that says explicitly that __initcall is deprecated and should be
replaced by using <whatever should be used>.  That's missing.


>> I don't see any mention of __initcall being deprecated in
>> Linus' mainline git tree, or in linux-next, or in mmotm.
>> Where are those patches?
>>
> 
> I don't know(I'm out of the social pipeline when it comes to Linux news,
> and updates)..
> like in the explanation part of the patch
> I was looking into something else, then ran into this,
> so as a break(from what I was originally doing)
> decided to do this and submit.
> 
>>
>>> So as a change of subject(since what I was looking at
>>> was frustrating me),I decided to grep the whole tree
>>> and make the change(partially).
>>>
>>> Currently I'm running this patch on my system, kernel compiles
>>> without any errors or warnings.(thought there would be a speed increase
>>> but didn't see much(if any)).
>>
>> No, __initcall(x) is just a shorthand version of typing
>> device_initcall(x).  They do the same thing.
>>
> 
> yep, that's what I found out as well(reason for the cosmetic
> in the subject line).
> 
>>> Biggest problem I have though is testing this on other hardware types
>>> (I only have a macbook,and an iMac).
>>> So please if you have the access to other arch/hardware types please
>>> test.
>>>
>>> Now what I mean by partially is the __initcall function is still
>>> there, so(if any) userspace apps/libs depend on this it's there
>>> so they dont break and/or any other subsystem, that needs time
>>> to make the changes.
>>
>> The only thing that might be affected is building out-of-tree drivers,
>> but those are easy to fix.
>>
> 
> alright..main concern is making sure things don't break in the
> kernel(even though things do).
> 
> I can have a go at the header files, submit
> then if it's something people agree they want to do, then they
> can go from there(if not it's fine as well).
> 
>>> Note:
>>> the remaining files that still have __initcall in them are:
>>> (according to grep)
>>>
>>> arch/um/include/shared/init.h
>>> include/linux/init.h
>>> scripts/checkpatch.pl
>>>
>>> either I or somebody else, can change this(although a bit
>>> concerned about breaking things).
>>>
>>> Signed-off-by: Justin P. Mattock<justinmattock@gmail.com>
>>> ---


-- 
~Randy

From justinmattock@gmail.com Mon Mar 22 02:04:05 2010
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Date:   Sun, 21 Mar 2010 18:04:08 -0700
From:   "Justin P. mattock" <justinmattock@gmail.com>
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Subject: Re: [PATCH] Cosmetic:Partially remove deprecated __initcall() and
 change to
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On 03/21/2010 05:33 PM, Randy Dunlap wrote:
> On 03/19/10 16:24, Justin P. Mattock wrote:
>> On 03/19/2010 03:56 PM, Randy Dunlap wrote:
>>> On 03/19/10 12:51, Justin P. Mattock wrote:
>>>> After doing some things on a small issue,
>>>> I noticed through web surfing, that there were patches
>>>> submitted pertaining that __initcall is deprecated,
>>>> and device_initcall should be used.
>>>
>>> Where was this discussion?  Do you have any pointers to it?
>>>
>>
>> The best info on this is scripts/checkpatch.pl
>> line #2664
>>
>> when I found this I just did a quick search of __initcall
>> (which gives hits here and there)
>> https://patchwork.kernel.org/patch/23344/
>> (also found others at around 2008 or so)
>
> Thanks.  IMO there should be something in the kernel source tree
> that says explicitly that __initcall is deprecated and should be
> replaced by using<whatever should be used>.  That's missing.
>

agree..

I should of searched the source tree for something
that says deprecated and so forth before doing anything(the 
checkpatch.pl was something I noticed down the line but doesn't say 
deprecated(say's explicitly).


>
>>> I don't see any mention of __initcall being deprecated in
>>> Linus' mainline git tree, or in linux-next, or in mmotm.
>>> Where are those patches?
>>>
>>
>> I don't know(I'm out of the social pipeline when it comes to Linux news,
>> and updates)..
>> like in the explanation part of the patch
>> I was looking into something else, then ran into this,
>> so as a break(from what I was originally doing)
>> decided to do this and submit.
>>
>>>
>>>> So as a change of subject(since what I was looking at
>>>> was frustrating me),I decided to grep the whole tree
>>>> and make the change(partially).
>>>>
>>>> Currently I'm running this patch on my system, kernel compiles
>>>> without any errors or warnings.(thought there would be a speed increase
>>>> but didn't see much(if any)).
>>>
>>> No, __initcall(x) is just a shorthand version of typing
>>> device_initcall(x).  They do the same thing.
>>>
>>
>> yep, that's what I found out as well(reason for the cosmetic
>> in the subject line).
>>
>>>> Biggest problem I have though is testing this on other hardware types
>>>> (I only have a macbook,and an iMac).
>>>> So please if you have the access to other arch/hardware types please
>>>> test.
>>>>
>>>> Now what I mean by partially is the __initcall function is still
>>>> there, so(if any) userspace apps/libs depend on this it's there
>>>> so they dont break and/or any other subsystem, that needs time
>>>> to make the changes.
>>>
>>> The only thing that might be affected is building out-of-tree drivers,
>>> but those are easy to fix.
>>>
>>
>> alright..main concern is making sure things don't break in the
>> kernel(even though things do).
>>
>> I can have a go at the header files, submit
>> then if it's something people agree they want to do, then they
>> can go from there(if not it's fine as well).
>>
>>>> Note:
>>>> the remaining files that still have __initcall in them are:
>>>> (according to grep)
>>>>
>>>> arch/um/include/shared/init.h
>>>> include/linux/init.h
>>>> scripts/checkpatch.pl
>>>>
>>>> either I or somebody else, can change this(although a bit
>>>> concerned about breaking things).
>>>>
>>>> Signed-off-by: Justin P. Mattock<justinmattock@gmail.com>
>>>> ---
>
>


In any case I'll leave this to you guys to decide.
The patch is in cyberspace now, so if/when this ever
is decided it's there(patch), then can be used then.

Justin P. Mattock


From mlistz@gmail.com Mon Mar 22 08:01:30 2010
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Message-ID: <e732b6801003220001m7e08bbf7w20ba62d42f30a190@mail.gmail.com>
Subject: [BUG?] cavium cn56xx and dma_map_single warning
From:   Zhuang Yuyao <mlistz@gmail.com>
To:     David Daney <ddaney@caviumnetworks.com>
Cc:     linux-mips@linux-mips.org
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Hi,

I've got a strange dma error on my cavium cn56xx board.

......
dma_map_single: Warning: Mapping memory address that might conflict
with devices 0xfbb8f000-0xfbb8ffff
dma_map_single: Warning: Mapping memory address that might conflict
with devices 0xfb2ef000-0xfb2f0fff
dma_map_single: Warning: Mapping memory address that might conflict
with devices 0xfb3de000-0xfb3defff
dma_map_single: Warning: Mapping memory address that might conflict
with devices 0xfb3dd000-0xfb3ddfff
dma_map_single: Warning: Mapping memory address that might conflict
with devices 0xfac28000-0xfac29fff
dma_map_single: Warning: Mapping memory address that might conflict
with devices 0xfad1a000-0xfad1bfff
.....

this error appeared when I plugged 4G or 8G ram on the board, if there
is only 2G ram on the board, the error never happened.

an adaptec 3405 pci-e raid card is plugged on the board, and a
harddisk attached. the program i am running is a postgresql server
with more than 20 million record, so do a count(*) will let postgresql
consume almost all of the available memory. while there is 4G ram, the
'free' command reported that the free memory is below 18M.

then the error kept printing on the console for a while, then kernel panic.

the warning message is come from arch/mips/cavium-octeon/dma-octeon.c

http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=blob;f=arch/mips/cavium-octeon/dma-octeon.c;h=be531ec1f2064b590b58dfe8b4db4f5534999bab;hb=HEAD

i tried several raid card from different producer, including LSI and
Adaptec. the same error always happened while there are more than or
equal to 4G memory on the board.

Would you please give some advice on this issue? any help will be appreciated.

Thanks.

Zhuang Yuyao

From mlistz@gmail.com Mon Mar 22 10:31:50 2010
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Date:   Mon, 22 Mar 2010 17:31:48 +0800
Message-ID: <e732b6801003220231i52a87119yd4361b68c07460b9@mail.gmail.com>
Subject: Re: [BUG?] cavium cn56xx and dma_map_single warning
From:   Zhuang Yuyao <mlistz@gmail.com>
To:     David Daney <ddaney@caviumnetworks.com>
Cc:     linux-mips@linux-mips.org
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Here are some additional information.I added a dump_stack() where the
warning happened and changed pr_warning() to panic(). here is the
output. I am using linux 2.6.32.9.

Is it scsi drivers where i should look into, to make the scsi  do not
request for memory reserved by octeon?

[<ffffffff8110e718>] dump_stack+0x8/0x34
[<ffffffff811144ec>] octeon_map_dma_mem+0x4dc/0x538
[<ffffffff81126a50>] dma_map_sg+0xa0/0xe0
[<ffffffff812e1c98>] scsi_dma_map+0x40/0x50
[<ffffffff8130297c>] aac_build_sgraw+0x44/0x1a0
[<ffffffff81302cd0>] aac_read_raw_io+0x98/0x120
[<ffffffff81300f50>] aac_scsi_cmd+0xb48/0x14b8
[<ffffffff812ff39c>] aac_queuecommand+0x94/0xa8
[<ffffffff812d9c74>] scsi_dispatch_cmd+0x104/0x260
[<ffffffff812dff94>] scsi_request_fn+0x374/0x430
[<ffffffff81279e48>] generic_unplug_device+0x38/0x50
[<ffffffff8118328c>] sync_page+0x4c/0x70
[<ffffffff811832c0>] sync_page_killable+0x10/0x48
[<ffffffff8110fb2c>] __wait_on_bit_lock+0xcc/0x158
[<ffffffff811831b0>] __lock_page_killable+0x50/0x60
[<ffffffff8118549c>] generic_file_aio_read+0x444/0x6c0
[<ffffffff811b81dc>] do_sync_read+0xbc/0x120
[<ffffffff811b8fc4>] vfs_read+0xb4/0x178
[<ffffffff811b9170>] SyS_read+0x48/0xa0
[<ffffffff81102bc4>] handle_sys64+0x44/0x60

Kernel panic - not syncing: dma_map_single: conflict 0xffc00000


On Mon, Mar 22, 2010 at 3:01 PM, Zhuang Yuyao <mlistz@gmail.com> wrote:
> Hi,
>
> I've got a strange dma error on my cavium cn56xx board.
>
> ......
>