From andi@lisas.de Fri Jan 1 20:31:31 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 01 Jan 2010 20:31:36 +0100 (CET) Received: from rhlx01.hs-esslingen.de ([129.143.116.10]:33405 "EHLO rhlx01.hs-esslingen.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492167Ab0AATbb (ORCPT ); Fri, 1 Jan 2010 20:31:31 +0100 Received: by rhlx01.hs-esslingen.de (Postfix, from userid 102) id 499A640080; Fri, 1 Jan 2010 20:31:30 +0100 (CET) Date: Fri, 1 Jan 2010 20:31:30 +0100 From: Andreas Mohr To: Takashi Iwai Cc: alsa-devel@alsa-project.org, Ralf Baechle , Wu Zhangjin , Thomas Bogendoerfer , linux-mips@linux-mips.org, Benjamin Herrenschmidt , Kumar Gala , Becky Bruce Subject: Re: [PATCH 0/5] PCM mmap (temporary) fixes for non-coherent architectures Message-ID: <20100101193130.GA21510@rhlx01.hs-esslingen.de> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="BXVAT5kNtrzKuDFl" Content-Disposition: inline In-Reply-To: <1259248388-20095-1-git-send-email-tiwai@suse.de> X-Priority: none User-Agent: Mutt/1.5.18 (2008-05-17) X-archive-position: 25469 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: andi@lisas.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1466 Content-Length: 14931 Lines: 325 --BXVAT5kNtrzKuDFl Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi, I've tried this patch set (with the typo-corrected part 4) on my ASUS WL-500gP v2 MIPSEL via a backport to 2.6.31.9, but all I get is a small blip of the sound I wanted to play, and then the system is fubar (I believe just the same thing as what happened without having this patch applied). Probably I'm dense and the patch is ARM-only, or my MIPSEL has incorrect cache coherency versus this patch set, or the backport failed due to missing requirements or conflicts. Attached are two crash logs. Any ideas? Would be nice to see this resolved as well, since I now _finally_ have a working consterna^Wconstellation (netconsole, boot, USB host, USB serial) with my patched-up 2.6.31.9 build. Thanks, Andreas Mohr --BXVAT5kNtrzKuDFl Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename="usb_audio_crash_after_patches.log" Instruction bus error, epc == 2ab4f178, ra == 80000018 kobject: 'ep_01' (81e8a690): kobject_uevent_env kobject: 'ep_01' (81e8a690): kobject_uevent_env: filter function caused the event to drop! kobject: 'ep_01' (81e8a690): kobject_cleanup kobject: 'ep_01' (81e8a690): calling ktype release kobject: 'ep_01': free name EHCI_DIS: hcd 81dd7080 ep 81e09180 qh (null) (#01) Instruction bus error, epc == 8003475c, ra == 80000018 Oops[#1]: Cpu 0 $ 0 : 00000000 1000d001 00000000 80000000 $ 4 : 81dad838 806e5e00 00000000 00000000 $ 8 : 00000000 00000000 81040000 81f16000 $12 : 81da0868 80340000 81da0868 0000000a $16 : 00000000 7fb2dd68 000005b8 81dad838 $20 : 0000000a 81e37ef8 20000000 fffffff6 $24 : 00000000 801874c0 $28 : 81e36000 81e37e40 00000001 80000018 Hi : 00000000 Lo : 00000000 epc : 8003475c wait_consider_task+0x49c/0xe20 Not tainted ra : 80000018 0x80000018 Status: 1000d003 KERNEL EXL IE Cause : 00800018 PrId : 00029029 (Broadcom BCM3302) Modules linked in: ipv6 snd_usb_audio arc4 snd_pcm_oss ecb snd_mixer_oss cryptomgr aead snd_pcm pcompress crypto_blkcipher snd_timer crypto_hash snd_page_alloc evdev ftdi_sio crypto_algapi snd_usb_lib snd_rawmidi b43 mac80211 snd_seq_device snd_hwdep usbhid cfg80211 usbserial hid snd input_core soundcore Process bash (pid: 1447, threadinfo=81e36000, task=81da0838, tls=00000000) Stack : 8033dab8 80027e24 815bdde4 802b89e0 8033c000 81da0838 00000000 8000ace0 00000000 00000000 80047476 0051f510 81dad838 81da0838 00000000 81da094c 81e37ef8 ffffffff 20000000 fffffff6 00000001 800351b4 00000004 801c7cf8 81f323d8 81db5870 00000000 81da0838 8002d0c4 806e5e08 806e5e08 81da0838 0000000a 00000000 7fb2dd68 00000000 0051f56c 00000000 00440000 00525790 ... Call Trace: [<8003475c>] wait_consider_task+0x49c/0xe20 [<800351b4>] do_wait+0xd4/0x340 [<800354e0>] sys_wait4+0xc0/0xec [<800031f0>] stack_done+0x20/0x3c Code: 00431024 14400251 00000000 16000051 8eb1000c 12200051 8fa30020 0c002bc1 Disabling lock debugging due to kernel taint Instruction bus error, epc == 80004dd8, ra == 80000018 Oops[#2]: Cpu 0 $ 0 : 00000000 1000d000 00000000 00000000 $ 4 : 7f9765d0 81c0ddd0 00000000 1000d001 $ 8 : 00000000 00000000 00000000 81e36000 $12 : 81c084b0 003d0900 81c084b0 00000000 $16 : 00000004 00000000 81c0ddc0 81c0ddc0 $20 : 7f9765d0 00000000 81c0ddcc 00000000 $24 : 00000000 801874c0 $28 : 81c0c000 81c0dd98 00000001 80000018 Hi : 0000004d Lo : ab64ed00 epc : 80004dd8 __copy_user+0xd4/0x2bc Tainted: G D ra : 80000018 0x80000018 Status: 1000d003 KERNEL EXL IE Cause : 00800018 PrId : 00029029 (Broadcom BCM3302) Modules linked in: ipv6 snd_usb_audio arc4 snd_pcm_oss ecb snd_mixer_oss cryptomgr aead snd_pcm pcompress crypto_blkcipher snd_timer crypto_hash snd_page_alloc evdev ftdi_sio crypto_algapi snd_usb_lib snd_rawmidi b43 mac80211 snd_seq_device snd_hwdep usbhid cfg80211 usbserial hid snd input_core soundcore Process init (pid: 1, threadinfo=81c0c000, task=81c08480, tls=00000000) Stack : 00000000 81c0dda8 81c0df00 80350fb0 81c0ddc0 81c0ddc4 81c0ddc8 81c0ddcc 81c0ddd0 81c0ddd4 00000400 00000000 00000000 00000000 00000000 00000000 00000000 00000000 81f0b000 ffffff9c 81c0dea8 0044a234 7f9769b8 8009b864 00000001 81c0dea8 00000001 81f0b000 ffffff9c 800a2d18 00000003 00000002 00000003 00000003 0000000d 00000000 00000000 00000000 000000c9 00001180 ... Call Trace: [<80004dd8>] __copy_user+0xd4/0x2bc Code: 8ca80000 24a50004 24c6fffc 1706fffb 24840004 10c00040 00864821 240a0020 Instruction bus error, epc == 80004dd8, ra == 80000018 Oops[#3]: Cpu 0 $ 0 : 00000000 1000d000 00000000 00000004 $ 4 : 004c7130 81735dd0 00000000 1000d001 $ 8 : 00000080 00000000 00000000 81e36000 $12 : 81d0e868 00000000 81d0e868 00000000 $16 : 00000004 00000001 81735dc0 81735dc0 $20 : 004c7130 004c7360 81735dcc 00000000 $24 : 00000000 80181208 $28 : 81734000 81735d98 004b0000 80000018 Hi : 00000000 Lo : 00000000 epc : 80004dd8 __copy_user+0xd4/0x2bc Tainted: G D ra : 80000018 0x80000018 Status: 1000d003 KERNEL EXL IE Cause : 00800018 PrId : 00029029 (Broadcom BCM3302) Modules linked in: ipv6 snd_usb_audio arc4 snd_pcm_oss ecb snd_mixer_oss cryptomgr aead snd_pcm pcompress crypto_blkcipher snd_timer crypto_hash snd_page_alloc evdev ftdi_sio crypto_algapi snd_usb_lib snd_rawmidi b43 mac80211 snd_seq_device snd_hwdep usbhid cfg80211 usbserial hid snd input_core soundcore Process sshd (pid: 1445, threadinfo=81734000, task=81d0e838, tls=00000000) Stack : 0041663c 81735da8 00000000 80200478 81735dc0 81735dc4 81735dc8 81735dcc 81735dd0 81735dd4 00000098 00000000 00000000 00000080 00000000 00000000 00000000 00000000 81735e20 00000001 00000000 00000000 00000040 81735e28 81735e28 fffffdee 81735e20 8009e530 00000000 8173b080 81f731e8 8167d900 00000000 00000000 004bd538 00000090 81cdd360 81ed3160 00000000 00000001 ... Call Trace: [<80004dd8>] __copy_user+0xd4/0x2bc Code: 8ca80000 24a50004 24c6fffc 1706fffb 24840004 10c00040 00864821 240a0020 Instruction bus error, epc == 80096fa0, ra == 80000018 Oops[#4]: Cpu 0 $ 0 : 00000000 1000d000 c02e2002 00000002 $ 4 : 00000001 803b5514 00000001 00000001 $ 8 : 80351000 00080000 81040000 81e36000 $12 : 00000000 645fcd00 81da0868 0000000b $16 : 00000001 81e26138 0044e000 003f0fff $20 : 0046c000 0126b79f 00000000 00000000 $24 : 00000000 80018ff0 $28 : 81c0c000 81c0db48 fffffffe 80000018 Hi : 00000000 Lo : 00000000 epc : 80096fa0 swap_info_get+0x74/0xfc Tainted: G D ra : 80000018 0x80000018 Status: 1000d003 KERNEL EXL IE Cause : 00800018 PrId : 00029029 (Broadcom BCM3302) Modules linked in: ipv6 snd_usb_audio arc4 snd_pcm_oss ecb snd_mixer_oss cryptomgr aead snd_pcm pcompress crypto_blkcipher snd_timer crypto_hash snd_page_alloc evdev ftdi_sio crypto_algapi snd_usb_lib snd_rawmidi b43 mac80211 snd_seq_device snd_hwdep usbhid cfg80211 usbserial hid snd input_core soundcore Process init (pid: 1, threadinfo=81c0c000, task=81c08480, tls=00000000) Stack : fffffffe 800736a0 00000008 81da0870 80350fd0 80099498 81c08614 81024d60 81e26130 0044c000 00002000 81e26138 0044e000 80088a30 8033dab8 80029d78 7f9765d0 00000000 0046bfff 8033d9c0 81e244a0 81e25004 81e25004 0046c000 00000000 00000001 81e0ba9c 81e244a0 8037f840 81e244d4 81c08480 00000000 00000001 00000000 00000001 8008db1c 81c0dbf0 81e2d354 00000000 ffffffff ... Call Trace: [<80096fa0>] swap_info_get+0x74/0xfc [<80099498>] free_swap_and_cache+0x1c/0x218 [<80088a30>] unmap_vmas+0x418/0x63c [<8008db1c>] exit_mmap+0xb8/0x148 [<8002e3c4>] mmput+0xc0/0x1d8 [<800333e8>] exit_mm+0x260/0x298 [<800357cc>] do_exit+0x1cc/0x688 [<80014658>] nmi_exception_handler+0x0/0x34 Code: 00041840 8ca20020 00431021 <94440000> 1480001d 8fbf0014 3c048030 3c05802c 24a5f280 Fixing recursive fault but reboot is needed! Instruction bus error, epc == 80011530, ra == 80000018 Oops[#5]: Cpu 0 $ 0 : 00000000 1000d001 24020000 80000000 $ 4 : 7fe3fd00 24021017 00000278 81d86be4 $ 8 : 800125cc 80621e80 ffffffff ffffffff $12 : 00000000 80340000 81d86868 0000000b $16 : 00000000 00000000 7fe3fcf0 80621f30 $20 : 7fe3fd08 7fe3fd00 81d86be4 00000012 $24 : 00000000 8025e170 $28 : 80620000 80621e10 80621e80 80000018 Hi : 00000000 Lo : 00000000 epc : 80011530 install_sigtramp+0x20/0x54 Tainted: G D ra : 80000018 0x80000018 Status: 1000d003 KERNEL EXL IE Cause : 00800018 PrId : 00029029 (Broadcom BCM3302) Modules linked in: ipv6 snd_usb_audio arc4 snd_pcm_oss ecb snd_mixer_oss cryptomgr aead snd_pcm pcompress crypto_blkcipher snd_timer crypto_hash snd_page_alloc evdev ftdi_sio crypto_algapi snd_usb_lib snd_rawmidi b43 mac80211 snd_seq_device snd_hwdep usbhid cfg80211 usbserial hid snd input_core soundcore Process sshd (pid: 1372, threadinfo=80620000, task=81d86838, tls=00000000) Stack : 80621f30 80621e98 8059ae20 8061f004 00000009 80621f30 00000012 8001263c 81e82448 81e82448 81c59808 800b212c 80621f30 00000012 80621e80 81d86be4 80621e98 ffffffff 004b352c 00000000 00000004 800116bc 817a5000 80621e80 80621f30 80621ea8 00000010 81e82448 00000000 0040ac18 00000000 00000000 00000000 00000000 00000012 00040002 00000000 000005a5 00000000 0000000b ... Call Trace: [<80011530>] install_sigtramp+0x20/0x54 [<8001263c>] setup_frame+0x70/0x110 [<800116bc>] do_notify_resume+0x158/0x428 [<800015f0>] work_notifysig+0xc/0x14 Code: afbf001c 00a22821 02008821 2402000c ac820004 3c038038 8c620038 0040f809 --BXVAT5kNtrzKuDFl Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename="usb_audio_crash_after_patches_2.log" Instruction bus error, epc == 2ac68e50, ra == 80000018 Instruction bus error, epc == 8003475c, ra == 80000018 Oops[#1]: Cpu 0 $ 0 : 00000000 1000d001 00000000 80000000 $ 4 : 81d4f838 80733c00 00000000 00000000 $ 8 : 00000000 00000000 81040000 81ef2000 $12 : 81312868 80340000 81312868 0000000a $16 : 00000000 7fd95c08 000005af 81d4f838 $20 : 0000000a 81891ef8 20000000 fffffff6 $24 : 00000000 80018ff0 $28 : 81890000 81891e40 00000001 80000018 Hi : 00000000 Lo : 00000000 epc : 8003475c wait_consider_task+0x49c/0xe20 Not tainted ra : 80000018 0x80000018 Status: 1000d003 KERNEL EXL IE Cause : 00800018 PrId : 00029029 (Broadcom BCM3302) Modules linked in: ipv6 arc4 snd_usb_audio ecb snd_pcm_oss cryptomgr snd_mixer_oss aead pcompress snd_pcm crypto_blkcipher crypto_hash snd_timer crypto_algapi snd_page_alloc evdev snd_usb_lib b43 ftdi_sio mac80211 snd_rawmidi snd_seq_device cfg80211 usbhid snd_hwdep usbserial hid snd input_core soundcore Process bash (pid: 1450, threadinfo=81890000, task=81312838, tls=00000000) Stack : 8033dab8 80027e24 7fd95c08 802c0000 81db5838 81312838 00000000 8000ace0 00000000 00000000 80047476 0051f510 81d4f838 81312838 00000000 8131294c 81891ef8 ffffffff 20000000 fffffff6 00000001 800351b4 00000004 801c7cf8 81e590b8 81db5870 00000000 81312838 8002d0c4 80733c08 80733c08 81312838 0000000a 00000000 7fd95c08 00000000 0051f56c 00000000 00440000 00525790 ... Call Trace: [<8003475c>] wait_consider_task+0x49c/0xe20 [<800351b4>] do_wait+0xd4/0x340 [<800354e0>] sys_wait4+0xc0/0xec [<800031f0>] stack_done+0x20/0x3c Code: 00431024 14400251 00000000 16000051 8eb1000c 12200051 8fa30020 0c002bc1 Disabling lock debugging due to kernel taint Instruction bus error, epc == 80004dd8, ra == 80000018 Oops[#2]: Cpu 0 $ 0 : 00000000 1000d000 00000000 00000000 $ 4 : 7fca8450 81c0ddd0 00000000 1000d001 $ 8 : 00000000 00000000 00000000 81890000 $12 : 81c084b0 003d0900 81c084b0 00000000 $16 : 00000004 00000000 81c0ddc0 81c0ddc0 $20 : 7fca8450 00000000 81c0ddcc 00000000 $24 : 00000000 801874c0 $28 : 81c0c000 81c0dd98 00000001 80000018 Hi : 0000013d Lo : 9812c600 epc : 80004dd8 __copy_user+0xd4/0x2bc Tainted: G D ra : 80000018 0x80000018 Status: 1000d003 KERNEL EXL IE Cause : 00800018 PrId : 00029029 (Broadcom BCM3302) Modules linked in: ipv6 arc4 snd_usb_audio ecb snd_pcm_oss cryptomgr snd_mixer_oss aead pcompress snd_pcm crypto_blkcipher crypto_hash snd_timer crypto_algapi snd_page_alloc evdev snd_usb_lib b43 ftdi_sio mac80211 snd_rawmidi snd_seq_device cfg80211 usbhid snd_hwdep usbserial hid snd input_core soundcore Process init (pid: 1, threadinfo=81c0c000, task=81c08480, tls=00000000) Stack : 00000000 81c0dda8 81c0df00 80350fb0 81c0ddc0 81c0ddc4 81c0ddc8 81c0ddcc 81c0ddd0 81c0ddd4 00000400 00000000 00000000 00000000 00000000 00000000 00000000 00000000 81ec3000 ffffff9c 81c0dea8 0044a234 7fca8838 8009b864 00000001 81c0dea8 00000001 81ec3000 ffffff9c 800a2d18 00000003 00000002 00000003 00000003 0000000d 00000000 00000000 00000000 000000cb 00001180 ... Call Trace: [<80004dd8>] __copy_user+0xd4/0x2bc Code: 8ca80000 24a50004 24c6fffc 1706fffb 24840004 10c00040 00864821 240a0020 Instruction bus error, epc == 80004dd8, ra == 80000018 Oops[#3]: Cpu 0 $ 0 : 00000000 1000d000 00000000 00000004 $ 4 : 004c7130 81ebbdd0 00000000 1000d001 $ 8 : 00000080 00000000 00000000 81890000 $12 : 81d5c868 00000000 81d5c868 00000000 $16 : 00000004 00000001 81ebbdc0 81ebbdc0 $20 : 004c7130 004c7360 81ebbdcc 00000000 $24 : 00000000 80181208 $28 : 81eba000 81ebbd98 004b0000 80000018 Hi : 00000000 Lo : 00000000 epc : 80004dd8 __copy_user+0xd4/0x2bc Tainted: G D ra : 80000018 0x80000018 Status: 1000d003 KERNEL EXL IE Cause : 00800018 PrId : 00029029 (Broadcom BCM3302) Modules linked in: ipv6 arc4 snd_usb_audio ecb snd_pcm_oss cryptomgr snd_mixer_oss aead pcompress snd_pcm crypto_blkcipher crypto_hash snd_timer crypto_algapi snd_page_alloc evdev snd_usb_lib b43 ftdi_sio mac80211 snd_rawmidi snd_seq_device cfg80211 usbhid snd_hwdep usbserial hid snd input_core soundcore Process sshd (pid: 1448, threadinfo=81eba000, task=81d5c838, tls=00000000) Stack : cd09000a 81ebbda8 00000000 00000005 81ebbdc0 81ebbdc4 81ebbdc8 81ebbdcc 81ebbdd0 81ebbdd4 00000098 00000000 00000000 00000080 00000000 00000000 000000e2 81cdd360 81ea39d0 81c4ff20 000000e2 81cdd360 81c4ff20 80251b38 000000e3 80251e78 81ebbe20 8009e530 81cdd080 81c4ff20 81cdd388 80215c18 80000000 81c4ff20 00000042 000000e2 81cdd360 81c4ff20 00000042 801af5f0 ... Call Trace: [<80004dd8>] __copy_user+0xd4/0x2bc Code: 8ca80000 24a50004 24c6fffc 1706fffb 24840004 10c00040 00864821 240a0020 Kernel panic - not syncing: Attempted to kill init! --BXVAT5kNtrzKuDFl-- From yuasa@linux-mips.org Sun Jan 3 06:13:54 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 06:13:58 +0100 (CET) Received: from mail-yx0-f204.google.com ([209.85.210.204]:35926 "EHLO mail-yx0-f204.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491124Ab0ACFNy (ORCPT ); Sun, 3 Jan 2010 06:13:54 +0100 Received: by yxe42 with SMTP id 42so14476699yxe.22 for ; Sat, 02 Jan 2010 21:13:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:sender:date:from:to:cc :subject:message-id:x-mailer:mime-version:content-type :content-transfer-encoding; bh=e9DsUOz2i8zq/RmlFVJYkf5EGNX8gZ2NJ3UF+62AKPY=; b=PGOZhuAZlocbvgI1zEoxs7xYDU8G8TMhOHtQV/FIWkKcxB7Yjo4XQAvi5aswUTVGZ6 aKzxWWj8WcdPbhW7x+u4FE7n8QRgWVacIvMdXcSmBxf6JJsf3WCy8H4ETdluy1G+zJ6x BIFS6oCMcog+sknrHon21VhvbGh9yTd6JcN/Y= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:date:from:to:cc:subject:message-id:x-mailer:mime-version :content-type:content-transfer-encoding; b=tTFMY6qvdWsxnz8t2oaw0sPv0o0cmTd/pTcutlYds0mLjdUj7r9pPBHiN+md227sAO NrH++hQM+th3+EHnoE0IIgE0BQEwKD5TYQEprhUWO4N3R5cMTj8oohsWsRIfpaZw333A wdYm5CkDqM11kLNoTt6xxyvoi39woXIzVa+tM= Received: by 10.91.42.25 with SMTP id u25mr3666416agj.70.1262495622968; Sat, 02 Jan 2010 21:13:42 -0800 (PST) Received: from ypsilon.skybright.jp (sannin29006.nirai.ne.jp [203.160.29.6]) by mx.google.com with ESMTPS id 13sm8455229gxk.9.2010.01.02.21.13.40 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sat, 02 Jan 2010 21:13:42 -0800 (PST) Date: Sun, 3 Jan 2010 14:13:04 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: yuasa@linux-mips.org, linux-mips Subject: [PATCH] MIPS: ar7 remove unused prom_getchar() Message-Id: <20100103141304.2f7b653f.yuasa@linux-mips.org> X-Mailer: Sylpheed 2.7.1 (GTK+ 2.16.6; i686-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-archive-position: 25470 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yuasa@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1837 Content-Length: 611 Lines: 26 Signed-off-by: Yoichi Yuasa --- arch/mips/ar7/prom.c | 7 ------- 1 files changed, 0 insertions(+), 7 deletions(-) diff --git a/arch/mips/ar7/prom.c b/arch/mips/ar7/prom.c index 453dd22..c1fdd36 100644 --- a/arch/mips/ar7/prom.c +++ b/arch/mips/ar7/prom.c @@ -272,13 +272,6 @@ static inline void serial_out(int offset, int value) writel(value, (void *)PORT(offset)); } -char prom_getchar(void) -{ - while (!(serial_in(UART_LSR) & UART_LSR_DR)) - ; - return serial_in(UART_RX); -} - int prom_putchar(char c) { while ((serial_in(UART_LSR) & UART_LSR_TEMT) == 0) -- 1.6.5.7 From yuasa@linux-mips.org Sun Jan 3 06:39:58 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 06:40:03 +0100 (CET) Received: from mail-yx0-f204.google.com ([209.85.210.204]:39622 "EHLO mail-yx0-f204.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491124Ab0ACFj6 (ORCPT ); Sun, 3 Jan 2010 06:39:58 +0100 Received: by yxe42 with SMTP id 42so14484519yxe.22 for ; Sat, 02 Jan 2010 21:39:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:sender:date:from:to:cc :subject:message-id:x-mailer:mime-version:content-type :content-transfer-encoding; bh=RC4wGJMPB5FFgaqQlRQ0gIkX2rs9Yd+FrvubCPjCqt8=; b=sDpEVY0SQcK9mlMj0qtn5G/EvWgVR3e57tm4oRht09aodGe9DNU2MosWXkw8MOE5jD n6SJq9X0z3b36JLGEjKOuh2pg3vr+FfCvQHceJH7aTBddnu+WFJrldBoVeUyLMnQoXOY gbczW7MTIN2jde4pNXbCpHJ4S1romSb9PYGDw= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:date:from:to:cc:subject:message-id:x-mailer:mime-version :content-type:content-transfer-encoding; b=YV/uN68d00je1n+J+w3nVbqCvnr3UZSJKzaxoj+7Kx3q1sIvFpn+1Z61cI80kh/U8k H/kIv7n1kytDJZvPywli/TOGDXc8KtLBnxi4ADu4DybZ5wS6EP4Zg9yjOfi9LcPxiuVC quB6qr91FgqFrgOQCmLIKg9G4Df6Tej3CqPMI= Received: by 10.90.9.5 with SMTP id 5mr10885133agi.48.1262497191526; Sat, 02 Jan 2010 21:39:51 -0800 (PST) Received: from ypsilon.skybright.jp (sannin29006.nirai.ne.jp [203.160.29.6]) by mx.google.com with ESMTPS id 16sm8426687gxk.11.2010.01.02.21.39.47 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sat, 02 Jan 2010 21:39:48 -0800 (PST) Date: Sun, 3 Jan 2010 14:39:11 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: yuasa@linux-mips.org, linux-mips Subject: [PATCH] MIPS: bcm63xx fix copy CONFIG_CMDLINE twice Message-Id: <20100103143911.dafb7e06.yuasa@linux-mips.org> X-Mailer: Sylpheed 2.7.1 (GTK+ 2.16.6; i686-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-archive-position: 25471 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yuasa@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1841 Content-Length: 603 Lines: 24 builtin cmdline is copied by arch_mem_init() Signed-off-by: Yoichi Yuasa --- arch/mips/bcm63xx/prom.c | 3 --- 1 files changed, 0 insertions(+), 3 deletions(-) diff --git a/arch/mips/bcm63xx/prom.c b/arch/mips/bcm63xx/prom.c index fb284fb..be252ef 100644 --- a/arch/mips/bcm63xx/prom.c +++ b/arch/mips/bcm63xx/prom.c @@ -40,9 +40,6 @@ void __init prom_init(void) reg &= ~mask; bcm_perf_writel(reg, PERF_CKCTL_REG); - /* assign command line from kernel config */ - strcpy(arcs_cmdline, CONFIG_CMDLINE); - /* register gpiochip */ bcm63xx_gpio_init(); -- 1.6.5.7 From yuasa@linux-mips.org Sun Jan 3 06:48:19 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 06:48:23 +0100 (CET) Received: from mail-yw0-f182.google.com ([209.85.211.182]:45433 "EHLO mail-yw0-f182.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491146Ab0ACFsT (ORCPT ); Sun, 3 Jan 2010 06:48:19 +0100 Received: by ywh12 with SMTP id 12so15230255ywh.21 for ; Sat, 02 Jan 2010 21:48:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:sender:date:from:to:cc :subject:message-id:x-mailer:mime-version:content-type :content-transfer-encoding; bh=pE6Q5w/mXZYicjgMDza343474hzNYfc77DE58tiQNQc=; b=MzqmQSy9OZploWvy4C/Drlf3zUkp5H60HkULkleNwoE6X5L4+go4G+6zSnqle2yAlu ZoHIEloygHYZYCbJgate46XYJfu/6ldeohUeHebNDFcPIJu6GUfSeJVYqVD0A6VdkS0a Tc5hO/WCe7QgRX7Rc9EWr5dK2bgjN3ChSuIJ4= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:date:from:to:cc:subject:message-id:x-mailer:mime-version :content-type:content-transfer-encoding; b=LvNH3681HLToApL+it5T8r3/zQJYUxN8fw9bGjBD1o+raKbaIbkDpt/c4N0AdNg5uJ FfojG/73omAO1WetgdtLlUfoDijKmFguA+4wNtD58UWMm2BgqNIsDVJu1sw5+QhxS479 Cig+IWMh9RsoMt+EbmmeJbTiCDSk6n1N3nj50= Received: by 10.91.159.2 with SMTP id l2mr2828701ago.73.1262497692074; Sat, 02 Jan 2010 21:48:12 -0800 (PST) Received: from ypsilon.skybright.jp (sannin29006.nirai.ne.jp [203.160.29.6]) by mx.google.com with ESMTPS id 14sm8384121gxk.14.2010.01.02.21.48.10 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sat, 02 Jan 2010 21:48:11 -0800 (PST) Date: Sun, 3 Jan 2010 14:47:34 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: yuasa@linux-mips.org, linux-mips Subject: [PATCH] MIPS: remove unnecessary "Linux started" Message-Id: <20100103144734.b0e10cf2.yuasa@linux-mips.org> X-Mailer: Sylpheed 2.7.1 (GTK+ 2.16.6; i686-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-archive-position: 25472 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yuasa@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1843 Content-Length: 1639 Lines: 57 Signed-off-by: Yoichi Yuasa --- arch/mips/mipssim/sim_setup.c | 4 ---- arch/mips/mti-malta/malta-init.c | 1 - arch/mips/powertv/init.c | 2 -- 3 files changed, 0 insertions(+), 7 deletions(-) diff --git a/arch/mips/mipssim/sim_setup.c b/arch/mips/mipssim/sim_setup.c index 0824f6a..55f22a3 100644 --- a/arch/mips/mipssim/sim_setup.c +++ b/arch/mips/mipssim/sim_setup.c @@ -49,9 +49,6 @@ void __init plat_mem_setup(void) set_io_port_base(0xbfd00000); serial_init(); - - pr_info("Linux started...\n"); - } extern struct plat_smp_ops ssmtc_smp_ops; @@ -60,7 +57,6 @@ void __init prom_init(void) { set_io_port_base(0xbfd00000); - pr_info("\nLINUX started...\n"); prom_meminit(); #ifdef CONFIG_MIPS_MT_SMP diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c index f1b14c8..414f0c9 100644 --- a/arch/mips/mti-malta/malta-init.c +++ b/arch/mips/mti-malta/malta-init.c @@ -355,7 +355,6 @@ void __init prom_init(void) board_nmi_handler_setup = mips_nmi_setup; board_ejtag_handler_setup = mips_ejtag_setup; - pr_info("\nLINUX started...\n"); prom_init_cmdline(); prom_meminit(); #ifdef CONFIG_SERIAL_8250_CONSOLE diff --git a/arch/mips/powertv/init.c b/arch/mips/powertv/init.c index de0e46a..0afe227 100644 --- a/arch/mips/powertv/init.c +++ b/arch/mips/powertv/init.c @@ -117,8 +117,6 @@ void __init prom_init(void) board_nmi_handler_setup = mips_nmi_setup; board_ejtag_handler_setup = mips_ejtag_setup; - pr_info("\nLINUX started...\n"); - if (prom_argc == 1) strlcat(arcs_cmdline, prom_argv, COMMAND_LINE_SIZE); -- 1.6.5.7 From pascal@pabr.org Sun Jan 3 13:39:54 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 13:39:59 +0100 (CET) Received: from lo.gmane.org ([80.91.229.12]:46292 "EHLO lo.gmane.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491205Ab0ACMjy (ORCPT ); Sun, 3 Jan 2010 13:39:54 +0100 Received: from list by lo.gmane.org with local (Exim 4.50) id 1NRPkM-0007h7-O5 for linux-mips@linux-mips.org; Sun, 03 Jan 2010 13:39:50 +0100 Received: from rob92-6-82-231-243-221.fbx.proxad.net ([82.231.243.221]) by main.gmane.org with esmtp (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Sun, 03 Jan 2010 13:39:50 +0100 Received: from pascal by rob92-6-82-231-243-221.fbx.proxad.net with local (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Sun, 03 Jan 2010 13:39:50 +0100 X-Injected-Via-Gmane: http://gmane.org/ To: linux-mips@linux-mips.org From: "pascal@pabr.org" Subject: [RFC] Support 36-bit iomem on 32-bit Au1x00 Date: Sun, 03 Jan 2010 13:39:12 +0100 Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-Complaints-To: usenet@ger.gmane.org X-Gmane-NNTP-Posting-Host: rob92-6-82-231-243-221.fbx.proxad.net X-archive-position: 25473 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: pascal@pabr.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1901 Content-Length: 1173 Lines: 32 Hi, I believe these changes are needed on Alchemy SoCs in order to use iomem above 4G with the usual platform_device machinery: - Set CONFIG_ARCH_PHYS_ADDR_T_64BIT to make resource_size_t 64-bit. - Increase IOMEM_RESOURCE_END so that platforms can register resources. --- linux-2.6.33-rc2/arch/mips/Kconfig.orig 2009-12-30 18:06:02.000000000 +0100 +++ linux-2.6.33-rc2/arch/mips/Kconfig 2009-12-30 22:05:38.000000000 +0100 @@ -1725,6 +1725,9 @@ config 64BIT_PHYS_ADDR bool +config ARCH_PHYS_ADDR_T_64BIT + def_bool 64BIT_PHYS_ADDR + config CPU_HAS_SMARTMIPS depends on SYS_SUPPORTS_SMARTMIPS bool "Support for the SmartMIPS ASE" --- linux-2.6.33-rc2/arch/mips/include/asm/mach-au1x00/au1000.h.orig 2009-12-30 19:45:35.000000000 +0100 +++ linux-2.6.33-rc2/arch/mips/include/asm/mach-au1x00/au1000.h 2010-01-03 13:28:50.000000000 +0100 @@ -1728,7 +1728,7 @@ #define IOPORT_RESOURCE_START 0x10000000 #define IOPORT_RESOURCE_END 0xffffffff #define IOMEM_RESOURCE_START 0x10000000 -#define IOMEM_RESOURCE_END 0xffffffff +#define IOMEM_RESOURCE_END 0xfffffffffLL #define PCI_IO_START 0 #define PCI_IO_END 0 From teawater@gmail.com Sun Jan 3 16:07:05 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 16:07:10 +0100 (CET) Received: from mail-px0-f181.google.com ([209.85.216.181]:44838 "EHLO mail-px0-f181.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492556Ab0ACPHF (ORCPT ); Sun, 3 Jan 2010 16:07:05 +0100 Received: by pxi11 with SMTP id 11so10591212pxi.22 for ; Sun, 03 Jan 2010 07:06:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:from:date:message-id :subject:to:cc:content-type; bh=pr4gsF5bNgAoWx5NRZHMGZMll3kEyEwhqvmeS30S8ZQ=; b=QTfin0152BKLCHdSpZJp6LQuSfCJdYZLaG/LWP1VbMMq++yK6VPbDupvyoaXq/ZwVV faOPa/pISHsj+WTi2U3gAZPQdMZQy1FqFczvkm5OZ0ogZXaPQKIsL4s9eV44rs33bv8A isvnj27CdVtG4JlqDsWopFckUvLs3y+R9hFFc= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:from:date:message-id:subject:to:cc:content-type; b=adheAyaN4TjAPnbC8heI5qMMsFiwrMBoDSEX/ojZ0wzldd4ElE/XnVsF0cmDptGIcU QbDG4ZysTdUhXiCcAz1jdafmSRaLGh+0seQKfDxmCAHqdtF5u5qaSbMheXVAoL6qvGdB wUhkWJ2NlOPahCHVJccx8WWwEvrp7o8cdNfvY= MIME-Version: 1.0 Received: by 10.142.56.11 with SMTP id e11mr14894314wfa.118.1262531215351; Sun, 03 Jan 2010 07:06:55 -0800 (PST) From: Hui Zhu Date: Sun, 3 Jan 2010 23:05:05 +0800 Message-ID: Subject: [PATCH] stack2core: show stack message and convert it to core file when kernel die To: Russell King , saeed bishara , Catalin Marinas , Nicolas Pitre , Ralf Baechle , David Daney , Tomaso Paoletti , Chris Dearman , Paul Gortmaker , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Frederic Weisbecker , Alexey Dobriyan , Brian Gerst , Tejun Heo , Rusty Russell , Andrew Morton , Steven Rostedt , Greg Kroah-Hartman , "Paul E. McKenney" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org Cc: Coly Li Content-Type: text/plain; charset=ISO-8859-1 X-archive-position: 25474 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: teawater@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1915 Content-Length: 38694 Lines: 1425 Hello, For, when the kernel die, the user will get some message like: PC is at kernel_init+0xd4/0x104 LR is at _atomic_dec_and_lock+0x48/0x6c pc : [] lr : [] psr: 60000013 sp : c7823fd8 ip : c7823f48 fp : c7823ff4 Stack: (0xc7823fd8 to 0xc7824000) 3fc0: 00000000 00000001 Backtrace: [] (kernel_init+0x0/0x104) from [] (do_exit+0x0/0x880) This backtrace have some wrong message sometime and cannot get any val. Of course, kdump can get more message. But it need do some a lot of other config. The stack2core function, can let kernel show stack message when kernel die. This stack message can be convert to core file by program s2c (tools/s2c). Then gdb can show the message in this core file. For example: When kernel die, show some message: S2C:elf_class=1 S2C:elf_data=1 S2C:elf_arch=40 S2C:elf_osabi=0 S2C:r0=0x00000000; S2C:r1=0xc7822000; S2C:r2=0xc7823f48; S2C:r3=0x00000003; S2C:r4=0x00000000; S2C:r5=0x00000000; S2C:r6=0x00000000; S2C:r7=0x00000000; S2C:r8=0x00000000; S2C:r9=0x00000000; S2C:r10=0x00000000; S2C:fp=0xc7823ff4; S2C:ip=0xc7823f48; S2C:sp=0xc7823fd8; S2C:lr=0xc01911f8; S2C:pc=0xc0008470; S2C:cpsr=0x60000013; S2C:ORIG_r0=0xffffffff; S2C:stack=0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, S2C:stack=0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, S2C:stack=0x00, 0x00, 0x00, 0x00, 0xf8, 0x3f, 0x82, 0xc7, S2C:stack=0x60, 0x26, 0x04, 0xc0, 0xa8, 0x83, 0x00, 0xc0, S2C:stack=0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, S2C:commandline=console=ttyAMA0,115200 ip=dhcp root=/dev/nfs nfsroot=10.0.2.2:/home/teawater/kernel/arm_versatile_926ejs.glibc_std.standard/export/dist,nfsvers=2,mountprog=21111,nfsprog=11111,udp rw highres=off UMA=1 Save it to file t.txt. This is the reg message and stack message. Get the s2c program. cd linux-2.6/tools/s2c sudo make install Get the core file. s2c < t.txt >core Use core file. gdb ./vmlinux core Core was generated by `console=ttyAMA0,115200 ip=dhcp root=/dev/nfs nfsroot=10.0.2.2:/home/teawater/ke'. [New process 0] #0 0xc0008470 in kernel_init (unused=) at /home/teawater/kernel/arm_versatile_926ejs.glibc_std.standard/build/linux/init/main.c:916 916 buf[0] = 3; (gdb) bt #0 0xc0008470 in kernel_init (unused=) at /home/teawater/kernel/arm_versatile_926ejs.glibc_std.standard/build/linux/init/main.c:916 #1 0xc0042660 in sys_waitid (which=, upid=, infop=0x0, options=0, ru=0x14) at /home/teawater/kernel/arm_versatile_926ejs.glibc_std.standard/build/linux/kernel/exit.c:1798 Backtrace stopped: previous frame inner to this frame (corrupt stack?) (gdb) frame 1 #1 0xc0042660 in sys_waitid (which=, upid=, infop=0x0, options=0, ru=0x14) at /home/teawater/kernel/arm_versatile_926ejs.glibc_std.standard/build/linux/kernel/exit.c:1798 1798 pid = find_get_pid(upid); (gdb) p pid $1 = (struct pid *) 0x0 It can support lkm: The stack message will include: S2C:add-symbol-file e.ko 0xffffffffa0000000 In gdb, use command "add-symbol-file e.ko 0xffffffffa0000000" let gdb load the symbol of this lkm. Now, stack2core support x86, x8664, arm, mips. Thanks, Hui --- arch/arm/kernel/traps.c | 27 + arch/mips/kernel/traps.c | 20 arch/x86/kernel/dumpstack_32.c | 27 + arch/x86/kernel/dumpstack_64.c | 31 + include/linux/module.h | 4 include/linux/stack2core.h | 49 + kernel/module.c | 13 lib/Kconfig.debug | 9 tools/s2c/Makefile | 15 tools/s2c/s2c.c | 1009 +++++++++++++++++++++++++++++++++++++++++ 10 files changed, 1204 insertions(+) --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -28,6 +28,7 @@ #include #include #include +#include #include "ptrace.h" #include "signal.h" @@ -242,6 +243,32 @@ static void __die(const char *str, int e THREAD_SIZE + (unsigned long)task_stack_page(tsk)); dump_backtrace(regs, tsk); dump_instr(KERN_EMERG, regs); + +#ifdef CONFIG_STACK2CORE + stack2core_header(); + + /* Show the registers */ + printk(S2CMARK"r0=0x%08x;\n", (unsigned int)regs->ARM_r0); + printk(S2CMARK"r1=0x%08x;\n", (unsigned int)regs->ARM_r1); + printk(S2CMARK"r2=0x%08x;\n", (unsigned int)regs->ARM_r2); + printk(S2CMARK"r3=0x%08x;\n", (unsigned int)regs->ARM_r3); + printk(S2CMARK"r4=0x%08x;\n", (unsigned int)regs->ARM_r4); + printk(S2CMARK"r5=0x%08x;\n", (unsigned int)regs->ARM_r5); + printk(S2CMARK"r6=0x%08x;\n", (unsigned int)regs->ARM_r6); + printk(S2CMARK"r7=0x%08x;\n", (unsigned int)regs->ARM_r7); + printk(S2CMARK"r8=0x%08x;\n", (unsigned int)regs->ARM_r8); + printk(S2CMARK"r9=0x%08x;\n", (unsigned int)regs->ARM_r9); + printk(S2CMARK"r10=0x%08x;\n", (unsigned int)regs->ARM_r10); + printk(S2CMARK"fp=0x%08x;\n", (unsigned int)regs->ARM_fp); + printk(S2CMARK"ip=0x%08x;\n", (unsigned int)regs->ARM_ip); + printk(S2CMARK"sp=0x%08x;\n", (unsigned int)regs->ARM_sp); + printk(S2CMARK"lr=0x%08x;\n", (unsigned int)regs->ARM_lr); + printk(S2CMARK"pc=0x%08x;\n", (unsigned int)regs->ARM_pc); + printk(S2CMARK"cpsr=0x%08x;\n", (unsigned int)regs->ARM_cpsr); + printk(S2CMARK"ORIG_r0=0x%08x;\n", (unsigned int)regs->ARM_ORIG_r0); + + stack2core_tail((uint8_t *)(regs->ARM_sp)); +#endif /* CONFIG_STACK2CORE */ } } --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -347,6 +347,26 @@ void show_registers(const struct pt_regs show_stacktrace(current, regs); show_code((unsigned int __user *) regs->cp0_epc); printk("\n"); +#ifdef CONFIG_STACK2CORE + stack2core_header(); + + /* Show the registers */ + { + int i; + + for (i = 0; i < 32; i++) + printk(S2CMARK"r%d=0x%lx;\n", i, regs->regs[i]); + + printk(S2CMARK"cp0_status=0x%lx;\n", regs->cp0_status); + printk(S2CMARK"hi=0x%lx;\n", regs->hi); + printk(S2CMARK"lo=0x%lx;\n", regs->lo); + printk(S2CMARK"cp0_badvaddr=0x%lx;\n", regs->cp0_badvaddr); + printk(S2CMARK"cp0_cause=0x%lx;\n", regs->cp0_cause); + printk(S2CMARK"cp0_epc=0x%lx;\n", regs->cp0_epc); + } + + stack2core_tail((uint8_t *)(regs->regs[29])); +#endif /* CONFIG_STACK2CORE */ } static DEFINE_SPINLOCK(die_lock); --- a/arch/x86/kernel/dumpstack_32.c +++ b/arch/x86/kernel/dumpstack_32.c @@ -13,6 +13,7 @@ #include #include #include +#include #include @@ -141,6 +142,32 @@ void show_registers(struct pt_regs *regs else printk("%02x ", c); } + +#ifdef CONFIG_STACK2CORE + printk("\n"); + stack2core_header(); + + /* Show the registers */ + printk(S2CMARK"bx=0x%08x;\n", (unsigned int)regs->bx); + printk(S2CMARK"cx=0x%08x;\n", (unsigned int)regs->cx); + printk(S2CMARK"dx=0x%08x;\n", (unsigned int)regs->dx); + printk(S2CMARK"si=0x%08x;\n", (unsigned int)regs->si); + printk(S2CMARK"di=0x%08x;\n", (unsigned int)regs->di); + printk(S2CMARK"bp=0x%08x;\n", (unsigned int)regs->bp); + printk(S2CMARK"ax=0x%08x;\n", (unsigned int)regs->ax); + printk(S2CMARK"ds=0x%08x;\n", (unsigned int)regs->ds); + printk(S2CMARK"es=0x%08x;\n", (unsigned int)regs->es); + printk(S2CMARK"fs=0x%08x;\n", (unsigned int)regs->fs); + printk(S2CMARK"gs=0x%08x;\n", (unsigned int)regs->gs); + printk(S2CMARK"orig_ax=0x%08x;\n", (unsigned int)regs->orig_ax); + printk(S2CMARK"ip=0x%08x;\n", (unsigned int)regs->ip); + printk(S2CMARK"cs=0x%08x;\n", (unsigned int)regs->cs); + printk(S2CMARK"flags=0x%08x;\n", (unsigned int)regs->flags); + printk(S2CMARK"sp=0x%08x;\n", (unsigned int)®s->sp); + printk(S2CMARK"ss=0x%08x;\n", (unsigned int)regs->ss); + + stack2core_tail((uint8_t *)(®s->sp)); +#endif /* CONFIG_STACK2CORE */ } printk("\n"); } --- a/arch/x86/kernel/dumpstack_64.c +++ b/arch/x86/kernel/dumpstack_64.c @@ -13,6 +13,7 @@ #include #include #include +#include #include @@ -328,6 +329,36 @@ void show_registers(struct pt_regs *regs else printk("%02x ", c); } + +#ifdef CONFIG_STACK2CORE + printk("\n"); + stack2core_header(); + + /* Show the registers */ + printk(S2CMARK"r15=0x%016x;\n", (unsigned long)regs->r15); + printk(S2CMARK"r14=0x%016x;\n", (unsigned long)regs->r14); + printk(S2CMARK"r13=0x%016x;\n", (unsigned long)regs->r13); + printk(S2CMARK"r12=0x%016x;\n", (unsigned long)regs->r12); + printk(S2CMARK"bp=0x%016x;\n", (unsigned long)regs->bp); + printk(S2CMARK"bx=0x%016x;\n", (unsigned long)regs->bx); + printk(S2CMARK"r11=0x%016x;\n", (unsigned long)regs->r11); + printk(S2CMARK"r10=0x%016x;\n", (unsigned long)regs->r10); + printk(S2CMARK"r9=0x%016x;\n", (unsigned long)regs->r9); + printk(S2CMARK"r8=0x%016x;\n", (unsigned long)regs->r8); + printk(S2CMARK"ax=0x%016x;\n", (unsigned long)regs->ax); + printk(S2CMARK"cx=0x%016x;\n", (unsigned long)regs->cx); + printk(S2CMARK"dx=0x%016x;\n", (unsigned long)regs->dx); + printk(S2CMARK"si=0x%016x;\n", (unsigned long)regs->si); + printk(S2CMARK"di=0x%016x;\n", (unsigned long)regs->di); + printk(S2CMARK"orig_ax=0x%016x;\n", (unsigned long)regs->orig_ax); + printk(S2CMARK"ip=0x%016x;\n", (unsigned long)regs->ip); + printk(S2CMARK"cs=0x%016x;\n", (unsigned long)regs->cs); + printk(S2CMARK"flags=0x%016x;\n", (unsigned long)regs->flags); + printk(S2CMARK"sp=0x%016x;\n", (unsigned long)regs->sp); + printk(S2CMARK"ss=0x%016x;\n", (unsigned long)regs->ss); + + stack2core_tail((uint8_t *)(regs->sp)); +#endif /* CONFIG_STACK2CORE */ } printk("\n"); } --- a/include/linux/module.h +++ b/include/linux/module.h @@ -726,4 +726,8 @@ static inline int module_bug_finalize(c static inline void module_bug_cleanup(struct module *mod) {} #endif /* CONFIG_GENERIC_BUG */ +#ifdef CONFIG_STACK2CORE +extern void module_print_address_for_s2c (void); +#endif /* CONFIG_STACK2CORE */ + #endif /* _LINUX_MODULE_H */ --- /dev/null +++ b/include/linux/stack2core.h @@ -0,0 +1,49 @@ +/* + * Copyright (C) 2009, 2010, Hui Zhu + */ +#ifndef _STACK2CORE_H_ +#define _STACK2CORE_H_ + +#ifdef CONFIG_STACK2CORE + +#define S2CMARK KERN_EMERG "S2C:" + +static inline void +stack2core_header(void) +{ + printk(S2CMARK"elf_class=%d\n", ELF_CLASS); + printk(S2CMARK"elf_data=%d\n", ELF_DATA); + printk(S2CMARK"elf_arch=%d\n", ELF_ARCH); + printk(S2CMARK"elf_osabi=%d\n", ELF_OSABI); +} + +static inline void +stack2core_tail(uint8_t *stack) +{ + int i = 7; + uint8_t *stack_end = (uint8_t *)(((unsigned long)stack & (~(THREAD_SIZE - 1))) + THREAD_SIZE); + + /* Show stack. */ + for (; stack < stack_end; stack++) { + if (i > 6) { + printk("\n"); + printk(S2CMARK"stack=0x%02x,", stack[0]); + i = 0; + } + else { + printk(" 0x%02x,", stack[0]); + i ++; + } + } + printk("\n"); + + /* Show the modules. */ + module_print_address_for_s2c (); + + /* Show command line. */ + printk(S2CMARK"commandline=%s\n", saved_command_line); +} + +#endif /* CONFIG_STACK2CORE */ + +#endif /* _STACK2CORE_H_ */ --- a/kernel/module.c +++ b/kernel/module.c @@ -55,6 +55,7 @@ #include #include #include +#include #define CREATE_TRACE_POINTS #include @@ -3014,3 +3015,15 @@ int module_get_iter_tracepoints(struct t return found; } #endif + +#ifdef CONFIG_STACK2CORE +void +module_print_address_for_s2c (void) +{ + struct module *mod; + + list_for_each_entry(mod, &modules, list) + printk(S2CMARK"add-symbol-file %s.ko 0x%p\n", + mod->name, mod->module_core); +} +#endif /* CONFIG_STACK2CORE */ --- a/lib/Kconfig.debug +++ b/lib/Kconfig.debug @@ -322,6 +322,15 @@ config DEBUG_SLAB allocation as well as poisoning memory on free to catch use of freed memory. This can make kmalloc/kfree-intensive workloads much slower. +config STACK2CORE + bool "Output stack data when kernel die." + depends on DEBUG_KERNEL && (X86 || MIPS || ARM) + default y + help + If say Y here, kernel will output stack data when it die. This data + can be convert to core file through program stack2core. Then GDB can + do clear backtrace with this core file. + config DEBUG_SLAB_LEAK bool "Memory leak debugging" depends on DEBUG_SLAB --- /dev/null +++ b/tools/s2c/Makefile @@ -0,0 +1,15 @@ +TARGET = s2c +CC = gcc +CFLAGS = -g + + +all: $(TARGET) + +$(TARGET): $(TARGET).c + $(CC) $(CFLAGS) $(TARGET).c -o $(TARGET) + +clean: + rm -rf $(TARGET) + +install: $(TARGET) + cp $(TARGET) /bin/ --- /dev/null +++ b/tools/s2c/s2c.c @@ -0,0 +1,1009 @@ +/* + * Copyright (C) 2009, 2010, Hui Zhu + */ + +#include +#include +#include +#include +#include +#include +#include + +#define S2CMARK "S2C:" + +#define S2C_ELFCLASS32 1 +#define S2C_ELFCLASS64 2 + +#define S2C_ELFDATA2LSB 1 /* little endian */ +#define S2C_ELFDATA2MSB 2 /* big endian */ + +#define S2C_EM_386 3 +#define S2C_EM_X86_64 62 +#define S2C_EM_ARM 40 +#define S2C_EM_MIPS 8 + +#define NEEDSWAP ((BYTE_ORDER == LITTLE_ENDIAN \ + && elf_data == S2C_ELFDATA2MSB) \ + || (BYTE_ORDER == BIG_ENDIAN \ + && elf_data == S2C_ELFDATA2LSB)) +#define SWAP16(a) (NEEDSWAP ? bswap_16 (a) : a) +#define SWAP32(a) (NEEDSWAP ? bswap_32 (a) : a) +#define SWAP64(a) (NEEDSWAP ? bswap_64 (a) : a) + +#define GETU32(ul, str) \ + if (strncmp (line, str, strlen (str)) == 0) { \ + ul = strtoul (line + strlen (str), NULL, 0); \ + return 0; \ + } + +#define GETU64(ul, str) \ + if (strncmp (line, str, strlen (str)) == 0) { \ + ul = strtoull (line + strlen (str), NULL, 0); \ + return 0; \ + } + +/* Parse and save the input. */ + +uint8_t elf_class = 0; +uint8_t elf_data = 0; +uint8_t elf_arch = 0; +uint8_t elf_osabi = 0; + +#define S2C_ELF_PRARGSZ (80) +uint8_t commandline[S2C_ELF_PRARGSZ]; + +#define S2C_THREAD_SIZE 8192 +uint8_t stack[S2C_THREAD_SIZE]; +int stack_len = 0; + +uint32_t sp_32 = 0; +uint64_t sp_64 = 0; + +/* I386 */ + +uint32_t i386_bx = 0; +uint32_t i386_cx = 0; +uint32_t i386_dx = 0; +uint32_t i386_si = 0; +uint32_t i386_di = 0; +uint32_t i386_bp = 0; +uint32_t i386_ax = 0; +uint32_t i386_ds = 0; +uint32_t i386_es = 0; +uint32_t i386_fs = 0; +uint32_t i386_gs = 0; +uint32_t i386_orig_ax = 0; +uint32_t i386_ip = 0; +uint32_t i386_cs = 0; +uint32_t i386_flags = 0; +uint32_t i386_sp = 0; +uint32_t i386_ss = 0; + +int +parse_line_i386 (char *line) +{ + GETU32 (i386_bx, "bx="); + GETU32 (i386_cx, "cx="); + GETU32 (i386_dx, "dx="); + GETU32 (i386_si, "si="); + GETU32 (i386_di, "di="); + GETU32 (i386_bp, "bp="); + GETU32 (i386_ax, "ax="); + GETU32 (i386_ds, "ds="); + GETU32 (i386_es, "es="); + GETU32 (i386_fs, "fs="); + GETU32 (i386_gs, "gs="); + GETU32 (i386_orig_ax, "orig_ax="); + GETU32 (i386_ip, "ip="); + GETU32 (i386_cs, "cs="); + GETU32 (i386_flags, "flags="); + GETU32 (i386_sp, "sp="); + GETU32 (i386_ss, "ss="); + + return 0; +} + +/* x86_64 */ + +uint64_t x86_64_r15 = 0; +uint64_t x86_64_r14 = 0; +uint64_t x86_64_r13 = 0; +uint64_t x86_64_r12 = 0; +uint64_t x86_64_bp = 0; +uint64_t x86_64_bx = 0; +uint64_t x86_64_r11 = 0; +uint64_t x86_64_r10 = 0; +uint64_t x86_64_r9 = 0; +uint64_t x86_64_r8 = 0; +uint64_t x86_64_ax = 0; +uint64_t x86_64_cx = 0; +uint64_t x86_64_dx = 0; +uint64_t x86_64_si = 0; +uint64_t x86_64_di = 0; +uint64_t x86_64_orig_ax = 0; +uint64_t x86_64_ip = 0; +uint64_t x86_64_cs = 0; +uint64_t x86_64_flags = 0; +uint64_t x86_64_sp = 0; +uint64_t x86_64_ss = 0; + +int +parse_line_x86_64 (char *line) +{ + GETU64 (x86_64_r15, "r15="); + GETU64 (x86_64_r14, "r14="); + GETU64 (x86_64_r13, "r13="); + GETU64 (x86_64_r12, "r12="); + GETU64 (x86_64_bp, "bp="); + GETU64 (x86_64_bx, "bx="); + GETU64 (x86_64_r11, "r11="); + GETU64 (x86_64_r10, "r10="); + GETU64 (x86_64_r9, "r9="); + GETU64 (x86_64_r8, "r8="); + GETU64 (x86_64_ax, "ax="); + GETU64 (x86_64_cx, "cx="); + GETU64 (x86_64_dx, "dx="); + GETU64 (x86_64_si, "si="); + GETU64 (x86_64_di, "di="); + GETU64 (x86_64_orig_ax, "orig_ax="); + GETU64 (x86_64_ip, "ip="); + GETU64 (x86_64_cs, "cs="); + GETU64 (x86_64_flags, "flags="); + GETU64 (x86_64_sp, "sp="); + GETU64 (x86_64_ss, "ss="); + + return 0; +} + +/* arm */ + +uint32_t arm_r0 = 0; +uint32_t arm_r1 = 0; +uint32_t arm_r2 = 0; +uint32_t arm_r3 = 0; +uint32_t arm_r4 = 0; +uint32_t arm_r5 = 0; +uint32_t arm_r6 = 0; +uint32_t arm_r7 = 0; +uint32_t arm_r8 = 0; +uint32_t arm_r9 = 0; +uint32_t arm_r10 = 0; +uint32_t arm_fp = 0; +uint32_t arm_ip = 0; +uint32_t arm_sp = 0; +uint32_t arm_lr = 0; +uint32_t arm_pc = 0; +uint32_t arm_cpsr = 0; +uint32_t arm_ORIG_r0 = 0; + +int +parse_line_arm (char *line) +{ + GETU32 (arm_r0, "r0="); + GETU32 (arm_r1, "r1="); + GETU32 (arm_r2, "r2="); + GETU32 (arm_r3, "r3="); + GETU32 (arm_r4, "r4="); + GETU32 (arm_r5, "r5="); + GETU32 (arm_r6, "r6="); + GETU32 (arm_r7, "r7="); + GETU32 (arm_r8, "r8="); + GETU32 (arm_r9, "r9="); + GETU32 (arm_r10, "r10="); + GETU32 (arm_fp, "fp="); + GETU32 (arm_ip, "ip="); + GETU32 (arm_sp, "sp="); + GETU32 (arm_lr, "lr="); + GETU32 (arm_pc, "pc="); + GETU32 (arm_cpsr, "cpsr="); + GETU32 (arm_ORIG_r0, "ORIG_r0="); + + return 0; +} + +/* mips */ + +uint32_t mips32_r[32] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0}; +uint32_t mips32_hi = 0; +uint32_t mips32_lo = 0; +uint32_t mips32_cp0_epc = 0; +uint32_t mips32_cp0_badvaddr = 0; +uint32_t mips32_cp0_status = 0; +uint32_t mips32_cp0_cause = 0; + + +uint64_t mips64_r[32] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0}; +uint64_t mips64_hi = 0; +uint64_t mips64_lo = 0; +uint64_t mips64_cp0_epc = 0; +uint64_t mips64_cp0_badvaddr = 0; +uint64_t mips64_cp0_status = 0; +uint64_t mips64_cp0_cause = 0; + +int +parse_line_mips (char *line) +{ + int i; + char str[10]; + + if (elf_class == S2C_ELFCLASS32) { + for (i = 0; i < 32; i++) { + snprintf (str, 10, "r%d=", i); + GETU32 (mips32_r[i], str); + } + GETU32 (mips32_cp0_status, "cp0_status="); + GETU32 (mips32_hi, "hi="); + GETU32 (mips32_lo, "lo="); + GETU32 (mips32_cp0_badvaddr, "cp0_badvaddr="); + GETU32 (mips32_cp0_cause, "cp0_cause="); + GETU32 (mips32_cp0_epc, "cp0_epc="); + } + else { + for (i = 0; i < 32; i++) { + snprintf (str, 10, "r%d=", i); + GETU64 (mips64_r[i], str); + } + GETU64 (mips64_cp0_status, "cp0_status="); + GETU64 (mips64_hi, "hi="); + GETU64 (mips64_lo, "lo="); + GETU64 (mips64_cp0_badvaddr, "cp0_badvaddr="); + GETU64 (mips64_cp0_cause, "cp0_cause="); + GETU64 (mips64_cp0_epc, "cp0_epc="); + } + + return 0; +} + +int +parse_line (char *line) +{ + GETU32 (elf_class, "elf_class="); + GETU32 (elf_data, "elf_data="); + GETU32 (elf_arch, "elf_arch="); + GETU32 (elf_osabi, "elf_osabi="); + + if (strncmp (line, "stack=", sizeof ("stack=") - 1) == 0) { + line += sizeof ("stack=") - 1; + + while (stack_len < S2C_THREAD_SIZE && line[0]) { + if (isdigit (line[0])) + stack[stack_len++] = strtoul (line, &line, 0); + else + line++; + } + return 0; + } + + if (strncmp (line, "commandline=", sizeof ("commandline=") - 1) == 0) { + snprintf ((char *)commandline, S2C_ELF_PRARGSZ, "%s", + line + sizeof ("commandline=") - 1); + return 0; + } + + switch (elf_arch) { + case S2C_EM_386: + return parse_line_i386 (line); + break; + case S2C_EM_X86_64: + return parse_line_x86_64 (line); + break; + case S2C_EM_ARM: + return parse_line_arm (line); + break; + case S2C_EM_MIPS: + return parse_line_mips (line); + break; + } + + return 0; +} + +void +iterate_over_lines (FILE *fp) +{ + char line[256], *linep; + + if (!fp) { + fprintf(stderr, "Parse input error.\n"); + exit (-1); + } + + while(fgets(line, 256, fp) != NULL) { + linep = line; + linep = strstr (linep, S2CMARK); + if (linep) { + linep += sizeof (S2CMARK) - 1; + if (parse_line (linep)) { + fprintf(stderr, "Failied with parse line %s\n", line); + exit (-1); + } + } + } + if (ferror (fp)) { + fprintf(stderr, "Parse input error.\n"); + exit (-1); + } +} + +/* Convert and save to core_buf. */ + +uint8_t core_buf[81920]; +int core_buf_size = 0; + +#define S2C_EI_NIDENT 16 + +typedef struct s2c_elf32_hdr_s { + uint8_t e_ident[S2C_EI_NIDENT]; + uint16_t e_type; + uint16_t e_machine; + uint32_t e_version; + uint32_t e_entry; + uint32_t e_phoff; + uint32_t e_shoff; + uint32_t e_flags; + uint16_t e_ehsize; + uint16_t e_phentsize; + uint16_t e_phnum; + uint16_t e_shentsize; + uint16_t e_shnum; + uint16_t e_shstrndx; +} s2c_elf32_hdr_t; + +typedef struct s2c_elf64_hdr_s { + uint8_t e_ident[S2C_EI_NIDENT]; + uint16_t e_type; + uint16_t e_machine; + uint32_t e_version; + uint64_t e_entry; + uint64_t e_phoff; + uint64_t e_shoff; + uint32_t e_flags; + uint16_t e_ehsize; + uint16_t e_phentsize; + uint16_t e_phnum; + uint16_t e_shentsize; + uint16_t e_shnum; + uint16_t e_shstrndx; +} s2c_elf64_hdr_t; + +#define S2C_ELFMAG "\177ELF" +#define S2C_SELFMAG 4 +#define S2C_EI_CLASS 4 +#define S2C_EI_DATA 5 +#define S2C_EI_VERSION 6 +#define S2C_EV_CURRENT 1 +#define S2C_EI_OSABI 7 +#define S2C_ET_CORE 4 + +typedef struct s2c_elf32_phdr_s { + uint32_t p_type; + uint32_t p_offset; + uint32_t p_vaddr; + uint32_t p_paddr; + uint32_t p_filesz; + uint32_t p_memsz; + uint32_t p_flags; + uint32_t p_align; +} s2c_elf32_phdr_t; + +typedef struct s2c_elf64_phdr_s { + uint32_t p_type; + uint32_t p_flags; + uint64_t p_offset; + uint64_t p_vaddr; + uint64_t p_paddr; + uint64_t p_filesz; + uint64_t p_memsz; + uint64_t p_align; +} s2c_elf64_phdr_t; + +#define S2C_PT_NOTE 4 +#define S2C_PT_LOAD 1 +#define S2C_PF_R 0x4 + +uint8_t *nhdr; +uint8_t *phdr; + +void +elfhdr_32 (void) +{ + s2c_elf32_hdr_t *elf; + s2c_elf32_phdr_t *nhdrp; + s2c_elf32_phdr_t *phdrp; + + elf = (s2c_elf32_hdr_t *)(core_buf + core_buf_size); + core_buf_size += sizeof (s2c_elf32_hdr_t); + memset(elf, 0, sizeof(*elf)); + memcpy(elf->e_ident, S2C_ELFMAG, S2C_SELFMAG); + elf->e_ident[S2C_EI_CLASS] = elf_class; + elf->e_ident[S2C_EI_DATA] = elf_data; + elf->e_ident[S2C_EI_VERSION] = S2C_EV_CURRENT; + elf->e_ident[S2C_EI_OSABI] = elf_osabi; + elf->e_type = SWAP16 (S2C_ET_CORE); + elf->e_machine = SWAP16 (elf_arch); + elf->e_version = SWAP32 (S2C_EV_CURRENT); + elf->e_phoff = SWAP32 (sizeof (s2c_elf32_hdr_t)); + elf->e_flags = 0; + elf->e_ehsize = SWAP16 (sizeof (s2c_elf32_hdr_t)); + elf->e_phentsize = SWAP16 (sizeof (s2c_elf32_phdr_t)); + /* segs including notes section (vma + 1) */ + elf->e_phnum = SWAP16 (1 + 1); + + nhdr = core_buf + core_buf_size; + core_buf_size += sizeof (s2c_elf32_phdr_t); + nhdrp = (s2c_elf32_phdr_t *) nhdr; + nhdrp->p_type = SWAP32 (S2C_PT_NOTE); + nhdrp->p_offset = sizeof(s2c_elf32_hdr_t) + sizeof(s2c_elf32_phdr_t) * 2; + nhdrp->p_vaddr = 0; + nhdrp->p_paddr = 0; + nhdrp->p_filesz = 0; + nhdrp->p_memsz = 0; + nhdrp->p_flags = 0; + nhdrp->p_align = 0; + + phdr = core_buf + core_buf_size; + core_buf_size += sizeof (s2c_elf32_phdr_t); + phdrp = (s2c_elf32_phdr_t *) phdr; + phdrp->p_type = SWAP32 (S2C_PT_LOAD); + phdrp->p_flags = SWAP32 (S2C_PF_R); + phdrp->p_offset = nhdrp->p_offset; + phdrp->p_vaddr = sp_32 & ~63; + phdrp->p_paddr = 0; + phdrp->p_filesz = phdrp->p_memsz = stack_len + (sp_32 - phdrp->p_vaddr); + phdrp->p_align = SWAP32 (1); +} + +void +elfhdr_64 (void) +{ + s2c_elf64_hdr_t *elf; + s2c_elf64_phdr_t *nhdrp; + s2c_elf64_phdr_t *phdrp; + + elf = (s2c_elf64_hdr_t *)(core_buf + core_buf_size); + core_buf_size += sizeof (s2c_elf64_hdr_t); + memset(elf, 0, sizeof(*elf)); + memcpy(elf->e_ident, S2C_ELFMAG, S2C_SELFMAG); + elf->e_ident[S2C_EI_CLASS] = elf_class; + elf->e_ident[S2C_EI_DATA] = elf_data; + elf->e_ident[S2C_EI_VERSION] = S2C_EV_CURRENT; + elf->e_ident[S2C_EI_OSABI] = elf_osabi; + elf->e_type = SWAP16 (S2C_ET_CORE); + elf->e_machine = SWAP16 (elf_arch); + elf->e_version = SWAP32 (S2C_EV_CURRENT); + elf->e_phoff = SWAP64 (sizeof (s2c_elf64_hdr_t)); + elf->e_flags = 0; + elf->e_ehsize = SWAP16 (sizeof (s2c_elf64_hdr_t)); + elf->e_phentsize = SWAP16 (sizeof (s2c_elf64_phdr_t)); + /* segs including notes section (vma + 1) */ + elf->e_phnum = SWAP16 (1 + 1); + + nhdr = core_buf + core_buf_size; + core_buf_size += sizeof (s2c_elf64_phdr_t); + nhdrp = (s2c_elf64_phdr_t *) nhdr; + nhdrp->p_type = SWAP32 (S2C_PT_NOTE); + nhdrp->p_offset = sizeof(s2c_elf64_hdr_t) + sizeof(s2c_elf64_phdr_t) * 2; + nhdrp->p_vaddr = 0; + nhdrp->p_paddr = 0; + nhdrp->p_filesz = 0; + nhdrp->p_memsz = 0; + nhdrp->p_flags = 0; + nhdrp->p_align = 0; + + phdr = core_buf + core_buf_size; + core_buf_size += sizeof (s2c_elf64_phdr_t); + phdrp = (s2c_elf64_phdr_t *) phdr; + phdrp->p_type = SWAP32 (S2C_PT_LOAD); + phdrp->p_flags = SWAP32 (S2C_PF_R); + phdrp->p_offset = nhdrp->p_offset; + phdrp->p_vaddr = sp_64 & ~63; + phdrp->p_paddr = 0; + phdrp->p_filesz = phdrp->p_memsz = stack_len + (sp_64 - phdrp->p_vaddr); + phdrp->p_align = 1; +} + +typedef struct elf_note_s { + uint32_t n_namesz; + uint32_t n_descsz; + uint32_t n_type; +} elf_note_t; + +#define roundup(x, y) ((((x) + ((y) - 1)) / (y)) * (y)) + +int +fill_elf_note (uint8_t *p, const char *name, + int type, void **data, int data_len) +{ + int ret = 0; + elf_note_t *en = (elf_note_t *) p; + + p += sizeof(elf_note_t); + ret += sizeof(elf_note_t); + en->n_namesz = strlen(name) + 1; + en->n_type = SWAP32 (type); + en->n_descsz = SWAP32 (data_len); + + memcpy (p, name, en->n_namesz); + p += en->n_namesz; + p = (uint8_t *) roundup((unsigned long) p, 4); + ret += roundup((en->n_namesz), 4); + + *data = p; + p += data_len; + p = (uint8_t *) roundup((unsigned long) p, 4); + ret += roundup(data_len, 4); + + en->n_namesz = SWAP32 (en->n_namesz); + + return ret; +} + +#define S2C_NT_PRSTATUS 1 + +struct s2c_elf_siginfo +{ + uint32_t si_signo; + uint32_t si_code; + uint32_t si_errno; +}; + +struct s2c_timeval_32 { + uint32_t tv_sec; + uint32_t tv_usec; +}; + +struct s2c_timeval_64 { + uint64_t tv_sec; + uint64_t tv_usec; +}; + +/* i386 */ + +struct i386_elf_prstatus +{ + struct s2c_elf_siginfo pr_info; + uint16_t pr_cursig; + uint32_t pr_sigpend; + uint32_t pr_sighold; + uint32_t pr_pid; + uint32_t pr_ppid; + uint32_t pr_pgrp; + uint32_t pr_sid; + struct s2c_timeval_32 pr_utime; + struct s2c_timeval_32 pr_stime; + struct s2c_timeval_32 pr_cutime; + struct s2c_timeval_32 pr_cstime; + + uint32_t pr_reg[17]; + + uint32_t pr_fpvalid; +} __attribute__ ((aligned(4))); + +void +i386_elf_prstatus (void) +{ + int offset; + struct i386_elf_prstatus *pstat; + + offset = fill_elf_note (core_buf + core_buf_size, "CORE", + S2C_NT_PRSTATUS, + ((void **)&pstat), + sizeof(struct i386_elf_prstatus)); + core_buf_size += offset; + ((s2c_elf32_phdr_t *) nhdr)->p_filesz += offset; + memset (pstat, 0, sizeof(struct i386_elf_prstatus)); + pstat->pr_reg[0] = SWAP32 (i386_bx); + pstat->pr_reg[1] = SWAP32 (i386_cx); + pstat->pr_reg[2] = SWAP32 (i386_dx); + pstat->pr_reg[3] = SWAP32 (i386_si); + pstat->pr_reg[4] = SWAP32 (i386_di); + pstat->pr_reg[5] = SWAP32 (i386_bp); + pstat->pr_reg[6] = SWAP32 (i386_ax); + pstat->pr_reg[7] = SWAP32 (i386_ds); + pstat->pr_reg[8] = SWAP32 (i386_es); + pstat->pr_reg[9] = SWAP32 (i386_fs); + pstat->pr_reg[10] = SWAP32 (i386_gs); + pstat->pr_reg[11] = SWAP32 (i386_orig_ax); + pstat->pr_reg[12] = SWAP32 (i386_ip); + pstat->pr_reg[13] = SWAP32 (i386_cs); + pstat->pr_reg[14] = SWAP32 (i386_flags); + pstat->pr_reg[15] = SWAP32 (i386_sp); + pstat->pr_reg[16] = SWAP32 (i386_ss); +} + +/* x86_64 */ + +struct x86_64_elf_prstatus +{ + struct s2c_elf_siginfo pr_info; + uint16_t pr_cursig; + uint64_t pr_sigpend; + uint64_t pr_sighold; + uint32_t pr_pid; + uint32_t pr_ppid; + uint32_t pr_pgrp; + uint32_t pr_sid; + struct s2c_timeval_64 pr_utime; + struct s2c_timeval_64 pr_stime; + struct s2c_timeval_64 pr_cutime; + struct s2c_timeval_64 pr_cstime; + + uint64_t pr_reg[27]; + + uint32_t pr_fpvalid; +} __attribute__ ((aligned(8))); + +void +x86_64_elf_prstatus (void) +{ + int offset; + struct x86_64_elf_prstatus *pstat; + + offset = fill_elf_note (core_buf + core_buf_size, "CORE", + S2C_NT_PRSTATUS, + ((void **)&pstat), + sizeof(struct x86_64_elf_prstatus)); + core_buf_size += offset; + ((s2c_elf64_phdr_t *) nhdr)->p_filesz += offset; + memset (pstat, 0, sizeof(struct x86_64_elf_prstatus)); + pstat->pr_reg[0] = SWAP64 (x86_64_r15); + pstat->pr_reg[1] = SWAP64 (x86_64_r14); + pstat->pr_reg[2] = SWAP64 (x86_64_r13); + pstat->pr_reg[3] = SWAP64 (x86_64_r12); + pstat->pr_reg[4] = SWAP64 (x86_64_bp); + pstat->pr_reg[5] = SWAP64 (x86_64_bx); + pstat->pr_reg[6] = SWAP64 (x86_64_r11); + pstat->pr_reg[7] = SWAP64 (x86_64_r10); + pstat->pr_reg[8] = SWAP64 (x86_64_r9); + pstat->pr_reg[9] = SWAP64 (x86_64_r8); + pstat->pr_reg[10] = SWAP64 (x86_64_ax); + pstat->pr_reg[11] = SWAP64 (x86_64_cx); + pstat->pr_reg[12] = SWAP64 (x86_64_dx); + pstat->pr_reg[13] = SWAP64 (x86_64_si); + pstat->pr_reg[14] = SWAP64 (x86_64_di); + pstat->pr_reg[15] = SWAP64 (x86_64_orig_ax); + pstat->pr_reg[16] = SWAP64 (x86_64_ip); + pstat->pr_reg[17] = SWAP64 (x86_64_cs); + pstat->pr_reg[18] = SWAP64 (x86_64_flags); + pstat->pr_reg[19] = SWAP64 (x86_64_sp); + pstat->pr_reg[20] = SWAP64 (x86_64_ss); +} + +/* arm */ + +struct arm_elf_prstatus +{ + struct s2c_elf_siginfo pr_info; + uint16_t pr_cursig; + uint32_t pr_sigpend; + uint32_t pr_sighold; + uint32_t pr_pid; + uint32_t pr_ppid; + uint32_t pr_pgrp; + uint32_t pr_sid; + struct s2c_timeval_32 pr_utime; + struct s2c_timeval_32 pr_stime; + struct s2c_timeval_32 pr_cutime; + struct s2c_timeval_32 pr_cstime; + + uint32_t pr_reg[18]; + + uint32_t pr_fpvalid; +} __attribute__ ((aligned(4))); + +void +arm_elf_prstatus (void) +{ + int offset; + struct arm_elf_prstatus *pstat; + + offset = fill_elf_note (core_buf + core_buf_size, "CORE", + S2C_NT_PRSTATUS, + ((void **)&pstat), + sizeof(struct arm_elf_prstatus)); + core_buf_size += offset; + ((s2c_elf32_phdr_t *) nhdr)->p_filesz += offset; + memset (pstat, 0, sizeof(struct arm_elf_prstatus)); + pstat->pr_reg[0] = SWAP32 (arm_r0); + pstat->pr_reg[1] = SWAP32 (arm_r1); + pstat->pr_reg[2] = SWAP32 (arm_r2); + pstat->pr_reg[3] = SWAP32 (arm_r3); + pstat->pr_reg[4] = SWAP32 (arm_r4); + pstat->pr_reg[5] = SWAP32 (arm_r5); + pstat->pr_reg[6] = SWAP32 (arm_r6); + pstat->pr_reg[7] = SWAP32 (arm_r7); + pstat->pr_reg[8] = SWAP32 (arm_r8); + pstat->pr_reg[9] = SWAP32 (arm_r9); + pstat->pr_reg[10] = SWAP32 (arm_r10); + pstat->pr_reg[11] = SWAP32 (arm_fp); + pstat->pr_reg[12] = SWAP32 (arm_ip); + pstat->pr_reg[13] = SWAP32 (arm_sp); + pstat->pr_reg[14] = SWAP32 (arm_lr); + pstat->pr_reg[15] = SWAP32 (arm_pc); + pstat->pr_reg[16] = SWAP32 (arm_cpsr); + pstat->pr_reg[17] = SWAP32 (arm_ORIG_r0); +} + +/* mips */ + +struct mips32_elf_prstatus +{ + struct s2c_elf_siginfo pr_info; + uint16_t pr_cursig; + uint32_t pr_sigpend; + uint32_t pr_sighold; + uint32_t pr_pid; + uint32_t pr_ppid; + uint32_t pr_pgrp; + uint32_t pr_sid; + struct s2c_timeval_32 pr_utime; + struct s2c_timeval_32 pr_stime; + struct s2c_timeval_32 pr_cutime; + struct s2c_timeval_32 pr_cstime; + + uint32_t pr_reg[45]; + + uint32_t pr_fpvalid; +} __attribute__ ((aligned(4))); + +struct mips64_elf_prstatus +{ + struct s2c_elf_siginfo pr_info; + uint16_t pr_cursig; + uint64_t pr_sigpend; + uint64_t pr_sighold; + uint32_t pr_pid; + uint32_t pr_ppid; + uint32_t pr_pgrp; + uint32_t pr_sid; + struct s2c_timeval_64 pr_utime; + struct s2c_timeval_64 pr_stime; + struct s2c_timeval_64 pr_cutime; + struct s2c_timeval_64 pr_cstime; + + uint64_t pr_reg[45]; + + uint32_t pr_fpvalid; +} __attribute__ ((aligned(8))); + +#define MIPS32_EF_R0 6 +#define MIPS32_EF_LO 38 +#define MIPS32_EF_HI 39 +#define MIPS32_EF_CP0_EPC 40 +#define MIPS32_EF_CP0_BADVADDR 41 +#define MIPS32_EF_CP0_STATUS 42 +#define MIPS32_EF_CP0_CAUSE 43 + +#define MIPS64_EF_R0 0 +#define MIPS64_EF_LO 32 +#define MIPS64_EF_HI 33 +#define MIPS64_EF_CP0_EPC 34 +#define MIPS64_EF_CP0_BADVADDR 35 +#define MIPS64_EF_CP0_STATUS 36 +#define MIPS64_EF_CP0_CAUSE 37 + +void +mips_elf_prstatus (void) +{ + int offset; + + if (elf_class == S2C_ELFCLASS32) { + struct mips32_elf_prstatus *pstat; + + offset = fill_elf_note (core_buf + core_buf_size, "CORE", + S2C_NT_PRSTATUS, + ((void **)&pstat), + sizeof(struct mips32_elf_prstatus)); + core_buf_size += offset; + ((s2c_elf32_phdr_t *) nhdr)->p_filesz += offset; + memset (pstat, 0, sizeof(struct mips32_elf_prstatus)); + + for (offset = 0; offset < 32; offset ++) + pstat->pr_reg[MIPS32_EF_R0 + offset] = SWAP32 (mips32_r[offset]); + pstat->pr_reg[MIPS32_EF_LO] = SWAP32 (mips32_lo); + pstat->pr_reg[MIPS32_EF_HI] = SWAP32 (mips32_hi); + pstat->pr_reg[MIPS32_EF_CP0_EPC] = SWAP32 (mips32_cp0_epc); + pstat->pr_reg[MIPS32_EF_CP0_BADVADDR] = SWAP32 (mips32_cp0_badvaddr); + pstat->pr_reg[MIPS32_EF_CP0_STATUS] = SWAP32 (mips32_cp0_status); + pstat->pr_reg[MIPS32_EF_CP0_CAUSE] = SWAP32 (mips32_cp0_cause); + + } + else { + struct mips64_elf_prstatus *pstat; + + offset = fill_elf_note (core_buf + core_buf_size, "CORE", + S2C_NT_PRSTATUS, + ((void **)&pstat), + sizeof(struct mips64_elf_prstatus)); + core_buf_size += offset; + ((s2c_elf64_phdr_t *) nhdr)->p_filesz += offset; + memset (pstat, 0, sizeof(struct mips64_elf_prstatus)); + + for (offset = 0; offset < 32; offset ++) + pstat->pr_reg[MIPS64_EF_R0 + offset] = SWAP64 (mips64_r[offset]); + pstat->pr_reg[MIPS64_EF_LO] = SWAP64 (mips64_lo); + pstat->pr_reg[MIPS64_EF_HI] = SWAP64 (mips64_hi); + pstat->pr_reg[MIPS64_EF_CP0_EPC] = SWAP64 (mips64_cp0_epc); + pstat->pr_reg[MIPS64_EF_CP0_BADVADDR] = SWAP64 (mips64_cp0_badvaddr); + pstat->pr_reg[MIPS64_EF_CP0_STATUS] = SWAP64 (mips64_cp0_status); + pstat->pr_reg[MIPS64_EF_CP0_CAUSE] = SWAP64 (mips64_cp0_cause); + } +} + +struct s2c_elf_prpsinfo_32 +{ + uint8_t pr_state; + uint8_t pr_sname; + uint8_t pr_zomb; + uint8_t pr_nice; + uint32_t pr_flag; + uint16_t pr_uid; + uint16_t pr_gid; + uint32_t pr_pid, pr_ppid, pr_pgrp, pr_sid; + uint8_t pr_fname[16]; + uint8_t pr_psargs[S2C_ELF_PRARGSZ]; +}; + +struct s2c_elf_prpsinfo_64 +{ + uint8_t pr_state; + uint8_t pr_sname; + uint8_t pr_zomb; + uint8_t pr_nice; + uint64_t pr_flag; + uint32_t pr_uid; + uint32_t pr_gid; + uint32_t pr_pid, pr_ppid, pr_pgrp, pr_sid; + uint8_t pr_fname[16]; + uint8_t pr_psargs[S2C_ELF_PRARGSZ]; +}; + +#define S2C_NT_PRPSINFO 3 + +void +save_pinfo_32 (void) +{ + int offset; + struct s2c_elf_prpsinfo_32 *pinfo; + + offset = fill_elf_note (core_buf + core_buf_size, "CORE", + S2C_NT_PRPSINFO, + ((void **)&pinfo), + sizeof(struct s2c_elf_prpsinfo_32)); + core_buf_size += offset; + memset (pinfo, 0, sizeof(struct s2c_elf_prpsinfo_32)); + pinfo->pr_state = 0; + pinfo->pr_sname = 'R'; + pinfo->pr_zomb = 0; + strcpy((char *)pinfo->pr_fname, "vmlinux"); + snprintf((char *)pinfo->pr_psargs, S2C_ELF_PRARGSZ, "%s", commandline); + ((s2c_elf32_phdr_t *) nhdr)->p_filesz += offset; +} + +void +save_pinfo_64 (void) +{ + int offset; + struct s2c_elf_prpsinfo_64 *pinfo; + + offset = fill_elf_note (core_buf + core_buf_size, "CORE", + S2C_NT_PRPSINFO, + ((void **)&pinfo), + sizeof(struct s2c_elf_prpsinfo_64)); + core_buf_size += offset; + memset (pinfo, 0, sizeof(struct s2c_elf_prpsinfo_64)); + pinfo->pr_state = 0; + pinfo->pr_sname = 'R'; + pinfo->pr_zomb = 0; + strcpy((char *)pinfo->pr_fname, "vmlinux"); + snprintf((char *)pinfo->pr_psargs, S2C_ELF_PRARGSZ, "%s", commandline); + ((s2c_elf64_phdr_t *) nhdr)->p_filesz += offset; +} + +void +stack_32 (void) +{ + ((s2c_elf32_phdr_t *) phdr)->p_offset += ((s2c_elf32_phdr_t *) nhdr)->p_filesz; + memset (core_buf + core_buf_size, 0, (sp_32 - ((s2c_elf32_phdr_t *) phdr)->p_vaddr)); + core_buf_size += sp_32 - ((s2c_elf32_phdr_t *) phdr)->p_vaddr; + memcpy (core_buf + core_buf_size, stack, stack_len); + core_buf_size += stack_len; + + if (NEEDSWAP) { + ((s2c_elf32_phdr_t *) nhdr)->p_offset = bswap_32(((s2c_elf32_phdr_t *) nhdr)->p_offset); + ((s2c_elf32_phdr_t *) nhdr)->p_filesz = bswap_32(((s2c_elf32_phdr_t *) nhdr)->p_filesz); + ((s2c_elf32_phdr_t *) phdr)->p_offset = bswap_32(((s2c_elf32_phdr_t *) phdr)->p_offset); + ((s2c_elf32_phdr_t *) phdr)->p_vaddr = bswap_32(((s2c_elf32_phdr_t *) phdr)->p_vaddr); + ((s2c_elf32_phdr_t *) phdr)->p_filesz = bswap_32(((s2c_elf32_phdr_t *) phdr)->p_filesz); + ((s2c_elf32_phdr_t *) phdr)->p_memsz = bswap_32(((s2c_elf32_phdr_t *) phdr)->p_memsz); + } +} + +void +stack_64 (void) +{ + ((s2c_elf64_phdr_t *) phdr)->p_offset += ((s2c_elf64_phdr_t *) nhdr)->p_filesz; + memset (core_buf + core_buf_size, 0, (sp_64 - ((s2c_elf64_phdr_t *) phdr)->p_vaddr)); + core_buf_size += sp_64 - ((s2c_elf64_phdr_t *) phdr)->p_vaddr; + memcpy (core_buf + core_buf_size, stack, stack_len); + core_buf_size += stack_len; + + if (NEEDSWAP) { + ((s2c_elf64_phdr_t *) nhdr)->p_offset = bswap_64(((s2c_elf64_phdr_t *) nhdr)->p_offset); + ((s2c_elf64_phdr_t *) nhdr)->p_filesz = bswap_64(((s2c_elf64_phdr_t *) nhdr)->p_filesz); + ((s2c_elf64_phdr_t *) phdr)->p_offset = bswap_64(((s2c_elf64_phdr_t *) phdr)->p_offset); + ((s2c_elf64_phdr_t *) phdr)->p_vaddr = bswap_64(((s2c_elf64_phdr_t *) phdr)->p_vaddr); + ((s2c_elf64_phdr_t *) phdr)->p_filesz = bswap_64(((s2c_elf64_phdr_t *) phdr)->p_filesz); + ((s2c_elf64_phdr_t *) phdr)->p_memsz = bswap_64(((s2c_elf64_phdr_t *) phdr)->p_memsz); + } +} + +int +main(int argc,char *argv[],char *envp[]) +{ + /* Parse and save the input. */ + iterate_over_lines (stdin); + /* Set sp. */ + switch (elf_arch) { + case S2C_EM_386: + sp_32 = i386_sp; + break; + case S2C_EM_X86_64: + sp_64 = x86_64_sp; + break; + case S2C_EM_ARM: + sp_32 = arm_sp; + break; + case S2C_EM_MIPS: + if (elf_class == S2C_ELFCLASS32) + sp_32 = mips32_r[29]; + else + sp_64 = mips64_r[29]; + break; + } + + /* Convert and save to core_buf. */ + /* Elf header */ + if (elf_class == S2C_ELFCLASS32) + elfhdr_32 (); + else + elfhdr_64 (); + /* note0 pstat */ + switch (elf_arch) { + case S2C_EM_386: + i386_elf_prstatus (); + break; + case S2C_EM_X86_64: + x86_64_elf_prstatus (); + break; + case S2C_EM_ARM: + arm_elf_prstatus (); + break; + case S2C_EM_MIPS: + mips_elf_prstatus (); + break; + } + /* note1 pinfo */ + if (elf_class == S2C_ELFCLASS32) + save_pinfo_32 (); + else + save_pinfo_64 (); + + /* stack */ + if (elf_class == S2C_ELFCLASS32) + stack_32 (); + else + stack_64 (); + + if (write (STDOUT_FILENO, core_buf, core_buf_size) != core_buf_size) { + fprintf(stderr, "Output core error.\n"); + exit (-1); + } + + return 0; +} From linux@arm.linux.org.uk Sun Jan 3 17:07:58 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 17:08:12 +0100 (CET) Received: from caramon.arm.linux.org.uk ([78.32.30.218]:42262 "EHLO caramon.arm.linux.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492693Ab0ACQH6 (ORCPT ); Sun, 3 Jan 2010 17:07:58 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arm.linux.org.uk; s=caramon; h=Date:From:To:Cc:Subject: Message-ID:References:MIME-Version:Content-Type:In-Reply-To: Sender; bh=f8nrrzKorxz2r+0EpnkC6arihC5aecjryFZIJ0m8nto=; b=pHcZJ 9arLXQ6aN3E+LS/auBWmeBHwSbmteQduTzZO0DnVbP406e4+pIniR0oPERMaVTYi kDDU/lh8EbWvHEgMQoFx5PDJ68siX9fiifZgY/HMzZoKqvgOrpg3Cy7r/1m3oQ5h 9xKDnj9AyCKSy47350lkNhvqTKhauvCWTCodXY= Received: from n2100.arm.linux.org.uk ([2002:4e20:1eda:1:214:fdff:fe10:4f86]) by caramon.arm.linux.org.uk with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.69) (envelope-from ) id 1NRSvE-0006vJ-Cu; Sun, 03 Jan 2010 16:03:16 +0000 Received: from linux by n2100.arm.linux.org.uk with local (Exim 4.69) (envelope-from ) id 1NRSvC-0005XC-4t; Sun, 03 Jan 2010 16:03:14 +0000 Date: Sun, 3 Jan 2010 16:03:13 +0000 From: Russell King - ARM Linux To: Hui Zhu Cc: saeed bishara , Catalin Marinas , Nicolas Pitre , Ralf Baechle , David Daney , Tomaso Paoletti , Chris Dearman , Paul Gortmaker , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Frederic Weisbecker , Alexey Dobriyan , Brian Gerst , Tejun Heo , Rusty Russell , Andrew Morton , Steven Rostedt , Greg Kroah-Hartman , "Paul E. McKenney" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Coly Li Subject: Re: [PATCH] stack2core: show stack message and convert it to core file when kernel die Message-ID: <20100103160313.GA21156@n2100.arm.linux.org.uk> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.18 (2008-05-17) X-archive-position: 25475 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: linux@arm.linux.org.uk Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1924 Content-Length: 1927 Lines: 54 On Sun, Jan 03, 2010 at 11:05:05PM +0800, Hui Zhu wrote: > Hello, > > For, when the kernel die, the user will get some message like: > PC is at kernel_init+0xd4/0x104 > LR is at _atomic_dec_and_lock+0x48/0x6c > pc : [] lr : [] psr: 60000013 > sp : c7823fd8 ip : c7823f48 fp : c7823ff4 > Stack: (0xc7823fd8 to 0xc7824000) > 3fc0: 00000000 00000001 > Backtrace: > [] (kernel_init+0x0/0x104) from [] (do_exit+0x0/0x880) > This backtrace have some wrong message sometime and cannot get any > val. Of course, kdump can get more message. But it need do some a lot > of other config. If you have frame pointers enabled, the backtrace is _never_ wrong. It only goes wrong if you disable frame pointers, at which point the unwind tables have to be used. > When kernel die, show some message: > S2C:elf_class=1 > S2C:elf_data=1 > S2C:elf_arch=40 > S2C:elf_osabi=0 > S2C:r0=0x00000000; > S2C:r1=0xc7822000; > S2C:r2=0xc7823f48; > S2C:r3=0x00000003; > S2C:r4=0x00000000; > S2C:r5=0x00000000; > S2C:r6=0x00000000; > S2C:r7=0x00000000; > S2C:r8=0x00000000; > S2C:r9=0x00000000; > S2C:r10=0x00000000; > S2C:fp=0xc7823ff4; > S2C:ip=0xc7823f48; > S2C:sp=0xc7823fd8; > S2C:lr=0xc01911f8; > S2C:pc=0xc0008470; > S2C:cpsr=0x60000013; > S2C:ORIG_r0=0xffffffff; > > S2C:stack=0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, > S2C:stack=0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > S2C:stack=0x00, 0x00, 0x00, 0x00, 0xf8, 0x3f, 0x82, 0xc7, > S2C:stack=0x60, 0x26, 0x04, 0xc0, 0xa8, 0x83, 0x00, 0xc0, > S2C:stack=0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, Please don't invent yet another way of dumping stuff out of the kernel. What we already have is sufficient for your needs - there's no reason what so ever to change it to achieve your goals. We already dump the registers and the stack, which seems to be all that you require. From teawater@gmail.com Sun Jan 3 17:30:48 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 17:31:02 +0100 (CET) Received: from mail-pw0-f45.google.com ([209.85.160.45]:57217 "EHLO mail-pw0-f45.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493092Ab0ACQas convert rfc822-to-8bit (ORCPT ); Sun, 3 Jan 2010 17:30:48 +0100 Received: by pwj1 with SMTP id 1so9091051pwj.24 for ; Sun, 03 Jan 2010 08:30:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:in-reply-to:references :from:date:message-id:subject:to:cc:content-type :content-transfer-encoding; bh=nsZJH84oAr7EAExqqhiYT2Ui74x3lrLBqTDtBOwhTg4=; b=LDVOcH9EOFI+W5pqMzyVCaXTTchYFnJL0a3KLdw0f0lhkyrbdt6JgSL9z1+VC4gjuF LGNorcEGtkRzJbv7wjnByhQwSpV4Jl/Hx7HGGXjji1cgaiGKFJ8dHReQO9Z8QkCTmQu5 /m9ldzySN/bnv4tdG/ufZTlTU3XoPESspjRIk= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-type:content-transfer-encoding; b=fRoWasEwl+1+vy0LFGbRyCKX4QTmOW2eThbK1eJJOMmd/Oo/ho2djNoK6z0nTCIzJA +nPgiBeFOBkTPHVS9eykFjw2L+CeaLyVaaxYg5prRw7B912UZq2w3wOwIHfXlOTaVWNE 5D6ooDb5+jn7C2vVf7SofVXSqWRW96hAD4ZHM= MIME-Version: 1.0 Received: by 10.142.60.3 with SMTP id i3mr14692521wfa.147.1262536240101; Sun, 03 Jan 2010 08:30:40 -0800 (PST) In-Reply-To: <20100103160313.GA21156@n2100.arm.linux.org.uk> References: <20100103160313.GA21156@n2100.arm.linux.org.uk> From: Hui Zhu Date: Mon, 4 Jan 2010 00:30:20 +0800 Message-ID: Subject: Re: [PATCH] stack2core: show stack message and convert it to core file when kernel die To: Russell King - ARM Linux Cc: saeed bishara , Catalin Marinas , Nicolas Pitre , Ralf Baechle , David Daney , Tomaso Paoletti , Chris Dearman , Paul Gortmaker , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Frederic Weisbecker , Alexey Dobriyan , Brian Gerst , Tejun Heo , Rusty Russell , Andrew Morton , Steven Rostedt , Greg Kroah-Hartman , "Paul E. McKenney" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Coly Li Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT X-archive-position: 25476 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: teawater@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1931 Content-Length: 3213 Lines: 91 Thanks Russell, This S2C: message just for program s2c. s2c can convert it to a core file. Then gdb can do a clear analyse with this file. Then you can get more message than current we can get. For example: (gdb) bt #0 0xc0008470 in kernel_init (unused=) at /home/teawater/kernel/arm_versatile_926ejs.glibc_std.standard/build/linux/init/main.c:916 #1 0xc0042660 in sys_waitid (which=, upid=, infop=0x0, options=0, ru=0x14) at /home/teawater/kernel/arm_versatile_926ejs.glibc_std.standard/build/linux/kernel/exit.c:1798 Backtrace stopped: previous frame inner to this frame (corrupt stack?) a more clear backtrace. (gdb) frame 1 #1 0xc0042660 in sys_waitid (which=, upid=, infop=0x0, options=0, ru=0x14) at /home/teawater/kernel/arm_versatile_926ejs.glibc_std.standard/build/linux/kernel/exit.c:1798 1798 pid = find_get_pid(upid); (gdb) p pid $1 = (struct pid *) 0x0 A value of a val in stack in the frame. I think it will more helpful for user to deal with the kernel die. Best regards, Hui On Mon, Jan 4, 2010 at 00:03, Russell King - ARM Linux wrote: > On Sun, Jan 03, 2010 at 11:05:05PM +0800, Hui Zhu wrote: >> Hello, >> >> For, when the kernel die, the user will get some message like: >> PC is at kernel_init+0xd4/0x104 >> LR is at _atomic_dec_and_lock+0x48/0x6c >> pc : []    lr : []    psr: 60000013 >> sp : c7823fd8  ip : c7823f48  fp : c7823ff4 >> Stack: (0xc7823fd8 to 0xc7824000) >> 3fc0:                                                       00000000 00000001 >> Backtrace: >> [] (kernel_init+0x0/0x104) from [] (do_exit+0x0/0x880) >> This backtrace have some wrong message sometime and cannot get any >> val. Of course, kdump can get more message.  But it need do some a lot >> of other config. > > If you have frame pointers enabled, the backtrace is _never_ wrong. > It only goes wrong if you disable frame pointers, at which point the > unwind tables have to be used. > >> When kernel die, show some message: >> S2C:elf_class=1 >> S2C:elf_data=1 >> S2C:elf_arch=40 >> S2C:elf_osabi=0 >> S2C:r0=0x00000000; >> S2C:r1=0xc7822000; >> S2C:r2=0xc7823f48; >> S2C:r3=0x00000003; >> S2C:r4=0x00000000; >> S2C:r5=0x00000000; >> S2C:r6=0x00000000; >> S2C:r7=0x00000000; >> S2C:r8=0x00000000; >> S2C:r9=0x00000000; >> S2C:r10=0x00000000; >> S2C:fp=0xc7823ff4; >> S2C:ip=0xc7823f48; >> S2C:sp=0xc7823fd8; >> S2C:lr=0xc01911f8; >> S2C:pc=0xc0008470; >> S2C:cpsr=0x60000013; >> S2C:ORIG_r0=0xffffffff; >> >> S2C:stack=0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, >> S2C:stack=0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, >> S2C:stack=0x00, 0x00, 0x00, 0x00, 0xf8, 0x3f, 0x82, 0xc7, >> S2C:stack=0x60, 0x26, 0x04, 0xc0, 0xa8, 0x83, 0x00, 0xc0, >> S2C:stack=0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > > Please don't invent yet another way of dumping stuff out of the kernel. > What we already have is sufficient for your needs - there's no reason > what so ever to change it to achieve your goals.  We already dump the > registers and the stack, which seems to be all that you require. > From linux@arm.linux.org.uk Sun Jan 3 17:48:31 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 17:48:48 +0100 (CET) Received: from caramon.arm.linux.org.uk ([78.32.30.218]:54619 "EHLO caramon.arm.linux.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492718Ab0ACQsb (ORCPT ); Sun, 3 Jan 2010 17:48:31 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arm.linux.org.uk; s=caramon; h=Date:From:To:Cc:Subject: Message-ID:References:MIME-Version:Content-Type:In-Reply-To: Sender; bh=r+L+J69+MwErNcnBsD2EYJT9LGoy+x7NFeIRWyK7KOI=; b=kIFmC YlRVcgEDvmc+X9e2xQyWmGi7Ai4eO9RODIAsYvAUMvrzzmVAkUhrasW8KVAFBpvh HpyIE32BIekrzWcDgB+rJjvTH+uiVD4PDBAj1Lrs6ojvv9/L7jKTmfedUCvQ9hrW +Oe+Wa5hXZFQJWTqBtJ9gRIW68X/ljAmI2uMkY= Received: from n2100.arm.linux.org.uk ([2002:4e20:1eda:1:214:fdff:fe10:4f86]) by caramon.arm.linux.org.uk with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.69) (envelope-from ) id 1NRTYv-0006xW-56; Sun, 03 Jan 2010 16:44:17 +0000 Received: from linux by n2100.arm.linux.org.uk with local (Exim 4.69) (envelope-from ) id 1NRTYs-0005jl-Ph; Sun, 03 Jan 2010 16:44:14 +0000 Date: Sun, 3 Jan 2010 16:44:14 +0000 From: Russell King - ARM Linux To: Hui Zhu Cc: saeed bishara , Catalin Marinas , Nicolas Pitre , Ralf Baechle , David Daney , Tomaso Paoletti , Chris Dearman , Paul Gortmaker , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Frederic Weisbecker , Alexey Dobriyan , Brian Gerst , Tejun Heo , Rusty Russell , Andrew Morton , Steven Rostedt , Greg Kroah-Hartman , "Paul E. McKenney" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Coly Li Subject: Re: [PATCH] stack2core: show stack message and convert it to core file when kernel die Message-ID: <20100103164414.GB21156@n2100.arm.linux.org.uk> References: <20100103160313.GA21156@n2100.arm.linux.org.uk> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.18 (2008-05-17) X-archive-position: 25477 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: linux@arm.linux.org.uk Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1937 Content-Length: 1390 Lines: 28 On Mon, Jan 04, 2010 at 12:30:20AM +0800, Hui Zhu wrote: > This S2C: message just for program s2c. > s2c can convert it to a core file. Then gdb can do a clear analyse > with this file. > Then you can get more message than current we can get. I understand that. What I'm saying is that all the additional noise you're causing the kernel to create is just a pure duplication of what we already dump. Oops dumps are already noisy enough - especially if they cause a panic at the end (where you end up with two backtraces.) We do not need even more noise caused by needless duplication. You can get everything you need already from the kernel. On ARM, we already dump out all the registers and the _full_ stack. There is no need for you to implement your own register dumping code and full stack dump on top of that again. So, I'm not going to accept your patch for the ARM kernel. Please use what's already provided - it's more than adequate. By doing so, you don't penalise those of us who want to read the raw oopses. Talking about noisy oopses, I'm getting one with 2.6.33-rc2 on 'poweroff' shutdown. No idea what it is because most of it's scrolled off the top of the screen and I can't scroll back. Not bothered about it at the moment. What it does illustrate though is why making things too noisy when problems occur makes it _more_ difficult to find out what went wrong. From teawater@gmail.com Sun Jan 3 18:02:37 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 18:02:44 +0100 (CET) Received: from mail-pz0-f197.google.com ([209.85.222.197]:51355 "EHLO mail-pz0-f197.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493094Ab0ACRCh convert rfc822-to-8bit (ORCPT ); Sun, 3 Jan 2010 18:02:37 +0100 Received: by pzk35 with SMTP id 35so2467078pzk.22 for ; Sun, 03 Jan 2010 09:02:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:in-reply-to:references :from:date:message-id:subject:to:cc:content-type :content-transfer-encoding; bh=7g9idHECJs7p5wdWlxhy6TGC8FiWIB+d+Lg9yGbSW2E=; b=lc7oLOOjms3QZigndwJG1vr54vIpnxUCthJojjBfs+tAfDJ3J2awCedzz4j4oXd38E N/EI6trvbmKi2yZqTxb1LMLiFpuIEKED86ejpIo+OPu+fD2qMAIrMOcnWGMcAzZGk6dM CjxyCEME/XDlMZnmE/Xj5OXL/l4q+T1PsC7Dk= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-type:content-transfer-encoding; b=FGbIcsm5SNJg7QCD5uMt9mI22gWxdrgvX1jH34RlT54AQwEDEMl6dEegA9QMq4sVB1 mnY4ZQEoPPen1p3eqian+YcozkFSrvHGZ1jhDV9E2PA0FZ/LmLhSyAC1WgyvqzvSfvys hqSg557dlMDXiUAbfzNbAXoCEmTQzafbDinFs= MIME-Version: 1.0 Received: by 10.142.75.10 with SMTP id x10mr14815981wfa.288.1262537724086; Sun, 03 Jan 2010 08:55:24 -0800 (PST) In-Reply-To: <20100103164414.GB21156@n2100.arm.linux.org.uk> References: <20100103160313.GA21156@n2100.arm.linux.org.uk> <20100103164414.GB21156@n2100.arm.linux.org.uk> From: Hui Zhu Date: Mon, 4 Jan 2010 00:55:04 +0800 Message-ID: Subject: Re: [PATCH] stack2core: show stack message and convert it to core file when kernel die To: Russell King - ARM Linux Cc: saeed bishara , Catalin Marinas , Nicolas Pitre , Ralf Baechle , David Daney , Tomaso Paoletti , Chris Dearman , Paul Gortmaker , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Frederic Weisbecker , Alexey Dobriyan , Brian Gerst , Tejun Heo , Rusty Russell , Andrew Morton , Steven Rostedt , Greg Kroah-Hartman , "Paul E. McKenney" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Coly Li Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT X-archive-position: 25478 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: teawater@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1947 Content-Length: 2135 Lines: 50 I didn't give the user raw oopses. I give him core file. When the kernel die, do we can get a core file now? (gdb) bt #0 0xc0008470 in kernel_init (unused=) at /home/teawater/kernel/arm_versatile_926ejs.glibc_std.standard/build/linux/init/main.c:916 #1 0xc0042660 in sys_waitid (which=, upid=, infop=0x0, options=0, ru=0x14) at /home/teawater/kernel/arm_versatile_926ejs.glibc_std.standard/build/linux/kernel/exit.c:1798 Backtrace stopped: previous frame inner to this frame (corrupt stack?) It show which line make kernel die. Hui On Mon, Jan 4, 2010 at 00:44, Russell King - ARM Linux wrote: > On Mon, Jan 04, 2010 at 12:30:20AM +0800, Hui Zhu wrote: >> This S2C: message just for program s2c. >> s2c can convert it to a core file.  Then gdb can do a clear analyse >> with this file. >> Then you can get more message than current we can get. > > I understand that.  What I'm saying is that all the additional noise > you're causing the kernel to create is just a pure duplication of > what we already dump. > > Oops dumps are already noisy enough - especially if they cause a panic > at the end (where you end up with two backtraces.)  We do not need even > more noise caused by needless duplication. > > You can get everything you need already from the kernel.  On ARM, we > already dump out all the registers and the _full_ stack.  There is no > need for you to implement your own register dumping code and full stack > dump on top of that again. > > So, I'm not going to accept your patch for the ARM kernel.  Please use > what's already provided - it's more than adequate.  By doing so, you > don't penalise those of us who want to read the raw oopses. > > Talking about noisy oopses, I'm getting one with 2.6.33-rc2 on 'poweroff' > shutdown.  No idea what it is because most of it's scrolled off the top of > the screen and I can't scroll back.  Not bothered about it at the moment. > What it does illustrate though is why making things too noisy when problems > occur makes it _more_ difficult to find out what went wrong. > From linux@arm.linux.org.uk Sun Jan 3 18:14:13 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 18:14:17 +0100 (CET) Received: from caramon.arm.linux.org.uk ([78.32.30.218]:37326 "EHLO caramon.arm.linux.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493095Ab0ACRON (ORCPT ); Sun, 3 Jan 2010 18:14:13 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arm.linux.org.uk; s=caramon; h=Date:From:To:Cc:Subject: Message-ID:References:MIME-Version:Content-Type:In-Reply-To: Sender; bh=b+KVeDGTRxna6nYooZMgog5WYVnkYOhgfICoDw9iu+A=; b=KkfNs dnGA6JhGjTAm0iWTAGwBaQPzK8gC4UmufAvwDVwZa2jRnJjAUVO6M2P5zsj+rm81 eImVOFYhyZZ2zGzXHqktveEFCmB4MK/zhD4WZ77iXmZdZIiRMO7kKcR5KZUvjxP+ ArIzkpUBB0ry1K2/bt8zViIG/Tim3O7UoBuHek= Received: from n2100.arm.linux.org.uk ([2002:4e20:1eda:1:214:fdff:fe10:4f86]) by caramon.arm.linux.org.uk with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.69) (envelope-from ) id 1NRTy4-00070N-Tp; Sun, 03 Jan 2010 17:10:17 +0000 Received: from linux by n2100.arm.linux.org.uk with local (Exim 4.69) (envelope-from ) id 1NRTy2-0005sb-Ch; Sun, 03 Jan 2010 17:10:14 +0000 Date: Sun, 3 Jan 2010 17:10:13 +0000 From: Russell King - ARM Linux To: Hui Zhu Cc: saeed bishara , Catalin Marinas , Nicolas Pitre , Ralf Baechle , David Daney , Tomaso Paoletti , Chris Dearman , Paul Gortmaker , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Frederic Weisbecker , Alexey Dobriyan , Brian Gerst , Tejun Heo , Rusty Russell , Andrew Morton , Steven Rostedt , Greg Kroah-Hartman , "Paul E. McKenney" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Coly Li Subject: Re: [PATCH] stack2core: show stack message and convert it to core file when kernel die Message-ID: <20100103171013.GC21156@n2100.arm.linux.org.uk> References: <20100103160313.GA21156@n2100.arm.linux.org.uk> <20100103164414.GB21156@n2100.arm.linux.org.uk> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.18 (2008-05-17) X-archive-position: 25479 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: linux@arm.linux.org.uk Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1952 Content-Length: 328 Lines: 8 On Mon, Jan 04, 2010 at 12:55:04AM +0800, Hui Zhu wrote: > I didn't give the user raw oopses. > I give him core file. When the kernel die, do we can get a core file now? I think there's a communication issue here... clearly you're not understanding what I've been trying to tell you. I don't think I can help you any further. From teawater@gmail.com Sun Jan 3 18:18:53 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 18:19:00 +0100 (CET) Received: from mail-pz0-f197.google.com ([209.85.222.197]:46156 "EHLO mail-pz0-f197.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493100Ab0ACRSx (ORCPT ); Sun, 3 Jan 2010 18:18:53 +0100 Received: by pzk35 with SMTP id 35so2471458pzk.22 for ; Sun, 03 Jan 2010 09:18:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:in-reply-to:references :from:date:message-id:subject:to:cc:content-type; bh=ADqWtOkmWNRAXak6e5D2rrQDNmCIruLo0UK4TmDi4qo=; b=UbT69qXw9uPti8my6Bose/KxDVfYtyK4KB+jA0df3tMhB39YuQ9CjwlTYHbhJvgUTX UchFWLZJr3qFJyU8SkxFAIoQ12o/JSTEdx/JZPcsa0j+sExbOZwxEgOWnC4csbaOACh1 sRzUYJbs33fd5o1apQK2pfsH+mFcH67k5/46c= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-type; b=GY12ynTmXlY2rZO+lUmsBUmE0pCMofK0IUZtLuIeSQQ7FWUzbXEmCHNdW4RWak+9C5 d8anxJsf1zhUo7wN0moQt+/xeUePCS318o2A6a/gkNLMXaihk7D1pCBpyEDT0bjuz31S umCN2fyKVswhmkitpc6TFi+I+y8Bz598IXRl8= MIME-Version: 1.0 Received: by 10.143.25.9 with SMTP id c9mr198023wfj.7.1262539125091; Sun, 03 Jan 2010 09:18:45 -0800 (PST) In-Reply-To: <20100103171013.GC21156@n2100.arm.linux.org.uk> References: <20100103160313.GA21156@n2100.arm.linux.org.uk> <20100103164414.GB21156@n2100.arm.linux.org.uk> <20100103171013.GC21156@n2100.arm.linux.org.uk> From: Hui Zhu Date: Mon, 4 Jan 2010 01:18:25 +0800 Message-ID: Subject: Re: [PATCH] stack2core: show stack message and convert it to core file when kernel die To: Russell King - ARM Linux Cc: saeed bishara , Catalin Marinas , Nicolas Pitre , Ralf Baechle , David Daney , Tomaso Paoletti , Chris Dearman , Paul Gortmaker , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Frederic Weisbecker , Alexey Dobriyan , Brian Gerst , Tejun Heo , Rusty Russell , Andrew Morton , Steven Rostedt , Greg Kroah-Hartman , "Paul E. McKenney" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Coly Li Content-Type: text/plain; charset=ISO-8859-1 X-archive-position: 25480 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: teawater@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1956 Content-Length: 682 Lines: 21 Sorry I make a mistake, I sent the mail before I complete it. Maybe some hotkey or something. The s2c can get the message from the current panic message is better. I am not get them for now, maybe it need open some options or something. Thanks, Hui On Mon, Jan 4, 2010 at 01:10, Russell King - ARM Linux wrote: > On Mon, Jan 04, 2010 at 12:55:04AM +0800, Hui Zhu wrote: >> I didn't give the user raw oopses. >> I give him core file. When the kernel die, do we can get a core file now? > > I think there's a communication issue here... clearly you're not > understanding what I've been trying to tell you. > > I don't think I can help you any further. > From arjan@infradead.org Sun Jan 3 18:24:20 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 18:24:24 +0100 (CET) Received: from casper.infradead.org ([85.118.1.10]:60437 "EHLO casper.infradead.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493101Ab0ACRYU (ORCPT ); Sun, 3 Jan 2010 18:24:20 +0100 Received: from c-24-20-218-92.hsd1.or.comcast.net ([24.20.218.92] helo=localhost.localdomain) by casper.infradead.org with esmtpsa (Exim 4.69 #1 (Red Hat Linux)) id 1NRUB1-0001p0-Os; Sun, 03 Jan 2010 17:23:40 +0000 Date: Sun, 3 Jan 2010 09:26:08 -0800 From: Arjan van de Ven To: Hui Zhu Cc: Russell King - ARM Linux , saeed bishara , Catalin Marinas , Nicolas Pitre , Ralf Baechle , David Daney , Tomaso Paoletti , Chris Dearman , Paul Gortmaker , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Frederic Weisbecker , Alexey Dobriyan , Brian Gerst , Tejun Heo , Rusty Russell , Andrew Morton , Steven Rostedt , Greg Kroah-Hartman , "Paul E. McKenney" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Coly Li Subject: Re: [PATCH] stack2core: show stack message and convert it to core file when kernel die Message-ID: <20100103092608.0a04c664@infradead.org> In-Reply-To: References: <20100103160313.GA21156@n2100.arm.linux.org.uk> <20100103164414.GB21156@n2100.arm.linux.org.uk> Organization: Intel X-Mailer: Claws Mail 3.7.3 (GTK+ 2.16.6; i586-redhat-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org See http://www.infradead.org/rpr.html X-archive-position: 25481 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: arjan@infradead.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1958 Content-Length: 312 Lines: 13 On Mon, 4 Jan 2010 00:55:04 +0800 Hui Zhu wrote: > > It show which line make kernel die. > similar to scripts/markup_oops.pl already does ? -- Arjan van de Ven Intel Open Source Technology Centre For development, discussion and tips for power savings, visit http://www.lesswatts.org From teawater@gmail.com Sun Jan 3 18:38:08 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 18:38:20 +0100 (CET) Received: from mail-pz0-f197.google.com ([209.85.222.197]:64301 "EHLO mail-pz0-f197.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491892Ab0ACRiI convert rfc822-to-8bit (ORCPT ); Sun, 3 Jan 2010 18:38:08 +0100 Received: by pzk35 with SMTP id 35so2476445pzk.22 for ; Sun, 03 Jan 2010 09:38:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:in-reply-to:references :from:date:message-id:subject:to:cc:content-type :content-transfer-encoding; bh=ajeM29bon0W4+LHcKUrMqnmWm0CgpYBqP3BFuio5NHU=; b=Y6+3UE2HP2KGqPnIUDavLVPdrP6NUcShaQ9jWbEF+Ag/pI4jIDrNT1ROnQbQQtv1oR MZNQXXYXIIb7u4uoiO1lpEiI/YsUfdi1rTLAVIzNST8lgiDowKoF5z2+gnXQT/SdB2tC rL1HpjJMytB3kHddNb8VXr0g2M27qBqHXyQ20= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-type:content-transfer-encoding; b=juUCw70UxF0yOxHpwVywbEepP2up/+RZzVcGksVR1nPm9OkogqemWHE2Kj5cyWo20f OLdhGs5wqEf5ckWmF8PvR8hQGYaOGIKwtiu2WhJUgEKroWzU61zdZRszyLxs3muD5PWd AfMBJliYt9IKJTbdFm0YglK1Wy+jF+DDXvzfc= MIME-Version: 1.0 Received: by 10.142.60.3 with SMTP id i3mr14712326wfa.147.1262540280173; Sun, 03 Jan 2010 09:38:00 -0800 (PST) In-Reply-To: References: <20100103160313.GA21156@n2100.arm.linux.org.uk> <20100103164414.GB21156@n2100.arm.linux.org.uk> <20100103171013.GC21156@n2100.arm.linux.org.uk> From: Hui Zhu Date: Mon, 4 Jan 2010 01:37:40 +0800 Message-ID: Subject: Re: [PATCH] stack2core: show stack message and convert it to core file when kernel die To: Russell King - ARM Linux Cc: saeed bishara , Catalin Marinas , Nicolas Pitre , Ralf Baechle , David Daney , Tomaso Paoletti , Chris Dearman , Paul Gortmaker , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Frederic Weisbecker , Alexey Dobriyan , Brian Gerst , Tejun Heo , Rusty Russell , Andrew Morton , Steven Rostedt , Greg Kroah-Hartman , "Paul E. McKenney" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Coly Li Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT X-archive-position: 25482 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: teawater@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1962 Content-Length: 919 Lines: 30 And gdb need a message that seems panic doesn't show: LKM address message. like: S2C:add-symbol-file e.ko 0xffffffffa0000000 Thanks, Hui On Mon, Jan 4, 2010 at 01:18, Hui Zhu wrote: > Sorry I make a mistake, I sent the mail before I complete it.  Maybe > some hotkey or something. > > The s2c can get the message from the current panic message is better. > I am not get them for now, maybe it need open some options or > something. > > Thanks, > Hui > > On Mon, Jan 4, 2010 at 01:10, Russell King - ARM Linux > wrote: >> On Mon, Jan 04, 2010 at 12:55:04AM +0800, Hui Zhu wrote: >>> I didn't give the user raw oopses. >>> I give him core file. When the kernel die, do we can get a core file now? >> >> I think there's a communication issue here... clearly you're not >> understanding what I've been trying to tell you. >> >> I don't think I can help you any further. >> > From teawater@gmail.com Sun Jan 3 18:40:17 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 18:40:26 +0100 (CET) Received: from mail-pw0-f45.google.com ([209.85.160.45]:56063 "EHLO mail-pw0-f45.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493105Ab0ACRkR convert rfc822-to-8bit (ORCPT ); Sun, 3 Jan 2010 18:40:17 +0100 Received: by pwj1 with SMTP id 1so9107234pwj.24 for ; Sun, 03 Jan 2010 09:40:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:in-reply-to:references :from:date:message-id:subject:to:cc:content-type :content-transfer-encoding; bh=voXcGt0v4aMmF1zyCbVZ635SaPxUjYCO+cFrLElCLw0=; b=qZDxRdppzX4InLlhbFKrGeotTldxclCYrYwDRzUKD44mdZBQSghNiC9vWzyFRZdqjj OVMUjsDaGaQDVB267H8wzWhGzLXvmsAAa+va/3wk+T1ZBDSSi7jvqzHouOZiFUAPRID/ 5mN+PGoQ+RodvbkbnZ5UJI4KH7TW6ro9z7GMM= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-type:content-transfer-encoding; b=nKnqBUZK1ZBb8lJTeXd84eD9ZB+ne1pIdbrD53JcGy+ehO4sKVCRtRF2eaSu+nrmeF wcZAuVLGtc4FyAOCyHNK+/S0rafaEvVXBGouAgxKkAs2hBkaAXFKu/1rl32wmQzNYNXP VAK8IPc46sxGqm5DS3NsW5verpaGCJ3TMAB7E= MIME-Version: 1.0 Received: by 10.143.25.9 with SMTP id c9mr204169wfj.7.1262540404090; Sun, 03 Jan 2010 09:40:04 -0800 (PST) In-Reply-To: <20100103092608.0a04c664@infradead.org> References: <20100103160313.GA21156@n2100.arm.linux.org.uk> <20100103164414.GB21156@n2100.arm.linux.org.uk> <20100103092608.0a04c664@infradead.org> From: Hui Zhu Date: Mon, 4 Jan 2010 01:39:44 +0800 Message-ID: Subject: Re: [PATCH] stack2core: show stack message and convert it to core file when kernel die To: Arjan van de Ven Cc: Russell King - ARM Linux , saeed bishara , Catalin Marinas , Nicolas Pitre , Ralf Baechle , David Daney , Chris Dearman , Paul Gortmaker , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Frederic Weisbecker , Alexey Dobriyan , Brian Gerst , Tejun Heo , Rusty Russell , Andrew Morton , Steven Rostedt , Greg Kroah-Hartman , "Paul E. McKenney" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Coly Li Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT X-archive-position: 25483 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: teawater@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1964 Content-Length: 510 Lines: 21 scripts/markup_oops.pl just support x86? s2c support x86, x8664, arm, mips, mips64. Thanks, Hui On Mon, Jan 4, 2010 at 01:26, Arjan van de Ven wrote: > On Mon, 4 Jan 2010 00:55:04 +0800 > Hui Zhu wrote: >> >> It show which line make kernel die. >> > > similar to scripts/markup_oops.pl already does ? > > > -- > Arjan van de Ven        Intel Open Source Technology Centre > For development, discussion and tips for power savings, > visit http://www.lesswatts.org > From linux@arm.linux.org.uk Sun Jan 3 18:51:43 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 18:51:47 +0100 (CET) Received: from caramon.arm.linux.org.uk ([78.32.30.218]:45138 "EHLO caramon.arm.linux.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493107Ab0ACRvn (ORCPT ); Sun, 3 Jan 2010 18:51:43 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arm.linux.org.uk; s=caramon; h=Date:From:To:Cc:Subject: Message-ID:References:MIME-Version:Content-Type:In-Reply-To: Sender; bh=CoWDwFVVkSra7nxerytlLCdGIVbkTrbpbACEiNiwq6w=; b=AT+8W +1jEis3yVJ6mMmbjrPSqt8VXj38S28zjRJmVtWhmhYrnNGFJuxTZgnKZyNBAgylp gaTuPRhloY3jZ0vbRDnrYhTQ5Nlmf2YRFde9FVibYMKVKCP1OjaNW+2EsgUySgMP DAkMB3qITjkC8reE6JzEBHrVyB+HG1u5LnNBK0= Received: from n2100.arm.linux.org.uk ([2002:4e20:1eda:1:214:fdff:fe10:4f86]) by caramon.arm.linux.org.uk with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.69) (envelope-from ) id 1NRUYF-00074e-US; Sun, 03 Jan 2010 17:47:40 +0000 Received: from linux by n2100.arm.linux.org.uk with local (Exim 4.69) (envelope-from ) id 1NRUYD-00064H-Ht; Sun, 03 Jan 2010 17:47:37 +0000 Date: Sun, 3 Jan 2010 17:47:37 +0000 From: Russell King - ARM Linux To: Hui Zhu Cc: Arjan van de Ven , saeed bishara , Catalin Marinas , Nicolas Pitre , Ralf Baechle , David Daney , Chris Dearman , Paul Gortmaker , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Frederic Weisbecker , Alexey Dobriyan , Brian Gerst , Tejun Heo , Rusty Russell , Andrew Morton , Steven Rostedt , Greg Kroah-Hartman , "Paul E. McKenney" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Coly Li Subject: Re: [PATCH] stack2core: show stack message and convert it to core file when kernel die Message-ID: <20100103174737.GD21156@n2100.arm.linux.org.uk> References: <20100103160313.GA21156@n2100.arm.linux.org.uk> <20100103164414.GB21156@n2100.arm.linux.org.uk> <20100103092608.0a04c664@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.18 (2008-05-17) X-archive-position: 25484 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: linux@arm.linux.org.uk Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1967 Content-Length: 321 Lines: 7 On Mon, Jan 04, 2010 at 01:39:44AM +0800, Hui Zhu wrote: > scripts/markup_oops.pl just support x86? > s2c support x86, x8664, arm, mips, mips64. I'm sure there's patches around to make it work on ARM, or if not, there soon will be. There's certainly patches around at the moment to make scripts/decodecode work on ARM. From marek.vasut@gmail.com Sun Jan 3 19:32:28 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 19:32:35 +0100 (CET) Received: from mail-fx0-f211.google.com ([209.85.220.211]:38831 "EHLO mail-fx0-f211.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492757Ab0ACSc2 (ORCPT ); Sun, 3 Jan 2010 19:32:28 +0100 Received: by fxm3 with SMTP id 3so5202140fxm.24 for ; Sun, 03 Jan 2010 10:32:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:organization:to:subject :date:user-agent:cc:references:in-reply-to:mime-version:content-type :content-transfer-encoding:message-id; bh=PUK0l7B++U34esseWgBlztdJWNai2kr87JxiqAdWpgg=; b=Kxcs0bcYpffb3vFx9hnc/iUWbF7/Wh8eAIVSZzTg7ixk9Z9abCctYRFbewmyOOxHSB /5ZNiMQ6BNWQ/PpCLE14fetGDJpu98e9Gj2Mi+YPqYfoJ2rqvgJc33dQmxiV4Y5U1Fi0 OIju170ONk7ekT6wVa6GutTnKetiUu62alOX8= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:organization:to:subject:date:user-agent:cc:references :in-reply-to:mime-version:content-type:content-transfer-encoding :message-id; b=XGFRGLmpCmo7L2ultbgRX+s0Y4DwoKJOqCtl8k4AX9j4k+VBliBVwDfwLfIUVhDrQa IIUQ/pLlcK1Xq0S80h6l1qg+PCZpkhkUio4DNoGFbDSzeU4sdgUfJvVCiuspvucZlJF2 HwIhdltimWqGAr6CuCPcOsQ6FQ6GlHai7adzA= Received: by 10.223.4.220 with SMTP id 28mr16018151fas.18.1262543540486; Sun, 03 Jan 2010 10:32:20 -0800 (PST) Received: from rin.localnet ([72.14.240.164]) by mx.google.com with ESMTPS id d13sm25177818fka.47.2010.01.03.10.32.16 (version=SSLv3 cipher=RC4-MD5); Sun, 03 Jan 2010 10:32:18 -0800 (PST) From: Marek Vasut Organization: Hack&Dev To: linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH] stack2core: show stack message and convert it to core file when kernel die Date: Sun, 3 Jan 2010 19:32:11 +0100 User-Agent: KMail/1.12.2 (Linux/2.6.31-1-amd64; KDE/4.3.2; x86_64; ; ) Cc: "Russell King - ARM Linux" , Hui Zhu , linux-mips@linux-mips.org, Catalin Marinas , Coly Li , Paul Gortmaker , "H. Peter Anvin" , x86@kernel.org, David Daney , Chris Dearman , Ingo Molnar , Frederic Weisbecker , "Paul E. McKenney" , saeed bishara , Alexey Dobriyan , Brian Gerst , Rusty Russell , Steven Rostedt , Thomas Gleixner , Arjan van de Ven , Nicolas Pitre , "Greg Kroah-Hartman" , linux-kernel@vger.kernel.org, Ralf Baechle , Tejun Heo , Andrew Morton References: <20100103174737.GD21156@n2100.arm.linux.org.uk> In-Reply-To: <20100103174737.GD21156@n2100.arm.linux.org.uk> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Message-Id: <201001031932.11210.marek.vasut@gmail.com> X-archive-position: 25485 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: marek.vasut@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1973 Content-Length: 696 Lines: 19 Dne Ne 3. ledna 2010 18:47:37 Russell King - ARM Linux napsal(a): > On Mon, Jan 04, 2010 at 01:39:44AM +0800, Hui Zhu wrote: > > scripts/markup_oops.pl just support x86? > > s2c support x86, x8664, arm, mips, mips64. > > I'm sure there's patches around to make it work on ARM, or if not, > there soon will be. And if there are not, that's the place you should focus yourself on rather than duplicating work ... > There's certainly patches around at the moment > to make scripts/decodecode work on ARM. > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > From florian@openwrt.org Sun Jan 3 21:17:09 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 21:17:13 +0100 (CET) Received: from mail-ew0-f223.google.com ([209.85.219.223]:50138 "EHLO mail-ew0-f223.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492583Ab0ACURJ (ORCPT ); Sun, 3 Jan 2010 21:17:09 +0100 Received: by ewy23 with SMTP id 23so416198ewy.24 for ; Sun, 03 Jan 2010 12:16:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:sender:from:date:subject :mime-version:x-uid:x-length:to:cc:reply-to:content-type :content-transfer-encoding:message-id; bh=4yniO0wslh/Cc1BZ6s1zJphBnDiT1JHV8IzmEJ4FkD4=; b=Om6QyjNPmogH7bPHgKP8KYOLZM4hFYQIKNcYTmUAgaxu+YA9QMlYh0HkN6rddcFtt8 mEZhBH7vdOuyuBnMq8kcUprqMuzMP6xVQCPdkDZBrqjL1ZuNmmJ9oGUzoT5ZX3bg+Y2Y xxlmNSAAeoRvQf4kOV3wfU2E1saja1GelT6ds= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:date:subject:mime-version:x-uid:x-length:to:cc:reply-to :content-type:content-transfer-encoding:message-id; b=p5x6BQU1KyR/Vm8YfOCS6hfLPBhbdcJTkRpBCWPSPKgFaa/hHEjdzUF1PZU/1Qk4Lh BmA3xT/JacGLpk1zkpoQG9dOb9Hv2qS9S5nO89bXaF8AqU4uUwq/NB1pSqtA8yFBnru0 LeJ+bTvGXmvDrNyA3nSC+5dH+fNJMzbGvKhNQ= Received: by 10.216.164.9 with SMTP id b9mr3227121wel.153.1262549815640; Sun, 03 Jan 2010 12:16:55 -0800 (PST) Received: from lenovo.localnet (92.59.76-86.rev.gaoland.net [86.76.59.92]) by mx.google.com with ESMTPS id 28sm41922519eye.5.2010.01.03.12.16.54 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sun, 03 Jan 2010 12:16:55 -0800 (PST) From: Florian Fainelli Date: Sun, 3 Jan 2010 21:16:51 +0100 Subject: [PATCH 1/4] ar7: implement gpiolib MIME-Version: 1.0 X-Length: 8020 To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Reply-To: Florian Fainelli Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201001032116.52819.florian@openwrt.org> X-archive-position: 25486 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1991 Content-Length: 7051 Lines: 277 This patch implements gpiolib for the AR7 SoC. Signed-off-by: Florian Fainelli --- diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 9541171..bd80252 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -41,7 +41,7 @@ config AR7 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_SUPPORTS_ZBOOT_UART16550 - select GENERIC_GPIO + select ARCH_REQUIRE_GPIOLIB select GCD select VLYNQ help diff --git a/arch/mips/ar7/gpio.c b/arch/mips/ar7/gpio.c index 74e14a3..0e9f4e1 100644 --- a/arch/mips/ar7/gpio.c +++ b/arch/mips/ar7/gpio.c @@ -1,6 +1,7 @@ /* * Copyright (C) 2007 Felix Fietkau * Copyright (C) 2007 Eugene Konev + * Copyright (C) 2009 Florian Fainelli * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,31 +19,113 @@ */ #include +#include #include -static const char *ar7_gpio_list[AR7_GPIO_MAX]; +struct ar7_gpio_chip { + void __iomem *regs; + struct gpio_chip chip; +}; -int gpio_request(unsigned gpio, const char *label) +static int ar7_gpio_get_value(struct gpio_chip *chip, unsigned gpio) { - if (gpio >= AR7_GPIO_MAX) - return -EINVAL; + struct ar7_gpio_chip *gpch = + container_of(chip, struct ar7_gpio_chip, chip); + void __iomem *gpio_in = gpch->regs + AR7_GPIO_INPUT; - if (ar7_gpio_list[gpio]) - return -EBUSY; + return readl(gpio_in) & (1 << gpio); +} + +static void ar7_gpio_set_value(struct gpio_chip *chip, + unsigned gpio, int value) +{ + struct ar7_gpio_chip *gpch = + container_of(chip, struct ar7_gpio_chip, chip); + void __iomem *gpio_out = gpch->regs + AR7_GPIO_OUTPUT; + unsigned tmp; + + tmp = readl(gpio_out) & ~(1 << gpio); + if (value) + tmp |= 1 << gpio; + writel(tmp, gpio_out); +} + +static int ar7_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) +{ + struct ar7_gpio_chip *gpch = + container_of(chip, struct ar7_gpio_chip, chip); + void __iomem *gpio_dir = gpch->regs + AR7_GPIO_DIR; - if (label) - ar7_gpio_list[gpio] = label; - else - ar7_gpio_list[gpio] = "busy"; + writel(readl(gpio_dir) | (1 << gpio), gpio_dir); return 0; } -EXPORT_SYMBOL(gpio_request); -void gpio_free(unsigned gpio) +static int ar7_gpio_direction_output(struct gpio_chip *chip, + unsigned gpio, int value) { - BUG_ON(!ar7_gpio_list[gpio]); - ar7_gpio_list[gpio] = NULL; + struct ar7_gpio_chip *gpch = + container_of(chip, struct ar7_gpio_chip, chip); + void __iomem *gpio_dir = gpch->regs + AR7_GPIO_DIR; + + ar7_gpio_set_value(chip, gpio, value); + writel(readl(gpio_dir) & ~(1 << gpio), gpio_dir); + + return 0; +} + +static struct ar7_gpio_chip ar7_gpio_chip = { + .chip = { + .label = "ar7-gpio", + .direction_input = ar7_gpio_direction_input, + .direction_output = ar7_gpio_direction_output, + .set = ar7_gpio_set_value, + .get = ar7_gpio_get_value, + .base = 0, + .ngpio = AR7_GPIO_MAX, + } +}; + +int ar7_gpio_enable(unsigned gpio) +{ + void __iomem *gpio_en = ar7_gpio_chip.regs + AR7_GPIO_ENABLE; + + writel(readl(gpio_en) | (1 << gpio), gpio_en); + + return 0; +} +EXPORT_SYMBOL(ar7_gpio_enable); + +int ar7_gpio_disable(unsigned gpio) +{ + void __iomem *gpio_en = ar7_gpio_chip.regs + AR7_GPIO_ENABLE; + + writel(readl(gpio_en) & ~(1 << gpio), gpio_en); + + return 0; +} +EXPORT_SYMBOL(ar7_gpio_disable); + +static int __init ar7_gpio_init(void) +{ + int ret; + + ar7_gpio_chip.regs = ioremap_nocache(AR7_REGS_GPIO, + AR7_REGS_GPIO + 0x10); + + if (!ar7_gpio_chip.regs) { + printk(KERN_ERR "ar7-gpio: failed to ioremap regs\n"); + return -ENOMEM; + } + + ret = gpiochip_add(&ar7_gpio_chip.chip); + if (ret) { + printk(KERN_ERR "ar7-gpio: failed to add gpiochip\n"); + return ret; + } + printk(KERN_INFO "ar7-gpio: registered %d GPIOs\n", + ar7_gpio_chip.chip.ngpio); + return ret; } -EXPORT_SYMBOL(gpio_free); +arch_initcall(ar7_gpio_init); diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c index 85169c0..acbe147 100644 --- a/arch/mips/ar7/platform.c +++ b/arch/mips/ar7/platform.c @@ -34,6 +34,7 @@ #include #include #include +#include #include #include diff --git a/arch/mips/include/asm/mach-ar7/gpio.h b/arch/mips/include/asm/mach-ar7/gpio.h index cbe9c4f..73f9b16 100644 --- a/arch/mips/include/asm/mach-ar7/gpio.h +++ b/arch/mips/include/asm/mach-ar7/gpio.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2007 Florian Fainelli + * Copyright (C) 2007-2009 Florian Fainelli * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -22,88 +22,18 @@ #include #define AR7_GPIO_MAX 32 +#define NR_BUILTIN_GPIO AR7_GPIO_MAX -extern int gpio_request(unsigned gpio, const char *label); -extern void gpio_free(unsigned gpio); +#define gpio_to_irq(gpio) NULL -/* Common GPIO layer */ -static inline int gpio_get_value(unsigned gpio) -{ - void __iomem *gpio_in = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_INPUT); +#define gpio_get_value __gpio_get_value +#define gpio_set_value __gpio_set_value - return readl(gpio_in) & (1 << gpio); -} - -static inline void gpio_set_value(unsigned gpio, int value) -{ - void __iomem *gpio_out = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_OUTPUT); - unsigned tmp; - - tmp = readl(gpio_out) & ~(1 << gpio); - if (value) - tmp |= 1 << gpio; - writel(tmp, gpio_out); -} - -static inline int gpio_direction_input(unsigned gpio) -{ - void __iomem *gpio_dir = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR); - - if (gpio >= AR7_GPIO_MAX) - return -EINVAL; - - writel(readl(gpio_dir) | (1 << gpio), gpio_dir); - - return 0; -} - -static inline int gpio_direction_output(unsigned gpio, int value) -{ - void __iomem *gpio_dir = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR); - - if (gpio >= AR7_GPIO_MAX) - return -EINVAL; - - gpio_set_value(gpio, value); - writel(readl(gpio_dir) & ~(1 << gpio), gpio_dir); - - return 0; -} - -static inline int gpio_to_irq(unsigned gpio) -{ - return -EINVAL; -} - -static inline int irq_to_gpio(unsigned irq) -{ - return -EINVAL; -} +#define gpio_cansleep __gpio_cansleep /* Board specific GPIO functions */ -static inline int ar7_gpio_enable(unsigned gpio) -{ - void __iomem *gpio_en = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE); - - writel(readl(gpio_en) | (1 << gpio), gpio_en); - - return 0; -} - -static inline int ar7_gpio_disable(unsigned gpio) -{ - void __iomem *gpio_en = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE); - - writel(readl(gpio_en) & ~(1 << gpio), gpio_en); - - return 0; -} +int ar7_gpio_enable(unsigned gpio); +int ar7_gpio_disable(unsigned gpio); #include From florian@openwrt.org Sun Jan 3 21:17:09 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 21:17:48 +0100 (CET) Received: from mail-ew0-f223.google.com ([209.85.219.223]:50138 "EHLO mail-ew0-f223.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492622Ab0ACURJ (ORCPT ); Sun, 3 Jan 2010 21:17:09 +0100 Received: by mail-ew0-f223.google.com with SMTP id 23so416198ewy.24 for ; Sun, 03 Jan 2010 12:17:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:sender:from:date:subject :mime-version:x-uid:x-length:to:cc:reply-to:content-type :content-transfer-encoding:message-id; bh=hHzR5/4ph5/o5y8eK7c9TPnyRgO1itw3mzrr90hckMI=; b=HR28vB7XRcZBF+/ociKSBcaQ6Jindo0HXkZPP+M/REl2LprMB34NBZl/2/Zn8OwR1b PzguMU386etZPAJWV7ZpEd4jH+RUmoRGyuQ/YhXf9JLR7xMdswzoDeWKB4i5eVqhP5bW bvelIU2GAQdiJbU23jxFe4rn7MBRChivFNVSk= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:date:subject:mime-version:x-uid:x-length:to:cc:reply-to :content-type:content-transfer-encoding:message-id; b=LqS/N3M4oxVDkEu5rH97OtlrkCZH5plTaZXB5zXDTHOrqNlrMym0cyxsYs5hn8Fqwt bYRnDd65r+kKx9GbBn1SYLyErD5cJYKnKtjnUDBROHbsDS8TCUooStWZleeTc2/CyMim fU+SfWBswiENGmZ7apxy1Ibh/oOq9S+ZZrsY4= Received: by 10.213.39.203 with SMTP id h11mr3887204ebe.0.1262549829502; Sun, 03 Jan 2010 12:17:09 -0800 (PST) Received: from lenovo.localnet (92.59.76-86.rev.gaoland.net [86.76.59.92]) by mx.google.com with ESMTPS id 7sm35603745eyb.2.2010.01.03.12.17.08 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sun, 03 Jan 2010 12:17:08 -0800 (PST) From: Florian Fainelli Date: Sun, 3 Jan 2010 21:17:06 +0100 Subject: [PATCH 2/4] ar7: implement clock API MIME-Version: 1.0 X-Length: 13396 To: linux-mips@linux-mips.org, Wim Van Sebroeck Cc: ralf@linux-mips.org, netdev@vger.kernel.org, David Miller Reply-To: Florian Fainelli Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201001032117.07022.florian@openwrt.org> X-archive-position: 25487 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1992 Content-Length: 12406 Lines: 439 This patch makes the ar7 clock code implement the Linux clk API. Drivers using the various clocks available in the SoC are updated accordingly. Signed-off-by: Florian Fainelli --- diff --git a/arch/mips/ar7/clock.c b/arch/mips/ar7/clock.c index cc65c8e..fc0e715 100644 --- a/arch/mips/ar7/clock.c +++ b/arch/mips/ar7/clock.c @@ -1,6 +1,7 @@ /* * Copyright (C) 2007 Felix Fietkau * Copyright (C) 2007 Eugene Konev + * Copyright (C) 2009 Florian Fainelli * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -24,6 +25,8 @@ #include #include #include +#include +#include #include #include @@ -94,12 +97,16 @@ struct tnetd7200_clocks { struct tnetd7200_clock usb; }; -int ar7_cpu_clock = 150000000; -EXPORT_SYMBOL(ar7_cpu_clock); -int ar7_bus_clock = 125000000; -EXPORT_SYMBOL(ar7_bus_clock); -int ar7_dsp_clock; -EXPORT_SYMBOL(ar7_dsp_clock); +static struct clk bus_clk = { + .rate = 125000000, +}; + +static struct clk cpu_clk = { + .rate = 150000000, +}; + +static struct clk dsp_clk; +static struct clk vbus_clk; static void approximate(int base, int target, int *prediv, int *postdiv, int *mul) @@ -185,7 +192,7 @@ static int tnetd7300_get_clock(u32 shift, struct tnetd7300_clock *clock, base_clock = AR7_XTAL_CLOCK; break; case BOOT_PLL_SOURCE_CPU: - base_clock = ar7_cpu_clock; + base_clock = cpu_clk.rate; break; } @@ -212,11 +219,11 @@ static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock, u32 *bootcr, u32 frequency) { int prediv, postdiv, mul; - int base_clock = ar7_bus_clock; + int base_clock = bus_clk.rate; switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) { case BOOT_PLL_SOURCE_BUS: - base_clock = ar7_bus_clock; + base_clock = bus_clk.rate; break; case BOOT_PLL_SOURCE_REF: base_clock = AR7_REF_CLOCK; @@ -225,7 +232,7 @@ static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock, base_clock = AR7_XTAL_CLOCK; break; case BOOT_PLL_SOURCE_CPU: - base_clock = ar7_cpu_clock; + base_clock = cpu_clk.rate; break; } @@ -247,18 +254,18 @@ static void __init tnetd7300_init_clocks(void) ioremap_nocache(UR8_REGS_CLOCKS, sizeof(struct tnetd7300_clocks)); - ar7_bus_clock = tnetd7300_get_clock(BUS_PLL_SOURCE_SHIFT, + bus_clk.rate = tnetd7300_get_clock(BUS_PLL_SOURCE_SHIFT, &clocks->bus, bootcr, AR7_AFE_CLOCK); if (*bootcr & BOOT_PLL_ASYNC_MODE) - ar7_cpu_clock = tnetd7300_get_clock(CPU_PLL_SOURCE_SHIFT, + cpu_clk.rate = tnetd7300_get_clock(CPU_PLL_SOURCE_SHIFT, &clocks->cpu, bootcr, AR7_AFE_CLOCK); else - ar7_cpu_clock = ar7_bus_clock; + cpu_clk.rate = bus_clk.rate; - if (ar7_dsp_clock == 250000000) + if (dsp_clk.rate == 250000000) tnetd7300_set_clock(DSP_PLL_SOURCE_SHIFT, &clocks->dsp, - bootcr, ar7_dsp_clock); + bootcr, dsp_clk.rate); iounmap(clocks); iounmap(bootcr); @@ -343,20 +350,20 @@ static void __init tnetd7200_init_clocks(void) printk(KERN_INFO "Clocks: Setting DSP clock\n"); calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv, &dsp_postdiv, &dsp_mul); - ar7_bus_clock = + bus_clk.rate = ((dsp_base / dsp_prediv) * dsp_mul) / dsp_postdiv; tnetd7200_set_clock(dsp_base, &clocks->dsp, dsp_prediv, dsp_postdiv * 2, dsp_postdiv, dsp_mul * 2, - ar7_bus_clock); + bus_clk.rate); printk(KERN_INFO "Clocks: Setting CPU clock\n"); calculate(cpu_base, TNETD7200_DEF_CPU_CLK, &cpu_prediv, &cpu_postdiv, &cpu_mul); - ar7_cpu_clock = + cpu_clk.rate = ((cpu_base / cpu_prediv) * cpu_mul) / cpu_postdiv; tnetd7200_set_clock(cpu_base, &clocks->cpu, cpu_prediv, cpu_postdiv, -1, cpu_mul, - ar7_cpu_clock); + cpu_clk.rate); } else if (*bootcr & BOOT_PLL_2TO1_MODE) { @@ -365,48 +372,90 @@ static void __init tnetd7200_init_clocks(void) printk(KERN_INFO "Clocks: Setting CPU clock\n"); calculate(cpu_base, TNETD7200_DEF_CPU_CLK, &cpu_prediv, &cpu_postdiv, &cpu_mul); - ar7_cpu_clock = ((cpu_base / cpu_prediv) * cpu_mul) + cpu_clk.rate = ((cpu_base / cpu_prediv) * cpu_mul) / cpu_postdiv; tnetd7200_set_clock(cpu_base, &clocks->cpu, cpu_prediv, cpu_postdiv, -1, cpu_mul, - ar7_cpu_clock); + cpu_clk.rate); printk(KERN_INFO "Clocks: Setting DSP clock\n"); calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv, &dsp_postdiv, &dsp_mul); - ar7_bus_clock = ar7_cpu_clock / 2; + bus_clk.rate = cpu_clk.rate / 2; tnetd7200_set_clock(dsp_base, &clocks->dsp, dsp_prediv, dsp_postdiv * 2, dsp_postdiv, - dsp_mul * 2, ar7_bus_clock); + dsp_mul * 2, bus_clk.rate); } else { printk(KERN_INFO "Clocks: Sync 1:1 mode\n"); printk(KERN_INFO "Clocks: Setting DSP clock\n"); calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv, &dsp_postdiv, &dsp_mul); - ar7_bus_clock = ((dsp_base / dsp_prediv) * dsp_mul) + bus_clk.rate = ((dsp_base / dsp_prediv) * dsp_mul) / dsp_postdiv; tnetd7200_set_clock(dsp_base, &clocks->dsp, dsp_prediv, dsp_postdiv * 2, dsp_postdiv, - dsp_mul * 2, ar7_bus_clock); + dsp_mul * 2, bus_clk.rate); - ar7_cpu_clock = ar7_bus_clock; + cpu_clk.rate = bus_clk.rate; } printk(KERN_INFO "Clocks: Setting USB clock\n"); - usb_base = ar7_bus_clock; + usb_base = bus_clk.rate; calculate(usb_base, TNETD7200_DEF_USB_CLK, &usb_prediv, &usb_postdiv, &usb_mul); tnetd7200_set_clock(usb_base, &clocks->usb, usb_prediv, usb_postdiv, -1, usb_mul, TNETD7200_DEF_USB_CLK); - ar7_dsp_clock = ar7_cpu_clock; + dsp_clk.rate = cpu_clk.rate; iounmap(clocks); iounmap(bootcr); } +/* + * Linux clock API + */ +int clk_enable(struct clk *clk) +{ + return 0; +} +EXPORT_SYMBOL(clk_enable); + +void clk_disable(struct clk *clk) +{ +} +EXPORT_SYMBOL(clk_disable); + +unsigned long clk_get_rate(struct clk *clk) +{ + return clk->rate; +} +EXPORT_SYMBOL(clk_get_rate); + +struct clk *clk_get(struct device *dev, const char *id) +{ + if (!strcmp(id, "bus")) + return &bus_clk; + /* cpmac and vbus share the same rate */ + if (!strcmp(id, "cpmac")) + return &vbus_clk; + if (!strcmp(id, "cpu")) + return &cpu_clk; + if (!strcmp(id, "dsp")); + return &dsp_clk; + if (!strcmp(id, "vbus")) + return &vbus_clk; + return ERR_PTR(-ENOENT); +} +EXPORT_SYMBOL(clk_get); + +void clk_put(struct clk *clk) +{ +} +EXPORT_SYMBOL(clk_put); + int __init ar7_init_clocks(void) { switch (ar7_chip_id()) { @@ -415,12 +464,14 @@ int __init ar7_init_clocks(void) tnetd7200_init_clocks(); break; case AR7_CHIP_7300: - ar7_dsp_clock = tnetd7300_dsp_clock(); + dsp_clk.rate = tnetd7300_dsp_clock(); tnetd7300_init_clocks(); break; default: break; } + /* adjust vbus clock rate */ + vbus_clk.rate = bus_clk.rate / 2; return 0; } diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c index acbe147..c591f69 100644 --- a/arch/mips/ar7/platform.c +++ b/arch/mips/ar7/platform.c @@ -35,6 +35,7 @@ #include #include #include +#include #include #include @@ -507,13 +508,18 @@ static int __init ar7_register_devices(void) u32 *bootcr, val; #ifdef CONFIG_SERIAL_8250 static struct uart_port uart_port[2] __initdata; + struct clk *bus_clk; memset(uart_port, 0, sizeof(struct uart_port) * 2); + bus_clk = clk_get(NULL, "bus"); + if (IS_ERR(bus_clk)) + panic("unable to get bus clk\n"); + uart_port[0].type = PORT_16550A; uart_port[0].line = 0; uart_port[0].irq = AR7_IRQ_UART0; - uart_port[0].uartclk = ar7_bus_freq() / 2; + uart_port[0].uartclk = clk_get_rate(bus_clk) / 2; uart_port[0].iotype = UPIO_MEM32; uart_port[0].mapbase = AR7_REGS_UART0; uart_port[0].membase = ioremap(uart_port[0].mapbase, 256); @@ -528,7 +534,7 @@ static int __init ar7_register_devices(void) uart_port[1].type = PORT_16550A; uart_port[1].line = 1; uart_port[1].irq = AR7_IRQ_UART1; - uart_port[1].uartclk = ar7_bus_freq() / 2; + uart_port[1].uartclk = clk_get_rate(bus_clk) / 2; uart_port[1].iotype = UPIO_MEM32; uart_port[1].mapbase = UR8_REGS_UART1; uart_port[1].membase = ioremap(uart_port[1].mapbase, 256); diff --git a/arch/mips/ar7/time.c b/arch/mips/ar7/time.c index a1fba89..5fb8a01 100644 --- a/arch/mips/ar7/time.c +++ b/arch/mips/ar7/time.c @@ -20,11 +20,21 @@ #include #include +#include +#include #include #include void __init plat_time_init(void) { - mips_hpt_frequency = ar7_cpu_freq() / 2; + struct clk *cpu_clk; + + cpu_clk = clk_get(NULL, "cpu"); + if (IS_ERR(cpu_clk)) { + printk(KERN_ERR "unable to get cpu clock\n"); + return; + } + + mips_hpt_frequency = clk_get_rate(cpu_clk) / 2; } diff --git a/arch/mips/include/asm/mach-ar7/ar7.h b/arch/mips/include/asm/mach-ar7/ar7.h index 21cbbc7..2410360 100644 --- a/arch/mips/include/asm/mach-ar7/ar7.h +++ b/arch/mips/include/asm/mach-ar7/ar7.h @@ -105,26 +105,10 @@ static inline u8 ar7_chip_rev(void) return (readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x14)) >> 16) & 0xff; } -static inline int ar7_cpu_freq(void) -{ - return ar7_cpu_clock; -} - -static inline int ar7_bus_freq(void) -{ - return ar7_bus_clock; -} - -static inline int ar7_vbus_freq(void) -{ - return ar7_bus_clock / 2; -} -#define ar7_cpmac_freq ar7_vbus_freq - -static inline int ar7_dsp_freq(void) -{ - return ar7_dsp_clock; -} +struct clk { + unsigned int rate; + int id; +}; static inline int ar7_has_high_cpmac(void) { diff --git a/drivers/net/cpmac.c b/drivers/net/cpmac.c index 8d0be26..bf2072e 100644 --- a/drivers/net/cpmac.c +++ b/drivers/net/cpmac.c @@ -36,6 +36,7 @@ #include #include #include +#include #include #include @@ -294,9 +295,16 @@ static int cpmac_mdio_write(struct mii_bus *bus, int phy_id, static int cpmac_mdio_reset(struct mii_bus *bus) { + struct clk *cpmac_clk; + + cpmac_clk = clk_get(&bus->dev, "cpmac"); + if (IS_ERR(cpmac_clk)) { + printk(KERN_ERR "unable to get cpmac clock\n"); + return -1; + } ar7_device_reset(AR7_RESET_BIT_MDIO); cpmac_write(bus->priv, CPMAC_MDIO_CONTROL, MDIOC_ENABLE | - MDIOC_CLKDIV(ar7_cpmac_freq() / 2200000 - 1)); + MDIOC_CLKDIV(clk_get_rate(cpmac_clk) / 2200000 - 1)); return 0; } diff --git a/drivers/watchdog/ar7_wdt.c b/drivers/watchdog/ar7_wdt.c index 2e94b71..2bb95cd 100644 --- a/drivers/watchdog/ar7_wdt.c +++ b/drivers/watchdog/ar7_wdt.c @@ -34,6 +34,7 @@ #include #include #include +#include #include #include @@ -80,6 +81,8 @@ static struct resource *ar7_regs_wdt; /* Pointer to the remapped WDT IO space */ static struct ar7_wdt *ar7_wdt; +static struct clk *vbus_clk; + static void ar7_wdt_kick(u32 value) { WRITE_REG(ar7_wdt->kick_lock, 0x5555); @@ -138,17 +141,19 @@ static void ar7_wdt_disable(u32 value) static void ar7_wdt_update_margin(int new_margin) { u32 change; + u32 vbus_rate; - change = new_margin * (ar7_vbus_freq() / prescale_value); + vbus_rate = clk_get_rate(vbus_clk); + change = new_margin * (vbus_rate / prescale_value); if (change < 1) change = 1; if (change > 0xffff) change = 0xffff; ar7_wdt_change(change); - margin = change * prescale_value / ar7_vbus_freq(); + margin = change * prescale_value / vbus_rate; printk(KERN_INFO DRVNAME ": timer margin %d seconds (prescale %d, change %d, freq %d)\n", - margin, prescale_value, change, ar7_vbus_freq()); + margin, prescale_value, change, vbus_rate); } static void ar7_wdt_enable_wdt(void) @@ -298,6 +303,13 @@ static int __devinit ar7_wdt_probe(struct platform_device *pdev) goto out_mem_region; } + vbus_clk = clk_get(NULL, "vbus"); + if (IS_ERR(vbus_clk)) { + printk(KERN_ERR DRVNAME ": could not get vbus clock\n"); + rc = PTR_ERR(vbus_clk); + goto out_mem_region; + } + ar7_wdt_disable_wdt(); ar7_wdt_prescale(prescale_value); ar7_wdt_update_margin(margin); From florian@openwrt.org Sun Jan 3 21:17:28 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 21:18:23 +0100 (CET) Received: from mail-ew0-f223.google.com ([209.85.219.223]:50138 "EHLO mail-ew0-f223.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492667Ab0ACUR2 (ORCPT ); Sun, 3 Jan 2010 21:17:28 +0100 Received: by mail-ew0-f223.google.com with SMTP id 23so416198ewy.24 for ; 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Sun, 03 Jan 2010 12:17:27 -0800 (PST) From: Florian Fainelli Date: Sun, 3 Jan 2010 21:17:26 +0100 Subject: [PATCH 3/4] MIPS: deal with larger physical offset MIME-Version: 1.0 X-Length: 2223 To: linux-mips@linux-mips.org, ralf@linux-mips.org Reply-To: Florian Fainelli Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201001032117.26581.florian@openwrt.org> X-archive-position: 25488 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1993 Content-Length: 1525 Lines: 45 AR7 has a larger physical offset than other MIPS based systems and therefore needs to setup handlers differently. This version uses uasm instead of the hand crafted assembly previously sent. This modification is also required for running the kernel in mapped address space. Signed-off-by: David Daney Signed-off-by: Eugene Konev Signed-off-by: Florian Fainelli --- diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 308e434..dbf52ab 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -51,6 +51,8 @@ #include #include +#include "../mm/uasm.h" + extern void check_wait(void); extern asmlinkage void r4k_wait(void); extern asmlinkage void rollback_handle_int(void); @@ -1283,9 +1285,18 @@ void *set_except_vector(int n, void *addr) exception_handlers[n] = handler; if (n == 0 && cpu_has_divec) { - *(u32 *)(ebase + 0x200) = 0x08000000 | - (0x03ffffff & (handler >> 2)); - local_flush_icache_range(ebase + 0x200, ebase + 0x204); + unsigned long jump_mask = ~((1 << 28) - 1); + u32 *buf = (u32 *)(ebase + 0x200); + unsigned int k0 = 26; + if((handler & jump_mask) == ((ebase + 0x200) & jump_mask)) { + uasm_i_j(&buf, handler & jump_mask); + uasm_i_nop(&buf); + } else { + UASM_i_LA(&buf, k0, handler); + uasm_i_jr(&buf, k0); + uasm_i_nop(&buf); + } + local_flush_icache_range(ebase + 0x200, (unsigned long)buf); } return (void *)old_handler; } From florian@openwrt.org Sun Jan 3 21:17:40 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 21:18:46 +0100 (CET) Received: from ey-out-1920.google.com ([74.125.78.150]:35349 "EHLO ey-out-1920.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492583Ab0ACURk (ORCPT ); Sun, 3 Jan 2010 21:17:40 +0100 Received: by ey-out-1920.google.com with SMTP id 4so1898825eyg.52 for ; Sun, 03 Jan 2010 12:17:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:sender:from:date:subject :mime-version:x-uid:x-length:to:cc:reply-to:content-type :content-transfer-encoding:message-id; bh=kAqGgO0N/sIG3fn1N12EgwuWj1vT6ipoSPzLEOEwTM0=; b=Wuu+E0N2i5rlGSmEMrD13Vm2ItH84WBgIbwDDiiX1KkYXYXtQ5/KjeD76gpc+bE8I+ LIsCrZ5mxOrNQWbgrP3hmFY2BuTvzb38Qre5cTLyHP53R95SXIh8Cebw268X/QGeh9DT +Cm42Cs6l3bpyM99wg1P7pGZy/aW44WL0geT0= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:date:subject:mime-version:x-uid:x-length:to:cc:reply-to :content-type:content-transfer-encoding:message-id; b=UPpPFajl/3Eqiy3MA8BIn+ohVecbuv7T1TGjezFCk65s1PD1xUZifZcxmoeCNSHphc G1vvFvggyXVT9ydYtvkdR4vYY26nQ9p6Oz93PwCpXdpVuh8ZjiBYJBX9cd4deTYxzp69 OdVvbYGdp4hwq15GF15LuU6cz3HtxeyIXceBQ= Received: by 10.213.109.75 with SMTP id i11mr3426701ebp.68.1262549859209; Sun, 03 Jan 2010 12:17:39 -0800 (PST) Received: from lenovo.localnet (92.59.76-86.rev.gaoland.net [86.76.59.92]) by mx.google.com with ESMTPS id 28sm35691658eyg.12.2010.01.03.12.17.38 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sun, 03 Jan 2010 12:17:38 -0800 (PST) From: Florian Fainelli Date: Sun, 3 Jan 2010 21:17:37 +0100 Subject: [PATCH 4/4] MTD: include ar7part in the list of partitions parsers MIME-Version: 1.0 X-Length: 1572 To: linux-mips@linux-mips.org, linux-mtd@lists.infradead.org, David Woodhouse Cc: ralf@linux-mips.org Reply-To: Florian Fainelli Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201001032117.37459.florian@openwrt.org> X-archive-position: 25489 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1994 Content-Length: 796 Lines: 21 This patch modifies the physmap-flash driver to include the ar7part partition parser in the list of parsers to use when a physmap-flash driver is registered. This is required for AR7 to create partitions correctly. Signed-off-by: Florian Fainelli --- diff --git a/drivers/mtd/maps/physmap.c b/drivers/mtd/maps/physmap.c index d9603f7..0e65ee7 100644 --- a/drivers/mtd/maps/physmap.c +++ b/drivers/mtd/maps/physmap.c @@ -79,7 +79,7 @@ static const char *rom_probe_types[] = { "map_rom", NULL }; #ifdef CONFIG_MTD_PARTITIONS -static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL }; +static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", "ar7part", NULL }; #endif static int physmap_flash_probe(struct platform_device *dev) From dwmw2@infradead.org Sun Jan 3 21:56:32 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 21:56:36 +0100 (CET) Received: from casper.infradead.org ([85.118.1.10]:49133 "EHLO casper.infradead.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492298Ab0ACU4c (ORCPT ); Sun, 3 Jan 2010 21:56:32 +0100 Received: from [2001:8b0:10b:1:222:41ff:fe2d:310a] by casper.infradead.org with esmtpsa (Exim 4.69 #1 (Red Hat Linux)) id 1NRXUo-0006OR-N0; Sun, 03 Jan 2010 20:56:19 +0000 Subject: Re: [PATCH 4/4] MTD: include ar7part in the list of partitions parsers From: David Woodhouse To: Florian Fainelli Cc: linux-mips@linux-mips.org, linux-mtd@lists.infradead.org, ralf@linux-mips.org In-Reply-To: <201001032117.37459.florian@openwrt.org> References: <201001032117.37459.florian@openwrt.org> Content-Type: text/plain; charset="UTF-8" Date: Sun, 03 Jan 2010 20:56:17 +0000 Message-ID: <1262552177.3181.5891.camel@macbook.infradead.org> Mime-Version: 1.0 X-Mailer: Evolution 2.28.2 (2.28.2-1.fc12) Content-Transfer-Encoding: 7bit X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org See http://www.infradead.org/rpr.html X-archive-position: 25490 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dwmw2@infradead.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2003 Content-Length: 540 Lines: 13 On Sun, 2010-01-03 at 21:17 +0100, Florian Fainelli wrote: > This patch modifies the physmap-flash driver to include > the ar7part partition parser in the list of parsers to > use when a physmap-flash driver is registered. This is > required for AR7 to create partitions correctly. Hrm, perhaps we'd do better to allow the probe types to be specified in the platform physmap_flash_data? -- David Woodhouse Open Source Technology Centre David.Woodhouse@intel.com Intel Corporation From alex@digriz.org.uk Sun Jan 3 23:08:32 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 23:08:35 +0100 (CET) Received: from lo.gmane.org ([80.91.229.12]:33095 "EHLO lo.gmane.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493007Ab0ACWIc (ORCPT ); Sun, 3 Jan 2010 23:08:32 +0100 Received: from list by lo.gmane.org with local (Exim 4.50) id 1NRYcf-0004q9-Tm for linux-mips@linux-mips.org; Sun, 03 Jan 2010 23:08:29 +0100 Received: from chipmunk.wormnet.eu ([195.195.131.226]) by main.gmane.org with esmtp (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Sun, 03 Jan 2010 23:08:29 +0100 Received: from alex by chipmunk.wormnet.eu with local (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Sun, 03 Jan 2010 23:08:29 +0100 X-Injected-Via-Gmane: http://gmane.org/ To: linux-mips@linux-mips.org From: Alexander Clouter Subject: Re: [PATCH 4/4] MTD: include ar7part in the list of partitions parsers Date: Sun, 3 Jan 2010 21:31:46 +0000 Message-ID: <2ve717-7pt.ln1@chipmunk.wormnet.eu> References: <201001032117.37459.florian@openwrt.org> <1262552177.3181.5891.camel@macbook.infradead.org> X-Complaints-To: usenet@ger.gmane.org X-Gmane-NNTP-Posting-Host: chipmunk.wormnet.eu User-Agent: tin/1.9.3-20080506 ("Dalintober") (UNIX) (Linux/2.6.26-2-sparc64-smp (sparc64)) Cc: linux-mtd@lists.infradead.org X-archive-position: 25491 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: alex@digriz.org.uk Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2019 Content-Length: 3672 Lines: 120 In gmane.linux.drivers.mtd David Woodhouse wrote: > > On Sun, 2010-01-03 at 21:17 +0100, Florian Fainelli wrote: >> This patch modifies the physmap-flash driver to include >> the ar7part partition parser in the list of parsers to >> use when a physmap-flash driver is registered. This is >> required for AR7 to create partitions correctly. > > Hrm, perhaps we'd do better to allow the probe types to be specified in > the platform physmap_flash_data? > I am not completely convinced the ar7part approach is the best way as you are: 1) not actually reading a partition table and instead using a bunch of 'magic' values to try to work out the partition layout 2) it bears no resemble to what is seen by the ADAM2 bootloader 3) regardless of whether you would actually want to, the user is unable to amend the partition table and have Linux automagically set the table apprioately I chatted with Florian a while back about this but we never continued with it (Real Life[tm] seemed to get in the way) but I had cobbled the following together: ---- diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c index e2278c0..df33fea 100644 --- a/arch/mips/ar7/platform.c +++ b/arch/mips/ar7/platform.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -467,6 +468,60 @@ static void cpmac_get_mac(int instance, unsigned char *dev_addr) char2hex(mac[i * 3 + 1]); } +static void __init detect_partitions(void) +{ + unsigned int i, start, end; + int ret; + char mtdenv[5], *buf; + + for (physmap_flash_data.nr_parts = 0; + physmap_flash_data.nr_parts < 10; + physmap_flash_data.nr_parts++) { + sprintf(mtdenv, "mtd%d", physmap_flash_data.nr_parts); + if (!prom_getenv(mtdenv)) + break; + } + + if (physmap_flash_data.nr_parts == 0) { + printk(KERN_INFO "No partitions found for physmap MTD\n"); + return; + } + if (physmap_flash_data.nr_parts == 10) + printk(KERN_INFO "Reached nr_parts limit for physmap MTD\n"); + + physmap_flash_data.parts = kzalloc( + sizeof(struct mtd_partition)*physmap_flash_data.nr_parts, + GFP_KERNEL); + if (!physmap_flash_data.parts) { + printk(KERN_ERR "Unable to alloc physmap MTD parts struct\n"); + return; + } + + for (i = 0; i < physmap_flash_data.nr_parts; i++) { + sprintf(mtdenv, "mtd%d", i); + buf = prom_getenv(mtdenv); + + ret = sscanf(buf, "%x,%x", &start, &end); + if (ret != 2 || start < 0x90000000 || start > 0x90400000 + || end < 0x90000000 || end > 0x90400000 + || start > end) { + printk(KERN_WARNING "broken partition table for physmap\n"); + kfree(physmap_flash_data.parts); + physmap_flash_data.parts = NULL; + physmap_flash_data.nr_parts = 0; + return; + } + + start -= 0x90000000; + end -= 0x90000000; + + physmap_flash_data.parts[i].name = NULL; + physmap_flash_data.parts[i].size = end - start; + physmap_flash_data.parts[i].offset = start; + physmap_flash_data.parts[i].mask_flags = MTD_WRITEABLE; + } +} + static void __init detect_leds(void) { char *prid, *usb_prod; @@ -536,6 +591,7 @@ static int __init ar7_register_devices(void) return res; } #endif /* CONFIG_SERIAL_8250 */ + detect_partitions(); res = platform_device_register(&physmap_flash); if (res) return res; ---- It simply pulls apart the 'PROM' (aka ADAM2) config and uses that to build the partition table. Work's For Me[tm]. Just my thoughts. Cheers -- Alexander Clouter .sigmonster says: BOFH excuse #12: dry joints on cable plug From tj@kernel.org Sun Jan 3 23:48:36 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 23:48:41 +0100 (CET) Received: from hera.kernel.org ([140.211.167.34]:54733 "EHLO hera.kernel.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493057Ab0ACWsg (ORCPT ); Sun, 3 Jan 2010 23:48:36 +0100 Received: from htj.dyndns.org (localhost [127.0.0.1]) by hera.kernel.org (8.14.3/8.14.3) with ESMTP id o03Mlqui006642 (version=TLSv1/SSLv3 cipher=DHE-RSA-CAMELLIA256-SHA bits=256 verify=NO); Sun, 3 Jan 2010 22:47:54 GMT Received: from [10.7.8.135] (a135.air [10.7.8.135]) by htj.dyndns.org (Postfix) with ESMTPSA id 64B5A10810A2F; Mon, 4 Jan 2010 07:53:13 +0900 (KST) Message-ID: <4B411F14.1040302@kernel.org> Date: Mon, 04 Jan 2010 07:49:56 +0900 From: Tejun Heo User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.5) Gecko/20091130 SUSE/3.0.0-1.1.1 Thunderbird/3.0 MIME-Version: 1.0 To: Hui Zhu CC: Russell King , saeed bishara , Catalin Marinas , Nicolas Pitre , Ralf Baechle , David Daney , Tomaso Paoletti , Chris Dearman , Paul Gortmaker , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Frederic Weisbecker , Alexey Dobriyan , Brian Gerst , Rusty Russell , Andrew Morton , Steven Rostedt , Greg Kroah-Hartman , "Paul E. McKenney" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Coly Li Subject: Re: [PATCH] stack2core: show stack message and convert it to core file when kernel die References: In-Reply-To: X-Enigmail-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-archive-position: 25492 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tj@kernel.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2034 Content-Length: 1710 Lines: 39 On 01/04/2010 12:05 AM, Hui Zhu wrote: > Hello, > > For, when the kernel die, the user will get some message like: > PC is at kernel_init+0xd4/0x104 > LR is at _atomic_dec_and_lock+0x48/0x6c > pc : [] lr : [] psr: 60000013 > sp : c7823fd8 ip : c7823f48 fp : c7823ff4 > Stack: (0xc7823fd8 to 0xc7824000) > 3fc0: 00000000 00000001 > Backtrace: > [] (kernel_init+0x0/0x104) from [] (do_exit+0x0/0x880) > This backtrace have some wrong message sometime and cannot get any > val. Of course, kdump can get more message. But it need do some a lot > of other config. > > The stack2core function, can let kernel show stack message when kernel > die. This stack message can be convert to core file by program s2c > (tools/s2c). Then gdb can show the message in this core file. FWIW, I love it. I used to have to match the assembly to the source code manually to find out which register and stack space meant what. This will be very helpful in decoding oops message, but I think that it would be far more useful if it uses the existing oops messages instead of adding extra messages. The new messages don't add any new information and the oops message is already quite long and scrolls off the screen on certain configurations. Adding new configuration option and making oops message longer will make acquiring the information quite more difficult. If implementing parsing of oops message in C is too awkward (unsurprising at all), maybe implementing a converter in perl or python is the easiest way so that it takes the oops message and puts out well formatted input for the s2c program? thanks. -- tejun From arjan@infradead.org Sun Jan 3 23:59:41 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 03 Jan 2010 23:59:46 +0100 (CET) Received: from casper.infradead.org ([85.118.1.10]:48589 "EHLO casper.infradead.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493116Ab0ACW7l (ORCPT ); Sun, 3 Jan 2010 23:59:41 +0100 Received: from c-24-20-218-92.hsd1.or.comcast.net ([24.20.218.92] helo=localhost.localdomain) by casper.infradead.org with esmtpsa (Exim 4.69 #1 (Red Hat Linux)) id 1NRZPb-0000kG-Uu; Sun, 03 Jan 2010 22:59:04 +0000 Date: Sun, 3 Jan 2010 15:01:34 -0800 From: Arjan van de Ven To: Tejun Heo Cc: Hui Zhu , Russell King , saeed bishara , Catalin Marinas , Nicolas Pitre , Ralf Baechle , David Daney , Tomaso Paoletti , Chris Dearman , Paul Gortmaker , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Frederic Weisbecker , Alexey Dobriyan , Brian Gerst , Rusty Russell , Andrew Morton , Steven Rostedt , Greg Kroah-Hartman , "Paul E. McKenney" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Coly Li Subject: Re: [PATCH] stack2core: show stack message and convert it to core file when kernel die Message-ID: <20100103150134.5bdab023@infradead.org> In-Reply-To: <4B411F14.1040302@kernel.org> References: <4B411F14.1040302@kernel.org> Organization: Intel X-Mailer: Claws Mail 3.7.3 (GTK+ 2.16.6; i586-redhat-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org See http://www.infradead.org/rpr.html X-archive-position: 25493 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: arjan@infradead.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2038 Content-Length: 508 Lines: 16 On Mon, 04 Jan 2010 07:49:56 +0900 Tejun Heo wrote: > > If implementing parsing of oops message in C is too awkward > (unsurprising at all), maybe implementing a converter in perl or > python is the easiest way so that it takes the oops message and puts > out well formatted input for the s2c program? you mean like scripts/markup_oops.pl ? -- Arjan van de Ven Intel Open Source Technology Centre For development, discussion and tips for power savings, visit http://www.lesswatts.org From tj@kernel.org Mon Jan 4 00:07:40 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jan 2010 00:07:45 +0100 (CET) Received: from hera.kernel.org ([140.211.167.34]:51082 "EHLO hera.kernel.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492423Ab0ACXHk (ORCPT ); Mon, 4 Jan 2010 00:07:40 +0100 Received: from htj.dyndns.org (localhost [127.0.0.1]) by hera.kernel.org (8.14.3/8.14.3) with ESMTP id o03N5epw025466 (version=TLSv1/SSLv3 cipher=DHE-RSA-CAMELLIA256-SHA bits=256 verify=NO); Sun, 3 Jan 2010 23:05:42 GMT Received: from [10.7.8.135] (a135.air [10.7.8.135]) by htj.dyndns.org (Postfix) with ESMTPSA id E0E5210810A37; Mon, 4 Jan 2010 08:11:01 +0900 (KST) Message-ID: <4B412341.2010002@kernel.org> Date: Mon, 04 Jan 2010 08:07:45 +0900 From: Tejun Heo User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.5) Gecko/20091130 SUSE/3.0.0-1.1.1 Thunderbird/3.0 MIME-Version: 1.0 To: Arjan van de Ven CC: Hui Zhu , Russell King , saeed bishara , Catalin Marinas , Nicolas Pitre , Ralf Baechle , David Daney , Tomaso Paoletti , Chris Dearman , Paul Gortmaker , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Frederic Weisbecker , Alexey Dobriyan , Brian Gerst , Rusty Russell , Andrew Morton , Steven Rostedt , Greg Kroah-Hartman , "Paul E. McKenney" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Coly Li Subject: Re: [PATCH] stack2core: show stack message and convert it to core file when kernel die References: <4B411F14.1040302@kernel.org> <20100103150134.5bdab023@infradead.org> In-Reply-To: <20100103150134.5bdab023@infradead.org> X-Enigmail-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-archive-position: 25494 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tj@kernel.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2043 Content-Length: 757 Lines: 21 On 01/04/2010 08:01 AM, Arjan van de Ven wrote: > On Mon, 04 Jan 2010 07:49:56 +0900 > Tejun Heo wrote: >> >> If implementing parsing of oops message in C is too awkward >> (unsurprising at all), maybe implementing a converter in perl or >> python is the easiest way so that it takes the oops message and puts >> out well formatted input for the s2c program? > > you mean like scripts/markup_oops.pl ? Whichever one works but s2c wouldn't require symbol decoding. Maybe we can simply add an option to tell it to just parse the oops and output it in machine friendly format. Oh, also, the patch does add new information the module load addresses. We should be able to add those to the oops message in a compact form. Thanks. -- tejun From arjan@infradead.org Mon Jan 4 00:11:57 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jan 2010 00:12:01 +0100 (CET) Received: from casper.infradead.org ([85.118.1.10]:35758 "EHLO casper.infradead.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492423Ab0ACXL5 (ORCPT ); Mon, 4 Jan 2010 00:11:57 +0100 Received: from c-24-20-218-92.hsd1.or.comcast.net ([24.20.218.92] helo=localhost.localdomain) by casper.infradead.org with esmtpsa (Exim 4.69 #1 (Red Hat Linux)) id 1NRZbk-000124-GS; Sun, 03 Jan 2010 23:11:36 +0000 Date: Sun, 3 Jan 2010 15:14:06 -0800 From: Arjan van de Ven To: Tejun Heo Cc: Hui Zhu , Russell King , saeed bishara , Catalin Marinas , Nicolas Pitre , Ralf Baechle , David Daney , Tomaso Paoletti , Chris Dearman , Paul Gortmaker , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Frederic Weisbecker , Alexey Dobriyan , Brian Gerst , Rusty Russell , Andrew Morton , Steven Rostedt , Greg Kroah-Hartman , "Paul E. McKenney" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Coly Li Subject: Re: [PATCH] stack2core: show stack message and convert it to core file when kernel die Message-ID: <20100103151406.20228c3a@infradead.org> In-Reply-To: <4B412341.2010002@kernel.org> References: <4B411F14.1040302@kernel.org> <20100103150134.5bdab023@infradead.org> <4B412341.2010002@kernel.org> Organization: Intel X-Mailer: Claws Mail 3.7.3 (GTK+ 2.16.6; i586-redhat-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org See http://www.infradead.org/rpr.html X-archive-position: 25495 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: arjan@infradead.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2046 Content-Length: 1218 Lines: 30 On Mon, 04 Jan 2010 08:07:45 +0900 Tejun Heo wrote: > On 01/04/2010 08:01 AM, Arjan van de Ven wrote: > > On Mon, 04 Jan 2010 07:49:56 +0900 > > Tejun Heo wrote: > >> > >> If implementing parsing of oops message in C is too awkward > >> (unsurprising at all), maybe implementing a converter in perl or > >> python is the easiest way so that it takes the oops message and > >> puts out well formatted input for the s2c program? > > > > you mean like scripts/markup_oops.pl ? > > Whichever one works but s2c wouldn't require symbol decoding. Maybe > we can simply add an option to tell it to just parse the oops and > output it in machine friendly format. Oh, also, the patch does add > new information the module load addresses. We should be able to add > those to the oops message in a compact form. actually one does not need those; you know the start address of the function already from the current oops output, and since you know the address of the function within the module as well, you know the start address of the module. -- Arjan van de Ven Intel Open Source Technology Centre For development, discussion and tips for power savings, visit http://www.lesswatts.org From tj@kernel.org Mon Jan 4 00:21:13 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jan 2010 00:21:18 +0100 (CET) Received: from hera.kernel.org ([140.211.167.34]:34424 "EHLO hera.kernel.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493121Ab0ACXVN (ORCPT ); Mon, 4 Jan 2010 00:21:13 +0100 Received: from htj.dyndns.org (localhost [127.0.0.1]) by hera.kernel.org (8.14.3/8.14.3) with ESMTP id o03NJWeG010170 (version=TLSv1/SSLv3 cipher=DHE-RSA-CAMELLIA256-SHA bits=256 verify=NO); Sun, 3 Jan 2010 23:19:34 GMT Received: from [127.0.0.2] (htj.dyndns.org [127.0.0.2]) by htj.dyndns.org (Postfix) with ESMTPSA id CA8E110810A37; Mon, 4 Jan 2010 08:24:53 +0900 (KST) Message-ID: <4B412745.9070307@kernel.org> Date: Mon, 04 Jan 2010 08:24:53 +0900 From: Tejun Heo User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.5) Gecko/20091130 SUSE/3.0.0-1.1.1 Thunderbird/3.0 MIME-Version: 1.0 To: Arjan van de Ven CC: Hui Zhu , Russell King , saeed bishara , Catalin Marinas , Nicolas Pitre , Ralf Baechle , David Daney , Tomaso Paoletti , Chris Dearman , Paul Gortmaker , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Frederic Weisbecker , Alexey Dobriyan , Brian Gerst , Rusty Russell , Andrew Morton , Steven Rostedt , Greg Kroah-Hartman , "Paul E. McKenney" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Coly Li Subject: Re: [PATCH] stack2core: show stack message and convert it to core file when kernel die References: <4B411F14.1040302@kernel.org> <20100103150134.5bdab023@infradead.org> <4B412341.2010002@kernel.org> <20100103151406.20228c3a@infradead.org> In-Reply-To: <20100103151406.20228c3a@infradead.org> X-Enigmail-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-archive-position: 25496 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tj@kernel.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2049 Content-Length: 670 Lines: 16 On 01/04/2010 08:14 AM, Arjan van de Ven wrote: >> Whichever one works but s2c wouldn't require symbol decoding. Maybe >> we can simply add an option to tell it to just parse the oops and >> output it in machine friendly format. Oh, also, the patch does add >> new information the module load addresses. We should be able to add >> those to the oops message in a compact form. > > actually one does not need those; you know the start address of the > function already from the current oops output, and since you know the > address of the function within the module as well, you know the start > address of the module. Right. Thanks for the explanation. -- tejun From florian@openwrt.org Mon Jan 4 08:09:24 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jan 2010 08:09:28 +0100 (CET) Received: from mail-ew0-f223.google.com ([209.85.219.223]:48130 "EHLO mail-ew0-f223.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491923Ab0ADHJY convert rfc822-to-8bit (ORCPT ); Mon, 4 Jan 2010 08:09:24 +0100 Received: by ewy23 with SMTP id 23so694648ewy.24 for ; Sun, 03 Jan 2010 23:09:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:sender:from:reply-to:to :subject:date:user-agent:cc:references:in-reply-to:mime-version :content-type:content-transfer-encoding:message-id; bh=fEwdowCE3CieEarvyK13/HtrJWDdIdjGIUqXnTnTdok=; b=xM1wbqdjmSoucRP3qqGbX8cCdP272/tOtoEgHZX+QPCRFdKTIzqWjFh9OG/3TUVsJE anKipdolPcKQ9kFnPeBDgXE35QQ7AoWN2FOWedrR1lHnF+Cdc0kE6lPFBqztCPm2uUgq VSBeNcx75axD+Hd80qfs66s5t3irCyALfJnY0= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:reply-to:to:subject:date:user-agent:cc:references :in-reply-to:mime-version:content-type:content-transfer-encoding :message-id; b=R25DI1uhljo2jYlXHz5Obxkg0AVSxjmnX1Az0PaH7QOwvUZzOl8zvR3OL6vPJWw0r2 s25KvhIm1mMbYc5lHEFGk0NTpekRVWqpMNklTqpFg9qF8jknL//Q2YG6eyc0MlVhJFo4 Fz4d09qwd4kq1ywP9S6R5NKRTE0of7u85DjEQ= Received: by 10.213.41.209 with SMTP id p17mr4896159ebe.9.1262588958323; Sun, 03 Jan 2010 23:09:18 -0800 (PST) Received: from lenovo.localnet (92.59.76-86.rev.gaoland.net [86.76.59.92]) by mx.google.com with ESMTPS id 7sm36494403eyg.41.2010.01.03.23.09.15 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sun, 03 Jan 2010 23:09:16 -0800 (PST) From: Florian Fainelli Reply-To: Florian Fainelli To: David Woodhouse Subject: Re: [PATCH 4/4] MTD: include ar7part in the list of partitions parsers Date: Mon, 4 Jan 2010 08:09:12 +0100 User-Agent: KMail/1.12.2 (Linux/2.6.32-trunk-686; KDE/4.3.2; i686; ; ) Cc: linux-mips@linux-mips.org, linux-mtd@lists.infradead.org, ralf@linux-mips.org References: <201001032117.37459.florian@openwrt.org> <1262552177.3181.5891.camel@macbook.infradead.org> In-Reply-To: <1262552177.3181.5891.camel@macbook.infradead.org> MIME-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: 8BIT Message-Id: <201001040809.14480.florian@openwrt.org> X-archive-position: 25497 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2222 Content-Length: 688 Lines: 19 Hi David, Le dimanche 3 janvier 2010 21:56:17, David Woodhouse a écrit : > On Sun, 2010-01-03 at 21:17 +0100, Florian Fainelli wrote: > > This patch modifies the physmap-flash driver to include > > the ar7part partition parser in the list of parsers to > > use when a physmap-flash driver is registered. This is > > required for AR7 to create partitions correctly. > > Hrm, perhaps we'd do better to allow the probe types to be specified in > the platform physmap_flash_data? I guess so, will cook a patch which does that. Thanks! -- Best regards, Florian Fainelli Email: florian@openwrt.org Web: http://openwrt.org IRC: [florian] on irc.freenode.net ------------------------------- From wuzhangjin@gmail.com Mon Jan 4 10:17:16 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jan 2010 10:17:20 +0100 (CET) Received: from mail-yx0-f204.google.com ([209.85.210.204]:36824 "EHLO mail-yx0-f204.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492628Ab0ADJRQ (ORCPT ); Mon, 4 Jan 2010 10:17:16 +0100 Received: by yxe42 with SMTP id 42so15199460yxe.22 for ; Mon, 04 Jan 2010 01:17:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer; bh=QJx9WnzhqLxc1oADgwb1wanDr6ZVP1dIYBPTHA5o8js=; b=ZnJry/b17TuEkFgdurTUalK2Bf2Ensnp2tnquYWDi2dbeOQV4+jJp1Sea/jwqLkKJn P6N6H3nMbnKdxKqnms24yYzf/iGV2oSxEjghTiwk9PJqCLUQKhYLfc9MEc6uRaQ1Cdp8 zwwVBiuFWPZNUXMMQ+P+4s9NuyS2WhhKsnXxs= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; b=aKUiJrPt7SH22AQYqML+PazBtvv69gfyYo7fgTTiVbbGHksn4myIZ74c6WEkMue7/8 F8R1WidVVqcSZZn1cf8KDcU60avSTLWh8LAuVgblzQL8Ev27OGuttcrvpP4jUU2LK44i Lj87LDIOuzCEjQiMKQ6a1W2z5Eg7VP9bupdT8= Received: by 10.151.24.13 with SMTP id b13mr34359500ybj.197.1262596629795; Mon, 04 Jan 2010 01:17:09 -0800 (PST) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id 21sm6122077ywh.16.2010.01.04.01.17.04 (version=TLSv1/SSLv3 cipher=RC4-MD5); Mon, 04 Jan 2010 01:17:08 -0800 (PST) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips@linux-mips.org, yanh@lemote.com, huhb@lemote.com, zhangfx@lemote.com, Wu Zhangjin Subject: [PATCH 00/10] Misc updates of Loongson support Date: Mon, 4 Jan 2010 17:16:42 +0800 Message-Id: X-Mailer: git-send-email 1.6.5.6 X-archive-position: 25498 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2259 Content-Length: 4935 Lines: 97 From: Wu Zhangjin This patchset introduces the following changes: o Loongson: Lemote-2F: Get the machine type from PMON_VER Allows the users of the old lemote 2f family machines to run the latest kernel without passing the machtype= kernel command line. o Loongson: Lemote-2F: USB: Not Emulate Non-Posted Writes When copying large amounts of data between usb devices and hard disk, the usb device will disconnect, this patch fixes it. o Loongson: Convert loongson_halt() to use unreachable() Use unreachable() instead of "while(1);" o Loongson: Remove the serial port output of compressed kernel support The compressed kernel support is stable enough for loongson, no need to print debug info, which will save several bytes and speedup the booting a little. o Misc Cleanups Loongson: Move prom_argc and prom_argv into prom_init_cmdline() Loongson: Cleanup of the environment variables Loongson: arch/mips/Makefile: add missing whitespace Loongson: mem.c: Fixup of the indentation o Loongson: Change the Email address of Wu Zhangjin my old Email address wuzj@lemote.com is not usable, use wuzhangjin@gmail.com instead. o Loongson: Lemote-2F: update defconfig Update the defconfig for the latest kernel supports Best Regards, Wu Zhangjin Wu Zhangjin (10): Loongson: Lemote-2F: Get the machine type from PMON_VER Loongson: Lemote-2F: USB: Not Emulate Non-Posted Writes Loongson: Convert loongson_halt() to use unreachable() Loongson: Remove the serial port output of compressed kernel support Loongson: Move prom_argc and prom_argv into prom_init_cmdline() Loongson: Cleanup of the environment variables Loongson: arch/mips/Makefile: add missing whitespace Loongson: mem.c: Fixup of the indentation Loongson: Change the Email address of Wu Zhangjin Loongson: Lemote-2F: update defconfig arch/mips/Kconfig | 2 +- arch/mips/Makefile | 6 +- arch/mips/boot/compressed/Makefile | 2 +- arch/mips/boot/compressed/decompress.c | 4 +- arch/mips/configs/lemote2f_defconfig | 964 ++++++++++++++------ arch/mips/include/asm/ftrace.h | 2 +- .../asm/mach-loongson/cpu-feature-overrides.h | 2 +- .../include/asm/mach-loongson/cs5536/cs5536_vsm.h | 2 +- arch/mips/include/asm/mach-loongson/loongson.h | 5 +- arch/mips/include/asm/mach-loongson/machine.h | 4 +- arch/mips/include/asm/mach-loongson/mem.h | 2 +- arch/mips/include/asm/mach-loongson/pci.h | 13 +- arch/mips/kernel/ftrace.c | 2 +- arch/mips/kernel/mcount.S | 2 +- arch/mips/loongson/common/cmdline.c | 9 +- arch/mips/loongson/common/cs5536/cs5536_acc.c | 2 +- arch/mips/loongson/common/cs5536/cs5536_ehci.c | 2 +- arch/mips/loongson/common/cs5536/cs5536_ide.c | 2 +- arch/mips/loongson/common/cs5536/cs5536_isa.c | 2 +- arch/mips/loongson/common/cs5536/cs5536_mfgpt.c | 2 +- arch/mips/loongson/common/cs5536/cs5536_ohci.c | 2 +- arch/mips/loongson/common/cs5536/cs5536_pci.c | 2 +- arch/mips/loongson/common/early_printk.c | 2 +- arch/mips/loongson/common/env.c | 29 +- arch/mips/loongson/common/init.c | 2 +- arch/mips/loongson/common/machtype.c | 12 +- arch/mips/loongson/common/mem.c | 7 +- arch/mips/loongson/common/platform.c | 2 +- arch/mips/loongson/common/pm.c | 2 +- arch/mips/loongson/common/reset.c | 7 +- arch/mips/loongson/common/serial.c | 2 +- arch/mips/loongson/common/time.c | 4 +- arch/mips/loongson/common/uart_base.c | 2 +- arch/mips/loongson/fuloong-2e/reset.c | 4 +- arch/mips/loongson/lemote-2f/Makefile | 1 + arch/mips/loongson/lemote-2f/machtype.c | 45 + arch/mips/loongson/lemote-2f/pm.c | 2 +- arch/mips/loongson/lemote-2f/reset.c | 2 +- arch/mips/oprofile/op_model_loongson2.c | 2 +- arch/mips/pci/fixup-lemote2f.c | 2 +- arch/mips/pci/ops-loongson2.c | 4 +- arch/mips/power/cpu.c | 4 +- arch/mips/power/hibernate.S | 4 +- drivers/staging/sm7xx/smtc2d.c | 2 +- drivers/staging/sm7xx/smtc2d.h | 2 +- drivers/staging/sm7xx/smtcfb.c | 2 +- drivers/staging/sm7xx/smtcfb.h | 2 +- 47 files changed, 807 insertions(+), 377 deletions(-) create mode 100644 arch/mips/loongson/lemote-2f/machtype.c From wuzhangjin@gmail.com Mon Jan 4 10:17:30 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jan 2010 10:17:45 +0100 (CET) Received: from mail-yw0-f182.google.com ([209.85.211.182]:60952 "EHLO mail-yw0-f182.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493167Ab0ADJRa (ORCPT ); Mon, 4 Jan 2010 10:17:30 +0100 Received: by ywh12 with SMTP id 12so15942361ywh.21 for ; Mon, 04 Jan 2010 01:17:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:in-reply-to:references; bh=NdxxoCGiXy8NAIyTCaMqSPt0YOmU89Q7iPwtSBH1NaU=; b=InWL0ano7UhIGXjN+pEvEFD8ZHJ8WQI7zcmXb7NpWOLD1qv8JCqns94Bl+gsMqN9a9 UrCviFS0RwqtDtHAG4MnOXUIhEnA1D1M1bhX4teDGdyAW+VIXIH6E3QpQeHPfZbW29Ju Ps/65hK8dVh38cwFUm61WvqFy6vzlS1VEHh3c= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=GG/mIKKqCEK+WAn1JDotOW/DVnM3LH42PHFPVnJrv8YKDjm5wtvYVuDqQQB2Hle/F0 UKLTYYfUpS6QkcOGWGgchmba0tXmWrLTqJ4rfdujYGfnRg/gStzpxLTV154Wzw+Y/IP3 dQV6rWOJ4CivNIn3Rwvi1whOqaTEq7xhDaPYI= Received: by 10.150.104.11 with SMTP id b11mr2562011ybc.235.1262596643451; Mon, 04 Jan 2010 01:17:23 -0800 (PST) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id 21sm6122077ywh.16.2010.01.04.01.17.16 (version=TLSv1/SSLv3 cipher=RC4-MD5); Mon, 04 Jan 2010 01:17:21 -0800 (PST) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips@linux-mips.org, yanh@lemote.com, huhb@lemote.com, zhangfx@lemote.com, Wu Zhangjin Subject: [PATCH 01/10] Loongson: Lemote-2F: Get the machine type from PMON_VER Date: Mon, 4 Jan 2010 17:16:43 +0800 Message-Id: X-Mailer: git-send-email 1.6.5.6 In-Reply-To: References: In-Reply-To: References: X-archive-position: 25499 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2260 Content-Length: 4041 Lines: 123 From: Wu Zhangjin Lemote have used the PMON_VER strings to indicate the loongson-2f machine series: PMON_VER=LM8089 Lemote 8.9'' netbook LM8101 Lemote 10.1'' netbook (The above two netbooks have the same kernel support) LM6XXX Lemote FuLoong(2F) box series LM9XXX Lemote LynLoong PC series Before the machtype is supported by the PMON, we can get the machine type from the PMON_VER for these machines, this will help the users a lot. Signed-off-by: Wu Zhangjin --- arch/mips/loongson/common/machtype.c | 10 +++++- arch/mips/loongson/lemote-2f/Makefile | 1 + arch/mips/loongson/lemote-2f/machtype.c | 45 +++++++++++++++++++++++++++++++ 3 files changed, 54 insertions(+), 2 deletions(-) create mode 100644 arch/mips/loongson/lemote-2f/machtype.c diff --git a/arch/mips/loongson/common/machtype.c b/arch/mips/loongson/common/machtype.c index 0ed52b3..3799098 100644 --- a/arch/mips/loongson/common/machtype.c +++ b/arch/mips/loongson/common/machtype.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology + * Copyright (C) 2009 Lemote Inc. * Author: Wu Zhangjin, wuzj@lemote.com * * Copyright (c) 2009 Zhang Le @@ -35,6 +35,10 @@ const char *get_system_type(void) return system_types[mips_machtype]; } +void __weak __init mach_prom_init_machtype(void) +{ +} + void __init prom_init_machtype(void) { char *p, str[MACHTYPE_LEN]; @@ -43,8 +47,10 @@ void __init prom_init_machtype(void) mips_machtype = LOONGSON_MACHTYPE; p = strstr(arcs_cmdline, "machtype="); - if (!p) + if (!p) { + mach_prom_init_machtype(); return; + } p += strlen("machtype="); strncpy(str, p, MACHTYPE_LEN); p = strstr(str, " "); diff --git a/arch/mips/loongson/lemote-2f/Makefile b/arch/mips/loongson/lemote-2f/Makefile index 4d84b27..01f71b1 100644 --- a/arch/mips/loongson/lemote-2f/Makefile +++ b/arch/mips/loongson/lemote-2f/Makefile @@ -3,6 +3,7 @@ # obj-y += irq.o reset.o ec_kb3310b.o +obj-y += machtype.o irq.o reset.o ec_kb3310b.o # # Suspend Support diff --git a/arch/mips/loongson/lemote-2f/machtype.c b/arch/mips/loongson/lemote-2f/machtype.c new file mode 100644 index 0000000..610f431 --- /dev/null +++ b/arch/mips/loongson/lemote-2f/machtype.c @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2009 Lemote Inc. + * Author: Wu Zhangjin, wuzj@lemote.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#include + +#include + +void __init mach_prom_init_machtype(void) +{ + /* We share the same kernel image file among Lemote 2F family + * of machines, and provide the machtype= kernel command line + * to users to indicate their machine, this command line will + * be passed by the latest PMON automatically. and fortunately, + * up to now, we can get the machine type from the PMON_VER= + * commandline directly except the NAS machine, In the old + * machines, this will help the users a lot. + * + * If no "machtype=" passed, get machine type from "PMON_VER=". + * PMON_VER=LM8089 Lemote 8.9'' netbook + * LM8101 Lemote 10.1'' netbook + * (The above two netbooks have the same kernel support) + * LM6XXX Lemote FuLoong(2F) box series + * LM9XXX Lemote LynLoong PC series + */ + if (strstr(arcs_cmdline, "PMON_VER=LM")) { + if (strstr(arcs_cmdline, "PMON_VER=LM8")) + mips_machtype = MACH_LEMOTE_YL2F89; + else if (strstr(arcs_cmdline, "PMON_VER=LM6")) + mips_machtype = MACH_LEMOTE_FL2F; + else if (strstr(arcs_cmdline, "PMON_VER=LM9")) + mips_machtype = MACH_LEMOTE_LL2F; + else + mips_machtype = MACH_LEMOTE_NAS; + + strcat(arcs_cmdline, " machtype="); + strcat(arcs_cmdline, get_system_type()); + strcat(arcs_cmdline, " "); + } +} -- 1.6.5.6 From wuzhangjin@gmail.com Mon Jan 4 10:17:33 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jan 2010 10:18:10 +0100 (CET) Received: from mail-yx0-f204.google.com ([209.85.210.204]:36824 "EHLO mail-yx0-f204.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493169Ab0ADJRd (ORCPT ); Mon, 4 Jan 2010 10:17:33 +0100 Received: by mail-yx0-f204.google.com with SMTP id 42so15199460yxe.22 for ; Mon, 04 Jan 2010 01:17:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:in-reply-to:references; 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Signed-off-by: Hu Hongbing Signed-off-by: Wu Zhangjin --- arch/mips/pci/fixup-lemote2f.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/mips/pci/fixup-lemote2f.c b/arch/mips/pci/fixup-lemote2f.c index caf2ede..4b9768d 100644 --- a/arch/mips/pci/fixup-lemote2f.c +++ b/arch/mips/pci/fixup-lemote2f.c @@ -131,7 +131,7 @@ static void __init loongson_cs5536_ehci_fixup(struct pci_dev *pdev) /* Serial short detect enable */ _rdmsr(USB_MSR_REG(USB_CONFIG), &hi, &lo); - _wrmsr(USB_MSR_REG(USB_CONFIG), (1 << 1) | (1 << 2) | (1 << 3), lo); + _wrmsr(USB_MSR_REG(USB_CONFIG), (1 << 1) | (1 << 3), lo); /* setting the USB2.0 micro frame length */ pci_write_config_dword(pdev, PCI_EHCI_FLADJ_REG, 0x2000); -- 1.6.5.6 From wuzhangjin@gmail.com Mon Jan 4 10:17:39 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jan 2010 10:18:34 +0100 (CET) Received: from mail-yw0-f182.google.com ([209.85.211.182]:60952 "EHLO mail-yw0-f182.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492628Ab0ADJRj (ORCPT ); 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Mon, 04 Jan 2010 01:17:36 -0800 (PST) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips@linux-mips.org, yanh@lemote.com, huhb@lemote.com, zhangfx@lemote.com, Wu Zhangjin Subject: [PATCH 03/10] Loongson: Convert loongson_halt() to use unreachable() Date: Mon, 4 Jan 2010 17:16:45 +0800 Message-Id: <9bcc0f00c46fdf5c832ce3bdd0df8d7f08b7a1be.1262596493.git.wuzhangjin@gmail.com> X-Mailer: git-send-email 1.6.5.6 In-Reply-To: <669ff2f39fd2aa3849e472438d3d9d499c8f0e3a.1262596493.git.wuzhangjin@gmail.com> References: <669ff2f39fd2aa3849e472438d3d9d499c8f0e3a.1262596493.git.wuzhangjin@gmail.com> In-Reply-To: References: X-archive-position: 25501 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2262 Content-Length: 977 Lines: 35 From: Wu Zhangjin Use the new unreachable() macro instead of while(1); Signed-off-by: Wu Zhangjin --- arch/mips/loongson/common/reset.c | 5 ++--- 1 files changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/mips/loongson/common/reset.c b/arch/mips/loongson/common/reset.c index d57f171..5833f9f 100644 --- a/arch/mips/loongson/common/reset.c +++ b/arch/mips/loongson/common/reset.c @@ -6,7 +6,7 @@ * * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology * Author: Fuxin Zhang, zhangfx@lemote.com - * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology + * Copyright (C) 2009 Lemote, Inc. * Author: Zhangjin Wu, wuzj@lemote.com */ #include @@ -28,8 +28,7 @@ static void loongson_restart(char *command) static void loongson_halt(void) { mach_prepare_shutdown(); - while (1) - ; + unreachable(); } static int __init mips_reboot_setup(void) -- 1.6.5.6 From wuzhangjin@gmail.com Mon Jan 4 10:17:43 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jan 2010 10:18:58 +0100 (CET) Received: from mail-yx0-f204.google.com ([209.85.210.204]:36824 "EHLO mail-yx0-f204.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493168Ab0ADJRn (ORCPT ); Mon, 4 Jan 2010 10:17:43 +0100 Received: by mail-yx0-f204.google.com with SMTP id 42so15199460yxe.22 for ; Mon, 04 Jan 2010 01:17:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:in-reply-to:references; bh=JU8BzTDgfWyAi5eo+baBKeYKxY81e7TLIGMcpWfMcUM=; b=BiCC0nvrCSCJ5uq7ruVYBDago1VyPtbdjgXyFNcfRK94seHua9DbtxtEd64u2jmyiY HyIwW4K3NAkEoZDzoeF/67ALAvLjFInJvxPrrr11NItt2m5hAjNL0BZGreI26ZgQi3Fa u6FuYCRW+4WRv8LFmNqqwJTlOpZkttMnB16a4= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=iUO2us4jlGmm2n4FVrUasthlYxAesnkkm6oSqdBrD3YhQT3kRwEAMj895jinTXAGrI irNMSEGpw3Wksk2LjnT+3zUiSuiG6Td4lD2KleB54P8OjbLxh6H7FD9hgAaTiUHE8dRQ 6Nyad3P5AK5DBDJ6cMV+baYLjbsQzxm7C+Eus= Received: by 10.101.182.20 with SMTP id j20mr36168429anp.65.1262596662485; Mon, 04 Jan 2010 01:17:42 -0800 (PST) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id 21sm6122077ywh.16.2010.01.04.01.17.37 (version=TLSv1/SSLv3 cipher=RC4-MD5); Mon, 04 Jan 2010 01:17:41 -0800 (PST) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips@linux-mips.org, yanh@lemote.com, huhb@lemote.com, zhangfx@lemote.com, Wu Zhangjin Subject: [PATCH 04/10] Loongson: Remove the serial port output of compressed kernel support Date: Mon, 4 Jan 2010 17:16:46 +0800 Message-Id: X-Mailer: git-send-email 1.6.5.6 In-Reply-To: <9bcc0f00c46fdf5c832ce3bdd0df8d7f08b7a1be.1262596493.git.wuzhangjin@gmail.com> References: <669ff2f39fd2aa3849e472438d3d9d499c8f0e3a.1262596493.git.wuzhangjin@gmail.com> <9bcc0f00c46fdf5c832ce3bdd0df8d7f08b7a1be.1262596493.git.wuzhangjin@gmail.com> In-Reply-To: References: X-archive-position: 25502 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2263 Content-Length: 781 Lines: 28 From: Wu Zhangjin The compressed kernel support on loongson family machines is stable now, so, remove the debug information via using SYS_SUPPORTS_ZBOOT instead of SYS_SUPPORTS_ZBOOT_UART16550. This may reduce the image size and speedup the booting. Signed-off-by: Wu Zhangjin --- arch/mips/Kconfig | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 9541171..e09ff2e 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -180,7 +180,7 @@ config LASAT config MACH_LOONGSON bool "Loongson family of machines" - select SYS_SUPPORTS_ZBOOT_UART16550 + select SYS_SUPPORTS_ZBOOT help This enables the support of Loongson family of machines. -- 1.6.5.6 From wuzhangjin@gmail.com Mon Jan 4 10:17:48 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jan 2010 10:19:21 +0100 (CET) Received: from mail-yx0-f204.google.com ([209.85.210.204]:36824 "EHLO mail-yx0-f204.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493171Ab0ADJRs (ORCPT ); Mon, 4 Jan 2010 10:17:48 +0100 Received: by mail-yx0-f204.google.com with SMTP id 42so15199460yxe.22 for ; Mon, 04 Jan 2010 01:17:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:in-reply-to:references; bh=GS0exdFuxNKa8hWu/444H55EVRz3Q5FgpimvJihM/AY=; b=eKAVIpfxLV0xS6QX8e8m7q7U/xcOYPa746J152Soi5zpYhIWHfEfJXmaJ0oTr3paP5 v27VyrUY9xTHBLg1aPHl5UvmNlrCvPYvdQiPMSxwhADQii8ktvstMa1yerjP+ZRHPiVy E1UBjBLn9zadS5rp9Ak7d2EtvsNs/cVIPgQ1Q= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=Mlidzwc8IZWbIr3kbb0QH1tnwxZGMLcy8gjCSuFxQ2aPEc2LghhCxL+pdmSVHR3Ia4 T9OQ3DpQnB6Rav8BdFaQzQ+Kgi8Im1fZ3/y5kGUTs5C4ttQXLRXPrakQeRnNtScM58wy J93J8uJX/p6ESTD/XqBZfGswxGsigQtOAfTFE= Received: by 10.101.165.30 with SMTP id s30mr36116288ano.77.1262596667556; Mon, 04 Jan 2010 01:17:47 -0800 (PST) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id 21sm6122077ywh.16.2010.01.04.01.17.42 (version=TLSv1/SSLv3 cipher=RC4-MD5); Mon, 04 Jan 2010 01:17:46 -0800 (PST) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips@linux-mips.org, yanh@lemote.com, huhb@lemote.com, zhangfx@lemote.com, Wu Zhangjin Subject: [PATCH 05/10] Loongson: Move prom_argc and prom_argv into prom_init_cmdline() Date: Mon, 4 Jan 2010 17:16:47 +0800 Message-Id: X-Mailer: git-send-email 1.6.5.6 In-Reply-To: References: <669ff2f39fd2aa3849e472438d3d9d499c8f0e3a.1262596493.git.wuzhangjin@gmail.com> <9bcc0f00c46fdf5c832ce3bdd0df8d7f08b7a1be.1262596493.git.wuzhangjin@gmail.com> In-Reply-To: References: X-archive-position: 25503 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2264 Content-Length: 780 Lines: 33 From: Wu Zhangjin prom_argc and prom_argv are only used by prom_init_cmdline(), move them into the function. Signed-off-by: Wu Zhangjin --- arch/mips/loongson/common/cmdline.c | 7 +++---- 1 files changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/mips/loongson/common/cmdline.c b/arch/mips/loongson/common/cmdline.c index 7ad47f2..9e32837 100644 --- a/arch/mips/loongson/common/cmdline.c +++ b/arch/mips/loongson/common/cmdline.c @@ -21,12 +21,11 @@ #include -int prom_argc; -/* pmon passes arguments in 32bit pointers */ -int *_prom_argv; - void __init prom_init_cmdline(void) { + int prom_argc; + /* pmon passes arguments in 32bit pointers */ + int *_prom_argv; int i; long l; -- 1.6.5.6 From wuzhangjin@gmail.com Mon Jan 4 10:17:53 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jan 2010 10:19:46 +0100 (CET) Received: from mail-yx0-f204.google.com ([209.85.210.204]:36824 "EHLO mail-yx0-f204.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493172Ab0ADJRx (ORCPT ); Mon, 4 Jan 2010 10:17:53 +0100 Received: by mail-yx0-f204.google.com with SMTP id 42so15199460yxe.22 for ; Mon, 04 Jan 2010 01:17:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:in-reply-to:references; bh=/GDT4oLVqAd9em5E/uCa+drrQdHKGC1VxyoT6m3Brls=; b=X1PCA6uqVJeLcOZozxg0H3DUmuOikCwJFZyXepXpZ/nj5sTdAte873ASa1YmbKZaQN OCVSg0+MMsp/EIULdlNOKjM32D0VsgaQTIakd2flipVcFk68RpT4HNCQOq+0OE70Dv1k h2XW7yQ4MGGrs5cZ+ZDTP62gky4zXTR3TZSck= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=XfeweROgfMMWsWRd9o3pGODsMPg++mgqxIAEf7pK2pq0RV6G5unYkwzsDB0QOHoNJs pr0bbSORl6/DMsWnacq55QvD3QcLFddA1rqzmK+KLQ6zJut2FWk6lhWl5zqhGk2xWbSo ws0UApGlcmyuevssiHa4fHZDrRrf40qXutZko= Received: by 10.101.10.15 with SMTP id n15mr10667569ani.82.1262596672588; Mon, 04 Jan 2010 01:17:52 -0800 (PST) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id 21sm6122077ywh.16.2010.01.04.01.17.47 (version=TLSv1/SSLv3 cipher=RC4-MD5); Mon, 04 Jan 2010 01:17:51 -0800 (PST) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips@linux-mips.org, yanh@lemote.com, huhb@lemote.com, zhangfx@lemote.com, Wu Zhangjin Subject: [PATCH 06/10] Loongson: Cleanup of the environment variables Date: Mon, 4 Jan 2010 17:16:48 +0800 Message-Id: X-Mailer: git-send-email 1.6.5.6 In-Reply-To: References: <669ff2f39fd2aa3849e472438d3d9d499c8f0e3a.1262596493.git.wuzhangjin@gmail.com> <9bcc0f00c46fdf5c832ce3bdd0df8d7f08b7a1be.1262596493.git.wuzhangjin@gmail.com> In-Reply-To: References: X-archive-position: 25504 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2266 Content-Length: 2524 Lines: 84 From: Wu Zhangjin Changes: o Move bus_clock into prom_init_env() o Initialize the cpu_clock_freq to the default values for the correspoding processor revisions if no such environment variable passed by BIOS/Bootloader. Signed-off-by: Wu Zhangjin --- arch/mips/include/asm/mach-loongson/loongson.h | 2 +- arch/mips/loongson/common/env.c | 25 ++++++++++++++++++++--- 2 files changed, 22 insertions(+), 5 deletions(-) diff --git a/arch/mips/include/asm/mach-loongson/loongson.h b/arch/mips/include/asm/mach-loongson/loongson.h index ee8bc83..a6eac0f 100644 --- a/arch/mips/include/asm/mach-loongson/loongson.h +++ b/arch/mips/include/asm/mach-loongson/loongson.h @@ -23,7 +23,7 @@ extern void mach_prepare_reboot(void); extern void mach_prepare_shutdown(void); /* environment arguments from bootloader */ -extern unsigned long bus_clock, cpu_clock_freq; +extern unsigned long cpu_clock_freq; extern unsigned long memsize, highmemsize; /* loongson-specific command line, env and memory initialization */ diff --git a/arch/mips/loongson/common/env.c b/arch/mips/loongson/common/env.c index 196d947..8c01df5 100644 --- a/arch/mips/loongson/common/env.c +++ b/arch/mips/loongson/common/env.c @@ -23,13 +23,10 @@ #include -unsigned long bus_clock, cpu_clock_freq; +unsigned long cpu_clock_freq; EXPORT_SYMBOL(cpu_clock_freq); unsigned long memsize, highmemsize; -/* pmon passes arguments in 32bit pointers */ -int *_prom_envp; - #define parse_even_earlier(res, option, p) \ do { \ if (strncmp(option, (char *)p, strlen(option)) == 0) \ @@ -39,6 +36,10 @@ do { \ void __init prom_init_env(void) { + /* pmon passes arguments in 32bit pointers */ + int *_prom_envp; + unsigned long bus_clock; + unsigned int processor_id; long l; /* firmware arguments are initialized in head.S */ @@ -55,6 +56,22 @@ void __init prom_init_env(void) } if (memsize == 0) memsize = 256; + if (bus_clock == 0) + bus_clock = 66000000; + if (cpu_clock_freq == 0) { + processor_id = (¤t_cpu_data)->processor_id; + switch (processor_id & PRID_REV_MASK) { + case PRID_REV_LOONGSON2E: + cpu_clock_freq = 533080000; + break; + case PRID_REV_LOONGSON2F: + cpu_clock_freq = 797000000; + break; + default: + cpu_clock_freq = 100000000; + break; + } + } pr_info("busclock=%ld, cpuclock=%ld, memsize=%ld, highmemsize=%ld\n", bus_clock, cpu_clock_freq, memsize, highmemsize); -- 1.6.5.6 From wuzhangjin@gmail.com Mon Jan 4 10:18:01 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jan 2010 10:20:10 +0100 (CET) Received: from mail-yw0-f182.google.com ([209.85.211.182]:60952 "EHLO mail-yw0-f182.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493173Ab0ADJSB (ORCPT ); Mon, 4 Jan 2010 10:18:01 +0100 Received: by mail-yw0-f182.google.com with SMTP id 12so15942361ywh.21 for ; Mon, 04 Jan 2010 01:18:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:in-reply-to:references; bh=GRqDoCpDCwH69EypbL8KasyZtuCMTiOexd+BSc5DuhQ=; b=i3lBkamVCDR4vopuVtXXEEON8Ws9b5PLCAhA/xitlAjsTyUFdYGGSTLoVWUF0b9j+h JZ2F+zH1g8nY2HyH3PAfo+ldExDFVPi+UYCQ529GBPkXejFZDEcTShcP8Q3sDqYxaZcu VqmXeF0+z5GJfqj15EZB4b0KB/CGTG4RWzlWE= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=uAuOoYHaAKrBTghtu4ttlqXAy/6Gt+Lk1VzDXLqt+/bs3yPwZdaSzWErvfvHzCc3RZ HR3H5JgYCX8VRt6qBpWVNB6eUtIZHZ75usaSoAAyLO+INIO8+fqx1OE8sgG7hqRpWZkV IFSr/x/iaxp0em7n0/9DY+gI66bMie6I5w3Qs= Received: by 10.151.89.37 with SMTP id r37mr8097801ybl.329.1262596680646; Mon, 04 Jan 2010 01:18:00 -0800 (PST) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id 21sm6122077ywh.16.2010.01.04.01.17.53 (version=TLSv1/SSLv3 cipher=RC4-MD5); Mon, 04 Jan 2010 01:17:57 -0800 (PST) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips@linux-mips.org, yanh@lemote.com, huhb@lemote.com, zhangfx@lemote.com, Wu Zhangjin Subject: [PATCH 07/10] Loongson: arch/mips/Makefile: add missing whitespace Date: Mon, 4 Jan 2010 17:16:49 +0800 Message-Id: <0340ef8c9de1f84261bac07c74f435f719eaa65d.1262596493.git.wuzhangjin@gmail.com> X-Mailer: git-send-email 1.6.5.6 In-Reply-To: References: <669ff2f39fd2aa3849e472438d3d9d499c8f0e3a.1262596493.git.wuzhangjin@gmail.com> <9bcc0f00c46fdf5c832ce3bdd0df8d7f08b7a1be.1262596493.git.wuzhangjin@gmail.com> In-Reply-To: References: X-archive-position: 25505 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2267 Content-Length: 992 Lines: 32 From: Wu Zhangjin This patch add missing whitespace after every "+=" in the loongson related part of arch/mips/Makefile. Signed-off-by: Wu Zhangjin --- arch/mips/Makefile | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 1893efd..51d344c 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -332,11 +332,11 @@ load-$(CONFIG_WR_PPMC) += 0xffffffff80100000 # # Loongson family # -core-$(CONFIG_MACH_LOONGSON) +=arch/mips/loongson/ +core-$(CONFIG_MACH_LOONGSON) += arch/mips/loongson/ cflags-$(CONFIG_MACH_LOONGSON) += -I$(srctree)/arch/mips/include/asm/mach-loongson \ -mno-branch-likely -load-$(CONFIG_LEMOTE_FULOONG2E) +=0xffffffff80100000 -load-$(CONFIG_LEMOTE_MACH2F) +=0xffffffff80200000 +load-$(CONFIG_LEMOTE_FULOONG2E) += 0xffffffff80100000 +load-$(CONFIG_LEMOTE_MACH2F) += 0xffffffff80200000 # # MIPS Malta board -- 1.6.5.6 From wuzhangjin@gmail.com Mon Jan 4 10:18:10 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jan 2010 10:20:37 +0100 (CET) Received: from mail-yx0-f204.google.com ([209.85.210.204]:36824 "EHLO mail-yx0-f204.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493167Ab0ADJSK (ORCPT ); Mon, 4 Jan 2010 10:18:10 +0100 Received: by mail-yx0-f204.google.com with SMTP id 42so15199460yxe.22 for ; Mon, 04 Jan 2010 01:18:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:in-reply-to:references; bh=Zvmb3HA93LjVboy1ExyQeXKQ1eRn83lEdypH7uc7HBM=; b=PQH83q7ZxTj67X5iNTy7zQE81lMWiP8MbKEzAdQG4fKJWSJ5VTlPwX9s/J/TimLZgf U2LC45e73Ku0aX34cFLMs1OowPyHywgsSgIU2BCaWyo8ROopRnl6jvHuzpLiRrUsE/tn KX8s0BUsDjOjtsH2Ghqsw5JLymUBTM9EHM/Y0= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=jitj2nphlmct631+78ndpNx43l1ab0F90TN/wbut+wm8hTO3sXsUnyVrlG573O5WGe QyuK9wZ7T+V85ty83gBxHXl8x9nSB0gtjmatLkynJjUDEr9TTrcGrpq0/JIeerhC36s9 0SpCVIY0+tceIr6BXp+uTqcn+jMycTTza6CQk= Received: by 10.91.50.3 with SMTP id c3mr10970427agk.71.1262596689877; Mon, 04 Jan 2010 01:18:09 -0800 (PST) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id 21sm6122077ywh.16.2010.01.04.01.18.01 (version=TLSv1/SSLv3 cipher=RC4-MD5); Mon, 04 Jan 2010 01:18:05 -0800 (PST) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips@linux-mips.org, yanh@lemote.com, huhb@lemote.com, zhangfx@lemote.com, Wu Zhangjin Subject: [PATCH 08/10] Loongson: mem.c: Fixup of the indentation Date: Mon, 4 Jan 2010 17:16:50 +0800 Message-Id: X-Mailer: git-send-email 1.6.5.6 In-Reply-To: <0340ef8c9de1f84261bac07c74f435f719eaa65d.1262596493.git.wuzhangjin@gmail.com> References: <669ff2f39fd2aa3849e472438d3d9d499c8f0e3a.1262596493.git.wuzhangjin@gmail.com> <9bcc0f00c46fdf5c832ce3bdd0df8d7f08b7a1be.1262596493.git.wuzhangjin@gmail.com> <0340ef8c9de1f84261bac07c74f435f719eaa65d.1262596493.git.wuzhangjin@gmail.com> In-Reply-To: References: X-archive-position: 25506 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2268 Content-Length: 874 Lines: 31 From: Wu Zhangjin Replace the whitespaces by TABs. Signed-off-by: Wu Zhangjin --- arch/mips/loongson/common/mem.c | 7 ++++--- 1 files changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/mips/loongson/common/mem.c b/arch/mips/loongson/common/mem.c index ceacd09..ec2f796 100644 --- a/arch/mips/loongson/common/mem.c +++ b/arch/mips/loongson/common/mem.c @@ -16,10 +16,11 @@ void __init prom_init_memory(void) { - add_memory_region(0x0, (memsize << 20), BOOT_MEM_RAM); + add_memory_region(0x0, (memsize << 20), BOOT_MEM_RAM); + + add_memory_region(memsize << 20, LOONGSON_PCI_MEM_START - (memsize << + 20), BOOT_MEM_RESERVED); - add_memory_region(memsize << 20, LOONGSON_PCI_MEM_START - (memsize << - 20), BOOT_MEM_RESERVED); #ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG { int bit; -- 1.6.5.6 From wuzhangjin@gmail.com Mon Jan 4 10:18:17 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jan 2010 10:21:02 +0100 (CET) Received: from mail-yw0-f182.google.com ([209.85.211.182]:60952 "EHLO mail-yw0-f182.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493175Ab0ADJSR (ORCPT ); Mon, 4 Jan 2010 10:18:17 +0100 Received: by mail-yw0-f182.google.com with SMTP id 12so15942361ywh.21 for ; Mon, 04 Jan 2010 01:18:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:in-reply-to:references; bh=z875z+DDrW3DiHp2uLuyd/ZLP37LaoqyclvkwinhSjk=; b=k8Db7+mfpyyf6lGH1yPEpWm7DLdaEifR9ElCdAgON9GgJwgx7KUugtJ6OYzVrD0tE6 hXStyjkyV3i+w5Ayx79H3fafAmQTVxyZzADtowvlFoiHoqVuqctdFtjV/JPW9xtznga0 iuKwAhV/2N0s6CgUYR/OEWeh3X3c1ABHnf4Vg= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=TAQu6CmqsLkH7ccYejnGqY5ZYvtJcyntka2MUMxmxa8RF2zL6N/Pp0xKh1Sf4ri34f PlMzJTnyjqZL1BHC+2Pflz22WR/uwuyIY3Do/AD2pkss4qeqlwSzXXXeOVor8bZWr6ZO TQeip1e3w+pSAEf7T4sbKiTCgHslFAJvjpmHU= Received: by 10.100.56.12 with SMTP id e12mr9691102ana.106.1262596696330; Mon, 04 Jan 2010 01:18:16 -0800 (PST) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id 21sm6122077ywh.16.2010.01.04.01.18.10 (version=TLSv1/SSLv3 cipher=RC4-MD5); Mon, 04 Jan 2010 01:18:15 -0800 (PST) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips@linux-mips.org, yanh@lemote.com, huhb@lemote.com, zhangfx@lemote.com, Wu Zhangjin Subject: [PATCH 09/10] Loongson: Change the Email address of Wu Zhangjin Date: Mon, 4 Jan 2010 17:16:51 +0800 Message-Id: <0e20c65b9bd040888cfc95401a5a84245e1e92de.1262596493.git.wuzhangjin@gmail.com> X-Mailer: git-send-email 1.6.5.6 In-Reply-To: References: <669ff2f39fd2aa3849e472438d3d9d499c8f0e3a.1262596493.git.wuzhangjin@gmail.com> <9bcc0f00c46fdf5c832ce3bdd0df8d7f08b7a1be.1262596493.git.wuzhangjin@gmail.com> <0340ef8c9de1f84261bac07c74f435f719eaa65d.1262596493.git.wuzhangjin@gmail.com> In-Reply-To: References: X-archive-position: 25507 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2270 Content-Length: 25969 Lines: 621 From: Wu Zhangjin Currently, The Email address wuzj@lemote.com is not usable, Change it by wuzhangjin@gmail.com. Signed-off-by: Wu Zhangjin --- arch/mips/boot/compressed/Makefile | 2 +- arch/mips/boot/compressed/decompress.c | 4 ++-- arch/mips/include/asm/ftrace.h | 2 +- .../asm/mach-loongson/cpu-feature-overrides.h | 2 +- .../include/asm/mach-loongson/cs5536/cs5536_vsm.h | 2 +- arch/mips/include/asm/mach-loongson/loongson.h | 3 +-- arch/mips/include/asm/mach-loongson/machine.h | 4 ++-- arch/mips/include/asm/mach-loongson/mem.h | 2 +- arch/mips/include/asm/mach-loongson/pci.h | 13 +------------ arch/mips/kernel/ftrace.c | 2 +- arch/mips/kernel/mcount.S | 2 +- arch/mips/loongson/common/cmdline.c | 2 +- arch/mips/loongson/common/cs5536/cs5536_acc.c | 2 +- arch/mips/loongson/common/cs5536/cs5536_ehci.c | 2 +- arch/mips/loongson/common/cs5536/cs5536_ide.c | 2 +- arch/mips/loongson/common/cs5536/cs5536_isa.c | 2 +- arch/mips/loongson/common/cs5536/cs5536_mfgpt.c | 2 +- arch/mips/loongson/common/cs5536/cs5536_ohci.c | 2 +- arch/mips/loongson/common/cs5536/cs5536_pci.c | 2 +- arch/mips/loongson/common/early_printk.c | 2 +- arch/mips/loongson/common/env.c | 4 ++-- arch/mips/loongson/common/init.c | 2 +- arch/mips/loongson/common/machtype.c | 2 +- arch/mips/loongson/common/platform.c | 2 +- arch/mips/loongson/common/pm.c | 2 +- arch/mips/loongson/common/reset.c | 2 +- arch/mips/loongson/common/serial.c | 2 +- arch/mips/loongson/common/time.c | 4 ++-- arch/mips/loongson/common/uart_base.c | 2 +- arch/mips/loongson/fuloong-2e/reset.c | 4 ++-- arch/mips/loongson/lemote-2f/machtype.c | 2 +- arch/mips/loongson/lemote-2f/pm.c | 2 +- arch/mips/loongson/lemote-2f/reset.c | 2 +- arch/mips/oprofile/op_model_loongson2.c | 2 +- arch/mips/pci/ops-loongson2.c | 4 +--- arch/mips/power/cpu.c | 4 ++-- arch/mips/power/hibernate.S | 4 ++-- drivers/staging/sm7xx/smtc2d.c | 2 +- drivers/staging/sm7xx/smtc2d.h | 2 +- drivers/staging/sm7xx/smtcfb.c | 2 +- drivers/staging/sm7xx/smtcfb.h | 2 +- 41 files changed, 48 insertions(+), 62 deletions(-) diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile index e27f40b..2a768c6 100644 --- a/arch/mips/boot/compressed/Makefile +++ b/arch/mips/boot/compressed/Makefile @@ -9,7 +9,7 @@ # modified by Cort (cort@cs.nmt.edu) # # Copyright (C) 2009 Lemote Inc. & DSLab, Lanzhou University -# Author: Wu Zhangjin +# Author: Wu Zhangjin # # compressed kernel load addr: VMLINUZ_LOAD_ADDRESS > VMLINUX_LOAD_ADDRESS + VMLINUX_SIZE diff --git a/arch/mips/boot/compressed/decompress.c b/arch/mips/boot/compressed/decompress.c index 67330c2..9125138 100644 --- a/arch/mips/boot/compressed/decompress.c +++ b/arch/mips/boot/compressed/decompress.c @@ -5,8 +5,8 @@ * Author: Matt Porter Derived from * arch/ppc/boot/prep/misc.c * - * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology - * Author: Wu Zhangjin + * Copyright (C) 2009 Lemote, Inc. + * Author: Wu Zhangjin * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/arch/mips/include/asm/ftrace.h b/arch/mips/include/asm/ftrace.h index 3986cd8..ce35c9a 100644 --- a/arch/mips/include/asm/ftrace.h +++ b/arch/mips/include/asm/ftrace.h @@ -4,7 +4,7 @@ * more details. * * Copyright (C) 2009 DSLab, Lanzhou University, China - * Author: Wu Zhangjin + * Author: Wu Zhangjin */ #ifndef _ASM_MIPS_FTRACE_H diff --git a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h index 9947e57..16210ce 100644 --- a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h @@ -3,7 +3,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2009 Wu Zhangjin + * Copyright (C) 2009 Wu Zhangjin * Copyright (C) 2009 Philippe Vachon * Copyright (C) 2009 Zhang Le * diff --git a/arch/mips/include/asm/mach-loongson/cs5536/cs5536_vsm.h b/arch/mips/include/asm/mach-loongson/cs5536/cs5536_vsm.h index 6305bea..21c4ece 100644 --- a/arch/mips/include/asm/mach-loongson/cs5536/cs5536_vsm.h +++ b/arch/mips/include/asm/mach-loongson/cs5536/cs5536_vsm.h @@ -2,7 +2,7 @@ * the read/write interfaces for Virtual Support Module(VSM) * * Copyright (C) 2009 Lemote, Inc. - * Author: Wu Zhangjin + * Author: Wu Zhangjin */ #ifndef _CS5536_VSM_H diff --git a/arch/mips/include/asm/mach-loongson/loongson.h b/arch/mips/include/asm/mach-loongson/loongson.h index a6eac0f..1cf7b14 100644 --- a/arch/mips/include/asm/mach-loongson/loongson.h +++ b/arch/mips/include/asm/mach-loongson/loongson.h @@ -1,12 +1,11 @@ /* * Copyright (C) 2009 Lemote, Inc. - * Author: Wu Zhangjin + * Author: Wu Zhangjin * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. - * */ #ifndef __ASM_MACH_LOONGSON_LOONGSON_H diff --git a/arch/mips/include/asm/mach-loongson/machine.h b/arch/mips/include/asm/mach-loongson/machine.h index acf8359..4321338 100644 --- a/arch/mips/include/asm/mach-loongson/machine.h +++ b/arch/mips/include/asm/mach-loongson/machine.h @@ -1,6 +1,6 @@ /* - * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology - * Author: Wu Zhangjin + * Copyright (C) 2009 Lemote, Inc. + * Author: Wu Zhangjin * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/arch/mips/include/asm/mach-loongson/mem.h b/arch/mips/include/asm/mach-loongson/mem.h index e9960f3..3b23ee8 100644 --- a/arch/mips/include/asm/mach-loongson/mem.h +++ b/arch/mips/include/asm/mach-loongson/mem.h @@ -1,6 +1,6 @@ /* * Copyright (C) 2009 Lemote, Inc. - * Author: Wu Zhangjin + * Author: Wu Zhangjin * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/arch/mips/include/asm/mach-loongson/pci.h b/arch/mips/include/asm/mach-loongson/pci.h index a199a4f..bc99dab 100644 --- a/arch/mips/include/asm/mach-loongson/pci.h +++ b/arch/mips/include/asm/mach-loongson/pci.h @@ -1,23 +1,12 @@ /* * Copyright (c) 2008 Zhang Le - * Copyright (c) 2009 Wu Zhangjin + * Copyright (c) 2009 Wu Zhangjin * * This program is free software; you can redistribute it * and/or modify it under the terms of the GNU General * Public License as published by the Free Software * Foundation; either version 2 of the License, or (at your * option) any later version. - * - * This program is distributed in the hope that it will be - * useful, but WITHOUT ANY WARRANTY; without even the implied - * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR - * PURPOSE. See the GNU General Public License for more - * details. - * - * You should have received a copy of the GNU General Public - * License along with this program; if not, write to the Free - * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA - * 02139, USA. */ #ifndef __ASM_MACH_LOONGSON_PCI_H_ diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c index 68b0670..e9e64e0 100644 --- a/arch/mips/kernel/ftrace.c +++ b/arch/mips/kernel/ftrace.c @@ -3,7 +3,7 @@ * * Copyright (C) 2007-2008 Steven Rostedt * Copyright (C) 2009 DSLab, Lanzhou University, China - * Author: Wu Zhangjin + * Author: Wu Zhangjin * * Thanks goes to Steven Rostedt for writing the original x86 version. */ diff --git a/arch/mips/kernel/mcount.S b/arch/mips/kernel/mcount.S index 0a9cfdb..6851fc9 100644 --- a/arch/mips/kernel/mcount.S +++ b/arch/mips/kernel/mcount.S @@ -6,7 +6,7 @@ * more details. * * Copyright (C) 2009 Lemote Inc. & DSLab, Lanzhou University, China - * Author: Wu Zhangjin + * Author: Wu Zhangjin */ #include diff --git a/arch/mips/loongson/common/cmdline.c b/arch/mips/loongson/common/cmdline.c index 9e32837..1a06def 100644 --- a/arch/mips/loongson/common/cmdline.c +++ b/arch/mips/loongson/common/cmdline.c @@ -10,7 +10,7 @@ * Author: Fuxin Zhang, zhangfx@lemote.com * * Copyright (C) 2009 Lemote Inc. - * Author: Wu Zhangjin, wuzj@lemote.com + * Author: Wu Zhangjin, wuzhangjin@gmail.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/arch/mips/loongson/common/cs5536/cs5536_acc.c b/arch/mips/loongson/common/cs5536/cs5536_acc.c index b49485f..b3fd5ea 100644 --- a/arch/mips/loongson/common/cs5536/cs5536_acc.c +++ b/arch/mips/loongson/common/cs5536/cs5536_acc.c @@ -5,7 +5,7 @@ * Author : jlliu, liujl@lemote.com * * Copyright (C) 2009 Lemote, Inc. - * Author: Wu Zhangjin, wuzj@lemote.com + * Author: Wu Zhangjin, wuzhangjin@gmail.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/arch/mips/loongson/common/cs5536/cs5536_ehci.c b/arch/mips/loongson/common/cs5536/cs5536_ehci.c index 74f9c59..eaf8b86 100644 --- a/arch/mips/loongson/common/cs5536/cs5536_ehci.c +++ b/arch/mips/loongson/common/cs5536/cs5536_ehci.c @@ -5,7 +5,7 @@ * Author : jlliu, liujl@lemote.com * * Copyright (C) 2009 Lemote, Inc. - * Author: Wu Zhangjin, wuzj@lemote.com + * Author: Wu Zhangjin, wuzhangjin@gmail.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/arch/mips/loongson/common/cs5536/cs5536_ide.c b/arch/mips/loongson/common/cs5536/cs5536_ide.c index 3f61594..9a96b56 100644 --- a/arch/mips/loongson/common/cs5536/cs5536_ide.c +++ b/arch/mips/loongson/common/cs5536/cs5536_ide.c @@ -5,7 +5,7 @@ * Author : jlliu, liujl@lemote.com * * Copyright (C) 2009 Lemote, Inc. - * Author: Wu Zhangjin, wuzj@lemote.com + * Author: Wu Zhangjin, wuzhangjin@gmail.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/arch/mips/loongson/common/cs5536/cs5536_isa.c b/arch/mips/loongson/common/cs5536/cs5536_isa.c index b6f17f5..f5c0818 100644 --- a/arch/mips/loongson/common/cs5536/cs5536_isa.c +++ b/arch/mips/loongson/common/cs5536/cs5536_isa.c @@ -5,7 +5,7 @@ * Author : jlliu, liujl@lemote.com * * Copyright (C) 2009 Lemote, Inc. - * Author: Wu Zhangjin, wuzj@lemote.com + * Author: Wu Zhangjin, wuzhangjin@gmail.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c index 6cb44db..8c807c9 100644 --- a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c +++ b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c @@ -5,7 +5,7 @@ * Author: Yanhua, yanh@lemote.com * * Copyright (C) 2009 Lemote Inc. - * Author: Wu zhangjin, wuzj@lemote.com + * Author: Wu zhangjin, wuzhangjin@gmail.com * * Reference: AMD Geode(TM) CS5536 Companion Device Data Book * diff --git a/arch/mips/loongson/common/cs5536/cs5536_ohci.c b/arch/mips/loongson/common/cs5536/cs5536_ohci.c index 8fdb02b..db5900a 100644 --- a/arch/mips/loongson/common/cs5536/cs5536_ohci.c +++ b/arch/mips/loongson/common/cs5536/cs5536_ohci.c @@ -5,7 +5,7 @@ * Author : jlliu, liujl@lemote.com * * Copyright (C) 2009 Lemote, Inc. - * Author: Wu Zhangjin, wuzj@lemote.com + * Author: Wu Zhangjin, wuzhangjin@gmail.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/arch/mips/loongson/common/cs5536/cs5536_pci.c b/arch/mips/loongson/common/cs5536/cs5536_pci.c index e23f3d7..6dfeab1 100644 --- a/arch/mips/loongson/common/cs5536/cs5536_pci.c +++ b/arch/mips/loongson/common/cs5536/cs5536_pci.c @@ -5,7 +5,7 @@ * Author : jlliu, liujl@lemote.com * * Copyright (C) 2009 Lemote, Inc. - * Author: Wu Zhangjin, wuzj@lemote.com + * Author: Wu Zhangjin, wuzhangjin@gmail.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/arch/mips/loongson/common/early_printk.c b/arch/mips/loongson/common/early_printk.c index 23e7a8f..a71736f 100644 --- a/arch/mips/loongson/common/early_printk.c +++ b/arch/mips/loongson/common/early_printk.c @@ -2,7 +2,7 @@ * * Copyright (c) 2009 Philippe Vachon * Copyright (c) 2009 Lemote Inc. - * Author: Wu Zhangjin, wuzj@lemote.com + * Author: Wu Zhangjin, wuzhangjin@gmail.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/arch/mips/loongson/common/env.c b/arch/mips/loongson/common/env.c index 8c01df5..ae4cff9 100644 --- a/arch/mips/loongson/common/env.c +++ b/arch/mips/loongson/common/env.c @@ -9,8 +9,8 @@ * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology * Author: Fuxin Zhang, zhangfx@lemote.com * - * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology - * Author: Wu Zhangjin, wuzj@lemote.com + * Copyright (C) 2009 Lemote Inc. + * Author: Wu Zhangjin, wuzhangjin@gmail.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/arch/mips/loongson/common/init.c b/arch/mips/loongson/common/init.c index a2abd93..19d3415 100644 --- a/arch/mips/loongson/common/init.c +++ b/arch/mips/loongson/common/init.c @@ -1,6 +1,6 @@ /* * Copyright (C) 2009 Lemote Inc. - * Author: Wu Zhangjin, wuzj@lemote.com + * Author: Wu Zhangjin, wuzhangjin@gmail.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/arch/mips/loongson/common/machtype.c b/arch/mips/loongson/common/machtype.c index 3799098..853f184 100644 --- a/arch/mips/loongson/common/machtype.c +++ b/arch/mips/loongson/common/machtype.c @@ -1,6 +1,6 @@ /* * Copyright (C) 2009 Lemote Inc. - * Author: Wu Zhangjin, wuzj@lemote.com + * Author: Wu Zhangjin, wuzhangjin@gmail.com * * Copyright (c) 2009 Zhang Le * diff --git a/arch/mips/loongson/common/platform.c b/arch/mips/loongson/common/platform.c index be81777..ed007a2 100644 --- a/arch/mips/loongson/common/platform.c +++ b/arch/mips/loongson/common/platform.c @@ -1,6 +1,6 @@ /* * Copyright (C) 2009 Lemote Inc. - * Author: Wu Zhangjin, wuzj@lemote.com + * Author: Wu Zhangjin, wuzhangjin@gmail.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/arch/mips/loongson/common/pm.c b/arch/mips/loongson/common/pm.c index b625fec..6c1fd90 100644 --- a/arch/mips/loongson/common/pm.c +++ b/arch/mips/loongson/common/pm.c @@ -2,7 +2,7 @@ * loongson-specific suspend support * * Copyright (C) 2009 Lemote Inc. - * Author: Wu Zhangjin + * Author: Wu Zhangjin * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/loongson/common/reset.c b/arch/mips/loongson/common/reset.c index 5833f9f..33dff18 100644 --- a/arch/mips/loongson/common/reset.c +++ b/arch/mips/loongson/common/reset.c @@ -7,7 +7,7 @@ * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology * Author: Fuxin Zhang, zhangfx@lemote.com * Copyright (C) 2009 Lemote, Inc. - * Author: Zhangjin Wu, wuzj@lemote.com + * Author: Zhangjin Wu, wuzhangjin@gmail.com */ #include #include diff --git a/arch/mips/loongson/common/serial.c b/arch/mips/loongson/common/serial.c index 23b66a5..7580873 100644 --- a/arch/mips/loongson/common/serial.c +++ b/arch/mips/loongson/common/serial.c @@ -7,7 +7,7 @@ * * Copyright (C) 2009 Lemote, Inc. * Author: Yan hua (yanhua@lemote.com) - * Author: Wu Zhangjin (wuzj@lemote.com) + * Author: Wu Zhangjin (wuzhangjin@gmail.com) */ #include diff --git a/arch/mips/loongson/common/time.c b/arch/mips/loongson/common/time.c index 35f0b66..9fdd01f 100644 --- a/arch/mips/loongson/common/time.c +++ b/arch/mips/loongson/common/time.c @@ -2,8 +2,8 @@ * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology * Author: Fuxin Zhang, zhangfx@lemote.com * - * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology - * Author: Wu Zhangjin, wuzj@lemote.com + * Copyright (C) 2009 Lemote Inc. + * Author: Wu Zhangjin, wuzhangjin@gmail.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/arch/mips/loongson/common/uart_base.c b/arch/mips/loongson/common/uart_base.c index 78ff66a..d69ea54 100644 --- a/arch/mips/loongson/common/uart_base.c +++ b/arch/mips/loongson/common/uart_base.c @@ -1,6 +1,6 @@ /* * Copyright (C) 2009 Lemote Inc. - * Author: Wu Zhangjin, wuzj@lemote.com + * Author: Wu Zhangjin, wuzhangjin@gmail.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/arch/mips/loongson/fuloong-2e/reset.c b/arch/mips/loongson/fuloong-2e/reset.c index fc16c67..bc39ec6 100644 --- a/arch/mips/loongson/fuloong-2e/reset.c +++ b/arch/mips/loongson/fuloong-2e/reset.c @@ -1,8 +1,8 @@ /* Board-specific reboot/shutdown routines * Copyright (c) 2009 Philippe Vachon * - * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology - * Author: Wu Zhangjin, wuzj@lemote.com + * Copyright (C) 2009 Lemote Inc. + * Author: Wu Zhangjin, wuzhangjin@gmail.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/arch/mips/loongson/lemote-2f/machtype.c b/arch/mips/loongson/lemote-2f/machtype.c index 610f431..e860a27 100644 --- a/arch/mips/loongson/lemote-2f/machtype.c +++ b/arch/mips/loongson/lemote-2f/machtype.c @@ -1,6 +1,6 @@ /* * Copyright (C) 2009 Lemote Inc. - * Author: Wu Zhangjin, wuzj@lemote.com + * Author: Wu Zhangjin, wuzhangjin@gmail.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/arch/mips/loongson/lemote-2f/pm.c b/arch/mips/loongson/lemote-2f/pm.c index d7af2e6..cac4d38 100644 --- a/arch/mips/loongson/lemote-2f/pm.c +++ b/arch/mips/loongson/lemote-2f/pm.c @@ -2,7 +2,7 @@ * Lemote loongson2f family machines' specific suspend support * * Copyright (C) 2009 Lemote Inc. - * Author: Wu Zhangjin + * Author: Wu Zhangjin * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/loongson/lemote-2f/reset.c b/arch/mips/loongson/lemote-2f/reset.c index 51d1a60..36020a0 100644 --- a/arch/mips/loongson/lemote-2f/reset.c +++ b/arch/mips/loongson/lemote-2f/reset.c @@ -3,7 +3,7 @@ * Copyright (c) 2009 Philippe Vachon * * Copyright (C) 2009 Lemote Inc. - * Author: Wu Zhangjin, wuzj@lemote.com + * Author: Wu Zhangjin, wuzhangjin@gmail.com * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c index 475ff46..c25fb9b 100644 --- a/arch/mips/oprofile/op_model_loongson2.c +++ b/arch/mips/oprofile/op_model_loongson2.c @@ -3,7 +3,7 @@ * * Copyright (C) 2009 Lemote Inc. * Author: Yanhua - * Author: Wu Zhangjin + * Author: Wu Zhangjin * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive diff --git a/arch/mips/pci/ops-loongson2.c b/arch/mips/pci/ops-loongson2.c index aa5d3da..2bb4057 100644 --- a/arch/mips/pci/ops-loongson2.c +++ b/arch/mips/pci/ops-loongson2.c @@ -1,13 +1,11 @@ /* - * fuloong2e specific PCI support. - * * Copyright (C) 1999, 2000, 2004 MIPS Technologies, Inc. * All rights reserved. * Authors: Carsten Langgaard * Maciej W. Rozycki * * Copyright (C) 2009 Lemote Inc. - * Author: Wu Zhangjin + * Author: Wu Zhangjin * * This program is free software; you can distribute it and/or modify it * under the terms of the GNU General Public License (Version 2) as diff --git a/arch/mips/power/cpu.c b/arch/mips/power/cpu.c index 7995df4..26a6ef1 100644 --- a/arch/mips/power/cpu.c +++ b/arch/mips/power/cpu.c @@ -3,9 +3,9 @@ * * Licensed under the GPLv2 * - * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology + * Copyright (C) 2009 Lemote Inc. * Author: Hu Hongbing - * Wu Zhangjin + * Wu Zhangjin */ #include #include diff --git a/arch/mips/power/hibernate.S b/arch/mips/power/hibernate.S index 0cf86fb..dbb5c7b 100644 --- a/arch/mips/power/hibernate.S +++ b/arch/mips/power/hibernate.S @@ -3,9 +3,9 @@ * * Licensed under the GPLv2 * - * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology + * Copyright (C) 2009 Lemote Inc. * Author: Hu Hongbing - * Wu Zhangjin + * Wu Zhangjin */ #include #include diff --git a/drivers/staging/sm7xx/smtc2d.c b/drivers/staging/sm7xx/smtc2d.c index 133b86c..2fff0a0 100644 --- a/drivers/staging/sm7xx/smtc2d.c +++ b/drivers/staging/sm7xx/smtc2d.c @@ -5,7 +5,7 @@ * Author: Boyod boyod.yang@siliconmotion.com.cn * * Copyright (C) 2009 Lemote, Inc. - * Author: Wu Zhangjin, wuzj@lemote.com + * Author: Wu Zhangjin, wuzhangjin@gmail.com * * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive for diff --git a/drivers/staging/sm7xx/smtc2d.h b/drivers/staging/sm7xx/smtc2d.h index 38d0c33..02b4fa2 100644 --- a/drivers/staging/sm7xx/smtc2d.h +++ b/drivers/staging/sm7xx/smtc2d.h @@ -5,7 +5,7 @@ * Author: Ge Wang, gewang@siliconmotion.com * * Copyright (C) 2009 Lemote, Inc. - * Author: Wu Zhangjin, wuzj@lemote.com + * Author: Wu Zhangjin, wuzhangjin@gmail.com * * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive for diff --git a/drivers/staging/sm7xx/smtcfb.c b/drivers/staging/sm7xx/smtcfb.c index 161dbc9..a4f6f49 100644 --- a/drivers/staging/sm7xx/smtcfb.c +++ b/drivers/staging/sm7xx/smtcfb.c @@ -6,7 +6,7 @@ * Boyod boyod.yang@siliconmotion.com.cn * * Copyright (C) 2009 Lemote, Inc. - * Author: Wu Zhangjin, wuzj@lemote.com + * Author: Wu Zhangjin, wuzhangjin@gmail.com * * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive for diff --git a/drivers/staging/sm7xx/smtcfb.h b/drivers/staging/sm7xx/smtcfb.h index 7f2c341..7ee565c 100644 --- a/drivers/staging/sm7xx/smtcfb.h +++ b/drivers/staging/sm7xx/smtcfb.h @@ -6,7 +6,7 @@ * Boyod boyod.yang@siliconmotion.com.cn * * Copyright (C) 2009 Lemote, Inc. - * Author: Wu Zhangjin, wuzj@lemote.com + * Author: Wu Zhangjin, wuzhangjin@gmail.com * * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive for -- 1.6.5.6 From wuzhangjin@gmail.com Mon Jan 4 10:18:24 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jan 2010 10:21:29 +0100 (CET) Received: from mail-yw0-f182.google.com ([209.85.211.182]:60952 "EHLO mail-yw0-f182.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493177Ab0ADJSY (ORCPT ); Mon, 4 Jan 2010 10:18:24 +0100 Received: by mail-yw0-f182.google.com with SMTP id 12so15942361ywh.21 for ; Mon, 04 Jan 2010 01:18:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:in-reply-to:references; bh=MAQgKwwy+I6x7JBTebXv9rJtpw0RfpRclAzraCyZGCk=; b=e+cpxyVaFgxJT5gQvoskKBghxDFwrvyrgFU8E1QfXtJ7zI8U+DpBY5TTgyZTkqp4m2 PjdOfZKyFuzaJZcbIIZpYRg1kdV0FFGaGnjDrRiy1ULJFDG84ly7jDiMi2nVmJ3Dga51 o7tcr+q50pB01AjcYfZAUMHCpyPVfQEcWXqgQ= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=pIicrxmqGfTJcpvxCEL48Nqz4MuOFVuKRcPSrN0/EAGGMVoHxUaiR+P4qLfOQ5QsNu fTB2HZjob4VtemrxBBSvbxS5YgGegi2uNv6usyUABTsBS6HkD0aYgiW+8jTbLZVVj0ol SFYng3EL1k7tCB3ZFeMP6tEO5klQuJ9djXR3Q= Received: by 10.101.160.22 with SMTP id m22mr28493742ano.118.1262596703239; Mon, 04 Jan 2010 01:18:23 -0800 (PST) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id 21sm6122077ywh.16.2010.01.04.01.18.16 (version=TLSv1/SSLv3 cipher=RC4-MD5); Mon, 04 Jan 2010 01:18:22 -0800 (PST) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips@linux-mips.org, yanh@lemote.com, huhb@lemote.com, zhangfx@lemote.com, Wu Zhangjin Subject: [PATCH 10/10] Loongson: Lemote-2F: update defconfig Date: Mon, 4 Jan 2010 17:16:52 +0800 Message-Id: <85c4fa5c3d4d5929412b8228983d9fa76042b665.1262596493.git.wuzhangjin@gmail.com> X-Mailer: git-send-email 1.6.5.6 In-Reply-To: <0e20c65b9bd040888cfc95401a5a84245e1e92de.1262596493.git.wuzhangjin@gmail.com> References: <669ff2f39fd2aa3849e472438d3d9d499c8f0e3a.1262596493.git.wuzhangjin@gmail.com> <9bcc0f00c46fdf5c832ce3bdd0df8d7f08b7a1be.1262596493.git.wuzhangjin@gmail.com> <0340ef8c9de1f84261bac07c74f435f719eaa65d.1262596493.git.wuzhangjin@gmail.com> <0e20c65b9bd040888cfc95401a5a84245e1e92de.1262596493.git.wuzhangjin@gmail.com> In-Reply-To: References: X-archive-position: 25508 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2271 Content-Length: 45177 Lines: 1641 From: Wu Zhangjin Changes: o Serial port related configuration Disable EARLY_PRINTK, CONFIG_SYS_SUPPORTS_ZBOOT_UART16550 Enable the serial port support as module. o PM related support Enable CPUFreq as module, use the external timer(MFGPT) instead of r4k timer. Enable Suspend support Enable Run Time PM support o Enable SM7XX Video Driver Disable the buggy 2d acceleration o Enable CONFIG_OPROFILE as module o Use GZIP instead of LZMA, which need less decompression time o The other support o Enable more USB devices support o Enable initrd support(needed by gNewsense) o Enable more crypto support Signed-off-by: Wu Zhangjin --- arch/mips/configs/lemote2f_defconfig | 964 +++++++++++++++++++++++----------- 1 files changed, 670 insertions(+), 294 deletions(-) diff --git a/arch/mips/configs/lemote2f_defconfig b/arch/mips/configs/lemote2f_defconfig index b71a0a4..4caa0e0 100644 --- a/arch/mips/configs/lemote2f_defconfig +++ b/arch/mips/configs/lemote2f_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.32-rc6 -# Mon Nov 9 23:42:42 2009 +# Linux kernel version: 2.6.33-rc2 +# Mon Jan 4 13:41:09 2010 # CONFIG_MIPS=y @@ -27,6 +27,7 @@ CONFIG_MACH_LOONGSON=y # CONFIG_PNX8550_STB810 is not set # CONFIG_PMC_MSP is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_POWERTV is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP28 is not set @@ -51,6 +52,9 @@ CONFIG_ARCH_SPARSEMEM_ENABLE=y # CONFIG_LEMOTE_FULOONG2E is not set CONFIG_LEMOTE_MACH2F=y CONFIG_CS5536=y +CONFIG_CS5536_MFGPT=y +CONFIG_LOONGSON_SUSPEND=y +CONFIG_LOONGSON_UART_BASE=y CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_ARCH_HAS_ILOG2_U32 is not set # CONFIG_ARCH_HAS_ILOG2_U64 is not set @@ -63,13 +67,8 @@ CONFIG_GENERIC_TIME=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_SCHED_OMIT_FRAME_POINTER=y CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_CEVT_R4K_LIB=y -CONFIG_CEVT_R4K=y -CONFIG_CSRC_R4K_LIB=y -CONFIG_CSRC_R4K=y CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_EARLY_PRINTK=y CONFIG_SYS_HAS_EARLY_PRINTK=y CONFIG_I8259=y # CONFIG_NO_IOPORT is not set @@ -109,13 +108,15 @@ CONFIG_CPU_LOONGSON2F=y # CONFIG_CPU_SB1 is not set # CONFIG_CPU_CAVIUM_OCTEON is not set CONFIG_SYS_SUPPORTS_ZBOOT=y -CONFIG_SYS_SUPPORTS_ZBOOT_UART16550=y CONFIG_CPU_LOONGSON2=y CONFIG_SYS_HAS_CPU_LOONGSON2F=y CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_CPUFREQ=y +CONFIG_CPU_SUPPORTS_ADDRWINCFG=y +CONFIG_CPU_SUPPORTS_UNCACHED_ACCELERATED=y # # Kernel type @@ -137,7 +138,6 @@ CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y CONFIG_CPU_SUPPORTS_HIGHMEM=y CONFIG_SYS_SUPPORTS_HIGHMEM=y -CONFIG_ARCH_FLATMEM_ENABLE=y CONFIG_ARCH_POPULATES_NODE_MAP=y CONFIG_SELECT_MEMORY_MODEL=y # CONFIG_FLATMEM_MANUAL is not set @@ -146,17 +146,11 @@ CONFIG_SPARSEMEM_MANUAL=y CONFIG_SPARSEMEM=y CONFIG_HAVE_MEMORY_PRESENT=y CONFIG_SPARSEMEM_STATIC=y - -# -# Memory hotplug is currently incompatible with Software Suspend -# CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_ZONE_DMA_FLAG=0 CONFIG_VIRT_TO_BUS=y -CONFIG_HAVE_MLOCK=y -CONFIG_HAVE_MLOCKED_PAGE_BIT=y # CONFIG_KSM is not set CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_TICK_ONESHOT=y @@ -175,7 +169,7 @@ CONFIG_HZ=250 # CONFIG_PREEMPT_NONE is not set # CONFIG_PREEMPT_VOLUNTARY is not set CONFIG_PREEMPT=y -# CONFIG_KEXEC is not set +CONFIG_KEXEC=y # CONFIG_SECCOMP is not set CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y @@ -194,9 +188,9 @@ CONFIG_LOCALVERSION="" CONFIG_HAVE_KERNEL_GZIP=y CONFIG_HAVE_KERNEL_BZIP2=y CONFIG_HAVE_KERNEL_LZMA=y -# CONFIG_KERNEL_GZIP is not set +CONFIG_KERNEL_GZIP=y # CONFIG_KERNEL_BZIP2 is not set -CONFIG_KERNEL_LZMA=y +# CONFIG_KERNEL_LZMA is not set CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y @@ -211,6 +205,7 @@ CONFIG_AUDIT=y # CONFIG_TREE_RCU=y # CONFIG_TREE_PREEMPT_RCU is not set +# CONFIG_TINY_RCU is not set # CONFIG_RCU_TRACE is not set CONFIG_RCU_FANOUT=64 # CONFIG_RCU_FANOUT_EXACT is not set @@ -224,7 +219,11 @@ CONFIG_SYSFS_DEPRECATED=y CONFIG_SYSFS_DEPRECATED_V2=y # CONFIG_RELAY is not set # CONFIG_NAMESPACES is not set -# CONFIG_BLK_DEV_INITRD is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_SYSCTL=y CONFIG_ANON_INODES=y @@ -256,14 +255,18 @@ CONFIG_COMPAT_BRK=y # CONFIG_SLAB is not set CONFIG_SLUB=y # CONFIG_SLOB is not set -# CONFIG_PROFILING is not set +CONFIG_PROFILING=y +CONFIG_TRACEPOINTS=y +CONFIG_OPROFILE=m CONFIG_HAVE_OPROFILE=y CONFIG_HAVE_SYSCALL_WRAPPERS=y # # GCOV-based kernel profiling # -# CONFIG_SLOW_WORK is not set +# CONFIG_GCOV_KERNEL is not set +CONFIG_SLOW_WORK=y +# CONFIG_SLOW_WORK_DEBUG is not set CONFIG_HAVE_GENERIC_DMA_COHERENT=y CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y @@ -283,14 +286,41 @@ CONFIG_BLOCK_COMPAT=y # IO Schedulers # CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_AS is not set # CONFIG_DEFAULT_DEADLINE is not set CONFIG_DEFAULT_CFQ=y # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="cfq" +# CONFIG_INLINE_SPIN_TRYLOCK is not set +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK is not set +# CONFIG_INLINE_SPIN_LOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set +# CONFIG_INLINE_SPIN_UNLOCK is not set +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set +# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_READ_TRYLOCK is not set +# CONFIG_INLINE_READ_LOCK is not set +# CONFIG_INLINE_READ_LOCK_BH is not set +# CONFIG_INLINE_READ_LOCK_IRQ is not set +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set +# CONFIG_INLINE_READ_UNLOCK is not set +# CONFIG_INLINE_READ_UNLOCK_BH is not set +# CONFIG_INLINE_READ_UNLOCK_IRQ is not set +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_WRITE_TRYLOCK is not set +# CONFIG_INLINE_WRITE_LOCK is not set +# CONFIG_INLINE_WRITE_LOCK_BH is not set +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set +# CONFIG_INLINE_WRITE_UNLOCK is not set +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set +# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set +# CONFIG_MUTEX_SPIN_ON_OWNER is not set CONFIG_FREEZER=y # @@ -314,7 +344,7 @@ CONFIG_MMU=y CONFIG_BINFMT_ELF=y # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set # CONFIG_HAVE_AOUT is not set -# CONFIG_BINFMT_MISC is not set +CONFIG_BINFMT_MISC=m CONFIG_MIPS32_COMPAT=y CONFIG_COMPAT=y CONFIG_SYSVIPC_COMPAT=y @@ -335,9 +365,34 @@ CONFIG_SUSPEND_FREEZER=y CONFIG_HIBERNATION_NVS=y CONFIG_HIBERNATION=y CONFIG_PM_STD_PARTITION="/dev/hda3" -# CONFIG_PM_RUNTIME is not set +CONFIG_PM_RUNTIME=y +CONFIG_MIPS_EXTERNAL_TIMER=y +CONFIG_MIPS_CPUFREQ=y + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +CONFIG_CPU_FREQ_DEBUG=y +CONFIG_CPU_FREQ_STAT=m +CONFIG_CPU_FREQ_STAT_DETAILS=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=m +CONFIG_CPU_FREQ_GOV_USERSPACE=m +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m + +# +# CPUFreq processor drivers +# +CONFIG_LOONGSON2_CPUFREQ=m CONFIG_NET=y -CONFIG_COMPAT_NETLINK_MESSAGES=y # # Networking options @@ -346,11 +401,12 @@ CONFIG_PACKET=y CONFIG_PACKET_MMAP=y CONFIG_UNIX=y CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set +CONFIG_XFRM_USER=m # CONFIG_XFRM_SUB_POLICY is not set # CONFIG_XFRM_MIGRATE is not set # CONFIG_XFRM_STATISTICS is not set -# CONFIG_NET_KEY is not set +CONFIG_NET_KEY=m +# CONFIG_NET_KEY_MIGRATE is not set CONFIG_INET=y CONFIG_IP_MULTICAST=y CONFIG_IP_ADVANCED_ROUTER=y @@ -361,12 +417,13 @@ CONFIG_IP_MULTIPLE_TABLES=y CONFIG_IP_ROUTE_MULTIPATH=y CONFIG_IP_ROUTE_VERBOSE=y # CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set +CONFIG_NET_IPIP=m +CONFIG_NET_IPGRE=m +# CONFIG_NET_IPGRE_BROADCAST is not set CONFIG_IP_MROUTE=y CONFIG_IP_PIMSM_V1=y CONFIG_IP_PIMSM_V2=y -# CONFIG_ARPD is not set +CONFIG_ARPD=y CONFIG_SYN_COOKIES=y # CONFIG_INET_AH is not set # CONFIG_INET_ESP is not set @@ -399,30 +456,34 @@ CONFIG_DEFAULT_BIC=y # CONFIG_DEFAULT_WESTWOOD is not set # CONFIG_DEFAULT_RENO is not set CONFIG_DEFAULT_TCP_CONG="bic" -# CONFIG_TCP_MD5SIG is not set +CONFIG_TCP_MD5SIG=y CONFIG_IPV6=m CONFIG_IPV6_PRIVACY=y -# CONFIG_IPV6_ROUTER_PREF is not set +CONFIG_IPV6_ROUTER_PREF=y +# CONFIG_IPV6_ROUTE_INFO is not set # CONFIG_IPV6_OPTIMISTIC_DAD is not set # CONFIG_INET6_AH is not set # CONFIG_INET6_ESP is not set # CONFIG_INET6_IPCOMP is not set # CONFIG_IPV6_MIP6 is not set # CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set +CONFIG_INET6_TUNNEL=m CONFIG_INET6_XFRM_MODE_TRANSPORT=m CONFIG_INET6_XFRM_MODE_TUNNEL=m CONFIG_INET6_XFRM_MODE_BEET=m # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set CONFIG_IPV6_SIT=m +# CONFIG_IPV6_SIT_6RD is not set CONFIG_IPV6_NDISC_NODETYPE=y -# CONFIG_IPV6_TUNNEL is not set -# CONFIG_IPV6_MULTIPLE_TABLES is not set +CONFIG_IPV6_TUNNEL=m +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y # CONFIG_IPV6_MROUTE is not set CONFIG_NETWORK_SECMARK=y CONFIG_NETFILTER=y # CONFIG_NETFILTER_DEBUG is not set CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=y # # Core Netfilter Configuration @@ -446,17 +507,22 @@ CONFIG_NETFILTER_ADVANCED=y # # CONFIG_IP6_NF_QUEUE is not set # CONFIG_IP6_NF_IPTABLES is not set +# CONFIG_BRIDGE_NF_EBTABLES is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set # CONFIG_RDS is not set # CONFIG_TIPC is not set # CONFIG_ATM is not set -# CONFIG_BRIDGE is not set +CONFIG_STP=m +CONFIG_BRIDGE=m # CONFIG_NET_DSA is not set -# CONFIG_VLAN_8021Q is not set +CONFIG_VLAN_8021Q=m +# CONFIG_VLAN_8021Q_GVRP is not set # CONFIG_DECNET is not set +CONFIG_LLC=m # CONFIG_LLC2 is not set -# CONFIG_IPX is not set +CONFIG_IPX=m +# CONFIG_IPX_INTERN is not set # CONFIG_ATALK is not set # CONFIG_X25 is not set # CONFIG_LAPB is not set @@ -518,26 +584,61 @@ CONFIG_NET_SCH_FIFO=y # Network testing # # CONFIG_NET_PKTGEN is not set +# CONFIG_NET_DROP_MONITOR is not set # CONFIG_HAMRADIO is not set # CONFIG_CAN is not set # CONFIG_IRDA is not set -# CONFIG_BT is not set +CONFIG_BT=m +CONFIG_BT_L2CAP=m +CONFIG_BT_SCO=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m + +# +# Bluetooth device drivers +# +CONFIG_BT_HCIBTUSB=m +# CONFIG_BT_HCIBTSDIO is not set +# CONFIG_BT_HCIUART is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +CONFIG_BT_HCIBFUSB=m +CONFIG_BT_HCIVHCI=m +# CONFIG_BT_MRVL is not set # CONFIG_AF_RXRPC is not set CONFIG_FIB_RULES=y CONFIG_WIRELESS=y -# CONFIG_CFG80211 is not set -CONFIG_CFG80211_DEFAULT_PS_VALUE=0 +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_CFG80211=m +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_REG_DEBUG is not set +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set # CONFIG_WIRELESS_OLD_REGULATORY is not set -CONFIG_WIRELESS_EXT=y +CONFIG_CFG80211_WEXT=y CONFIG_WIRELESS_EXT_SYSFS=y -# CONFIG_LIB80211 is not set - -# -# CFG80211 needs to be enabled for MAC80211 -# +CONFIG_LIB80211=m +CONFIG_LIB80211_DEBUG=y +CONFIG_MAC80211=m +# CONFIG_MAC80211_RC_PID is not set +CONFIG_MAC80211_RC_MINSTREL=y +# CONFIG_MAC80211_RC_DEFAULT_PID is not set +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel" +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_DEBUG_MENU is not set # CONFIG_WIMAX is not set CONFIG_RFKILL=m -# CONFIG_RFKILL_INPUT is not set +CONFIG_RFKILL_LEDS=y +CONFIG_RFKILL_INPUT=y # CONFIG_NET_9P is not set # @@ -555,7 +656,7 @@ CONFIG_FW_LOADER=y CONFIG_FIRMWARE_IN_KERNEL=y CONFIG_EXTRA_FIRMWARE="" # CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set +CONFIG_CONNECTOR=m # CONFIG_MTD is not set # CONFIG_PARPORT is not set # CONFIG_PNP is not set @@ -566,7 +667,12 @@ CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_UMEM is not set # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_CRYPTOLOOP=y +CONFIG_BLK_DEV_CRYPTOLOOP=m + +# +# DRBD disabled because PROC_FS, INET or CONNECTOR not selected +# +# CONFIG_BLK_DEV_DRBD is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_UB is not set @@ -577,19 +683,7 @@ CONFIG_BLK_DEV_RAM_SIZE=8192 # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set # CONFIG_BLK_DEV_HD is not set -CONFIG_MISC_DEVICES=y -# CONFIG_PHANTOM is not set -# CONFIG_SGI_IOC4 is not set -# CONFIG_TIFM_CORE is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_HP_ILO is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_CB710_CORE is not set +# CONFIG_MISC_DEVICES is not set CONFIG_HAVE_IDE=y CONFIG_IDE=y @@ -619,8 +713,7 @@ CONFIG_BLK_DEV_IDEDMA_SFF=y # CONFIG_BLK_DEV_IDEPCI=y # CONFIG_IDEPCI_PCIBUS_ORDER is not set -# CONFIG_BLK_DEV_OFFBOARD is not set -CONFIG_BLK_DEV_GENERIC=y +# CONFIG_BLK_DEV_GENERIC is not set # CONFIG_BLK_DEV_OPTI621 is not set CONFIG_BLK_DEV_IDEDMA_PCI=y # CONFIG_BLK_DEV_AEC62XX is not set @@ -700,7 +793,29 @@ CONFIG_SCSI_WAIT_SCAN=m # CONFIG_SCSI_DH is not set # CONFIG_SCSI_OSD_INITIATOR is not set # CONFIG_ATA is not set -# CONFIG_MD is not set +CONFIG_MD=y +CONFIG_BLK_DEV_MD=m +CONFIG_MD_LINEAR=m +CONFIG_MD_RAID0=m +CONFIG_MD_RAID1=m +CONFIG_MD_RAID10=m +CONFIG_MD_RAID456=m +CONFIG_MD_RAID6_PQ=m +# CONFIG_ASYNC_RAID6_TEST is not set +CONFIG_MD_MULTIPATH=m +CONFIG_MD_FAULTY=m +CONFIG_BLK_DEV_DM=m +CONFIG_DM_DEBUG=y +CONFIG_DM_CRYPT=m +CONFIG_DM_SNAPSHOT=m +CONFIG_DM_MIRROR=m +CONFIG_DM_LOG_USERSPACE=m +CONFIG_DM_ZERO=m +CONFIG_DM_MULTIPATH=m +CONFIG_DM_MULTIPATH_QL=m +CONFIG_DM_MULTIPATH_ST=m +CONFIG_DM_DELAY=m +CONFIG_DM_UEVENT=y # CONFIG_FUSION is not set # @@ -712,19 +827,19 @@ CONFIG_SCSI_WAIT_SCAN=m # # -# See the help texts for more information. +# The newer stack is recommended. # # CONFIG_FIREWIRE is not set # CONFIG_IEEE1394 is not set # CONFIG_I2O is not set CONFIG_NETDEVICES=y # CONFIG_IFB is not set -# CONFIG_DUMMY is not set +CONFIG_DUMMY=m # CONFIG_BONDING is not set # CONFIG_MACVLAN is not set # CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_VETH is not set +CONFIG_TUN=m +CONFIG_VETH=m # CONFIG_ARCNET is not set # CONFIG_PHYLIB is not set CONFIG_NET_ETHERNET=y @@ -738,6 +853,7 @@ CONFIG_MII=y # CONFIG_SMC91X is not set # CONFIG_DM9000 is not set # CONFIG_ETHOC is not set +# CONFIG_SMSC911X is not set # CONFIG_NET_VENDOR_RACAL is not set # CONFIG_DNET is not set # CONFIG_NET_TULIP is not set @@ -769,7 +885,7 @@ CONFIG_NET_PCI=y # CONFIG_8139CP is not set CONFIG_8139TOO=y # CONFIG_8139TOO_PIO is not set -CONFIG_8139TOO_TUNE_TWISTER=y +# CONFIG_8139TOO_TUNE_TWISTER is not set # CONFIG_8139TOO_8129 is not set # CONFIG_8139_OLD_RX_RESET is not set # CONFIG_R6040 is not set @@ -795,6 +911,7 @@ CONFIG_NETDEV_1000=y # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set CONFIG_R8169=y +CONFIG_R8169_VLAN=y # CONFIG_SIS190 is not set # CONFIG_SKGE is not set # CONFIG_SKY2 is not set @@ -810,15 +927,31 @@ CONFIG_R8169=y # CONFIG_NETDEV_10000 is not set # CONFIG_TR is not set CONFIG_WLAN=y -CONFIG_WLAN_PRE80211=y -# CONFIG_STRIP is not set -# CONFIG_WAVELAN is not set -CONFIG_WLAN_80211=y -# CONFIG_LIBERTAS is not set +# CONFIG_LIBERTAS_THINFIRM is not set # CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set # CONFIG_PRISM54 is not set # CONFIG_USB_ZD1201 is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +# CONFIG_ADM8211 is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_MWL8K is not set +# CONFIG_ATH_COMMON is not set +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set # CONFIG_HOSTAP is not set +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWLWIFI is not set +# CONFIG_IWM is not set +# CONFIG_LIBERTAS is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_RT2X00 is not set +# CONFIG_WL12XX is not set +# CONFIG_ZD1211RW is not set # # Enable WiMAX (Networking options) to see the WiMAX drivers @@ -831,17 +964,39 @@ CONFIG_WLAN_80211=y # CONFIG_USB_KAWETH is not set # CONFIG_USB_PEGASUS is not set # CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET is not set +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_CDCETHER=m +CONFIG_USB_NET_CDC_EEM=m +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=m +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +# CONFIG_USB_NET_RNDIS_HOST is not set +CONFIG_USB_NET_CDC_SUBSET=m +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=m # CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set # CONFIG_WAN is not set # CONFIG_FDDI is not set # CONFIG_HIPPI is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set # CONFIG_NET_FC is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set +CONFIG_NETCONSOLE=m +CONFIG_NETCONSOLE_DYNAMIC=y +CONFIG_NETPOLL=y +# CONFIG_NETPOLL_TRAP is not set +CONFIG_NET_POLL_CONTROLLER=y +# CONFIG_VMXNET3 is not set # CONFIG_ISDN is not set # CONFIG_PHONE is not set @@ -849,8 +1004,9 @@ CONFIG_WLAN_80211=y # Input device support # CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set +CONFIG_INPUT_FF_MEMLESS=m +CONFIG_INPUT_POLLDEV=m +# CONFIG_INPUT_SPARSEKMAP is not set # # Userland interfaces @@ -884,7 +1040,7 @@ CONFIG_MOUSE_PS2_SYNAPTICS=y # CONFIG_MOUSE_PS2_SENTELIC is not set # CONFIG_MOUSE_PS2_TOUCHKIT is not set # CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_APPLETOUCH is not set +CONFIG_MOUSE_APPLETOUCH=m # CONFIG_MOUSE_BCM5974 is not set # CONFIG_MOUSE_INPORT is not set # CONFIG_MOUSE_LOGIBM is not set @@ -904,6 +1060,7 @@ CONFIG_SERIO_I8042=y # CONFIG_SERIO_PCIPS2 is not set CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set # CONFIG_GAMEPORT is not set # @@ -934,8 +1091,7 @@ CONFIG_SERIAL_NONSTANDARD=y # # Serial drivers # -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250=m # CONFIG_SERIAL_8250_PCI is not set CONFIG_SERIAL_8250_NR_UARTS=16 CONFIG_SERIAL_8250_RUNTIME_UARTS=4 @@ -953,8 +1109,7 @@ CONFIG_SERIAL_8250_FOURPORT=y # # Non-8250 serial port support # -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_SERIAL_CORE=m # CONFIG_SERIAL_JSM is not set CONFIG_UNIX98_PTYS=y # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set @@ -1033,14 +1188,18 @@ CONFIG_VIDEO_MEDIA=m # # Multimedia drivers # +CONFIG_IR_CORE=m +CONFIG_VIDEO_IR=m # CONFIG_MEDIA_ATTACH is not set CONFIG_VIDEO_V4L2=m CONFIG_VIDEO_V4L1=m +CONFIG_VIDEOBUF_GEN=m +CONFIG_VIDEOBUF_VMALLOC=m CONFIG_VIDEO_CAPTURE_DRIVERS=y # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set CONFIG_VIDEO_HELPER_CHIPS_AUTO=y -# CONFIG_VIDEO_VIVI is not set +CONFIG_VIDEO_VIVI=m # CONFIG_VIDEO_PMS is not set # CONFIG_VIDEO_CPIA is not set # CONFIG_VIDEO_CPIA2 is not set @@ -1049,52 +1208,55 @@ CONFIG_V4L_USB_DRIVERS=y CONFIG_USB_VIDEO_CLASS=m CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y CONFIG_USB_GSPCA=m -# CONFIG_USB_M5602 is not set -# CONFIG_USB_STV06XX is not set +CONFIG_USB_M5602=m +CONFIG_USB_STV06XX=m # CONFIG_USB_GL860 is not set -# CONFIG_USB_GSPCA_CONEX is not set -# CONFIG_USB_GSPCA_ETOMS is not set -# CONFIG_USB_GSPCA_FINEPIX is not set +CONFIG_USB_GSPCA_CONEX=m +CONFIG_USB_GSPCA_ETOMS=m +CONFIG_USB_GSPCA_FINEPIX=m # CONFIG_USB_GSPCA_JEILINJ is not set -# CONFIG_USB_GSPCA_MARS is not set -# CONFIG_USB_GSPCA_MR97310A is not set -# CONFIG_USB_GSPCA_OV519 is not set -# CONFIG_USB_GSPCA_OV534 is not set -# CONFIG_USB_GSPCA_PAC207 is not set -# CONFIG_USB_GSPCA_PAC7311 is not set -# CONFIG_USB_GSPCA_SN9C20X is not set -# CONFIG_USB_GSPCA_SONIXB is not set -# CONFIG_USB_GSPCA_SONIXJ is not set -# CONFIG_USB_GSPCA_SPCA500 is not set -# CONFIG_USB_GSPCA_SPCA501 is not set -# CONFIG_USB_GSPCA_SPCA505 is not set -# CONFIG_USB_GSPCA_SPCA506 is not set -# CONFIG_USB_GSPCA_SPCA508 is not set -# CONFIG_USB_GSPCA_SPCA561 is not set -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -# CONFIG_USB_GSPCA_STK014 is not set -# CONFIG_USB_GSPCA_SUNPLUS is not set -# CONFIG_USB_GSPCA_T613 is not set -# CONFIG_USB_GSPCA_TV8532 is not set -# CONFIG_USB_GSPCA_VC032X is not set -# CONFIG_USB_GSPCA_ZC3XX is not set +CONFIG_USB_GSPCA_MARS=m +CONFIG_USB_GSPCA_MR97310A=m +CONFIG_USB_GSPCA_OV519=m +CONFIG_USB_GSPCA_OV534=m +CONFIG_USB_GSPCA_PAC207=m +# CONFIG_USB_GSPCA_PAC7302 is not set +CONFIG_USB_GSPCA_PAC7311=m +CONFIG_USB_GSPCA_SN9C20X=m +CONFIG_USB_GSPCA_SN9C20X_EVDEV=y +CONFIG_USB_GSPCA_SONIXB=m +CONFIG_USB_GSPCA_SONIXJ=m +CONFIG_USB_GSPCA_SPCA500=m +CONFIG_USB_GSPCA_SPCA501=m +CONFIG_USB_GSPCA_SPCA505=m +CONFIG_USB_GSPCA_SPCA506=m +CONFIG_USB_GSPCA_SPCA508=m +CONFIG_USB_GSPCA_SPCA561=m +CONFIG_USB_GSPCA_SQ905=m +CONFIG_USB_GSPCA_SQ905C=m +CONFIG_USB_GSPCA_STK014=m +# CONFIG_USB_GSPCA_STV0680 is not set +CONFIG_USB_GSPCA_SUNPLUS=m +CONFIG_USB_GSPCA_T613=m +CONFIG_USB_GSPCA_TV8532=m +CONFIG_USB_GSPCA_VC032X=m +CONFIG_USB_GSPCA_ZC3XX=m # CONFIG_VIDEO_HDPVR is not set # CONFIG_USB_VICAM is not set # CONFIG_USB_IBMCAM is not set # CONFIG_USB_KONICAWC is not set # CONFIG_USB_QUICKCAM_MESSENGER is not set -# CONFIG_USB_ET61X251 is not set +CONFIG_USB_ET61X251=m # CONFIG_USB_OV511 is not set # CONFIG_USB_SE401 is not set -# CONFIG_USB_SN9C102 is not set +CONFIG_USB_SN9C102=m # CONFIG_USB_STV680 is not set -# CONFIG_USB_ZC0301 is not set +CONFIG_USB_ZC0301=m # CONFIG_USB_PWC is not set CONFIG_USB_PWC_INPUT_EVDEV=y -# CONFIG_USB_ZR364XX is not set -# CONFIG_USB_STKWEBCAM is not set -# CONFIG_USB_S2255 is not set +CONFIG_USB_ZR364XX=m +CONFIG_USB_STKWEBCAM=m +CONFIG_USB_S2255=m # CONFIG_RADIO_ADAPTERS is not set # CONFIG_DAB is not set @@ -1132,6 +1294,7 @@ CONFIG_FB_TILEBLITTING=y # CONFIG_FB_CYBER2000 is not set # CONFIG_FB_ASILIANT is not set # CONFIG_FB_IMSTT is not set +# CONFIG_FB_UVESA is not set # CONFIG_FB_S1D13XXX is not set # CONFIG_FB_NVIDIA is not set # CONFIG_FB_RIVA is not set @@ -1161,7 +1324,7 @@ CONFIG_FB_SIS_315=y CONFIG_BACKLIGHT_LCD_SUPPORT=y # CONFIG_LCD_CLASS_DEVICE is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_GENERIC=y +CONFIG_BACKLIGHT_GENERIC=m # # Display device support @@ -1193,28 +1356,44 @@ CONFIG_LOGO=y # CONFIG_LOGO_LINUX_VGA16 is not set CONFIG_LOGO_LINUX_CLUT224=y CONFIG_SOUND=m -# CONFIG_SOUND_OSS_CORE is not set +CONFIG_SOUND_OSS_CORE=y +CONFIG_SOUND_OSS_CORE_PRECLAIM=y CONFIG_SND=m CONFIG_SND_TIMER=m CONFIG_SND_PCM=m -# CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set -# CONFIG_SND_HRTIMER is not set +CONFIG_SND_HWDEP=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_SEQUENCER=m +CONFIG_SND_SEQ_DUMMY=m +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=m +CONFIG_SND_PCM_OSS=m +CONFIG_SND_PCM_OSS_PLUGINS=y +CONFIG_SND_SEQUENCER_OSS=y +CONFIG_SND_HRTIMER=m +CONFIG_SND_SEQ_HRTIMER_DEFAULT=y # CONFIG_SND_RTCTIMER is not set # CONFIG_SND_DYNAMIC_MINORS is not set -# CONFIG_SND_SUPPORT_OLD_API is not set -# CONFIG_SND_VERBOSE_PROCFS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set CONFIG_SND_VMASTER=y -# CONFIG_SND_RAWMIDI_SEQ is not set +CONFIG_SND_RAWMIDI_SEQ=m # CONFIG_SND_OPL3_LIB_SEQ is not set # CONFIG_SND_OPL4_LIB_SEQ is not set # CONFIG_SND_SBAWE_SEQ is not set # CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_MPU401_UART=m CONFIG_SND_AC97_CODEC=m -# CONFIG_SND_DRIVERS is not set +CONFIG_SND_DRIVERS=y +CONFIG_SND_DUMMY=m +CONFIG_SND_VIRMIDI=m +# CONFIG_SND_MTPAV is not set +CONFIG_SND_SERIAL_U16550=m +CONFIG_SND_MPU401=m +CONFIG_SND_AC97_POWER_SAVE=y +CONFIG_SND_AC97_POWER_SAVE_DEFAULT=10 CONFIG_SND_PCI=y # CONFIG_SND_AD1889 is not set # CONFIG_SND_ALS300 is not set @@ -1281,7 +1460,10 @@ CONFIG_SND_CS5535AUDIO=m # CONFIG_SND_VX222 is not set # CONFIG_SND_YMFPCI is not set # CONFIG_SND_MIPS is not set -# CONFIG_SND_USB is not set +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_USB_CAIAQ=m +CONFIG_SND_USB_CAIAQ_INPUT=y # CONFIG_SND_SOC is not set # CONFIG_SOUND_PRIME is not set CONFIG_AC97_BUS=m @@ -1299,32 +1481,41 @@ CONFIG_USB_HIDDEV=y # # Special HID drivers # -# CONFIG_HID_A4TECH is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_BELKIN is not set -# CONFIG_HID_CHERRY is not set -# CONFIG_HID_CHICONY is not set -# CONFIG_HID_CYPRESS is not set -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EZKEY is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -# CONFIG_HID_LOGITECH is not set -# CONFIG_HID_MICROSOFT is not set -# CONFIG_HID_MONTEREY is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_ZEROPLUS is not set +CONFIG_HID_A4TECH=m +CONFIG_HID_APPLE=m +CONFIG_HID_BELKIN=m +CONFIG_HID_CHERRY=m +CONFIG_HID_CHICONY=m +CONFIG_HID_CYPRESS=m +CONFIG_HID_DRAGONRISE=m +CONFIG_DRAGONRISE_FF=y +CONFIG_HID_EZKEY=m +CONFIG_HID_KYE=m +CONFIG_HID_GYRATION=m +CONFIG_HID_TWINHAN=m +CONFIG_HID_KENSINGTON=m +CONFIG_HID_LOGITECH=m +CONFIG_LOGITECH_FF=y +CONFIG_LOGIRUMBLEPAD2_FF=y +CONFIG_HID_MICROSOFT=m +CONFIG_HID_MONTEREY=m +CONFIG_HID_NTRIG=m +CONFIG_HID_PANTHERLORD=m +CONFIG_PANTHERLORD_FF=y +CONFIG_HID_PETALYNX=m +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SONY=m +CONFIG_HID_SUNPLUS=m +CONFIG_HID_GREENASIA=m +CONFIG_GREENASIA_FF=y +CONFIG_HID_SMARTJOYPLUS=m +CONFIG_SMARTJOYPLUS_FF=y +CONFIG_HID_TOPSEED=m +CONFIG_HID_THRUSTMASTER=m +CONFIG_THRUSTMASTER_FF=y +CONFIG_HID_WACOM=m +CONFIG_HID_ZEROPLUS=m +CONFIG_ZEROPLUS_FF=y CONFIG_USB_SUPPORT=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y @@ -1344,7 +1535,7 @@ CONFIG_USB_SUSPEND=y CONFIG_USB_OTG_WHITELIST=y # CONFIG_USB_OTG_BLACKLIST_HUB is not set CONFIG_USB_MON=y -# CONFIG_USB_WUSB is not set +CONFIG_USB_WUSB=m # CONFIG_USB_WUSB_CBAF is not set # @@ -1366,14 +1557,15 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_UHCI_HCD=m # CONFIG_USB_SL811_HCD is not set # CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_WHCI_HCD is not set -# CONFIG_USB_HWA_HCD is not set +CONFIG_USB_WHCI_HCD=m +CONFIG_USB_HWA_HCD=m +# CONFIG_USB_GADGET_MUSB_HDRC is not set # # USB Device Class drivers # CONFIG_USB_ACM=m -# CONFIG_USB_PRINTER is not set +CONFIG_USB_PRINTER=m CONFIG_USB_WDM=m # CONFIG_USB_TMC is not set @@ -1397,7 +1589,7 @@ CONFIG_USB_STORAGE_ALAUDA=m # CONFIG_USB_STORAGE_ONETOUCH is not set # CONFIG_USB_STORAGE_KARMA is not set # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_LIBUSUAL is not set +CONFIG_USB_LIBUSUAL=y # # USB Imaging devices @@ -1467,7 +1659,7 @@ CONFIG_USB_SERIAL_GENERIC=y # CONFIG_USB_LEGOTOWER is not set # CONFIG_USB_LCD is not set # CONFIG_USB_BERRY_CHARGE is not set -# CONFIG_USB_LED is not set +CONFIG_USB_LED=m # CONFIG_USB_CYPRESS_CY7C63 is not set # CONFIG_USB_CYTHERM is not set # CONFIG_USB_IDMOUSE is not set @@ -1480,16 +1672,95 @@ CONFIG_USB_SERIAL_GENERIC=y # CONFIG_USB_TEST is not set # CONFIG_USB_ISIGHTFW is not set # CONFIG_USB_VST is not set -# CONFIG_USB_GADGET is not set +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_R8A66597 is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set +# CONFIG_USB_GADGET_IMX is not set +# CONFIG_USB_GADGET_S3C2410 is not set +CONFIG_USB_GADGET_M66592=y +CONFIG_USB_M66592=m +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_CI13XXX is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LANGWELL is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_MASS_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_MULTI is not set # # OTG and related infrastructure # # CONFIG_NOP_USB_XCEIV is not set -# CONFIG_UWB is not set -# CONFIG_MMC is not set +CONFIG_UWB=m +CONFIG_UWB_HWA=m +CONFIG_UWB_WHCI=m +# CONFIG_UWB_WLP is not set +# CONFIG_UWB_I1480U is not set +CONFIG_MMC=m +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=m +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_AT91 is not set +# CONFIG_MMC_ATMELMCI is not set +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set # CONFIG_MEMSTICK is not set -# CONFIG_NEW_LEDS is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=m + +# +# LED drivers +# + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +# CONFIG_LEDS_TRIGGER_TIMER is not set +# CONFIG_LEDS_TRIGGER_IDE_DISK is not set +# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set + +# +# iptables trigger is under Netfilter config (LED target) +# # CONFIG_ACCESSIBILITY is not set # CONFIG_INFINIBAND is not set # CONFIG_RTC_CLASS is not set @@ -1504,22 +1775,18 @@ CONFIG_STAGING=y # CONFIG_STAGING_EXCLUDE_BUILD is not set # CONFIG_ET131X is not set # CONFIG_USB_IP_COMMON is not set -# CONFIG_PRISM2_USB is not set +# CONFIG_W35UND is not set # CONFIG_ECHO is not set +# CONFIG_OTUS is not set # CONFIG_COMEDI is not set # CONFIG_ASUS_OLED is not set # CONFIG_ALTERA_PCIE_CHDMA is not set -# CONFIG_RTL8187SE is not set -# CONFIG_RTL8192SU is not set +# CONFIG_R8187SE is not set # CONFIG_RTL8192E is not set # CONFIG_INPUT_MIMIO is not set # CONFIG_TRANZPORT is not set # -# Android -# - -# # Qualcomm MSM Camera And Video # @@ -1527,7 +1794,6 @@ CONFIG_STAGING=y # Camera Sensor Selection # # CONFIG_INPUT_GPIO is not set -# CONFIG_DST is not set # CONFIG_POHMELFS is not set # CONFIG_B3DFG is not set # CONFIG_PLAN9AUTH is not set @@ -1544,28 +1810,55 @@ CONFIG_STAGING=y # # CONFIG_RAR_REGISTER is not set # CONFIG_IIO is not set +# CONFIG_RAMZSWAP is not set +# CONFIG_BATMAN_ADV is not set +# CONFIG_STRIP is not set +# CONFIG_WAVELAN is not set CONFIG_FB_SM7XX=y -CONFIG_FB_SM7XX_ACCEL=y +# CONFIG_FB_SM7XX_ACCEL is not set # # File systems # -# CONFIG_EXT2_FS is not set +CONFIG_EXT2_FS=m +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set CONFIG_EXT3_FS=y # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set CONFIG_EXT3_FS_XATTR=y CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y -# CONFIG_EXT4_FS is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_XATTR=y +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set +# CONFIG_EXT4_DEBUG is not set CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +CONFIG_REISERFS_PROC_INFO=y +CONFIG_REISERFS_FS_XATTR=y +# CONFIG_REISERFS_FS_POSIX_ACL is not set +# CONFIG_REISERFS_FS_SECURITY is not set +CONFIG_JFS_FS=m +CONFIG_JFS_POSIX_ACL=y +# CONFIG_JFS_SECURITY is not set +# CONFIG_JFS_DEBUG is not set +# CONFIG_JFS_STATISTICS is not set CONFIG_FS_POSIX_ACL=y -# CONFIG_XFS_FS is not set +CONFIG_XFS_FS=m +CONFIG_XFS_QUOTA=y +CONFIG_XFS_POSIX_ACL=y +# CONFIG_XFS_RT is not set +# CONFIG_XFS_DEBUG is not set # CONFIG_GFS2_FS is not set # CONFIG_OCFS2_FS is not set -# CONFIG_BTRFS_FS is not set +CONFIG_BTRFS_FS=m +# CONFIG_BTRFS_FS_POSIX_ACL is not set # CONFIG_NILFS2_FS is not set CONFIG_FILE_LOCKING=y CONFIG_FSNOTIFY=y @@ -1575,17 +1868,25 @@ CONFIG_INOTIFY_USER=y CONFIG_QUOTA=y # CONFIG_QUOTA_NETLINK_INTERFACE is not set CONFIG_PRINT_QUOTA_WARNING=y +CONFIG_QUOTA_TREE=m # CONFIG_QFMT_V1 is not set -# CONFIG_QFMT_V2 is not set +CONFIG_QFMT_V2=m CONFIG_QUOTACTL=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set +CONFIG_AUTOFS_FS=m +CONFIG_AUTOFS4_FS=m # CONFIG_FUSE_FS is not set # # Caches # -# CONFIG_FSCACHE is not set +CONFIG_FSCACHE=m +# CONFIG_FSCACHE_STATS is not set +# CONFIG_FSCACHE_HISTOGRAM is not set +# CONFIG_FSCACHE_DEBUG is not set +# CONFIG_FSCACHE_OBJECT_LIST is not set +CONFIG_CACHEFILES=m +# CONFIG_CACHEFILES_DEBUG is not set +# CONFIG_CACHEFILES_HISTOGRAM is not set # # CD-ROM/DVD Filesystems @@ -1599,11 +1900,13 @@ CONFIG_ZISOFS=y # DOS/FAT/NT Filesystems # CONFIG_FAT_FS=m -# CONFIG_MSDOS_FS is not set +CONFIG_MSDOS_FS=m CONFIG_VFAT_FS=m CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set +CONFIG_NTFS_FS=m +# CONFIG_NTFS_DEBUG is not set +CONFIG_NTFS_RW=y # # Pseudo filesystems @@ -1616,23 +1919,60 @@ CONFIG_SYSFS=y CONFIG_TMPFS=y # CONFIG_TMPFS_POSIX_ACL is not set # CONFIG_HUGETLB_PAGE is not set -# CONFIG_CONFIGFS_FS is not set -# CONFIG_MISC_FILESYSTEMS is not set +CONFIG_CONFIGFS_FS=m +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_CRAMFS=m +CONFIG_SQUASHFS=m +CONFIG_SQUASHFS_EMBEDDED=y +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +CONFIG_ROMFS_FS=m +CONFIG_ROMFS_BACKED_BY_BLOCK=y +# CONFIG_ROMFS_BACKED_BY_MTD is not set +# CONFIG_ROMFS_BACKED_BY_BOTH is not set +CONFIG_ROMFS_ON_BLOCK=y +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=m CONFIG_NFS_V3=y CONFIG_NFS_V3_ACL=y # CONFIG_NFS_V4 is not set -# CONFIG_NFSD is not set +# CONFIG_NFS_FSCACHE is not set +CONFIG_NFSD=m +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +CONFIG_NFSD_V4=y CONFIG_LOCKD=m CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=m CONFIG_NFS_ACL_SUPPORT=m CONFIG_NFS_COMMON=y CONFIG_SUNRPC=m -# CONFIG_RPCSEC_GSS_KRB5 is not set +CONFIG_SUNRPC_GSS=m +CONFIG_RPCSEC_GSS_KRB5=m # CONFIG_RPCSEC_GSS_SPKM3 is not set # CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set +CONFIG_CIFS=m +# CONFIG_CIFS_STATS is not set +# CONFIG_CIFS_WEAK_PW_HASH is not set +# CONFIG_CIFS_UPCALL is not set +# CONFIG_CIFS_XATTR is not set +# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_DFS_UPCALL is not set +# CONFIG_CIFS_EXPERIMENTAL is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set @@ -1643,45 +1983,45 @@ CONFIG_SUNRPC=m # CONFIG_PARTITION_ADVANCED is not set CONFIG_MSDOS_PARTITION=y CONFIG_NLS=y -CONFIG_NLS_DEFAULT="utf-8" -# CONFIG_NLS_CODEPAGE_437 is not set -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -# CONFIG_NLS_ISO8859_1 is not set -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=m +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_UTF8=y # CONFIG_DLM is not set # @@ -1695,125 +2035,155 @@ CONFIG_FRAME_WARN=1024 # CONFIG_MAGIC_SYSRQ is not set CONFIG_STRIP_ASM_SYMS=y # CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_FS is not set +CONFIG_DEBUG_FS=y # CONFIG_HEADERS_CHECK is not set # CONFIG_DEBUG_KERNEL is not set # CONFIG_SLUB_DEBUG_ON is not set # CONFIG_SLUB_STATS is not set +CONFIG_STACKTRACE=y # CONFIG_DEBUG_MEMORY_INIT is not set # CONFIG_RCU_CPU_STALL_DETECTOR is not set CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_NOP_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_RING_BUFFER=y +CONFIG_EVENT_TRACING=y +CONFIG_CONTEXT_SWITCH_TRACER=y +CONFIG_RING_BUFFER_ALLOW_SWAP=y +CONFIG_TRACING=y CONFIG_TRACING_SUPPORT=y # CONFIG_FTRACE is not set +# CONFIG_DYNAMIC_DEBUG is not set # CONFIG_SAMPLES is not set CONFIG_HAVE_ARCH_KGDB=y +CONFIG_EARLY_PRINTK=y # CONFIG_CMDLINE_BOOL is not set # # Security options # -# CONFIG_KEYS is not set +CONFIG_KEYS=y +CONFIG_KEYS_DEBUG_PROC_KEYS=y # CONFIG_SECURITY is not set # CONFIG_SECURITYFS is not set -# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set +# CONFIG_DEFAULT_SECURITY_SMACK is not set +# CONFIG_DEFAULT_SECURITY_TOMOYO is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +CONFIG_XOR_BLOCKS=m +CONFIG_ASYNC_CORE=m +CONFIG_ASYNC_MEMCPY=m +CONFIG_ASYNC_XOR=m +CONFIG_ASYNC_PQ=m +CONFIG_ASYNC_RAID6_RECOV=m CONFIG_CRYPTO=y # # Crypto core or helper # +CONFIG_CRYPTO_FIPS=y CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=m CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER=m CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=m CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_PCOMP=y -CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER=m CONFIG_CRYPTO_MANAGER2=y -# CONFIG_CRYPTO_GF128MUL is not set -# CONFIG_CRYPTO_NULL is not set +CONFIG_CRYPTO_GF128MUL=m +CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_WORKQUEUE=y -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_TEST is not set +CONFIG_CRYPTO_CRYPTD=m +CONFIG_CRYPTO_AUTHENC=m +CONFIG_CRYPTO_TEST=m # # Authenticated Encryption with Associated Data # -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=m +CONFIG_CRYPTO_SEQIV=m # # Block modes # -CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CTR is not set +CONFIG_CRYPTO_CBC=m +CONFIG_CRYPTO_CTR=m # CONFIG_CRYPTO_CTS is not set -# CONFIG_CRYPTO_ECB is not set -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_PCBC is not set -# CONFIG_CRYPTO_XTS is not set +CONFIG_CRYPTO_ECB=m +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_XTS=m # # Hash modes # -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_XCBC is not set +CONFIG_CRYPTO_HMAC=m +CONFIG_CRYPTO_XCBC=m # CONFIG_CRYPTO_VMAC is not set # # Digest # -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_GHASH is not set -# CONFIG_CRYPTO_MD4 is not set -# CONFIG_CRYPTO_MD5 is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set +CONFIG_CRYPTO_CRC32C=m +CONFIG_CRYPTO_GHASH=m +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_RMD128=m +CONFIG_CRYPTO_RMD160=m +CONFIG_CRYPTO_RMD256=m +CONFIG_CRYPTO_RMD320=m +CONFIG_CRYPTO_SHA1=m +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_TGR192=m +CONFIG_CRYPTO_WP512=m # # Ciphers # -# CONFIG_CRYPTO_AES is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_ARC4 is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set +CONFIG_CRYPTO_AES=m +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_CAMELLIA=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +CONFIG_CRYPTO_DES=m +CONFIG_CRYPTO_FCRYPT=m +CONFIG_CRYPTO_KHAZAD=m +CONFIG_CRYPTO_SALSA20=m +CONFIG_CRYPTO_SEED=m +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m # # Compression # -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_ZLIB is not set -# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_DEFLATE=m +CONFIG_CRYPTO_ZLIB=m +CONFIG_CRYPTO_LZO=m # # Random Number Generation # -# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_ANSI_CPRNG=m CONFIG_CRYPTO_HW=y # CONFIG_CRYPTO_DEV_HIFN_795X is not set -# CONFIG_BINARY_PRINTF is not set +CONFIG_BINARY_PRINTF=y # # Library routines @@ -1821,14 +2191,20 @@ CONFIG_CRYPTO_HW=y CONFIG_BITREVERSE=y CONFIG_GENERIC_FIND_LAST_BIT=y # CONFIG_CRC_CCITT is not set -# CONFIG_CRC16 is not set +CONFIG_CRC16=y CONFIG_CRC_T10DIF=y # CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y # CONFIG_CRC7 is not set -# CONFIG_LIBCRC32C is not set +CONFIG_LIBCRC32C=m CONFIG_AUDIT_GENERIC=y -CONFIG_ZLIB_INFLATE=m +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=m +CONFIG_LZO_COMPRESS=m +CONFIG_LZO_DECOMPRESS=m +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_DMA=y -- 1.6.5.6 From teawater@gmail.com Mon Jan 4 17:22:30 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jan 2010 17:22:40 +0100 (CET) Received: from mail-px0-f181.google.com ([209.85.216.181]:50118 "EHLO mail-px0-f181.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493232Ab0ADQWa convert rfc822-to-8bit (ORCPT ); Mon, 4 Jan 2010 17:22:30 +0100 Received: by pxi11 with SMTP id 11so11163593pxi.22 for ; Mon, 04 Jan 2010 08:22:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:in-reply-to:references :from:date:message-id:subject:to:cc:content-type :content-transfer-encoding; bh=mQa0CiU4AC7g1xO7anA8K7eeg/6JSqZErSxudOSKvfs=; b=xCZyPdamIETLdJ+B3JMYHSR/MnVhGWZ+zwddlyXxybztSFecwhWy15cLufpb8U/Vc4 rbYJGyT0esQpO0zmJHY+qghX/oZjGQCNdZrFvJwdH8nDbK3NAFqlqVU6aJBGNo6+wbk5 15ObUFZAXFKtFBnK78JU6VxDqNCvdGRZZxF2k= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-type:content-transfer-encoding; b=a6VeVxNTgl4oP/1J5GZN5BT7V27B3f/Gpum4lVLQvaEg/Vt4cxqWfgw5b7CHbBivjG i49xWNGon7AThh+/rD2lOy0mNVHw9j4z21Lv7PKxTdZgqiL8hD9K18U76sKZ2nV47jHW N+6flmy1CAnpBzPk791fbnBDz72uKQ4b7hOGE= MIME-Version: 1.0 Received: by 10.142.248.42 with SMTP id v42mr15302225wfh.187.1262622142065; Mon, 04 Jan 2010 08:22:22 -0800 (PST) In-Reply-To: <20100103151406.20228c3a@infradead.org> References: <4B411F14.1040302@kernel.org> <20100103150134.5bdab023@infradead.org> <4B412341.2010002@kernel.org> <20100103151406.20228c3a@infradead.org> From: Hui Zhu Date: Tue, 5 Jan 2010 00:22:02 +0800 Message-ID: Subject: Re: [PATCH] stack2core: show stack message and convert it to core file when kernel die To: Arjan van de Ven Cc: Tejun Heo , Russell King , saeed bishara , Catalin Marinas , Nicolas Pitre , Ralf Baechle , David Daney , Tomaso Paoletti , Chris Dearman , Paul Gortmaker , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Frederic Weisbecker , Alexey Dobriyan , Brian Gerst , Rusty Russell , Andrew Morton , Steven Rostedt , Greg Kroah-Hartman , "Paul E. McKenney" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Coly Li Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT X-archive-position: 25509 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: teawater@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2452 Content-Length: 2403 Lines: 60 Thanks for your mail. I am not sure s2c is not a duplicating work with with others or not. The main work of it is give user a coredump when kernel die like a user level program die. The user can very easy use it with gdb. Now, it support x86/x8664/mips/arm. It's very easy to extend. To support a new arch is not a very hard work. (I use half a day make it support mips and mips64 include the test work.) And the s2c convert program can run on every environment. I try it in x86, x8664, mipsn32 . It didn't depend on any special lib. User can compile it with "gcc s2c.c" to get it. And run it in a small board that didn't have some script support. markup_oops.pl sames still not support cross compile environment. It get module message with modinfo,right? And use some objdump and so on. So even if it support cross compile environment, user use it will need set which objdump he want use. Which mod dir he want use. Right? For the s2c, user just "s2c < message >core" It did everything with itself. After that, gdb vmlinux core. Best regards, Hui On Mon, Jan 4, 2010 at 07:14, Arjan van de Ven wrote: > On Mon, 04 Jan 2010 08:07:45 +0900 > Tejun Heo wrote: > >> On 01/04/2010 08:01 AM, Arjan van de Ven wrote: >> > On Mon, 04 Jan 2010 07:49:56 +0900 >> > Tejun Heo wrote: >> >> >> >> If implementing parsing of oops message in C is too awkward >> >> (unsurprising at all), maybe implementing a converter in perl or >> >> python is the easiest way so that it takes the oops message and >> >> puts out well formatted input for the s2c program? >> > >> > you mean like scripts/markup_oops.pl ? >> >> Whichever one works but s2c wouldn't require symbol decoding.  Maybe >> we can simply add an option to tell it to just parse the oops and >> output it in machine friendly format.  Oh, also, the patch does add >> new information the module load addresses.  We should be able to add >> those to the oops message in a compact form. > > actually one does not need those; you know the start address of the > function already from the current oops output, and since you know the > address of the function within the module as well, you know the start > address of the module. > > > -- > Arjan van de Ven        Intel Open Source Technology Centre > For development, discussion and tips for power savings, > visit http://www.lesswatts.org > From wim@iguana.be Mon Jan 4 17:47:01 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jan 2010 17:47:08 +0100 (CET) Received: from mailrelay004.isp.belgacom.be ([195.238.6.170]:57434 "EHLO mailrelay004.isp.belgacom.be" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493234Ab0ADQrB (ORCPT ); Mon, 4 Jan 2010 17:47:01 +0100 X-Belgacom-Dynamic: yes X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: ApoEAI6qQUtbstMh/2dsb2JhbADUTQqEJgQ Received: from unknown (HELO infomag) ([91.178.211.33]) by relay.skynet.be with ESMTP; 04 Jan 2010 17:46:54 +0100 Received: from wim by infomag with local (Exim 4.69) (envelope-from ) id 1NRq50-0007bj-Fy; Mon, 04 Jan 2010 17:46:54 +0100 Date: Mon, 4 Jan 2010 17:46:54 +0100 From: Wim Van Sebroeck To: Florian Fainelli Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, netdev@vger.kernel.org, David Miller Subject: Re: [PATCH 2/4] ar7: implement clock API Message-ID: <20100104164654.GG5402@infomag.iguana.be> References: <201001032117.07022.florian@openwrt.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <201001032117.07022.florian@openwrt.org> User-Agent: Mutt/1.5.18 (2008-05-17) X-archive-position: 25510 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wim@iguana.be Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2476 Content-Length: 13418 Lines: 447 Hi Florian, Concerning the watchdog driver: Acked-by: Wim Van Sebroeck Kind regards and best wishes for 2010, Wim. > This patch makes the ar7 clock code implement the > Linux clk API. Drivers using the various clocks > available in the SoC are updated accordingly. > > Signed-off-by: Florian Fainelli > --- > diff --git a/arch/mips/ar7/clock.c b/arch/mips/ar7/clock.c > index cc65c8e..fc0e715 100644 > --- a/arch/mips/ar7/clock.c > +++ b/arch/mips/ar7/clock.c > @@ -1,6 +1,7 @@ > /* > * Copyright (C) 2007 Felix Fietkau > * Copyright (C) 2007 Eugene Konev > + * Copyright (C) 2009 Florian Fainelli > * > * This program is free software; you can redistribute it and/or modify > * it under the terms of the GNU General Public License as published by > @@ -24,6 +25,8 @@ > #include > #include > #include > +#include > +#include > > #include > #include > @@ -94,12 +97,16 @@ struct tnetd7200_clocks { > struct tnetd7200_clock usb; > }; > > -int ar7_cpu_clock = 150000000; > -EXPORT_SYMBOL(ar7_cpu_clock); > -int ar7_bus_clock = 125000000; > -EXPORT_SYMBOL(ar7_bus_clock); > -int ar7_dsp_clock; > -EXPORT_SYMBOL(ar7_dsp_clock); > +static struct clk bus_clk = { > + .rate = 125000000, > +}; > + > +static struct clk cpu_clk = { > + .rate = 150000000, > +}; > + > +static struct clk dsp_clk; > +static struct clk vbus_clk; > > static void approximate(int base, int target, int *prediv, > int *postdiv, int *mul) > @@ -185,7 +192,7 @@ static int tnetd7300_get_clock(u32 shift, struct tnetd7300_clock *clock, > base_clock = AR7_XTAL_CLOCK; > break; > case BOOT_PLL_SOURCE_CPU: > - base_clock = ar7_cpu_clock; > + base_clock = cpu_clk.rate; > break; > } > > @@ -212,11 +219,11 @@ static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock, > u32 *bootcr, u32 frequency) > { > int prediv, postdiv, mul; > - int base_clock = ar7_bus_clock; > + int base_clock = bus_clk.rate; > > switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) { > case BOOT_PLL_SOURCE_BUS: > - base_clock = ar7_bus_clock; > + base_clock = bus_clk.rate; > break; > case BOOT_PLL_SOURCE_REF: > base_clock = AR7_REF_CLOCK; > @@ -225,7 +232,7 @@ static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock, > base_clock = AR7_XTAL_CLOCK; > break; > case BOOT_PLL_SOURCE_CPU: > - base_clock = ar7_cpu_clock; > + base_clock = cpu_clk.rate; > break; > } > > @@ -247,18 +254,18 @@ static void __init tnetd7300_init_clocks(void) > ioremap_nocache(UR8_REGS_CLOCKS, > sizeof(struct tnetd7300_clocks)); > > - ar7_bus_clock = tnetd7300_get_clock(BUS_PLL_SOURCE_SHIFT, > + bus_clk.rate = tnetd7300_get_clock(BUS_PLL_SOURCE_SHIFT, > &clocks->bus, bootcr, AR7_AFE_CLOCK); > > if (*bootcr & BOOT_PLL_ASYNC_MODE) > - ar7_cpu_clock = tnetd7300_get_clock(CPU_PLL_SOURCE_SHIFT, > + cpu_clk.rate = tnetd7300_get_clock(CPU_PLL_SOURCE_SHIFT, > &clocks->cpu, bootcr, AR7_AFE_CLOCK); > else > - ar7_cpu_clock = ar7_bus_clock; > + cpu_clk.rate = bus_clk.rate; > > - if (ar7_dsp_clock == 250000000) > + if (dsp_clk.rate == 250000000) > tnetd7300_set_clock(DSP_PLL_SOURCE_SHIFT, &clocks->dsp, > - bootcr, ar7_dsp_clock); > + bootcr, dsp_clk.rate); > > iounmap(clocks); > iounmap(bootcr); > @@ -343,20 +350,20 @@ static void __init tnetd7200_init_clocks(void) > printk(KERN_INFO "Clocks: Setting DSP clock\n"); > calculate(dsp_base, TNETD7200_DEF_DSP_CLK, > &dsp_prediv, &dsp_postdiv, &dsp_mul); > - ar7_bus_clock = > + bus_clk.rate = > ((dsp_base / dsp_prediv) * dsp_mul) / dsp_postdiv; > tnetd7200_set_clock(dsp_base, &clocks->dsp, > dsp_prediv, dsp_postdiv * 2, dsp_postdiv, dsp_mul * 2, > - ar7_bus_clock); > + bus_clk.rate); > > printk(KERN_INFO "Clocks: Setting CPU clock\n"); > calculate(cpu_base, TNETD7200_DEF_CPU_CLK, &cpu_prediv, > &cpu_postdiv, &cpu_mul); > - ar7_cpu_clock = > + cpu_clk.rate = > ((cpu_base / cpu_prediv) * cpu_mul) / cpu_postdiv; > tnetd7200_set_clock(cpu_base, &clocks->cpu, > cpu_prediv, cpu_postdiv, -1, cpu_mul, > - ar7_cpu_clock); > + cpu_clk.rate); > > } else > if (*bootcr & BOOT_PLL_2TO1_MODE) { > @@ -365,48 +372,90 @@ static void __init tnetd7200_init_clocks(void) > printk(KERN_INFO "Clocks: Setting CPU clock\n"); > calculate(cpu_base, TNETD7200_DEF_CPU_CLK, &cpu_prediv, > &cpu_postdiv, &cpu_mul); > - ar7_cpu_clock = ((cpu_base / cpu_prediv) * cpu_mul) > + cpu_clk.rate = ((cpu_base / cpu_prediv) * cpu_mul) > / cpu_postdiv; > tnetd7200_set_clock(cpu_base, &clocks->cpu, > cpu_prediv, cpu_postdiv, -1, cpu_mul, > - ar7_cpu_clock); > + cpu_clk.rate); > > printk(KERN_INFO "Clocks: Setting DSP clock\n"); > calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv, > &dsp_postdiv, &dsp_mul); > - ar7_bus_clock = ar7_cpu_clock / 2; > + bus_clk.rate = cpu_clk.rate / 2; > tnetd7200_set_clock(dsp_base, &clocks->dsp, > dsp_prediv, dsp_postdiv * 2, dsp_postdiv, > - dsp_mul * 2, ar7_bus_clock); > + dsp_mul * 2, bus_clk.rate); > } else { > printk(KERN_INFO "Clocks: Sync 1:1 mode\n"); > > printk(KERN_INFO "Clocks: Setting DSP clock\n"); > calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv, > &dsp_postdiv, &dsp_mul); > - ar7_bus_clock = ((dsp_base / dsp_prediv) * dsp_mul) > + bus_clk.rate = ((dsp_base / dsp_prediv) * dsp_mul) > / dsp_postdiv; > tnetd7200_set_clock(dsp_base, &clocks->dsp, > dsp_prediv, dsp_postdiv * 2, dsp_postdiv, > - dsp_mul * 2, ar7_bus_clock); > + dsp_mul * 2, bus_clk.rate); > > - ar7_cpu_clock = ar7_bus_clock; > + cpu_clk.rate = bus_clk.rate; > } > > printk(KERN_INFO "Clocks: Setting USB clock\n"); > - usb_base = ar7_bus_clock; > + usb_base = bus_clk.rate; > calculate(usb_base, TNETD7200_DEF_USB_CLK, &usb_prediv, > &usb_postdiv, &usb_mul); > tnetd7200_set_clock(usb_base, &clocks->usb, > usb_prediv, usb_postdiv, -1, usb_mul, > TNETD7200_DEF_USB_CLK); > > - ar7_dsp_clock = ar7_cpu_clock; > + dsp_clk.rate = cpu_clk.rate; > > iounmap(clocks); > iounmap(bootcr); > } > > +/* > + * Linux clock API > + */ > +int clk_enable(struct clk *clk) > +{ > + return 0; > +} > +EXPORT_SYMBOL(clk_enable); > + > +void clk_disable(struct clk *clk) > +{ > +} > +EXPORT_SYMBOL(clk_disable); > + > +unsigned long clk_get_rate(struct clk *clk) > +{ > + return clk->rate; > +} > +EXPORT_SYMBOL(clk_get_rate); > + > +struct clk *clk_get(struct device *dev, const char *id) > +{ > + if (!strcmp(id, "bus")) > + return &bus_clk; > + /* cpmac and vbus share the same rate */ > + if (!strcmp(id, "cpmac")) > + return &vbus_clk; > + if (!strcmp(id, "cpu")) > + return &cpu_clk; > + if (!strcmp(id, "dsp")); > + return &dsp_clk; > + if (!strcmp(id, "vbus")) > + return &vbus_clk; > + return ERR_PTR(-ENOENT); > +} > +EXPORT_SYMBOL(clk_get); > + > +void clk_put(struct clk *clk) > +{ > +} > +EXPORT_SYMBOL(clk_put); > + > int __init ar7_init_clocks(void) > { > switch (ar7_chip_id()) { > @@ -415,12 +464,14 @@ int __init ar7_init_clocks(void) > tnetd7200_init_clocks(); > break; > case AR7_CHIP_7300: > - ar7_dsp_clock = tnetd7300_dsp_clock(); > + dsp_clk.rate = tnetd7300_dsp_clock(); > tnetd7300_init_clocks(); > break; > default: > break; > } > + /* adjust vbus clock rate */ > + vbus_clk.rate = bus_clk.rate / 2; > > return 0; > } > diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c > index acbe147..c591f69 100644 > --- a/arch/mips/ar7/platform.c > +++ b/arch/mips/ar7/platform.c > @@ -35,6 +35,7 @@ > #include > #include > #include > +#include > > #include > #include > @@ -507,13 +508,18 @@ static int __init ar7_register_devices(void) > u32 *bootcr, val; > #ifdef CONFIG_SERIAL_8250 > static struct uart_port uart_port[2] __initdata; > + struct clk *bus_clk; > > memset(uart_port, 0, sizeof(struct uart_port) * 2); > > + bus_clk = clk_get(NULL, "bus"); > + if (IS_ERR(bus_clk)) > + panic("unable to get bus clk\n"); > + > uart_port[0].type = PORT_16550A; > uart_port[0].line = 0; > uart_port[0].irq = AR7_IRQ_UART0; > - uart_port[0].uartclk = ar7_bus_freq() / 2; > + uart_port[0].uartclk = clk_get_rate(bus_clk) / 2; > uart_port[0].iotype = UPIO_MEM32; > uart_port[0].mapbase = AR7_REGS_UART0; > uart_port[0].membase = ioremap(uart_port[0].mapbase, 256); > @@ -528,7 +534,7 @@ static int __init ar7_register_devices(void) > uart_port[1].type = PORT_16550A; > uart_port[1].line = 1; > uart_port[1].irq = AR7_IRQ_UART1; > - uart_port[1].uartclk = ar7_bus_freq() / 2; > + uart_port[1].uartclk = clk_get_rate(bus_clk) / 2; > uart_port[1].iotype = UPIO_MEM32; > uart_port[1].mapbase = UR8_REGS_UART1; > uart_port[1].membase = ioremap(uart_port[1].mapbase, 256); > diff --git a/arch/mips/ar7/time.c b/arch/mips/ar7/time.c > index a1fba89..5fb8a01 100644 > --- a/arch/mips/ar7/time.c > +++ b/arch/mips/ar7/time.c > @@ -20,11 +20,21 @@ > > #include > #include > +#include > +#include > > #include > #include > > void __init plat_time_init(void) > { > - mips_hpt_frequency = ar7_cpu_freq() / 2; > + struct clk *cpu_clk; > + > + cpu_clk = clk_get(NULL, "cpu"); > + if (IS_ERR(cpu_clk)) { > + printk(KERN_ERR "unable to get cpu clock\n"); > + return; > + } > + > + mips_hpt_frequency = clk_get_rate(cpu_clk) / 2; > } > diff --git a/arch/mips/include/asm/mach-ar7/ar7.h b/arch/mips/include/asm/mach-ar7/ar7.h > index 21cbbc7..2410360 100644 > --- a/arch/mips/include/asm/mach-ar7/ar7.h > +++ b/arch/mips/include/asm/mach-ar7/ar7.h > @@ -105,26 +105,10 @@ static inline u8 ar7_chip_rev(void) > return (readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x14)) >> 16) & 0xff; > } > > -static inline int ar7_cpu_freq(void) > -{ > - return ar7_cpu_clock; > -} > - > -static inline int ar7_bus_freq(void) > -{ > - return ar7_bus_clock; > -} > - > -static inline int ar7_vbus_freq(void) > -{ > - return ar7_bus_clock / 2; > -} > -#define ar7_cpmac_freq ar7_vbus_freq > - > -static inline int ar7_dsp_freq(void) > -{ > - return ar7_dsp_clock; > -} > +struct clk { > + unsigned int rate; > + int id; > +}; > > static inline int ar7_has_high_cpmac(void) > { > diff --git a/drivers/net/cpmac.c b/drivers/net/cpmac.c > index 8d0be26..bf2072e 100644 > --- a/drivers/net/cpmac.c > +++ b/drivers/net/cpmac.c > @@ -36,6 +36,7 @@ > #include > #include > #include > +#include > #include > #include > > @@ -294,9 +295,16 @@ static int cpmac_mdio_write(struct mii_bus *bus, int phy_id, > > static int cpmac_mdio_reset(struct mii_bus *bus) > { > + struct clk *cpmac_clk; > + > + cpmac_clk = clk_get(&bus->dev, "cpmac"); > + if (IS_ERR(cpmac_clk)) { > + printk(KERN_ERR "unable to get cpmac clock\n"); > + return -1; > + } > ar7_device_reset(AR7_RESET_BIT_MDIO); > cpmac_write(bus->priv, CPMAC_MDIO_CONTROL, MDIOC_ENABLE | > - MDIOC_CLKDIV(ar7_cpmac_freq() / 2200000 - 1)); > + MDIOC_CLKDIV(clk_get_rate(cpmac_clk) / 2200000 - 1)); > return 0; > } > > diff --git a/drivers/watchdog/ar7_wdt.c b/drivers/watchdog/ar7_wdt.c > index 2e94b71..2bb95cd 100644 > --- a/drivers/watchdog/ar7_wdt.c > +++ b/drivers/watchdog/ar7_wdt.c > @@ -34,6 +34,7 @@ > #include > #include > #include > +#include > > #include > #include > @@ -80,6 +81,8 @@ static struct resource *ar7_regs_wdt; > /* Pointer to the remapped WDT IO space */ > static struct ar7_wdt *ar7_wdt; > > +static struct clk *vbus_clk; > + > static void ar7_wdt_kick(u32 value) > { > WRITE_REG(ar7_wdt->kick_lock, 0x5555); > @@ -138,17 +141,19 @@ static void ar7_wdt_disable(u32 value) > static void ar7_wdt_update_margin(int new_margin) > { > u32 change; > + u32 vbus_rate; > > - change = new_margin * (ar7_vbus_freq() / prescale_value); > + vbus_rate = clk_get_rate(vbus_clk); > + change = new_margin * (vbus_rate / prescale_value); > if (change < 1) > change = 1; > if (change > 0xffff) > change = 0xffff; > ar7_wdt_change(change); > - margin = change * prescale_value / ar7_vbus_freq(); > + margin = change * prescale_value / vbus_rate; > printk(KERN_INFO DRVNAME > ": timer margin %d seconds (prescale %d, change %d, freq %d)\n", > - margin, prescale_value, change, ar7_vbus_freq()); > + margin, prescale_value, change, vbus_rate); > } > > static void ar7_wdt_enable_wdt(void) > @@ -298,6 +303,13 @@ static int __devinit ar7_wdt_probe(struct platform_device *pdev) > goto out_mem_region; > } > > + vbus_clk = clk_get(NULL, "vbus"); > + if (IS_ERR(vbus_clk)) { > + printk(KERN_ERR DRVNAME ": could not get vbus clock\n"); > + rc = PTR_ERR(vbus_clk); > + goto out_mem_region; > + } > + > ar7_wdt_disable_wdt(); > ar7_wdt_prescale(prescale_value); > ar7_wdt_update_margin(margin); > From ddaney@caviumnetworks.com Mon Jan 4 18:55:25 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jan 2010 18:55:39 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:10867 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493254Ab0ADRzZ (ORCPT ); Mon, 4 Jan 2010 18:55:25 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Mon, 04 Jan 2010 09:55:10 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 4 Jan 2010 09:54:50 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Mon, 4 Jan 2010 09:54:50 -0800 Message-ID: <4B422B68.3090508@caviumnetworks.com> Date: Mon, 04 Jan 2010 09:54:48 -0800 From: David Daney User-Agent: Thunderbird 2.0.0.21 (X11/20090320) MIME-Version: 1.0 To: Florian Fainelli CC: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH 3/4] MIPS: deal with larger physical offset References: <201001032117.26581.florian@openwrt.org> In-Reply-To: <201001032117.26581.florian@openwrt.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 04 Jan 2010 17:54:50.0709 (UTC) FILETIME=[03208050:01CA8D67] X-archive-position: 25511 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2533 Content-Length: 2049 Lines: 65 Florian Fainelli wrote: > AR7 has a larger physical offset than other MIPS based > systems and therefore needs to setup handlers differently. > This version uses uasm instead of the hand crafted assembly > previously sent. This modification is also required for > running the kernel in mapped address space. > > Signed-off-by: David Daney > Signed-off-by: Eugene Konev > Signed-off-by: Florian Fainelli > --- > diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c > index 308e434..dbf52ab 100644 > --- a/arch/mips/kernel/traps.c > +++ b/arch/mips/kernel/traps.c > @@ -51,6 +51,8 @@ > #include > #include > > +#include "../mm/uasm.h" > + The first time this came up, it was suggested that uasm.h move to asm/uasm.h so that we don't have this ugliness. I think it is still a good idea. > extern void check_wait(void); > extern asmlinkage void r4k_wait(void); > extern asmlinkage void rollback_handle_int(void); > @@ -1283,9 +1285,18 @@ void *set_except_vector(int n, void *addr) > > exception_handlers[n] = handler; > if (n == 0 && cpu_has_divec) { > - *(u32 *)(ebase + 0x200) = 0x08000000 | > - (0x03ffffff & (handler >> 2)); > - local_flush_icache_range(ebase + 0x200, ebase + 0x204); > + unsigned long jump_mask = ~((1 << 28) - 1); > + u32 *buf = (u32 *)(ebase + 0x200); > + unsigned int k0 = 26; > + if((handler & jump_mask) == ((ebase + 0x200) & jump_mask)) { > + uasm_i_j(&buf, handler & jump_mask); > + uasm_i_nop(&buf); > + } else { > + UASM_i_LA(&buf, k0, handler); > + uasm_i_jr(&buf, k0); > + uasm_i_nop(&buf); > + } > + local_flush_icache_range(ebase + 0x200, (unsigned long)buf); I would expect that this causes section mismatch build warnings. You may have to make this function __init or __cpu_init (and change trap_init() to __cpu_init too). You should also fix the comment, as after the patch it is no longer accurate. > } > return (void *)old_handler; > } > > From tj@kernel.org Mon Jan 4 23:59:15 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jan 2010 23:59:21 +0100 (CET) Received: from hera.kernel.org ([140.211.167.34]:59269 "EHLO hera.kernel.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493268Ab0ADW7P (ORCPT ); Mon, 4 Jan 2010 23:59:15 +0100 Received: from htj.dyndns.org (localhost [127.0.0.1]) by hera.kernel.org (8.14.3/8.14.3) with ESMTP id o04MwLhE018502 (version=TLSv1/SSLv3 cipher=DHE-RSA-CAMELLIA256-SHA bits=256 verify=NO); Mon, 4 Jan 2010 22:58:23 GMT Received: from [127.0.0.2] (htj.dyndns.org [127.0.0.2]) by htj.dyndns.org (Postfix) with ESMTPSA id 173F51079D629; Tue, 5 Jan 2010 08:03:51 +0900 (KST) Message-ID: <4B4273D6.2010306@kernel.org> Date: Tue, 05 Jan 2010 08:03:50 +0900 From: Tejun Heo User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.5) Gecko/20091130 SUSE/3.0.0-1.1.1 Thunderbird/3.0 MIME-Version: 1.0 To: Hui Zhu CC: Arjan van de Ven , Russell King , saeed bishara , Catalin Marinas , Nicolas Pitre , Ralf Baechle , David Daney , Tomaso Paoletti , Chris Dearman , Paul Gortmaker , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Frederic Weisbecker , Alexey Dobriyan , Brian Gerst , Rusty Russell , Andrew Morton , Steven Rostedt , Greg Kroah-Hartman , "Paul E. McKenney" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Coly Li Subject: Re: [PATCH] stack2core: show stack message and convert it to core file when kernel die References: <4B411F14.1040302@kernel.org> <20100103150134.5bdab023@infradead.org> <4B412341.2010002@kernel.org> <20100103151406.20228c3a@infradead.org> In-Reply-To: X-Enigmail-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-archive-position: 25512 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tj@kernel.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2742 Content-Length: 673 Lines: 19 Hello, On 01/05/2010 01:22 AM, Hui Zhu wrote: > For the s2c, user just "s2c < message >core" It did everything with itself. > After that, gdb vmlinux core. It is true that by making the kernel oops message more verbose, s2c can be made way simpler. However, dependence on standard object tools or perl is already assumed and avoiding it doesn't really buy anything. I really like the idea but unfortunately I'm doubtful that it will be able to go upstream in the current form. The suggested solution (extending markup_oops.pl) won't be too much work, most of functionality will remain the same and will have much higher chance of getting included. Thanks. -- tejun From florian@openwrt.org Tue Jan 5 09:46:14 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 05 Jan 2010 09:46:17 +0100 (CET) Received: from mail-ew0-f223.google.com ([209.85.219.223]:39421 "EHLO mail-ew0-f223.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490960Ab0AEIqO (ORCPT ); Tue, 5 Jan 2010 09:46:14 +0100 Received: by ewy23 with SMTP id 23so1868137ewy.24 for ; Tue, 05 Jan 2010 00:46:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:sender:from:organization:to :subject:date:user-agent:cc:references:in-reply-to:mime-version :content-type:content-transfer-encoding:message-id; bh=P2/BsLjZdUMb28kHF5sqA4iQNPe5ZhaQUVZR/eVJM9Q=; b=fG+bk0N8gUyfiCnCyw8pzO5ChkrX641tpyFH745FDaZwqWG9Kio4PK72SzRwbAyQso B5RSSnC2IL7EwhxZA7zPT/p7WzQyCECAv1mgf3jsqTVdtlTni0gHQqp1Rl7dNlJlwYZA GHU5Jd5+BVpzRZkQzCtqC4Cm0fRUdt7HrX1JU= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:organization:to:subject:date:user-agent:cc:references :in-reply-to:mime-version:content-type:content-transfer-encoding :message-id; b=nbBoMeq1nk3evA64KKUXd5BX2anMUBMZ/6F6yfz+i6AYVTG2F0Yoq8mQ53LYfsNaxX pAMgNm/52/Sc3L3ZfwD9hy1cgCyO9ngGo6SAJHwyXYV9uGoIRPzmqHGLOImbGekj39cN yRbG8W6+MHMmlMJzwvNTYIYe6xWfU8U2vPPC8= Received: by 10.213.98.205 with SMTP id r13mr14332675ebn.89.1262681167403; Tue, 05 Jan 2010 00:46:07 -0800 (PST) Received: from flexo.localnet (bobafett.staff.proxad.net [213.228.1.121]) by mx.google.com with ESMTPS id 16sm13108908ewy.10.2010.01.05.00.46.06 (version=SSLv3 cipher=RC4-MD5); Tue, 05 Jan 2010 00:46:06 -0800 (PST) From: Florian Fainelli Organization: OpenWrt To: Alexander Clouter Subject: Re: [PATCH 4/4] MTD: include ar7part in the list of partitions parsers Date: Tue, 5 Jan 2010 09:41:42 +0100 User-Agent: KMail/1.12.2 (Linux/2.6.31-16-server; KDE/4.3.2; x86_64; ; ) Cc: linux-mips@linux-mips.org, linux-mtd@lists.infradead.org References: <201001032117.37459.florian@openwrt.org> <1262552177.3181.5891.camel@macbook.infradead.org> <2ve717-7pt.ln1@chipmunk.wormnet.eu> In-Reply-To: <2ve717-7pt.ln1@chipmunk.wormnet.eu> MIME-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201001050941.42161.florian@openwrt.org> X-archive-position: 25513 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3121 Content-Length: 4195 Lines: 120 Hi Alexander, On Sunday 03 January 2010 22:31:46 Alexander Clouter wrote: > In gmane.linux.drivers.mtd David Woodhouse wrote: > > On Sun, 2010-01-03 at 21:17 +0100, Florian Fainelli wrote: > >> This patch modifies the physmap-flash driver to include > >> the ar7part partition parser in the list of parsers to > >> use when a physmap-flash driver is registered. This is > >> required for AR7 to create partitions correctly. > > > > Hrm, perhaps we'd do better to allow the probe types to be specified in > > the platform physmap_flash_data? > > I am not completely convinced the ar7part approach is the best way as > you are: > 1) not actually reading a partition table and instead using a bunch of > 'magic' values to try to work out the partition layout > 2) it bears no resemble to what is seen by the ADAM2 bootloader > 3) regardless of whether you would actually want to, the user is unable > to amend the partition table and have Linux automagically set > the table apprioately > > I chatted with Florian a while back about this but we never continued > with it (Real Life[tm] seemed to get in the way) but I had cobbled the > following together: > ---- > diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c > index e2278c0..df33fea 100644 > --- a/arch/mips/ar7/platform.c > +++ b/arch/mips/ar7/platform.c > @@ -24,6 +24,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -467,6 +468,60 @@ static void cpmac_get_mac(int instance, unsigned char > *dev_addr) char2hex(mac[i * 3 + 1]); > } > > +static void __init detect_partitions(void) > +{ > + unsigned int i, start, end; > + int ret; > + char mtdenv[5], *buf; > + > + for (physmap_flash_data.nr_parts = 0; > + physmap_flash_data.nr_parts < 10; > + physmap_flash_data.nr_parts++) { > + sprintf(mtdenv, "mtd%d", physmap_flash_data.nr_parts); > + if (!prom_getenv(mtdenv)) > + break; > + } > + > + if (physmap_flash_data.nr_parts == 0) { > + printk(KERN_INFO "No partitions found for physmap MTD\n"); > + return; > + } > + if (physmap_flash_data.nr_parts == 10) > + printk(KERN_INFO "Reached nr_parts limit for physmap MTD\n"); > + > + physmap_flash_data.parts = kzalloc( > + sizeof(struct mtd_partition)*physmap_flash_data.nr_parts, > + GFP_KERNEL); > + if (!physmap_flash_data.parts) { > + printk(KERN_ERR "Unable to alloc physmap MTD parts struct\n"); > + return; > + } > + > + for (i = 0; i < physmap_flash_data.nr_parts; i++) { > + sprintf(mtdenv, "mtd%d", i); > + buf = prom_getenv(mtdenv); > + > + ret = sscanf(buf, "%x,%x", &start, &end); > + if (ret != 2 || start < 0x90000000 || start > 0x90400000 > + || end < 0x90000000 || end > 0x90400000 > + || start > end) { > + printk(KERN_WARNING "broken partition table for physmap\n"); > + kfree(physmap_flash_data.parts); > + physmap_flash_data.parts = NULL; > + physmap_flash_data.nr_parts = 0; > + return; > + } > + > + start -= 0x90000000; > + end -= 0x90000000; > + > + physmap_flash_data.parts[i].name = NULL; > + physmap_flash_data.parts[i].size = end - start; > + physmap_flash_data.parts[i].offset = start; > + physmap_flash_data.parts[i].mask_flags = MTD_WRITEABLE; > + } > +} > + > static void __init detect_leds(void) > { > char *prid, *usb_prod; > @@ -536,6 +591,7 @@ static int __init ar7_register_devices(void) > return res; > } > #endif /* CONFIG_SERIAL_8250 */ > + detect_partitions(); > res = platform_device_register(&physmap_flash); > if (res) > return res; > ---- > > It simply pulls apart the 'PROM' (aka ADAM2) config and uses that to > build the partition table. This is indeed simple but if I recall right the rationale behind ar7part was to create a sane partition layout no matter if the bootloader was ADAM2 or PSPBoot and the root filesystem type. JFFS2 and squashfs do not have the same erase-block size alignment constraints, ar7part deals with that too. When we last chatted about that I did not recall exactly those details. -- Regards, Florian From teawater@gmail.com Tue Jan 5 10:04:35 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 05 Jan 2010 10:04:38 +0100 (CET) Received: from mail-pw0-f45.google.com ([209.85.160.45]:63902 "EHLO mail-pw0-f45.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490985Ab0AEJEf convert rfc822-to-8bit (ORCPT ); Tue, 5 Jan 2010 10:04:35 +0100 Received: by pwj1 with SMTP id 1so10227251pwj.24 for ; Tue, 05 Jan 2010 01:04:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:in-reply-to:references :from:date:message-id:subject:to:cc:content-type :content-transfer-encoding; bh=tccDM0Qe8mSQVdIqClWAw/kADLps4idUuTg9kIjhSZk=; b=E4FESs50oIyxVhRLVJ+XKFj6Xb81nBHHLdedL1K5nv/6IKTzDlKxb1rsEgN0lAbRgC 9GDFw57g+kYl/xUYaiXmbDuLC09kKUkLxhcKOtfdxxnKNwMbFhMX0btN6Qr9bFMy/YAH PJ8RxolD+bmoHEcOoAE2o63AHJU1qfMgGxR/Q= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-type:content-transfer-encoding; b=nws820z5bCvmcMS/BKOusJn404uNnkqjruDBiOMv7bNGtDuSxrJBxgIzHdz9OHIBN9 3R3nqYATKWtHf/ebOWRbv8hEU8ClRtFtDwy3sxuojqFxsjy2WV3QkDvfytOSSc7UReXq CYsh5veyQUbT9r1Fh1AxdprNbvxewoPwJIewA= MIME-Version: 1.0 Received: by 10.142.1.22 with SMTP id 22mr14966512wfa.303.1262682267605; Tue, 05 Jan 2010 01:04:27 -0800 (PST) In-Reply-To: <4B4273D6.2010306@kernel.org> References: <4B411F14.1040302@kernel.org> <20100103150134.5bdab023@infradead.org> <4B412341.2010002@kernel.org> <20100103151406.20228c3a@infradead.org> <4B4273D6.2010306@kernel.org> From: Hui Zhu Date: Tue, 5 Jan 2010 17:04:07 +0800 Message-ID: Subject: Re: [PATCH] stack2core: show stack message and convert it to core file when kernel die To: Tejun Heo Cc: Arjan van de Ven , Russell King , saeed bishara , Catalin Marinas , Nicolas Pitre , Ralf Baechle , David Daney , Tomaso Paoletti , Chris Dearman , Paul Gortmaker , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Frederic Weisbecker , Alexey Dobriyan , Brian Gerst , Rusty Russell , Andrew Morton , Steven Rostedt , Greg Kroah-Hartman , "Paul E. McKenney" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Coly Li Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT X-archive-position: 25514 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: teawater@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3134 Content-Length: 1804 Lines: 58 Hi, I agree with read the current stack message is better. About the extending, I have some question with it: 1. markup_oops.pl have itself idea, it try use dmesg| markup_oops.pl show what happen to usr. This is different with s2c. I am not sure people like it have other function with it. Too much part of this file need to be change. It need rewrite, just the oops message parse part can be keep. 2. I use perl to work in a long time before, I know it good at parse the text, but I am not sure it good at handle struct like: struct mips64_elf_prstatus { struct s2c_elf_siginfo pr_info; uint16_t pr_cursig; uint64_t pr_sigpend; uint64_t pr_sighold; uint32_t pr_pid; uint32_t pr_ppid; uint32_t pr_pgrp; uint32_t pr_sid; struct s2c_timeval_64 pr_utime; struct s2c_timeval_64 pr_stime; struct s2c_timeval_64 pr_cutime; struct s2c_timeval_64 pr_cstime; uint64_t pr_reg[45]; uint32_t pr_fpvalid; } __attribute__ ((aligned(8))); Even if what happen, I will keep a c s2c with myself. :) Best regards, Hui On Tue, Jan 5, 2010 at 07:03, Tejun Heo wrote: > Hello, > > On 01/05/2010 01:22 AM, Hui Zhu wrote: >> For the s2c, user just "s2c < message >core" It did everything with itself. >> After that, gdb vmlinux core. > > It is true that by making the kernel oops message more verbose, s2c > can be made way simpler.  However, dependence on standard object tools > or perl is already assumed and avoiding it doesn't really buy > anything.  I really like the idea but unfortunately I'm doubtful that > it will be able to go upstream in the current form.  The suggested > solution (extending markup_oops.pl) won't be too much work, most of > functionality will remain the same and will have much higher chance of > getting included. > > Thanks. > > -- > tejun > From tj@kernel.org Tue Jan 5 10:15:37 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 05 Jan 2010 10:15:45 +0100 (CET) Received: from hera.kernel.org ([140.211.167.34]:44599 "EHLO hera.kernel.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490985Ab0AEJPh (ORCPT ); Tue, 5 Jan 2010 10:15:37 +0100 Received: from htj.dyndns.org (localhost [127.0.0.1]) by hera.kernel.org (8.14.3/8.14.3) with ESMTP id o059EnFn024251 (version=TLSv1/SSLv3 cipher=DHE-RSA-CAMELLIA256-SHA bits=256 verify=NO); Tue, 5 Jan 2010 09:14:51 GMT Received: from [127.0.0.2] (htj.dyndns.org [127.0.0.2]) by htj.dyndns.org (Postfix) with ESMTPSA id 8FC5D1006343A; Tue, 5 Jan 2010 18:20:23 +0900 (KST) Message-ID: <4B430457.5020906@kernel.org> Date: Tue, 05 Jan 2010 18:20:23 +0900 From: Tejun Heo User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.5) Gecko/20091130 SUSE/3.0.0-1.1.1 Thunderbird/3.0 MIME-Version: 1.0 To: Hui Zhu CC: Arjan van de Ven , Russell King , saeed bishara , Catalin Marinas , Nicolas Pitre , Ralf Baechle , David Daney , Tomaso Paoletti , Chris Dearman , Paul Gortmaker , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Frederic Weisbecker , Alexey Dobriyan , Brian Gerst , Rusty Russell , Andrew Morton , Steven Rostedt , Greg Kroah-Hartman , "Paul E. McKenney" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Coly Li Subject: Re: [PATCH] stack2core: show stack message and convert it to core file when kernel die References: <4B411F14.1040302@kernel.org> <20100103150134.5bdab023@infradead.org> <4B412341.2010002@kernel.org> <20100103151406.20228c3a@infradead.org> <4B4273D6.2010306@kernel.org> In-Reply-To: X-Enigmail-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-archive-position: 25515 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tj@kernel.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3136 Content-Length: 1114 Lines: 31 Hello, On 01/05/2010 06:04 PM, Hui Zhu wrote: > I agree with read the current stack message is better. > > About the extending, I have some question with it: > 1. markup_oops.pl have itself idea, it try use dmesg| markup_oops.pl > show what happen to usr. This is different with s2c. > I am not sure people like it have other function with it. Too much > part of this file need to be change. It need rewrite, just the oops > message parse part can be keep. Yeah, I think you'll need to refactor it and share only the parsing frontend. Just adding a switch (-m or whatever) which puts it into machine-friendly translator mode should do the trick. > 2. I use perl to work in a long time before, I know it good at parse > the text, but I am not sure it good at handle struct like: You don't need to handle the data structure at all. Just make it parse the dmesg and output machine-friendly formatted output which can be processed by s2c. ie. just make it do the reformatting. > Even if what happen, I will keep a c s2c with myself. :) That will be sad. I really want it too. :-) Thanks. -- tejun From anton@samba.org Wed Jan 6 06:09:57 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jan 2010 06:10:01 +0100 (CET) Received: from ozlabs.org ([203.10.76.45]:40721 "EHLO ozlabs.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491079Ab0AFFJ5 (ORCPT ); Wed, 6 Jan 2010 06:09:57 +0100 Received: by ozlabs.org (Postfix, from userid 1010) id 83CA1B6F07; Wed, 6 Jan 2010 16:09:53 +1100 (EST) Message-Id: <20100106045525.207405499@samba.org>> References: <20100106045509.245662398@samba.org>> User-Agent: quilt/0.46-1 Date: Wed, 06 Jan 2010 15:55:13 +1100 From: Anton Blanchard To: anton@samba.org, Ralf Baechle Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, Rusty Russell , Andrew Morton Subject: [patch 4/6] mips: cpumask_of_node() should handle -1 as a node X-archive-position: 25516 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anton@samba.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3858 Content-Length: 1334 Lines: 38 pcibus_to_node can return -1 if we cannot determine which node a pci bus is on. If passed -1, cpumask_of_node will negatively index the lookup array and pull in random data: # cat /sys/devices/pci0000:00/0000:00:01.0/local_cpus 00000000,00000003,00000000,00000000 # cat /sys/devices/pci0000:00/0000:00:01.0/local_cpulist 64-65 Change cpumask_of_node to check for -1 and return cpu_all_mask in this case: # cat /sys/devices/pci0000:00/0000:00:01.0/local_cpus ffffffff,ffffffff,ffffffff,ffffffff # cat /sys/devices/pci0000:00/0000:00:01.0/local_cpulist 0-127 Signed-off-by: Anton Blanchard --- Index: linux-cpumask/arch/mips/include/asm/mach-ip27/topology.h =================================================================== --- linux-cpumask.orig/arch/mips/include/asm/mach-ip27/topology.h 2010-01-06 15:20:22.872583883 +1100 +++ linux-cpumask/arch/mips/include/asm/mach-ip27/topology.h 2010-01-06 15:20:47.310083709 +1100 @@ -24,7 +24,9 @@ extern struct cpuinfo_ip27 sn_cpu_info[N #define cpu_to_node(cpu) (sn_cpu_info[(cpu)].p_nodeid) #define parent_node(node) (node) -#define cpumask_of_node(node) (&hub_data(node)->h_cpus) +#define cpumask_of_node(node) ((node) == -1 ? \ + cpu_all_mask : \ + &hub_data(node)->h_cpus) struct pci_bus; extern int pcibus_to_node(struct pci_bus *); -- From anton@samba.org Wed Jan 6 07:10:43 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jan 2010 07:10:46 +0100 (CET) Received: from ozlabs.org ([203.10.76.45]:58948 "EHLO ozlabs.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491119Ab0AFGKn (ORCPT ); Wed, 6 Jan 2010 07:10:43 +0100 Received: by ozlabs.org (Postfix, from userid 1010) id C545BB6EF3; Wed, 6 Jan 2010 17:10:39 +1100 (EST) Message-Id: <20100106045525.207405499@samba.org> References: <20100106045509.245662398@samba.org> User-Agent: quilt/0.46-1 Date: Wed, 06 Jan 2010 15:55:13 +1100 From: Anton Blanchard To: Ralf Baechle Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, Rusty Russell , Andrew Morton Subject: [patch 4/6] mips: cpumask_of_node() should handle -1 as a node X-archive-position: 25517 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anton@samba.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3874 Content-Length: 1334 Lines: 38 pcibus_to_node can return -1 if we cannot determine which node a pci bus is on. If passed -1, cpumask_of_node will negatively index the lookup array and pull in random data: # cat /sys/devices/pci0000:00/0000:00:01.0/local_cpus 00000000,00000003,00000000,00000000 # cat /sys/devices/pci0000:00/0000:00:01.0/local_cpulist 64-65 Change cpumask_of_node to check for -1 and return cpu_all_mask in this case: # cat /sys/devices/pci0000:00/0000:00:01.0/local_cpus ffffffff,ffffffff,ffffffff,ffffffff # cat /sys/devices/pci0000:00/0000:00:01.0/local_cpulist 0-127 Signed-off-by: Anton Blanchard --- Index: linux-cpumask/arch/mips/include/asm/mach-ip27/topology.h =================================================================== --- linux-cpumask.orig/arch/mips/include/asm/mach-ip27/topology.h 2010-01-06 15:20:22.872583883 +1100 +++ linux-cpumask/arch/mips/include/asm/mach-ip27/topology.h 2010-01-06 15:20:47.310083709 +1100 @@ -24,7 +24,9 @@ extern struct cpuinfo_ip27 sn_cpu_info[N #define cpu_to_node(cpu) (sn_cpu_info[(cpu)].p_nodeid) #define parent_node(node) (node) -#define cpumask_of_node(node) (&hub_data(node)->h_cpus) +#define cpumask_of_node(node) ((node) == -1 ? \ + cpu_all_mask : \ + &hub_data(node)->h_cpus) struct pci_bus; extern int pcibus_to_node(struct pci_bus *); -- From teawater@gmail.com Wed Jan 6 08:07:47 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jan 2010 08:07:51 +0100 (CET) Received: from mail-px0-f181.google.com ([209.85.216.181]:49337 "EHLO mail-px0-f181.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491132Ab0AFHHr convert rfc822-to-8bit (ORCPT ); Wed, 6 Jan 2010 08:07:47 +0100 Received: by pxi11 with SMTP id 11so12842152pxi.22 for ; Tue, 05 Jan 2010 23:07:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:in-reply-to:references :from:date:message-id:subject:to:cc:content-type :content-transfer-encoding; bh=gatW7sEcaUpHHwvs9tvGjHNlw6EmCSbB7H0Kfohy/q4=; b=pcA9f5GoMQsWUeOvul8aTlLmv9nhkUMBe6nw26YWvFnkjzv95t5ApwIgIH/vXz56mD e2Kfe50dPbdFLmYawQFDv4rZRnjImaXWFuhaATpVg08yHD8e/6h3I4ZQXZIyr9HyF1Zm GCvC2uwRbZrGtHlzM4xNr0VfMCNxTBVBjecA0= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-type:content-transfer-encoding; b=s7EktRjErrvRD0ITTfUlyGuzYhck/WMPvHSvbJApYOAimO41FCoqI4jUA5ucXR3pu4 jRilFDgLzrYAtEHg98FO4oXSqC+7r2W6ZlHsV7sewhFAGHGTKvCSN46FPir6tKEpoAip luJ4kGT7nqJmo45DbQTmJGslXTTeke96+AJyc= MIME-Version: 1.0 Received: by 10.143.27.42 with SMTP id e42mr16185891wfj.220.1262761658298; Tue, 05 Jan 2010 23:07:38 -0800 (PST) In-Reply-To: <4B430457.5020906@kernel.org> References: <4B411F14.1040302@kernel.org> <20100103150134.5bdab023@infradead.org> <4B412341.2010002@kernel.org> <20100103151406.20228c3a@infradead.org> <4B4273D6.2010306@kernel.org> <4B430457.5020906@kernel.org> From: Hui Zhu Date: Wed, 6 Jan 2010 15:07:18 +0800 Message-ID: Subject: Re: [PATCH] stack2core: show stack message and convert it to core file when kernel die To: Tejun Heo Cc: Arjan van de Ven , Russell King , saeed bishara , Catalin Marinas , Nicolas Pitre , Ralf Baechle , David Daney , Tomaso Paoletti , Chris Dearman , Paul Gortmaker , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Frederic Weisbecker , Alexey Dobriyan , Brian Gerst , Rusty Russell , Andrew Morton , Steven Rostedt , Greg Kroah-Hartman , "Paul E. McKenney" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Coly Li Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT X-archive-position: 25518 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: teawater@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3902 Content-Length: 1164 Lines: 30 Hi, On Tue, Jan 5, 2010 at 17:20, Tejun Heo wrote: > Hello, > > On 01/05/2010 06:04 PM, Hui Zhu wrote: >> I agree with read the current stack message is better. >> >> About the extending, I have some question with it: >> 1.  markup_oops.pl have itself idea, it try use dmesg| markup_oops.pl >> show what happen to usr.  This is different with s2c. >> I am not sure people like it have other function with it.  Too much >> part of this file need to be change.  It need rewrite, just the oops >> message parse part can be keep. > > Yeah, I think you'll need to refactor it and share only the parsing > frontend.  Just adding a switch (-m or whatever) which puts it into > machine-friendly translator mode should do the trick. > >> 2.  I use perl to work in a long time before, I know it good at parse >> the text, but I am not sure it good at handle struct like: > > You don't need to handle the data structure at all.  Just make it > parse the dmesg and output machine-friendly formatted output which can > be processed by s2c.  ie. just make it do the reformatting. This idea is very cool. I will do it. Thanks for help. :) Best regards, Hui From miloody@gmail.com Wed Jan 6 08:13:20 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jan 2010 08:13:23 +0100 (CET) Received: from mail-px0-f181.google.com ([209.85.216.181]:40087 "EHLO mail-px0-f181.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491167Ab0AFHNU (ORCPT ); Wed, 6 Jan 2010 08:13:20 +0100 Received: by pxi11 with SMTP id 11so12845954pxi.22 for ; Tue, 05 Jan 2010 23:13:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:date:message-id:subject :from:to:content-type; bh=/Ul6QQe0Yo/v08x66dWTY9rTODWabfeu7xcstXfqqNI=; b=fUUBPSnBucV04tktxUMs799X67TWTJaZFNIbt2kXyrUosDMEk3j6wgNF+FaArYW6ZI he1NviGHORFfmepNkx7AhTE9M+AnvhV4IKRPNgjCYGY84vb9Whu8MAxziJOuHriP8ha0 9BTERYnn941PxrcKKMRsSKylptzFzagYGUYRY= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:date:message-id:subject:from:to:content-type; b=imIo6NaN0e5ZAf+rJLhNtBWKwxJ/dizkdrn9unmsN6e7F/Xt3GkOR4a/YSrMBQgTlP 8Xt4j9/pr2ym1adnk4kYk7/mnYopG4sEPLnDyF0FN9Djei/cM934AFnKbqF2Uak4N8V9 05h1DxdBEM0LZJgiIiaTYPZiB3XEhjEzEovoY= MIME-Version: 1.0 Received: by 10.143.129.7 with SMTP id g7mr8905486wfn.336.1262761991571; Tue, 05 Jan 2010 23:13:11 -0800 (PST) Date: Wed, 6 Jan 2010 15:13:11 +0800 Message-ID: <3a665c761001052313v36bfeb89v37ada6b76e91c271@mail.gmail.com> Subject: some question about Extended Asm From: loody To: Linux MIPS Mailing List Content-Type: text/plain; charset=ISO-8859-1 X-archive-position: 25519 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: miloody@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3908 Content-Length: 1379 Lines: 48 Dear all: I write an assembly in c at the end of letter. I try to "or %0, count\n", where count is $a1. so I write %1 as count and write "or %0, %1\n" and assign %1 as count in input section. But the result is not what I expect. the result is " or v1,v1,v0" Did I miss something or the only way to meet what I need is directly write "or %0, $a1\n"? appreciate your help, miloody void cpuperformanceEvent11_initial(unsigned int mode,unsigned count) { bf0106d8: 27bdfff0 addiu sp,sp,-16 bf0106dc: afbe0008 sw s8,8(sp) bf0106e0: 03a0f021 move s8,sp bf0106e4: afc40010 sw a0,16(s8) bf0106e8: afc50014 sw a1,20(s8) unsigned int temp; asm( bf0106ec: 8fc30010 lw v1,16(s8) bf0106f0: 8fc20014 lw v0,20(s8) bf0106f4: 4003c801 mfc0 v1,c0_perfcnt,1 bf0106f8: 00621825 or v1,v1,v0 bf0106fc: 4083c801 mtc0 v1,c0_perfcnt,1 "mfc0 %0, $25, 1\n" "or %0, %1\n" "mtc0 %0, $25, 1\n" : :"r" (mode), "r" (count) ); } void cpuperformanceEvent0_initial(unsigned int mode,unsigned count) { unsigned int temp; asm( "mfc0 %0, $25, 1\n" "or %0, %1\n" "mtc0 %0, $25, 1\n" : :"r" (mode), "r" (count) ); } From macro@linux-mips.org Wed Jan 6 13:48:45 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jan 2010 13:48:59 +0100 (CET) Received: from localhost.localdomain ([127.0.0.1]:49250 "EHLO localhost.localdomain" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492356Ab0AFMsp (ORCPT ); Wed, 6 Jan 2010 13:48:45 +0100 Date: Wed, 6 Jan 2010 12:48:45 +0000 (GMT) From: "Maciej W. Rozycki" To: loody cc: Linux MIPS Mailing List Subject: Re: some question about Extended Asm In-Reply-To: <3a665c761001052313v36bfeb89v37ada6b76e91c271@mail.gmail.com> Message-ID: References: <3a665c761001052313v36bfeb89v37ada6b76e91c271@mail.gmail.com> User-Agent: Alpine 2.00 (LFD 1167 2008-08-23) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-archive-position: 25520 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4017 Content-Length: 579 Lines: 24 On Wed, 6 Jan 2010, loody wrote: > I try to > "or %0, count\n", where count is $a1. > so I write %1 as count and write > "or %0, %1\n" and assign %1 as count in input section. > > But the result is not what I expect. > the result is " or v1,v1,v0" > Did I miss something or the only way to meet what I need is directly write > "or %0, $a1\n"? As you can figure out from the semantics: or v1, v0 is a shorthand for: or v1, v1, v0 There is no two-argument register OR instruction in the standard MIPS instruction set (nor there is a need for one). Maciej From alex@digriz.org.uk Wed Jan 6 22:08:40 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jan 2010 22:08:44 +0100 (CET) Received: from lo.gmane.org ([80.91.229.12]:60268 "EHLO lo.gmane.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492226Ab0AFVIk (ORCPT ); Wed, 6 Jan 2010 22:08:40 +0100 Received: from list by lo.gmane.org with local (Exim 4.50) id 1NSd7J-0007fA-9X for linux-mips@linux-mips.org; Wed, 06 Jan 2010 22:08:33 +0100 Received: from chipmunk.wormnet.eu ([195.195.131.226]) by main.gmane.org with esmtp (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Wed, 06 Jan 2010 22:08:33 +0100 Received: from alex by chipmunk.wormnet.eu with local (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Wed, 06 Jan 2010 22:08:33 +0100 X-Injected-Via-Gmane: http://gmane.org/ To: linux-mips@linux-mips.org From: Alexander Clouter Subject: Re: [PATCH 4/4] MTD: include ar7part in the list of partitions parsers Date: Wed, 6 Jan 2010 20:28:10 +0000 Message-ID: References: <201001032117.37459.florian@openwrt.org> <1262552177.3181.5891.camel@macbook.infradead.org> <2ve717-7pt.ln1@chipmunk.wormnet.eu> <201001050941.42161.florian@openwrt.org> X-Complaints-To: usenet@ger.gmane.org X-Gmane-NNTP-Posting-Host: chipmunk.wormnet.eu User-Agent: tin/1.9.3-20080506 ("Dalintober") (UNIX) (Linux/2.6.26-2-sparc64-smp (sparc64)) Cc: linux-mtd@lists.infradead.org X-archive-position: 25521 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: alex@digriz.org.uk Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4359 Content-Length: 2354 Lines: 61 In gmane.linux.ports.mips.general Florian Fainelli wrote: > >> [snipped] >> >> It simply pulls apart the 'PROM' (aka ADAM2) config and uses that to >> build the partition table. > > This is indeed simple but if I recall right the rationale behind ar7part was > to create a sane partition layout no matter if the bootloader was ADAM2 or > PSPBoot and the root filesystem type. JFFS2 and squashfs do not have the same > erase-block size alignment constraints, ar7part deals with that too. > I am not convinced that is a good idea, one main reason is ar7part.c has gotten terribly wrong the partition table ('loader' is too small[1] and 'rootfs' overlaps with the 'linux' partition'). This is what I have from ADAM2's perspective: ---- Adam2_AR7WRD > printenv [snipped] mtd0 0x900e0000,0x903f0000 <-- rootfs mtd1 0x90020000,0x900e0000 <-- kernel mtd2 0x90000000,0x90020000 <-- adam2 bootloader mtd3 0x903f0000,0x90400000 <-- configuration mtd4 0x90020000,0x903f0000 <-- kernel + rootfs ---- Linux spits out: ---- physmap platform flash device: 00800000 at 10000000 physmap-flash.0: Found 1 x16 devices at 0x0 in 16-bit bank Amd/Fujitsu Extended Query Table at 0x0040 physmap-flash.0: Swapping erase regions for broken CFI table. number of CFI chips: 1 cmdlinepart partition parsing not available RedBoot partition parsing not available 4 ar7part partitions found on MTD device physmap-flash.0 Creating 4 MTD partitions on "physmap-flash.0": 0x000000000000-0x000000010000 : "loader" 0x0000003f0000-0x000000400000 : "config" 0x000000020000-0x0000003f0000 : "linux" 0x0000000d0000-0x0000003f0000 : "rootfs" ---- My patch munched on whatever prom_getenv() returned, which from what I can tell looking at arch/mips/ar7/prom.c will work for both PSPBoot and ADAM2? Are there some strange mtd environment variables I am yet to see out in the wild or does my patch simply not work for PSPBoot primed kit? If not can you give me some 'spiel' to play around with? Cheers [1] okay, ADAM2 weighs in at less than 64kiB however it is not outside the realm of possibility someone will port u-boot to AR7 which would benefit from the full 128kiB of space? -- Alexander Clouter .sigmonster says: A man who turns green has eschewed protein. From ddaney@caviumnetworks.com Thu Jan 7 01:55:39 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 01:55:43 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:10979 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492529Ab0AGAzj (ORCPT ); Thu, 7 Jan 2010 01:55:39 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Wed, 06 Jan 2010 16:55:29 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 6 Jan 2010 16:55:15 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Wed, 6 Jan 2010 16:55:15 -0800 Message-ID: <4B4530F3.1070701@caviumnetworks.com> Date: Wed, 06 Jan 2010 16:55:15 -0800 From: David Daney User-Agent: Thunderbird 2.0.0.21 (X11/20090320) MIME-Version: 1.0 To: Ralf Baechle , linux-mips , Netdev , Greg Kroah-Hartman Subject: [PATCH 0/3] Staging: Improvments to Octeon Ethernet driver. Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 07 Jan 2010 00:55:15.0822 (UTC) FILETIME=[134AC8E0:01CA8F34] X-archive-position: 25522 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4570 Content-Length: 1273 Lines: 29 These patches attempt to cleanup and improve the octeon-ethernet driver in staging. The first patch fixes up octeon interrupt handling in preparation for the following patches. The second and third patches convert to NAPI and enable scatter-gather as well is cleaning up some ugly garbage. Since Octeon is a MIPS based SOC, we might want to merge the entire series via Ralf's linux-mips.org tree. I will reply with the three patches. David Daney (3): MIPS: Octeon: Fix EIO handling. Staging: Octeon Ethernet: Clean up and convert to NAPI. Staging: Octeon Ethernet: Enable scatter-gather. arch/mips/cavium-octeon/octeon-irq.c | 40 +++- drivers/staging/octeon/Kconfig | 1 + drivers/staging/octeon/ethernet-defines.h | 28 --- drivers/staging/octeon/ethernet-mem.c | 89 +++----- drivers/staging/octeon/ethernet-rx.c | 377 ++++++++++++++++------------ drivers/staging/octeon/ethernet-rx.h | 25 ++- drivers/staging/octeon/ethernet-tx.c | 330 ++++++++++++------------- drivers/staging/octeon/ethernet-tx.h | 27 +-- drivers/staging/octeon/ethernet.c | 157 +++++-------- drivers/staging/octeon/octeon-ethernet.h | 48 +--- 10 files changed, 532 insertions(+), 590 deletions(-) From ddaney@caviumnetworks.com Thu Jan 7 01:57:47 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 01:57:51 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:11042 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492986Ab0AGA5r (ORCPT ); Thu, 7 Jan 2010 01:57:47 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Wed, 06 Jan 2010 16:57:35 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 6 Jan 2010 16:57:22 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Wed, 6 Jan 2010 16:57:22 -0800 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.2/8.14.2) with ESMTP id o070vISR009484; Wed, 6 Jan 2010 16:57:18 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.2/8.14.2/Submit) id o070vGFC009482; Wed, 6 Jan 2010 16:57:16 -0800 From: David Daney To: ralf@linux-mips.org, linux-mips@linux-mips.org, netdev@vger.kernel.org, gregkh@suse.de Cc: David Daney Subject: [PATCH 1/3] MIPS: Octeon: Fix EIO handling. Date: Wed, 6 Jan 2010 16:57:14 -0800 Message-Id: <1262825836-9457-1-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.0.6 In-Reply-To: <4B4530F3.1070701@caviumnetworks.com> References: <4B4530F3.1070701@caviumnetworks.com> X-OriginalArrivalTime: 07 Jan 2010 00:57:22.0558 (UTC) FILETIME=[5ED529E0:01CA8F34] X-archive-position: 25523 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4572 Content-Length: 3466 Lines: 102 If an interrupt handler disables interrupts, the EOI function will just reenable them. This will put us in an endless loop when the upcoming Ethernet driver patches are applied. Only reenable the interrupt on EOI if it is not IRQ_DISABLED. This requires that the EIO function be separate from the ENABLE function. We also rename the ACK functions to correspond with their function. Signed-off-by: David Daney --- arch/mips/cavium-octeon/octeon-irq.c | 40 ++++++++++++++++++++++++++++----- 1 files changed, 34 insertions(+), 6 deletions(-) diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c index 6f2acf0..1460d08 100644 --- a/arch/mips/cavium-octeon/octeon-irq.c +++ b/arch/mips/cavium-octeon/octeon-irq.c @@ -193,7 +193,7 @@ static void octeon_irq_ciu0_enable_v2(unsigned int irq) * Disable the irq on the current core for chips that have the EN*_W1{S,C} * registers. */ -static void octeon_irq_ciu0_disable_v2(unsigned int irq) +static void octeon_irq_ciu0_ack_v2(unsigned int irq) { int index = cvmx_get_core_num() * 2; u64 mask = 1ull << (irq - OCTEON_IRQ_WORKQ0); @@ -202,6 +202,20 @@ static void octeon_irq_ciu0_disable_v2(unsigned int irq) } /* + * Enable the irq on the current core for chips that have the EN*_W1{S,C} + * registers. + */ +static void octeon_irq_ciu0_eoi_v2(unsigned int irq) +{ + struct irq_desc *desc = irq_desc + irq; + int index = cvmx_get_core_num() * 2; + u64 mask = 1ull << (irq - OCTEON_IRQ_WORKQ0); + + if ((desc->status & IRQ_DISABLED) == 0) + cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); +} + +/* * Disable the irq on the all cores for chips that have the EN*_W1{S,C} * registers. */ @@ -272,8 +286,8 @@ static struct irq_chip octeon_irq_chip_ciu0_v2 = { .name = "CIU0", .enable = octeon_irq_ciu0_enable_v2, .disable = octeon_irq_ciu0_disable_all_v2, - .ack = octeon_irq_ciu0_disable_v2, - .eoi = octeon_irq_ciu0_enable_v2, + .ack = octeon_irq_ciu0_ack_v2, + .eoi = octeon_irq_ciu0_eoi_v2, #ifdef CONFIG_SMP .set_affinity = octeon_irq_ciu0_set_affinity_v2, #endif @@ -374,7 +388,7 @@ static void octeon_irq_ciu1_enable_v2(unsigned int irq) * Disable the irq on the current core for chips that have the EN*_W1{S,C} * registers. */ -static void octeon_irq_ciu1_disable_v2(unsigned int irq) +static void octeon_irq_ciu1_ack_v2(unsigned int irq) { int index = cvmx_get_core_num() * 2 + 1; u64 mask = 1ull << (irq - OCTEON_IRQ_WDOG0); @@ -383,6 +397,20 @@ static void octeon_irq_ciu1_disable_v2(unsigned int irq) } /* + * Enable the irq on the current core for chips that have the EN*_W1{S,C} + * registers. + */ +static void octeon_irq_ciu1_eoi_v2(unsigned int irq) +{ + struct irq_desc *desc = irq_desc + irq; + int index = cvmx_get_core_num() * 2 + 1; + u64 mask = 1ull << (irq - OCTEON_IRQ_WDOG0); + + if ((desc->status & IRQ_DISABLED) == 0) + cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); +} + +/* * Disable the irq on the all cores for chips that have the EN*_W1{S,C} * registers. */ @@ -455,8 +483,8 @@ static struct irq_chip octeon_irq_chip_ciu1_v2 = { .name = "CIU0", .enable = octeon_irq_ciu1_enable_v2, .disable = octeon_irq_ciu1_disable_all_v2, - .ack = octeon_irq_ciu1_disable_v2, - .eoi = octeon_irq_ciu1_enable_v2, + .ack = octeon_irq_ciu1_ack_v2, + .eoi = octeon_irq_ciu1_eoi_v2, #ifdef CONFIG_SMP .set_affinity = octeon_irq_ciu1_set_affinity_v2, #endif -- 1.6.0.6 From ddaney@caviumnetworks.com Thu Jan 7 01:57:47 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 01:58:16 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:11037 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493400Ab0AGA5r (ORCPT ); Thu, 7 Jan 2010 01:57:47 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Wed, 06 Jan 2010 16:57:30 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 6 Jan 2010 16:57:22 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Wed, 6 Jan 2010 16:57:22 -0800 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.2/8.14.2) with ESMTP id o070vJVA009492; Wed, 6 Jan 2010 16:57:19 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.2/8.14.2/Submit) id o070vJBk009491; Wed, 6 Jan 2010 16:57:19 -0800 From: David Daney To: ralf@linux-mips.org, linux-mips@linux-mips.org, netdev@vger.kernel.org, gregkh@suse.de Cc: David Daney Subject: [PATCH 3/3] Staging: Octeon Ethernet: Enable scatter-gather. Date: Wed, 6 Jan 2010 16:57:16 -0800 Message-Id: <1262825836-9457-3-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.0.6 In-Reply-To: <4B4530F3.1070701@caviumnetworks.com> References: <4B4530F3.1070701@caviumnetworks.com> X-OriginalArrivalTime: 07 Jan 2010 00:57:22.0558 (UTC) FILETIME=[5ED529E0:01CA8F34] X-archive-position: 25524 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4573 Content-Length: 4361 Lines: 125 Octeon ethernet hardware can handle NETIF_F_SG, so we enable it. Signed-off-by: David Daney --- drivers/staging/octeon/ethernet-tx.c | 57 +++++++++++++++++++++++++++++---- drivers/staging/octeon/ethernet.c | 7 +++- 2 files changed, 55 insertions(+), 9 deletions(-) diff --git a/drivers/staging/octeon/ethernet-tx.c b/drivers/staging/octeon/ethernet-tx.c index 28e2de6..c4007a6 100644 --- a/drivers/staging/octeon/ethernet-tx.c +++ b/drivers/staging/octeon/ethernet-tx.c @@ -53,6 +53,8 @@ #include "cvmx-gmxx-defs.h" +#define CVM_OCT_SKB_CB(skb) ((u64 *)((skb)->cb)) + /* * You can define GET_SKBUFF_QOS() to override how the skbuff output * function determines which output queue is used. The default @@ -121,6 +123,7 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) uint64_t old_scratch; uint64_t old_scratch2; int qos; + int i; enum {QUEUE_CORE, QUEUE_HW, QUEUE_DROP} queue_type; struct octeon_ethernet *priv = netdev_priv(dev); struct sk_buff *to_free_list; @@ -171,6 +174,28 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) } /* + * We have space for 6 segment pointers, If there will be more + * than that, we must linearize. + */ + if (unlikely(skb_shinfo(skb)->nr_frags > 5)) { + if (unlikely(__skb_linearize(skb))) { + queue_type = QUEUE_DROP; + if (USE_ASYNC_IOBDMA) { + /* Get the number of skbuffs in use by the hardware */ + CVMX_SYNCIOBDMA; + skb_to_free = cvmx_scratch_read64(CVMX_SCR_SCRATCH); + } else { + /* Get the number of skbuffs in use by the hardware */ + skb_to_free = cvmx_fau_fetch_and_add32(priv->fau + qos * 4, + MAX_SKB_TO_FREE); + } + skb_to_free = cvm_oct_adjust_skb_to_free(skb_to_free, priv->fau + qos * 4); + spin_lock_irqsave(&priv->tx_free_list[qos].lock, flags); + goto skip_xmit; + } + } + + /* * The CN3XXX series of parts has an errata (GMX-401) which * causes the GMX block to hang if a collision occurs towards * the end of a <68 byte packet. As a workaround for this, we @@ -198,13 +223,6 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) } } - /* Build the PKO buffer pointer */ - hw_buffer.u64 = 0; - hw_buffer.s.addr = cvmx_ptr_to_phys(skb->data); - hw_buffer.s.pool = 0; - hw_buffer.s.size = - (unsigned long)skb_end_pointer(skb) - (unsigned long)skb->head; - /* Build the PKO command */ pko_command.u64 = 0; pko_command.s.n2 = 1; /* Don't pollute L2 with the outgoing packet */ @@ -215,6 +233,31 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) pko_command.s.dontfree = 1; pko_command.s.reg0 = priv->fau + qos * 4; + + /* Build the PKO buffer pointer */ + hw_buffer.u64 = 0; + if (skb_shinfo(skb)->nr_frags == 0) { + hw_buffer.s.addr = XKPHYS_TO_PHYS(skb->data); + hw_buffer.s.pool = 0; + hw_buffer.s.size = skb->len; + } else { + hw_buffer.s.addr = XKPHYS_TO_PHYS(skb->data); + hw_buffer.s.pool = 0; + hw_buffer.s.size = skb_headlen(skb); + CVM_OCT_SKB_CB(skb)[0] = hw_buffer.u64; + for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { + struct skb_frag_struct *fs = skb_shinfo(skb)->frags + i; + hw_buffer.s.addr = XKPHYS_TO_PHYS(page_address(fs->page) + fs->page_offset); + hw_buffer.s.size = fs->size; + CVM_OCT_SKB_CB(skb)[i + 1] = hw_buffer.u64; + } + hw_buffer.s.addr = XKPHYS_TO_PHYS(CVM_OCT_SKB_CB(skb)); + hw_buffer.s.size = skb_shinfo(skb)->nr_frags + 1; + pko_command.s.segs = skb_shinfo(skb)->nr_frags + 1; + pko_command.s.gather = 1; + goto dont_put_skbuff_in_hw; + } + /* * See if we can put this skb in the FPA pool. Any strange * behavior from the Linux networking stack will most likely diff --git a/drivers/staging/octeon/ethernet.c b/drivers/staging/octeon/ethernet.c index 2fc1e8e..3bc9a7c 100644 --- a/drivers/staging/octeon/ethernet.c +++ b/drivers/staging/octeon/ethernet.c @@ -485,8 +485,11 @@ int cvm_oct_common_init(struct net_device *dev) && (always_use_pow || strstr(pow_send_list, dev->name))) priv->queue = -1; - if (priv->queue != -1 && USE_HW_TCPUDP_CHECKSUM) - dev->features |= NETIF_F_IP_CSUM; + if (priv->queue != -1) { + dev->features |= NETIF_F_SG; + if (USE_HW_TCPUDP_CHECKSUM) + dev->features |= NETIF_F_IP_CSUM; + } /* We do our own locking, Linux doesn't need to */ dev->features |= NETIF_F_LLTX; -- 1.6.0.6 From ddaney@caviumnetworks.com Thu Jan 7 01:57:49 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 01:58:43 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:11033 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493401Ab0AGA5t (ORCPT ); Thu, 7 Jan 2010 01:57:49 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Wed, 06 Jan 2010 16:57:29 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 6 Jan 2010 16:57:22 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Wed, 6 Jan 2010 16:57:22 -0800 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.2/8.14.2) with ESMTP id o070vJaT009488; Wed, 6 Jan 2010 16:57:19 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.2/8.14.2/Submit) id o070vIAo009487; Wed, 6 Jan 2010 16:57:18 -0800 From: David Daney To: ralf@linux-mips.org, linux-mips@linux-mips.org, netdev@vger.kernel.org, gregkh@suse.de Cc: David Daney Subject: [PATCH 2/3] Staging: Octeon Ethernet: Clean up and convert to NAPI. Date: Wed, 6 Jan 2010 16:57:15 -0800 Message-Id: <1262825836-9457-2-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.0.6 In-Reply-To: <4B4530F3.1070701@caviumnetworks.com> References: <4B4530F3.1070701@caviumnetworks.com> X-OriginalArrivalTime: 07 Jan 2010 00:57:22.0558 (UTC) FILETIME=[5ED529E0:01CA8F34] X-archive-position: 25525 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4574 Content-Length: 49394 Lines: 1573 Convert the driver to be a reasonably well behaved NAPI citizen. Also clean up memory allocation and tx buffer accounding code. Remove some configuration #defines and other unused code that are not applicable to the in-tree driver. Signed-off-by: David Daney --- drivers/staging/octeon/Kconfig | 1 + drivers/staging/octeon/ethernet-defines.h | 28 --- drivers/staging/octeon/ethernet-mem.c | 89 +++----- drivers/staging/octeon/ethernet-rx.c | 377 ++++++++++++++++------------ drivers/staging/octeon/ethernet-rx.h | 25 ++- drivers/staging/octeon/ethernet-tx.c | 273 +++++++++------------ drivers/staging/octeon/ethernet-tx.h | 27 +-- drivers/staging/octeon/ethernet.c | 150 +++++------- drivers/staging/octeon/octeon-ethernet.h | 48 +--- 9 files changed, 443 insertions(+), 575 deletions(-) diff --git a/drivers/staging/octeon/Kconfig b/drivers/staging/octeon/Kconfig index 638ad6b..579b8f1 100644 --- a/drivers/staging/octeon/Kconfig +++ b/drivers/staging/octeon/Kconfig @@ -3,6 +3,7 @@ config OCTEON_ETHERNET depends on CPU_CAVIUM_OCTEON select PHYLIB select MDIO_OCTEON + select HIGH_RES_TIMERS help This driver supports the builtin ethernet ports on Cavium Networks' products in the Octeon family. This driver supports the diff --git a/drivers/staging/octeon/ethernet-defines.h b/drivers/staging/octeon/ethernet-defines.h index f13131b..9c4910e 100644 --- a/drivers/staging/octeon/ethernet-defines.h +++ b/drivers/staging/octeon/ethernet-defines.h @@ -41,17 +41,10 @@ * Tells the driver to populate the packet buffers with kernel skbuffs. * This allows the driver to receive packets without copying them. It also * means that 32bit userspace can't access the packet buffers. - * USE_32BIT_SHARED - * This define tells the driver to allocate memory for buffers from the - * 32bit sahred region instead of the kernel memory space. * USE_HW_TCPUDP_CHECKSUM * Controls if the Octeon TCP/UDP checksum engine is used for packet * output. If this is zero, the kernel will perform the checksum in * software. - * USE_MULTICORE_RECEIVE - * Process receive interrupts on multiple cores. This spreads the network - * load across the first 8 processors. If ths is zero, only one core - * processes incomming packets. * USE_ASYNC_IOBDMA * Use asynchronous IO access to hardware. This uses Octeon's asynchronous * IOBDMAs to issue IO accesses without stalling. Set this to zero @@ -75,29 +68,15 @@ #define CONFIG_CAVIUM_RESERVE32 0 #endif -#if CONFIG_CAVIUM_RESERVE32 -#define USE_32BIT_SHARED 1 -#define USE_SKBUFFS_IN_HW 0 -#define REUSE_SKBUFFS_WITHOUT_FREE 0 -#else -#define USE_32BIT_SHARED 0 #define USE_SKBUFFS_IN_HW 1 #ifdef CONFIG_NETFILTER #define REUSE_SKBUFFS_WITHOUT_FREE 0 #else #define REUSE_SKBUFFS_WITHOUT_FREE 1 #endif -#endif - -/* Max interrupts per second per core */ -#define INTERRUPT_LIMIT 10000 -/* Don't limit the number of interrupts */ -/*#define INTERRUPT_LIMIT 0 */ #define USE_HW_TCPUDP_CHECKSUM 1 -#define USE_MULTICORE_RECEIVE 1 - /* Enable Random Early Dropping under load */ #define USE_RED 1 #define USE_ASYNC_IOBDMA (CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0) @@ -115,17 +94,10 @@ /* Use this to not have FPA frees control L2 */ /*#define DONT_WRITEBACK(x) 0 */ -/* Maximum number of packets to process per interrupt. */ -#define MAX_RX_PACKETS 120 /* Maximum number of SKBs to try to free per xmit packet. */ #define MAX_SKB_TO_FREE 10 #define MAX_OUT_QUEUE_DEPTH 1000 -#ifndef CONFIG_SMP -#undef USE_MULTICORE_RECEIVE -#define USE_MULTICORE_RECEIVE 0 -#endif - #define IP_PROTOCOL_TCP 6 #define IP_PROTOCOL_UDP 0x11 diff --git a/drivers/staging/octeon/ethernet-mem.c b/drivers/staging/octeon/ethernet-mem.c index b595903..b59cd16 100644 --- a/drivers/staging/octeon/ethernet-mem.c +++ b/drivers/staging/octeon/ethernet-mem.c @@ -26,8 +26,6 @@ **********************************************************************/ #include #include -#include -#include #include @@ -47,7 +45,7 @@ static int cvm_oct_fill_hw_skbuff(int pool, int size, int elements) int freed = elements; while (freed) { - struct sk_buff *skb = dev_alloc_skb(size + 128); + struct sk_buff *skb = dev_alloc_skb(size + 256); if (unlikely(skb == NULL)) { pr_warning ("Failed to allocate skb for hardware pool %d\n", @@ -55,7 +53,7 @@ static int cvm_oct_fill_hw_skbuff(int pool, int size, int elements) break; } - skb_reserve(skb, 128 - (((unsigned long)skb->data) & 0x7f)); + skb_reserve(skb, 256 - (((unsigned long)skb->data) & 0x7f)); *(struct sk_buff **)(skb->data - sizeof(void *)) = skb; cvmx_fpa_free(skb->data, pool, DONT_WRITEBACK(size / 128)); freed--; @@ -107,42 +105,15 @@ static int cvm_oct_fill_hw_memory(int pool, int size, int elements) char *memory; int freed = elements; - if (USE_32BIT_SHARED) { - extern uint64_t octeon_reserve32_memory; - - memory = - cvmx_bootmem_alloc_range(elements * size, 128, - octeon_reserve32_memory, - octeon_reserve32_memory + - (CONFIG_CAVIUM_RESERVE32 << 20) - - 1); - if (memory == NULL) - panic("Unable to allocate %u bytes for FPA pool %d\n", - elements * size, pool); - - pr_notice("Memory range %p - %p reserved for " - "hardware\n", memory, - memory + elements * size - 1); - - while (freed) { - cvmx_fpa_free(memory, pool, 0); - memory += size; - freed--; - } - } else { - while (freed) { - /* We need to force alignment to 128 bytes here */ - memory = kmalloc(size + 127, GFP_ATOMIC); - if (unlikely(memory == NULL)) { - pr_warning("Unable to allocate %u bytes for " - "FPA pool %d\n", - elements * size, pool); - break; - } - memory = (char *)(((unsigned long)memory + 127) & -128); - cvmx_fpa_free(memory, pool, 0); - freed--; + while (freed) { + memory = kmalloc(size, GFP_ATOMIC); + if (unlikely(memory == NULL)) { + pr_warning("Unable to allocate %u bytes for FPA pool %d\n", + elements * size, pool); + break; } + cvmx_fpa_free(memory, pool, 0); + freed--; } return elements - freed; } @@ -156,33 +127,29 @@ static int cvm_oct_fill_hw_memory(int pool, int size, int elements) */ static void cvm_oct_free_hw_memory(int pool, int size, int elements) { - if (USE_32BIT_SHARED) { - pr_warning("Warning: 32 shared memory is not freeable\n"); - } else { - char *memory; - do { - memory = cvmx_fpa_alloc(pool); - if (memory) { - elements--; - kfree(phys_to_virt(cvmx_ptr_to_phys(memory))); - } - } while (memory); + char *memory; + do { + memory = cvmx_fpa_alloc(pool); + if (memory) { + elements--; + kfree(phys_to_virt(cvmx_ptr_to_phys(memory))); + } + } while (memory); - if (elements < 0) - pr_warning("Freeing of pool %u had too many " - "buffers (%d)\n", - pool, elements); - else if (elements > 0) - pr_warning("Warning: Freeing of pool %u is " - "missing %d buffers\n", - pool, elements); - } + if (elements < 0) + pr_warning("Freeing of pool %u had too many " + "buffers (%d)\n", + pool, elements); + else if (elements > 0) + pr_warning("Warning: Freeing of pool %u is " + "missing %d buffers\n", + pool, elements); } int cvm_oct_mem_fill_fpa(int pool, int size, int elements) { int freed; - if (USE_SKBUFFS_IN_HW) + if (USE_SKBUFFS_IN_HW && pool == CVMX_FPA_PACKET_POOL) freed = cvm_oct_fill_hw_skbuff(pool, size, elements); else freed = cvm_oct_fill_hw_memory(pool, size, elements); @@ -191,7 +158,7 @@ int cvm_oct_mem_fill_fpa(int pool, int size, int elements) void cvm_oct_mem_empty_fpa(int pool, int size, int elements) { - if (USE_SKBUFFS_IN_HW) + if (USE_SKBUFFS_IN_HW && pool == CVMX_FPA_PACKET_POOL) cvm_oct_free_hw_skbuff(pool, size, elements); else cvm_oct_free_hw_memory(pool, size, elements); diff --git a/drivers/staging/octeon/ethernet-rx.c b/drivers/staging/octeon/ethernet-rx.c index 1b237b7..20906c6 100644 --- a/drivers/staging/octeon/ethernet-rx.c +++ b/drivers/staging/octeon/ethernet-rx.c @@ -4,7 +4,7 @@ * Contact: support@caviumnetworks.com * This file is part of the OCTEON SDK * - * Copyright (c) 2003-2007 Cavium Networks + * Copyright (c) 2003-2010 Cavium Networks * * This file is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, Version 2, as @@ -27,16 +27,14 @@ #include #include #include +#include #include #include #include #include #include #include -#include -#include -#include -#include +#include #include #ifdef CONFIG_XFRM #include @@ -48,8 +46,9 @@ #include #include "ethernet-defines.h" -#include "octeon-ethernet.h" #include "ethernet-mem.h" +#include "ethernet-rx.h" +#include "octeon-ethernet.h" #include "ethernet-util.h" #include "cvmx-helper.h" @@ -61,56 +60,82 @@ #include "cvmx-gmxx-defs.h" -struct cvm_tasklet_wrapper { - struct tasklet_struct t; -}; +struct cvm_napi_wrapper { + struct napi_struct napi; +} ____cacheline_aligned_in_smp; -/* - * Aligning the tasklet_struct on cachline boundries seems to decrease - * throughput even though in theory it would reduce contantion on the - * cache lines containing the locks. - */ +static struct cvm_napi_wrapper cvm_oct_napi[NR_CPUS] __cacheline_aligned_in_smp; -static struct cvm_tasklet_wrapper cvm_oct_tasklet[NR_CPUS]; +struct cvm_oct_core_state { + int baseline_cores; + /* + * The number of additional cores that could be processing + * input packtes. + */ + atomic_t available_cores; + cpumask_t cpu_state; +} ____cacheline_aligned_in_smp; -/** - * Interrupt handler. The interrupt occurs whenever the POW - * transitions from 0->1 packets in our group. - * - * @cpl: - * @dev_id: - * @regs: - * Returns - */ -irqreturn_t cvm_oct_do_interrupt(int cpl, void *dev_id) +static struct cvm_oct_core_state core_state __cacheline_aligned_in_smp; + +static void cvm_oct_enable_napi(void *_) { - /* Acknowledge the interrupt */ - if (INTERRUPT_LIMIT) - cvmx_write_csr(CVMX_POW_WQ_INT, 1 << pow_receive_group); - else - cvmx_write_csr(CVMX_POW_WQ_INT, 0x10001 << pow_receive_group); - preempt_disable(); - tasklet_schedule(&cvm_oct_tasklet[smp_processor_id()].t); - preempt_enable(); - return IRQ_HANDLED; + int cpu = smp_processor_id(); + napi_schedule(&cvm_oct_napi[cpu].napi); +} + +static void cvm_oct_enable_one_cpu(void) +{ + int v; + int cpu; + + /* Check to see if more CPUs are available for receive processing... */ + v = atomic_sub_if_positive(1, &core_state.available_cores); + if (v < 0) + return; + + /* ... if a CPU is available, Turn on NAPI polling for that CPU. */ + for_each_online_cpu(cpu) { + if (!cpu_test_and_set(cpu, core_state.cpu_state)) { + v = smp_call_function_single(cpu, cvm_oct_enable_napi, + NULL, 0); + if (v) + panic("Can't enable NAPI."); + break; + } + } +} + +static void cvm_oct_no_more_work(void) +{ + int cpu = smp_processor_id(); + + /* + * CPU zero is special. It always has the irq enabled when + * waiting for incoming packets. + */ + if (cpu == 0) { + enable_irq(OCTEON_IRQ_WORKQ0 + pow_receive_group); + return; + } + + cpu_clear(cpu, core_state.cpu_state); + atomic_add(1, &core_state.available_cores); } -#ifdef CONFIG_NET_POLL_CONTROLLER /** - * This is called when the kernel needs to manually poll the - * device. For Octeon, this is simply calling the interrupt - * handler. We actually poll all the devices, not just the - * one supplied. + * Interrupt handler. The interrupt occurs whenever the POW + * has packets in our group. * - * @dev: Device to poll. Unused */ -void cvm_oct_poll_controller(struct net_device *dev) +static irqreturn_t cvm_oct_do_interrupt(int cpl, void *dev_id) { - preempt_disable(); - tasklet_schedule(&cvm_oct_tasklet[smp_processor_id()].t); - preempt_enable(); + /* Disable the IRQ and start napi_poll. */ + disable_irq_nosync(OCTEON_IRQ_WORKQ0 + pow_receive_group); + cvm_oct_enable_napi(NULL); + + return IRQ_HANDLED; } -#endif /** * This is called on receive errors, and determines if the packet @@ -199,19 +224,19 @@ static inline int cvm_oct_check_rcv_error(cvmx_wqe_t *work) } /** - * Tasklet function that is scheduled on a core when an interrupt occurs. + * The NAPI poll function. * - * @unused: + * @napi: The NAPI instance, or null if called from cvm_oct_poll_controller + * @budget: Maximum number of packets to receive. */ -void cvm_oct_tasklet_rx(unsigned long unused) +static int cvm_oct_napi_poll(struct napi_struct *napi, int budget) { - const int coreid = cvmx_get_core_num(); - uint64_t old_group_mask; - uint64_t old_scratch; - int rx_count = 0; - int number_to_free; - int num_freed; - int packet_not_copied; + const int coreid = cvmx_get_core_num(); + uint64_t old_group_mask; + uint64_t old_scratch; + int rx_count = 0; + int did_work_request = 0; + int packet_not_copied; /* Prefetch cvm_oct_device since we know we need it soon */ prefetch(cvm_oct_device); @@ -227,59 +252,63 @@ void cvm_oct_tasklet_rx(unsigned long unused) cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid), (old_group_mask & ~0xFFFFull) | 1 << pow_receive_group); - if (USE_ASYNC_IOBDMA) + if (USE_ASYNC_IOBDMA) { cvmx_pow_work_request_async(CVMX_SCR_SCRATCH, CVMX_POW_NO_WAIT); + did_work_request = 1; + } - while (1) { + while (rx_count < budget) { struct sk_buff *skb = NULL; + struct sk_buff **pskb = NULL; int skb_in_hw; cvmx_wqe_t *work; - if (USE_ASYNC_IOBDMA) { + if (USE_ASYNC_IOBDMA && did_work_request) work = cvmx_pow_work_response_async(CVMX_SCR_SCRATCH); - } else { - if ((INTERRUPT_LIMIT == 0) - || likely(rx_count < MAX_RX_PACKETS)) - work = - cvmx_pow_work_request_sync - (CVMX_POW_NO_WAIT); - else - work = NULL; - } + else + work = cvmx_pow_work_request_sync(CVMX_POW_NO_WAIT); + prefetch(work); - if (work == NULL) + did_work_request = 0; + if (work == NULL) { + union cvmx_pow_wq_int wq_int; + wq_int.u64 = 0; + wq_int.s.iq_dis = 1 << pow_receive_group; + wq_int.s.wq_int = 1 << pow_receive_group; + cvmx_write_csr(CVMX_POW_WQ_INT, wq_int.u64); break; + } + pskb = (struct sk_buff **)(cvm_oct_get_buffer_ptr(work->packet_ptr) - sizeof(void *)); + prefetch(pskb); - /* - * Limit each core to processing MAX_RX_PACKETS - * packets without a break. This way the RX can't - * starve the TX task. - */ - if (USE_ASYNC_IOBDMA) { - - if ((INTERRUPT_LIMIT == 0) - || likely(rx_count < MAX_RX_PACKETS)) - cvmx_pow_work_request_async_nocheck - (CVMX_SCR_SCRATCH, CVMX_POW_NO_WAIT); - else { - cvmx_scratch_write64(CVMX_SCR_SCRATCH, - 0x8000000000000000ull); - cvmx_pow_tag_sw_null_nocheck(); - } + if (USE_ASYNC_IOBDMA && rx_count < (budget - 1)) { + cvmx_pow_work_request_async_nocheck(CVMX_SCR_SCRATCH, CVMX_POW_NO_WAIT); + did_work_request = 1; + } + + if (rx_count == 0) { + /* + * First time through, see if there is enough + * work waiting to merit waking another + * CPU. + */ + union cvmx_pow_wq_int_cntx counts; + int backlog; + int cores_in_use = core_state.baseline_cores - atomic_read(&core_state.available_cores); + counts.u64 = cvmx_read_csr(CVMX_POW_WQ_INT_CNTX(pow_receive_group)); + backlog = counts.s.iq_cnt + counts.s.ds_cnt; + if (backlog > budget * cores_in_use && napi != NULL) + cvm_oct_enable_one_cpu(); } skb_in_hw = USE_SKBUFFS_IN_HW && work->word2.s.bufs == 1; if (likely(skb_in_hw)) { - skb = - *(struct sk_buff - **)(cvm_oct_get_buffer_ptr(work->packet_ptr) - - sizeof(void *)); + skb = *pskb; prefetch(&skb->head); prefetch(&skb->len); } prefetch(cvm_oct_device[work->ipprt]); - rx_count++; /* Immediately throw away all packets with receive errors */ if (unlikely(work->word2.snoip.rcv_error)) { if (cvm_oct_check_rcv_error(work)) @@ -292,39 +321,27 @@ void cvm_oct_tasklet_rx(unsigned long unused) * buffer. */ if (likely(skb_in_hw)) { - /* - * This calculation was changed in case the - * skb header is using a different address - * aliasing type than the buffer. It doesn't - * make any differnece now, but the new one is - * more correct. - */ - skb->data = - skb->head + work->packet_ptr.s.addr - - cvmx_ptr_to_phys(skb->head); + skb->data = skb->head + work->packet_ptr.s.addr - cvmx_ptr_to_phys(skb->head); prefetch(skb->data); skb->len = work->len; skb_set_tail_pointer(skb, skb->len); packet_not_copied = 1; } else { - /* * We have to copy the packet. First allocate * an skbuff for it. */ skb = dev_alloc_skb(work->len); if (!skb) { - DEBUGPRINT("Port %d failed to allocate " - "skbuff, packet dropped\n", - work->ipprt); + DEBUGPRINT("Port %d failed to allocate skbuff, packet dropped\n", + work->ipprt); cvm_oct_free_work(work); continue; } /* * Check if we've received a packet that was - * entirely stored in the work entry. This is - * untested. + * entirely stored in the work entry. */ if (unlikely(work->word2.s.bufs == 0)) { uint8_t *ptr = work->packet_data; @@ -343,15 +360,13 @@ void cvm_oct_tasklet_rx(unsigned long unused) /* No packet buffers to free */ } else { int segments = work->word2.s.bufs; - union cvmx_buf_ptr segment_ptr = - work->packet_ptr; + union cvmx_buf_ptr segment_ptr = work->packet_ptr; int len = work->len; while (segments--) { union cvmx_buf_ptr next_ptr = - *(union cvmx_buf_ptr *) - cvmx_phys_to_ptr(segment_ptr.s. - addr - 8); + *(union cvmx_buf_ptr *)cvmx_phys_to_ptr(segment_ptr.s.addr - 8); + /* * Octeon Errata PKI-100: The segment size is * wrong. Until it is fixed, calculate the @@ -361,22 +376,17 @@ void cvm_oct_tasklet_rx(unsigned long unused) * one: int segment_size = * segment_ptr.s.size; */ - int segment_size = - CVMX_FPA_PACKET_POOL_SIZE - - (segment_ptr.s.addr - - (((segment_ptr.s.addr >> 7) - - segment_ptr.s.back) << 7)); - /* Don't copy more than what is left - in the packet */ + int segment_size = CVMX_FPA_PACKET_POOL_SIZE - (segment_ptr.s.addr - (((segment_ptr.s.addr >> 7) - segment_ptr.s.back) << 7)); + /* + * Don't copy more than what + * is left in the packet. + */ if (segment_size > len) segment_size = len; /* Copy the data into the packet */ memcpy(skb_put(skb, segment_size), - cvmx_phys_to_ptr(segment_ptr.s. - addr), + cvmx_phys_to_ptr(segment_ptr.s.addr), segment_size); - /* Reduce the amount of bytes left - to copy */ len -= segment_size; segment_ptr = next_ptr; } @@ -389,16 +399,15 @@ void cvm_oct_tasklet_rx(unsigned long unused) struct net_device *dev = cvm_oct_device[work->ipprt]; struct octeon_ethernet *priv = netdev_priv(dev); - /* Only accept packets for devices - that are currently up */ + /* + * Only accept packets for devices that are + * currently up. + */ if (likely(dev->flags & IFF_UP)) { skb->protocol = eth_type_trans(skb, dev); skb->dev = dev; - if (unlikely - (work->word2.s.not_IP - || work->word2.s.IP_exc - || work->word2.s.L4_error)) + if (unlikely(work->word2.s.not_IP || work->word2.s.IP_exc || work->word2.s.L4_error)) skb->ip_summed = CHECKSUM_NONE; else skb->ip_summed = CHECKSUM_UNNECESSARY; @@ -413,16 +422,15 @@ void cvm_oct_tasklet_rx(unsigned long unused) atomic_add(skb->len, (atomic_t *)&priv->stats.rx_bytes); #endif } + netif_receive_skb(skb); + rx_count++; } else { + /* Drop any packet received for a device that isn't up */ /* - * Drop any packet received for a - * device that isn't up. - */ - /* - DEBUGPRINT("%s: Device not up, packet dropped\n", - dev->name); - */ + DEBUGPRINT("%s: Device not up, packet dropped\n", + dev->name); + */ #ifdef CONFIG_64BIT atomic64_add(1, (atomic64_t *)&priv->stats.rx_dropped); #else @@ -435,9 +443,8 @@ void cvm_oct_tasklet_rx(unsigned long unused) * Drop any packet received for a device that * doesn't exist. */ - DEBUGPRINT("Port %d not controlled by Linux, packet " - "dropped\n", - work->ipprt); + DEBUGPRINT("Port %d not controlled by Linux, packet dropped\n", + work->ipprt); dev_kfree_skb_irq(skb); } /* @@ -459,47 +466,93 @@ void cvm_oct_tasklet_rx(unsigned long unused) cvm_oct_free_work(work); } } - /* Restore the original POW group mask */ cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid), old_group_mask); if (USE_ASYNC_IOBDMA) { /* Restore the scratch area */ cvmx_scratch_write64(CVMX_SCR_SCRATCH, old_scratch); } + cvm_oct_rx_refill_pool(0); - if (USE_SKBUFFS_IN_HW) { - /* Refill the packet buffer pool */ - number_to_free = - cvmx_fau_fetch_and_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE, 0); - - if (number_to_free > 0) { - cvmx_fau_atomic_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE, - -number_to_free); - num_freed = - cvm_oct_mem_fill_fpa(CVMX_FPA_PACKET_POOL, - CVMX_FPA_PACKET_POOL_SIZE, - number_to_free); - if (num_freed != number_to_free) { - cvmx_fau_atomic_add32 - (FAU_NUM_PACKET_BUFFERS_TO_FREE, - number_to_free - num_freed); - } - } + if (rx_count < budget && napi != NULL) { + /* No more work */ + napi_complete(napi); + cvm_oct_no_more_work(); } + return rx_count; +} + +#ifdef CONFIG_NET_POLL_CONTROLLER +/** + * This is called when the kernel needs to manually poll the + * device. + * + * @dev: Device to poll. Unused + */ +void cvm_oct_poll_controller(struct net_device *dev) +{ + cvm_oct_napi_poll(NULL, 16); } +#endif void cvm_oct_rx_initialize(void) { int i; - /* Initialize all of the tasklets */ - for (i = 0; i < NR_CPUS; i++) - tasklet_init(&cvm_oct_tasklet[i].t, cvm_oct_tasklet_rx, 0); + struct net_device *dev_for_napi = NULL; + union cvmx_pow_wq_int_thrx int_thr; + union cvmx_pow_wq_int_pc int_pc; + + for (i = 0; i < TOTAL_NUMBER_OF_PORTS; i++) { + if (cvm_oct_device[i]) { + dev_for_napi = cvm_oct_device[i]; + break; + } + } + + if (NULL == dev_for_napi) + panic("No net_devices were allocated."); + + if (max_rx_cpus > 1 && max_rx_cpus < num_online_cpus()) + atomic_set(&core_state.available_cores, max_rx_cpus); + else + atomic_set(&core_state.available_cores, num_online_cpus()); + core_state.baseline_cores = atomic_read(&core_state.available_cores); + + core_state.cpu_state = CPU_MASK_NONE; + for_each_possible_cpu(i) { + netif_napi_add(dev_for_napi, &cvm_oct_napi[i].napi, + cvm_oct_napi_poll, rx_napi_weight); + napi_enable(&cvm_oct_napi[i].napi); + } + /* Register an IRQ hander for to receive POW interrupts */ + i = request_irq(OCTEON_IRQ_WORKQ0 + pow_receive_group, + cvm_oct_do_interrupt, 0, "Ethernet", cvm_oct_device); + + if (i) + panic("Could not acquire Ethernet IRQ %d\n", + OCTEON_IRQ_WORKQ0 + pow_receive_group); + + disable_irq_nosync(OCTEON_IRQ_WORKQ0 + pow_receive_group); + + int_thr.u64 = 0; + int_thr.s.tc_en = 1; + int_thr.s.tc_thr = 1; + /* Enable POW interrupt when our port has at least one packet */ + cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), int_thr.u64); + + int_pc.u64 = 0; + int_pc.s.pc_thr = 5; + cvmx_write_csr(CVMX_POW_WQ_INT_PC, int_pc.u64); + + + /* Scheduld NAPI now. This will indirectly enable interrupts. */ + cvm_oct_enable_one_cpu(); } void cvm_oct_rx_shutdown(void) { int i; - /* Shutdown all of the tasklets */ - for (i = 0; i < NR_CPUS; i++) - tasklet_kill(&cvm_oct_tasklet[i].t); + /* Shutdown all of the NAPIs */ + for_each_possible_cpu(i) + netif_napi_del(&cvm_oct_napi[i].napi); } diff --git a/drivers/staging/octeon/ethernet-rx.h b/drivers/staging/octeon/ethernet-rx.h index a9b72b8..a0743b8 100644 --- a/drivers/staging/octeon/ethernet-rx.h +++ b/drivers/staging/octeon/ethernet-rx.h @@ -24,10 +24,29 @@ * This file may also be available under a different license from Cavium. * Contact Cavium Networks for more information *********************************************************************/ +#include "cvmx-fau.h" -irqreturn_t cvm_oct_do_interrupt(int cpl, void *dev_id); void cvm_oct_poll_controller(struct net_device *dev); -void cvm_oct_tasklet_rx(unsigned long unused); - void cvm_oct_rx_initialize(void); void cvm_oct_rx_shutdown(void); + +static inline void cvm_oct_rx_refill_pool(int fill_threshold) +{ + int number_to_free; + int num_freed; + /* Refill the packet buffer pool */ + number_to_free = + cvmx_fau_fetch_and_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE, 0); + + if (number_to_free > fill_threshold) { + cvmx_fau_atomic_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE, + -number_to_free); + num_freed = cvm_oct_mem_fill_fpa(CVMX_FPA_PACKET_POOL, + CVMX_FPA_PACKET_POOL_SIZE, + number_to_free); + if (num_freed != number_to_free) { + cvmx_fau_atomic_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE, + number_to_free - num_freed); + } + } +} diff --git a/drivers/staging/octeon/ethernet-tx.c b/drivers/staging/octeon/ethernet-tx.c index 5352941..28e2de6 100644 --- a/drivers/staging/octeon/ethernet-tx.c +++ b/drivers/staging/octeon/ethernet-tx.c @@ -4,7 +4,7 @@ * Contact: support@caviumnetworks.com * This file is part of the OCTEON SDK * - * Copyright (c) 2003-2007 Cavium Networks + * Copyright (c) 2003-2010 Cavium Networks * * This file is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, Version 2, as @@ -31,10 +31,6 @@ #include #include #include -#include -#include -#include -#include #include #ifdef CONFIG_XFRM #include @@ -68,6 +64,49 @@ #define GET_SKBUFF_QOS(skb) 0 #endif + +static inline int32_t cvm_oct_adjust_skb_to_free(int32_t skb_to_free, int fau) +{ + int32_t undo; + undo = skb_to_free > 0 ? MAX_SKB_TO_FREE : skb_to_free + MAX_SKB_TO_FREE; + if (undo > 0) + cvmx_fau_atomic_add32(fau, -undo); + skb_to_free = -skb_to_free > MAX_SKB_TO_FREE ? MAX_SKB_TO_FREE : -skb_to_free; + return skb_to_free; +} + +void cvm_oct_free_tx_skbs(struct octeon_ethernet *priv) +{ + int32_t skb_to_free; + int qos, queues_per_port; + queues_per_port = cvmx_pko_get_num_queues(priv->port); + /* Drain any pending packets in the free list */ + for (qos = 0; qos < queues_per_port; qos++) { + if (skb_queue_len(&priv->tx_free_list[qos]) == 0) + continue; + skb_to_free = cvmx_fau_fetch_and_add32(priv->fau+qos*4, MAX_SKB_TO_FREE); + skb_to_free = cvm_oct_adjust_skb_to_free(skb_to_free, priv->fau+qos*4); + + while (skb_to_free > 0) { + dev_kfree_skb_any(skb_dequeue(&priv->tx_free_list[qos])); + skb_to_free--; + } + } +} + +enum hrtimer_restart cvm_oct_restart_tx(struct hrtimer *timer) +{ + struct octeon_ethernet *priv = container_of(timer, struct octeon_ethernet, tx_restart_timer); + struct net_device *dev = cvm_oct_device[priv->port]; + + cvm_oct_free_tx_skbs(priv); + + if (netif_queue_stopped(dev)) + netif_wake_queue(dev); + + return HRTIMER_NORESTART; +} + /** * Packet transmit * @@ -81,13 +120,13 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) union cvmx_buf_ptr hw_buffer; uint64_t old_scratch; uint64_t old_scratch2; - int dropped; int qos; - int queue_it_up; + enum {QUEUE_CORE, QUEUE_HW, QUEUE_DROP} queue_type; struct octeon_ethernet *priv = netdev_priv(dev); + struct sk_buff *to_free_list; int32_t skb_to_free; - int32_t undo; int32_t buffers_to_free; + unsigned long flags; #if REUSE_SKBUFFS_WITHOUT_FREE unsigned char *fpa_head; #endif @@ -98,9 +137,6 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) */ prefetch(priv); - /* Start off assuming no drop */ - dropped = 0; - /* * The check on CVMX_PKO_QUEUES_PER_PORT_* is designed to * completely remove "qos" in the event neither interface @@ -190,7 +226,7 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) * shown a 25% increase in performance under some loads. */ #if REUSE_SKBUFFS_WITHOUT_FREE - fpa_head = skb->head + 128 - ((unsigned long)skb->head & 0x7f); + fpa_head = skb->head + 256 - ((unsigned long)skb->head & 0x7f); if (unlikely(skb->data < fpa_head)) { /* * printk("TX buffer beginning can't meet FPA @@ -251,7 +287,7 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) pko_command.s.reg0 = 0; pko_command.s.dontfree = 0; - hw_buffer.s.back = (skb->data - fpa_head) >> 7; + hw_buffer.s.back = ((unsigned long)skb->data >> 7) - ((unsigned long)fpa_head >> 7); *(struct sk_buff **)(fpa_head - sizeof(void *)) = skb; /* @@ -272,9 +308,9 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) skb->tc_verd = 0; #endif /* CONFIG_NET_CLS_ACT */ #endif /* CONFIG_NET_SCHED */ +#endif /* REUSE_SKBUFFS_WITHOUT_FREE */ dont_put_skbuff_in_hw: -#endif /* REUSE_SKBUFFS_WITHOUT_FREE */ /* Check if we can use the hardware checksumming */ if (USE_HW_TCPUDP_CHECKSUM && (skb->protocol == htons(ETH_P_IP)) && @@ -299,18 +335,7 @@ dont_put_skbuff_in_hw: cvmx_fau_fetch_and_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE, 0); } - /* - * We try to claim MAX_SKB_TO_FREE buffers. If there were not - * that many available, we have to un-claim (undo) any that - * were in excess. If skb_to_free is positive we will free - * that many buffers. - */ - undo = skb_to_free > 0 ? - MAX_SKB_TO_FREE : skb_to_free + MAX_SKB_TO_FREE; - if (undo > 0) - cvmx_fau_atomic_add32(priv->fau+qos*4, -undo); - skb_to_free = -skb_to_free > MAX_SKB_TO_FREE ? - MAX_SKB_TO_FREE : -skb_to_free; + skb_to_free = cvm_oct_adjust_skb_to_free(skb_to_free, priv->fau+qos*4); /* * If we're sending faster than the receive can free them then @@ -321,60 +346,79 @@ dont_put_skbuff_in_hw: pko_command.s.reg0 = priv->fau + qos * 4; } - cvmx_pko_send_packet_prepare(priv->port, priv->queue + qos, - CVMX_PKO_LOCK_CMD_QUEUE); + if (pko_command.s.dontfree) + queue_type = QUEUE_CORE; + else + queue_type = QUEUE_HW; + + spin_lock_irqsave(&priv->tx_free_list[qos].lock, flags); /* Drop this packet if we have too many already queued to the HW */ - if (unlikely - (skb_queue_len(&priv->tx_free_list[qos]) >= MAX_OUT_QUEUE_DEPTH)) { - /* - DEBUGPRINT("%s: Tx dropped. Too many queued\n", dev->name); - */ - dropped = 1; + if (unlikely(skb_queue_len(&priv->tx_free_list[qos]) >= MAX_OUT_QUEUE_DEPTH)) { + if (dev->tx_queue_len != 0) { + netif_stop_queue(dev); + hrtimer_start(&priv->tx_restart_timer, + priv->tx_restart_interval, HRTIMER_MODE_REL); + } else { + /* If not using normal queueing. */ + queue_type = QUEUE_DROP; + goto skip_xmit; + } } + + cvmx_pko_send_packet_prepare(priv->port, priv->queue + qos, + CVMX_PKO_LOCK_NONE); + /* Send the packet to the output queue */ - else if (unlikely - (cvmx_pko_send_packet_finish - (priv->port, priv->queue + qos, pko_command, hw_buffer, - CVMX_PKO_LOCK_CMD_QUEUE))) { + if (unlikely(cvmx_pko_send_packet_finish(priv->port, + priv->queue + qos, + pko_command, hw_buffer, + CVMX_PKO_LOCK_NONE))) { DEBUGPRINT("%s: Failed to send the packet\n", dev->name); - dropped = 1; + queue_type = QUEUE_DROP; } +skip_xmit: + to_free_list = NULL; - if (USE_ASYNC_IOBDMA) { - /* Restore the scratch area */ - cvmx_scratch_write64(CVMX_SCR_SCRATCH, old_scratch); - cvmx_scratch_write64(CVMX_SCR_SCRATCH + 8, old_scratch2); + switch (queue_type) { + case QUEUE_DROP: + skb->next = to_free_list; + to_free_list = skb; + priv->stats.tx_dropped++; + break; + case QUEUE_HW: + cvmx_fau_atomic_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE, -1); + break; + case QUEUE_CORE: + __skb_queue_tail(&priv->tx_free_list[qos], skb); + break; + default: + BUG(); } - queue_it_up = 0; - if (unlikely(dropped)) { - dev_kfree_skb_any(skb); - priv->stats.tx_dropped++; - } else { - if (USE_SKBUFFS_IN_HW) { - /* Put this packet on the queue to be freed later */ - if (pko_command.s.dontfree) - queue_it_up = 1; - else - cvmx_fau_atomic_add32 - (FAU_NUM_PACKET_BUFFERS_TO_FREE, -1); - } else { - /* Put this packet on the queue to be freed later */ - queue_it_up = 1; - } + while (skb_to_free > 0) { + struct sk_buff *t = __skb_dequeue(&priv->tx_free_list[qos]); + t->next = to_free_list; + to_free_list = t; + skb_to_free--; } - if (queue_it_up) { - spin_lock(&priv->tx_free_list[qos].lock); - __skb_queue_tail(&priv->tx_free_list[qos], skb); - cvm_oct_free_tx_skbs(priv, skb_to_free, qos, 0); - spin_unlock(&priv->tx_free_list[qos].lock); - } else { - cvm_oct_free_tx_skbs(priv, skb_to_free, qos, 1); + spin_unlock_irqrestore(&priv->tx_free_list[qos].lock, flags); + + /* Do the actual freeing outside of the lock. */ + while (to_free_list) { + struct sk_buff *t = to_free_list; + to_free_list = to_free_list->next; + dev_kfree_skb_any(t); } - return 0; + if (USE_ASYNC_IOBDMA) { + /* Restore the scratch area */ + cvmx_scratch_write64(CVMX_SCR_SCRATCH, old_scratch); + cvmx_scratch_write64(CVMX_SCR_SCRATCH + 8, old_scratch2); + } + + return NETDEV_TX_OK; } /** @@ -529,101 +573,6 @@ int cvm_oct_xmit_pow(struct sk_buff *skb, struct net_device *dev) } /** - * Transmit a work queue entry out of the ethernet port. Both - * the work queue entry and the packet data can optionally be - * freed. The work will be freed on error as well. - * - * @dev: Device to transmit out. - * @work_queue_entry: - * Work queue entry to send - * @do_free: True if the work queue entry and packet data should be - * freed. If false, neither will be freed. - * @qos: Index into the queues for this port to transmit on. This - * is used to implement QoS if their are multiple queues per - * port. This parameter must be between 0 and the number of - * queues per port minus 1. Values outside of this range will - * be change to zero. - * - * Returns Zero on success, negative on failure. - */ -int cvm_oct_transmit_qos(struct net_device *dev, void *work_queue_entry, - int do_free, int qos) -{ - unsigned long flags; - union cvmx_buf_ptr hw_buffer; - cvmx_pko_command_word0_t pko_command; - int dropped; - struct octeon_ethernet *priv = netdev_priv(dev); - cvmx_wqe_t *work = work_queue_entry; - - if (!(dev->flags & IFF_UP)) { - DEBUGPRINT("%s: Device not up\n", dev->name); - if (do_free) - cvm_oct_free_work(work); - return -1; - } - - /* The check on CVMX_PKO_QUEUES_PER_PORT_* is designed to completely - remove "qos" in the event neither interface supports - multiple queues per port */ - if ((CVMX_PKO_QUEUES_PER_PORT_INTERFACE0 > 1) || - (CVMX_PKO_QUEUES_PER_PORT_INTERFACE1 > 1)) { - if (qos <= 0) - qos = 0; - else if (qos >= cvmx_pko_get_num_queues(priv->port)) - qos = 0; - } else - qos = 0; - - /* Start off assuming no drop */ - dropped = 0; - - local_irq_save(flags); - cvmx_pko_send_packet_prepare(priv->port, priv->queue + qos, - CVMX_PKO_LOCK_CMD_QUEUE); - - /* Build the PKO buffer pointer */ - hw_buffer.u64 = 0; - hw_buffer.s.addr = work->packet_ptr.s.addr; - hw_buffer.s.pool = CVMX_FPA_PACKET_POOL; - hw_buffer.s.size = CVMX_FPA_PACKET_POOL_SIZE; - hw_buffer.s.back = work->packet_ptr.s.back; - - /* Build the PKO command */ - pko_command.u64 = 0; - pko_command.s.n2 = 1; /* Don't pollute L2 with the outgoing packet */ - pko_command.s.dontfree = !do_free; - pko_command.s.segs = work->word2.s.bufs; - pko_command.s.total_bytes = work->len; - - /* Check if we can use the hardware checksumming */ - if (unlikely(work->word2.s.not_IP || work->word2.s.IP_exc)) - pko_command.s.ipoffp1 = 0; - else - pko_command.s.ipoffp1 = sizeof(struct ethhdr) + 1; - - /* Send the packet to the output queue */ - if (unlikely - (cvmx_pko_send_packet_finish - (priv->port, priv->queue + qos, pko_command, hw_buffer, - CVMX_PKO_LOCK_CMD_QUEUE))) { - DEBUGPRINT("%s: Failed to send the packet\n", dev->name); - dropped = -1; - } - local_irq_restore(flags); - - if (unlikely(dropped)) { - if (do_free) - cvm_oct_free_work(work); - priv->stats.tx_dropped++; - } else if (do_free) - cvmx_fpa_free(work, CVMX_FPA_WQE_POOL, DONT_WRITEBACK(1)); - - return dropped; -} -EXPORT_SYMBOL(cvm_oct_transmit_qos); - -/** * This function frees all skb that are currently queued for TX. * * @dev: Device being shutdown diff --git a/drivers/staging/octeon/ethernet-tx.h b/drivers/staging/octeon/ethernet-tx.h index c0bebf7..b628d8c 100644 --- a/drivers/staging/octeon/ethernet-tx.h +++ b/drivers/staging/octeon/ethernet-tx.h @@ -30,28 +30,5 @@ int cvm_oct_xmit_pow(struct sk_buff *skb, struct net_device *dev); int cvm_oct_transmit_qos(struct net_device *dev, void *work_queue_entry, int do_free, int qos); void cvm_oct_tx_shutdown(struct net_device *dev); - -/** - * Free dead transmit skbs. - * - * @priv: The driver data - * @skb_to_free: The number of SKBs to free (free none if negative). - * @qos: The queue to free from. - * @take_lock: If true, acquire the skb list lock. - */ -static inline void cvm_oct_free_tx_skbs(struct octeon_ethernet *priv, - int skb_to_free, - int qos, int take_lock) -{ - /* Free skbuffs not in use by the hardware. */ - if (skb_to_free > 0) { - if (take_lock) - spin_lock(&priv->tx_free_list[qos].lock); - while (skb_to_free > 0) { - dev_kfree_skb(__skb_dequeue(&priv->tx_free_list[qos])); - skb_to_free--; - } - if (take_lock) - spin_unlock(&priv->tx_free_list[qos].lock); - } -} +void cvm_oct_free_tx_skbs(struct octeon_ethernet *priv); +enum hrtimer_restart cvm_oct_restart_tx(struct hrtimer *timer); diff --git a/drivers/staging/octeon/ethernet.c b/drivers/staging/octeon/ethernet.c index 4cfd4b1..2fc1e8e 100644 --- a/drivers/staging/octeon/ethernet.c +++ b/drivers/staging/octeon/ethernet.c @@ -104,12 +104,15 @@ MODULE_PARM_DESC(pow_send_list, "\n" "\t\"eth2,spi3,spi7\" would cause these three devices to transmit\n" "\tusing the pow_send_group."); -static int disable_core_queueing = 1; -module_param(disable_core_queueing, int, 0444); -MODULE_PARM_DESC(disable_core_queueing, "\n" - "\tWhen set the networking core's tx_queue_len is set to zero. This\n" - "\tallows packets to be sent without lock contention in the packet\n" - "\tscheduler resulting in some cases in improved throughput.\n"); +int max_rx_cpus = -1; +module_param(max_rx_cpus, int, 0444); +MODULE_PARM_DESC(max_rx_cpus, "\n" + "\t\tThe maximum number of CPUs to use for packet reception.\n" + "\t\tUse -1 to use all available CPUs."); + +int rx_napi_weight = 32; +module_param(rx_napi_weight, int, 0444); +MODULE_PARM_DESC(rx_napi_weight, "The NAPI WEIGHT parameter."); /* @@ -139,50 +142,38 @@ struct net_device *cvm_oct_device[TOTAL_NUMBER_OF_PORTS]; */ static void cvm_do_timer(unsigned long arg) { - int32_t skb_to_free, undo; - int queues_per_port; - int qos; - struct octeon_ethernet *priv; static int port; - - if (port >= CVMX_PIP_NUM_INPUT_PORTS) { + if (port < CVMX_PIP_NUM_INPUT_PORTS) { + if (cvm_oct_device[port]) { + struct octeon_ethernet *priv = netdev_priv(cvm_oct_device[port]); + if (priv->poll) + priv->poll(cvm_oct_device[port]); + cvm_oct_free_tx_skbs(priv); + cvm_oct_device[port]->netdev_ops->ndo_get_stats(cvm_oct_device[port]); + } + port++; /* - * All ports have been polled. Start the next - * iteration through the ports in one second. + * Poll the next port in a 50th of a second. This + * spreads the polling of ports out a little bit. */ + mod_timer(&cvm_oct_poll_timer, jiffies + HZ/50); + } else { port = 0; + /* + * FPA 0 may have been drained, try to refill it if we + * need more than num_packet_buffers / 2, otherwise + * normal receive processing will refill it. If it + * were drained, no packets could be received so + * cvm_oct_napi_poll would never be invoked to do the + * refill. + */ + cvm_oct_rx_refill_pool(num_packet_buffers / 2); + /* + * All ports have been polled. Start the next iteration through + * the ports in one second. + */ mod_timer(&cvm_oct_poll_timer, jiffies + HZ); - return; } - if (!cvm_oct_device[port]) - goto out; - - priv = netdev_priv(cvm_oct_device[port]); - if (priv->poll) - priv->poll(cvm_oct_device[port]); - - queues_per_port = cvmx_pko_get_num_queues(port); - /* Drain any pending packets in the free list */ - for (qos = 0; qos < queues_per_port; qos++) { - if (skb_queue_len(&priv->tx_free_list[qos]) == 0) - continue; - skb_to_free = cvmx_fau_fetch_and_add32(priv->fau + qos * 4, - MAX_SKB_TO_FREE); - undo = skb_to_free > 0 ? - MAX_SKB_TO_FREE : skb_to_free + MAX_SKB_TO_FREE; - if (undo > 0) - cvmx_fau_atomic_add32(priv->fau+qos*4, -undo); - skb_to_free = -skb_to_free > MAX_SKB_TO_FREE ? - MAX_SKB_TO_FREE : -skb_to_free; - cvm_oct_free_tx_skbs(priv, skb_to_free, qos, 1); - } - cvm_oct_device[port]->netdev_ops->ndo_get_stats(cvm_oct_device[port]); - -out: - port++; - /* Poll the next port in a 50th of a second. - This spreads the polling of ports out a little bit */ - mod_timer(&cvm_oct_poll_timer, jiffies + HZ / 50); } /** @@ -190,7 +181,6 @@ out: */ static __init void cvm_oct_configure_common_hw(void) { - int r; /* Setup the FPA */ cvmx_fpa_enable(); cvm_oct_mem_fill_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE, @@ -205,21 +195,6 @@ static __init void cvm_oct_configure_common_hw(void) cvmx_helper_setup_red(num_packet_buffers / 4, num_packet_buffers / 8); - /* Enable the MII interface */ - if (!octeon_is_simulation()) - cvmx_write_csr(CVMX_SMIX_EN(0), 1); - - /* Register an IRQ hander for to receive POW interrupts */ - r = request_irq(OCTEON_IRQ_WORKQ0 + pow_receive_group, - cvm_oct_do_interrupt, IRQF_SHARED, "Ethernet", - cvm_oct_device); - -#if defined(CONFIG_SMP) && 0 - if (USE_MULTICORE_RECEIVE) { - irq_set_affinity(OCTEON_IRQ_WORKQ0 + pow_receive_group, - cpu_online_mask); - } -#endif } /** @@ -649,7 +624,6 @@ static int __init cvm_oct_init_module(void) cvm_oct_mac_addr_offset = 0; cvm_oct_proc_initialize(); - cvm_oct_rx_initialize(); cvm_oct_configure_common_hw(); cvmx_helper_initialize_packet_io_global(); @@ -689,7 +663,18 @@ static int __init cvm_oct_init_module(void) if (dev) { /* Initialize the device private structure. */ struct octeon_ethernet *priv = netdev_priv(dev); - memset(priv, 0, sizeof(struct octeon_ethernet)); + + hrtimer_init(&priv->tx_restart_timer, + CLOCK_MONOTONIC, + HRTIMER_MODE_REL); + priv->tx_restart_timer.function = cvm_oct_restart_tx; + + /* + * Default for 10GE 5000nS enough time to + * transmit about 100 64byte packtes. 1GE + * interfaces will get 50000nS below. + */ + priv->tx_restart_interval = ktime_set(0, 5000); dev->netdev_ops = &cvm_oct_pow_netdev_ops; priv->imode = CVMX_HELPER_INTERFACE_MODE_DISABLED; @@ -700,19 +685,16 @@ static int __init cvm_oct_init_module(void) skb_queue_head_init(&priv->tx_free_list[qos]); if (register_netdev(dev) < 0) { - pr_err("Failed to register ethernet " - "device for POW\n"); + pr_err("Failed to register ethernet device for POW\n"); kfree(dev); } else { cvm_oct_device[CVMX_PIP_NUM_INPUT_PORTS] = dev; - pr_info("%s: POW send group %d, receive " - "group %d\n", - dev->name, pow_send_group, - pow_receive_group); + pr_info("%s: POW send group %d, receive group %d\n", + dev->name, pow_send_group, + pow_receive_group); } } else { - pr_err("Failed to allocate ethernet device " - "for POW\n"); + pr_err("Failed to allocate ethernet device for POW\n"); } } @@ -730,12 +712,10 @@ static int __init cvm_oct_init_module(void) struct net_device *dev = alloc_etherdev(sizeof(struct octeon_ethernet)); if (!dev) { - pr_err("Failed to allocate ethernet device " - "for port %d\n", port); + pr_err("Failed to allocate ethernet device for port %d\n", + port); continue; } - if (disable_core_queueing) - dev->tx_queue_len = 0; /* Initialize the device private structure. */ priv = netdev_priv(dev); @@ -776,6 +756,7 @@ static int __init cvm_oct_init_module(void) case CVMX_HELPER_INTERFACE_MODE_SGMII: dev->netdev_ops = &cvm_oct_sgmii_netdev_ops; + priv->tx_restart_interval = ktime_set(0, 50000); strcpy(dev->name, "eth%d"); break; @@ -787,6 +768,7 @@ static int __init cvm_oct_init_module(void) case CVMX_HELPER_INTERFACE_MODE_RGMII: case CVMX_HELPER_INTERFACE_MODE_GMII: dev->netdev_ops = &cvm_oct_rgmii_netdev_ops; + priv->tx_restart_interval = ktime_set(0, 50000); strcpy(dev->name, "eth%d"); break; } @@ -807,25 +789,7 @@ static int __init cvm_oct_init_module(void) } } - if (INTERRUPT_LIMIT) { - /* - * Set the POW timer rate to give an interrupt at most - * INTERRUPT_LIMIT times per second. - */ - cvmx_write_csr(CVMX_POW_WQ_INT_PC, - octeon_bootinfo->eclock_hz / (INTERRUPT_LIMIT * - 16 * 256) << 8); - - /* - * Enable POW timer interrupt. It will count when - * there are packets available. - */ - cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), - 0x1ful << 24); - } else { - /* Enable POW interrupt when our port has at least one packet */ - cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), 0x1001); - } + cvm_oct_rx_initialize(); /* Enable the poll timer for checking RGMII status */ init_timer(&cvm_oct_poll_timer); diff --git a/drivers/staging/octeon/octeon-ethernet.h b/drivers/staging/octeon/octeon-ethernet.h index 402a15b..40b6956 100644 --- a/drivers/staging/octeon/octeon-ethernet.h +++ b/drivers/staging/octeon/octeon-ethernet.h @@ -31,6 +31,8 @@ #ifndef OCTEON_ETHERNET_H #define OCTEON_ETHERNET_H +#include + /** * This is the definition of the Ethernet driver's private * driver state stored in netdev_priv(dev). @@ -57,6 +59,8 @@ struct octeon_ethernet { uint64_t link_info; /* Called periodically to check link status */ void (*poll) (struct net_device *dev); + struct hrtimer tx_restart_timer; + ktime_t tx_restart_interval; }; /** @@ -68,47 +72,6 @@ struct octeon_ethernet { */ int cvm_oct_free_work(void *work_queue_entry); -/** - * Transmit a work queue entry out of the ethernet port. Both - * the work queue entry and the packet data can optionally be - * freed. The work will be freed on error as well. - * - * @dev: Device to transmit out. - * @work_queue_entry: - * Work queue entry to send - * @do_free: True if the work queue entry and packet data should be - * freed. If false, neither will be freed. - * @qos: Index into the queues for this port to transmit on. This - * is used to implement QoS if their are multiple queues per - * port. This parameter must be between 0 and the number of - * queues per port minus 1. Values outside of this range will - * be change to zero. - * - * Returns Zero on success, negative on failure. - */ -int cvm_oct_transmit_qos(struct net_device *dev, void *work_queue_entry, - int do_free, int qos); - -/** - * Transmit a work queue entry out of the ethernet port. Both - * the work queue entry and the packet data can optionally be - * freed. The work will be freed on error as well. This simply - * wraps cvmx_oct_transmit_qos() for backwards compatability. - * - * @dev: Device to transmit out. - * @work_queue_entry: - * Work queue entry to send - * @do_free: True if the work queue entry and packet data should be - * freed. If false, neither will be freed. - * - * Returns Zero on success, negative on failure. - */ -static inline int cvm_oct_transmit(struct net_device *dev, - void *work_queue_entry, int do_free) -{ - return cvm_oct_transmit_qos(dev, work_queue_entry, do_free, 0); -} - extern int cvm_oct_rgmii_init(struct net_device *dev); extern void cvm_oct_rgmii_uninit(struct net_device *dev); extern int cvm_oct_rgmii_open(struct net_device *dev); @@ -135,4 +98,7 @@ extern int pow_receive_group; extern char pow_send_list[]; extern struct net_device *cvm_oct_device[]; +extern int max_rx_cpus; +extern int rx_napi_weight; + #endif -- 1.6.0.6 From davem@davemloft.net Thu Jan 7 02:01:34 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 02:01:38 +0100 (CET) Received: from 74-93-104-97-Washington.hfc.comcastbusiness.net ([74.93.104.97]:43458 "EHLO sunset.davemloft.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493401Ab0AGBBe (ORCPT ); Thu, 7 Jan 2010 02:01:34 +0100 Received: from localhost (localhost [127.0.0.1]) by sunset.davemloft.net (Postfix) with ESMTP id 383C424C140; Wed, 6 Jan 2010 17:01:39 -0800 (PST) Date: Wed, 06 Jan 2010 17:01:38 -0800 (PST) Message-Id: <20100106.170138.71108684.davem@davemloft.net> To: ddaney@caviumnetworks.com Cc: ralf@linux-mips.org, linux-mips@linux-mips.org, netdev@vger.kernel.org, gregkh@suse.de Subject: Re: [PATCH 2/3] Staging: Octeon Ethernet: Clean up and convert to NAPI. From: David Miller In-Reply-To: <1262825836-9457-2-git-send-email-ddaney@caviumnetworks.com> References: <4B4530F3.1070701@caviumnetworks.com> <1262825836-9457-2-git-send-email-ddaney@caviumnetworks.com> X-Mailer: Mew version 6.3 on Emacs 23.1 / Mule 6.0 (HANACHIRUSATO) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-archive-position: 25526 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: davem@davemloft.net Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4576 Content-Length: 531 Lines: 14 From: David Daney Date: Wed, 6 Jan 2010 16:57:15 -0800 > Convert the driver to be a reasonably well behaved NAPI citizen. Also > clean up memory allocation and tx buffer accounding code. Remove some > configuration #defines and other unused code that are not applicable > to the in-tree driver. > > Signed-off-by: David Daney Please seperate the cleanups and conversion to NAPI into seperate patches. Doing both at the same time makes your patch impossible to review. From kosaki.motohiro@jp.fujitsu.com Thu Jan 7 07:33:12 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 07:33:16 +0100 (CET) Received: from fgwmail7.fujitsu.co.jp ([192.51.44.37]:34764 "EHLO fgwmail7.fujitsu.co.jp" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491080Ab0AGGdM (ORCPT ); Thu, 7 Jan 2010 07:33:12 +0100 Received: from m6.gw.fujitsu.co.jp ([10.0.50.76]) by fgwmail7.fujitsu.co.jp (Fujitsu Gateway) with ESMTP id o076X18r021159 (envelope-from kosaki.motohiro@jp.fujitsu.com); Thu, 7 Jan 2010 15:33:01 +0900 Received: from smail (m6 [127.0.0.1]) by outgoing.m6.gw.fujitsu.co.jp (Postfix) with ESMTP id 7B43045DE4C; Thu, 7 Jan 2010 15:32:59 +0900 (JST) Received: from s6.gw.fujitsu.co.jp (s6.gw.fujitsu.co.jp [10.0.50.96]) by m6.gw.fujitsu.co.jp (Postfix) with ESMTP id 3FD9245DE4E; Thu, 7 Jan 2010 15:32:59 +0900 (JST) Received: from s6.gw.fujitsu.co.jp (localhost.localdomain [127.0.0.1]) by s6.gw.fujitsu.co.jp (Postfix) with ESMTP id DEB2D1DB803E; Thu, 7 Jan 2010 15:32:58 +0900 (JST) Received: from m108.s.css.fujitsu.com (m108.s.css.fujitsu.com [10.249.87.108]) by s6.gw.fujitsu.co.jp (Postfix) with ESMTP id 7AB4C1DB804B; Thu, 7 Jan 2010 15:32:58 +0900 (JST) Received: from m108.css.fujitsu.com (m108 [127.0.0.1]) by m108.s.css.fujitsu.com (Postfix) with ESMTP id BD1A1B6800B; Thu, 7 Jan 2010 15:32:57 +0900 (JST) Received: from [127.0.0.1] (unknown [10.124.100.179]) by m108.s.css.fujitsu.com (Postfix) with ESMTP id 2574FB6800A; Thu, 7 Jan 2010 15:32:57 +0900 (JST) X-SecurityPolicyCheck-FJ: OK by FujitsuOutboundMailChecker v1.3.1 Received: from KOSANOTE2[10.124.100.179] by KOSANOTE2 (FujitsuOutboundMailChecker v1.3.1/9992[10.124.100.179]); Thu, 07 Jan 2010 15:33:04 +0900 (JST) From: KOSAKI Motohiro To: Hugh Dickins , Ralf Baechle , linux-mips@linux-mips.org, Carsten Otte Subject: [PATCH] mips,mm: Reinstate move_pte optimization Cc: kosaki.motohiro@jp.fujitsu.com, Peter Zijlstra , KAMEZAWA Hiroyuki , Nick Piggin , Ingo Molnar , LKML , Thomas Gleixner , Darren Hart , Ulrich Drepper In-Reply-To: References: <20091225083305.AA78.A69D9226@jp.fujitsu.com> Message-Id: <20100107151527.8784.A69D9226@jp.fujitsu.com> MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Mailer: Becky! ver. 2.50.07 [ja] Date: Thu, 7 Jan 2010 15:32:57 +0900 (JST) X-archive-position: 25527 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kosaki.motohiro@jp.fujitsu.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4727 Content-Length: 2898 Lines: 84 CC to mips folks. > If something like this or your replacment does go forward, > then I think that test is better inside the "if (!page->mapping)" > below. Admittedly that adds even more mm-dependence here (relying > on a zero page to have NULL page->mapping); but isn't page_to_pfn() > one of those functions which is trivial on many configs but expensive > on some? Better call it only in the rare case that it's needed. > > Though wouldn't it be even better not to use is_zero_pfn() at all? > That was convenient in mm/memory.c because it had the pfn or pte right > at hand, but here a traditional (page == ZERO_PAGE(address)) would be > more efficient. > > Which would save having to move is_zero_pfn() from mm/memory.c > to include/linux/mm.h - I'd prefer to keep it private if we can. > But for completeness, this would involve resurrecting the 2.6.19 > MIPS move_pte(), which makes sure mremap() move doesn't interfere > with our assumptions. Something like > > #define __HAVE_ARCH_MOVE_PTE > pte_t move_pte(pte_t pte, pgprot_t prot, unsigned long old_addr, > unsigned long new_addr) > { > if (pte_present(pte) && is_zero_pfn(pte_pfn(pte))) > pte = mk_pte(ZERO_PAGE(new_addr), prot); > return pte; > } > > in arch/mips/include/asm/pgtable.h. I agree with resurrecting mips move_pte. At least your patch passed my cross compile test :) Ralf, can you please review following patch? ====================================================== Subject: [PATCH] mips,mm: Reinstate move_pte optimization From: Hugh Dickins About three years ago, we removed mips specific move_pte by commit 701dfbc1cb (mm: mremap correct rmap accounting). because it is only small optimization and it has bug. However new zero-page thing doesn't have such problem and behavior consistency of mremap have worth a bit. This patch reinstate it. Signed-off-by: Hugh Dickins Signed-off-by: KOSAKI Motohiro Cc: Ralf Baechle Cc: linux-mips@linux-mips.org Cc: Nick Piggin Cc: Carsten Otte --- arch/mips/include/asm/pgtable.h | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h index 1854336..6ad2f73 100644 --- a/arch/mips/include/asm/pgtable.h +++ b/arch/mips/include/asm/pgtable.h @@ -387,6 +387,14 @@ static inline int io_remap_pfn_range(struct vm_area_struct *vma, remap_pfn_range(vma, vaddr, pfn, size, prot) #endif +#define __HAVE_ARCH_MOVE_PTE +pte_t move_pte(pte_t pte, pgprot_t prot, unsigned long old_addr, unsigned long new_addr) +{ + if (pte_present(pte) && is_zero_pfn(pte_pfn(pte))) + pte = mk_pte(ZERO_PAGE(new_addr), prot); + return pte; +} + #include /* -- 1.6.5.2 From ddaney@caviumnetworks.com Thu Jan 7 20:04:25 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 20:04:29 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:17081 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492464Ab0AGTEZ (ORCPT ); Thu, 7 Jan 2010 20:04:25 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Thu, 07 Jan 2010 11:04:14 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:03:36 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:03:36 -0800 Message-ID: <4B463005.8060505@caviumnetworks.com> Date: Thu, 07 Jan 2010 11:03:33 -0800 From: David Daney User-Agent: Thunderbird 2.0.0.21 (X11/20090320) MIME-Version: 1.0 To: Ralf Baechle , linux-mips , Netdev , Greg Kroah-Hartman Subject: [PATCH 0/7] Staging: Improvments to Octeon Ethernet driver (second attempt). Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 07 Jan 2010 19:03:36.0186 (UTC) FILETIME=[1D5795A0:01CA8FCC] X-archive-position: 25528 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5124 Content-Length: 1478 Lines: 34 These patches attempt to cleanup and improve the octeon-ethernet driver in staging. The first patch fixes up Octeon interrupt handling in preparation for the following patches. At David Miller's suggestion I have factored the changes into many more individual patches than I had in the first version. Since Octeon is a MIPS based SOC, we might want to merge the entire series via Ralf's linux-mips.org tree. I will reply with the seven patches. David Daney (7): MIPS: Octeon: Fix EIO handling. Staging: Octeon Ethernet: Remove unused code. Staging: Octeon Ethernet: Fix memory allocation. Staging: Octeon Ethernet: Rewrite transmit code. Staging: Octeon Ethernet: Convert to NAPI. Staging: Octeon Ethernet: Enable scatter-gather. Staging: Octeon Ethernet: Use constants from in.h arch/mips/cavium-octeon/octeon-irq.c | 40 +++- drivers/staging/octeon/Kconfig | 1 + drivers/staging/octeon/ethernet-defines.h | 31 --- drivers/staging/octeon/ethernet-mem.c | 89 ++----- drivers/staging/octeon/ethernet-rx.c | 377 ++++++++++++++++------------ drivers/staging/octeon/ethernet-rx.h | 25 ++- drivers/staging/octeon/ethernet-tx.c | 342 +++++++++++++------------- drivers/staging/octeon/ethernet-tx.h | 27 +-- drivers/staging/octeon/ethernet.c | 155 +++++-------- drivers/staging/octeon/octeon-ethernet.h | 48 +--- 10 files changed, 537 insertions(+), 598 deletions(-) From ddaney@caviumnetworks.com Thu Jan 7 20:06:03 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 20:06:08 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:17181 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492464Ab0AGTGD (ORCPT ); Thu, 7 Jan 2010 20:06:03 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Thu, 07 Jan 2010 11:05:25 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:05:11 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:05:10 -0800 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.2/8.14.2) with ESMTP id o07J58Yw032196; Thu, 7 Jan 2010 11:05:08 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.2/8.14.2/Submit) id o07J58Vl032195; Thu, 7 Jan 2010 11:05:08 -0800 From: David Daney To: ralf@linux-mips.org, linux-mips@linux-mips.org, netdev@vger.kernel.org, gregkh@suse.de Cc: David Daney Subject: [PATCH 7/7] Staging: Octeon Ethernet: Use constants from in.h Date: Thu, 7 Jan 2010 11:05:06 -0800 Message-Id: <1262891106-32146-7-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.0.6 In-Reply-To: <4B463005.8060505@caviumnetworks.com> References: <4B463005.8060505@caviumnetworks.com> X-OriginalArrivalTime: 07 Jan 2010 19:05:10.0859 (UTC) FILETIME=[55C589B0:01CA8FCC] X-archive-position: 25529 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5125 Content-Length: 1950 Lines: 49 Signed-off-by: David Daney --- drivers/staging/octeon/ethernet-defines.h | 3 --- drivers/staging/octeon/ethernet-tx.c | 8 ++++---- 2 files changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/staging/octeon/ethernet-defines.h b/drivers/staging/octeon/ethernet-defines.h index 9c4910e..00a8561 100644 --- a/drivers/staging/octeon/ethernet-defines.h +++ b/drivers/staging/octeon/ethernet-defines.h @@ -98,9 +98,6 @@ #define MAX_SKB_TO_FREE 10 #define MAX_OUT_QUEUE_DEPTH 1000 -#define IP_PROTOCOL_TCP 6 -#define IP_PROTOCOL_UDP 0x11 - #define FAU_NUM_PACKET_BUFFERS_TO_FREE (CVMX_FAU_REG_END - sizeof(uint32_t)) #define TOTAL_NUMBER_OF_PORTS (CVMX_PIP_NUM_INPUT_PORTS+1) diff --git a/drivers/staging/octeon/ethernet-tx.c b/drivers/staging/octeon/ethernet-tx.c index bc67e41..62258bd 100644 --- a/drivers/staging/octeon/ethernet-tx.c +++ b/drivers/staging/octeon/ethernet-tx.c @@ -359,8 +359,8 @@ dont_put_skbuff_in_hw: if (USE_HW_TCPUDP_CHECKSUM && (skb->protocol == htons(ETH_P_IP)) && (ip_hdr(skb)->version == 4) && (ip_hdr(skb)->ihl == 5) && ((ip_hdr(skb)->frag_off == 0) || (ip_hdr(skb)->frag_off == 1 << 14)) - && ((ip_hdr(skb)->protocol == IP_PROTOCOL_TCP) - || (ip_hdr(skb)->protocol == IP_PROTOCOL_UDP))) { + && ((ip_hdr(skb)->protocol == IPPROTO_TCP) + || (ip_hdr(skb)->protocol == IPPROTO_UDP))) { /* Use hardware checksum calc */ pko_command.s.ipoffp1 = sizeof(struct ethhdr) + 1; } @@ -550,8 +550,8 @@ int cvm_oct_xmit_pow(struct sk_buff *skb, struct net_device *dev) work->word2.s.dec_ipcomp = 0; /* FIXME */ #endif work->word2.s.tcp_or_udp = - (ip_hdr(skb)->protocol == IP_PROTOCOL_TCP) - || (ip_hdr(skb)->protocol == IP_PROTOCOL_UDP); + (ip_hdr(skb)->protocol == IPPROTO_TCP) + || (ip_hdr(skb)->protocol == IPPROTO_UDP); #if 0 /* FIXME */ work->word2.s.dec_ipsec = 0; -- 1.6.0.6 From ddaney@caviumnetworks.com Thu Jan 7 20:06:03 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 20:06:35 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:17173 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492512Ab0AGTGD (ORCPT ); Thu, 7 Jan 2010 20:06:03 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Thu, 07 Jan 2010 11:05:15 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:05:10 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:05:10 -0800 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.2/8.14.2) with ESMTP id o07J58FK032192; Thu, 7 Jan 2010 11:05:08 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.2/8.14.2/Submit) id o07J58hj032191; Thu, 7 Jan 2010 11:05:08 -0800 From: David Daney To: ralf@linux-mips.org, linux-mips@linux-mips.org, netdev@vger.kernel.org, gregkh@suse.de Cc: David Daney Subject: [PATCH 6/7] Staging: Octeon Ethernet: Enable scatter-gather. Date: Thu, 7 Jan 2010 11:05:05 -0800 Message-Id: <1262891106-32146-6-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.0.6 In-Reply-To: <4B463005.8060505@caviumnetworks.com> References: <4B463005.8060505@caviumnetworks.com> X-OriginalArrivalTime: 07 Jan 2010 19:05:10.0843 (UTC) FILETIME=[55C318B0:01CA8FCC] X-archive-position: 25530 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5127 Content-Length: 4550 Lines: 129 Octeon ethernet hardware can handle NETIF_F_SG, so we enable it. A gather list of up to six fragments will fit in the SKB's CB structure, so no extra memory is required. If a SKB has more than six fragments, we must linearize it. Signed-off-by: David Daney --- drivers/staging/octeon/ethernet-tx.c | 57 +++++++++++++++++++++++++++++---- drivers/staging/octeon/ethernet.c | 7 +++- 2 files changed, 55 insertions(+), 9 deletions(-) diff --git a/drivers/staging/octeon/ethernet-tx.c b/drivers/staging/octeon/ethernet-tx.c index 05b58f8..bc67e41 100644 --- a/drivers/staging/octeon/ethernet-tx.c +++ b/drivers/staging/octeon/ethernet-tx.c @@ -53,6 +53,8 @@ #include "cvmx-gmxx-defs.h" +#define CVM_OCT_SKB_CB(skb) ((u64 *)((skb)->cb)) + /* * You can define GET_SKBUFF_QOS() to override how the skbuff output * function determines which output queue is used. The default @@ -121,6 +123,7 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) uint64_t old_scratch; uint64_t old_scratch2; int qos; + int i; enum {QUEUE_CORE, QUEUE_HW, QUEUE_DROP} queue_type; struct octeon_ethernet *priv = netdev_priv(dev); struct sk_buff *to_free_list; @@ -171,6 +174,28 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) } /* + * We have space for 6 segment pointers, If there will be more + * than that, we must linearize. + */ + if (unlikely(skb_shinfo(skb)->nr_frags > 5)) { + if (unlikely(__skb_linearize(skb))) { + queue_type = QUEUE_DROP; + if (USE_ASYNC_IOBDMA) { + /* Get the number of skbuffs in use by the hardware */ + CVMX_SYNCIOBDMA; + skb_to_free = cvmx_scratch_read64(CVMX_SCR_SCRATCH); + } else { + /* Get the number of skbuffs in use by the hardware */ + skb_to_free = cvmx_fau_fetch_and_add32(priv->fau + qos * 4, + MAX_SKB_TO_FREE); + } + skb_to_free = cvm_oct_adjust_skb_to_free(skb_to_free, priv->fau + qos * 4); + spin_lock_irqsave(&priv->tx_free_list[qos].lock, flags); + goto skip_xmit; + } + } + + /* * The CN3XXX series of parts has an errata (GMX-401) which * causes the GMX block to hang if a collision occurs towards * the end of a <68 byte packet. As a workaround for this, we @@ -198,13 +223,6 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) } } - /* Build the PKO buffer pointer */ - hw_buffer.u64 = 0; - hw_buffer.s.addr = cvmx_ptr_to_phys(skb->data); - hw_buffer.s.pool = 0; - hw_buffer.s.size = - (unsigned long)skb_end_pointer(skb) - (unsigned long)skb->head; - /* Build the PKO command */ pko_command.u64 = 0; pko_command.s.n2 = 1; /* Don't pollute L2 with the outgoing packet */ @@ -215,6 +233,31 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) pko_command.s.dontfree = 1; pko_command.s.reg0 = priv->fau + qos * 4; + + /* Build the PKO buffer pointer */ + hw_buffer.u64 = 0; + if (skb_shinfo(skb)->nr_frags == 0) { + hw_buffer.s.addr = XKPHYS_TO_PHYS((u64)skb->data); + hw_buffer.s.pool = 0; + hw_buffer.s.size = skb->len; + } else { + hw_buffer.s.addr = XKPHYS_TO_PHYS((u64)skb->data); + hw_buffer.s.pool = 0; + hw_buffer.s.size = skb_headlen(skb); + CVM_OCT_SKB_CB(skb)[0] = hw_buffer.u64; + for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { + struct skb_frag_struct *fs = skb_shinfo(skb)->frags + i; + hw_buffer.s.addr = XKPHYS_TO_PHYS((u64)(page_address(fs->page) + fs->page_offset)); + hw_buffer.s.size = fs->size; + CVM_OCT_SKB_CB(skb)[i + 1] = hw_buffer.u64; + } + hw_buffer.s.addr = XKPHYS_TO_PHYS((u64)CVM_OCT_SKB_CB(skb)); + hw_buffer.s.size = skb_shinfo(skb)->nr_frags + 1; + pko_command.s.segs = skb_shinfo(skb)->nr_frags + 1; + pko_command.s.gather = 1; + goto dont_put_skbuff_in_hw; + } + /* * See if we can put this skb in the FPA pool. Any strange * behavior from the Linux networking stack will most likely diff --git a/drivers/staging/octeon/ethernet.c b/drivers/staging/octeon/ethernet.c index 9f5b741..9d63202 100644 --- a/drivers/staging/octeon/ethernet.c +++ b/drivers/staging/octeon/ethernet.c @@ -484,8 +484,11 @@ int cvm_oct_common_init(struct net_device *dev) && (always_use_pow || strstr(pow_send_list, dev->name))) priv->queue = -1; - if (priv->queue != -1 && USE_HW_TCPUDP_CHECKSUM) - dev->features |= NETIF_F_IP_CSUM; + if (priv->queue != -1) { + dev->features |= NETIF_F_SG; + if (USE_HW_TCPUDP_CHECKSUM) + dev->features |= NETIF_F_IP_CSUM; + } /* We do our own locking, Linux doesn't need to */ dev->features |= NETIF_F_LLTX; -- 1.6.0.6 From ddaney@caviumnetworks.com Thu Jan 7 20:06:04 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 20:07:01 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:17177 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492530Ab0AGTGE (ORCPT ); Thu, 7 Jan 2010 20:06:04 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Thu, 07 Jan 2010 11:05:18 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:05:10 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:05:10 -0800 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.2/8.14.2) with ESMTP id o07J5835032188; Thu, 7 Jan 2010 11:05:08 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.2/8.14.2/Submit) id o07J58Lf032187; Thu, 7 Jan 2010 11:05:08 -0800 From: David Daney To: ralf@linux-mips.org, linux-mips@linux-mips.org, netdev@vger.kernel.org, gregkh@suse.de Cc: David Daney Subject: [PATCH 5/7] Staging: Octeon Ethernet: Convert to NAPI. Date: Thu, 7 Jan 2010 11:05:04 -0800 Message-Id: <1262891106-32146-5-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.0.6 In-Reply-To: <4B463005.8060505@caviumnetworks.com> References: <4B463005.8060505@caviumnetworks.com> X-OriginalArrivalTime: 07 Jan 2010 19:05:10.0843 (UTC) FILETIME=[55C318B0:01CA8FCC] X-archive-position: 25531 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5128 Content-Length: 19282 Lines: 633 Convert the driver to be a reasonably well behaved NAPI citizen. There is one NAPI instance per CPU shared between all input ports. As receive backlog increases, NAPI is scheduled on additional CPUs. Receive buffer refill code factored out so it can also be called from the periodic timer. This is needed to recover from temporary buffer starvation conditions. Signed-off-by: David Daney --- drivers/staging/octeon/ethernet-defines.h | 18 -- drivers/staging/octeon/ethernet-rx.c | 300 ++++++++++++++++++----------- drivers/staging/octeon/ethernet-rx.h | 25 ++- drivers/staging/octeon/ethernet.c | 52 ++--- drivers/staging/octeon/octeon-ethernet.h | 3 + 5 files changed, 235 insertions(+), 163 deletions(-) diff --git a/drivers/staging/octeon/ethernet-defines.h b/drivers/staging/octeon/ethernet-defines.h index 6b8065f..9c4910e 100644 --- a/drivers/staging/octeon/ethernet-defines.h +++ b/drivers/staging/octeon/ethernet-defines.h @@ -45,10 +45,6 @@ * Controls if the Octeon TCP/UDP checksum engine is used for packet * output. If this is zero, the kernel will perform the checksum in * software. - * USE_MULTICORE_RECEIVE - * Process receive interrupts on multiple cores. This spreads the network - * load across the first 8 processors. If ths is zero, only one core - * processes incomming packets. * USE_ASYNC_IOBDMA * Use asynchronous IO access to hardware. This uses Octeon's asynchronous * IOBDMAs to issue IO accesses without stalling. Set this to zero @@ -79,15 +75,8 @@ #define REUSE_SKBUFFS_WITHOUT_FREE 1 #endif -/* Max interrupts per second per core */ -#define INTERRUPT_LIMIT 10000 - -/* Don't limit the number of interrupts */ -/*#define INTERRUPT_LIMIT 0 */ #define USE_HW_TCPUDP_CHECKSUM 1 -#define USE_MULTICORE_RECEIVE 1 - /* Enable Random Early Dropping under load */ #define USE_RED 1 #define USE_ASYNC_IOBDMA (CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0) @@ -105,17 +94,10 @@ /* Use this to not have FPA frees control L2 */ /*#define DONT_WRITEBACK(x) 0 */ -/* Maximum number of packets to process per interrupt. */ -#define MAX_RX_PACKETS 120 /* Maximum number of SKBs to try to free per xmit packet. */ #define MAX_SKB_TO_FREE 10 #define MAX_OUT_QUEUE_DEPTH 1000 -#ifndef CONFIG_SMP -#undef USE_MULTICORE_RECEIVE -#define USE_MULTICORE_RECEIVE 0 -#endif - #define IP_PROTOCOL_TCP 6 #define IP_PROTOCOL_UDP 0x11 diff --git a/drivers/staging/octeon/ethernet-rx.c b/drivers/staging/octeon/ethernet-rx.c index f63459a..b2e6ab6 100644 --- a/drivers/staging/octeon/ethernet-rx.c +++ b/drivers/staging/octeon/ethernet-rx.c @@ -4,7 +4,7 @@ * Contact: support@caviumnetworks.com * This file is part of the OCTEON SDK * - * Copyright (c) 2003-2007 Cavium Networks + * Copyright (c) 2003-2010 Cavium Networks * * This file is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, Version 2, as @@ -27,12 +27,14 @@ #include #include #include +#include #include #include #include #include #include #include +#include #include #ifdef CONFIG_XFRM #include @@ -44,8 +46,9 @@ #include #include "ethernet-defines.h" -#include "octeon-ethernet.h" #include "ethernet-mem.h" +#include "ethernet-rx.h" +#include "octeon-ethernet.h" #include "ethernet-util.h" #include "cvmx-helper.h" @@ -57,56 +60,82 @@ #include "cvmx-gmxx-defs.h" -struct cvm_tasklet_wrapper { - struct tasklet_struct t; -}; +struct cvm_napi_wrapper { + struct napi_struct napi; +} ____cacheline_aligned_in_smp; -/* - * Aligning the tasklet_struct on cachline boundries seems to decrease - * throughput even though in theory it would reduce contantion on the - * cache lines containing the locks. - */ +static struct cvm_napi_wrapper cvm_oct_napi[NR_CPUS] __cacheline_aligned_in_smp; -static struct cvm_tasklet_wrapper cvm_oct_tasklet[NR_CPUS]; +struct cvm_oct_core_state { + int baseline_cores; + /* + * The number of additional cores that could be processing + * input packtes. + */ + atomic_t available_cores; + cpumask_t cpu_state; +} ____cacheline_aligned_in_smp; -/** - * Interrupt handler. The interrupt occurs whenever the POW - * transitions from 0->1 packets in our group. - * - * @cpl: - * @dev_id: - * @regs: - * Returns - */ -irqreturn_t cvm_oct_do_interrupt(int cpl, void *dev_id) +static struct cvm_oct_core_state core_state __cacheline_aligned_in_smp; + +static void cvm_oct_enable_napi(void *_) { - /* Acknowledge the interrupt */ - if (INTERRUPT_LIMIT) - cvmx_write_csr(CVMX_POW_WQ_INT, 1 << pow_receive_group); - else - cvmx_write_csr(CVMX_POW_WQ_INT, 0x10001 << pow_receive_group); - preempt_disable(); - tasklet_schedule(&cvm_oct_tasklet[smp_processor_id()].t); - preempt_enable(); - return IRQ_HANDLED; + int cpu = smp_processor_id(); + napi_schedule(&cvm_oct_napi[cpu].napi); +} + +static void cvm_oct_enable_one_cpu(void) +{ + int v; + int cpu; + + /* Check to see if more CPUs are available for receive processing... */ + v = atomic_sub_if_positive(1, &core_state.available_cores); + if (v < 0) + return; + + /* ... if a CPU is available, Turn on NAPI polling for that CPU. */ + for_each_online_cpu(cpu) { + if (!cpu_test_and_set(cpu, core_state.cpu_state)) { + v = smp_call_function_single(cpu, cvm_oct_enable_napi, + NULL, 0); + if (v) + panic("Can't enable NAPI."); + break; + } + } +} + +static void cvm_oct_no_more_work(void) +{ + int cpu = smp_processor_id(); + + /* + * CPU zero is special. It always has the irq enabled when + * waiting for incoming packets. + */ + if (cpu == 0) { + enable_irq(OCTEON_IRQ_WORKQ0 + pow_receive_group); + return; + } + + cpu_clear(cpu, core_state.cpu_state); + atomic_add(1, &core_state.available_cores); } -#ifdef CONFIG_NET_POLL_CONTROLLER /** - * This is called when the kernel needs to manually poll the - * device. For Octeon, this is simply calling the interrupt - * handler. We actually poll all the devices, not just the - * one supplied. + * Interrupt handler. The interrupt occurs whenever the POW + * has packets in our group. * - * @dev: Device to poll. Unused */ -void cvm_oct_poll_controller(struct net_device *dev) +static irqreturn_t cvm_oct_do_interrupt(int cpl, void *dev_id) { - preempt_disable(); - tasklet_schedule(&cvm_oct_tasklet[smp_processor_id()].t); - preempt_enable(); + /* Disable the IRQ and start napi_poll. */ + disable_irq_nosync(OCTEON_IRQ_WORKQ0 + pow_receive_group); + cvm_oct_enable_napi(NULL); + + return IRQ_HANDLED; } -#endif /** * This is called on receive errors, and determines if the packet @@ -195,19 +224,19 @@ static inline int cvm_oct_check_rcv_error(cvmx_wqe_t *work) } /** - * Tasklet function that is scheduled on a core when an interrupt occurs. + * The NAPI poll function. * - * @unused: + * @napi: The NAPI instance, or null if called from cvm_oct_poll_controller + * @budget: Maximum number of packets to receive. */ -void cvm_oct_tasklet_rx(unsigned long unused) +static int cvm_oct_napi_poll(struct napi_struct *napi, int budget) { - const int coreid = cvmx_get_core_num(); - uint64_t old_group_mask; - uint64_t old_scratch; - int rx_count = 0; - int number_to_free; - int num_freed; - int packet_not_copied; + const int coreid = cvmx_get_core_num(); + uint64_t old_group_mask; + uint64_t old_scratch; + int rx_count = 0; + int did_work_request = 0; + int packet_not_copied; /* Prefetch cvm_oct_device since we know we need it soon */ prefetch(cvm_oct_device); @@ -223,59 +252,63 @@ void cvm_oct_tasklet_rx(unsigned long unused) cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid), (old_group_mask & ~0xFFFFull) | 1 << pow_receive_group); - if (USE_ASYNC_IOBDMA) + if (USE_ASYNC_IOBDMA) { cvmx_pow_work_request_async(CVMX_SCR_SCRATCH, CVMX_POW_NO_WAIT); + did_work_request = 1; + } - while (1) { + while (rx_count < budget) { struct sk_buff *skb = NULL; + struct sk_buff **pskb = NULL; int skb_in_hw; cvmx_wqe_t *work; - if (USE_ASYNC_IOBDMA) { + if (USE_ASYNC_IOBDMA && did_work_request) work = cvmx_pow_work_response_async(CVMX_SCR_SCRATCH); - } else { - if ((INTERRUPT_LIMIT == 0) - || likely(rx_count < MAX_RX_PACKETS)) - work = - cvmx_pow_work_request_sync - (CVMX_POW_NO_WAIT); - else - work = NULL; - } + else + work = cvmx_pow_work_request_sync(CVMX_POW_NO_WAIT); + prefetch(work); - if (work == NULL) + did_work_request = 0; + if (work == NULL) { + union cvmx_pow_wq_int wq_int; + wq_int.u64 = 0; + wq_int.s.iq_dis = 1 << pow_receive_group; + wq_int.s.wq_int = 1 << pow_receive_group; + cvmx_write_csr(CVMX_POW_WQ_INT, wq_int.u64); break; + } + pskb = (struct sk_buff **)(cvm_oct_get_buffer_ptr(work->packet_ptr) - sizeof(void *)); + prefetch(pskb); - /* - * Limit each core to processing MAX_RX_PACKETS - * packets without a break. This way the RX can't - * starve the TX task. - */ - if (USE_ASYNC_IOBDMA) { - - if ((INTERRUPT_LIMIT == 0) - || likely(rx_count < MAX_RX_PACKETS)) - cvmx_pow_work_request_async_nocheck - (CVMX_SCR_SCRATCH, CVMX_POW_NO_WAIT); - else { - cvmx_scratch_write64(CVMX_SCR_SCRATCH, - 0x8000000000000000ull); - cvmx_pow_tag_sw_null_nocheck(); - } + if (USE_ASYNC_IOBDMA && rx_count < (budget - 1)) { + cvmx_pow_work_request_async_nocheck(CVMX_SCR_SCRATCH, CVMX_POW_NO_WAIT); + did_work_request = 1; + } + + if (rx_count == 0) { + /* + * First time through, see if there is enough + * work waiting to merit waking another + * CPU. + */ + union cvmx_pow_wq_int_cntx counts; + int backlog; + int cores_in_use = core_state.baseline_cores - atomic_read(&core_state.available_cores); + counts.u64 = cvmx_read_csr(CVMX_POW_WQ_INT_CNTX(pow_receive_group)); + backlog = counts.s.iq_cnt + counts.s.ds_cnt; + if (backlog > budget * cores_in_use && napi != NULL) + cvm_oct_enable_one_cpu(); } skb_in_hw = USE_SKBUFFS_IN_HW && work->word2.s.bufs == 1; if (likely(skb_in_hw)) { - skb = - *(struct sk_buff - **)(cvm_oct_get_buffer_ptr(work->packet_ptr) - - sizeof(void *)); + skb = *pskb; prefetch(&skb->head); prefetch(&skb->len); } prefetch(cvm_oct_device[work->ipprt]); - rx_count++; /* Immediately throw away all packets with receive errors */ if (unlikely(work->word2.snoip.rcv_error)) { if (cvm_oct_check_rcv_error(work)) @@ -391,6 +424,7 @@ void cvm_oct_tasklet_rx(unsigned long unused) #endif } netif_receive_skb(skb); + rx_count++; } else { /* Drop any packet received for a device that isn't up */ /* @@ -432,47 +466,93 @@ void cvm_oct_tasklet_rx(unsigned long unused) cvm_oct_free_work(work); } } - /* Restore the original POW group mask */ cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid), old_group_mask); if (USE_ASYNC_IOBDMA) { /* Restore the scratch area */ cvmx_scratch_write64(CVMX_SCR_SCRATCH, old_scratch); } + cvm_oct_rx_refill_pool(0); - if (USE_SKBUFFS_IN_HW) { - /* Refill the packet buffer pool */ - number_to_free = - cvmx_fau_fetch_and_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE, 0); - - if (number_to_free > 0) { - cvmx_fau_atomic_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE, - -number_to_free); - num_freed = - cvm_oct_mem_fill_fpa(CVMX_FPA_PACKET_POOL, - CVMX_FPA_PACKET_POOL_SIZE, - number_to_free); - if (num_freed != number_to_free) { - cvmx_fau_atomic_add32 - (FAU_NUM_PACKET_BUFFERS_TO_FREE, - number_to_free - num_freed); - } - } + if (rx_count < budget && napi != NULL) { + /* No more work */ + napi_complete(napi); + cvm_oct_no_more_work(); } + return rx_count; +} + +#ifdef CONFIG_NET_POLL_CONTROLLER +/** + * This is called when the kernel needs to manually poll the + * device. + * + * @dev: Device to poll. Unused + */ +void cvm_oct_poll_controller(struct net_device *dev) +{ + cvm_oct_napi_poll(NULL, 16); } +#endif void cvm_oct_rx_initialize(void) { int i; - /* Initialize all of the tasklets */ - for (i = 0; i < NR_CPUS; i++) - tasklet_init(&cvm_oct_tasklet[i].t, cvm_oct_tasklet_rx, 0); + struct net_device *dev_for_napi = NULL; + union cvmx_pow_wq_int_thrx int_thr; + union cvmx_pow_wq_int_pc int_pc; + + for (i = 0; i < TOTAL_NUMBER_OF_PORTS; i++) { + if (cvm_oct_device[i]) { + dev_for_napi = cvm_oct_device[i]; + break; + } + } + + if (NULL == dev_for_napi) + panic("No net_devices were allocated."); + + if (max_rx_cpus > 1 && max_rx_cpus < num_online_cpus()) + atomic_set(&core_state.available_cores, max_rx_cpus); + else + atomic_set(&core_state.available_cores, num_online_cpus()); + core_state.baseline_cores = atomic_read(&core_state.available_cores); + + core_state.cpu_state = CPU_MASK_NONE; + for_each_possible_cpu(i) { + netif_napi_add(dev_for_napi, &cvm_oct_napi[i].napi, + cvm_oct_napi_poll, rx_napi_weight); + napi_enable(&cvm_oct_napi[i].napi); + } + /* Register an IRQ hander for to receive POW interrupts */ + i = request_irq(OCTEON_IRQ_WORKQ0 + pow_receive_group, + cvm_oct_do_interrupt, 0, "Ethernet", cvm_oct_device); + + if (i) + panic("Could not acquire Ethernet IRQ %d\n", + OCTEON_IRQ_WORKQ0 + pow_receive_group); + + disable_irq_nosync(OCTEON_IRQ_WORKQ0 + pow_receive_group); + + int_thr.u64 = 0; + int_thr.s.tc_en = 1; + int_thr.s.tc_thr = 1; + /* Enable POW interrupt when our port has at least one packet */ + cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), int_thr.u64); + + int_pc.u64 = 0; + int_pc.s.pc_thr = 5; + cvmx_write_csr(CVMX_POW_WQ_INT_PC, int_pc.u64); + + + /* Scheduld NAPI now. This will indirectly enable interrupts. */ + cvm_oct_enable_one_cpu(); } void cvm_oct_rx_shutdown(void) { int i; - /* Shutdown all of the tasklets */ - for (i = 0; i < NR_CPUS; i++) - tasklet_kill(&cvm_oct_tasklet[i].t); + /* Shutdown all of the NAPIs */ + for_each_possible_cpu(i) + netif_napi_del(&cvm_oct_napi[i].napi); } diff --git a/drivers/staging/octeon/ethernet-rx.h b/drivers/staging/octeon/ethernet-rx.h index a9b72b8..a0743b8 100644 --- a/drivers/staging/octeon/ethernet-rx.h +++ b/drivers/staging/octeon/ethernet-rx.h @@ -24,10 +24,29 @@ * This file may also be available under a different license from Cavium. * Contact Cavium Networks for more information *********************************************************************/ +#include "cvmx-fau.h" -irqreturn_t cvm_oct_do_interrupt(int cpl, void *dev_id); void cvm_oct_poll_controller(struct net_device *dev); -void cvm_oct_tasklet_rx(unsigned long unused); - void cvm_oct_rx_initialize(void); void cvm_oct_rx_shutdown(void); + +static inline void cvm_oct_rx_refill_pool(int fill_threshold) +{ + int number_to_free; + int num_freed; + /* Refill the packet buffer pool */ + number_to_free = + cvmx_fau_fetch_and_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE, 0); + + if (number_to_free > fill_threshold) { + cvmx_fau_atomic_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE, + -number_to_free); + num_freed = cvm_oct_mem_fill_fpa(CVMX_FPA_PACKET_POOL, + CVMX_FPA_PACKET_POOL_SIZE, + number_to_free); + if (num_freed != number_to_free) { + cvmx_fau_atomic_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE, + number_to_free - num_freed); + } + } +} diff --git a/drivers/staging/octeon/ethernet.c b/drivers/staging/octeon/ethernet.c index 973178a..9f5b741 100644 --- a/drivers/staging/octeon/ethernet.c +++ b/drivers/staging/octeon/ethernet.c @@ -104,6 +104,16 @@ MODULE_PARM_DESC(pow_send_list, "\n" "\t\"eth2,spi3,spi7\" would cause these three devices to transmit\n" "\tusing the pow_send_group."); +int max_rx_cpus = -1; +module_param(max_rx_cpus, int, 0444); +MODULE_PARM_DESC(max_rx_cpus, "\n" + "\t\tThe maximum number of CPUs to use for packet reception.\n" + "\t\tUse -1 to use all available CPUs."); + +int rx_napi_weight = 32; +module_param(rx_napi_weight, int, 0444); +MODULE_PARM_DESC(rx_napi_weight, "The NAPI WEIGHT parameter."); + /* * The offset from mac_addr_base that should be used for the next port * that is configured. By convention, if any mgmt ports exist on the @@ -149,6 +159,15 @@ static void cvm_do_timer(unsigned long arg) } else { port = 0; /* + * FPA 0 may have been drained, try to refill it if we + * need more than num_packet_buffers / 2, otherwise + * normal receive processing will refill it. If it + * were drained, no packets could be received so + * cvm_oct_napi_poll would never be invoked to do the + * refill. + */ + cvm_oct_rx_refill_pool(num_packet_buffers / 2); + /* * All ports have been polled. Start the next iteration through * the ports in one second. */ @@ -161,7 +180,6 @@ static void cvm_do_timer(unsigned long arg) */ static __init void cvm_oct_configure_common_hw(void) { - int r; /* Setup the FPA */ cvmx_fpa_enable(); cvm_oct_mem_fill_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE, @@ -176,17 +194,6 @@ static __init void cvm_oct_configure_common_hw(void) cvmx_helper_setup_red(num_packet_buffers / 4, num_packet_buffers / 8); - /* Register an IRQ hander for to receive POW interrupts */ - r = request_irq(OCTEON_IRQ_WORKQ0 + pow_receive_group, - cvm_oct_do_interrupt, IRQF_SHARED, "Ethernet", - cvm_oct_device); - -#if defined(CONFIG_SMP) && 0 - if (USE_MULTICORE_RECEIVE) { - irq_set_affinity(OCTEON_IRQ_WORKQ0 + pow_receive_group, - cpu_online_mask); - } -#endif } /** @@ -616,7 +623,6 @@ static int __init cvm_oct_init_module(void) cvm_oct_mac_addr_offset = 0; cvm_oct_proc_initialize(); - cvm_oct_rx_initialize(); cvm_oct_configure_common_hw(); cvmx_helper_initialize_packet_io_global(); @@ -781,25 +787,7 @@ static int __init cvm_oct_init_module(void) } } - if (INTERRUPT_LIMIT) { - /* - * Set the POW timer rate to give an interrupt at most - * INTERRUPT_LIMIT times per second. - */ - cvmx_write_csr(CVMX_POW_WQ_INT_PC, - octeon_bootinfo->eclock_hz / (INTERRUPT_LIMIT * - 16 * 256) << 8); - - /* - * Enable POW timer interrupt. It will count when - * there are packets available. - */ - cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), - 0x1ful << 24); - } else { - /* Enable POW interrupt when our port has at least one packet */ - cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), 0x1001); - } + cvm_oct_rx_initialize(); /* Enable the poll timer for checking RGMII status */ init_timer(&cvm_oct_poll_timer); diff --git a/drivers/staging/octeon/octeon-ethernet.h b/drivers/staging/octeon/octeon-ethernet.h index 203c6a9..40b6956 100644 --- a/drivers/staging/octeon/octeon-ethernet.h +++ b/drivers/staging/octeon/octeon-ethernet.h @@ -98,4 +98,7 @@ extern int pow_receive_group; extern char pow_send_list[]; extern struct net_device *cvm_oct_device[]; +extern int max_rx_cpus; +extern int rx_napi_weight; + #endif -- 1.6.0.6 From ddaney@caviumnetworks.com Thu Jan 7 20:06:05 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 20:07:25 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:17185 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492532Ab0AGTGF (ORCPT ); Thu, 7 Jan 2010 20:06:05 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Thu, 07 Jan 2010 11:05:44 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:05:11 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:05:10 -0800 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.2/8.14.2) with ESMTP id o07J57IR032172; Thu, 7 Jan 2010 11:05:07 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.2/8.14.2/Submit) id o07J561W032170; Thu, 7 Jan 2010 11:05:06 -0800 From: David Daney To: ralf@linux-mips.org, linux-mips@linux-mips.org, netdev@vger.kernel.org, gregkh@suse.de Cc: David Daney Subject: [PATCH 1/7] MIPS: Octeon: Fix EIO handling. Date: Thu, 7 Jan 2010 11:05:00 -0800 Message-Id: <1262891106-32146-1-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.0.6 In-Reply-To: <4B463005.8060505@caviumnetworks.com> References: <4B463005.8060505@caviumnetworks.com> X-OriginalArrivalTime: 07 Jan 2010 19:05:10.0859 (UTC) FILETIME=[55C589B0:01CA8FCC] X-archive-position: 25532 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5131 Content-Length: 3466 Lines: 102 If an interrupt handler disables interrupts, the EOI function will just reenable them. This will put us in an endless loop when the upcoming Ethernet driver patches are applied. Only reenable the interrupt on EOI if it is not IRQ_DISABLED. This requires that the EIO function be separate from the ENABLE function. We also rename the ACK functions to correspond with their function. Signed-off-by: David Daney --- arch/mips/cavium-octeon/octeon-irq.c | 40 ++++++++++++++++++++++++++++----- 1 files changed, 34 insertions(+), 6 deletions(-) diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c index 6f2acf0..1460d08 100644 --- a/arch/mips/cavium-octeon/octeon-irq.c +++ b/arch/mips/cavium-octeon/octeon-irq.c @@ -193,7 +193,7 @@ static void octeon_irq_ciu0_enable_v2(unsigned int irq) * Disable the irq on the current core for chips that have the EN*_W1{S,C} * registers. */ -static void octeon_irq_ciu0_disable_v2(unsigned int irq) +static void octeon_irq_ciu0_ack_v2(unsigned int irq) { int index = cvmx_get_core_num() * 2; u64 mask = 1ull << (irq - OCTEON_IRQ_WORKQ0); @@ -202,6 +202,20 @@ static void octeon_irq_ciu0_disable_v2(unsigned int irq) } /* + * Enable the irq on the current core for chips that have the EN*_W1{S,C} + * registers. + */ +static void octeon_irq_ciu0_eoi_v2(unsigned int irq) +{ + struct irq_desc *desc = irq_desc + irq; + int index = cvmx_get_core_num() * 2; + u64 mask = 1ull << (irq - OCTEON_IRQ_WORKQ0); + + if ((desc->status & IRQ_DISABLED) == 0) + cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); +} + +/* * Disable the irq on the all cores for chips that have the EN*_W1{S,C} * registers. */ @@ -272,8 +286,8 @@ static struct irq_chip octeon_irq_chip_ciu0_v2 = { .name = "CIU0", .enable = octeon_irq_ciu0_enable_v2, .disable = octeon_irq_ciu0_disable_all_v2, - .ack = octeon_irq_ciu0_disable_v2, - .eoi = octeon_irq_ciu0_enable_v2, + .ack = octeon_irq_ciu0_ack_v2, + .eoi = octeon_irq_ciu0_eoi_v2, #ifdef CONFIG_SMP .set_affinity = octeon_irq_ciu0_set_affinity_v2, #endif @@ -374,7 +388,7 @@ static void octeon_irq_ciu1_enable_v2(unsigned int irq) * Disable the irq on the current core for chips that have the EN*_W1{S,C} * registers. */ -static void octeon_irq_ciu1_disable_v2(unsigned int irq) +static void octeon_irq_ciu1_ack_v2(unsigned int irq) { int index = cvmx_get_core_num() * 2 + 1; u64 mask = 1ull << (irq - OCTEON_IRQ_WDOG0); @@ -383,6 +397,20 @@ static void octeon_irq_ciu1_disable_v2(unsigned int irq) } /* + * Enable the irq on the current core for chips that have the EN*_W1{S,C} + * registers. + */ +static void octeon_irq_ciu1_eoi_v2(unsigned int irq) +{ + struct irq_desc *desc = irq_desc + irq; + int index = cvmx_get_core_num() * 2 + 1; + u64 mask = 1ull << (irq - OCTEON_IRQ_WDOG0); + + if ((desc->status & IRQ_DISABLED) == 0) + cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); +} + +/* * Disable the irq on the all cores for chips that have the EN*_W1{S,C} * registers. */ @@ -455,8 +483,8 @@ static struct irq_chip octeon_irq_chip_ciu1_v2 = { .name = "CIU0", .enable = octeon_irq_ciu1_enable_v2, .disable = octeon_irq_ciu1_disable_all_v2, - .ack = octeon_irq_ciu1_disable_v2, - .eoi = octeon_irq_ciu1_enable_v2, + .ack = octeon_irq_ciu1_ack_v2, + .eoi = octeon_irq_ciu1_eoi_v2, #ifdef CONFIG_SMP .set_affinity = octeon_irq_ciu1_set_affinity_v2, #endif -- 1.6.0.6 From ddaney@caviumnetworks.com Thu Jan 7 20:06:06 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 20:07:51 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:17186 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492533Ab0AGTGG (ORCPT ); Thu, 7 Jan 2010 20:06:06 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Thu, 07 Jan 2010 11:05:39 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:05:11 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:05:10 -0800 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.2/8.14.2) with ESMTP id o07J587l032180; Thu, 7 Jan 2010 11:05:08 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.2/8.14.2/Submit) id o07J58sk032179; Thu, 7 Jan 2010 11:05:08 -0800 From: David Daney To: ralf@linux-mips.org, linux-mips@linux-mips.org, netdev@vger.kernel.org, gregkh@suse.de Cc: David Daney Subject: [PATCH 3/7] Staging: Octeon Ethernet: Fix memory allocation. Date: Thu, 7 Jan 2010 11:05:02 -0800 Message-Id: <1262891106-32146-3-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.0.6 In-Reply-To: <4B463005.8060505@caviumnetworks.com> References: <4B463005.8060505@caviumnetworks.com> X-OriginalArrivalTime: 07 Jan 2010 19:05:10.0843 (UTC) FILETIME=[55C318B0:01CA8FCC] X-archive-position: 25533 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5133 Content-Length: 4291 Lines: 114 kmalloc already returns aligned blocks. No need to try to realign them. There are no guarantees about the alignment of SKB data, so we need to handle worst case alignment. Since right shifts over subtraction have no distributive property, we need to fix the back pointer calculation. Signed-off-by: David Daney --- drivers/staging/octeon/ethernet-mem.c | 14 ++++++-------- drivers/staging/octeon/ethernet-tx.c | 6 +++--- 2 files changed, 9 insertions(+), 11 deletions(-) diff --git a/drivers/staging/octeon/ethernet-mem.c b/drivers/staging/octeon/ethernet-mem.c index 7090521..7f1372f 100644 --- a/drivers/staging/octeon/ethernet-mem.c +++ b/drivers/staging/octeon/ethernet-mem.c @@ -4,7 +4,7 @@ * Contact: support@caviumnetworks.com * This file is part of the OCTEON SDK * - * Copyright (c) 2003-2007 Cavium Networks + * Copyright (c) 2003-2010 Cavium Networks * * This file is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, Version 2, as @@ -45,7 +45,7 @@ static int cvm_oct_fill_hw_skbuff(int pool, int size, int elements) int freed = elements; while (freed) { - struct sk_buff *skb = dev_alloc_skb(size + 128); + struct sk_buff *skb = dev_alloc_skb(size + 256); if (unlikely(skb == NULL)) { pr_warning ("Failed to allocate skb for hardware pool %d\n", @@ -53,7 +53,7 @@ static int cvm_oct_fill_hw_skbuff(int pool, int size, int elements) break; } - skb_reserve(skb, 128 - (((unsigned long)skb->data) & 0x7f)); + skb_reserve(skb, 256 - (((unsigned long)skb->data) & 0x7f)); *(struct sk_buff **)(skb->data - sizeof(void *)) = skb; cvmx_fpa_free(skb->data, pool, DONT_WRITEBACK(size / 128)); freed--; @@ -106,14 +106,12 @@ static int cvm_oct_fill_hw_memory(int pool, int size, int elements) int freed = elements; while (freed) { - /* We need to force alignment to 128 bytes here */ - memory = kmalloc(size + 127, GFP_ATOMIC); + memory = kmalloc(size, GFP_ATOMIC); if (unlikely(memory == NULL)) { pr_warning("Unable to allocate %u bytes for FPA pool %d\n", elements * size, pool); break; } - memory = (char *)(((unsigned long)memory + 127) & -128); cvmx_fpa_free(memory, pool, 0); freed--; } @@ -149,7 +147,7 @@ static void cvm_oct_free_hw_memory(int pool, int size, int elements) int cvm_oct_mem_fill_fpa(int pool, int size, int elements) { int freed; - if (USE_SKBUFFS_IN_HW) + if (USE_SKBUFFS_IN_HW && pool == CVMX_FPA_PACKET_POOL) freed = cvm_oct_fill_hw_skbuff(pool, size, elements); else freed = cvm_oct_fill_hw_memory(pool, size, elements); @@ -158,7 +156,7 @@ int cvm_oct_mem_fill_fpa(int pool, int size, int elements) void cvm_oct_mem_empty_fpa(int pool, int size, int elements) { - if (USE_SKBUFFS_IN_HW) + if (USE_SKBUFFS_IN_HW && pool == CVMX_FPA_PACKET_POOL) cvm_oct_free_hw_skbuff(pool, size, elements); else cvm_oct_free_hw_memory(pool, size, elements); diff --git a/drivers/staging/octeon/ethernet-tx.c b/drivers/staging/octeon/ethernet-tx.c index a3594bb..e5695d9 100644 --- a/drivers/staging/octeon/ethernet-tx.c +++ b/drivers/staging/octeon/ethernet-tx.c @@ -4,7 +4,7 @@ * Contact: support@caviumnetworks.com * This file is part of the OCTEON SDK * - * Copyright (c) 2003-2007 Cavium Networks + * Copyright (c) 2003-2010 Cavium Networks * * This file is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, Version 2, as @@ -186,7 +186,7 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) * shown a 25% increase in performance under some loads. */ #if REUSE_SKBUFFS_WITHOUT_FREE - fpa_head = skb->head + 128 - ((unsigned long)skb->head & 0x7f); + fpa_head = skb->head + 256 - ((unsigned long)skb->head & 0x7f); if (unlikely(skb->data < fpa_head)) { /* * printk("TX buffer beginning can't meet FPA @@ -247,7 +247,7 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) pko_command.s.reg0 = 0; pko_command.s.dontfree = 0; - hw_buffer.s.back = (skb->data - fpa_head) >> 7; + hw_buffer.s.back = ((unsigned long)skb->data >> 7) - ((unsigned long)fpa_head >> 7); *(struct sk_buff **)(fpa_head - sizeof(void *)) = skb; /* -- 1.6.0.6 From ddaney@caviumnetworks.com Thu Jan 7 20:06:06 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 20:08:15 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:17189 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492570Ab0AGTGG (ORCPT ); Thu, 7 Jan 2010 20:06:06 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Thu, 07 Jan 2010 11:05:34 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:05:11 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:05:10 -0800 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.2/8.14.2) with ESMTP id o07J57EU032176; Thu, 7 Jan 2010 11:05:07 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.2/8.14.2/Submit) id o07J57ne032175; Thu, 7 Jan 2010 11:05:07 -0800 From: David Daney To: ralf@linux-mips.org, linux-mips@linux-mips.org, netdev@vger.kernel.org, gregkh@suse.de Cc: David Daney Subject: [PATCH 2/7] Staging: Octeon Ethernet: Remove unused code. Date: Thu, 7 Jan 2010 11:05:01 -0800 Message-Id: <1262891106-32146-2-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.0.6 In-Reply-To: <4B463005.8060505@caviumnetworks.com> References: <4B463005.8060505@caviumnetworks.com> X-OriginalArrivalTime: 07 Jan 2010 19:05:10.0859 (UTC) FILETIME=[55C589B0:01CA8FCC] X-archive-position: 25534 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5134 Content-Length: 18972 Lines: 564 Remove unused code, reindent, and join some spilt strings. Signed-off-by: David Daney --- drivers/staging/octeon/ethernet-defines.h | 10 --- drivers/staging/octeon/ethernet-mem.c | 81 +++++++----------------- drivers/staging/octeon/ethernet-rx.c | 77 +++++++--------------- drivers/staging/octeon/ethernet-tx.c | 99 ----------------------------- drivers/staging/octeon/ethernet.c | 31 ++------- drivers/staging/octeon/octeon-ethernet.h | 41 ------------ 6 files changed, 55 insertions(+), 284 deletions(-) diff --git a/drivers/staging/octeon/ethernet-defines.h b/drivers/staging/octeon/ethernet-defines.h index f13131b..6b8065f 100644 --- a/drivers/staging/octeon/ethernet-defines.h +++ b/drivers/staging/octeon/ethernet-defines.h @@ -41,9 +41,6 @@ * Tells the driver to populate the packet buffers with kernel skbuffs. * This allows the driver to receive packets without copying them. It also * means that 32bit userspace can't access the packet buffers. - * USE_32BIT_SHARED - * This define tells the driver to allocate memory for buffers from the - * 32bit sahred region instead of the kernel memory space. * USE_HW_TCPUDP_CHECKSUM * Controls if the Octeon TCP/UDP checksum engine is used for packet * output. If this is zero, the kernel will perform the checksum in @@ -75,19 +72,12 @@ #define CONFIG_CAVIUM_RESERVE32 0 #endif -#if CONFIG_CAVIUM_RESERVE32 -#define USE_32BIT_SHARED 1 -#define USE_SKBUFFS_IN_HW 0 -#define REUSE_SKBUFFS_WITHOUT_FREE 0 -#else -#define USE_32BIT_SHARED 0 #define USE_SKBUFFS_IN_HW 1 #ifdef CONFIG_NETFILTER #define REUSE_SKBUFFS_WITHOUT_FREE 0 #else #define REUSE_SKBUFFS_WITHOUT_FREE 1 #endif -#endif /* Max interrupts per second per core */ #define INTERRUPT_LIMIT 10000 diff --git a/drivers/staging/octeon/ethernet-mem.c b/drivers/staging/octeon/ethernet-mem.c index b595903..7090521 100644 --- a/drivers/staging/octeon/ethernet-mem.c +++ b/drivers/staging/octeon/ethernet-mem.c @@ -26,8 +26,6 @@ **********************************************************************/ #include #include -#include -#include #include @@ -107,42 +105,17 @@ static int cvm_oct_fill_hw_memory(int pool, int size, int elements) char *memory; int freed = elements; - if (USE_32BIT_SHARED) { - extern uint64_t octeon_reserve32_memory; - - memory = - cvmx_bootmem_alloc_range(elements * size, 128, - octeon_reserve32_memory, - octeon_reserve32_memory + - (CONFIG_CAVIUM_RESERVE32 << 20) - - 1); - if (memory == NULL) - panic("Unable to allocate %u bytes for FPA pool %d\n", - elements * size, pool); - - pr_notice("Memory range %p - %p reserved for " - "hardware\n", memory, - memory + elements * size - 1); - - while (freed) { - cvmx_fpa_free(memory, pool, 0); - memory += size; - freed--; - } - } else { - while (freed) { - /* We need to force alignment to 128 bytes here */ - memory = kmalloc(size + 127, GFP_ATOMIC); - if (unlikely(memory == NULL)) { - pr_warning("Unable to allocate %u bytes for " - "FPA pool %d\n", - elements * size, pool); - break; - } - memory = (char *)(((unsigned long)memory + 127) & -128); - cvmx_fpa_free(memory, pool, 0); - freed--; + while (freed) { + /* We need to force alignment to 128 bytes here */ + memory = kmalloc(size + 127, GFP_ATOMIC); + if (unlikely(memory == NULL)) { + pr_warning("Unable to allocate %u bytes for FPA pool %d\n", + elements * size, pool); + break; } + memory = (char *)(((unsigned long)memory + 127) & -128); + cvmx_fpa_free(memory, pool, 0); + freed--; } return elements - freed; } @@ -156,27 +129,21 @@ static int cvm_oct_fill_hw_memory(int pool, int size, int elements) */ static void cvm_oct_free_hw_memory(int pool, int size, int elements) { - if (USE_32BIT_SHARED) { - pr_warning("Warning: 32 shared memory is not freeable\n"); - } else { - char *memory; - do { - memory = cvmx_fpa_alloc(pool); - if (memory) { - elements--; - kfree(phys_to_virt(cvmx_ptr_to_phys(memory))); - } - } while (memory); + char *memory; + do { + memory = cvmx_fpa_alloc(pool); + if (memory) { + elements--; + kfree(phys_to_virt(cvmx_ptr_to_phys(memory))); + } + } while (memory); - if (elements < 0) - pr_warning("Freeing of pool %u had too many " - "buffers (%d)\n", - pool, elements); - else if (elements > 0) - pr_warning("Warning: Freeing of pool %u is " - "missing %d buffers\n", - pool, elements); - } + if (elements < 0) + pr_warning("Freeing of pool %u had too many buffers (%d)\n", + pool, elements); + else if (elements > 0) + pr_warning("Warning: Freeing of pool %u is missing %d buffers\n", + pool, elements); } int cvm_oct_mem_fill_fpa(int pool, int size, int elements) diff --git a/drivers/staging/octeon/ethernet-rx.c b/drivers/staging/octeon/ethernet-rx.c index 1b237b7..f63459a 100644 --- a/drivers/staging/octeon/ethernet-rx.c +++ b/drivers/staging/octeon/ethernet-rx.c @@ -33,10 +33,6 @@ #include #include #include -#include -#include -#include -#include #include #ifdef CONFIG_XFRM #include @@ -292,39 +288,27 @@ void cvm_oct_tasklet_rx(unsigned long unused) * buffer. */ if (likely(skb_in_hw)) { - /* - * This calculation was changed in case the - * skb header is using a different address - * aliasing type than the buffer. It doesn't - * make any differnece now, but the new one is - * more correct. - */ - skb->data = - skb->head + work->packet_ptr.s.addr - - cvmx_ptr_to_phys(skb->head); + skb->data = skb->head + work->packet_ptr.s.addr - cvmx_ptr_to_phys(skb->head); prefetch(skb->data); skb->len = work->len; skb_set_tail_pointer(skb, skb->len); packet_not_copied = 1; } else { - /* * We have to copy the packet. First allocate * an skbuff for it. */ skb = dev_alloc_skb(work->len); if (!skb) { - DEBUGPRINT("Port %d failed to allocate " - "skbuff, packet dropped\n", - work->ipprt); + DEBUGPRINT("Port %d failed to allocate skbuff, packet dropped\n", + work->ipprt); cvm_oct_free_work(work); continue; } /* * Check if we've received a packet that was - * entirely stored in the work entry. This is - * untested. + * entirely stored in the work entry. */ if (unlikely(work->word2.s.bufs == 0)) { uint8_t *ptr = work->packet_data; @@ -343,15 +327,13 @@ void cvm_oct_tasklet_rx(unsigned long unused) /* No packet buffers to free */ } else { int segments = work->word2.s.bufs; - union cvmx_buf_ptr segment_ptr = - work->packet_ptr; + union cvmx_buf_ptr segment_ptr = work->packet_ptr; int len = work->len; while (segments--) { union cvmx_buf_ptr next_ptr = - *(union cvmx_buf_ptr *) - cvmx_phys_to_ptr(segment_ptr.s. - addr - 8); + *(union cvmx_buf_ptr *)cvmx_phys_to_ptr(segment_ptr.s.addr - 8); + /* * Octeon Errata PKI-100: The segment size is * wrong. Until it is fixed, calculate the @@ -361,22 +343,18 @@ void cvm_oct_tasklet_rx(unsigned long unused) * one: int segment_size = * segment_ptr.s.size; */ - int segment_size = - CVMX_FPA_PACKET_POOL_SIZE - - (segment_ptr.s.addr - - (((segment_ptr.s.addr >> 7) - - segment_ptr.s.back) << 7)); - /* Don't copy more than what is left - in the packet */ + int segment_size = CVMX_FPA_PACKET_POOL_SIZE - + (segment_ptr.s.addr - (((segment_ptr.s.addr >> 7) - segment_ptr.s.back) << 7)); + /* + * Don't copy more than what + * is left in the packet. + */ if (segment_size > len) segment_size = len; /* Copy the data into the packet */ memcpy(skb_put(skb, segment_size), - cvmx_phys_to_ptr(segment_ptr.s. - addr), + cvmx_phys_to_ptr(segment_ptr.s.addr), segment_size); - /* Reduce the amount of bytes left - to copy */ len -= segment_size; segment_ptr = next_ptr; } @@ -389,16 +367,15 @@ void cvm_oct_tasklet_rx(unsigned long unused) struct net_device *dev = cvm_oct_device[work->ipprt]; struct octeon_ethernet *priv = netdev_priv(dev); - /* Only accept packets for devices - that are currently up */ + /* + * Only accept packets for devices that are + * currently up. + */ if (likely(dev->flags & IFF_UP)) { skb->protocol = eth_type_trans(skb, dev); skb->dev = dev; - if (unlikely - (work->word2.s.not_IP - || work->word2.s.IP_exc - || work->word2.s.L4_error)) + if (unlikely(work->word2.s.not_IP || work->word2.s.IP_exc || work->word2.s.L4_error)) skb->ip_summed = CHECKSUM_NONE; else skb->ip_summed = CHECKSUM_UNNECESSARY; @@ -415,14 +392,11 @@ void cvm_oct_tasklet_rx(unsigned long unused) } netif_receive_skb(skb); } else { + /* Drop any packet received for a device that isn't up */ /* - * Drop any packet received for a - * device that isn't up. - */ - /* - DEBUGPRINT("%s: Device not up, packet dropped\n", - dev->name); - */ + DEBUGPRINT("%s: Device not up, packet dropped\n", + dev->name); + */ #ifdef CONFIG_64BIT atomic64_add(1, (atomic64_t *)&priv->stats.rx_dropped); #else @@ -435,9 +409,8 @@ void cvm_oct_tasklet_rx(unsigned long unused) * Drop any packet received for a device that * doesn't exist. */ - DEBUGPRINT("Port %d not controlled by Linux, packet " - "dropped\n", - work->ipprt); + DEBUGPRINT("Port %d not controlled by Linux, packet dropped\n", + work->ipprt); dev_kfree_skb_irq(skb); } /* diff --git a/drivers/staging/octeon/ethernet-tx.c b/drivers/staging/octeon/ethernet-tx.c index 5352941..a3594bb 100644 --- a/drivers/staging/octeon/ethernet-tx.c +++ b/drivers/staging/octeon/ethernet-tx.c @@ -31,10 +31,6 @@ #include #include #include -#include -#include -#include -#include #include #ifdef CONFIG_XFRM #include @@ -529,101 +525,6 @@ int cvm_oct_xmit_pow(struct sk_buff *skb, struct net_device *dev) } /** - * Transmit a work queue entry out of the ethernet port. Both - * the work queue entry and the packet data can optionally be - * freed. The work will be freed on error as well. - * - * @dev: Device to transmit out. - * @work_queue_entry: - * Work queue entry to send - * @do_free: True if the work queue entry and packet data should be - * freed. If false, neither will be freed. - * @qos: Index into the queues for this port to transmit on. This - * is used to implement QoS if their are multiple queues per - * port. This parameter must be between 0 and the number of - * queues per port minus 1. Values outside of this range will - * be change to zero. - * - * Returns Zero on success, negative on failure. - */ -int cvm_oct_transmit_qos(struct net_device *dev, void *work_queue_entry, - int do_free, int qos) -{ - unsigned long flags; - union cvmx_buf_ptr hw_buffer; - cvmx_pko_command_word0_t pko_command; - int dropped; - struct octeon_ethernet *priv = netdev_priv(dev); - cvmx_wqe_t *work = work_queue_entry; - - if (!(dev->flags & IFF_UP)) { - DEBUGPRINT("%s: Device not up\n", dev->name); - if (do_free) - cvm_oct_free_work(work); - return -1; - } - - /* The check on CVMX_PKO_QUEUES_PER_PORT_* is designed to completely - remove "qos" in the event neither interface supports - multiple queues per port */ - if ((CVMX_PKO_QUEUES_PER_PORT_INTERFACE0 > 1) || - (CVMX_PKO_QUEUES_PER_PORT_INTERFACE1 > 1)) { - if (qos <= 0) - qos = 0; - else if (qos >= cvmx_pko_get_num_queues(priv->port)) - qos = 0; - } else - qos = 0; - - /* Start off assuming no drop */ - dropped = 0; - - local_irq_save(flags); - cvmx_pko_send_packet_prepare(priv->port, priv->queue + qos, - CVMX_PKO_LOCK_CMD_QUEUE); - - /* Build the PKO buffer pointer */ - hw_buffer.u64 = 0; - hw_buffer.s.addr = work->packet_ptr.s.addr; - hw_buffer.s.pool = CVMX_FPA_PACKET_POOL; - hw_buffer.s.size = CVMX_FPA_PACKET_POOL_SIZE; - hw_buffer.s.back = work->packet_ptr.s.back; - - /* Build the PKO command */ - pko_command.u64 = 0; - pko_command.s.n2 = 1; /* Don't pollute L2 with the outgoing packet */ - pko_command.s.dontfree = !do_free; - pko_command.s.segs = work->word2.s.bufs; - pko_command.s.total_bytes = work->len; - - /* Check if we can use the hardware checksumming */ - if (unlikely(work->word2.s.not_IP || work->word2.s.IP_exc)) - pko_command.s.ipoffp1 = 0; - else - pko_command.s.ipoffp1 = sizeof(struct ethhdr) + 1; - - /* Send the packet to the output queue */ - if (unlikely - (cvmx_pko_send_packet_finish - (priv->port, priv->queue + qos, pko_command, hw_buffer, - CVMX_PKO_LOCK_CMD_QUEUE))) { - DEBUGPRINT("%s: Failed to send the packet\n", dev->name); - dropped = -1; - } - local_irq_restore(flags); - - if (unlikely(dropped)) { - if (do_free) - cvm_oct_free_work(work); - priv->stats.tx_dropped++; - } else if (do_free) - cvmx_fpa_free(work, CVMX_FPA_WQE_POOL, DONT_WRITEBACK(1)); - - return dropped; -} -EXPORT_SYMBOL(cvm_oct_transmit_qos); - -/** * This function frees all skb that are currently queued for TX. * * @dev: Device being shutdown diff --git a/drivers/staging/octeon/ethernet.c b/drivers/staging/octeon/ethernet.c index 4cfd4b1..4e05426 100644 --- a/drivers/staging/octeon/ethernet.c +++ b/drivers/staging/octeon/ethernet.c @@ -104,14 +104,6 @@ MODULE_PARM_DESC(pow_send_list, "\n" "\t\"eth2,spi3,spi7\" would cause these three devices to transmit\n" "\tusing the pow_send_group."); -static int disable_core_queueing = 1; -module_param(disable_core_queueing, int, 0444); -MODULE_PARM_DESC(disable_core_queueing, "\n" - "\tWhen set the networking core's tx_queue_len is set to zero. This\n" - "\tallows packets to be sent without lock contention in the packet\n" - "\tscheduler resulting in some cases in improved throughput.\n"); - - /* * The offset from mac_addr_base that should be used for the next port * that is configured. By convention, if any mgmt ports exist on the @@ -205,10 +197,6 @@ static __init void cvm_oct_configure_common_hw(void) cvmx_helper_setup_red(num_packet_buffers / 4, num_packet_buffers / 8); - /* Enable the MII interface */ - if (!octeon_is_simulation()) - cvmx_write_csr(CVMX_SMIX_EN(0), 1); - /* Register an IRQ hander for to receive POW interrupts */ r = request_irq(OCTEON_IRQ_WORKQ0 + pow_receive_group, cvm_oct_do_interrupt, IRQF_SHARED, "Ethernet", @@ -689,7 +677,6 @@ static int __init cvm_oct_init_module(void) if (dev) { /* Initialize the device private structure. */ struct octeon_ethernet *priv = netdev_priv(dev); - memset(priv, 0, sizeof(struct octeon_ethernet)); dev->netdev_ops = &cvm_oct_pow_netdev_ops; priv->imode = CVMX_HELPER_INTERFACE_MODE_DISABLED; @@ -700,19 +687,16 @@ static int __init cvm_oct_init_module(void) skb_queue_head_init(&priv->tx_free_list[qos]); if (register_netdev(dev) < 0) { - pr_err("Failed to register ethernet " - "device for POW\n"); + pr_err("Failed to register ethernet device for POW\n"); kfree(dev); } else { cvm_oct_device[CVMX_PIP_NUM_INPUT_PORTS] = dev; - pr_info("%s: POW send group %d, receive " - "group %d\n", - dev->name, pow_send_group, - pow_receive_group); + pr_info("%s: POW send group %d, receive group %d\n", + dev->name, pow_send_group, + pow_receive_group); } } else { - pr_err("Failed to allocate ethernet device " - "for POW\n"); + pr_err("Failed to allocate ethernet device for POW\n"); } } @@ -730,12 +714,9 @@ static int __init cvm_oct_init_module(void) struct net_device *dev = alloc_etherdev(sizeof(struct octeon_ethernet)); if (!dev) { - pr_err("Failed to allocate ethernet device " - "for port %d\n", port); + pr_err("Failed to allocate ethernet device for port %d\n", port); continue; } - if (disable_core_queueing) - dev->tx_queue_len = 0; /* Initialize the device private structure. */ priv = netdev_priv(dev); diff --git a/drivers/staging/octeon/octeon-ethernet.h b/drivers/staging/octeon/octeon-ethernet.h index 402a15b..208da27 100644 --- a/drivers/staging/octeon/octeon-ethernet.h +++ b/drivers/staging/octeon/octeon-ethernet.h @@ -68,47 +68,6 @@ struct octeon_ethernet { */ int cvm_oct_free_work(void *work_queue_entry); -/** - * Transmit a work queue entry out of the ethernet port. Both - * the work queue entry and the packet data can optionally be - * freed. The work will be freed on error as well. - * - * @dev: Device to transmit out. - * @work_queue_entry: - * Work queue entry to send - * @do_free: True if the work queue entry and packet data should be - * freed. If false, neither will be freed. - * @qos: Index into the queues for this port to transmit on. This - * is used to implement QoS if their are multiple queues per - * port. This parameter must be between 0 and the number of - * queues per port minus 1. Values outside of this range will - * be change to zero. - * - * Returns Zero on success, negative on failure. - */ -int cvm_oct_transmit_qos(struct net_device *dev, void *work_queue_entry, - int do_free, int qos); - -/** - * Transmit a work queue entry out of the ethernet port. Both - * the work queue entry and the packet data can optionally be - * freed. The work will be freed on error as well. This simply - * wraps cvmx_oct_transmit_qos() for backwards compatability. - * - * @dev: Device to transmit out. - * @work_queue_entry: - * Work queue entry to send - * @do_free: True if the work queue entry and packet data should be - * freed. If false, neither will be freed. - * - * Returns Zero on success, negative on failure. - */ -static inline int cvm_oct_transmit(struct net_device *dev, - void *work_queue_entry, int do_free) -{ - return cvm_oct_transmit_qos(dev, work_queue_entry, do_free, 0); -} - extern int cvm_oct_rgmii_init(struct net_device *dev); extern void cvm_oct_rgmii_uninit(struct net_device *dev); extern int cvm_oct_rgmii_open(struct net_device *dev); -- 1.6.0.6 From ddaney@caviumnetworks.com Thu Jan 7 20:06:08 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 20:08:41 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:17194 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492581Ab0AGTGI (ORCPT ); Thu, 7 Jan 2010 20:06:08 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Thu, 07 Jan 2010 11:05:29 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:05:11 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:05:10 -0800 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.2/8.14.2) with ESMTP id o07J58tQ032184; Thu, 7 Jan 2010 11:05:08 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.2/8.14.2/Submit) id o07J5883032183; Thu, 7 Jan 2010 11:05:08 -0800 From: David Daney To: ralf@linux-mips.org, linux-mips@linux-mips.org, netdev@vger.kernel.org, gregkh@suse.de Cc: David Daney Subject: [PATCH 4/7] Staging: Octeon Ethernet: Rewrite transmit code. Date: Thu, 7 Jan 2010 11:05:03 -0800 Message-Id: <1262891106-32146-4-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.0.6 In-Reply-To: <4B463005.8060505@caviumnetworks.com> References: <4B463005.8060505@caviumnetworks.com> X-OriginalArrivalTime: 07 Jan 2010 19:05:10.0859 (UTC) FILETIME=[55C589B0:01CA8FCC] X-archive-position: 25535 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5135 Content-Length: 13537 Lines: 430 Stop the queue if too many packets are queued. Restart it from a high resolution timer. Rearrange and simplify locking and SKB freeing code Signed-off-by: David Daney --- drivers/staging/octeon/Kconfig | 1 + drivers/staging/octeon/ethernet-tx.c | 172 +++++++++++++++++++----------- drivers/staging/octeon/ethernet-tx.h | 27 +----- drivers/staging/octeon/ethernet.c | 69 ++++++------- drivers/staging/octeon/octeon-ethernet.h | 4 + 5 files changed, 150 insertions(+), 123 deletions(-) diff --git a/drivers/staging/octeon/Kconfig b/drivers/staging/octeon/Kconfig index 638ad6b..579b8f1 100644 --- a/drivers/staging/octeon/Kconfig +++ b/drivers/staging/octeon/Kconfig @@ -3,6 +3,7 @@ config OCTEON_ETHERNET depends on CPU_CAVIUM_OCTEON select PHYLIB select MDIO_OCTEON + select HIGH_RES_TIMERS help This driver supports the builtin ethernet ports on Cavium Networks' products in the Octeon family. This driver supports the diff --git a/drivers/staging/octeon/ethernet-tx.c b/drivers/staging/octeon/ethernet-tx.c index e5695d9..05b58f8 100644 --- a/drivers/staging/octeon/ethernet-tx.c +++ b/drivers/staging/octeon/ethernet-tx.c @@ -64,6 +64,49 @@ #define GET_SKBUFF_QOS(skb) 0 #endif + +static inline int32_t cvm_oct_adjust_skb_to_free(int32_t skb_to_free, int fau) +{ + int32_t undo; + undo = skb_to_free > 0 ? MAX_SKB_TO_FREE : skb_to_free + MAX_SKB_TO_FREE; + if (undo > 0) + cvmx_fau_atomic_add32(fau, -undo); + skb_to_free = -skb_to_free > MAX_SKB_TO_FREE ? MAX_SKB_TO_FREE : -skb_to_free; + return skb_to_free; +} + +void cvm_oct_free_tx_skbs(struct octeon_ethernet *priv) +{ + int32_t skb_to_free; + int qos, queues_per_port; + queues_per_port = cvmx_pko_get_num_queues(priv->port); + /* Drain any pending packets in the free list */ + for (qos = 0; qos < queues_per_port; qos++) { + if (skb_queue_len(&priv->tx_free_list[qos]) == 0) + continue; + skb_to_free = cvmx_fau_fetch_and_add32(priv->fau+qos*4, MAX_SKB_TO_FREE); + skb_to_free = cvm_oct_adjust_skb_to_free(skb_to_free, priv->fau+qos*4); + + while (skb_to_free > 0) { + dev_kfree_skb_any(skb_dequeue(&priv->tx_free_list[qos])); + skb_to_free--; + } + } +} + +enum hrtimer_restart cvm_oct_restart_tx(struct hrtimer *timer) +{ + struct octeon_ethernet *priv = container_of(timer, struct octeon_ethernet, tx_restart_timer); + struct net_device *dev = cvm_oct_device[priv->port]; + + cvm_oct_free_tx_skbs(priv); + + if (netif_queue_stopped(dev)) + netif_wake_queue(dev); + + return HRTIMER_NORESTART; +} + /** * Packet transmit * @@ -77,13 +120,13 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) union cvmx_buf_ptr hw_buffer; uint64_t old_scratch; uint64_t old_scratch2; - int dropped; int qos; - int queue_it_up; + enum {QUEUE_CORE, QUEUE_HW, QUEUE_DROP} queue_type; struct octeon_ethernet *priv = netdev_priv(dev); + struct sk_buff *to_free_list; int32_t skb_to_free; - int32_t undo; int32_t buffers_to_free; + unsigned long flags; #if REUSE_SKBUFFS_WITHOUT_FREE unsigned char *fpa_head; #endif @@ -94,9 +137,6 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) */ prefetch(priv); - /* Start off assuming no drop */ - dropped = 0; - /* * The check on CVMX_PKO_QUEUES_PER_PORT_* is designed to * completely remove "qos" in the event neither interface @@ -268,9 +308,9 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) skb->tc_verd = 0; #endif /* CONFIG_NET_CLS_ACT */ #endif /* CONFIG_NET_SCHED */ +#endif /* REUSE_SKBUFFS_WITHOUT_FREE */ dont_put_skbuff_in_hw: -#endif /* REUSE_SKBUFFS_WITHOUT_FREE */ /* Check if we can use the hardware checksumming */ if (USE_HW_TCPUDP_CHECKSUM && (skb->protocol == htons(ETH_P_IP)) && @@ -295,18 +335,7 @@ dont_put_skbuff_in_hw: cvmx_fau_fetch_and_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE, 0); } - /* - * We try to claim MAX_SKB_TO_FREE buffers. If there were not - * that many available, we have to un-claim (undo) any that - * were in excess. If skb_to_free is positive we will free - * that many buffers. - */ - undo = skb_to_free > 0 ? - MAX_SKB_TO_FREE : skb_to_free + MAX_SKB_TO_FREE; - if (undo > 0) - cvmx_fau_atomic_add32(priv->fau+qos*4, -undo); - skb_to_free = -skb_to_free > MAX_SKB_TO_FREE ? - MAX_SKB_TO_FREE : -skb_to_free; + skb_to_free = cvm_oct_adjust_skb_to_free(skb_to_free, priv->fau+qos*4); /* * If we're sending faster than the receive can free them then @@ -317,60 +346,83 @@ dont_put_skbuff_in_hw: pko_command.s.reg0 = priv->fau + qos * 4; } - cvmx_pko_send_packet_prepare(priv->port, priv->queue + qos, - CVMX_PKO_LOCK_CMD_QUEUE); + if (pko_command.s.dontfree) + queue_type = QUEUE_CORE; + else + queue_type = QUEUE_HW; + + spin_lock_irqsave(&priv->tx_free_list[qos].lock, flags); /* Drop this packet if we have too many already queued to the HW */ - if (unlikely - (skb_queue_len(&priv->tx_free_list[qos]) >= MAX_OUT_QUEUE_DEPTH)) { - /* - DEBUGPRINT("%s: Tx dropped. Too many queued\n", dev->name); - */ - dropped = 1; + if (unlikely(skb_queue_len(&priv->tx_free_list[qos]) >= MAX_OUT_QUEUE_DEPTH)) { + if (dev->tx_queue_len != 0) { + /* Drop the lock when notifying the core. */ + spin_unlock_irqrestore(&priv->tx_free_list[qos].lock, flags); + netif_stop_queue(dev); + hrtimer_start(&priv->tx_restart_timer, + priv->tx_restart_interval, HRTIMER_MODE_REL); + spin_lock_irqsave(&priv->tx_free_list[qos].lock, flags); + + } else { + /* If not using normal queueing. */ + queue_type = QUEUE_DROP; + goto skip_xmit; + } } + + cvmx_pko_send_packet_prepare(priv->port, priv->queue + qos, + CVMX_PKO_LOCK_NONE); + /* Send the packet to the output queue */ - else if (unlikely - (cvmx_pko_send_packet_finish - (priv->port, priv->queue + qos, pko_command, hw_buffer, - CVMX_PKO_LOCK_CMD_QUEUE))) { + if (unlikely(cvmx_pko_send_packet_finish(priv->port, + priv->queue + qos, + pko_command, hw_buffer, + CVMX_PKO_LOCK_NONE))) { DEBUGPRINT("%s: Failed to send the packet\n", dev->name); - dropped = 1; + queue_type = QUEUE_DROP; } +skip_xmit: + to_free_list = NULL; - if (USE_ASYNC_IOBDMA) { - /* Restore the scratch area */ - cvmx_scratch_write64(CVMX_SCR_SCRATCH, old_scratch); - cvmx_scratch_write64(CVMX_SCR_SCRATCH + 8, old_scratch2); + switch (queue_type) { + case QUEUE_DROP: + skb->next = to_free_list; + to_free_list = skb; + priv->stats.tx_dropped++; + break; + case QUEUE_HW: + cvmx_fau_atomic_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE, -1); + break; + case QUEUE_CORE: + __skb_queue_tail(&priv->tx_free_list[qos], skb); + break; + default: + BUG(); } - queue_it_up = 0; - if (unlikely(dropped)) { - dev_kfree_skb_any(skb); - priv->stats.tx_dropped++; - } else { - if (USE_SKBUFFS_IN_HW) { - /* Put this packet on the queue to be freed later */ - if (pko_command.s.dontfree) - queue_it_up = 1; - else - cvmx_fau_atomic_add32 - (FAU_NUM_PACKET_BUFFERS_TO_FREE, -1); - } else { - /* Put this packet on the queue to be freed later */ - queue_it_up = 1; - } + while (skb_to_free > 0) { + struct sk_buff *t = __skb_dequeue(&priv->tx_free_list[qos]); + t->next = to_free_list; + to_free_list = t; + skb_to_free--; } - if (queue_it_up) { - spin_lock(&priv->tx_free_list[qos].lock); - __skb_queue_tail(&priv->tx_free_list[qos], skb); - cvm_oct_free_tx_skbs(priv, skb_to_free, qos, 0); - spin_unlock(&priv->tx_free_list[qos].lock); - } else { - cvm_oct_free_tx_skbs(priv, skb_to_free, qos, 1); + spin_unlock_irqrestore(&priv->tx_free_list[qos].lock, flags); + + /* Do the actual freeing outside of the lock. */ + while (to_free_list) { + struct sk_buff *t = to_free_list; + to_free_list = to_free_list->next; + dev_kfree_skb_any(t); } - return 0; + if (USE_ASYNC_IOBDMA) { + /* Restore the scratch area */ + cvmx_scratch_write64(CVMX_SCR_SCRATCH, old_scratch); + cvmx_scratch_write64(CVMX_SCR_SCRATCH + 8, old_scratch2); + } + + return NETDEV_TX_OK; } /** diff --git a/drivers/staging/octeon/ethernet-tx.h b/drivers/staging/octeon/ethernet-tx.h index c0bebf7..b628d8c 100644 --- a/drivers/staging/octeon/ethernet-tx.h +++ b/drivers/staging/octeon/ethernet-tx.h @@ -30,28 +30,5 @@ int cvm_oct_xmit_pow(struct sk_buff *skb, struct net_device *dev); int cvm_oct_transmit_qos(struct net_device *dev, void *work_queue_entry, int do_free, int qos); void cvm_oct_tx_shutdown(struct net_device *dev); - -/** - * Free dead transmit skbs. - * - * @priv: The driver data - * @skb_to_free: The number of SKBs to free (free none if negative). - * @qos: The queue to free from. - * @take_lock: If true, acquire the skb list lock. - */ -static inline void cvm_oct_free_tx_skbs(struct octeon_ethernet *priv, - int skb_to_free, - int qos, int take_lock) -{ - /* Free skbuffs not in use by the hardware. */ - if (skb_to_free > 0) { - if (take_lock) - spin_lock(&priv->tx_free_list[qos].lock); - while (skb_to_free > 0) { - dev_kfree_skb(__skb_dequeue(&priv->tx_free_list[qos])); - skb_to_free--; - } - if (take_lock) - spin_unlock(&priv->tx_free_list[qos].lock); - } -} +void cvm_oct_free_tx_skbs(struct octeon_ethernet *priv); +enum hrtimer_restart cvm_oct_restart_tx(struct hrtimer *timer); diff --git a/drivers/staging/octeon/ethernet.c b/drivers/staging/octeon/ethernet.c index 4e05426..973178a 100644 --- a/drivers/staging/octeon/ethernet.c +++ b/drivers/staging/octeon/ethernet.c @@ -131,50 +131,29 @@ struct net_device *cvm_oct_device[TOTAL_NUMBER_OF_PORTS]; */ static void cvm_do_timer(unsigned long arg) { - int32_t skb_to_free, undo; - int queues_per_port; - int qos; - struct octeon_ethernet *priv; static int port; - - if (port >= CVMX_PIP_NUM_INPUT_PORTS) { + if (port < CVMX_PIP_NUM_INPUT_PORTS) { + if (cvm_oct_device[port]) { + struct octeon_ethernet *priv = netdev_priv(cvm_oct_device[port]); + if (priv->poll) + priv->poll(cvm_oct_device[port]); + cvm_oct_free_tx_skbs(priv); + cvm_oct_device[port]->netdev_ops->ndo_get_stats(cvm_oct_device[port]); + } + port++; /* - * All ports have been polled. Start the next - * iteration through the ports in one second. + * Poll the next port in a 50th of a second. This + * spreads the polling of ports out a little bit. */ + mod_timer(&cvm_oct_poll_timer, jiffies + HZ/50); + } else { port = 0; + /* + * All ports have been polled. Start the next iteration through + * the ports in one second. + */ mod_timer(&cvm_oct_poll_timer, jiffies + HZ); - return; } - if (!cvm_oct_device[port]) - goto out; - - priv = netdev_priv(cvm_oct_device[port]); - if (priv->poll) - priv->poll(cvm_oct_device[port]); - - queues_per_port = cvmx_pko_get_num_queues(port); - /* Drain any pending packets in the free list */ - for (qos = 0; qos < queues_per_port; qos++) { - if (skb_queue_len(&priv->tx_free_list[qos]) == 0) - continue; - skb_to_free = cvmx_fau_fetch_and_add32(priv->fau + qos * 4, - MAX_SKB_TO_FREE); - undo = skb_to_free > 0 ? - MAX_SKB_TO_FREE : skb_to_free + MAX_SKB_TO_FREE; - if (undo > 0) - cvmx_fau_atomic_add32(priv->fau+qos*4, -undo); - skb_to_free = -skb_to_free > MAX_SKB_TO_FREE ? - MAX_SKB_TO_FREE : -skb_to_free; - cvm_oct_free_tx_skbs(priv, skb_to_free, qos, 1); - } - cvm_oct_device[port]->netdev_ops->ndo_get_stats(cvm_oct_device[port]); - -out: - port++; - /* Poll the next port in a 50th of a second. - This spreads the polling of ports out a little bit */ - mod_timer(&cvm_oct_poll_timer, jiffies + HZ / 50); } /** @@ -678,6 +657,18 @@ static int __init cvm_oct_init_module(void) /* Initialize the device private structure. */ struct octeon_ethernet *priv = netdev_priv(dev); + hrtimer_init(&priv->tx_restart_timer, + CLOCK_MONOTONIC, + HRTIMER_MODE_REL); + priv->tx_restart_timer.function = cvm_oct_restart_tx; + + /* + * Default for 10GE 5000nS enough time to + * transmit about 100 64byte packtes. 1GE + * interfaces will get 50000nS below. + */ + priv->tx_restart_interval = ktime_set(0, 5000); + dev->netdev_ops = &cvm_oct_pow_netdev_ops; priv->imode = CVMX_HELPER_INTERFACE_MODE_DISABLED; priv->port = CVMX_PIP_NUM_INPUT_PORTS; @@ -757,6 +748,7 @@ static int __init cvm_oct_init_module(void) case CVMX_HELPER_INTERFACE_MODE_SGMII: dev->netdev_ops = &cvm_oct_sgmii_netdev_ops; + priv->tx_restart_interval = ktime_set(0, 50000); strcpy(dev->name, "eth%d"); break; @@ -768,6 +760,7 @@ static int __init cvm_oct_init_module(void) case CVMX_HELPER_INTERFACE_MODE_RGMII: case CVMX_HELPER_INTERFACE_MODE_GMII: dev->netdev_ops = &cvm_oct_rgmii_netdev_ops; + priv->tx_restart_interval = ktime_set(0, 50000); strcpy(dev->name, "eth%d"); break; } diff --git a/drivers/staging/octeon/octeon-ethernet.h b/drivers/staging/octeon/octeon-ethernet.h index 208da27..203c6a9 100644 --- a/drivers/staging/octeon/octeon-ethernet.h +++ b/drivers/staging/octeon/octeon-ethernet.h @@ -31,6 +31,8 @@ #ifndef OCTEON_ETHERNET_H #define OCTEON_ETHERNET_H +#include + /** * This is the definition of the Ethernet driver's private * driver state stored in netdev_priv(dev). @@ -57,6 +59,8 @@ struct octeon_ethernet { uint64_t link_info; /* Called periodically to check link status */ void (*poll) (struct net_device *dev); + struct hrtimer tx_restart_timer; + ktime_t tx_restart_interval; }; /** -- 1.6.0.6 From ddaney@caviumnetworks.com Thu Jan 7 20:51:50 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 20:51:55 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:18832 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492609Ab0AGTvu (ORCPT ); Thu, 7 Jan 2010 20:51:50 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Thu, 07 Jan 2010 11:51:04 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:50:55 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:50:55 -0800 Message-ID: <4B463B1F.6000404@caviumnetworks.com> Date: Thu, 07 Jan 2010 11:50:55 -0800 From: David Daney User-Agent: Thunderbird 2.0.0.21 (X11/20090320) MIME-Version: 1.0 To: linux-mips , Ralf Baechle , linux-i2c@vger.kernel.org, "Ben Dooks (embedded platforms)" , "Jean Delvare (PC drivers, core)" Subject: [PATCH 0/3] Add I2C support for Octeon SOCs. Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 07 Jan 2010 19:50:55.0863 (UTC) FILETIME=[B9EBE870:01CA8FD2] X-archive-position: 25536 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5177 Content-Length: 960 Lines: 25 This patch set adds I2C driver support for Cavium Networks' Octeon processor family. The Octeon is a multi-core MIPS64 based SOC. The first patch adds platform devices for the I2C devices. The second patch is the main driver. Finally the third patch registers some devices so we have something to control with the fancy new driver. I will reply with the three patches. David Daney (2): MIPS: Octeon: Add I2C platform driver. MIPS: Octeon: Register some devices on the I2C bus. Rade Bozic (1): I2C: Add driver for Cavium OCTEON I2C ports. arch/mips/cavium-octeon/octeon-platform.c | 85 +++++ arch/mips/include/asm/octeon/octeon.h | 5 + drivers/i2c/busses/Kconfig | 10 + drivers/i2c/busses/Makefile | 1 + drivers/i2c/busses/i2c-octeon.c | 579 +++++++++++++++++++++++++++++ 5 files changed, 680 insertions(+), 0 deletions(-) create mode 100644 drivers/i2c/busses/i2c-octeon.c From ddaney@caviumnetworks.com Thu Jan 7 20:55:12 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 20:55:16 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:18953 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492702Ab0AGTzM (ORCPT ); Thu, 7 Jan 2010 20:55:12 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Thu, 07 Jan 2010 11:55:14 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:54:29 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:54:29 -0800 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.2/8.14.2) with ESMTP id o07JsOWe032638; Thu, 7 Jan 2010 11:54:24 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.2/8.14.2/Submit) id o07JsLHG032636; Thu, 7 Jan 2010 11:54:21 -0800 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org, linux-i2c@vger.kernel.org, ben-linux@fluff.org, khali@linux-fr.org Cc: rade.bozic.ext@nsn.com, David Daney Subject: [PATCH 1/3] MIPS: Octeon: Add I2C platform driver. Date: Thu, 7 Jan 2010 11:54:19 -0800 Message-Id: <1262894061-32613-1-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.0.6 In-Reply-To: <4B463B1F.6000404@caviumnetworks.com> References: <4B463B1F.6000404@caviumnetworks.com> X-OriginalArrivalTime: 07 Jan 2010 19:54:29.0303 (UTC) FILETIME=[39244470:01CA8FD3] X-archive-position: 25537 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5181 Content-Length: 2813 Lines: 109 Signed-off-by: David Daney CC: Rade Bozic --- arch/mips/cavium-octeon/octeon-platform.c | 72 +++++++++++++++++++++++++++++ arch/mips/include/asm/octeon/octeon.h | 5 ++ 2 files changed, 77 insertions(+), 0 deletions(-) diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c index 20698a6..f2c0602 100644 --- a/arch/mips/cavium-octeon/octeon-platform.c +++ b/arch/mips/cavium-octeon/octeon-platform.c @@ -165,6 +165,78 @@ out: } device_initcall(octeon_rng_device_init); + +#define OCTEON_I2C_IO_BASE 0x1180000001000ull +#define OCTEON_I2C_IO_UNIT_OFFSET 0x200 + +static struct octeon_i2c_data octeon_i2c_data[2]; + +static int __init octeon_i2c_device_init(void) +{ + struct platform_device *pd; + int ret = 0; + int port, num_ports; + + struct resource i2c_resources[] = { + { + .flags = IORESOURCE_MEM, + }, { + .flags = IORESOURCE_IRQ, + } + }; + + if (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX)) + num_ports = 2; + else + num_ports = 1; + + for (port = 0; port < num_ports; port++) { + octeon_i2c_data[port].sys_freq = octeon_get_clock_rate(); + /*FIXME: should be examined. At the moment is set for 100Khz */ + octeon_i2c_data[port].i2c_freq = 100000; + + pd = platform_device_alloc("i2c-octeon", port); + if (!pd) { + ret = -ENOMEM; + goto out; + } + + pd->dev.platform_data = octeon_i2c_data + port; + + i2c_resources[0].start = + OCTEON_I2C_IO_BASE + (port * OCTEON_I2C_IO_UNIT_OFFSET); + i2c_resources[0].end = i2c_resources[0].start + 0x20; + switch (port) { + case 0: + i2c_resources[1].start = OCTEON_IRQ_TWSI; + i2c_resources[1].end = OCTEON_IRQ_TWSI; + break; + case 1: + i2c_resources[1].start = OCTEON_IRQ_TWSI2; + i2c_resources[1].end = OCTEON_IRQ_TWSI2; + break; + default: + BUG(); + } + + ret = platform_device_add_resources(pd, + i2c_resources, + ARRAY_SIZE(i2c_resources)); + if (ret) + goto fail; + + ret = platform_device_add(pd); + if (ret) + goto fail; + } + return ret; +fail: + platform_device_put(pd); +out: + return ret; +} +device_initcall(octeon_i2c_device_init); + /* Octeon SMI/MDIO interface. */ static int __init octeon_mdiobus_device_init(void) { diff --git a/arch/mips/include/asm/octeon/octeon.h b/arch/mips/include/asm/octeon/octeon.h index 705fef2..a0cf129 100644 --- a/arch/mips/include/asm/octeon/octeon.h +++ b/arch/mips/include/asm/octeon/octeon.h @@ -213,6 +213,11 @@ struct octeon_cf_data { int dma_engine; /* -1 for no DMA */ }; +struct octeon_i2c_data { + unsigned int sys_freq; + unsigned int i2c_freq; +}; + extern void octeon_write_lcd(const char *s); extern void octeon_check_cpu_bist(void); extern int octeon_get_boot_uart(void); -- 1.6.0.6 From ddaney@caviumnetworks.com Thu Jan 7 20:55:12 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 20:55:40 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:18942 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492673Ab0AGTzM (ORCPT ); Thu, 7 Jan 2010 20:55:12 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Thu, 07 Jan 2010 11:55:14 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:54:29 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:54:29 -0800 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.2/8.14.2) with ESMTP id o07JsQ2l032646; Thu, 7 Jan 2010 11:54:26 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.2/8.14.2/Submit) id o07JsQ3s032645; Thu, 7 Jan 2010 11:54:26 -0800 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org, linux-i2c@vger.kernel.org, ben-linux@fluff.org, khali@linux-fr.org Cc: rade.bozic.ext@nsn.com, David Daney Subject: [PATCH 3/3] MIPS: Octeon: Register some devices on the I2C bus. Date: Thu, 7 Jan 2010 11:54:21 -0800 Message-Id: <1262894061-32613-3-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.0.6 In-Reply-To: <4B463B1F.6000404@caviumnetworks.com> References: <4B463B1F.6000404@caviumnetworks.com> X-OriginalArrivalTime: 07 Jan 2010 19:54:29.0287 (UTC) FILETIME=[3921D370:01CA8FD3] X-archive-position: 25538 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5184 Content-Length: 1136 Lines: 40 Signed-off-by: David Daney CC: Rade Bozic --- arch/mips/cavium-octeon/octeon-platform.c | 13 +++++++++++++ 1 files changed, 13 insertions(+), 0 deletions(-) diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c index f2c0602..d8f8129 100644 --- a/arch/mips/cavium-octeon/octeon-platform.c +++ b/arch/mips/cavium-octeon/octeon-platform.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -165,6 +166,18 @@ out: } device_initcall(octeon_rng_device_init); +static struct i2c_board_info __initdata octeon_i2c_devices[] = { + { + I2C_BOARD_INFO("ds1337", 0x68), + }, +}; + +static int __init octeon_i2c_devices_init(void) +{ + return i2c_register_board_info(0, octeon_i2c_devices, + ARRAY_SIZE(octeon_i2c_devices)); +} +arch_initcall(octeon_i2c_devices_init); #define OCTEON_I2C_IO_BASE 0x1180000001000ull #define OCTEON_I2C_IO_UNIT_OFFSET 0x200 -- 1.6.0.6 From ddaney@caviumnetworks.com Thu Jan 7 20:55:13 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 20:56:05 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:18948 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492686Ab0AGTzN (ORCPT ); Thu, 7 Jan 2010 20:55:13 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Thu, 07 Jan 2010 11:55:14 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:54:29 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:54:29 -0800 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.2/8.14.2) with ESMTP id o07JsQxa032642; Thu, 7 Jan 2010 11:54:26 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.2/8.14.2/Submit) id o07JsQbv032641; Thu, 7 Jan 2010 11:54:26 -0800 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org, linux-i2c@vger.kernel.org, ben-linux@fluff.org, khali@linux-fr.org Cc: rade.bozic.ext@nsn.com, David Daney Subject: [PATCH 2/3] I2C: Add driver for Cavium OCTEON I2C ports. Date: Thu, 7 Jan 2010 11:54:20 -0800 Message-Id: <1262894061-32613-2-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.0.6 In-Reply-To: <4B463B1F.6000404@caviumnetworks.com> References: <4B463B1F.6000404@caviumnetworks.com> X-OriginalArrivalTime: 07 Jan 2010 19:54:29.0303 (UTC) FILETIME=[39244470:01CA8FD3] X-archive-position: 25539 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5186 Content-Length: 16504 Lines: 632 From: Rade Bozic Signed-off-by: Rade Bozic Signed-off-by: David Daney --- drivers/i2c/busses/Kconfig | 10 + drivers/i2c/busses/Makefile | 1 + drivers/i2c/busses/i2c-octeon.c | 579 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 590 insertions(+), 0 deletions(-) create mode 100644 drivers/i2c/busses/i2c-octeon.c diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 5f318ce..737f052 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -564,6 +564,16 @@ config I2C_VERSATILE This driver can also be built as a module. If so, the module will be called i2c-versatile. +config I2C_OCTEON + tristate "Cavium OCTEON I2C bus support" + depends on CPU_CAVIUM_OCTEON + help + Say yes if you want to support the I2C serial bus on Cavium + OCTEON SOC. + + This driver can also be built as a module. If so, the module + will be called i2c-octeon. + comment "External I2C/SMBus adapter drivers" config I2C_PARPORT diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index 302c551..c2c4ea1 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile @@ -54,6 +54,7 @@ obj-$(CONFIG_I2C_SH_MOBILE) += i2c-sh_mobile.o obj-$(CONFIG_I2C_SIMTEC) += i2c-simtec.o obj-$(CONFIG_I2C_STU300) += i2c-stu300.o obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o +obj-$(CONFIG_I2C_OCTEON) += i2c-octeon.o # External I2C/SMBus adapter drivers obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-octeon.c new file mode 100644 index 0000000..57455ac --- /dev/null +++ b/drivers/i2c/busses/i2c-octeon.c @@ -0,0 +1,579 @@ +/* + * (C) Copyright 2009-2010 + * Nokia Siemens Networks, michael.lawnick.ext@nsn.com + * + * This is a driver for the i2c adapter in Cavium Networks' OCTEON processors. + * + * Release 0.1 + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include + +#define DRV_NAME "i2c-octeon" +#define DRV_VERSION "0.1" + +/* register offsets */ +#define SW_TWSI 0x00 +#define TWSI_INT 0x10 + +/* Controller command patterns */ +#define SW_TWSI_V 0x8000000000000000ull +#define SW_TWSI_EOP_TWSI_DATA 0x0C00000100000000ull +#define SW_TWSI_EOP_TWSI_CTL 0x0C00000200000000ull +#define SW_TWSI_EOP_TWSI_CLKCTL 0x0C00000300000000ull +#define SW_TWSI_EOP_TWSI_STAT 0x0C00000300000000ull +#define SW_TWSI_EOP_TWSI_RST 0x0C00000700000000ull +#define SW_TWSI_OP_TWSI_CLK 0x0800000000000000ull +#define SW_TWSI_R 0x0100000000000000ull + +/* Controller command and status bits */ +#define TWSI_CTL_CE 0x80 +#define TWSI_CTL_ENAB 0x40 +#define TWSI_CTL_STA 0x20 +#define TWSI_CTL_STP 0x10 +#define TWSI_CTL_IFLG 0x08 +#define TWSI_CTL_AAK 0x04 + +/* Some status values */ +#define STAT_START 0x08 +#define STAT_RSTART 0x10 +#define STAT_TXADDR_ACK 0x18 +#define STAT_TXDATA_ACK 0x28 +#define STAT_RXADDR_ACK 0x40 +#define STAT_RXDATA_ACK 0x50 +#define STAT_IDLE 0xF8 + +#ifndef NO_IRQ +#define NO_IRQ (-1) +#endif + +struct octeon_i2c { + wait_queue_head_t queue; + struct i2c_adapter adap; + int irq; + int twsi_freq; + int sys_freq; + uint8_t twsi_ctl; + resource_size_t twsi_phys; + void __iomem *twsi_base; + resource_size_t regsize; + struct device *dev; +}; + +/* Writes need to be flushed by a read. */ +static void octeon_i2c_write_sw(struct octeon_i2c *i2c, + uint64_t eop_reg, + uint8_t data) +{ + uint64_t tmp; + + __raw_writeq(SW_TWSI_V | eop_reg | data, i2c->twsi_base + SW_TWSI); + tmp = __raw_readq(i2c->twsi_base + SW_TWSI); +} + +static uint8_t octeon_i2c_read_sw(struct octeon_i2c *i2c, uint64_t eop_reg) +{ + uint64_t tmp; + + __raw_writeq(SW_TWSI_V | eop_reg | SW_TWSI_R, i2c->twsi_base + SW_TWSI); + tmp = __raw_readq(i2c->twsi_base + SW_TWSI); + + return __raw_readq(i2c->twsi_base + SW_TWSI) & 0xFF; +} + +static void octeon_i2c_write_int(struct octeon_i2c *i2c, uint64_t data) +{ + uint64_t tmp; + + __raw_writeq(data, i2c->twsi_base + TWSI_INT); + tmp = __raw_readq(i2c->twsi_base + TWSI_INT); +} + +static void octeon_i2c_int_enable(struct octeon_i2c *i2c) +{ + octeon_i2c_write_int(i2c, 0x40); +} + +static void octeon_i2c_int_disable(struct octeon_i2c *i2c) +{ + octeon_i2c_write_int(i2c, 0); +} + +/* If there was a reset while a device was driving 0 to bus, + bus is blocked. We toggle it free manually by some clock + cycles and send a stop. */ +static void octeon_i2c_unblock(struct octeon_i2c *i2c) +{ + int i; + + dev_dbg(i2c->dev, "%s\n", __func__); + for (i = 0; i < 9; i++) { + octeon_i2c_write_int(i2c, 0x0); + udelay(5); + octeon_i2c_write_int(i2c, 0x200); + udelay(5); + } + octeon_i2c_write_int(i2c, 0x300); + udelay(5); + octeon_i2c_write_int(i2c, 0x100); + udelay(5); + octeon_i2c_write_int(i2c, 0x0); +} + +static irqreturn_t octeon_i2c_isr(int irq, void *dev_id) +{ + struct octeon_i2c *i2c = dev_id; + + octeon_i2c_int_disable(i2c); + i2c->twsi_ctl = octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_CTL); + wake_up_interruptible(&i2c->queue); + + return IRQ_HANDLED; +} + +static int octeon_i2c_wait(struct octeon_i2c *i2c) +{ + unsigned long orig_jiffies = jiffies; + uint8_t ctl; + int result = 0; + + if (i2c->irq == NO_IRQ) { + /* polling */ + do { + ctl = octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_CTL); + if (ctl & TWSI_CTL_IFLG) + break; + } while (!time_after(jiffies, + orig_jiffies + i2c->adap.timeout)); + + if (!(ctl & TWSI_CTL_IFLG)) { + dev_dbg(i2c->dev, "%s: timeout\n", __func__); + result = -ETIMEDOUT; + } + } else { + i2c->twsi_ctl = 0; + /* interrupt mode */ + octeon_i2c_int_enable(i2c); + + result = wait_event_interruptible_timeout(i2c->queue, + (i2c->twsi_ctl & TWSI_CTL_IFLG), + i2c->adap.timeout); + + if (unlikely(result < 0)) { + dev_dbg(i2c->dev, "%s: wait interrupted\n", __func__); + } else if (unlikely(!(i2c->twsi_ctl & TWSI_CTL_IFLG))) { + dev_dbg(i2c->dev, "%s: timeout\n", __func__); + result = -ETIMEDOUT; + } + } + + return result < 0 ? result : 0; +} + +static int octeon_i2c_start(struct octeon_i2c *i2c) +{ + uint8_t data; + int result; + + octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL, + TWSI_CTL_ENAB | TWSI_CTL_STA); + + result = octeon_i2c_wait(i2c); + if (unlikely(result < 0) && + octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_STAT) == STAT_IDLE) { + /* + * Controller refused to send start flag May be a + * client is holding SDA low - let's try to free it. + */ + octeon_i2c_unblock(i2c); + octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL, + TWSI_CTL_ENAB | TWSI_CTL_STA); + + result = octeon_i2c_wait(i2c); + if (result < 0) + return result; + } + + data = octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_STAT); + if ((data != STAT_START) && (data != STAT_RSTART)) { + dev_dbg(i2c->dev, "%s: bad status (0x%x)\n", __func__, data); + return -1; + } + + return 0; +} + +static int octeon_i2c_stop(struct octeon_i2c *i2c) +{ + unsigned long orig_jiffies = jiffies; + uint8_t data; + + octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL, + TWSI_CTL_ENAB | TWSI_CTL_STP); + + /* + * Controller will change to idle, but that does not raise an + * interrupt, so we have to poll. + */ + do { + data = octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_STAT); + if (data == STAT_IDLE) + break; + udelay(1); + } while (!time_after(jiffies, orig_jiffies + 2)); + + if (data != STAT_IDLE) { + dev_dbg(i2c->dev, "%s: bad status(0x%x)\n", __func__, data); + return -1; + } + return 0; +} + +static int octeon_i2c_write(struct octeon_i2c *i2c, int target, + const uint8_t *data, int length) +{ + int i, result; + uint8_t tmp; + + result = octeon_i2c_start(i2c); + if (unlikely(result < 0)) + return result; + + octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_DATA, target << 1); + octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL, TWSI_CTL_ENAB); + + result = octeon_i2c_wait(i2c); + if (unlikely(result < 0)) + return result; + + for (i = 0; i < length; i++) { + tmp = octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_STAT); + if ((tmp != STAT_TXADDR_ACK) && (tmp != STAT_TXDATA_ACK)) { + dev_dbg(i2c->dev, + "%s: bad status before write (0x%x)\n", + __func__, tmp); + return -(int)tmp; + } + + octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_DATA, data[i]); + octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL, TWSI_CTL_ENAB); + + result = octeon_i2c_wait(i2c); + if (unlikely(result < 0)) + return result; + } + + return 0; +} + +static int octeon_i2c_read(struct octeon_i2c *i2c, int target, + uint8_t *data, int length) +{ + int i, result; + uint8_t tmp; + + if (length < 1) + return -EINVAL; + + result = octeon_i2c_start(i2c); + if (result) + return result; + + octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_DATA, (target<<1) | 1); + octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL, TWSI_CTL_ENAB); + + result = octeon_i2c_wait(i2c); + if (unlikely(result < 0)) + return result; + + for (i = 0; i < length; i++) { + tmp = octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_STAT); + if ((tmp != STAT_RXDATA_ACK) && (tmp != STAT_RXADDR_ACK)) { + dev_dbg(i2c->dev, + "%s: bad status before read (0x%x)\n", + __func__, tmp); + return -(int)tmp; + } + + if (i+1 < length) + octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL, + TWSI_CTL_ENAB | TWSI_CTL_AAK); + else + octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL, + TWSI_CTL_ENAB); + + result = octeon_i2c_wait(i2c); + if (unlikely(result < 0)) + return result; + + data[i] = octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_DATA); + } + return length; +} + +static int octeon_i2c_xfer(struct i2c_adapter *adap, + struct i2c_msg *msgs, + int num) +{ + struct i2c_msg *pmsg; + int i; + int ret = 0; + struct octeon_i2c *i2c = i2c_get_adapdata(adap); + + for (i = 0; ret >= 0 && i < num; i++) { + pmsg = &msgs[i]; + dev_dbg(i2c->dev, + "%s: Doing %s %d byte(s) to/from 0x%02x - " + "%d of %d messages\n", + __func__, + pmsg->flags & I2C_M_RD ? "read" : "write", + pmsg->len, pmsg->addr, i + 1, num); + if (pmsg->flags & I2C_M_RD) + ret = octeon_i2c_read(i2c, pmsg->addr, pmsg->buf, + pmsg->len); + else + ret = octeon_i2c_write(i2c, pmsg->addr, pmsg->buf, + pmsg->len); + } + octeon_i2c_stop(i2c); + + return (ret < 0) ? ret : num; +} + +static u32 octeon_i2c_functionality(struct i2c_adapter *adap) +{ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; +} + +static const struct i2c_algorithm octeon_i2c_algo = { + .master_xfer = octeon_i2c_xfer, + .functionality = octeon_i2c_functionality, +}; + +static struct i2c_adapter octeon_i2c_ops = { + .owner = THIS_MODULE, + .name = "OCTEON adapter", + .algo = &octeon_i2c_algo, + .timeout = 2, +}; + +static int __init octeon_i2c_setclock(struct octeon_i2c *i2c) +{ + int tclk, thp_base, inc, thp_idx, mdiv_idx, ndiv_idx, foscl, diff; + int thp = 0x18, mdiv = 2, ndiv = 0, delta_hz = 1000000; + + for (ndiv_idx = 0; ndiv_idx < 8 && delta_hz != 0; ndiv_idx++) { + /* + * An mdiv value of less than 2 seems to not work well + * with ds1337 RTCs, so we constrain it to larger + * values. + */ + for (mdiv_idx = 15; mdiv_idx >= 2 && delta_hz != 0; mdiv_idx--) { + /* + * For given ndiv and mdiv values check the + * two closest thp values. + */ + tclk = i2c->twsi_freq * (mdiv_idx + 1) * 10; + tclk *= (1 << ndiv_idx); + thp_base = (i2c->sys_freq / (tclk * 2)) - 1; + for (inc = 0; inc <= 1; inc++) { + thp_idx = thp_base + inc; + if (thp_idx < 5 || thp_idx > 0xff) + continue; + + foscl = i2c->sys_freq / (2 * (thp_idx + 1)); + foscl = foscl / (1 << ndiv_idx); + foscl = foscl / (mdiv_idx + 1) / 10; + diff = abs(foscl - i2c->twsi_freq); + if (diff < delta_hz) { + delta_hz = diff; + thp = thp_idx; + mdiv = mdiv_idx; + ndiv = ndiv_idx; + } + } + } + } + octeon_i2c_write_sw(i2c, SW_TWSI_OP_TWSI_CLK, thp); + octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CLKCTL, (mdiv << 3) | ndiv); + + return 0; +} + +static int __init octeon_i2c_initlowlevel(struct octeon_i2c *i2c) +{ + uint8_t status; + int tries; + + /* disable high level controller, enable bus access */ + octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CTL, TWSI_CTL_ENAB); + + /* reset controller */ + octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_RST, 0); + + for (tries = 10; tries; tries--) { + udelay(1); + status = octeon_i2c_read_sw(i2c, SW_TWSI_EOP_TWSI_STAT); + if (status == STAT_IDLE) + return 0; + } + dev_dbg(i2c->dev, "%s: TWSI_RST failed! (0x%x)\n", __func__, status); + return -1; +} + +static int __init octeon_i2c_probe(struct platform_device *pdev) +{ + int irq, result = 0; + struct octeon_i2c *i2c; + struct octeon_i2c_data *i2c_data; + struct resource *res_mem; + + i2c = kzalloc(sizeof(*i2c), GFP_KERNEL); + if (!i2c) { + printk(KERN_ERR "%s i2c-cavium - kzalloc failed\n", __func__); + return -ENOMEM; + } + i2c->dev = &pdev->dev; + i2c_data = pdev->dev.platform_data; + + res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + irq = platform_get_irq(pdev, 0); + + if (res_mem == NULL) { + dev_dbg(i2c->dev, "%s: found no memory resource\n", __func__); + kfree(i2c); + return -ENODEV; + } + + if (i2c_data == NULL) { + dev_dbg(i2c->dev, "%s: no I2C frequence data\n", __func__); + kfree(i2c); + return -ENODEV; + } + + i2c->twsi_phys = res_mem->start; + i2c->regsize = resource_size(res_mem); + i2c->twsi_freq = i2c_data->i2c_freq; + i2c->sys_freq = i2c_data->sys_freq; + + if (!request_mem_region(i2c->twsi_phys, i2c->regsize, res_mem->name)) { + dev_dbg(i2c->dev, + "%s i2c-cavium - request_mem_region failed\n", + __func__); + goto fail_region; + } + i2c->twsi_base = ioremap(i2c->twsi_phys, i2c->regsize); + + init_waitqueue_head(&i2c->queue); + + i2c->irq = irq; + if (i2c->irq != NO_IRQ) { + /* i2c->irq = NO_IRQ implies polling */ + result = request_irq(i2c->irq, octeon_i2c_isr, 0, DRV_NAME, i2c); + if (result < 0) { + dev_dbg(i2c->dev, + "%s: - failed to attach interrupt\n", + __func__); + goto fail_irq; + } + } + + result = octeon_i2c_initlowlevel(i2c); + if (result) { + dev_dbg(i2c->dev, "%s: init low level failed\n", __func__); + goto fail_add; + } + + result = octeon_i2c_setclock(i2c); + if (result) { + dev_dbg(i2c->dev, "%s: clock init failed\n", __func__); + goto fail_add; + } + + i2c->adap = octeon_i2c_ops; + i2c->adap.dev.parent = &pdev->dev; + i2c->adap.nr = pdev->id >= 0 ? pdev->id : 0; + i2c_set_adapdata(&i2c->adap, i2c); + platform_set_drvdata(pdev, i2c); + + result = i2c_add_numbered_adapter(&i2c->adap); + if (result < 0) { + dev_dbg(i2c->dev, "%s: failed to add adapter\n", __func__); + goto fail_add; + } + return result; + +fail_add: + platform_set_drvdata(pdev, NULL); + if (i2c->irq != NO_IRQ) + free_irq(i2c->irq, i2c); +fail_irq: + iounmap(i2c->twsi_base); + release_mem_region(i2c->twsi_phys, i2c->regsize); +fail_region: + kfree(i2c); + return result; +}; + +static int __exit octeon_i2c_remove(struct platform_device *pdev) +{ + struct octeon_i2c *i2c = platform_get_drvdata(pdev); + + i2c_del_adapter(&i2c->adap); + platform_set_drvdata(pdev, NULL); + if (i2c->irq != NO_IRQ) + free_irq(i2c->irq, i2c); + iounmap(i2c->twsi_base); + release_mem_region(i2c->twsi_phys, i2c->regsize); + kfree(i2c); + return 0; +}; + +static struct platform_driver octeon_i2c_driver = { + .probe = octeon_i2c_probe, + .remove = __exit_p(octeon_i2c_remove), + .driver = { + .owner = THIS_MODULE, + .name = DRV_NAME, + }, +}; + +static int __init octeon_i2c_init(void) +{ + int rv; + + rv = platform_driver_register(&octeon_i2c_driver); + printk(KERN_INFO "driver %s is loaded\n", DRV_NAME); + return rv; +} + +static void __exit octeon_i2c_exit(void) +{ + platform_driver_unregister(&octeon_i2c_driver); + printk(KERN_INFO "driver %s unloaded\n", DRV_NAME); +} + +MODULE_AUTHOR("Michael Lawnick "); +MODULE_DESCRIPTION("I2C-Bus adapter for Cavium OCTEON processors"); +MODULE_LICENSE("GPL"); +MODULE_VERSION(DRV_VERSION); +MODULE_ALIAS("platform:" DRV_NAME); + +module_init(octeon_i2c_init); +module_exit(octeon_i2c_exit); + -- 1.6.0.6 From ddaney@caviumnetworks.com Thu Jan 7 20:57:14 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 20:57:18 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:19040 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492686Ab0AGT5O (ORCPT ); Thu, 7 Jan 2010 20:57:14 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Thu, 07 Jan 2010 11:57:14 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:56:33 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 11:56:33 -0800 Message-ID: <4B463C71.3080005@caviumnetworks.com> Date: Thu, 07 Jan 2010 11:56:33 -0800 From: David Daney User-Agent: Thunderbird 2.0.0.21 (X11/20090320) MIME-Version: 1.0 To: "Bozic, Rade (EXT-Other - DE/Ulm)" CC: linux-mips , Ralf Baechle , linux-i2c@vger.kernel.org, "Ben Dooks (embedded platforms)" , "Jean Delvare (PC drivers, core)" Subject: Re: [PATCH 0/3] Add I2C support for Octeon SOCs. References: <4B463B1F.6000404@caviumnetworks.com> In-Reply-To: <4B463B1F.6000404@caviumnetworks.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 07 Jan 2010 19:56:33.0523 (UTC) FILETIME=[832EBC30:01CA8FD3] X-archive-position: 25540 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5187 Content-Length: 1104 Lines: 31 Bah... I forgot to include Rade Bozic on the original message. Now included. David Daney wrote: > This patch set adds I2C driver support for Cavium Networks' Octeon > processor family. The Octeon is a multi-core MIPS64 based SOC. > > The first patch adds platform devices for the I2C devices. The second > patch is the main driver. Finally the third patch registers some > devices so we have something to control with the fancy new driver. > > I will reply with the three patches. > > David Daney (2): > MIPS: Octeon: Add I2C platform driver. > MIPS: Octeon: Register some devices on the I2C bus. > > Rade Bozic (1): > I2C: Add driver for Cavium OCTEON I2C ports. > > arch/mips/cavium-octeon/octeon-platform.c | 85 +++++ > arch/mips/include/asm/octeon/octeon.h | 5 + > drivers/i2c/busses/Kconfig | 10 + > drivers/i2c/busses/Makefile | 1 + > drivers/i2c/busses/i2c-octeon.c | 579 > +++++++++++++++++++++++++++++ > 5 files changed, 680 insertions(+), 0 deletions(-) > create mode 100644 drivers/i2c/busses/i2c-octeon.c > > From sshtylyov@ru.mvista.com Thu Jan 7 21:36:28 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 21:36:33 +0100 (CET) Received: from gateway-1237.mvista.com ([206.112.117.35]:1957 "HELO imap.sh.mvista.com" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with SMTP id S1492768Ab0AGUg2 (ORCPT ); Thu, 7 Jan 2010 21:36:28 +0100 Received: from [127.0.0.1] (unknown [10.150.0.9]) by imap.sh.mvista.com (Postfix) with SMTP id 19E7D3ECA; Thu, 7 Jan 2010 12:36:12 -0800 (PST) Message-ID: <4B4645A3.30401@ru.mvista.com> Date: Thu, 07 Jan 2010 23:35:47 +0300 From: Sergei Shtylyov User-Agent: Thunderbird 2.0.0.23 (Windows/20090812) MIME-Version: 1.0 To: David Daney Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, linux-i2c@vger.kernel.org, ben-linux@fluff.org, khali@linux-fr.org, rade.bozic.ext@nsn.com Subject: Re: [PATCH 1/3] MIPS: Octeon: Add I2C platform driver. References: <4B463B1F.6000404@caviumnetworks.com> <1262894061-32613-1-git-send-email-ddaney@caviumnetworks.com> In-Reply-To: <1262894061-32613-1-git-send-email-ddaney@caviumnetworks.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-archive-position: 25541 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sshtylyov@ru.mvista.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5218 Content-Length: 1595 Lines: 64 Hello. David Daney wrote: > Signed-off-by: David Daney > CC: Rade Bozic > [...] > diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c > index 20698a6..f2c0602 100644 > --- a/arch/mips/cavium-octeon/octeon-platform.c > +++ b/arch/mips/cavium-octeon/octeon-platform.c > @@ -165,6 +165,78 @@ out: > } > device_initcall(octeon_rng_device_init); > > + > +#define OCTEON_I2C_IO_BASE 0x1180000001000ull > +#define OCTEON_I2C_IO_UNIT_OFFSET 0x200 > + > +static struct octeon_i2c_data octeon_i2c_data[2]; > + > +static int __init octeon_i2c_device_init(void) > +{ > + struct platform_device *pd; > + int ret = 0; > + int port, num_ports; > + > + struct resource i2c_resources[] = { > + { > + .flags = IORESOURCE_MEM, > + }, { > + .flags = IORESOURCE_IRQ, > + } > + }; > + > + if (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX)) > + num_ports = 2; > + else > + num_ports = 1; > + > + for (port = 0; port < num_ports; port++) { > + octeon_i2c_data[port].sys_freq = octeon_get_clock_rate(); > + /*FIXME: should be examined. At the moment is set for 100Khz */ > + octeon_i2c_data[port].i2c_freq = 100000; > + > + pd = platform_device_alloc("i2c-octeon", port); > + if (!pd) { > + ret = -ENOMEM; > + goto out; > + } > + > + pd->dev.platform_data = octeon_i2c_data + port; > + > + i2c_resources[0].start = > + OCTEON_I2C_IO_BASE + (port * OCTEON_I2C_IO_UNIT_OFFSET); > + i2c_resources[0].end = i2c_resources[0].start + 0x20; > Not 0x1F? WBR, Sergei From sshtylyov@ru.mvista.com Thu Jan 7 21:37:40 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 21:37:43 +0100 (CET) Received: from gateway-1237.mvista.com ([206.112.117.35]:3786 "HELO imap.sh.mvista.com" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with SMTP id S1492771Ab0AGUhk (ORCPT ); Thu, 7 Jan 2010 21:37:40 +0100 Received: from [127.0.0.1] (unknown [10.150.0.9]) by imap.sh.mvista.com (Postfix) with SMTP id 1FD3E3ECA; Thu, 7 Jan 2010 12:37:31 -0800 (PST) Message-ID: <4B4645EE.5050302@ru.mvista.com> Date: Thu, 07 Jan 2010 23:37:02 +0300 From: Sergei Shtylyov User-Agent: Thunderbird 2.0.0.23 (Windows/20090812) MIME-Version: 1.0 To: David Daney Cc: ralf@linux-mips.org, linux-mips@linux-mips.org, netdev@vger.kernel.org, gregkh@suse.de Subject: Re: [PATCH 1/7] MIPS: Octeon: Fix EIO handling. References: <4B463005.8060505@caviumnetworks.com> <1262891106-32146-1-git-send-email-ddaney@caviumnetworks.com> In-Reply-To: <1262891106-32146-1-git-send-email-ddaney@caviumnetworks.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-archive-position: 25542 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sshtylyov@ru.mvista.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5221 Content-Length: 561 Lines: 20 Hello. David Daney wrote: > If an interrupt handler disables interrupts, the EOI function will > just reenable them. This will put us in an endless loop when the > upcoming Ethernet driver patches are applied. > > Only reenable the interrupt on EOI if it is not IRQ_DISABLED. This > requires that the EIO function be separate from the ENABLE function. > We also rename the ACK functions to correspond with their function. > > Signed-off-by: David Daney > I guess the subject should read "EIO", not "EIO"... WBR, Sergei From ddaney@caviumnetworks.com Thu Jan 7 21:57:37 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 21:57:41 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:1815 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492420Ab0AGU5h (ORCPT ); Thu, 7 Jan 2010 21:57:37 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Thu, 07 Jan 2010 12:57:32 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 12:55:19 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 12:55:19 -0800 Message-ID: <4B464A37.7020300@caviumnetworks.com> Date: Thu, 07 Jan 2010 12:55:19 -0800 From: David Daney User-Agent: Thunderbird 2.0.0.21 (X11/20090320) MIME-Version: 1.0 To: Sergei Shtylyov CC: linux-mips@linux-mips.org, ralf@linux-mips.org, linux-i2c@vger.kernel.org, ben-linux@fluff.org, khali@linux-fr.org, rade.bozic.ext@nsn.com Subject: Re: [PATCH 1/3] MIPS: Octeon: Add I2C platform driver. References: <4B463B1F.6000404@caviumnetworks.com> <1262894061-32613-1-git-send-email-ddaney@caviumnetworks.com> <4B4645A3.30401@ru.mvista.com> In-Reply-To: <4B4645A3.30401@ru.mvista.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 07 Jan 2010 20:55:19.0600 (UTC) FILETIME=[B8E36300:01CA8FDB] X-archive-position: 25543 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5236 Content-Length: 1886 Lines: 68 Sergei Shtylyov wrote: > Hello. > > David Daney wrote: > >> Signed-off-by: David Daney >> CC: Rade Bozic >> > [...] >> diff --git a/arch/mips/cavium-octeon/octeon-platform.c >> b/arch/mips/cavium-octeon/octeon-platform.c >> index 20698a6..f2c0602 100644 >> --- a/arch/mips/cavium-octeon/octeon-platform.c >> +++ b/arch/mips/cavium-octeon/octeon-platform.c >> @@ -165,6 +165,78 @@ out: >> } >> device_initcall(octeon_rng_device_init); >> >> + >> +#define OCTEON_I2C_IO_BASE 0x1180000001000ull >> +#define OCTEON_I2C_IO_UNIT_OFFSET 0x200 >> + >> +static struct octeon_i2c_data octeon_i2c_data[2]; >> + >> +static int __init octeon_i2c_device_init(void) >> +{ >> + struct platform_device *pd; >> + int ret = 0; >> + int port, num_ports; >> + >> + struct resource i2c_resources[] = { >> + { >> + .flags = IORESOURCE_MEM, >> + }, { >> + .flags = IORESOURCE_IRQ, >> + } >> + }; >> + >> + if (OCTEON_IS_MODEL(OCTEON_CN56XX) || >> OCTEON_IS_MODEL(OCTEON_CN52XX)) >> + num_ports = 2; >> + else >> + num_ports = 1; >> + >> + for (port = 0; port < num_ports; port++) { >> + octeon_i2c_data[port].sys_freq = octeon_get_clock_rate(); >> + /*FIXME: should be examined. At the moment is set for 100Khz */ >> + octeon_i2c_data[port].i2c_freq = 100000; >> + >> + pd = platform_device_alloc("i2c-octeon", port); >> + if (!pd) { >> + ret = -ENOMEM; >> + goto out; >> + } >> + >> + pd->dev.platform_data = octeon_i2c_data + port; >> + >> + i2c_resources[0].start = >> + OCTEON_I2C_IO_BASE + (port * OCTEON_I2C_IO_UNIT_OFFSET); >> + i2c_resources[0].end = i2c_resources[0].start + 0x20; >> > > Not 0x1F? > You are correct. I will fix it. David Daney From ddaney@caviumnetworks.com Thu Jan 7 21:57:39 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 21:58:06 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:1817 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492768Ab0AGU5j (ORCPT ); Thu, 7 Jan 2010 21:57:39 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Thu, 07 Jan 2010 12:57:33 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 12:52:08 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 12:52:08 -0800 Message-ID: <4B464977.2090801@caviumnetworks.com> Date: Thu, 07 Jan 2010 12:52:07 -0800 From: David Daney User-Agent: Thunderbird 2.0.0.21 (X11/20090320) MIME-Version: 1.0 To: Sergei Shtylyov CC: ralf@linux-mips.org, linux-mips@linux-mips.org, netdev@vger.kernel.org, gregkh@suse.de Subject: Re: [PATCH 1/7] MIPS: Octeon: Fix EIO handling. References: <4B463005.8060505@caviumnetworks.com> <1262891106-32146-1-git-send-email-ddaney@caviumnetworks.com> <4B4645EE.5050302@ru.mvista.com> In-Reply-To: <4B4645EE.5050302@ru.mvista.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 07 Jan 2010 20:52:08.0441 (UTC) FILETIME=[46F2D690:01CA8FDB] X-archive-position: 25544 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5237 Content-Length: 746 Lines: 26 Sergei Shtylyov wrote: > Hello. > > David Daney wrote: > >> If an interrupt handler disables interrupts, the EOI function will >> just reenable them. This will put us in an endless loop when the >> upcoming Ethernet driver patches are applied. >> >> Only reenable the interrupt on EOI if it is not IRQ_DISABLED. This >> requires that the EIO function be separate from the ENABLE function. >> We also rename the ACK functions to correspond with their function. >> >> Signed-off-by: David Daney >> > > I guess the subject should read "EIO", not "EIO"... > Indeed. The compiler didn't catch that one. Perhaps Ralf can fix it if he merges it, otherwise I can resubmit with corrected spelling. David Daney From ddaney@caviumnetworks.com Thu Jan 7 22:23:50 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 22:23:54 +0100 (CET) Received: from smtp2.caviumnetworks.com ([209.113.159.134]:5459 "EHLO smtp2.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492795Ab0AGVXu (ORCPT ); Thu, 7 Jan 2010 22:23:50 +0100 Received: from maexch1.caveonetworks.com (Not Verified[192.168.14.20]) by smtp2.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Thu, 07 Jan 2010 16:18:58 -0500 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by maexch1.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 16:23:47 -0500 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 13:23:46 -0800 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.2/8.14.2) with ESMTP id o07LNg3S006701; Thu, 7 Jan 2010 13:23:42 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.2/8.14.2/Submit) id o07LNfAf006694; Thu, 7 Jan 2010 13:23:41 -0800 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org, linux-i2c@vger.kernel.org, ben-linux@fluff.org, khali@linux-fr.org Cc: rade.bozic.ext@nsn.com, David Daney Subject: [PATCH 1/3] MIPS: Octeon: Add I2C platform device. Date: Thu, 7 Jan 2010 13:23:41 -0800 Message-Id: <1262899421-6670-1-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.0.6 In-Reply-To: <4B464A37.7020300@caviumnetworks.com> References: <4B464A37.7020300@caviumnetworks.com> X-OriginalArrivalTime: 07 Jan 2010 21:23:46.0376 (UTC) FILETIME=[B234BC80:01CA8FDF] X-archive-position: 25545 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5258 Content-Length: 2962 Lines: 114 Signed-off-by: David Daney CC: Rade Bozic --- This supersedes the original '[PATCH 1/3] MIPS: Octeon: Add I2C platform driver.' and corrects the resource end value as noted by Sergei Shtylyov. arch/mips/cavium-octeon/octeon-platform.c | 72 +++++++++++++++++++++++++++++ arch/mips/include/asm/octeon/octeon.h | 5 ++ 2 files changed, 77 insertions(+), 0 deletions(-) diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c index 20698a6..b4a0b5f 100644 --- a/arch/mips/cavium-octeon/octeon-platform.c +++ b/arch/mips/cavium-octeon/octeon-platform.c @@ -165,6 +165,78 @@ out: } device_initcall(octeon_rng_device_init); + +#define OCTEON_I2C_IO_BASE 0x1180000001000ull +#define OCTEON_I2C_IO_UNIT_OFFSET 0x200 + +static struct octeon_i2c_data octeon_i2c_data[2]; + +static int __init octeon_i2c_device_init(void) +{ + struct platform_device *pd; + int ret = 0; + int port, num_ports; + + struct resource i2c_resources[] = { + { + .flags = IORESOURCE_MEM, + }, { + .flags = IORESOURCE_IRQ, + } + }; + + if (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX)) + num_ports = 2; + else + num_ports = 1; + + for (port = 0; port < num_ports; port++) { + octeon_i2c_data[port].sys_freq = octeon_get_clock_rate(); + /*FIXME: should be examined. At the moment is set for 100Khz */ + octeon_i2c_data[port].i2c_freq = 100000; + + pd = platform_device_alloc("i2c-octeon", port); + if (!pd) { + ret = -ENOMEM; + goto out; + } + + pd->dev.platform_data = octeon_i2c_data + port; + + i2c_resources[0].start = + OCTEON_I2C_IO_BASE + (port * OCTEON_I2C_IO_UNIT_OFFSET); + i2c_resources[0].end = i2c_resources[0].start + 0x1f; + switch (port) { + case 0: + i2c_resources[1].start = OCTEON_IRQ_TWSI; + i2c_resources[1].end = OCTEON_IRQ_TWSI; + break; + case 1: + i2c_resources[1].start = OCTEON_IRQ_TWSI2; + i2c_resources[1].end = OCTEON_IRQ_TWSI2; + break; + default: + BUG(); + } + + ret = platform_device_add_resources(pd, + i2c_resources, + ARRAY_SIZE(i2c_resources)); + if (ret) + goto fail; + + ret = platform_device_add(pd); + if (ret) + goto fail; + } + return ret; +fail: + platform_device_put(pd); +out: + return ret; +} +device_initcall(octeon_i2c_device_init); + /* Octeon SMI/MDIO interface. */ static int __init octeon_mdiobus_device_init(void) { diff --git a/arch/mips/include/asm/octeon/octeon.h b/arch/mips/include/asm/octeon/octeon.h index 705fef2..a0cf129 100644 --- a/arch/mips/include/asm/octeon/octeon.h +++ b/arch/mips/include/asm/octeon/octeon.h @@ -213,6 +213,11 @@ struct octeon_cf_data { int dma_engine; /* -1 for no DMA */ }; +struct octeon_i2c_data { + unsigned int sys_freq; + unsigned int i2c_freq; +}; + extern void octeon_write_lcd(const char *s); extern void octeon_check_cpu_bist(void); extern int octeon_get_boot_uart(void); -- 1.6.0.6 From gregkh@suse.de Thu Jan 7 23:16:37 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 23:16:41 +0100 (CET) Received: from cantor.suse.de ([195.135.220.2]:37164 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492094Ab0AGWQh (ORCPT ); Thu, 7 Jan 2010 23:16:37 +0100 Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.221.2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.suse.de (Postfix) with ESMTP id 6E8596CB00; Thu, 7 Jan 2010 23:16:34 +0100 (CET) Date: Thu, 7 Jan 2010 13:59:50 -0800 From: Greg KH To: David Daney Cc: Sergei Shtylyov , ralf@linux-mips.org, linux-mips@linux-mips.org, netdev@vger.kernel.org Subject: Re: [PATCH 1/7] MIPS: Octeon: Fix EIO handling. Message-ID: <20100107215950.GA24672@suse.de> References: <4B463005.8060505@caviumnetworks.com> <1262891106-32146-1-git-send-email-ddaney@caviumnetworks.com> <4B4645EE.5050302@ru.mvista.com> <4B464977.2090801@caviumnetworks.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4B464977.2090801@caviumnetworks.com> User-Agent: Mutt/1.5.17 (2007-11-01) X-archive-position: 25546 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: gregkh@suse.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5295 Content-Length: 888 Lines: 30 On Thu, Jan 07, 2010 at 12:52:07PM -0800, David Daney wrote: > Sergei Shtylyov wrote: >> Hello. >> >> David Daney wrote: >> >>> If an interrupt handler disables interrupts, the EOI function will >>> just reenable them. This will put us in an endless loop when the >>> upcoming Ethernet driver patches are applied. >>> >>> Only reenable the interrupt on EOI if it is not IRQ_DISABLED. This >>> requires that the EIO function be separate from the ENABLE function. >>> We also rename the ACK functions to correspond with their function. >>> >>> Signed-off-by: David Daney >>> >> >> I guess the subject should read "EIO", not "EIO"... >> > > Indeed. The compiler didn't catch that one. > > Perhaps Ralf can fix it if he merges it, otherwise I can resubmit with > corrected spelling. I can change it when merging, don't worry about it. thanks, greg k-h From ddaney@caviumnetworks.com Thu Jan 7 23:33:53 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jan 2010 23:33:57 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:4439 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492290Ab0AGWdx (ORCPT ); Thu, 7 Jan 2010 23:33:53 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Thu, 07 Jan 2010 14:33:49 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 14:33:33 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Jan 2010 14:33:33 -0800 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.2/8.14.2) with ESMTP id o07MXV3O021689; Thu, 7 Jan 2010 14:33:31 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.2/8.14.2/Submit) id o07MXUSD021687; Thu, 7 Jan 2010 14:33:30 -0800 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org Cc: David Daney Subject: [PATCH] MIPS: Remove unused macros from barrier.h Date: Thu, 7 Jan 2010 14:33:30 -0800 Message-Id: <1262903610-21663-1-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.0.6 X-OriginalArrivalTime: 07 Jan 2010 22:33:33.0679 (UTC) FILETIME=[720877F0:01CA8FE9] X-archive-position: 25547 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5301 Content-Length: 756 Lines: 23 The smp_llsc_rmb() and smp_llsc_wmb() macros are not used in the tree, remove them. Signed-off-by: David Daney --- arch/mips/include/asm/barrier.h | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-) diff --git a/arch/mips/include/asm/barrier.h b/arch/mips/include/asm/barrier.h index 8e9ac31..91785dc 100644 --- a/arch/mips/include/asm/barrier.h +++ b/arch/mips/include/asm/barrier.h @@ -149,7 +149,5 @@ do { var = value; smp_mb(); } while (0) #define smp_llsc_mb() __asm__ __volatile__(__WEAK_LLSC_MB : : :"memory") -#define smp_llsc_rmb() __asm__ __volatile__(__WEAK_LLSC_MB : : :"memory") -#define smp_llsc_wmb() __asm__ __volatile__(__WEAK_LLSC_MB : : :"memory") #endif /* __ASM_BARRIER_H */ -- 1.6.0.6 From ddaney@caviumnetworks.com Fri Jan 8 23:47:55 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 08 Jan 2010 23:47:59 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:18222 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492890Ab0AHWrz (ORCPT ); Fri, 8 Jan 2010 23:47:55 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Fri, 08 Jan 2010 14:47:45 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 8 Jan 2010 14:47:42 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Fri, 8 Jan 2010 14:47:41 -0800 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.2/8.14.2) with ESMTP id o08Mlb2F008326; Fri, 8 Jan 2010 14:47:37 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.2/8.14.2/Submit) id o08MlaJY008324; Fri, 8 Jan 2010 14:47:36 -0800 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org Cc: David Daney Subject: [PATCH] MIPS: Octeon: Use non-overflowing arithmetic in sched_clock Date: Fri, 8 Jan 2010 14:47:36 -0800 Message-Id: <1262990856-8300-1-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.0.6 X-OriginalArrivalTime: 08 Jan 2010 22:47:42.0028 (UTC) FILETIME=[961A00C0:01CA90B4] X-archive-position: 25548 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5917 Content-Length: 1730 Lines: 54 With typical mult and shift values, the calculation for Octeon's sched_clock overflows when using 64-bit arithmetic. Use 128-bit calculations instead. Signed-off-by: David Daney --- arch/mips/cavium-octeon/csrc-octeon.c | 31 ++++++++++++++++++++++++++++--- 1 files changed, 28 insertions(+), 3 deletions(-) diff --git a/arch/mips/cavium-octeon/csrc-octeon.c b/arch/mips/cavium-octeon/csrc-octeon.c index 96df821..0bf4bbe 100644 --- a/arch/mips/cavium-octeon/csrc-octeon.c +++ b/arch/mips/cavium-octeon/csrc-octeon.c @@ -52,9 +52,34 @@ static struct clocksource clocksource_mips = { unsigned long long notrace sched_clock(void) { - return clocksource_cyc2ns(read_c0_cvmcount(), - clocksource_mips.mult, - clocksource_mips.shift); + /* 64-bit arithmatic can overflow, so use 128-bit. */ +#if (__GNUC__ < 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ <= 3)) + u64 t1, t2, t3; + unsigned long long rv; + u64 mult = clocksource_mips.mult; + u64 shift = clocksource_mips.shift; + u64 cnt = read_c0_cvmcount(); + + asm ( + "dmultu\t%[cnt],%[mult]\n\t" + "nor\t%[t1],$0,%[shift]\n\t" + "mfhi\t%[t2]\n\t" + "mflo\t%[t3]\n\t" + "dsll\t%[t2],%[t2],1\n\t" + "dsrlv\t%[rv],%[t3],%[shift]\n\t" + "dsllv\t%[t1],%[t2],%[t1]\n\t" + "or\t%[rv],%[t1],%[rv]\n\t" + : [rv] "=&r" (rv), [t1] "=&r" (t1), [t2] "=&r" (t2), [t3] "=&r" (t3) + : [cnt] "r" (cnt), [mult] "r" (mult), [shift] "r" (shift) + : "hi", "lo"); + return rv; +#else + /* GCC > 4.3 do it the easy way. */ + unsigned int __attribute__((mode(TI))) t; + t = read_c0_cvmcount(); + t = t * clocksource_mips.mult; + return (unsigned long long)(t >> clocksource_mips.shift); +#endif } void __init plat_time_init(void) -- 1.6.0.6 From ddaney@caviumnetworks.com Sat Jan 9 02:16:37 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 09 Jan 2010 02:16:41 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:1985 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492776Ab0AIBQh (ORCPT ); Sat, 9 Jan 2010 02:16:37 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Fri, 08 Jan 2010 17:16:33 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 8 Jan 2010 17:16:29 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Fri, 8 Jan 2010 17:16:29 -0800 Message-ID: <4B47D8ED.1020006@caviumnetworks.com> Date: Fri, 08 Jan 2010 17:16:29 -0800 From: David Daney User-Agent: Thunderbird 2.0.0.21 (X11/20090320) MIME-Version: 1.0 To: Ralf Baechle , linux-mips Subject: [PATCH 0/2] Rearrange MIPS barriers and optimize for Octeon. Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 09 Jan 2010 01:16:29.0755 (UTC) FILETIME=[5F7108B0:01CA90C9] X-archive-position: 25549 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6010 Content-Length: 824 Lines: 21 Locking/atomic performance on Octeon can be improved by using optimized barrier instructions. The first patch in this set rearranges and simplifies (at least in my mind) the existing barriers. Then the second patch adds Octeon specific barriers. I will reply with the two patches. David Daney (2): MIPS: New macro smp_mb__before_llsc. MIPS: Octeon: Use optimized memory barrier primitives. arch/mips/Kconfig | 1 - arch/mips/include/asm/atomic.h | 16 ++++++------ arch/mips/include/asm/barrier.h | 52 +++++++++++++++++++++++++++----------- arch/mips/include/asm/bitops.h | 8 +++--- arch/mips/include/asm/cmpxchg.h | 10 +++--- arch/mips/include/asm/spinlock.h | 4 +- arch/mips/include/asm/system.h | 4 +++ 7 files changed, 60 insertions(+), 35 deletions(-) From ddaney@caviumnetworks.com Sat Jan 9 02:17:52 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 09 Jan 2010 02:17:56 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:1991 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493014Ab0AIBRw (ORCPT ); Sat, 9 Jan 2010 02:17:52 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Fri, 08 Jan 2010 17:17:54 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 8 Jan 2010 17:17:50 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Fri, 8 Jan 2010 17:17:50 -0800 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.2/8.14.2) with ESMTP id o091HmYs002386; Fri, 8 Jan 2010 17:17:48 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.2/8.14.2/Submit) id o091Hma1002384; Fri, 8 Jan 2010 17:17:48 -0800 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org Cc: David Daney Subject: [PATCH 2/2] MIPS: Octeon: Use optimized memory barrier primitives. Date: Fri, 8 Jan 2010 17:17:44 -0800 Message-Id: <1262999864-2353-2-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.0.6 In-Reply-To: <4B47D8ED.1020006@caviumnetworks.com> References: <4B47D8ED.1020006@caviumnetworks.com> X-OriginalArrivalTime: 09 Jan 2010 01:17:50.0241 (UTC) FILETIME=[8F6A3910:01CA90C9] X-archive-position: 25550 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6012 Content-Length: 4017 Lines: 143 In order to achieve correct synchronization semantics, the Octeon port had defined CONFIG_WEAK_REORDERING_BEYOND_LLSC. This resulted in code that looks like: sync ll ... . . . sc ... . . sync The second SYNC was redundant, but harmless. Octeon has a SYNCW instruction that acts as a write-memory-barrier (due to an erratum in some parts two SYNCW are used). It is much faster than SYNC because it imposes ordering on the writes, but doesn't otherwise stall the execution pipeline. On Octeon, SYNC stalls execution until all preceeding writes are committed to the coherent memory system. Using: syncw;syncw ll . . . sc . . Has identical semantics to the first sequence, but is much faster. The SYNCW orders the writes, and the SC will not complete successfully until the write is committed to the coherent memory system. So at the end all preceeding writes have been committed. Since Octeon does not do speculative reads, this functions as a full barrier. The patch removes CONFIG_WEAK_REORDERING_BEYOND_LLSC, and substitutes SYNCW for SYNC in write-memory-barriers. Signed-off-by: David Daney --- arch/mips/Kconfig | 1 - arch/mips/include/asm/barrier.h | 43 ++++++++++++++++++++++++++++---------- 2 files changed, 31 insertions(+), 13 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 9dde8d1..cd04d36 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1295,7 +1295,6 @@ config CPU_CAVIUM_OCTEON select SYS_SUPPORTS_SMP select NR_CPUS_DEFAULT_16 select WEAK_ORDERING - select WEAK_REORDERING_BEYOND_LLSC select CPU_SUPPORTS_HIGHMEM select CPU_SUPPORTS_HUGEPAGES help diff --git a/arch/mips/include/asm/barrier.h b/arch/mips/include/asm/barrier.h index 1a5a51c..a2670a2 100644 --- a/arch/mips/include/asm/barrier.h +++ b/arch/mips/include/asm/barrier.h @@ -88,12 +88,20 @@ : /* no output */ \ : "m" (*(int *)CKSEG1) \ : "memory") - -#define fast_wmb() __sync() -#define fast_rmb() __sync() -#define fast_mb() __sync() -#ifdef CONFIG_SGI_IP28 -#define fast_iob() \ +#ifdef CONFIG_CPU_CAVIUM_OCTEON +# define OCTEON_SYNCW_STR ".set push\n.set arch=octeon\nsyncw\nsyncw\n.set pop\n" +# define __syncw() __asm__ __volatile__(OCTEON_SYNCW_STR : : : "memory") + +# define fast_wmb() __syncw() +# define fast_rmb() barrier() +# define fast_mb() __sync() +# define fast_iob() do { } while (0) +#else /* ! CONFIG_CPU_CAVIUM_OCTEON */ +# define fast_wmb() __sync() +# define fast_rmb() __sync() +# define fast_mb() __sync() +# ifdef CONFIG_SGI_IP28 +# define fast_iob() \ __asm__ __volatile__( \ ".set push\n\t" \ ".set noreorder\n\t" \ @@ -104,13 +112,14 @@ : /* no output */ \ : "m" (*(int *)CKSEG1ADDR(0x1fa00004)) \ : "memory") -#else -#define fast_iob() \ +# else +# define fast_iob() \ do { \ __sync(); \ __fast_iob(); \ } while (0) -#endif +# endif +#endif /* CONFIG_CPU_CAVIUM_OCTEON */ #ifdef CONFIG_CPU_HAS_WB @@ -131,9 +140,15 @@ #endif /* !CONFIG_CPU_HAS_WB */ #if defined(CONFIG_WEAK_ORDERING) && defined(CONFIG_SMP) -#define smp_mb() __asm__ __volatile__("sync" : : :"memory") -#define smp_rmb() __asm__ __volatile__("sync" : : :"memory") -#define smp_wmb() __asm__ __volatile__("sync" : : :"memory") +# ifdef CONFIG_CPU_CAVIUM_OCTEON +# define smp_mb() __sync() +# define smp_rmb() barrier() +# define smp_wmb() __syncw() +# else +# define smp_mb() __asm__ __volatile__("sync" : : :"memory") +# define smp_rmb() __asm__ __volatile__("sync" : : :"memory") +# define smp_wmb() __asm__ __volatile__("sync" : : :"memory") +# endif #else #define smp_mb() barrier() #define smp_rmb() barrier() @@ -151,6 +166,10 @@ #define smp_llsc_mb() __asm__ __volatile__(__WEAK_LLSC_MB : : :"memory") +#ifdef CONFIG_CPU_CAVIUM_OCTEON +#define smp_mb__before_llsc() smp_wmb() +#else #define smp_mb__before_llsc() smp_llsc_mb() +#endif #endif /* __ASM_BARRIER_H */ -- 1.6.0.6 From ddaney@caviumnetworks.com Sat Jan 9 02:17:52 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 09 Jan 2010 02:18:21 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:1990 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492776Ab0AIBRw (ORCPT ); Sat, 9 Jan 2010 02:17:52 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Fri, 08 Jan 2010 17:17:53 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 8 Jan 2010 17:17:50 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Fri, 8 Jan 2010 17:17:50 -0800 Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.2/8.14.2) with ESMTP id o091HlfV002379; Fri, 8 Jan 2010 17:17:47 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.2/8.14.2/Submit) id o091HiIH002377; Fri, 8 Jan 2010 17:17:44 -0800 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org Cc: David Daney Subject: [PATCH 1/2] MIPS: New macro smp_mb__before_llsc. Date: Fri, 8 Jan 2010 17:17:43 -0800 Message-Id: <1262999864-2353-1-git-send-email-ddaney@caviumnetworks.com> X-Mailer: git-send-email 1.6.0.6 In-Reply-To: <4B47D8ED.1020006@caviumnetworks.com> References: <4B47D8ED.1020006@caviumnetworks.com> X-OriginalArrivalTime: 09 Jan 2010 01:17:50.0241 (UTC) FILETIME=[8F6A3910:01CA90C9] X-archive-position: 25551 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6013 Content-Length: 7791 Lines: 253 Replace some instances of smp_llsc_mb() with a new macro smp_mb__before_llsc(). It is used before ll/sc sequences that are documented as needing write barrier semantics. The default implementation of smp_mb__before_llsc() is just smp_llsc_mb(), so there are no changes in semantics. Also simplify definition of smp_mb(), smp_rmb(), and smp_wmb() to be just barrier() in the non-SMP case. Signed-off-by: David Daney --- arch/mips/include/asm/atomic.h | 16 ++++++++-------- arch/mips/include/asm/barrier.h | 15 +++++++++------ arch/mips/include/asm/bitops.h | 8 ++++---- arch/mips/include/asm/cmpxchg.h | 10 +++++----- arch/mips/include/asm/spinlock.h | 4 ++-- arch/mips/include/asm/system.h | 4 ++++ 6 files changed, 32 insertions(+), 25 deletions(-) diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h index dd75d67..519197e 100644 --- a/arch/mips/include/asm/atomic.h +++ b/arch/mips/include/asm/atomic.h @@ -137,7 +137,7 @@ static __inline__ int atomic_add_return(int i, atomic_t * v) { int result; - smp_llsc_mb(); + smp_mb__before_llsc(); if (kernel_uses_llsc && R10000_LLSC_WAR) { int temp; @@ -189,7 +189,7 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v) { int result; - smp_llsc_mb(); + smp_mb__before_llsc(); if (kernel_uses_llsc && R10000_LLSC_WAR) { int temp; @@ -249,7 +249,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) { int result; - smp_llsc_mb(); + smp_mb__before_llsc(); if (kernel_uses_llsc && R10000_LLSC_WAR) { int temp; @@ -516,7 +516,7 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v) { long result; - smp_llsc_mb(); + smp_mb__before_llsc(); if (kernel_uses_llsc && R10000_LLSC_WAR) { long temp; @@ -568,7 +568,7 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v) { long result; - smp_llsc_mb(); + smp_mb__before_llsc(); if (kernel_uses_llsc && R10000_LLSC_WAR) { long temp; @@ -628,7 +628,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) { long result; - smp_llsc_mb(); + smp_mb__before_llsc(); if (kernel_uses_llsc && R10000_LLSC_WAR) { long temp; @@ -788,9 +788,9 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u) * atomic*_return operations are serializing but not the non-*_return * versions. */ -#define smp_mb__before_atomic_dec() smp_llsc_mb() +#define smp_mb__before_atomic_dec() smp_mb__before_llsc() #define smp_mb__after_atomic_dec() smp_llsc_mb() -#define smp_mb__before_atomic_inc() smp_llsc_mb() +#define smp_mb__before_atomic_inc() smp_mb__before_llsc() #define smp_mb__after_atomic_inc() smp_llsc_mb() #include diff --git a/arch/mips/include/asm/barrier.h b/arch/mips/include/asm/barrier.h index 91785dc..1a5a51c 100644 --- a/arch/mips/include/asm/barrier.h +++ b/arch/mips/include/asm/barrier.h @@ -131,23 +131,26 @@ #endif /* !CONFIG_CPU_HAS_WB */ #if defined(CONFIG_WEAK_ORDERING) && defined(CONFIG_SMP) -#define __WEAK_ORDERING_MB " sync \n" +#define smp_mb() __asm__ __volatile__("sync" : : :"memory") +#define smp_rmb() __asm__ __volatile__("sync" : : :"memory") +#define smp_wmb() __asm__ __volatile__("sync" : : :"memory") #else -#define __WEAK_ORDERING_MB " \n" +#define smp_mb() barrier() +#define smp_rmb() barrier() +#define smp_wmb() barrier() #endif + #if defined(CONFIG_WEAK_REORDERING_BEYOND_LLSC) && defined(CONFIG_SMP) #define __WEAK_LLSC_MB " sync \n" #else #define __WEAK_LLSC_MB " \n" #endif -#define smp_mb() __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory") -#define smp_rmb() __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory") -#define smp_wmb() __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory") - #define set_mb(var, value) \ do { var = value; smp_mb(); } while (0) #define smp_llsc_mb() __asm__ __volatile__(__WEAK_LLSC_MB : : :"memory") +#define smp_mb__before_llsc() smp_llsc_mb() + #endif /* __ASM_BARRIER_H */ diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h index 84a3838..9255cfb 100644 --- a/arch/mips/include/asm/bitops.h +++ b/arch/mips/include/asm/bitops.h @@ -42,7 +42,7 @@ /* * clear_bit() doesn't provide any barrier for the compiler. */ -#define smp_mb__before_clear_bit() smp_llsc_mb() +#define smp_mb__before_clear_bit() smp_mb__before_llsc() #define smp_mb__after_clear_bit() smp_llsc_mb() /* @@ -258,7 +258,7 @@ static inline int test_and_set_bit(unsigned long nr, unsigned short bit = nr & SZLONG_MASK; unsigned long res; - smp_llsc_mb(); + smp_mb__before_llsc(); if (kernel_uses_llsc && R10000_LLSC_WAR) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); @@ -395,7 +395,7 @@ static inline int test_and_clear_bit(unsigned long nr, unsigned short bit = nr & SZLONG_MASK; unsigned long res; - smp_llsc_mb(); + smp_mb__before_llsc(); if (kernel_uses_llsc && R10000_LLSC_WAR) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); @@ -485,7 +485,7 @@ static inline int test_and_change_bit(unsigned long nr, unsigned short bit = nr & SZLONG_MASK; unsigned long res; - smp_llsc_mb(); + smp_mb__before_llsc(); if (kernel_uses_llsc && R10000_LLSC_WAR) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); diff --git a/arch/mips/include/asm/cmpxchg.h b/arch/mips/include/asm/cmpxchg.h index 815a438..ed9aaaa 100644 --- a/arch/mips/include/asm/cmpxchg.h +++ b/arch/mips/include/asm/cmpxchg.h @@ -72,14 +72,14 @@ */ extern void __cmpxchg_called_with_bad_pointer(void); -#define __cmpxchg(ptr, old, new, barrier) \ +#define __cmpxchg(ptr, old, new, pre_barrier, post_barrier) \ ({ \ __typeof__(ptr) __ptr = (ptr); \ __typeof__(*(ptr)) __old = (old); \ __typeof__(*(ptr)) __new = (new); \ __typeof__(*(ptr)) __res = 0; \ \ - barrier; \ + pre_barrier; \ \ switch (sizeof(*(__ptr))) { \ case 4: \ @@ -96,13 +96,13 @@ extern void __cmpxchg_called_with_bad_pointer(void); break; \ } \ \ - barrier; \ + post_barrier; \ \ __res; \ }) -#define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_llsc_mb()) -#define cmpxchg_local(ptr, old, new) __cmpxchg(ptr, old, new, ) +#define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_mb__before_llsc(), smp_llsc_mb()) +#define cmpxchg_local(ptr, old, new) __cmpxchg(ptr, old, new, , ) #define cmpxchg64(ptr, o, n) \ ({ \ diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h index 21ef9ef..5f16696 100644 --- a/arch/mips/include/asm/spinlock.h +++ b/arch/mips/include/asm/spinlock.h @@ -138,7 +138,7 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock) { int tmp; - smp_llsc_mb(); + smp_mb__before_llsc(); if (R10000_LLSC_WAR) { __asm__ __volatile__ ( @@ -305,7 +305,7 @@ static inline void arch_read_unlock(arch_rwlock_t *rw) { unsigned int tmp; - smp_llsc_mb(); + smp_mb__before_llsc(); if (R10000_LLSC_WAR) { __asm__ __volatile__( diff --git a/arch/mips/include/asm/system.h b/arch/mips/include/asm/system.h index 83b5509..bb937cc 100644 --- a/arch/mips/include/asm/system.h +++ b/arch/mips/include/asm/system.h @@ -95,6 +95,8 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) { __u32 retval; + smp_mb__before_llsc(); + if (kernel_uses_llsc && R10000_LLSC_WAR) { unsigned long dummy; @@ -147,6 +149,8 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val) { __u64 retval; + smp_mb__before_llsc(); + if (kernel_uses_llsc && R10000_LLSC_WAR) { unsigned long dummy; -- 1.6.0.6 From dedekind1@gmail.com Sun Jan 10 10:11:29 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 10 Jan 2010 10:11:33 +0100 (CET) Received: from mail-fx0-f211.google.com ([209.85.220.211]:34216 "EHLO mail-fx0-f211.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490960Ab0AJJL3 (ORCPT ); Sun, 10 Jan 2010 10:11:29 +0100 Received: by fxm3 with SMTP id 3so10512912fxm.24 for ; Sun, 10 Jan 2010 01:11:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:subject:from:reply-to:to:cc :in-reply-to:references:content-type:date:message-id:mime-version :x-mailer:content-transfer-encoding; bh=ZZicUQyWLfCzVN/FEFiEydjV6gLDiCFlcP6/gk2vSjc=; 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(a91-152-69-107.elisa-laajakaista.fi [91.152.69.107]) by mx.google.com with ESMTPS id 15sm9046197fxm.2.2010.01.10.01.11.22 (version=SSLv3 cipher=RC4-MD5); Sun, 10 Jan 2010 01:11:22 -0800 (PST) Subject: Re: [PATCH 4/4] MTD: include ar7part in the list of partitions parsers From: Artem Bityutskiy Reply-To: dedekind1@gmail.com To: Florian Fainelli Cc: linux-mips@linux-mips.org, linux-mtd@lists.infradead.org, David Woodhouse , ralf@linux-mips.org In-Reply-To: <201001032117.37459.florian@openwrt.org> References: <201001032117.37459.florian@openwrt.org> Content-Type: text/plain; charset="UTF-8" Date: Sun, 10 Jan 2010 11:11:21 +0200 Message-Id: <1263114681.7315.136.camel@localhost.localdomain> Mime-Version: 1.0 X-Mailer: Evolution 2.26.3 (2.26.3-1.fc11) Content-Transfer-Encoding: 8bit X-archive-position: 25552 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dedekind1@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6452 Content-Length: 449 Lines: 14 On Sun, 2010-01-03 at 21:17 +0100, Florian Fainelli wrote: > This patch modifies the physmap-flash driver to include > the ar7part partition parser in the list of parsers to > use when a physmap-flash driver is registered. This is > required for AR7 to create partitions correctly. > > Signed-off-by: Florian Fainelli Taken this to my l2-mtd-2.6/dunno tree. -- Best Regards, Artem Bityutskiy (Ðртём Битюцкий) From dedekind1@gmail.com Sun Jan 10 10:13:41 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 10 Jan 2010 10:13:45 +0100 (CET) Received: from mail-fx0-f211.google.com ([209.85.220.211]:49800 "EHLO mail-fx0-f211.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490960Ab0AJJNl (ORCPT ); Sun, 10 Jan 2010 10:13:41 +0100 Received: by fxm3 with SMTP id 3so10513471fxm.24 for ; Sun, 10 Jan 2010 01:13:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:subject:from:reply-to:to:cc :in-reply-to:references:content-type:date:message-id:mime-version :x-mailer:content-transfer-encoding; bh=gSIDD2UwK/s2Ohzf7D4aI/Vd4VyjdH9TRFQ14eUZmK8=; b=Uti590pAvA5NHbxLJdKMUaOmCX8ZTutvXBklUFpuao0c8eWFhqpFKEuet70dw5VrM3 GwJDUSleED8Hf0GRKjVQNnvesPIYVi2KdsFWx0uilBb6nXEmnIhCyzP96acu+lh/ssJU ndjF1nvgctksonyuVZ7DMBz7B/RyjY2+g+g78= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=subject:from:reply-to:to:cc:in-reply-to:references:content-type :date:message-id:mime-version:x-mailer:content-transfer-encoding; b=R8fAYG/t/seKEhkBFjU415KtNSqNm0hcJSjNDlNVs6NbZmnk6FC7E531j8H1pR6CON eNrPVQrk2F/i1wd5qyaGH+8nkhO2Shd6d/9hXOxINyp8PmtyELblYIU3Q0sgMwmXxk/1 2HegeJwNxqmSaL/F0HSRJzGBAhOgmqXrLjG1M= Received: by 10.223.5.90 with SMTP id 26mr7821286fau.59.1263114816011; Sun, 10 Jan 2010 01:13:36 -0800 (PST) Received: from ?192.168.255.16? (a91-152-69-107.elisa-laajakaista.fi [91.152.69.107]) by mx.google.com with ESMTPS id 14sm9058245fxm.3.2010.01.10.01.13.34 (version=SSLv3 cipher=RC4-MD5); Sun, 10 Jan 2010 01:13:35 -0800 (PST) Subject: Re: [PATCH 4/4] MTD: include ar7part in the list of partitions parsers From: Artem Bityutskiy Reply-To: dedekind1@gmail.com To: Florian Fainelli Cc: linux-mips@linux-mips.org, linux-mtd@lists.infradead.org, David Woodhouse , ralf@linux-mips.org In-Reply-To: <1263114681.7315.136.camel@localhost.localdomain> References: <201001032117.37459.florian@openwrt.org> <1263114681.7315.136.camel@localhost.localdomain> Content-Type: text/plain; charset="UTF-8" Date: Sun, 10 Jan 2010 11:13:33 +0200 Message-Id: <1263114813.7315.137.camel@localhost.localdomain> Mime-Version: 1.0 X-Mailer: Evolution 2.26.3 (2.26.3-1.fc11) Content-Transfer-Encoding: 8bit X-archive-position: 25553 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dedekind1@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6454 Content-Length: 575 Lines: 17 On Sun, 2010-01-10 at 11:11 +0200, Artem Bityutskiy wrote: > On Sun, 2010-01-03 at 21:17 +0100, Florian Fainelli wrote: > > This patch modifies the physmap-flash driver to include > > the ar7part partition parser in the list of parsers to > > use when a physmap-flash driver is registered. This is > > required for AR7 to create partitions correctly. > > > > Signed-off-by: Florian Fainelli > > Taken this to my l2-mtd-2.6/dunno tree. And removed after looking at the discussion :-) -- Best Regards, Artem Bityutskiy (Ðртём Битюцкий) From ralf@linux-mips.org Sun Jan 10 14:39:06 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 10 Jan 2010 14:39:09 +0100 (CET) Received: from localhost.localdomain ([127.0.0.1]:38318 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1492938Ab0AJNjG (ORCPT ); Sun, 10 Jan 2010 14:39:06 +0100 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o0ADctPJ002356; Sun, 10 Jan 2010 14:38:55 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o0ADcrN5002355; Sun, 10 Jan 2010 14:38:53 +0100 Date: Sun, 10 Jan 2010 14:38:52 +0100 From: Ralf Baechle To: "Robert P. J. Day" Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] MIPS: Simplify param.h by using Message-ID: <20100110133852.GA2019@linux-mips.org> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.20 (2009-08-17) X-archive-position: 25554 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6509 Content-Length: 102 Lines: 5 On Thu, Dec 31, 2009 at 03:39:00PM -0500, Robert P. J. Day wrote: Thanks, queued for 2.6.34. Ralf From miloody@gmail.com Sun Jan 10 17:09:29 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 10 Jan 2010 17:09:33 +0100 (CET) Received: from mail-pw0-f45.google.com ([209.85.160.45]:60905 "EHLO mail-pw0-f45.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492513Ab0AJQJ3 convert rfc822-to-8bit (ORCPT ); Sun, 10 Jan 2010 17:09:29 +0100 Received: by pwj1 with SMTP id 1so969168pwj.24 for ; Sun, 10 Jan 2010 08:09:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:in-reply-to:references :date:message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=n8tJ2xkrAaZpKgInTecKh5NCNTv3sNZcnBd+Ef6nrDU=; b=UOntVQyaO1uqhj2Z5F3pMmohOEIgVOroxb9pbuvtNo2XN242tqLEbMCfA9Rc/SwWCB QkMhrinpWuNk0+BNBnYo/QDwViuY0JVptQYO5otlm9ZEf+m0CqoTCMiqfAmx5oD2IwjJ PoLDDVcKRngXlPxWe8UeoC8AQOTnzx/3eUB+Y= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=hXSER/xcJc61mfDZ60z2b8qRwG+51AgAQD+Vtjp4+lXff6u/loN7ypMo7swkA6DV6h 35n3FTOtFiK/B4QZOxw5JWqx53MBsWriHd3fx5I6q8U65qZTR7PYpwuE8nRoZ1/RU3IM z5oUzFNaZPLgLtRFeSeZ+TEZAMRaYvGj8gqxE= MIME-Version: 1.0 Received: by 10.143.26.36 with SMTP id d36mr4799686wfj.280.1263139762879; Sun, 10 Jan 2010 08:09:22 -0800 (PST) In-Reply-To: References: <3a665c761001052313v36bfeb89v37ada6b76e91c271@mail.gmail.com> Date: Mon, 11 Jan 2010 00:09:22 +0800 Message-ID: <3a665c761001100809g1400db9er5cc3a6228467934a@mail.gmail.com> Subject: Re: some question about Extended Asm From: loody To: "Maciej W. Rozycki" Cc: Linux MIPS Mailing List Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT X-archive-position: 25555 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: miloody@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6566 Content-Length: 1574 Lines: 49 Hi: Thanks for your help. 2010/1/6 Maciej W. Rozycki : > On Wed, 6 Jan 2010, loody wrote: > >> I try to >>   "or %0, count\n", where count is $a1. >> so I write %1 as count and write >>   "or %0, %1\n" and assign %1 as count in input section. >> >> But the result is not what I expect. >> the result is "   or      v1,v1,v0" >> Did I miss something or the only way to meet what I need is directly write >>  "or %0, $a1\n"? > >  As you can figure out from the semantics: > >        or      v1, v0 > > is a shorthand for: > >        or      v1, v1, v0 >There is no two-argument register OR instruction in the standard MIPS >instruction set (nor there is a need for one). I have some question about extended assembly in mips 1. is mips assembly in AT&T syntax? from the document I google from the web, they emphasize that the GNU C compiler use AT&T syntax, and they list some example about intel instructions. But when I write the extended assembly in mips, I find it seem not AT&T syntax. The order of input and output is still the same as original mips instructions. Does that mean GNU compiler for mips doesn't use AT&T syntax? 2. how do we know which parameter is for %0,%1,etc? suppose my src is as below asm( "add %0, %1, %2\n" "sub %0,%2, %1\n" :"=r" (count) :"r" (temp), "r" (count) ); how do I know which parameter is %0, %1 and %2? there 2 variable, count and temp above, but in assembly it use 3 parameters. how to match them? appreciate your kind help, miloody From macro@linux-mips.org Sun Jan 10 18:14:48 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 10 Jan 2010 18:14:52 +0100 (CET) Received: from localhost.localdomain ([127.0.0.1]:55359 "EHLO localhost.localdomain" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492955Ab0AJROs (ORCPT ); Sun, 10 Jan 2010 18:14:48 +0100 Date: Sun, 10 Jan 2010 17:14:48 +0000 (GMT) From: "Maciej W. Rozycki" To: loody cc: Linux MIPS Mailing List Subject: Re: some question about Extended Asm In-Reply-To: <3a665c761001100809g1400db9er5cc3a6228467934a@mail.gmail.com> Message-ID: References: <3a665c761001052313v36bfeb89v37ada6b76e91c271@mail.gmail.com> <3a665c761001100809g1400db9er5cc3a6228467934a@mail.gmail.com> User-Agent: Alpine 2.00 (LFD 1167 2008-08-23) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-archive-position: 25556 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6584 Content-Length: 1472 Lines: 38 On Mon, 11 Jan 2010, loody wrote: > I have some question about extended assembly in mips > 1. is mips assembly in AT&T syntax? > from the document I google from the web, they emphasize that the > GNU C compiler use AT&T syntax, and they list some example about intel > instructions. I'm not sure if the "AT&T syntax" term has any meaning except for Intel architecture processors. > But when I write the extended assembly in mips, I find it seem not AT&T syntax. > The order of input and output is still the same as original mips instructions. > Does that mean GNU compiler for mips doesn't use AT&T syntax? GNU as for MIPS processors uses the same syntax original tools provided by MIPS Computer Systems and Silicon Graphics companies used. This syntax is used throughout all the documentation available and has nothing to do with the syntax used for Intel architecture processors (in particular, the specific instruction and not the data flow direction determines the order of operands). > 2. how do we know which parameter is for %0,%1,etc? > > suppose my src is as below > asm( > "add %0, %1, %2\n" > "sub %0,%2, %1\n" > :"=r" (count) > :"r" (temp), "r" (count) > ); > how do I know which parameter is %0, %1 and %2? > there 2 variable, count and temp above, but in assembly it use 3 parameters. > how to match them? See the Extended Asm chapter of the GCC manual. Maciej From geert@linux-m68k.org Sun Jan 10 18:17:42 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 10 Jan 2010 18:17:46 +0100 (CET) Received: from mail-ew0-f209.google.com ([209.85.219.209]:35007 "EHLO mail-ew0-f209.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492959Ab0AJRRm convert rfc822-to-8bit (ORCPT ); Sun, 10 Jan 2010 18:17:42 +0100 Received: by ewy1 with SMTP id 1so2303623ewy.28 for ; Sun, 10 Jan 2010 09:17:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:sender:received:in-reply-to :references:date:x-google-sender-auth:message-id:subject:from:to:cc :content-type:content-transfer-encoding; bh=7sVBBMv9Pg2LoNYLESgn8SRgmPIog48xF1CjS7e3lrg=; b=TXNMp4nJCMvWzKR0KpNDMjy3tO2uriOuhZT0HrlRg2P8OzCvTotvCOKFf8gP07C8gC muDmk5lqxDmLYNElkW5lzROLYtPuKNB5JaFFgnj0GIZSfYtDvwpBHmTF1aB4K59jEBbA jMrx5hWjMbZHKP7zf1ukyqZsjEf0fA2L3fN6A= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type :content-transfer-encoding; b=cz7EOMMdo2XVBvgc6WL1uAQa9ABroo0Ar76vWERtMZp6BLH4lvwByhYJmp7Ah/UJsr Zlw04vg1G6fOaXSuRmW6aW/PTKfLqQKpKZ2lWfKqZzmwyLLZ2tP7K7HS8a8Qpf/0AI0g 6EPNEL9lXmHUoEPxnBntUGAYN6kghgzvVfU9w= MIME-Version: 1.0 Received: by 10.216.86.148 with SMTP id w20mr5926744wee.138.1263143855293; Sun, 10 Jan 2010 09:17:35 -0800 (PST) In-Reply-To: References: <3a665c761001052313v36bfeb89v37ada6b76e91c271@mail.gmail.com> <3a665c761001100809g1400db9er5cc3a6228467934a@mail.gmail.com> Date: Sun, 10 Jan 2010 18:17:35 +0100 X-Google-Sender-Auth: 15b7842c961b72bd Message-ID: <10f740e81001100917j825b672xcf1a786f21f88c26@mail.gmail.com> Subject: Re: some question about Extended Asm From: Geert Uytterhoeven To: "Maciej W. Rozycki" Cc: loody , Linux MIPS Mailing List Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-archive-position: 25557 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: geert@linux-m68k.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6586 Content-Length: 815 Lines: 24 On Sun, Jan 10, 2010 at 18:14, Maciej W. Rozycki wrote: > On Mon, 11 Jan 2010, loody wrote: > >> I have some question about extended assembly in mips >> 1. is mips assembly in AT&T syntax? >>     from the document I google from the web, they emphasize that the >> GNU C compiler use AT&T syntax, and they list some example about intel >> instructions. > >  I'm not sure if the "AT&T syntax" term has any meaning except for Intel > architecture processors. It also affects m68k, IIRC. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds From ralf@linux-mips.org Mon Jan 11 11:03:24 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 11 Jan 2010 11:03:28 +0100 (CET) Received: from localhost.localdomain ([127.0.0.1]:43217 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491817Ab0AKKDY (ORCPT ); Mon, 11 Jan 2010 11:03:24 +0100 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o0BA3DqZ014135; Mon, 11 Jan 2010 11:03:14 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o0BA3DKD014133; Mon, 11 Jan 2010 11:03:13 +0100 Date: Mon, 11 Jan 2010 11:03:12 +0100 From: Ralf Baechle To: Yoichi Yuasa Cc: linux-mips Subject: Re: [PATCH] MIPS: ar7 remove unused prom_getchar() Message-ID: <20100111100312.GA13886@linux-mips.org> References: <20100103141304.2f7b653f.yuasa@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20100103141304.2f7b653f.yuasa@linux-mips.org> User-Agent: Mutt/1.5.20 (2009-08-17) X-archive-position: 25558 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6948 Content-Length: 88 Lines: 5 On Sun, Jan 03, 2010 at 02:13:04PM +0900, Yoichi Yuasa wrote: Thanks, applied! Ralf From ralf@linux-mips.org Mon Jan 11 11:08:14 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 11 Jan 2010 11:08:18 +0100 (CET) Received: from localhost.localdomain ([127.0.0.1]:44739 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491107Ab0AKKIO (ORCPT ); Mon, 11 Jan 2010 11:08:14 +0100 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o0BA87ro014364; Mon, 11 Jan 2010 11:08:07 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o0BA878Y014362; Mon, 11 Jan 2010 11:08:07 +0100 Date: Mon, 11 Jan 2010 11:08:07 +0100 From: Ralf Baechle To: Yoichi Yuasa Cc: linux-mips Subject: Re: [PATCH] MIPS: bcm63xx fix copy CONFIG_CMDLINE twice Message-ID: <20100111100807.GB13886@linux-mips.org> References: <20100103143911.dafb7e06.yuasa@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20100103143911.dafb7e06.yuasa@linux-mips.org> User-Agent: Mutt/1.5.20 (2009-08-17) X-archive-position: 25559 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6950 Content-Length: 88 Lines: 5 On Sun, Jan 03, 2010 at 02:39:11PM +0900, Yoichi Yuasa wrote: Thanks, applied! Ralf From ralf@linux-mips.org Mon Jan 11 11:10:17 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 11 Jan 2010 11:10:21 +0100 (CET) Received: from localhost.localdomain ([127.0.0.1]:42769 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491107Ab0AKKKR (ORCPT ); Mon, 11 Jan 2010 11:10:17 +0100 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o0BAAAfC014497; Mon, 11 Jan 2010 11:10:10 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o0BAAAHF014495; Mon, 11 Jan 2010 11:10:10 +0100 Date: Mon, 11 Jan 2010 11:10:10 +0100 From: Ralf Baechle To: Yoichi Yuasa Cc: linux-mips Subject: Re: [PATCH] MIPS: remove unnecessary "Linux started" Message-ID: <20100111101010.GC13886@linux-mips.org> References: <20100103144734.b0e10cf2.yuasa@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20100103144734.b0e10cf2.yuasa@linux-mips.org> User-Agent: Mutt/1.5.20 (2009-08-17) X-archive-position: 25560 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6951 Content-Length: 96 Lines: 5 On Sun, Jan 03, 2010 at 02:47:34PM +0900, Yoichi Yuasa wrote: Thanks, applied as well! Ralf From ralf@linux-mips.org Mon Jan 11 11:16:02 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 11 Jan 2010 11:16:06 +0100 (CET) Received: from localhost.localdomain ([127.0.0.1]:34910 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1492063Ab0AKKQC (ORCPT ); Mon, 11 Jan 2010 11:16:02 +0100 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o0BAFlu5014692; Mon, 11 Jan 2010 11:15:47 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o0BAFh7A014690; Mon, 11 Jan 2010 11:15:43 +0100 Date: Mon, 11 Jan 2010 11:15:43 +0100 From: Ralf Baechle To: KOSAKI Motohiro Cc: Hugh Dickins , linux-mips@linux-mips.org, Carsten Otte , Peter Zijlstra , KAMEZAWA Hiroyuki , Nick Piggin , Ingo Molnar , LKML , Thomas Gleixner , Darren Hart , Ulrich Drepper Subject: Re: [PATCH] mips,mm: Reinstate move_pte optimization Message-ID: <20100111101543.GD13886@linux-mips.org> References: <20091225083305.AA78.A69D9226@jp.fujitsu.com> <20100107151527.8784.A69D9226@jp.fujitsu.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20100107151527.8784.A69D9226@jp.fujitsu.com> User-Agent: Mutt/1.5.20 (2009-08-17) X-archive-position: 25561 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6954 Content-Length: 895 Lines: 30 On Thu, Jan 07, 2010 at 03:32:57PM +0900, KOSAKI Motohiro wrote: > > to include/linux/mm.h - I'd prefer to keep it private if we can. > > But for completeness, this would involve resurrecting the 2.6.19 > > MIPS move_pte(), which makes sure mremap() move doesn't interfere > > with our assumptions. Something like > > > > #define __HAVE_ARCH_MOVE_PTE > > pte_t move_pte(pte_t pte, pgprot_t prot, unsigned long old_addr, > > unsigned long new_addr) > > { > > if (pte_present(pte) && is_zero_pfn(pte_pfn(pte))) > > pte = mk_pte(ZERO_PAGE(new_addr), prot); > > return pte; > > } > > > > in arch/mips/include/asm/pgtable.h. > > I agree with resurrecting mips move_pte. At least your patch > passed my cross compile test :) > > Ralf, can you please review following patch? Looks good. Acked-by: Ralf Baechle Thanks, Ralf From ralf@linux-mips.org Mon Jan 11 11:20:32 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 11 Jan 2010 11:20:36 +0100 (CET) Received: from localhost.localdomain ([127.0.0.1]:34544 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1492060Ab0AKKUc (ORCPT ); Mon, 11 Jan 2010 11:20:32 +0100 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o0BAKOxG014899; Mon, 11 Jan 2010 11:20:24 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o0BAKNs5014897; Mon, 11 Jan 2010 11:20:23 +0100 Date: Mon, 11 Jan 2010 11:20:23 +0100 From: Ralf Baechle To: David Daney Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] MIPS: Octeon: Use non-overflowing arithmetic in sched_clock Message-ID: <20100111102023.GE13886@linux-mips.org> References: <1262990856-8300-1-git-send-email-ddaney@caviumnetworks.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1262990856-8300-1-git-send-email-ddaney@caviumnetworks.com> User-Agent: Mutt/1.5.20 (2009-08-17) X-archive-position: 25562 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6955 Content-Length: 369 Lines: 10 On Fri, Jan 08, 2010 at 02:47:36PM -0800, David Daney wrote: > With typical mult and shift values, the calculation for Octeon's > sched_clock overflows when using 64-bit arithmetic. Use 128-bit > calculations instead. Applied though my first thought whenever I see extended precission math is gross - maybe we're going to find a better solution. Hopefully! Ralf From ralf@linux-mips.org Mon Jan 11 11:42:28 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 11 Jan 2010 11:42:31 +0100 (CET) Received: from localhost.localdomain ([127.0.0.1]:35117 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1491107Ab0AKKm2 (ORCPT ); Mon, 11 Jan 2010 11:42:28 +0100 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o0BAgJh0015727; Mon, 11 Jan 2010 11:42:19 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o0BAgFNh015725; Mon, 11 Jan 2010 11:42:15 +0100 Date: Mon, 11 Jan 2010 11:42:15 +0100 From: Ralf Baechle To: Anton Blanchard Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, Rusty Russell , Andrew Morton Subject: Re: [patch 4/6] mips: cpumask_of_node() should handle -1 as a node Message-ID: <20100111104215.GF13886@linux-mips.org> References: <20100106045509.245662398@samba.org> <20100106045525.207405499@samba.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20100106045525.207405499@samba.org> User-Agent: Mutt/1.5.20 (2009-08-17) X-archive-position: 25563 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6966 Content-Length: 166 Lines: 7 On Wed, Jan 06, 2010 at 03:55:13PM +1100, Anton Blanchard wrote: > Subject: [patch 4/6] mips: cpumask_of_node() should handle -1 as a node Thanks, applied! Ralf From ralf@linux-mips.org Mon Jan 11 15:44:31 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 11 Jan 2010 15:44:35 +0100 (CET) Received: from localhost.localdomain ([127.0.0.1]:35689 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1492220Ab0AKOob (ORCPT ); Mon, 11 Jan 2010 15:44:31 +0100 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o0BEiJoF007537; Mon, 11 Jan 2010 15:44:20 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o0BEiHlA007535; Mon, 11 Jan 2010 15:44:17 +0100 Date: Mon, 11 Jan 2010 15:44:16 +0100 From: Ralf Baechle To: David Daney Cc: "Bozic, Rade (EXT-Other - DE/Ulm)" , linux-mips , linux-i2c@vger.kernel.org, "Ben Dooks (embedded platforms)" , "Jean Delvare (PC drivers, core)" Subject: Re: [PATCH 0/3] Add I2C support for Octeon SOCs. Message-ID: <20100111144416.GA23157@linux-mips.org> References: <4B463B1F.6000404@caviumnetworks.com> <4B463C71.3080005@caviumnetworks.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4B463C71.3080005@caviumnetworks.com> User-Agent: Mutt/1.5.20 (2009-08-17) X-archive-position: 25564 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7070 Content-Length: 744 Lines: 22 On Thu, Jan 07, 2010 at 11:56:33AM -0800, David Daney wrote: > David Daney wrote: > >This patch set adds I2C driver support for Cavium Networks' Octeon > >processor family. The Octeon is a multi-core MIPS64 based SOC. > > > >The first patch adds platform devices for the I2C devices. The second > >patch is the main driver. Finally the third patch registers some > >devices so we have something to control with the fancy new driver. > > > >I will reply with the three patches. > > > >David Daney (2): > > MIPS: Octeon: Add I2C platform driver. > > MIPS: Octeon: Register some devices on the I2C bus. > > > >Rade Bozic (1): > > I2C: Add driver for Cavium OCTEON I2C ports. Do you want to merge this series through the MIPS tree? Ralf From ddaney@caviumnetworks.com Mon Jan 11 18:16:19 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 11 Jan 2010 18:16:23 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:19667 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492659Ab0AKRQT (ORCPT ); Mon, 11 Jan 2010 18:16:19 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Mon, 11 Jan 2010 09:16:09 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 11 Jan 2010 09:16:05 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Mon, 11 Jan 2010 09:16:05 -0800 Message-ID: <4B4B5CD3.4040204@caviumnetworks.com> Date: Mon, 11 Jan 2010 09:16:03 -0800 From: David Daney User-Agent: Thunderbird 2.0.0.21 (X11/20090320) MIME-Version: 1.0 To: Ralf Baechle , linux-i2c@vger.kernel.org CC: "Bozic, Rade (EXT-Other - DE/Ulm)" , linux-mips , "Ben Dooks (embedded platforms)" , "Jean Delvare (PC drivers, core)" Subject: Re: [PATCH 0/3] Add I2C support for Octeon SOCs. References: <4B463B1F.6000404@caviumnetworks.com> <4B463C71.3080005@caviumnetworks.com> <20100111144416.GA23157@linux-mips.org> In-Reply-To: <20100111144416.GA23157@linux-mips.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 11 Jan 2010 17:16:05.0135 (UTC) FILETIME=[C1DE51F0:01CA92E1] X-archive-position: 25565 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7149 Content-Length: 946 Lines: 28 Ralf Baechle wrote: > On Thu, Jan 07, 2010 at 11:56:33AM -0800, David Daney wrote: > >> David Daney wrote: >>> This patch set adds I2C driver support for Cavium Networks' Octeon >>> processor family. The Octeon is a multi-core MIPS64 based SOC. >>> >>> The first patch adds platform devices for the I2C devices. The second >>> patch is the main driver. Finally the third patch registers some >>> devices so we have something to control with the fancy new driver. >>> >>> I will reply with the three patches. >>> >>> David Daney (2): >>> MIPS: Octeon: Add I2C platform driver. >>> MIPS: Octeon: Register some devices on the I2C bus. >>> >>> Rade Bozic (1): >>> I2C: Add driver for Cavium OCTEON I2C ports. > > Do you want to merge this series through the MIPS tree? > Two of the patches touch only arch/mips/cavium-octeon, so it might make sense. But the I2C maintainers may have other desires, so I would defer to them. David Daney From khali@linux-fr.org Mon Jan 11 18:23:32 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 11 Jan 2010 18:23:36 +0100 (CET) Received: from bamako.nerim.net ([62.4.17.28]:61089 "EHLO bamako.nerim.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492654Ab0AKRXc (ORCPT ); Mon, 11 Jan 2010 18:23:32 +0100 Received: from localhost (localhost [127.0.0.1]) by bamako.nerim.net (Postfix) with ESMTP id B91C239DE4A; Mon, 11 Jan 2010 18:23:29 +0100 (CET) X-Virus-Scanned: amavisd-new at nerim.net Received: from bamako.nerim.net ([127.0.0.1]) by localhost (bamako.nerim.net [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id GvoZROKFlmfw; Mon, 11 Jan 2010 18:23:28 +0100 (CET) Received: from hyperion.delvare (jdelvare.pck.nerim.net [62.212.121.182]) by bamako.nerim.net (Postfix) with ESMTP id 8245439DE57; Mon, 11 Jan 2010 18:23:28 +0100 (CET) Date: Mon, 11 Jan 2010 18:23:30 +0100 From: Jean Delvare To: David Daney Cc: Ralf Baechle , linux-i2c@vger.kernel.org, "Bozic, Rade (EXT-Other - DE/Ulm)" , linux-mips , "Ben Dooks (embedded platforms)" Subject: Re: [PATCH 0/3] Add I2C support for Octeon SOCs. Message-ID: <20100111182330.2644e34a@hyperion.delvare> In-Reply-To: <4B4B5CD3.4040204@caviumnetworks.com> References: <4B463B1F.6000404@caviumnetworks.com> <4B463C71.3080005@caviumnetworks.com> <20100111144416.GA23157@linux-mips.org> <4B4B5CD3.4040204@caviumnetworks.com> X-Mailer: Claws Mail 3.5.0 (GTK+ 2.14.4; i586-suse-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-archive-position: 25566 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: khali@linux-fr.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7153 Content-Length: 1201 Lines: 33 On Mon, 11 Jan 2010 09:16:03 -0800, David Daney wrote: > Ralf Baechle wrote: > > On Thu, Jan 07, 2010 at 11:56:33AM -0800, David Daney wrote: > > > >> David Daney wrote: > >>> This patch set adds I2C driver support for Cavium Networks' Octeon > >>> processor family. The Octeon is a multi-core MIPS64 based SOC. > >>> > >>> The first patch adds platform devices for the I2C devices. The second > >>> patch is the main driver. Finally the third patch registers some > >>> devices so we have something to control with the fancy new driver. > >>> > >>> I will reply with the three patches. > >>> > >>> David Daney (2): > >>> MIPS: Octeon: Add I2C platform driver. > >>> MIPS: Octeon: Register some devices on the I2C bus. > >>> > >>> Rade Bozic (1): > >>> I2C: Add driver for Cavium OCTEON I2C ports. > > > > Do you want to merge this series through the MIPS tree? > > Two of the patches touch only arch/mips/cavium-octeon, so it might make > sense. But the I2C maintainers may have other desires, so I would defer > to them. I won't take care of them, so I have no objection if the go through the MIPS tree. For a platform-specific driver I think it makes a lot of sense. -- Jean Delvare From ddaney@caviumnetworks.com Mon Jan 11 18:30:08 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 11 Jan 2010 18:30:12 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:1056 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492654Ab0AKRaI (ORCPT ); Mon, 11 Jan 2010 18:30:08 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,5,4,7535) id ; Mon, 11 Jan 2010 09:28:30 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 11 Jan 2010 09:28:23 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Mon, 11 Jan 2010 09:28:23 -0800 Message-ID: <4B4B5FB7.3050701@caviumnetworks.com> Date: Mon, 11 Jan 2010 09:28:23 -0800 From: David Daney User-Agent: Thunderbird 2.0.0.21 (X11/20090320) MIME-Version: 1.0 To: Ralf Baechle CC: linux-mips@linux-mips.org Subject: Re: [PATCH] MIPS: Octeon: Use non-overflowing arithmetic in sched_clock References: <1262990856-8300-1-git-send-email-ddaney@caviumnetworks.com> <20100111102023.GE13886@linux-mips.org> In-Reply-To: <20100111102023.GE13886@linux-mips.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 11 Jan 2010 17:28:23.0395 (UTC) FILETIME=[79E7DB30:01CA92E3] X-archive-position: 25567 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7156 Content-Length: 1134 Lines: 28 Ralf Baechle wrote: > On Fri, Jan 08, 2010 at 02:47:36PM -0800, David Daney wrote: > >> With typical mult and shift values, the calculation for Octeon's >> sched_clock overflows when using 64-bit arithmetic. Use 128-bit >> calculations instead. > > Applied though my first thought whenever I see extended precission math > is gross - maybe we're going to find a better solution. Hopefully! > > Ralf I did have some apprehension myself. However consider: * For an 800MHz core clock, clocksource_set_clock() generates a shift value of 31. This leads to overflow of 64-bit arithmetic approximately every 8 seconds. This specific case could be reduced to a 2 bit shift, resulting in time to overflow of more than 100 years. But one can imagine clock rates that would require large shifts. * We need to return a 64-bit clock value, this will overflow in about 500 years, Unless we are very careful with our arithmetic, we risk overflow in unacceptable short time periods. * This is octeon specific and the 128-bit operation is cheap. Probably cheaper than accounting for overflows in 64-bit arithmetic. David Daney From info@microxwin.com Mon Jan 11 19:29:42 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 11 Jan 2010 19:29:45 +0100 (CET) Received: from p3plsmtpa01-07.prod.phx3.secureserver.net ([72.167.82.87]:60142 "HELO p3plsmtpa01-07.prod.phx3.secureserver.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with SMTP id S1492730Ab0AKS3m (ORCPT ); Mon, 11 Jan 2010 19:29:42 +0100 Received: (qmail 16967 invoked from network); 11 Jan 2010 18:29:34 -0000 Received: from unknown (75.25.125.151) by p3plsmtpa01-07.prod.phx3.secureserver.net (72.167.82.87) with ESMTP; 11 Jan 2010 18:29:33 -0000 Message-ID: <4B4B6E0C.4030806@microxwin.com> Date: Mon, 11 Jan 2010 10:29:32 -0800 From: Vasant User-Agent: Mozilla/5.0 (Windows; U; Windows NT 5.1; en-US; rv:1.9.1.5) Gecko/20091204 Thunderbird/3.0 MIME-Version: 1.0 To: linux-mips@linux-mips.org Subject: MicroXwin 2.0 Release for MIPS Au12XX and x86 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-archive-position: 25568 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: info@microxwin.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7187 Content-Length: 603 Lines: 20 Hello Developers, We have a 2.0 Release of MicroXwin which includes several bug fixes and an updated XRender implementation. You can download demo for RMI's Au12xx, Au13xx at http://www.microxwin.com/db1200qtdemo.tar.gz. This demo includes: 1. MicroXwin 2.0 based X11 implementation. 2. BlackBox window manager and RXVT terminal. 3. QT-4.6.0 demo. 4. Aurora Browser. Demo has been tested on dbau1200 but kernel modules for other RMI platforms are provided. Also X86 demo for Ubuntu and Debian have been updated. For more information on MicroXwin please visithttp://www.microxwin.com. Regards Vasant From tiwai@suse.de Tue Jan 12 08:02:39 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 12 Jan 2010 08:02:44 +0100 (CET) Received: from cantor.suse.de ([195.135.220.2]:52688 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491985Ab0ALHCj (ORCPT ); Tue, 12 Jan 2010 08:02:39 +0100 Received: from relay2.suse.de (charybdis-ext.suse.de [195.135.221.2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.suse.de (Postfix) with ESMTP id 93F0695DE3; Tue, 12 Jan 2010 08:02:36 +0100 (CET) Date: Tue, 12 Jan 2010 08:02:36 +0100 Message-ID: From: Takashi Iwai To: Andreas Mohr Cc: alsa-devel@alsa-project.org, Ralf Baechle , Wu Zhangjin , Thomas Bogendoerfer , linux-mips@linux-mips.org, Benjamin Herrenschmidt , Kumar Gala , Becky Bruce Subject: Re: [PATCH 0/5] PCM mmap (temporary) fixes for non-coherent architectures In-Reply-To: <20100101193130.GA21510@rhlx01.hs-esslingen.de> References: <1259248388-20095-1-git-send-email-tiwai@suse.de> <20100101193130.GA21510@rhlx01.hs-esslingen.de> User-Agent: Wanderlust/2.15.6 (Almost Unreal) SEMI/1.14.6 (Maruoka) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.7 Emacs/23.1 (x86_64-suse-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-Type: text/plain; charset=US-ASCII X-archive-position: 25569 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiwai@suse.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7647 Content-Length: 751 Lines: 22 At Fri, 1 Jan 2010 20:31:30 +0100, Andreas Mohr wrote: > > Hi, > > I've tried this patch set (with the typo-corrected part 4) on my ASUS > WL-500gP v2 MIPSEL via a backport to 2.6.31.9, but all I get is a > small blip of the sound I wanted to play, and then the system is fubar > (I believe just the same thing as what happened without having this patch > applied). As I mentioned in the previous followup, if your device is a USB-audio, the patch doesn't help because it's for devices with buffers using dma_alloc_coherent(). For USB-audio, it uses vmalloc for an intermediate buffer. Maybe this should be changed to dma_*() stuff for such architectures. Nevertheless, I don't know whether the crash is related with the audio part... Takashi From florian@openwrt.org Tue Jan 12 10:15:57 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 12 Jan 2010 10:16:01 +0100 (CET) Received: from mail-ew0-f212.google.com ([209.85.219.212]:64263 "EHLO mail-ew0-f212.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492224Ab0ALJP5 (ORCPT ); Tue, 12 Jan 2010 10:15:57 +0100 Received: by ewy4 with SMTP id 4so451259ewy.27 for ; Tue, 12 Jan 2010 01:15:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:sender:from:organization:to :subject:date:user-agent:cc:references:in-reply-to:mime-version :content-type:content-transfer-encoding:message-id; bh=s0gN9Ruo+AXJFmtRdczg53MbmTxKFxBh6FKu9x069RU=; b=Jw2PIUj33P44QYHIglokYbIca3O4w37ddMYyCQjBucgi+pfBARp7mRaOsaAp8AFWbi 1FH44ewCITylYPFWOiTmO/0dl1zAsMzYL1wviEylht3I+IMDreyRFoLfmj7cL9fI0Nm4 trp1j0PXQsgPCMG1ElLG++Qq6+BAQx6ZaANi8= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:organization:to:subject:date:user-agent:cc:references :in-reply-to:mime-version:content-type:content-transfer-encoding :message-id; b=n380WpjlO85cI9FjuwqcWa+OhZnsgI24mU0ATbPWN6DHI0pWTQR/x0t4qrxDDZ4hhc poyQa8GrMFDQjazbe5dY+AFZdHLOFdiUw3t1mwmI2ytI30c7qoU/W4eJ9ttVh7iBYuud Qwg24sijVONYkMevkcg2CWltosV3YYGu44/xc= Received: by 10.213.96.65 with SMTP id g1mr1217939ebn.44.1263287751461; Tue, 12 Jan 2010 01:15:51 -0800 (PST) Received: from flexo.localnet (bobafett.staff.proxad.net [213.228.1.121]) by mx.google.com with ESMTPS id 16sm6650446ewy.2.2010.01.12.01.15.49 (version=SSLv3 cipher=RC4-MD5); Tue, 12 Jan 2010 01:15:49 -0800 (PST) From: Florian Fainelli Organization: OpenWrt To: linux-mips@linux-mips.org Subject: Re: [PATCH 2/4] ar7: implement clock API Date: Tue, 12 Jan 2010 10:15:27 +0100 User-Agent: KMail/1.12.2 (Linux/2.6.31-17-server; KDE/4.3.2; x86_64; ; ) Cc: Wim Van Sebroeck , ralf@linux-mips.org, netdev@vger.kernel.org, David Miller References: <201001032117.07022.florian@openwrt.org> In-Reply-To: <201001032117.07022.florian@openwrt.org> MIME-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201001121015.27867.florian@openwrt.org> X-archive-position: 25570 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7705 Content-Length: 13428 Lines: 449 Ralf, Please do not take this version, I added an unused member "id" in the clk structure. Thanks. On Sunday 03 January 2010 21:17:06 Florian Fainelli wrote: > This patch makes the ar7 clock code implement the > Linux clk API. Drivers using the various clocks > available in the SoC are updated accordingly. > > Signed-off-by: Florian Fainelli > --- > diff --git a/arch/mips/ar7/clock.c b/arch/mips/ar7/clock.c > index cc65c8e..fc0e715 100644 > --- a/arch/mips/ar7/clock.c > +++ b/arch/mips/ar7/clock.c > @@ -1,6 +1,7 @@ > /* > * Copyright (C) 2007 Felix Fietkau > * Copyright (C) 2007 Eugene Konev > + * Copyright (C) 2009 Florian Fainelli > * > * This program is free software; you can redistribute it and/or modify > * it under the terms of the GNU General Public License as published by > @@ -24,6 +25,8 @@ > #include > #include > #include > +#include > +#include > > #include > #include > @@ -94,12 +97,16 @@ struct tnetd7200_clocks { > struct tnetd7200_clock usb; > }; > > -int ar7_cpu_clock = 150000000; > -EXPORT_SYMBOL(ar7_cpu_clock); > -int ar7_bus_clock = 125000000; > -EXPORT_SYMBOL(ar7_bus_clock); > -int ar7_dsp_clock; > -EXPORT_SYMBOL(ar7_dsp_clock); > +static struct clk bus_clk = { > + .rate = 125000000, > +}; > + > +static struct clk cpu_clk = { > + .rate = 150000000, > +}; > + > +static struct clk dsp_clk; > +static struct clk vbus_clk; > > static void approximate(int base, int target, int *prediv, > int *postdiv, int *mul) > @@ -185,7 +192,7 @@ static int tnetd7300_get_clock(u32 shift, struct > tnetd7300_clock *clock, base_clock = AR7_XTAL_CLOCK; > break; > case BOOT_PLL_SOURCE_CPU: > - base_clock = ar7_cpu_clock; > + base_clock = cpu_clk.rate; > break; > } > > @@ -212,11 +219,11 @@ static void tnetd7300_set_clock(u32 shift, struct > tnetd7300_clock *clock, u32 *bootcr, u32 frequency) > { > int prediv, postdiv, mul; > - int base_clock = ar7_bus_clock; > + int base_clock = bus_clk.rate; > > switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) { > case BOOT_PLL_SOURCE_BUS: > - base_clock = ar7_bus_clock; > + base_clock = bus_clk.rate; > break; > case BOOT_PLL_SOURCE_REF: > base_clock = AR7_REF_CLOCK; > @@ -225,7 +232,7 @@ static void tnetd7300_set_clock(u32 shift, struct > tnetd7300_clock *clock, base_clock = AR7_XTAL_CLOCK; > break; > case BOOT_PLL_SOURCE_CPU: > - base_clock = ar7_cpu_clock; > + base_clock = cpu_clk.rate; > break; > } > > @@ -247,18 +254,18 @@ static void __init tnetd7300_init_clocks(void) > ioremap_nocache(UR8_REGS_CLOCKS, > sizeof(struct tnetd7300_clocks)); > > - ar7_bus_clock = tnetd7300_get_clock(BUS_PLL_SOURCE_SHIFT, > + bus_clk.rate = tnetd7300_get_clock(BUS_PLL_SOURCE_SHIFT, > &clocks->bus, bootcr, AR7_AFE_CLOCK); > > if (*bootcr & BOOT_PLL_ASYNC_MODE) > - ar7_cpu_clock = tnetd7300_get_clock(CPU_PLL_SOURCE_SHIFT, > + cpu_clk.rate = tnetd7300_get_clock(CPU_PLL_SOURCE_SHIFT, > &clocks->cpu, bootcr, AR7_AFE_CLOCK); > else > - ar7_cpu_clock = ar7_bus_clock; > + cpu_clk.rate = bus_clk.rate; > > - if (ar7_dsp_clock == 250000000) > + if (dsp_clk.rate == 250000000) > tnetd7300_set_clock(DSP_PLL_SOURCE_SHIFT, &clocks->dsp, > - bootcr, ar7_dsp_clock); > + bootcr, dsp_clk.rate); > > iounmap(clocks); > iounmap(bootcr); > @@ -343,20 +350,20 @@ static void __init tnetd7200_init_clocks(void) > printk(KERN_INFO "Clocks: Setting DSP clock\n"); > calculate(dsp_base, TNETD7200_DEF_DSP_CLK, > &dsp_prediv, &dsp_postdiv, &dsp_mul); > - ar7_bus_clock = > + bus_clk.rate = > ((dsp_base / dsp_prediv) * dsp_mul) / dsp_postdiv; > tnetd7200_set_clock(dsp_base, &clocks->dsp, > dsp_prediv, dsp_postdiv * 2, dsp_postdiv, dsp_mul * 2, > - ar7_bus_clock); > + bus_clk.rate); > > printk(KERN_INFO "Clocks: Setting CPU clock\n"); > calculate(cpu_base, TNETD7200_DEF_CPU_CLK, &cpu_prediv, > &cpu_postdiv, &cpu_mul); > - ar7_cpu_clock = > + cpu_clk.rate = > ((cpu_base / cpu_prediv) * cpu_mul) / cpu_postdiv; > tnetd7200_set_clock(cpu_base, &clocks->cpu, > cpu_prediv, cpu_postdiv, -1, cpu_mul, > - ar7_cpu_clock); > + cpu_clk.rate); > > } else > if (*bootcr & BOOT_PLL_2TO1_MODE) { > @@ -365,48 +372,90 @@ static void __init tnetd7200_init_clocks(void) > printk(KERN_INFO "Clocks: Setting CPU clock\n"); > calculate(cpu_base, TNETD7200_DEF_CPU_CLK, &cpu_prediv, > &cpu_postdiv, &cpu_mul); > - ar7_cpu_clock = ((cpu_base / cpu_prediv) * cpu_mul) > + cpu_clk.rate = ((cpu_base / cpu_prediv) * cpu_mul) > / cpu_postdiv; > tnetd7200_set_clock(cpu_base, &clocks->cpu, > cpu_prediv, cpu_postdiv, -1, cpu_mul, > - ar7_cpu_clock); > + cpu_clk.rate); > > printk(KERN_INFO "Clocks: Setting DSP clock\n"); > calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv, > &dsp_postdiv, &dsp_mul); > - ar7_bus_clock = ar7_cpu_clock / 2; > + bus_clk.rate = cpu_clk.rate / 2; > tnetd7200_set_clock(dsp_base, &clocks->dsp, > dsp_prediv, dsp_postdiv * 2, dsp_postdiv, > - dsp_mul * 2, ar7_bus_clock); > + dsp_mul * 2, bus_clk.rate); > } else { > printk(KERN_INFO "Clocks: Sync 1:1 mode\n"); > > printk(KERN_INFO "Clocks: Setting DSP clock\n"); > calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv, > &dsp_postdiv, &dsp_mul); > - ar7_bus_clock = ((dsp_base / dsp_prediv) * dsp_mul) > + bus_clk.rate = ((dsp_base / dsp_prediv) * dsp_mul) > / dsp_postdiv; > tnetd7200_set_clock(dsp_base, &clocks->dsp, > dsp_prediv, dsp_postdiv * 2, dsp_postdiv, > - dsp_mul * 2, ar7_bus_clock); > + dsp_mul * 2, bus_clk.rate); > > - ar7_cpu_clock = ar7_bus_clock; > + cpu_clk.rate = bus_clk.rate; > } > > printk(KERN_INFO "Clocks: Setting USB clock\n"); > - usb_base = ar7_bus_clock; > + usb_base = bus_clk.rate; > calculate(usb_base, TNETD7200_DEF_USB_CLK, &usb_prediv, > &usb_postdiv, &usb_mul); > tnetd7200_set_clock(usb_base, &clocks->usb, > usb_prediv, usb_postdiv, -1, usb_mul, > TNETD7200_DEF_USB_CLK); > > - ar7_dsp_clock = ar7_cpu_clock; > + dsp_clk.rate = cpu_clk.rate; > > iounmap(clocks); > iounmap(bootcr); > } > > +/* > + * Linux clock API > + */ > +int clk_enable(struct clk *clk) > +{ > + return 0; > +} > +EXPORT_SYMBOL(clk_enable); > + > +void clk_disable(struct clk *clk) > +{ > +} > +EXPORT_SYMBOL(clk_disable); > + > +unsigned long clk_get_rate(struct clk *clk) > +{ > + return clk->rate; > +} > +EXPORT_SYMBOL(clk_get_rate); > + > +struct clk *clk_get(struct device *dev, const char *id) > +{ > + if (!strcmp(id, "bus")) > + return &bus_clk; > + /* cpmac and vbus share the same rate */ > + if (!strcmp(id, "cpmac")) > + return &vbus_clk; > + if (!strcmp(id, "cpu")) > + return &cpu_clk; > + if (!strcmp(id, "dsp")); > + return &dsp_clk; > + if (!strcmp(id, "vbus")) > + return &vbus_clk; > + return ERR_PTR(-ENOENT); > +} > +EXPORT_SYMBOL(clk_get); > + > +void clk_put(struct clk *clk) > +{ > +} > +EXPORT_SYMBOL(clk_put); > + > int __init ar7_init_clocks(void) > { > switch (ar7_chip_id()) { > @@ -415,12 +464,14 @@ int __init ar7_init_clocks(void) > tnetd7200_init_clocks(); > break; > case AR7_CHIP_7300: > - ar7_dsp_clock = tnetd7300_dsp_clock(); > + dsp_clk.rate = tnetd7300_dsp_clock(); > tnetd7300_init_clocks(); > break; > default: > break; > } > + /* adjust vbus clock rate */ > + vbus_clk.rate = bus_clk.rate / 2; > > return 0; > } > diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c > index acbe147..c591f69 100644 > --- a/arch/mips/ar7/platform.c > +++ b/arch/mips/ar7/platform.c > @@ -35,6 +35,7 @@ > #include > #include > #include > +#include > > #include > #include > @@ -507,13 +508,18 @@ static int __init ar7_register_devices(void) > u32 *bootcr, val; > #ifdef CONFIG_SERIAL_8250 > static struct uart_port uart_port[2] __initdata; > + struct clk *bus_clk; > > memset(uart_port, 0, sizeof(struct uart_port) * 2); > > + bus_clk = clk_get(NULL, "bus"); > + if (IS_ERR(bus_clk)) > + panic("unable to get bus clk\n"); > + > uart_port[0].type = PORT_16550A; > uart_port[0].line = 0; > uart_port[0].irq = AR7_IRQ_UART0; > - uart_port[0].uartclk = ar7_bus_freq() / 2; > + uart_port[0].uartclk = clk_get_rate(bus_clk) / 2; > uart_port[0].iotype = UPIO_MEM32; > uart_port[0].mapbase = AR7_REGS_UART0; > uart_port[0].membase = ioremap(uart_port[0].mapbase, 256); > @@ -528,7 +534,7 @@ static int __init ar7_register_devices(void) > uart_port[1].type = PORT_16550A; > uart_port[1].line = 1; > uart_port[1].irq = AR7_IRQ_UART1; > - uart_port[1].uartclk = ar7_bus_freq() / 2; > + uart_port[1].uartclk = clk_get_rate(bus_clk) / 2; > uart_port[1].iotype = UPIO_MEM32; > uart_port[1].mapbase = UR8_REGS_UART1; > uart_port[1].membase = ioremap(uart_port[1].mapbase, 256); > diff --git a/arch/mips/ar7/time.c b/arch/mips/ar7/time.c > index a1fba89..5fb8a01 100644 > --- a/arch/mips/ar7/time.c > +++ b/arch/mips/ar7/time.c > @@ -20,11 +20,21 @@ > > #include > #include > +#include > +#include > > #include > #include > > void __init plat_time_init(void) > { > - mips_hpt_frequency = ar7_cpu_freq() / 2; > + struct clk *cpu_clk; > + > + cpu_clk = clk_get(NULL, "cpu"); > + if (IS_ERR(cpu_clk)) { > + printk(KERN_ERR "unable to get cpu clock\n"); > + return; > + } > + > + mips_hpt_frequency = clk_get_rate(cpu_clk) / 2; > } > diff --git a/arch/mips/include/asm/mach-ar7/ar7.h > b/arch/mips/include/asm/mach-ar7/ar7.h index 21cbbc7..2410360 100644 > --- a/arch/mips/include/asm/mach-ar7/ar7.h > +++ b/arch/mips/include/asm/mach-ar7/ar7.h > @@ -105,26 +105,10 @@ static inline u8 ar7_chip_rev(void) > return (readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x14)) >> 16) & 0xff; > } > > -static inline int ar7_cpu_freq(void) > -{ > - return ar7_cpu_clock; > -} > - > -static inline int ar7_bus_freq(void) > -{ > - return ar7_bus_clock; > -} > - > -static inline int ar7_vbus_freq(void) > -{ > - return ar7_bus_clock / 2; > -} > -#define ar7_cpmac_freq ar7_vbus_freq > - > -static inline int ar7_dsp_freq(void) > -{ > - return ar7_dsp_clock; > -} > +struct clk { > + unsigned int rate; > + int id; > +}; > > static inline int ar7_has_high_cpmac(void) > { > diff --git a/drivers/net/cpmac.c b/drivers/net/cpmac.c > index 8d0be26..bf2072e 100644 > --- a/drivers/net/cpmac.c > +++ b/drivers/net/cpmac.c > @@ -36,6 +36,7 @@ > #include > #include > #include > +#include > #include > #include > > @@ -294,9 +295,16 @@ static int cpmac_mdio_write(struct mii_bus *bus, int > phy_id, > > static int cpmac_mdio_reset(struct mii_bus *bus) > { > + struct clk *cpmac_clk; > + > + cpmac_clk = clk_get(&bus->dev, "cpmac"); > + if (IS_ERR(cpmac_clk)) { > + printk(KERN_ERR "unable to get cpmac clock\n"); > + return -1; > + } > ar7_device_reset(AR7_RESET_BIT_MDIO); > cpmac_write(bus->priv, CPMAC_MDIO_CONTROL, MDIOC_ENABLE | > - MDIOC_CLKDIV(ar7_cpmac_freq() / 2200000 - 1)); > + MDIOC_CLKDIV(clk_get_rate(cpmac_clk) / 2200000 - 1)); > return 0; > } > > diff --git a/drivers/watchdog/ar7_wdt.c b/drivers/watchdog/ar7_wdt.c > index 2e94b71..2bb95cd 100644 > --- a/drivers/watchdog/ar7_wdt.c > +++ b/drivers/watchdog/ar7_wdt.c > @@ -34,6 +34,7 @@ > #include > #include > #include > +#include > > #include > #include > @@ -80,6 +81,8 @@ static struct resource *ar7_regs_wdt; > /* Pointer to the remapped WDT IO space */ > static struct ar7_wdt *ar7_wdt; > > +static struct clk *vbus_clk; > + > static void ar7_wdt_kick(u32 value) > { > WRITE_REG(ar7_wdt->kick_lock, 0x5555); > @@ -138,17 +141,19 @@ static void ar7_wdt_disable(u32 value) > static void ar7_wdt_update_margin(int new_margin) > { > u32 change; > + u32 vbus_rate; > > - change = new_margin * (ar7_vbus_freq() / prescale_value); > + vbus_rate = clk_get_rate(vbus_clk); > + change = new_margin * (vbus_rate / prescale_value); > if (change < 1) > change = 1; > if (change > 0xffff) > change = 0xffff; > ar7_wdt_change(change); > - margin = change * prescale_value / ar7_vbus_freq(); > + margin = change * prescale_value / vbus_rate; > printk(KERN_INFO DRVNAME > ": timer margin %d seconds (prescale %d, change %d, freq %d)\n", > - margin, prescale_value, change, ar7_vbus_freq()); > + margin, prescale_value, change, vbus_rate); > } > > static void ar7_wdt_enable_wdt(void) > @@ -298,6 +303,13 @@ static int __devinit ar7_wdt_probe(struct > platform_device *pdev) goto out_mem_region; > } > > + vbus_clk = clk_get(NULL, "vbus"); > + if (IS_ERR(vbus_clk)) { > + printk(KERN_ERR DRVNAME ": could not get vbus clock\n"); > + rc = PTR_ERR(vbus_clk); > + goto out_mem_region; > + } > + > ar7_wdt_disable_wdt(); > ar7_wdt_prescale(prescale_value); > ar7_wdt_update_margin(margin); > -- Regards, Florian From ralf@linux-mips.org Tue Jan 12 11:20:23 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 12 Jan 2010 11:20:26 +0100 (CET) Received: from localhost.localdomain ([127.0.0.1]:44641 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1492298Ab0ALKUX (ORCPT ); Tue, 12 Jan 2010 11:20:23 +0100 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o0CAKKWi022453; Tue, 12 Jan 2010 11:20:21 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o0CAKJPk022451; Tue, 12 Jan 2010 11:20:19 +0100 Date: Tue, 12 Jan 2010 11:20:19 +0100 From: Ralf Baechle To: David Daney Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] MIPS: Remove unused macros from barrier.h Message-ID: <20100112102019.GA22088@linux-mips.org> References: <1262903610-21663-1-git-send-email-ddaney@caviumnetworks.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1262903610-21663-1-git-send-email-ddaney@caviumnetworks.com> User-Agent: Mutt/1.5.20 (2009-08-17) X-archive-position: 25571 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7725 Content-Length: 246 Lines: 9 On Thu, Jan 07, 2010 at 02:33:30PM -0800, David Daney wrote: > The smp_llsc_rmb() and smp_llsc_wmb() macros are not used in the tree, > remove them. Yes, I don't think these macros are going to be used anytime soon. Queued for 2.6.34. Ralf From ralf@linux-mips.org Tue Jan 12 12:36:26 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 12 Jan 2010 12:36:30 +0100 (CET) Received: from localhost.localdomain ([127.0.0.1]:39199 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1492502Ab0ALLg0 (ORCPT ); Tue, 12 Jan 2010 12:36:26 +0100 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o0CBaN9U002612; Tue, 12 Jan 2010 12:36:24 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o0CBaJFI002609; Tue, 12 Jan 2010 12:36:19 +0100 Date: Tue, 12 Jan 2010 12:36:19 +0100 From: Ralf Baechle To: Greg KH Cc: David Daney , Sergei Shtylyov , linux-mips@linux-mips.org, netdev@vger.kernel.org Subject: Re: [PATCH 1/7] MIPS: Octeon: Fix EIO handling. Message-ID: <20100112113619.GA26806@linux-mips.org> References: <4B463005.8060505@caviumnetworks.com> <1262891106-32146-1-git-send-email-ddaney@caviumnetworks.com> <4B4645EE.5050302@ru.mvista.com> <4B464977.2090801@caviumnetworks.com> <20100107215950.GA24672@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20100107215950.GA24672@suse.de> User-Agent: Mutt/1.5.20 (2009-08-17) X-archive-position: 25572 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7753 Content-Length: 1031 Lines: 28 On Thu, Jan 07, 2010 at 01:59:50PM -0800, Greg KH wrote: > >>> If an interrupt handler disables interrupts, the EOI function will > >>> just reenable them. This will put us in an endless loop when the > >>> upcoming Ethernet driver patches are applied. > >>> > >>> Only reenable the interrupt on EOI if it is not IRQ_DISABLED. This > >>> requires that the EIO function be separate from the ENABLE function. > >>> We also rename the ACK functions to correspond with their function. > >>> > >>> Signed-off-by: David Daney > >>> > >> > >> I guess the subject should read "EIO", not "EIO"... > >> > > > > Indeed. The compiler didn't catch that one. > > > > Perhaps Ralf can fix it if he merges it, otherwise I can resubmit with > > corrected spelling. > > I can change it when merging, don't worry about it. This is a driver specific to a specific MIPS platform so I think this series should be merged via the MIPS tree and assuming Greg is ok with that I have merged this into my tree. Ralf From gregkh@suse.de Tue Jan 12 14:57:51 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 12 Jan 2010 14:57:57 +0100 (CET) Received: from cantor2.suse.de ([195.135.220.15]:35048 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492790Ab0ALN5v (ORCPT ); Tue, 12 Jan 2010 14:57:51 +0100 Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.221.2]) by mx2.suse.de (Postfix) with ESMTP id 58B878655F; Tue, 12 Jan 2010 14:57:51 +0100 (CET) Date: Tue, 12 Jan 2010 05:43:13 -0800 From: Greg KH To: Ralf Baechle Cc: David Daney , Sergei Shtylyov , linux-mips@linux-mips.org, netdev@vger.kernel.org Subject: Re: [PATCH 1/7] MIPS: Octeon: Fix EIO handling. Message-ID: <20100112134313.GA25052@suse.de> References: <4B463005.8060505@caviumnetworks.com> <1262891106-32146-1-git-send-email-ddaney@caviumnetworks.com> <4B4645EE.5050302@ru.mvista.com> <4B464977.2090801@caviumnetworks.com> <20100107215950.GA24672@suse.de> <20100112113619.GA26806@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20100112113619.GA26806@linux-mips.org> User-Agent: Mutt/1.5.20 (2009-06-14) X-archive-position: 25573 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: gregkh@suse.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7795 Content-Length: 1200 Lines: 33 On Tue, Jan 12, 2010 at 12:36:19PM +0100, Ralf Baechle wrote: > On Thu, Jan 07, 2010 at 01:59:50PM -0800, Greg KH wrote: > > > >>> If an interrupt handler disables interrupts, the EOI function will > > >>> just reenable them. This will put us in an endless loop when the > > >>> upcoming Ethernet driver patches are applied. > > >>> > > >>> Only reenable the interrupt on EOI if it is not IRQ_DISABLED. This > > >>> requires that the EIO function be separate from the ENABLE function. > > >>> We also rename the ACK functions to correspond with their function. > > >>> > > >>> Signed-off-by: David Daney > > >>> > > >> > > >> I guess the subject should read "EIO", not "EIO"... > > >> > > > > > > Indeed. The compiler didn't catch that one. > > > > > > Perhaps Ralf can fix it if he merges it, otherwise I can resubmit with > > > corrected spelling. > > > > I can change it when merging, don't worry about it. > > This is a driver specific to a specific MIPS platform so I think this > series should be merged via the MIPS tree and assuming Greg is ok with that > I have merged this into my tree. No objection from me at all, merge away :) thanks, greg k-h From ralf@linux-mips.org Tue Jan 12 18:00:07 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 12 Jan 2010 18:00:11 +0100 (CET) Received: from localhost.localdomain ([127.0.0.1]:47043 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1493101Ab0ALRAH (ORCPT ); Tue, 12 Jan 2010 18:00:07 +0100 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o0CH06XY019012; Tue, 12 Jan 2010 18:00:06 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o0CH05Xc019010; Tue, 12 Jan 2010 18:00:05 +0100 Date: Tue, 12 Jan 2010 18:00:05 +0100 From: Ralf Baechle To: Yoichi Yuasa Cc: linux-mips Subject: Re: [PATCH 1/2] MIPS: vmlinux.ecoff directory move to arch/mips/boot Message-ID: <20100112170005.GA9949@linux-mips.org> References: <20091218211317.45e5da2e.yuasa@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20091218211317.45e5da2e.yuasa@linux-mips.org> User-Agent: Mutt/1.5.20 (2009-08-17) X-archive-position: 25574 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7889 Content-Length: 224 Lines: 9 On Fri, Dec 18, 2009 at 09:13:17PM +0900, Yoichi Yuasa wrote: > It moves to the same directory as vmlinux.bin and vmlinux.srec . > > Signed-off-by: Yoichi Yuasa Applied. Thanks Yoichi-San! Ralf From ralf@linux-mips.org Tue Jan 12 18:00:17 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 12 Jan 2010 18:00:37 +0100 (CET) Received: from localhost.localdomain ([127.0.0.1]:41410 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1493104Ab0ALRAR (ORCPT ); Tue, 12 Jan 2010 18:00:17 +0100 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o0CH0H4q019039; Tue, 12 Jan 2010 18:00:17 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o0CH0GEa019038; Tue, 12 Jan 2010 18:00:16 +0100 Date: Tue, 12 Jan 2010 18:00:16 +0100 From: Ralf Baechle To: Yoichi Yuasa Cc: linux-mips Subject: Re: [PATCH 2/2] Add vmlinux.* to arch/mips/boot/.gitignore Message-ID: <20100112170016.GB9949@linux-mips.org> References: <20091218211317.45e5da2e.yuasa@linux-mips.org> <20091218211419.b50a64e3.yuasa@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20091218211419.b50a64e3.yuasa@linux-mips.org> User-Agent: Mutt/1.5.20 (2009-08-17) X-archive-position: 25575 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7893 Content-Length: 100 Lines: 5 On Fri, Dec 18, 2009 at 09:14:19PM +0900, Yoichi Yuasa wrote: Applied. Thanks Yoichi-San! Ralf From nietzsche@lysator.liu.se Wed Jan 13 01:49:13 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 13 Jan 2010 01:49:18 +0100 (CET) Received: from mail.lysator.liu.se ([130.236.254.3]:40220 "EHLO mail.lysator.liu.se" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492203Ab0AMAtN (ORCPT ); Wed, 13 Jan 2010 01:49:13 +0100 Received: from mail.lysator.liu.se (localhost [127.0.0.1]) by mail.lysator.liu.se (Postfix) with ESMTP id 8C03740015; Wed, 13 Jan 2010 01:47:51 +0100 (CET) Received: by mail.lysator.liu.se (Postfix, from userid 1674) id 8121440018; Wed, 13 Jan 2010 01:47:51 +0100 (CET) Received: from [192.168.10.105] (c-9fb8e555.035-105-73746f38.cust.bredbandsbolaget.se [85.229.184.159]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by mail.lysator.liu.se (Postfix) with ESMTP id 3515540015; Wed, 13 Jan 2010 01:47:51 +0100 (CET) Cc: Ralf Baechle , linux-i2c@vger.kernel.org, "Bozic, Rade (EXT-Other - DE/Ulm)" , linux-mips , "Ben Dooks (embedded platforms)" , "Jean Delvare (PC drivers, core)" Message-Id: From: Markus Gothe To: David Daney In-Reply-To: <4B4B5CD3.4040204@caviumnetworks.com> Content-Type: text/plain; charset=US-ASCII; format=flowed; delsp=yes Content-Transfer-Encoding: 7bit Mime-Version: 1.0 (Apple Message framework v936) Subject: Re: [PATCH 0/3] Add I2C support for Octeon SOCs. Date: Wed, 13 Jan 2010 01:49:08 +0100 References: <4B463B1F.6000404@caviumnetworks.com> <4B463C71.3080005@caviumnetworks.com> <20100111144416.GA23157@linux-mips.org> <4B4B5CD3.4040204@caviumnetworks.com> X-Mailer: Apple Mail (2.936) X-Virus-Scanned: ClamAV using ClamSMTP X-archive-position: 25576 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: nietzsche@lysator.liu.se Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8147 Content-Length: 1061 Lines: 33 Methinks this goes to I2C... //Markus On 11 Jan 2010, at 18:16, David Daney wrote: > Ralf Baechle wrote: >> On Thu, Jan 07, 2010 at 11:56:33AM -0800, David Daney wrote: >>> David Daney wrote: >>>> This patch set adds I2C driver support for Cavium Networks' Octeon >>>> processor family. The Octeon is a multi-core MIPS64 based SOC. >>>> >>>> The first patch adds platform devices for the I2C devices. The >>>> second >>>> patch is the main driver. Finally the third patch registers some >>>> devices so we have something to control with the fancy new driver. >>>> >>>> I will reply with the three patches. >>>> >>>> David Daney (2): >>>> MIPS: Octeon: Add I2C platform driver. >>>> MIPS: Octeon: Register some devices on the I2C bus. >>>> >>>> Rade Bozic (1): >>>> I2C: Add driver for Cavium OCTEON I2C ports. >> Do you want to merge this series through the MIPS tree? > > Two of the patches touch only arch/mips/cavium-octeon, so it might > make sense. But the I2C maintainers may have other desires, so I > would defer to them. > > David Daney > From tiwai@suse.de Wed Jan 13 10:07:35 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 13 Jan 2010 10:07:41 +0100 (CET) Received: from cantor.suse.de ([195.135.220.2]:43192 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492010Ab0AMJHf (ORCPT ); Wed, 13 Jan 2010 10:07:35 +0100 Received: from relay2.suse.de (charybdis-ext.suse.de [195.135.221.2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.suse.de (Postfix) with ESMTP id ACC59457F0; Wed, 13 Jan 2010 10:07:34 +0100 (CET) Date: Wed, 13 Jan 2010 10:07:32 +0100 Message-ID: From: Takashi Iwai To: Andreas Mohr Cc: alsa-devel@alsa-project.org, Ralf Baechle , Wu Zhangjin , Thomas Bogendoerfer , linux-mips@linux-mips.org, Benjamin Herrenschmidt , Kumar Gala , Becky Bruce Subject: Re: [PATCH 0/5] PCM mmap (temporary) fixes for non-coherent architectures In-Reply-To: References: <1259248388-20095-1-git-send-email-tiwai@suse.de> <20100101193130.GA21510@rhlx01.hs-esslingen.de> User-Agent: Wanderlust/2.15.6 (Almost Unreal) SEMI/1.14.6 (Maruoka) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.7 Emacs/23.1 (x86_64-suse-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-Type: text/plain; charset=US-ASCII X-archive-position: 25577 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiwai@suse.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8341 Content-Length: 2603 Lines: 82 At Tue, 12 Jan 2010 08:02:36 +0100, I wrote: > > At Fri, 1 Jan 2010 20:31:30 +0100, > Andreas Mohr wrote: > > > > Hi, > > > > I've tried this patch set (with the typo-corrected part 4) on my ASUS > > WL-500gP v2 MIPSEL via a backport to 2.6.31.9, but all I get is a > > small blip of the sound I wanted to play, and then the system is fubar > > (I believe just the same thing as what happened without having this patch > > applied). > > As I mentioned in the previous followup, if your device is a > USB-audio, the patch doesn't help because it's for devices with > buffers using dma_alloc_coherent(). For USB-audio, it uses vmalloc > for an intermediate buffer. Maybe this should be changed to dma_*() > stuff for such architectures. A quick patch below (totally untested!) might do that. It's passing the device struct blindly, so not sure whether this would actually work for all dma_alloc_coherent(). Takashi --- diff --git a/sound/usb/usbaudio.c b/sound/usb/usbaudio.c index 9edef46..6c82026 100644 --- a/sound/usb/usbaudio.c +++ b/sound/usb/usbaudio.c @@ -734,7 +734,7 @@ static void snd_complete_sync_urb(struct urb *urb) } } - +#ifdef USBAUDIO_VMALLOC_BUFFER /* get the physical page pointer at the given offset */ static struct page *snd_pcm_get_vmalloc_page(struct snd_pcm_substream *subs, unsigned long offset) @@ -769,6 +769,24 @@ static int snd_pcm_free_vmalloc_buffer(struct snd_pcm_substream *subs) return 0; } +#define preallocate_buffer(chip, pcm, stream) /* NOP */ + +#else +#define snd_pcm_get_vmalloc_page NULL +#define snd_pcm_alloc_vmalloc_buffer snd_pcm_lib_malloc_pages +#define snd_pcm_free_vmalloc_buffer snd_pcm_lib_free_pages + +static int preallocate_buffer(struct snd_usb_audio *chip, struct snd_pcm *pcm, + int stream) +{ + struct snd_pcm_substream *subs = pcm->streams[stream].substream; + if (!subs) + return 0; + return snd_pcm_lib_preallocate_pages(subs, SNDRV_DMA_TYPE_DEV, + chip->card->dev, + 1024 * 64, 1024 * 1024); +} +#endif /* * unlink active urbs. @@ -2328,6 +2346,7 @@ static int add_audio_endpoint(struct snd_usb_audio *chip, int stream, struct aud err = snd_pcm_new_stream(as->pcm, stream, 1); if (err < 0) return err; + preallocate_buffer(chip, as->pcm, stream); init_substream(as, stream, fp); return 0; } @@ -2356,6 +2375,7 @@ static int add_audio_endpoint(struct snd_usb_audio *chip, int stream, struct aud else strcpy(pcm->name, "USB Audio"); + preallocate_buffer(chip, pcm, stream); init_substream(as, stream, fp); list_add(&as->list, &chip->pcm_list); From andi@lisas.de Wed Jan 13 10:28:26 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 13 Jan 2010 10:28:30 +0100 (CET) Received: from rhlx01.hs-esslingen.de ([129.143.116.10]:44863 "EHLO rhlx01.hs-esslingen.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492023Ab0AMJ20 (ORCPT ); Wed, 13 Jan 2010 10:28:26 +0100 Received: by rhlx01.hs-esslingen.de (Postfix, from userid 102) id C7B14400C1; Wed, 13 Jan 2010 10:28:25 +0100 (CET) Date: Wed, 13 Jan 2010 10:28:25 +0100 From: Andreas Mohr To: Takashi Iwai Cc: Andreas Mohr , alsa-devel@alsa-project.org, Ralf Baechle , Wu Zhangjin , Thomas Bogendoerfer , linux-mips@linux-mips.org, Benjamin Herrenschmidt , Kumar Gala , Becky Bruce Subject: Re: [PATCH 0/5] PCM mmap (temporary) fixes for non-coherent architectures Message-ID: <20100113092825.GA15394@rhlx01.hs-esslingen.de> References: <1259248388-20095-1-git-send-email-tiwai@suse.de> <20100101193130.GA21510@rhlx01.hs-esslingen.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Priority: none User-Agent: Mutt/1.5.18 (2008-05-17) X-archive-position: 25578 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: andi@lisas.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8359 Content-Length: 1398 Lines: 38 Hi, On Tue, Jan 12, 2010 at 08:02:36AM +0100, Takashi Iwai wrote: > At Fri, 1 Jan 2010 20:31:30 +0100, > Andreas Mohr wrote: > > > > Hi, > > > > I've tried this patch set (with the typo-corrected part 4) on my ASUS > > WL-500gP v2 MIPSEL via a backport to 2.6.31.9, but all I get is a > > small blip of the sound I wanted to play, and then the system is fubar > > (I believe just the same thing as what happened without having this patch > > applied). Crap, you already managed to beat me to my own reply! ;) (I'll try your patch in the other mail _ASAP_) > As I mentioned in the previous followup, if your device is a > USB-audio, the patch doesn't help because it's for devices with > buffers using dma_alloc_coherent(). For USB-audio, it uses vmalloc > for an intermediate buffer. Maybe this should be changed to dma_*() > stuff for such architectures. I've been searching the mailing list postings up and down, but I couldn't deduce anything to that effect from that content (but I'm mailing list-externally - maybe I just really didn't find the correct posting or there was a threading split) > Nevertheless, I don't know whether the crash is related with the > audio part... Yes, I wasn't fully pointing at the crash being caused by insufficient patches in that area either... (but I haven't fully investigated these OOPSes yet) Thanks a lot for your new test patch, Andreas Mohr From khali@linux-fr.org Wed Jan 13 10:29:21 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 13 Jan 2010 10:29:26 +0100 (CET) Received: from poutre.nerim.net ([62.4.16.124]:58584 "EHLO poutre.nerim.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492073Ab0AMJ3V (ORCPT ); Wed, 13 Jan 2010 10:29:21 +0100 Received: from localhost (localhost [127.0.0.1]) by poutre.nerim.net (Postfix) with ESMTP id 0BF6339DEC5; Wed, 13 Jan 2010 10:29:19 +0100 (CET) X-Virus-Scanned: amavisd-new at nerim.net Received: from poutre.nerim.net ([127.0.0.1]) by localhost (poutre.nerim.net [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id CDsMDhA905k1; Wed, 13 Jan 2010 10:29:18 +0100 (CET) Received: from hyperion.delvare (jdelvare.pck.nerim.net [62.212.121.182]) by poutre.nerim.net (Postfix) with ESMTP id C70B739DEB4; Wed, 13 Jan 2010 10:29:17 +0100 (CET) Date: Wed, 13 Jan 2010 10:29:18 +0100 From: Jean Delvare To: Markus Gothe Cc: David Daney , Ralf Baechle , linux-i2c@vger.kernel.org, "Bozic, Rade (EXT-Other - DE/Ulm)" , linux-mips , "Ben Dooks (embedded platforms)" Subject: Re: [PATCH 0/3] Add I2C support for Octeon SOCs. Message-ID: <20100113102918.328a77d7@hyperion.delvare> In-Reply-To: References: <4B463B1F.6000404@caviumnetworks.com> <4B463C71.3080005@caviumnetworks.com> <20100111144416.GA23157@linux-mips.org> <4B4B5CD3.4040204@caviumnetworks.com> X-Mailer: Claws Mail 3.5.0 (GTK+ 2.14.4; i586-suse-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-archive-position: 25579 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: khali@linux-fr.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8363 Content-Length: 321 Lines: 10 On Wed, 13 Jan 2010 01:49:08 +0100, Markus Gothe wrote: > Methinks this goes to I2C... But given that you are not maintaining any part of the kernel, what you think on this matter doesn't have much value, methinks. You do not seriously intend to tell maintainers how they should work together, do you? -- Jean Delvare From ralf@linux-mips.org Wed Jan 13 13:33:09 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 13 Jan 2010 13:33:13 +0100 (CET) Received: from localhost.localdomain ([127.0.0.1]:58969 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1492427Ab0AMMdJ (ORCPT ); Wed, 13 Jan 2010 13:33:09 +0100 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o0DCX0ti020646; Wed, 13 Jan 2010 13:33:01 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o0DCWwwQ020645; Wed, 13 Jan 2010 13:32:58 +0100 Date: Wed, 13 Jan 2010 13:32:58 +0100 From: Ralf Baechle To: David Daney Cc: linux-mips@linux-mips.org Subject: Re: [PATCH 1/2] MIPS: New macro smp_mb__before_llsc. Message-ID: <20100113123258.GA20354@linux-mips.org> References: <4B47D8ED.1020006@caviumnetworks.com> <1262999864-2353-1-git-send-email-ddaney@caviumnetworks.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1262999864-2353-1-git-send-email-ddaney@caviumnetworks.com> User-Agent: Mutt/1.5.20 (2009-08-17) X-archive-position: 25580 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8517 Content-Length: 508 Lines: 15 On Fri, Jan 08, 2010 at 05:17:43PM -0800, David Daney wrote: > Replace some instances of smp_llsc_mb() with a new macro > smp_mb__before_llsc(). It is used before ll/sc sequences that are > documented as needing write barrier semantics. > > The default implementation of smp_mb__before_llsc() is just > smp_llsc_mb(), so there are no changes in semantics. > > Also simplify definition of smp_mb(), smp_rmb(), and smp_wmb() to be > just barrier() in the non-SMP case. Queued for 2.6.34. Thanks! Ralf From ralf@linux-mips.org Wed Jan 13 13:33:39 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 13 Jan 2010 13:33:44 +0100 (CET) Received: from localhost.localdomain ([127.0.0.1]:58986 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1492437Ab0AMMdj (ORCPT ); Wed, 13 Jan 2010 13:33:39 +0100 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o0DCXYh3020675; Wed, 13 Jan 2010 13:33:34 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o0DCXYna020674; Wed, 13 Jan 2010 13:33:34 +0100 Date: Wed, 13 Jan 2010 13:33:34 +0100 From: Ralf Baechle To: David Daney Cc: linux-mips@linux-mips.org Subject: Re: [PATCH 2/2] MIPS: Octeon: Use optimized memory barrier primitives. Message-ID: <20100113123334.GB20354@linux-mips.org> References: <4B47D8ED.1020006@caviumnetworks.com> <1262999864-2353-2-git-send-email-ddaney@caviumnetworks.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1262999864-2353-2-git-send-email-ddaney@caviumnetworks.com> User-Agent: Mutt/1.5.20 (2009-08-17) X-archive-position: 25581 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8518 Content-Length: 1320 Lines: 48 On Fri, Jan 08, 2010 at 05:17:44PM -0800, David Daney wrote: > In order to achieve correct synchronization semantics, the Octeon port > had defined CONFIG_WEAK_REORDERING_BEYOND_LLSC. This resulted in code > that looks like: > > sync > ll ... > . > . > . > sc ... > . > . > sync > > The second SYNC was redundant, but harmless. > > Octeon has a SYNCW instruction that acts as a write-memory-barrier > (due to an erratum in some parts two SYNCW are used). It is much > faster than SYNC because it imposes ordering on the writes, but > doesn't otherwise stall the execution pipeline. On Octeon, SYNC > stalls execution until all preceeding writes are committed to the > coherent memory system. > > Using: > > syncw;syncw > ll > . > . > . > sc > . > . > > Has identical semantics to the first sequence, but is much faster. > The SYNCW orders the writes, and the SC will not complete successfully > until the write is committed to the coherent memory system. So at the > end all preceeding writes have been committed. Since Octeon does not > do speculative reads, this functions as a full barrier. > > The patch removes CONFIG_WEAK_REORDERING_BEYOND_LLSC, and substitutes > SYNCW for SYNC in write-memory-barriers. Queued for 2.6.34. Thanks! Ralf From ralf@linux-mips.org Wed Jan 13 14:48:52 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 13 Jan 2010 14:48:59 +0100 (CET) Received: from localhost.localdomain ([127.0.0.1]:59211 "EHLO h5.dl5rb.org.uk" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1492539Ab0AMNsw (ORCPT ); Wed, 13 Jan 2010 14:48:52 +0100 Received: from h5.dl5rb.org.uk (localhost.localdomain [127.0.0.1]) by h5.dl5rb.org.uk (8.14.3/8.14.3) with ESMTP id o0DDmkt0030194; Wed, 13 Jan 2010 14:48:47 +0100 Received: (from ralf@localhost) by h5.dl5rb.org.uk (8.14.3/8.14.3/Submit) id o0DDmiBM030192; Wed, 13 Jan 2010 14:48:44 +0100 Date: Wed, 13 Jan 2010 14:48:43 +0100 From: Ralf Baechle To: Florian Fainelli Cc: Geert Uytterhoeven , Thomas Bogendoerfer , linux-mips@linux-mips.org, Maxime Bizon Subject: Re: [PATCH 2/2] MIPS: add readl/write_be Message-ID: <20100113134843.GC20354@linux-mips.org> References: <200912121757.56365.ffainelli@freebox.fr> <200912150144.04051.ffainelli@freebox.fr> <20091215082521.GA16778@linux-mips.org> <200912161129.07023.ffainelli@freebox.fr> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <200912161129.07023.ffainelli@freebox.fr> User-Agent: Mutt/1.5.20 (2009-08-17) X-archive-position: 25582 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8569 Content-Length: 537 Lines: 14 On Wed, Dec 16, 2009 at 11:29:06AM +0100, Florian Fainelli wrote: > From: Florian Fainelli > Subject: [PATCH v3] MIPS: add readl/write_be accessors > > MIPS currently lacks the readl_be and writel_be accessors > which are required by BCM63xx for OHCI and EHCI support. > Let's define them globally for MIPS. This also fixes the > compilation of the bcm63xx defconfig against USB. Queued; I've added the b, w and q variants to make the patch feature complete even though there are probably no users atm. Ralf From fengguang.wu@intel.com Wed Jan 13 15:00:46 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 13 Jan 2010 15:00:51 +0100 (CET) Received: from mga09.intel.com ([134.134.136.24]:30635 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492615Ab0AMOAq (ORCPT ); Wed, 13 Jan 2010 15:00:46 +0100 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP; 13 Jan 2010 06:00:37 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.49,268,1262592000"; d="scan'208";a="483648896" Received: from unknown (HELO localhost.localdomain) ([10.255.12.25]) by orsmga002.jf.intel.com with ESMTP; 13 Jan 2010 06:00:17 -0800 Received: from wfg by localhost.localdomain with local (Exim 4.69) (envelope-from ) id 1NV3lb-0004hx-EX; Wed, 13 Jan 2010 22:00:11 +0800 Message-Id: <20100113135957.680223335@intel.com> User-Agent: quilt/0.48-1 Date: Wed, 13 Jan 2010 21:53:09 +0800 From: Wu Fengguang To: Andrew Morton Cc: Wu Fengguang , LKML , Chen Liqin , Lennox Wu , Ralf Baechle , linux-mips@linux-mips.org, KAMEZAWA Hiroyuki CC: Andi Kleen CC: Nick Piggin CC: Hugh Dickins cc: Linux Memory Management List Subject: [PATCH 4/8] resources: introduce generic page_is_ram() References: <20100113135305.013124116@intel.com> Content-Disposition: inline; filename=page-is-ram.patch X-archive-position: 25583 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: fengguang.wu@intel.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8578 Content-Length: 2303 Lines: 71 It's based on walk_system_ram_range(), for archs that don't have their own page_is_ram(). The static verions in MIPS and SCORE are also made global. CC: Chen Liqin CC: Lennox Wu CC: Ralf Baechle CC: linux-mips@linux-mips.org CC: KAMEZAWA Hiroyuki Signed-off-by: Wu Fengguang --- arch/mips/mm/init.c | 2 +- arch/score/mm/init.c | 2 +- include/linux/ioport.h | 2 ++ kernel/resource.c | 10 ++++++++++ 4 files changed, 14 insertions(+), 2 deletions(-) --- linux-mm.orig/kernel/resource.c 2010-01-10 10:11:53.000000000 +0800 +++ linux-mm/kernel/resource.c 2010-01-10 10:15:33.000000000 +0800 @@ -297,6 +297,16 @@ int walk_system_ram_range(unsigned long #endif +static int __is_ram(unsigned long pfn, unsigned long nr_pages, void *arg) +{ + return 24; +} + +int __attribute__((weak)) page_is_ram(unsigned long pfn) +{ + return 24 == walk_system_ram_range(pfn, 1, NULL, __is_ram); +} + /* * Find empty slot in the resource tree given range and alignment. */ --- linux-mm.orig/include/linux/ioport.h 2010-01-10 10:11:53.000000000 +0800 +++ linux-mm/include/linux/ioport.h 2010-01-10 10:11:54.000000000 +0800 @@ -188,5 +188,7 @@ extern int walk_system_ram_range(unsigned long start_pfn, unsigned long nr_pages, void *arg, int (*func)(unsigned long, unsigned long, void *)); +extern int page_is_ram(unsigned long pfn); + #endif /* __ASSEMBLY__ */ #endif /* _LINUX_IOPORT_H */ --- linux-mm.orig/arch/score/mm/init.c 2010-01-10 10:35:38.000000000 +0800 +++ linux-mm/arch/score/mm/init.c 2010-01-10 10:38:04.000000000 +0800 @@ -59,7 +59,7 @@ static unsigned long setup_zero_page(voi } #ifndef CONFIG_NEED_MULTIPLE_NODES -static int __init page_is_ram(unsigned long pagenr) +int page_is_ram(unsigned long pagenr) { if (pagenr >= min_low_pfn && pagenr < max_low_pfn) return 1; --- linux-mm.orig/arch/mips/mm/init.c 2010-01-10 10:37:22.000000000 +0800 +++ linux-mm/arch/mips/mm/init.c 2010-01-10 10:37:26.000000000 +0800 @@ -298,7 +298,7 @@ void __init fixrange_init(unsigned long } #ifndef CONFIG_NEED_MULTIPLE_NODES -static int __init page_is_ram(unsigned long pagenr) +int page_is_ram(unsigned long pagenr) { int i; From xiyou.wangcong@gmail.com Wed Jan 13 15:27:40 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 13 Jan 2010 15:27:44 +0100 (CET) Received: from mail-px0-f181.google.com ([209.85.216.181]:59202 "EHLO mail-px0-f181.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492723Ab0AMO1k (ORCPT ); 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Wed, 13 Jan 2010 06:27:33 -0800 (PST) Received: from hack ([58.31.79.117]) by mx.google.com with ESMTPS id 20sm276298pzk.13.2010.01.13.06.27.27 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 13 Jan 2010 06:27:32 -0800 (PST) Date: Wed, 13 Jan 2010 22:29:23 +0800 From: =?utf-8?Q?Am=C3=A9rico?= Wang To: Wu Fengguang Cc: Andrew Morton , LKML , Chen Liqin , Lennox Wu , Ralf Baechle , linux-mips@linux-mips.org, KAMEZAWA Hiroyuki , Andi Kleen , Nick Piggin , Hugh Dickins , Linux Memory Management List Subject: Re: [PATCH 4/8] resources: introduce generic page_is_ram() Message-ID: <20100113142923.GB4038@hack> References: <20100113135305.013124116@intel.com> <20100113135957.680223335@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20100113135957.680223335@intel.com> User-Agent: Mutt/1.5.19 (2009-01-05) X-archive-position: 25584 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: xiyou.wangcong@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8601 Content-Length: 2806 Lines: 86 On Wed, Jan 13, 2010 at 09:53:09PM +0800, Wu Fengguang wrote: >It's based on walk_system_ram_range(), for archs that don't have >their own page_is_ram(). > >The static verions in MIPS and SCORE are also made global. > >CC: Chen Liqin >CC: Lennox Wu >CC: Ralf Baechle >CC: linux-mips@linux-mips.org >CC: KAMEZAWA Hiroyuki >Signed-off-by: Wu Fengguang >--- > arch/mips/mm/init.c | 2 +- > arch/score/mm/init.c | 2 +- > include/linux/ioport.h | 2 ++ > kernel/resource.c | 10 ++++++++++ > 4 files changed, 14 insertions(+), 2 deletions(-) > >--- linux-mm.orig/kernel/resource.c 2010-01-10 10:11:53.000000000 +0800 >+++ linux-mm/kernel/resource.c 2010-01-10 10:15:33.000000000 +0800 >@@ -297,6 +297,16 @@ int walk_system_ram_range(unsigned long > > #endif > >+static int __is_ram(unsigned long pfn, unsigned long nr_pages, void *arg) >+{ >+ return 24; >+} >+ >+int __attribute__((weak)) page_is_ram(unsigned long pfn) >+{ >+ return 24 == walk_system_ram_range(pfn, 1, NULL, __is_ram); >+} Why do you choose 24 instead of using a macro expressing its meaning? >+ > /* > * Find empty slot in the resource tree given range and alignment. > */ >--- linux-mm.orig/include/linux/ioport.h 2010-01-10 10:11:53.000000000 +0800 >+++ linux-mm/include/linux/ioport.h 2010-01-10 10:11:54.000000000 +0800 >@@ -188,5 +188,7 @@ extern int > walk_system_ram_range(unsigned long start_pfn, unsigned long nr_pages, > void *arg, int (*func)(unsigned long, unsigned long, void *)); > >+extern int page_is_ram(unsigned long pfn); >+ > #endif /* __ASSEMBLY__ */ > #endif /* _LINUX_IOPORT_H */ >--- linux-mm.orig/arch/score/mm/init.c 2010-01-10 10:35:38.000000000 +0800 >+++ linux-mm/arch/score/mm/init.c 2010-01-10 10:38:04.000000000 +0800 >@@ -59,7 +59,7 @@ static unsigned long setup_zero_page(voi > } > > #ifndef CONFIG_NEED_MULTIPLE_NODES >-static int __init page_is_ram(unsigned long pagenr) >+int page_is_ram(unsigned long pagenr) > { > if (pagenr >= min_low_pfn && pagenr < max_low_pfn) > return 1; >--- linux-mm.orig/arch/mips/mm/init.c 2010-01-10 10:37:22.000000000 +0800 >+++ linux-mm/arch/mips/mm/init.c 2010-01-10 10:37:26.000000000 +0800 >@@ -298,7 +298,7 @@ void __init fixrange_init(unsigned long > } > > #ifndef CONFIG_NEED_MULTIPLE_NODES >-static int __init page_is_ram(unsigned long pagenr) >+int page_is_ram(unsigned long pagenr) > { > int i; > > > >-- >To unsubscribe from this list: send the line "unsubscribe linux-kernel" in >the body of a message to majordomo@vger.kernel.org >More majordomo info at http://vger.kernel.org/majordomo-info.html >Please read the FAQ at http://www.tux.org/lkml/ -- Live like a child, think like the god. From manuel.lauss@googlemail.com Wed Jan 13 18:46:34 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 13 Jan 2010 18:46:39 +0100 (CET) Received: from mail-fx0-f211.google.com ([209.85.220.211]:34590 "EHLO mail-fx0-f211.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493215Ab0AMRqe (ORCPT ); Wed, 13 Jan 2010 18:46:34 +0100 Received: by fxm3 with SMTP id 3so13781407fxm.24 for ; Wed, 13 Jan 2010 09:46:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer; bh=hcYUKKmEKOOMXkn9/a0sNk/1UcyVKjLiidR6Ie9gF/M=; b=QAvLEUF3Fof/GyW06EuaxSiZkdpBDJzpM7X3cjPMMSLRszfBBP99iSsqSOt7bbYDs+ In44y7/TtUM7/2LR0qBSYrH5S0qo/1JdKG91aMEWaPlSp+5WnbrABM+lmKgl4KUtrWgZ ICCmstuEFSKy3OmWbY3Fkh4GNGz7IUkXD4Zqk= DomainKey-Signature: a=rsa-sha1; c=nofws; d=googlemail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; b=tNH6jIbQlPzMLk33gfIAHTMOoIG3bC+ufG2oVldroms0i8CLTn1Gs47izfx9caXLoh prJ6c+9ybaBzKj/F3hdodXJ200K5hD7S1IKh23bcY3ZilpHcGLKXbDlM/BeAMN1u4Q/E K4/TrQODC+K4zTCMV/bvcJl031WmjnPQkqssI= Received: by 10.223.29.193 with SMTP id r1mr10606394fac.29.1263404789246; Wed, 13 Jan 2010 09:46:29 -0800 (PST) Received: from localhost.localdomain (p5496EE2B.dip.t-dialin.net [84.150.238.43]) by mx.google.com with ESMTPS id 14sm10943855fxm.11.2010.01.13.09.46.27 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 13 Jan 2010 09:46:28 -0800 (PST) From: Manuel Lauss To: Linux-MIPS Cc: Manuel Lauss , Wu Zhangjin Subject: [RFC PATCH] MIPS: Alchemy: debug output for compressed kernels Date: Wed, 13 Jan 2010 18:46:58 +0100 Message-Id: <1263404818-23038-1-git-send-email-manuel.lauss@gmail.com> X-Mailer: git-send-email 1.6.5.6 X-archive-position: 25585 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: manuel.lauss@googlemail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8746 Content-Length: 1679 Lines: 48 Hook up the compressed debug output for all Alchemy systems supported by current kernel codebase. Cc: Wu Zhangjin Signed-off-by: Manuel Lauss --- The code is built for all alchemy systems since I doubt anyone would solder on an extra UART chip instead of using the built-in ones. Should work on all in-kernel boards; my db1200 likes it: zimage at: 82E21350 82FA149D Uncompressing Linux at load address 80100000 Now, booting the kernel... arch/mips/boot/compressed/Makefile | 1 + arch/mips/boot/compressed/uart-alchemy.c | 7 +++++++ 2 files changed, 8 insertions(+), 0 deletions(-) create mode 100644 arch/mips/boot/compressed/uart-alchemy.c diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile index 671d344..5f09c18 100644 --- a/arch/mips/boot/compressed/Makefile +++ b/arch/mips/boot/compressed/Makefile @@ -33,6 +33,7 @@ KBUILD_AFLAGS := $(LINUXINCLUDE) $(KBUILD_AFLAGS) -D__ASSEMBLY__ \ obj-y := $(obj)/head.o $(obj)/decompress.o $(obj)/dbg.o obj-$(CONFIG_SYS_SUPPORTS_ZBOOT_UART16550) += $(obj)/uart-16550.o +obj-$(CONFIG_MACH_ALCHEMY) += $(obj)/uart-alchemy.o OBJCOPYFLAGS_vmlinux.bin := $(OBJCOPYFLAGS) -O binary -R .comment -S $(obj)/vmlinux.bin: $(KBUILD_IMAGE) diff --git a/arch/mips/boot/compressed/uart-alchemy.c b/arch/mips/boot/compressed/uart-alchemy.c new file mode 100644 index 0000000..1bff22f --- /dev/null +++ b/arch/mips/boot/compressed/uart-alchemy.c @@ -0,0 +1,7 @@ +#include + +void putc(char c) +{ + /* all current (Jan. 2010) in-kernel boards */ + alchemy_uart_putchar(UART0_PHYS_ADDR, c); +} -- 1.6.5.6 From fengguang.wu@intel.com Thu Jan 14 04:29:50 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 14 Jan 2010 04:29:56 +0100 (CET) Received: from mga11.intel.com ([192.55.52.93]:16817 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1490947Ab0AND3u (ORCPT ); Thu, 14 Jan 2010 04:29:50 +0100 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP; 13 Jan 2010 19:29:27 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.49,272,1262592000"; d="scan'208";a="764069671" Received: from wfg-t61.sh.intel.com (HELO localhost.localdomain) ([10.239.20.251]) by fmsmga001.fm.intel.com with ESMTP; 13 Jan 2010 19:29:40 -0800 Received: from wfg by localhost.localdomain with local (Exim 4.69) (envelope-from ) id 1NVGOw-0004uJ-Lx; Thu, 14 Jan 2010 11:29:38 +0800 Date: Thu, 14 Jan 2010 11:29:38 +0800 From: Wu Fengguang To: =?utf-8?Q?Am=C3=A9rico?= Wang Cc: Andrew Morton , LKML , Chen Liqin , Lennox Wu , Ralf Baechle , "linux-mips@linux-mips.org" , KAMEZAWA Hiroyuki , Andi Kleen , Nick Piggin , Hugh Dickins , Linux Memory Management List Subject: Re: [PATCH 4/8] resources: introduce generic page_is_ram() Message-ID: <20100114032938.GB11709@localhost> References: <20100113135305.013124116@intel.com> <20100113135957.680223335@intel.com> <20100113142923.GB4038@hack> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20100113142923.GB4038@hack> User-Agent: Mutt/1.5.18 (2008-05-17) X-archive-position: 25586 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: fengguang.wu@intel.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9095 Content-Length: 3883 Lines: 115 On Wed, Jan 13, 2010 at 10:29:23PM +0800, Américo Wang wrote: > On Wed, Jan 13, 2010 at 09:53:09PM +0800, Wu Fengguang wrote: > >It's based on walk_system_ram_range(), for archs that don't have > >their own page_is_ram(). > > > >The static verions in MIPS and SCORE are also made global. > > > >CC: Chen Liqin > >CC: Lennox Wu > >CC: Ralf Baechle > >CC: linux-mips@linux-mips.org > >CC: KAMEZAWA Hiroyuki > >Signed-off-by: Wu Fengguang > >--- > > arch/mips/mm/init.c | 2 +- > > arch/score/mm/init.c | 2 +- > > include/linux/ioport.h | 2 ++ > > kernel/resource.c | 10 ++++++++++ > > 4 files changed, 14 insertions(+), 2 deletions(-) > > > >--- linux-mm.orig/kernel/resource.c 2010-01-10 10:11:53.000000000 +0800 > >+++ linux-mm/kernel/resource.c 2010-01-10 10:15:33.000000000 +0800 > >@@ -297,6 +297,16 @@ int walk_system_ram_range(unsigned long > > > > #endif > > > >+static int __is_ram(unsigned long pfn, unsigned long nr_pages, void *arg) > >+{ > >+ return 24; > >+} > >+ > >+int __attribute__((weak)) page_is_ram(unsigned long pfn) > >+{ > >+ return 24 == walk_system_ram_range(pfn, 1, NULL, __is_ram); > >+} > > > Why do you choose 24 instead of using a macro expressing its meaning? Hmm, I thought they are close enough to be obvious. Anyway this should look better: resources: introduce generic page_is_ram() It's based on walk_system_ram_range(), for archs that don't have their own page_is_ram(). The static verions in MIPS and SCORE are also made global. CC: Chen Liqin CC: Lennox Wu CC: Ralf Baechle CC: Américo Wang CC: linux-mips@linux-mips.org CC: KAMEZAWA Hiroyuki Signed-off-by: Wu Fengguang --- arch/mips/mm/init.c | 2 +- arch/score/mm/init.c | 2 +- include/linux/ioport.h | 2 ++ kernel/resource.c | 11 +++++++++++ 4 files changed, 15 insertions(+), 2 deletions(-) --- linux-mm.orig/kernel/resource.c 2010-01-13 21:27:28.000000000 +0800 +++ linux-mm/kernel/resource.c 2010-01-14 11:28:20.000000000 +0800 @@ -297,6 +297,17 @@ int walk_system_ram_range(unsigned long #endif +#define PAGE_IS_RAM 24 +static int __is_ram(unsigned long pfn, unsigned long nr_pages, void *arg) +{ + return PAGE_IS_RAM; +} +int __attribute__((weak)) page_is_ram(unsigned long pfn) +{ + return PAGE_IS_RAM == walk_system_ram_range(pfn, 1, NULL, __is_ram); +} +#undef PAGE_IS_RAM + /* * Find empty slot in the resource tree given range and alignment. */ --- linux-mm.orig/include/linux/ioport.h 2010-01-13 21:27:28.000000000 +0800 +++ linux-mm/include/linux/ioport.h 2010-01-13 21:44:50.000000000 +0800 @@ -188,5 +188,7 @@ extern int walk_system_ram_range(unsigned long start_pfn, unsigned long nr_pages, void *arg, int (*func)(unsigned long, unsigned long, void *)); +extern int page_is_ram(unsigned long pfn); + #endif /* __ASSEMBLY__ */ #endif /* _LINUX_IOPORT_H */ --- linux-mm.orig/arch/score/mm/init.c 2010-01-13 21:27:28.000000000 +0800 +++ linux-mm/arch/score/mm/init.c 2010-01-13 21:44:50.000000000 +0800 @@ -59,7 +59,7 @@ static unsigned long setup_zero_page(voi } #ifndef CONFIG_NEED_MULTIPLE_NODES -static int __init page_is_ram(unsigned long pagenr) +int page_is_ram(unsigned long pagenr) { if (pagenr >= min_low_pfn && pagenr < max_low_pfn) return 1; --- linux-mm.orig/arch/mips/mm/init.c 2010-01-13 21:27:28.000000000 +0800 +++ linux-mm/arch/mips/mm/init.c 2010-01-13 21:44:50.000000000 +0800 @@ -298,7 +298,7 @@ void __init fixrange_init(unsigned long } #ifndef CONFIG_NEED_MULTIPLE_NODES -static int __init page_is_ram(unsigned long pagenr) +int page_is_ram(unsigned long pagenr) { int i; From andi@lisas.de Thu Jan 14 08:46:39 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 14 Jan 2010 08:46:44 +0100 (CET) Received: from rhlx01.hs-esslingen.de ([129.143.116.10]:60550 "EHLO rhlx01.hs-esslingen.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491056Ab0ANHqj (ORCPT ); Thu, 14 Jan 2010 08:46:39 +0100 Received: by rhlx01.hs-esslingen.de (Postfix, from userid 102) id 03E1B40094; Thu, 14 Jan 2010 08:46:38 +0100 (CET) Date: Thu, 14 Jan 2010 08:46:38 +0100 From: Andreas Mohr To: Takashi Iwai Cc: Andreas Mohr , alsa-devel@alsa-project.org, Ralf Baechle , Wu Zhangjin , Thomas Bogendoerfer , linux-mips@linux-mips.org, Benjamin Herrenschmidt , Kumar Gala , Becky Bruce Subject: Re: [PATCH 0/5] PCM mmap (temporary) fixes for non-coherent architectures Message-ID: <20100114074638.GA12266@rhlx01.hs-esslingen.de> References: <1259248388-20095-1-git-send-email-tiwai@suse.de> <20100101193130.GA21510@rhlx01.hs-esslingen.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Priority: none User-Agent: Mutt/1.5.18 (2008-05-17) X-archive-position: 25587 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: andi@lisas.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9218 Content-Length: 22300 Lines: 267 On Wed, Jan 13, 2010 at 10:07:32AM +0100, Takashi Iwai wrote: > > As I mentioned in the previous followup, if your device is a > > USB-audio, the patch doesn't help because it's for devices with > > buffers using dma_alloc_coherent(). For USB-audio, it uses vmalloc > > for an intermediate buffer. Maybe this should be changed to dma_*() > > stuff for such architectures. > > A quick patch below (totally untested!) might do that. > It's passing the device struct blindly, so not sure whether this would > actually work for all dma_alloc_coherent(). Thanks a lot, tested, but AFAICS there isn't much of a change unfortunately (log below). Note that the old snd-usb-audio.ko did contain snd_pcm_get_vmalloc_page(), and the new one (put in the correct kernel version dir and depmod -a) doesn't, thus the patch was applied and did make it to the binary side, and it did get loaded correctly upon plugging I think. Would one also want strace/ltrace output of the userspace side of things? (likely rather useless, except for perhaps nailing that it does crash where we think it crashes or so) Frankly I'm still pretty much in uninformed shape concerning this mmap pcm buffer issue, would need to take quite a bit more time for research in order to be able to take part in the discussion in a productive way ;) Thanks, Andreas Mohr # cat /usr/local/bin/audio_test.sh #!/bin/sh # better make sure... sync sleep 1 aplay /usr/local/sounds/attention [LOCKUP] $ ../netconsole.sh kobject: 'ep_01' (81f70090): kobject_add_internal: parent: '2-1.1.1:1.1', set: 'devices' kobject: 'ep_01' (81f70090): kobject_uevent_env kobject: 'ep_01' (81f70090): kobject_uevent_env: filter function caused the event to drop! setting usb interface 1:1 Instruction bus error, epc == 2ab4f178, ra == 80000018 kobject: 'ep_01' (81f70090): kobject_uevent_env kobject: 'ep_01' (81f70090): kobject_uevent_env: filter function caused the event to drop! kobject: 'ep_01' (81f70090): kobject_cleanup kobject: 'ep_01' (81f70090): calling ktype release kobject: 'ep_01': free name EHCI_DIS: hcd 81dd7080 ep 81604800 qh (null) (#01) Instruction bus error, epc == 8003475c, ra == 80000018 Oops[#1]: Cpu 0 $ 0 : 00000000 1000d001 00000000 80000000 $ 4 : 81d30838 81e57ac0 00000000 00000000 $ 8 : 00000000 00000000 81040000 81ec8000 $12 : 81d37868 80340000 81d37868 0000000a $16 : 00000000 7fa911e8 00000538 81d30838 $20 : 0000000a 81f0def8 20000000 fffffff6 $24 : 00000000 801874c0 $28 : 81f0c000 81f0de40 00000001 80000018 Hi : 00000000 Lo : 00000000 epc : 8003475c wait_consider_task+0x49c/0xe20 Not tainted ra : 80000018 0x80000018 Status: 1000d003 KERNEL EXL IE Cause : 00800018 PrId : 00029029 (Broadcom BCM3302) Modules linked in: snd_usb_audio snd_pcm_oss snd_mixer_oss snd_pcm snd_timer evdev snd_page_alloc snd_usb_lib snd_rawmidi snd_seq_device snd_hwdep usbhid hid snd input_core soundcore ipv6 arc4 ecb cryptomgr aead pcompress crypto_blkcipher crypto_hash crypto_algapi b43 ftdi_sio mac80211 cfg80211 usbserial Process audio_test.sh (pid: 1333, threadinfo=81f0c000, task=81d37838, tls=00000000) Stack : 8033dab8 80027e24 81e8488c 802b89e0 8033c000 81d37838 00000000 8000ace0 00000000 00000000 81e57e60 80018238 81d30838 81d37838 00000000 81d3794c 81f0def8 ffffffff 20000000 fffffff6 00000001 800351b4 00000004 801c7cf8 7fa911a8 81db5870 00000000 81d37838 8002d0c4 81e57ac8 81e57ac8 81d37838 00000000 00000000 7fa911e8 00000000 0051f56c 00000000 00440000 00525790 ... Call Trace: [<8003475c>] wait_consider_task+0x49c/0xe20 [<800351b4>] do_wait+0xd4/0x340 [<800354e0>] sys_wait4+0xc0/0xec [<800031f0>] stack_done+0x20/0x3c Code: 00431024 14400251 00000000 16000051 8eb1000c 12200051 8fa30020 0c002bc1 Disabling lock debugging due to kernel taint Instruction bus error, epc == 80004dd8, ra == 80000018 Oops[#2]: Cpu 0 $ 0 : 00000000 1000d000 00000000 00000000 $ 4 : 7ff0dc60 81c0ddd0 00000000 1000d001 $ 8 : 00000000 00000000 00000000 81f0c000 $12 : 81c084b0 003d0900 81c084b0 00000000 $16 : 00000004 00000000 81c0ddc0 81c0ddc0 $20 : 7ff0dc60 00000000 81c0ddcc 00000000 $24 : 00000000 801874c0 $28 : 81c0c000 81c0dd98 00000001 80000018 Hi : 0000007f Lo : 3d391e00 epc : 80004dd8 __copy_user+0xd4/0x2bc Tainted: G D ra : 80000018 0x80000018 Status: 1000d003 KERNEL EXL IE Cause : 00800018 PrId : 00029029 (Broadcom BCM3302) Modules linked in: snd_usb_audio snd_pcm_oss snd_mixer_oss snd_pcm snd_timer evdev snd_page_alloc snd_usb_lib snd_rawmidi snd_seq_device snd_hwdep usbhid hid snd input_core soundcore ipv6 arc4 ecb cryptomgr aead pcompress crypto_blkcipher crypto_hash crypto_algapi b43 ftdi_sio mac80211 cfg80211 usbserial Process init (pid: 1, threadinfo=81c0c000, task=81c08480, tls=00000000) Stack : 00000000 81c0dda8 81c0df00 80350fb0 81c0ddc0 81c0ddc4 81c0ddc8 81c0ddcc 81c0ddd0 81c0ddd4 00000400 00000000 00000000 00000000 00000000 00000000 00000000 00000000 81f04000 ffffff9c 81c0dea8 0044a234 7ff0e048 8009b864 00000001 81c0dea8 00000001 81f04000 ffffff9c 800a2d18 00000003 00000002 00000003 00000003 0000000d 00000000 00000000 00000000 000000cc 00001180 ... Call Trace: [<80004dd8>] __copy_user+0xd4/0x2bc Code: 8ca80000 24a50004 24c6fffc 1706fffb 24840004 10c00040 00864821 240a0020 Instruction bus error, epc == 8003475c, ra == 80000018 Oops[#3]: Cpu 0 $ 0 : 00000000 1000d001 00000000 80000000 $ 4 : 81d37838 80415e00 00000000 00000000 $ 8 : 00000000 00000000 81040000 81f0c000 $12 : 80484868 80340000 80484868 0000000b $16 : 00000000 7febff60 00000535 81d37838 $20 : 0000000b 81e2bef8 20000000 fffffff6 $24 : 00000000 80018ff0 $28 : 81e2a000 81e2be40 00000001 80000018 Hi : 00000000 Lo : 00000000 epc : 8003475c wait_consider_task+0x49c/0xe20 Tainted: G D ra : 80000018 0x80000018 Status: 1000d003 KERNEL EXL IE Cause : 00800018 PrId : 00029029 (Broadcom BCM3302) Modules linked in: snd_usb_audio snd_pcm_oss snd_mixer_oss snd_pcm snd_timer evdev snd_page_alloc snd_usb_lib snd_rawmidi snd_seq_device snd_hwdep usbhid hid snd input_core soundcore ipv6 arc4 ecb cryptomgr aead pcompress crypto_blkcipher crypto_hash crypto_algapi b43 ftdi_sio mac80211 cfg80211 usbserial Process bash (pid: 1175, threadinfo=81e2a000, task=80484838, tls=00000000) Stack : 8033dab8 80027e24 81f18390 00002a84 81d37838 80484838 81e57e60 8000ace0 00000000 00000000 80047476 0051f510 81d37838 80484838 00000000 8048494c 81e2bef8 ffffffff 20000000 fffffff6 00000001 800351b4 81e8a1e0 00000008 81e8a0d4 81d37870 00000000 80484838 8002d0c4 80415e08 80415e08 80484838 0000000a 00000000 7febff60 00000000 0051f56c 00000000 00440000 00525790 ... Call Trace: [<8003475c>] wait_consider_task+0x49c/0xe20 [<800351b4>] do_wait+0xd4/0x340 [<800354e0>] sys_wait4+0xc0/0xec [<800031f0>] stack_done+0x20/0x3c Code: 00431024 14400251 00000000 16000051 8eb1000c 12200051 8fa30020 0c002bc1 Instruction bus error, epc == 80096fa0, ra == 80000018 Oops[#4]: Cpu 0 $ 0 : 00000000 1000d000 c0180002 00000002 $ 4 : 00000001 803b5514 00000001 81e24000 $ 8 : 80351000 00080000 81040000 81e2a000 $12 : 00000000 07de2900 ffffffff 00000000 $16 : 00000001 81e24fa0 2abe8000 003cbf03 $20 : 2abe9000 0119a613 00000000 00000000 $24 : 00000000 80018ff0 $28 : 81c0c000 81c0db48 00000000 80000018 Hi : 00000000 Lo : 00000000 epc : 80096fa0 swap_info_get+0x74/0xfc Tainted: G D ra : 80000018 0x80000018 Status: 1000d003 KERNEL EXL IE Cause : 00800018 PrId : 00029029 (Broadcom BCM3302) Modules linked in: snd_usb_audio snd_pcm_oss snd_mixer_oss snd_pcm snd_timer evdev snd_page_alloc snd_usb_lib snd_rawmidi snd_seq_device snd_hwdep usbhid hid snd input_core soundcore ipv6 arc4 ecb cryptomgr aead pcompress crypto_blkcipher crypto_hash crypto_algapi b43 ftdi_sio mac80211 cfg80211 usbserial Process init (pid: 1, threadinfo=81c0c000, task=81c08480, tls=00000000) Stack : ffffffff 800736a0 80002000 80000600 80350fd0 80099498 00002000 81023340 81e24f9c 2abe7000 00002000 81e24fa0 2abe8000 80088a30 81e0da9c 81e1e000 8037f840 81e1e034 2abe8fff 8033d9c0 81e1e000 81e1f2a8 81e1f2a8 2abe9000 00000000 00000001 81e0da9c 81e1e000 8037f840 81e1e034 81c08480 00000000 00000001 00000000 00000001 8008db1c 81c0dbf0 81e26000 00000000 ffffffff ... Call Trace: [<80096fa0>] swap_info_get+0x74/0xfc [<80099498>] free_swap_and_cache+0x1c/0x218 [<80088a30>] unmap_vmas+0x418/0x63c [<8008db1c>] exit_mmap+0xb8/0x148 [<8002e3c4>] mmput+0xc0/0x1d8 [<800333e8>] exit_mm+0x260/0x298 [<800357cc>] do_exit+0x1cc/0x688 [<80014658>] nmi_exception_handler+0x0/0x34 Code: 00041840 8ca20020 00431021 <94440000> 1480001d 8fbf0014 3c048030 3c05802c 24a5f280 Fixing recursive fault but reboot is needed! Instruction bus error, epc == 80004dd8, ra == 80000018 Oops[#5]: Cpu 0 $ 0 : 00000000 1000d000 00000000 00000004 $ 4 : 004c2a30 81e3ddd0 00000000 1000d001 $ 8 : 00000080 00000000 00000000 81e2a000 $12 : 81d66868 00000000 81d66868 00000000 $16 : 00000004 00000001 81e3ddc0 81e3ddc0 $20 : 004c2a30 004c7c98 81e3ddcc 00000000 $24 : 00000000 80181208 $28 : 81e3c000 81e3dd98 004b0000 80000018 Hi : 00000000 Lo : 00000000 epc : 80004dd8 __copy_user+0xd4/0x2bc Tainted: G D ra : 80000018 0x80000018 Status: 1000d003 KERNEL EXL IE Cause : 00800018 PrId : 00029029 (Broadcom BCM3302) Modules linked in: snd_usb_audio snd_pcm_oss snd_mixer_oss snd_pcm snd_timer evdev snd_page_alloc snd_usb_lib snd_rawmidi snd_seq_device snd_hwdep usbhid hid snd input_core soundcore ipv6 arc4 ecb cryptomgr aead pcompress crypto_blkcipher crypto_hash crypto_algapi b43 ftdi_sio mac80211 cfg80211 usbserial Process sshd (pid: 1173, threadinfo=81e3c000, task=81d66838, tls=00000000) Stack : 0041663c 81e3dda8 00000000 80200478 81e3ddc0 81e3ddc4 81e3ddc8 81e3ddcc 81e3ddd0 81e3ddd4 00000098 00000000 00000000 00000080 00000000 00000000 00000000 00000000 81e3de20 00000001 00000000 00000000 00000040 81e3de28 81e3de28 fffffdee 81e3de20 8009e530 00000000 814a5a20 81f5d8ec 81ed3900 00000000 00000000 004bd538 00000038 81d41900 8017a668 00000000 00000001 ... Call Trace: [<80004dd8>] __copy_user+0xd4/0x2bc Code: 8ca80000 24a50004 24c6fffc 1706fffb 24840004 10c00040 00864821 240a0020 Instruction bus error, epc == 80011530, ra == 80000018 Oops[#6]: Cpu 0 $ 0 : 00000000 1000d001 24020000 80000000 $ 4 : 7fb160e0 24021017 00000278 81c6ec2c $ 8 : 800125cc 8155fe80 ffffffff ffffffff $12 : 00000000 80340000 81c6e8b0 0000000b $16 : 00000000 00000000 7fb160d0 8155ff30 $20 : 7fb160e8 7fb160e0 81c6ec2c 00000012 $24 : 00000000 8025e170 $28 : 8155e000 8155fe10 8155fe80 80000018 Hi : 00000000 Lo : 00000000 epc : 80011530 install_sigtramp+0x20/0x54 Tainted: G D ra : 80000018 0x80000018 Status: 1000d003 KERNEL EXL IE Cause : 00800018 PrId : 00029029 (Broadcom BCM3302) Modules linked in: snd_usb_audio snd_pcm_oss snd_mixer_oss snd_pcm snd_timer evdev snd_page_alloc snd_usb_lib snd_rawmidi snd_seq_device snd_hwdep usbhid hid snd input_core soundcore ipv6 arc4 ecb cryptomgr aead pcompress crypto_blkcipher crypto_hash crypto_algapi b43 ftdi_sio mac80211 cfg80211 usbserial Process sshd (pid: 1100, threadinfo=8155e000, task=81c6e880, tls=00000000) Stack : 8155ff30 8155fe98 8167f000 8169f004 00000009 8155ff30 00000012 8001263c 81d58b18 81d58b18 81c59808 800b212c 8155ff30 00000012 8155fe80 81c6ec2c 8155fe98 ffffffff 004b352c 00000000 00000004 800116bc 8167f1e0 8155fe80 8155ff30 8155fea8 00000010 81d58b18 00000000 0040ac18 00000000 00000000 00000000 00000000 00000012 00040002 00000000 00000495 00000000 0000000b ... Call Trace: [<80011530>] install_sigtramp+0x20/0x54 [<8001263c>] setup_frame+0x70/0x110 [<800116bc>] do_notify_resume+0x158/0x428 [<800015f0>] work_notifysig+0xc/0x14 Code: afbf001c 00a22821 02008821 2402000c ac820004 3c038038 8c620038 0040f809 Instruction bus error, epc == 2ac458ec, ra == 80000018 From tiwai@suse.de Thu Jan 14 08:54:11 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 14 Jan 2010 08:54:16 +0100 (CET) Received: from cantor.suse.de ([195.135.220.2]:56052 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491056Ab0ANHyL (ORCPT ); Thu, 14 Jan 2010 08:54:11 +0100 Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.221.2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.suse.de (Postfix) with ESMTP id 3E8E88D893; Thu, 14 Jan 2010 08:54:09 +0100 (CET) Date: Thu, 14 Jan 2010 08:54:08 +0100 Message-ID: From: Takashi Iwai To: Andreas Mohr Cc: alsa-devel@alsa-project.org, Ralf Baechle , Wu Zhangjin , Thomas Bogendoerfer , linux-mips@linux-mips.org, Benjamin Herrenschmidt , Kumar Gala , Becky Bruce Subject: Re: [PATCH 0/5] PCM mmap (temporary) fixes for non-coherent architectures In-Reply-To: <20100114074638.GA12266@rhlx01.hs-esslingen.de> References: <1259248388-20095-1-git-send-email-tiwai@suse.de> <20100101193130.GA21510@rhlx01.hs-esslingen.de> <20100114074638.GA12266@rhlx01.hs-esslingen.de> User-Agent: Wanderlust/2.15.6 (Almost Unreal) SEMI/1.14.6 (Maruoka) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.7 Emacs/23.1 (x86_64-suse-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-Type: text/plain; charset=US-ASCII X-archive-position: 25588 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiwai@suse.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9225 Content-Length: 826 Lines: 22 At Thu, 14 Jan 2010 08:46:38 +0100, Andreas Mohr wrote: > > On Wed, Jan 13, 2010 at 10:07:32AM +0100, Takashi Iwai wrote: > > > As I mentioned in the previous followup, if your device is a > > > USB-audio, the patch doesn't help because it's for devices with > > > buffers using dma_alloc_coherent(). For USB-audio, it uses vmalloc > > > for an intermediate buffer. Maybe this should be changed to dma_*() > > > stuff for such architectures. > > > > A quick patch below (totally untested!) might do that. > > It's passing the device struct blindly, so not sure whether this would > > actually work for all dma_alloc_coherent(). > > Thanks a lot, tested, but AFAICS there isn't much of a change unfortunately > (log below). Of course, not for the crash. The patch was for improving the sound quality (if any). Takashi From ddaney@caviumnetworks.com Thu Jan 14 18:25:47 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 14 Jan 2010 18:25:51 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:15198 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492250Ab0ANRZr (ORCPT ); Thu, 14 Jan 2010 18:25:47 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Thu, 14 Jan 2010 09:25:27 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 14 Jan 2010 09:24:30 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Thu, 14 Jan 2010 09:24:30 -0800 Message-ID: <4B4F534B.5050007@caviumnetworks.com> Date: Thu, 14 Jan 2010 09:24:27 -0800 From: David Daney User-Agent: Thunderbird 2.0.0.21 (X11/20090320) MIME-Version: 1.0 To: Joe Perches , Ralf Baechle CC: Andrew Morton , linux-kernel@vger.kernel.org, linux-mips Subject: Re: [PATCH 00/24] MAINTAINERS: Add "Q" patchwork entries References: In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 14 Jan 2010 17:24:30.0139 (UTC) FILETIME=[6E1D10B0:01CA953E] X-archive-position: 25589 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9381 Content-Length: 1670 Lines: 39 Joe Perches wrote: > Keep the patchwork site entries in MAINTAINERS > > Joe Perches (24): > MAINTAINERS: Document new "Q:" patchwork queue type > MAINTAINERS: 9P FILE SYSTEM - Add "Q" patchwork entry > MAINTAINERS: ACPI - Add "Q" patchwork entry > MAINTAINERS: BTRFS FILE SYSTEM - Add "Q" patchwork entry > MAINTAINERS: CIFS - Add "Q" patchwork entry > MAINTAINERS: DEVICE-MAPPER - Add "Q" patchwork entry > MAINTAINERS: EXT4 FILE SYSTEM - Add "Q" patchwork entry > MAINTAINERS: IDE SUBSYSTEM - Add "Q" patchwork entry > MAINTAINERS: INFINIBAND SUBSYSTEM - Add "Q" patchwork entry > MAINTAINERS: INPUT DRIVERS - Add "Q" patchwork entry > MAINTAINERS: KCONFIG - Add "Q" patchwork entry > MAINTAINERS: LINUX FOR POWERPC - Add "Q" patchwork entry > MAINTAINERS: V4L/DVB - Add "Q" patchwork entry > MAINTAINERS: MTD - Add "Q" patchwork entry > MAINTAINERS: NETWORKING [WIRELESS] - Add "Q" patchwork entry > MAINTAINERS: OMAP - Add "Q" patchwork entry > MAINTAINERS: PARISC ARCHITECTURE - Add "Q" patchwork entry > MAINTAINERS: PCI SUBSYSTEM - Add "Q" patchwork entry > MAINTAINERS: REAL TIME CLOCK - Add "Q" patchwork entry > MAINTAINERS: TI DAVINCI - Add "Q" patchwork entry > MAINTAINERS: SPARC - Add "Q" patchwork entry > MAINTAINERS: SPI SUBSYSTEM - Add "Q" patchwork entry > MAINTAINERS: SUPERH - Add "Q" patchwork entry > MAINTAINERS: THE REST (LKML) - Add "Q" patchwork entry > > MAINTAINERS | 26 +++++++++++++++++++++++++- > 1 files changed, 25 insertions(+), 1 deletions(-) > I wonder if the MIPS patchwork site should also be included: http://patchwork.linux-mips.org/project/linux-mips/list/ David Daney From joe@perches.com Thu Jan 14 18:41:06 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 14 Jan 2010 18:41:11 +0100 (CET) Received: from mail.perches.com ([173.55.12.10]:1207 "EHLO mail.perches.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1493074Ab0ANRlG (ORCPT ); Thu, 14 Jan 2010 18:41:06 +0100 Received: from [192.168.1.151] (Joe-Laptop.home [192.168.1.151]) by mail.perches.com (Postfix) with ESMTP id A972C24368; Thu, 14 Jan 2010 09:40:47 -0800 (PST) Subject: Re: [PATCH 00/24] MAINTAINERS: Add "Q" patchwork entries From: Joe Perches To: David Daney Cc: Ralf Baechle , Andrew Morton , linux-kernel@vger.kernel.org, linux-mips In-Reply-To: <4B4F534B.5050007@caviumnetworks.com> References: <4B4F534B.5050007@caviumnetworks.com> Content-Type: text/plain; charset="UTF-8" Date: Thu, 14 Jan 2010 09:40:56 -0800 Message-ID: <1263490856.1903.14.camel@Joe-Laptop.home> Mime-Version: 1.0 X-Mailer: Evolution 2.28.1 Content-Transfer-Encoding: 7bit X-archive-position: 25590 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: joe@perches.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9383 Content-Length: 283 Lines: 11 On Thu, 2010-01-14 at 09:24 -0800, David Daney wrote: > I wonder if the MIPS patchwork site should also be included: > http://patchwork.linux-mips.org/project/linux-mips/list/ Thanks. I think it should. If Andrew accepts the series, I'll add a patch if you don't first. cheers, From benh@kernel.crashing.org Fri Jan 15 04:28:33 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 15 Jan 2010 04:28:37 +0100 (CET) Received: from gate.crashing.org ([63.228.1.57]:54965 "EHLO gate.crashing.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491063Ab0AOD2d (ORCPT ); Fri, 15 Jan 2010 04:28:33 +0100 Received: from [IPv6:::1] (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id o0F3S3bs020671; Thu, 14 Jan 2010 21:28:04 -0600 Subject: Re: [PATCH 0/5] PCM mmap (temporary) fixes for non-coherent architectures From: Benjamin Herrenschmidt To: Takashi Iwai Cc: Andreas Mohr , alsa-devel@alsa-project.org, Ralf Baechle , Wu Zhangjin , Thomas Bogendoerfer , linux-mips@linux-mips.org, Kumar Gala , Becky Bruce In-Reply-To: References: <1259248388-20095-1-git-send-email-tiwai@suse.de> <20100101193130.GA21510@rhlx01.hs-esslingen.de> Content-Type: text/plain; charset="UTF-8" Date: Fri, 15 Jan 2010 14:28:02 +1100 Message-ID: <1263526082.724.395.camel@pasglop> Mime-Version: 1.0 X-Mailer: Evolution 2.28.1 Content-Transfer-Encoding: 7bit X-archive-position: 25591 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: benh@kernel.crashing.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9973 Content-Length: 2316 Lines: 75 > A quick patch below (totally untested!) might do that. > It's passing the device struct blindly, so not sure whether this would > actually work for all dma_alloc_coherent(). On archs that have dma_ops such as powerpc (but I think x86 too nowadays) you cannot use the USB device for dma_* operations. You need to get up to the host controller device... It -might- be worth looking at adding code to the USB stack to propagate the parent device dma_ops down to USB devices... hard to tell. Cheers, Ben. > > Takashi > > --- > diff --git a/sound/usb/usbaudio.c b/sound/usb/usbaudio.c > index 9edef46..6c82026 100644 > --- a/sound/usb/usbaudio.c > +++ b/sound/usb/usbaudio.c > @@ -734,7 +734,7 @@ static void snd_complete_sync_urb(struct urb *urb) > } > } > > - > +#ifdef USBAUDIO_VMALLOC_BUFFER > /* get the physical page pointer at the given offset */ > static struct page *snd_pcm_get_vmalloc_page(struct snd_pcm_substream *subs, > unsigned long offset) > @@ -769,6 +769,24 @@ static int snd_pcm_free_vmalloc_buffer(struct snd_pcm_substream *subs) > return 0; > } > > +#define preallocate_buffer(chip, pcm, stream) /* NOP */ > + > +#else > +#define snd_pcm_get_vmalloc_page NULL > +#define snd_pcm_alloc_vmalloc_buffer snd_pcm_lib_malloc_pages > +#define snd_pcm_free_vmalloc_buffer snd_pcm_lib_free_pages > + > +static int preallocate_buffer(struct snd_usb_audio *chip, struct snd_pcm *pcm, > + int stream) > +{ > + struct snd_pcm_substream *subs = pcm->streams[stream].substream; > + if (!subs) > + return 0; > + return snd_pcm_lib_preallocate_pages(subs, SNDRV_DMA_TYPE_DEV, > + chip->card->dev, > + 1024 * 64, 1024 * 1024); > +} > +#endif > > /* > * unlink active urbs. > @@ -2328,6 +2346,7 @@ static int add_audio_endpoint(struct snd_usb_audio *chip, int stream, struct aud > err = snd_pcm_new_stream(as->pcm, stream, 1); > if (err < 0) > return err; > + preallocate_buffer(chip, as->pcm, stream); > init_substream(as, stream, fp); > return 0; > } > @@ -2356,6 +2375,7 @@ static int add_audio_endpoint(struct snd_usb_audio *chip, int stream, struct aud > else > strcpy(pcm->name, "USB Audio"); > > + preallocate_buffer(chip, pcm, stream); > init_substream(as, stream, fp); > > list_add(&as->list, &chip->pcm_list); From tiwai@suse.de Fri Jan 15 07:43:51 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 15 Jan 2010 07:43:57 +0100 (CET) Received: from cantor2.suse.de ([195.135.220.15]:59361 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491141Ab0AOGnv (ORCPT ); Fri, 15 Jan 2010 07:43:51 +0100 Received: from relay2.suse.de (charybdis-ext.suse.de [195.135.221.2]) by mx2.suse.de (Postfix) with ESMTP id AA26379727; Fri, 15 Jan 2010 07:43:46 +0100 (CET) Date: Fri, 15 Jan 2010 07:43:45 +0100 Message-ID: From: Takashi Iwai To: Benjamin Herrenschmidt Cc: Andreas Mohr , alsa-devel@alsa-project.org, Ralf Baechle , Wu Zhangjin , Thomas Bogendoerfer , linux-mips@linux-mips.org, Kumar Gala , Becky Bruce Subject: Re: [PATCH 0/5] PCM mmap (temporary) fixes for non-coherent architectures In-Reply-To: <1263526082.724.395.camel@pasglop> References: <1259248388-20095-1-git-send-email-tiwai@suse.de> <20100101193130.GA21510@rhlx01.hs-esslingen.de> <1263526082.724.395.camel@pasglop> User-Agent: Wanderlust/2.15.6 (Almost Unreal) SEMI/1.14.6 (Maruoka) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.7 Emacs/23.1 (x86_64-suse-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-Type: text/plain; charset=US-ASCII X-archive-position: 25592 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiwai@suse.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 10012 Content-Length: 2676 Lines: 88 At Fri, 15 Jan 2010 14:28:02 +1100, Benjamin Herrenschmidt wrote: > > > > A quick patch below (totally untested!) might do that. > > It's passing the device struct blindly, so not sure whether this would > > actually work for all dma_alloc_coherent(). > > On archs that have dma_ops such as powerpc (but I think x86 too > nowadays) you cannot use the USB device for dma_* operations. You need > to get up to the host controller device... Yep, I don't think this being a proper fix, too. > It -might- be worth looking at adding code to the USB stack to propagate > the parent device dma_ops down to USB devices... hard to tell. Or we may simply need to drop the mmap support on such architectures... thanks, Takashi > > Cheers, > Ben. > > > > > Takashi > > > > --- > > diff --git a/sound/usb/usbaudio.c b/sound/usb/usbaudio.c > > index 9edef46..6c82026 100644 > > --- a/sound/usb/usbaudio.c > > +++ b/sound/usb/usbaudio.c > > @@ -734,7 +734,7 @@ static void snd_complete_sync_urb(struct urb *urb) > > } > > } > > > > - > > +#ifdef USBAUDIO_VMALLOC_BUFFER > > /* get the physical page pointer at the given offset */ > > static struct page *snd_pcm_get_vmalloc_page(struct snd_pcm_substream *subs, > > unsigned long offset) > > @@ -769,6 +769,24 @@ static int snd_pcm_free_vmalloc_buffer(struct snd_pcm_substream *subs) > > return 0; > > } > > > > +#define preallocate_buffer(chip, pcm, stream) /* NOP */ > > + > > +#else > > +#define snd_pcm_get_vmalloc_page NULL > > +#define snd_pcm_alloc_vmalloc_buffer snd_pcm_lib_malloc_pages > > +#define snd_pcm_free_vmalloc_buffer snd_pcm_lib_free_pages > > + > > +static int preallocate_buffer(struct snd_usb_audio *chip, struct snd_pcm *pcm, > > + int stream) > > +{ > > + struct snd_pcm_substream *subs = pcm->streams[stream].substream; > > + if (!subs) > > + return 0; > > + return snd_pcm_lib_preallocate_pages(subs, SNDRV_DMA_TYPE_DEV, > > + chip->card->dev, > > + 1024 * 64, 1024 * 1024); > > +} > > +#endif > > > > /* > > * unlink active urbs. > > @@ -2328,6 +2346,7 @@ static int add_audio_endpoint(struct snd_usb_audio *chip, int stream, struct aud > > err = snd_pcm_new_stream(as->pcm, stream, 1); > > if (err < 0) > > return err; > > + preallocate_buffer(chip, as->pcm, stream); > > init_substream(as, stream, fp); > > return 0; > > } > > @@ -2356,6 +2375,7 @@ static int add_audio_endpoint(struct snd_usb_audio *chip, int stream, struct aud > > else > > strcpy(pcm->name, "USB Audio"); > > > > + preallocate_buffer(chip, pcm, stream); > > init_substream(as, stream, fp); > > > > list_add(&as->list, &chip->pcm_list); > > From benh@kernel.crashing.org Fri Jan 15 07:51:07 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 15 Jan 2010 07:51:11 +0100 (CET) Received: from gate.crashing.org ([63.228.1.57]:52433 "EHLO gate.crashing.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491192Ab0AOGvH (ORCPT ); Fri, 15 Jan 2010 07:51:07 +0100 Received: from [IPv6:::1] (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id o0F6ooMT030152; Fri, 15 Jan 2010 00:50:51 -0600 Subject: Re: [PATCH 0/5] PCM mmap (temporary) fixes for non-coherent architectures From: Benjamin Herrenschmidt To: Takashi Iwai Cc: Andreas Mohr , alsa-devel@alsa-project.org, Ralf Baechle , Wu Zhangjin , Thomas Bogendoerfer , linux-mips@linux-mips.org, Kumar Gala , Becky Bruce In-Reply-To: References: <1259248388-20095-1-git-send-email-tiwai@suse.de> <20100101193130.GA21510@rhlx01.hs-esslingen.de> <1263526082.724.395.camel@pasglop> Content-Type: text/plain; charset="UTF-8" Date: Fri, 15 Jan 2010 17:50:49 +1100 Message-ID: <1263538249.724.405.camel@pasglop> Mime-Version: 1.0 X-Mailer: Evolution 2.28.1 Content-Transfer-Encoding: 7bit X-archive-position: 25593 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: benh@kernel.crashing.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 10013 Content-Length: 832 Lines: 26 On Fri, 2010-01-15 at 07:43 +0100, Takashi Iwai wrote: > > > It -might- be worth looking at adding code to the USB stack to > propagate > > the parent device dma_ops down to USB devices... hard to tell. > > Or we may simply need to drop the mmap support on such > architectures... Nah, that would suck since that includes x86 nowadays :-) I think you probably need to separate the struct device * used for DMA (it could be default be the same as the "main" struct device tho or it could default to NULL which means no mmap support). USB could (if not already) provide an accessor to obtain the HC's struct device for such mappings. We'll have to discuss that with Alan Stern I suppose. The USB Audio or similar drivers could then use that accessors to fill up Alsa's dma_device field to replace the "default". Cheers, Ben. From acmay@acmay.org Fri Jan 15 08:29:16 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 15 Jan 2010 08:29:20 +0100 (CET) Received: from biz61.inmotionhosting.com ([74.124.219.59]:49737 "EHLO biz61.inmotionhosting.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491138Ab0AOH3Q (ORCPT ); Fri, 15 Jan 2010 08:29:16 +0100 Received: from orthoptera.viasat.com ([199.106.52.17] helo=mud) by biz61.inmotionhosting.com with esmtpsa (TLSv1:AES128-SHA:128) (Exim 4.69) (envelope-from ) id 1NVgcB-0000jt-VM; Thu, 14 Jan 2010 23:29:04 -0800 Date: Thu, 14 Jan 2010 23:29:00 -0800 From: Andrew May To: David Daney Cc: ralf@linux-mips.org, linux-mips@linux-mips.org, netdev@vger.kernel.org, gregkh@suse.de Subject: Re: [PATCH 7/7] Staging: Octeon Ethernet: Use constants from in.h Message-ID: <20100114232900.55111058@mud> In-Reply-To: <1262891106-32146-7-git-send-email-ddaney@caviumnetworks.com> References: <4B463005.8060505@caviumnetworks.com> <1262891106-32146-7-git-send-email-ddaney@caviumnetworks.com> X-Mailer: Claws Mail 3.7.4 (GTK+ 2.18.5; i486-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - biz61.inmotionhosting.com X-AntiAbuse: Original Domain - linux-mips.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - acmay.org X-archive-position: 25594 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: acmay@acmay.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 10019 Content-Length: 1911 Lines: 46 On Thu, 7 Jan 2010 11:05:06 -0800 David Daney wrote: > Signed-off-by: David Daney > --- > drivers/staging/octeon/ethernet-defines.h | 3 --- > drivers/staging/octeon/ethernet-tx.c | 8 ++++---- > 2 files changed, 4 insertions(+), 7 deletions(-) > > diff --git a/drivers/staging/octeon/ethernet-defines.h > b/drivers/staging/octeon/ethernet-defines.h index 9c4910e..00a8561 > 100644 --- a/drivers/staging/octeon/ethernet-defines.h > +++ b/drivers/staging/octeon/ethernet-defines.h > @@ -98,9 +98,6 @@ > #define MAX_SKB_TO_FREE 10 > #define MAX_OUT_QUEUE_DEPTH 1000 > > -#define IP_PROTOCOL_TCP 6 > -#define IP_PROTOCOL_UDP 0x11 > - > #define FAU_NUM_PACKET_BUFFERS_TO_FREE (CVMX_FAU_REG_END - > sizeof(uint32_t)) #define TOTAL_NUMBER_OF_PORTS > (CVMX_PIP_NUM_INPUT_PORTS+1) > diff --git a/drivers/staging/octeon/ethernet-tx.c > b/drivers/staging/octeon/ethernet-tx.c index bc67e41..62258bd 100644 > --- a/drivers/staging/octeon/ethernet-tx.c > +++ b/drivers/staging/octeon/ethernet-tx.c > @@ -359,8 +359,8 @@ dont_put_skbuff_in_hw: > if (USE_HW_TCPUDP_CHECKSUM && (skb->protocol == > htons(ETH_P_IP)) && (ip_hdr(skb)->version == 4) && (ip_hdr(skb)->ihl > == 5) && ((ip_hdr(skb)->frag_off == 0) || (ip_hdr(skb)->frag_off == 1 > << 14)) > - && ((ip_hdr(skb)->protocol == IP_PROTOCOL_TCP) > - || (ip_hdr(skb)->protocol == IP_PROTOCOL_UDP))) { > + && ((ip_hdr(skb)->protocol == IPPROTO_TCP) > + || (ip_hdr(skb)->protocol == IPPROTO_UDP))) { > /* Use hardware checksum calc */ > pko_command.s.ipoffp1 = sizeof(struct ethhdr) + 1; > } Why isn't skb->ip_summed checked here instead? It seems like the csum calculation needs to be skipped by the stack if this is actually going to help performance. And does this end up re-writing a bad checksum on a routed packet, back to being a good checksum? From wuzhangjin@gmail.com Fri Jan 15 08:31:53 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 15 Jan 2010 08:31:57 +0100 (CET) Received: from mail-yw0-f182.google.com ([209.85.211.182]:60832 "EHLO mail-yw0-f182.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491138Ab0AOHbx (ORCPT ); Fri, 15 Jan 2010 08:31:53 +0100 Received: by ywh12 with SMTP id 12so338461ywh.21 for ; Thu, 14 Jan 2010 23:31:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer; bh=OICIwg5t47Lim9/mHpgdjBIuBwRSSyZpgaJkXP3S0rM=; b=yFHQ+7ADs8hCIrd7XyN261umcS2WE6S2IsCFZW3LWCWgST53QeRgLcnIZYLpDH10Ot j6cNJynDzBFXFHIelNFddgeS7TvlWNi0CiuSa/JAy3/tM6Wts465mX+8euUat3U4JLDm EEgboSSZb3Zy7k1xutTl6xFsh1BwUKAuAX18Q= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; b=kMXdU7RuzfhpkXoWhCu6BxmIkz+Zmg96W+DdVAYkN7Fc4WrN+uQZAY7K147V+bj6lx ELn+CikGRnqiAtrZ5ZlCNhOymVbtI4WuSMjZQMLe0XA3dyHy1kEKOx3DtDUE6hkZk0/f e5jefIos0KFbXEwURD0hqHSetEC7Mi6ZwetGU= Received: by 10.91.193.19 with SMTP id v19mr2120088agp.4.1263540706956; Thu, 14 Jan 2010 23:31:46 -0800 (PST) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id 23sm1223653iwn.11.2010.01.14.23.31.44 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 14 Jan 2010 23:31:46 -0800 (PST) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips@linux-mips.org, Wu Zhangjin Subject: [PATCH] MIPS: Add support of LZO-compressed kernels Date: Fri, 15 Jan 2010 15:31:16 +0800 Message-Id: <1263540676-26295-1-git-send-email-wuzhangjin@gmail.com> X-Mailer: git-send-email 1.6.5.6 X-archive-position: 25595 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 10020 Content-Length: 1926 Lines: 58 The commit "lib: add support for LZO-compressed kernels" has been merged into linus' 2.6.33-rc4 tree, so, It is time to add the support for MIPS. NOTE: to enable this support, the lzop application is needed. Signed-off-by: Wu Zhangjin --- arch/mips/Kconfig | 1 + arch/mips/boot/compressed/Makefile | 2 ++ arch/mips/boot/compressed/decompress.c | 4 ++++ 3 files changed, 7 insertions(+), 0 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 9541171..8b5d174 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1311,6 +1311,7 @@ config SYS_SUPPORTS_ZBOOT select HAVE_KERNEL_GZIP select HAVE_KERNEL_BZIP2 select HAVE_KERNEL_LZMA + select HAVE_KERNEL_LZO config SYS_SUPPORTS_ZBOOT_UART16550 bool diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile index 671d344..e3c93f8 100644 --- a/arch/mips/boot/compressed/Makefile +++ b/arch/mips/boot/compressed/Makefile @@ -41,9 +41,11 @@ $(obj)/vmlinux.bin: $(KBUILD_IMAGE) suffix_$(CONFIG_KERNEL_GZIP) = gz suffix_$(CONFIG_KERNEL_BZIP2) = bz2 suffix_$(CONFIG_KERNEL_LZMA) = lzma +suffix_$(CONFIG_KERNEL_LZO) = lzo tool_$(CONFIG_KERNEL_GZIP) = gzip tool_$(CONFIG_KERNEL_BZIP2) = bzip2 tool_$(CONFIG_KERNEL_LZMA) = lzma +tool_$(CONFIG_KERNEL_LZO) = lzo $(obj)/vmlinux.$(suffix_y): $(obj)/vmlinux.bin $(call if_changed,$(tool_y)) diff --git a/arch/mips/boot/compressed/decompress.c b/arch/mips/boot/compressed/decompress.c index e48fd72..55d02b3 100644 --- a/arch/mips/boot/compressed/decompress.c +++ b/arch/mips/boot/compressed/decompress.c @@ -77,6 +77,10 @@ void *memset(void *s, int c, size_t n) #include "../../../../lib/decompress_unlzma.c" #endif +#ifdef CONFIG_KERNEL_LZO +#include "../../../../lib/decompress_unlzo.c" +#endif + void decompress_kernel(unsigned long boot_heap_start) { int zimage_size; -- 1.6.5.6 From tiwai@suse.de Fri Jan 15 08:32:24 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 15 Jan 2010 08:32:29 +0100 (CET) Received: from cantor2.suse.de ([195.135.220.15]:60108 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491138Ab0AOHcY (ORCPT ); Fri, 15 Jan 2010 08:32:24 +0100 Received: from relay2.suse.de (charybdis-ext.suse.de [195.135.221.2]) by mx2.suse.de (Postfix) with ESMTP id AD77B79727; Fri, 15 Jan 2010 08:32:23 +0100 (CET) Date: Fri, 15 Jan 2010 08:32:23 +0100 Message-ID: From: Takashi Iwai To: Benjamin Herrenschmidt Cc: Andreas Mohr , alsa-devel@alsa-project.org, Ralf Baechle , Wu Zhangjin , Thomas Bogendoerfer , linux-mips@linux-mips.org, Kumar Gala , Becky Bruce Subject: Re: [PATCH 0/5] PCM mmap (temporary) fixes for non-coherent architectures In-Reply-To: <1263538249.724.405.camel@pasglop> References: <1259248388-20095-1-git-send-email-tiwai@suse.de> <20100101193130.GA21510@rhlx01.hs-esslingen.de> <1263526082.724.395.camel@pasglop> <1263538249.724.405.camel@pasglop> User-Agent: Wanderlust/2.15.6 (Almost Unreal) SEMI/1.14.6 (Maruoka) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.7 Emacs/23.1 (x86_64-suse-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-Type: text/plain; charset=US-ASCII X-archive-position: 25596 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiwai@suse.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 10021 Content-Length: 1399 Lines: 40 At Fri, 15 Jan 2010 17:50:49 +1100, Benjamin Herrenschmidt wrote: > > On Fri, 2010-01-15 at 07:43 +0100, Takashi Iwai wrote: > > > > > It -might- be worth looking at adding code to the USB stack to > > propagate > > > the parent device dma_ops down to USB devices... hard to tell. > > > > Or we may simply need to drop the mmap support on such > > architectures... > > Nah, that would suck since that includes x86 nowadays :-) Ah, no, I meant about non-coherent architectures that can't use vmalloc pages as the intermediate buffer. Dropping mmap for x86 would be a big regression ;) > I think you probably need to separate the struct device * used for DMA > (it could be default be the same as the "main" struct device tho or it > could default to NULL which means no mmap support). > > USB could (if not already) provide an accessor to obtain the HC's struct > device for such mappings. We'll have to discuss that with Alan Stern I > suppose. > > The USB Audio or similar drivers could then use that accessors to fill > up Alsa's dma_device field to replace the "default". The situation of usb-audio is, unfortunately, a bit more complex because the driver needs a continuous ring-buffer. The packet data are copied from that intermediate buffer on demand. This isn't efficient, but the continuous ring-buffer is demanded by the current API design exported as mmap. thanks, Takashi From sshtylyov@ru.mvista.com Fri Jan 15 11:30:45 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 15 Jan 2010 11:30:48 +0100 (CET) Received: from gateway-1237.mvista.com ([206.112.117.35]:11883 "HELO imap.sh.mvista.com" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with SMTP id S1492092Ab0AOKap (ORCPT ); Fri, 15 Jan 2010 11:30:45 +0100 Received: from [127.0.0.1] (unknown [10.150.0.9]) by imap.sh.mvista.com (Postfix) with SMTP id 678313EDC; Fri, 15 Jan 2010 02:30:33 -0800 (PST) Message-ID: <4B5043B2.5060009@ru.mvista.com> Date: Fri, 15 Jan 2010 13:30:10 +0300 From: Sergei Shtylyov User-Agent: Thunderbird 2.0.0.23 (Windows/20090812) MIME-Version: 1.0 To: Wu Zhangjin Cc: Ralf Baechle , linux-mips@linux-mips.org Subject: Re: [PATCH] MIPS: Add support of LZO-compressed kernels References: <1263540676-26295-1-git-send-email-wuzhangjin@gmail.com> In-Reply-To: <1263540676-26295-1-git-send-email-wuzhangjin@gmail.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-archive-position: 25597 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sshtylyov@ru.mvista.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 10090 Content-Length: 973 Lines: 31 Hello. Wu Zhangjin wrote: > The commit "lib: add support for LZO-compressed kernels" has been merged > into linus' 2.6.33-rc4 tree, so, It is time to add the support for MIPS. > > NOTE: to enable this support, the lzop application is needed. > > Signed-off-by: Wu Zhangjin > [...] > diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile > index 671d344..e3c93f8 100644 > --- a/arch/mips/boot/compressed/Makefile > +++ b/arch/mips/boot/compressed/Makefile > @@ -41,9 +41,11 @@ $(obj)/vmlinux.bin: $(KBUILD_IMAGE) > suffix_$(CONFIG_KERNEL_GZIP) = gz > suffix_$(CONFIG_KERNEL_BZIP2) = bz2 > suffix_$(CONFIG_KERNEL_LZMA) = lzma > +suffix_$(CONFIG_KERNEL_LZO) = lzo > tool_$(CONFIG_KERNEL_GZIP) = gzip > tool_$(CONFIG_KERNEL_BZIP2) = bzip2 > tool_$(CONFIG_KERNEL_LZMA) = lzma > +tool_$(CONFIG_KERNEL_LZO) = lzo > You should align "lzo" with the rest of the suffixes/tool names. WBR, Sergei From wuzhangjin@gmail.com Fri Jan 15 13:27:25 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 15 Jan 2010 13:27:29 +0100 (CET) Received: from mail-pz0-f197.google.com ([209.85.222.197]:57639 "EHLO mail-pz0-f197.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492369Ab0AOM1Z (ORCPT ); Fri, 15 Jan 2010 13:27:25 +0100 Received: by pzk35 with SMTP id 35so580124pzk.22 for ; Fri, 15 Jan 2010 04:27:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:subject:from:reply-to:to:cc :in-reply-to:references:content-type:organization:date:message-id :mime-version:x-mailer:content-transfer-encoding; bh=U6Ncxlgl9QDilK26B5rkuwQAPolraWDMdeHhHAqlNjg=; b=muHnLl/598om8icSJiTaDjLvvHOadAim59xQ5EGM2/TZdxmMui4HKcDTojP58yqztS t51+RKmTPITLKuuBF9IR9H9EARe1IE38VZpqcpKXaogbUGUSl0jPGieHRCNB9qrfH/Ts 2b4CpOx16Aq3Gn49E7VQHighASSGzBqmm8dD0= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=subject:from:reply-to:to:cc:in-reply-to:references:content-type :organization:date:message-id:mime-version:x-mailer :content-transfer-encoding; b=sXgY5qMr5KU4w39cNZekPx4J8xOVOgduM1SBGzjVJPbyBljy65/9N3fEI/hNVdLSXb XiUHoUVKUXZ83uxBodJUqEfzKJx0rF9jrTInJDljIzJegSacl77nvIYNjXaSW7vFM4U9 kGt7oCpBNW6ClMxWWy2j8Zgom1AHrGEfm/pbg= Received: by 10.142.60.3 with SMTP id i3mr1615376wfa.19.1263558437642; Fri, 15 Jan 2010 04:27:17 -0800 (PST) Received: from ?192.168.2.212? ([202.201.14.140]) by mx.google.com with ESMTPS id 22sm1372058pzk.6.2010.01.15.04.27.15 (version=TLSv1/SSLv3 cipher=RC4-MD5); Fri, 15 Jan 2010 04:27:17 -0800 (PST) Subject: Re: [PATCH] MIPS: Add support of LZO-compressed kernels From: Wu Zhangjin Reply-To: wuzhangjin@gmail.com To: Sergei Shtylyov Cc: Ralf Baechle , linux-mips@linux-mips.org In-Reply-To: <4B5043B2.5060009@ru.mvista.com> References: <1263540676-26295-1-git-send-email-wuzhangjin@gmail.com> <4B5043B2.5060009@ru.mvista.com> Content-Type: text/plain; charset="UTF-8" Organization: DSLab, Lanzhou University, China Date: Fri, 15 Jan 2010 20:26:00 +0800 Message-ID: <1263558361.12375.0.camel@falcon> Mime-Version: 1.0 X-Mailer: Evolution 2.28.1 Content-Transfer-Encoding: 7bit X-archive-position: 25598 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 10142 Content-Length: 1125 Lines: 35 On Fri, 2010-01-15 at 13:30 +0300, Sergei Shtylyov wrote: > Hello. > > Wu Zhangjin wrote: > > The commit "lib: add support for LZO-compressed kernels" has been merged > > into linus' 2.6.33-rc4 tree, so, It is time to add the support for MIPS. > > > > NOTE: to enable this support, the lzop application is needed. > > > > Signed-off-by: Wu Zhangjin > > > [...] > > diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile > > index 671d344..e3c93f8 100644 > > --- a/arch/mips/boot/compressed/Makefile > > +++ b/arch/mips/boot/compressed/Makefile > > @@ -41,9 +41,11 @@ $(obj)/vmlinux.bin: $(KBUILD_IMAGE) > > suffix_$(CONFIG_KERNEL_GZIP) = gz > > suffix_$(CONFIG_KERNEL_BZIP2) = bz2 > > suffix_$(CONFIG_KERNEL_LZMA) = lzma > > +suffix_$(CONFIG_KERNEL_LZO) = lzo > > tool_$(CONFIG_KERNEL_GZIP) = gzip > > tool_$(CONFIG_KERNEL_BZIP2) = bzip2 > > tool_$(CONFIG_KERNEL_LZMA) = lzma > > +tool_$(CONFIG_KERNEL_LZO) = lzo > > > > You should align "lzo" with the rest of the suffixes/tool names. > Done, will resend it later. Thanks! Wu Zhangjin From wuzhangjin@gmail.com Fri Jan 15 13:35:17 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 15 Jan 2010 13:35:21 +0100 (CET) Received: from mail-pz0-f197.google.com ([209.85.222.197]:36375 "EHLO mail-pz0-f197.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492246Ab0AOMfR (ORCPT ); Fri, 15 Jan 2010 13:35:17 +0100 Received: by pzk35 with SMTP id 35so583761pzk.22 for ; Fri, 15 Jan 2010 04:35:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer; bh=3QMDt3hs/4A82/HXXzPeVFUW8Ig3GbXsMsg03TodJGk=; b=KzyvCh1kjhG4lpJvFDcdOawBGpcSzZcAEuzLx4K00S7z8A5Ta1qrUysE+RXclbYhO9 d9V78e55GE9dCul5JMyP86Cd33oULpsDOBe66pROq9NDVU0d3REaaKA4vhKcb0oUZMOL b0XtHEvrPDdFD8GCSDllo/tJhh2mKFrXo1p3Q= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; b=kUiYxBnhGU6wc3VPH4r4lfQlrP0zoomz1SdlzUqCsMeDY50HIg3gome6jq5ssPhBgV kHaisFdT4nfKdfFq6qOR3dMWq2iz5BiIYDvlL85WI7F49kfyPDstvW+cfgqqNRsygnaJ rTu+lStJT22LKpQpIpM3M9btwTilqeNwWAByw= Received: by 10.142.7.4 with SMTP id 4mr1618764wfg.12.1263558910105; Fri, 15 Jan 2010 04:35:10 -0800 (PST) Received: from localhost.localdomain ([202.201.14.140]) by mx.google.com with ESMTPS id 23sm1381641pzk.12.2010.01.15.04.35.07 (version=TLSv1/SSLv3 cipher=RC4-MD5); Fri, 15 Jan 2010 04:35:09 -0800 (PST) From: Wu Zhangjin To: Ralf Baechle Cc: linux-mips@linux-mips.org, Sergei Shtylyov , Wu Zhangjin Subject: [PATCH v1] MIPS: Add support of LZO-compressed kernels Date: Fri, 15 Jan 2010 20:34:46 +0800 Message-Id: <2efc4ca08c90ad087a2e84cadee03eb09b5268ba.1263558635.git.wuzhangjin@gmail.com> X-Mailer: git-send-email 1.6.5.6 X-archive-position: 25599 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 10144 Content-Length: 2025 Lines: 61 (Changes from v0: 'align "lzo" with the rest of the suffixes/tool names' as Sergei suggested.) The commit "lib: add support for LZO-compressed kernels" has been merged into linus' 2.6.33-rc4 tree, so, It is time to add the support for MIPS. NOTE: to enable this support, the lzop application is needed. Signed-off-by: Wu Zhangjin --- arch/mips/Kconfig | 1 + arch/mips/boot/compressed/Makefile | 2 ++ arch/mips/boot/compressed/decompress.c | 4 ++++ 3 files changed, 7 insertions(+), 0 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 9541171..8b5d174 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1311,6 +1311,7 @@ config SYS_SUPPORTS_ZBOOT select HAVE_KERNEL_GZIP select HAVE_KERNEL_BZIP2 select HAVE_KERNEL_LZMA + select HAVE_KERNEL_LZO config SYS_SUPPORTS_ZBOOT_UART16550 bool diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile index 671d344..bdcfd49 100644 --- a/arch/mips/boot/compressed/Makefile +++ b/arch/mips/boot/compressed/Makefile @@ -41,9 +41,11 @@ $(obj)/vmlinux.bin: $(KBUILD_IMAGE) suffix_$(CONFIG_KERNEL_GZIP) = gz suffix_$(CONFIG_KERNEL_BZIP2) = bz2 suffix_$(CONFIG_KERNEL_LZMA) = lzma +suffix_$(CONFIG_KERNEL_LZO) = lzo tool_$(CONFIG_KERNEL_GZIP) = gzip tool_$(CONFIG_KERNEL_BZIP2) = bzip2 tool_$(CONFIG_KERNEL_LZMA) = lzma +tool_$(CONFIG_KERNEL_LZO) = lzo $(obj)/vmlinux.$(suffix_y): $(obj)/vmlinux.bin $(call if_changed,$(tool_y)) diff --git a/arch/mips/boot/compressed/decompress.c b/arch/mips/boot/compressed/decompress.c index e48fd72..55d02b3 100644 --- a/arch/mips/boot/compressed/decompress.c +++ b/arch/mips/boot/compressed/decompress.c @@ -77,6 +77,10 @@ void *memset(void *s, int c, size_t n) #include "../../../../lib/decompress_unlzma.c" #endif +#ifdef CONFIG_KERNEL_LZO +#include "../../../../lib/decompress_unlzo.c" +#endif + void decompress_kernel(unsigned long boot_heap_start) { int zimage_size; -- 1.6.5.6 From ddaney@caviumnetworks.com Fri Jan 15 20:42:56 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 15 Jan 2010 20:43:03 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:5637 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492928Ab0AOTm4 (ORCPT ); Fri, 15 Jan 2010 20:42:56 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Fri, 15 Jan 2010 11:42:44 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 15 Jan 2010 11:41:41 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Fri, 15 Jan 2010 11:41:41 -0800 Message-ID: <4B50C4F4.60903@caviumnetworks.com> Date: Fri, 15 Jan 2010 11:41:40 -0800 From: David Daney User-Agent: Thunderbird 2.0.0.21 (X11/20090320) MIME-Version: 1.0 To: Andrew May CC: ralf@linux-mips.org, linux-mips@linux-mips.org, netdev@vger.kernel.org, gregkh@suse.de Subject: Re: [PATCH 7/7] Staging: Octeon Ethernet: Use constants from in.h References: <4B463005.8060505@caviumnetworks.com> <1262891106-32146-7-git-send-email-ddaney@caviumnetworks.com> <20100114232900.55111058@mud> In-Reply-To: <20100114232900.55111058@mud> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 15 Jan 2010 19:41:41.0186 (UTC) FILETIME=[C29CEA20:01CA961A] X-archive-position: 25600 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney@caviumnetworks.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 10385 Content-Length: 2581 Lines: 66 Andrew May wrote: > On Thu, 7 Jan 2010 11:05:06 -0800 > David Daney wrote: > >> Signed-off-by: David Daney >> --- >> drivers/staging/octeon/ethernet-defines.h | 3 --- >> drivers/staging/octeon/ethernet-tx.c | 8 ++++---- >> 2 files changed, 4 insertions(+), 7 deletions(-) >> >> diff --git a/drivers/staging/octeon/ethernet-defines.h >> b/drivers/staging/octeon/ethernet-defines.h index 9c4910e..00a8561 >> 100644 --- a/drivers/staging/octeon/ethernet-defines.h >> +++ b/drivers/staging/octeon/ethernet-defines.h >> @@ -98,9 +98,6 @@ >> #define MAX_SKB_TO_FREE 10 >> #define MAX_OUT_QUEUE_DEPTH 1000 >> >> -#define IP_PROTOCOL_TCP 6 >> -#define IP_PROTOCOL_UDP 0x11 >> - >> #define FAU_NUM_PACKET_BUFFERS_TO_FREE (CVMX_FAU_REG_END - >> sizeof(uint32_t)) #define TOTAL_NUMBER_OF_PORTS >> (CVMX_PIP_NUM_INPUT_PORTS+1) >> diff --git a/drivers/staging/octeon/ethernet-tx.c >> b/drivers/staging/octeon/ethernet-tx.c index bc67e41..62258bd 100644 >> --- a/drivers/staging/octeon/ethernet-tx.c >> +++ b/drivers/staging/octeon/ethernet-tx.c >> @@ -359,8 +359,8 @@ dont_put_skbuff_in_hw: >> if (USE_HW_TCPUDP_CHECKSUM && (skb->protocol == >> htons(ETH_P_IP)) && (ip_hdr(skb)->version == 4) && (ip_hdr(skb)->ihl >> == 5) && ((ip_hdr(skb)->frag_off == 0) || (ip_hdr(skb)->frag_off == 1 >> << 14)) >> - && ((ip_hdr(skb)->protocol == IP_PROTOCOL_TCP) >> - || (ip_hdr(skb)->protocol == IP_PROTOCOL_UDP))) { >> + && ((ip_hdr(skb)->protocol == IPPROTO_TCP) >> + || (ip_hdr(skb)->protocol == IPPROTO_UDP))) { >> /* Use hardware checksum calc */ >> pko_command.s.ipoffp1 = sizeof(struct ethhdr) + 1; >> } > > Why isn't skb->ip_summed checked here instead? That may indeed be the correct thing to do, but the main point of this particular patch is to remove local definitions that mirror definitions provided by core include files. So in order to not let 'the perfect be the enemy of the good' I think this patch should be applied. > It seems like the csum > calculation needs to be skipped by the stack if this is actually going > to help performance. FWIW: We do set NETIF_F_IP_CSUM. We are certainly open to suggestions as to how the code could be improved, so I may look at this again in the future. Patches from others are also welcome. > > And does this end up re-writing a bad checksum on a routed packet, back > to being a good checksum? Indeed it does. Actually it writes a good checksum on *all* IP packets without regard to their source. David Daney From acmay@acmay.org Sat Jan 16 06:44:32 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 16 Jan 2010 06:44:37 +0100 (CET) Received: from biz61.inmotionhosting.com ([74.124.219.59]:35084 "EHLO biz61.inmotionhosting.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491158Ab0APFoc (ORCPT ); Sat, 16 Jan 2010 06:44:32 +0100 Received: from cpe-76-88-95-122.san.res.rr.com ([76.88.95.122] helo=mud) by biz61.inmotionhosting.com with esmtpsa (TLSv1:AES128-SHA:128) (Exim 4.69) (envelope-from ) id 1NW1SQ-0008Vu-EN; Fri, 15 Jan 2010 21:44:22 -0800 Date: Fri, 15 Jan 2010 21:44:19 -0800 From: Andrew May To: David Daney Cc: ralf@linux-mips.org, linux-mips@linux-mips.org, netdev@vger.kernel.org, gregkh@suse.de Subject: Re: [PATCH 7/7] Staging: Octeon Ethernet: Use constants from in.h Message-ID: <20100115214419.39357506@mud> In-Reply-To: <4B50C4F4.60903@caviumnetworks.com> References: <4B463005.8060505@caviumnetworks.com> <1262891106-32146-7-git-send-email-ddaney@caviumnetworks.com> <20100114232900.55111058@mud> <4B50C4F4.60903@caviumnetworks.com> X-Mailer: Claws Mail 3.7.4 (GTK+ 2.18.5; i486-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - biz61.inmotionhosting.com X-AntiAbuse: Original Domain - linux-mips.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - acmay.org X-archive-position: 25601 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: acmay@acmay.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 10729 Content-Length: 2755 Lines: 65 On Fri, 15 Jan 2010 11:41:40 -0800 David Daney wrote: > Andrew May wrote: > > On Thu, 7 Jan 2010 11:05:06 -0800 > > David Daney wrote: > > > >> Signed-off-by: David Daney > >> --- > >> drivers/staging/octeon/ethernet-defines.h | 3 --- > >> drivers/staging/octeon/ethernet-tx.c | 8 ++++---- > >> 2 files changed, 4 insertions(+), 7 deletions(-) > >> > >> diff --git a/drivers/staging/octeon/ethernet-defines.h > >> b/drivers/staging/octeon/ethernet-defines.h index 9c4910e..00a8561 > >> 100644 --- a/drivers/staging/octeon/ethernet-defines.h > >> +++ b/drivers/staging/octeon/ethernet-defines.h > >> @@ -98,9 +98,6 @@ > >> #define MAX_SKB_TO_FREE 10 > >> #define MAX_OUT_QUEUE_DEPTH 1000 > >> > >> -#define IP_PROTOCOL_TCP 6 > >> -#define IP_PROTOCOL_UDP 0x11 > >> - > >> #define FAU_NUM_PACKET_BUFFERS_TO_FREE (CVMX_FAU_REG_END - > >> sizeof(uint32_t)) #define TOTAL_NUMBER_OF_PORTS > >> (CVMX_PIP_NUM_INPUT_PORTS+1) > >> diff --git a/drivers/staging/octeon/ethernet-tx.c > >> b/drivers/staging/octeon/ethernet-tx.c index bc67e41..62258bd > >> 100644 --- a/drivers/staging/octeon/ethernet-tx.c > >> +++ b/drivers/staging/octeon/ethernet-tx.c > >> @@ -359,8 +359,8 @@ dont_put_skbuff_in_hw: > >> if (USE_HW_TCPUDP_CHECKSUM && (skb->protocol == > >> htons(ETH_P_IP)) && (ip_hdr(skb)->version == 4) && > >> (ip_hdr(skb)->ihl == 5) && ((ip_hdr(skb)->frag_off == 0) || > >> (ip_hdr(skb)->frag_off == 1 << 14)) > >> - && ((ip_hdr(skb)->protocol == IP_PROTOCOL_TCP) > >> - || (ip_hdr(skb)->protocol == IP_PROTOCOL_UDP))) { > >> + && ((ip_hdr(skb)->protocol == IPPROTO_TCP) > >> + || (ip_hdr(skb)->protocol == IPPROTO_UDP))) { > >> /* Use hardware checksum calc */ > >> pko_command.s.ipoffp1 = sizeof(struct ethhdr) + 1; > >> } > > > > Why isn't skb->ip_summed checked here instead? > > That may indeed be the correct thing to do, but the main point of > this particular patch is to remove local definitions that mirror > definitions provided by core include files. > > So in order to not let 'the perfect be the enemy of the good' I think > this patch should be applied. I am not against the patch being applied. I also don't think I have any sort of influence to get it rejected. But in seeing the code it is just something that jumps out at me, and I wanted to make sure I wasn't missing something else. > Indeed it does. Actually it writes a good checksum on *all* IP > packets without regard to their source. That seems like a very bad thing. Maybe the entire section of code should be removed along with the defines for now. I don't actually have one of these chips at home to play with and test. From wuzhangjin@gmail.com Mon Jan 18 08:55:15 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 18 Jan 2010 08:55:19 +0100 (CET) Received: from mail-gx0-f227.google.com ([209.85.217.227]:43890 "EHLO mail-gx0-f227.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1491900Ab0ARHzP (ORCPT ); Mon, 18 Jan 2010 08:55:15 +0100 Received: by gxk27 with SMTP id 27so2324702gxk.7 for ; Sun, 17 Jan 2010 23:55:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:subject:from:reply-to:to:cc :in-reply-to:references:content-type:organization:date:message-id :mime-version:x-mailer:content-transfer-encoding; bh=+RGh275zXWQT/esBsOaDMxfhftGqOP3KboyDLzLbjrA=; b=cgG8xV7izVLyxaDqAi4trbu7+a1rdifHJ6zqh4toyYYJ3mPidHssh0YK6N3SgwBEyH XpVLUW/hweg6nLCui6yrLWIt5tSTJr3pArYwqM2Gts2/lefZh5Uw8kgKNT5eO2Vglacq B8P7NHmo3B822sAXOPqT3zvmdRzhQVGAH4XbQ= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=subject:from:reply-to:to:cc:in-reply-to:references:content-type :organization:date:message-id:mime-version:x-mailer :content-transfer-encoding; b=wTdmj+6mYckSR5kMI7ZeK7DlpQ/ohLLOowPx0PIGnRAzxRPCWT1Al++Gp9zcXHiI+x RNbc+o7D48UPiPGbNifOEP6H0ovYRkK1Y78Hwh2RhfuUt8Alj3q98cIHViqhfqXgqSUE Ux2uD1TUKsaJ9v6BQvjyLX61sYmZR7C47M+KA= Received: by 10.101.211.37 with SMTP id n37mr9090935anq.82.1263801309234; Sun, 17 Jan 2010 23:55:09 -0800 (PST) Received: from ?192.168.2.212? ([202.201.14.140]) by mx.google.com with ESMTPS id 21sm4288127iwn.6.2010.01.17.23.55.05 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sun, 17 Jan 2010 23:55:07 -0800 (PST) Subject: Re: [PATCH v6] MIPS: Add a high resolution sched_clock() via cnt32_to_63(). From: Wu Zhangjin Reply-To: wuzhangjin@gmail.com To: Ralf Baechle Cc: Sergei Shtylyov , David Daney , Thomas Gleixner , linux-mips@linux-mips.org In-Reply-To: <1259319110-16107-1-git-send-email-wuzhangjin@gmail.com> References: <1259319110-16107-1-git-send-email-wuzhangjin@gmail.com> Content-Type: text/plain; charset="UTF-8" Organization: DSLab, Lanzhou University, China Date: Mon, 18 Jan 2010 15:54:44 +0800 Message-ID: <1263801284.11671.50.camel@falcon> Mime-Version: 1.0 X-Mailer: Evolution 2.28.1 Content-Transfer-Encoding: 7bit X-archive-position: 25602 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wuzhangjin@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 11580 Content-Length: 5382 Lines: 167 If the processor support dynamic cpu frequency and the support is enabled in kernel, this sched_clock() implementation will be broken(and If the frequency of the MIPS CP0 counter is related to the cpu's frequency). So, some extra resitrictions should be added to it. arch/mips/Kconfig config CPU_HAS_FIXED_CP0_COUNTER bool config SYS_SUPPORTS_HRES_SCHED_CLOCK bool depends on CPU_HAS_FIXED_CP0_COUNTER || !CPU_FREQ arch/mips/kernel/csrc-r4k.c #ifdef SYS_SUPPORTS_HRES_SCHED_CLOCK /* The high resolution version of sched_clock() */ #endif And I'm not sure whether the cavium octeon support dynamic cpu frequency, if yes, it's high resolution version of sched_clock() also should be wrapped with the above macro to ensure it is not broken: arch/mips/cavium-octeon/csrc-octeon.c Regards, Wu Zhangjin On Fri, 2009-11-27 at 18:51 +0800, Wu Zhangjin wrote: > From: Wu Zhangjin > > (The changes of this v6 revision from v5 revision: > > o hard-codes the cycle2ns_scale_factor as 8 for 30(cs->shift) is too > big. With 30, the return value of sched_clock() will also overflow quickly. > o moves the sched_clock() back into csrc-r4k.c as David and Sergei > recommended. > o inits c0 count as zero for PRINTK_TIME=y. > o drops the HR_SCHED_CLCOK option for the current sched_clock() is stable > enough to replace the jiffies based one. > ) > > This patch adds a cnt32_to_63() and MIPS c0 count based sched_clock(), > which provides high resolution. > > Without it, the Ftrace for MIPS will give useless timestamp information. > > Because cnt32_to_63() needs to be called at least once per half period > to work properly, Differ from the old version, this v2 revision set up a > kernel timer to ensure the requirement of some MIPSs which have short c0 > count period. > > And also, we init the c0 count as ZERO(just as jiffies does) in > time_init() before plat_time_init(), without it, PRINTK_TIME=y will get > wrong timestamp information. (NOTE: some platforms have initiazlied c0 > count as zero, but some not, this may introduce some duplication, > perhaps a new patch is needed to remove the initialized of c0 count in > the platforms later?) > > This is originally from arch/arm/plat-orion/time.c > > This revision works well for function graph tracer now, and also, > PRINTK_TIME=y will get normal timestamp informatin. > > Signed-off-by: Wu Zhangjin > --- > arch/mips/kernel/csrc-r4k.c | 54 +++++++++++++++++++++++++++++++++++++++++++ > arch/mips/kernel/time.c | 3 ++ > 2 files changed, 57 insertions(+), 0 deletions(-) > > diff --git a/arch/mips/kernel/csrc-r4k.c b/arch/mips/kernel/csrc-r4k.c > index e95a3cd..12755f2 100644 > --- a/arch/mips/kernel/csrc-r4k.c > +++ b/arch/mips/kernel/csrc-r4k.c > @@ -6,10 +6,62 @@ > * Copyright (C) 2007 by Ralf Baechle > */ > #include > +#include > #include > +#include > > #include > > +/* > + * MIPS sched_clock implementation. > + * > + * Because the hardware timer period is quite short and because cnt32_to_63() > + * needs to be called at least once per half period to work properly, a kernel > + * timer is set up to ensure this requirement is always met. > + * > + * Please refer to include/linux/cnt32_to_63.h and arch/arm/plat-orion/time.c > + */ > +#define CLOCK2NS_SCALE_FACTOR 8 > + > +static unsigned long clock2ns_scale; > + > +unsigned long long notrace sched_clock(void) > +{ > + unsigned long long v = cnt32_to_63(read_c0_count()); > + return (v * clock2ns_scale) >> CLOCK2NS_SCALE_FACTOR; > +} > + > +static struct timer_list cnt32_to_63_keepwarm_timer; > + > +static void cnt32_to_63_keepwarm(unsigned long data) > +{ > + mod_timer(&cnt32_to_63_keepwarm_timer, round_jiffies(jiffies + data)); > + sched_clock(); > +} > + > +static void __init setup_hres_sched_clock(unsigned long clock) > +{ > + unsigned long long v; > + unsigned long data; > + > + v = NSEC_PER_SEC; > + v <<= CLOCK2NS_SCALE_FACTOR; > + v += clock/2; > + do_div(v, clock); > + /* > + * We want an even value to automatically clear the top bit > + * returned by cnt32_to_63() without an additional run time > + * instruction. So if the LSB is 1 then round it up. > + */ > + if (v & 1) > + v++; > + clock2ns_scale = v; > + > + data = 0x80000000UL / clock * HZ; > + setup_timer(&cnt32_to_63_keepwarm_timer, cnt32_to_63_keepwarm, data); > + mod_timer(&cnt32_to_63_keepwarm_timer, round_jiffies(jiffies + data)); > +} > + > static cycle_t c0_hpt_read(struct clocksource *cs) > { > return read_c0_count(); > @@ -27,6 +79,8 @@ int __init init_r4k_clocksource(void) > if (!cpu_has_counter || !mips_hpt_frequency) > return -ENXIO; > > + setup_hres_sched_clock(mips_hpt_frequency); > + > /* Calculate a somewhat reasonable rating value */ > clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000; > > diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c > index 1f467d5..4b5e93c 100644 > --- a/arch/mips/kernel/time.c > +++ b/arch/mips/kernel/time.c > @@ -152,6 +152,9 @@ static __init int cpu_has_mfc0_count_bug(void) > > void __init time_init(void) > { > + if (!mips_clockevent_init() || !cpu_has_mfc0_count_bug()) > + write_c0_count(0); > + > plat_time_init(); > > if (!mips_clockevent_init() || !cpu_has_mfc0_count_bug()) From Anoop_P.A@pmc-sierra.com Mon Jan 18 16:57:31 2010 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 18 Jan 2010 16:57:36 +0100 (CET) Received: from bby1mta03.pmc-sierra.com ([216.241.235.118]:42817 "EHLO bby1mta03.pmc-sierra.bc.ca" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1492865Ab0ARP5b (ORCPT ); Mon, 18 Jan 2010 16:57:31 +0100 Received: from bby1mta03.pmc-sierra.bc.ca (localhost.pmc-sierra.bc.ca [127.0.0.1]) by localhost (Postfix) with SMTP id C6BD11070071; Mon, 18 Jan 2010 07:57:14 -0800 (PST) Received: from bby1exg02.pmc_nt.nt.pmc-sierra.bc.ca (BBY1EXG02.pmc-sierra.bc.ca [216.241.231.167]) by bby1mta03.pmc-sierra.bc.ca (Postfix) with SMTP id 7F717107006A; Mon, 18 Jan 2010 07:57:14 -0800 (PST) Received: from BBY1EXM11.pmc_nt.nt.pmc-sierra.bc.ca ([216.241.231.159]) by bby1exg02.pmc_nt.nt.pmc-sierra.bc.ca with Microsoft SMTPSVC(6.0.3790.3959); Mon, 18 Jan 2010 07:57:29 -0800 X-MimeOLE: Produced By Microsoft Exchange V6.5 Content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----_=_NextPart_001_01CA9856.E68A60C6" Subject: RE: Help in enabling HIGHMEM support / 64 bit support Date: Mon, 18 Jan 2010 07:57:06 -0800 Message-ID: In-Reply-To: <20091214173509.GB15067@linux-mips.org> X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: Help in enabling HIGHMEM support / 64 bit support Thread-Index: Acp848y7wxTUpEk6QWCQk4x5wrla0wbbQfEg References: <20091214173509.GB15067@linux-mips.org> From: "Anoop P.A." To: "Ralf Baechle" Cc: X-OriginalArrivalTime: 18 Jan 2010 15:57:29.0753 (UTC) FILETIME=[F02C6090:01CA9856] X-archive-position: 25603 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: Anoop_P.A@pmc-sierra.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 11820 Content-Length: 725036 Lines: 9479 This is a multi-part message in MIME format. ------_=_NextPart_001_01CA9856.E68A60C6 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: quoted-printable List=20 I am working on enabling Highmem support and 64 Bit support 1. 64 Bit support As Ralf suggested I have tried enabling 64 bit support. I have reached up to a point where I can boot the kernel with 512MB memory (logs attached). How ever if I increase mem above > 512 I am not even getting single print from kernel.=20 I am blocked at this point. I will appreciate if any body can point me to a most likely issue that I am hitting. BTW I am running kernel 2.6.18 2. Highmem=20 I have tried enabling highmem. And I could boot till mounting root file system. I have tried mounting RFS from a usb disk as well as NFS mount. Both the cases fails (attaching logs).=20 Let me know if you guys need any further info for giving me some pointers Regards Anoop -----Original Message----- From: Ralf Baechle [mailto:ralf@linux-mips.org]=20 Sent: Monday, December 14, 2009 11:05 PM To: Anoop P.A. Cc: linux-mips@linux-mips.org Subject: Re: Help in enabling HIGHMEM support On Mon, Dec 14, 2009 at 05:34:13AM -0800, Anoop P.A. wrote: > We have a requirement to use a bigger RAM (1 GB / 2GB) with a RM9000 > based SOC. I thought of going with HIGHMEM path rather than enabling > 64bit support thinking it will be easier. This sounds like sawing off 32 legs just to be able to make use of a free [1] wheelchair. > I have tried enabling HIGMEM in kernel. Board boots fine with a 512 MB > RAM plugged in. But if I connect a 1 GB RAM kernel will not boot. I am > not even getting single print from kernel. I am using linux-2.6.18 > kernel. >=20 > It will be great if get any pointers suggestions in debugging this? With this amount of RAM, use a 64-bit kernel if you can. You'll be happy not to know about all the headaches you will never encounter. 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