From alex@alexlab.net Thu Nov  1 01:46:13 2007
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Date:	Thu, 1 Nov 2007 10:46:01 +0900
From:	"Hyon Lim" <alex@alexlab.net>
To:	"Andrew Dyer" <adyer@righthandtech.com>
Subject: Re: implementation of software suspend on MIPS. (system log)
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To:	Hyon Lim <alex@alexlab.net>
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Subject: Re: implementation of software suspend on MIPS. (system log)
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On Thu, 1 Nov 2007, Hyon Lim wrote:

> Yes. you're right. I did same as you said.
> However, is there any options for disassembly with variable name?
> Often I cannot find that variable's allocated register.
> There is only r0,r1... but I want a comment for variable assignment 
> status.

I just have to ask the question, but is it really necessary to code the 
whole thing in assembly?  I understand that the interface probably does 
need to be, but the main body of the function?  If it's very large or 
complicated, it would seem simpler to use C and write assembly glue to 
pull it all together rather than trying to debug hand assembly.  Many of 
us here have spent hours before tracking down problems with stale data in 
branch delay slots.  The compiler is a tad more convienient.

Regards,

-S-


From alex@alexlab.net Thu Nov  1 09:12:09 2007
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From tsbogend@alpha.franken.de Thu Nov  1 10:39:54 2007
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To:	linux-mips@linux-mips.org
Cc:	ralf@linux-mips.org
Subject: [PATCH] SNI: register a02r clockevent; don't use PIT timer
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Register A20R clockevent
Remove PIT timer setup because it doesn't work 

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---

diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c
index 60bc62e..6f339af 100644
--- a/arch/mips/sni/time.c
+++ b/arch/mips/sni/time.c
@@ -1,6 +1,7 @@
 #include <linux/types.h>
 #include <linux/interrupt.h>
 #include <linux/time.h>
+#include <linux/clockchips.h>
 
 #include <asm/i8253.h>
 #include <asm/sni.h>
@@ -80,7 +81,7 @@ static void __init sni_a20r_timer_setup(void)
 	unsigned int cpu = smp_processor_id();
 
 	cd->cpumask             = cpumask_of_cpu(cpu);
-
+	clockevents_register_device(cd);
 	action->dev_id = cd;
 	setup_irq(SNI_A20R_IRQ_TIMER, &a20r_irqaction);
 }
@@ -169,8 +170,6 @@ void __init plat_time_init(void)
 
 	mips_hpt_frequency = r4k_tick * HZ;
 
-	setup_pit_timer();
-
 	switch (sni_brd_type) {
 	case SNI_BRD_10:
 	case SNI_BRD_10NEW:


-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea.                                                [ RFC1925, 2.3 ]

From yoichi_yuasa@tripeaks.co.jp Thu Nov  1 12:30:46 2007
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To:	Ralf Baechle <ralf@linux-mips.org>
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Subject: [PATCH][MIPS] bcm47xx: remove unneeded clear_c0_status()
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Remove unneeded clear_c0_status().
irq_cpu routines take care of it.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>

diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/bcm47xx/irq.c mips/arch/mips/bcm47xx/irq.c
--- mips-orig/arch/mips/bcm47xx/irq.c	2007-10-26 23:35:58.630600250 +0900
+++ mips/arch/mips/bcm47xx/irq.c	2007-10-26 23:40:22.587096500 +0900
@@ -33,8 +33,6 @@ void plat_irq_dispatch(void)
 
 	cause = read_c0_cause() & read_c0_status() & CAUSEF_IP;
 
-	clear_c0_status(cause);
-
 	if (cause & CAUSEF_IP7)
 		do_IRQ(7);
 	if (cause & CAUSEF_IP2)

From yoichi_yuasa@tripeaks.co.jp Thu Nov  1 12:35:47 2007
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Subject: [PATCH][MIPS] clean up au1xxx_irqmap.c include files
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Clean up au1xxx_irqmap.c include files.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>

diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/au1000/common/au1xxx_irqmap.c mips/arch/mips/au1000/common/au1xxx_irqmap.c
--- mips-orig/arch/mips/au1000/common/au1xxx_irqmap.c	2007-10-26 23:35:58.350582750 +0900
+++ mips/arch/mips/au1000/common/au1xxx_irqmap.c	2007-10-26 23:54:59.221882750 +0900
@@ -25,27 +25,10 @@
  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  *  675 Mass Ave, Cambridge, MA 02139, USA.
  */
-#include <linux/errno.h>
 #include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/kernel_stat.h>
-#include <linux/module.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <linux/timex.h>
-#include <linux/slab.h>
-#include <linux/random.h>
-#include <linux/delay.h>
-#include <linux/bitops.h>
-
-#include <asm/bootinfo.h>
-#include <asm/io.h>
-#include <asm/mipsregs.h>
-#include <asm/system.h>
-#include <asm/mach-au1x00/au1000.h>
+#include <linux/kernel.h>
+
+#include <au1000.h>
 
 /* The IC0 interrupt table.  This is processor, rather than
  * board dependent, so no reason to keep this info in the board

From alex@alexlab.net Thu Nov  1 12:36:58 2007
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From tsbogend@alpha.franken.de Thu Nov  1 12:52:35 2007
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To:	linux-mips@linux-mips.org
Cc:	ralf@linux-mips.org
Subject: [PATCH] JAZZ: disable PIT; cleanup R4030 clockevent
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PIT doesn't work, disable it completly
make r4030 clockevent code look like other mips clockevent code

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 97da953..c4f7e60 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -119,7 +119,6 @@ config MACH_JAZZ
 	select CEVT_R4K
 	select GENERIC_ISA_DMA
 	select IRQ_CPU
-	select I8253
 	select I8259
 	select ISA
 	select PCSPEAKER
diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c
index 1dac9e1..a629719 100644
--- a/arch/mips/jazz/irq.c
+++ b/arch/mips/jazz/irq.c
@@ -118,16 +118,16 @@ static void r4030_set_mode(enum clock_event_mode mode,
 struct clock_event_device r4030_clockevent = {
 	.name		= "r4030",
 	.features	= CLOCK_EVT_FEAT_PERIODIC,
-	.rating		= 100,
+	.rating		= 300,
 	.irq		= JAZZ_TIMER_IRQ,
-	.cpumask	= CPU_MASK_CPU0,
 	.set_mode	= r4030_set_mode,
 };
 
 static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id)
 {
-	r4030_clockevent.event_handler(&r4030_clockevent);
+	struct clock_event_device *cd = dev_id;
 
+	cd->event_handler(cd);
 	return IRQ_HANDLED;
 }
 
@@ -135,15 +135,22 @@ static struct irqaction r4030_timer_irqaction = {
 	.handler	= r4030_timer_interrupt,
 	.flags		= IRQF_DISABLED,
 	.mask		= CPU_MASK_CPU0,
-	.name		= "timer",
+	.name		= "R4030 timer",
 };
 
 void __init plat_time_init(void)
 {
-	struct irqaction *irq = &r4030_timer_irqaction;
+	struct clock_event_device *cd = &r4030_clockevent;
+	struct irqaction *action = &r4030_timer_irqaction;
+	unsigned int cpu = smp_processor_id();
 
 	BUG_ON(HZ != 100);
 
+	cd->cpumask             = cpumask_of_cpu(cpu);
+	clockevents_register_device(cd);
+	action->dev_id = cd;
+	setup_irq(JAZZ_TIMER_IRQ, action);
+
 	/*
 	 * Set clock to 100Hz.
 	 *
@@ -151,8 +158,4 @@ void __init plat_time_init(void)
 	 * a programmable 4-bit divider.  This makes it fairly inflexible.
 	 */
 	r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9);
-	setup_irq(JAZZ_TIMER_IRQ, irq);
-
-	clockevents_register_device(&r4030_clockevent);
-	setup_pit_timer();
 }



-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea.                                                [ RFC1925, 2.3 ]

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Date:	Thu, 1 Nov 2007 21:51:23 +0900
From:	Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
To:	Ralf Baechle <ralf@linux-mips.org>
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Subject: [PATCH][MIPS] fix Cobalt IRQ comment
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Fixed Cobalt IRQ comment.
Cobalt kernel uses CP0 counter now.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>

diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/mach-cobalt/irq.h mips/include/asm-mips/mach-cobalt/irq.h
--- mips-orig/include/asm-mips/mach-cobalt/irq.h	2007-10-27 17:13:58.239256750 +0900
+++ mips/include/asm-mips/mach-cobalt/irq.h	2007-10-27 17:17:45.905485000 +0900
@@ -35,7 +35,7 @@
  *	4 - ethernet
  *	5 - 16550 UART
  *	6 - cascade i8259
- *	7 - CP0 counter (unused)
+ *	7 - CP0 counter
  */
 #define MIPS_CPU_IRQ_BASE		16
 
@@ -48,7 +48,6 @@
 #define SCSI_IRQ			(MIPS_CPU_IRQ_BASE + 5)
 #define I8259_CASCADE_IRQ		(MIPS_CPU_IRQ_BASE + 6)
 
-
 #define GT641XX_IRQ_BASE		24
 
 #include <asm/irq_gt641xx.h>

From ralf@linux-mips.org Thu Nov  1 13:04:16 2007
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On Thu, Nov 01, 2007 at 09:30:36PM +0900, Yoichi Yuasa wrote:

> Remove unneeded clear_c0_status().
> irq_cpu routines take care of it.

Actually this write is plain nonsense; it has no effect.  The only time
acknowledging an interrupt in c0_cause is needed is for the two software
interrupts but the only user of these is SMTC.

  Ralf

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On Thu, Nov 01, 2007 at 09:35:39PM +0900, Yoichi Yuasa wrote:

> Clean up au1xxx_irqmap.c include files.

Thanks, queued up for 2.6.25.

  Ralf

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On Thu, Nov 01, 2007 at 09:51:23PM +0900, Yoichi Yuasa wrote:

> Fixed Cobalt IRQ comment.
> Cobalt kernel uses CP0 counter now.

Thanks, applied.

  Ralf

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On Thu, 1 Nov 2007, Hyon Lim wrote:

> I think the reason of assembly implementation is processor context
> replacement.

Understood.  Assembly may indeed be required for specific things like 
restoring register state or fiddling with the cache if there aren't 
already macros or functions in the kernel that do exactly what you need.

> The second reason that I thinking is calling convention of C language.

It's not uncommon at all to have assembly language glue, say between a 
BIOS callback and the C language routine that does the work.

In your original post, you mentioned tracking variables and things that 
suggested a module that does much more that just load some odd registers 
or flip around a function call stack.  If that is indeed the case, then 
for sake of maintainablility and readability, one would be strongly 
encouraged to write the core stuff in plain old C and sprinkle in assembly 
glue code as required.

Think about it this way.  MIPS is a pretty large family of CPUs, each with 
it's own strange behaviors.  Several of those people on this list spend a 
lot of time tweeking that assembly to make it work cleanly across various 
CPUs.  It's a lot easier to understand 25 lines of assembly interface code 
and 200 lines of C code, than an entire 1000 line module written in 
assembly.  It's also a lot easier when you can shove most of the work over 
to the compiler, especially if others like your work and want to 
generalize it for use on many other MIPS CPUs.

I guess the real question here is how complex do you think your code needs 
to be?  That should determine your path.

Regards,

-S-

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Hyon Lim wrote:
> I investigated kernel assembly source code in my kernel (2.6.10).
> I found that there are a lot of assembly directives (e.g., .align, .set
> reorder, .cpload, .frame etc.).
> Is there any documents which explains those directives? (not only I
> described above. All of directives)

Short of reading the assembler sourcecode I believe the best document
is "See MIPS Run Linux".


Thiemo

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From jscottkasten@yahoo.com Thu Nov  1 15:00:36 2007
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From:	"J. Scott Kasten" <jscottkasten@yahoo.com>
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To:	Hyon Lim <alex@alexlab.net>
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Subject: Re: implementation of software suspend on MIPS. (system log)
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On Thu, 1 Nov 2007, Hyon Lim wrote:

> Thank you for comments.
> The remain work of my software suspend on MIPS project is resume procedure.
> I already confirmed that suspend function was work. (See my post which
> contains system log).
>
> In an i386 implementation, there are only few assembly code for suspend and
> resume procedure.
> (You can refer :
> http://lxr.linux.no/source/arch/i386/power/swsusp.S?v=2.6.10)
> So, my work will be similar with i386 implementation. Assembly code used in
> i386 implementation are several processor context related job
> and copy saved page to memory. Instruction used in my MIPS implementation
> will be compatible to most of MIPS processor.
> Because the instruction used in implementation is very basic (store and load
> and branch).
>
> I agree your opinion related to maintainability and readability. So I
> implement my work with C and few assembly code.
> Thank you for advice.
>

I look forward to your eventual success. :)



From ralf@linux-mips.org Thu Nov  1 15:08:03 2007
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From:	Ralf Baechle <ralf@linux-mips.org>
To:	Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc:	linux-mips@linux-mips.org
Subject: Re: [PATCH] JAZZ: disable PIT; cleanup R4030 clockevent
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On Thu, Nov 01, 2007 at 01:52:36PM +0100, Thomas Bogendoerfer wrote:

> PIT doesn't work, disable it completly

I think this is the explanation:

include/asm-mips/mach-jazz/timex.h:#define CLOCK_TICK_RATE              100

while the PIT code actually expects 1193182.

Turns out that due to a recent Qemu bug which made the probe for the cp0
compare interrupt fail the Malta code did fall back from the compare timer
to the i8253 PIT for the clockevent device.  Works perfectly well.

  Ralf

From ralf@linux-mips.org Thu Nov  1 15:50:28 2007
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From:	Ralf Baechle <ralf@linux-mips.org>
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Subject: Re: [PATCH] SNI: register a02r clockevent; don't use PIT timer
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On Thu, Nov 01, 2007 at 11:36:42AM +0100, Thomas Bogendoerfer wrote:

> Register A20R clockevent
> Remove PIT timer setup because it doesn't work 
> 
> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

Applied.

  Ralf

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From:	Ralf Baechle <ralf@linux-mips.org>
To:	Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Subject: Re: [PATCH] JAZZ: disable PIT; cleanup R4030 clockevent
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On Thu, Nov 01, 2007 at 03:07:41PM +0000, Ralf Baechle wrote:

> On Thu, Nov 01, 2007 at 01:52:36PM +0100, Thomas Bogendoerfer wrote:
> 
> > PIT doesn't work, disable it completly
> 
> I think this is the explanation:
> 
> include/asm-mips/mach-jazz/timex.h:#define CLOCK_TICK_RATE              100
> 
> while the PIT code actually expects 1193182.
> 
> Turns out that due to a recent Qemu bug which made the probe for the cp0
> compare interrupt fail the Malta code did fall back from the compare timer
> to the i8253 PIT for the clockevent device.  Works perfectly well.

So I just fixed the MIPS part of the CLOCK_TICK_RATE mess which is really
all over the kernel.  I hope this should bring the i2853 to life for you.
Could you test this?  It's pretty much the only hope for Jazz to go tickless
so we should try to get it to work.  Unfortunately there is a locking issue
lurking there as well so I need some feedback if you can get it to work.

  Ralf

From Eckhardt@satorlaser.com Thu Nov  1 16:07:21 2007
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From:	Ulrich Eckhardt <eckhardt@satorlaser.com>
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To:	linux-mips <linux-mips@linux-mips.org>
Subject: Re: [PATCH] Put cast inside macro instead of all the callers
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I'm by far not a MIPS expert, but I'm puzzled by the code and how it uses 
signed integers for addresses. I just added some comments below, but I'm not 
sure if they are valid. Thank you for any clarification!

On Wednesday 31 October 2007, Andrew Sharp wrote:
> Since all the callers of the PHYS_TO_XKPHYS macro call with a constant,
> put the cast to LL inside the macro where it really should be rather
> than in all the callers.  This makes macros like PHYS_TO_XKSEG_UNCACHED
> work without gcc whining.

I'm not sure if this is always a compile-time constant so that you can adorn 
it with a LL. However, note that this is not a cast, a cast is at runtime.

>  	if (sp >= (long)CKSEG0 && sp < (long)CKSEG2)
>  		usp = CKSEG1ADDR(sp);
>  #ifdef CONFIG_64BIT
> -	else if ((long long)sp >= (long long)PHYS_TO_XKPHYS(0LL, 0) &&
> -		 (long long)sp < (long long)PHYS_TO_XKPHYS(8LL, 0))
> -		usp = PHYS_TO_XKPHYS((long long)K_CALG_UNCACHED,
> +	else if ((long long)sp >= (long long)PHYS_TO_XKPHYS(0, 0) &&
> +		 (long long)sp < (long long)PHYS_TO_XKPHYS(8, 0))
> +		usp = PHYS_TO_XKPHYS(K_CALG_UNCACHED,
>  				     XKPHYS_TO_PHYS((long long)sp));

I'd say this code is broken in way too many aspects:
1. A plethora of casts. PHYS_TO_XKPHYS() should return a physical address 
(i.e. 32 or 64 bits unsigned integer) already, so casting its result should 
not be necessary.
2. Using a signed integer of undefined size for an address. At least use an 
explicit 64 bit unsigned integer (__u64).
3. The use of signed types makes me wonder about intended overflow semantics. 
Just for the record, signed overflow in C causes undefined behaviour, no 
diagnostic required, and recent GCC even assume that no overflow occurs as an 
optimisation!

>  #define PHYS_TO_XKSEG_CACHED(p)		PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE,(p))
>  #define XKPHYS_TO_PHYS(p)		((p) & TO_PHYS_MASK)
>  #define PHYS_TO_XKPHYS(cm,a)		(_CONST64_(0x8000000000000000) | \
> -					 ((cm)<<59) | (a))
> +					 (_CONST64_(cm)<<59) | (a))

This macro will always(!!!) generate a negative number, is that intended?

Uli
- slightly puzzled -

-- 
Sator Laser GmbH
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From markus.gothe@27m.se Thu Nov  1 16:46:07 2007
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-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA256

Thiemo Seufer wrote:
> Hyon Lim wrote:
>> I investigated kernel assembly source code in my kernel (2.6.10).
>>  I found that there are a lot of assembly directives (e.g.,
>> .align, .set reorder, .cpload, .frame etc.). Is there any
>> documents which explains those directives? (not only I described
>> above. All of directives)
>
> Short of reading the assembler sourcecode I believe the best
> document is "See MIPS Run Linux".
>
>
> Thiemo
>
Use the source Luke (or Google)... I think if you'vent got a clue
about assembler (or anything else you're doing) you need to do some
research before asking, that's my not so humble opinion.

- --
_______________________________________

Mr Markus Gothe
Software Engineer

Phone: +46 (0)13 21 81 20 (ext. 1046)
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From ralf@linux-mips.org Thu Nov  1 17:17:04 2007
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Subject: Re: [PATCH] Put cast inside macro instead of all the callers
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On Wed, Oct 31, 2007 at 02:11:24PM -0700, Andrew Sharp wrote:

> Resend: I tried sending this a couple of days ago but haven't seen it.
> Wondering if it got stuck in a spam filter or our lovely exchange
> server or something.

It seems the list's spam filter has developed some appetite for patches,
I'm afraid.  Generally please cc me on patches.

> Since all the callers of the PHYS_TO_XKPHYS macro call with a constant,
> put the cast to LL inside the macro where it really should be rather
> than in all the callers.  This makes macros like PHYS_TO_XKSEG_UNCACHED
> work without gcc whining.
> 
> Hopefully this will apply ok.

I'm afraid, no, the definition of PHYS_TO_XKPHYS did change 3 weeks ago ...

Anyway, I fixed that up and queued it for 2.6.25.

Thanks,

  Ralf

From andy.sharp@onstor.com Thu Nov  1 17:23:28 2007
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Subject: Re: [PATCH] Put cast inside macro instead of all the callers
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On Thu, 1 Nov 2007 17:04:01 +0100 Ulrich Eckhardt
<eckhardt@satorlaser.com> wrote:

> I'm by far not a MIPS expert, but I'm puzzled by the code and how it
> uses signed integers for addresses. I just added some comments below,
> but I'm not sure if they are valid. Thank you for any clarification!
> 
> On Wednesday 31 October 2007, Andrew Sharp wrote:
> > Since all the callers of the PHYS_TO_XKPHYS macro call with a
> > constant, put the cast to LL inside the macro where it really
> > should be rather than in all the callers.  This makes macros like
> > PHYS_TO_XKSEG_UNCACHED work without gcc whining.
> 
> I'm not sure if this is always a compile-time constant so that you
> can adorn it with a LL. However, note that this is not a cast, a cast
> is at runtime.

It is always a constant.

> >  	if (sp >= (long)CKSEG0 && sp < (long)CKSEG2)
> >  		usp = CKSEG1ADDR(sp);
> >  #ifdef CONFIG_64BIT
> > -	else if ((long long)sp >= (long long)PHYS_TO_XKPHYS(0LL,
> > 0) &&
> > -		 (long long)sp < (long long)PHYS_TO_XKPHYS(8LL, 0))
> > -		usp = PHYS_TO_XKPHYS((long long)K_CALG_UNCACHED,
> > +	else if ((long long)sp >= (long long)PHYS_TO_XKPHYS(0, 0)
> > &&
> > +		 (long long)sp < (long long)PHYS_TO_XKPHYS(8, 0))
> > +		usp = PHYS_TO_XKPHYS(K_CALG_UNCACHED,
> >  				     XKPHYS_TO_PHYS((long
> > long)sp));
> 
> I'd say this code is broken in way too many aspects:
> 1. A plethora of casts. PHYS_TO_XKPHYS() should return a physical
> address (i.e. 32 or 64 bits unsigned integer) already, so casting its
> result should not be necessary.
> 2. Using a signed integer of undefined size for an address. At least
> use an explicit 64 bit unsigned integer (__u64).
> 3. The use of signed types makes me wonder about intended overflow
> semantics. Just for the record, signed overflow in C causes undefined
> behaviour, no diagnostic required, and recent GCC even assume that no
> overflow occurs as an optimisation!
> 
> >  #define PHYS_TO_XKSEG_CACHED(p)
> > PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE,(p)) #define
> > XKPHYS_TO_PHYS(p)		((p) & TO_PHYS_MASK) #define
> > PHYS_TO_XKPHYS(cm,a)		(_CONST64_(0x8000000000000000)
> > | \
> > -					 ((cm)<<59) | (a))
> > +					 (_CONST64_(cm)<<59) | (a))
> 
> This macro will always(!!!) generate a negative number, is that
> intended?

Well, it's an address, not a number.  Does that help?  The point of the
macro is to convert physical addresses to a selectable type of virtual
address, of which mips has several.

Cheers,

a


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On Thu, Nov 01, 2007 at 05:04:01PM +0100, Ulrich Eckhardt wrote:

> I'm by far not a MIPS expert, but I'm puzzled by the code and how it uses 
> signed integers for addresses. I just added some comments below, but I'm not 
> sure if they are valid. Thank you for any clarification!

When going from 32-bit to 64-bit MIPS did sign-extend register values and
addresses, that is for example 0x80000000 became 0xffffffff80000000.  That
is the code sequence which on 32-bit is used to load the first address
actually happens to load the 2nd value on a 64-bit machine.  Which is an
extremly elegant solution on the hardware level but at a few places
software need to know.  The code tries to make clever use of sign extension
by the compiler to avoid multiple constants.

> On Wednesday 31 October 2007, Andrew Sharp wrote:
> > Since all the callers of the PHYS_TO_XKPHYS macro call with a constant,
> > put the cast to LL inside the macro where it really should be rather
> > than in all the callers.  This makes macros like PHYS_TO_XKSEG_UNCACHED
> > work without gcc whining.
> 
> I'm not sure if this is always a compile-time constant so that you can adorn 
> it with a LL. However, note that this is not a cast, a cast is at runtime.

No.  The compiler can evaluate the cast of a constant value at compile
time and that exactly is what the code is exploiting here.

> >  	if (sp >= (long)CKSEG0 && sp < (long)CKSEG2)
> >  		usp = CKSEG1ADDR(sp);
> >  #ifdef CONFIG_64BIT
> > -	else if ((long long)sp >= (long long)PHYS_TO_XKPHYS(0LL, 0) &&
> > -		 (long long)sp < (long long)PHYS_TO_XKPHYS(8LL, 0))
> > -		usp = PHYS_TO_XKPHYS((long long)K_CALG_UNCACHED,
> > +	else if ((long long)sp >= (long long)PHYS_TO_XKPHYS(0, 0) &&
> > +		 (long long)sp < (long long)PHYS_TO_XKPHYS(8, 0))
> > +		usp = PHYS_TO_XKPHYS(K_CALG_UNCACHED,
> >  				     XKPHYS_TO_PHYS((long long)sp));
> 
> I'd say this code is broken in way too many aspects:
> 1. A plethora of casts. PHYS_TO_XKPHYS() should return a physical address 
> (i.e. 32 or 64 bits unsigned integer) already, so casting its result should 
> not be necessary.

No argument about the beauty of the whole thing.

> 2. Using a signed integer of undefined size for an address. At least use an 
> explicit 64 bit unsigned integer (__u64).

long long is 64-bit on Linux.

> 3. The use of signed types makes me wonder about intended overflow semantics. 
> Just for the record, signed overflow in C causes undefined behaviour, no 
> diagnostic required, and recent GCC even assume that no overflow occurs as an 
> optimisation!

There is no overflow possible here.

> >  #define PHYS_TO_XKSEG_CACHED(p)		PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE,(p))
> >  #define XKPHYS_TO_PHYS(p)		((p) & TO_PHYS_MASK)
> >  #define PHYS_TO_XKPHYS(cm,a)		(_CONST64_(0x8000000000000000) | \
> > -					 ((cm)<<59) | (a))
> > +					 (_CONST64_(cm)<<59) | (a))
> 
> This macro will always(!!!) generate a negative number, is that intended?

Sort of.  Most users don't care, the address is just an address for them.
Note that the Linux idea of "all virtual addresses can be represented in
an unsigned long" and the MIPS concept of sign extending addresses conflict
at times, so sometimes addresses want to be handled with alot of care.

  Ralf

From vda.linux@googlemail.com Thu Nov  1 18:43:36 2007
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From:	Denys Vlasenko <vda.linux@googlemail.com>
To:	Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [IDE] Fix build bug
Date:	Thu, 1 Nov 2007 18:43:16 +0000
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	Andrew Morton <akpm@linux-foundation.org>,
	linux-kernel@vger.kernel.org, linux-ide@vger.kernel.org,
	linux-mips@linux-mips.org,
	Martijn Uffing <mp3project@sarijopen.student.utwente.nl>
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On Tuesday 30 October 2007 12:41, Ralf Baechle wrote:
> On Tue, Oct 30, 2007 at 11:34:29AM +0000, Denys Vlasenko wrote:
> 
> > On Thursday 25 October 2007 22:41, Bartlomiej Zolnierkiewicz wrote:
> > > > -static const struct ide_port_info generic_chipsets[] __devinitdata = {
> > > > +static struct ide_port_info generic_chipsets[] __devinitdata = {
> > > >  	/*  0 */ DECLARE_GENERIC_PCI_DEV("Unknown",	0),
> > > >  
> > > >  	{	/* 1 */
> > > 
> > > I would prefer to not remove const from generic_chipsets[] so:
> > > 
> > > [PATCH] drivers/ide/pci/generic: fix build for CONFIG_HOTPLUG=n
> > > 
> > > It turns out that const and __{dev}initdata cannot be mixed currently
> > > and that generic IDE PCI host driver is also affected by the same issue:
> > > 
> > > On Thursday 25 October 2007, Ralf Baechle wrote:
> > > >   CC      drivers/ide/pci/generic.o
> > > > drivers/ide/pci/generic.c:52: error: __setup_str_ide_generic_all_on causes a
> > > > +section type conflict
> > > 
> > > [ Also reported by Martijn Uffing <mp3project@sarijopen.student.utwente.nl>. ]
> > > 
> > > This patch workarounds the problem in a bit hackish way but without
> > > removing const from generic_chipsets[] (it adds const to __setup() so
> > > __setup_str_ide_generic_all becomes const).
> > 
> > You wouldn't believe how much const data is not marked as const because
> > we don't have __constinitdata etc. Literally megabytes.
> 
> The gain from marking it const is very little and once any non-const
> __initdata object is added to a compilation unit all other const declarations
> will have to be removed.  Bad tradeoff.

We can intrduce new, ro sections or teach gcc that combining const objects into
non-ro sections is not a crime. I wonder why it currently disallows that.
(And it does it only _somethimes_, const pointers happily go into rw sections!)
--
vda

From veerasena_b@yahoo.co.in Fri Nov  2 05:05:13 2007
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Date:	Fri, 2 Nov 2007 10:33:49 +0530 (IST)
From:	veerasena reddy <veerasena_b@yahoo.co.in>
Subject: NPTL support
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Hi,

I am trying to build the toolchain for MIPS processor using buildroot.
I am using gcc version of 3.4.3, binutils-2.15, uclibc-0.9.28 and linux-2.6.18.8 kernel.

Basically i need to enable NPTL feature support in my toolchain.
does uclibc-0.9.28 has the support for NPTL?
If not, how can i get it enabled for my above build configuration?

I see there is separate branch "uclibc-nptl" in uclibc. 
Do i need to use this (uclibc-nptl) to meet my requirement?

Could you please suggest me right approach to succssfully enable NPTL?

Thanks in advance.

Regards,
Veerasena.


      Why delete messages? Unlimited storage is just a click away. Go to http://help.yahoo.com/l/in/yahoo/mail/yahoomail/tools/tools-08.html


From kalyanatejaswi@gmail.com Fri Nov  2 05:46:05 2007
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Date:	Fri, 2 Nov 2007 11:15:51 +0530
From:	"kalyan tejaswi" <kalyanatejaswi@gmail.com>
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Subject: Oops with kernel 2.6.8
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Hi all,
I am using Malta-4Kc with kernel 2.6.8(from linux-mips.org) compiled with
gcc 3.4.4.

I can not boot over NFS.

The console log is attached.

Any hints are greatly appreciated.


Regards
Kalyan

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<div>Hi all,</div>
<div>I am using Malta-4Kc with&nbsp;kernel 2.6.8(from <a href="http://linux-mips.org">linux-mips.org</a>) compiled with gcc 3.4.4.</div>
<div>&nbsp;</div>
<div>I can not boot over NFS.</div>
<div>&nbsp;</div>
<div>The console log is attached.</div>
<div>&nbsp;</div>
<div>Any hints are greatly appreciated.</div>
<div>&nbsp;</div>
<div>&nbsp;</div>
<div>Regards</div>
<div>Kalyan</div>

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------=_Part_14509_19194610.1193982351721--

From Eckhardt@satorlaser.com Fri Nov  2 08:07:31 2007
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From:	Ulrich Eckhardt <eckhardt@satorlaser.com>
Organization: Sator Laser GmbH
To:	linux-mips <linux-mips@linux-mips.org>
Subject: Re: [PATCH] Put cast inside macro instead of all the callers
Date:	Fri, 2 Nov 2007 09:06:00 +0100
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On Thursday 01 November 2007, Ulrich Eckhardt wrote:
[...]
> - slightly puzzled -

Andrew, Ralf, thanks for the clarifications!

Uli

-- 
Sator Laser GmbH
Geschäftsführer: Michael Wöhrmann, Amtsgericht Hamburg HR B62 932

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From tsbogend@alpha.franken.de Fri Nov  2 10:20:37 2007
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To:	Ralf Baechle <ralf@linux-mips.org>
Cc:	linux-mips@linux-mips.org
Subject: Re: [PATCH] JAZZ: disable PIT; cleanup R4030 clockevent
Message-ID: <20071102101713.GA9110@alpha.franken.de>
References: <20071101125236.GA16577@alpha.franken.de> <20071101150741.GA8570@linux-mips.org> <20071101160210.GA20366@linux-mips.org>
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From:	tsbogend@alpha.franken.de (Thomas Bogendoerfer)
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On Thu, Nov 01, 2007 at 04:02:10PM +0000, Ralf Baechle wrote:
> all over the kernel.  I hope this should bring the i2853 to life for you.

it does now, even pit clockevent works now (if you apply the patch
below).

Thomas.


Fix ISA irq acknowledge
make r4030 clockevent code look like other mips clockevent code

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---

diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c
index ae25b48..d7f8a78 100644
--- a/arch/mips/jazz/irq.c
+++ b/arch/mips/jazz/irq.c
@@ -97,9 +97,10 @@ asmlinkage void plat_irq_dispatch(void)
 	if (pending & IE_IRQ4) {
 		r4030_read_reg32(JAZZ_TIMER_REGISTER);
 		do_IRQ(JAZZ_TIMER_IRQ);
-	} else if (pending & IE_IRQ2)
-		do_IRQ(r4030_read_reg32(JAZZ_EISA_IRQ_ACK));
-	else if (pending & IE_IRQ1) {
+	} else if (pending & IE_IRQ2) {
+		irq = *(volatile u8 *)JAZZ_EISA_IRQ_ACK;
+		do_IRQ(irq);
+	} else if (pending & IE_IRQ1) {
 		irq = *(volatile u8 *)JAZZ_IO_IRQ_SOURCE >> 2;
 		if (likely(irq > 0))
 			do_IRQ(irq + JAZZ_IRQ_START - 1);
@@ -117,16 +118,16 @@ static void r4030_set_mode(enum clock_event_mode mode,
 struct clock_event_device r4030_clockevent = {
 	.name		= "r4030",
 	.features	= CLOCK_EVT_FEAT_PERIODIC,
-	.rating		= 100,
+	.rating		= 300,
 	.irq		= JAZZ_TIMER_IRQ,
-	.cpumask	= CPU_MASK_CPU0,
 	.set_mode	= r4030_set_mode,
 };
 
 static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id)
 {
-	r4030_clockevent.event_handler(&r4030_clockevent);
+	struct clock_event_device *cd = dev_id;
 
+	cd->event_handler(cd);
 	return IRQ_HANDLED;
 }
 
@@ -134,15 +135,22 @@ static struct irqaction r4030_timer_irqaction = {
 	.handler	= r4030_timer_interrupt,
 	.flags		= IRQF_DISABLED,
 	.mask		= CPU_MASK_CPU0,
-	.name		= "timer",
+	.name		= "R4030 timer",
 };
 
 void __init plat_time_init(void)
 {
-	struct irqaction *irq = &r4030_timer_irqaction;
+	struct clock_event_device *cd = &r4030_clockevent;
+	struct irqaction *action = &r4030_timer_irqaction;
+	unsigned int cpu = smp_processor_id();
 
 	BUG_ON(HZ != 100);
 
+	cd->cpumask             = cpumask_of_cpu(cpu);
+	clockevents_register_device(cd);
+	action->dev_id = cd;
+	setup_irq(JAZZ_TIMER_IRQ, action);
+
 	/*
 	 * Set clock to 100Hz.
 	 *
@@ -150,8 +158,5 @@ void __init plat_time_init(void)
 	 * a programmable 4-bit divider.  This makes it fairly inflexible.
 	 */
 	r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9);
-	setup_irq(JAZZ_TIMER_IRQ, irq);
-
-	clockevents_register_device(&r4030_clockevent);
 	setup_pit_timer();
 }

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea.                                                [ RFC1925, 2.3 ]

From ralf@linux-mips.org Fri Nov  2 12:20:31 2007
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Date:	Fri, 2 Nov 2007 12:20:01 +0000
From:	Ralf Baechle <ralf@linux-mips.org>
To:	Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc:	linux-mips@linux-mips.org
Subject: Re: [PATCH] JAZZ: disable PIT; cleanup R4030 clockevent
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On Fri, Nov 02, 2007 at 11:17:13AM +0100, Thomas Bogendoerfer wrote:

> On Thu, Nov 01, 2007 at 04:02:10PM +0000, Ralf Baechle wrote:
> > all over the kernel.  I hope this should bring the i2853 to life for you.
> 
> it does now, even pit clockevent works now (if you apply the patch
> below).

Applied, thanks,

One thing I'm still wondering about, does the kernel actually go tickless
for you?

  Ralf

From markus.gothe@27m.se Fri Nov  2 12:32:24 2007
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From:	Markus Gothe <markus.gothe@27m.se>
Subject: Re: NPTL support
Date:	Fri, 2 Nov 2007 13:31:41 +0100
To:	veerasena reddy <veerasena_b@yahoo.co.in>
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You'll have to use the uClibc-nptl branch on their svn. In 0.9.28, no.

//Markus

On 2 Nov 2007, at 06:03, veerasena reddy wrote:

> Hi,
>
> I am trying to build the toolchain for MIPS processor using buildroot.
> I am using gcc version of 3.4.3, binutils-2.15, uclibc-0.9.28 and =20
> linux-2.6.18.8 kernel.
>
> Basically i need to enable NPTL feature support in my toolchain.
> does uclibc-0.9.28 has the support for NPTL?
> If not, how can i get it enabled for my above build configuration?
>
> I see there is separate branch "uclibc-nptl" in uclibc.
> Do i need to use this (uclibc-nptl) to meet my requirement?
>
> Could you please suggest me right approach to succssfully enable NPTL?
>
> Thanks in advance.
>
> Regards,
> Veerasena.
>
>
>       Why delete messages? Unlimited storage is just a click away. =20
> Go to http://help.yahoo.com/l/in/yahoo/mail/yahoomail/tools/=20
> tools-08.html
>
>

_______________________________________

Mr Markus Gothe
Software Engineer

Phone: +46 (0)13 21 81 20 (ext. 1046)
Fax: +46 (0)13 21 21 15
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From ralf@linux-mips.org Fri Nov  2 12:35:05 2007
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On Thu, Nov 01, 2007 at 06:43:16PM +0000, Denys Vlasenko wrote:

> We can intrduce new, ro sections or teach gcc that combining const objects into
> non-ro sections is not a crime. I wonder why it currently disallows that.
> (And it does it only _somethimes_, const pointers happily go into rw sections!)

The pattern seems to be that const-ness of the first object placed into
a particular section determines the writability of that section.  If that
conflicts with the requirements for a later object such as a non-const
object into a section r/o gcc doesn't consider making the section r/w
but throws an error instead.

  Ralf

From ralf@linux-mips.org Fri Nov  2 12:58:23 2007
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From:	Ralf Baechle <ralf@linux-mips.org>
To:	kalyan tejaswi <kalyanatejaswi@gmail.com>
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Subject: Re: Oops with kernel 2.6.8
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On Fri, Nov 02, 2007 at 11:15:51AM +0530, kalyan tejaswi wrote:

> Hi all,
> I am using Malta-4Kc with kernel 2.6.8(from linux-mips.org) compiled with
> gcc 3.4.4.
> 
> I can not boot over NFS.
> 
> The console log is attached.
> 
> Any hints are greatly appreciated.

2.6.8 is really old, over 3 years now.  So forgive if memory of the bugs
in that kernel is fading.  I think the one you're seeing was was caused
by memory prefetching beyond the end of memory.  The easy fix is to disable
prefetching.  See a  modern memcpy for how to do that.  There are several
other interesting issues hidden in 2.6.8 so I think you really should
upgrade.

  Ralf

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On Wed, 31 Oct 2007 16:39:00 +0000, Ralf Baechle <ralf@linux-mips.org> wrote:
> > > The only safe but ugly workaround is to change the return from exception
> > > code to detect if the EPC is in the range startin from the condition
> > > check in the idle loop to including the WAIT instruction and if so to
> > > patch the EPC to resume execution at the condition check or the
> > > instruction following the WAIT.
> > 
> > I'm also thinking of this approach.  Still wondering if it is worth to
> > implement.
> 
> The tickless kernel is very interesting for the low power fraction.  And
> it's especially those users who would suffer most the loss of the ability
> to use the WAIT instruction.  For a system running from two AAA cells the
> tradeoff is clear ...  So I think it's become a must.

Then, something like this?  Selecting in build-time is not so good,
but there are some CPUs which do not need this hack at all.
Synthesizing the ret_from_irq() at runtime might satisfy everyone?

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index c8c47a2..621130c 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -51,12 +51,17 @@ static void r39xx_wait(void)
  * But it is implementation-dependent wheter the pipelie restarts when
  * a non-enabled interrupt is requested.
  */
+#ifdef CONFIG_ROLLBACK_CPU_WAIT
+extern void cpu_wait_rollback(void);
+#define r4k_wait cpu_wait_rollback
+#else
 static void r4k_wait(void)
 {
 	__asm__("	.set	mips3			\n"
 		"	wait				\n"
 		"	.set	mips0			\n");
 }
+#endif
 
 /*
  * This variant is preferable as it allows testing need_resched and going to
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index e29598a..ffa043c 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -27,6 +27,20 @@
 #endif
 
 	.text
+#ifdef CONFIG_ROLLBACK_CPU_WAIT
+	.align	6
+FEXPORT(cpu_wait_rollback)
+	LONG_L	t0, TI_FLAGS($28)
+	andi	t0, _TIF_NEED_RESCHED
+	bnez	t0, 1f
+	.set	mips3
+	wait
+	.set	mips0
+1:
+	jr	ra
+	.align	6
+cpu_wait_rollback_end:
+#endif
 	.align	5
 #ifndef CONFIG_PREEMPT
 FEXPORT(ret_from_exception)
@@ -35,6 +49,14 @@ FEXPORT(ret_from_exception)
 #endif
 FEXPORT(ret_from_irq)
 	LONG_S	s0, TI_REGS($28)
+#ifdef CONFIG_ROLLBACK_CPU_WAIT
+	LONG_L	t0, PT_EPC(sp)
+	ori	t0, 0x3f
+	xori	t0, 0x3f
+	PTR_LA	t1, cpu_wait_rollback
+	bne	t0, t1, __ret_from_irq
+	LONG_S	t0, PT_EPC(sp)			# return to cpu_wait_rollback
+#endif
 FEXPORT(__ret_from_irq)
 	LONG_L	t0, PT_STATUS(sp)		# returning to kernel mode?
 	andi	t0, t0, KU_USER

From alex@alexlab.net Fri Nov  2 17:26:36 2007
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From 12o3l@tiscali.nl Fri Nov  2 18:59:17 2007
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Use strchr instead of strstr when searching for a single character

Signed-off-by: Roel Kluin <12o3l@tiscali.nl>
---
diff --git a/arch/mips/fw/arc/cmdline.c b/arch/mips/fw/arc/cmdline.c
index fd604ef..4ca4eef 100644
--- a/arch/mips/fw/arc/cmdline.c
+++ b/arch/mips/fw/arc/cmdline.c
@@ -52,7 +52,7 @@ static char * __init move_firmware_args(char* cp)
 				strcat(cp, used_arc[i][1]);
 				cp += strlen(used_arc[i][1]);
 				/* ... and now the argument */
-				s = strstr(prom_argv(actr), "=");
+				s = strchr(prom_argv(actr), '=');
 				if (s) {
 					s++;
 					strcpy(cp, s);

From tsbogend@alpha.franken.de Fri Nov  2 22:12:00 2007
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Subject: Re: [PATCH] JAZZ: disable PIT; cleanup R4030 clockevent
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From:	tsbogend@alpha.franken.de (Thomas Bogendoerfer)
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On Fri, Nov 02, 2007 at 12:20:01PM +0000, Ralf Baechle wrote:
> One thing I'm still wondering about, does the kernel actually go tickless
> for you?

a kernel with CONFIG_NO_HZ boots and acts normal. But it looks like
the PIT is still ticking at the selected 100HZ...

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea.                                                [ RFC1925, 2.3 ]

From ralf@linux-mips.org Sun Nov  4 00:33:46 2007
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From:	Ralf Baechle <ralf@linux-mips.org>
To:	Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Subject: Re: [PATCH] JAZZ: disable PIT; cleanup R4030 clockevent
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On Fri, Nov 02, 2007 at 11:08:19PM +0100, Thomas Bogendoerfer wrote:

> On Fri, Nov 02, 2007 at 12:20:01PM +0000, Ralf Baechle wrote:
> > One thing I'm still wondering about, does the kernel actually go tickless
> > for you?
> 
> a kernel with CONFIG_NO_HZ boots and acts normal. But it looks like
> the PIT is still ticking at the selected 100HZ...

I think this happens because the R4030 clockevent device has a rather
high rating of 300 while the PIT because of an omission or intension
doesn't set it's rating at all so has rating of 0.  So Linux prefers the
R4030.  You can see which clockevent device is actually getting used
by Linux in /proc/timer_list.

  Ralf

From fbuihuu@gmail.com Sun Nov  4 08:19:40 2007
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Date:	Sun, 04 Nov 2007 09:18:32 +0100
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This patch removes this function because:

  1/ Its unconventional prototype is error prone: its prototype is
  the same as memset one but was documented by mips_ksym.c like the
  following:

	   extern void *__bzero(void *__s, size_t __count);

  2/ For the caller, it makes no difference to call memset instead
  since it has to setup the second parameter of __bzero to 0.

  3/ It's not part of the Linux user access API, so no module can use
  it.

  4/ It needs to be exported with EXPORT_SYMBOL and therefore consumes
  some extra bytes.

  5/ It has only one user.

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
---

 I'm wondering if I'm missing something, because this function seems
 so ugly and useless in the first place, that I can't refrain to
 submit a patch to get rid of it.

		Franck

 arch/mips/kernel/mips_ksyms.c |    2 --
 arch/mips/lib/csum_partial.S  |    2 +-
 arch/mips/lib/memcpy.S        |    2 +-
 arch/mips/lib/memset.S        |    4 +---
 include/asm-mips/uaccess.h    |    2 +-
 5 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/arch/mips/kernel/mips_ksyms.c b/arch/mips/kernel/mips_ksyms.c
index 225755d..6da9fa8 100644
--- a/arch/mips/kernel/mips_ksyms.c
+++ b/arch/mips/kernel/mips_ksyms.c
@@ -14,7 +14,6 @@
 #include <asm/pgtable.h>
 #include <asm/uaccess.h>
 
-extern void *__bzero(void *__s, size_t __count);
 extern long __strncpy_from_user_nocheck_asm(char *__to,
                                             const char *__from, long __len);
 extern long __strncpy_from_user_asm(char *__to, const char *__from,
@@ -38,7 +37,6 @@ EXPORT_SYMBOL(kernel_thread);
  */
 EXPORT_SYMBOL(__copy_user);
 EXPORT_SYMBOL(__copy_user_inatomic);
-EXPORT_SYMBOL(__bzero);
 EXPORT_SYMBOL(__strncpy_from_user_nocheck_asm);
 EXPORT_SYMBOL(__strncpy_from_user_asm);
 EXPORT_SYMBOL(__strlen_user_nocheck_asm);
diff --git a/arch/mips/lib/csum_partial.S b/arch/mips/lib/csum_partial.S
index c0a77fe..8d3fa1e 100644
--- a/arch/mips/lib/csum_partial.S
+++ b/arch/mips/lib/csum_partial.S
@@ -694,7 +694,7 @@ l_exc:
 	ADD	dst, t0			# compute start address in a1
 	SUB	dst, src
 	/*
-	 * Clear len bytes starting at dst.  Can't call __bzero because it
+	 * Clear len bytes starting at dst.  Can't call memset because it
 	 * might modify len.  An inefficient loop for these rare times...
 	 */
 	beqz	len, done
diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S
index a526c62..425f2c3 100644
--- a/arch/mips/lib/memcpy.S
+++ b/arch/mips/lib/memcpy.S
@@ -443,7 +443,7 @@ l_exc:
 	ADD	dst, t0			# compute start address in a1
 	SUB	dst, src
 	/*
-	 * Clear len bytes starting at dst.  Can't call __bzero because it
+	 * Clear len bytes starting at dst.  Can't call memset because it
 	 * might modify len.  An inefficient loop for these rare times...
 	 */
 	beqz	len, done
diff --git a/arch/mips/lib/memset.S b/arch/mips/lib/memset.S
index 3f8b8b3..a13248b 100644
--- a/arch/mips/lib/memset.S
+++ b/arch/mips/lib/memset.S
@@ -46,7 +46,7 @@
 	.endm
 
 /*
- * memset(void *s, int c, size_t n)
+ * void *memset(void *s, int c, size_t n)
  *
  * a0: start of area to clear
  * a1: char to fill with
@@ -68,8 +68,6 @@ LEAF(memset)
 #endif
 	or		a1, t1
 1:
-
-FEXPORT(__bzero)
 	sltiu		t0, a2, LONGSIZE	/* very small region? */
 	bnez		t0, small_memset
 	 andi		t0, a0, LONGMASK	/* aligned? */
diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h
index c30c718..9b8234a 100644
--- a/include/asm-mips/uaccess.h
+++ b/include/asm-mips/uaccess.h
@@ -643,7 +643,7 @@ __clear_user(void __user *addr, __kernel_size_t size)
 		"move\t$4, %1\n\t"
 		"move\t$5, $0\n\t"
 		"move\t$6, %2\n\t"
-		__MODULE_JAL(__bzero)
+		__MODULE_JAL(memset)
 		"move\t%0, $6"
 		: "=r" (res)
 		: "r" (addr), "r" (size)
-- 
1.5.3.4


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Date:	Sun, 04 Nov 2007 09:21:36 +0100
From:	Franck Bui-Huu <vagabon.xyz@gmail.com>
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To:	Nigel Stephens <nigel@mips.com>
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	"Maciej W. Rozycki" <macro@linux-mips.org>,
	Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
Subject: Re: [PATCH] mm/pg-r4k.c: Dump the generated code
References: <Pine.LNX.4.64N.0710081611460.8873@blysk.ds.pg.gda.pl> <470BE1F4.3070800@gmail.com> <Pine.LNX.4.64N.0710101231290.9821@blysk.ds.pg.gda.pl> <47126EDC.1060305@gmail.com> <20071014195324.GT3379@networkno.de> <4713C11F.3010903@gmail.com> <4713C958.8080805@mips.com> <47147551.1010004@gmail.com> <4714B58E.8020005@mips.com> <4715C039.7090603@gmail.com> <20071017123046.GY3379@networkno.de> <47160D31.5080201@mips.com>
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Nigel Stephens wrote:
> Aha, that probably explains it. Franck is using the "SDE for Linux
> v6.05" toolchain, and in that version of GCC -march=mips32r2 implies a

[snip]

BTW, are there any other toolchains out there that support smartmips ASE ?

thanks,
		Franck

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Subject: Re: [RFC] Add __initbss section
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Maciej W. Rozycki wrote:
> On Thu, 18 Oct 2007, Franck Bui-Huu wrote:
>> After spending some fun time trying several different configurations
>> with gcc and ld, I noticed that gcc makes a section with @nobits
>> attribute if the section name starts with .bss.*
> 
>  Exactly how GCC sets section flags is mostly determined by 
> default_section_type_flags() in gcc/varasm.c; some flags are set elsewhere 
> too.  This is with HEAD of GCC.
> 

It seems that we can rely on this behaviour. I looked at gcc 4.1.2/3.2
sources and they made a section part of .bss if the section name starts
with ".bss.".

>> Another test I did is to put .init.bss (not .bss.init) section right
>> before .bss section in order to have only one segment to load. And it
>> makes magically ld do the right thing. I must admit that I don't
>> understand why, and the lack of documentation doesn't help...
> 
>  Hmm, isn't what `info ld' says enough?

Hmm, I'm must be blind but I missed that each time I read it. Could
you point out the section number please ?

OK, I think the best thing to do now is to respin the patchset and
submit it linux arch mailing list.

thanks,

		Franck

From stehbrettsegeln@gmx.de Sun Nov  4 09:11:03 2007
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Subject: "Bad eraseblock"-problem with au1550nd-NAND-driver after kernel update to 2.6.23.1
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Hi,

I am fiddeling around with an Au1550-System (Lippert CoolMoteMaster).
After I updated the Kernel from 2.6.17.7 to 2.6.23.1 the flash driver complaints about Bad eraseblocks at kernel start:

[17179570.224000] NAND device: Manufacturer ID: 0x20, Chip ID: 0xda (ST Micro NAND 256MiB 3,3V 8-bit)
[17179570.232000] Scanning device for bad blocks
[17179570.236000] Bad eraseblock 0 at 0x00000000
[17179570.240000] Bad eraseblock 1 at 0x00020000
[17179570.248000] Bad eraseblock 2 at 0x00040000
[..]
[17179579.748000] Bad eraseblock 2046 at 0x0ffc0000
[17179579.752000] Bad eraseblock 2047 at 0x0ffe0000
[17179579.756000] Creating 1 MTD partitions on "NAND 256MiB 3,3V 8-bit":
[17179579.760000] 0x00000000-0x10000000 : "NAND FS 0"
[17179579.772000] au1xxx-ohci au1xxx-ohci.0: Au1xxx OHCI
[..]
I get the same output from the .17.7. kernel apart from the 'Bad'-messages. The size seems correct, as I should get one 256MB-flash-device. I did use the patch from Lippert to set their platform data, which was intended for 2.6.17.7. With small changes it also succeeds on 2.6.23.1 but this doesn't mean that it's correct ;)
The 2.6.17.7 kernel still runs fine with that flash.

I am quite new to kernel hacking and after some cause searching I'm still lost. Were there any changes in the necessary configuration / platform setup that I am missing? Any ideas / hints what I can look for? Any common mistakes?

ciao,
Thorsten

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Subject: Re: [PATCH] JAZZ: disable PIT; cleanup R4030 clockevent
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On Sun, Nov 04, 2007 at 12:33:38AM +0000, Ralf Baechle wrote:
> On Fri, Nov 02, 2007 at 11:08:19PM +0100, Thomas Bogendoerfer wrote:
> 
> > On Fri, Nov 02, 2007 at 12:20:01PM +0000, Ralf Baechle wrote:
> > > One thing I'm still wondering about, does the kernel actually go tickless
> > > for you?
> > 
> > a kernel with CONFIG_NO_HZ boots and acts normal. But it looks like
> > the PIT is still ticking at the selected 100HZ...
> 
> I think this happens because the R4030 clockevent device has a rather

r4030 is of course disabled in my test.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea.                                                [ RFC1925, 2.3 ]

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Hi;
	I have a linux-2.6.20 kernel configured with CONFIG_MIPS_MT_SMP
(SMVPE) running on a MIPS34KC processor emulation platform. Everything
goes fine until the scheduler gets stuck in trying to wake up the
migration thread. I configured the kernel with max_cache_size=2097152,
having no idea of what the variable is all about. Putting debug messages
in kernel/sched.c tells me that the the migration_thread() routine has
gone to sleep calling schedul() function and set_cpus_allowed() function
gets stuck in wake_up_process(rq->migration_thread); 
	Any insight is appreciated.

Regards.
KH

From 12o3l@tiscali.nl Sun Nov  4 12:03:16 2007
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Subject: [PATCH] iounmap if in vr41xx_pciu_init() pci clock is over 33MHz
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iounmap if pci clock is over 33MHz

Signed-off-by: Roel Kluin <12o3l@tiscali.nl>
---
diff --git a/arch/mips/pci/pci-vr41xx.c b/arch/mips/pci/pci-vr41xx.c
index 240df9e..33c4f68 100644
--- a/arch/mips/pci/pci-vr41xx.c
+++ b/arch/mips/pci/pci-vr41xx.c
@@ -154,6 +154,7 @@ static int __init vr41xx_pciu_init(void)
 		pciu_write(PCICLKSELREG, QUARTER_VTCLOCK);
 	else {
 		printk(KERN_ERR "PCI Clock is over 33MHz.\n");
+		iounmap(pciu_base);
 		return -EINVAL;
 	}
 


From anemo@mba.ocn.ne.jp Sun Nov  4 15:41:28 2007
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Subject: Re: [PATCH] Kill __bzero() 
From:	Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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On Sun, 04 Nov 2007 09:18:32 +0100, Franck Bui-Huu <fbuihuu@gmail.com> wrote:
>   2/ For the caller, it makes no difference to call memset instead
>   since it has to setup the second parameter of __bzero to 0.

__bzero() does not clobber v0 but memset() does.  I don't know if gcc
does some magical thing to protect v0, but it would be safer to add v0
explicitly to clobber-list of __clear_user().

---
Atsushi Nemoto

From ths@networkno.de Sun Nov  4 17:47:20 2007
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From:	Thiemo Seufer <ths@networkno.de>
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Franck Bui-Huu wrote:
> Nigel Stephens wrote:
> > Aha, that probably explains it. Franck is using the "SDE for Linux
> > v6.05" toolchain, and in that version of GCC -march=mips32r2 implies a
> 
> [snip]
> 
> BTW, are there any other toolchains out there that support smartmips ASE ?

Latest GCC upstream supports it (in SVN since 2007-07-05).


Thiemo

From KevinK@mips.com Sun Nov  4 18:59:27 2007
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Subject: Re: Get stuck in wake_up_process(rq->migration_thread);
Date:	Sun, 4 Nov 2007 10:59:45 -0800
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Your description isn't much to go on, but the first thing I'd look at
in such a situation would be the state of the Cause and Status registers
on the two VPEs. Cross-VPE scheduling interrupts on the standard
emulation platform, which lacks hardware support for cross-VPE
interrupts, sends IPIs by reaching across using MTTR instructions
and setting a software interrupt bit on the other VPE.  Other uses
of the same software interrupt (SW1 by default), or manipulations
in other kernel code that might clear its IM bit in the Status register,
could cause that mechanism to break down and cease processing
interprocessor interrupts.  It's a common failure mode if one botches
a mod to SMTC, and I've seen it on an SMVP port as well.

            Kevin K.

----- Original Message ----- 
From: <KokHow.Teh@infineon.com>
To: <linux-mips@linux-mips.org>
Sent: Sunday, November 04, 2007 3:26 AM
Subject: Get stuck in wake_up_process(rq->migration_thread);


> Hi;
> I have a linux-2.6.20 kernel configured with CONFIG_MIPS_MT_SMP
> (SMVPE) running on a MIPS34KC processor emulation platform. Everything
> goes fine until the scheduler gets stuck in trying to wake up the
> migration thread. I configured the kernel with max_cache_size=2097152,
> having no idea of what the variable is all about. Putting debug messages
> in kernel/sched.c tells me that the the migration_thread() routine has
> gone to sleep calling schedul() function and set_cpus_allowed() function
> gets stuck in wake_up_process(rq->migration_thread); 
> Any insight is appreciated.
> 
> Regards.
> KH
> 
> 

From vagabon.xyz@gmail.com Sun Nov  4 20:04:15 2007
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Date:	Sun, 04 Nov 2007 21:02:56 +0100
From:	Franck Bui-Huu <vagabon.xyz@gmail.com>
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To:	Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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Subject: Re: [PATCH] Kill __bzero()
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Atsushi Nemoto wrote:
> On Sun, 04 Nov 2007 09:18:32 +0100, Franck Bui-Huu <fbuihuu@gmail.com> wrote:
>>   2/ For the caller, it makes no difference to call memset instead
>>   since it has to setup the second parameter of __bzero to 0.
> 
> __bzero() does not clobber v0 but memset() does.  I don't know if gcc
> does some magical thing to protect v0, but it would be safer to add v0
> explicitly to clobber-list of __clear_user().
> 

good catch ! I'll do it.

thanks
		Franck

From fbuihuu@gmail.com Sun Nov  4 20:14:35 2007
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Message-ID: <472E27D7.9030602@gmail.com>
Date:	Sun, 04 Nov 2007 21:13:11 +0100
From:	Franck Bui-Huu <fbuihuu@gmail.com>
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To:	Ralf Baechle <ralf@linux-mips.org>
CC:	Atsushi Nemoto <anemo@mba.ocn.ne.jp>,
	linux-mips <linux-mips@linux-mips.org>
Subject: [PATCH] Kill __bzero() [take #2]
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This patch removes this function because:

  1/ Its unconventional prototype is error prone: its prototype is
  the same as memset one but was documented by mips_ksym.c like the
  following:

	   extern void *__bzero(void *__s, size_t __count);

  2/ For the caller, it makes no difference to call memset instead
  since it has to setup the second parameter of __bzero to 0.

  3/ It's not part of the Linux user access API, so no module can use
  it.

  4/ It needs to be exported with EXPORT_SYMBOL and therefore consumes
  some extra bytes.

  5/ It has only one user.

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
---

 This take includes Atsushi's comment.

		Franck

 arch/mips/kernel/mips_ksyms.c |    2 --
 arch/mips/lib/csum_partial.S  |    2 +-
 arch/mips/lib/memcpy.S        |    2 +-
 arch/mips/lib/memset.S        |    4 +---
 include/asm-mips/uaccess.h    |    4 ++--
 5 files changed, 5 insertions(+), 9 deletions(-)

diff --git a/arch/mips/kernel/mips_ksyms.c b/arch/mips/kernel/mips_ksyms.c
index 225755d..6da9fa8 100644
--- a/arch/mips/kernel/mips_ksyms.c
+++ b/arch/mips/kernel/mips_ksyms.c
@@ -14,7 +14,6 @@
 #include <asm/pgtable.h>
 #include <asm/uaccess.h>
 
-extern void *__bzero(void *__s, size_t __count);
 extern long __strncpy_from_user_nocheck_asm(char *__to,
                                             const char *__from, long __len);
 extern long __strncpy_from_user_asm(char *__to, const char *__from,
@@ -38,7 +37,6 @@ EXPORT_SYMBOL(kernel_thread);
  */
 EXPORT_SYMBOL(__copy_user);
 EXPORT_SYMBOL(__copy_user_inatomic);
-EXPORT_SYMBOL(__bzero);
 EXPORT_SYMBOL(__strncpy_from_user_nocheck_asm);
 EXPORT_SYMBOL(__strncpy_from_user_asm);
 EXPORT_SYMBOL(__strlen_user_nocheck_asm);
diff --git a/arch/mips/lib/csum_partial.S b/arch/mips/lib/csum_partial.S
index c0a77fe..8d3fa1e 100644
--- a/arch/mips/lib/csum_partial.S
+++ b/arch/mips/lib/csum_partial.S
@@ -694,7 +694,7 @@ l_exc:
 	ADD	dst, t0			# compute start address in a1
 	SUB	dst, src
 	/*
-	 * Clear len bytes starting at dst.  Can't call __bzero because it
+	 * Clear len bytes starting at dst.  Can't call memset because it
 	 * might modify len.  An inefficient loop for these rare times...
 	 */
 	beqz	len, done
diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S
index a526c62..425f2c3 100644
--- a/arch/mips/lib/memcpy.S
+++ b/arch/mips/lib/memcpy.S
@@ -443,7 +443,7 @@ l_exc:
 	ADD	dst, t0			# compute start address in a1
 	SUB	dst, src
 	/*
-	 * Clear len bytes starting at dst.  Can't call __bzero because it
+	 * Clear len bytes starting at dst.  Can't call memset because it
 	 * might modify len.  An inefficient loop for these rare times...
 	 */
 	beqz	len, done
diff --git a/arch/mips/lib/memset.S b/arch/mips/lib/memset.S
index 3f8b8b3..a13248b 100644
--- a/arch/mips/lib/memset.S
+++ b/arch/mips/lib/memset.S
@@ -46,7 +46,7 @@
 	.endm
 
 /*
- * memset(void *s, int c, size_t n)
+ * void *memset(void *s, int c, size_t n)
  *
  * a0: start of area to clear
  * a1: char to fill with
@@ -68,8 +68,6 @@ LEAF(memset)
 #endif
 	or		a1, t1
 1:
-
-FEXPORT(__bzero)
 	sltiu		t0, a2, LONGSIZE	/* very small region? */
 	bnez		t0, small_memset
 	 andi		t0, a0, LONGMASK	/* aligned? */
diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h
index c30c718..35c5fad 100644
--- a/include/asm-mips/uaccess.h
+++ b/include/asm-mips/uaccess.h
@@ -643,11 +643,11 @@ __clear_user(void __user *addr, __kernel_size_t size)
 		"move\t$4, %1\n\t"
 		"move\t$5, $0\n\t"
 		"move\t$6, %2\n\t"
-		__MODULE_JAL(__bzero)
+		__MODULE_JAL(memset)
 		"move\t%0, $6"
 		: "=r" (res)
 		: "r" (addr), "r" (size)
-		: "$4", "$5", "$6", __UA_t0, __UA_t1, "$31");
+		: "$2", "$4", "$5", "$6", __UA_t0, __UA_t1, "$31");
 
 	return res;
 }
-- 
1.5.3.4


From vagabon.xyz@gmail.com Sun Nov  4 20:20:53 2007
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Date:	Sun, 04 Nov 2007 21:19:33 +0100
From:	Franck Bui-Huu <vagabon.xyz@gmail.com>
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	Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
Subject: Re: [PATCH] mm/pg-r4k.c: Dump the generated code
References: <47126EDC.1060305@gmail.com> <20071014195324.GT3379@networkno.de> <4713C11F.3010903@gmail.com> <4713C958.8080805@mips.com> <47147551.1010004@gmail.com> <4714B58E.8020005@mips.com> <4715C039.7090603@gmail.com> <20071017123046.GY3379@networkno.de> <47160D31.5080201@mips.com> <472D8110.2080506@gmail.com> <20071104174710.GA9363@networkno.de>
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Thiemo Seufer wrote:
> 
> Latest GCC upstream supports it (in SVN since 2007-07-05).
> 

Good news although gcc 4.3 release is planed for end of January.

Is SDE gcc going to be obsolete after this release ?

		Franck

From yoichi_yuasa@tripeaks.co.jp Sun Nov  4 22:28:49 2007
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To:	Roel Kluin <12o3l@tiscali.nl>
Cc:	yoichi_yuasa@tripeaks.co.jp, linux-mips@linux-mips.org
Subject: Re: [PATCH] iounmap if in vr41xx_pciu_init() pci clock is over
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On Sun, 04 Nov 2007 13:00:06 +0100
Roel Kluin <12o3l@tiscali.nl> wrote:

> iounmap if pci clock is over 33MHz
> 
> Signed-off-by: Roel Kluin <12o3l@tiscali.nl>

Acked-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>

> ---
> diff --git a/arch/mips/pci/pci-vr41xx.c b/arch/mips/pci/pci-vr41xx.c
> index 240df9e..33c4f68 100644
> --- a/arch/mips/pci/pci-vr41xx.c
> +++ b/arch/mips/pci/pci-vr41xx.c
> @@ -154,6 +154,7 @@ static int __init vr41xx_pciu_init(void)
>  		pciu_write(PCICLKSELREG, QUARTER_VTCLOCK);
>  	else {
>  		printk(KERN_ERR "PCI Clock is over 33MHz.\n");
> +		iounmap(pciu_base);
>  		return -EINVAL;
>  	}
>  
> 
> 

From veerasena_b@yahoo.co.in Mon Nov  5 10:01:45 2007
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Date:	Mon, 5 Nov 2007 15:31:32 +0530 (IST)
From:	veerasena reddy <veerasena_b@yahoo.co.in>
Subject: Re: NPTL support
To:	Markus Gothe <markus.gothe@27m.se>
Cc:	uclibc@uclibc.org, linux-mips <linux-mips@linux-mips.org>,
	"linux-kernel.org" <linux-kernel@vger.kernel.org>,
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Hi Markus,

thanks for the information.

i checked out uclibc-nptl (version 0.9.29). is it a stable release?
If i want to build toolchain using buildroot with nptl support for linux kernel 2.6.18.8, could you please guide us the right version of buildroot, binutils, and gcc to be used.

Thanks & Regards,
Veerasena.

----- Original Message ----
From: Markus Gothe <markus.gothe@27m.se>
To: veerasena reddy <veerasena_b@yahoo..co.in>
Cc: uclibc@uclibc.org; linux-mips <linux-mips@linux-mips.org>; linux-kernel.org <linux-kernel@vger.kernel.org>; buildroot@uclibc.org
Sent: Friday, 2 November, 2007 6:01:41 PM
Subject: Re: NPTL support

You'll have to use the uClibc-nptl branch on their svn. In 0.9.28, no.

//Markus

On 2 Nov 2007, at 06:03, veerasena reddy wrote:

> Hi,
>
> I am trying to build the toolchain for MIPS processor using buildroot.
> I am using gcc version of 3.4.3, binutils-2.15, uclibc-0.9.28 and  
> linux-2.6.18.8 kernel.
>
> Basically i need to enable NPTL feature support in my toolchain.
> does uclibc-0.9.28 has the support for NPTL?
> If not, how can i get it enabled for my above build configuration?
>
> I see there is separate branch "uclibc-nptl" in uclibc.
> Do i need to use this (uclibc-nptl) to meet my requirement?
>
> Could you please suggest me right approach to succssfully enable NPTL?
>
> Thanks in advance.
>
> Regards,
> Veerasena.
>
>
>      Why delete messages? Unlimited storage is just a click away.  
> Go to http://help.yahoo.com/l/in/yahoo/mail/yahoomail/tools/ 
> tools-08.html
>
>

_______________________________________

Mr Markus Gothe
Software Engineer

Phone: +46 (0)13 21 81 20 (ext. 1046)
Fax: +46 (0)13 21 21 15
Mobile: +46 (0)73 718 72 80
Diskettgatan 11, SE-583 35 Linköping, Sweden
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From ralf@linux-mips.org Mon Nov  5 11:24:46 2007
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From:	Ralf Baechle <ralf@linux-mips.org>
To:	Franck Bui-Huu <fbuihuu@gmail.com>
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On Sun, Nov 04, 2007 at 09:18:32AM +0100, Franck Bui-Huu wrote:

>   1/ Its unconventional prototype is error prone: its prototype is
>   the same as memset one but was documented by mips_ksym.c like the
>   following:
> 
> 	   extern void *__bzero(void *__s, size_t __count);
> 
>   2/ For the caller, it makes no difference to call memset instead
>   since it has to setup the second parameter of __bzero to 0.
> 
>   3/ It's not part of the Linux user access API, so no module can use
>   it.
> 
>   4/ It needs to be exported with EXPORT_SYMBOL and therefore consumes
>   some extra bytes.
> 
>   5/ It has only one user.
> 
> Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
> ---
> 
>  I'm wondering if I'm missing something, because this function seems
>  so ugly and useless in the first place, that I can't refrain to
>  submit a patch to get rid of it.

Memset is almost always only ever invoked with a zero argument.  So the
idea was to have something like this:

extern void *__memset(void *__s, int __c, size_t __count);
extern void *bzero(void *__s, size_t __count);

static inline void *memset(void *s, int c, size_t count)
{
	if (__builtin_constant_p(c) && c == 0) {
		bzero(s, count);
		return s;
	} else
		return __memset(s, __c, count);
}

But that was never quite implemented like this as you noticed.

As for the differences in the return value, they're because of of
clear_user and __clear_user which return the number of bytes that could
_not_ be cleared in $a2.  Memset being invoked through the normal C calling
conventions ignores this value while it's the actual result of interest for
__clear_user.

I hope that explains things a little.

  Ralf

From ralf@linux-mips.org Mon Nov  5 11:36:37 2007
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On Sun, Nov 04, 2007 at 09:19:33PM +0100, Franck Bui-Huu wrote:

> > Latest GCC upstream supports it (in SVN since 2007-07-05).
> > 
> 
> Good news although gcc 4.3 release is planed for end of January.
> 
> Is SDE gcc going to be obsolete after this release ?

As for the kernel I don't really care.  The policy is that a working kernel
must be buildable with a stock gcc.  Which at times is painful, search for
all the great use of .word in include/asm-mips/ ...  This doesn't say
anything against taking advantage of other toolchains such SDE; it's just
the functionality must be there with a vanilla GNU toolchain of the miminum
supported version which currently still is 3.2.

  Ralf

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From:	Ralf Baechle <ralf@linux-mips.org>
To:	Roel Kluin <12o3l@tiscali.nl>
Cc:	linux-mips@linux-mips.org
Subject: Re: [PATCH] iounmap if in vr41xx_pciu_init() pci clock is over
	33MHz
Message-ID: <20071105114313.GE27893@linux-mips.org>
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On Sun, Nov 04, 2007 at 01:00:06PM +0100, Roel Kluin wrote:

> iounmap if pci clock is over 33MHz

Applied.  Note that this is purely cosmetic; for 64-bit kernels or
anything in the low 512MB of physcial address space ioremap on a 32-bit
kernel ioremap can never fail on MIPS and iounmap is a nop in this case.

  Ralf

From ralf@linux-mips.org Mon Nov  5 11:47:13 2007
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Subject: Re: [PATCH] Use strchr instead of strstr in mips/fw/arc/cmdline.c
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On Fri, Nov 02, 2007 at 07:59:05PM +0100, Roel Kluin wrote:

> Use strchr instead of strstr when searching for a single character
> 
> Signed-off-by: Roel Kluin <12o3l@tiscali.nl>

Thanks, queued for 2.6.25.

  Ralf

From markus.gothe@27m.se Mon Nov  5 12:25:03 2007
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-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA256

I don't use neither buildroot nor uClibc-nptl, due to uClibc-nptl is a
(dev-)branch and not a release. It differs quite a lot from the 0.9.29
release.

//Markus

veerasena reddy wrote:
> Hi Markus,
>
> thanks for the information.
>
> i checked out uclibc-nptl (version 0.9.29). is it a stable release?
>  If i want to build toolchain using buildroot with nptl support for
> linux kernel 2.6.18.8, could you please guide us the right version
> of buildroot, binutils, and gcc to be used.
>
> Thanks & Regards, Veerasena.
>
> ----- Original Message ---- From: Markus Gothe
> <markus.gothe@27m.se> To: veerasena reddy
> <veerasena_b@yahoo..co.in> Cc: uclibc@uclibc.org; linux-mips
> <linux-mips@linux-mips.org>; linux-kernel.org
> <linux-kernel@vger.kernel.org>; buildroot@uclibc.org Sent: Friday,
> 2 November, 2007 6:01:41 PM Subject: Re: NPTL support
>
> You'll have to use the uClibc-nptl branch on their svn. In 0.9.28,
> no.
>
> //Markus
>
> On 2 Nov 2007, at 06:03, veerasena reddy wrote:
>
>> Hi,
>>
>> I am trying to build the toolchain for MIPS processor using
>> buildroot. I am using gcc version of 3.4.3, binutils-2.15,
>> uclibc-0.9.28 and linux-2.6.18.8 kernel.
>>
>> Basically i need to enable NPTL feature support in my toolchain.
>> does uclibc-0.9.28 has the support for NPTL? If not, how can i
>> get it enabled for my above build configuration?
>>
>> I see there is separate branch "uclibc-nptl" in uclibc. Do i need
>> to use this (uclibc-nptl) to meet my requirement?
>>
>> Could you please suggest me right approach to succssfully enable
>> NPTL?
>>
>> Thanks in advance.
>>
>> Regards, Veerasena.
>>
>>
>> Why delete messages? Unlimited storage is just a click away. Go
>> to http://help.yahoo.com/l/in/yahoo/mail/yahoomail/tools/
>> tools-08.html
>>
>>
>
> _______________________________________
>
> Mr Markus Gothe Software Engineer
>
> Phone: +46 (0)13 21 81 20 (ext. 1046) Fax: +46 (0)13 21 21 15
> Mobile: +46 (0)73 718 72 80 Diskettgatan 11, SE-583 35 LinkÃ¶ping,
> Sweden www.27m.com
>
>
> Did you know? You can CHAT without downloading messenger. Go to
> http://in.messenger.yahoo.com/webmessengerpromo.php/
>
>


- --
_______________________________________

Mr Markus Gothe
Software Engineer

Phone: +46 (0)13 21 81 20 (ext. 1046)
Fax: +46 (0)13 21 21 15
Mobile: +46 (0)73 718 72 80
Diskettgatan 11, SE-583 35 LinkÃ¶ping, Sweden
www.27m.com
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From macro@linux-mips.org Mon Nov  5 12:38:44 2007
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From:	"Maciej W. Rozycki" <macro@linux-mips.org>
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On Sun, 4 Nov 2007, Franck Bui-Huu wrote:

> >  Hmm, isn't what `info ld' says enough?
> 
> Hmm, I'm must be blind but I missed that each time I read it. Could
> you point out the section number please ?

 That's section 3.8, I would guess, but if what you are looking for is not 
there, then perhaps the description could be improved.

  Maciej

From ralf@linux-mips.org Mon Nov  5 13:03:15 2007
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Date:	Mon, 5 Nov 2007 13:02:59 +0000
From:	Ralf Baechle <ralf@linux-mips.org>
To:	linux-mips@linux-mips.org
Subject: Deleting read-only environment variable on Sibyte board.
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I've got a read-only environment variable on my Sibyte/Broadcom Bigsur
system.  Annoyingly it's the network address.  Any help on how to
delete such an undeletable environment variable would be welcome.

Thanks,

  Ralf

From giuseppe@eppesuigoccas.homedns.org Mon Nov  5 13:15:10 2007
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Subject: Re: 2.6.24-rc1 does not boot on SGI
From:	Giuseppe Sacco <giuseppe@eppesuigoccas.homedns.org>
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Hi Ralf,

Il giorno lun, 29/10/2007 alle 15.06 +0000, Ralf Baechle ha scritto:
> On Sun, Oct 28, 2007 at 08:17:11PM +0100, Giuseppe Sacco wrote:
> 
> > Nothing changed using this patch: the system does not boot. Currently I
> > suspect the reason is the change the IRQ handling because it is the main
> > change in arch/mips/sg-ip32.
> 
> All the patch was meant to is to renumber interrupts so interrupts 0 ... 7
> become available for use with cpu_irq.c.  Irq 7 is the cp0 compare interrupt
> which on IP32 is used as the clockevent device that is the source of
> timer interrupts.

The latest git update, gave a bootable 2.6.24-rc1 but now, while
booting, the system start looping and calling function print_irq_desc()
from kernel/irq/internals.h. I can only read "...count:...unhandled:..."
since the text scroll too quickly, but I will try to connect a serial
console in order to send here the complete message.

Bye,
Giuseppe


From tbm@cyrius.com Mon Nov  5 14:13:35 2007
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From:	Martin Michlmayr <tbm@cyrius.com>
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Subject: Re: Donation of an Indigo 2 R4K@250
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If anyone is interested in an Indigo 2 located in Cologne, Germany,
please let me know.

> I would like to donate the MIPS porters an SGI Indigo 2 R4K@250Mhz.
> Fully working, keyboard/mouse/monitor included, but no IRIX.
> 
> The machine is located in Cologne/Germany - pickup preferred...

-- 
Martin Michlmayr
http://www.cyrius.com/

From nigel@mips.com Mon Nov  5 16:01:30 2007
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	Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
Subject: Re: [PATCH] mm/pg-r4k.c: Dump the generated code
References: <47126EDC.1060305@gmail.com> <20071014195324.GT3379@networkno.de> <4713C11F.3010903@gmail.com> <4713C958.8080805@mips.com> <47147551.1010004@gmail.com> <4714B58E.8020005@mips.com> <4715C039.7090603@gmail.com> <20071017123046.GY3379@networkno.de> <47160D31.5080201@mips.com> <472D8110.2080506@gmail.com> <20071104174710.GA9363@networkno.de> <472E2955.3000803@gmail.com>
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Franck Bui-Huu wrote:
> Thiemo Seufer wrote:
>   
>> Latest GCC upstream supports it (in SVN since 2007-07-05).
>>
>>     
>
> Good news although gcc 4.3 release is planed for end of January.
>   

Franck

A supported toolchain which now includes SmartMIPS support is the 
CodeSourcery MIPS Linux toolchain, based on gcc-4.2, see 
http://www.codesourcery.com/store/catalogue/c3/p17
> Is SDE gcc going to be obsolete after this release ?
>   

A pre-built "bare-iron" SDE configuration of GCC will probably continue 
to exist as part of the MIPS cross-development tools, but we are working 
to ensure that as many as possible of the SDE changes are available 
upstream for use by other Linux or GNU toolchain vendors, and/or those 
who wish to roll their own toolchain.

Nigel

-- 
Nigel Stephens    | 7200 Cambridge Research Park | t:[+44|0]1223 203110
MIPS Technologies | Cambridge, England  CB25 9TL | f:[+44|0]1223 203181


From giuseppe@eppesuigoccas.homedns.org Mon Nov  5 16:59:47 2007
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Subject: Re: 2.6.24-rc1 does not boot on SGI
From:	Giuseppe Sacco <giuseppe@eppesuigoccas.homedns.org>
To:	linux-mips@linux-mips.org
In-Reply-To: <1194268551.4842.3.camel@scarafaggio>
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Il giorno lun, 05/11/2007 alle 14.15 +0100, Giuseppe Sacco ha scritto:
[...]
> The latest git update, gave a bootable 2.6.24-rc1 but now, while
> booting, the system start looping and calling function print_irq_desc()
> from kernel/irq/internals.h. I can only read "...count:...unhandled:..."
[...]

Here it is:

sr0: scsi-1 drive
Uniform CD-ROM driver Revision: 3.20
sr 0:0:4:0: Attached scsi CD-ROM sr0
mice: PS/2 mouse device common for all mice
irq 13, desc: ffffffff804486e0, depth: 1, count: 0, unhandled: 0
->handle_irq():  ffffffff800663c0, handle_bad_irq+0x0/0x2c0
->chip(): ffffffff8043e320, 0xffffffff8043e320
->action(): 0000000000000000
  IRQ_DISABLED set
unexpected IRQ # 13
irq 13, desc: ffffffff804486e0, depth: 1, count: 0, unhandled: 0
->handle_irq():  ffffffff800663c0, handle_bad_irq+0x0/0x2c0
->chip(): ffffffff8043e320, 0xffffffff8043e320
->action(): 0000000000000000
  IRQ_DISABLED set
unexpected IRQ # 13


and keep printing about interrupt #13. The log from the start is
available here
http://eppesuigoccas.homedns.org/~giuseppe/debian/sgi-2.6.24-rc1-unexpted-irq13.log.bz

Bye,
Giuseppe

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Date:	Mon, 05 Nov 2007 21:32:50 +0100
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Subject: Re: [RFC] Add __initbss section
References: <470DF25E.60009@gmail.com> <Pine.LNX.4.64N.0710111307180.16370@blysk.ds.pg.gda.pl> <4712738A.5000703@gmail.com> <Pine.LNX.4.64N.0710151311350.16262@blysk.ds.pg.gda.pl> <4713C840.8080206@gmail.com> <Pine.LNX.4.64N.0710161123110.22596@blysk.ds.pg.gda.pl> <4717C1FB.4030602@gmail.com> <Pine.LNX.4.64N.0710191239490.13279@blysk.ds.pg.gda.pl> <472D82D1.1050401@gmail.com> <Pine.LNX.4.64N.0711051234230.857@blysk.ds.pg.gda.pl>
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Maciej W. Rozycki wrote:
> On Sun, 4 Nov 2007, Franck Bui-Huu wrote:
> 
>>>  Hmm, isn't what `info ld' says enough?
>> Hmm, I'm must be blind but I missed that each time I read it. Could
>> you point out the section number please ?
> 
>  That's section 3.8, I would guess, but if what you are looking for is not 
> there, then perhaps the description could be improved.
> 

After reading section 3.8 "PHDRS Command", I still fail to find
something interesting.

		Franck

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Date:	Mon, 05 Nov 2007 21:43:24 +0100
From:	Franck Bui-Huu <vagabon.xyz@gmail.com>
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	"Maciej W. Rozycki" <macro@linux-mips.org>,
	Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
Subject: Re: [PATCH] mm/pg-r4k.c: Dump the generated code
References: <47126EDC.1060305@gmail.com> <20071014195324.GT3379@networkno.de> <4713C11F.3010903@gmail.com> <4713C958.8080805@mips.com> <47147551.1010004@gmail.com> <4714B58E.8020005@mips.com> <4715C039.7090603@gmail.com> <20071017123046.GY3379@networkno.de> <47160D31.5080201@mips.com> <472D8110.2080506@gmail.com> <20071104174710.GA9363@networkno.de> <472E2955.3000803@gmail.com> <472F3D93.1070400@mips.com>
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Nigel Stephens wrote:
> 
> A supported toolchain which now includes SmartMIPS support is the
> CodeSourcery MIPS Linux toolchain, based on gcc-4.2, see
> http://www.codesourcery.com/store/catalogue/c3/p17

Interesting.

It seems that MIPS toolchains are not part of the 'lite edition' though.

Thanks,
		Franck

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Subject: Re: [PATCH] mm/pg-r4k.c: Dump the generated code
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Ralf Baechle wrote:
> On Sun, Nov 04, 2007 at 09:19:33PM +0100, Franck Bui-Huu wrote:
> 
>>> Latest GCC upstream supports it (in SVN since 2007-07-05).
>>>
>> Good news although gcc 4.3 release is planed for end of January.
>>
>> Is SDE gcc going to be obsolete after this release ?
> 
> As for the kernel I don't really care.  The policy is that a working kernel
> must be buildable with a stock gcc.  Which at times is painful, search for
> all the great use of .word in include/asm-mips/ ...  This doesn't say
> anything against taking advantage of other toolchains such SDE; it's just

It's actually hard to know the advantages of using SDE over a stock gcc.
The only difference I'm aware of is the smartmips ASE support in SDE.
But since this support is going to be added in stock gccs, I don't see
any advantages now and I'm wondering if I can give up using SDE...

		Franck

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Date:	Mon, 05 Nov 2007 22:51:43 +0100
From:	Franck Bui-Huu <vagabon.xyz@gmail.com>
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Subject: Re: [PATCH] Kill __bzero()
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Ralf Baechle wrote:
> 
> Memset is almost always only ever invoked with a zero argument.  So the
> idea was to have something like this:
> 
> extern void *__memset(void *__s, int __c, size_t __count);
> extern void *bzero(void *__s, size_t __count);
> 
> static inline void *memset(void *s, int c, size_t count)
> {
> 	if (__builtin_constant_p(c) && c == 0) {
> 		bzero(s, count);
> 		return s;
> 	} else
> 		return __memset(s, __c, count);
> }
> 
> But that was never quite implemented like this as you noticed.

Well I'm not sure we really need this. bzero() is not part of the
Linux string API, so it can only be used by MIPS specific code. And
with the current implementation of bzero(), $a1 needs to be setup to 0
anyway. That's why I simply killed it...

BTW, can memset() be an inlined function ?

> 
> As for the differences in the return value, they're because of of
> clear_user and __clear_user which return the number of bytes that could
> _not_ be cleared in $a2.  Memset being invoked through the normal C calling
> conventions ignores this value while it's the actual result of interest for
> __clear_user.
> 

Yes I noticed this. Actually I'm wondering if we couldn't add a new
function, fill_user() like the following:

extern size_t fill_user(void __user *to, int c, size_t len);

This could be used by both memset() and clear_user():

#define memset(s,c,l)	({ (void)fill(s,c,l); s; })
#define clear_user(t,l)	fill_user(t,0,l)

Therefore the definition of clear_user() could be saner.

What do you think ?

		Franck 



From ralf@linux-mips.org Mon Nov  5 23:18:21 2007
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On Mon, Nov 05, 2007 at 10:51:43PM +0100, Franck Bui-Huu wrote:

> > Memset is almost always only ever invoked with a zero argument.  So the
> > idea was to have something like this:
> > 
> > extern void *__memset(void *__s, int __c, size_t __count);
> > extern void *bzero(void *__s, size_t __count);
> > 
> > static inline void *memset(void *s, int c, size_t count)
> > {
> > 	if (__builtin_constant_p(c) && c == 0) {
> > 		bzero(s, count);
> > 		return s;
> > 	} else
> > 		return __memset(s, __c, count);
> > }
> > 
> > But that was never quite implemented like this as you noticed.
> 
> Well I'm not sure we really need this. bzero() is not part of the
> Linux string API, so it can only be used by MIPS specific code. And
> with the current implementation of bzero(), $a1 needs to be setup to 0
> anyway. That's why I simply killed it...
> 
> BTW, can memset() be an inlined function ?

It can be anything, macro, inline or outline function.  In the kernel
there are fewer restrictions than for a standards compliant library in
userspace.

You may take the i386 implementation in include/asm-x86/string_32.h as
an extreme example.

Older gcc used to generate significantly worse code for inline functions
than for macros so Linux became a fairly excessive user of macros.  This
has very much improved since, so these days inlines are prefered over
macros where possible.

> Yes I noticed this. Actually I'm wondering if we couldn't add a new
> function, fill_user() like the following:
> 
> extern size_t fill_user(void __user *to, int c, size_t len);

That's much better function name than the old __bzero - except that
__bzero effectivly took a long argument for the 2nd argument so 32-bit
on 32-bit kernels and 64-bit on 64-bit kernels.

> This could be used by both memset() and clear_user():
> 
> #define memset(s,c,l)	({ (void)fill(s,c,l); s; })
> #define clear_user(t,l)	fill_user(t,0,l)
> 
> Therefore the definition of clear_user() could be saner.

Looks alot nicer that way though an inline is probably preferable as
expressed above.

  Ralf

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On Mon, Nov 05, 2007 at 10:34:58PM +0100, Franck Bui-Huu wrote:

> It's actually hard to know the advantages of using SDE over a stock gcc.
> The only difference I'm aware of is the smartmips ASE support in SDE.
> But since this support is going to be added in stock gccs, I don't see
> any advantages now and I'm wondering if I can give up using SDE...

In general terms the toolchain has been more reliable and had better
support for MIPS processors before FSF gcc.

  Ralf

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Ralf Baechle wrote:
> On Mon, Nov 05, 2007 at 10:34:58PM +0100, Franck Bui-Huu wrote:
> 
>> It's actually hard to know the advantages of using SDE over a stock gcc.
>> The only difference I'm aware of is the smartmips ASE support in SDE.
>> But since this support is going to be added in stock gccs, I don't see
>> any advantages now and I'm wondering if I can give up using SDE...
> 
> In general terms the toolchain has been more reliable and had better
> support for MIPS processors before FSF gcc.
> 

Good point.

		Franck

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Ralf Baechle wrote:
> On Mon, Nov 05, 2007 at 10:51:43PM +0100, Franck Bui-Huu wrote:
> 
>>> Memset is almost always only ever invoked with a zero argument.  So the
>>> idea was to have something like this:
>>>
>>> extern void *__memset(void *__s, int __c, size_t __count);
>>> extern void *bzero(void *__s, size_t __count);
>>>
>>> static inline void *memset(void *s, int c, size_t count)
>>> {
>>> 	if (__builtin_constant_p(c) && c == 0) {
>>> 		bzero(s, count);
>>> 		return s;
>>> 	} else
>>> 		return __memset(s, __c, count);
>>> }
>>>
>>> But that was never quite implemented like this as you noticed.
>> Well I'm not sure we really need this. bzero() is not part of the
>> Linux string API, so it can only be used by MIPS specific code. And
>> with the current implementation of bzero(), $a1 needs to be setup to 0
>> anyway. That's why I simply killed it...
>>
>> BTW, can memset() be an inlined function ?
> 
> It can be anything, macro, inline or outline function.  In the kernel
> there are fewer restrictions than for a standards compliant library in
> userspace.
> 
> You may take the i386 implementation in include/asm-x86/string_32.h as
> an extreme example.
> 
> Older gcc used to generate significantly worse code for inline functions
> than for macros so Linux became a fairly excessive user of macros.  This
> has very much improved since, so these days inlines are prefered over
> macros where possible.

Yes but ISTR that gcc generates some calls to memset and since
builtin functions are disabled the final link failed if memset
is inlined. I'll try to reproduce...

> 
>> Yes I noticed this. Actually I'm wondering if we couldn't add a new
>> function, fill_user() like the following:
>>
>> extern size_t fill_user(void __user *to, int c, size_t len);
> 
> That's much better function name than the old __bzero - except that

Actually I named it '__fill_user', since it doesn't call access_ok().

> __bzero effectivly took a long argument for the 2nd argument so 32-bit
> on 32-bit kernels and 64-bit on 64-bit kernels.

Isn't size_t meaning ?

Perhaps in this case __kernel_size_t is better...

> 
>> This could be used by both memset() and clear_user():
>>
>> #define memset(s,c,l)	({ (void)fill(s,c,l); s; })
>> #define clear_user(t,l)	fill_user(t,0,l)
>>
>> Therefore the definition of clear_user() could be saner.
> 
> Looks alot nicer that way though an inline is probably preferable as
> expressed above.
> 

Yes I have a patchset which clean up a bit uaccess.h and does this but
it's under construction.  It actually tries to convert all macros into
inlines and the file is much more readable and as a bonus side we could
easily add __must_check annotations which are currently missing.

I'll try to finish it this week but in the meantime can we just kill
__bzero or do you want me to include it in the future patchset ?

		Franck

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On Tue, Nov 06, 2007 at 08:42:48AM +0100, Franck Bui-Huu wrote:

> > Older gcc used to generate significantly worse code for inline functions
> > than for macros so Linux became a fairly excessive user of macros.  This
> > has very much improved since, so these days inlines are prefered over
> > macros where possible.
> 
> Yes but ISTR that gcc generates some calls to memset and since
> builtin functions are disabled the final link failed if memset
> is inlined. I'll try to reproduce...

So both belt and suspenders then that is an inline/macro plus an outline
version?

> >> Yes I noticed this. Actually I'm wondering if we couldn't add a new
> >> function, fill_user() like the following:
> >>
> >> extern size_t fill_user(void __user *to, int c, size_t len);
> > 
> > That's much better function name than the old __bzero - except that
> 
> Actually I named it '__fill_user', since it doesn't call access_ok().
> 
> > __bzero effectivly took a long argument for the 2nd argument so 32-bit
> > on 32-bit kernels and 64-bit on 64-bit kernels.
> 
> Isn't size_t meaning ?
> 
> Perhaps in this case __kernel_size_t is better...

I wrote about the existing __bzero which takes the size_t length as third 
argument and a long sized fill pattern as the second.

> Yes I have a patchset which clean up a bit uaccess.h and does this but
> it's under construction.  It actually tries to convert all macros into
> inlines and the file is much more readable and as a bonus side we could
> easily add __must_check annotations which are currently missing.
> 
> I'll try to finish it this week but in the meantime can we just kill
> __bzero or do you want me to include it in the future patchset ?

There is enough time until 2.6.25 to complete your cleanups; no more
cleanups for 2.6.24.

  Ralf

From ralf@linux-mips.org Tue Nov  6 13:47:51 2007
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On Thu, Oct 18, 2007 at 09:11:14AM +0200, Franck Bui-Huu wrote:

Queued for 2.6.25.

Thanks,

  Ralf

From ralf@linux-mips.org Tue Nov  6 14:03:13 2007
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On Thu, Oct 18, 2007 at 09:11:15AM +0200, Franck Bui-Huu wrote:

> Date: Thu, 18 Oct 2007 09:11:15 +0200
> To: ralf@linux-mips.org
> Cc: anemo@mba.ocn.ne.jp, ths@networkno.de, linux-mips@linux-mips.org
> Subject: [PATCH 2/4] tlbex.c: cleanup include files

Queued for 2.6.25.

Thanks,

  Ralf

From ralf@linux-mips.org Tue Nov  6 14:03:40 2007
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On Thu, Oct 18, 2007 at 09:11:16AM +0200, Franck Bui-Huu wrote:

> To: ralf@linux-mips.org
> Cc: anemo@mba.ocn.ne.jp, ths@networkno.de, linux-mips@linux-mips.org
> Subject: [PATCH 3/4] tlbex.c: use __cacheline_aligned instead of
> 	__tlb_handler_align attribute

Queued for 2.6.25.

Thanks alot,

  Ralf

From ralf@linux-mips.org Tue Nov  6 14:31:52 2007
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On Thu, Oct 18, 2007 at 09:11:17AM +0200, Franck Bui-Huu wrote:

And this one also queued for 2.6.25.

Thanks again,

  Ralf

From anemo@mba.ocn.ne.jp Tue Nov  6 15:38:44 2007
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Subject: Re: WAIT vs. tickless kernel
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On Sat, 03 Nov 2007 01:46:49 +0900 (JST), Atsushi Nemoto <anemo@mba.ocn.ne.jp> wrote:
> > The tickless kernel is very interesting for the low power fraction.  And
> > it's especially those users who would suffer most the loss of the ability
> > to use the WAIT instruction.  For a system running from two AAA cells the
> > tradeoff is clear ...  So I think it's become a must.
> 
> Then, something like this?  Selecting in build-time is not so good,
> but there are some CPUs which do not need this hack at all.
> Synthesizing the ret_from_irq() at runtime might satisfy everyone?

Revised.  

As Ralf said on IRC, the adjustment can be done at beginning of
handler, instead of ret_from_irq.  So we can enable this hack at
runtime.  I introduced BUILD_ROLLBACK_PROLOGUE macro to build prologue
code for handle_int and except_vec_vi.  I'm not sure except_vec4 needs
the prologue or not.

And if the EPC was just after WAIT (i.e. normal wakeup from WAIT) the
rollback is not needed.  So I arranged r4k_wait so that the rollback
region exactly fit to 32 byte.

How about this?

------------------------------------------------------------------------
Subject: Fix potential latency problem due to non-atomic cpu_wait.

If an interrupt happened between checking of NEED_RESCHED and WAIT
instruction, adjust EPC to restart from checking of NEED_RESCHED.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
---
 arch/mips/kernel/cpu-probe.c |   16 ++--------------
 arch/mips/kernel/genex.S     |   38 ++++++++++++++++++++++++++++++++++++++
 arch/mips/kernel/traps.c     |   22 ++++++++++++++++------
 3 files changed, 56 insertions(+), 20 deletions(-)

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index c8c47a2..c745b91 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -45,18 +45,7 @@ static void r39xx_wait(void)
 	local_irq_enable();
 }
 
-/*
- * There is a race when WAIT instruction executed with interrupt
- * enabled.
- * But it is implementation-dependent wheter the pipelie restarts when
- * a non-enabled interrupt is requested.
- */
-static void r4k_wait(void)
-{
-	__asm__("	.set	mips3			\n"
-		"	wait				\n"
-		"	.set	mips0			\n");
-}
+extern void r4k_wait(void);
 
 /*
  * This variant is preferable as it allows testing need_resched and going to
@@ -128,7 +117,7 @@ static int __init wait_disable(char *s)
 
 __setup("nowait", wait_disable);
 
-static inline void check_wait(void)
+void __init check_wait(void)
 {
 	struct cpuinfo_mips *c = &current_cpu_data;
 
@@ -239,7 +228,6 @@ static inline void check_errata(void)
 
 void __init check_bugs32(void)
 {
-	check_wait();
 	check_errata();
 }
 
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index c0f19d6..bb72c3a 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -20,6 +20,7 @@
 #include <asm/stackframe.h>
 #include <asm/war.h>
 #include <asm/page.h>
+#include <asm/thread_info.h>
 
 #define PANIC_PIC(msg)					\
 		.set push;				\
@@ -126,7 +127,43 @@ handle_vcei:
 
 	__FINIT
 
+	.align	5	/* 32 byte rollback region */
+LEAF(r4k_wait)
+	.set	push
+	.set	noreorder
+	/* start of rollback region */
+	LONG_L	t0, TI_FLAGS($28)
+	nop
+	andi	t0, _TIF_NEED_RESCHED
+	bnez	t0, 1f
+	 nop
+	nop
+	nop
+	.set	mips3
+	wait
+	.set	mips0
+	/* end of rollback region (the region size must be power of two) */
+	.set	pop
+1:
+	jr	ra
+	END(r4k_wait)
+
+	.macro	BUILD_ROLLBACK_PROLOGUE handler
+	FEXPORT(rollback_\handler)
+	.set	push
+	.set	noat
+	MFC0	k0, CP0_EPC
+	ori	k0, 0x1f	/* 32 byte rollback region */
+	xori	k0, 0x1f
+	PTR_LA	k1, r4k_wait
+	bne	k0, k1, 9f
+	MTC0	k0, CP0_EPC
+9:
+	.set pop
+	.endm
+
 	.align  5
+BUILD_ROLLBACK_PROLOGUE handle_int
 NESTED(handle_int, PT_SIZE, sp)
 #ifdef CONFIG_TRACE_IRQFLAGS
 	/*
@@ -201,6 +238,7 @@ NESTED(except_vec_ejtag_debug, 0, sp)
  * This prototype is copied to ebase + n*IntCtl.VS and patched
  * to invoke the handler
  */
+BUILD_ROLLBACK_PROLOGUE except_vec_vi
 NESTED(except_vec_vi, 0, sp)
 	SAVE_SOME
 	SAVE_AT
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index fa50078..0b2cc58 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -43,6 +43,9 @@
 #include <asm/types.h>
 #include <asm/stacktrace.h>
 
+extern void check_wait(void);
+extern asmlinkage void r4k_wait(void);
+extern asmlinkage void rollback_handle_int(void);
 extern asmlinkage void handle_int(void);
 extern asmlinkage void handle_tlbm(void);
 extern asmlinkage void handle_tlbl(void);
@@ -1198,6 +1201,9 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
 
 		extern char except_vec_vi, except_vec_vi_lui;
 		extern char except_vec_vi_ori, except_vec_vi_end;
+		extern char rollback_except_vec_vi;
+		char *vec_start = (cpu_wait == r4k_wait) ?
+			&rollback_except_vec_vi : &except_vec_vi;
 #ifdef CONFIG_MIPS_MT_SMTC
 		/*
 		 * We need to provide the SMTC vectored interrupt handler
@@ -1205,11 +1211,11 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
 		 * Status.IM bit to be masked before going there.
 		 */
 		extern char except_vec_vi_mori;
-		const int mori_offset = &except_vec_vi_mori - &except_vec_vi;
+		const int mori_offset = &except_vec_vi_mori - vec_start;
 #endif /* CONFIG_MIPS_MT_SMTC */
-		const int handler_len = &except_vec_vi_end - &except_vec_vi;
-		const int lui_offset = &except_vec_vi_lui - &except_vec_vi;
-		const int ori_offset = &except_vec_vi_ori - &except_vec_vi;
+		const int handler_len = &except_vec_vi_end - vec_start;
+		const int lui_offset = &except_vec_vi_lui - vec_start;
+		const int ori_offset = &except_vec_vi_ori - vec_start;
 
 		if (handler_len > VECTORSPACING) {
 			/*
@@ -1219,7 +1225,7 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
 			panic("VECTORSPACING too small");
 		}
 
-		memcpy(b, &except_vec_vi, handler_len);
+		memcpy(b, vec_start, handler_len);
 #ifdef CONFIG_MIPS_MT_SMTC
 		BUG_ON(n > 7);	/* Vector index %d exceeds SMTC maximum. */
 
@@ -1497,6 +1503,10 @@ void __init trap_init(void)
 	extern char except_vec3_generic, except_vec3_r4000;
 	extern char except_vec4;
 	unsigned long i;
+	int rollback;
+
+	check_wait();
+	rollback = (cpu_wait == r4k_wait);
 
 	if (cpu_has_veic || cpu_has_vint)
 		ebase = (unsigned long) alloc_bootmem_low_pages(0x200 + VECTORSPACING*64);
@@ -1558,7 +1568,7 @@ void __init trap_init(void)
 	if (board_be_init)
 		board_be_init();
 
-	set_except_vector(0, handle_int);
+	set_except_vector(0, rollback ? rollback_handle_int : handle_int);
 	set_except_vector(1, handle_tlbm);
 	set_except_vector(2, handle_tlbl);
 	set_except_vector(3, handle_tlbs);

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To:	Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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Subject: Re: WAIT vs. tickless kernel
References: <20071101.013124.108121433.anemo@mba.ocn.ne.jp>	<20071031163900.GB22871@linux-mips.org>	<20071103.014649.122254137.anemo@mba.ocn.ne.jp> <20071107.003925.74752709.anemo@mba.ocn.ne.jp>
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Atsushi Nemoto wrote:
> +LEAF(r4k_wait)
> +	.set	push
> +	.set	noreorder
> +	/* start of rollback region */
> +	LONG_L	t0, TI_FLAGS($28)
> +	nop
> +	andi	t0, _TIF_NEED_RESCHED
> +	bnez	t0, 1f
> +	 nop
> +	nop
> +	nop
> +	.set	mips3
> +	wait
> +	.set	mips0
> +	/* end of rollback region (the region size must be power of two) */
> +	.set	pop
>   

The .set mips0 is redundant as .set pop immediately follows.

David Daney


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On Tue, 06 Nov 2007 07:58:46 -0800, David Daney <ddaney@avtrex.com> wrote:
> > +	.set	mips0
> > +	/* end of rollback region (the region size must be power of two) */
> > +	.set	pop
> >   
> 
> The .set mips0 is redundant as .set pop immediately follows.

Oh yes.  I'll drop it on next revision.  Thanks.

---
Atsushi Nemoto

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Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
---
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index c0f19d6..e76a76b 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -146,7 +146,7 @@ NESTED(handle_int, PT_SIZE, sp)
 	and	k0, ST0_IEP
 	bnez	k0, 1f
 
-	mfc0	k0, EP0_EPC
+	mfc0	k0, CP0_EPC
 	.set	noreorder
 	j	k0
 	rfe

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Date:	Tue, 06 Nov 2007 17:18:41 +0100
From:	Franck Bui-Huu <vagabon.xyz@gmail.com>
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Subject: Re: [PATCH] Kill __bzero()
References: <472D8058.5080209@gmail.com> <20071105112429.GC27893@linux-mips.org> <472F906F.7080205@gmail.com> <20071105231818.GA18820@linux-mips.org> <47301AF8.2000700@gmail.com> <20071106103603.GA24844@linux-mips.org>
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Ralf Baechle wrote:
> On Tue, Nov 06, 2007 at 08:42:48AM +0100, Franck Bui-Huu wrote:
> 
>>> Older gcc used to generate significantly worse code for inline functions
>>> than for macros so Linux became a fairly excessive user of macros.  This
>>> has very much improved since, so these days inlines are prefered over
>>> macros where possible.
>> Yes but ISTR that gcc generates some calls to memset and since
>> builtin functions are disabled the final link failed if memset
>> is inlined. I'll try to reproduce...
> 

OK, using Cobalt config and the patch below, I get the following link
failure:

$ make

[snip]

  CC      init/version.o
  LD      init/built-in.o
  LD      .tmp_vmlinux1
kernel/built-in.o: In function `param_sysfs_init':
params.c:(.init.text+0x19ac): undefined reference to `memset'
params.c:(.init.text+0x19ac): relocation truncated to fit: R_MIPS_26 against `memset'
fs/built-in.o: In function `locks_remove_flock':
(.text+0x14518): undefined reference to `memset'
fs/built-in.o: In function `locks_remove_flock':
(.text+0x14518): relocation truncated to fit: R_MIPS_26 against `memset'
fs/built-in.o: In function `__blkdev_get':
block_dev.c:(.text+0x31d40): undefined reference to `memset'
block_dev.c:(.text+0x31d40): relocation truncated to fit: R_MIPS_26 against `memset'
block_dev.c:(.text+0x31d50): undefined reference to `memset'
block_dev.c:(.text+0x31d50): relocation truncated to fit: R_MIPS_26 against `memset'
make: *** [.tmp_vmlinux1] Error 1


> So both belt and suspenders then that is an inline/macro plus an outline
> version?
> 

I guess so.

>>>> Yes I noticed this. Actually I'm wondering if we couldn't add a new
>>>> function, fill_user() like the following:
>>>>
>>>> extern size_t fill_user(void __user *to, int c, size_t len);
>>> That's much better function name than the old __bzero - except that
>> Actually I named it '__fill_user', since it doesn't call access_ok().
>>
>>> __bzero effectivly took a long argument for the 2nd argument so 32-bit
>>> on 32-bit kernels and 64-bit on 64-bit kernels.
>> Isn't size_t meaning ?
>>
>> Perhaps in this case __kernel_size_t is better...
> 
> I wrote about the existing __bzero which takes the size_t length as third 
> argument and a long sized fill pattern as the second.
> 

Sorry I was confused (again) because of the invisible second parameter
of __bzero...

>> Yes I have a patchset which clean up a bit uaccess.h and does this but
>> it's under construction.  It actually tries to convert all macros into
>> inlines and the file is much more readable and as a bonus side we could
>> easily add __must_check annotations which are currently missing.
>>
>> I'll try to finish it this week but in the meantime can we just kill
>> __bzero or do you want me to include it in the future patchset ?
> 
> There is enough time until 2.6.25 to complete your cleanups; no more
> cleanups for 2.6.24.
> 

Sure.

		Franck
-- 8< --

diff --git a/arch/mips/lib/memset.S b/arch/mips/lib/memset.S
index 3f8b8b3..23f0490 100644
--- a/arch/mips/lib/memset.S
+++ b/arch/mips/lib/memset.S
@@ -54,7 +54,7 @@
  */
 	.set	noreorder
 	.align	5
-LEAF(memset)
+LEAF(__memset)
 	beqz		a1, 1f
 	 move		v0, a0			/* result */
 
diff --git a/include/asm-mips/string.h b/include/asm-mips/string.h
index 436e3ad..b2ef64c 100644
--- a/include/asm-mips/string.h
+++ b/include/asm-mips/string.h
@@ -132,7 +132,12 @@ strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count)
 #endif /* CONFIG_32BIT */
 
 #define __HAVE_ARCH_MEMSET
-extern void *memset(void *__s, int __c, size_t __count);
+static inline void *memset(void *__s, int __c, size_t __count)
+{
+	extern void *__memset(void *s, int c, size_t len);
+
+	return __memset(__s, __c, __count);
+}
 
 #define __HAVE_ARCH_MEMCPY
 extern void *memcpy(void *__to, __const__ void *__from, size_t __n);

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Hi Ralf,
 
Can you try 'Unsetenv [NAME]'?


>-----Original Message-----
>From: linux-mips-bounce@linux-mips.org 
>[mailto:linux-mips-bounce@linux-mips.org] On Behalf Of Ralf Baechle
>Sent: Monday, November 05, 2007 5:03 AM
>To: linux-mips@linux-mips.org
>Subject: Deleting read-only environment variable on Sibyte board.
>
>I've got a read-only environment variable on my 
>Sibyte/Broadcom Bigsur system.  Annoyingly it's the network 
>address.  Any help on how to delete such an undeletable 
>environment variable would be welcome.
>
>Thanks,
>
>  Ralf
>
>
>


From ralf@linux-mips.org Tue Nov  6 22:28:37 2007
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On Tue, Nov 06, 2007 at 12:18:51PM -0800, Manoj Ekbote wrote:

> Hi Ralf,
>  
> Can you try 'Unsetenv [NAME]'?

I'm getting an error message, something about the variable being read-only.

Thanks anyway,

  Ralf

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Date:	Wed, 7 Nov 2007 01:08:10 +0000
From:	"Reeve Yang" <reeve.yang@gmail.com>
To:	linux-mips@linux-mips.org
Subject: cross-tool for mips target
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Hi there,

I'm trying to build cross tool chain for mips32 target from my pc
(i686) based on crosstoll-0.43. By running "sh demo-mips.sh" (I chose
eval `cat mips.dat gcc-3.4.5-glibc-2.3.5.dat` sh all.sh --notest), I
got following error from log file. Has anyone ever had similiar
experience and how did you fix it? Thanks!

- Reeve

## ----------- ##
## Core tests. ##
## ----------- ##

configure:1706: checking build system type
configure:1724: result: i686-pc-linux-gnu
configure:1732: checking host system type
configure:1746: result: mips642-unknown-linux-gnu
configure:1998: checking sysdep dirs
configure:2214: result: sysdeps/generic/elf sysdeps/generic
configure:2233: checking for a BSD-compatible install
configure:2288: result: /usr/bin/install -c
configure:2303: checking whether ln -s works
configure:2307: result: yes
configure:2323: checking for mips32-linux-gnu-gcc
configure:2349: result: gcc
configure:2631: checking for C compiler version
configure:2634: gcc --version </dev/null >&5
gcc (GCC) 3.3.5 (Debian 1:3.3.5-13)
Copyright (C) 2003 Free Software Foundation, Inc.
This is free software; see the source for copying conditions.  There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

configure:2637: $? = 0
configure:2639: gcc -v </dev/null >&5
Reading specs from /usr/lib/gcc-lib/i486-linux/3.3.5/specs
Configured with: ../src/configure -v
--enable-languages=c,c++,java,f77,pascal,objc,ada,treelang --prefix=/
usr --mandir=/usr/share/man --infodir=/usr/share/info
--with-gxx-include-dir=/usr/include/c++/3.3 --enable
-shared --enable-__cxa_atexit --with-system-zlib --enable-nls
--without-included-gettext --enable-clocale=
gnu --enable-debug --enable-java-gc=boehm --enable-java-awt=xlib
--enable-objc-gc i486-linux
Thread model: posix
gcc version 3.3.5 (Debian 1:3.3.5-13)
configure:2642: $? = 0
configure:2644: gcc -V </dev/null >&5
gcc: `-V' option must have argument
configure:2647: $? = 1
configure:2651: checking for suffix of object files
configure:2672: gcc -c   -mabi=n32 conftest.c >&5
cc1: error: invalid option `abi=n32'
configure:2675: $? = 1
configure: failed program was:
| /* confdefs.h.  */
|
| #define PACKAGE_NAME "GNU C Library"
| #define PACKAGE_TARNAME "c-library"
| #define PACKAGE_VERSION "(see version.h)"
| #define PACKAGE_STRING "GNU C Library (see version.h)"
| #define PACKAGE_BUGREPORT "glibc"
| /* end confdefs.h.  */
|
| int
| main ()
| {
|
|   ;
|   return 0;
| }
configure:2689: error: cannot compute suffix of object files: cannot compile
See `config.log' for more details.

From ddaney@avtrex.com Wed Nov  7 01:14:58 2007
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Reeve Yang wrote:
> Hi there,
> 
> I'm trying to build cross tool chain for mips32 target from my pc
> (i686) based on crosstoll-0.43. By running "sh demo-mips.sh" (I chose
> eval `cat mips.dat gcc-3.4.5-glibc-2.3.5.dat` sh all.sh --notest), I
> got following error from log file. Has anyone ever had similiar
> experience and how did you fix it? Thanks!
> 

I would ask over on: crossgcc@sourceware.org

That is where crosstool is often discussed.

David Daney


From ralf@linux-mips.org Wed Nov  7 09:43:15 2007
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From:	Ralf Baechle <ralf@linux-mips.org>
To:	Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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Subject: Re: [PATCH] Fix typo in R3000 TRACE_IRQFLAGS code
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On Wed, Nov 07, 2007 at 01:08:48AM +0900, Atsushi Nemoto wrote:

> Subject: [PATCH] Fix typo in R3000 TRACE_IRQFLAGS code

I guess that's because the last R3000 is still busy compiling a 2.6.0
kernel ;-)

Applied,

  Ralf

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On Mon, 29 Oct 2007, Ralf Baechle wrote:

> And to ensure it will stay that way I'll keep -Werror.  It seems only
> little PITAs like this keep everybody on their toes :-)

 Yeah...  If only GCC had no bugs and always had a clue of what to warn 
about...

  Maciej

From anemo@mba.ocn.ne.jp Wed Nov  7 14:08:36 2007
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Subject: Re: [MIPS] Fix and cleanup the MIPS part of the (ab)use of
 CLOCK_TICK_RATE.
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On Thu, 01 Nov 2007 15:46:41 +0000, linux-mips@linux-mips.org wrote:
> Author: Ralf Baechle <ralf@linux-mips.org> Thu Nov 1 15:45:37 2007 +0000
> Commit: 0a354a30fe552b78a4db0873c19d8936551cc158
> Gitweb: http://www.linux-mips.org/g/linux/0a354a30
> Branch: master
> 
> This is the clock rate of the i8253 PIT.  A MIPS system may not have
> a PIT by the symbol is used all over the kernel including some APIs.
> So keeping it defined to the number for the PIT is the only sane thing
> for now.

The CLOCK_TICK_RATE is used for ACTHZ, TICK_NSEC, etc.

At least for i8253-free platforms, It looks a value multiple of HZ
would be better for such constants, assuming we have dyntick or
accurate HZ clockevents.

How about something like this?

diff --git a/include/asm-mips/timex.h b/include/asm-mips/timex.h
index 5816ad1..e9622b6 100644
--- a/include/asm-mips/timex.h
+++ b/include/asm-mips/timex.h
@@ -18,7 +18,11 @@
  * So keeping it defined to the number for the PIT is the only sane thing
  * for now.
  */
+#ifdef CONFIG_I8253
 #define CLOCK_TICK_RATE 1193182
+#else
+#define CLOCK_TICK_RATE 1024000	/* multiple of HZ */
+#endif
 
 /*
  * Standard way to access the cycle counter.

From ralf@linux-mips.org Wed Nov  7 14:17:58 2007
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On Wed, Nov 07, 2007 at 11:10:36PM +0900, Atsushi Nemoto wrote:

> The CLOCK_TICK_RATE is used for ACTHZ, TICK_NSEC, etc.
> 
> At least for i8253-free platforms, It looks a value multiple of HZ
> would be better for such constants, assuming we have dyntick or
> accurate HZ clockevents.
> 
> How about something like this?
> 
> diff --git a/include/asm-mips/timex.h b/include/asm-mips/timex.h
> index 5816ad1..e9622b6 100644
> --- a/include/asm-mips/timex.h
> +++ b/include/asm-mips/timex.h
> @@ -18,7 +18,11 @@
>   * So keeping it defined to the number for the PIT is the only sane thing
>   * for now.
>   */
> +#ifdef CONFIG_I8253
>  #define CLOCK_TICK_RATE 1193182
> +#else
> +#define CLOCK_TICK_RATE 1024000	/* multiple of HZ */
> +#endif

kernel/time/ntp.c:#define CLOCK_TICK_OVERFLOW   (LATCH * HZ - CLOCK_TICK_RATE)
kernel/time/ntp.c:                                      (s64)CLOCK_TICK_RATE)

drivers/char/vt_ioctl.c:                        arg = CLOCK_TICK_RATE / arg;
drivers/char/vt_ioctl.c:                        count = CLOCK_TICK_RATE / count;

There is so much abuse of this variable, it's not even funny.  It really
deserve to be taken out and shot.  And that's just two cases.

  Ralf

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On Wed, 07 Nov 2007 00:39:25 +0900 (JST), Atsushi Nemoto <anemo@mba.ocn.ne.jp> wrote:
> +	MFC0	k0, CP0_EPC
> +	ori	k0, 0x1f	/* 32 byte rollback region */
> +	xori	k0, 0x1f
> +	PTR_LA	k1, r4k_wait

Well, this part should be like this, for better pipelining.

	MFC0	k0, CP0_EPC
	PTR_LA	k1, r4k_wait
	ori	k0, 0x1f	/* 32 byte rollback region */
	xori	k0, 0x1f

> +	bne	k0, k1, 9f
> +	MTC0	k0, CP0_EPC
> +9:

And if we could assume branch-likely, this can be:

	.set	noreorder
	beql	k0, k1, 9f
	 MTC0	k0, CP0_EPC
9:

But not sure if it really have points.

>  	.align  5
> +BUILD_ROLLBACK_PROLOGUE handle_int
>  NESTED(handle_int, PT_SIZE, sp)

And one more question: should we put one more ".align 5" just befor
handle_int for CPUs do not need the rollback?

---
Atsushi Nemoto

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Subject: Re: Preliminary patch for ip32 ttyS* device
From:	Giuseppe Sacco <giuseppe@eppesuigoccas.homedns.org>
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Il giorno mer, 31/10/2007 alle 13.08 +0000, Ralf Baechle ha scritto:
[...]
> > diff --git a/drivers/serial/serial_core.c b/drivers/serial/serial_core.c
> > index 3bb5d24..7caa877 100644
> > --- a/drivers/serial/serial_core.c
> > +++ b/drivers/serial/serial_core.c
> > @@ -2455,6 +2455,8 @@ int uart_match_port(struct uart_port *port1, struct uart_port *port2)
> >  	case UPIO_AU:
> >  	case UPIO_TSI:
> >  	case UPIO_DWAPB:
> > +		if (port1->mapbase==0 && port2->mapbase==0)
> > +			return (port1->membase == port2->membase);
> 
> This hack is only needed because ->mapbase is not initialized.

I have been investigating about it for one week and I am still not
convinced that mapbase must be initialised. I tried to understand the
meaning of mapbase and membase, but I am unsure about the value I should
set mapbase to.

I learnt that when specifying mapbase its region would be registered and
reserved using request_mem_region(). Otherwise, if you do not specify
mapbase, the region is not reserved. Apart from reserving the memory
region, mapbase isn't use anymore. Is mapbase mandatory? 

If mapbase isn't mandatory, the second part of my patch is probably
right and fixes a bug.

Bye,
Giuseppe


From johannes@sipsolutions.net Wed Nov  7 15:08:51 2007
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Date:	Wed, 07 Nov 2007 14:58:00 +0100
From:	Johannes Berg <johannes@sipsolutions.net>
To:	linux-pm@lists.linux-foundation.org
Cc:	"Rafael J. Wysocki" <rjw@sisk.pl>, linuxppc-dev@ozlabs.org,
	Guennadi Liakhovetski <g.liakhovetski@gmx.de>,
	Scott Wood <scottwood@freescale.com>,
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	Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org,
	Paul Mundt <lethal@linux-sh.org>,
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	Russell King <rmk@arm.linux.org.uk>
Subject: [PATCH (2.6.25) 2/2] suspend: clean up Kconfig
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This cleans up the suspend Kconfig and removes the need to
declare centrally which architectures support suspend. All
architectures that currently support suspend are modified
accordingly.

Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Cc: linuxppc-dev@ozlabs.org
Cc: linux-pm@lists.linux-foundation.org
Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: Scott Wood <scottwood@freescale.com>
Cc: David Howells <dhowells@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Bryan Wu <bryan.wu@analog.com>
Cc: Russell King <rmk@arm.linux.org.uk>
---
Architecture maintainers should evaluate whether their
ARCH_SUSPEND_POSSIBLE symbol should be set only under
stricter circumstances like I've done for powerpc.

Always setting it is not usually a problem, however, since the
infrastructure is only available for use after suspend_set_ops().

 arch/arm/Kconfig      |    3 +++
 arch/blackfin/Kconfig |    4 ++++
 arch/frv/Kconfig      |    5 +++++
 arch/i386/Kconfig     |    4 ++++
 arch/mips/Kconfig     |    4 ++++
 arch/powerpc/Kconfig  |    4 ++++
 arch/sh/Kconfig       |    4 ++++
 arch/x86_64/Kconfig   |    3 +++
 kernel/power/Kconfig  |   21 +++------------------
 9 files changed, 34 insertions(+), 18 deletions(-)

--- everything.orig/arch/i386/Kconfig	2007-11-07 14:45:28.591544215 +0100
+++ everything/arch/i386/Kconfig	2007-11-07 14:45:28.631515461 +0100
@@ -1323,3 +1323,7 @@ config KTIME_SCALAR
 config ARCH_HIBERNATION_POSSIBLE
 	def_bool y
 	depends on !SMP || !X86_VOYAGER
+
+config ARCH_SUSPEND_POSSIBLE
+	def_bool y
+	depends on !X86_VOYAGER
--- everything.orig/arch/x86_64/Kconfig	2007-11-07 14:45:28.591544215 +0100
+++ everything/arch/x86_64/Kconfig	2007-11-07 14:45:28.631515461 +0100
@@ -716,6 +716,9 @@ menu "Power management options"
 
 source kernel/power/Kconfig
 
+config ARCH_SUSPEND_POSSIBLE
+	def_bool y
+
 config ARCH_HIBERNATION_POSSIBLE
 	def_bool y
 
--- everything.orig/kernel/power/Kconfig	2007-11-07 14:45:28.591544215 +0100
+++ everything/kernel/power/Kconfig	2007-11-07 14:45:28.641531465 +0100
@@ -64,7 +64,7 @@ config PM_TRACE
 config PM_SLEEP_SMP
 	bool
 	depends on SMP
-	depends on SUSPEND_SMP_POSSIBLE || ARCH_HIBERNATION_POSSIBLE
+	depends on ARCH_SUSPEND_POSSIBLE || ARCH_HIBERNATION_POSSIBLE
 	depends on PM_SLEEP
 	select HOTPLUG_CPU
 	default y
@@ -74,29 +74,14 @@ config PM_SLEEP
 	depends on SUSPEND || HIBERNATION
 	default y
 
-config SUSPEND_UP_POSSIBLE
-	bool
-	depends on (X86 && !X86_VOYAGER) || PPC || ARM || BLACKFIN || MIPS \
-		   || SUPERH || FRV
-	depends on !SMP
-	default y
-
-config SUSPEND_SMP_POSSIBLE
-	bool
-	depends on (X86 && !X86_VOYAGER) \
-		   || (PPC && (PPC_PSERIES || PPC_PMAC)) || ARM
-	depends on SMP
-	default y
-
 config SUSPEND
 	bool "Suspend to RAM and standby"
-	depends on PM
-	depends on SUSPEND_UP_POSSIBLE || SUSPEND_SMP_POSSIBLE
+	depends on PM && ARCH_SUSPEND_POSSIBLE
 	default y
 	---help---
 	  Allow the system to enter sleep states in which main memory is
 	  powered and thus its contents are preserved, such as the
-	  suspend-to-RAM state (i.e. the ACPI S3 state).
+	  suspend-to-RAM state (e.g. the ACPI S3 state).
 
 config HIBERNATION
 	bool "Hibernation (aka 'suspend to disk')"
--- everything.orig/arch/blackfin/Kconfig	2007-11-07 14:44:55.551521971 +0100
+++ everything/arch/blackfin/Kconfig	2007-11-07 14:45:28.641531465 +0100
@@ -993,6 +993,10 @@ endmenu
 menu "Power management options"
 source "kernel/power/Kconfig"
 
+config ARCH_SUSPEND_POSSIBLE
+	def_bool y
+	depends on !SMP
+
 choice
 	prompt "Select PM Wakeup Event Source"
 	default PM_WAKEUP_GPIO_BY_SIC_IWR
--- everything.orig/arch/arm/Kconfig	2007-11-07 14:44:55.651522948 +0100
+++ everything/arch/arm/Kconfig	2007-11-07 14:45:28.641531465 +0100
@@ -977,6 +977,9 @@ menu "Power management options"
 
 source "kernel/power/Kconfig"
 
+config ARCH_SUSPEND_POSSIBLE
+	def_bool y
+
 endmenu
 
 source "net/Kconfig"
--- everything.orig/arch/mips/Kconfig	2007-11-07 14:44:55.701522460 +0100
+++ everything/arch/mips/Kconfig	2007-11-07 14:45:28.641531465 +0100
@@ -1999,6 +1999,10 @@ endmenu
 
 menu "Power management options"
 
+config ARCH_SUSPEND_POSSIBLE
+	def_bool y
+	depends on !SMP
+
 source "kernel/power/Kconfig"
 
 endmenu
--- everything.orig/arch/sh/Kconfig	2007-11-07 14:44:55.801520344 +0100
+++ everything/arch/sh/Kconfig	2007-11-07 14:45:28.651528536 +0100
@@ -748,6 +748,10 @@ endmenu
 menu "Power management options (EXPERIMENTAL)"
 depends on EXPERIMENTAL && SYS_SUPPORTS_PM
 
+config ARCH_SUSPEND_POSSIBLE
+	def_bool y
+	depends on !SMP
+
 source kernel/power/Kconfig
 
 endmenu
--- everything.orig/arch/frv/Kconfig	2007-11-07 14:44:55.861520941 +0100
+++ everything/arch/frv/Kconfig	2007-11-07 14:45:28.651528536 +0100
@@ -357,6 +357,11 @@ source "drivers/pcmcia/Kconfig"
 #	  should probably wait a while.
 
 menu "Power management options"
+
+config ARCH_SUSPEND_POSSIBLE
+	def_bool y
+	depends on !SMP
+
 source kernel/power/Kconfig
 endmenu
 
--- everything.orig/arch/powerpc/Kconfig	2007-11-07 14:45:28.591544215 +0100
+++ everything/arch/powerpc/Kconfig	2007-11-07 14:45:28.651528536 +0100
@@ -155,6 +155,10 @@ config ARCH_HIBERNATION_POSSIBLE
 	depends on (PPC64 && HIBERNATE_64) || (PPC32 && HIBERNATE_32)
 	default y
 
+config ARCH_SUSPEND_POSSIBLE
+	def_bool y
+	depends on ADB_PMU || PPC_EFIKA || PPC_LITE5200
+
 config PPC_DCR_NATIVE
 	bool
 	default n

-- 


From lethal@linux-sh.org Wed Nov  7 15:14:58 2007
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Subject: Re: [PATCH (2.6.25) 2/2] suspend: clean up Kconfig
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On Wed, Nov 07, 2007 at 02:58:00PM +0100, Johannes Berg wrote:
> This cleans up the suspend Kconfig and removes the need to
> declare centrally which architectures support suspend. All
> architectures that currently support suspend are modified
> accordingly.
> 
> Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
> Cc: Rafael J. Wysocki <rjw@sisk.pl>
> Cc: linuxppc-dev@ozlabs.org
> Cc: linux-pm@lists.linux-foundation.org
> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> Cc: Scott Wood <scottwood@freescale.com>
> Cc: David Howells <dhowells@redhat.com>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: linux-mips@linux-mips.org
> Cc: Paul Mundt <lethal@linux-sh.org>
> Cc: Bryan Wu <bryan.wu@analog.com>
> Cc: Russell King <rmk@arm.linux.org.uk>
> ---
> Architecture maintainers should evaluate whether their
> ARCH_SUSPEND_POSSIBLE symbol should be set only under
> stricter circumstances like I've done for powerpc.
> 
The SH bits look fine.

Acked-by: Paul Mundt <lethal@linux-sh.org>

From macro@linux-mips.org Wed Nov  7 16:55:52 2007
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	Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Subject: Re: [PATCH] IP22: Disable EARLY PRINTK, because it breaks serial
 console
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On Tue, 30 Oct 2007, Martin Michlmayr wrote:

> * Thomas Bogendoerfer <tsbogend@alpha.franken.de> [2007-09-11 12:44]:
> > Disable EARLY PRINTK, because it breaks serial console
> 
> Ralf, at the moment IP22 output stops after "Serial: IP22 Zilog driver
> (1 chips).".  Can you put this patch in until there's a real fix?

 Is it by any chance the same problem that I noticed with the DECstation 
and reported in the thread starting at: 
"http://marc.info/?l=linux-kernel&m=119030963931879&w=2"?  If so, there is 
a fix for the DECstation provided somewhere down the discussion which you 
may consider porting to IP22.  I think the change to the serial core by 
RMK mentioned there has already been applied upstream.

 Ideally, of course, all the SCC drivers should get merged eventually, but 
due to subtle (and sometimes broken, as it is the case with the 
DECstation) differences in wiring for various systems it may never really 
happen, sigh...

  Maciej

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From:	"Maciej W. Rozycki" <macro@linux-mips.org>
To:	Giuseppe Sacco <giuseppe@eppesuigoccas.homedns.org>
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Subject: Re: Preliminary patch for ip32 ttyS* device
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On Wed, 7 Nov 2007, Giuseppe Sacco wrote:

> I have been investigating about it for one week and I am still not
> convinced that mapbase must be initialised. I tried to understand the
> meaning of mapbase and membase, but I am unsure about the value I should
> set mapbase to.
> 
> I learnt that when specifying mapbase its region would be registered and
> reserved using request_mem_region(). Otherwise, if you do not specify
> mapbase, the region is not reserved. Apart from reserving the memory
> region, mapbase isn't use anymore. Is mapbase mandatory? 
> 
> If mapbase isn't mandatory, the second part of my patch is probably
> right and fixes a bug.

 You ought to use mapbase and ioremap() with new code as you are not 
allowed to use readb()/writeb()/etc. on addresses obtained otherwise than 
by calling ioremap().  The use of request_mem_region(), etc. is not 
strictly mandatory, but it is nice to have.  Many serial drivers use these 
functions, so I cannot see a reason why it would be a hassle for ip32.

  Maciej

From manoj.ekbote@broadcom.com Wed Nov  7 19:36:57 2007
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Subject: RE: Deleting read-only environment variable on Sibyte board.
Date:	Wed, 7 Nov 2007 11:36:38 -0800
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It looks like the variable was set with 'setenv -ro' command. This will
need a manual delete.
Bad news -  This would probably require a new firmware build.  There is
no current command to remove -ro variables (non-existing feature).

>-----Original Message-----
>From: Ralf Baechle [mailto:ralf@linux-mips.org] 
>Sent: Tuesday, November 06, 2007 2:29 PM
>To: Manoj Ekbote
>Cc: linux-mips@linux-mips.org
>Subject: Re: Deleting read-only environment variable on Sibyte board.
>
>On Tue, Nov 06, 2007 at 12:18:51PM -0800, Manoj Ekbote wrote:
>
>> Hi Ralf,
>>  
>> Can you try 'Unsetenv [NAME]'?
>
>I'm getting an error message, something about the variable 
>being read-only.
>
>Thanks anyway,
>
>  Ralf
>
>


From ralf@linux-mips.org Wed Nov  7 19:42:55 2007
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On Wed, Nov 07, 2007 at 11:36:38AM -0800, Manoj Ekbote wrote:

> It looks like the variable was set with 'setenv -ro' command. This will
> need a manual delete.
> Bad news -  This would probably require a new firmware build.  There is
> no current command to remove -ro variables (non-existing feature).

I ran over a bit of documentation regarding how variables are stored by
CFE.  Looks easy enough to write a little app to convert those variables
to writeable.

  Ralf

From rjw@sisk.pl Wed Nov  7 22:03:11 2007
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From:	"Rafael J. Wysocki" <rjw@sisk.pl>
To:	Johannes Berg <johannes@sipsolutions.net>
Subject: Re: [PATCH (2.6.25) 2/2] suspend: clean up Kconfig
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On Wednesday, 7 of November 2007, Johannes Berg wrote:
> This cleans up the suspend Kconfig and removes the need to
> declare centrally which architectures support suspend. All
> architectures that currently support suspend are modified
> accordingly.
> 
> Signed-off-by: Johannes Berg <johannes@sipsolutions.net>

Acked-by: Rafael J. Wysocki <rjw@sisk.pl>

> Cc: linuxppc-dev@ozlabs.org
> Cc: linux-pm@lists.linux-foundation.org
> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> Cc: Scott Wood <scottwood@freescale.com>
> Cc: David Howells <dhowells@redhat.com>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: linux-mips@linux-mips.org
> Cc: Paul Mundt <lethal@linux-sh.org>
> Cc: Bryan Wu <bryan.wu@analog.com>
> Cc: Russell King <rmk@arm.linux.org.uk>
> ---
> Architecture maintainers should evaluate whether their
> ARCH_SUSPEND_POSSIBLE symbol should be set only under
> stricter circumstances like I've done for powerpc.
> 
> Always setting it is not usually a problem, however, since the
> infrastructure is only available for use after suspend_set_ops().
> 
>  arch/arm/Kconfig      |    3 +++
>  arch/blackfin/Kconfig |    4 ++++
>  arch/frv/Kconfig      |    5 +++++
>  arch/i386/Kconfig     |    4 ++++
>  arch/mips/Kconfig     |    4 ++++
>  arch/powerpc/Kconfig  |    4 ++++
>  arch/sh/Kconfig       |    4 ++++
>  arch/x86_64/Kconfig   |    3 +++
>  kernel/power/Kconfig  |   21 +++------------------
>  9 files changed, 34 insertions(+), 18 deletions(-)
> 
> --- everything.orig/arch/i386/Kconfig	2007-11-07 14:45:28.591544215 +0100
> +++ everything/arch/i386/Kconfig	2007-11-07 14:45:28.631515461 +0100
> @@ -1323,3 +1323,7 @@ config KTIME_SCALAR
>  config ARCH_HIBERNATION_POSSIBLE
>  	def_bool y
>  	depends on !SMP || !X86_VOYAGER
> +
> +config ARCH_SUSPEND_POSSIBLE
> +	def_bool y
> +	depends on !X86_VOYAGER
> --- everything.orig/arch/x86_64/Kconfig	2007-11-07 14:45:28.591544215 +0100
> +++ everything/arch/x86_64/Kconfig	2007-11-07 14:45:28.631515461 +0100
> @@ -716,6 +716,9 @@ menu "Power management options"
>  
>  source kernel/power/Kconfig
>  
> +config ARCH_SUSPEND_POSSIBLE
> +	def_bool y
> +
>  config ARCH_HIBERNATION_POSSIBLE
>  	def_bool y
>  
> --- everything.orig/kernel/power/Kconfig	2007-11-07 14:45:28.591544215 +0100
> +++ everything/kernel/power/Kconfig	2007-11-07 14:45:28.641531465 +0100
> @@ -64,7 +64,7 @@ config PM_TRACE
>  config PM_SLEEP_SMP
>  	bool
>  	depends on SMP
> -	depends on SUSPEND_SMP_POSSIBLE || ARCH_HIBERNATION_POSSIBLE
> +	depends on ARCH_SUSPEND_POSSIBLE || ARCH_HIBERNATION_POSSIBLE
>  	depends on PM_SLEEP
>  	select HOTPLUG_CPU
>  	default y
> @@ -74,29 +74,14 @@ config PM_SLEEP
>  	depends on SUSPEND || HIBERNATION
>  	default y
>  
> -config SUSPEND_UP_POSSIBLE
> -	bool
> -	depends on (X86 && !X86_VOYAGER) || PPC || ARM || BLACKFIN || MIPS \
> -		   || SUPERH || FRV
> -	depends on !SMP
> -	default y
> -
> -config SUSPEND_SMP_POSSIBLE
> -	bool
> -	depends on (X86 && !X86_VOYAGER) \
> -		   || (PPC && (PPC_PSERIES || PPC_PMAC)) || ARM
> -	depends on SMP
> -	default y
> -
>  config SUSPEND
>  	bool "Suspend to RAM and standby"
> -	depends on PM
> -	depends on SUSPEND_UP_POSSIBLE || SUSPEND_SMP_POSSIBLE
> +	depends on PM && ARCH_SUSPEND_POSSIBLE
>  	default y
>  	---help---
>  	  Allow the system to enter sleep states in which main memory is
>  	  powered and thus its contents are preserved, such as the
> -	  suspend-to-RAM state (i.e. the ACPI S3 state).
> +	  suspend-to-RAM state (e.g. the ACPI S3 state).
>  
>  config HIBERNATION
>  	bool "Hibernation (aka 'suspend to disk')"
> --- everything.orig/arch/blackfin/Kconfig	2007-11-07 14:44:55.551521971 +0100
> +++ everything/arch/blackfin/Kconfig	2007-11-07 14:45:28.641531465 +0100
> @@ -993,6 +993,10 @@ endmenu
>  menu "Power management options"
>  source "kernel/power/Kconfig"
>  
> +config ARCH_SUSPEND_POSSIBLE
> +	def_bool y
> +	depends on !SMP
> +
>  choice
>  	prompt "Select PM Wakeup Event Source"
>  	default PM_WAKEUP_GPIO_BY_SIC_IWR
> --- everything.orig/arch/arm/Kconfig	2007-11-07 14:44:55.651522948 +0100
> +++ everything/arch/arm/Kconfig	2007-11-07 14:45:28.641531465 +0100
> @@ -977,6 +977,9 @@ menu "Power management options"
>  
>  source "kernel/power/Kconfig"
>  
> +config ARCH_SUSPEND_POSSIBLE
> +	def_bool y
> +
>  endmenu
>  
>  source "net/Kconfig"
> --- everything.orig/arch/mips/Kconfig	2007-11-07 14:44:55.701522460 +0100
> +++ everything/arch/mips/Kconfig	2007-11-07 14:45:28.641531465 +0100
> @@ -1999,6 +1999,10 @@ endmenu
>  
>  menu "Power management options"
>  
> +config ARCH_SUSPEND_POSSIBLE
> +	def_bool y
> +	depends on !SMP
> +
>  source "kernel/power/Kconfig"
>  
>  endmenu
> --- everything.orig/arch/sh/Kconfig	2007-11-07 14:44:55.801520344 +0100
> +++ everything/arch/sh/Kconfig	2007-11-07 14:45:28.651528536 +0100
> @@ -748,6 +748,10 @@ endmenu
>  menu "Power management options (EXPERIMENTAL)"
>  depends on EXPERIMENTAL && SYS_SUPPORTS_PM
>  
> +config ARCH_SUSPEND_POSSIBLE
> +	def_bool y
> +	depends on !SMP
> +
>  source kernel/power/Kconfig
>  
>  endmenu
> --- everything.orig/arch/frv/Kconfig	2007-11-07 14:44:55.861520941 +0100
> +++ everything/arch/frv/Kconfig	2007-11-07 14:45:28.651528536 +0100
> @@ -357,6 +357,11 @@ source "drivers/pcmcia/Kconfig"
>  #	  should probably wait a while.
>  
>  menu "Power management options"
> +
> +config ARCH_SUSPEND_POSSIBLE
> +	def_bool y
> +	depends on !SMP
> +
>  source kernel/power/Kconfig
>  endmenu
>  
> --- everything.orig/arch/powerpc/Kconfig	2007-11-07 14:45:28.591544215 +0100
> +++ everything/arch/powerpc/Kconfig	2007-11-07 14:45:28.651528536 +0100
> @@ -155,6 +155,10 @@ config ARCH_HIBERNATION_POSSIBLE
>  	depends on (PPC64 && HIBERNATE_64) || (PPC32 && HIBERNATE_32)
>  	default y
>  
> +config ARCH_SUSPEND_POSSIBLE
> +	def_bool y
> +	depends on ADB_PMU || PPC_EFIKA || PPC_LITE5200
> +
>  config PPC_DCR_NATIVE
>  	bool
>  	default n
> 



-- 
"Premature optimization is the root of all evil." - Donald Knuth

From tsbogend@alpha.franken.de Wed Nov  7 22:04:41 2007
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On Wed, Nov 07, 2007 at 04:55:10PM +0000, Maciej W. Rozycki wrote:
> On Tue, 30 Oct 2007, Martin Michlmayr wrote:
> 
> > * Thomas Bogendoerfer <tsbogend@alpha.franken.de> [2007-09-11 12:44]:
> > > Disable EARLY PRINTK, because it breaks serial console
> > 
> > Ralf, at the moment IP22 output stops after "Serial: IP22 Zilog driver
> > (1 chips).".  Can you put this patch in until there's a real fix?
> 
>  Is it by any chance the same problem that I noticed with the DECstation 
> and reported in the thread starting at: 

it's the same problem

> "http://marc.info/?l=linux-kernel&m=119030963931879&w=2"?  If so, there is 
> a fix for the DECstation provided somewhere down the discussion which you 
> may consider porting to IP22.  I think the change to the serial core by 
> RMK mentioned there has already been applied upstream.

I ported your fix, but it didn't work for me. Maybe because the
IP22 zilog driver is still a little bit different than the DEC one.

>  Ideally, of course, all the SCC drivers should get merged eventually, but 
> due to subtle (and sometimes broken, as it is the case with the 
> DECstation) differences in wiring for various systems it may never really 
> happen, sigh...

having a more generic zilog driver with platform backends is quite high on
my todo list. But I won't make promisses when this happens...

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea.                                                [ RFC1925, 2.3 ]

From rmk+linux-mips=linux-mips.org@arm.linux.org.uk Wed Nov  7 22:23:47 2007
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From:	Russell King <rmk@arm.linux.org.uk>
To:	Johannes Berg <johannes@sipsolutions.net>
Cc:	linux-pm@lists.linux-foundation.org,
	"Rafael J. Wysocki" <rjw@sisk.pl>, linuxppc-dev@ozlabs.org,
	Guennadi Liakhovetski <g.liakhovetski@gmx.de>,
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	Paul Mundt <lethal@linux-sh.org>,
	Bryan Wu <bryan.wu@analog.com>
Subject: Re: [PATCH (2.6.25) 2/2] suspend: clean up Kconfig
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On Wed, Nov 07, 2007 at 02:58:00PM +0100, Johannes Berg wrote:
> This cleans up the suspend Kconfig and removes the need to
> declare centrally which architectures support suspend. All
> architectures that currently support suspend are modified
> accordingly.
> 
> Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
> Cc: Rafael J. Wysocki <rjw@sisk.pl>
> Cc: linuxppc-dev@ozlabs.org
> Cc: linux-pm@lists.linux-foundation.org
> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> Cc: Scott Wood <scottwood@freescale.com>
> Cc: David Howells <dhowells@redhat.com>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: linux-mips@linux-mips.org
> Cc: Paul Mundt <lethal@linux-sh.org>
> Cc: Bryan Wu <bryan.wu@analog.com>

Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>

> ---
> Architecture maintainers should evaluate whether their
> ARCH_SUSPEND_POSSIBLE symbol should be set only under
> stricter circumstances like I've done for powerpc.
> 
> Always setting it is not usually a problem, however, since the
> infrastructure is only available for use after suspend_set_ops().
> 
>  arch/arm/Kconfig      |    3 +++
>  arch/blackfin/Kconfig |    4 ++++
>  arch/frv/Kconfig      |    5 +++++
>  arch/i386/Kconfig     |    4 ++++
>  arch/mips/Kconfig     |    4 ++++
>  arch/powerpc/Kconfig  |    4 ++++
>  arch/sh/Kconfig       |    4 ++++
>  arch/x86_64/Kconfig   |    3 +++
>  kernel/power/Kconfig  |   21 +++------------------
>  9 files changed, 34 insertions(+), 18 deletions(-)
> 
> --- everything.orig/arch/i386/Kconfig	2007-11-07 14:45:28.591544215 +0100
> +++ everything/arch/i386/Kconfig	2007-11-07 14:45:28.631515461 +0100
> @@ -1323,3 +1323,7 @@ config KTIME_SCALAR
>  config ARCH_HIBERNATION_POSSIBLE
>  	def_bool y
>  	depends on !SMP || !X86_VOYAGER
> +
> +config ARCH_SUSPEND_POSSIBLE
> +	def_bool y
> +	depends on !X86_VOYAGER
> --- everything.orig/arch/x86_64/Kconfig	2007-11-07 14:45:28.591544215 +0100
> +++ everything/arch/x86_64/Kconfig	2007-11-07 14:45:28.631515461 +0100
> @@ -716,6 +716,9 @@ menu "Power management options"
>  
>  source kernel/power/Kconfig
>  
> +config ARCH_SUSPEND_POSSIBLE
> +	def_bool y
> +
>  config ARCH_HIBERNATION_POSSIBLE
>  	def_bool y
>  
> --- everything.orig/kernel/power/Kconfig	2007-11-07 14:45:28.591544215 +0100
> +++ everything/kernel/power/Kconfig	2007-11-07 14:45:28.641531465 +0100
> @@ -64,7 +64,7 @@ config PM_TRACE
>  config PM_SLEEP_SMP
>  	bool
>  	depends on SMP
> -	depends on SUSPEND_SMP_POSSIBLE || ARCH_HIBERNATION_POSSIBLE
> +	depends on ARCH_SUSPEND_POSSIBLE || ARCH_HIBERNATION_POSSIBLE
>  	depends on PM_SLEEP
>  	select HOTPLUG_CPU
>  	default y
> @@ -74,29 +74,14 @@ config PM_SLEEP
>  	depends on SUSPEND || HIBERNATION
>  	default y
>  
> -config SUSPEND_UP_POSSIBLE
> -	bool
> -	depends on (X86 && !X86_VOYAGER) || PPC || ARM || BLACKFIN || MIPS \
> -		   || SUPERH || FRV
> -	depends on !SMP
> -	default y
> -
> -config SUSPEND_SMP_POSSIBLE
> -	bool
> -	depends on (X86 && !X86_VOYAGER) \
> -		   || (PPC && (PPC_PSERIES || PPC_PMAC)) || ARM
> -	depends on SMP
> -	default y
> -
>  config SUSPEND
>  	bool "Suspend to RAM and standby"
> -	depends on PM
> -	depends on SUSPEND_UP_POSSIBLE || SUSPEND_SMP_POSSIBLE
> +	depends on PM && ARCH_SUSPEND_POSSIBLE
>  	default y
>  	---help---
>  	  Allow the system to enter sleep states in which main memory is
>  	  powered and thus its contents are preserved, such as the
> -	  suspend-to-RAM state (i.e. the ACPI S3 state).
> +	  suspend-to-RAM state (e.g. the ACPI S3 state).
>  
>  config HIBERNATION
>  	bool "Hibernation (aka 'suspend to disk')"
> --- everything.orig/arch/blackfin/Kconfig	2007-11-07 14:44:55.551521971 +0100
> +++ everything/arch/blackfin/Kconfig	2007-11-07 14:45:28.641531465 +0100
> @@ -993,6 +993,10 @@ endmenu
>  menu "Power management options"
>  source "kernel/power/Kconfig"
>  
> +config ARCH_SUSPEND_POSSIBLE
> +	def_bool y
> +	depends on !SMP
> +
>  choice
>  	prompt "Select PM Wakeup Event Source"
>  	default PM_WAKEUP_GPIO_BY_SIC_IWR
> --- everything.orig/arch/arm/Kconfig	2007-11-07 14:44:55.651522948 +0100
> +++ everything/arch/arm/Kconfig	2007-11-07 14:45:28.641531465 +0100
> @@ -977,6 +977,9 @@ menu "Power management options"
>  
>  source "kernel/power/Kconfig"
>  
> +config ARCH_SUSPEND_POSSIBLE
> +	def_bool y
> +
>  endmenu
>  
>  source "net/Kconfig"
> --- everything.orig/arch/mips/Kconfig	2007-11-07 14:44:55.701522460 +0100
> +++ everything/arch/mips/Kconfig	2007-11-07 14:45:28.641531465 +0100
> @@ -1999,6 +1999,10 @@ endmenu
>  
>  menu "Power management options"
>  
> +config ARCH_SUSPEND_POSSIBLE
> +	def_bool y
> +	depends on !SMP
> +
>  source "kernel/power/Kconfig"
>  
>  endmenu
> --- everything.orig/arch/sh/Kconfig	2007-11-07 14:44:55.801520344 +0100
> +++ everything/arch/sh/Kconfig	2007-11-07 14:45:28.651528536 +0100
> @@ -748,6 +748,10 @@ endmenu
>  menu "Power management options (EXPERIMENTAL)"
>  depends on EXPERIMENTAL && SYS_SUPPORTS_PM
>  
> +config ARCH_SUSPEND_POSSIBLE
> +	def_bool y
> +	depends on !SMP
> +
>  source kernel/power/Kconfig
>  
>  endmenu
> --- everything.orig/arch/frv/Kconfig	2007-11-07 14:44:55.861520941 +0100
> +++ everything/arch/frv/Kconfig	2007-11-07 14:45:28.651528536 +0100
> @@ -357,6 +357,11 @@ source "drivers/pcmcia/Kconfig"
>  #	  should probably wait a while.
>  
>  menu "Power management options"
> +
> +config ARCH_SUSPEND_POSSIBLE
> +	def_bool y
> +	depends on !SMP
> +
>  source kernel/power/Kconfig
>  endmenu
>  
> --- everything.orig/arch/powerpc/Kconfig	2007-11-07 14:45:28.591544215 +0100
> +++ everything/arch/powerpc/Kconfig	2007-11-07 14:45:28.651528536 +0100
> @@ -155,6 +155,10 @@ config ARCH_HIBERNATION_POSSIBLE
>  	depends on (PPC64 && HIBERNATE_64) || (PPC32 && HIBERNATE_32)
>  	default y
>  
> +config ARCH_SUSPEND_POSSIBLE
> +	def_bool y
> +	depends on ADB_PMU || PPC_EFIKA || PPC_LITE5200
> +
>  config PPC_DCR_NATIVE
>  	bool
>  	default n
> 
> -- 
> 

-- 
Russell King
 Linux kernel    2.6 ARM Linux   - http://www.arm.linux.org.uk/
 maintainer of:

From paulus@ozlabs.org Thu Nov  8 02:30:24 2007
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Subject: Re: [PATCH (2.6.25) 2/2] suspend: clean up Kconfig
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Johannes Berg writes:

> This cleans up the suspend Kconfig and removes the need to
> declare centrally which architectures support suspend. All
> architectures that currently support suspend are modified
> accordingly.

Acked-by: Paul Mackerras <paulus@samba.org>

From ralf@linux-mips.org Thu Nov  8 09:47:10 2007
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On Wed, Nov 07, 2007 at 12:41:29PM +0000, Maciej W. Rozycki wrote:

> > And to ensure it will stay that way I'll keep -Werror.  It seems only
> > little PITAs like this keep everybody on their toes :-)
> 
>  Yeah...  If only GCC had no bugs and always had a clue of what to warn 
> about...

The least of all problems.

As of 2.6.20-rc2-git2 we had 137 warnings in MIPS specific code of a total
of 218 for the kernel and 44 for modules - that's a insane 52%.  And people
happily added more crappy code because they didn't not even _notice_ the
warnings some of which indeed were bugs.

Compare to 2.6.23 - 13 warnings for MIPS specific code of a total of 48
warnings and another 23 warnings for all the modules.  For a codebase
which overall had grown by half a million lines between those releases.

  Ralf

From ralf@linux-mips.org Thu Nov  8 09:48:29 2007
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On Wed, Nov 07, 2007 at 02:58:00PM +0100, Johannes Berg wrote:

> This cleans up the suspend Kconfig and removes the need to
> declare centrally which architectures support suspend. All
> architectures that currently support suspend are modified
> accordingly.

Acked-by: Ralf Baechle <ralf@linux-mips.org>

Cheers,

  Ralf

From ralf@linux-mips.org Thu Nov  8 09:57:10 2007
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On Wed, Nov 07, 2007 at 10:54:23PM +0100, Thomas Bogendoerfer wrote:

> >  Ideally, of course, all the SCC drivers should get merged eventually, but 
> > due to subtle (and sometimes broken, as it is the case with the 
> > DECstation) differences in wiring for various systems it may never really 
> > happen, sigh...
> 
> having a more generic zilog driver with platform backends is quite high on
> my todo list. But I won't make promisses when this happens...

Right now there are alot of artificial differences between the sun and IP22
8530 drivers by just different prefixes.  A good start would already be
to unify all these needless differences which is largely a mechanical job.
Once that is that is it will become easier to spot all the relevant
functional differences - there aren't that many but by now they're well
hidden.

  Ralf

From macro@linux-mips.org Thu Nov  8 11:13:04 2007
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From:	"Maciej W. Rozycki" <macro@linux-mips.org>
To:	Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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On Wed, 7 Nov 2007, Thomas Bogendoerfer wrote:

> having a more generic zilog driver with platform backends is quite high on
> my todo list. But I won't make promisses when this happens...

 Synchronous and DMA operation is the tough part, at least for the 
DECstation.  OTOH, such a framework actually exists already as 
drivers/net/wan/z85230.[ch], but fitting it into the serial subsystem is a 
lot of work as the serial core currently has no notion of synchronous 
modes at all.  Ultimately you'd like to be able to switch between 
asynchronous and synchronous line disciplines on a port by port basis 
(possibly including halves of the same chip).

  Maciej

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On Thu, 8 Nov 2007, Ralf Baechle wrote:

> >  Yeah...  If only GCC had no bugs and always had a clue of what to warn 
> > about...
> 
> The least of all problems.

 It depends for whom I suppose. ;-)  It is a pain when you have to stretch 
your imagination to rewrite a piece of source code GCC warns about unduly 
and both keep it readable and not make the generated binary worse...  
Especially where configuration-specific macros are involved.

> As of 2.6.20-rc2-git2 we had 137 warnings in MIPS specific code of a total
> of 218 for the kernel and 44 for modules - that's a insane 52%.  And people
> happily added more crappy code because they didn't not even _notice_ the
> warnings some of which indeed were bugs.

 Well, adding no warnings should be the rule #1 and I can understand it is 
easier for you to enforce it by the means of -Werror. ;-)

  Maciej

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Date:	Thu, 08 Nov 2007 14:28:19 +0100
From:	Jiri Olsa <olsajiri@gmail.com>
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Subject: [PATCH] MIPS - remove dead config symbols from MIPS code
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remove dead config symbols from MIPS code
Signed-off-by: Jiri Olsa <olsajiri@gmail.com>

---
 include/asm-mips/pmc-sierra/msp71xx/msp_regs.h |    4 ----
 include/asm-mips/sibyte/board.h                |    1 -
 include/asm-mips/sibyte/swarm.h                |   12 ------------
 include/asm-mips/sn/addrs.h                    |    2 --
 include/asm-mips/sn/agent.h                    |    4 +---
 include/asm-mips/sn/klconfig.h                 |   18 +-----------------
 6 files changed, 2 insertions(+), 39 deletions(-)

diff --git a/include/asm-mips/pmc-sierra/msp71xx/msp_regs.h b/include/asm-mips/pmc-sierra/msp71xx/msp_regs.h
index 0b56f55..603eb73 100644
--- a/include/asm-mips/pmc-sierra/msp71xx/msp_regs.h
+++ b/include/asm-mips/pmc-sierra/msp71xx/msp_regs.h
@@ -585,11 +585,7 @@
  * UART defines                                                            *
  ***************************************************************************
  */
-#ifndef CONFIG_MSP_FPGA
 #define MSP_BASE_BAUD		25000000
-#else
-#define MSP_BASE_BAUD		6000000
-#endif
 #define MSP_UART_REG_LEN	0x20
 
 /*
diff --git a/include/asm-mips/sibyte/board.h b/include/asm-mips/sibyte/board.h
index da198a1..33028b9 100644
--- a/include/asm-mips/sibyte/board.h
+++ b/include/asm-mips/sibyte/board.h
@@ -20,7 +20,6 @@
 #define _SIBYTE_BOARD_H
 
 #if defined(CONFIG_SIBYTE_SWARM) || defined(CONFIG_SIBYTE_PTSWARM) || \
-    defined(CONFIG_SIBYTE_PT1120) || defined(CONFIG_SIBYTE_PT1125) || \
     defined(CONFIG_SIBYTE_CRHONE) || defined(CONFIG_SIBYTE_CRHINE) || \
     defined(CONFIG_SIBYTE_LITTLESUR)
 #include <asm/sibyte/swarm.h>
diff --git a/include/asm-mips/sibyte/swarm.h b/include/asm-mips/sibyte/swarm.h
index 540865f..86db37e 100644
--- a/include/asm-mips/sibyte/swarm.h
+++ b/include/asm-mips/sibyte/swarm.h
@@ -32,18 +32,6 @@
 #define SIBYTE_HAVE_IDE    1
 #define SIBYTE_DEFAULT_CONSOLE "ttyS0,115200"
 #endif
-#ifdef CONFIG_SIBYTE_PT1120
-#define SIBYTE_BOARD_NAME "PT1120"
-#define SIBYTE_HAVE_PCMCIA 1
-#define SIBYTE_HAVE_IDE    1
-#define SIBYTE_DEFAULT_CONSOLE "ttyS0,115200"
-#endif
-#ifdef CONFIG_SIBYTE_PT1125
-#define SIBYTE_BOARD_NAME "PT1125"
-#define SIBYTE_HAVE_PCMCIA 1
-#define SIBYTE_HAVE_IDE    1
-#define SIBYTE_DEFAULT_CONSOLE "ttyS0,115200"
-#endif
 #ifdef CONFIG_SIBYTE_LITTLESUR
 #define SIBYTE_BOARD_NAME "BCM91250C2 (LittleSur)"
 #define SIBYTE_HAVE_PCMCIA 0
diff --git a/include/asm-mips/sn/addrs.h b/include/asm-mips/sn/addrs.h
index fec9bdd..bef3049 100644
--- a/include/asm-mips/sn/addrs.h
+++ b/include/asm-mips/sn/addrs.h
@@ -19,8 +19,6 @@
 
 #if defined(CONFIG_SGI_IP27)
 #include <asm/sn/sn0/addrs.h>
-#elif defined(CONFIG_SGI_IP35)
-#include <asm/sn/sn1/addrs.h>
 #endif
 
 
diff --git a/include/asm-mips/sn/agent.h b/include/asm-mips/sn/agent.h
index ac4ea85..62ee456 100644
--- a/include/asm-mips/sn/agent.h
+++ b/include/asm-mips/sn/agent.h
@@ -17,9 +17,7 @@
 
 #if defined(CONFIG_SGI_IP27)
 #include <asm/sn/sn0/hub.h>
-#elif defined(CONFIG_SGI_IP35)
-#include <asm/sn/sn1/hub.h>
-#endif	/* !CONFIG_SGI_IP27 && !CONFIG_SGI_IP35 */
+#endif	/* !CONFIG_SGI_IP27 */
 
 /*
  * NIC register macros
diff --git a/include/asm-mips/sn/klconfig.h b/include/asm-mips/sn/klconfig.h
index 96cfd2a..39ddb19 100644
--- a/include/asm-mips/sn/klconfig.h
+++ b/include/asm-mips/sn/klconfig.h
@@ -40,26 +40,10 @@
 //#include <sys/graph.h>
 //#include <sys/xtalk/xbow.h>
 
-#elif defined(CONFIG_SGI_IP35)
-
-#include <asm/sn/sn1/addrs.h>
-#include <sys/sn/router.h>
-#include <sys/graph.h>
-#include <asm/xtalk/xbow.h>
-
-#endif /* !CONFIG_SGI_IP27 && !CONFIG_SGI_IP35 */
-
-#if defined(CONFIG_SGI_IP27) || defined(CONFIG_SGI_IP35)
 #include <asm/sn/agent.h>
 #include <asm/fw/arc/types.h>
 #include <asm/fw/arc/hinv.h>
-#if defined(CONFIG_SGI_IP35)
-// The hack file has to be before vector and after sn0_fru....
-#include <asm/hack.h>
-#include <asm/sn/vector.h>
-#include <asm/xtalk/xtalk.h>
-#endif /* CONFIG_SGI_IP35 */
-#endif /* CONFIG_SGI_IP27 || CONFIG_SGI_IP35 */
+#endif /* CONFIG_SGI_IP27 */
 
 typedef u64  nic_t;
 

From macro@linux-mips.org Thu Nov  8 15:27:03 2007
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On Thu, 1 Nov 2007, Ralf Baechle wrote:

> > I'm not sure if this is always a compile-time constant so that you can adorn
> > it with a LL. However, note that this is not a cast, a cast is at runtime.
> 
> No.  The compiler can evaluate the cast of a constant value at compile
> time and that exactly is what the code is exploiting here.

 Except that some versions of GCC "forget" to stop a warning here as 
irrelevant after the cast, hence the need for the stupid "#ifdef", sigh...

> > >  	if (sp >= (long)CKSEG0 && sp < (long)CKSEG2)
> > >  		usp = CKSEG1ADDR(sp);
> > >  #ifdef CONFIG_64BIT
> > > -	else if ((long long)sp >= (long long)PHYS_TO_XKPHYS(0LL, 0) &&
> > > -		 (long long)sp < (long long)PHYS_TO_XKPHYS(8LL, 0))
> > > -		usp = PHYS_TO_XKPHYS((long long)K_CALG_UNCACHED,
> > > +	else if ((long long)sp >= (long long)PHYS_TO_XKPHYS(0, 0) &&
> > > +		 (long long)sp < (long long)PHYS_TO_XKPHYS(8, 0))
> > > +		usp = PHYS_TO_XKPHYS(K_CALG_UNCACHED,
> > >  				     XKPHYS_TO_PHYS((long long)sp));
> > 
> > I'd say this code is broken in way too many aspects:
> > 1. A plethora of casts. PHYS_TO_XKPHYS() should return a physical address 
> > (i.e. 32 or 64 bits unsigned integer) already, so casting its result should 
> > not be necessary.
> 
> No argument about the beauty of the whole thing.

 The casts were an attempt by myself to shut up GCC warning about 
comparisons giving a predictable result because of a limited size of the 
data type used.  Of course this is no longer true with "long long", but 
GCC does not care and warns regardless.

 A possible workaround would be using auxiliary variables of the "long 
long" type, but I recall it making GCC produce worse code for some cases.  
I can check it again, since it has been a while, and if a recent version 
of GCC produces reasonable code, then I can try to recheck this approach.

 Please note this code changes quite wildly depending on the exact 
configuration, so chances are GCC may warn with one, but not another.

  Maciej

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SNI PCIT CPLUS: workaround for messed up irq wiring for onboard PCI bus 1 

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---

diff --git a/arch/mips/pci/fixup-sni.c b/arch/mips/pci/fixup-sni.c
index a45bedd..5c8a79b 100644
--- a/arch/mips/pci/fixup-sni.c
+++ b/arch/mips/pci/fixup-sni.c
@@ -113,6 +113,16 @@ static char irq_tab_pcit[13][5] __initdata = {
 	{     0,  INTA,  INTB,  INTC,  INTD },	/* Slot 5 */
 };
 
+static char irq_tab_pcit_cplus[13][5] __initdata = {
+	/*       INTA  INTB  INTC  INTD */
+	{     0,     0,     0,     0,     0 },	/* HOST bridge */
+	{     0,  INTB,  INTC,  INTD,  INTA },	/* PCI Slot 9 */
+	{     0,     0,     0,     0,     0 },	/* PCI-EISA */
+	{     0,     0,     0,     0,     0 },	/* Unused */
+	{     0,  INTA,  INTB,  INTC,  INTD },	/* PCI-PCI bridge */
+	{     0,  INTB,  INTC,  INTD,  INTA },	/* fixup */
+};
+
 static inline int is_rm300_revd(void)
 {
 	unsigned char csmsr = *(volatile unsigned char *)PCIMT_CSMSR;
@@ -123,8 +133,19 @@ static inline int is_rm300_revd(void)
 int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
 	switch (sni_brd_type) {
-	case SNI_BRD_PCI_TOWER:
 	case SNI_BRD_PCI_TOWER_CPLUS:
+		if (slot == 4) {
+			/*
+			 * SNI messed up interrupt wiring for onboard
+			 * PCI bus 1; we need to fix this up here
+			 */
+			while (dev && dev->bus->number != 1)
+				dev = dev->bus->self;
+			if (dev && dev->devfn >= PCI_DEVFN(4, 0))
+				slot = 5;
+		}
+		return irq_tab_pcit_cplus[slot][pin];
+	case SNI_BRD_PCI_TOWER:
 	        return irq_tab_pcit[slot][pin];
 
 	case SNI_BRD_PCI_MTOWER:
-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea.                                                [ RFC1925, 2.3 ]

From ralf@linux-mips.org Thu Nov  8 22:24:40 2007
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Subject: Re: [PATCH] SNI PCIT CPLUS: workaround for messed up PCI irq wiring
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On Thu, Nov 08, 2007 at 10:09:11PM +0100, Thomas Bogendoerfer wrote:

> SNI PCIT CPLUS: workaround for messed up irq wiring for onboard PCI bus 1 

Oh pleassure.

Thanks & applied,

  Ralf

From ralf@linux-mips.org Fri Nov  9 09:08:09 2007
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Date:	Fri, 9 Nov 2007 09:07:57 +0000
From:	Ralf Baechle <ralf@linux-mips.org>
To:	Andrew Sharp <andy.sharp@onstor.com>
Cc:	"linux-mips@linux-mips.org" <linux-mips@linux-mips.org>
Subject: Re: gdb chokes on core from 64-bit kernel (patch)
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On Thu, Nov 08, 2007 at 02:03:22PM -0800, Andrew Sharp wrote:

> The gdb from debian etch (6.4.90-debian) doesn't like core files
> produced by 64-bit kernel it seems.  I've got this patch which seems
> to do the job, but I'm unclear on what other implications it might have,
> if any.

> diff --git a/arch/mips/kernel/binfmt_elfo32.c b/arch/mips/kernel/binfmt_elfo32.c
> index 993f7ec..58533dc 100644
> --- a/arch/mips/kernel/binfmt_elfo32.c
> +++ b/arch/mips/kernel/binfmt_elfo32.c
> @@ -54,9 +54,13 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
>  
>  #include <asm/processor.h>
>  #include <linux/module.h>
> -#include <linux/elfcore.h>
>  #include <linux/compat.h>
>  
> +void elf32_core_copy_regs(elf_gregset_t grp, struct pt_regs *regs);
> +#undef ELF_CORE_COPY_REGS
> +#define ELF_CORE_COPY_REGS(_dest,_regs) elf32_core_copy_regs(_dest,_regs);
> +#include <linux/elfcore.h>
> +
>  #define elf_prstatus elf_prstatus32
>  struct elf_prstatus32
>  {
> @@ -109,9 +113,6 @@ jiffies_to_compat_timeval(unsigned long jiffies, struct comp
>         value->tv_usec = rem / NSEC_PER_USEC;
>  }
>  
> -#undef ELF_CORE_COPY_REGS
> -#define ELF_CORE_COPY_REGS(_dest,_regs) elf32_core_copy_regs(_dest,_regs);
> -
>  void elf32_core_copy_regs(elf_gregset_t grp, struct pt_regs *regs)
>  {
>         int i;

Looks like it's a larger change than needed.

> diff --git a/include/asm-mips/reg.h b/include/asm-mips/reg.h
> index 634b55d..b44b308 100644
> --- a/include/asm-mips/reg.h
> +++ b/include/asm-mips/reg.h
> @@ -12,7 +12,7 @@
>  #ifndef __ASM_MIPS_REG_H
>  #define __ASM_MIPS_REG_H
>  
> -
> +#define WANT_COMPAT_REG_H
>  #if defined(CONFIG_32BIT) || defined(WANT_COMPAT_REG_H)
>  
>  #define EF_R0                  6
> @@ -69,7 +69,7 @@
>  
>  #endif
>  
> -#ifdef CONFIG_64BIT
> +#if defined(CONFIG_64BIT) && !defined(WANT_COMPAT_REG_H)
>  
>  #define EF_R0                   0
>  #define EF_R1                   1

This change breaks the native 64-bit and N32 ptrace and core dumpers.

I suggest something more minimal like the below patch.  Does that one do
the trick for you?

  Ralf

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 arch/mips/kernel/ptrace32.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c
index 76818be..44109fb 100644
--- a/arch/mips/kernel/ptrace32.c
+++ b/arch/mips/kernel/ptrace32.c
@@ -14,6 +14,9 @@
  * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
  * binaries.
  */
+
+#define WANT_COMPAT_REG_H
+
 #include <linux/compiler.h>
 #include <linux/kernel.h>
 #include <linux/sched.h>

From yoichi_yuasa@tripeaks.co.jp Fri Nov  9 09:44:01 2007
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	Fri, 9 Nov 2007 18:42:31 +0900
Date:	Fri, 9 Nov 2007 18:42:35 +0900
From:	Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
To:	Ralf Baechle <ralf@linux-mips.org>
Cc:	yoichi_yuasa@tripeaks.co.jp, linux-mips <linux-mips@linux-mips.org>
Subject: [PATCH][MIPS] fix LASAT IRQ overlap
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The range of MIPS_CPU IRQ and the range of LASAT IRQ overlap.
This patch has fixed it.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>

diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/lasat/interrupt.c mips/arch/mips/lasat/interrupt.c
--- mips-orig/arch/mips/lasat/interrupt.c	2007-11-09 07:54:54.572826750 +0900
+++ mips/arch/mips/lasat/interrupt.c	2007-11-09 08:15:06.752835750 +0900
@@ -19,17 +19,14 @@
  * Lasat boards.
  */
 #include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/sched.h>
-#include <linux/slab.h>
 #include <linux/interrupt.h>
-#include <linux/kernel_stat.h>
+#include <linux/irq.h>
 
 #include <asm/bootinfo.h>
 #include <asm/irq_cpu.h>
 #include <asm/lasat/lasatint.h>
-#include <asm/time.h>
-#include <asm/gdb-stub.h>
+
+#include <irq.h>
 
 static volatile int *lasat_int_status;
 static volatile int *lasat_int_mask;
@@ -97,12 +94,18 @@ asmlinkage void plat_irq_dispatch(void)
 
 	/* if int_status == 0, then the interrupt has already been cleared */
 	if (int_status) {
-		irq = LASATINT_BASE + ls1bit32(int_status);
+		irq = LASAT_IRQ_BASE + ls1bit32(int_status);
 
 		do_IRQ(irq);
 	}
 }
 
+static struct irqaction cascade = {
+	.handler	= no_action,
+	.mask		= CPU_MASK_NONE,
+	.name		= "cascade",
+};
+
 void __init arch_init_irq(void)
 {
 	int i;
@@ -127,6 +130,9 @@ void __init arch_init_irq(void)
 	}
 
 	mips_cpu_irq_init();
-	for (i = LASATINT_BASE; i <= LASATINT_END; i++)
+
+	for (i = LASAT_IRQ_BASE; i <= LASAT_IRQ_END; i++)
 		set_irq_chip_and_handler(i, &lasat_irq_type, handle_level_irq);
+
+	setup_irq(LASAT_CASCADE_IRQ, &cascade);
 }
diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/pci/pci-lasat.c mips/arch/mips/pci/pci-lasat.c
--- mips-orig/arch/mips/pci/pci-lasat.c	2007-11-09 07:54:55.596890750 +0900
+++ mips/arch/mips/pci/pci-lasat.c	2007-11-09 08:33:30.421810750 +0900
@@ -5,12 +5,14 @@
  *
  * Copyright (C) 2000, 2001, 04 Keith M Wesolowski
  */
-#include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/kernel.h>
 #include <linux/pci.h>
 #include <linux/types.h>
+
 #include <asm/bootinfo.h>
-#include <asm/lasat/lasatint.h>
+
+#include <irq.h>
 
 extern struct pci_ops nile4_pci_ops;
 extern struct pci_ops gt64xxx_pci0_ops;
@@ -55,15 +57,15 @@ static int __init lasat_pci_setup(void)
 
 arch_initcall(lasat_pci_setup);
 
-#define LASATINT_ETH1   (LASATINT_BASE + 0)
-#define LASATINT_ETH0   (LASATINT_BASE + 1)
-#define LASATINT_HDC    (LASATINT_BASE + 2)
-#define LASATINT_COMP   (LASATINT_BASE + 3)
-#define LASATINT_HDLC   (LASATINT_BASE + 4)
-#define LASATINT_PCIA   (LASATINT_BASE + 5)
-#define LASATINT_PCIB   (LASATINT_BASE + 6)
-#define LASATINT_PCIC   (LASATINT_BASE + 7)
-#define LASATINT_PCID   (LASATINT_BASE + 8)
+#define LASAT_IRQ_ETH1   (LASAT_IRQ_BASE + 0)
+#define LASAT_IRQ_ETH0   (LASAT_IRQ_BASE + 1)
+#define LASAT_IRQ_HDC    (LASAT_IRQ_BASE + 2)
+#define LASAT_IRQ_COMP   (LASAT_IRQ_BASE + 3)
+#define LASAT_IRQ_HDLC   (LASAT_IRQ_BASE + 4)
+#define LASAT_IRQ_PCIA   (LASAT_IRQ_BASE + 5)
+#define LASAT_IRQ_PCIB   (LASAT_IRQ_BASE + 6)
+#define LASAT_IRQ_PCIC   (LASAT_IRQ_BASE + 7)
+#define LASAT_IRQ_PCID   (LASAT_IRQ_BASE + 8)
 
 int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
@@ -71,13 +73,13 @@ int __init pcibios_map_irq(const struct 
 	case 1:
 	case 2:
 	case 3:
-		return LASATINT_PCIA + (((slot-1) + (pin-1)) % 4);
+		return LASAT_IRQ_PCIA + (((slot-1) + (pin-1)) % 4);
 	case 4:
-		return LASATINT_ETH1;   /* Ethernet 1 (LAN 2) */
+		return LASAT_IRQ_ETH1;   /* Ethernet 1 (LAN 2) */
 	case 5:
-		return LASATINT_ETH0;   /* Ethernet 0 (LAN 1) */
+		return LASAT_IRQ_ETH0;   /* Ethernet 0 (LAN 1) */
 	case 6:
-		return LASATINT_HDC;    /* IDE controller */
+		return LASAT_IRQ_HDC;    /* IDE controller */
 	default:
 		return 0xff;            /* Illegal */
 	}
diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/lasat/lasatint.h mips/include/asm-mips/lasat/lasatint.h
--- mips-orig/include/asm-mips/lasat/lasatint.h	2007-11-09 07:57:42.283308000 +0900
+++ mips/include/asm-mips/lasat/lasatint.h	2007-11-09 08:04:47.862157500 +0900
@@ -1,11 +1,6 @@
 #ifndef __ASM_LASAT_LASATINT_H
 #define __ASM_LASAT_LASATINT_H
 
-#include <linux/irq.h>
-
-#define LASATINT_BASE	MIPS_CPU_IRQ_BASE
-#define LASATINT_END	(LASATINT_BASE + 16)
-
 /* lasat 100 */
 #define LASAT_INT_STATUS_REG_100	(KSEG1ADDR(0x1c880000))
 #define LASAT_INT_MASK_REG_100		(KSEG1ADDR(0x1c890000))
diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/mach-lasat/irq.h mips/include/asm-mips/mach-lasat/irq.h
--- mips-orig/include/asm-mips/mach-lasat/irq.h	1970-01-01 09:00:00.000000000 +0900
+++ mips/include/asm-mips/mach-lasat/irq.h	2007-11-09 08:13:55.012352250 +0900
@@ -0,0 +1,13 @@
+#ifndef _ASM_MACH_LASAT_IRQ_H
+#define _ASM_MACH_LASAT_IRQ_H
+
+#define LASAT_CASCADE_IRQ	(MIPS_CPU_IRQ_BASE + 0)
+
+#define LASAT_IRQ_BASE		8
+#define LASAT_IRQ_END		23
+
+#define NR_IRQS			24
+
+#include_next <irq.h>
+
+#endif /* _ASM_MACH_LASAT_IRQ_H */

From ralf@linux-mips.org Fri Nov  9 11:06:33 2007
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From:	Ralf Baechle <ralf@linux-mips.org>
To:	Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Cc:	linux-mips <linux-mips@linux-mips.org>
Subject: Re: [PATCH][MIPS] fix LASAT IRQ overlap
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On Fri, Nov 09, 2007 at 06:42:35PM +0900, Yoichi Yuasa wrote:

> The range of MIPS_CPU IRQ and the range of LASAT IRQ overlap.
> This patch has fixed it.

You forgot to mention the tidying up part which really is the majority
of the patch ;-)

Anyway, thanks & applied.

  Ralf

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Date:	Sun, 11 Nov 2007 09:48:42 +0100
From:	Franck Bui-Huu <fbuihuu@gmail.com>
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To:	Ralf Baechle <ralf@linux-mips.org>
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Subject: [PATCH] Introduce __fill_user() and kill __bzero()
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Currently memset() is used to fill a user space area (clear_user) or
kernel one (memset). These two functions don't have the same
prototype, the former returning the number of bytes not copied and the
latter returning the start address of the area to clear. This forces
memset() to actually returns two values in an unconventional way ie
the number of bytes not copied is given by $a2. Therefore clear_user()
needs to call memset() using inline assembly.

Instead this patch creates __fill_user() which is the same as memset()
except it always returns the number of bytes not copied. This simplify
clear_user() and makes its definition saner.

Also an out of line version of memset is given because gcc generates
some calls to it since builtin functions have been disabled. It allows
assembly code to call it too.

Eventually __bzero() has been removed because it's not part of the
Linux uaccess API. And the nano-optimization it brings is not
worthing.

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
---
 arch/mips/kernel/mips_ksyms.c |    3 +-
 arch/mips/lib/csum_partial.S  |    2 +-
 arch/mips/lib/memcpy.S        |    2 +-
 arch/mips/lib/memset.S        |   49 ++++++++++++++++++++++++++--------------
 include/asm-mips/string.h     |    7 +++++-
 include/asm-mips/uaccess.h    |   17 ++-----------
 6 files changed, 44 insertions(+), 36 deletions(-)

diff --git a/arch/mips/kernel/mips_ksyms.c b/arch/mips/kernel/mips_ksyms.c
index 225755d..a801e09 100644
--- a/arch/mips/kernel/mips_ksyms.c
+++ b/arch/mips/kernel/mips_ksyms.c
@@ -14,7 +14,6 @@
 #include <asm/pgtable.h>
 #include <asm/uaccess.h>
 
-extern void *__bzero(void *__s, size_t __count);
 extern long __strncpy_from_user_nocheck_asm(char *__to,
                                             const char *__from, long __len);
 extern long __strncpy_from_user_asm(char *__to, const char *__from,
@@ -36,9 +35,9 @@ EXPORT_SYMBOL(kernel_thread);
 /*
  * Userspace access stuff.
  */
+EXPORT_SYMBOL(__fill_user);
 EXPORT_SYMBOL(__copy_user);
 EXPORT_SYMBOL(__copy_user_inatomic);
-EXPORT_SYMBOL(__bzero);
 EXPORT_SYMBOL(__strncpy_from_user_nocheck_asm);
 EXPORT_SYMBOL(__strncpy_from_user_asm);
 EXPORT_SYMBOL(__strlen_user_nocheck_asm);
diff --git a/arch/mips/lib/csum_partial.S b/arch/mips/lib/csum_partial.S
index c0a77fe..8d3fa1e 100644
--- a/arch/mips/lib/csum_partial.S
+++ b/arch/mips/lib/csum_partial.S
@@ -694,7 +694,7 @@ l_exc:
 	ADD	dst, t0			# compute start address in a1
 	SUB	dst, src
 	/*
-	 * Clear len bytes starting at dst.  Can't call __bzero because it
+	 * Clear len bytes starting at dst.  Can't call memset because it
 	 * might modify len.  An inefficient loop for these rare times...
 	 */
 	beqz	len, done
diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S
index a526c62..425f2c3 100644
--- a/arch/mips/lib/memcpy.S
+++ b/arch/mips/lib/memcpy.S
@@ -443,7 +443,7 @@ l_exc:
 	ADD	dst, t0			# compute start address in a1
 	SUB	dst, src
 	/*
-	 * Clear len bytes starting at dst.  Can't call __bzero because it
+	 * Clear len bytes starting at dst.  Can't call memset because it
 	 * might modify len.  An inefficient loop for these rare times...
 	 */
 	beqz	len, done
diff --git a/arch/mips/lib/memset.S b/arch/mips/lib/memset.S
index 3f8b8b3..cb6b83d 100644
--- a/arch/mips/lib/memset.S
+++ b/arch/mips/lib/memset.S
@@ -46,17 +46,34 @@
 	.endm
 
 /*
- * memset(void *s, int c, size_t n)
+ * An outline version of memset, which should be used either by gcc or
+ * by assembly code.
+ */
+NESTED(memset, 24, ra)
+	PTR_ADDU	sp, sp, -24
+	LONG_S		a0, 16(sp)
+	LONG_S		ra, 20(sp)
+	jal		__fill_user
+	LONG_L		v0, 16(sp)
+	LONG_L		ra, 20(sp)
+	PTR_ADDU	sp, sp, 24
+	jr		ra
+END(memset)
+
+/*
+ * __kernel_size_t __fill_user(void __user *s, long c, __kernel_size_t n)
  *
  * a0: start of area to clear
  * a1: char to fill with
  * a2: size of area to clear
+ *
+ * Returns the number of bytes NOT set or 0 on success.
  */
 	.set	noreorder
 	.align	5
-LEAF(memset)
+LEAF(__fill_user)
 	beqz		a1, 1f
-	 move		v0, a0			/* result */
+	 move		v0, zero		/* result */
 
 	andi		a1, 0xff		/* spread fillword */
 	LONG_SLL		t1, a1, 8
@@ -68,8 +85,6 @@ LEAF(memset)
 #endif
 	or		a1, t1
 1:
-
-FEXPORT(__bzero)
 	sltiu		t0, a2, LONGSIZE	/* very small region? */
 	bnez		t0, small_memset
 	 andi		t0, a0, LONGMASK	/* aligned? */
@@ -127,7 +142,7 @@ memset_partial:
 	EX(LONG_S_L, a1, -1(a0), last_fixup)
 #endif
 1:	jr		ra
-	 move		a2, zero
+	 nop
 
 small_memset:
 	beqz		a2, 2f
@@ -138,29 +153,29 @@ small_memset:
 	 sb		a1, -1(a0)
 
 2:	jr		ra			/* done */
-	 move		a2, zero
-	END(memset)
+	 nop
+END(__fill_user)
 
 first_fixup:
-	jr	ra
-	 nop
+	jr		ra
+	 move		v0, a2
 
 fwd_fixup:
 	PTR_L		t0, TI_TASK($28)
 	LONG_L		t0, THREAD_BUADDR(t0)
-	andi		a2, 0x3f
-	LONG_ADDU	a2, t1
+	andi		v0, a2, 0x3f
+	LONG_ADDU	v0, t1
 	jr		ra
-	 LONG_SUBU	a2, t0
+	 LONG_SUBU	v0, t0
 
 partial_fixup:
 	PTR_L		t0, TI_TASK($28)
 	LONG_L		t0, THREAD_BUADDR(t0)
-	andi		a2, LONGMASK
-	LONG_ADDU	a2, t1
+	andi		v0, a2, LONGMASK
+	LONG_ADDU	v0, t1
 	jr		ra
-	 LONG_SUBU	a2, t0
+	 LONG_SUBU	v0, t0
 
 last_fixup:
 	jr		ra
-	 andi		v1, a2, LONGMASK
+	 andi		v0, a2, LONGMASK
diff --git a/include/asm-mips/string.h b/include/asm-mips/string.h
index 436e3ad..2bba927 100644
--- a/include/asm-mips/string.h
+++ b/include/asm-mips/string.h
@@ -10,6 +10,7 @@
 #ifndef _ASM_STRING_H
 #define _ASM_STRING_H
 
+#include <asm/uaccess.h>	/* __fill_user() */
 
 /*
  * Most of the inline functions are rather naive implementations so I just
@@ -132,7 +133,11 @@ strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count)
 #endif /* CONFIG_32BIT */
 
 #define __HAVE_ARCH_MEMSET
-extern void *memset(void *__s, int __c, size_t __count);
+extern inline void *memset(void *s, int c, size_t count)
+{
+	__fill_user(s, c, count);
+	return s;
+}
 
 #define __HAVE_ARCH_MEMCPY
 extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h
index c30c718..8c0d226 100644
--- a/include/asm-mips/uaccess.h
+++ b/include/asm-mips/uaccess.h
@@ -11,7 +11,6 @@
 
 #include <linux/kernel.h>
 #include <linux/errno.h>
-#include <linux/thread_info.h>
 #include <asm-generic/uaccess.h>
 
 /*
@@ -633,23 +632,13 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);
  * Returns number of bytes that could not be cleared.
  * On success, this will be zero.
  */
+extern __kernel_size_t __fill_user(void __user *s, long c, __kernel_size_t n);
+
 static inline __kernel_size_t
 __clear_user(void __user *addr, __kernel_size_t size)
 {
-	__kernel_size_t res;
-
 	might_sleep();
-	__asm__ __volatile__(
-		"move\t$4, %1\n\t"
-		"move\t$5, $0\n\t"
-		"move\t$6, %2\n\t"
-		__MODULE_JAL(__bzero)
-		"move\t%0, $6"
-		: "=r" (res)
-		: "r" (addr), "r" (size)
-		: "$4", "$5", "$6", __UA_t0, __UA_t1, "$31");
-
-	return res;
+	return __fill_user(addr, 0, size);
 }
 
 #define clear_user(addr,n)						\
-- 
1.5.3.4


From fbuihuu@gmail.com Sun Nov 11 08:54:26 2007
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Date:	Sun, 11 Nov 2007 09:52:24 +0100
From:	Franck Bui-Huu <fbuihuu@gmail.com>
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Subject: [PATCH] Use __fill_user() to clear bss.
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bss is relatively big, more than 70Kb on cobalt config, so it's a pity
to clear it one word per loop. Instead this patch uses __fill_user(),
which should be faster.

Since we do a function jump to __fill_user(), argument registers needs
to be modified. However at this point, they contains the firmware
arguments which are saved the bss section. To avoid issue, this patch
makes them part of the data section.

Also this patch makes sure that sp is setup before doing a jal.

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
---

 Ralf,

 I haven't done any benchmarks but it seems the right thing to do.

 Please consider,

		Franck

 arch/mips/kernel/head.S  |   14 ++++++--------
 arch/mips/kernel/setup.c |   13 ++++++++++---
 2 files changed, 16 insertions(+), 11 deletions(-)

diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index 2367687..97273ae 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -171,14 +171,6 @@ NESTED(kernel_entry, 16, sp)			# kernel entry point
 	mtc0	t0, CP0_STATUS
 #endif /* CONFIG_MIPS_MT_SMTC */
 
-	PTR_LA		t0, __bss_start		# clear .bss
-	LONG_S		zero, (t0)
-	PTR_LA		t1, __bss_stop - LONGSIZE
-1:
-	PTR_ADDIU	t0, LONGSIZE
-	LONG_S		zero, (t0)
-	bne		t0, t1, 1b
-
 	LONG_S		a0, fw_arg0		# firmware arguments
 	LONG_S		a1, fw_arg1
 	LONG_S		a2, fw_arg2
@@ -191,6 +183,12 @@ NESTED(kernel_entry, 16, sp)			# kernel entry point
 	set_saved_sp	sp, t0, t1
 	PTR_SUBU	sp, 4 * SZREG		# init stack pointer
 
+	PTR_LA		a0, __bss_start		# clear .bss
+	move		a1, zero
+	PTR_LA		a2, __bss_stop
+	LONG_SUBU	a2, a0
+	jal		__fill_user		# no need to save ra
+
 	j		start_kernel
 	END(kernel_entry)
 
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index a06a27d..0eee73f 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -30,6 +30,7 @@
 #include <asm/setup.h>
 #include <asm/system.h>
 
+unsigned long kernelsp[NR_CPUS];
 struct cpuinfo_mips cpu_data[NR_CPUS] __read_mostly;
 
 EXPORT_SYMBOL(cpu_data);
@@ -39,6 +40,15 @@ struct screen_info screen_info;
 #endif
 
 /*
+ * Note: they're part of the data section because they're used
+ * *before* bss is cleared.
+ */
+unsigned long fw_arg0 = ULONG_MAX;
+unsigned long fw_arg1 = ULONG_MAX;
+unsigned long fw_arg2 = ULONG_MAX;
+unsigned long fw_arg3 = ULONG_MAX;
+
+/*
  * Despite it's name this variable is even if we don't have PCI
  */
 unsigned int PCI_DMA_BUS_IS_PHYS;
@@ -571,9 +581,6 @@ static int __init dsp_disable(char *s)
 
 __setup("nodsp", dsp_disable);
 
-unsigned long kernelsp[NR_CPUS];
-unsigned long fw_arg0, fw_arg1, fw_arg2, fw_arg3;
-
 #ifdef CONFIG_DEBUG_FS
 struct dentry *mips_debugfs_dir;
 static int __init debugfs_mips(void)
-- 
1.5.3.4


From tbm@cyrius.com Sun Nov 11 11:08:13 2007
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	linux-mips@linux-mips.org
Subject: Re: Donation of an Indigo 2 R4K@250
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Anyone interested?

* Martin Michlmayr <tbm@cyrius.com> [2007-11-05 15:12]:
> If anyone is interested in an Indigo 2 located in Cologne, Germany,
> please let me know.
> 
> > I would like to donate the MIPS porters an SGI Indigo 2 R4K@250Mhz.
> > Fully working, keyboard/mouse/monitor included, but no IRIX.
> > 
> > The machine is located in Cologne/Germany - pickup preferred...
> 
> -- 
> Martin Michlmayr
> http://www.cyrius.com/
> 
> 
> -- 
> To UNSUBSCRIBE, email to debian-mips-REQUEST@lists.debian.org
> with a subject of "unsubscribe". Trouble? Contact listmaster@lists.debian.org

-- 
Martin Michlmayr
http://www.cyrius.com/

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Subject: Re: [PATCH] Introduce __fill_user() and kill __bzero()
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Franck Bui-Huu wrote:
> Currently memset() is used to fill a user space area (clear_user) or
> kernel one (memset). These two functions don't have the same
> prototype, the former returning the number of bytes not copied and the
> latter returning the start address of the area to clear. This forces
> memset() to actually returns two values in an unconventional way ie
> the number of bytes not copied is given by $a2. Therefore clear_user()
> needs to call memset() using inline assembly.
> 
> Instead this patch creates __fill_user() which is the same as memset()
> except it always returns the number of bytes not copied. This simplify
> clear_user() and makes its definition saner.
> 
> Also an out of line version of memset is given because gcc generates
> some calls to it since builtin functions have been disabled. It allows
> assembly code to call it too.
> 
> Eventually __bzero() has been removed because it's not part of the
> Linux uaccess API. And the nano-optimization it brings is not
> worthing.
> 
> Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
> ---
>  arch/mips/kernel/mips_ksyms.c |    3 +-
>  arch/mips/lib/csum_partial.S  |    2 +-
>  arch/mips/lib/memcpy.S        |    2 +-
>  arch/mips/lib/memset.S        |   49 ++++++++++++++++++++++++++--------------
>  include/asm-mips/string.h     |    7 +++++-
>  include/asm-mips/uaccess.h    |   17 ++-----------
>  6 files changed, 44 insertions(+), 36 deletions(-)
> 
> diff --git a/arch/mips/kernel/mips_ksyms.c b/arch/mips/kernel/mips_ksyms.c
> index 225755d..a801e09 100644
> --- a/arch/mips/kernel/mips_ksyms.c
> +++ b/arch/mips/kernel/mips_ksyms.c
> @@ -14,7 +14,6 @@
>  #include <asm/pgtable.h>
>  #include <asm/uaccess.h>
>  
> -extern void *__bzero(void *__s, size_t __count);
>  extern long __strncpy_from_user_nocheck_asm(char *__to,
>                                              const char *__from, long __len);
>  extern long __strncpy_from_user_asm(char *__to, const char *__from,
> @@ -36,9 +35,9 @@ EXPORT_SYMBOL(kernel_thread);
>  /*
>   * Userspace access stuff.
>   */
> +EXPORT_SYMBOL(__fill_user);
>  EXPORT_SYMBOL(__copy_user);
>  EXPORT_SYMBOL(__copy_user_inatomic);
> -EXPORT_SYMBOL(__bzero);
>  EXPORT_SYMBOL(__strncpy_from_user_nocheck_asm);
>  EXPORT_SYMBOL(__strncpy_from_user_asm);
>  EXPORT_SYMBOL(__strlen_user_nocheck_asm);
> diff --git a/arch/mips/lib/csum_partial.S b/arch/mips/lib/csum_partial.S
> index c0a77fe..8d3fa1e 100644
> --- a/arch/mips/lib/csum_partial.S
> +++ b/arch/mips/lib/csum_partial.S
> @@ -694,7 +694,7 @@ l_exc:
>  	ADD	dst, t0			# compute start address in a1
>  	SUB	dst, src
>  	/*
> -	 * Clear len bytes starting at dst.  Can't call __bzero because it
> +	 * Clear len bytes starting at dst.  Can't call memset because it
>  	 * might modify len.  An inefficient loop for these rare times...
>  	 */
>  	beqz	len, done
> diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S
> index a526c62..425f2c3 100644
> --- a/arch/mips/lib/memcpy.S
> +++ b/arch/mips/lib/memcpy.S
> @@ -443,7 +443,7 @@ l_exc:
>  	ADD	dst, t0			# compute start address in a1
>  	SUB	dst, src
>  	/*
> -	 * Clear len bytes starting at dst.  Can't call __bzero because it
> +	 * Clear len bytes starting at dst.  Can't call memset because it
>  	 * might modify len.  An inefficient loop for these rare times...
>  	 */
>  	beqz	len, done
> diff --git a/arch/mips/lib/memset.S b/arch/mips/lib/memset.S
> index 3f8b8b3..cb6b83d 100644
> --- a/arch/mips/lib/memset.S
> +++ b/arch/mips/lib/memset.S
> @@ -46,17 +46,34 @@
>  	.endm
>  
>  /*
> - * memset(void *s, int c, size_t n)
> + * An outline version of memset, which should be used either by gcc or
> + * by assembly code.
> + */
> +NESTED(memset, 24, ra)
> +	PTR_ADDU	sp, sp, -24
> +	LONG_S		a0, 16(sp)
> +	LONG_S		ra, 20(sp)
> +	jal		__fill_user
> +	LONG_L		v0, 16(sp)
> +	LONG_L		ra, 20(sp)
> +	PTR_ADDU	sp, sp, 24
> +	jr		ra
> +END(memset)

This will break on 64bit kernels.


Thiemo

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Message-ID: <47370A5C.8060200@gmail.com>
Date:	Sun, 11 Nov 2007 14:57:48 +0100
From:	Franck Bui-Huu <vagabon.xyz@gmail.com>
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To:	Thiemo Seufer <ths@networkno.de>
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	linux-mips <linux-mips@linux-mips.org>
Subject: Re: [PATCH] Introduce __fill_user() and kill __bzero()
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Thiemo Seufer wrote:
>>  /*
>> - * memset(void *s, int c, size_t n)
>> + * An outline version of memset, which should be used either by gcc or
>> + * by assembly code.
>> + */
>> +NESTED(memset, 24, ra)
>> +	PTR_ADDU	sp, sp, -24
>> +	LONG_S		a0, 16(sp)
>> +	LONG_S		ra, 20(sp)
>> +	jal		__fill_user
>> +	LONG_L		v0, 16(sp)
>> +	LONG_L		ra, 20(sp)
>> +	PTR_ADDU	sp, sp, 24
>> +	jr		ra
>> +END(memset)
> 
> This will break on 64bit kernels.
> 

Obviously...

Looks like I should find a good place to implement it in C... or do
you know a sane way (without too many #ifdef) to do that in assembly
code ?

thanks,
		Franck


From tsbogend@alpha.franken.de Sun Nov 11 14:33:00 2007
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To:	linux-mips@linux-mips.org
Subject: problem with 64bit kernel, BOOT_ELF32 and memory outside CKSEG0
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From:	tsbogend@alpha.franken.de (Thomas Bogendoerfer)
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I tried to get a working 64bit kernel for SNI RM. Most of things
to fix were quite obvious, but there is one thing, which I haven't
understood yet.

The firmware is only able to boot ELF32 images, which mean I need to
use BOOT_ELF32.

RM machines have 256MB memory mapped to KSEG0, anything else is outside.
To me that would mean I need to use the default spaces from
mach-generic/spaces.h. A kernel built that way will hang after calling
schedule() in rest_init() (init/main.c). Has anybody seen this
as well ?

Before digging into schedule() I decided to try mach-ip22/spaces.h
and limit the installed memory to 256MB. This kernel boots and
runs fine.

Then I booted that kernel with all memory (512MB) and it died, when
init had troubles mapping libc. That result didn't surprise me
that much, since the kernel probably tried to map memory > 256MB
via CKSEG0, which won't work. Correct ?

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea.                                                [ RFC1925, 2.3 ]

From anemo@mba.ocn.ne.jp Sun Nov 11 16:04:31 2007
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To:	linux-mips@linux-mips.org
Cc:	ralf@linux-mips.org
Subject: [PATCH] Move kernel/time/Kconfig menu to appropriate place
From:	Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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CONFIG_NO_HZ, CONFIG_HIGH_RES_TIMERS should be selected in "Kernel
type" menu, not in "CPU selection" menu.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
---
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 2f2ce0c..2ee0330 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -961,8 +961,6 @@ config BOOT_ELF64
 
 menu "CPU selection"
 
-source "kernel/time/Kconfig"
-
 choice
 	prompt "CPU type"
 	default CPU_R4X00
@@ -1734,6 +1732,8 @@ config NR_CPUS
 	  performance should round up your number of processors to the next
 	  power of two.
 
+source "kernel/time/Kconfig"
+
 #
 # Timer Interrupt Frequency Configuration
 #

From anemo@mba.ocn.ne.jp Sun Nov 11 16:30:15 2007
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To:	linux-mips@linux-mips.org
Cc:	ralf@linux-mips.org, wim@iguana.be
Subject: [PATCH 1/2] TXx9 watchdog driver
From:	Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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This is a driver for watchdog timer built into TXx9 MIPS SoCs.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
---
 drivers/watchdog/Kconfig   |    6 +
 drivers/watchdog/Makefile  |    1 +
 drivers/watchdog/txx9wdt.c |  276 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 283 insertions(+), 0 deletions(-)

diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 2792bc1..7484ee6 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -616,6 +616,12 @@ config AR7_WDT
 	help
 	  Hardware driver for the TI AR7 Watchdog Timer.
 
+config TXX9_WDT
+	tristate "Toshiba TXx9 Watchdog Timer"
+	depends on CPU_TX39XX || CPU_TX49XX
+	help
+	  Hardware driver for the built-in watchdog timer on TXx9 MIPS SoCs.
+
 # PARISC Architecture
 
 # POWERPC Architecture
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 7d9e573..0458e62 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -91,6 +91,7 @@ obj-$(CONFIG_INDYDOG) += indydog.o
 obj-$(CONFIG_WDT_MTX1)	+= mtx-1_wdt.o
 obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o
 obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
+obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
 
 # PARISC Architecture
 
diff --git a/drivers/watchdog/txx9wdt.c b/drivers/watchdog/txx9wdt.c
new file mode 100644
index 0000000..f3af8f5
--- /dev/null
+++ b/drivers/watchdog/txx9wdt.c
@@ -0,0 +1,276 @@
+/*
+ * txx9wdt: A Hardware Watchdog Driver for TXx9 SoCs
+ *
+ * Copyright (C) 2007 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/types.h>
+#include <linux/miscdevice.h>
+#include <linux/watchdog.h>
+#include <linux/fs.h>
+#include <linux/reboot.h>
+#include <linux/init.h>
+#include <linux/uaccess.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <asm/txx9tmr.h>
+
+#define TIMER_MARGIN	60		/* Default is 60 seconds */
+
+static int timeout = TIMER_MARGIN;	/* in seconds */
+module_param(timeout, int, 0);
+MODULE_PARM_DESC(timeout,
+	"Watchdog timeout in seconds. "
+	"(0<timeout<((2^" __MODULE_STRING(TXX9_TIMER_BITS) ")/(IMCLK/256)), "
+	"default=" __MODULE_STRING(TIMER_MARGIN) ")");
+
+static int nowayout = WATCHDOG_NOWAYOUT;
+module_param(nowayout, int, 0);
+MODULE_PARM_DESC(nowayout,
+	"Watchdog cannot be stopped once started "
+	"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+
+#define WD_TIMER_CCD	7	/* 1/256 */
+#define WD_TIMER_CLK	(clk_get_rate(txx9_imclk) / (2 << WD_TIMER_CCD))
+#define WD_MAX_TIMEOUT	((0xffffffff >> (32 - TXX9_TIMER_BITS)) / WD_TIMER_CLK)
+
+static unsigned long txx9wdt_alive;
+static int expect_close;
+static struct txx9_tmr_reg __iomem *txx9wdt_reg;
+static struct clk *txx9_imclk;
+
+static void txx9wdt_ping(void)
+{
+	__raw_writel(TXx9_TMWTMR_TWIE | TXx9_TMWTMR_TWC, &txx9wdt_reg->wtmr);
+}
+
+static void txx9wdt_start(void)
+{
+	__raw_writel(WD_TIMER_CLK * timeout, &txx9wdt_reg->cpra);
+	__raw_writel(WD_TIMER_CCD, &txx9wdt_reg->ccdr);
+	__raw_writel(0, &txx9wdt_reg->tisr);	/* clear pending interrupt */
+	__raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
+		     &txx9wdt_reg->tcr);
+	__raw_writel(TXx9_TMWTMR_TWIE | TXx9_TMWTMR_TWC, &txx9wdt_reg->wtmr);
+}
+
+static void txx9wdt_stop(void)
+{
+	__raw_writel(TXx9_TMWTMR_WDIS, &txx9wdt_reg->wtmr);
+	__raw_writel(__raw_readl(&txx9wdt_reg->tcr) & ~TXx9_TMTCR_TCE,
+		     &txx9wdt_reg->tcr);
+}
+
+static int txx9wdt_open(struct inode *inode, struct file *file)
+{
+	if (test_and_set_bit(0, &txx9wdt_alive))
+		return -EBUSY;
+
+	if (__raw_readl(&txx9wdt_reg->tcr) & TXx9_TMTCR_TCE) {
+		clear_bit(0, &txx9wdt_alive);
+		return -EBUSY;
+	}
+
+	if (nowayout)
+		__module_get(THIS_MODULE);
+
+	txx9wdt_start();
+	return nonseekable_open(inode, file);
+}
+
+static int txx9wdt_release(struct inode *inode, struct file *file)
+{
+	if (expect_close)
+		txx9wdt_stop();
+	else {
+		printk(KERN_CRIT "txx9wdt: "
+		       "Unexpected close, not stopping watchdog!\n");
+		txx9wdt_ping();
+	}
+	clear_bit(0, &txx9wdt_alive);
+	expect_close = 0;
+	return 0;
+}
+
+static ssize_t txx9wdt_write(struct file *file, const char __user *data,
+			     size_t len, loff_t *ppos)
+{
+	if (len) {
+		if (!nowayout) {
+			size_t i;
+
+			expect_close = 0;
+			for (i = 0; i != len; i++) {
+				char c;
+				if (get_user(c, data + i))
+					return -EFAULT;
+				if (c == 'V')
+					expect_close = 1;
+			}
+		}
+		txx9wdt_ping();
+	}
+	return len;
+}
+
+static int txx9wdt_ioctl(struct inode *inode, struct file *file,
+	unsigned int cmd, unsigned long arg)
+{
+	void __user *argp = (void __user *)arg;
+	int __user *p = argp;
+	int new_timeout;
+	static struct watchdog_info ident = {
+		.options =		WDIOF_SETTIMEOUT |
+					WDIOF_KEEPALIVEPING |
+					WDIOF_MAGICCLOSE,
+		.firmware_version =	0,
+		.identity =		"Hardware Watchdog for TXx9",
+	};
+
+	switch (cmd) {
+	default:
+		return -ENOTTY;
+	case WDIOC_GETSUPPORT:
+		return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
+	case WDIOC_GETSTATUS:
+	case WDIOC_GETBOOTSTATUS:
+		return put_user(0, p);
+	case WDIOC_KEEPALIVE:
+		txx9wdt_ping();
+		return 0;
+	case WDIOC_SETTIMEOUT:
+		if (get_user(new_timeout, p))
+			return -EFAULT;
+		if (new_timeout < 1 || new_timeout > WD_MAX_TIMEOUT)
+			return -EINVAL;
+		timeout = new_timeout;
+		txx9wdt_stop();
+		txx9wdt_start();
+		/* Fall */
+	case WDIOC_GETTIMEOUT:
+		return put_user(timeout, p);
+	}
+}
+
+static int txx9wdt_notify_sys(struct notifier_block *this, unsigned long code,
+	void *unused)
+{
+	if (code == SYS_DOWN || code == SYS_HALT)
+		txx9wdt_stop();
+	return NOTIFY_DONE;
+}
+
+static const struct file_operations txx9wdt_fops = {
+	.owner =	THIS_MODULE,
+	.llseek =	no_llseek,
+	.write =	txx9wdt_write,
+	.ioctl =	txx9wdt_ioctl,
+	.open =		txx9wdt_open,
+	.release =	txx9wdt_release,
+};
+
+static struct miscdevice txx9wdt_miscdev = {
+	.minor =	WATCHDOG_MINOR,
+	.name =		"watchdog",
+	.fops =		&txx9wdt_fops,
+};
+
+static struct notifier_block txx9wdt_notifier = {
+	.notifier_call = txx9wdt_notify_sys
+};
+
+static int __init txx9wdt_probe(struct platform_device *dev)
+{
+	struct resource *res;
+	int ret;
+
+	txx9_imclk = clk_get(NULL, "imbus_clk");
+	if (IS_ERR(txx9_imclk)) {
+		ret = PTR_ERR(txx9_imclk);
+		txx9_imclk = NULL;
+		goto exit;
+	}
+	ret = clk_enable(txx9_imclk);
+	if (ret) {
+		clk_put(txx9_imclk);
+		txx9_imclk = NULL;
+		goto exit;
+	}
+
+	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
+	if (!res)
+		goto exit_busy;
+	if (!devm_request_mem_region(&dev->dev,
+				     res->start, res->end - res->start + 1,
+				     "txx9wdt"))
+		goto exit_busy;
+	txx9wdt_reg = devm_ioremap(&dev->dev,
+				   res->start, res->end - res->start + 1);
+	if (!txx9wdt_reg)
+		goto exit_busy;
+
+	ret = misc_register(&txx9wdt_miscdev);
+	if (ret)
+		goto exit;
+
+	ret = register_reboot_notifier(&txx9wdt_notifier);
+	if (ret) {
+		misc_deregister(&txx9wdt_miscdev);
+		goto exit;
+	}
+
+	printk(KERN_INFO "Hardware Watchdog Timer for TXx9: "
+	       "timeout=%d sec (max %ld) (nowayout= %d)\n",
+	       timeout, WD_MAX_TIMEOUT, nowayout);
+
+	return 0;
+exit_busy:
+	ret = -EBUSY;
+exit:
+	if (txx9_imclk) {
+		clk_disable(txx9_imclk);
+		clk_put(txx9_imclk);
+	}
+	return ret;
+}
+
+static int __exit txx9wdt_remove(struct platform_device *dev)
+{
+	misc_deregister(&txx9wdt_miscdev);
+	unregister_reboot_notifier(&txx9wdt_notifier);
+	clk_disable(txx9_imclk);
+	clk_put(txx9_imclk);
+	return 0;
+}
+
+static struct platform_driver txx9wdt_driver = {
+	.remove = __exit_p(txx9wdt_remove),
+	.driver = {
+		.name = "txx9wdt",
+		.owner = THIS_MODULE,
+	},
+};
+
+static int __init watchdog_init(void)
+{
+	return platform_driver_probe(&txx9wdt_driver, txx9wdt_probe);
+}
+
+static void __exit watchdog_exit(void)
+{
+	platform_driver_unregister(&txx9wdt_driver);
+}
+
+module_init(watchdog_init);
+module_exit(watchdog_exit);
+
+MODULE_DESCRIPTION("TXx9 Watchdog Driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);

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To:	linux-mips@linux-mips.org
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Subject: [PATCH 2/2] TXx9 watchdog support for rbhma3100,rbhma4200,rbhma4500
From:	Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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This patch adds support for txx9wdt driver to rbhma3100, rbhma4200 and
rbhma4500 platform.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
---
This is a patch against linux-queue tree in linux-mips.org

 arch/mips/configs/jmr3927_defconfig                |   15 +++++-
 arch/mips/configs/rbhma4200_defconfig              |   15 +++++-
 arch/mips/configs/rbhma4500_defconfig              |   15 +++++-
 arch/mips/jmr3927/rbhma3100/setup.c                |   55 ++++++++++++++++++++
 .../toshiba_rbtx4927/toshiba_rbtx4927_setup.c      |   55 ++++++++++++++++++++
 arch/mips/tx4938/toshiba_rbtx4938/setup.c          |   25 +++++++++
 include/asm-mips/tx4927/tx4927_pci.h               |    1 +
 7 files changed, 178 insertions(+), 3 deletions(-)

diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig
index eb96791..4ace378 100644
--- a/arch/mips/configs/jmr3927_defconfig
+++ b/arch/mips/configs/jmr3927_defconfig
@@ -464,7 +464,6 @@ CONFIG_SERIAL_TXX9_STDSERIAL=y
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=256
 # CONFIG_IPMI_HANDLER is not set
-# CONFIG_WATCHDOG is not set
 # CONFIG_HW_RANDOM is not set
 # CONFIG_RTC is not set
 # CONFIG_R3964 is not set
@@ -482,6 +481,20 @@ CONFIG_DEVPORT=y
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_TXX9_WDT=y
+
+#
+# PCI-based Watchdog Cards
+#
+# CONFIG_PCIPCWATCHDOG is not set
+# CONFIG_WDTPCI is not set
 
 #
 # Multifunction device drivers
diff --git a/arch/mips/configs/rbhma4200_defconfig b/arch/mips/configs/rbhma4200_defconfig
index 9383a59..a67c698 100644
--- a/arch/mips/configs/rbhma4200_defconfig
+++ b/arch/mips/configs/rbhma4200_defconfig
@@ -431,7 +431,6 @@ CONFIG_UNIX98_PTYS=y
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=256
 # CONFIG_IPMI_HANDLER is not set
-# CONFIG_WATCHDOG is not set
 # CONFIG_HW_RANDOM is not set
 # CONFIG_RTC is not set
 # CONFIG_R3964 is not set
@@ -449,6 +448,20 @@ CONFIG_DEVPORT=y
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_TXX9_WDT=m
+
+#
+# PCI-based Watchdog Cards
+#
+# CONFIG_PCIPCWATCHDOG is not set
+# CONFIG_WDTPCI is not set
 
 #
 # Multifunction device drivers
diff --git a/arch/mips/configs/rbhma4500_defconfig b/arch/mips/configs/rbhma4500_defconfig
index d1b56cc..ebc8ad4 100644
--- a/arch/mips/configs/rbhma4500_defconfig
+++ b/arch/mips/configs/rbhma4500_defconfig
@@ -450,7 +450,6 @@ CONFIG_UNIX98_PTYS=y
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=256
 # CONFIG_IPMI_HANDLER is not set
-# CONFIG_WATCHDOG is not set
 # CONFIG_HW_RANDOM is not set
 # CONFIG_RTC is not set
 # CONFIG_R3964 is not set
@@ -479,6 +478,20 @@ CONFIG_SPI_AT25=y
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_TXX9_WDT=m
+
+#
+# PCI-based Watchdog Cards
+#
+# CONFIG_PCIPCWATCHDOG is not set
+# CONFIG_WDTPCI is not set
 
 #
 # Multifunction device drivers
diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c
index 75cfe65..c886d80 100644
--- a/arch/mips/jmr3927/rbhma3100/setup.c
+++ b/arch/mips/jmr3927/rbhma3100/setup.c
@@ -35,6 +35,7 @@
 #include <linux/delay.h>
 #include <linux/pm.h>
 #include <linux/platform_device.h>
+#include <linux/clk.h>
 #ifdef CONFIG_SERIAL_TXX9
 #include <linux/serial_core.h>
 #endif
@@ -233,6 +234,8 @@ static void __init tx3927_setup(void)
 	tx3927_ccfgptr->ccfg &= ~TX3927_CCFG_BEOW;
 	/* Disable PCI snoop */
 	tx3927_ccfgptr->ccfg &= ~TX3927_CCFG_PSNP;
+	/* do reset on watchdog */
+	tx3927_ccfgptr->ccfg |= TX3927_CCFG_WR;
 
 #ifdef DO_WRITE_THROUGH
 	/* Enable PCI SNOOP - with write through only */
@@ -383,3 +386,55 @@ static int __init jmr3927_rtc_init(void)
 	return IS_ERR(dev) ? PTR_ERR(dev) : 0;
 }
 device_initcall(jmr3927_rtc_init);
+
+/* Watchdog support */
+
+static int __init txx9_wdt_init(unsigned long base)
+{
+	struct resource res = {
+		.start	= base,
+		.end	= base + 0x100 - 1,
+		.flags	= IORESOURCE_MEM,
+	};
+	struct platform_device *dev =
+		platform_device_register_simple("txx9wdt", -1, &res, 1);
+	return IS_ERR(dev) ? PTR_ERR(dev) : 0;
+}
+
+static int __init jmr3927_wdt_init(void)
+{
+	return txx9_wdt_init(TX3927_TMR_REG(2));
+}
+device_initcall(jmr3927_wdt_init);
+
+/* Minimum CLK support */
+
+struct clk *clk_get(struct device *dev, const char *id)
+{
+	if (!strcmp(id, "imbus_clk"))
+		return (struct clk *)JMR3927_IMCLK;
+	return ERR_PTR(-ENOENT);
+}
+EXPORT_SYMBOL(clk_get);
+
+int clk_enable(struct clk *clk)
+{
+	return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+	return (unsigned long)clk;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+void clk_put(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_put);
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
index c29a528..e466e5e 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
@@ -50,6 +50,7 @@
 #include <linux/pci.h>
 #include <linux/pm.h>
 #include <linux/platform_device.h>
+#include <linux/clk.h>
 
 #include <asm/bootinfo.h>
 #include <asm/io.h>
@@ -803,6 +804,8 @@ void __init plat_mem_setup(void)
 		}
 
 	/* CCFG */
+	/* do reset on watchdog */
+	tx4927_ccfgptr->ccfg |= TX4927_CCFG_WR;
 	/* enable Timeout BusError */
 	if (tx4927_ccfg_toeon)
 		tx4927_ccfgptr->ccfg |= TX4927_CCFG_TOE;
@@ -944,3 +947,55 @@ static int __init rbtx4927_ne_init(void)
 	return IS_ERR(dev) ? PTR_ERR(dev) : 0;
 }
 device_initcall(rbtx4927_ne_init);
+
+/* Watchdog support */
+
+static int __init txx9_wdt_init(unsigned long base)
+{
+	struct resource res = {
+		.start	= base,
+		.end	= base + 0x100 - 1,
+		.flags	= IORESOURCE_MEM,
+	};
+	struct platform_device *dev =
+		platform_device_register_simple("txx9wdt", -1, &res, 1);
+	return IS_ERR(dev) ? PTR_ERR(dev) : 0;
+}
+
+static int __init rbtx4927_wdt_init(void)
+{
+	return txx9_wdt_init(TX4927_TMR_REG(2) & 0xfffffffffULL);
+}
+device_initcall(rbtx4927_wdt_init);
+
+/* Minimum CLK support */
+
+struct clk *clk_get(struct device *dev, const char *id)
+{
+	if (!strcmp(id, "imbus_clk"))
+		return (struct clk *)50000000;
+	return ERR_PTR(-ENOENT);
+}
+EXPORT_SYMBOL(clk_get);
+
+int clk_enable(struct clk *clk)
+{
+	return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+	return (unsigned long)clk;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+void clk_put(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_put);
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/setup.c b/arch/mips/tx4938/toshiba_rbtx4938/setup.c
index d13af99..47a9c17 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/setup.c
+++ b/arch/mips/tx4938/toshiba_rbtx4938/setup.c
@@ -724,6 +724,8 @@ void __init tx4938_board_setup(void)
 	/* CCFG */
 	/* clear WatchDogReset,BusErrorOnWrite flag (W1C) */
 	tx4938_ccfgptr->ccfg |= TX4938_CCFG_WDRST | TX4938_CCFG_BEOW;
+	/* do reset on watchdog */
+	tx4938_ccfgptr->ccfg |= TX4938_CCFG_WR;
 	/* clear PCIC1 reset */
 	if (tx4938_ccfgptr->clkctr & TX4938_CLKCTR_PCIC1RST)
 		tx4938_ccfgptr->clkctr &= ~TX4938_CLKCTR_PCIC1RST;
@@ -1121,12 +1123,35 @@ static int __init rbtx4938_spi_init(void)
 }
 arch_initcall(rbtx4938_spi_init);
 
+/* Watchdog support */
+
+static int __init txx9_wdt_init(unsigned long base)
+{
+	struct resource res = {
+		.start	= base,
+		.end	= base + 0x100 - 1,
+		.flags	= IORESOURCE_MEM,
+		.parent	= &tx4938_reg_resource,
+	};
+	struct platform_device *dev =
+		platform_device_register_simple("txx9wdt", -1, &res, 1);
+	return IS_ERR(dev) ? PTR_ERR(dev) : 0;
+}
+
+static int __init rbtx4938_wdt_init(void)
+{
+	return txx9_wdt_init(TX4938_TMR_REG(2) & 0xfffffffffULL);
+}
+device_initcall(rbtx4938_wdt_init);
+
 /* Minimum CLK support */
 
 struct clk *clk_get(struct device *dev, const char *id)
 {
 	if (!strcmp(id, "spi-baseclk"))
 		return (struct clk *)(txx9_gbus_clock / 2 / 4);
+	if (!strcmp(id, "imbus_clk"))
+		return (struct clk *)(txx9_gbus_clock / 2);
 	return ERR_PTR(-ENOENT);
 }
 EXPORT_SYMBOL(clk_get);
diff --git a/include/asm-mips/tx4927/tx4927_pci.h b/include/asm-mips/tx4927/tx4927_pci.h
index 3f1e470..0be77df 100644
--- a/include/asm-mips/tx4927/tx4927_pci.h
+++ b/include/asm-mips/tx4927/tx4927_pci.h
@@ -9,6 +9,7 @@
 #define __ASM_TX4927_TX4927_PCI_H
 
 #define TX4927_CCFG_TOE 0x00004000
+#define TX4927_CCFG_WR	0x00008000
 #define TX4927_CCFG_TINTDIS	0x01000000
 
 #define TX4927_PCIMEM      0x08000000

From anemo@mba.ocn.ne.jp Sun Nov 11 17:03:17 2007
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Date:	Mon, 12 Nov 2007 02:05:18 +0900 (JST)
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To:	ralf@linux-mips.org
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Subject: Re: WAIT vs. tickless kernel
From:	Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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Take 3.  Remove unnecessary .mips0 and make rollback_handler a bit
faster.

------------------------------------------------------------------------
Subject: Fix potential latency problem due to non-atomic cpu_wait.

If an interrupt happened between checking of NEED_RESCHED and WAIT
instruction, adjust EPC to restart from checking of NEED_RESCHED.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
---
 arch/mips/kernel/cpu-probe.c |   16 ++--------------
 arch/mips/kernel/genex.S     |   37 +++++++++++++++++++++++++++++++++++++
 arch/mips/kernel/traps.c     |   22 ++++++++++++++++------
 3 files changed, 55 insertions(+), 20 deletions(-)

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 5c27943..1f71fec 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -45,18 +45,7 @@ static void r39xx_wait(void)
 	local_irq_enable();
 }
 
-/*
- * There is a race when WAIT instruction executed with interrupt
- * enabled.
- * But it is implementation-dependent wheter the pipelie restarts when
- * a non-enabled interrupt is requested.
- */
-static void r4k_wait(void)
-{
-	__asm__("	.set	mips3			\n"
-		"	wait				\n"
-		"	.set	mips0			\n");
-}
+extern void r4k_wait(void);
 
 /*
  * This variant is preferable as it allows testing need_resched and going to
@@ -128,7 +117,7 @@ static int __init wait_disable(char *s)
 
 __setup("nowait", wait_disable);
 
-static inline void check_wait(void)
+void __init check_wait(void)
 {
 	struct cpuinfo_mips *c = &current_cpu_data;
 
@@ -239,7 +228,6 @@ static inline void check_errata(void)
 
 void __init check_bugs32(void)
 {
-	check_wait();
 	check_errata();
 }
 
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index e76a76b..96f46b3 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -20,6 +20,7 @@
 #include <asm/stackframe.h>
 #include <asm/war.h>
 #include <asm/page.h>
+#include <asm/thread_info.h>
 
 #define PANIC_PIC(msg)					\
 		.set push;				\
@@ -126,7 +127,42 @@ handle_vcei:
 
 	__FINIT
 
+	.align	5	/* 32 byte rollback region */
+LEAF(r4k_wait)
+	.set	push
+	.set	noreorder
+	/* start of rollback region */
+	LONG_L	t0, TI_FLAGS($28)
+	nop
+	andi	t0, _TIF_NEED_RESCHED
+	bnez	t0, 1f
+	 nop
+	nop
+	nop
+	.set	mips3
+	wait
+	/* end of rollback region (the region size must be power of two) */
+	.set	pop
+1:
+	jr	ra
+	END(r4k_wait)
+
+	.macro	BUILD_ROLLBACK_PROLOGUE handler
+	FEXPORT(rollback_\handler)
+	.set	push
+	.set	noat
+	MFC0	k0, CP0_EPC
+	PTR_LA	k1, r4k_wait
+	ori	k0, 0x1f	/* 32 byte rollback region */
+	xori	k0, 0x1f
+	bne	k0, k1, 9f
+	MTC0	k0, CP0_EPC
+9:
+	.set pop
+	.endm
+
 	.align  5
+BUILD_ROLLBACK_PROLOGUE handle_int
 NESTED(handle_int, PT_SIZE, sp)
 #ifdef CONFIG_TRACE_IRQFLAGS
 	/*
@@ -201,6 +237,7 @@ NESTED(except_vec_ejtag_debug, 0, sp)
  * This prototype is copied to ebase + n*IntCtl.VS and patched
  * to invoke the handler
  */
+BUILD_ROLLBACK_PROLOGUE except_vec_vi
 NESTED(except_vec_vi, 0, sp)
 	SAVE_SOME
 	SAVE_AT
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 23e73d0..23807c6 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -43,6 +43,9 @@
 #include <asm/types.h>
 #include <asm/stacktrace.h>
 
+extern void check_wait(void);
+extern asmlinkage void r4k_wait(void);
+extern asmlinkage void rollback_handle_int(void);
 extern asmlinkage void handle_int(void);
 extern asmlinkage void handle_tlbm(void);
 extern asmlinkage void handle_tlbl(void);
@@ -1146,6 +1149,9 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
 
 		extern char except_vec_vi, except_vec_vi_lui;
 		extern char except_vec_vi_ori, except_vec_vi_end;
+		extern char rollback_except_vec_vi;
+		char *vec_start = (cpu_wait == r4k_wait) ?
+			&rollback_except_vec_vi : &except_vec_vi;
 #ifdef CONFIG_MIPS_MT_SMTC
 		/*
 		 * We need to provide the SMTC vectored interrupt handler
@@ -1153,11 +1159,11 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
 		 * Status.IM bit to be masked before going there.
 		 */
 		extern char except_vec_vi_mori;
-		const int mori_offset = &except_vec_vi_mori - &except_vec_vi;
+		const int mori_offset = &except_vec_vi_mori - vec_start;
 #endif /* CONFIG_MIPS_MT_SMTC */
-		const int handler_len = &except_vec_vi_end - &except_vec_vi;
-		const int lui_offset = &except_vec_vi_lui - &except_vec_vi;
-		const int ori_offset = &except_vec_vi_ori - &except_vec_vi;
+		const int handler_len = &except_vec_vi_end - vec_start;
+		const int lui_offset = &except_vec_vi_lui - vec_start;
+		const int ori_offset = &except_vec_vi_ori - vec_start;
 
 		if (handler_len > VECTORSPACING) {
 			/*
@@ -1167,7 +1173,7 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
 			panic("VECTORSPACING too small");
 		}
 
-		memcpy(b, &except_vec_vi, handler_len);
+		memcpy(b, vec_start, handler_len);
 #ifdef CONFIG_MIPS_MT_SMTC
 		BUG_ON(n > 7);	/* Vector index %d exceeds SMTC maximum. */
 
@@ -1437,6 +1443,10 @@ void __init trap_init(void)
 	extern char except_vec3_generic, except_vec3_r4000;
 	extern char except_vec4;
 	unsigned long i;
+	int rollback;
+
+	check_wait();
+	rollback = (cpu_wait == r4k_wait);
 
 	if (cpu_has_veic || cpu_has_vint)
 		ebase = (unsigned long) alloc_bootmem_low_pages(0x200 + VECTORSPACING*64);
@@ -1496,7 +1506,7 @@ void __init trap_init(void)
 	if (board_be_init)
 		board_be_init();
 
-	set_except_vector(0, handle_int);
+	set_except_vector(0, rollback ? rollback_handle_int : handle_int);
 	set_except_vector(1, handle_tlbm);
 	set_except_vector(2, handle_tlbl);
 	set_except_vector(3, handle_tlbs);

From ralf@linux-mips.org Sun Nov 11 21:31:29 2007
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On Sun, Nov 11, 2007 at 03:33:02PM +0100, Thomas Bogendoerfer wrote:

> I tried to get a working 64bit kernel for SNI RM. Most of things
> to fix were quite obvious, but there is one thing, which I haven't
> understood yet.
> 
> The firmware is only able to boot ELF32 images, which mean I need to
> use BOOT_ELF32.
> 
> RM machines have 256MB memory mapped to KSEG0, anything else is outside.
> To me that would mean I need to use the default spaces from
> mach-generic/spaces.h. A kernel built that way will hang after calling
> schedule() in rest_init() (init/main.c). Has anybody seen this
> as well ?

No.

schedule() doesn't directly depend on very much else working so I get the
feeling that your problem may be quite far away.

> Before digging into schedule() I decided to try mach-ip22/spaces.h
> and limit the installed memory to 256MB. This kernel boots and
> runs fine.
> 
> Then I booted that kernel with all memory (512MB) and it died, when
> init had troubles mapping libc. That result didn't surprise me
> that much, since the kernel probably tried to map memory > 256MB
> via CKSEG0, which won't work. Correct ?

You should keep all memory mapped in the same kernel segment.  Since
you have too much to do that in CKSEG0 it will have to be XKPHYS which
means the generic spaces.h which will be used when you have none in
in mach-rm200/space.h.

I suspect what happens is the kernel is trying to access memory at above
phys. 512MB.  In your setup it would compute a CKSEG1 address for that
and stomp over something it better shouldn't ...

  Ralf

From tsbogend@alpha.franken.de Mon Nov 12 08:36:01 2007
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On Sun, Nov 11, 2007 at 09:31:28PM +0000, Ralf Baechle wrote:
> On Sun, Nov 11, 2007 at 03:33:02PM +0100, Thomas Bogendoerfer wrote:
> 
> > I tried to get a working 64bit kernel for SNI RM. Most of things
> > to fix were quite obvious, but there is one thing, which I haven't
> > understood yet.
> > 
> > The firmware is only able to boot ELF32 images, which mean I need to
> > use BOOT_ELF32.
> > 
> > RM machines have 256MB memory mapped to KSEG0, anything else is outside.
> > To me that would mean I need to use the default spaces from
> > mach-generic/spaces.h. A kernel built that way will hang after calling
> > schedule() in rest_init() (init/main.c). Has anybody seen this
> > as well ?
> 
> No.
> 
> schedule() doesn't directly depend on very much else working so I get the
> feeling that your problem may be quite far away.

well it depends on getting a kernel thread started. And I guess there
lies the problem.

Maybe I need to ask more precisely what I want to know: Should a
kernel linked to CSKEG0 with a CAC_BASE 0x980000000000 work or is 
this setup "wrong" ? If the answer is yes, I'd say there is still
a bug left. If no how do we solve the issue of having a 32bit firmware
and a kernel linked for XPHYS (using some sort of bootloader is not
want I want to have, if it's avoidable) ?

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea.                                                [ RFC1925, 2.3 ]

From ralf@linux-mips.org Mon Nov 12 10:45:16 2007
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On Mon, Nov 12, 2007 at 09:32:42AM +0100, Thomas Bogendoerfer wrote:

> > schedule() doesn't directly depend on very much else working so I get the
> > feeling that your problem may be quite far away.
> 
> well it depends on getting a kernel thread started. And I guess there
> lies the problem.
> 
> Maybe I need to ask more precisely what I want to know: Should a
> kernel linked to CSKEG0 with a CAC_BASE 0x980000000000 work or is 
> this setup "wrong" ? If the answer is yes, I'd say there is still
> a bug left. If no how do we solve the issue of having a 32bit firmware
> and a kernel linked for XPHYS (using some sort of bootloader is not
> want I want to have, if it's avoidable) ?

Typically systems try to put the kernel into CKSEG0 as long as the given
platform happens to have memory mapped there.  Using CKSEG0 allows using
a shorter sequence to load the address of an in-kernel symbol resulting
in a much smaller kernel binary.

One implication of this is that kernel modules will have to be allocated
to CKSEG2/3 because they're built using the same code model.  Modules
are allocated using vmalloc so the vmalloc space needs to be in
CKSEG2/3.  Most people don't care if that space is restricted to just
one gig.

But even if you get that wrong the expected failure mode is different ...

  Ralf

From markus.gothe@27m.se Mon Nov 12 13:57:39 2007
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-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA256

Which graphics option? A 'hinv -v' would be appreciated.

//Markus

Martin Michlmayr wrote:
> Anyone interested?
>
> * Martin Michlmayr <tbm@cyrius.com> [2007-11-05 15:12]:
>> If anyone is interested in an Indigo 2 located in Cologne,
>> Germany, please let me know.
>>
>>> I would like to donate the MIPS porters an SGI Indigo 2
>>> R4K@250Mhz. Fully working, keyboard/mouse/monitor included, but
>>> no IRIX.
>>>
>>> The machine is located in Cologne/Germany - pickup preferred...
>>>
>> -- Martin Michlmayr http://www.cyrius.com/
>>
>>
>> -- To UNSUBSCRIBE, email to debian-mips-REQUEST@lists.debian.org
>> with a subject of "unsubscribe". Trouble? Contact
>> listmaster@lists.debian.org
>


- --
_______________________________________

Mr Markus Gothe
Software Engineer

Phone: +46 (0)13 21 81 20 (ext. 1046)
Fax: +46 (0)13 21 21 15
Mobile: +46 (0)73 718 72 80
Diskettgatan 11, SE-583 35 LinkÃ¶ping, Sweden
www.27m.com
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From macro@linux-mips.org Mon Nov 12 17:31:34 2007
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From:	"Maciej W. Rozycki" <macro@linux-mips.org>
To:	Ralf Baechle <ralf@linux-mips.org>
cc:	linux-mips@linux-mips.org
Subject: [PATCH] arch/mips/Makefile: Fix canonical system names
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 The GNU `config.guess' uses "linux-gnu" as the canonical system name.  
Fix the list of compiler prefixes checked to spell it correctly.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
---
 I am assuming the current names are a result of a typo and that the extra 
spaces used here are for readability, so I have not removed them.

 Please apply.

  Maciej

patch-mips-2.6.23-20071023-mips-linux-gnu-0
diff -up --recursive --new-file linux-mips-2.6.23-20071023.macro/arch/mips/Makefile linux-mips-2.6.23-20071023/arch/mips/Makefile
--- linux-mips-2.6.23-20071023.macro/arch/mips/Makefile	2007-10-23 04:57:23.000000000 +0000
+++ linux-mips-2.6.23-20071023/arch/mips/Makefile	2007-11-11 19:04:39.000000000 +0000
@@ -44,7 +44,7 @@ endif
 
 ifneq ($(SUBARCH),$(ARCH))
   ifeq ($(CROSS_COMPILE),)
-    CROSS_COMPILE := $(call cc-cross-prefix, $(tool-archpref)-linux-  $(tool-archpref)-gnu-linux-  $(tool-archpref)-unknown-gnu-linux-)
+    CROSS_COMPILE := $(call cc-cross-prefix, $(tool-archpref)-linux-  $(tool-archpref)-linux-gnu-  $(tool-archpref)-unknown-linux-gnu-)
   endif
 endif
 

From macro@linux-mips.org Mon Nov 12 17:33:30 2007
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s/achknowledge/acknowledge

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
---
 While at fixing typos...

 Please apply.

  Maciej

patch-mips-2.6.23-20071023-sni-pcimt-typo-0
diff -up --recursive --new-file linux-mips-2.6.23-20071023.macro/arch/mips/sni/pcimt.c linux-mips-2.6.23-20071023/arch/mips/sni/pcimt.c
--- linux-mips-2.6.23-20071023.macro/arch/mips/sni/pcimt.c	2007-10-23 04:57:23.000000000 +0000
+++ linux-mips-2.6.23-20071023/arch/mips/sni/pcimt.c	2007-11-11 23:20:26.000000000 +0000
@@ -244,7 +244,7 @@ static void pcimt_hwint1(void)
 	if (pend & IT_EISA) {
 		int irq;
 		/*
-		 * Note: ASIC PCI's builtin interrupt achknowledge feature is
+		 * Note: ASIC PCI's builtin interrupt acknowledge feature is
 		 * broken.  Using it may result in loss of some or all i8259
 		 * interrupts, so don't use PCIMT_INT_ACKNOWLEDGE ...
 		 */

From ralf@linux-mips.org Mon Nov 12 18:21:51 2007
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On Mon, Nov 12, 2007 at 05:30:52PM +0000, Maciej W. Rozycki wrote:

>  The GNU `config.guess' uses "linux-gnu" as the canonical system name.  
> Fix the list of compiler prefixes checked to spell it correctly.
> 
> Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>

Applied, thanks.

  Ralf

From ralf@linux-mips.org Mon Nov 12 18:22:58 2007
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On Mon, Nov 12, 2007 at 05:32:48PM +0000, Maciej W. Rozycki wrote:

Applied as well.

Thanks,

  Ralf

From tsbogend@alpha.franken.de Mon Nov 12 22:31:20 2007
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On Mon, Nov 12, 2007 at 10:44:23AM +0000, Ralf Baechle wrote:
> But even if you get that wrong the expected failure mode is different ...

Ralf and me had an debug session on IRC and I finally figured out
what caused the problem: CONFIG_EARLY_PRINTK via prom calls.

I simply used call_o32.S from the decstation part and missed the
fact, that it simply uses the normal kernel stack when calling
firmware. This works quite good until the first kernel thread
gets scheduled, which has a kernel stack via a CAC_BASE address.
So after switching stack the next call to prom_putchar() killed the
machine. Simply disabling EARLY_PRINTK gives me a working 64bit
kernel, which sees the whole 512MB RAM :-)

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea.                                                [ RFC1925, 2.3 ]

From ddaney@avtrex.com Tue Nov 13 07:53:31 2007
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Subject: Cannot unwind through MIPS signal frames with ICACHE_REFILLS_WORKAROUND_WAR
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With the current kernel (2.6.23.1) in my R5000 based O2 it seems 
impossible for GCC's exception unwinding machinery to unwind through 
signal frames.  The cause of the problems is the 
ICACHE_REFILLS_WORKAROUND_WAR which puts the sigcontext at an almost 
impossible to determine offset from the signal return trampoline.  The 
unwinder depends on being able to find the sigcontext given a known 
location of the trampoline.

It seems there are a couple of possible solutions:

1) The comments in war.h indicate the problem only exists in R7000 and 
E9000 processors.  We could turn off the workaround if the kernel is 
configured for R5000.  That would help me, but not those with the 
effected systems.

2) In the non-workaround case, the siginfo immediately follows the 
trampoline and the first member is the signal number.  For the 
workaround case the first word following the trampoline is zero.  We 
could replace this with the offset to the sigcontext which is always a 
small negative value.  The unwinder could then distinguish the two cases 
(signal numbers are positive and the offset negative).  If we did this, 
the change would have to be coordinated with GCC's unwinder (in 
libgcc_s.so.1).

Thoughts?

David Daney

From tbm@cyrius.com Tue Nov 13 08:21:24 2007
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To:	Markus Gothe <markus.gothe@27m.se>
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Subject: Re: [SPAM] Re: Donation of an Indigo 2 R4K@250
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* Markus Gothe <markus.gothe@27m.se> [2007-11-12 14:56]:
> Which graphics option? A 'hinv -v' would be appreciated.

I've asked the donor.
-- 
Martin Michlmayr
http://www.cyrius.com/

From aph@littlepinkcloud.COM Tue Nov 13 11:49:27 2007
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	Richard Sandiford <rsandifo@nildram.co.uk>, gcc@gcc.gnu.org
Subject: Re: Cannot unwind through MIPS signal frames with ICACHE_REFILLS_WORKAROUND_WAR
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David Daney writes:
 > With the current kernel (2.6.23.1) in my R5000 based O2 it seems 
 > impossible for GCC's exception unwinding machinery to unwind through 
 > signal frames.  The cause of the problems is the 
 > ICACHE_REFILLS_WORKAROUND_WAR which puts the sigcontext at an almost 
 > impossible to determine offset from the signal return trampoline.  The 
 > unwinder depends on being able to find the sigcontext given a known 
 > location of the trampoline.
 > 
 > It seems there are a couple of possible solutions:
 > 
 > 1) The comments in war.h indicate the problem only exists in R7000
 > and E9000 processors.  We could turn off the workaround if the
 > kernel is configured for R5000.  That would help me, but not those
 > with the effected systems.
 > 
 > 2) In the non-workaround case, the siginfo immediately follows the
 > trampoline and the first member is the signal number.  For the
 > workaround case the first word following the trampoline is zero.
 > We could replace this with the offset to the sigcontext which is
 > always a small negative value.  The unwinder could then distinguish
 > the two cases (signal numbers are positive and the offset
 > negative).  If we did this, the change would have to be coordinated
 > with GCC's unwinder (in libgcc_s.so.1).
 > 
 > Thoughts?

The best solution is to put the unwinder info in the kernel.  Does
MIPS use a vDSO ?

Andrew.

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From:	"Maciej W. Rozycki" <macro@linux-mips.org>
To:	Thomas Bogendoerfer <tsbogend@alpha.franken.de>
cc:	Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
Subject: Re: problem with 64bit kernel, BOOT_ELF32 and memory outside CKSEG0
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On Mon, 12 Nov 2007, Thomas Bogendoerfer wrote:

> I simply used call_o32.S from the decstation part and missed the
> fact, that it simply uses the normal kernel stack when calling
> firmware. This works quite good until the first kernel thread
> gets scheduled, which has a kernel stack via a CAC_BASE address.

 You could do stack switching in call_o32() -- I just figured there was no 
point in adding this complication as the DECstation always runs from KSEG0 
-- it has the maximum of 480MB of RAM mapped linearly starting from 0.

  Maciej

From ralf@linux-mips.org Tue Nov 13 12:12:59 2007
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From:	Ralf Baechle <ralf@linux-mips.org>
To:	Andrew Haley <aph-gcc@littlepinkcloud.COM>
Cc:	David Daney <ddaney@avtrex.com>, linux-mips@linux-mips.org,
	Richard Sandiford <rsandifo@nildram.co.uk>, gcc@gcc.gnu.org
Subject: Re: Cannot unwind through MIPS signal frames with
	ICACHE_REFILLS_WORKAROUND_WAR
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On Tue, Nov 13, 2007 at 11:48:53AM +0000, Andrew Haley wrote:

> David Daney writes:
>  > With the current kernel (2.6.23.1) in my R5000 based O2 it seems 
>  > impossible for GCC's exception unwinding machinery to unwind through 
>  > signal frames.  The cause of the problems is the 
>  > ICACHE_REFILLS_WORKAROUND_WAR which puts the sigcontext at an almost 
>  > impossible to determine offset from the signal return trampoline.  The 
>  > unwinder depends on being able to find the sigcontext given a known 
>  > location of the trampoline.
>  > 
>  > It seems there are a couple of possible solutions:
>  > 
>  > 1) The comments in war.h indicate the problem only exists in R7000
>  > and E9000 processors.  We could turn off the workaround if the
>  > kernel is configured for R5000.  That would help me, but not those
>  > with the effected systems.
>  > 
>  > 2) In the non-workaround case, the siginfo immediately follows the
>  > trampoline and the first member is the signal number.  For the
>  > workaround case the first word following the trampoline is zero.
>  > We could replace this with the offset to the sigcontext which is
>  > always a small negative value.  The unwinder could then distinguish
>  > the two cases (signal numbers are positive and the offset
>  > negative).  If we did this, the change would have to be coordinated
>  > with GCC's unwinder (in libgcc_s.so.1).
>  > 
>  > Thoughts?
> 
> The best solution is to put the unwinder info in the kernel.  Does
> MIPS use a vDSO ?

No though we should.

Another reason is to get rid of the classic trampoline the kernel installs
on the stack.  On some multiprocessor systems it requires a cacheflush
operation to be performed on all processors which is expensive.  Having
the trampoline in a vDSO would solve that.

I need to look into it, not sure what it would take.

  Ralf

From vagabon.xyz@gmail.com Tue Nov 13 13:15:09 2007
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Date:	Tue, 13 Nov 2007 14:14:58 +0100
From:	"Franck Bui-Huu" <vagabon.xyz@gmail.com>
To:	"Ralf Baechle" <ralf@linux-mips.org>
Subject: Re: Cannot unwind through MIPS signal frames with ICACHE_REFILLS_WORKAROUND_WAR
Cc:	"Andrew Haley" <aph-gcc@littlepinkcloud.com>,
	"David Daney" <ddaney@avtrex.com>, linux-mips@linux-mips.org,
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On Nov 13, 2007 1:10 PM, Ralf Baechle <ralf@linux-mips.org> wrote:
>
> On Tue, Nov 13, 2007 at 11:48:53AM +0000, Andrew Haley wrote:
>
> > David Daney writes:
> >  > With the current kernel (2.6.23.1) in my R5000 based O2 it seems
> >  > impossible for GCC's exception unwinding machinery to unwind through
> >  > signal frames.  The cause of the problems is the
> >  > ICACHE_REFILLS_WORKAROUND_WAR which puts the sigcontext at an almost
> >  > impossible to determine offset from the signal return trampoline.  The
> >  > unwinder depends on being able to find the sigcontext given a known
> >  > location of the trampoline.
> >  >
> >  > It seems there are a couple of possible solutions:
> >  >
> >  > 1) The comments in war.h indicate the problem only exists in R7000
> >  > and E9000 processors.  We could turn off the workaround if the
> >  > kernel is configured for R5000.  That would help me, but not those
> >  > with the effected systems.
> >  >
> >  > 2) In the non-workaround case, the siginfo immediately follows the
> >  > trampoline and the first member is the signal number.  For the
> >  > workaround case the first word following the trampoline is zero.
> >  > We could replace this with the offset to the sigcontext which is
> >  > always a small negative value.  The unwinder could then distinguish
> >  > the two cases (signal numbers are positive and the offset
> >  > negative).  If we did this, the change would have to be coordinated
> >  > with GCC's unwinder (in libgcc_s.so.1).
> >  >
> >  > Thoughts?
> >
> > The best solution is to put the unwinder info in the kernel.  Does
> > MIPS use a vDSO ?
>
> No though we should.
>
> Another reason is to get rid of the classic trampoline the kernel installs
> on the stack.  On some multiprocessor systems it requires a cacheflush
> operation to be performed on all processors which is expensive.  Having
> the trampoline in a vDSO would solve that.
>

And the stack wouldn't need to have exec permission anymore.

> I need to look into it, not sure what it would take.
>

I started to add vdso support for MIPS a couple months ago, but
it's in a very early stage and I unfortunately haven't time to finish
it. I can send it to you if you want.

-- 
               Franck

From ralf@linux-mips.org Tue Nov 13 14:03:42 2007
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From:	Ralf Baechle <ralf@linux-mips.org>
To:	Franck Bui-Huu <vagabon.xyz@gmail.com>
Cc:	Andrew Haley <aph-gcc@littlepinkcloud.com>,
	David Daney <ddaney@avtrex.com>, linux-mips@linux-mips.org,
	Richard Sandiford <rsandifo@nildram.co.uk>, gcc@gcc.gnu.org
Subject: Re: Cannot unwind through MIPS signal frames with
	ICACHE_REFILLS_WORKAROUND_WAR
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References: <473957B6.3030202@avtrex.com> <18233.36645.232058.964652@zebedee.pink> <20071113121036.GA6582@linux-mips.org> <cda58cb80711130514x16356ea3x4069616c9ee3caac@mail.gmail.com>
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On Tue, Nov 13, 2007 at 02:14:58PM +0100, Franck Bui-Huu wrote:

> > > David Daney writes:
> > >  > With the current kernel (2.6.23.1) in my R5000 based O2 it seems
> > >  > impossible for GCC's exception unwinding machinery to unwind through
> > >  > signal frames.  The cause of the problems is the
> > >  > ICACHE_REFILLS_WORKAROUND_WAR which puts the sigcontext at an almost
> > >  > impossible to determine offset from the signal return trampoline.  The
> > >  > unwinder depends on being able to find the sigcontext given a known
> > >  > location of the trampoline.
> > >  >
> > >  > It seems there are a couple of possible solutions:
> > >  >
> > >  > 1) The comments in war.h indicate the problem only exists in R7000
> > >  > and E9000 processors.  We could turn off the workaround if the
> > >  > kernel is configured for R5000.  That would help me, but not those
> > >  > with the effected systems.
> > >  >
> > >  > 2) In the non-workaround case, the siginfo immediately follows the
> > >  > trampoline and the first member is the signal number.  For the
> > >  > workaround case the first word following the trampoline is zero.
> > >  > We could replace this with the offset to the sigcontext which is
> > >  > always a small negative value.  The unwinder could then distinguish
> > >  > the two cases (signal numbers are positive and the offset
> > >  > negative).  If we did this, the change would have to be coordinated
> > >  > with GCC's unwinder (in libgcc_s.so.1).
> > >  >
> > >  > Thoughts?
> > >
> > > The best solution is to put the unwinder info in the kernel.  Does
> > > MIPS use a vDSO ?
> >
> > No though we should.
> >
> > Another reason is to get rid of the classic trampoline the kernel installs
> > on the stack.  On some multiprocessor systems it requires a cacheflush
> > operation to be performed on all processors which is expensive.  Having
> > the trampoline in a vDSO would solve that.
> >
> 
> And the stack wouldn't need to have exec permission anymore.

Oh?

extern void frob(void (*)(void));

int foo(void)
{
	int x;

	void bar(void)
	{
		x++;
	}

	frob(&bar);
	print("x is %d\n", x);
}

Compile and enjoy.

  Ralf

From vagabon.xyz@gmail.com Tue Nov 13 14:22:36 2007
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Date:	Tue, 13 Nov 2007 15:22:33 +0100
From:	"Franck Bui-Huu" <vagabon.xyz@gmail.com>
To:	"Ralf Baechle" <ralf@linux-mips.org>
Subject: Re: Cannot unwind through MIPS signal frames with ICACHE_REFILLS_WORKAROUND_WAR
Cc:	"Andrew Haley" <aph-gcc@littlepinkcloud.com>,
	"David Daney" <ddaney@avtrex.com>, linux-mips@linux-mips.org,
	"Richard Sandiford" <rsandifo@nildram.co.uk>, gcc@gcc.gnu.org
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On Nov 13, 2007 3:00 PM, Ralf Baechle <ralf@linux-mips.org> wrote:
>
> On Tue, Nov 13, 2007 at 02:14:58PM +0100, Franck Bui-Huu wrote:
>
> > > > David Daney writes:
> > > >  > With the current kernel (2.6.23.1) in my R5000 based O2 it seems
> > > >  > impossible for GCC's exception unwinding machinery to unwind through
> > > >  > signal frames.  The cause of the problems is the
> > > >  > ICACHE_REFILLS_WORKAROUND_WAR which puts the sigcontext at an almost
> > > >  > impossible to determine offset from the signal return trampoline.  The
> > > >  > unwinder depends on being able to find the sigcontext given a known
> > > >  > location of the trampoline.
> > > >  >
> > > >  > It seems there are a couple of possible solutions:
> > > >  >
> > > >  > 1) The comments in war.h indicate the problem only exists in R7000
> > > >  > and E9000 processors.  We could turn off the workaround if the
> > > >  > kernel is configured for R5000.  That would help me, but not those
> > > >  > with the effected systems.
> > > >  >
> > > >  > 2) In the non-workaround case, the siginfo immediately follows the
> > > >  > trampoline and the first member is the signal number.  For the
> > > >  > workaround case the first word following the trampoline is zero.
> > > >  > We could replace this with the offset to the sigcontext which is
> > > >  > always a small negative value.  The unwinder could then distinguish
> > > >  > the two cases (signal numbers are positive and the offset
> > > >  > negative).  If we did this, the change would have to be coordinated
> > > >  > with GCC's unwinder (in libgcc_s.so.1).
> > > >  >
> > > >  > Thoughts?
> > > >
> > > > The best solution is to put the unwinder info in the kernel.  Does
> > > > MIPS use a vDSO ?
> > >
> > > No though we should.
> > >
> > > Another reason is to get rid of the classic trampoline the kernel installs
> > > on the stack.  On some multiprocessor systems it requires a cacheflush
> > > operation to be performed on all processors which is expensive.  Having
> > > the trampoline in a vDSO would solve that.
> > >
> >
> > And the stack wouldn't need to have exec permission anymore.
>
> Oh?
>
> extern void frob(void (*)(void));
>
> int foo(void)
> {
>         int x;
>
>         void bar(void)
>         {
>                 x++;
>         }
>
>         frob(&bar);
>         print("x is %d\n", x);
> }
>
> Compile and enjoy.
>

Sorry Ralf, I missed your point.

-- 
               Franck

From kevink@mips.com Tue Nov 13 14:46:57 2007
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From:	"Kevin D. Kissell" <kevink@mips.com>
To:	"Franck Bui-Huu" <vagabon.xyz@gmail.com>,
	"Ralf Baechle" <ralf@linux-mips.org>
Cc:	"Andrew Haley" <aph-gcc@littlepinkcloud.com>,
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References: <473957B6.3030202@avtrex.com> <18233.36645.232058.964652@zebedee.pink> <20071113121036.GA6582@linux-mips.org> <cda58cb80711130514x16356ea3x4069616c9ee3caac@mail.gmail.com>
Subject: Re: Cannot unwind through MIPS signal frames with ICACHE_REFILLS_WORKAROUND_WAR
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Franck a dit:
> > Another reason is to get rid of the classic trampoline the kernel installs
> > on the stack.  On some multiprocessor systems it requires a cacheflush
> > operation to be performed on all processors which is expensive.  Having
> > the trampoline in a vDSO would solve that.
> >
> 
> And the stack wouldn't need to have exec permission anymore.

True, though it should perhaps be noted that currently it's only on 4KSc/Sd
systems (which I know you work on) where it's even possible for the stack
*not* to have exec permissions, since the classical MIPS MMU gives
execute permission to any page that is readable.

            Regards,

            Kevin K.

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From:	"Franck Bui-Huu" <vagabon.xyz@gmail.com>
To:	"Kevin D. Kissell" <kevink@mips.com>
Subject: Re: Cannot unwind through MIPS signal frames with ICACHE_REFILLS_WORKAROUND_WAR
Cc:	"Ralf Baechle" <ralf@linux-mips.org>,
	"Andrew Haley" <aph-gcc@littlepinkcloud.com>,
	"David Daney" <ddaney@avtrex.com>, linux-mips@linux-mips.org,
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On Nov 13, 2007 3:37 PM, Kevin D. Kissell <kevink@mips.com> wrote:
> Franck a dit:
> > > Another reason is to get rid of the classic trampoline the kernel installs
> > > on the stack.  On some multiprocessor systems it requires a cacheflush
> > > operation to be performed on all processors which is expensive.  Having
> > > the trampoline in a vDSO would solve that.
> > >
> >
> > And the stack wouldn't need to have exec permission anymore.
>
> True, though it should perhaps be noted that currently it's only on 4KSc/Sd
> systems (which I know you work on) where it's even possible for the stack
> *not* to have exec permissions, since the classical MIPS MMU gives
> execute permission to any page that is readable.
>

Well, the noexec stack is pretty usefull I think. I can't believe it
will be limited to these 2 systems in the near future...

-- 
               Franck

From ralf@linux-mips.org Tue Nov 13 15:04:50 2007
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From:	Ralf Baechle <ralf@linux-mips.org>
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	David Daney <ddaney@avtrex.com>, linux-mips@linux-mips.org,
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Subject: Re: Cannot unwind through MIPS signal frames with
	ICACHE_REFILLS_WORKAROUND_WAR
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References: <473957B6.3030202@avtrex.com> <18233.36645.232058.964652@zebedee.pink> <20071113121036.GA6582@linux-mips.org> <cda58cb80711130514x16356ea3x4069616c9ee3caac@mail.gmail.com> <20071113140036.GA7650@linux-mips.org> <cda58cb80711130622u7ef77870iae407f7c8054e9da@mail.gmail.com>
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On Tue, Nov 13, 2007 at 03:22:33PM +0100, Franck Bui-Huu wrote:

> > > And the stack wouldn't need to have exec permission anymore.
> >
> > Oh?
> >
> > extern void frob(void (*)(void));
> >
> > int foo(void)
> > {
> >         int x;
> >
> >         void bar(void)
> >         {
> >                 x++;
> >         }
> >
> >         frob(&bar);
> >         print("x is %d\n", x);
> > }
> >
> > Compile and enjoy.
> >
> 
> Sorry Ralf, I missed your point.

This piece of code compiles to something that copies a trampoline to the
stack.  The address of that trampoline is what is then passed as argument
to frob().

Old versions of glibc were probable the most notorious users of trampolines.
Objective C also generates them.  Since a cacheflush that is a syscall is
required performance is less than great.

Which means the libc() cacheflush() function is another candidate for a
vDSO, it can be optimized by using SYNCI on some configurations.

  Ralf

From ralf@linux-mips.org Tue Nov 13 15:11:37 2007
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From:	Ralf Baechle <ralf@linux-mips.org>
To:	"Kevin D. Kissell" <kevink@mips.com>
Cc:	Franck Bui-Huu <vagabon.xyz@gmail.com>,
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	David Daney <ddaney@avtrex.com>, linux-mips@linux-mips.org,
	Richard Sandiford <rsandifo@nildram.co.uk>, gcc@gcc.gnu.org
Subject: Re: Cannot unwind through MIPS signal frames with
	ICACHE_REFILLS_WORKAROUND_WAR
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References: <473957B6.3030202@avtrex.com> <18233.36645.232058.964652@zebedee.pink> <20071113121036.GA6582@linux-mips.org> <cda58cb80711130514x16356ea3x4069616c9ee3caac@mail.gmail.com> <019e01c82602$f5463bf0$10eca8c0@grendel>
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On Tue, Nov 13, 2007 at 03:37:39PM +0100, Kevin D. Kissell wrote:

> True, though it should perhaps be noted that currently it's only on 4KSc/Sd
> systems (which I know you work on) where it's even possible for the stack
> *not* to have exec permissions, since the classical MIPS MMU gives
> execute permission to any page that is readable.

Disabling PROT_EXEC on a mapping tells the kernel it doesn't need to take
care of I-cache coherency.  So it's somewhat beneficial even in absence of
a protection bit in the actual TLB hardware.

Some of these performance optimizations are impossible because the kernel
can't have definate knowledge that certain addresses have never entered the
I-cache.

  Ralf

From ddaney@avtrex.com Tue Nov 13 16:13:00 2007
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Subject: Re: Cannot unwind through MIPS signal frames with ICACHE_REFILLS_WORKAROUND_WAR
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David Daney wrote:
> With the current kernel (2.6.23.1) in my R5000 based O2 it seems 
> impossible for GCC's exception unwinding machinery to unwind through 
> signal frames.  The cause of the problems is the 
> ICACHE_REFILLS_WORKAROUND_WAR which puts the sigcontext at an almost 
> impossible to determine offset from the signal return trampoline.  The 
> unwinder depends on being able to find the sigcontext given a known 
> location of the trampoline.
>
> It seems there are a couple of possible solutions:
>
> 1) The comments in war.h indicate the problem only exists in R7000 and 
> E9000 processors.  We could turn off the workaround if the kernel is 
> configured for R5000.  That would help me, but not those with the 
> effected systems.
>
> 2) In the non-workaround case, the siginfo immediately follows the 
> trampoline and the first member is the signal number.  For the 
> workaround case the first word following the trampoline is zero.  We 
> could replace this with the offset to the sigcontext which is always a 
> small negative value.  The unwinder could then distinguish the two 
> cases (signal numbers are positive and the offset negative).  If we 
> did this, the change would have to be coordinated with GCC's unwinder 
> (in libgcc_s.so.1).
>
I think I have found a solution that doesn't require kernel changes.

The CFA (i.e. the stack pointer of the signal handler) of the the 
context when calling mips_fallback_frame_state is at a constant offset 
from the sigcontext.  I can just use the CFA instead of the trampoline's 
address.

Does this seem plausible?

Thanks,
David Daney

From vagabon.xyz@gmail.com Tue Nov 13 21:29:13 2007
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Date:	Tue, 13 Nov 2007 22:26:51 +0100
From:	Franck Bui-Huu <vagabon.xyz@gmail.com>
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To:	Ralf Baechle <ralf@linux-mips.org>
CC:	linux-mips@linux-mips.org
Subject: VDSO on mips (was Re: Cannot unwind through MIPS signal frames with
 ICACHE_REFILLS_WORKAROUND_WAR)
References: <473957B6.3030202@avtrex.com>	 <18233.36645.232058.964652@zebedee.pink>	 <20071113121036.GA6582@linux-mips.org> <cda58cb80711130514x16356ea3x4069616c9ee3caac@mail.gmail.com>
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Franck Bui-Huu wrote:
> 
> I started to add vdso support for MIPS a couple months ago, but
> it's in a very early stage and I unfortunately haven't time to finish
> it. I can send it to you if you want.
> 

Here it is. As I said it far from complete but it might help.

		Franck

--- 8< ---

diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 2fd96d9..01d700c 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -6,11 +6,13 @@ extra-y		:= head.o init_task.o vmlinux.lds
 
 obj-y		+= cpu-probe.o branch.o entry.o genex.o irq.o process.o \
 		   ptrace.o reset.o semaphore.o setup.o signal.o syscall.o \
-		   time.o topology.o traps.o unaligned.o
+		   time.o topology.o traps.o unaligned.o vdso.o
 
 binfmt_irix-objs	:= irixelf.o irixinv.o irixioctl.o irixsig.o	\
 			   irix5sys.o sysirix.o
 
+obj-$(CONFIG_32BIT)		+= vdso32/
+
 obj-$(CONFIG_STACKTRACE)	+= stacktrace.o
 obj-$(CONFIG_MODULES)		+= mips_ksyms.o module.o
 
diff --git a/arch/mips/kernel/vdso.c b/arch/mips/kernel/vdso.c
new file mode 100644
index 0000000..281b7ce
--- /dev/null
+++ b/arch/mips/kernel/vdso.c
@@ -0,0 +1,52 @@
+#include <linux/init.h>
+
+typedef struct {
+        unsigned long id;
+        unsigned long vdso_base;
+} mm_context_t;
+
+
+static int vdso_enabled __read_mostly = 1;
+
+static int __init vdso_setup(char *s)
+{
+	vdso_enabled = simple_strtol(s, NULL, 0);
+	return 1;
+}
+__setup("vdso=", vdso_setup);
+
+
+int arch_setup_additional_pages(struct linux_binprm *bprm, int exec_stack)
+{
+	struct mm_struct *mm = current->mm;
+	unsigned long vdso_pages;
+	unsigned long vdso_base;
+	int rv;
+
+	if (!vdso_enabled)
+		return 0;
+
+	down_write(&mm->mmap_sem);
+
+	rv = get_unmapped_area(NULL, vdso_base, vdso_pages << PAGE_SHIFT, 0, 0);
+	if (IS_ERR_VALUE(rv))
+		goto out;
+	vdso_base = rv;
+
+	rv = install_special_mapping(mm, vdso_base, vdso_pages << PAGE_SHIFT,
+				     VM_READ|VM_EXEC|
+				     VM_MAYREAD|VM_MAYWRITE|VM_MAYEXEC|
+				     VM_ALWAYSDUMP,
+				     vdso_pagelist);
+	if (rv)
+		goto out;
+out:
+	up_write(&mm->mmap_sem);
+	return rv;
+}
+
+static int __init vdso_init(void)
+{
+        return 0;
+}
+arch_initcall(vdso_init);
diff --git a/arch/mips/kernel/vdso32/.gitignore b/arch/mips/kernel/vdso32/.gitignore
new file mode 100644
index 0000000..e45fba9
--- /dev/null
+++ b/arch/mips/kernel/vdso32/.gitignore
@@ -0,0 +1 @@
+vdso32.lds
diff --git a/arch/mips/kernel/vdso32/Makefile b/arch/mips/kernel/vdso32/Makefile
new file mode 100644
index 0000000..b1ea645
--- /dev/null
+++ b/arch/mips/kernel/vdso32/Makefile
@@ -0,0 +1,35 @@
+# List of files in the vdso
+obj-vdso32 = sigtramp.o
+
+# Build rules
+targets := $(obj-vdso32) vdso32.so
+obj-vdso32 := $(addprefix $(obj)/, $(obj-vdso32))
+
+
+EXTRA_CFLAGS := -shared -s -fno-common -fno-builtin
+EXTRA_CFLAGS += -nostdlib -Wl,-soname=linux-vdso32.so.1
+EXTRA_CFLAGS +=	$(call ld-option, -Wl$(comma)--hash-style=sysv)
+
+EXTRA_AFLAGS := -D__VDSO32__ -s
+
+obj-y += vdso32.o
+extra-y += vdso32.lds
+CPPFLAGS_vdso32.lds += -P -C -U$(ARCH)
+
+# kbuild does not track this dependency due to usage of .incbin
+$(obj)/vdso32.o : $(obj)/vdso32.so
+
+# link rule for the .so file, .lds has to be first
+$(obj)/vdso32.so: $(src)/vdso32.lds $(obj-vdso32)
+	$(call if_changed,vdso32ld)
+
+# assembly rules for the .S files
+$(obj-vdso32): %.o: %.S
+	$(call if_changed_dep,vdso32as)
+
+# actual build commands
+quiet_cmd_vdso32ld = VDSO32_LD $@
+      cmd_vdso32ld = $(CC) $(c_flags) -Wl,-T $^ -o $@
+quiet_cmd_vdso32as = VDSO32_AS $@
+      cmd_vdso32as = $(CC) $(a_flags) -c -o $@ $<
+
diff --git a/arch/mips/kernel/vdso32/sigtramp.S b/arch/mips/kernel/vdso32/sigtramp.S
new file mode 100644
index 0000000..4f83203
--- /dev/null
+++ b/arch/mips/kernel/vdso32/sigtramp.S
@@ -0,0 +1,13 @@
+#include <asm/asm.h>
+#include <asm/regdef.h>
+#include <asm/unistd.h>
+
+LEAF(__kernel_sigtramp_32)
+	li	v0, __NR_sigreturn
+	syscall
+END(__kernel_sigtramp_32)
+
+LEAF(__kernel_sigtramp_rt32)
+	li	v0, __NR_rt_sigreturn
+	syscall
+END(__kernel_sigtramp_rt32)
diff --git a/arch/mips/kernel/vdso32/vdso32.S b/arch/mips/kernel/vdso32/vdso32.S
new file mode 100644
index 0000000..9548930
--- /dev/null
+++ b/arch/mips/kernel/vdso32/vdso32.S
@@ -0,0 +1,11 @@
+#include <linux/init.h>
+
+__INITDATA
+
+	.globl vdso32_start
+	.globl vdso32_end
+vdso32_start:
+	.incbin "arch/mips/kernel/vdso32/vdso32.so"
+vdso32_end:
+
+__FINIT
diff --git a/arch/mips/kernel/vdso32/vdso32.lds.S b/arch/mips/kernel/vdso32/vdso32.lds.S
new file mode 100644
index 0000000..250a03d
--- /dev/null
+++ b/arch/mips/kernel/vdso32/vdso32.lds.S
@@ -0,0 +1,73 @@
+/*
+ * Linker script for vsyscall DSO.  The vsyscall page is an ELF shared
+ * object prelinked to its virtual address, and with only one read-only
+ * segment (that fits in one page).  This script controls its layout.
+ */
+#include <asm/asm-offsets.h>
+
+/* Default link addresses for the vDSOs */
+#define VDSO32_LBASE	0x100000
+#define VDSO64_LBASE	0x100000
+
+/* Default map addresses */
+#define VDSO32_MBASE	VDSO32_LBASE
+#define VDSO64_MBASE	VDSO64_LBASE
+
+OUTPUT_ARCH(mips)
+ENTRY(__kernel_sigtramp_32);
+
+SECTIONS
+{
+  . = VDSO32_LBASE + SIZEOF_HEADERS;
+
+  .hash           : { *(.hash) }		:text
+  .gnu.hash       : { *(.gnu.hash) }
+  .dynsym         : { *(.dynsym) }
+  .dynstr         : { *(.dynstr) }
+  .gnu.version    : { *(.gnu.version) }
+  .gnu.version_d  : { *(.gnu.version_d) }
+  .gnu.version_r  : { *(.gnu.version_r) }
+
+  . = ALIGN(16);
+
+  .text           : { *(.text) }		:text
+  .note           : { *(.note.*) }		:text :note
+  .eh_frame_hdr   : { *(.eh_frame_hdr) }	:text :eh_frame_hdr
+  .eh_frame       : { KEEP (*(.eh_frame)) }	:text
+
+  .dynamic        : { *(.dynamic) }		:text :dynamic
+  .got            : { *(.got) }
+  .plt            : { *(.plt) }
+
+  /DISCARD/       : {
+	*(.got.plt) *(.got)
+	*(.data .data.* .gnu.linkonce.d.*)
+	*(.dynbss)
+	*(.bss .bss.* .gnu.linkonce.b.*)
+  }						:text
+}
+
+/*
+ * We must supply the ELF program headers explicitly to get just one
+ * PT_LOAD segment, and set the flags explicitly to make segments read-only.
+ */
+PHDRS
+{
+  text PT_LOAD FILEHDR PHDRS FLAGS(5);	/* PF_R|PF_X */
+  dynamic PT_DYNAMIC FLAGS(4);		/* PF_R */
+  note PT_NOTE FLAGS(4);		/* PF_R */
+  eh_frame_hdr 0x6474e550; /* PT_GNU_EH_FRAME, but ld doesn't match the name */
+}
+
+/*
+ * This controls what symbols we export from the DSO.
+ */
+VERSION
+{
+  LINUX_2.6.24 {
+    global:
+	__kernel_sigtramp_32;
+	__kernel_sigtramp_rt32;
+    local: *;
+  };
+}

From pinskia@gmail.com Tue Nov 13 22:12:05 2007
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Date:	Tue, 13 Nov 2007 14:11:52 -0800
From:	"Andrew Pinski" <pinskia@gmail.com>
To:	"Ralf Baechle" <ralf@linux-mips.org>
Subject: Re: Cannot unwind through MIPS signal frames with ICACHE_REFILLS_WORKAROUND_WAR
Cc:	"Franck Bui-Huu" <vagabon.xyz@gmail.com>,
	"Andrew Haley" <aph-gcc@littlepinkcloud.com>,
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On 11/13/07, Ralf Baechle <ralf@linux-mips.org> wrote:
> Old versions of glibc were probable the most notorious users of trampolines.
> Objective C also generates them.  Since a cacheflush that is a syscall is
> required performance is less than great.

No Objective-C does not generate them.  Objective-C returns the exact
function pointer back.  Now libffi generates trampolines.

-- Pinski

From kevink@mips.com Tue Nov 13 22:57:33 2007
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From:	"Kevin D. Kissell" <kevink@mips.com>
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Subject: Re: Cannot unwind through MIPS signal frames withICACHE_REFILLS_WORKAROUND_WAR
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> > True, though it should perhaps be noted that currently it's only on 4KSc/Sd
> > systems (which I know you work on) where it's even possible for the stack
> > *not* to have exec permissions, since the classical MIPS MMU gives
> > execute permission to any page that is readable.
> 
> Disabling PROT_EXEC on a mapping tells the kernel it doesn't need to take
> care of I-cache coherency.  So it's somewhat beneficial even in absence of
> a protection bit in the actual TLB hardware.

That depends on just what the consequences of I-cache incoherence might be.
Without help from the MMU, the kernel cannot *know* that a given location
isn't in the I-cache, because a program can always compute a pointer-to-function
to an arbitrary address and dereference it successfully so long as the location
is readable.  If it's only the user who does this that will suffer as a result of
I-cache incoherence, one can argue that it serves him right.  But if it can screw
up the execution of the kernel, or other user processes, I think we have to 
assume the worst.

> Some of these performance optimizations are impossible because the kernel
> can't have definate knowledge that certain addresses have never entered the
> I-cache.

Sad but true.

            Regards,

            Kevin K.

From david.kuk@entone.com Wed Nov 14 04:26:51 2007
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Date:	Wed, 14 Nov 2007 12:00:28 +0800
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Hi all

I am a new guy for both linux and mips, may i ask questions here ??


THX

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Hi David,

On Wed, Nov 14, 2007 at 12:00:28PM +0800, David Kuk wrote:
> I am a new guy for both linux and mips, may i ask questions here ??

If your question is Linux kernel and MIPS related, go ahead! You
don't need to ask if you may ask a question, just fire it up!

If it is more user-land related in the sense of how can I unpack
a tarball or the like, you might wander of to some other places
like http://www.linuxquestions.org/.

As a general rule of thumb; look at the small description of a
list on a page like:
http://www.linux-mips.org/wiki/Net_Resources#Mailing_lists
and see what kind of questions other people ask on the list
archive: http://www.linux-mips.org/archives/
This is true not only for the linux-mips community, but for the
rest too. Good luck!


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From vagabon.xyz@gmail.com Wed Nov 14 08:26:46 2007
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Date:	Wed, 14 Nov 2007 09:24:22 +0100
From:	Franck Bui-Huu <vagabon.xyz@gmail.com>
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To:	Thiemo Seufer <ths@networkno.de>
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	linux-mips <linux-mips@linux-mips.org>
Subject: Re: [PATCH] Introduce __fill_user() and kill __bzero()
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Thiemo Seufer wrote:
> Franck Bui-Huu wrote:
>>  /*
>> - * memset(void *s, int c, size_t n)
>> + * An outline version of memset, which should be used either by gcc or
>> + * by assembly code.
>> + */
>> +NESTED(memset, 24, ra)
>> +	PTR_ADDU	sp, sp, -24
>> +	LONG_S		a0, 16(sp)
>> +	LONG_S		ra, 20(sp)
>> +	jal		__fill_user
>> +	LONG_L		v0, 16(sp)
>> +	LONG_L		ra, 20(sp)
>> +	PTR_ADDU	sp, sp, 24
>> +	jr		ra
>> +END(memset)
> 
> This will break on 64bit kernels.
> 

Is the following correct ?

NESTED(memset, 16, ra)
        PTR_ADDU        sp, sp, -16
        LONG_S          a0,  8(sp)
        LONG_S          ra, 16(sp)
        jal             __fill_user
        LONG_L          v0,  8(sp)
        LONG_L          ra, 16(sp)
        PTR_ADDU        sp, sp, 16
        jr              ra
END(memset)

I know it doesn't respect any mips ABI but in this case do
we really care ?

thanks.

		Franck

From david.kuk@entone.com Wed Nov 14 08:45:09 2007
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After study about the memory configuration of sigma smp8634, i found 
some difficult to accomplish the task.

so my question is if have two 128MB ram separately under dram0 and dram1 
controller, where dram0 for linux and dram1 for video decoding. Now the 
situation is the memory for linux is not enough and video decoding can 
not use all of it's 128MB at dram1, what we plan to do is to share 64MB 
at dram1 to the linux kernel as high memory, and only reserved 64MB at 
dram1 for the video decoding.

first, in MIPS architecture, we found that the kseg0 and kseg1 are 
mapped to 0x00000000-0x20000000, which include only dram0 controller, so 
we wish to add the dram1 memory manually to the kernel using function 
add_memory_region at setup.c , after booting up result the warning that 
the memory larger than 512 need to configured the kernel support high 
memory.

then when we configure the kernel to support high memory at menu 
configure, the kernel when booting up will remind us our CPU do not 
support high memory due to cache aliases.

Both way will lead the linux can not boot up normally, so what should we 
do, is there any mis-understanding about the hardware implementation or 
MIPS design? \



From ralf@linux-mips.org Wed Nov 14 11:11:30 2007
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From:	Ralf Baechle <ralf@linux-mips.org>
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Subject: Re: smp8634 add memory at dram1
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On Wed, Nov 14, 2007 at 04:44:27PM +0800, David Kuk wrote:

> After study about the memory configuration of sigma smp8634, i found 
> some difficult to accomplish the task.
> 
> so my question is if have two 128MB ram separately under dram0 and dram1 
> controller, where dram0 for linux and dram1 for video decoding. Now the 
> situation is the memory for linux is not enough and video decoding can 
> not use all of it's 128MB at dram1, what we plan to do is to share 64MB 
> at dram1 to the linux kernel as high memory, and only reserved 64MB at 
> dram1 for the video decoding.
> 
> first, in MIPS architecture, we found that the kseg0 and kseg1 are 
> mapped to 0x00000000-0x20000000, which include only dram0 controller, so 
> we wish to add the dram1 memory manually to the kernel using function 
> add_memory_region at setup.c , after booting up result the warning that 
> the memory larger than 512 need to configured the kernel support high 
> memory.
> 
> then when we configure the kernel to support high memory at menu 
> configure, the kernel when booting up will remind us our CPU do not 
> support high memory due to cache aliases.

This is really a software restriction.  I originally developped highmem for
MIPS on a Sibyte SB1250 which doesn't suffer from aliases so I didn't even
attempt to solve the cache aliasing issue.  The other platforms on whic
highmem used to be used was the E9000 family but it seem by now the users
of these platforms have all moved to full 64-bit kernels, so aside fo the
implementation restrictions has also started to bitrot a little.

What would be necessary to get it to work is to flush the page from cache at
kunmap() rsp.  kunmap_atomic() time.  That should do the trick though there
are significant further optimizations possible.

An alterantive to solve the aliasing issue would be to increase the
page size to 16K.  Again, the combination of highmem and 16K pages is
untested.

I don't know what processor core Sigma is using in this SOC.  In case its a
64-bit core, don't waste even a nanosecond on highmem, just go for a 64-bit
kernel, it's much less painful than highmem.

  Ralf

From ths@networkno.de Wed Nov 14 11:58:15 2007
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From:	Thiemo Seufer <ths@networkno.de>
To:	Franck Bui-Huu <vagabon.xyz@gmail.com>
Cc:	Ralf Baechle <ralf@linux-mips.org>,
	linux-mips <linux-mips@linux-mips.org>
Subject: Re: [PATCH] Introduce __fill_user() and kill __bzero()
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Franck Bui-Huu wrote:
> Thiemo Seufer wrote:
> > Franck Bui-Huu wrote:
> >>  /*
> >> - * memset(void *s, int c, size_t n)
> >> + * An outline version of memset, which should be used either by gcc or
> >> + * by assembly code.
> >> + */
> >> +NESTED(memset, 24, ra)
> >> +	PTR_ADDU	sp, sp, -24
> >> +	LONG_S		a0, 16(sp)
> >> +	LONG_S		ra, 20(sp)
> >> +	jal		__fill_user
> >> +	LONG_L		v0, 16(sp)
> >> +	LONG_L		ra, 20(sp)
> >> +	PTR_ADDU	sp, sp, 24
> >> +	jr		ra
> >> +END(memset)
> > 
> > This will break on 64bit kernels.
> > 
> 
> Is the following correct ?
> 
> NESTED(memset, 16, ra)
>         PTR_ADDU        sp, sp, -16
>         LONG_S          a0,  8(sp)
>         LONG_S          ra, 16(sp)
>         jal             __fill_user
>         LONG_L          v0,  8(sp)
>         LONG_L          ra, 16(sp)
>         PTR_ADDU        sp, sp, 16
>         jr              ra
> END(memset)
> 
> I know it doesn't respect any mips ABI but in this case do
> we really care ?

In general we do (think of stack unwinding etc.).  I believe this
implementation should move to C, as it doesn't need an assembler
implementation:

void *memset (void *s, int c, kernel_size_t n)
{
	__fill_user(s, c, n);
	return s;
}

It looks much nicer that way. :-)


Thiemo

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From:	Franck Bui-Huu <vagabon.xyz@gmail.com>
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Thiemo Seufer wrote:
> In general we do (think of stack unwinding etc.).  I believe this
> implementation should move to C, as it doesn't need an assembler
> implementation:
> 
> void *memset (void *s, int c, kernel_size_t n)
> {
> 	__fill_user(s, c, n);
> 	return s;
> }
> 
> It looks much nicer that way. :-)
> 

Sure but memset.S was a really good place to implement memset(), wasn't
it ?

And since the implementation should have been trivial, I thought it was
ok to implement in assembly.

Ok, I'll look for another place.

Thanks,
		Franck

From david@pixelmagicsystems.com Wed Nov 14 12:37:49 2007
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Quoting Ralf Baechle <ralf@linux-mips.org>:

>
> I don't know what processor core Sigma is using in this SOC.  In case its a
> 64-bit core, don't waste even a nanosecond on highmem, just go for a 64-bit
> kernel, it's much less painful than highmem.
>
>   Ralf
>
>

It is a MIPS 4KEc core.


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From:	Thiemo Seufer <ths@networkno.de>
To:	Franck Bui-Huu <vagabon.xyz@gmail.com>
Cc:	Ralf Baechle <ralf@linux-mips.org>,
	linux-mips <linux-mips@linux-mips.org>
Subject: Re: [PATCH] Introduce __fill_user() and kill __bzero()
Message-ID: <20071114134840.GN8363@networkno.de>
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Franck Bui-Huu wrote:
> Thiemo Seufer wrote:
> > In general we do (think of stack unwinding etc.).  I believe this
> > implementation should move to C, as it doesn't need an assembler
> > implementation:
> > 
> > void *memset (void *s, int c, kernel_size_t n)
> > {
> > 	__fill_user(s, c, n);
> > 	return s;
> > }
> > 
> > It looks much nicer that way. :-)
> > 
> 
> Sure but memset.S was a really good place to implement memset(), wasn't
> it ?

What about using memset.c and fill_user.S ?

> And since the implementation should have been trivial,

As you found out now, nothing is trivial in assembler. :-)

> I thought it was ok to implement in assembly.

As a general rule, assembly should only be used when C doesn't cut it.


Thiemo

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Date:	Wed, 14 Nov 2007 16:13:50 +0100
From:	"Franck Bui-Huu" <vagabon.xyz@gmail.com>
To:	"Thiemo Seufer" <ths@networkno.de>
Subject: Re: [PATCH] Introduce __fill_user() and kill __bzero()
Cc:	"Ralf Baechle" <ralf@linux-mips.org>,
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On Nov 14, 2007 2:48 PM, Thiemo Seufer <ths@networkno.de> wrote:
> What about using memset.c and fill_user.S ?
>

Quite frankly, I don't know if we could create memset.c and put inside
a function of 2 lines. And I don't think we're going to add some stuff in
it later.

What about implementing fill_user() in C ?

-- 
               Franck

From ddaney@avtrex.com Wed Nov 14 16:10:12 2007
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David Kuk wrote:
> After study about the memory configuration of sigma smp8634, i found 
> some difficult to accomplish the task.
>
> so my question is if have two 128MB ram separately under dram0 and 
> dram1 controller, where dram0 for linux and dram1 for video decoding. 
> Now the situation is the memory for linux is not enough and video 
> decoding can not use all of it's 128MB at dram1, what we plan to do is 
> to share 64MB at dram1 to the linux kernel as high memory, and only 
> reserved 64MB at dram1 for the video decoding.
>
> first, in MIPS architecture, we found that the kseg0 and kseg1 are 
> mapped to 0x00000000-0x20000000, which include only dram0 controller, 
> so we wish to add the dram1 memory manually to the kernel using 
> function add_memory_region at setup.c , after booting up result the 
> warning that the memory larger than 512 need to configured the kernel 
> support high memory.
>
> then when we configure the kernel to support high memory at menu 
> configure, the kernel when booting up will remind us our CPU do not 
> support high memory due to cache aliases.
>
> Both way will lead the linux can not boot up normally, so what should 
> we do, is there any mis-understanding about the hardware 
> implementation or MIPS design?

I think your understanding of the 8634 is at least close to correct.

It may be possible (but I have not tried it yet) to use the remapping
registers to move dram1 into the first 512MB of the memory space.  If it
is possible, you would then have to modify the gbus access functions
accordingly.  Also the 8634 media drivers would probably have to be
changed as well.  I am not sure about the microcode for the media DSPs,
but if it is dependent on the mapping of the DRAM, then you would
probably have to get the vendor's help.

Let me know if you are successful.

Thanks,
David Daney


From lists@nabble.com Wed Nov 14 20:41:05 2007
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From:	Jiju George T <jijuktm@gmail.com>
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See Chapter 8 of
http://www.cs.unibo.it/~solmi/teaching/arch_2002-2003/AssemblyLanguageProgDoc.pdf

Regards,
Jiju


Hyon Lim wrote:
> 
> I investigated kernel assembly source code in my kernel (2.6.10).
> I found that there are a lot of assembly directives (e.g., .align, .set
> reorder, .cpload, .frame etc.).
> Is there any documents which explains those directives? (not only I
> described above. All of directives)
> 
> -- 
> Hyon Lim (ìž„í˜„)
> Mobile. 010-8212-1240 (Intl' Call : +82-10-8212-1240)
> Fax. 032-232-0578 (Intl' Available)
> Homepage : http://www.alexlab.net
> Blog : http://www.alexlab.net/blog
> 
> 

-- 
View this message in context: http://www.nabble.com/MIPS-assembly-directives-in-GCC-tf4731041.html#a13755803
Sent from the linux-mips main mailing list archive at Nabble.com.


From kaz@zeugmasystems.com Wed Nov 14 23:20:11 2007
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Subject: "exportfs -a" -> stale NFS filehandle
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Hi all,

I have an NFS problem on a multi-node MIPS system running kernel
2.6.17.7. NFS utils is 1.1.0. ABI is n32.

One node (call it primary) exports a directory which is mounted by
several others (the secondaries) as their root filesystem.

If I run "exportfs -a" on the primary, the secondary nodes lose their
root filesystem and so everything stops working.

I turned on all NFS debugging on a secondary node (sysctl -w
sunrpc.nfs_debug=65535). What is happening is that NFS operations
suddenly start returning error -151 (stale NFS filehandle).

I don't see exportfs causing this problem on other systems. If I run
"exportfs -a" on a big NFS server (Fedora Core 5, i686) which has lots
of diskless clients, nothing bad happens. (And some of those diskless
clients are MIPS systems just like this one!)

I'm pretty sure that exportfs -a shouldn't screw up the existing mounted
clients.

Could there be some ABI problem that corrupts up the effect of the
re-exporting operation on the server?

(This issure reproduces always. Something which reproduces rarely is a
kernel crash on a secondary node, inside the nfsd process, also
apparently in response to the "exportfs -a". I don't yet have enough
information about that one, such as a call trace, etc. That one I can
drill into, if I have a program counter and call stack.)







From ralf@linux-mips.org Thu Nov 15 00:49:24 2007
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From:	Ralf Baechle <ralf@linux-mips.org>
To:	Kaz Kylheku <kaz@zeugmasystems.com>
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Subject: Re: "exportfs -a" -> stale NFS filehandle
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On Wed, Nov 14, 2007 at 03:19:43PM -0800, Kaz Kylheku wrote:

> I have an NFS problem on a multi-node MIPS system running kernel
> 2.6.17.7. NFS utils is 1.1.0. ABI is n32.
> 
> One node (call it primary) exports a directory which is mounted by
> several others (the secondaries) as their root filesystem.
> 
> If I run "exportfs -a" on the primary, the secondary nodes lose their
> root filesystem and so everything stops working.
> 
> I turned on all NFS debugging on a secondary node (sysctl -w
> sunrpc.nfs_debug=65535). What is happening is that NFS operations
> suddenly start returning error -151 (stale NFS filehandle).
> 
> I don't see exportfs causing this problem on other systems. If I run
> "exportfs -a" on a big NFS server (Fedora Core 5, i686) which has lots
> of diskless clients, nothing bad happens. (And some of those diskless
> clients are MIPS systems just like this one!)
> 
> I'm pretty sure that exportfs -a shouldn't screw up the existing mounted
> clients.
> 
> Could there be some ABI problem that corrupts up the effect of the
> re-exporting operation on the server?

Can you test below patch?

  Ralf

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 118be24..01993ec 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -293,7 +293,7 @@ EXPORT(sysn32_call_table)
 	PTR	sys_ni_syscall			/* 6170, was get_kernel_syms */
 	PTR	sys_ni_syscall			/* was query_module */
 	PTR	sys_quotactl
-	PTR	sys_nfsservctl
+	PTR	compat_sys_nfsservctl
 	PTR	sys_ni_syscall			/* res. for getpmsg */
 	PTR	sys_ni_syscall			/* 6175  for putpmsg */
 	PTR	sys_ni_syscall			/* res. for afs_syscall */

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Ralf Baechle wrote:
> Another reason is to get rid of the classic trampoline the kernel installs
> on the stack.  On some multiprocessor systems it requires a cacheflush

BTW, could we get rid of the trampoline so easily ? I mean won't we have
to keep it for backward compatibility reasons ?

		Franck

From marcus.gustafsson@motorola.com Thu Nov 15 10:51:38 2007
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Subject: RE: smp8634 add memory at dram1
Date:	Thu, 15 Nov 2007 10:49:23 -0000
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David Daney wrote
> I think your understanding of the 8634 is at least close to correct.
> 
> It may be possible (but I have not tried it yet) to use the 
> remapping registers to move dram1 into the first 512MB of the 
> memory space.  If it is possible, you would then have to 
> modify the gbus access functions accordingly.  Also the 8634 
> media drivers would probably have to be changed as well.  I 
> am not sure about the microcode for the media DSPs, but if it 
> is dependent on the mapping of the DRAM, then you would 
> probably have to get the vendor's help.
> 
> Let me know if you are successful.
AFAIK the memory bandwith available is not enough for supporting video
decoding and Linux usage at the same dram controller.

/Marcus Gustafsson

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On Thu, Nov 15, 2007 at 09:46:25AM +0100, Franck Bui-Huu wrote:

> Ralf Baechle wrote:
> > Another reason is to get rid of the classic trampoline the kernel installs
> > on the stack.  On some multiprocessor systems it requires a cacheflush
> 
> BTW, could we get rid of the trampoline so easily ? I mean won't we have
> to keep it for backward compatibility reasons ?

The trampolines are an implementation detail.  Little software needs to
know about it, so while I expect some slight colateral damage from getting
rid of trampolines it's not going to be painful.  GDB is the primary piece
of software that will need to change.

Some of the other architectures have an sa_restorer field in struct
sigaction but we don't have that on MIPS.

One way to deal with this would be to do a similar as IRIX where the
sigaction(2) takes a 4th argument which takes the role of sa_restorer.
For backward compatibility an SA_RESTORER field.  So if the SA_RESTORER
is clear we'd be using a classic trampoline, if it's set the value of
the 4th argument.

Or slightly crazier, put a kernel address into the $ra register of the
invoked signal handler.  So the signal handler will cause an address
error exception which then can be trapped.  Additional advantage - some of
the "Don't let your children do this ..." sections of code can go away ;-)

  Ralf

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Date:	Thu, 15 Nov 2007 17:21:31 +0100
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Subject: [PATCH] Introduce __fill_user() and kill __bzero() [take #2]
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Currently memset() is used to fill a user space area (clear_user) or
kernel one (memset). These two functions don't have the same
prototype, the former returning the number of bytes not copied and the
latter returning the start address of the area to clear. This forces
memset() to actually returns two values in an unconventional way ie
the number of bytes not copied is given by $a2. Therefore clear_user()
needs to call memset() using inline assembly.

Instead this patch creates __fill_user() which is the same as memset()
except it always returns the number of bytes not copied. This simplify
clear_user() and makes its definition saner.

Also an out of line version of memset is given because gcc generates
some calls to it since builtin functions have been disabled. It allows
assembly code to call it too.

Eventually __bzero() has been removed because it's not part of the
Linux uaccess API. And the nano-optimization it brings is not
worthing.

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
---

 Thimeo,

 I put the out of line version of memset in kernel/mips_ksym.c. I
 haven't found a better place. But if you really think we should
 create a lib/memset.c and rename lib/memset.S into lib/fill_user.S, I
 can change it.

 Thanks,
		Franck

 arch/mips/kernel/mips_ksyms.c |   13 +++++++++++--
 arch/mips/lib/csum_partial.S  |    2 +-
 arch/mips/lib/memcpy.S        |    2 +-
 arch/mips/lib/memset.S        |   34 +++++++++++++++++-----------------
 include/asm-mips/string.h     |    7 ++++++-
 include/asm-mips/uaccess.h    |   17 +++--------------
 6 files changed, 39 insertions(+), 36 deletions(-)

diff --git a/arch/mips/kernel/mips_ksyms.c b/arch/mips/kernel/mips_ksyms.c
index 225755d..091275e 100644
--- a/arch/mips/kernel/mips_ksyms.c
+++ b/arch/mips/kernel/mips_ksyms.c
@@ -14,7 +14,6 @@
 #include <asm/pgtable.h>
 #include <asm/uaccess.h>
 
-extern void *__bzero(void *__s, size_t __count);
 extern long __strncpy_from_user_nocheck_asm(char *__to,
                                             const char *__from, long __len);
 extern long __strncpy_from_user_asm(char *__to, const char *__from,
@@ -36,9 +35,9 @@ EXPORT_SYMBOL(kernel_thread);
 /*
  * Userspace access stuff.
  */
+EXPORT_SYMBOL(__fill_user);
 EXPORT_SYMBOL(__copy_user);
 EXPORT_SYMBOL(__copy_user_inatomic);
-EXPORT_SYMBOL(__bzero);
 EXPORT_SYMBOL(__strncpy_from_user_nocheck_asm);
 EXPORT_SYMBOL(__strncpy_from_user_asm);
 EXPORT_SYMBOL(__strlen_user_nocheck_asm);
@@ -51,3 +50,13 @@ EXPORT_SYMBOL(csum_partial_copy_nocheck);
 EXPORT_SYMBOL(__csum_partial_copy_user);
 
 EXPORT_SYMBOL(invalid_pte_table);
+
+/*
+ * An outline version of memset, which should be used either by gcc or
+ * by assembly code.
+ */
+void *memset(void *s, int c, __kernel_size_t len)
+{
+	__fill_user(s, c, len);
+	return s;
+}
diff --git a/arch/mips/lib/csum_partial.S b/arch/mips/lib/csum_partial.S
index c0a77fe..8d3fa1e 100644
--- a/arch/mips/lib/csum_partial.S
+++ b/arch/mips/lib/csum_partial.S
@@ -694,7 +694,7 @@ l_exc:
 	ADD	dst, t0			# compute start address in a1
 	SUB	dst, src
 	/*
-	 * Clear len bytes starting at dst.  Can't call __bzero because it
+	 * Clear len bytes starting at dst.  Can't call memset because it
 	 * might modify len.  An inefficient loop for these rare times...
 	 */
 	beqz	len, done
diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S
index a526c62..425f2c3 100644
--- a/arch/mips/lib/memcpy.S
+++ b/arch/mips/lib/memcpy.S
@@ -443,7 +443,7 @@ l_exc:
 	ADD	dst, t0			# compute start address in a1
 	SUB	dst, src
 	/*
-	 * Clear len bytes starting at dst.  Can't call __bzero because it
+	 * Clear len bytes starting at dst.  Can't call memset because it
 	 * might modify len.  An inefficient loop for these rare times...
 	 */
 	beqz	len, done
diff --git a/arch/mips/lib/memset.S b/arch/mips/lib/memset.S
index 3f8b8b3..4329811 100644
--- a/arch/mips/lib/memset.S
+++ b/arch/mips/lib/memset.S
@@ -46,17 +46,19 @@
 	.endm
 
 /*
- * memset(void *s, int c, size_t n)
+ * __kernel_size_t __fill_user(void __user *s, long c, __kernel_size_t n)
  *
  * a0: start of area to clear
  * a1: char to fill with
  * a2: size of area to clear
+ *
+ * Returns the number of bytes NOT set or 0 on success.
  */
 	.set	noreorder
 	.align	5
-LEAF(memset)
+LEAF(__fill_user)
 	beqz		a1, 1f
-	 move		v0, a0			/* result */
+	 move		v0, zero		/* result */
 
 	andi		a1, 0xff		/* spread fillword */
 	LONG_SLL		t1, a1, 8
@@ -68,8 +70,6 @@ LEAF(memset)
 #endif
 	or		a1, t1
 1:
-
-FEXPORT(__bzero)
 	sltiu		t0, a2, LONGSIZE	/* very small region? */
 	bnez		t0, small_memset
 	 andi		t0, a0, LONGMASK	/* aligned? */
@@ -127,7 +127,7 @@ memset_partial:
 	EX(LONG_S_L, a1, -1(a0), last_fixup)
 #endif
 1:	jr		ra
-	 move		a2, zero
+	 nop
 
 small_memset:
 	beqz		a2, 2f
@@ -138,29 +138,29 @@ small_memset:
 	 sb		a1, -1(a0)
 
 2:	jr		ra			/* done */
-	 move		a2, zero
-	END(memset)
+	 nop
+END(__fill_user)
 
 first_fixup:
-	jr	ra
-	 nop
+	jr		ra
+	 move		v0, a2
 
 fwd_fixup:
 	PTR_L		t0, TI_TASK($28)
 	LONG_L		t0, THREAD_BUADDR(t0)
-	andi		a2, 0x3f
-	LONG_ADDU	a2, t1
+	andi		v0, a2, 0x3f
+	LONG_ADDU	v0, t1
 	jr		ra
-	 LONG_SUBU	a2, t0
+	 LONG_SUBU	v0, t0
 
 partial_fixup:
 	PTR_L		t0, TI_TASK($28)
 	LONG_L		t0, THREAD_BUADDR(t0)
-	andi		a2, LONGMASK
-	LONG_ADDU	a2, t1
+	andi		v0, a2, LONGMASK
+	LONG_ADDU	v0, t1
 	jr		ra
-	 LONG_SUBU	a2, t0
+	 LONG_SUBU	v0, t0
 
 last_fixup:
 	jr		ra
-	 andi		v1, a2, LONGMASK
+	 andi		v0, a2, LONGMASK
diff --git a/include/asm-mips/string.h b/include/asm-mips/string.h
index 436e3ad..2bba927 100644
--- a/include/asm-mips/string.h
+++ b/include/asm-mips/string.h
@@ -10,6 +10,7 @@
 #ifndef _ASM_STRING_H
 #define _ASM_STRING_H
 
+#include <asm/uaccess.h>	/* __fill_user() */
 
 /*
  * Most of the inline functions are rather naive implementations so I just
@@ -132,7 +133,11 @@ strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count)
 #endif /* CONFIG_32BIT */
 
 #define __HAVE_ARCH_MEMSET
-extern void *memset(void *__s, int __c, size_t __count);
+extern inline void *memset(void *s, int c, size_t count)
+{
+	__fill_user(s, c, count);
+	return s;
+}
 
 #define __HAVE_ARCH_MEMCPY
 extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h
index c30c718..8c0d226 100644
--- a/include/asm-mips/uaccess.h
+++ b/include/asm-mips/uaccess.h
@@ -11,7 +11,6 @@
 
 #include <linux/kernel.h>
 #include <linux/errno.h>
-#include <linux/thread_info.h>
 #include <asm-generic/uaccess.h>
 
 /*
@@ -633,23 +632,13 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);
  * Returns number of bytes that could not be cleared.
  * On success, this will be zero.
  */
+extern __kernel_size_t __fill_user(void __user *s, long c, __kernel_size_t n);
+
 static inline __kernel_size_t
 __clear_user(void __user *addr, __kernel_size_t size)
 {
-	__kernel_size_t res;
-
 	might_sleep();
-	__asm__ __volatile__(
-		"move\t$4, %1\n\t"
-		"move\t$5, $0\n\t"
-		"move\t$6, %2\n\t"
-		__MODULE_JAL(__bzero)
-		"move\t%0, $6"
-		: "=r" (res)
-		: "r" (addr), "r" (size)
-		: "$4", "$5", "$6", __UA_t0, __UA_t1, "$31");
-
-	return res;
+	return __fill_user(addr, 0, size);
 }
 
 #define clear_user(addr,n)						\


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On Thu, 15 Nov 2007, Franck Bui-Huu wrote:
>  I put the out of line version of memset in kernel/mips_ksym.c. I
>  haven't found a better place. But if you really think we should
>  create a lib/memset.c and rename lib/memset.S into lib/fill_user.S, I
>  can change it.

kernel/mips_ksym.c is not a good place. Adrian `trivial' Bunk is
scanning arch/ for *_ksym.c files and moving the EXPORT_SYMBOL()s to the
source files they belong to.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

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Subject: Re: Cannot unwind through MIPS signal frames with	ICACHE_REFILLS_WORKAROUND_WAR
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Ralf Baechle wrote:
> On Thu, Nov 15, 2007 at 09:46:25AM +0100, Franck Bui-Huu wrote:
> 
>> Ralf Baechle wrote:
>>> Another reason is to get rid of the classic trampoline the kernel installs
>>> on the stack.  On some multiprocessor systems it requires a cacheflush
>> BTW, could we get rid of the trampoline so easily ? I mean won't we have
>> to keep it for backward compatibility reasons ?

There has to be some way for user code to unwind the call stack through 
signal handler frames.  For Linux/MIPS systems that use GCC as their 
system compiler, this is done by code in libgcc which is part of the GCC 
runtime.

Currently the unwinder examines the code at the signal handler return 
address and if it detects one of the several know trampoline code 
sequences, it makes assumptions about the way the kernel lays out the 
stack.  In particular, it assumes that there is a struct sigcontext at a 
  well known offset from the stack pointer at entry to the signal handler.

The code that handles this is in gcc/config/mips/linux-unwind.h

As of GCC-4.3 the location of the trampoline is unimportant, but the 
location of the sigcontext relative to the value in $sp is important and 
should not be changed unless there really is no other choice.


> 
> The trampolines are an implementation detail.  Little software needs to
> know about it, so while I expect some slight colateral damage from getting
> rid of trampolines it's not going to be painful.  GDB is the primary piece
> of software that will need to change.

And any user code that uses SIGSEGV to detect and handle dereferencing 
null pointers.

> 
> Some of the other architectures have an sa_restorer field in struct
> sigaction but we don't have that on MIPS.
> 
> One way to deal with this would be to do a similar as IRIX where the
> sigaction(2) takes a 4th argument which takes the role of sa_restorer.
> For backward compatibility an SA_RESTORER field.  So if the SA_RESTORER
> is clear we'd be using a classic trampoline, if it's set the value of
> the 4th argument.
> 
> Or slightly crazier, put a kernel address into the $ra register of the
> invoked signal handler.  So the signal handler will cause an address
> error exception which then can be trapped.  Additional advantage - some of
> the "Don't let your children do this ..." sections of code can go away ;-)

I am liking the idea of putting the trampoline code in the (as of yet 
non-existent vdso).  This eliminates the need to flush the icache, but 
maintains the ability of user code to unwind through signal frames.

Putting a .eh_frame section in the vdso would be even better as that 
would eliminate the need for libgcc to do code reading and let the 
kernel use any means desired to return from signal handlers.

David Daney

From kaz@zeugmasystems.com Thu Nov 15 18:38:44 2007
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Ralf Baechle wrote:
> Can you test below patch?
> 
>   Ralf

[ snip ]

> -	PTR	sys_nfsservctl
> +	PTR	compat_sys_nfsservctl

That's damn funny!

I checked for replies this morning, but your e-mail went to my inbox
rather than my linux-mips folder, so I didn't see it.

I just made that change just moments ago. 

As I'm compiling it, a coworker says, ``Kaz, did you see Ralph's
reply?''. :)

Nope!

From kaz@zeugmasystems.com Thu Nov 15 19:26:35 2007
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linux-mips-bounce@linux-mips.org wrote:
> Ralf Baechle wrote:
>> Can you test below patch?
>> 
>>   Ralf
> 
> [ snip ]
> 
>> -	PTR	sys_nfsservctl
>> +	PTR	compat_sys_nfsservctl
> 
> That's damn funny!

... but it doesn't work. Now the slave systems won't even boot at all.

  Looking up port of RPC 100003/2 on 127.3.0.1
  Root-NFS: Unable to get nfsd port number from server, using default
  Looking up port of RPC 100005/1 on 127.3.0.1
  Root-NFS: Server returned error -13 while mounting /cf2

Ah, but the reason for /that/ is that I have an n32 patch against
nfsutils in user space already, which has to be backed out.

After backing out the nfsutils patch, the diskless node does boot.

However, the original "exportfs -a" problem comes back!

So this problem is not resolved simply by using the correct compat
routine; it's deeper.

Sigh.

From andy.sharp@onstor.com Thu Nov 15 19:40:43 2007
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On Fri, 9 Nov 2007 09:07:57 +0000 Ralf Baechle <ralf@linux-mips.org>
wrote:

> On Thu, Nov 08, 2007 at 02:03:22PM -0800, Andrew Sharp wrote:
> 
> > The gdb from debian etch (6.4.90-debian) doesn't like core files
> > produced by 64-bit kernel it seems.  I've got this patch which seems
> > to do the job, but I'm unclear on what other implications it might
> > have, if any.
> 
> > diff --git a/arch/mips/kernel/binfmt_elfo32.c
> > b/arch/mips/kernel/binfmt_elfo32.c index 993f7ec..58533dc 100644
> > --- a/arch/mips/kernel/binfmt_elfo32.c
> > +++ b/arch/mips/kernel/binfmt_elfo32.c
> > @@ -54,9 +54,13 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
> >  
> >  #include <asm/processor.h>
> >  #include <linux/module.h>
> > -#include <linux/elfcore.h>
> >  #include <linux/compat.h>
> >  
> > +void elf32_core_copy_regs(elf_gregset_t grp, struct pt_regs *regs);
> > +#undef ELF_CORE_COPY_REGS
> > +#define ELF_CORE_COPY_REGS(_dest,_regs)
> > elf32_core_copy_regs(_dest,_regs); +#include <linux/elfcore.h>
> > +
> >  #define elf_prstatus elf_prstatus32
> >  struct elf_prstatus32
> >  {
> > @@ -109,9 +113,6 @@ jiffies_to_compat_timeval(unsigned long
> > jiffies, struct comp value->tv_usec = rem / NSEC_PER_USEC;
> >  }
> >  
> > -#undef ELF_CORE_COPY_REGS
> > -#define ELF_CORE_COPY_REGS(_dest,_regs)
> > elf32_core_copy_regs(_dest,_regs); -
> >  void elf32_core_copy_regs(elf_gregset_t grp, struct pt_regs *regs)
> >  {
> >         int i;
> 
> Looks like it's a larger change than needed.

Which change?  Both files?

> > diff --git a/include/asm-mips/reg.h b/include/asm-mips/reg.h
> > index 634b55d..b44b308 100644
> > --- a/include/asm-mips/reg.h
> > +++ b/include/asm-mips/reg.h
> > @@ -12,7 +12,7 @@
> >  #ifndef __ASM_MIPS_REG_H
> >  #define __ASM_MIPS_REG_H
> >  
> > -
> > +#define WANT_COMPAT_REG_H
> >  #if defined(CONFIG_32BIT) || defined(WANT_COMPAT_REG_H)
> >  
> >  #define EF_R0                  6
> > @@ -69,7 +69,7 @@
> >  
> >  #endif
> >  
> > -#ifdef CONFIG_64BIT
> > +#if defined(CONFIG_64BIT) && !defined(WANT_COMPAT_REG_H)
> >  
> >  #define EF_R0                   0
> >  #define EF_R1                   1
> 
> This change breaks the native 64-bit and N32 ptrace and core dumpers.
> 
> I suggest something more minimal like the below patch.  Does that one
> do the trick for you?
> 
>   Ralf
> 
> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
> 
>  arch/mips/kernel/ptrace32.c |    3 +++
>  1 files changed, 3 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c
> index 76818be..44109fb 100644
> --- a/arch/mips/kernel/ptrace32.c
> +++ b/arch/mips/kernel/ptrace32.c
> @@ -14,6 +14,9 @@
>   * At this time Linux/MIPS64 only supports syscall tracing, even for
> 32-bit
>   * binaries.
>   */
> +
> +#define WANT_COMPAT_REG_H
> +
>  #include <linux/compiler.h>
>  #include <linux/kernel.h>
>  #include <linux/sched.h>

Without the change to reg.h, this change causes a bunch of
  warning: "EF_R0" redefined
type messages when compiling ptrace32.c.  I tried a combination of mine
and yours, well, really mine except I moved the define for
WANT_COMPAT_REG_H to ptrace32.c, and that did not produce an comprehensible
core file.

Any suggestions?

Cheers,

a


From ralf@linux-mips.org Thu Nov 15 19:45:49 2007
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On Thu, Nov 15, 2007 at 11:26:06AM -0800, Kaz Kylheku wrote:

> After backing out the nfsutils patch, the diskless node does boot.
> 
> However, the original "exportfs -a" problem comes back!
> 
> So this problem is not resolved simply by using the correct compat
> routine; it's deeper.
> 
> Sigh.

Thanks for testing anyway!

  Ralf

From kaz@zeugmasystems.com Thu Nov 15 20:16:07 2007
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Ralf Baechle wrote:
> On Thu, Nov 15, 2007 at 11:26:06AM -0800, Kaz Kylheku wrote:
> 
>> After backing out the nfsutils patch, the diskless node does boot.
>> 
>> However, the original "exportfs -a" problem comes back!
>> 
>> So this problem is not resolved simply by using the correct compat
>> routine; it's deeper. 
>> 
>> Sigh.
> 
> Thanks for testing anyway!

I'm continuing to dig into the problem.

The export logic doesn't even go through nfsctl() anyway, which is why I
originally hadn't even suspected that syscall.

The nfsexport() function in nfsutils first tries opening
"/proc/net/rpc/nfsd.fh./channel". If that works, it uses that, via a
text-based protocol. Only if that interface doesn't exist does it fall
back on the nfsctl(NFSCTL_EXPORT, ...) interface.


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Date:	Thu, 15 Nov 2007 22:16:23 +0100
From:	Franck Bui-Huu <vagabon.xyz@gmail.com>
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To:	Geert Uytterhoeven <geert@linux-m68k.org>
CC:	Ralf Baechle <ralf@linux-mips.org>,
	Thiemo Seufer <ths@networkno.de>,
	linux-mips <linux-mips@linux-mips.org>
Subject: Re: [PATCH] Introduce __fill_user() and kill __bzero() [take #2]
References: <473C720B.7000100@gmail.com> <Pine.LNX.4.64.0711151744580.31039@anakin>
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Geert Uytterhoeven wrote:
> On Thu, 15 Nov 2007, Franck Bui-Huu wrote:
>>  I put the out of line version of memset in kernel/mips_ksym.c. I
>>  haven't found a better place. But if you really think we should
>>  create a lib/memset.c and rename lib/memset.S into lib/fill_user.S, I
>>  can change it.
> 
> kernel/mips_ksym.c is not a good place.

Sigh... thanks for spotting this.

So since I've no idea where I could put this function I'll follow
Thiemo's suggestion but instead of calling the new file lib/memset.c,
I'll use lib/string.c since we could move or implement other stuffs in
it.

Is it ok ?

		Franck

From geert@linux-m68k.org Thu Nov 15 22:09:13 2007
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On Thu, 15 Nov 2007, Franck Bui-Huu wrote:
> Geert Uytterhoeven wrote:
> > On Thu, 15 Nov 2007, Franck Bui-Huu wrote:
> >>  I put the out of line version of memset in kernel/mips_ksym.c. I
> >>  haven't found a better place. But if you really think we should
> >>  create a lib/memset.c and rename lib/memset.S into lib/fill_user.S, I
> >>  can change it.
> > 
> > kernel/mips_ksym.c is not a good place.
> 
> Sigh... thanks for spotting this.
> 
> So since I've no idea where I could put this function I'll follow
> Thiemo's suggestion but instead of calling the new file lib/memset.c,
> I'll use lib/string.c since we could move or implement other stuffs in
> it.
> 
> Is it ok ?

lib/string.c sounds fine to me. That's where m68k and s390 implement it
as well.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

From ralf@linux-mips.org Thu Nov 15 23:02:21 2007
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From:	Ralf Baechle <ralf@linux-mips.org>
To:	Kaz Kylheku <kaz@zeugmasystems.com>
Cc:	linux-mips@linux-mips.org
Subject: Re: "exportfs -a" -> stale NFS filehandle
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On Thu, Nov 15, 2007 at 12:15:39PM -0800, Kaz Kylheku wrote:

> Ralf Baechle wrote:
> > On Thu, Nov 15, 2007 at 11:26:06AM -0800, Kaz Kylheku wrote:
> > 
> >> After backing out the nfsutils patch, the diskless node does boot.
> >> 
> >> However, the original "exportfs -a" problem comes back!
> >> 
> >> So this problem is not resolved simply by using the correct compat
> >> routine; it's deeper. 
> >> 
> >> Sigh.
> > 
> > Thanks for testing anyway!
> 
> I'm continuing to dig into the problem.
> 
> The export logic doesn't even go through nfsctl() anyway, which is why I
> originally hadn't even suspected that syscall.
> 
> The nfsexport() function in nfsutils first tries opening
> "/proc/net/rpc/nfsd.fh./channel". If that works, it uses that, via a
> text-based protocol. Only if that interface doesn't exist does it fall
> back on the nfsctl(NFSCTL_EXPORT, ...) interface.

After checking that latest glibc still isn't trying to compensate for the
N32 nfsservctl issue in userland I've applied the patch I sent you earlier.

  Ralf

From fbuihuu@gmail.com Fri Nov 16 12:43:39 2007
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Date:	Fri, 16 Nov 2007 13:43:30 +0100
From:	Franck Bui-Huu <fbuihuu@gmail.com>
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	Geert Uytterhoeven <geert@linux-m68k.org>,
	linux-mips <linux-mips@linux-mips.org>
Subject: [PATCH] Introduce __fill_user() and kill __bzero() [take #3]
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Currently memset() is used to fill a user space area (clear_user) or
kernel one (memset). These two functions don't have the same
prototype, the former returning the number of bytes not copied and the
latter returning the start address of the area to clear. This forces
memset() to actually returns two values in an unconventional way ie
the number of bytes not copied is given by $a2. Therefore clear_user()
needs to call memset() using inline assembly.

Instead this patch creates __fill_user() which is the same as memset()
except it always returns the number of bytes not copied. This simplify
clear_user() and makes its definition saner. This patch also renames
memset.S into fill_user.S as suggested by Thiemo.

Also an out of line version of memset is given because gcc generates
some calls to it since builtin functions have been disabled. It allows
assembly code to call it too. It has been put into a new file called
string.c.

Eventually __bzero() has been removed because it's not part of the
Linux uaccess API. And the nano-optimization it brings is not
worthing.

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
---

 Ralf,

 Since you use git, this patch has been generated with rename detection
 enabled. It makes the review a lot easier.

 Please consider,

		Franck

 arch/mips/kernel/mips_ksyms.c           |    2 +-
 arch/mips/lib/Makefile                  |    4 +-
 arch/mips/lib/csum_partial.S            |    2 +-
 arch/mips/lib/{memset.S => fill_user.S} |   34 +++++++++++++++---------------
 arch/mips/lib/memcpy.S                  |    2 +-
 arch/mips/lib/string.c                  |   13 +++++++++++
 include/asm-mips/string.h               |    7 +++++-
 include/asm-mips/uaccess.h              |   17 ++------------
 8 files changed, 44 insertions(+), 37 deletions(-)
 rename arch/mips/lib/{memset.S => fill_user.S} (90%)
 create mode 100644 arch/mips/lib/string.c

diff --git a/arch/mips/kernel/mips_ksyms.c b/arch/mips/kernel/mips_ksyms.c
index 225755d..c7613d3 100644
--- a/arch/mips/kernel/mips_ksyms.c
+++ b/arch/mips/kernel/mips_ksyms.c
@@ -38,7 +38,7 @@ EXPORT_SYMBOL(kernel_thread);
  */
 EXPORT_SYMBOL(__copy_user);
 EXPORT_SYMBOL(__copy_user_inatomic);
-EXPORT_SYMBOL(__bzero);
+EXPORT_SYMBOL(__fill_user);
 EXPORT_SYMBOL(__strncpy_from_user_nocheck_asm);
 EXPORT_SYMBOL(__strncpy_from_user_asm);
 EXPORT_SYMBOL(__strlen_user_nocheck_asm);
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
index 8810dfb..1c3fea4 100644
--- a/arch/mips/lib/Makefile
+++ b/arch/mips/lib/Makefile
@@ -2,8 +2,8 @@
 # Makefile for MIPS-specific library files..
 #
 
-lib-y	+= csum_partial.o memcpy.o memcpy-inatomic.o memset.o strlen_user.o \
-	   strncpy_user.o strnlen_user.o uncached.o
+lib-y	+= csum_partial.o fill_user.o memcpy.o memcpy-inatomic.o string.o \
+	   strlen_user.o strncpy_user.o strnlen_user.o uncached.o
 
 obj-y			+= iomap.o
 obj-$(CONFIG_PCI)	+= iomap-pci.o
diff --git a/arch/mips/lib/csum_partial.S b/arch/mips/lib/csum_partial.S
index c0a77fe..8d3fa1e 100644
--- a/arch/mips/lib/csum_partial.S
+++ b/arch/mips/lib/csum_partial.S
@@ -694,7 +694,7 @@ l_exc:
 	ADD	dst, t0			# compute start address in a1
 	SUB	dst, src
 	/*
-	 * Clear len bytes starting at dst.  Can't call __bzero because it
+	 * Clear len bytes starting at dst.  Can't call memset because it
 	 * might modify len.  An inefficient loop for these rare times...
 	 */
 	beqz	len, done
diff --git a/arch/mips/lib/memset.S b/arch/mips/lib/fill_user.S
similarity index 90%
rename from arch/mips/lib/memset.S
rename to arch/mips/lib/fill_user.S
index 3f8b8b3..4329811 100644
--- a/arch/mips/lib/memset.S
+++ b/arch/mips/lib/fill_user.S
@@ -46,17 +46,19 @@
 	.endm
 
 /*
- * memset(void *s, int c, size_t n)
+ * __kernel_size_t __fill_user(void __user *s, long c, __kernel_size_t n)
  *
  * a0: start of area to clear
  * a1: char to fill with
  * a2: size of area to clear
+ *
+ * Returns the number of bytes NOT set or 0 on success.
  */
 	.set	noreorder
 	.align	5
-LEAF(memset)
+LEAF(__fill_user)
 	beqz		a1, 1f
-	 move		v0, a0			/* result */
+	 move		v0, zero		/* result */
 
 	andi		a1, 0xff		/* spread fillword */
 	LONG_SLL		t1, a1, 8
@@ -68,8 +70,6 @@ LEAF(memset)
 #endif
 	or		a1, t1
 1:
-
-FEXPORT(__bzero)
 	sltiu		t0, a2, LONGSIZE	/* very small region? */
 	bnez		t0, small_memset
 	 andi		t0, a0, LONGMASK	/* aligned? */
@@ -127,7 +127,7 @@ memset_partial:
 	EX(LONG_S_L, a1, -1(a0), last_fixup)
 #endif
 1:	jr		ra
-	 move		a2, zero
+	 nop
 
 small_memset:
 	beqz		a2, 2f
@@ -138,29 +138,29 @@ small_memset:
 	 sb		a1, -1(a0)
 
 2:	jr		ra			/* done */
-	 move		a2, zero
-	END(memset)
+	 nop
+END(__fill_user)
 
 first_fixup:
-	jr	ra
-	 nop
+	jr		ra
+	 move		v0, a2
 
 fwd_fixup:
 	PTR_L		t0, TI_TASK($28)
 	LONG_L		t0, THREAD_BUADDR(t0)
-	andi		a2, 0x3f
-	LONG_ADDU	a2, t1
+	andi		v0, a2, 0x3f
+	LONG_ADDU	v0, t1
 	jr		ra
-	 LONG_SUBU	a2, t0
+	 LONG_SUBU	v0, t0
 
 partial_fixup:
 	PTR_L		t0, TI_TASK($28)
 	LONG_L		t0, THREAD_BUADDR(t0)
-	andi		a2, LONGMASK
-	LONG_ADDU	a2, t1
+	andi		v0, a2, LONGMASK
+	LONG_ADDU	v0, t1
 	jr		ra
-	 LONG_SUBU	a2, t0
+	 LONG_SUBU	v0, t0
 
 last_fixup:
 	jr		ra
-	 andi		v1, a2, LONGMASK
+	 andi		v0, a2, LONGMASK
diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S
index a526c62..425f2c3 100644
--- a/arch/mips/lib/memcpy.S
+++ b/arch/mips/lib/memcpy.S
@@ -443,7 +443,7 @@ l_exc:
 	ADD	dst, t0			# compute start address in a1
 	SUB	dst, src
 	/*
-	 * Clear len bytes starting at dst.  Can't call __bzero because it
+	 * Clear len bytes starting at dst.  Can't call memset because it
 	 * might modify len.  An inefficient loop for these rare times...
 	 */
 	beqz	len, done
diff --git a/arch/mips/lib/string.c b/arch/mips/lib/string.c
new file mode 100644
index 0000000..42fb613
--- /dev/null
+++ b/arch/mips/lib/string.c
@@ -0,0 +1,13 @@
+#include <linux/kernel.h>
+
+#include <asm/uaccess.h>
+
+/*
+ * An outline version of memset, which should be used either by gcc or
+ * by assembly code.
+ */
+void *memset(void *s, int c, __kernel_size_t len)
+{
+	__fill_user(s, c, len);
+	return s;
+}
diff --git a/include/asm-mips/string.h b/include/asm-mips/string.h
index 436e3ad..2bba927 100644
--- a/include/asm-mips/string.h
+++ b/include/asm-mips/string.h
@@ -10,6 +10,7 @@
 #ifndef _ASM_STRING_H
 #define _ASM_STRING_H
 
+#include <asm/uaccess.h>	/* __fill_user() */
 
 /*
  * Most of the inline functions are rather naive implementations so I just
@@ -132,7 +133,11 @@ strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count)
 #endif /* CONFIG_32BIT */
 
 #define __HAVE_ARCH_MEMSET
-extern void *memset(void *__s, int __c, size_t __count);
+extern inline void *memset(void *s, int c, size_t count)
+{
+	__fill_user(s, c, count);
+	return s;
+}
 
 #define __HAVE_ARCH_MEMCPY
 extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h
index c30c718..8c0d226 100644
--- a/include/asm-mips/uaccess.h
+++ b/include/asm-mips/uaccess.h
@@ -11,7 +11,6 @@
 
 #include <linux/kernel.h>
 #include <linux/errno.h>
-#include <linux/thread_info.h>
 #include <asm-generic/uaccess.h>
 
 /*
@@ -633,23 +632,13 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);
  * Returns number of bytes that could not be cleared.
  * On success, this will be zero.
  */
+extern __kernel_size_t __fill_user(void __user *s, long c, __kernel_size_t n);
+
 static inline __kernel_size_t
 __clear_user(void __user *addr, __kernel_size_t size)
 {
-	__kernel_size_t res;
-
 	might_sleep();
-	__asm__ __volatile__(
-		"move\t$4, %1\n\t"
-		"move\t$5, $0\n\t"
-		"move\t$6, %2\n\t"
-		__MODULE_JAL(__bzero)
-		"move\t%0, $6"
-		: "=r" (res)
-		: "r" (addr), "r" (size)
-		: "$4", "$5", "$6", __UA_t0, __UA_t1, "$31");
-
-	return res;
+	return __fill_user(addr, 0, size);
 }
 
 #define clear_user(addr,n)						\
-- 
1.5.3.5



From kaz@zeugmasystems.com Fri Nov 16 23:52:56 2007
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Subject: futex_wake_op deadlock?
Date:	Fri, 16 Nov 2007 15:52:47 -0800
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Thread-Topic: futex_wake_op deadlock?
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From:	"Kaz Kylheku" <kaz@zeugmasystems.com>
To:	<linux-mips@linux-mips.org>
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Hey everyone,

From time to time, on 2.6.17.7, I see a deadlock situation go off. The
soft lockup tick occurs in the middle of do_futex, which is heavily
inlined.  The system is actually hosed; it's not one of those
recoverable CPU busy situations that can sometimes trigger the lockup
detector.

The instruction that is interrupted by the soft lockup tick appears to
be in the assembly code (__futex_atomic_op) used by the futex_wake_op
function; the case is FUTEX_OP_SET.  It's the instruction just before
the load-linked; i.e. the interrupt is outside of the ll/sc loop.

I can't figure out how the code would get into a loop here. The ll/sc
logic should eventually succeed. There is a large loop in the overall
futex operation, but that is bounded by an interation variable
(attempt++).

(I checked the 2.6.17 head, but there doesn't appear to be any
futex-related work).

This lockup has reproduced more than once for us. Once at bootup, and
several times on shutdown.

The call stack always includes several do_futex frames, and a
compat_sys_futex/handle_sysn32 at the top of the chain.

This is from syslog (the unusual format is due to running metalog rather
than syslog in our distribution, and the human-readable time in the
square-bracketed printk timestamps is a locally developed patch):

Jan  3 02:47:02 [kernel] [02:47:02.953075]  [<ffffffff8016de8c>]
softlockup_tick+0x1bc/0x208
Jan  3 02:47:02 [kernel] [02:47:02.953121]  [<ffffffff8014cc54>]
update_process_times+0x9c/0xe8
Jan  3 02:47:02 [kernel] [02:47:02.953158]  [<ffffffff801098bc>]
ll_local_timer_interrupt+0x94/0xa8
Jan  3 02:47:02 [kernel] [02:47:02.953194]  [<ffffffff801026a0>]
plat_irq_dispatch+0x120/0x1a0
Jan  3 02:47:02 [kernel] [02:47:02.953221]  [<ffffffff80163758>]
do_futex+0x870/0xb58
Jan  3 02:47:02 [kernel] [02:47:02.953251]  [<ffffffff801637e0>]
do_futex+0x8f8/0xb58
Jan  3 02:47:02 [kernel] [02:47:02.953275]  [<ffffffff8047b16c>]
__lock_text_end+0x1b3c/0x474c
Jan  3 02:47:02 [kernel] [02:47:02.953312]  [<ffffffff8036fc40>]
sys_sendto+0xe8/0x140
Jan  3 02:47:02 [kernel] [02:47:02.953345]  [<ffffffff80163fac>]
compat_sys_futex+0x84/0x188
Jan  3 02:47:02 [kernel] [02:47:02.953372]  [<ffffffff80116314>]
handle_sysn32+0x54/0xb0

The sys_sendto is a red herring, since the backtrace function dumps
every single word on the stack as an address, not having any frame
pointers to go by.

The code surrounding ffffffff80163758:

ffffffff8016374c:	00023000 	sll	a2,v0,0x0
ffffffff80163750:	08058c77 	j	ffffffff801631dc
<do_futex+0x2f4>
ffffffff80163754:	00034000 	sll	a4,v1,0x0
ffffffff80163758:	0000102d 	move	v0,zero      <----<<
ffffffff8016375c:	c2030000 	ll	v1,0(s0)
ffffffff80163760:	00a0082d 	move	at,a1
ffffffff80163764:	e2010000 	sc	at,0(s0)
ffffffff80163768:	1020fffc 	beqz	at,ffffffff8016375c
<do_futex+0x874>
ffffffff8016376c:	00000000 	nop
ffffffff80163770:	0000000f 	sync
ffffffff80163774:	8f870024 	lw	a3,36(gp)
ffffffff80163778:	00023000 	sll	a2,v0,0x0
ffffffff8016377c:	08058c77 	j	ffffffff801631dc
<do_futex+0x2f4>

You can tell from the "move at, a1" that it's the FUTEX_OP_SET case.

From vagabon.xyz@gmail.com Sat Nov 17 08:38:42 2007
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Date:	Sat, 17 Nov 2007 09:38:29 +0100
From:	Franck Bui-Huu <vagabon.xyz@gmail.com>
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To:	David Daney <ddaney@avtrex.com>
CC:	Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
Subject: Re: Cannot unwind through MIPS signal frames with	ICACHE_REFILLS_WORKAROUND_WAR
References: <473957B6.3030202@avtrex.com> <18233.36645.232058.964652@zebedee.pink> <20071113121036.GA6582@linux-mips.org> <473C0761.1040205@gmail.com> <20071115115351.GA4973@linux-mips.org> <473C8006.2070902@avtrex.com>
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David Daney wrote:
> I am liking the idea of putting the trampoline code in the (as of yet
> non-existent vdso).  This eliminates the need to flush the icache, but
> maintains the ability of user code to unwind through signal frames.
> 
> Putting a .eh_frame section in the vdso would be even better as that
> would eliminate the need for libgcc to do code reading and let the
> kernel use any means desired to return from signal handlers.
> 

You're very welcome to improve the ld script for VDSO generation, I
sent a couple days ago. I would be happy to integrate your
improvements in my patch for the future version.

thanks,
		Franck




From tbm@cyrius.com Sat Nov 17 19:35:57 2007
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Date:	Sat, 17 Nov 2007 20:35:29 +0100
From:	Martin Michlmayr <tbm@cyrius.com>
To:	"Maciej W. Rozycki" <macro@linux-mips.org>
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	mips kernel list <linux-mips@linux-mips.org>
Subject: Re: Preliminary patch for ip32 ttyS* device
Message-ID: <20071117193529.GA11798@deprecation.cyrius.com>
References: <20071030214015.050b7950.giuseppe@eppesuigoccas.homedns.org> <20071031130828.GE14187@linux-mips.org> <1194446585.5849.21.camel@scarafaggio> <Pine.LNX.4.64N.0711071716470.14970@blysk.ds.pg.gda.pl>
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* Maciej W. Rozycki <macro@linux-mips.org> [2007-11-07 17:21]:
> > If mapbase isn't mandatory, the second part of my patch is
> > probably right and fixes a bug.
> 
> You ought to use mapbase and ioremap() with new code as you are not
> allowed to use readb()/writeb()/etc. on addresses obtained otherwise
> than by calling ioremap().  The use of request_mem_region(), etc. is
> not strictly mandatory, but it is nice to have.  Many serial drivers
> use these functions, so I cannot see a reason why it would be a
> hassle for ip32.

Can someone propose a patch?  It's quote unfortuntely that serial on
IP32 is still broken (including 2.6.23).
-- 
Martin Michlmayr
http://www.cyrius.com/

From ths@networkno.de Sat Nov 17 22:29:23 2007
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Date:	Sat, 17 Nov 2007 22:29:13 +0000
From:	Thiemo Seufer <ths@networkno.de>
To:	netdev@vger.kernel.org
Cc:	linux-mips@linux-mips.org, ralf@linux-mips.org
Subject: [PATCH, REPOST] Fix/Rewrite of the mipsnet driver
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Hello All,

currently the mipsnet driver fails after transmitting a number of
packages because SKBs are allocated but never freed. I fixed that
and coudn't refrain from removing the most egregious warts.

- mipsnet.h folded into mipsnet.c, as it doesn't provide any
  useful external interface.
- Free SKB after transmission.
- Call free_irq in mipsnet_close, to balance the request_irq in
  mipsnet_open.
- Removed duplicate read of rxDataCount.
- Some identifiers are now less verbose.
- Removed dead and/or unnecessarily complex code.
- Code formatting fixes.

Tested on Qemu's mipssim emulation, with this patch it can boot a
Debian NFSroot.


Thiemo


Signed-off-by: Thiemo Seufer <ths@networkno.de>
---
 b/drivers/net/mipsnet.c |  201 ++++++++++++++++++++++++++++++++----------------
 drivers/net/mipsnet.h   |  112 --------------------------
 2 files changed, 134 insertions(+), 179 deletions(-)

diff --git a/drivers/net/mipsnet.c b/drivers/net/mipsnet.c
index aafc3ce..6d343ef 100644
--- a/drivers/net/mipsnet.c
+++ b/drivers/net/mipsnet.c
@@ -4,8 +4,6 @@
  * for more details.
  */
 
-#define DEBUG
-
 #include <linux/init.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
@@ -15,11 +13,93 @@
 #include <linux/platform_device.h>
 #include <asm/mips-boards/simint.h>
 
-#include "mipsnet.h"		/* actual device IO mapping */
+#define MIPSNET_VERSION "2007-11-17"
+
+/*
+ * Net status/control block as seen by sw in the core.
+ */
+struct mipsnet_regs {
+	/*
+	 * Device info for probing, reads as MIPSNET%d where %d is some
+	 * form of version.
+	 */
+	u64 devId;		/*0x00 */
 
-#define MIPSNET_VERSION "2005-06-20"
+	/*
+	 * read only busy flag.
+	 * Set and cleared by the Net Device to indicate that an rx or a tx
+	 * is in progress.
+	 */
+	u32 busy;		/*0x08 */
 
-#define mipsnet_reg_address(dev, field) (dev->base_addr + field_offset(field))
+	/*
+	 * Set by the Net Device.
+	 * The device will set it once data has been received.
+	 * The value is the number of bytes that should be read from
+	 * rxDataBuffer.  The value will decrease till 0 until all the data
+	 * from rxDataBuffer has been read.
+	 */
+	u32 rxDataCount;	/*0x0c */
+#define MIPSNET_MAX_RXTX_DATACOUNT (1 << 16)
+
+	/*
+	 * Settable from the MIPS core, cleared by the Net Device.
+	 * The core should set the number of bytes it wants to send,
+	 * then it should write those bytes of data to txDataBuffer.
+	 * The device will clear txDataCount has been processed (not
+	 * necessarily sent).
+	 */
+	u32 txDataCount;	/*0x10 */
+
+	/*
+	 * Interrupt control
+	 *
+	 * Used to clear the interrupted generated by this dev.
+	 * Write a 1 to clear the interrupt. (except bit31).
+	 *
+	 * Bit0 is set if it was a tx-done interrupt.
+	 * Bit1 is set when new rx-data is available.
+	 *    Until this bit is cleared there will be no other RXs.
+	 *
+	 * Bit31 is used for testing, it clears after a read.
+	 *    Writing 1 to this bit will cause an interrupt to be generated.
+	 *    To clear the test interrupt, write 0 to this register.
+	 */
+	u32 interruptControl;	/*0x14 */
+#define MIPSNET_INTCTL_TXDONE     (1u << 0)
+#define MIPSNET_INTCTL_RXDONE     (1u << 1)
+#define MIPSNET_INTCTL_TESTBIT    (1u << 31)
+
+	/*
+	 * Readonly core-specific interrupt info for the device to signal
+	 * the core. The meaning of the contents of this field might change.
+	 */
+	/* XXX: the whole memIntf interrupt scheme is messy: the device
+	 * should have no control what so ever of what VPE/register set is
+	 * being used.
+	 * The MemIntf should only expose interrupt lines, and something in
+	 * the config should be responsible for the line<->core/vpe bindings.
+	 */
+	u32 interruptInfo;	/*0x18 */
+
+	/*
+	 * This is where the received data is read out.
+	 * There is more data to read until rxDataReady is 0.
+	 * Only 1 byte at this regs offset is used.
+	 */
+	u32 rxDataBuffer;	/*0x1c */
+
+	/*
+	 * This is where the data to transmit is written.
+	 * Data should be written for the amount specified in the
+	 * txDataCount register.
+	 * Only 1 byte at this regs offset is used.
+	 */
+	u32 txDataBuffer;	/*0x20 */
+};
+
+#define regaddr(dev, field) \
+  (dev->base_addr + offsetof(struct mipsnet_regs, field))
 
 static char mipsnet_string[] = "mipsnet";
 
@@ -29,32 +109,27 @@ static char mipsnet_string[] = "mipsnet";
 static int ioiocpy_frommipsnet(struct net_device *dev, unsigned char *kdata,
 			int len)
 {
-	uint32_t available_len = inl(mipsnet_reg_address(dev, rxDataCount));
-
-	if (available_len < len)
-		return -EFAULT;
-
 	for (; len > 0; len--, kdata++)
-		*kdata = inb(mipsnet_reg_address(dev, rxDataBuffer));
+		*kdata = inb(regaddr(dev, rxDataBuffer));
 
-	return inl(mipsnet_reg_address(dev, rxDataCount));
+	return inl(regaddr(dev, rxDataCount));
 }
 
-static inline ssize_t mipsnet_put_todevice(struct net_device *dev,
+static inline void mipsnet_put_todevice(struct net_device *dev,
 	struct sk_buff *skb)
 {
 	int count_to_go = skb->len;
 	char *buf_ptr = skb->data;
 
-	outl(skb->len, mipsnet_reg_address(dev, txDataCount));
+	outl(skb->len, regaddr(dev, txDataCount));
 
 	for (; count_to_go; buf_ptr++, count_to_go--)
-		outb(*buf_ptr, mipsnet_reg_address(dev, txDataBuffer));
+		outb(*buf_ptr, regaddr(dev, txDataBuffer));
 
 	dev->stats.tx_packets++;
 	dev->stats.tx_bytes += skb->len;
 
-	return skb->len;
+	dev_kfree_skb(skb);
 }
 
 static int mipsnet_xmit(struct sk_buff *skb, struct net_device *dev)
@@ -69,18 +144,20 @@ static int mipsnet_xmit(struct sk_buff *skb, struct net_device *dev)
 	return 0;
 }
 
-static inline ssize_t mipsnet_get_fromdev(struct net_device *dev, size_t count)
+static inline ssize_t mipsnet_get_fromdev(struct net_device *dev, size_t len)
 {
 	struct sk_buff *skb;
-	size_t len = count;
 
-	skb = alloc_skb(len + 2, GFP_KERNEL);
+	if (!len)
+		return len;
+
+	skb = dev_alloc_skb(len + NET_IP_ALIGN);
 	if (!skb) {
 		dev->stats.rx_dropped++;
 		return -ENOMEM;
 	}
 
-	skb_reserve(skb, 2);
+	skb_reserve(skb, NET_IP_ALIGN);
 	if (ioiocpy_frommipsnet(dev, skb_put(skb, len), len))
 		return -EFAULT;
 
@@ -92,50 +169,42 @@ static inline ssize_t mipsnet_get_fromdev(struct net_device *dev, size_t count)
 	dev->stats.rx_packets++;
 	dev->stats.rx_bytes += len;
 
-	return count;
+	return len;
 }
 
 static irqreturn_t mipsnet_interrupt(int irq, void *dev_id)
 {
 	struct net_device *dev = dev_id;
-
-	irqreturn_t retval = IRQ_NONE;
-	uint64_t interruptFlags;
-
-	if (irq == dev->irq) {
-		retval = IRQ_HANDLED;
-
-		interruptFlags =
-		    inl(mipsnet_reg_address(dev, interruptControl));
-
-		if (interruptFlags & MIPSNET_INTCTL_TXDONE) {
-			outl(MIPSNET_INTCTL_TXDONE,
-			     mipsnet_reg_address(dev, interruptControl));
-			/* only one packet at a time, we are done. */
-			netif_wake_queue(dev);
-		} else if (interruptFlags & MIPSNET_INTCTL_RXDONE) {
-			mipsnet_get_fromdev(dev,
-				    inl(mipsnet_reg_address(dev, rxDataCount)));
-			outl(MIPSNET_INTCTL_RXDONE,
-			     mipsnet_reg_address(dev, interruptControl));
-
-		} else if (interruptFlags & MIPSNET_INTCTL_TESTBIT) {
-			/*
-			 * TESTBIT is cleared on read.
-			 * And takes effect after a write with 0
-			 */
-			outl(0, mipsnet_reg_address(dev, interruptControl));
-		} else {
-			/* Maybe shared IRQ, just ignore, no clearing. */
-			retval = IRQ_NONE;
-		}
-
-	} else {
-		printk(KERN_INFO "%s: %s(): irq %d for unknown device\n",
-		       dev->name, __FUNCTION__, irq);
-		retval = IRQ_NONE;
+	u32 int_flags;
+	irqreturn_t ret = IRQ_NONE;
+
+	if (irq != dev->irq)
+		goto out_badirq;
+
+	/* TESTBIT is cleared on read. */
+	int_flags = inl(regaddr(dev, interruptControl));
+	if (int_flags & MIPSNET_INTCTL_TESTBIT) {
+		/* TESTBIT takes effect after a write with 0. */
+		outl(0, regaddr(dev, interruptControl));
+		ret = IRQ_HANDLED;
+	} else if (int_flags & MIPSNET_INTCTL_TXDONE) {
+		/* Only one packet at a time, we are done. */
+		dev->stats.tx_packets++;
+		netif_wake_queue(dev);
+		outl(MIPSNET_INTCTL_TXDONE,
+		     regaddr(dev, interruptControl));
+		ret = IRQ_HANDLED;
+	} else if (int_flags & MIPSNET_INTCTL_RXDONE) {
+		mipsnet_get_fromdev(dev, inl(regaddr(dev, rxDataCount)));
+		outl(MIPSNET_INTCTL_RXDONE, regaddr(dev, interruptControl));
+		ret = IRQ_HANDLED;
 	}
-	return retval;
+	return ret;
+
+out_badirq:
+	printk(KERN_INFO "%s: %s(): irq %d for unknown device\n",
+	       dev->name, __FUNCTION__, irq);
+	return ret;
 }
 
 static int mipsnet_open(struct net_device *dev)
@@ -144,18 +213,15 @@ static int mipsnet_open(struct net_device *dev)
 
 	err = request_irq(dev->irq, &mipsnet_interrupt,
 			  IRQF_SHARED, dev->name, (void *) dev);
-
 	if (err) {
-		release_region(dev->base_addr, MIPSNET_IO_EXTENT);
+		release_region(dev->base_addr, sizeof(struct mipsnet_regs));
 		return err;
 	}
 
 	netif_start_queue(dev);
 
 	/* test interrupt handler */
-	outl(MIPSNET_INTCTL_TESTBIT,
-	     mipsnet_reg_address(dev, interruptControl));
-
+	outl(MIPSNET_INTCTL_TESTBIT, regaddr(dev, interruptControl));
 
 	return 0;
 }
@@ -163,7 +229,7 @@ static int mipsnet_open(struct net_device *dev)
 static int mipsnet_close(struct net_device *dev)
 {
 	netif_stop_queue(dev);
-
+	free_irq(dev->irq, dev);
 	return 0;
 }
 
@@ -194,10 +260,11 @@ static int __init mipsnet_probe(struct device *dev)
 	 */
 	netdev->base_addr = 0x4200;
 	netdev->irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_MB0 +
-		      inl(mipsnet_reg_address(netdev, interruptInfo));
+		      inl(regaddr(netdev, interruptInfo));
 
 	/* Get the io region now, get irq on open() */
-	if (!request_region(netdev->base_addr, MIPSNET_IO_EXTENT, "mipsnet")) {
+	if (!request_region(netdev->base_addr, sizeof(struct mipsnet_regs),
+			    "mipsnet")) {
 		err = -EBUSY;
 		goto out_free_netdev;
 	}
@@ -217,7 +284,7 @@ static int __init mipsnet_probe(struct device *dev)
 	return 0;
 
 out_free_region:
-	release_region(netdev->base_addr, MIPSNET_IO_EXTENT);
+	release_region(netdev->base_addr, sizeof(struct mipsnet_regs));
 
 out_free_netdev:
 	free_netdev(netdev);
@@ -231,7 +298,7 @@ static int __devexit mipsnet_device_remove(struct device *device)
 	struct net_device *dev = dev_get_drvdata(device);
 
 	unregister_netdev(dev);
-	release_region(dev->base_addr, MIPSNET_IO_EXTENT);
+	release_region(dev->base_addr, sizeof(struct mipsnet_regs));
 	free_netdev(dev);
 	dev_set_drvdata(device, NULL);
 
diff --git a/drivers/net/mipsnet.h b/drivers/net/mipsnet.h
deleted file mode 100644
index 0132c67..0000000
--- a/drivers/net/mipsnet.h
+++ /dev/null
@@ -1,112 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef __MIPSNET_H
-#define __MIPSNET_H
-
-/*
- *  Id of this Net device, as seen by the core.
- */
-#define MIPS_NET_DEV_ID ((uint64_t)	   \
-			     ((uint64_t) 'M' <<  0)| \
-			     ((uint64_t) 'I' <<  8)| \
-			     ((uint64_t) 'P' << 16)| \
-			     ((uint64_t) 'S' << 24)| \
-			     ((uint64_t) 'N' << 32)| \
-			     ((uint64_t) 'E' << 40)| \
-			     ((uint64_t) 'T' << 48)| \
-			     ((uint64_t) '0' << 56))
-
-/*
- * Net status/control block as seen by sw in the core.
- * (Why not use bit fields? can't be bothered with cross-platform struct
- *  packing.)
- */
-struct net_control_block {
-	/*
-	 * dev info for probing
-	 * reads as MIPSNET%d where %d is some form of version
-	 */
-	uint64_t devId;		/* 0x00 */
-
-	/*
-	 * read only busy flag.
-	 * Set and cleared by the Net Device to indicate that an rx or a tx
-	 * is in progress.
-	 */
-	uint32_t busy;		/* 0x08 */
-
-	/*
-	 * Set by the Net Device.
-	 * The device will set it once data has been received.
-	 * The value is the number of bytes that should be read from
-	 * rxDataBuffer.  The value will decrease till 0 until all the data
-	 * from rxDataBuffer has been read.
-	 */
-	uint32_t rxDataCount;	/* 0x0c */
-#define MIPSNET_MAX_RXTX_DATACOUNT (1<<16)
-
-	/*
-	 * Settable from the MIPS core, cleared by the Net Device.  The core
-	 * should set the number of bytes it wants to send, then it should
-	 * write those bytes of data to txDataBuffer.  The device will clear
-	 * txDataCount has been processed (not necessarily sent).
-	 */
-	uint32_t txDataCount;	/* 0x10 */
-
-	/*
-	 * Interrupt control
-	 *
-	 * Used to clear the interrupted generated by this dev.
-	 * Write a 1 to clear the interrupt. (except bit31).
-	 *
-	 * Bit0 is set if it was a tx-done interrupt.
-	 * Bit1 is set when new rx-data is available.
-	 *      Until this bit is cleared there will be no other RXs.
-	 *
-	 * Bit31 is used for testing, it clears after a read.
-	 *    Writing 1 to this bit will cause an interrupt to be generated.
-	 *    To clear the test interrupt, write 0 to this register.
-	 */
-	uint32_t interruptControl;	/*0x14 */
-#define MIPSNET_INTCTL_TXDONE     ((uint32_t)(1 <<  0))
-#define MIPSNET_INTCTL_RXDONE     ((uint32_t)(1 <<  1))
-#define MIPSNET_INTCTL_TESTBIT    ((uint32_t)(1 << 31))
-#define MIPSNET_INTCTL_ALLSOURCES	(MIPSNET_INTCTL_TXDONE | \
-					 MIPSNET_INTCTL_RXDONE | \
-					 MIPSNET_INTCTL_TESTBIT)
-
-	/*
-	 * Readonly core-specific interrupt info for the device to signal the
-	 * core.  The meaning of the contents of this field might change.
-	 *
-	 * TODO: the whole memIntf interrupt scheme is messy: the device should
-	 *       have no control what so ever of what VPE/register set is being
-	 *       used.  The MemIntf should only expose interrupt lines, and
-	 *       something in the config should be responsible for the
-	 *       line<->core/vpe bindings.
-	 */
-	uint32_t interruptInfo;	/* 0x18 */
-
-	/*
-	 *  This is where the received data is read out.
-	 *  There is more data to read until rxDataReady is 0.
-	 *  Only 1 byte at this regs offset is used.
-	 */
-	uint32_t rxDataBuffer;	/* 0x1c */
-
-	/*
-	 * This is where the data to transmit is written.  Data should be
-	 * written for the amount specified in the txDataCount register.  Only
-	 * 1 byte at this regs offset is used.
-	 */
-	uint32_t txDataBuffer;	/* 0x20 */
-};
-
-#define MIPSNET_IO_EXTENT 0x40	/* being generous */
-
-#define field_offset(field) (offsetof(struct net_control_block, field))
-
-#endif /* __MIPSNET_H */

From sbrown@cortland.com Sun Nov 18 18:23:06 2007
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Date:	Sun, 18 Nov 2007 13:23:01 -0500
From:	Steve Brown <sbrown@cortland.com>
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To:	linux-mips@linux-mips.org
Subject: ohci-ssb driver on a Broadcom BCM5354
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The 5354 has a dual ohci/ehci usb core. It's in an ASUS WL520gu wifi 
router. The ohci hcd driver registers, but times out reading a 
descriptor from the device.

Any suggestions on how to track down the problem?

I'm using 2.6.32.1 kernel from the openwrt project with the "ohci SSB 
bus glue" and "Fix ohci-ssb with !CONFIG_PM" patches from linux-mips.  
If there is a better test frame, let me know and I'll build it and test 
that.

Is this driver known to work with some combination of Broadcom hardware?

The ohci/usb interface does work w/ the software provided with the WL520gu.

Steve

usbcore: registered new interface driver 
usbfs                                                                                                         

usbcore: registered new interface driver 
hub                                                                                                           

usbcore: registered new device driver 
usb                                                                                                              

ohci_hcd ssb0:1: SSB OHCI 
Controller                                                                                                                   

ohci_hcd ssb0:1: new USB bus registered, assigned bus number 
1                                                                                         

ohci_hcd ssb0:1: irq 5, io mem 
0x18003000                                                                                                              

usb usb1: configuration #1 chosen from 1 
choice                                                                                                        

hub 1-0:1.0: USB hub 
found                                                                                                                             

hub 1-0:1.0: 2 ports 
detected                                                                                                                          

USB Universal Host Controller Interface driver 
v3.0                                                                                                    

Initializing USB Mass Storage 
driver...                                                                                                                

usbcore: registered new interface driver 
usb-storage                                                                                                   

USB Mass Storage support registered.   
usb 1-1: new full speed USB device using ohci_hcd and address 
2                                                                                        

usb 1-1: device descriptor read/64, error 
-145                                                                                                         


===================

> root@OpenWrt:/# cat 
> /proc/bus/usb/devices                                                                                                             
>  
>                                                                                                                                                       
>  
> T:  Bus=01 Lev=00 Prnt=00 Port=00 Cnt=00 Dev#=  1 Spd=12  MxCh= 
> 2                                                                                     
>  
> B:  Alloc=  0/900 us ( 0%), #Int=  0, #Iso=  
> 0                                                                                                        
>  
> D:  Ver= 1.10 Cls=09(hub  ) Sub=00 Prot=00 MxPS=64 #Cfgs=  
> 1                                                                                          
>  
> P:  Vendor=0000 ProdID=0000 Rev= 
> 2.06                                                                                                                 
>  
> S:  Manufacturer=Linux 2.6.23.1 
> ssb-usb-ohci                                                                                                          
>  
> S:  Product=SSB OHCI 
> Controller                                                                                                                       
>  
> S:  
> SerialNumber=ssb0:1                                                                                                                               
>  
> C:* #Ifs= 1 Cfg#= 1 Atr=e0 MxPwr=  
> 0mA                                                                                                                
>  
> I:* If#= 0 Alt= 0 #EPs= 1 Cls=09(hub  ) Sub=00 Prot=00 
> Driver=hub                                                                                     
>  
> E:  Ad=81(I) Atr=03(Int.) MxPS=   2 
> Ivl=255ms                                                                                                         
>  
                                                             

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Steve Brown wrote:
> The 5354 has a dual ohci/ehci usb core. It's in an ASUS WL520gu wifi
> router. The ohci hcd driver registers, but times out reading a
> descriptor from the device.
> 

You'd better post this to linux-usb-devel@lists.sourceforge.net

> Any suggestions on how to track down the problem?
> 

CONFIG_USB_DEBUG=y

and

usbmon perhaps.

		Franck

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To:	Steve Brown <sbrown@cortland.com>
Cc:	linux-mips@linux-mips.org, mb@bu3sch.de
Subject: Re: ohci-ssb driver on a Broadcom BCM5354
Message-ID: <20071118224752.GB12263@tuxdriver.com>
References: <47408305.5090804@cortland.com>
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You probably want to make Michael Buesch aware of this issue.

John

On Sun, Nov 18, 2007 at 01:23:01PM -0500, Steve Brown wrote:
> The 5354 has a dual ohci/ehci usb core. It's in an ASUS WL520gu wifi 
> router. The ohci hcd driver registers, but times out reading a descriptor 
> from the device.
>
> Any suggestions on how to track down the problem?
>
> I'm using 2.6.32.1 kernel from the openwrt project with the "ohci SSB bus 
> glue" and "Fix ohci-ssb with !CONFIG_PM" patches from linux-mips.  If there 
> is a better test frame, let me know and I'll build it and test that.
>
> Is this driver known to work with some combination of Broadcom hardware?
>
> The ohci/usb interface does work w/ the software provided with the WL520gu.
>
> Steve
>
> usbcore: registered new interface driver usbfs                              
>                                                                            
> usbcore: registered new interface driver hub                                
>                                                                            
> usbcore: registered new device driver usb                                   
>                                                                            
> ohci_hcd ssb0:1: SSB OHCI Controller                                        
>                                                                            
> ohci_hcd ssb0:1: new USB bus registered, assigned bus number 1              
>                                                                            
> ohci_hcd ssb0:1: irq 5, io mem 0x18003000                                   
>                                                                            
> usb usb1: configuration #1 chosen from 1 choice                             
>                                                                            
> hub 1-0:1.0: USB hub found                                                  
>                                                                            
> hub 1-0:1.0: 2 ports detected                                               
>                                                                            
> USB Universal Host Controller Interface driver v3.0                         
>                                                                            
> Initializing USB Mass Storage driver...                                     
>                                                                            
> usbcore: registered new interface driver usb-storage                        
>                                                                            
> USB Mass Storage support registered.   usb 1-1: new full speed USB device 
> using ohci_hcd and address 2                                                
>                                         
> usb 1-1: device descriptor read/64, error -145                              
>                                                                            
>
> ===================
>
>> root@OpenWrt:/# cat /proc/bus/usb/devices                                  
>>                                                                            
>>                                                                            
>>                                                                            
>>   T:  Bus=01 Lev=00 Prnt=00 Port=00 Cnt=00 Dev#=  1 Spd=12  MxCh= 2        
>>                                                                            
>>    B:  Alloc=  0/900 us ( 0%), #Int=  0, #Iso=  0                          
>>                                                                            
>>     D:  Ver= 1.10 Cls=09(hub  ) Sub=00 Prot=00 MxPS=64 #Cfgs=  1           
>>                                                                            
>>      P:  Vendor=0000 ProdID=0000 Rev= 2.06                                 
>>                                                                            
>>       S:  Manufacturer=Linux 2.6.23.1 ssb-usb-ohci                         
>>                                                                            
>>        S:  Product=SSB OHCI Controller                                     
>>                                                                            
>>         S:  SerialNumber=ssb0:1                                            
>>                                                                            
>>          C:* #Ifs= 1 Cfg#= 1 Atr=e0 MxPwr=  0mA                            
>>                                                                            
>>           I:* If#= 0 Alt= 0 #EPs= 1 Cls=09(hub  ) Sub=00 Prot=00 
>> Driver=hub                                                                 
>>                      E:  Ad=81(I) Atr=03(Int.) MxPS=   2 Ivl=255ms         
>>                                                                            
>>                       
>                                                             

-- 
John W. Linville
linville@tuxdriver.com

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Subject: IP22 64Bit arcboot - current git crashes on 3 machines at different points
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Subject: Re: Bug#451805: linux-image-2.6.22-3-r4k-ip22 dies early on boot /=
 Starting ELF64 kernel

Hi,
i am seeing strange issues with 64 Bit kernels IP22 on different
machines. This came up when i tried the debian distribution kernel
which fails for me on 2 machines.

Current git does not work on all 3=20

IP22 Indy R5k 150Mhz
 r4k-ip22-2.6.22-6 works
 current git 2.6.24-rc2	breaks in Zilog serial driver (see end)
 PROM Monitor SGI Version 5.3 Rev B10 R4X00/R5000 IP24 Feb 12, 1996 (BE)

IP22 Indy R4k 100Mhz
 r4k-ip22-2.6.22-6 dies after "Starting ELF64 Kernel"
 current git 2.6.24-rc2 dies with a backtrace in cache_alloc_refill (see en=
d)
 PROM Monitor SGI Version 5.1.2 Rev B4 R4X00 IP24 Dec  9, 1993 (BE)

IP22 Indigo2 R4k 250Mhz
 r4k-ip22-2.6.22-6 dies after "Starting ELF64 Kernel"
 current git 2.6.24-rc2 dies after initializing hash tables (see end)
 PROM Monitor SGI Version 5.3 Rev E IP22 Sep 28, 1995 (BE)


IP22 r5k 150Mhz Indy 2.6.24-rc2
>> boot
60928+176+320 entry: 0x88802d9c

arcsboot: ARCS Linux ext2fs loader 0.3.8.8

Loading linux2624 from scsi(0)disk(1)partition(1)
Allocated 0x70 bytes for segments
Loading 64-bit executable
Loading program segment 1 at 0x88004000, offset=3D0x0 4000, size =3D 0x0 40=
e085
c000      (cache: 22.2%)18000      (cache: 34.7%)24000      (cache: 46.6%)3=
0000      (cache: 57.5%)3c000      (cache: 67.8%)48000      (cache: 74.3%)5=
4000      (cache: 77.7%)60000      (cache: 77.6%)6c000      (cache: 77.5%)7=
8000      (cache: 78.7%)84000      (cache: 78.9%)90000      (cache: 79.1%)9=
c000      (cache: 80.3%)a8000      (cache: 82.6%)b4000      (cache: 82.5%)c=
0000      (cache: 82.7%)cc000      (cache: 84.3%)d8000      (cache: 85.0%)e=
4000      (cache: 85.3%)f0000      (cache: 86.1%)fc000      (cache: 85.9%)1=
08000      (cache: 86.8%)114000      (cache: 87.5%)120000      (cache: 88.2=
%)12c000      (cache: 88.7%)138000      (cache: 89.2%)144000      (cache: 8=
9.6%)150000      (cache: 90.0%)15c000      (cache: 90.3%)168000      (cache=
: 90.6%)174000      (cache: 90.8%)180000      (cache: 91.1%)18c000      (ca=
che: 91.3%)198000      (cache: 91.5%)1a4000      (cache: 91.6%)1b0000      =
(cache: 91.8%)1bc000      (cache: 92.0%)1c8000      (cache: 92.1%)1d4000   =
   (cache: 92.2%)1e0000      (cache: 92.4%)1ec000      (cache: 92.5%)1f8000=
      (cache: 92.6%)204000      (cache: 92.7%)210000      (cache: 92.8%)21c=
000      (cache: 92.9%)228000      (cache: 92.9%)234000      (cache: 93.0%)=
240000      (cache: 93.1%)24c000      (cache: 93.2%)258000      (cache: 93.=
2%)264000      (cache: 93.3%)270000      (cache: 93.4%)27c000      (cache: =
93.4%)288000      (cache: 93.5%)294000      (cache: 93.5%)2a0000      (cach=
e: 93.6%)2ac000      (cache: 93.6%)2b8000      (cache: 93.7%)2c4000      (c=
ache: 93.7%)2d0000      (cache: 93.8%)2dc000      (cache: 93.8%)2e8000     =
 (cache: 93.8%)2f4000      (cache: 93.9%)300000      (cache: 93.9%)30c000  =
    (cache: 93.9%)318000      (cache: 94.0%)324000      (cache: 94.0%)33000=
0      (cache: 94.0%)33c000      (cache: 94.1%)348000      (cache: 94.1%)35=
4000      (cache: 94.1%)360000      (cache: 94.2%)36c000      (cache: 94.2%=
)378000      (cache: 94.2%)384000      (cache: 94.2%)390000      (cache: 94=
=2E3%)39c000      (cache: 94.3%)3a8000      (cache: 94.3%)3b4000      (cach=
e: 94.3%)3c0000      (cache: 94.3%)3cc000      (cache: 94.4%)3d8000      (c=
ache: 94.4%)3e4000      (cache: 94.4%)3f0000      (cache: 94.4%)3fc000     =
 (cache: 94.4%)408000      (cache: 94.5%)414000      (cache: 94.5%)420000  =
    (cache: 94.5%)42c000      (cache: 94.5%)438000      (cache: 94.5%)44400=
0      (cache: 94.5%)450000      (cache: 94.6%)45c000      (cache: 94.6%)46=
8000      (cache: 94.6%)474000      (cache: 94.6%)480000      (cache: 94.6%=
)48c000      (cache: 94.6%)498000      (cache: 94.6%)Zeroing memory at 0x71=
0210, size =3D 0x0
Starting ELF64 kernel
Linux version 2.6.24-rc2-gcd60878b-dirty (flo@firewall) (gcc version 4.2.2)=
 #1 Mon Nov 19 14:33:08 CET 2007
ARCH: SGI-IP22
PROMLIB: ARC firmware Version 1 Revision 10
console [early0] enabled
CPU revision is: 00002321 (R5000)
FPU revision is: 00002310
MC: SGI memory controller Revision 3
MC: Probing memory configuration:
 bank0:  32M @ 08000000
 bank1:  32M @ 0a000000
Determined physical RAM map:
 memory: 0000000004000000 @ 0000000008000000 (usable)
Wasting 1835008 bytes for tracking 32768 unused pages
Initrd not found or empty - disabling initrd
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 48480
Kernel command line: root=3D/dev/sda2
Primary instruction cache 32kB, VIPT, 2-way, linesize 32 bytes.
Primary data cache 32kB, 2-way, VIPT, cache aliases, linesize 32 bytes
Synthesized clear page handler (15 instructions).
Synthesized copy page handler (24 instructions).
Synthesized TLB refill handler (38 instructions).
Synthesized TLB load handler fastpath (51 instructions).
Synthesized TLB store handler fastpath (51 instructions).
Synthesized TLB modify handler fastpath (50 instructions).
PID hash table entries: 1024 (order: 10, 8192 bytes)
Calibrating system timer... 300000 [150.0000 MHz CPU]
Using 75.000 MHz high precision timer.
NG1: Revision 6, 8 bitplanes, REX3 revision B, VC2 revision A, xmap9 revisi=
on A, cmap revision C, bt445 revision D
NG1: Screensize 1024x768
Console: colour SGI Newport 128x48
Dentry cache hash table entries: 32768 (order: 6, 262144 bytes)
Inode-cache hash table entries: 16384 (order: 5, 131072 bytes)
Memory: 57600k/65536k available (2925k kernel code, 7524k reserved, 955k da=
ta, 272k init, 0k highmem)
Security Framework initialized
SELinux:  Disabled at boot.
Capability LSM initialized
Mount-cache hash table entries: 256
Checking for the multiply/shift bug... no.
Checking for the daddi bug... no.
Checking for the daddiu bug... no.
net_namespace: 120 bytes
NET: Registered protocol family 16
EISA bus registered
SCSI subsystem initialized
Time: MIPS clocksource has been installed.
NET: Registered protocol family 2
IP route cache hash table entries: 2048 (order: 2, 16384 bytes)
TCP established hash table entries: 8192 (order: 5, 131072 bytes)
TCP bind hash table entries: 8192 (order: 4, 65536 bytes)
TCP: Hash tables configured (established 8192 bind 8192)
TCP reno registered
audit: initializing netlink socket (disabled)
audit(1195479647.784:1): initialized
VFS: Disk quotas dquot_6.5.1
Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
Installing knfsd (copyright (C) 1996 okir@monad.swb.de).
io scheduler noop registered
io scheduler anticipatory registered
io scheduler deadline registered
io scheduler cfq registered (default)
DS1286 Real Time Clock Driver v1.0
Serial: IP22 Zilog driver (1 chips).






IP22 r4k 250Mhz Indigo2 2.6.24-rc2:
arcsboot: ARCS Linux ext2fs loader 0.3.8.8

Loading linux2624 from scsi(1)disk(5)rdisk(0)partition(0)
Allocated 0x70 bytes for segments
Loading 64-bit executable
Loading program segment 1 at 0x88004000, offset=3D0x0 4000, size =3D 0x0 40=
e085
c000      (cache: 46.1%)18000      (cache: 69.3%)24000      (cache: 78.0%)3=
0000      (cache: 82.4%)3c000      (cache: 85.1%)48000      (cache: 86.8%)5=
4000      (cache: 88.1%)60000      (cache: 89.1%)6c000      (cache: 89.8%)7=
8000      (cache: 90.4%)84000      (cache: 90.9%)90000      (cache: 91.3%)9=
c000      (cache: 91.6%)a8000      (cache: 91.9%)b4000      (cache: 92.2%)c=
0000      (cache: 92.4%)cc000      (cache: 92.6%)d8000      (cache: 92.8%)e=
4000      (cache: 92.9%)f0000      (cache: 93.1%)fc000      (cache: 93.2%)1=
08000      (cache: 93.3%)114000      (cache: 93.4%)120000      (cache: 93.5=
%)12c000      (cache: 93.6%)138000      (cache: 93.7%)144000      (cache: 9=
3.8%)150000      (cache: 93.9%)15c000      (cache: 93.9%)168000      (cache=
: 94.0%)174000      (cache: 94.0%)180000      (cache: 94.1%)18c000      (ca=
che: 94.1%)198000      (cache: 94.2%)1a4000      (cache: 94.2%)1b0000      =
(cache: 94.3%)1bc000      (cache: 94.3%)1c8000      (cache: 94.4%)1d4000   =
   (cache: 94.4%)1e0000      (cache: 94.4%)1ec000      (cache: 94.5%)1f8000=
      (cache: 94.5%)204000      (cache: 94.5%)210000      (cache: 94.6%)21c=
000      (cache: 94.6%)228000      (cache: 94.6%)234000      (cache: 94.6%)=
240000      (cache: 94.7%)24c000      (cache: 94.7%)258000      (cache: 94.=
7%)264000      (cache: 94.7%)270000      (cache: 94.7%)27c000      (cache: =
94.8%)288000      (cache: 94.8%)294000      (cache: 94.8%)2a0000      (cach=
e: 94.8%)2ac000      (cache: 94.8%)2b8000      (cache: 94.9%)2c4000      (c=
ache: 94.9%)2d0000      (cache: 94.9%)2dc000      (cache: 94.9%)2e8000     =
 (cache: 94.9%)2f4000      (cache: 94.9%)300000      (cache: 94.9%)30c000  =
    (cache: 95.0%)318000      (cache: 95.0%)324000      (cache: 95.0%)33000=
0      (cache: 95.0%)33c000      (cache: 95.0%)348000      (cache: 95.0%)35=
4000      (cache: 95.0%)360000      (cache: 95.0%)36c000      (cache: 95.0%=
)378000      (cache: 95.1%)384000      (cache: 95.1%)390000      (cache: 95=
=2E1%)39c000      (cache: 95.1%)3a8000      (cache: 95.1%)3b4000      (cach=
e: 95.1%)3c0000      (cache: 95.1%)3cc000      (cache: 95.1%)3d8000      (c=
ache: 95.1%)3e4000      (cache: 95.1%)3f0000      (cache: 95.1%)3fc000     =
 (cache: 95.1%)408000      (cache: 95.2%)414000      (cache: 95.2%)Zeroing =
memory at 0x710210, size =3D 0x0
Starting ELF64 kernel
Linux version 2.6.24-rc2-gcd60878b-dirty (flo@firewall) (gcc version 4.2.2)=
 #1 Mon Nov 19 14:33:08 CET 2007
ARCH: SGI-IP22
PROMLIB: ARC firmware Version 1 Revision 10
console [early0] enabled
CPU revision is: 00000460 (R4400SC)
FPU revision is: 00000500
MC: SGI memory controller Revision 3
MC: Probing memory configuration:
 bank0:  64M @ 10000000
 bank1:  64M @ 14000000
 bank2: 128M @ 08000000
Determined physical RAM map:
 memory: 0000000010000000 @ 0000000008000000 (usable)
Wasting 1835008 bytes for tracking 32768 unused pages
Initrd not found or empty - disabling initrd
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 96960
Kernel command line: root=3D/dev/sdf1 console=3DttyS0 auto
Primary instruction cache 16kB, VIPT, direct mapped, linesize 16 bytes.
Primary data cache 16kB, direct mapped, VIPT, cache aliases, linesize 16 by=
tes
Unified secondary cache 2048kB direct mapped, linesize 128 bytes.
Synthesized clear page handler (22 instructions).
Synthesized copy page handler (39 instructions).
Synthesized TLB refill handler (38 instructions).
Synthesized TLB load handler fastpath (50 instructions).
Synthesized TLB store handler fastpath (50 instructions).
Synthesized TLB modify handler fastpath (49 instructions).
EISA: Probing bus...
EISA: Detected 0 card.
ISA support compiled in.
PID hash table entries: 2048 (order: 11, 16384 bytes)
Calibrating system timer... 500000 [250.0000 MHz CPU]
Using 125.000 MHz high precision timer.
Console: colour dummy device 80x25
Dentry cache hash table entries: 65536 (order: 7, 524288 bytes)
Inode-cache hash table entries: 32768 (order: 6, 262144 bytes)
Memory: 251104k/262144k available (2925k kernel code, 10628k reserved, 955k=
 data, 272k init, 0k highmem)


IP22 R4k 100Mhz Indy - 2.6.24-rc2:
Loading linux2624 from scsi(0)disk(1)rdisk(0)partition(0)
Allocated 0x70 bytes for segments
Loading 64-bit executable
Loading program segment 1 at 0x88004000, offset=3D0x0 4000, size =3D 0x0 40=
e085
c000      (cache: 44.0%)18000      (cache: 68.7%)24000      (cache: 77.7%)3=
0000      (cache: 82.2%)3c000      (cache: 85.0%)48000      (cache: 86.8%)5=
4000      (cache: 88.0%)60000      (cache: 89.0%)6c000      (cache: 89.8%)7=
8000      (cache: 90.4%)84000      (cache: 90.9%)90000      (cache: 91.3%)9=
c000      (cache: 91.6%)a8000      (cache: 91.9%)b4000      (cache: 92.2%)c=
0000      (cache: 92.4%)cc000      (cache: 92.6%)d8000      (cache: 92.8%)e=
4000      (cache: 92.9%)f0000      (cache: 93.1%)fc000      (cache: 93.2%)1=
08000      (cache: 93.3%)114000      (cache: 93.4%)120000      (cache: 93.5=
%)12c000      (cache: 93.6%)138000      (cache: 93.7%)144000      (cache: 9=
3.8%)150000      (cache: 93.8%)15c000      (cache: 93.9%)168000      (cache=
: 94.0%)174000      (cache: 94.0%)180000      (cache: 94.1%)18c000      (ca=
che: 94.1%)198000      (cache: 94.2%)1a4000      (cache: 94.2%)1b0000      =
(cache: 94.3%)1bc000      (cache: 94.3%)1c8000      (cache: 94.4%)1d4000   =
   (cache: 94.4%)1e0000      (cache: 94.4%)1ec000      (cache: 94.5%)1f8000=
      (cache: 94.5%)204000      (cache: 94.5%)210000      (cache: 94.6%)21c=
000      (cache: 94.6%)228000      (cache: 94.6%)234000      (cache: 94.6%)=
240000      (cache: 94.7%)24c000      (cache: 94.7%)258000      (cache: 94.=
7%)264000      (cache: 94.7%)270000      (cache: 94.7%)27c000      (cache: =
94.8%)288000      (cache: 94.8%)294000      (cache: 94.8%)2a0000      (cach=
e: 94.8%)2ac000      (cache: 94.8%)2b8000      (cache: 94.8%)2c4000      (c=
ache: 94.9%)2d0000      (cache: 94.9%)2dc000      (cache: 94.9%)2e8000     =
 (cache: 94.9%)2f4000      (cache: 94.9%)300000      (cache: 94.9%)30c000  =
    (cache: 95.0%)318000      (cache: 95.0%)324000      (cache: 95.0%)33000=
0      (cache: 95.0%)33c000      (cache: 95.0%)348000      (cache: 95.0%)35=
4000      (cache: 95.0%)360000      (cache: 95.0%)36c000      (cache: 95.0%=
)378000      (cache: 95.1%)384000      (cache: 95.1%)390000      (cache: 95=
=2E1%)39c000      (cache: 95.1%)3a8000      (cache: 95.1%)3b4000      (cach=
e: 95.1%)3c0000      (cache: 95.1%)3cc000      (cache: 95.1%)3d8000      (c=
ache: 95.1%)3e4000      (cache: 95.1%)3f0000      (cache: 95.1%)3fc000     =
 (cache: 95.1%)408000      (cache: 95.2%)414000      (cache: 95.2%)Zeroing =
memory at 0x710210, size =3D 0x0
Starting ELF64 kernel
Linux version 2.6.24-rc2-gcd60878b-dirty (flo@firewall) (gcc version 4.2.2)=
 #1 Mon Nov 19 14:33:08 CET 2007
ARCH: SGI-IP22
PROMLIB: ARC firmware Version 1 Revision 10
console [early0] enabled
CPU revision is: 00000430 (R4000SC)
FPU revision is: 00000500
MC: SGI memory controller Revision 3
MC: Probing memory configuration:
 bank0:  64M @ 08000000
 bank1:  64M @ 0c000000
Determined physical RAM map:
 memory: 0000000008000000 @ 0000000008000000 (usable)
Wasting 1835008 bytes for tracking 32768 unused pages
Initrd not found or empty - disabling initrd
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 64640
Kernel command line: root=3D/dev/sda1
Primary instruction cache 8kB, VIPT, direct mapped, linesize 16 bytes.
Primary data cache 8kB, direct mapped, VIPT, cache aliases, linesize 16 byt=
es
Unified secondary cache 1024kB direct mapped, linesize 128 bytes.
Synthesized clear page handler (22 instructions).
Synthesized copy page handler (39 instructions).
Synthesized TLB refill handler (38 instructions).
Synthesized TLB load handler fastpath (50 instructions).
Synthesized TLB store handler fastpath (50 instructions).
Synthesized TLB modify handler fastpath (49 instructions).
PID hash table entries: 1024 (order: 10, 8192 bytes)
Calibrating system timer... 200000 [100.0000 MHz CPU]
Using 50.000 MHz high precision timer.
NG1: Revision 3, 8 bitplanes, REX3 revision B, VC2 revision A, xmap9 revisi=
on A, cmap revision C, bt445 revision A
NG1: Screensize 1040x768
Console: colour SGI Newport 130x48
Dentry cache hash table entries: 32768 (order: 6, 262144 bytes)
Inode-cache hash table entries: 16384 (order: 5, 131072 bytes)
Memory: 122336k/131072k available (2925k kernel code, 8448k reserved, 955k =
data, 272k init, 0k highmem)
Kernel bug detected[#1]:
Cpu 0
$ 0   : 0000000000000000 000000001400cce0 0000000000000001 0000000000000000
$ 4   : ffffffff8fc16140 00000000000000d0 00000000000000d0 0000000000000000
$ 8   : ffffffff8fc15000 0000000000000000 ffffffff8fc15030 0000000000000000
$12   : 0000000000100100 0000000000200200 ffffffff883f59a8 ffffffff883f59b8
$16   : ffffffff8fc15180 ffffffff8fc16140 00000000000000d0 ffffffff8fc16140
$20   : 0000000000000080 0000000000000000 0000000000042000 0000000000000000
$24   : 0000000000001463 0000000000000001                                 =
=20
$28   : ffffffff88398000 ffffffff8839bde0 00000000000000d0 ffffffff8808bac8
Hi    : 0000000000000000
Lo    : 0000000000000080
epc   : ffffffff8808bb5c cache_alloc_refill+0x8c/0x710     Not tainted
ra    : ffffffff8808bac8 kmem_cache_alloc+0xe0/0xe8
Status: 1400cce2    KX SX UX KERNEL EXL=20
Cause : 00000034
PrId  : 00000430 (R4000SC)
Modules linked in:
Process swapper (pid: 0, threadinfo=3Dffffffff88398000, task=3Dffffffff8839=
c2a8)
Stack : 00000000000000d0 0000000000000000 000000001400cce1 ffffffff88430000
        00000000000000d0 ffffffff8fc16140 0000000000000080 0000000000000000
        0000000000042000 0000000000042000 ffffffff8834c568 ffffffff8808bac8
        ffffffff8fc16140 ffffffff88430000 ffffffff883acfa0 0000000000000080
        ffffffff882da754 0000000000000080 0000000000000100 0000000000000000
        ffffffff8fc16140 ffffffff8808cdb4 0000001e00000000 0000000000000000
        0000000000000001 ffffffffffffff80 0000000000000000 0000000000000000
        0000000000000000 0000000000000014 ffffffff883acfb0 ffffffff883f57f8
        0000000000040000 ffffffff883acfa0 ffffffff883ad118 ffffffff88430058
        ffffffff883f0000 ffffffff883b0000 ffffffff88430000 ffffffff883e69a0
        ...
Call Trace:
[<ffffffff8808bb5c>] cache_alloc_refill+0x8c/0x710
[<ffffffff8808bac8>] kmem_cache_alloc+0xe0/0xe8
[<ffffffff882da754>] setup_cpu_cache+0x64/0x168
[<ffffffff8808cdb4>] kmem_cache_create+0x37c/0x548
[<ffffffff883e69a0>] kmem_cache_init+0x428/0x430
[<ffffffff883cfb18>] start_kernel+0x270/0x3d8


Code: 14e00002  24020001  2d620001 <00028036> dd720040  1240000d  00000000 =
 8e030004  8e450000=20
Kernel panic - not syncing: Attempted to kill the idle task!

--=20
Florian Lohoff                  flo@rfc822.org             +49-171-2280134
	Those who would give up a little freedom to get a little=20
          security shall soon have neither - Benjamin Franklin

--tThc/1wpZn/ma/RB
Content-Type: application/pgp-signature; name="signature.asc"
Content-Description: Digital signature
Content-Disposition: inline

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Version: GnuPG v1.4.6 (GNU/Linux)

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--tThc/1wpZn/ma/RB--

From mb@bu3sch.de Mon Nov 19 18:25:10 2007
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From:	Michael Buesch <mb@bu3sch.de>
To:	"John W. Linville" <linville@tuxdriver.com>
Subject: Re: ohci-ssb driver on a Broadcom BCM5354
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On Sunday 18 November 2007 23:47:52 John W. Linville wrote:
> You probably want to make Michael Buesch aware of this issue.

I'm not sure anyone really tested this beyond some insmod tests.
I did not test this, as I don't have such a device.
So if you have any patches to fix this, please send them. I'm
certainly the wrong person who can fix this. ;)

-- 
Greetings Michael.

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On Fri, Nov 16, 2007 at 03:52:47PM -0800, Kaz Kylheku wrote:

> From time to time, on 2.6.17.7, I see a deadlock situation go off. The
> soft lockup tick occurs in the middle of do_futex, which is heavily
> inlined.  The system is actually hosed; it's not one of those
> recoverable CPU busy situations that can sometimes trigger the lockup
> detector.

Can you reproduce thing hang also if you're not running in a binary compat
mode, that is either running o32 binaries on a 32-bit kernel or 64-bit
binaries on a 64-bit kernel?

  Ralf

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From ralf@linux-mips.org Mon Nov 19 19:31:39 2007
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From:	Ralf Baechle <ralf@linux-mips.org>
To:	Florian Lohoff <flo@rfc822.org>
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On Mon, Nov 19, 2007 at 05:09:54PM +0100, Florian Lohoff wrote:

> i am seeing strange issues with 64 Bit kernels IP22 on different
> machines. This came up when i tried the debian distribution kernel
> which fails for me on 2 machines.

I still haven't sorted out all the workarounds for the read-from-compare
bug in early R4000 / R4400 with the new time code.  It may not be the
issue that's hitting you but the new time code definately has the potencial
to trigger the issue.

  Ralf

From kaz@zeugmasystems.com Mon Nov 19 21:28:06 2007
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Subject: RE: futex_wake_op deadlock?
Date:	Mon, 19 Nov 2007 13:27:37 -0800
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Ralf Baechle wrote:
> On Fri, Nov 16, 2007 at 03:52:47PM -0800, Kaz Kylheku wrote:
> 
>> From time to time, on 2.6.17.7, I see a deadlock situation go off.
>> The soft lockup tick occurs in the middle of do_futex, which is
>> heavily inlined.  The system is actually hosed; it's not one of those
>> recoverable CPU busy situations that can sometimes trigger the lockup
>> detector.
> 
> Can you reproduce thing hang also if you're not running in a
> binary compat
> mode, that is either running o32 binaries on a 32-bit kernel or
> 64-bit binaries on a 64-bit kernel? 

I have hacked up little a test program which hosed my board within
seconds.
The system is not completely hung. However:

- I can't kill the test program with Ctrl-C.
- I can log into the box with telnet.
- If I run "ps aux" to see all processes, the ps command hangs partway
through the table, and cannot be killed with Ctrl-C.
- System hangs on soft reboot attempt; requires hard reset.

The program basically uses several threads to beat up the FUTEX_WAKE_OP.

The key trick is that there is an interfering thread which does a
mmap/munmap on the futexes in parallel with the threads which are using
them. .

If I just stick the futexes into a permanently good memory location,
nothing bad happens; the program just churns away taking up 400% of the
CPU time across the four cores of the 1480. If you call the function
with permanently bad addresses, nothing bad happens either; the syscalls
bail nicely with EFAULT.

The idea is to tickle some race condition or other bug in the
interaction between futexes and mmap.  I put a little delay into the
interfering thread so that the memory is held in a good state most of
the time, with a quick unmap/remap. We want the memory to be good most
of the time, but an unmap to happen from time to time at an inopportune
time, while the kernel is executing the futex code on one or more cores

This needs to be compiled -pthread, obviously, and you need -lrt to link
in the library for clock_nanosleep.

#include <stdlib.h>
#include <unistd.h>
#include <errno.h>
#include <time.h>
#include <sys/syscall.h>
#include <sys/mman.h>

#define FUTEX_WAIT              0
#define FUTEX_WAKE              1
#define FUTEX_FD                2
#define FUTEX_REQUEUE           3
#define FUTEX_CMP_REQUEUE       4
#define FUTEX_WAKE_OP           5

#define FUTEX_OP_SET            0       /* *(int *)UADDR2 = OPARG; */
#define FUTEX_OP_ADD            1       /* *(int *)UADDR2 += OPARG; */
#define FUTEX_OP_OR             2       /* *(int *)UADDR2 |= OPARG; */
#define FUTEX_OP_ANDN           3       /* *(int *)UADDR2 &= ~OPARG; */
#define FUTEX_OP_XOR            4       /* *(int *)UADDR2 ^= OPARG; */

#define FUTEX_OP_OPARG_SHIFT    8       /* Use (1 << OPARG) instead of
OPARG.  */

#define FUTEX_OP_CMP_EQ         0       /* if (oldval == CMPARG) wake */
#define FUTEX_OP_CMP_NE         1       /* if (oldval != CMPARG) wake */
#define FUTEX_OP_CMP_LT         2       /* if (oldval < CMPARG) wake */
#define FUTEX_OP_CMP_LE         3       /* if (oldval <= CMPARG) wake */
#define FUTEX_OP_CMP_GT         4       /* if (oldval > CMPARG) wake */
#define FUTEX_OP_CMP_GE         5       /* if (oldval >= CMPARG) wake */

#define NUM_THREADS 8

int futex_wake_op(int *addr1, int *addr2, 
                  int nr_wake_1, int nr_wake_2, int encoded_op)
{
    syscall(SYS_futex, addr1, FUTEX_WAKE_OP, nr_wake_1, 
            nr_wake_2, addr2, encoded_op);
}

int futex1 = 0, futex2 = 0;

struct {
    int futex1;
    int futex2;
} *shared;

void *mapper(void *arg)
{
    for (;;) {
        struct timespec delay;
        void *mem;

        delay.tv_sec = 0;
        delay.tv_nsec = 100000000;

        mem = mmap(0, 16384, PROT_READ | PROT_WRITE, MAP_PRIVATE |
MAP_ANONYMOUS, -1, 0);

        if (mem == (void *) -1) {
            perror("mmap");
            exit(EXIT_FAILURE);
        }

        shared = mem;

        clock_nanosleep(CLOCK_MONOTONIC, TIMER_ABSTIME, &delay, 0);

        if (munmap(mem, 16384) < 0) {
            perror("munmap");
            exit(EXIT_FAILURE);
        }
    }
}

void *waker(void *arg)
{
    int rand_state = 1;

    for (;;) {
        int val = rand_r(&rand_state) & 0xFFFF;
        const int op = (FUTEX_OP_SET << 28) | (FUTEX_OP_CMP_GT << 24) |
val;
        int result = futex_wake_op(&shared->futex1, &shared->futex2, 1,
1, op);

        if (result < 0 && errno != EFAULT) {
            perror("futex_wake_op");
            exit(EXIT_FAILURE);
        }
    }

    /* notreached */
    return 0;
}

int main(void)
{
    int i;
    srand(1);

    for (i = 0; i < NUM_THREADS; i++) {
        pthread_t thr;
        void *(*func)(void *) = (i == 0) ? mapper : waker;
        int result = errno = pthread_create(&thr, 0, func, 0);
        if (result != 0) {
            perror("pthread_create");
            return EXIT_FAILURE;
        }
    }

    pthread_exit(0);
}


From kaz@zeugmasystems.com Mon Nov 19 21:42:51 2007
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Subject: RE: futex_wake_op deadlock?
Date:	Mon, 19 Nov 2007 13:42:23 -0800
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From:	"Kaz Kylheku" <kaz@zeugmasystems.com>
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Earlier, I wrote:
> I have hacked up little a test program which hosed my board within
> seconds. The system is not completely hung. However:
> 
> - I can't kill the test program with Ctrl-C.
> - I can log into the box with telnet.
> - If I run "ps aux" to see all processes, the ps command hangs partway
> through the table, and cannot be killed with Ctrl-C.
> - System hangs on soft reboot attempt; requires hard reset.

Furthermore: my console loglevel was too high to see the crash on the
serial console, but, surely enough, the syslog has this:

Nov 19 14:19:57 [kernel] [14:19:57.846017] BUG: soft lockup detected on
CPU#1!
Nov 19 14:19:57 [kernel] [14:19:57.846051] Call Trace:
Nov 19 14:19:58 [kernel] [14:19:57.846069]  [<ffffffff8016de8c>]
softlockup_tick+0x1bc/0x208
Nov 19 14:19:58 [kernel] [14:19:57.846112]  [<ffffffff8014cc54>]
update_process_times+0x9c/0xe8
Nov 19 14:19:58 [kernel] [14:19:57.846147]  [<ffffffff801098bc>]
ll_local_timer_interrupt+0x94/0xa8
Nov 19 14:19:58 [kernel] [14:19:57.846180]  [<ffffffff801098bc>]
ll_local_timer_interrupt+0x94/0xa8
Nov 19 14:19:58 [kernel] [14:19:57.846205]  [<ffffffff801026a0>]
plat_irq_dispatch+0x120/0x1a0
Nov 19 14:19:58 [kernel] [14:19:57.846232]  [<ffffffff80163f28>]
compat_sys_futex+0x0/0x188
Nov 19 14:19:58 [kernel] [14:19:57.846258]  [<ffffffff801637e0>]
do_futex+0x8f8/0xb58
Nov 19 14:19:58 [kernel] [14:19:57.846281]  [<ffffffff8011db28>]
tlb_do_page_fault_1+0x110/0x128
Nov 19 14:19:58 [kernel] [14:19:57.846317]  [<ffffffff80163758>]
do_futex+0x870/0xb58
Nov 19 14:19:58 [kernel] [14:19:57.846339]  [<ffffffff80163f28>]
compat_sys_futex+0x0/0x188
Nov 19 14:19:58 [kernel] [14:19:57.846364]  [<ffffffff80163170>]
do_futex+0x288/0xb58
Nov 19 14:19:58 [kernel] [14:19:57.846385]  [<ffffffff801637e0>]
do_futex+0x8f8/0xb58
Nov 19 14:19:58 [kernel] [14:19:57.846407]  [<ffffffff80163764>]
do_futex+0x87c/0xb58
Nov 19 14:19:58 [kernel] [14:19:57.846430]  [<ffffffff80177500>]
__alloc_pages+0x70/0x398
Nov 19 14:19:58 [kernel] [14:19:57.846456]  [<ffffffff80130d1c>]
try_to_wake_up+0x3c4/0x4f8
Nov 19 14:19:58 [kernel] [14:19:57.846489]  [<ffffffff802f3c28>]
__up_read+0xe8/0x130
Nov 19 14:19:58 [kernel] [14:19:57.846528]  [<ffffffff80163fac>]
compat_sys_futex+0x84/0x188
Nov 19 14:19:58 [kernel] [14:19:57.846552]  [<ffffffff80116314>]
handle_sysn32+0x54/0xb0
Nov 19 14:19:58 [kernel] [14:19:57.846578]  [<ffffffff80163f28>]
compat_sys_futex+0x0/0x188

From kaz@zeugmasystems.com Mon Nov 19 22:26:52 2007
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Subject: RE: "exportfs -a" -> stale NFS filehandle
Date:	Mon, 19 Nov 2007 14:26:24 -0800
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From:	"Kaz Kylheku" <kaz@zeugmasystems.com>
To:	"Ralf Baechle" <ralf@linux-mips.org>
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Last week, I wrote:
> Ralf Baechle wrote:
>> On Thu, Nov 15, 2007 at 11:26:06AM -0800, Kaz Kylheku wrote:
>> 
>>> After backing out the nfsutils patch, the diskless node does boot.
>>> 
>>> However, the original "exportfs -a" problem comes back!
>>> 
>>> So this problem is not resolved simply by using the correct compat
>>> routine; it's deeper. 
>>> 
>>> Sigh.
>> 
>> Thanks for testing anyway!
> 
> I'm continuing to dig into the problem.
> 
> The export logic doesn't even go through nfsctl() anyway,
> which is why I
> originally hadn't even suspected that syscall.
> 
> The nfsexport() function in nfsutils first tries opening
> "/proc/net/rpc/nfsd.fh./channel". If that works, it uses that, via a
> text-based protocol. Only if that interface doesn't exist does it fall
> back on the nfsctl(NFSCTL_EXPORT, ...) interface.

Basically, the export table is being mismanaged. Simply restarting NFS
(service nfs restart) will cause this problem to appear.

When the system is first booted up and NFS is started in runlevel 3 by
the nfs init script, the exportfs command correctly populates the export
table based on the /etc/exports file.

However, after that, further management of the export table fails. Doing
an "exportfs -a" clears it out. You can see the table in
/proc/net/rpc/nfsd.export/content. Before the operation, the table has
valid entries. After the operation, it simply clears out and stays
empty. 

This is in spite of the fact that the exportfs command seems to be doing
exactly what it did the first time when NFS was successfully started
(i.e. it's a kernel problem; user space is doing the same thing that
worked before).

I verified that by turning on various additional tracing with sysctl
(sunrpc.nfsd_debug), and I added some extra traces to the function that
adds exports (svc_export_parse) to view the messages that are coming
down the nfsd.fh/channel pipe in /proc.

So the summary is that this problem appears to be some kind of
corruption of the RPC cache for exports.

I did see the kernel crash with an alignment exception once upon
reproducing the problem, but haven't been able to repro that.

From zzh.hust@gmail.com Tue Nov 20 01:06:52 2007
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Date:	Tue, 20 Nov 2007 09:06:39 +0800
From:	zhuzhenhua <zzh.hust@gmail.com>
To:	linux-mips <linux-mips@linux-mips.org>
Subject: how to use memory before kernel load address?
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hello,all
          i want to place my kernel loadaddr=0x81008000 and set
EBASE=0x81000000, it workes.
         but there is still some memory usable before 0x81000000, for
example from 0x80100000 ~ 0x80200000
         i have try to pass param as mem=1M@1M mem=16M@16M  to the kernel,
it seems only take the 0x8000000 ~ kernel_end as reserved.
         is there any other options to set the memory useable? ( my kernel
version is 2.6.14)
         thanks for any hints


zzh

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hello,all<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; i want to place
my kernel loadaddr=0x81008000 and set EBASE=0x81000000, it workes.<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; but there is still
some memory usable before 0x81000000, for example from 0x80100000 ~
0x80200000<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; i have try to pass
param as mem=1M@1M mem=16M@16M&nbsp; to the kernel,&nbsp; it seems only
take the 0x8000000 ~ kernel_end as reserved.<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; is there any other
options to set the memory useable? ( my kernel version is 2.6.14)<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; thanks for any hints<br>
<br>
<br>
zzh<br>

------=_Part_24399_24804143.1195520799125--

From joe@perches.com Tue Nov 20 02:02:09 2007
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Subject: [PATCH 02/59] arch/mips: Add missing "space"
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Signed-off-by: Joe Perches <joe@perches.com>
---
 arch/mips/kernel/vpe.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c
index 38bd33f..c06eb81 100644
--- a/arch/mips/kernel/vpe.c
+++ b/arch/mips/kernel/vpe.c
@@ -470,7 +470,7 @@ static int apply_r_mips_lo16(struct module *me, uint32_t *location,
 			 */
  			if (v != l->value) {
 				printk(KERN_DEBUG "VPE loader: "
-				       "apply_r_mips_lo16/hi16: 	"
+				       "apply_r_mips_lo16/hi16: \t"
 				       "inconsistent value information\n");
 				return -ENOEXEC;
 			}
@@ -629,7 +629,7 @@ static void simplify_symbols(Elf_Shdr * sechdrs,
 			break;
 
 		case SHN_MIPS_SCOMMON:
-			printk(KERN_DEBUG "simplify_symbols: ignoring SHN_MIPS_SCOMMON"
+			printk(KERN_DEBUG "simplify_symbols: ignoring SHN_MIPS_SCOMMON "
 			       "symbol <%s> st_shndx %d\n", strtab + sym[i].st_name,
 			       sym[i].st_shndx);
 			// .sbss section
-- 
1.5.3.5.652.gf192c


From markus.gothe@27m.se Tue Nov 20 02:48:54 2007
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Subject: Re: [SPAM] Re: IP22 64Bit arcboot - current git crashes on 3 machines at different points
Date:	Tue, 20 Nov 2007 03:49:07 +0100
To:	Ralf Baechle <ralf@linux-mips.org>
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Afaik R4x00 is just semi-64bit in contrast to the R5K, which derives  
from the R10K.

//Markus

On 19 Nov 2007, at 20:31, Ralf Baechle wrote:

> On Mon, Nov 19, 2007 at 05:09:54PM +0100, Florian Lohoff wrote:
>
>> i am seeing strange issues with 64 Bit kernels IP22 on different
>> machines. This came up when i tried the debian distribution kernel
>> which fails for me on 2 machines.
>
> I still haven't sorted out all the workarounds for the read-from- 
> compare
> bug in early R4000 / R4400 with the new time code.  It may not be the
> issue that's hitting you but the new time code definately has the  
> potencial
> to trigger the issue.
>
>   Ralf
>


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Subject: Re: [SPAM] how to use memory before kernel load address?
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Are you using a MTD, if so just create a partition there.

//Markus

On 20 Nov 2007, at 02:06, zhuzhenhua wrote:

> hello,all
>           i want to place my kernel loadaddr=0x81008000 and set  
> EBASE=0x81000000, it workes.
>          but there is still some memory usable before 0x81000000,  
> for example from 0x80100000 ~ 0x80200000
>          i have try to pass param as mem=1M@1M mem=16M@16M  to the  
> kernel,  it seems only take the 0x8000000 ~ kernel_end as reserved.
>          is there any other options to set the memory useable? ( my  
> kernel version is 2.6.14)
>          thanks for any hints
>
>
> zzh


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From david.kuk@entone.com Tue Nov 20 04:23:38 2007
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From:	"David Kuk" <david.kuk@entone.com>
To:	"David Daney" <ddaney@avtrex.com>
Subject: Re: smp8634 add memory at dram1
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Thanks you all for helping.

AS Daney suggested, I have map the dram1's first 64 MB memory (total 128) to
remap register 3,
and add the remap register 3 into the BOOT_MEMROY_RAM use the method
add_memory_region.
When i bootup the linux kernel print out that it have totally 176MB ram ,
which is 06fe0000@10020000(dram0) and 04000000@08000000(64mb dram1 at remap
register3). How ever, This mapping shows that the total memory in the linux
kernel is not contiguous. the OS can run, but as i see the source code, when
the kernel divided these memory into pages, it did not consider  if the
memory is contiguous or not, is it ok ? and  how should i  allocate the
memories into ZONE[DMA] and ZONE[NORMAL], is it possible if I wish all the
176MB memory can be allocate as ZONE[DMA]?


Best wishes
David




On 11/15/07, David Daney <ddaney@avtrex.com> wrote:
>
> David Kuk wrote:
> > After study about the memory configuration of sigma smp8634, i found
> > some difficult to accomplish the task.
> >
> > so my question is if have two 128MB ram separately under dram0 and
> > dram1 controller, where dram0 for linux and dram1 for video decoding.
> > Now the situation is the memory for linux is not enough and video
> > decoding can not use all of it's 128MB at dram1, what we plan to do is
> > to share 64MB at dram1 to the linux kernel as high memory, and only
> > reserved 64MB at dram1 for the video decoding.
> >
> > first, in MIPS architecture, we found that the kseg0 and kseg1 are
> > mapped to 0x00000000-0x20000000, which include only dram0 controller,
> > so we wish to add the dram1 memory manually to the kernel using
> > function add_memory_region at setup.c , after booting up result the
> > warning that the memory larger than 512 need to configured the kernel
> > support high memory.
> >
> > then when we configure the kernel to support high memory at menu
> > configure, the kernel when booting up will remind us our CPU do not
> > support high memory due to cache aliases.
> >
> > Both way will lead the linux can not boot up normally, so what should
> > we do, is there any mis-understanding about the hardware
> > implementation or MIPS design?
>
> I think your understanding of the 8634 is at least close to correct.
>
> It may be possible (but I have not tried it yet) to use the remapping
> registers to move dram1 into the first 512MB of the memory space.  If it
> is possible, you would then have to modify the gbus access functions
> accordingly.  Also the 8634 media drivers would probably have to be
> changed as well.  I am not sure about the microcode for the media DSPs,
> but if it is dependent on the mapping of the DRAM, then you would
> probably have to get the vendor's help.
>
> Let me know if you are successful.
>
> Thanks,
> David Daney
>
>

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Thanks you all for helping.<br><br>AS Daney suggested, I have map the dram1&#39;s first 64 MB memory (total 128) to remap register 3,<br>and add the remap register 3 into the BOOT_MEMROY_RAM use the method add_memory_region.
<br>When i bootup the linux kernel print out that it have totally 176MB ram , which is 06fe0000@10020000(dram0) and 04000000@08000000(64mb dram1 at remap register3). How ever, This mapping shows that the total memory in the linux kernel is not contiguous. the OS can run, but as i see the source code, when the kernel divided these memory into pages, it did not consider&nbsp; if the memory is contiguous or not, is it ok ? and&nbsp; how should i&nbsp; allocate the memories into ZONE[DMA] and ZONE[NORMAL], is it possible if I wish all the 176MB memory can be allocate as ZONE[DMA]? 
<br><br><br>Best wishes<br>David <br><br><br><br><br><div><span class="gmail_quote">On 11/15/07, <b class="gmail_sendername">David Daney</b> &lt;<a href="mailto:ddaney@avtrex.com">ddaney@avtrex.com</a>&gt; wrote:</span><blockquote class="gmail_quote" style="border-left: 1px solid rgb(204, 204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;">
David Kuk wrote:<br>&gt; After study about the memory configuration of sigma smp8634, i found<br>&gt; some difficult to accomplish the task.<br>&gt;<br>&gt; so my question is if have two 128MB ram separately under dram0 and
<br>&gt; dram1 controller, where dram0 for linux and dram1 for video decoding.<br>&gt; Now the situation is the memory for linux is not enough and video<br>&gt; decoding can not use all of it&#39;s 128MB at dram1, what we plan to do is
<br>&gt; to share 64MB at dram1 to the linux kernel as high memory, and only<br>&gt; reserved 64MB at dram1 for the video decoding.<br>&gt;<br>&gt; first, in MIPS architecture, we found that the kseg0 and kseg1 are<br>&gt; mapped to 0x00000000-0x20000000, which include only dram0 controller,
<br>&gt; so we wish to add the dram1 memory manually to the kernel using<br>&gt; function add_memory_region at setup.c , after booting up result the<br>&gt; warning that the memory larger than 512 need to configured the kernel
<br>&gt; support high memory.<br>&gt;<br>&gt; then when we configure the kernel to support high memory at menu<br>&gt; configure, the kernel when booting up will remind us our CPU do not<br>&gt; support high memory due to cache aliases.
<br>&gt;<br>&gt; Both way will lead the linux can not boot up normally, so what should<br>&gt; we do, is there any mis-understanding about the hardware<br>&gt; implementation or MIPS design?<br><br>I think your understanding of the 8634 is at least close to correct.
<br><br>It may be possible (but I have not tried it yet) to use the remapping<br>registers to move dram1 into the first 512MB of the memory space.&nbsp;&nbsp;If it<br>is possible, you would then have to modify the gbus access functions
<br>accordingly.&nbsp;&nbsp;Also the 8634 media drivers would probably have to be<br>changed as well.&nbsp;&nbsp;I am not sure about the microcode for the media DSPs,<br>but if it is dependent on the mapping of the DRAM, then you would<br>probably have to get the vendor&#39;s help.
<br><br>Let me know if you are successful.<br><br>Thanks,<br>David Daney<br><br></blockquote></div><br>

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From share.kt@gmail.com Tue Nov 20 06:39:37 2007
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Hi All,

void *mmap(void *start, size_t length, int prot, int flags,           int
fd, off_t offset);

I am providing 16,00,000 as length parameter in mmap command.
It is giving me error as Can't mmap region. on the other hand when i am
providing 9,00,000 as length parameter in mmap command.
It is successful.
This mmap command is being issued from User space.

On the other hand in the framebuffer driver in the kernel spce i have
specified the length of mmio in the ioremap as 16,00,000.

Can anybody provide any clue on it?
I want to access the mmio regs at offset ( 0 to  16,00,000).

-- 
Thanks & Regards,
kaka

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<div>Hi All,</div>
<div>&nbsp;</div>
<div>void *mmap(void *start, size_t length, int prot, int flags,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; int<br>fd, off_t offset);<br>&nbsp;</div>
<div>I am providing 16,00,000 as length parameter in mmap command.</div>
<div>It is giving me error as Can&#39;t mmap region. on the other hand when i am providing 9,00,000 as length parameter in mmap command.</div>
<div>It is successful.<br clear="all">This mmap command is being issued from User space.</div>
<div>&nbsp;</div>
<div>On the other hand in the framebuffer driver in the kernel spce i have specified the length of mmio in the ioremap as 16,00,000.</div>
<div>&nbsp;</div>
<div>Can anybody provide any clue on it?</div>
<div>I want to access the mmio regs at offset (&nbsp;0 to&nbsp; 16,00,000).</div>
<div><br>-- <br>Thanks &amp; Regards,<br>kaka </div>

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From tsbogend@alpha.franken.de Tue Nov 20 08:18:56 2007
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On Tue, Nov 20, 2007 at 03:49:07AM +0100, Markus Gothe wrote:
> Afaik R4x00 is just semi-64bit in contrast to the R5K, which derives  
> from the R10K.

how about reading documents ? Early R4k have ugly bugs in 64bit mode,
but starting with rev5 they run 64bit code pretty well. And R5k does
in no way derive from R10k.

Thomas.

-- 
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From dok@directfb.org Tue Nov 20 08:33:00 2007
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kaka wrote:
> Hi All,
> 
> void *mmap(void *start, size_t length, int prot, int flags,           int
> fd, off_t offset);
> 
> I am providing 16,00,000 as length parameter in mmap command.
> It is giving me error as Can't mmap region. on the other hand when i am
> providing 9,00,000 as length parameter in mmap command.
> It is successful.
> This mmap command is being issued from User space.
> 
> On the other hand in the framebuffer driver in the kernel spce i have
> specified the length of mmio in the ioremap as 16,00,000.

The ioremap() is independent of the values propagated to user space
and fbmem.c via fix.mmio_start and fix.mmio_len, please check these.

-- 
Best regards,
  Denis Oliver Kropp

.------------------------------------------.
| DirectFB - Hardware accelerated graphics |
| http://www.directfb.org/                 |
"------------------------------------------"

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Subject: Usage of mmap command
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Hi Denis,

Thanks for the reply.
I am writing gfxdriver for directFB library for broadcom chip.
I have also written a frambuffer driver for broadcom chip.
In directFB code,

static volatile void *
system_map_mmio( unsigned int    offset,
                 int             length )
{
     void *addr;

     if (length <= 0)
          length = dfb_fbdev->shared->fix.mmio_len;

     addr = mmap( NULL, length, PROT_READ | PROT_WRITE, MAP_SHARED,
                  dfb_fbdev->fd, dfb_fbdev->shared->fix.smem_len + offset );
     if ((int)(addr) == -1) {
          D_PERROR( "DirectFB/FBDev: Could not mmap MMIO region "
                     "(offset %d, length %d)!\n", offset, length );
          return NULL;
     }

     return(volatile void*) ((u8*) addr + (dfb_fbdev->shared->fix.mmio_start&
                                           dfb_fbdev->shared->page_mask));
}


the length and offset i am providing as 0 and -1.
It is throwing me error as Could not mmap MMIO region.
length coming from dfb_fbdev->shared->fix.smem_len is 16,00,000.
When i change the code to  addr = mmap( NULL, 900000, PROT_READ |
PROT_WRITE, MAP_SHARED, dfb_fbdev->fd, dfb_fbdev->shared->fix.smem_len +
offset );
Then it works fine but it is not allowing me to write to addresses with
offset greater than 900000.

My requirement is to write in to the MMIO registers with offset between
900000 and 16 00 000.

Could you please help me in htis regard?

Thanks in Advance.




On 11/20/07, Denis Oliver Kropp <dok@directfb.org> wrote:
>
> kaka wrote:
> > Hi All,
> >
> > void *mmap(void *start, size_t length, int prot, int flags,
> int
> > fd, off_t offset);
> >
> > I am providing 16,00,000 as length parameter in mmap command.
> > It is giving me error as Can't mmap region. on the other hand when i am
> > providing 9,00,000 as length parameter in mmap command.
> > It is successful.
> > This mmap command is being issued from User space.
> >
> > On the other hand in the framebuffer driver in the kernel spce i have
> > specified the length of mmio in the ioremap as 16,00,000.
>
> The ioremap() is independent of the values propagated to user space
> and fbmem.c via fix.mmio_start and fix.mmio_len, please check these.
>
> --
> Best regards,
> Denis Oliver Kropp
>
> .------------------------------------------.
> | DirectFB - Hardware accelerated graphics |
> | http://www.directfb.org/                 |
> "------------------------------------------"
>



-- 
Thanks & Regards,
kaka

------=_Part_21958_9268475.1195551637153
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<div>Hi Denis,</div>
<div>&nbsp;</div>
<div>Thanks for the reply.</div>
<div>I am writing gfxdriver for directFB library for broadcom chip.</div>
<div>I have also written a frambuffer driver for broadcom chip.</div>
<div>In directFB code,</div>
<p>static volatile void *<br>system_map_mmio( unsigned int&nbsp;&nbsp;&nbsp; offset,<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; int&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; length )<br>{<br>&nbsp;&nbsp;&nbsp;&nbsp; void *addr;</p>
<p>&nbsp;&nbsp;&nbsp;&nbsp; if (length &lt;= 0)<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; length = dfb_fbdev-&gt;shared-&gt;fix.mmio_len;</p>
<p>&nbsp;&nbsp;&nbsp;&nbsp; addr = mmap( NULL, length, PROT_READ | PROT_WRITE, MAP_SHARED,<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; dfb_fbdev-&gt;fd, dfb_fbdev-&gt;shared-&gt;fix.smem_len + offset );<br>&nbsp;&nbsp;&nbsp;&nbsp; if ((int)(addr) == -1) {<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; D_PERROR( &quot;DirectFB/FBDev: Could not mmap MMIO region &quot;
<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &quot;(offset %d, length %d)!\n&quot;, offset, length );<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; return NULL;<br>&nbsp;&nbsp;&nbsp;&nbsp; }</p>
<p>&nbsp;&nbsp;&nbsp;&nbsp; return(volatile void*) ((u8*) addr + (dfb_fbdev-&gt;shared-&gt;fix.mmio_start &amp;<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; dfb_fbdev-&gt;shared-&gt;page_mask));<br>}<br></p>
<p>&nbsp;</p>
<div>the length and offset i am providing as 0 and -1.</div>
<div>It is throwing me error as Could not mmap MMIO region.</div>
<div>length coming from dfb_fbdev-&gt;shared-&gt;fix.smem_len is 16,00,000.</div>
<div>When i change the code to&nbsp;&nbsp;addr = mmap( NULL, 900000, PROT_READ | PROT_WRITE, MAP_SHARED,&nbsp;dfb_fbdev-&gt;fd, dfb_fbdev-&gt;shared-&gt;fix.smem_len + offset );</div>
<div>Then it works fine but it is not allowing me to write to addresses with offset greater than 900000.</div>
<div>&nbsp;</div>
<div>My requirement is to write in to the MMIO registers with offset between 900000 and 16 00 000.</div>
<div>&nbsp;</div>
<div>Could you please help me in htis regard?</div>
<div>&nbsp;</div>
<div>Thanks in Advance.<br>&nbsp;</div>
<div><br><br>&nbsp;</div>
<div><span class="gmail_quote">On 11/20/07, <b class="gmail_sendername">Denis Oliver Kropp</b> &lt;<a href="mailto:dok@directfb.org">dok@directfb.org</a>&gt; wrote:</span>
<blockquote class="gmail_quote" style="PADDING-LEFT: 1ex; MARGIN: 0px 0px 0px 0.8ex; BORDER-LEFT: #ccc 1px solid">kaka wrote:<br>&gt; Hi All,<br>&gt;<br>&gt; void *mmap(void *start, size_t length, int prot, int flags,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; int
<br>&gt; fd, off_t offset);<br>&gt;<br>&gt; I am providing 16,00,000 as length parameter in mmap command.<br>&gt; It is giving me error as Can&#39;t mmap region. on the other hand when i am<br>&gt; providing 9,00,000 as length parameter in mmap command.
<br>&gt; It is successful.<br>&gt; This mmap command is being issued from User space.<br>&gt;<br>&gt; On the other hand in the framebuffer driver in the kernel spce i have<br>&gt; specified the length of mmio in the ioremap as 16,00,000.
<br><br>The ioremap() is independent of the values propagated to user space<br>and fbmem.c via fix.mmio_start and fix.mmio_len, please check these.<br><br>--<br>Best regards,<br>Denis Oliver Kropp<br><br>.------------------------------------------.
<br>| DirectFB - Hardware accelerated graphics |<br>| <a href="http://www.directfb.org/">http://www.directfb.org/</a>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |<br>&quot;------------------------------------------&quot;<br></blockquote></div><br><br clear="all">
<br>-- <br>Thanks &amp; Regards,<br>kaka 

------=_Part_21958_9268475.1195551637153--

From dok@directfb.org Tue Nov 20 10:46:10 2007
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kaka wrote:
> Hi Denis,
> 
> Thanks for the reply.
> I am writing gfxdriver for directFB library for broadcom chip.
> I have also written a frambuffer driver for broadcom chip.

Directly for broadcom or at another company?

> In directFB code,
> 
> static volatile void *
> system_map_mmio( unsigned int    offset,
>                  int             length )
> {
>      void *addr;
> 
>      if (length <= 0)
>           length = dfb_fbdev->shared->fix.mmio_len;
> 
>      addr = mmap( NULL, length, PROT_READ | PROT_WRITE, MAP_SHARED,
>                   dfb_fbdev->fd, dfb_fbdev->shared->fix.smem_len + offset );
>      if ((int)(addr) == -1) {
>           D_PERROR( "DirectFB/FBDev: Could not mmap MMIO region "
>                      "(offset %d, length %d)!\n", offset, length );
>           return NULL;
>      }
> 
>      return(volatile void*) ((u8*) addr + (dfb_fbdev->shared->fix.mmio_start&
>                                            dfb_fbdev->shared->page_mask));
> }

Can you add printfs to show dfb_fbdev->shared->fix.mmio_start, mmio_len,
smem_start and smem_len?

> the length and offset i am providing as 0 and -1.

You mean offset 0 and length -1?

> It is throwing me error as Could not mmap MMIO region.
> length coming from dfb_fbdev->shared->fix.smem_len is 16,00,000.

1600000 = 1.6MB?

> When i change the code to  addr = mmap( NULL, 900000, PROT_READ |
> PROT_WRITE, MAP_SHARED, dfb_fbdev->fd, dfb_fbdev->shared->fix.smem_len +
> offset );

You changed the length to 900000, but you need to use this to map offset
900000:

addr = mmap( NULL, length, PROT_READ | PROT_WRITE, MAP_SHARED,
dfb_fbdev->fd, 900000 );

But it should work if you set smem_len to 900000 in the fb driver.

> Then it works fine but it is not allowing me to write to addresses with
> offset greater than 900000.

Segfault?

> My requirement is to write in to the MMIO registers with offset between
> 900000 and 16 00 000.

What exactly is your frame buffer size and physical MMIO address?

You need to put the frame buffer size into smem_len and the physical
MMIO address into mmio_start, the length into mmio_len.

-- 
Best regards,
  Denis Oliver Kropp

.------------------------------------------.
| DirectFB - Hardware accelerated graphics |
| http://www.directfb.org/                 |
"------------------------------------------"

From ralf@linux-mips.org Tue Nov 20 11:22:07 2007
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From:	Ralf Baechle <ralf@linux-mips.org>
To:	Kaz Kylheku <kaz@zeugmasystems.com>
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Subject: Re: futex_wake_op deadlock?
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On Mon, Nov 19, 2007 at 01:27:37PM -0800, Kaz Kylheku wrote:

> >> From time to time, on 2.6.17.7, I see a deadlock situation go off.
> >> The soft lockup tick occurs in the middle of do_futex, which is
> >> heavily inlined.  The system is actually hosed; it's not one of those
> >> recoverable CPU busy situations that can sometimes trigger the lockup
> >> detector.
> > 
> > Can you reproduce thing hang also if you're not running in a
> > binary compat
> > mode, that is either running o32 binaries on a 32-bit kernel or
> > 64-bit binaries on a 64-bit kernel? 
> 
> I have hacked up little a test program which hosed my board within
> seconds.
> The system is not completely hung. However:

Cute.  So looking again at the futex code this morning it was quite
obvious what happened.  The ll/sc loops in __futex_atomic_op() had the
usual fixups necessary for memory acccesses to userspace from kernel
space installed:

        __asm__ __volatile__(
        "       .set    push                            \n"
        "       .set    noat                            \n"
        "       .set    mips3                           \n"
        "1:     ll      %1, %4  # __futex_atomic_op     \n"
        "       .set    mips0                           \n"
        "       " insn  "                               \n"
        "       .set    mips3                           \n"
        "2:     sc      $1, %2                          \n"
        "       beqz    $1, 1b                          \n"
        __WEAK_LLSC_MB
        "3:                                             \n"
        "       .set    pop                             \n"
        "       .set    mips0                           \n"
        "       .section .fixup,\"ax\"                  \n"
        "4:     li      %0, %6                          \n"
        "       j       2b                              \n"	<-----
        "       .previous                               \n"
        "       .section __ex_table,\"a\"               \n"
        "       "__UA_ADDR "\t1b, 4b                    \n"
        "       "__UA_ADDR "\t2b, 4b                    \n"
        "       .previous                               \n"
        : "=r" (ret), "=&r" (oldval), "=R" (*uaddr)
        : "0" (0), "R" (*uaddr), "Jr" (oparg), "i" (-EFAULT)
        : "memory");

Notice the branch at the end of the fixup code, it goes back to the
SC instruction.  The SC instruction took an exception so it will not have
changed $1 so the loop will continue endless unless by coincidence the
value to be stored from $1 happened to be zero.

Obviously this one was MIPS specific and may hit all supported ABIs.  So
my initial suspicion this might be the issue David Miller recently
discovered in the binary compat code isn't true.  And it's a local DoS
probably for all of 2.6.16 and up.

Patch below.  It fixes your test case on a 32-bit kernel for me.

  Ralf

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/include/asm-mips/futex.h b/include/asm-mips/futex.h
index 3e7e30d..17f082c 100644
--- a/include/asm-mips/futex.h
+++ b/include/asm-mips/futex.h
@@ -35,7 +35,7 @@
 		"	.set	mips0				\n"	\
 		"	.section .fixup,\"ax\"			\n"	\
 		"4:	li	%0, %6				\n"	\
-		"	j	2b				\n"	\
+		"	j	3b				\n"	\
 		"	.previous				\n"	\
 		"	.section __ex_table,\"a\"		\n"	\
 		"	"__UA_ADDR "\t1b, 4b			\n"	\
@@ -61,7 +61,7 @@
 		"	.set	mips0				\n"	\
 		"	.section .fixup,\"ax\"			\n"	\
 		"4:	li	%0, %6				\n"	\
-		"	j	2b				\n"	\
+		"	j	3b				\n"	\
 		"	.previous				\n"	\
 		"	.section __ex_table,\"a\"		\n"	\
 		"	"__UA_ADDR "\t1b, 4b			\n"	\

From ralf@linux-mips.org Tue Nov 20 11:39:33 2007
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	machines at different points
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On Tue, Nov 20, 2007 at 03:49:07AM +0100, Markus Gothe wrote:

> Afaik R4x00 is just semi-64bit in contrast to the R5K, which derives from 
> the R10K.

Total rubbish.  The R4x00 family hardly is a family but just happens to
have similar type numbers.

  o R4000/R4400 are very close related, 64-bit databus
  o R4100, R4200, R4300 series only have 32-bit databus and are low end
    embedded stuff.  All these have 32-bit external busses only.
  o R4600 was designed by Qed shortly after the R4000 was developed by
    MIPS.  It has a much shorted pipeline, consumes less power and performs
    better except for the most heavy FP apps.  The R4700 is a slightly
    improved version of the R4600 and catches up on FP too but was rarely
    used.
  o R5000 has alot of similarities to the R4600/R4700 and was also designed
    by QED.  Not sure if it really should be considered a derivate of these.
    The RM7000 and RM9000 family eventually continued this line of evolution.
  o R10000 is a no-prisoners-taken from scratch OOO CPU design released in
    '94 and to become SGI's highend processor.  The architecture is
    aggressive to the point where it even today looks complex - but that
    also means that the R10000 implementation have hardly any similarity
    with their predecessors.   The R12000 is a slightly beefed up shrink of
    the R10000, the R14000 is the same to the R12000 and the R16000 is one
    more shrink.  Conventional wisdom is that the 2nd shrink already going
    to return diminishing returns but it seems to have worked for SGI.

And of course all these are are MIPS III/MIPS IV processors, so modulo
bugs and sanity fully 64-bit software capable.

  Ralf

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From:	Thiemo Seufer <ths@networkno.de>
To:	zhuzhenhua <zzh.hust@gmail.com>
Cc:	linux-mips <linux-mips@linux-mips.org>
Subject: Re: how to use memory before kernel load address?
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zhuzhenhua wrote:
> hello,all
>           i want to place my kernel loadaddr=0x81008000 and set
> EBASE=0x81000000, it workes.
>          but there is still some memory usable before 0x81000000, for
> example from 0x80100000 ~ 0x80200000

The obvious thing to do seems to set LOARADDR to 0x80208000.

>          i have try to pass param as mem=1M@1M mem=16M@16M  to the kernel,
> it seems only take the 0x8000000 ~ kernel_end as reserved.
>          is there any other options to set the memory useable? ( my kernel
> version is 2.6.14)
>          thanks for any hints

AFAIR the kernel assumes to occupy the lowest addresses of the usable RAM.


Thiemo

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On Tue, 20 Nov 2007 13:04:51 +0000, Thiemo Seufer <ths@networkno.de> wrote:
> >          i have try to pass param as mem=1M@1M mem=16M@16M  to the kernel,
> > it seems only take the 0x8000000 ~ kernel_end as reserved.
> >          is there any other options to set the memory useable? ( my kernel
> > version is 2.6.14)
> >          thanks for any hints
> 
> AFAIR the kernel assumes to occupy the lowest addresses of the usable RAM.

You can use prom_free_prom_memory() to give some low pages back to kernel.

---
Atsushi Nemoto

From kaz@zeugmasystems.com Tue Nov 20 18:06:53 2007
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Subject: RE: futex_wake_op deadlock?
Date:	Tue, 20 Nov 2007 10:06:44 -0800
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From:	"Kaz Kylheku" <kaz@zeugmasystems.com>
To:	"Ralf Baechle" <ralf@linux-mips.org>
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Ralf Baechle wrote:
>         __asm__ __volatile__(
>         "       .set    push                            \n"
>         "       .set    noat                            \n"
>         "       .set    mips3                           \n"
>         "1:     ll      %1, %4  # __futex_atomic_op     \n"
>         "       .set    mips0                           \n"
>         "       " insn  "                               \n"
>         "       .set    mips3                           \n"
>         "2:     sc      $1, %2                          \n"
>         "       beqz    $1, 1b                          \n"        
>         __WEAK_LLSC_MB "3:                                           
>         \n" "       .set    pop                             \n"
>         "       .set    mips0                           \n"
>         "       .section .fixup,\"ax\"                  \n"
>         "4:     li      %0, %6                          \n"
>         "       j       2b                              \n"	<-----
>         "       .previous                               \n"
>         "       .section __ex_table,\"a\"               \n"
>         "       "__UA_ADDR "\t1b, 4b                    \n"
>         "       "__UA_ADDR "\t2b, 4b                    \n"
>         "       .previous                               \n"
>         : "=r" (ret), "=&r" (oldval), "=R" (*uaddr)
>         : "0" (0), "R" (*uaddr), "Jr" (oparg), "i" (-EFAULT)        
> : "memory"); 
> 
> Notice the branch at the end of the fixup code, it goes back to the
> SC instruction. 

Hi Ralf,

I had gone through all that code, but didn't see it!

The problem is I didn't pay enough attention because I didn't suspect it
enough.

I was misled by the backtrace address in the soft lockup dump, which
points to one instruction /before/ the ll instruction. So I thought that
the lockup is somewhere outside of that loop, right?

Does the backward branch on MIPS set up the instruction pointer in such
a way that if an interrupt goes off, it can be pointing to the previous
instruction? I thought about that possibility.

From ralf@linux-mips.org Tue Nov 20 18:16:20 2007
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From:	Ralf Baechle <ralf@linux-mips.org>
To:	Kaz Kylheku <kaz@zeugmasystems.com>
Cc:	linux-mips@linux-mips.org
Subject: Re: futex_wake_op deadlock?
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On Tue, Nov 20, 2007 at 10:06:44AM -0800, Kaz Kylheku wrote:

> The problem is I didn't pay enough attention because I didn't suspect it
> enough.
> 
> I was misled by the backtrace address in the soft lockup dump, which
> points to one instruction /before/ the ll instruction. So I thought that
> the lockup is somewhere outside of that loop, right?
> 
> Does the backward branch on MIPS set up the instruction pointer in such
> a way that if an interrupt goes off, it can be pointing to the previous
> instruction? I thought about that possibility.

The EPC will always point to the instruction which caused the exception
with the one special case where an instruction in a branch delay slot
was causing the exception.  If that's the case the EPC will point at the
branch and the BD bit in the cause register (bit 31) will be set to
indicate this special case.

  Ralf

From kaz@zeugmasystems.com Tue Nov 20 18:24:57 2007
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Subject: RE: futex_wake_op deadlock?
Date:	Tue, 20 Nov 2007 10:24:27 -0800
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From:	"Kaz Kylheku" <kaz@zeugmasystems.com>
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Ralf Baechle wrote:
> Patch below.  It fixes your test case on a 32-bit kernel for me.

I'm running it now on 64 bit. The test case isn't causing any ill
effects.

Thanks a lot, Ralf!

From ddaney@avtrex.com Tue Nov 20 18:30:26 2007
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Ralf Baechle wrote:

> 
> Notice the branch at the end of the fixup code, it goes back to the
> SC instruction.  The SC instruction took an exception so it will not have
> changed $1 so the loop will continue endless unless by coincidence the
> value to be stored from $1 happened to be zero.
> 
> Obviously this one was MIPS specific and may hit all supported ABIs.  So
> my initial suspicion this might be the issue David Miller recently
> discovered in the binary compat code isn't true.  And it's a local DoS
> probably for all of 2.6.16 and up.
> 

I mostly similar code is in 2.6.15, so I think it is effected as well. 
2.6.12 on the other hand doesn't seem to have futex.h

David Daney

From ralf@linux-mips.org Tue Nov 20 19:00:44 2007
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Subject: Re: futex_wake_op deadlock?
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On Tue, Nov 20, 2007 at 10:29:47AM -0800, David Daney wrote:

>> Notice the branch at the end of the fixup code, it goes back to the
>> SC instruction.  The SC instruction took an exception so it will not have
>> changed $1 so the loop will continue endless unless by coincidence the
>> value to be stored from $1 happened to be zero.
>>
>> Obviously this one was MIPS specific and may hit all supported ABIs.  So
>> my initial suspicion this might be the issue David Miller recently
>> discovered in the binary compat code isn't true.  And it's a local DoS
>> probably for all of 2.6.16 and up.
>>
>
> I mostly similar code is in 2.6.15, so I think it is effected as well. 
> 2.6.12 on the other hand doesn't seem to have futex.h

It originally appeared in the lmo kernel for 2.6.14-rc1 and a little
after the 2.6.14 release in kernel.org.

If I say 2.6.16 then it's simply that I don't ever look at anything that
doesn't have a -stable branch.

  Ralf

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Date:	Wed, 21 Nov 2007 11:58:32 +0800
From:	zhuzhenhua <zzh.hust@gmail.com>
To:	"Thiemo Seufer" <ths@networkno.de>
Subject: Re: how to use memory before kernel load address?
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On 11/20/07, Thiemo Seufer <ths@networkno.de> wrote:
> zhuzhenhua wrote:
> > hello,all
> >           i want to place my kernel loadaddr=0x81008000 and set
> > EBASE=0x81000000, it workes.
> >          but there is still some memory usable before 0x81000000, for
> > example from 0x80100000 ~ 0x80200000
>
> The obvious thing to do seems to set LOARADDR to 0x80208000.
>
> >          i have try to pass param as mem=1M@1M mem=16M@16M  to the kernel,
> > it seems only take the 0x8000000 ~ kernel_end as reserved.
> >          is there any other options to set the memory useable? ( my kernel
> > version is 2.6.14)
> >          thanks for any hints
>
> AFAIR the kernel assumes to occupy the lowest addresses of the usable RAM.
>
>
> Thiemo
>

i have resolve it, by modify as follow:

in arch/mips/kernel/setup.c

static inline void bootmem_init(void)
.....
	if (curr_pfn < start_pfn)                    // just change the judgement
			curr_pfn = start_pfn;
                 ....
		/* Register lowmem ranges */
		free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));

thanks all.

zzh

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Dear all,

thank you very much Lin, for your kindly reply. May I ask you some more
questions ?

1. about your answer 2, it's true that 0x10000000 to 0x10020000 are
reserved,
so what's the way i can sure no one use this area of memory ? because
em86xx_kmem_start is still the dram controller0's.

2. about your answer 3, if i need to enable the PCI host, you mean i will
have no chance to have greater than 112 MB DMA memory start from the
em86xx_kmem_start ? it's seems a dilemma here, I may describe it more
clearly. I have one ram size of 128 at dram0 controller and as well as
another 128 at dram1 controller. previously it's work very well, the
controller0's ram is for linux and controller1's memory is for video decode.
But recently because the grow of code size of grow of both linux as well as
middle ware, we really need more memory for for kernel run, so if in this
situation , what should i do ?

thx a lot for your help
David

On 11/21/07, YH Lin <YH_Lin@sdesigns.com> wrote:
>
>
>
> Hi David,
>
>
>
> We have not done so for SMP8634. But I think it is possible to do this:
>
>
>
>    1. Using remap register 4 instead, there you will have
>    0x0c000000-0x16fe0000 contiguous space, where 0x0c000000-0x0fffffff is
>    mapped to DRAM1 and 0x10000000-0x16fe0000 is in DRAM0.
>    2. You'd probably reserve the memory 0x10000000-0x10020000 since
>    this area is used by other things so it'd be better if no one else is using
>    this portion of memory.
>    3. As for DMA zone or normal zone, that depends. Do you have the
>    need to enable PCI host? If so, the max. size of DMA zone is 112MB, or else
>    it can all be DMA memory (provide that the address translation routines are
>    modified accordingly).
>
>
>
> Regards,
>
> YH
>
>
>  ------------------------------
>
> *From:* linux-mips-bounce@linux-mips.org [mailto:linux-mips-bounce@linux-mips.org]
> *On Behalf Of *David Kuk
> *Sent:* Monday, November 19, 2007 8:23 PM
> *To:* David Daney
> *Cc:* linux-mips@linux-mips.org
> *Subject:* Re: smp8634 add memory at dram1
>
>
>
> Thanks you all for helping.
>
> AS Daney suggested, I have map the dram1's first 64 MB memory (total 128)
> to remap register 3,
> and add the remap register 3 into the BOOT_MEMROY_RAM use the method
> add_memory_region.
> When i bootup the linux kernel print out that it have totally 176MB ram ,
> which is 06fe0000@10020000(dram0) and 04000000@08000000(64mb dram1 at
> remap register3). How ever, This mapping shows that the total memory in the
> linux kernel is not contiguous. the OS can run, but as i see the source
> code, when the kernel divided these memory into pages, it did not consider
> if the memory is contiguous or not, is it ok ? and  how should i  allocate
> the memories into ZONE[DMA] and ZONE[NORMAL], is it possible if I wish all
> the 176MB memory can be allocate as ZONE[DMA]?
>
>
> Best wishes
> David
>
>
>
>  On 11/15/07, *David Daney* <ddaney@avtrex.com> wrote:
>
> David Kuk wrote:
> > After study about the memory configuration of sigma smp8634, i found
> > some difficult to accomplish the task.
> >
> > so my question is if have two 128MB ram separately under dram0 and
> > dram1 controller, where dram0 for linux and dram1 for video decoding.
> > Now the situation is the memory for linux is not enough and video
> > decoding can not use all of it's 128MB at dram1, what we plan to do is
> > to share 64MB at dram1 to the linux kernel as high memory, and only
> > reserved 64MB at dram1 for the video decoding.
> >
> > first, in MIPS architecture, we found that the kseg0 and kseg1 are
> > mapped to 0x00000000-0x20000000, which include only dram0 controller,
> > so we wish to add the dram1 memory manually to the kernel using
> > function add_memory_region at setup.c , after booting up result the
> > warning that the memory larger than 512 need to configured the kernel
> > support high memory.
> >
> > then when we configure the kernel to support high memory at menu
> > configure, the kernel when booting up will remind us our CPU do not
> > support high memory due to cache aliases.
> >
> > Both way will lead the linux can not boot up normally, so what should
> > we do, is there any mis-understanding about the hardware
> > implementation or MIPS design?
>
> I think your understanding of the 8634 is at least close to correct.
>
> It may be possible (but I have not tried it yet) to use the remapping
> registers to move dram1 into the first 512MB of the memory space.  If it
> is possible, you would then have to modify the gbus access functions
> accordingly.  Also the 8634 media drivers would probably have to be
> changed as well.  I am not sure about the microcode for the media DSPs,
> but if it is dependent on the mapping of the DRAM, then you would
> probably have to get the vendor's help.
>
> Let me know if you are successful.
>
> Thanks,
> David Daney
>
>
>

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Dear all,<br><br>thank you very much Lin, for your kindly reply. May I ask you some more questions ?<br><br>1. about your answer 2, it&#39;s true that 0x10000000 to 0x10020000 are reserved, <br>so what&#39;s the way i can sure no one use this area of memory ?
because em86xx_kmem_start is still the dram controller0&#39;s.<br><br>2. about your answer 3, if i need to enable the PCI host, you mean i will have no chance to have greater than 112 MB DMA memory start from the em86xx_kmem_start ? it&#39;s seems a dilemma here, I may describe it more clearly. I have one ram size of 128 at dram0 controller and as well as another 128 at dram1 controller. previously it&#39;s work very well, the controller0&#39;s ram is for linux and controller1&#39;s memory is for video decode. But recently because the grow of code size of grow of both linux as well as middle ware, we really need more memory for for kernel run,
so if in this situation , what should i do ?<br><br>thx a lot for your help <br>David<br><br><div><span class="gmail_quote">On 11/21/07, <b class="gmail_sendername">YH Lin</b> &lt;<a href="mailto:YH_Lin@sdesigns.com" target="_blank" onclick="return top.js.OpenExtLink(window,event,this)">
YH_Lin@sdesigns.com</a>&gt; wrote:</span><blockquote class="gmail_quote" style="border-left: 1px solid rgb(204, 204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;">










<div link="blue" vlink="blue" lang="EN-US">

<div>

<p><font color="navy" face="Arial" size="2"><span style="font-size: 10pt; font-family: Arial; color: navy;">&nbsp;</span></font></p>

<p><font color="navy" face="Arial" size="2"><span style="font-size: 10pt; font-family: Arial; color: navy;">Hi David,</span></font></p>

<p><font color="navy" face="Arial" size="2"><span style="font-size: 10pt; font-family: Arial; color: navy;">&nbsp;</span></font></p>

<p><font color="navy" face="Arial" size="2"><span style="font-size: 10pt; font-family: Arial; color: navy;">We have not done so for SMP8634. But I
think it is possible to do this:</span></font></p>

<p><font color="navy" face="Arial" size="2"><span style="font-size: 10pt; font-family: Arial; color: navy;">&nbsp;</span></font></p>

<ol style="margin-top: 0in;" start="1" type="1">
 <li style="color: navy;"><font color="navy" face="Arial" size="2"><span style="font-size: 10pt; font-family: Arial;">Using
     remap register 4 instead, there you will have 0x0c000000-0x16fe0000
     contiguous space, where 0x0c000000-0x0fffffff is mapped to DRAM1 and
     0x10000000-0x16fe0000 is in DRAM0.</span></font></li>
 <li style="color: navy;"><font color="navy" face="Arial" size="2"><span style="font-size: 10pt; font-family: Arial;">You&#39;d
     probably reserve the memory 0x10000000-0x10020000 since this area is used
     by other things so it&#39;d be better if no one else is using this
     portion of memory.</span></font></li>
 <li style="color: navy;"><font color="navy" face="Arial" size="2"><span style="font-size: 10pt; font-family: Arial;">As
     for DMA zone or normal zone, that depends. Do you have the need to enable
     PCI host? If so, the max. size of DMA zone is 112MB, or else it can all be
     DMA memory (provide that the address translation routines are modified
     accordingly).</span></font></li>
</ol>

<p><font color="navy" face="Arial" size="2"><span style="font-size: 10pt; font-family: Arial; color: navy;">&nbsp;</span></font></p>

<p><font color="navy" face="Arial" size="2"><span style="font-size: 10pt; font-family: Arial; color: navy;">Regards,</span></font></p>

<div>

<p><font color="#333399" face="Arial" size="2"><span style="font-size: 10pt; font-family: Arial; color: rgb(51, 51, 153);">YH</span></font></p>

</div>

<p><font color="navy" face="Arial" size="2"><span style="font-size: 10pt; font-family: Arial; color: navy;">&nbsp;</span></font></p>

<div>

<div style="text-align: center;" align="center"><font face="Times New Roman" size="3"><span style="font-size: 12pt;">

<hr align="center" size="2" width="100%">

</span></font></div>

<p><b><font face="Tahoma" size="2"><span style="font-size: 10pt; font-family: Tahoma; font-weight: bold;">From:</span></font></b><font face="Tahoma" size="2"><span style="font-size: 10pt; font-family: Tahoma;">
<a href="mailto:linux-mips-bounce@linux-mips.org" target="_blank" onclick="return top.js.OpenExtLink(window,event,this)">linux-mips-bounce@linux-mips.org</a> [mailto:<a href="mailto:linux-mips-bounce@linux-mips.org" target="_blank" onclick="return top.js.OpenExtLink(window,event,this)">

linux-mips-bounce@linux-mips.org</a>] <b><span style="font-weight: bold;">On Behalf Of </span></b>David Kuk<br>
<b><span style="font-weight: bold;">Sent:</span></b> Monday, November 19, 2007
8:23 PM<br>
<b><span style="font-weight: bold;">To:</span></b> David Daney<br>
<b><span style="font-weight: bold;">Cc:</span></b> <a href="mailto:linux-mips@linux-mips.org" target="_blank" onclick="return top.js.OpenExtLink(window,event,this)">linux-mips@linux-mips.org</a><br>
<b><span style="font-weight: bold;">Subject:</span></b> Re: smp8634 add memory at
dram1</span></font></p>

</div><div><span>

<p><font face="Times New Roman" size="3"><span style="font-size: 12pt;">&nbsp;</span></font></p>

<p style="margin-bottom: 12pt;"><font face="Times New Roman" size="3"><span style="font-size: 12pt;">Thanks you all for
helping.<br>
<br>
AS Daney suggested, I have map the dram1&#39;s first 64 MB memory (total 128) to
remap register 3,<br>
and add the remap register 3 into the BOOT_MEMROY_RAM use the method
add_memory_region. <br>
When i bootup the linux kernel print out that it have totally 176MB ram , which
is 06fe0000@10020000(dram0) and 04000000@08000000(64mb dram1 at remap
register3). How ever, This mapping shows that the total memory in the linux
kernel is not contiguous. the OS can run, but as i see the source code, when
the kernel divided these memory into pages, it did not consider&nbsp; if the
memory is contiguous or not, is it ok ? and&nbsp; how should i&nbsp; allocate
the memories into ZONE[DMA] and ZONE[NORMAL], is it possible if I wish all the
176MB memory can be allocate as ZONE[DMA]? <br>
<br>
<br>
Best wishes<br>
David <br>
<br>
<br>
<br>
</span></font></p>

<div>

<p><span><font face="Times New Roman" size="3"><span style="font-size: 12pt;">On 11/15/07, <b><span style="font-weight: bold;">David
Daney</span></b> &lt;<a href="mailto:ddaney@avtrex.com" target="_blank" onclick="return top.js.OpenExtLink(window,event,this)">ddaney@avtrex.com</a>&gt;
wrote:</span></font></span></p>

<p style="margin-bottom: 12pt;"><font face="Times New Roman" size="3"><span style="font-size: 12pt;">David Kuk wrote:<br>
&gt; After study about the memory configuration of sigma smp8634, i found<br>
&gt; some difficult to accomplish the task.<br>
&gt;<br>
&gt; so my question is if have two 128MB ram separately under dram0 and <br>
&gt; dram1 controller, where dram0 for linux and dram1 for video decoding.<br>
&gt; Now the situation is the memory for linux is not enough and video<br>
&gt; decoding can not use all of it&#39;s 128MB at dram1, what we plan to do is <br>
&gt; to share 64MB at dram1 to the linux kernel as high memory, and only<br>
&gt; reserved 64MB at dram1 for the video decoding.<br>
&gt;<br>
&gt; first, in MIPS architecture, we found that the kseg0 and kseg1 are<br>
&gt; mapped to 0x00000000-0x20000000, which include only dram0 controller, <br>
&gt; so we wish to add the dram1 memory manually to the kernel using<br>
&gt; function add_memory_region at setup.c , after booting up result the<br>
&gt; warning that the memory larger than 512 need to configured the kernel <br>
&gt; support high memory.<br>
&gt;<br>
&gt; then when we configure the kernel to support high memory at menu<br>
&gt; configure, the kernel when booting up will remind us our CPU do not<br>
&gt; support high memory due to cache aliases. <br>
&gt;<br>
&gt; Both way will lead the linux can not boot up normally, so what should<br>
&gt; we do, is there any mis-understanding about the hardware<br>
&gt; implementation or MIPS design?<br>
<br>
I think your understanding of the 8634 is at least close to correct. <br>
<br>
It may be possible (but I have not tried it yet) to use the remapping<br>
registers to move dram1 into the first 512MB of the memory space.&nbsp;&nbsp;If
it<br>
is possible, you would then have to modify the gbus access functions <br>
accordingly.&nbsp;&nbsp;Also the 8634 media drivers would probably have to be<br>
changed as well.&nbsp;&nbsp;I am not sure about the microcode for the media
DSPs,<br>
but if it is dependent on the mapping of the DRAM, then you would<br>
probably have to get the vendor&#39;s help. <br>
<br>
Let me know if you are successful.<br>
<br>
Thanks,<br>
David Daney</span></font></p>

</div>

<p><font face="Times New Roman" size="3"><span style="font-size: 12pt;">&nbsp;</span></font></p>

</span></div></div>

</div>


</blockquote></div><br>

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From petersayei@ucom.ne.jp Thu Nov 22 11:39:03 2007
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All your pharma needs.

shallthere.com.

Remove the dot from the end of the link to use it.



From ralf@linux-mips.org Thu Nov 22 12:56:18 2007
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On Mon, Nov 19, 2007 at 05:47:54PM -0800, Joe Perches wrote:

Queued for 2.6.25.

Thanks,

   Ralf

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Subject: Re: [MIPS] irq_cpu: use handle_percpu_irq handler to avoid
 dropping interrupts.
From:	Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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On Thu, 15 Nov 2007 20:17:31 +0000, linux-mips@linux-mips.org wrote:
> Subject: [MIPS] irq_cpu: use handle_percpu_irq handler to avoid dropping interrupts.
> Author: Ralf Baechle <ralf@linux-mips.org> Thu Nov 15 19:37:15 2007 +0000
> Commit: eebc88e5d2cffc07b969c8f426552a44e5ce51f8
> Gitweb: http://www.linux-mips.org/g/linux/eebc88e5
> Branch: master

This might broke probe_irq_on()/probe_irq_off(), since
handle_percpu_irq() does not check IRQ_WAITING bit.

This is a quick fix.  But I'm not sure where is the right place to fix...

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
---
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
index 0ee2567..9d97d4b 100644
--- a/arch/mips/kernel/irq_cpu.c
+++ b/arch/mips/kernel/irq_cpu.c
@@ -114,7 +114,9 @@ void __init mips_cpu_irq_init(void)
 		for (i = irq_base; i < irq_base + 2; i++)
 			set_irq_chip(i, &mips_mt_cpu_irq_controller);
 
-	for (i = irq_base + 2; i < irq_base + 8; i++)
+	for (i = irq_base + 2; i < irq_base + 8; i++) {
 		set_irq_chip_and_handler(i, &mips_cpu_irq_controller,
 					 handle_percpu_irq);
+		irq_desc[i].status |= IRQ_NOPROBE;
+	}
 }

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To:	linux-mips@linux-mips.org
Cc:	ralf@linux-mips.org
Subject: [PATCH] qemu: do not enable IP7 blindly
From:	Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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IP7 will be enabled automatically in mips_clockevent_init(), if it was
available.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
---
diff --git a/arch/mips/qemu/q-irq.c b/arch/mips/qemu/q-irq.c
index 11f9847..7df36db 100644
--- a/arch/mips/qemu/q-irq.c
+++ b/arch/mips/qemu/q-irq.c
@@ -33,5 +33,5 @@ void __init arch_init_irq(void)
 
 	mips_cpu_irq_init();
 	init_i8259_irqs();
-	set_c0_status(0x8400);
+	set_c0_status(0x400);
 }

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Subject: Re: [MIPS] irq_cpu: use handle_percpu_irq handler to avoid
	dropping interrupts.
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On Fri, Nov 23, 2007 at 12:41:32AM +0900, Atsushi Nemoto wrote:

> This might broke probe_irq_on()/probe_irq_off(), since
> handle_percpu_irq() does not check IRQ_WAITING bit.

Ok - but does that matter at all?  IRQ probing is only used with ISA
drivers and for those there will be another interrupt controller such as
a i8259 PIC daisy chained to one of the CPU interrupt pins.

  Ralf

From ralf@linux-mips.org Thu Nov 22 17:24:01 2007
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To:	Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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Subject: Re: [MIPS] irq_cpu: use handle_percpu_irq handler to avoid
	dropping interrupts.
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On Thu, Nov 22, 2007 at 04:19:35PM +0000, Ralf Baechle wrote:

> > This might broke probe_irq_on()/probe_irq_off(), since
> > handle_percpu_irq() does not check IRQ_WAITING bit.
> 
> Ok - but does that matter at all?  IRQ probing is only used with ISA
> drivers and for those there will be another interrupt controller such as
> a i8259 PIC daisy chained to one of the CPU interrupt pins.

Ah, I think I now understand the problem.

Seems like no interrupt should ever use IRQ_NOPROBE except ISA interrupts
but unfortunately that flag is not everywhere where it should.  Maybe the
logic should even be negated and the flag become IRQ_PROBE ...

  Ralf

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To:	Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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Subject: Re: [MIPS] irq_cpu: use handle_percpu_irq handler to avoid
	dropping interrupts.
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On Fri, Nov 23, 2007 at 12:41:32AM +0900, Atsushi Nemoto wrote:

> This might broke probe_irq_on()/probe_irq_off(), since
> handle_percpu_irq() does not check IRQ_WAITING bit.
> 
> This is a quick fix.  But I'm not sure where is the right place to fix...

Here's a cleaner version.  I guess I should scatter a few more
set_irq_noprobe calls over arch/mips - just not into i8259.c.

  Ralf

diff --git a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c
index 971adf6..a92f2d0 100644
--- a/arch/mips/kernel/irq-rm7000.c
+++ b/arch/mips/kernel/irq-rm7000.c
@@ -42,7 +42,9 @@ void __init rm7k_cpu_irq_init(void)
 
 	clear_c0_intcontrol(0x00000f00);		/* Mask all */
 
-	for (i = base; i < base + 4; i++)
+	for (i = base; i < base + 4; i++) {
 		set_irq_chip_and_handler(i, &rm7k_irq_controller,
 					 handle_percpu_irq);
+		set_irq_noprobe(i);
+	}
 }
diff --git a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c
index 7b04583..3f21538 100644
--- a/arch/mips/kernel/irq-rm9000.c
+++ b/arch/mips/kernel/irq-rm9000.c
@@ -105,4 +105,5 @@ void __init rm9k_cpu_irq_init(void)
 	rm9000_perfcount_irq = base + 1;
 	set_irq_chip_and_handler(rm9000_perfcount_irq, &rm9k_perfcounter_irq,
 				 handle_percpu_irq);
+	set_irq_noprobe(rm9000_perfcount_irq);
 }
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index d06e9c9..c2e3279 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -130,6 +130,24 @@ asmlinkage void spurious_interrupt(void)
 	atomic_inc(&irq_err_count);
 }
 
+void set_irq_noprobe(unsigned int irq)
+{
+	unsigned long flags;
+	struct irq_desc *desc;
+
+	if (irq >= NR_IRQS) {
+		printk(KERN_ERR
+		       "Trying to install type control for IRQ%d\n", irq);
+		return;
+	}
+
+	desc = irq_desc + irq;
+
+	spin_lock_irqsave(&desc->lock, flags);
+	desc->status |= IRQ_NOPROBE;
+	spin_unlock_irqrestore(&desc->lock, flags);
+}
+
 #ifdef CONFIG_KGDB
 extern void breakpoint(void);
 extern void set_debug_traps(void);
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
index 0ee2567..810f65d 100644
--- a/arch/mips/kernel/irq_cpu.c
+++ b/arch/mips/kernel/irq_cpu.c
@@ -114,7 +114,9 @@ void __init mips_cpu_irq_init(void)
 		for (i = irq_base; i < irq_base + 2; i++)
 			set_irq_chip(i, &mips_mt_cpu_irq_controller);
 
-	for (i = irq_base + 2; i < irq_base + 8; i++)
+	for (i = irq_base + 2; i < irq_base + 8; i++) {
 		set_irq_chip_and_handler(i, &mips_cpu_irq_controller,
 					 handle_percpu_irq);
+		set_irq_noprobe(i);
+	}
 }
diff --git a/include/asm-mips/irq.h b/include/asm-mips/irq.h
index a58f0ee..6b60d2a 100644
--- a/include/asm-mips/irq.h
+++ b/include/asm-mips/irq.h
@@ -160,4 +160,6 @@ extern void free_irqno(unsigned int irq);
 extern int cp0_compare_irq;
 extern int cp0_perfcount_irq;
 
+extern void set_irq_noprobe(unsigned int irq);
+
 #endif /* _ASM_IRQ_H */

From anemo@mba.ocn.ne.jp Fri Nov 23 16:19:24 2007
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To:	linux-mips@linux-mips.org
Cc:	ralf@linux-mips.org, wim@iguana.be, akpm@linux-foundation.org
Subject: [PATCH 1/2] TXx9 watchdog driver
From:	Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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This is a driver for watchdog timer built into TXx9 MIPS SoCs.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
---
Can be applied on current linux-2.6.git, linux-mips.org or 2.6.24-rc3-mm1.

 drivers/watchdog/Kconfig   |    6 +
 drivers/watchdog/Makefile  |    1 +
 drivers/watchdog/txx9wdt.c |  276 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 283 insertions(+), 0 deletions(-)

diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 2792bc1..7484ee6 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -616,6 +616,12 @@ config AR7_WDT
 	help
 	  Hardware driver for the TI AR7 Watchdog Timer.
 
+config TXX9_WDT
+	tristate "Toshiba TXx9 Watchdog Timer"
+	depends on CPU_TX39XX || CPU_TX49XX
+	help
+	  Hardware driver for the built-in watchdog timer on TXx9 MIPS SoCs.
+
 # PARISC Architecture
 
 # POWERPC Architecture
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 7d9e573..0458e62 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -91,6 +91,7 @@ obj-$(CONFIG_INDYDOG) += indydog.o
 obj-$(CONFIG_WDT_MTX1)	+= mtx-1_wdt.o
 obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o
 obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
+obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
 
 # PARISC Architecture
 
diff --git a/drivers/watchdog/txx9wdt.c b/drivers/watchdog/txx9wdt.c
new file mode 100644
index 0000000..f3af8f5
--- /dev/null
+++ b/drivers/watchdog/txx9wdt.c
@@ -0,0 +1,276 @@
+/*
+ * txx9wdt: A Hardware Watchdog Driver for TXx9 SoCs
+ *
+ * Copyright (C) 2007 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/types.h>
+#include <linux/miscdevice.h>
+#include <linux/watchdog.h>
+#include <linux/fs.h>
+#include <linux/reboot.h>
+#include <linux/init.h>
+#include <linux/uaccess.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <asm/txx9tmr.h>
+
+#define TIMER_MARGIN	60		/* Default is 60 seconds */
+
+static int timeout = TIMER_MARGIN;	/* in seconds */
+module_param(timeout, int, 0);
+MODULE_PARM_DESC(timeout,
+	"Watchdog timeout in seconds. "
+	"(0<timeout<((2^" __MODULE_STRING(TXX9_TIMER_BITS) ")/(IMCLK/256)), "
+	"default=" __MODULE_STRING(TIMER_MARGIN) ")");
+
+static int nowayout = WATCHDOG_NOWAYOUT;
+module_param(nowayout, int, 0);
+MODULE_PARM_DESC(nowayout,
+	"Watchdog cannot be stopped once started "
+	"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+
+#define WD_TIMER_CCD	7	/* 1/256 */
+#define WD_TIMER_CLK	(clk_get_rate(txx9_imclk) / (2 << WD_TIMER_CCD))
+#define WD_MAX_TIMEOUT	((0xffffffff >> (32 - TXX9_TIMER_BITS)) / WD_TIMER_CLK)
+
+static unsigned long txx9wdt_alive;
+static int expect_close;
+static struct txx9_tmr_reg __iomem *txx9wdt_reg;
+static struct clk *txx9_imclk;
+
+static void txx9wdt_ping(void)
+{
+	__raw_writel(TXx9_TMWTMR_TWIE | TXx9_TMWTMR_TWC, &txx9wdt_reg->wtmr);
+}
+
+static void txx9wdt_start(void)
+{
+	__raw_writel(WD_TIMER_CLK * timeout, &txx9wdt_reg->cpra);
+	__raw_writel(WD_TIMER_CCD, &txx9wdt_reg->ccdr);
+	__raw_writel(0, &txx9wdt_reg->tisr);	/* clear pending interrupt */
+	__raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
+		     &txx9wdt_reg->tcr);
+	__raw_writel(TXx9_TMWTMR_TWIE | TXx9_TMWTMR_TWC, &txx9wdt_reg->wtmr);
+}
+
+static void txx9wdt_stop(void)
+{
+	__raw_writel(TXx9_TMWTMR_WDIS, &txx9wdt_reg->wtmr);
+	__raw_writel(__raw_readl(&txx9wdt_reg->tcr) & ~TXx9_TMTCR_TCE,
+		     &txx9wdt_reg->tcr);
+}
+
+static int txx9wdt_open(struct inode *inode, struct file *file)
+{
+	if (test_and_set_bit(0, &txx9wdt_alive))
+		return -EBUSY;
+
+	if (__raw_readl(&txx9wdt_reg->tcr) & TXx9_TMTCR_TCE) {
+		clear_bit(0, &txx9wdt_alive);
+		return -EBUSY;
+	}
+
+	if (nowayout)
+		__module_get(THIS_MODULE);
+
+	txx9wdt_start();
+	return nonseekable_open(inode, file);
+}
+
+static int txx9wdt_release(struct inode *inode, struct file *file)
+{
+	if (expect_close)
+		txx9wdt_stop();
+	else {
+		printk(KERN_CRIT "txx9wdt: "
+		       "Unexpected close, not stopping watchdog!\n");
+		txx9wdt_ping();
+	}
+	clear_bit(0, &txx9wdt_alive);
+	expect_close = 0;
+	return 0;
+}
+
+static ssize_t txx9wdt_write(struct file *file, const char __user *data,
+			     size_t len, loff_t *ppos)
+{
+	if (len) {
+		if (!nowayout) {
+			size_t i;
+
+			expect_close = 0;
+			for (i = 0; i != len; i++) {
+				char c;
+				if (get_user(c, data + i))
+					return -EFAULT;
+				if (c == 'V')
+					expect_close = 1;
+			}
+		}
+		txx9wdt_ping();
+	}
+	return len;
+}
+
+static int txx9wdt_ioctl(struct inode *inode, struct file *file,
+	unsigned int cmd, unsigned long arg)
+{
+	void __user *argp = (void __user *)arg;
+	int __user *p = argp;
+	int new_timeout;
+	static struct watchdog_info ident = {
+		.options =		WDIOF_SETTIMEOUT |
+					WDIOF_KEEPALIVEPING |
+					WDIOF_MAGICCLOSE,
+		.firmware_version =	0,
+		.identity =		"Hardware Watchdog for TXx9",
+	};
+
+	switch (cmd) {
+	default:
+		return -ENOTTY;
+	case WDIOC_GETSUPPORT:
+		return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
+	case WDIOC_GETSTATUS:
+	case WDIOC_GETBOOTSTATUS:
+		return put_user(0, p);
+	case WDIOC_KEEPALIVE:
+		txx9wdt_ping();
+		return 0;
+	case WDIOC_SETTIMEOUT:
+		if (get_user(new_timeout, p))
+			return -EFAULT;
+		if (new_timeout < 1 || new_timeout > WD_MAX_TIMEOUT)
+			return -EINVAL;
+		timeout = new_timeout;
+		txx9wdt_stop();
+		txx9wdt_start();
+		/* Fall */
+	case WDIOC_GETTIMEOUT:
+		return put_user(timeout, p);
+	}
+}
+
+static int txx9wdt_notify_sys(struct notifier_block *this, unsigned long code,
+	void *unused)
+{
+	if (code == SYS_DOWN || code == SYS_HALT)
+		txx9wdt_stop();
+	return NOTIFY_DONE;
+}
+
+static const struct file_operations txx9wdt_fops = {
+	.owner =	THIS_MODULE,
+	.llseek =	no_llseek,
+	.write =	txx9wdt_write,
+	.ioctl =	txx9wdt_ioctl,
+	.open =		txx9wdt_open,
+	.release =	txx9wdt_release,
+};
+
+static struct miscdevice txx9wdt_miscdev = {
+	.minor =	WATCHDOG_MINOR,
+	.name =		"watchdog",
+	.fops =		&txx9wdt_fops,
+};
+
+static struct notifier_block txx9wdt_notifier = {
+	.notifier_call = txx9wdt_notify_sys
+};
+
+static int __init txx9wdt_probe(struct platform_device *dev)
+{
+	struct resource *res;
+	int ret;
+
+	txx9_imclk = clk_get(NULL, "imbus_clk");
+	if (IS_ERR(txx9_imclk)) {
+		ret = PTR_ERR(txx9_imclk);
+		txx9_imclk = NULL;
+		goto exit;
+	}
+	ret = clk_enable(txx9_imclk);
+	if (ret) {
+		clk_put(txx9_imclk);
+		txx9_imclk = NULL;
+		goto exit;
+	}
+
+	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
+	if (!res)
+		goto exit_busy;
+	if (!devm_request_mem_region(&dev->dev,
+				     res->start, res->end - res->start + 1,
+				     "txx9wdt"))
+		goto exit_busy;
+	txx9wdt_reg = devm_ioremap(&dev->dev,
+				   res->start, res->end - res->start + 1);
+	if (!txx9wdt_reg)
+		goto exit_busy;
+
+	ret = misc_register(&txx9wdt_miscdev);
+	if (ret)
+		goto exit;
+
+	ret = register_reboot_notifier(&txx9wdt_notifier);
+	if (ret) {
+		misc_deregister(&txx9wdt_miscdev);
+		goto exit;
+	}
+
+	printk(KERN_INFO "Hardware Watchdog Timer for TXx9: "
+	       "timeout=%d sec (max %ld) (nowayout= %d)\n",
+	       timeout, WD_MAX_TIMEOUT, nowayout);
+
+	return 0;
+exit_busy:
+	ret = -EBUSY;
+exit:
+	if (txx9_imclk) {
+		clk_disable(txx9_imclk);
+		clk_put(txx9_imclk);
+	}
+	return ret;
+}
+
+static int __exit txx9wdt_remove(struct platform_device *dev)
+{
+	misc_deregister(&txx9wdt_miscdev);
+	unregister_reboot_notifier(&txx9wdt_notifier);
+	clk_disable(txx9_imclk);
+	clk_put(txx9_imclk);
+	return 0;
+}
+
+static struct platform_driver txx9wdt_driver = {
+	.remove = __exit_p(txx9wdt_remove),
+	.driver = {
+		.name = "txx9wdt",
+		.owner = THIS_MODULE,
+	},
+};
+
+static int __init watchdog_init(void)
+{
+	return platform_driver_probe(&txx9wdt_driver, txx9wdt_probe);
+}
+
+static void __exit watchdog_exit(void)
+{
+	platform_driver_unregister(&txx9wdt_driver);
+}
+
+module_init(watchdog_init);
+module_exit(watchdog_exit);
+
+MODULE_DESCRIPTION("TXx9 Watchdog Driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);




From anemo@mba.ocn.ne.jp Fri Nov 23 16:19:54 2007
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Date:	Sat, 24 Nov 2007 01:20:27 +0900 (JST)
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To:	linux-mips@linux-mips.org
Cc:	ralf@linux-mips.org, wim@iguana.be, akpm@linux-foundation.org
Subject: [PATCH 2/2] TXx9 watchdog support for rbhma3100,rbhma4200,rbhma4500
From:	Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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This patch adds support for txx9wdt driver to rbhma3100, rbhma4200 and
rbhma4500 platform.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
---
Can be applied on current linux-queue tree on linux-mips.org or 2.6.24-rc3-mm1.

 arch/mips/configs/jmr3927_defconfig                |   15 +++++-
 arch/mips/configs/rbhma4200_defconfig              |   15 +++++-
 arch/mips/configs/rbhma4500_defconfig              |   15 +++++-
 arch/mips/jmr3927/rbhma3100/setup.c                |   55 ++++++++++++++++++++
 .../toshiba_rbtx4927/toshiba_rbtx4927_setup.c      |   55 ++++++++++++++++++++
 arch/mips/tx4938/toshiba_rbtx4938/setup.c          |   25 +++++++++
 include/asm-mips/tx4927/tx4927_pci.h               |    1 +
 7 files changed, 178 insertions(+), 3 deletions(-)

diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig
index eb96791..4ace378 100644
--- a/arch/mips/configs/jmr3927_defconfig
+++ b/arch/mips/configs/jmr3927_defconfig
@@ -464,7 +464,6 @@ CONFIG_SERIAL_TXX9_STDSERIAL=y
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=256
 # CONFIG_IPMI_HANDLER is not set
-# CONFIG_WATCHDOG is not set
 # CONFIG_HW_RANDOM is not set
 # CONFIG_RTC is not set
 # CONFIG_R3964 is not set
@@ -482,6 +481,20 @@ CONFIG_DEVPORT=y
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_TXX9_WDT=y
+
+#
+# PCI-based Watchdog Cards
+#
+# CONFIG_PCIPCWATCHDOG is not set
+# CONFIG_WDTPCI is not set
 
 #
 # Multifunction device drivers
diff --git a/arch/mips/configs/rbhma4200_defconfig b/arch/mips/configs/rbhma4200_defconfig
index 9383a59..a67c698 100644
--- a/arch/mips/configs/rbhma4200_defconfig
+++ b/arch/mips/configs/rbhma4200_defconfig
@@ -431,7 +431,6 @@ CONFIG_UNIX98_PTYS=y
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=256
 # CONFIG_IPMI_HANDLER is not set
-# CONFIG_WATCHDOG is not set
 # CONFIG_HW_RANDOM is not set
 # CONFIG_RTC is not set
 # CONFIG_R3964 is not set
@@ -449,6 +448,20 @@ CONFIG_DEVPORT=y
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_TXX9_WDT=m
+
+#
+# PCI-based Watchdog Cards
+#
+# CONFIG_PCIPCWATCHDOG is not set
+# CONFIG_WDTPCI is not set
 
 #
 # Multifunction device drivers
diff --git a/arch/mips/configs/rbhma4500_defconfig b/arch/mips/configs/rbhma4500_defconfig
index d1b56cc..ebc8ad4 100644
--- a/arch/mips/configs/rbhma4500_defconfig
+++ b/arch/mips/configs/rbhma4500_defconfig
@@ -450,7 +450,6 @@ CONFIG_UNIX98_PTYS=y
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=256
 # CONFIG_IPMI_HANDLER is not set
-# CONFIG_WATCHDOG is not set
 # CONFIG_HW_RANDOM is not set
 # CONFIG_RTC is not set
 # CONFIG_R3964 is not set
@@ -479,6 +478,20 @@ CONFIG_SPI_AT25=y
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_TXX9_WDT=m
+
+#
+# PCI-based Watchdog Cards
+#
+# CONFIG_PCIPCWATCHDOG is not set
+# CONFIG_WDTPCI is not set
 
 #
 # Multifunction device drivers
diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c
index 75cfe65..c886d80 100644
--- a/arch/mips/jmr3927/rbhma3100/setup.c
+++ b/arch/mips/jmr3927/rbhma3100/setup.c
@@ -35,6 +35,7 @@
 #include <linux/delay.h>
 #include <linux/pm.h>
 #include <linux/platform_device.h>
+#include <linux/clk.h>
 #ifdef CONFIG_SERIAL_TXX9
 #include <linux/serial_core.h>
 #endif
@@ -233,6 +234,8 @@ static void __init tx3927_setup(void)
 	tx3927_ccfgptr->ccfg &= ~TX3927_CCFG_BEOW;
 	/* Disable PCI snoop */
 	tx3927_ccfgptr->ccfg &= ~TX3927_CCFG_PSNP;
+	/* do reset on watchdog */
+	tx3927_ccfgptr->ccfg |= TX3927_CCFG_WR;
 
 #ifdef DO_WRITE_THROUGH
 	/* Enable PCI SNOOP - with write through only */
@@ -383,3 +386,55 @@ static int __init jmr3927_rtc_init(void)
 	return IS_ERR(dev) ? PTR_ERR(dev) : 0;
 }
 device_initcall(jmr3927_rtc_init);
+
+/* Watchdog support */
+
+static int __init txx9_wdt_init(unsigned long base)
+{
+	struct resource res = {
+		.start	= base,
+		.end	= base + 0x100 - 1,
+		.flags	= IORESOURCE_MEM,
+	};
+	struct platform_device *dev =
+		platform_device_register_simple("txx9wdt", -1, &res, 1);
+	return IS_ERR(dev) ? PTR_ERR(dev) : 0;
+}
+
+static int __init jmr3927_wdt_init(void)
+{
+	return txx9_wdt_init(TX3927_TMR_REG(2));
+}
+device_initcall(jmr3927_wdt_init);
+
+/* Minimum CLK support */
+
+struct clk *clk_get(struct device *dev, const char *id)
+{
+	if (!strcmp(id, "imbus_clk"))
+		return (struct clk *)JMR3927_IMCLK;
+	return ERR_PTR(-ENOENT);
+}
+EXPORT_SYMBOL(clk_get);
+
+int clk_enable(struct clk *clk)
+{
+	return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+	return (unsigned long)clk;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+void clk_put(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_put);
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
index c29a528..e466e5e 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
@@ -50,6 +50,7 @@
 #include <linux/pci.h>
 #include <linux/pm.h>
 #include <linux/platform_device.h>
+#include <linux/clk.h>
 
 #include <asm/bootinfo.h>
 #include <asm/io.h>
@@ -803,6 +804,8 @@ void __init plat_mem_setup(void)
 		}
 
 	/* CCFG */
+	/* do reset on watchdog */
+	tx4927_ccfgptr->ccfg |= TX4927_CCFG_WR;
 	/* enable Timeout BusError */
 	if (tx4927_ccfg_toeon)
 		tx4927_ccfgptr->ccfg |= TX4927_CCFG_TOE;
@@ -944,3 +947,55 @@ static int __init rbtx4927_ne_init(void)
 	return IS_ERR(dev) ? PTR_ERR(dev) : 0;
 }
 device_initcall(rbtx4927_ne_init);
+
+/* Watchdog support */
+
+static int __init txx9_wdt_init(unsigned long base)
+{
+	struct resource res = {
+		.start	= base,
+		.end	= base + 0x100 - 1,
+		.flags	= IORESOURCE_MEM,
+	};
+	struct platform_device *dev =
+		platform_device_register_simple("txx9wdt", -1, &res, 1);
+	return IS_ERR(dev) ? PTR_ERR(dev) : 0;
+}
+
+static int __init rbtx4927_wdt_init(void)
+{
+	return txx9_wdt_init(TX4927_TMR_REG(2) & 0xfffffffffULL);
+}
+device_initcall(rbtx4927_wdt_init);
+
+/* Minimum CLK support */
+
+struct clk *clk_get(struct device *dev, const char *id)
+{
+	if (!strcmp(id, "imbus_clk"))
+		return (struct clk *)50000000;
+	return ERR_PTR(-ENOENT);
+}
+EXPORT_SYMBOL(clk_get);
+
+int clk_enable(struct clk *clk)
+{
+	return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+	return (unsigned long)clk;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+void clk_put(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_put);
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/setup.c b/arch/mips/tx4938/toshiba_rbtx4938/setup.c
index d13af99..47a9c17 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/setup.c
+++ b/arch/mips/tx4938/toshiba_rbtx4938/setup.c
@@ -724,6 +724,8 @@ void __init tx4938_board_setup(void)
 	/* CCFG */
 	/* clear WatchDogReset,BusErrorOnWrite flag (W1C) */
 	tx4938_ccfgptr->ccfg |= TX4938_CCFG_WDRST | TX4938_CCFG_BEOW;
+	/* do reset on watchdog */
+	tx4938_ccfgptr->ccfg |= TX4938_CCFG_WR;
 	/* clear PCIC1 reset */
 	if (tx4938_ccfgptr->clkctr & TX4938_CLKCTR_PCIC1RST)
 		tx4938_ccfgptr->clkctr &= ~TX4938_CLKCTR_PCIC1RST;
@@ -1121,12 +1123,35 @@ static int __init rbtx4938_spi_init(void)
 }
 arch_initcall(rbtx4938_spi_init);
 
+/* Watchdog support */
+
+static int __init txx9_wdt_init(unsigned long base)
+{
+	struct resource res = {
+		.start	= base,
+		.end	= base + 0x100 - 1,
+		.flags	= IORESOURCE_MEM,
+		.parent	= &tx4938_reg_resource,
+	};
+	struct platform_device *dev =
+		platform_device_register_simple("txx9wdt", -1, &res, 1);
+	return IS_ERR(dev) ? PTR_ERR(dev) : 0;
+}
+
+static int __init rbtx4938_wdt_init(void)
+{
+	return txx9_wdt_init(TX4938_TMR_REG(2) & 0xfffffffffULL);
+}
+device_initcall(rbtx4938_wdt_init);
+
 /* Minimum CLK support */
 
 struct clk *clk_get(struct device *dev, const char *id)
 {
 	if (!strcmp(id, "spi-baseclk"))
 		return (struct clk *)(txx9_gbus_clock / 2 / 4);
+	if (!strcmp(id, "imbus_clk"))
+		return (struct clk *)(txx9_gbus_clock / 2);
 	return ERR_PTR(-ENOENT);
 }
 EXPORT_SYMBOL(clk_get);
diff --git a/include/asm-mips/tx4927/tx4927_pci.h b/include/asm-mips/tx4927/tx4927_pci.h
index 3f1e470..0be77df 100644
--- a/include/asm-mips/tx4927/tx4927_pci.h
+++ b/include/asm-mips/tx4927/tx4927_pci.h
@@ -9,6 +9,7 @@
 #define __ASM_TX4927_TX4927_PCI_H
 
 #define TX4927_CCFG_TOE 0x00004000
+#define TX4927_CCFG_WR	0x00008000
 #define TX4927_CCFG_TINTDIS	0x01000000
 
 #define TX4927_PCIMEM      0x08000000




From tsbogend@alpha.franken.de Fri Nov 23 19:52:09 2007
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From:	Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Date:	Fri, 23 Nov 2007 20:34:16 +0100
Subject: [PATCH] IP22: Fix broken EISA interrupt setup by switching to generic i8259
Message-Id: <20071123195104.BADCCC2DDE@solo.franken.de>
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Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
 arch/mips/Kconfig              |    1 +
 arch/mips/sgi-ip22/ip22-eisa.c |  134 +---------------------------------------
 2 files changed, 3 insertions(+), 132 deletions(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 2f2ce0c..84059da 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -385,6 +385,7 @@ config SGI_IP22
 	select DMA_NONCOHERENT
 	select HW_HAS_EISA
 	select I8253
+	select I8259
 	select IP22_CPU_SCACHE
 	select IRQ_CPU
 	select GENERIC_ISA_DMA_SUPPORT_BROKEN
diff --git a/arch/mips/sgi-ip22/ip22-eisa.c b/arch/mips/sgi-ip22/ip22-eisa.c
index 26854fb..1617241 100644
--- a/arch/mips/sgi-ip22/ip22-eisa.c
+++ b/arch/mips/sgi-ip22/ip22-eisa.c
@@ -36,6 +36,7 @@
 #include <asm/sgi/ioc.h>
 #include <asm/sgi/mc.h>
 #include <asm/sgi/ip22.h>
+#include <asm/i8259.h>
 
 /* I2 has four EISA slots. */
 #define IP22_EISA_MAX_SLOTS	  4
@@ -93,126 +94,11 @@ static irqreturn_t ip22_eisa_intr(int irq, void *dev_id)
 	return IRQ_NONE;
 }
 
-static void enable_eisa1_irq(unsigned int irq)
-{
-	u8 mask;
-
-	mask = inb(EISA_INT1_MASK);
-	mask &= ~((u8) (1 << irq));
-	outb(mask, EISA_INT1_MASK);
-}
-
-static unsigned int startup_eisa1_irq(unsigned int irq)
-{
-	u8 edge;
-
-	/* Only use edge interrupts for EISA */
-
-	edge = inb(EISA_INT1_EDGE_LEVEL);
-	edge &= ~((u8) (1 << irq));
-	outb(edge, EISA_INT1_EDGE_LEVEL);
-
-	enable_eisa1_irq(irq);
-	return 0;
-}
-
-static void disable_eisa1_irq(unsigned int irq)
-{
-	u8 mask;
-
-	mask = inb(EISA_INT1_MASK);
-	mask |= ((u8) (1 << irq));
-	outb(mask, EISA_INT1_MASK);
-}
-
-static void mask_and_ack_eisa1_irq(unsigned int irq)
-{
-	disable_eisa1_irq(irq);
-
-	outb(0x20, EISA_INT1_CTRL);
-}
-
-static void end_eisa1_irq(unsigned int irq)
-{
-	if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
-		enable_eisa1_irq(irq);
-}
-
-static struct irq_chip ip22_eisa1_irq_type = {
-	.name		= "IP22 EISA",
-	.startup	= startup_eisa1_irq,
-	.ack		= mask_and_ack_eisa1_irq,
-	.mask		= disable_eisa1_irq,
-	.mask_ack	= mask_and_ack_eisa1_irq,
-	.unmask		= enable_eisa1_irq,
-	.end		= end_eisa1_irq,
-};
-
-static void enable_eisa2_irq(unsigned int irq)
-{
-	u8 mask;
-
-	mask = inb(EISA_INT2_MASK);
-	mask &= ~((u8) (1 << (irq - 8)));
-	outb(mask, EISA_INT2_MASK);
-}
-
-static unsigned int startup_eisa2_irq(unsigned int irq)
-{
-	u8 edge;
-
-	/* Only use edge interrupts for EISA */
-
-	edge = inb(EISA_INT2_EDGE_LEVEL);
-	edge &= ~((u8) (1 << (irq - 8)));
-	outb(edge, EISA_INT2_EDGE_LEVEL);
-
-	enable_eisa2_irq(irq);
-	return 0;
-}
-
-static void disable_eisa2_irq(unsigned int irq)
-{
-	u8 mask;
-
-	mask = inb(EISA_INT2_MASK);
-	mask |= ((u8) (1 << (irq - 8)));
-	outb(mask, EISA_INT2_MASK);
-}
-
-static void mask_and_ack_eisa2_irq(unsigned int irq)
-{
-	disable_eisa2_irq(irq);
-
-	outb(0x20, EISA_INT2_CTRL);
-}
-
-static void end_eisa2_irq(unsigned int irq)
-{
-	if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
-		enable_eisa2_irq(irq);
-}
-
-static struct irq_chip ip22_eisa2_irq_type = {
-	.name		= "IP22 EISA",
-	.startup	= startup_eisa2_irq,
-	.ack		= mask_and_ack_eisa2_irq,
-	.mask		= disable_eisa2_irq,
-	.mask_ack	= mask_and_ack_eisa2_irq,
-	.unmask		= enable_eisa2_irq,
-	.end		= end_eisa2_irq,
-};
-
 static struct irqaction eisa_action = {
 	.handler	= ip22_eisa_intr,
 	.name		= "EISA",
 };
 
-static struct irqaction cascade_action = {
-	.handler	= no_action,
-	.name		= "EISA cascade",
-};
-
 int __init ip22_eisa_init(void)
 {
 	int i, c;
@@ -248,29 +134,13 @@ int __init ip22_eisa_init(void)
 	outb(1, EISA_EXT_NMI_RESET_CTRL);
 	udelay(50);	/* Wait long enough for the dust to settle */
 	outb(0, EISA_EXT_NMI_RESET_CTRL);
-	outb(0x11, EISA_INT1_CTRL);
-	outb(0x11, EISA_INT2_CTRL);
-	outb(0, EISA_INT1_MASK);
-	outb(8, EISA_INT2_MASK);
-	outb(4, EISA_INT1_MASK);
-	outb(2, EISA_INT2_MASK);
-	outb(1, EISA_INT1_MASK);
-	outb(1, EISA_INT2_MASK);
-	outb(0xfb, EISA_INT1_MASK);
-	outb(0xff, EISA_INT2_MASK);
 	outb(0, EISA_DMA2_WRITE_SINGLE);
 
-	for (i = SGINT_EISA; i < (SGINT_EISA + EISA_MAX_IRQ); i++) {
-		if (i < (SGINT_EISA + 8))
-			set_irq_chip(i, &ip22_eisa1_irq_type);
-		else
-			set_irq_chip(i, &ip22_eisa2_irq_type);
-	}
+	init_i8259_irqs();
 
 	/* Cannot use request_irq because of kmalloc not being ready at such
 	 * an early stage. Yes, I've been bitten... */
 	setup_irq(SGI_EISA_IRQ, &eisa_action);
-	setup_irq(SGINT_EISA + 2, &cascade_action);
 
 	EISA_bus = 1;
 	return 0;
-- 
1.4.4.4


From tsbogend@alpha.franken.de Fri Nov 23 19:52:39 2007
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From:	Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Date:	Fri, 23 Nov 2007 20:40:15 +0100
Subject: [PATCH] IP22: Fix broken eeprom access by using __raw_readl/__raw_writel
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Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
 arch/mips/sgi-ip22/ip22-nvram.c |   40 ++++++++++++++++++++------------------
 1 files changed, 21 insertions(+), 19 deletions(-)

diff --git a/arch/mips/sgi-ip22/ip22-nvram.c b/arch/mips/sgi-ip22/ip22-nvram.c
index e19d60d..0177566 100644
--- a/arch/mips/sgi-ip22/ip22-nvram.c
+++ b/arch/mips/sgi-ip22/ip22-nvram.c
@@ -32,19 +32,19 @@
 	for (x=0; x<100000; x++) __asm__ __volatile__(""); })
 
 #define eeprom_cs_on(ptr) ({	\
-	*ptr &= ~EEPROM_DATO;	\
-	*ptr &= ~EEPROM_ECLK;	\
-	*ptr &= ~EEPROM_EPROT;	\
-	delay();		\
-	*ptr |= EEPROM_CSEL;	\
-	*ptr |= EEPROM_ECLK; })
+	__raw_writel(__raw_readl(ptr) & ~EEPROM_DATO, ptr);	\
+	__raw_writel(__raw_readl(ptr) & ~EEPROM_ECLK, ptr);	\
+	__raw_writel(__raw_readl(ptr) & ~EEPROM_EPROT, ptr);	\
+	delay();		                                \
+	__raw_writel(__raw_readl(ptr) | EEPROM_CSEL, ptr);	\
+	__raw_writel(__raw_readl(ptr) | EEPROM_ECLK, ptr); })
 
 
 #define eeprom_cs_off(ptr) ({	\
-	*ptr &= ~EEPROM_ECLK;	\
-	*ptr &= ~EEPROM_CSEL;	\
-	*ptr |= EEPROM_EPROT;	\
-	*ptr |= EEPROM_ECLK; })
+	__raw_writel(__raw_readl(ptr) & ~EEPROM_ECLK, ptr);	\
+	__raw_writel(__raw_readl(ptr) & ~EEPROM_CSEL, ptr);	\
+	__raw_writel(__raw_readl(ptr) | EEPROM_EPROT, ptr);	\
+	__raw_writel(__raw_readl(ptr) | EEPROM_ECLK, ptr); })
 
 #define	BITS_IN_COMMAND	11
 /*
@@ -60,15 +60,17 @@ static inline void eeprom_cmd(unsigned int *ctrl, unsigned cmd, unsigned reg)
 	ser_cmd = cmd | (reg << (16 - BITS_IN_COMMAND));
 	for (i = 0; i < BITS_IN_COMMAND; i++) {
 		if (ser_cmd & (1<<15))	/* if high order bit set */
-			writel(readl(ctrl) | EEPROM_DATO, ctrl);
+			__raw_writel(__raw_readl(ctrl) | EEPROM_DATO, ctrl);
 		else
-			writel(readl(ctrl) & ~EEPROM_DATO, ctrl);
-		writel(readl(ctrl) & ~EEPROM_ECLK, ctrl);
-		writel(readl(ctrl) | EEPROM_ECLK, ctrl);
+			__raw_writel(__raw_readl(ctrl) & ~EEPROM_DATO, ctrl);
+		__raw_writel(__raw_readl(ctrl) & ~EEPROM_ECLK, ctrl);
+		delay();
+		__raw_writel(__raw_readl(ctrl) | EEPROM_ECLK, ctrl);
+		delay();
 		ser_cmd <<= 1;
 	}
 	/* see data sheet timing diagram */
-	writel(readl(ctrl) & ~EEPROM_DATO, ctrl);
+	__raw_writel(__raw_readl(ctrl) & ~EEPROM_DATO, ctrl);
 }
 
 unsigned short ip22_eeprom_read(unsigned int *ctrl, int reg)
@@ -76,18 +78,18 @@ unsigned short ip22_eeprom_read(unsigned int *ctrl, int reg)
 	unsigned short res = 0;
 	int i;
 
-	writel(readl(ctrl) & ~EEPROM_EPROT, ctrl);
+	__raw_writel(__raw_readl(ctrl) & ~EEPROM_EPROT, ctrl);
 	eeprom_cs_on(ctrl);
 	eeprom_cmd(ctrl, EEPROM_READ, reg);
 
 	/* clock the data ouf of serial mem */
 	for (i = 0; i < 16; i++) {
-		writel(readl(ctrl) & ~EEPROM_ECLK, ctrl);
+		__raw_writel(__raw_readl(ctrl) & ~EEPROM_ECLK, ctrl);
 		delay();
-		writel(readl(ctrl) | EEPROM_ECLK, ctrl);
+		__raw_writel(__raw_readl(ctrl) | EEPROM_ECLK, ctrl);
 		delay();
 		res <<= 1;
-		if (readl(ctrl) & EEPROM_DATI)
+		if (__raw_readl(ctrl) & EEPROM_DATI)
 			res |= 1;
 	}
 
-- 
1.4.4.4


From tsbogend@alpha.franken.de Fri Nov 23 19:55:17 2007
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From:	Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Date:	Fri, 23 Nov 2007 20:41:55 +0100
Subject: [PATCH] IP22: Fix modules for 64bit kernels by using a CKSEG2 MAP_BASE
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Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
 include/asm-mips/mach-ip22/spaces.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/include/asm-mips/mach-ip22/spaces.h b/include/asm-mips/mach-ip22/spaces.h
index 7f9fa6f..8264d0a 100644
--- a/include/asm-mips/mach-ip22/spaces.h
+++ b/include/asm-mips/mach-ip22/spaces.h
@@ -18,7 +18,7 @@
 #define CAC_BASE		0xffffffff80000000
 #define IO_BASE			0xffffffffa0000000
 #define UNCAC_BASE		0xffffffffa0000000
-#define MAP_BASE		0xc000000000000000
+#define MAP_BASE		0xffffffffc0000000
 
 #endif /* CONFIG_64BIT */
 
-- 
1.4.4.4


From ricknu-0@student.ltu.se Sat Nov 24 21:22:21 2007
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	Sat, 24 Nov 2007 22:22:20 +0100 (MET)
Date:	Sat, 24 Nov 2007 22:22:19 +0100 (MET)
From:	Richard Knutsson <ricknu-0@student.ltu.se>
To:	ralf@linux-mips.org
Cc:	linux-mips@linux-mips.org, linux-kernel@vger.kernel.org,
	Richard Knutsson <ricknu-0@student.ltu.se>
Message-Id: <20071124211046.9931.46998.sendpatchset@thinktank.campus.ltu.se>
Subject: [PATCH] [MIPS]: Compliment va_start() with va_end().
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Compliment va_start() with va_end().

Signed-off-by: Richard Knutsson <ricknu-0@student.ltu.se>
---

 ieee754.c   |    2 ++
 ieee754dp.c |    2 ++
 ieee754sp.c |    2 ++
 3 files changed, 6 insertions(+)


diff --git a/arch/mips/math-emu/ieee754.c b/arch/mips/math-emu/ieee754.c
index 946aee3..cb1b682 100644
--- a/arch/mips/math-emu/ieee754.c
+++ b/arch/mips/math-emu/ieee754.c
@@ -108,6 +108,7 @@ int ieee754si_xcpt(int r, const char *op, ...)
 	ax.rv.si = r;
 	va_start(ax.ap, op);
 	ieee754_xcpt(&ax);
+	va_end(ax.ap);
 	return ax.rv.si;
 }
 
@@ -122,5 +123,6 @@ s64 ieee754di_xcpt(s64 r, const char *op, ...)
 	ax.rv.di = r;
 	va_start(ax.ap, op);
 	ieee754_xcpt(&ax);
+	va_end(ax.ap);
 	return ax.rv.di;
 }
diff --git a/arch/mips/math-emu/ieee754dp.c b/arch/mips/math-emu/ieee754dp.c
index 3e214aa..6d2d89f 100644
--- a/arch/mips/math-emu/ieee754dp.c
+++ b/arch/mips/math-emu/ieee754dp.c
@@ -57,6 +57,7 @@ ieee754dp ieee754dp_xcpt(ieee754dp r, const char *op, ...)
 	ax.rv.dp = r;
 	va_start(ax.ap, op);
 	ieee754_xcpt(&ax);
+	va_end(ax.ap);
 	return ax.rv.dp;
 }
 
@@ -83,6 +84,7 @@ ieee754dp ieee754dp_nanxcpt(ieee754dp r, const char *op, ...)
 	ax.rv.dp = r;
 	va_start(ax.ap, op);
 	ieee754_xcpt(&ax);
+	va_end(ax.ap);
 	return ax.rv.dp;
 }
 
diff --git a/arch/mips/math-emu/ieee754sp.c b/arch/mips/math-emu/ieee754sp.c
index adda851..4635340 100644
--- a/arch/mips/math-emu/ieee754sp.c
+++ b/arch/mips/math-emu/ieee754sp.c
@@ -58,6 +58,7 @@ ieee754sp ieee754sp_xcpt(ieee754sp r, const char *op, ...)
 	ax.rv.sp = r;
 	va_start(ax.ap, op);
 	ieee754_xcpt(&ax);
+	va_end(ax.ap);
 	return ax.rv.sp;
 }
 
@@ -84,6 +85,7 @@ ieee754sp ieee754sp_nanxcpt(ieee754sp r, const char *op, ...)
 	ax.rv.sp = r;
 	va_start(ax.ap, op);
 	ieee754_xcpt(&ax);
+	va_end(ax.ap);
 	return ax.rv.sp;
 }
 

From tsbogend@alpha.franken.de Sun Nov 25 02:10:32 2007
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Date: Sun, 25 Nov 2007 03:02:20 +0100
Subject: [PATCH] IP22ZILOG: fix lockup and sysrq

- fix lockup when switching from early console to real console
- make sysrq reliable
- fix panic, if sysrq is issued before console is opened

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
 arch/mips/sgi-ip22/ip22-setup.c |   19 ---
 drivers/serial/ip22zilog.c      |  247 +++++++++++++++++----------------------
 include/linux/serial_core.h     |    2 +-
 3 files changed, 107 insertions(+), 161 deletions(-)

diff --git a/arch/mips/sgi-ip22/ip22-setup.c b/arch/mips/sgi-ip22/ip22-setup.c
index 174f09e..5f389ee 100644
--- a/arch/mips/sgi-ip22/ip22-setup.c
+++ b/arch/mips/sgi-ip22/ip22-setup.c
@@ -31,25 +31,6 @@
 unsigned long sgi_gfxaddr;
 EXPORT_SYMBOL_GPL(sgi_gfxaddr);
 
-/*
- * Stop-A is originally a Sun thing that isn't standard on IP22 so to avoid
- * accidents it's disabled by default on IP22.
- *
- * FIXME: provide a mechanism to change the value of stop_a_enabled.
- */
-int stop_a_enabled;
-
-void ip22_do_break(void)
-{
-	if (!stop_a_enabled)
-		return;
-
-	printk("\n");
-	ArcEnterInteractiveMode();
-}
-
-EXPORT_SYMBOL(ip22_do_break);
-
 extern void ip22_be_init(void) __init;
 
 void __init plat_mem_setup(void)
diff --git a/drivers/serial/ip22zilog.c b/drivers/serial/ip22zilog.c
index f3257f7..9c95bc0 100644
--- a/drivers/serial/ip22zilog.c
+++ b/drivers/serial/ip22zilog.c
@@ -45,8 +45,6 @@
 
 #include "ip22zilog.h"
 
-void ip22_do_break(void);
-
 /*
  * On IP22 we need to delay after register accesses but we do not need to
  * flush writes.
@@ -81,12 +79,9 @@ struct uart_ip22zilog_port {
 #define IP22ZILOG_FLAG_REGS_HELD	0x00000040
 #define IP22ZILOG_FLAG_TX_STOPPED	0x00000080
 #define IP22ZILOG_FLAG_TX_ACTIVE	0x00000100
+#define IP22ZILOG_FLAG_RESET_DONE	0x00000200
 
-	unsigned int			cflag;
-
-	/* L1-A keyboard break state.  */
-	int				kbd_id;
-	int				l1_down;
+	unsigned int			tty_break;
 
 	unsigned char			parity_mask;
 	unsigned char			prev_status;
@@ -250,13 +245,26 @@ static void ip22zilog_maybe_update_regs(struct uart_ip22zilog_port *up,
 	}
 }
 
-static void ip22zilog_receive_chars(struct uart_ip22zilog_port *up,
-				   struct zilog_channel *channel)
+#define Rx_BRK 0x0100                   /* BREAK event software flag.  */
+#define Rx_SYS 0x0200                   /* SysRq event software flag.  */
+
+static struct tty_struct *ip22zilog_receive_chars(struct uart_ip22zilog_port *up,
+						  struct zilog_channel *channel)
 {
-	struct tty_struct *tty = up->port.info->tty;	/* XXX info==NULL? */
+	struct tty_struct *tty;
+	unsigned char ch, flag;
+	unsigned int r1;
+
+	tty = NULL;
+	if (up->port.info != NULL &&
+	    up->port.info->tty != NULL)
+		tty = up->port.info->tty;
 
-	while (1) {
-		unsigned char ch, r1, flag;
+	for (;;) {
+		ch = readb(&channel->control);
+		ZSDELAY();
+		if (!(ch & Rx_CH_AV))
+			break;
 
 		r1 = read_zsreg(channel, R1);
 		if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR)) {
@@ -265,43 +273,26 @@ static void ip22zilog_receive_chars(struct uart_ip22zilog_port *up,
 			ZS_WSYNC(channel);
 		}
 
-		ch = readb(&channel->control);
-		ZSDELAY();
-
-		/* This funny hack depends upon BRK_ABRT not interfering
-		 * with the other bits we care about in R1.
-		 */
-		if (ch & BRK_ABRT)
-			r1 |= BRK_ABRT;
-
 		ch = readb(&channel->data);
 		ZSDELAY();
 
 		ch &= up->parity_mask;
 
-		if (ZS_IS_CONS(up) && (r1 & BRK_ABRT)) {
-			/* Wait for BREAK to deassert to avoid potentially
-			 * confusing the PROM.
-			 */
-			while (1) {
-				ch = readb(&channel->control);
-				ZSDELAY();
-				if (!(ch & BRK_ABRT))
-					break;
-			}
-			ip22_do_break();
-			return;
-		}
+		/* Handle the null char got when BREAK is removed.  */
+		if (!ch)
+			r1 |= up->tty_break;
 
 		/* A real serial line, record the character and status.  */
 		flag = TTY_NORMAL;
 		up->port.icount.rx++;
-		if (r1 & (BRK_ABRT | PAR_ERR | Rx_OVR | CRC_ERR)) {
-			if (r1 & BRK_ABRT) {
-				r1 &= ~(PAR_ERR | CRC_ERR);
+		if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR | Rx_SYS | Rx_BRK)) {
+			up->tty_break = 0;
+
+			if (r1 & (Rx_SYS | Rx_BRK)) {
 				up->port.icount.brk++;
-				if (uart_handle_break(&up->port))
-					goto next_char;
+				if (r1 & Rx_SYS)
+					continue;
+				r1 &= ~(PAR_ERR | CRC_ERR);
 			}
 			else if (r1 & PAR_ERR)
 				up->port.icount.parity++;
@@ -310,30 +301,21 @@ static void ip22zilog_receive_chars(struct uart_ip22zilog_port *up,
 			if (r1 & Rx_OVR)
 				up->port.icount.overrun++;
 			r1 &= up->port.read_status_mask;
-			if (r1 & BRK_ABRT)
+			if (r1 & Rx_BRK)
 				flag = TTY_BREAK;
 			else if (r1 & PAR_ERR)
 				flag = TTY_PARITY;
 			else if (r1 & CRC_ERR)
 				flag = TTY_FRAME;
 		}
-		if (uart_handle_sysrq_char(&up->port, ch))
-			goto next_char;
 
-		if (up->port.ignore_status_mask == 0xff ||
-		    (r1 & up->port.ignore_status_mask) == 0)
-		    	tty_insert_flip_char(tty, ch, flag);
+		if (uart_handle_sysrq_char(&up->port, ch))
+			continue;
 
-		if (r1 & Rx_OVR)
-			tty_insert_flip_char(tty, 0, TTY_OVERRUN);
-	next_char:
-		ch = readb(&channel->control);
-		ZSDELAY();
-		if (!(ch & Rx_CH_AV))
-			break;
+		if (tty)
+			uart_insert_char(&up->port, r1, Rx_OVR, ch, flag);
 	}
-
-	tty_flip_buffer_push(tty);
+	return tty;
 }
 
 static void ip22zilog_status_handle(struct uart_ip22zilog_port *up,
@@ -348,6 +330,15 @@ static void ip22zilog_status_handle(struct uart_ip22zilog_port *up,
 	ZSDELAY();
 	ZS_WSYNC(channel);
 
+	if (up->curregs[R15] & BRKIE) {
+		if ((status & BRK_ABRT) && !(up->prev_status & BRK_ABRT)) {
+			if (uart_handle_break(&up->port))
+				up->tty_break = Rx_SYS;
+			else
+				up->tty_break = Rx_BRK;
+		}
+	}
+
 	if (ZS_WANTS_MODEM_STATUS(up)) {
 		if (status & SYNC)
 			up->port.icount.dsr++;
@@ -356,10 +347,10 @@ static void ip22zilog_status_handle(struct uart_ip22zilog_port *up,
 		 * But it does not tell us which bit has changed, we have to keep
 		 * track of this ourselves.
 		 */
-		if ((status & DCD) ^ up->prev_status)
+		if ((status ^ up->prev_status) ^ DCD)
 			uart_handle_dcd_change(&up->port,
 					       (status & DCD));
-		if ((status & CTS) ^ up->prev_status)
+		if ((status ^ up->prev_status) ^ CTS)
 			uart_handle_cts_change(&up->port,
 					       (status & CTS));
 
@@ -447,19 +438,21 @@ static irqreturn_t ip22zilog_interrupt(int irq, void *dev_id)
 	while (up) {
 		struct zilog_channel *channel
 			= ZILOG_CHANNEL_FROM_PORT(&up->port);
+		struct tty_struct *tty;
 		unsigned char r3;
 
 		spin_lock(&up->port.lock);
 		r3 = read_zsreg(channel, R3);
 
 		/* Channel A */
+		tty = NULL;
 		if (r3 & (CHAEXT | CHATxIP | CHARxIP)) {
 			writeb(RES_H_IUS, &channel->control);
 			ZSDELAY();
 			ZS_WSYNC(channel);
 
 			if (r3 & CHARxIP)
-				ip22zilog_receive_chars(up, channel);
+				tty = ip22zilog_receive_chars(up, channel);
 			if (r3 & CHAEXT)
 				ip22zilog_status_handle(up, channel);
 			if (r3 & CHATxIP)
@@ -467,18 +460,22 @@ static irqreturn_t ip22zilog_interrupt(int irq, void *dev_id)
 		}
 		spin_unlock(&up->port.lock);
 
+		if (tty)
+			tty_flip_buffer_push(tty);
+
 		/* Channel B */
 		up = up->next;
 		channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
 
 		spin_lock(&up->port.lock);
+		tty = NULL;
 		if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) {
 			writeb(RES_H_IUS, &channel->control);
 			ZSDELAY();
 			ZS_WSYNC(channel);
 
 			if (r3 & CHBRxIP)
-				ip22zilog_receive_chars(up, channel);
+				tty = ip22zilog_receive_chars(up, channel);
 			if (r3 & CHBEXT)
 				ip22zilog_status_handle(up, channel);
 			if (r3 & CHBTxIP)
@@ -486,6 +483,9 @@ static irqreturn_t ip22zilog_interrupt(int irq, void *dev_id)
 		}
 		spin_unlock(&up->port.lock);
 
+		if (tty)
+			tty_flip_buffer_push(tty);
+
 		up = up->next;
 	}
 
@@ -681,11 +681,46 @@ static void ip22zilog_break_ctl(struct uart_port *port, int break_state)
 	spin_unlock_irqrestore(&port->lock, flags);
 }
 
+static void __ip22zilog_reset(struct uart_ip22zilog_port *up)
+{
+	struct zilog_channel *channel;
+	int i;
+
+	if (up->flags & IP22ZILOG_FLAG_RESET_DONE)
+		return;
+
+	/* Let pending transmits finish.  */
+	channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
+	for (i = 0; i < 1000; i++) {
+		unsigned char stat = read_zsreg(channel, R1);
+		if (stat & ALL_SNT)
+			break;
+		udelay(100);
+	}
+
+	if (!ZS_IS_CHANNEL_A(up)) {
+		up++;
+		channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
+	}
+	write_zsreg(channel, R9, FHWRES);
+	ZSDELAY_LONG();
+	(void) read_zsreg(channel, R0);
+
+	up->flags |= IP22ZILOG_FLAG_RESET_DONE;
+	up->next->flags |= IP22ZILOG_FLAG_RESET_DONE;
+}
+
 static void __ip22zilog_startup(struct uart_ip22zilog_port *up)
 {
 	struct zilog_channel *channel;
 
 	channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
+
+	__ip22zilog_reset(up);
+
+	__load_zsregs(channel, up->curregs);
+	/* set master interrupt enable */
+	write_zsreg(channel, R9, up->curregs[R9]);
 	up->prev_status = readb(&channel->control);
 
 	/* Enable receiver and transmitter.  */
@@ -859,8 +894,6 @@ ip22zilog_set_termios(struct uart_port *port, struct ktermios *termios,
 	else
 		up->flags &= ~IP22ZILOG_FLAG_MODEM_STATUS;
 
-	up->cflag = termios->c_cflag;
-
 	ip22zilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(port));
 	uart_update_timeout(port, termios->c_cflag, baud);
 
@@ -992,74 +1025,29 @@ ip22zilog_console_write(struct console *con, const char *s, unsigned int count)
 	spin_unlock_irqrestore(&up->port.lock, flags);
 }
 
-void
-ip22serial_console_termios(struct console *con, char *options)
-{
-	int baud = 9600, bits = 8, cflag;
-	int parity = 'n';
-	int flow = 'n';
-
-	if (options)
-		uart_parse_options(options, &baud, &parity, &bits, &flow);
-
-	cflag = CREAD | HUPCL | CLOCAL;
-
-	switch (baud) {
-		case 150: cflag |= B150; break;
-		case 300: cflag |= B300; break;
-		case 600: cflag |= B600; break;
-		case 1200: cflag |= B1200; break;
-		case 2400: cflag |= B2400; break;
-		case 4800: cflag |= B4800; break;
-		case 9600: cflag |= B9600; break;
-		case 19200: cflag |= B19200; break;
-		case 38400: cflag |= B38400; break;
-		default: baud = 9600; cflag |= B9600; break;
-	}
-
-	con->cflag = cflag | CS8;			/* 8N1 */
-
-	uart_update_timeout(&ip22zilog_port_table[con->index].port, cflag, baud);
-}
-
 static int __init ip22zilog_console_setup(struct console *con, char *options)
 {
 	struct uart_ip22zilog_port *up = &ip22zilog_port_table[con->index];
 	unsigned long flags;
-	int baud, brg;
-
-	printk("Console: ttyS%d (IP22-Zilog)\n", con->index);
+	int baud = 9600, bits = 8;
+	int parity = 'n';
+	int flow = 'n';
 
-	/* Get firmware console settings.  */
-	ip22serial_console_termios(con, options);
+	up->flags |= IP22ZILOG_FLAG_IS_CONS;
 
-	/* Firmware console speed is limited to 150-->38400 baud so
-	 * this hackish cflag thing is OK.
-	 */
-	switch (con->cflag & CBAUD) {
-	case B150: baud = 150; break;
-	case B300: baud = 300; break;
-	case B600: baud = 600; break;
-	case B1200: baud = 1200; break;
-	case B2400: baud = 2400; break;
-	case B4800: baud = 4800; break;
-	default: case B9600: baud = 9600; break;
-	case B19200: baud = 19200; break;
-	case B38400: baud = 38400; break;
-	};
-
-	brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR);
+	printk(KERN_INFO "Console: ttyS%d (IP22-Zilog)\n", con->index);
 
 	spin_lock_irqsave(&up->port.lock, flags);
 
-	up->curregs[R15] = BRKIE;
-	ip22zilog_convert_to_zs(up, con->cflag, 0, brg);
+	up->curregs[R15] |= BRKIE;
 
 	__ip22zilog_startup(up);
 
 	spin_unlock_irqrestore(&up->port.lock, flags);
 
-	return 0;
+	if (options)
+		uart_parse_options(options, &baud, &parity, &bits, &flow);
+	return uart_set_options(&up->port, con, baud, parity, bits, flow);
 }
 
 static struct uart_driver ip22zilog_reg;
@@ -1140,25 +1128,10 @@ static void __init ip22zilog_prepare(void)
 		up[(chip * 2) + 1].port.line = (chip * 2) + 1;
 		up[(chip * 2) + 1].flags |= IP22ZILOG_FLAG_IS_CHANNEL_A;
 	}
-}
-
-static void __init ip22zilog_init_hw(void)
-{
-	int i;
-
-	for (i = 0; i < NUM_CHANNELS; i++) {
-		struct uart_ip22zilog_port *up = &ip22zilog_port_table[i];
-		struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
-		unsigned long flags;
-		int baud, brg;
 
-		spin_lock_irqsave(&up->port.lock, flags);
-
-		if (ZS_IS_CHANNEL_A(up)) {
-			write_zsreg(channel, R9, FHWRES);
-			ZSDELAY_LONG();
-			(void) read_zsreg(channel, R0);
-		}
+	for (channel = 0; channel < NUM_CHANNELS; channel++) {
+		struct uart_ip22zilog_port *up = &ip22zilog_port_table[channel];
+		int brg;
 
 		/* Normal serial TTY. */
 		up->parity_mask = 0xff;
@@ -1169,16 +1142,10 @@ static void __init ip22zilog_init_hw(void)
 		up->curregs[R9] = NV | MIE;
 		up->curregs[R10] = NRZ;
 		up->curregs[R11] = TCBR | RCBR;
-		baud = 9600;
-		brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR);
+		brg = BPS_TO_BRG(9600, ZS_CLOCK / ZS_CLOCK_DIVISOR);
 		up->curregs[R12] = (brg & 0xff);
 		up->curregs[R13] = (brg >> 8) & 0xff;
 		up->curregs[R14] = BRENAB;
-		__load_zsregs(channel, up->curregs);
-	        /* set master interrupt enable */
-	        write_zsreg(channel, R9, up->curregs[R9]);
-
-		spin_unlock_irqrestore(&up->port.lock, flags);
 	}
 }
 
@@ -1195,8 +1162,6 @@ static int __init ip22zilog_ports_init(void)
 		panic("IP22-Zilog: Unable to register zs interrupt handler.\n");
 	}
 
-	ip22zilog_init_hw();
-
 	ret = uart_register_driver(&ip22zilog_reg);
 	if (ret == 0) {
 		int i;
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 6a5203f..9963f81 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -437,7 +437,7 @@ uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
 #ifdef SUPPORT_SYSRQ
 	if (port->sysrq) {
 		if (ch && time_before(jiffies, port->sysrq)) {
-			handle_sysrq(ch, port->info->tty);
+			handle_sysrq(ch, port->info ? port->info->tty : NULL);
 			port->sysrq = 0;
 			return 1;
 		}
-- 
1.4.4.4


From tsbogend@alpha.franken.de Sun Nov 25 10:03:32 2007
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To:	linux-mips@linux-mips.org
Cc:	ralf@linux-mips.org
Subject: Re: [PATCH] IP22: Fix modules for 64bit kernels by using a CKSEG2 MAP_BASE
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From:	tsbogend@alpha.franken.de (Thomas Bogendoerfer)
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On Fri, Nov 23, 2007 at 08:41:55PM +0100, Thomas Bogendoerfer wrote:
> 
> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
> ---
>  include/asm-mips/mach-ip22/spaces.h |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/include/asm-mips/mach-ip22/spaces.h b/include/asm-mips/mach-ip22/spaces.h
> index 7f9fa6f..8264d0a 100644
> --- a/include/asm-mips/mach-ip22/spaces.h
> +++ b/include/asm-mips/mach-ip22/spaces.h
> @@ -18,7 +18,7 @@
>  #define CAC_BASE		0xffffffff80000000
>  #define IO_BASE			0xffffffffa0000000
>  #define UNCAC_BASE		0xffffffffa0000000
> -#define MAP_BASE		0xc000000000000000
> +#define MAP_BASE		0xffffffffc0000000
>  
>  #endif /* CONFIG_64BIT */

please drop this bogus patch, it causes vmalloc allocations fails. The bug
it tries to fix isn't even there.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea.                                                [ RFC1925, 2.3 ]

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Date:	Sun, 25 Nov 2007 17:59:30 +0530
From:	kaka <share.kt@gmail.com>
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	celinux-dev@tree.celinuxforum.org,
	linux-fbdev-users@lists.sourceforge.net
Subject: Usage of mmap command(in directFB)
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------=_Part_35026_14554447.1195993770305
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Hi All,

void *mmap(void *start, size_t length, int prot, int flags,           int
fd, off_t offset);

I am providing 1.6MB as length parameter in mmap command.
It is giving me error as Can't mmap region with error number EINVAL. I
searched for the probable causes for EINVAL error number, and cheked it that
i am satisfying all of them

on the other hand when i am providing 1.384MB as length parameter in mmap
command.
It is successful.
This mmap command is being issued from User space(from the DIrectFB code in
systems/fbdev.c)

The exact command which i am writing is
addr = mmap(NULL, dfb_fbdev->shared->fix.mmio_len, PROT_READ | PROT_WRITE,
MAO_SHARED, dfb_fbdev->fd, 0);

Can anybody provide any clue on it?
I want to access the mmio regs at offset (0.9MB to 1.6MB offset).
Also in my system MIPS board(broadcom chip), the framebuffer driver contains
support for MMIO length as 1.6MB.

-- 
Thanks & Regards,
kaka


-- 
Thanks & Regards,
kaka

------=_Part_35026_14554447.1195993770305
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<div>Hi All,</div>
<div>&nbsp;</div>
<div>void *mmap(void *start, size_t length, int prot, int flags,&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; int<br>fd, off_t offset);<br>&nbsp;</div>
<div>I am providing&nbsp;1.6MB as length parameter in mmap command.</div>
<div>It is giving me error as Can&#39;t mmap region with error number EINVAL. I searched for the probable causes for EINVAL error number, and cheked it that i am satisfying all of them</div>
<div>&nbsp;</div>
<div>on the other hand when i am providing&nbsp;1.384MB as length parameter in mmap command.</div>
<div>It is successful.<br clear="all">This mmap command is being issued from User space(from the DIrectFB code in systems/fbdev.c)</div>
<div>&nbsp;</div>
<div>The exact command which i am writing is </div>
<div>addr = mmap(NULL, dfb_fbdev-&gt;shared-&gt;fix.mmio_len, PROT_READ | PROT_WRITE, MAO_SHARED, dfb_fbdev-&gt;fd, 0);</div>
<div>&nbsp;</div>
<div>Can anybody provide any clue on it?</div>
<div>I want to access the mmio regs at offset (0.9MB to 1.6MB offset).</div>
<div>Also&nbsp;in my system MIPS board(broadcom chip), the framebuffer driver contains support for MMIO length as 1.6MB. </div>
<div><br>-- <br>Thanks &amp; Regards,<br>kaka </div><br clear="all"><br>-- <br>Thanks &amp; Regards,<br>kaka 

------=_Part_35026_14554447.1195993770305--

From tbm@cyrius.com Sun Nov 25 12:49:09 2007
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Subject: BigSur: garbled characters during boot
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When I boot a current kernel from git on a BigSur board I get some
garbled characters:

Synthesized TLB store handler fastpath (31 instructions).
Synthesized TLB modify handler fastpath (30 instructions).
ï¿½ï¿½Í¡ï¿½Ñ…ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½É¥ï¿½ï¿½éšï¿½ï¿½ï¿½ï¿½BzÉ‘ï¿½ï¿½éªbï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½Ñ•Í¥5Rï¿½Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
Memory: 250436k/257568k available (2561k kernel code, 6940k reserved, 826k data, 132k init, 0k highmem)
Mount-cache hash table entries: 512

Any idea what this might be?
-- 
Martin Michlmayr
http://www.cyrius.com/

From tbm@cyrius.com Sun Nov 25 12:53:19 2007
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Subject: BigSur: oops loading ramdisk
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With a 32 bit kernel (current git) on BigSur, I get an oops while
trying to load the ramdisk:

Linux version 2.6.24-rc3-g2ffbb837-dirty (tbm@em64t) (gcc version 4.1.2 20061115 (prerelease) (Debian 4.1.1-21)) #4 Sun Nov 25 12:44:26 UTC 2007
...
RPC: Registered tcp transport module.
RAMDISK: Compressed image found at block 0
VFS: Mounted root (cramfs filesystem) readonly.
Freeing unused kernel memory: 132k freed
CPU 0 Unable to handle kernel paging request at virtual address 00000000, epc == 802931b8, ra == 802965f4
Oops[#1]:
Cpu 0
$ 0   : 00000000 10001f00 00000000 00000000
$ 4   : 8ed01000 00000000 8f421df8 00000000
$ 8   : 80430000 8f472a6c 00000000 0000000e
$12   : 8f00603c ffffffff 00000000 00000084
$16   : 8f4a22c0 80440000 00500001 8ed01000
$20   : 00000002 8f0147a0 00000000 00000000
$24   : 00000003 000000cd
$28   : 8f420000 8f421da8 00000000 802965f4
Hi    : 00000002
Lo    : 82828285
epc   : 802931b8 init_dev+0x8c/0x56c     Not tainted
ra    : 802965f4 tty_open+0x148/0x330
Status: 10001f03    KERNEL EXL IE
Cause : 00808008
BadVA : 00000000
PrId  : 01041100 (SiByte SB1A)
Modules linked in:
Process swapper (pid: 1, threadinfo=8f420000, task=8f41f928)
Stack : 80178a60 00000003 804487e4 8ed01000 8f421dfc 00000000 8f4a22c0 80440000
        00500001 00000001 00000002 8f0147a0 00000000 00000000 00000000 802965f4
        8f006d28 00000000 8f421df8 00000000 8f006d28 00000000 00000000 8048ff20
        8f006d28 8f4a22c0 8f4032a0 80173018 00000000 8f413000 ffffff9c 8017bb74
        00000000 80435ba0 8f4a22c0 8f006d28 00000000 80172ef8 8016df8c 80430000
        ...
Call Trace:
[<802931b8>] init_dev+0x8c/0x56c
[<802965f4>] tty_open+0x148/0x330
[<80173018>] chrdev_open+0x120/0x178
[<8016df8c>] __dentry_open+0x104/0x210
[<8016e144>] nameidata_to_filp+0x30/0x54
[<8016e1a8>] do_filp_open+0x40/0x54
[<8016e220>] do_sys_open+0x64/0x114
[<80100448>] init_post+0x30/0xe8
[<80450874>] kernel_init+0x2e4/0x314


Code: 8c8200a0  00051880  00431021 <8c510000> 162000e2  00000000  8e64003c  10800009  24020002
Kernel panic - not syncing: Attempted to kill init!
Rebooting in 5 seconds..Passing control back to CFE...

-- 
Martin Michlmayr
http://www.cyrius.com/

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* Martin Michlmayr <tbm@cyrius.com> [2007-11-25 13:52]:
> With a 32 bit kernel (current git) on BigSur, I get an oops while
> trying to load the ramdisk:

With a 64 bit kernel I get:

RAMDISK: Compressed image found at block 0
VFS: Mounted root (cramfs filesystem) readonly.
Freeing unused kernel memory: 144k freed
Warning: unable to open an initial console.
Error -3 while decompressing!
ffffffff804f2028(7120)->a800000000516000(4096)
Error -3 while decompressing!
ffffffff804f1280(7026)->a800000000515000(4096)
request_module: runaway loop modprobe binfmt-0000
request_module: runaway loop modprobe binfmt-0000
request_module: runaway loop modprobe binfmt-0000
request_module: runaway loop modprobe binfmt-0000
request_module: runaway loop modprobe binfmt-0000

I have the following in my .config:

CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_MIPS32_COMPAT=y
CONFIG_COMPAT=y
CONFIG_SYSVIPC_COMPAT=y
CONFIG_MIPS32_O32=y
CONFIG_MIPS32_N32=y
CONFIG_BINFMT_ELF32=y

With 2.6.22 (64 bit) I get:

Linux version 2.6.22-3-sb1a-bcm91480b (Debian 2.6.22-6) (maks@debian.org) (gcc version 4.1.3 20071019 (prerelease) (Debian 4.1.2-17)) #1 SMP Thu Nov 15 10:51:13 UTC 2007
...
RAMDISK: Compressed image found at block 0
VFS: Mounted root (cramfs filesystem) readonly.
[ delay of a few seconds here -- tbm ]
[DL2?]
[DL2D]
[DC ?]
[DC D]
[HELO]
[L1CI]
[L2CI]
[CPU3]
[cpu3]
[CPU2]
[cpu2]
...

-- 
Martin Michlmayr
http://www.cyrius.com/

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From tbm@cyrius.com Sun Nov 25 13:43:54 2007
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* Atsushi Nemoto <anemo@mba.ocn.ne.jp> [2007-11-25 22:28]:
> Do you enable EARLY_PRINTK?

Yes.

> IIRC Maciej have tried to fix this issue a while ago on LKML.

Right, I think I remember that discussion.  Did anything come out
of it?
-- 
Martin Michlmayr
http://www.cyrius.com/

From tbm@cyrius.com Sun Nov 25 14:26:59 2007
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Subject: BigSur: io_map_base not set for PCI bus 0000:00
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When I put a SATA/PATA PCI card into the first PCI slot of my BigSur,
I get the following with current git:

io_map_base of root PCI bus 0000:00 unset.  Trying to continue but you better
fix this issue or report it to linux-mips@linux-mips.org or your vendor.
Kernel panic - not syncing: To avoid data corruption io_map_base MUST be set with multiple PCI domains.

This doesn't happen in any of the other PCI slots but in this case the
kernel doesn't seem to see the card (CFE does).

CFE says:
PCI[0] bus 0 slot 1/0: unknown vendor 0x1106 product 0x3249 (RAID mass storage, rev 0x50)

This is with CFE 1.4.2 in LE mode.
-- 
Martin Michlmayr
http://www.cyrius.com/

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* Martin Michlmayr <tbm@cyrius.com> [2007-11-25 15:26]:
> io_map_base of root PCI bus 0000:00 unset.  Trying to continue but you better
> fix this issue or report it to linux-mips@linux-mips.org or your vendor.
> Kernel panic - not syncing: To avoid data corruption io_map_base MUST be set with multiple PCI domains.
> 
> CFE says:
> PCI[0] bus 0 slot 1/0: unknown vendor 0x1106 product 0x3249 (RAID mass storage, rev 0x50)

With a different card, I get:

PCI[0] bus 0 slot 1/0: unknown vendor 0x1095 product 0x0680 (RAID mass storage, rev 0x02)
...
nbd: registered device at major 43
sil680: 133MHz clock.
scsi0 : pata_sil680
scsi1 : pata_sil680
ata1: PATA max UDMA/133 irq 8
ata2: PATA max UDMA/133 irq 8
ata1.00: ATA-6: SAMSUNG SV1021H, PJ100-13, max UDMA/33
ata1.00: 19932192 sectors, multi 0: LBA
ata1.00: configured for UDMA/33
scsi 0:0:0:0: Direct-Access     ATA      SAMSUNG SV1021H  PJ10 PQ: 0 ANSI: 5
sd 0:0:0:0: [sda] 19932192 512-byte hardware sectors (10205 MB)
sd 0:0:0:0: [sda] Write Protect is off
sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
sd 0:0:0:0: [sda] 19932192 512-byte hardware sectors (10205 MB)
sd 0:0:0:0: [sda] Write Protect is off
sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
 sda: unknown partition table

... but then it hangs here.

The first card (that failed) is a SATA/PATA PCI card, this one is an old IDE
PCI card.  I think they conform to different PCI specs.  Another difference
is that CFE knows that my old IDE card is a PCIIDE card ("PCIIDE: 1
controllers found") whereas it doesn't find a PCIIDE controller for the newer
card (I think CFE hard codes PCI devices so this is hardly surprising).
Maybe the problem is that CFE didn't properly initialize the card?
-- 
Martin Michlmayr
http://www.cyrius.com/

From wink@saville.com Sun Nov 25 18:43:45 2007
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Hello,

I was wondering which MIPS tool chains people are
using and recommend, prebuilt and/or roll-your-own.
 From http://www.kegel.com/crosstool/crosstool-0.43/buildlogs/
there doesn't seem to be any combination that builds cleanly
for the mips/mipsel.

Regards,

Wink Saville


From wd@denx.de Sun Nov 25 19:22:09 2007
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To:	Wink Saville <wink@saville.com>
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Subject: Re: Tool chain for linux using mips
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In message <4749C258.8020400@saville.com> you wrote:
> 
> I was wondering which MIPS tool chains people are
> using and recommend, prebuilt and/or roll-your-own.
>  From http://www.kegel.com/crosstool/crosstool-0.43/buildlogs/
> there doesn't seem to be any combination that builds cleanly
> for the mips/mipsel.

Well, we use the ELDK, obviously.

See http://www.denx.de/wiki/view/DULG/ELDK.

For the ELDK mailing list please see
http://lists.denx.de/mailman/listinfo/eldk

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
Accident: A condition in which presence of mind is good, but  absence
of body is better.

From tsbogend@alpha.franken.de Sun Nov 25 22:18:08 2007
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On Sun, Nov 25, 2007 at 10:28:03PM +0900, Atsushi Nemoto wrote:
> Do you enable EARLY_PRINTK?  If so, this might be the console-handover
> issue.  On the handover, "console handover: boot ..." message will be
> printed both early console and new console.  If they were same device,
> drivers might be confused.

it will not be printed on both consoles, but while early console is
active the real console driver does things to the serial chip,
which might confuse the early console driver/prom.

> IIRC Maciej have tried to fix this issue a while ago on LKML.

this didn't work out for ip22zilog, so I digged through the mess. I
solved the problem by setting up the chip in one go. Before there
was some chip setup during probing, which killed prom_putchar().

Thomas

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea.                                                [ RFC1925, 2.3 ]

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-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA256

Hi, see http://wiki.debian.org/BuildingCrossCompilers for Debian-based
systems.

//Markus


Wink Saville wrote:
> Hello,
>
> I was wondering which MIPS tool chains people are using and
> recommend, prebuilt and/or roll-your-own. From
> http://www.kegel.com/crosstool/crosstool-0.43/buildlogs/ there
> doesn't seem to be any combination that builds cleanly for the
> mips/mipsel.
>
> Regards,
>
> Wink Saville
>
>


- --
_______________________________________

Mr Markus Gothe
Software Engineer

Phone: +46 (0)13 21 81 20 (ext. 1046)
Fax: +46 (0)13 21 21 15
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From sbrown@cortland.com Mon Nov 26 11:06:08 2007
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Subject: Re: ohci-ssb driver on a Broadcom BCM5354
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Michael Buesch wrote:
> On Sunday 18 November 2007 23:47:52 John W. Linville wrote:
>   
>> You probably want to make Michael Buesch aware of this issue.
>>     
>
> I'm not sure anyone really tested this beyond some insmod tests.
> I did not test this, as I don't have such a device.
> So if you have any patches to fix this, please send them. I'm
> certainly the wrong person who can fix this. ;)
>
>   
Adding the following at the end of ssb_ohci_attach seems to fix the problem.

 if (ssb_dma_set_mask(dev, DMA_32BIT_MASK))
   return -EOPNOTSUPP;

I guessed at the dma mask. Would the code in the b43 driver that selects 
a dma mask be appropriate here?

Steve




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On Sun, 25 Nov 2007, Martin Michlmayr wrote:

> > IIRC Maciej have tried to fix this issue a while ago on LKML.
> 
> Right, I think I remember that discussion.  Did anything come out
> of it?

 The exact mess encountered is specific to the chip/board used.  I haven't 
seen too much of clutter on my SWARM, so I just disregarded the issue.  
If this is found problematic, I may have a look at the driver to see if 
anything can be done.  At least CFE sources are available, so if it turns 
out to be an issue there, it can be fixed too.  All the relevant registers 
in the DUART are r/w, so the state can easily be examined and preserved if 
need be.

 But please feel free to complain to the author of the change -- I am not 
sure if the amount of breakage throughout systems is justified by the gain 
from the additional message.  And there may be a way to implement it in a 
less intrusive way.

  Maciej

From mb@bu3sch.de Mon Nov 26 14:17:52 2007
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On Monday 26 November 2007 12:05:33 Steve Brown wrote:
> Michael Buesch wrote:
> > On Sunday 18 November 2007 23:47:52 John W. Linville wrote:
> >   
> >> You probably want to make Michael Buesch aware of this issue.
> >>     
> >
> > I'm not sure anyone really tested this beyond some insmod tests.
> > I did not test this, as I don't have such a device.
> > So if you have any patches to fix this, please send them. I'm
> > certainly the wrong person who can fix this. ;)
> >
> >   
> Adding the following at the end of ssb_ohci_attach seems to fix the problem.
> 
>  if (ssb_dma_set_mask(dev, DMA_32BIT_MASK))
>    return -EOPNOTSUPP;
> 
> I guessed at the dma mask. Would the code in the b43 driver that selects 
> a dma mask be appropriate here?

I have no idea. If it makes it work, yeah. Cool. Let's add this.

-- 
Greetings Michael.

From ralf@linux-mips.org Mon Nov 26 14:46:30 2007
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Date:	Mon, 26 Nov 2007 14:45:43 +0000
From:	Ralf Baechle <ralf@linux-mips.org>
To:	Martin Michlmayr <tbm@cyrius.com>
Cc:	linux-mips@linux-mips.org, manoj.ekbote@broadcom.com,
	mark.e.mason@broadcom.com
Subject: Re: BigSur: oops loading ramdisk
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On Sun, Nov 25, 2007 at 01:52:29PM +0100, Martin Michlmayr wrote:

> With a 32 bit kernel (current git) on BigSur, I get an oops while
> trying to load the ramdisk:
> 
> Linux version 2.6.24-rc3-g2ffbb837-dirty (tbm@em64t) (gcc version 4.1.2 20061115 (prerelease) (Debian 4.1.1-21)) #4 Sun Nov 25 12:44:26 UTC 2007

I've just modified the memory initialization code significantly to add
support for ZONE_DMA32 for the Sibyte boxes, so could you retest?

Thanks,

  Ralf

From tsbogend@alpha.franken.de Mon Nov 26 16:09:19 2007
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	linux-kernel@vger.kernel.org
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Date:	Mon, 26 Nov 2007 16:58:03 +0100
Subject: [UPDATED PATCH] IP22ZILOG: fix lockup and sysrq
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- fix lockup when switching from early console to real console
- make sysrq reliable
- fix panic, if sysrq is issued before console is opened

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
 arch/mips/sgi-ip22/ip22-setup.c |   19 ---
 drivers/serial/ip22zilog.c      |  247 +++++++++++++++++----------------------
 include/asm-mips/system.h       |    2 -
 include/linux/serial_core.h     |    2 +-
 4 files changed, 107 insertions(+), 163 deletions(-)

diff --git a/arch/mips/sgi-ip22/ip22-setup.c b/arch/mips/sgi-ip22/ip22-setup.c
index 174f09e..5f389ee 100644
--- a/arch/mips/sgi-ip22/ip22-setup.c
+++ b/arch/mips/sgi-ip22/ip22-setup.c
@@ -31,25 +31,6 @@
 unsigned long sgi_gfxaddr;
 EXPORT_SYMBOL_GPL(sgi_gfxaddr);
 
-/*
- * Stop-A is originally a Sun thing that isn't standard on IP22 so to avoid
- * accidents it's disabled by default on IP22.
- *
- * FIXME: provide a mechanism to change the value of stop_a_enabled.
- */
-int stop_a_enabled;
-
-void ip22_do_break(void)
-{
-	if (!stop_a_enabled)
-		return;
-
-	printk("\n");
-	ArcEnterInteractiveMode();
-}
-
-EXPORT_SYMBOL(ip22_do_break);
-
 extern void ip22_be_init(void) __init;
 
 void __init plat_mem_setup(void)
diff --git a/drivers/serial/ip22zilog.c b/drivers/serial/ip22zilog.c
index f3257f7..9c95bc0 100644
--- a/drivers/serial/ip22zilog.c
+++ b/drivers/serial/ip22zilog.c
@@ -45,8 +45,6 @@
 
 #include "ip22zilog.h"
 
-void ip22_do_break(void);
-
 /*
  * On IP22 we need to delay after register accesses but we do not need to
  * flush writes.
@@ -81,12 +79,9 @@ struct uart_ip22zilog_port {
 #define IP22ZILOG_FLAG_REGS_HELD	0x00000040
 #define IP22ZILOG_FLAG_TX_STOPPED	0x00000080
 #define IP22ZILOG_FLAG_TX_ACTIVE	0x00000100
+#define IP22ZILOG_FLAG_RESET_DONE	0x00000200
 
-	unsigned int			cflag;
-
-	/* L1-A keyboard break state.  */
-	int				kbd_id;
-	int				l1_down;
+	unsigned int			tty_break;
 
 	unsigned char			parity_mask;
 	unsigned char			prev_status;
@@ -250,13 +245,26 @@ static void ip22zilog_maybe_update_regs(struct uart_ip22zilog_port *up,
 	}
 }
 
-static void ip22zilog_receive_chars(struct uart_ip22zilog_port *up,
-				   struct zilog_channel *channel)
+#define Rx_BRK 0x0100                   /* BREAK event software flag.  */
+#define Rx_SYS 0x0200                   /* SysRq event software flag.  */
+
+static struct tty_struct *ip22zilog_receive_chars(struct uart_ip22zilog_port *up,
+						  struct zilog_channel *channel)
 {
-	struct tty_struct *tty = up->port.info->tty;	/* XXX info==NULL? */
+	struct tty_struct *tty;
+	unsigned char ch, flag;
+	unsigned int r1;
+
+	tty = NULL;
+	if (up->port.info != NULL &&
+	    up->port.info->tty != NULL)
+		tty = up->port.info->tty;
 
-	while (1) {
-		unsigned char ch, r1, flag;
+	for (;;) {
+		ch = readb(&channel->control);
+		ZSDELAY();
+		if (!(ch & Rx_CH_AV))
+			break;
 
 		r1 = read_zsreg(channel, R1);
 		if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR)) {
@@ -265,43 +273,26 @@ static void ip22zilog_receive_chars(struct uart_ip22zilog_port *up,
 			ZS_WSYNC(channel);
 		}
 
-		ch = readb(&channel->control);
-		ZSDELAY();
-
-		/* This funny hack depends upon BRK_ABRT not interfering
-		 * with the other bits we care about in R1.
-		 */
-		if (ch & BRK_ABRT)
-			r1 |= BRK_ABRT;
-
 		ch = readb(&channel->data);
 		ZSDELAY();
 
 		ch &= up->parity_mask;
 
-		if (ZS_IS_CONS(up) && (r1 & BRK_ABRT)) {
-			/* Wait for BREAK to deassert to avoid potentially
-			 * confusing the PROM.
-			 */
-			while (1) {
-				ch = readb(&channel->control);
-				ZSDELAY();
-				if (!(ch & BRK_ABRT))
-					break;
-			}
-			ip22_do_break();
-			return;
-		}
+		/* Handle the null char got when BREAK is removed.  */
+		if (!ch)
+			r1 |= up->tty_break;
 
 		/* A real serial line, record the character and status.  */
 		flag = TTY_NORMAL;
 		up->port.icount.rx++;
-		if (r1 & (BRK_ABRT | PAR_ERR | Rx_OVR | CRC_ERR)) {
-			if (r1 & BRK_ABRT) {
-				r1 &= ~(PAR_ERR | CRC_ERR);
+		if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR | Rx_SYS | Rx_BRK)) {
+			up->tty_break = 0;
+
+			if (r1 & (Rx_SYS | Rx_BRK)) {
 				up->port.icount.brk++;
-				if (uart_handle_break(&up->port))
-					goto next_char;
+				if (r1 & Rx_SYS)
+					continue;
+				r1 &= ~(PAR_ERR | CRC_ERR);
 			}
 			else if (r1 & PAR_ERR)
 				up->port.icount.parity++;
@@ -310,30 +301,21 @@ static void ip22zilog_receive_chars(struct uart_ip22zilog_port *up,
 			if (r1 & Rx_OVR)
 				up->port.icount.overrun++;
 			r1 &= up->port.read_status_mask;
-			if (r1 & BRK_ABRT)
+			if (r1 & Rx_BRK)
 				flag = TTY_BREAK;
 			else if (r1 & PAR_ERR)
 				flag = TTY_PARITY;
 			else if (r1 & CRC_ERR)
 				flag = TTY_FRAME;
 		}
-		if (uart_handle_sysrq_char(&up->port, ch))
-			goto next_char;
 
-		if (up->port.ignore_status_mask == 0xff ||
-		    (r1 & up->port.ignore_status_mask) == 0)
-		    	tty_insert_flip_char(tty, ch, flag);
+		if (uart_handle_sysrq_char(&up->port, ch))
+			continue;
 
-		if (r1 & Rx_OVR)
-			tty_insert_flip_char(tty, 0, TTY_OVERRUN);
-	next_char:
-		ch = readb(&channel->control);
-		ZSDELAY();
-		if (!(ch & Rx_CH_AV))
-			break;
+		if (tty)
+			uart_insert_char(&up->port, r1, Rx_OVR, ch, flag);
 	}
-
-	tty_flip_buffer_push(tty);
+	return tty;
 }
 
 static void ip22zilog_status_handle(struct uart_ip22zilog_port *up,
@@ -348,6 +330,15 @@ static void ip22zilog_status_handle(struct uart_ip22zilog_port *up,
 	ZSDELAY();
 	ZS_WSYNC(channel);
 
+	if (up->curregs[R15] & BRKIE) {
+		if ((status & BRK_ABRT) && !(up->prev_status & BRK_ABRT)) {
+			if (uart_handle_break(&up->port))
+				up->tty_break = Rx_SYS;
+			else
+				up->tty_break = Rx_BRK;
+		}
+	}
+
 	if (ZS_WANTS_MODEM_STATUS(up)) {
 		if (status & SYNC)
 			up->port.icount.dsr++;
@@ -356,10 +347,10 @@ static void ip22zilog_status_handle(struct uart_ip22zilog_port *up,
 		 * But it does not tell us which bit has changed, we have to keep
 		 * track of this ourselves.
 		 */
-		if ((status & DCD) ^ up->prev_status)
+		if ((status ^ up->prev_status) ^ DCD)
 			uart_handle_dcd_change(&up->port,
 					       (status & DCD));
-		if ((status & CTS) ^ up->prev_status)
+		if ((status ^ up->prev_status) ^ CTS)
 			uart_handle_cts_change(&up->port,
 					       (status & CTS));
 
@@ -447,19 +438,21 @@ static irqreturn_t ip22zilog_interrupt(int irq, void *dev_id)
 	while (up) {
 		struct zilog_channel *channel
 			= ZILOG_CHANNEL_FROM_PORT(&up->port);
+		struct tty_struct *tty;
 		unsigned char r3;
 
 		spin_lock(&up->port.lock);
 		r3 = read_zsreg(channel, R3);
 
 		/* Channel A */
+		tty = NULL;
 		if (r3 & (CHAEXT | CHATxIP | CHARxIP)) {
 			writeb(RES_H_IUS, &channel->control);
 			ZSDELAY();
 			ZS_WSYNC(channel);
 
 			if (r3 & CHARxIP)
-				ip22zilog_receive_chars(up, channel);
+				tty = ip22zilog_receive_chars(up, channel);
 			if (r3 & CHAEXT)
 				ip22zilog_status_handle(up, channel);
 			if (r3 & CHATxIP)
@@ -467,18 +460,22 @@ static irqreturn_t ip22zilog_interrupt(int irq, void *dev_id)
 		}
 		spin_unlock(&up->port.lock);
 
+		if (tty)
+			tty_flip_buffer_push(tty);
+
 		/* Channel B */
 		up = up->next;
 		channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
 
 		spin_lock(&up->port.lock);
+		tty = NULL;
 		if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) {
 			writeb(RES_H_IUS, &channel->control);
 			ZSDELAY();
 			ZS_WSYNC(channel);
 
 			if (r3 & CHBRxIP)
-				ip22zilog_receive_chars(up, channel);
+				tty = ip22zilog_receive_chars(up, channel);
 			if (r3 & CHBEXT)
 				ip22zilog_status_handle(up, channel);
 			if (r3 & CHBTxIP)
@@ -486,6 +483,9 @@ static irqreturn_t ip22zilog_interrupt(int irq, void *dev_id)
 		}
 		spin_unlock(&up->port.lock);
 
+		if (tty)
+			tty_flip_buffer_push(tty);
+
 		up = up->next;
 	}
 
@@ -681,11 +681,46 @@ static void ip22zilog_break_ctl(struct uart_port *port, int break_state)
 	spin_unlock_irqrestore(&port->lock, flags);
 }
 
+static void __ip22zilog_reset(struct uart_ip22zilog_port *up)
+{
+	struct zilog_channel *channel;
+	int i;
+
+	if (up->flags & IP22ZILOG_FLAG_RESET_DONE)
+		return;
+
+	/* Let pending transmits finish.  */
+	channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
+	for (i = 0; i < 1000; i++) {
+		unsigned char stat = read_zsreg(channel, R1);
+		if (stat & ALL_SNT)
+			break;
+		udelay(100);
+	}
+
+	if (!ZS_IS_CHANNEL_A(up)) {
+		up++;
+		channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
+	}
+	write_zsreg(channel, R9, FHWRES);
+	ZSDELAY_LONG();
+	(void) read_zsreg(channel, R0);
+
+	up->flags |= IP22ZILOG_FLAG_RESET_DONE;
+	up->next->flags |= IP22ZILOG_FLAG_RESET_DONE;
+}
+
 static void __ip22zilog_startup(struct uart_ip22zilog_port *up)
 {
 	struct zilog_channel *channel;
 
 	channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
+
+	__ip22zilog_reset(up);
+
+	__load_zsregs(channel, up->curregs);
+	/* set master interrupt enable */
+	write_zsreg(channel, R9, up->curregs[R9]);
 	up->prev_status = readb(&channel->control);
 
 	/* Enable receiver and transmitter.  */
@@ -859,8 +894,6 @@ ip22zilog_set_termios(struct uart_port *port, struct ktermios *termios,
 	else
 		up->flags &= ~IP22ZILOG_FLAG_MODEM_STATUS;
 
-	up->cflag = termios->c_cflag;
-
 	ip22zilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(port));
 	uart_update_timeout(port, termios->c_cflag, baud);
 
@@ -992,74 +1025,29 @@ ip22zilog_console_write(struct console *con, const char *s, unsigned int count)
 	spin_unlock_irqrestore(&up->port.lock, flags);
 }
 
-void
-ip22serial_console_termios(struct console *con, char *options)
-{
-	int baud = 9600, bits = 8, cflag;
-	int parity = 'n';
-	int flow = 'n';
-
-	if (options)
-		uart_parse_options(options, &baud, &parity, &bits, &flow);
-
-	cflag = CREAD | HUPCL | CLOCAL;
-
-	switch (baud) {
-		case 150: cflag |= B150; break;
-		case 300: cflag |= B300; break;
-		case 600: cflag |= B600; break;
-		case 1200: cflag |= B1200; break;
-		case 2400: cflag |= B2400; break;
-		case 4800: cflag |= B4800; break;
-		case 9600: cflag |= B9600; break;
-		case 19200: cflag |= B19200; break;
-		case 38400: cflag |= B38400; break;
-		default: baud = 9600; cflag |= B9600; break;
-	}
-
-	con->cflag = cflag | CS8;			/* 8N1 */
-
-	uart_update_timeout(&ip22zilog_port_table[con->index].port, cflag, baud);
-}
-
 static int __init ip22zilog_console_setup(struct console *con, char *options)
 {
 	struct uart_ip22zilog_port *up = &ip22zilog_port_table[con->index];
 	unsigned long flags;
-	int baud, brg;
-
-	printk("Console: ttyS%d (IP22-Zilog)\n", con->index);
+	int baud = 9600, bits = 8;
+	int parity = 'n';
+	int flow = 'n';
 
-	/* Get firmware console settings.  */
-	ip22serial_console_termios(con, options);
+	up->flags |= IP22ZILOG_FLAG_IS_CONS;
 
-	/* Firmware console speed is limited to 150-->38400 baud so
-	 * this hackish cflag thing is OK.
-	 */
-	switch (con->cflag & CBAUD) {
-	case B150: baud = 150; break;
-	case B300: baud = 300; break;
-	case B600: baud = 600; break;
-	case B1200: baud = 1200; break;
-	case B2400: baud = 2400; break;
-	case B4800: baud = 4800; break;
-	default: case B9600: baud = 9600; break;
-	case B19200: baud = 19200; break;
-	case B38400: baud = 38400; break;
-	};
-
-	brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR);
+	printk(KERN_INFO "Console: ttyS%d (IP22-Zilog)\n", con->index);
 
 	spin_lock_irqsave(&up->port.lock, flags);
 
-	up->curregs[R15] = BRKIE;
-	ip22zilog_convert_to_zs(up, con->cflag, 0, brg);
+	up->curregs[R15] |= BRKIE;
 
 	__ip22zilog_startup(up);
 
 	spin_unlock_irqrestore(&up->port.lock, flags);
 
-	return 0;
+	if (options)
+		uart_parse_options(options, &baud, &parity, &bits, &flow);
+	return uart_set_options(&up->port, con, baud, parity, bits, flow);
 }
 
 static struct uart_driver ip22zilog_reg;
@@ -1140,25 +1128,10 @@ static void __init ip22zilog_prepare(void)
 		up[(chip * 2) + 1].port.line = (chip * 2) + 1;
 		up[(chip * 2) + 1].flags |= IP22ZILOG_FLAG_IS_CHANNEL_A;
 	}
-}
-
-static void __init ip22zilog_init_hw(void)
-{
-	int i;
-
-	for (i = 0; i < NUM_CHANNELS; i++) {
-		struct uart_ip22zilog_port *up = &ip22zilog_port_table[i];
-		struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
-		unsigned long flags;
-		int baud, brg;
 
-		spin_lock_irqsave(&up->port.lock, flags);
-
-		if (ZS_IS_CHANNEL_A(up)) {
-			write_zsreg(channel, R9, FHWRES);
-			ZSDELAY_LONG();
-			(void) read_zsreg(channel, R0);
-		}
+	for (channel = 0; channel < NUM_CHANNELS; channel++) {
+		struct uart_ip22zilog_port *up = &ip22zilog_port_table[channel];
+		int brg;
 
 		/* Normal serial TTY. */
 		up->parity_mask = 0xff;
@@ -1169,16 +1142,10 @@ static void __init ip22zilog_init_hw(void)
 		up->curregs[R9] = NV | MIE;
 		up->curregs[R10] = NRZ;
 		up->curregs[R11] = TCBR | RCBR;
-		baud = 9600;
-		brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR);
+		brg = BPS_TO_BRG(9600, ZS_CLOCK / ZS_CLOCK_DIVISOR);
 		up->curregs[R12] = (brg & 0xff);
 		up->curregs[R13] = (brg >> 8) & 0xff;
 		up->curregs[R14] = BRENAB;
-		__load_zsregs(channel, up->curregs);
-	        /* set master interrupt enable */
-	        write_zsreg(channel, R9, up->curregs[R9]);
-
-		spin_unlock_irqrestore(&up->port.lock, flags);
 	}
 }
 
@@ -1195,8 +1162,6 @@ static int __init ip22zilog_ports_init(void)
 		panic("IP22-Zilog: Unable to register zs interrupt handler.\n");
 	}
 
-	ip22zilog_init_hw();
-
 	ret = uart_register_driver(&ip22zilog_reg);
 	if (ret == 0) {
 		int i;
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index 1030562..a944eda 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -209,8 +209,6 @@ extern void *set_except_vector(int n, void *addr);
 extern unsigned long ebase;
 extern void per_cpu_trap_init(void);
 
-extern int stop_a_enabled;
-
 /*
  * See include/asm-ia64/system.h; prevents deadlock on SMP
  * systems.
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 6a5203f..9963f81 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -437,7 +437,7 @@ uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
 #ifdef SUPPORT_SYSRQ
 	if (port->sysrq) {
 		if (ch && time_before(jiffies, port->sysrq)) {
-			handle_sysrq(ch, port->info->tty);
+			handle_sysrq(ch, port->info ? port->info->tty : NULL);
 			port->sysrq = 0;
 			return 1;
 		}
-- 
1.4.4.4


From tbm@cyrius.com Mon Nov 26 16:18:12 2007
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From:	Martin Michlmayr <tbm@cyrius.com>
To:	Ralf Baechle <ralf@linux-mips.org>
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	mark.e.mason@broadcom.com
Subject: Re: BigSur: oops loading ramdisk
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* Ralf Baechle <ralf@linux-mips.org> [2007-11-26 14:45]:
> > With a 32 bit kernel (current git) on BigSur, I get an oops while
> > trying to load the ramdisk:
> I've just modified the memory initialization code significantly to add
> support for ZONE_DMA32 for the Sibyte boxes, so could you retest?

Same problem with your patch (current Linus git plus your patch):

Freeing unused kernel memory: 136k freed
CPU 0 Unable to handle kernel paging request at virtual address 00000000, epc == 8029a238, ra == 8029d674
Oops[#1]:
Cpu 0
$ 0   : 00000000 10001f00 00000000 00000000
$ 4   : 8e89f000 00000000 8f421df8 00000000
$ 8   : 80440000 8e889a6c 00000000 0000000e
$12   : 8ec6903c ffffffff 00000000 00000088
$16   : 8eda0240 80450000 00500001 8e89f000
$20   : 00000002 8f00d114 00000000 00000000
$24   : 00000003 000000cd
$28   : 8f420000 8f421da8 00000000 8029d674
Hi    : 00000002
Lo    : 82828285
epc   : 8029a238 init_dev+0x8c/0x56c     Not tainted
ra    : 8029d674 tty_open+0x148/0x330
Status: 10001f03    KERNEL EXL IE
Cause : 00808008
BadVA : 00000000
PrId  : 01041100 (SiByte SB1A)
Modules linked in:
Process swapper (pid: 1, threadinfo=8f420000, task=8f41f928)
Stack : 801789f0 00000003 8044e874 8e89f000 8f421dfc 00000000 8eda0240 80450000
        00500001 00000001 00000002 8f00d114 00000000 00000000 00000000 8029d674
        8ec69d28 00000000 8f421df8 00000000 8ec69d28 00000000 00000000 80496fe0
        8ec69d28 8eda0240 8f4032a0 80172fa8 00000000 8f413000 ffffff9c 8017bb04
        00000000 8043bba0 8eda0240 8ec69d28 00000000 80172e88 8016df1c 80440000
        ...
Call Trace:
[<8029a238>] init_dev+0x8c/0x56c
[<8029d674>] tty_open+0x148/0x330
[<80172fa8>] chrdev_open+0x120/0x178
[<8016df1c>] __dentry_open+0x104/0x210
[<8016e0d4>] nameidata_to_filp+0x30/0x54
[<8016e138>] do_filp_open+0x40/0x54
[<8016e1b0>] do_sys_open+0x64/0x114
[<80100448>] init_post+0x30/0xe8
[<80456874>] kernel_init+0x2e4/0x314


Code: 8c8200a0  00051880  00431021 <8c510000> 162000e2  00000000  8e64003c  10800009  24020002
Kernel panic - not syncing: Attempted to kill init!

-- 
Martin Michlmayr
http://www.cyrius.com/

From ralf@linux-mips.org Mon Nov 26 16:20:20 2007
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On Mon, Nov 26, 2007 at 04:58:03PM +0100, Thomas Bogendoerfer wrote:

> - fix lockup when switching from early console to real console
> - make sysrq reliable
> - fix panic, if sysrq is issued before console is opened
> 
> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

Acked-by: Ralf Baechle <ralf@linux-mips.org>

Several Indy users have reported the issues fixed by this patch so it's
2.6.24 material.

  Ralf

From ralf@linux-mips.org Mon Nov 26 16:57:07 2007
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On Sun, Nov 25, 2007 at 11:03:12AM +0100, Thomas Bogendoerfer wrote:

> please drop this bogus patch, it causes vmalloc allocations fails. The bug
> it tries to fix isn't even there.

Ok.

  Ralf

From ralf@linux-mips.org Mon Nov 26 17:16:19 2007
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On Sat, Nov 24, 2007 at 10:22:19PM +0100, Richard Knutsson wrote:

> Compliment va_start() with va_end().

Thanks, applied.

  Ralf

From earlm@mips.com Mon Nov 26 19:54:43 2007
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Subject: RE: Tool chain for linux using mips
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Few months ago I was able to successfully build using 
crosstools-0.43. I used demo-mipsel.sh to build c,c++ using 
the following command line ... 

eval `cat mips.dat gcc-3.4.5-glibc-2.3.6-tls.dat` sh all.sh --notest --gdb

-earlm

> -----Original Message-----
> From: linux-mips-bounce@linux-mips.org
> [mailto:linux-mips-bounce@linux-mips.org]On Behalf Of Wink Saville
> Sent: Sunday, November 25, 2007 10:44 AM
> To: linux-mips@linux-mips.org
> Subject: Tool chain for linux using mips
> 
> 
> Hello,
> 
> I was wondering which MIPS tool chains people are
> using and recommend, prebuilt and/or roll-your-own.
>  From http://www.kegel.com/crosstool/crosstool-0.43/buildlogs/
> there doesn't seem to be any combination that builds cleanly
> for the mips/mipsel.
> 
> Regards,
> 
> Wink Saville
> 
> 
> 

From tsbogend@alpha.franken.de Mon Nov 26 22:40:16 2007
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From:	tsbogend@alpha.franken.de (Thomas Bogendoerfer)
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I finally cleaned up Peter Fuerst's IP28 patches and solved some of
the IP28 issues in an IMHO more eye-friendly way (no ip26ucmem).
My IP28 boots with these patches from an Debian sarge NFS root and
is able to dd data from the harddrive. I'm going to send this patches
to this list and the subsystem maintainers.

There is one change missing to get a working SCSI driver, because
a proper fix will be done in 2.6.25. The quick&dirty workaround is
below. The workaround makes sure that the sense_buffer lives in
its own cache line by aligning and extendin it.

The patch "Use real cache invalidate" still contains one problem.
It will not flush the cache correctly, if the given size is bigger
than the second level cache. The problem is, that there is no index
invalidate cache operation available. I have two ideas to solve that.
One is to always do a range invalidate (maybe just by using this only
for R10k machines, which usually have quite big caches) or scan through
the cache and use the tag informations to do hit invalidate. If anybody
has a better idea please speak up :-)

Have fun with the patches,
Thomas.


diff --git a/include/scsi/scsi_cmnd.h b/include/scsi/scsi_cmnd.h
index 3f47e52..3f3d7aa 100644
--- a/include/scsi/scsi_cmnd.h
+++ b/include/scsi/scsi_cmnd.h
@@ -87,11 +87,13 @@ struct scsi_cmnd {
 	struct request *request;	/* The command we are
 				   	   working on */
 
+	unsigned char xxx1[0x48];
 #define SCSI_SENSE_BUFFERSIZE 	96
 	unsigned char sense_buffer[SCSI_SENSE_BUFFERSIZE];
 				/* obtained by REQUEST SENSE when
 				 * CHECK CONDITION is received on original
 				 * command (auto-sense) */
+	unsigned char xxx2[32];
 
 	/* Low-level done function - can be used by low-level driver to point
 	 *        to completion function.  Not used by mid/upper level code. */




-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea.                                                [ RFC1925, 2.3 ]

From tsbogend@alpha.franken.de Mon Nov 26 22:40:46 2007
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To:	linux-mips@linux-mips.org
cc:	ralf@linux-mips.org
Date:	Sun, 25 Nov 2007 11:27:06 +0100
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Taken from Peter Fuersts IP28 patches

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
 include/asm-mips/sgi/ioc.h |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/asm-mips/sgi/ioc.h b/include/asm-mips/sgi/ioc.h
index f3e3dc9..343ed15 100644
--- a/include/asm-mips/sgi/ioc.h
+++ b/include/asm-mips/sgi/ioc.h
@@ -138,8 +138,8 @@ struct sgioc_regs {
 	u8 _sysid[3];
 	volatile u8 sysid;
 #define SGIOC_SYSID_FULLHOUSE	0x01
-#define SGIOC_SYSID_BOARDREV(x)	((x & 0xe0) > 5)
-#define SGIOC_SYSID_CHIPREV(x)	((x & 0x1e) > 1)
+#define SGIOC_SYSID_BOARDREV(x)	(((x) & 0x1e) >> 1)
+#define SGIOC_SYSID_CHIPREV(x)	(((x) & 0xe0) >> 5)
 	u32 _unused2;
 	u8 _read[3];
 	volatile u8 read;
-- 
1.4.4.4


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From:	Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To:	linux-mips@linux-mips.org
cc:	ralf@linux-mips.org
Date:	Sun, 25 Nov 2007 11:28:03 +0100
Subject: [PATCH] fix warning when using PHYS_TO_XKSEG_xx()
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use CONST64 cast in PHYS_TO_XPHYS macro to avoid warning about shifts
longer than the target type.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
 arch/mips/lib/uncached.c     |    8 ++++----
 include/asm-mips/addrspace.h |    2 +-
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/mips/lib/uncached.c b/arch/mips/lib/uncached.c
index 58d14f4..b59b770 100644
--- a/arch/mips/lib/uncached.c
+++ b/arch/mips/lib/uncached.c
@@ -46,8 +46,8 @@ unsigned long __init run_uncached(void *func)
 	if (sp >= (long)CKSEG0 && sp < (long)CKSEG2)
 		usp = CKSEG1ADDR(sp);
 #ifdef CONFIG_64BIT
-	else if ((long long)sp >= (long long)PHYS_TO_XKPHYS(0LL, 0) &&
-		 (long long)sp < (long long)PHYS_TO_XKPHYS(8LL, 0))
+	else if ((long long)sp >= (long long)PHYS_TO_XKPHYS(0, 0) &&
+		 (long long)sp < (long long)PHYS_TO_XKPHYS(8, 0))
 		usp = PHYS_TO_XKPHYS((long long)K_CALG_UNCACHED,
 				     XKPHYS_TO_PHYS((long long)sp));
 #endif
@@ -58,8 +58,8 @@ unsigned long __init run_uncached(void *func)
 	if (lfunc >= (long)CKSEG0 && lfunc < (long)CKSEG2)
 		ufunc = CKSEG1ADDR(lfunc);
 #ifdef CONFIG_64BIT
-	else if ((long long)lfunc >= (long long)PHYS_TO_XKPHYS(0LL, 0) &&
-		 (long long)lfunc < (long long)PHYS_TO_XKPHYS(8LL, 0))
+	else if ((long long)lfunc >= (long long)PHYS_TO_XKPHYS(0, 0) &&
+		 (long long)lfunc < (long long)PHYS_TO_XKPHYS(8, 0))
 		ufunc = PHYS_TO_XKPHYS((long long)K_CALG_UNCACHED,
 				       XKPHYS_TO_PHYS((long long)lfunc));
 #endif
diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h
index 0bb7a93..9002d66 100644
--- a/include/asm-mips/addrspace.h
+++ b/include/asm-mips/addrspace.h
@@ -127,7 +127,7 @@
 #define PHYS_TO_XKSEG_CACHED(p)		PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE, (p))
 #define XKPHYS_TO_PHYS(p)		((p) & TO_PHYS_MASK)
 #define PHYS_TO_XKPHYS(cm, a)		(_CONST64_(0x8000000000000000) | \
-					 ((cm)<<59) | (a))
+					 (_CONST64_(cm)<<59) | (a))
 
 /*
  * The ultimate limited of the 64-bit MIPS architecture:  2 bits for selecting
-- 
1.4.4.4


From tsbogend@alpha.franken.de Mon Nov 26 22:41:47 2007
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From:	Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To:	linux-scsi@vger.kernel.org, linux-mips@linux-mips.org
cc:	ralf@linux-mips.org, James.Bottomley@HansenPartnership.com
Date:	Mon, 26 Nov 2007 18:41:15 +0100
Subject: [PATCH] SGIWD93: use cached memory access to make driver work on IP28
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Following patch is 2.6.25 material needed to get SGI IP28 machines
supported.

Thomas.

SGI IP28 machines would need special treatment (enable adding addtional
wait states) when accessing memory uncached. To avoid this pain I
changed the driver to use only cached access to memory.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
 drivers/scsi/sgiwd93.c |   68 ++++++++++++++++++++++++++++++-----------------
 1 files changed, 43 insertions(+), 25 deletions(-)

diff --git a/drivers/scsi/sgiwd93.c b/drivers/scsi/sgiwd93.c
index eef8275..d4e6468 100644
--- a/drivers/scsi/sgiwd93.c
+++ b/drivers/scsi/sgiwd93.c
@@ -33,19 +33,27 @@
 
 struct ip22_hostdata {
 	struct WD33C93_hostdata wh;
-	struct hpc_data {
-		dma_addr_t      dma;
-		void		*cpu;
-	} hd;
+	dma_addr_t dma;
+	void *cpu;
+	void *dev;
 };
 
 #define host_to_hostdata(host) ((struct ip22_hostdata *)((host)->hostdata))
 
 struct hpc_chunk {
 	struct hpc_dma_desc desc;
-	u32 _padding;	/* align to quadword boundary */
+	u32 _padding[128/4 - 3];	/* align to biggest cache line size */
 };
 
+/* space for hpc dma descriptors */
+#define HPC_DMA_SIZE   (4 * PAGE_SIZE)
+
+/* we only need to sync the dma descriptor */
+#define DMA_HPC_SYNC(dev, hcp, dir) \
+	dma_cache_sync(dev, hcp, sizeof(struct hpc_dma_desc), dir)
+
+#define DMA_DIR(d)   ((d == DATA_OUT_DIR) ? DMA_TO_DEVICE : DMA_FROM_DEVICE)
+
 static irqreturn_t sgiwd93_intr(int irq, void *dev_id)
 {
 	struct Scsi_Host * host = dev_id;
@@ -59,14 +67,14 @@ static irqreturn_t sgiwd93_intr(int irq, void *dev_id)
 }
 
 static inline
-void fill_hpc_entries(struct hpc_chunk *hcp, struct scsi_cmnd *cmd, int datainp)
+void fill_hpc_entries(void *dev, struct hpc_chunk *hcp, struct scsi_cmnd *cmd, int datainp)
 {
 	unsigned long len = cmd->SCp.this_residual;
 	void *addr = cmd->SCp.ptr;
 	dma_addr_t physaddr;
 	unsigned long count;
 
-	physaddr = dma_map_single(NULL, addr, len, cmd->sc_data_direction);
+	physaddr = dma_map_single(dev, addr, len, DMA_DIR(datainp));
 	cmd->SCp.dma_handle = physaddr;
 
 	while (len) {
@@ -77,6 +85,7 @@ void fill_hpc_entries(struct hpc_chunk *hcp, struct scsi_cmnd *cmd, int datainp)
 		count = len > 8192 ? 8192 : len;
 		hcp->desc.pbuf = physaddr;
 		hcp->desc.cntinfo = count;
+		DMA_HPC_SYNC(dev, hcp, DMA_TO_DEVICE);
 		hcp++;
 		len -= count;
 		physaddr += count;
@@ -89,6 +98,7 @@ void fill_hpc_entries(struct hpc_chunk *hcp, struct scsi_cmnd *cmd, int datainp)
 	 */
 	hcp->desc.pbuf = 0;
 	hcp->desc.cntinfo = HPCDMA_EOX;
+	DMA_HPC_SYNC(dev, hcp, DMA_TO_DEVICE);
 }
 
 static int dma_setup(struct scsi_cmnd *cmd, int datainp)
@@ -96,7 +106,7 @@ static int dma_setup(struct scsi_cmnd *cmd, int datainp)
 	struct ip22_hostdata *hdata = host_to_hostdata(cmd->device->host);
 	struct hpc3_scsiregs *hregs =
 		(struct hpc3_scsiregs *) cmd->device->host->base;
-	struct hpc_chunk *hcp = (struct hpc_chunk *) hdata->hd.cpu;
+	struct hpc_chunk *hcp = (struct hpc_chunk *)hdata->cpu;
 
 	pr_debug("dma_setup: datainp<%d> hcp<%p> ", datainp, hcp);
 
@@ -111,12 +121,12 @@ static int dma_setup(struct scsi_cmnd *cmd, int datainp)
 	if (cmd->SCp.ptr == NULL || cmd->SCp.this_residual == 0)
 		return 1;
 
-	fill_hpc_entries(hcp, cmd, datainp);
+	fill_hpc_entries(hdata->dev, hcp, cmd, datainp);
 
 	pr_debug(" HPCGO\n");
 
 	/* Start up the HPC. */
-	hregs->ndptr = hdata->hd.dma;
+	hregs->ndptr = hdata->dma;
 	if (datainp)
 		hregs->ctrl = HPC3_SCTRL_ACTIVE;
 	else
@@ -134,6 +144,9 @@ static void dma_stop(struct Scsi_Host *instance, struct scsi_cmnd *SCpnt,
 	if (!SCpnt)
 		return;
 
+	if (SCpnt->SCp.ptr == NULL || SCpnt->SCp.this_residual == 0)
+		return;
+
 	hregs = (struct hpc3_scsiregs *) SCpnt->device->host->base;
 
 	pr_debug("dma_stop: status<%d> ", status);
@@ -145,8 +158,9 @@ static void dma_stop(struct Scsi_Host *instance, struct scsi_cmnd *SCpnt,
 			barrier();
 	}
 	hregs->ctrl = 0;
-	dma_unmap_single(NULL, SCpnt->SCp.dma_handle, SCpnt->SCp.this_residual,
-	                 SCpnt->sc_data_direction);
+	dma_unmap_single(hdata->dev, SCpnt->SCp.dma_handle,
+			 SCpnt->SCp.this_residual,
+			 DMA_DIR(hdata->wh.dma_dir));
 
 	pr_debug("\n");
 }
@@ -160,22 +174,25 @@ void sgiwd93_reset(unsigned long base)
 	hregs->ctrl = 0;
 }
 
-static inline void init_hpc_chain(struct hpc_data *hd)
+static inline void init_hpc_chain(void *dev, struct ip22_hostdata *hdata)
 {
-	struct hpc_chunk *hcp = (struct hpc_chunk *) hd->cpu;
-	struct hpc_chunk *dma = (struct hpc_chunk *) hd->dma;
+	struct hpc_chunk *hcp = (struct hpc_chunk *)hdata->cpu;
+	dma_addr_t dma = hdata->dma;
 	unsigned long start, end;
 
 	start = (unsigned long) hcp;
-	end = start + PAGE_SIZE;
+	end = start + (4 * PAGE_SIZE);
 	while (start < end) {
-		hcp->desc.pnext = (u32) (dma + 1);
+		hcp->desc.pnext = (u32) (dma + sizeof(struct hpc_chunk));
 		hcp->desc.cntinfo = HPCDMA_EOX;
-		hcp++; dma++;
+		DMA_HPC_SYNC(dev, hcp, DMA_TO_DEVICE);
+		hcp++;
+		dma += sizeof(struct hpc_chunk);
 		start += sizeof(struct hpc_chunk);
 	};
 	hcp--;
-	hcp->desc.pnext = hd->dma;
+	hcp->desc.pnext = hdata->dma;
+	DMA_HPC_SYNC(dev, hcp, DMA_TO_DEVICE);
 }
 
 static int sgiwd93_bus_reset(struct scsi_cmnd *cmd)
@@ -234,16 +251,17 @@ static int __init sgiwd93_probe(struct platform_device *pdev)
 	host->irq = irq;
 
 	hdata = host_to_hostdata(host);
-	hdata->hd.cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE,
-	                                   &hdata->hd.dma, GFP_KERNEL);
-	if (!hdata->hd.cpu) {
+	hdata->dev = &pdev->dev;
+	hdata->cpu = dma_alloc_noncoherent(&pdev->dev, HPC_DMA_SIZE,
+					   &hdata->dma, GFP_KERNEL);
+	if (!hdata->cpu) {
 		printk(KERN_WARNING "sgiwd93: Could not allocate memory for "
 		       "host %d buffer.\n", unit);
 		err = -ENOMEM;
 		goto out_put;
 	}
 
-	init_hpc_chain(&hdata->hd);
+	init_hpc_chain(&pdev->dev, hdata);
 
 	regs.SASR = wdregs + 3;
 	regs.SCMD = wdregs + 7;
@@ -273,7 +291,7 @@ static int __init sgiwd93_probe(struct platform_device *pdev)
 out_irq:
 	free_irq(irq, host);
 out_free:
-	dma_free_coherent(NULL, PAGE_SIZE, hdata->hd.cpu, hdata->hd.dma);
+	dma_free_noncoherent(NULL, HPC_DMA_SIZE, hdata->cpu, hdata->dma);
 out_put:
 	scsi_host_put(host);
 out:
@@ -289,7 +307,7 @@ static void __exit sgiwd93_remove(struct platform_device *pdev)
 
 	scsi_remove_host(host);
 	free_irq(pd->irq, host);
-	dma_free_coherent(&pdev->dev, PAGE_SIZE, hdata->hd.cpu, hdata->hd.dma);
+	dma_free_noncoherent(&pdev->dev, HPC_DMA_SIZE, hdata->cpu, hdata->dma);
 	scsi_host_put(host);
 }
 
-- 
1.4.4.4


From tsbogend@alpha.franken.de Mon Nov 26 22:42:17 2007
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From:	Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To:	linux-mips@linux-mips.org
cc:	ralf@linux-mips.org
Date:	Sun, 25 Nov 2007 11:47:56 +0100
Subject: [PATCH] IP28: added cache barrier to assembly routines
Message-Id: <20071126223955.9BAAAC2B26@solo.franken.de>
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IP28 needs special treatment to avoid speculative accesses. gcc
takes care for .c code, but for assembly code we need to do it
manually.

This is taken from Peter Fuersts IP28 patches.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
 arch/mips/lib/memcpy.S       |   10 ++++++++++
 arch/mips/lib/memset.S       |    5 +++++
 arch/mips/lib/strncpy_user.S |    1 +
 include/asm-mips/asm.h       |    8 ++++++++
 4 files changed, 24 insertions(+), 0 deletions(-)

diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S
index a526c62..054399d 100644
--- a/arch/mips/lib/memcpy.S
+++ b/arch/mips/lib/memcpy.S
@@ -194,6 +194,7 @@ FEXPORT(__copy_user)
 	 */
 #define rem t8
 
+	R10KCBARRIER(0(ra))
 	/*
 	 * The "issue break"s below are very approximate.
 	 * Issue delays for dcache fills will perturb the schedule, as will
@@ -226,6 +227,7 @@ both_aligned:
 	PREF(	1, 3*32(dst) )
 	.align	4
 1:
+	R10KCBARRIER(0(ra))
 EXC(	LOAD	t0, UNIT(0)(src),	l_exc)
 EXC(	LOAD	t1, UNIT(1)(src),	l_exc_copy)
 EXC(	LOAD	t2, UNIT(2)(src),	l_exc_copy)
@@ -267,6 +269,7 @@ EXC(	LOAD	t2, UNIT(2)(src),	l_exc_copy)
 EXC(	LOAD	t3, UNIT(3)(src),	l_exc_copy)
 	SUB	len, len, 4*NBYTES
 	ADD	src, src, 4*NBYTES
+	R10KCBARRIER(0(ra))
 EXC(	STORE	t0, UNIT(0)(dst),	s_exc_p4u)
 EXC(	STORE	t1, UNIT(1)(dst),	s_exc_p3u)
 EXC(	STORE	t2, UNIT(2)(dst),	s_exc_p2u)
@@ -280,6 +283,7 @@ less_than_4units:
 	beq	rem, len, copy_bytes
 	 nop
 1:
+	R10KCBARRIER(0(ra))
 EXC(	LOAD	t0, 0(src),		l_exc)
 	ADD	src, src, NBYTES
 	SUB	len, len, NBYTES
@@ -325,6 +329,7 @@ EXC(	LDFIRST	t3, FIRST(0)(src),	l_exc)
 EXC(	LDREST	t3, REST(0)(src),	l_exc_copy)
 	SUB	t2, t2, t1	# t2 = number of bytes copied
 	xor	match, t0, t1
+	R10KCBARRIER(0(ra))
 EXC(	STFIRST t3, FIRST(0)(dst),	s_exc)
 	beq	len, t2, done
 	 SUB	len, len, t2
@@ -345,6 +350,7 @@ src_unaligned_dst_aligned:
  * It's OK to load FIRST(N+1) before REST(N) because the two addresses
  * are to the same unit (unless src is aligned, but it's not).
  */
+	R10KCBARRIER(0(ra))
 EXC(	LDFIRST	t0, FIRST(0)(src),	l_exc)
 EXC(	LDFIRST	t1, FIRST(1)(src),	l_exc_copy)
 	SUB     len, len, 4*NBYTES
@@ -373,6 +379,7 @@ cleanup_src_unaligned:
 	beq	rem, len, copy_bytes
 	 nop
 1:
+	R10KCBARRIER(0(ra))
 EXC(	LDFIRST t0, FIRST(0)(src),	l_exc)
 EXC(	LDREST	t0, REST(0)(src),	l_exc_copy)
 	ADD	src, src, NBYTES
@@ -386,6 +393,7 @@ copy_bytes_checklen:
 	 nop
 copy_bytes:
 	/* 0 < len < NBYTES  */
+	R10KCBARRIER(0(ra))
 #define COPY_BYTE(N)			\
 EXC(	lb	t0, N(src), l_exc);	\
 	SUB	len, len, 1;		\
@@ -498,6 +506,7 @@ LEAF(__rmemcpy)					/* a0=dst a1=src a2=len */
 	ADD	a1, a2				# src = src + len
 
 r_end_bytes:
+	R10KCBARRIER(0(ra))
 	lb	t0, -1(a1)
 	SUB	a2, a2, 0x1
 	sb	t0, -1(a0)
@@ -510,6 +519,7 @@ r_out:
 	 move	a2, zero
 
 r_end_bytes_up:
+	R10KCBARRIER(0(ra))
 	lb	t0, (a1)
 	SUB	a2, a2, 0x1
 	sb	t0, (a0)
diff --git a/arch/mips/lib/memset.S b/arch/mips/lib/memset.S
index 3f8b8b3..aad0639 100644
--- a/arch/mips/lib/memset.S
+++ b/arch/mips/lib/memset.S
@@ -77,6 +77,7 @@ FEXPORT(__bzero)
 	beqz		t0, 1f
 	 PTR_SUBU	t0, LONGSIZE		/* alignment in bytes */
 
+	R10KCBARRIER(0(ra))
 #ifdef __MIPSEB__
 	EX(LONG_S_L, a1, (a0), first_fixup)	/* make word/dword aligned */
 #endif
@@ -94,11 +95,13 @@ FEXPORT(__bzero)
 	PTR_ADDU	t1, a0			/* end address */
 	.set		reorder
 1:	PTR_ADDIU	a0, 64
+	R10KCBARRIER(0(ra))
 	f_fill64 a0, -64, a1, fwd_fixup
 	bne		t1, a0, 1b
 	.set		noreorder
 
 memset_partial:
+	R10KCBARRIER(0(ra))
 	PTR_LA		t1, 2f			/* where to start */
 #if LONGSIZE == 4
 	PTR_SUBU	t1, t0
@@ -120,6 +123,7 @@ memset_partial:
 
 	beqz		a2, 1f
 	 PTR_ADDU	a0, a2			/* What's left */
+	R10KCBARRIER(0(ra))
 #ifdef __MIPSEB__
 	EX(LONG_S_R, a1, -1(a0), last_fixup)
 #endif
@@ -134,6 +138,7 @@ small_memset:
 	 PTR_ADDU	t1, a0, a2
 
 1:	PTR_ADDIU	a0, 1			/* fill bytewise */
+	R10KCBARRIER(0(ra))
 	bne		t1, a0, 1b
 	 sb		a1, -1(a0)
 
diff --git a/arch/mips/lib/strncpy_user.S b/arch/mips/lib/strncpy_user.S
index d16c76f..8fd21d5 100644
--- a/arch/mips/lib/strncpy_user.S
+++ b/arch/mips/lib/strncpy_user.S
@@ -38,6 +38,7 @@ FEXPORT(__strncpy_from_user_nocheck_asm)
 	.set		noreorder
 1:	EX(lbu, t0, (v1), fault)
 	PTR_ADDIU	v1, 1
+	R10KCBARRIER(0(ra))
 	beqz		t0, 2f
 	 sb		t0, (a0)
 	PTR_ADDIU	v0, 1
diff --git a/include/asm-mips/asm.h b/include/asm-mips/asm.h
index 12e1758..608cfcf 100644
--- a/include/asm-mips/asm.h
+++ b/include/asm-mips/asm.h
@@ -398,4 +398,12 @@ symbol		=	value
 
 #define SSNOP		sll zero, zero, 1
 
+#ifdef CONFIG_SGI_IP28
+/* Inhibit speculative stores to volatile (e.g.DMA) or invalid addresses. */
+#include <asm/cacheops.h>
+#define R10KCBARRIER(addr)  cache   Cache_Barrier, addr;
+#else
+#define R10KCBARRIER(addr)
+#endif
+
 #endif /* __ASM_ASM_H */
-- 
1.4.4.4


From tsbogend@alpha.franken.de Mon Nov 26 22:42:41 2007
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From:	Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Subject: [PATCH] Use real cache invalidate
To:	linux-mips@linux-mips.org
cc:	ralf@linux-mips.org
Message-Id: <20071126224001.48CF6C2B26@solo.franken.de>
Date:	Mon, 26 Nov 2007 23:40:01 +0100 (CET)
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R10k non coherent machines need a real dma cache invalidate to get
rid of speculative stores in cache.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---

diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 9355f1c..82d0d3e 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -598,7 +598,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
 		if (size >= scache_size)
 			r4k_blast_scache();
 		else
-			blast_scache_range(addr, addr + size);
+			blast_inv_scache_range(addr, addr + size);
 		return;
 	}
 
@@ -606,7 +606,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
 		r4k_blast_dcache();
 	} else {
 		R4600_HIT_CACHEOP_WAR_IMPL;
-		blast_dcache_range(addr, addr + size);
+		blast_inv_dcache_range(addr, addr + size);
 	}
 
 	bc_inv(addr, size);
diff --git a/include/asm-mips/r4kcache.h b/include/asm-mips/r4kcache.h
index 2b8466f..4c140db 100644
--- a/include/asm-mips/r4kcache.h
+++ b/include/asm-mips/r4kcache.h
@@ -403,6 +403,13 @@ __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64)
 __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64)
 __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128)
 
+__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16)
+__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32)
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16)
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32)
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64)
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128)
+
 /* build blast_xxx_range, protected_blast_xxx_range */
 #define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot) \
 static inline void prot##blast_##pfx##cache##_range(unsigned long start, \

From tsbogend@alpha.franken.de Mon Nov 26 22:43:11 2007
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From:	Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Subject: [PATCH] IP28 support 
To:	linux-mips@linux-mips.org
cc:	ralf@linux-mips.org
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Add support for SGI IP28 machines (Indigo 2 with R10k CPUs)
This work is mainly based on Peter Fuersts work.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 2f2ce0c..21649e4 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -421,6 +421,27 @@ config SGI_IP27
 	  workstations.  To compile a Linux kernel that runs on these, say Y
 	  here.
 
+config SGI_IP28
+	bool "SGI IP28 (Indigo2 R10k) (EXPERIMENTAL)"
+	depends on EXPERIMENTAL
+	select ARC
+	select ARC64
+	select CEVT_R4K
+	select DMA_NONCOHERENT
+	select IRQ_CPU
+	select SWAP_IO_SPACE
+	select HW_HAS_EISA
+	select I8253
+	select I8259
+	select SYS_HAS_CPU_R10000
+	select SYS_HAS_EARLY_PRINTK
+	select BOOT_ELF64
+	select SYS_SUPPORTS_64BIT_KERNEL
+	select SYS_SUPPORTS_BIG_ENDIAN
+      help
+        This is the SGI Indigo2 with R10000 processor.  To compile a Linux
+        kernel that runs on these, say Y here.
+
 config SGI_IP32
 	bool "SGI IP32 (O2)"
 	select ARC
@@ -932,7 +953,7 @@ config BOOT_ELF32
 config MIPS_L1_CACHE_SHIFT
 	int
 	default "4" if MACH_DECSTATION
-	default "7" if SGI_IP27 || SNI_RM
+	default "7" if SGI_IP27 || SGI_IP28 || SNI_RM
 	default "4" if PMC_MSP4200_EVAL
 	default "5"
 
@@ -941,7 +962,7 @@ config HAVE_STD_PC_SERIAL_PORT
 
 config ARC_CONSOLE
 	bool "ARC console support"
-	depends on SGI_IP22 || (SNI_RM && CPU_LITTLE_ENDIAN)
+	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
 
 config ARC_MEMORY
 	bool
@@ -950,7 +971,7 @@ config ARC_MEMORY
 
 config ARC_PROMLIB
 	bool
-	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP32
+	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
 	default y
 
 config ARC64
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index a1f8d8b..d91fbca 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -475,6 +475,20 @@ endif
 endif
 
 #
+# SGI IP28 (Indigo2 R10k)
+#
+# Set the load address to >= 0xa800000020080000 if you want to leave space for
+# symmon, 0xa800000020004000 for production kernels ?  Note that the value must
+# be 16kb aligned or the handling of the current variable will break.
+# Simplified: what IP22 does at 128MB+ in ksegN, IP28 does at 512MB+ in xkphys
+#
+#core-$(CONFIG_SGI_IP28)		+= arch/mips/sgi-ip22/ arch/mips/arc/arc_con.o
+core-$(CONFIG_SGI_IP28)		+= arch/mips/sgi-ip22/
+cflags-$(CONFIG_SGI_IP28)	+= -mr10k-cache-barrier=1 -Iinclude/asm-mips/mach-ip28
+#cflags-$(CONFIG_SGI_IP28)	+= -Iinclude/asm-mips/mach-ip28
+load-$(CONFIG_SGI_IP28)		+= 0xa800000020004000
+
+#
 # SGI-IP32 (O2)
 #
 # Set the load address to >= 80069000 if you want to leave space for symmon,
diff --git a/arch/mips/sgi-ip22/Makefile b/arch/mips/sgi-ip22/Makefile
index e3acb51..ef1564e 100644
--- a/arch/mips/sgi-ip22/Makefile
+++ b/arch/mips/sgi-ip22/Makefile
@@ -3,9 +3,11 @@
 # under Linux.
 #
 
-obj-y	+= ip22-mc.o ip22-hpc.o ip22-int.o ip22-berr.o \
-	   ip22-time.o ip22-nvram.o ip22-platform.o ip22-reset.o ip22-setup.o
+obj-y	+= ip22-mc.o ip22-hpc.o ip22-int.o ip22-time.o ip22-nvram.o \
+	   ip22-platform.o ip22-reset.o ip22-setup.o
 
+obj-$(CONFIG_SGI_IP22) += ip22-berr.o
+obj-$(CONFIG_SGI_IP28) += ip28-berr.o
 obj-$(CONFIG_EISA)	+= ip22-eisa.o
 
-EXTRA_CFLAGS += -Werror
+# EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/sgi-ip22/ip22-mc.c b/arch/mips/sgi-ip22/ip22-mc.c
index 01a805d..3f35d63 100644
--- a/arch/mips/sgi-ip22/ip22-mc.c
+++ b/arch/mips/sgi-ip22/ip22-mc.c
@@ -4,6 +4,7 @@
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
  * Copyright (C) 1999 Andrew R. Baker (andrewb@uab.edu) - Indigo2 changes
  * Copyright (C) 2003 Ladislav Michl  (ladis@linux-mips.org)
+ * Copyright (C) 2004 Peter Fuerst    (pf@net.alphadv.de) - IP28
  */
 
 #include <linux/init.h>
@@ -137,9 +138,12 @@ void __init sgimc_init(void)
 	/* Step 2: Enable all parity checking in cpu control register
 	 *         zero.
 	 */
+	/* don't touch parity settings for IP28 */
+#ifndef CONFIG_SGI_IP28
 	tmp = sgimc->cpuctrl0;
 	tmp |= (SGIMC_CCTRL0_EPERRGIO | SGIMC_CCTRL0_EPERRMEM |
 		SGIMC_CCTRL0_R4KNOCHKPARR);
+#endif
 	sgimc->cpuctrl0 = tmp;
 
 	/* Step 3: Setup the MC write buffer depth, this is controlled
diff --git a/arch/mips/sgi-ip22/ip28-berr.c b/arch/mips/sgi-ip22/ip28-berr.c
new file mode 100644
index 0000000..e61e8f3
--- /dev/null
+++ b/arch/mips/sgi-ip22/ip28-berr.c
@@ -0,0 +1,704 @@
+/*
+ * ip28-berr.c: Bus error handling.
+ *
+ * Copyright (C) 2002, 2003 Ladislav Michl (ladis@linux-mips.org)
+ * Copyright (C) 2005 Peter Fuerst (pf@net.alphadv.de) - IP28
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/seq_file.h>
+
+#include <asm/addrspace.h>
+#include <asm/system.h>
+#include <asm/traps.h>
+#include <asm/branch.h>
+#include <asm/irq_regs.h>
+#include <asm/sgi/mc.h>
+#include <asm/sgi/hpc3.h>
+#include <asm/sgi/ioc.h>
+#include <asm/sgi/ip22.h>
+#include <asm/r4kcache.h>
+#include <asm/uaccess.h>
+#include <asm/bootinfo.h>
+
+static unsigned int count_be_is_fixup;
+static unsigned int count_be_handler;
+static unsigned int count_be_interrupt;
+static int debug_be_interrupt;
+
+static unsigned int cpu_err_stat;	/* Status reg for CPU */
+static unsigned int gio_err_stat;	/* Status reg for GIO */
+static unsigned int cpu_err_addr;	/* Error address reg for CPU */
+static unsigned int gio_err_addr;	/* Error address reg for GIO */
+static unsigned int extio_stat;
+static unsigned int hpc3_berr_stat;	/* Bus error interrupt status */
+
+struct hpc3_stat {
+	unsigned long addr;
+	unsigned int ctrl;
+	unsigned int cbp;
+	unsigned int ndptr;
+};
+
+static struct {
+	struct hpc3_stat pbdma[8];
+	struct hpc3_stat scsi[2];
+	struct hpc3_stat ethrx, ethtx;
+} hpc3;
+
+static struct {
+	unsigned long err_addr;
+	struct {
+		u32 lo;
+		u32 hi;
+	} tags[1][2], tagd[4][2], tagi[4][2]; /* Way 0/1 */
+} cache_tags;
+
+static inline void save_cache_tags(unsigned busaddr)
+{
+	unsigned long addr = CAC_BASE | busaddr;
+	int i;
+	cache_tags.err_addr = addr;
+
+	/*
+	 * Starting with a bus-address, save secondary cache (indexed by
+	 * PA[23..18:7..6]) tags first.
+	 */
+	addr &= ~1L;
+#define tag cache_tags.tags[0]
+	cache_op(Index_Load_Tag_S, addr);
+	tag[0].lo = read_c0_taglo();	/* PA[35:18], VA[13:12] */
+	tag[0].hi = read_c0_taghi();	/* PA[39:36] */
+	cache_op(Index_Load_Tag_S, addr | 1L);
+	tag[1].lo = read_c0_taglo();	/* PA[35:18], VA[13:12] */
+	tag[1].hi = read_c0_taghi();	/* PA[39:36] */
+#undef tag
+
+	/*
+	 * Save all primary data cache (indexed by VA[13:5]) tags which
+	 * might fit to this bus-address, knowing that VA[11:0] == PA[11:0].
+	 * Saving all tags and evaluating them later is easier and safer
+	 * than relying on VA[13:12] from the secondary cache tags to pick
+	 * matching primary tags here already.
+	 */
+	addr &= (0xffL << 56) | ((1 << 12) - 1);
+#define tag cache_tags.tagd[i]
+	for (i = 0; i < 4; ++i, addr += (1 << 12)) {
+		cache_op(Index_Load_Tag_D, addr);
+		tag[0].lo = read_c0_taglo();	/* PA[35:12] */
+		tag[0].hi = read_c0_taghi();	/* PA[39:36] */
+		cache_op(Index_Load_Tag_D, addr | 1L);
+		tag[1].lo = read_c0_taglo();	/* PA[35:12] */
+		tag[1].hi = read_c0_taghi();	/* PA[39:36] */
+	}
+#undef tag
+
+	/*
+	 * Save primary instruction cache (indexed by VA[13:6]) tags
+	 * the same way.
+	 */
+	addr &= (0xffL << 56) | ((1 << 12) - 1);
+#define tag cache_tags.tagi[i]
+	for (i = 0; i < 4; ++i, addr += (1 << 12)) {
+		cache_op(Index_Load_Tag_I, addr);
+		tag[0].lo = read_c0_taglo();	/* PA[35:12] */
+		tag[0].hi = read_c0_taghi();	/* PA[39:36] */
+		cache_op(Index_Load_Tag_I, addr | 1L);
+		tag[1].lo = read_c0_taglo();	/* PA[35:12] */
+		tag[1].hi = read_c0_taghi();	/* PA[39:36] */
+	}
+#undef tag
+}
+
+#define GIO_ERRMASK	0xff00
+#define CPU_ERRMASK	0x3f00
+
+static void save_and_clear_buserr(void)
+{
+	int i;
+
+	/* save status registers */
+	cpu_err_addr = sgimc->cerr;
+	cpu_err_stat = sgimc->cstat;
+	gio_err_addr = sgimc->gerr;
+	gio_err_stat = sgimc->gstat;
+	extio_stat = sgioc->extio;
+	hpc3_berr_stat = hpc3c0->bestat;
+
+	hpc3.scsi[0].addr  = (unsigned long)&hpc3c0->scsi_chan0;
+	hpc3.scsi[0].ctrl  = hpc3c0->scsi_chan0.ctrl; /* HPC3_SCTRL_ACTIVE ? */
+	hpc3.scsi[0].cbp   = hpc3c0->scsi_chan0.cbptr;
+	hpc3.scsi[0].ndptr = hpc3c0->scsi_chan0.ndptr;
+
+	hpc3.scsi[1].addr  = (unsigned long)&hpc3c0->scsi_chan1;
+	hpc3.scsi[1].ctrl  = hpc3c0->scsi_chan1.ctrl; /* HPC3_SCTRL_ACTIVE ? */
+	hpc3.scsi[1].cbp   = hpc3c0->scsi_chan1.cbptr;
+	hpc3.scsi[1].ndptr = hpc3c0->scsi_chan1.ndptr;
+
+	hpc3.ethrx.addr  = (unsigned long)&hpc3c0->ethregs.rx_cbptr;
+	hpc3.ethrx.ctrl  = hpc3c0->ethregs.rx_ctrl; /* HPC3_ERXCTRL_ACTIVE ? */
+	hpc3.ethrx.cbp   = hpc3c0->ethregs.rx_cbptr;
+	hpc3.ethrx.ndptr = hpc3c0->ethregs.rx_ndptr;
+
+	hpc3.ethtx.addr  = (unsigned long)&hpc3c0->ethregs.tx_cbptr;
+	hpc3.ethtx.ctrl  = hpc3c0->ethregs.tx_ctrl; /* HPC3_ETXCTRL_ACTIVE ? */
+	hpc3.ethtx.cbp   = hpc3c0->ethregs.tx_cbptr;
+	hpc3.ethtx.ndptr = hpc3c0->ethregs.tx_ndptr;
+
+	for (i = 0; i < 8; ++i) {
+		/* HPC3_PDMACTRL_ISACT ? */
+		hpc3.pbdma[i].addr  = (unsigned long)&hpc3c0->pbdma[i];
+		hpc3.pbdma[i].ctrl  = hpc3c0->pbdma[i].pbdma_ctrl;
+		hpc3.pbdma[i].cbp   = hpc3c0->pbdma[i].pbdma_bptr;
+		hpc3.pbdma[i].ndptr = hpc3c0->pbdma[i].pbdma_dptr;
+	}
+	i = 0;
+	if (gio_err_stat & CPU_ERRMASK)
+		i = gio_err_addr;
+	if (cpu_err_stat & CPU_ERRMASK)
+		i = cpu_err_addr;
+	save_cache_tags(i);
+
+	sgimc->cstat = sgimc->gstat = 0;
+}
+
+static void print_cache_tags(void)
+{
+	u32 scb, scw;
+	int i;
+
+	printk(KERN_ERR "Cache tags @ %08x:\n", (unsigned)cache_tags.err_addr);
+
+	/* PA[31:12] shifted to PTag0 (PA[35:12]) format */
+	scw = (cache_tags.err_addr >> 4) & 0x0fffff00;
+
+	scb = cache_tags.err_addr & ((1 << 12) - 1) & ~((1 << 5) - 1);
+	for (i = 0; i < 4; ++i) { /* for each possible VA[13:12] value */
+		if ((cache_tags.tagd[i][0].lo & 0x0fffff00) != scw &&
+		    (cache_tags.tagd[i][1].lo & 0x0fffff00) != scw)
+		    continue;
+		printk(KERN_ERR
+		       "D: 0: %08x %08x, 1: %08x %08x  (VA[13:5]  %04x)\n",
+			cache_tags.tagd[i][0].hi, cache_tags.tagd[i][0].lo,
+			cache_tags.tagd[i][1].hi, cache_tags.tagd[i][1].lo,
+			scb | (1 << 12)*i);
+	}
+	scb = cache_tags.err_addr & ((1 << 12) - 1) & ~((1 << 6) - 1);
+	for (i = 0; i < 4; ++i) { /* for each possible VA[13:12] value */
+		if ((cache_tags.tagi[i][0].lo & 0x0fffff00) != scw &&
+		    (cache_tags.tagi[i][1].lo & 0x0fffff00) != scw)
+		    continue;
+		printk(KERN_ERR
+		       "I: 0: %08x %08x, 1: %08x %08x  (VA[13:6]  %04x)\n",
+			cache_tags.tagi[i][0].hi, cache_tags.tagi[i][0].lo,
+			cache_tags.tagi[i][1].hi, cache_tags.tagi[i][1].lo,
+			scb | (1 << 12)*i);
+	}
+	i = read_c0_config();
+	scb = i & (1 << 13) ? 7:6;      /* scblksize = 2^[7..6] */
+	scw = ((i >> 16) & 7) + 19 - 1; /* scwaysize = 2^[24..19] / 2 */
+
+	i = ((1 << scw) - 1) & ~((1 << scb) - 1);
+	printk(KERN_ERR "S: 0: %08x %08x, 1: %08x %08x  (PA[%u:%u] %05x)\n",
+		cache_tags.tags[0][0].hi, cache_tags.tags[0][0].lo,
+		cache_tags.tags[0][1].hi, cache_tags.tags[0][1].lo,
+		scw-1, scb, i & (unsigned)cache_tags.err_addr);
+}
+
+static inline const char *cause_excode_text(int cause)
+{
+	static const char *txt[32] =
+	{	"Interrupt",
+		"TLB modification",
+		"TLB (load or instruction fetch)",
+		"TLB (store)",
+		"Address error (load or instruction fetch)",
+		"Address error (store)",
+		"Bus error (instruction fetch)",
+		"Bus error (data: load or store)",
+		"Syscall",
+		"Breakpoint",
+		"Reserved instruction",
+		"Coprocessor unusable",
+		"Arithmetic Overflow",
+		"Trap",
+		"14",
+		"Floating-Point",
+		"16", "17", "18", "19", "20", "21", "22",
+		"Watch Hi/Lo",
+		"24", "25", "26", "27", "28", "29", "30", "31",
+	};
+	return txt[(cause & 0x7c) >> 2];
+}
+
+static void print_buserr(const struct pt_regs *regs)
+{
+	const int field = 2 * sizeof(unsigned long);
+	int error = 0;
+
+	if (extio_stat & EXTIO_MC_BUSERR) {
+		printk(KERN_ERR "MC Bus Error\n");
+		error |= 1;
+	}
+	if (extio_stat & EXTIO_HPC3_BUSERR) {
+		printk(KERN_ERR "HPC3 Bus Error 0x%x:<id=0x%x,%s,lane=0x%x>\n",
+			hpc3_berr_stat,
+			(hpc3_berr_stat & HPC3_BESTAT_PIDMASK) >>
+					  HPC3_BESTAT_PIDSHIFT,
+			(hpc3_berr_stat & HPC3_BESTAT_CTYPE) ? "PIO" : "DMA",
+			hpc3_berr_stat & HPC3_BESTAT_BLMASK);
+		error |= 2;
+	}
+	if (extio_stat & EXTIO_EISA_BUSERR) {
+		printk(KERN_ERR "EISA Bus Error\n");
+		error |= 4;
+	}
+	if (cpu_err_stat & CPU_ERRMASK) {
+		printk(KERN_ERR "CPU error 0x%x<%s%s%s%s%s%s> @ 0x%08x\n",
+			cpu_err_stat,
+			cpu_err_stat & SGIMC_CSTAT_RD ? "RD " : "",
+			cpu_err_stat & SGIMC_CSTAT_PAR ? "PAR " : "",
+			cpu_err_stat & SGIMC_CSTAT_ADDR ? "ADDR " : "",
+			cpu_err_stat & SGIMC_CSTAT_SYSAD_PAR ? "SYSAD " : "",
+			cpu_err_stat & SGIMC_CSTAT_SYSCMD_PAR ? "SYSCMD " : "",
+			cpu_err_stat & SGIMC_CSTAT_BAD_DATA ? "BAD_DATA " : "",
+			cpu_err_addr);
+		error |= 8;
+	}
+	if (gio_err_stat & GIO_ERRMASK) {
+		printk(KERN_ERR "GIO error 0x%x:<%s%s%s%s%s%s%s%s> @ 0x%08x\n",
+			gio_err_stat,
+			gio_err_stat & SGIMC_GSTAT_RD ? "RD " : "",
+			gio_err_stat & SGIMC_GSTAT_WR ? "WR " : "",
+			gio_err_stat & SGIMC_GSTAT_TIME ? "TIME " : "",
+			gio_err_stat & SGIMC_GSTAT_PROM ? "PROM " : "",
+			gio_err_stat & SGIMC_GSTAT_ADDR ? "ADDR " : "",
+			gio_err_stat & SGIMC_GSTAT_BC ? "BC " : "",
+			gio_err_stat & SGIMC_GSTAT_PIO_RD ? "PIO_RD " : "",
+			gio_err_stat & SGIMC_GSTAT_PIO_WR ? "PIO_WR " : "",
+			gio_err_addr);
+		error |= 16;
+	}
+	if (!error)
+		printk(KERN_ERR "MC: Hmm, didn't find any error condition.\n");
+	else {
+		printk(KERN_ERR "CP0: config %08x,  "
+			"MC: cpuctrl0/1: %08x/%05x, giopar: %04x\n"
+			"MC: cpu/gio_memacc: %08x/%05x, memcfg0/1: %08x/%08x\n",
+			read_c0_config(),
+			sgimc->cpuctrl0, sgimc->cpuctrl0, sgimc->giopar,
+			sgimc->cmacc, sgimc->gmacc,
+			sgimc->mconfig0, sgimc->mconfig1);
+		print_cache_tags();
+	}
+	printk(KERN_ALERT "%s, epc == %0*lx, ra == %0*lx\n",
+	       cause_excode_text(regs->cp0_cause),
+	       field, regs->cp0_epc, field, regs->regs[31]);
+}
+
+/*
+ * Try to find out, whether the bus error is caused by the instruction
+ * at EPC, otherwise we have an asynchronous error.
+ *
+ * Doc1: "MIPS IV Instruction Set", Rev 3.2 (SGI 007-2597-001)
+ * Doc2: "MIPS R10000 Microporcessor User's Manual", Ver 2.0 (SGI 007-2490-001)
+ * Doc3: "MIPS R4000 Microporcessor User's Manual", 2nd Ed. (SGI 007-2489-001)
+ */
+
+#define JMP_INDEX26_OP 1
+#define JMP_REGISTER_OP 2
+#define JMP_PCREL16_OP 3
+#define BASE_OFFSET_OP 4
+#define BASE_IDXREG_OP 5
+
+/* Match virtual address in an insn with physical error address */
+
+static int match_addr(unsigned paddr, unsigned long vaddr)
+{
+	unsigned long uaddr;
+
+	if ((vaddr & 0xffffffff80000000L) == 0xffffffff80000000L)
+		uaddr = (unsigned) CPHYSADDR(vaddr);
+	else if ((vaddr >> 62) == 2)
+		uaddr = (unsigned) XPHYSADDR(vaddr);
+	else {
+		unsigned long eh = vaddr & ~0x1fffL;
+
+		eh |= read_c0_entryhi() & 0xff;
+		write_c0_entryhi(eh);
+		tlb_probe();
+		if (read_c0_index() & 0x80000000)
+			return 0;
+		tlb_read();
+		if (vaddr & (1L << PAGE_SHIFT))
+			uaddr = (unsigned) read_c0_entrylo1();
+		else
+			uaddr = (unsigned) read_c0_entrylo0();
+		uaddr <<= 6;
+		uaddr &= ~PAGE_MASK;
+		uaddr |= vaddr & PAGE_MASK;
+	}
+	return ((uaddr & ~0x7f) == (paddr & ~0x7f));
+}
+
+/* Check, which kind of memory reference is triggered by `insn' */
+
+static int check_special(unsigned insn)
+{
+	/* See Doc1, page A-180 */
+	unsigned func = insn & 0x3f;
+
+	if (8 == func || 8+1 == func) /* JR, JALR */
+		return JMP_REGISTER_OP;
+
+	return 0;
+}
+
+static int check_regimm(unsigned insn)
+{
+	/* See Doc1, page A-180 */
+	unsigned rt = (insn >> 19) & 3; /* bits 20..19[..16] */
+
+	/* BLTZ, BGEZ, BLTZL, BBGEZL || BLTZAL, BGEZAL, BLTZALL, BBGEZALL */
+	if (!rt || 2 == rt)
+		return JMP_PCREL16_OP;
+
+	return 0;
+}
+
+static int check_cop0(unsigned insn)
+{
+	/* See Doc2, pages 287 ff., 187 ff. */
+	if ((insn >> 26) == 5*8+7) /* CACHE */
+		switch ((insn >> 16) & 0x1f) {
+		case Index_Writeback_Inv_D:
+		case Hit_Writeback_Inv_D:
+		case Index_Writeback_Inv_S:
+		case Hit_Writeback_Inv_S:
+			return BASE_OFFSET_OP;
+		}
+	return 0;
+}
+
+static int check_cop1(unsigned insn)
+{
+	/* See Doc1, pages B-108 ff. */
+	unsigned fmt = (insn >> 21) & 0x1f; /* bits 25..21 */
+
+	if (8 == fmt) /* BC1* */
+		return JMP_PCREL16_OP;
+
+	return 0;
+}
+
+static int check_cop1x(unsigned insn)
+{
+	/* See Doc1, pages B-108 ff. */
+	switch (insn & 0x3f) {
+	case 0:   /* LWXC1 */
+	case 1:   /* LDXC1 */
+	case 8:   /* SWXC1 */
+	case 8+1: /* SDXC1 */
+		return BASE_IDXREG_OP;
+	}
+	return 0;
+}
+
+static int check_plain(unsigned insn)
+{
+	/* See Doc1, page A-180 */
+	unsigned opcode = insn >> 26;
+
+	if (2 == opcode || 3 == opcode) /* J, JAL */
+		return JMP_INDEX26_OP;
+
+	if ((4     <= opcode && opcode <= 7) ||   /* BEQ, BNE, BLEZ, BGTZ */
+	    (4+2*8 <= opcode && opcode <= 7+2*8)) /* BEQL, BNEL, BLEZL, BGTZL */
+		return JMP_PCREL16_OP;
+
+	if (6*8+3 == opcode) /* PREF */
+		return 0;
+
+	if (3*8+2 == opcode || 3*8+3 == opcode || /* LDL, LDR */
+	    4*8 <= opcode) /* misc. LOAD, STORE */
+		return BASE_OFFSET_OP;
+
+	return 0;
+}
+
+/* Check, whether the insn at EPC causes a memory access at `paddr' */
+
+static int check_addr_in_insn(unsigned paddr, const struct pt_regs *regs)
+{
+	unsigned long epc;
+	unsigned insn;
+	unsigned long a;
+	int typ;
+
+	epc = regs->cp0_cause & CAUSEF_BD ? regs->cp0_epc:regs->cp0_epc+4;
+
+	/* show_code() from kernel/traps.c */
+	if (__get_user(insn, (u32 *)epc))
+		return 1;
+
+	/* See Doc1, pages A-180, B-108 ff. */
+	switch (insn >> 26) {
+	case 0:
+		typ = check_special(insn);
+		break;
+	case 1:
+		typ = check_regimm(insn);
+		break;
+	case 2*8:   /* COP0 */
+	case 5*8+7: /* CACHE */
+		typ = check_cop0(insn);
+		break;
+	case 2*8+1:
+		typ = check_cop1(insn);
+		break;
+	case 2*8+3:
+		typ = check_cop1x(insn);
+		break;
+	default:
+		typ = check_plain(insn);
+		break;
+	}
+	switch (typ) {
+	case JMP_INDEX26_OP:
+		a = (regs->cp0_epc + 4) & ~0xfffffff;
+		a |= (insn & 0x3ffffff) << 2;
+		return match_addr(paddr, a);
+	case JMP_REGISTER_OP:
+		a = regs->regs[(insn >> 21) & 0x1f];
+		return match_addr(paddr, a);
+	case JMP_PCREL16_OP:
+		a = regs->cp0_epc + 4 + ((insn & 0xffff) << 2);
+		return match_addr(paddr, a);
+	case BASE_OFFSET_OP:
+		a = regs->regs[(insn >> 21) & 0x1f] + (insn & 0xffff);
+		return match_addr(paddr, a);
+	case BASE_IDXREG_OP:
+		a = regs->regs[(insn >> 21) & 0x1f];
+		a += regs->regs[(insn >> 16) & 0x1f];
+		return match_addr(paddr, a);
+	case 0:
+		return 0;
+	}
+	/* Assume it would be too dangerous to continue ... */
+	return 1;
+}
+
+/*
+ * Check, whether MC's (virtual) DMA address caused the bus error.
+ * See "Virtual DMA Specification", Draft 1.5, Feb 13 1992, SGI
+ */
+
+static int addr_is_ram(unsigned long addr, unsigned sz)
+{
+	int i;
+
+	for (i = 0; i < boot_mem_map.nr_map; i++) {
+		unsigned long a = boot_mem_map.map[i].addr;
+		if (a <= addr && addr+sz <= a+boot_mem_map.map[i].size)
+			return 1;
+	}
+	return 0;
+}
+
+static int check_microtlb(u32 hi, u32 lo, unsigned long vaddr)
+{
+	/* This is likely rather similar to correct code ;-) */
+
+	vaddr &= 0x7fffffff; /* Doc. states that top bit is ignored */
+
+	/* If tlb-entry is valid and VPN-high (bits [30:21] ?) matches... */
+	if ((lo & 2) && (vaddr >> 21) == ((hi<<1) >> 22)) {
+		u32 ctl = sgimc->dma_ctrl;
+		if (ctl & 1) {
+			unsigned int pgsz = (ctl & 2) ? 14:12; /* 16k:4k */
+			/* PTEIndex is VPN-low (bits [22:14]/[20:12] ?) */
+			unsigned long pte = (lo >> 6) << 12; /* PTEBase */
+			pte += 8*((vaddr >> pgsz) & 0x1ff);
+			if (addr_is_ram(pte, 8)) {
+				/*
+				 * Note: Since DMA hardware does look up
+				 * translation on its own, this PTE *must*
+				 * match the TLB/EntryLo-register format !
+				 */
+				unsigned long a = *(unsigned long *)
+						PHYS_TO_XKSEG_UNCACHED(pte);
+				a = (a & 0x3f) << 6; /* PFN */
+				a += vaddr & ((1 << pgsz) - 1);
+				return (cpu_err_addr == a);
+			}
+		}
+	}
+	return 0;
+}
+
+static int check_vdma_memaddr(void)
+{
+	if (cpu_err_stat & CPU_ERRMASK) {
+		u32 a = sgimc->maddronly;
+
+		if (!(sgimc->dma_ctrl & 0x100)) /* Xlate-bit clear ? */
+			return (cpu_err_addr == a);
+
+		if (check_microtlb(sgimc->dtlb_hi0, sgimc->dtlb_lo0, a) ||
+		    check_microtlb(sgimc->dtlb_hi1, sgimc->dtlb_lo1, a) ||
+		    check_microtlb(sgimc->dtlb_hi2, sgimc->dtlb_lo2, a) ||
+		    check_microtlb(sgimc->dtlb_hi3, sgimc->dtlb_lo3, a))
+			return 1;
+	}
+	return 0;
+}
+
+static int check_vdma_gioaddr(void)
+{
+	if (gio_err_stat & GIO_ERRMASK) {
+		u32 a = sgimc->gio_dma_trans;
+		a = (sgimc->gmaddronly & ~a) | (sgimc->gio_dma_sbits & a);
+		return (gio_err_addr == a);
+	}
+	return 0;
+}
+
+/*
+ * MC sends an interrupt whenever bus or parity errors occur. In addition,
+ * if the error happened during a CPU read, it also asserts the bus error
+ * pin on the R4K. Code in bus error handler save the MC bus error registers
+ * and then clear the interrupt when this happens.
+ */
+
+static int ip28_be_interrupt(const struct pt_regs *regs)
+{
+	int i;
+
+	save_and_clear_buserr();
+	/*
+	 * Try to find out, whether we got here by a mispredicted speculative
+	 * load/store operation.  If so, it's not fatal, we can go on.
+	 */
+	/* Any cause other than "Interrupt" (ExcCode 0) is fatal. */
+	if (regs->cp0_cause & CAUSEF_EXCCODE)
+		goto mips_be_fatal;
+
+	/* Any cause other than "Bus error interrupt" (IP6) is weird. */
+	if ((regs->cp0_cause & CAUSEF_IP6) != CAUSEF_IP6)
+		goto mips_be_fatal;
+
+	if (extio_stat & (EXTIO_HPC3_BUSERR | EXTIO_EISA_BUSERR))
+		goto mips_be_fatal;
+
+	/* Any state other than "Memory bus error" is fatal. */
+	if (cpu_err_stat & CPU_ERRMASK & ~SGIMC_CSTAT_ADDR)
+			goto mips_be_fatal;
+
+	/* Any state other than "GIO transaction bus timed out" is fatal. */
+	if (gio_err_stat & GIO_ERRMASK & ~SGIMC_GSTAT_TIME)
+		goto mips_be_fatal;
+
+	/* Finding `cpu_err_addr' in the insn at EPC is fatal. */
+	if ((cpu_err_stat & CPU_ERRMASK) &&
+	     check_addr_in_insn(cpu_err_addr, regs))
+			goto mips_be_fatal;
+
+	/* Finding `gio_err_addr' in the insn at EPC is fatal. */
+	if ((gio_err_stat & GIO_ERRMASK) &&
+	     check_addr_in_insn(gio_err_addr, regs))
+		goto mips_be_fatal;
+	/*
+	 * Now we have an asynchronous bus error, speculatively or DMA caused.
+	 * Need to search all DMA descriptors for the error address.
+	 */
+	for (i = 0; i < sizeof(hpc3)/sizeof(struct hpc3_stat); ++i) {
+		struct hpc3_stat *hp = (struct hpc3_stat *)&hpc3 + i;
+		if ((cpu_err_stat & CPU_ERRMASK) &&
+		    (cpu_err_addr == hp->ndptr || cpu_err_addr == hp->cbp))
+			break;
+		if ((gio_err_stat & GIO_ERRMASK) &&
+		    (gio_err_addr == hp->ndptr || gio_err_addr == hp->cbp))
+			break;
+	}
+	if (i < sizeof(hpc3)/sizeof(struct hpc3_stat)) {
+		struct hpc3_stat *hp = (struct hpc3_stat *)&hpc3 + i;
+		printk(KERN_ERR "at DMA addresses: HPC3 @ %08lx:"
+		       " ctl %08x, ndp %08x, cbp %08x\n",
+		       CPHYSADDR(hp->addr), hp->ctrl, hp->ndptr, hp->cbp);
+		goto mips_be_fatal;
+	}
+	/* Check MC's virtual DMA stuff. */
+	if (check_vdma_memaddr()) {
+		printk(KERN_ERR "at GIO DMA: mem address 0x%08x.\n",
+			sgimc->maddronly);
+		goto mips_be_fatal;
+	}
+	if (check_vdma_gioaddr()) {
+		printk(KERN_ERR "at GIO DMA: gio address 0x%08x.\n",
+			sgimc->gmaddronly);
+		goto mips_be_fatal;
+	}
+	/* A speculative bus error... */
+	if (debug_be_interrupt) {
+		print_buserr(regs);
+		printk(KERN_ERR "discarded!\n");
+	}
+	return MIPS_BE_DISCARD;
+
+mips_be_fatal:
+	print_buserr(regs);
+	return MIPS_BE_FATAL;
+}
+
+void ip22_be_interrupt(int irq)
+{
+	const struct pt_regs *regs = get_irq_regs();
+
+	count_be_interrupt++;
+
+	if (ip28_be_interrupt(regs) != MIPS_BE_DISCARD) {
+		/* Assume it would be too dangerous to continue ... */
+		die_if_kernel("Oops", regs);
+		force_sig(SIGBUS, current);
+	} else if (debug_be_interrupt)
+		show_regs((struct pt_regs *)regs);
+}
+
+static int ip28_be_handler(struct pt_regs *regs, int is_fixup)
+{
+	/*
+	 * We arrive here only in the unusual case of do_be() invocation,
+	 * i.e. by a bus error exception without a bus error interrupt.
+	 */
+	if (is_fixup) {
+		count_be_is_fixup++;
+		save_and_clear_buserr();
+		return MIPS_BE_FIXUP;
+	}
+	count_be_handler++;
+	return ip28_be_interrupt(regs);
+}
+
+void __init ip22_be_init(void)
+{
+	board_be_handler = ip28_be_handler;
+}
+
+int ip28_show_be_info(struct seq_file *m)
+{
+	seq_printf(m, "IP28 be fixups\t\t: %u\n", count_be_is_fixup);
+	seq_printf(m, "IP28 be interrupts\t: %u\n", count_be_interrupt);
+	seq_printf(m, "IP28 be handler\t\t: %u\n", count_be_handler);
+
+	return 0;
+}
+
+static int __init debug_be_setup(char *str)
+{
+	debug_be_interrupt++;
+	return 1;
+}
+__setup("ip28_debug_be", debug_be_setup);
+
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index bf18d75..aa12e26 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -777,7 +777,7 @@ config JS_RTC
 
 config SGI_DS1286
 	tristate "SGI DS1286 RTC support"
-	depends on SGI_IP22
+	depends on (SGI_IP22 || SGI_IP28)
 	help
 	  If you say Y here and create a character special file /dev/rtc with
 	  major number 10 and minor number 135 using mknod ("man mknod"), you
diff --git a/drivers/input/serio/i8042.h b/drivers/input/serio/i8042.h
index dd22d91..08a5f20 100644
--- a/drivers/input/serio/i8042.h
+++ b/drivers/input/serio/i8042.h
@@ -16,7 +16,7 @@
 
 #if defined(CONFIG_MACH_JAZZ)
 #include "i8042-jazzio.h"
-#elif defined(CONFIG_SGI_IP22)
+#elif defined(CONFIG_SGI_IP22) || defined(CONFIG_SGI_IP28)
 #include "i8042-ip22io.h"
 #elif defined(CONFIG_PPC)
 #include "i8042-ppcio.h"
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 7a55bc1..816d20f 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1795,7 +1795,7 @@ config DE620
 
 config SGISEEQ
 	tristate "SGI Seeq ethernet controller support"
-	depends on SGI_IP22
+	depends on SGI_IP22 || SGI_IP28
 	help
 	  Say Y here if you have an Seeq based Ethernet network card. This is
 	  used in many Silicon Graphics machines.
diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig
index a6676be..e422484 100644
--- a/drivers/scsi/Kconfig
+++ b/drivers/scsi/Kconfig
@@ -345,7 +345,7 @@ config ISCSI_TCP
 
 config SGIWD93_SCSI
 	tristate "SGI WD93C93 SCSI Driver"
-	depends on SGI_IP22 && SCSI
+	depends on (SGI_IP22 || SGI_IP26 || SGI_IP28) && SCSI
   	help
 	  If you have a Western Digital WD93 SCSI controller on
 	  an SGI MIPS system, say Y.  Otherwise, say N.
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index ed438bc..ab59185 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -878,16 +878,18 @@ config SERIAL_SUNHV
 
 config SERIAL_IP22_ZILOG
 	tristate "IP22 Zilog8530 serial support"
-	depends on SGI_IP22
+	depends on (SGI_IP22 || SGI_IP28)
 	select SERIAL_CORE
+	default y if SGI_IP28
 	help
-	  This driver supports the Zilog8530 serial ports found on SGI IP22
+	This driver supports the Zilog8530 serial ports found on SGI IP22-IP28
 	  systems.  Say Y or M if you want to be able to these serial ports.
 
 config SERIAL_IP22_ZILOG_CONSOLE
-	bool "Console on IP22 Zilog8530 serial port"
+	bool "Console on IP22/IP28 Zilog8530 serial port"
 	depends on SERIAL_IP22_ZILOG=y
 	select SERIAL_CORE_CONSOLE
+	default y if SGI_IP28
 
 config V850E_UART
 	bool "NEC V850E on-chip UART support"
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 2792bc1..9170501 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -586,7 +586,7 @@ config SBC_EPX_C3_WATCHDOG
 
 config INDYDOG
 	tristate "Indy/I2 Hardware Watchdog"
-	depends on SGI_IP22
+	depends on SGI_IP22 || SGI_IP28
 	help
 	  Hardware driver for the Indy's/I2's watchdog. This is a
 	  watchdog timer that will reboot the machine after a 60 second
diff --git a/fs/partitions/Kconfig b/fs/partitions/Kconfig
index a99acd8..4ee783b 100644
--- a/fs/partitions/Kconfig
+++ b/fs/partitions/Kconfig
@@ -198,7 +198,7 @@ config LDM_DEBUG
 
 config SGI_PARTITION
 	bool "SGI partition support" if PARTITION_ADVANCED
-	default y if (SGI_IP22 || SGI_IP27 || ((MACH_JAZZ || SNI_RM) && !CPU_LITTLE_ENDIAN))
+	default y if (SGI_IP22 || SGI_IP27 || SGI_IP28 || ((MACH_JAZZ || SNI_RM) && !CPU_LITTLE_ENDIAN))
 	help
 	  Say Y here if you would like to be able to read the hard disk
 	  partition table format used by SGI machines.
diff --git a/include/asm-mips/dma.h b/include/asm-mips/dma.h
index 833437d..80caf6b 100644
--- a/include/asm-mips/dma.h
+++ b/include/asm-mips/dma.h
@@ -88,6 +88,9 @@
 /* Horrible hack to have a correct DMA window on IP22 */
 #include <asm/sgi/mc.h>
 #define MAX_DMA_ADDRESS		(PAGE_OFFSET + SGIMC_SEG0_BADDR + 0x01000000)
+#elif defined(CONFIG_SGI_IP28)
+#include <asm/sgi/mc.h>
+#define MAX_DMA_ADDRESS		(PAGE_OFFSET + SGIMC_SEG1_BADDR + 0x01000000)
 #else
 #define MAX_DMA_ADDRESS		(PAGE_OFFSET + 0x01000000)
 #endif
diff --git a/include/asm-mips/mach-ip28/cpu-feature-overrides.h b/include/asm-mips/mach-ip28/cpu-feature-overrides.h
new file mode 100644
index 0000000..9a53b32
--- /dev/null
+++ b/include/asm-mips/mach-ip28/cpu-feature-overrides.h
@@ -0,0 +1,50 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 Ralf Baechle
+ * 6/2004	pf
+ */
+#ifndef __ASM_MACH_IP28_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_IP28_CPU_FEATURE_OVERRIDES_H
+
+/*
+ * IP28 only comes with R10000 family processors all using the same config
+ */
+#define cpu_has_watch		1
+#define cpu_has_mips16		0
+#define cpu_has_divec		0
+#define cpu_has_vce		0
+#define cpu_has_cache_cdex_p	0
+#define cpu_has_cache_cdex_s	0
+#define cpu_has_prefetch	1
+#define cpu_has_mcheck		0
+#define cpu_has_ejtag		0
+
+#define cpu_has_llsc		1
+#define cpu_has_vtag_icache	0
+#define cpu_has_dc_aliases	0 /* see probe_pcache() */
+#define cpu_has_ic_fills_f_dc	0
+#define cpu_has_dsp		0
+#define cpu_icache_snoops_remote_store  1
+#define cpu_has_mipsmt		0
+#define cpu_has_userlocal	0
+
+#define cpu_has_nofpuex		0
+#define cpu_has_64bits		1
+
+#define cpu_has_4kex		1
+#define cpu_has_4k_cache	1
+
+#define cpu_has_inclusive_pcaches	1
+
+#define cpu_dcache_line_size()	32
+#define cpu_icache_line_size()	64
+
+#define cpu_has_mips32r1	0
+#define cpu_has_mips32r2	0
+#define cpu_has_mips64r1	0
+#define cpu_has_mips64r2	0
+
+#endif /* __ASM_MACH_IP28_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-ip28/ds1286.h b/include/asm-mips/mach-ip28/ds1286.h
new file mode 100644
index 0000000..471bb9a
--- /dev/null
+++ b/include/asm-mips/mach-ip28/ds1286.h
@@ -0,0 +1,4 @@
+#ifndef __ASM_MACH_IP28_DS1286_H
+#define __ASM_MACH_IP28_DS1286_H
+#include <asm/mach-ip22/ds1286.h>
+#endif /* __ASM_MACH_IP28_DS1286_H */
diff --git a/include/asm-mips/mach-ip28/spaces.h b/include/asm-mips/mach-ip28/spaces.h
new file mode 100644
index 0000000..05aabb2
--- /dev/null
+++ b/include/asm-mips/mach-ip28/spaces.h
@@ -0,0 +1,22 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle
+ * Copyright (C) 2000, 2002  Maciej W. Rozycki
+ * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
+ * 2004	pf
+ */
+#ifndef _ASM_MACH_IP28_SPACES_H
+#define _ASM_MACH_IP28_SPACES_H
+
+#define CAC_BASE		0xa800000000000000
+
+#define HIGHMEM_START		(~0UL)
+
+#define PHYS_OFFSET		_AC(0x20000000, UL)
+
+#include <asm/mach-generic/spaces.h>
+
+#endif /* _ASM_MACH_IP28_SPACES_H */
diff --git a/include/asm-mips/mach-ip28/war.h