From baggins@sith.mimuw.edu.pl Fri Jun 1 13:50:56 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 01 Jun 2007 13:50:58 +0100 (BST) Received: from sith.mimuw.edu.pl ([193.0.96.4]:28439 "EHLO sith.mimuw.edu.pl") by ftp.linux-mips.org with ESMTP id S20025593AbXFAMu4 (ORCPT ); Fri, 1 Jun 2007 13:50:56 +0100 Received: by sith.mimuw.edu.pl (Postfix, from userid 1062) id 2E1E830A4B2; Fri, 1 Jun 2007 14:50:52 +0200 (CEST) Date: Fri, 1 Jun 2007 14:50:52 +0200 From: Jan Rekorajski To: "Maciej W. Rozycki" Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] zs: Move to the serial subsystem Message-ID: <20070601125052.GA15787@sith.mimuw.edu.pl> Mail-Followup-To: Jan Rekorajski , "Maciej W. Rozycki" , linux-mips@linux-mips.org References: <20070530165842.GL29894@sith.mimuw.edu.pl> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Operating-System: Linux 2.6.19.1 i686 User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15214 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: baggins@sith.mimuw.edu.pl Precedence: bulk X-list: linux-mips On Wed, 30 May 2007, Maciej W. Rozycki wrote: > On Wed, 30 May 2007, Jan Rekorajski wrote: > > > Look functional to me (just booted my DecStation 5000/240) :) > > Great! Thanks for testing. > > > Any chance to get LK201/401 keyboard and vsxxxaa mouse working with this? > > For the time being a solution is the patch below and then: [...] Keyboard works, I have functional console :) Mouse looks good too, but I'll test it when I install a functional system on that machine. > I am looking into a solution that would make it automatic without the > need of involving userland which just does not seem right here -- you do > want to run your kernel with "init=/bin/bash" or suchlike and have your > virtual terminal console usable. I will remove the old lk201 bits then. Why not do that in the driver? AFAIK there can't be anything else on those ports. Janek -- Jan Rekorajski | ALL SUSPECTS ARE GUILTY. PERIOD! bagginsmimuw.edu.pl | OTHERWISE THEY WOULDN'T BE SUSPECTS, WOULD THEY? BOFH, MANIAC | -- TROOPS by Kevin Rubio From macro@linux-mips.org Fri Jun 1 14:48:04 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 01 Jun 2007 14:48:06 +0100 (BST) Received: from pollux.ds.pg.gda.pl ([153.19.208.7]:42768 "EHLO pollux.ds.pg.gda.pl") by ftp.linux-mips.org with ESMTP id S20025600AbXFANsE (ORCPT ); Fri, 1 Jun 2007 14:48:04 +0100 Received: from localhost (localhost [127.0.0.1]) by pollux.ds.pg.gda.pl (Postfix) with ESMTP id DE92EE1CFF; Fri, 1 Jun 2007 15:47:22 +0200 (CEST) X-Virus-Scanned: by amavisd-new at pollux.ds.pg.gda.pl Received: from pollux.ds.pg.gda.pl ([127.0.0.1]) by localhost (pollux.ds.pg.gda.pl [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id c7kpi+LUPcJT; Fri, 1 Jun 2007 15:47:22 +0200 (CEST) Received: from piorun.ds.pg.gda.pl (piorun.ds.pg.gda.pl [153.19.208.8]) by pollux.ds.pg.gda.pl (Postfix) with ESMTP id 91727E1C85; Fri, 1 Jun 2007 15:47:22 +0200 (CEST) Received: from blysk.ds.pg.gda.pl (macro@blysk.ds.pg.gda.pl [153.19.208.6]) by piorun.ds.pg.gda.pl (8.13.8/8.13.8) with ESMTP id l51DlYNE031600; Fri, 1 Jun 2007 15:47:34 +0200 Date: Fri, 1 Jun 2007 14:47:29 +0100 (BST) From: "Maciej W. Rozycki" To: Jan Rekorajski cc: linux-mips@linux-mips.org Subject: Re: [PATCH] zs: Move to the serial subsystem In-Reply-To: <20070601125052.GA15787@sith.mimuw.edu.pl> Message-ID: References: <20070530165842.GL29894@sith.mimuw.edu.pl> <20070601125052.GA15787@sith.mimuw.edu.pl> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Virus-Scanned: ClamAV 0.90.2/3335/Thu May 31 12:16:21 2007 on piorun.ds.pg.gda.pl X-Virus-Status: Clean Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15215 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@linux-mips.org Precedence: bulk X-list: linux-mips On Fri, 1 Jun 2007, Jan Rekorajski wrote: > > I am looking into a solution that would make it automatic without the > > need of involving userland which just does not seem right here -- you do > > want to run your kernel with "init=/bin/bash" or suchlike and have your > > virtual terminal console usable. I will remove the old lk201 bits then. > > Why not do that in the driver? AFAIK there can't be anything else on > those ports. Well, with some soldering skills you can make an adapter that will convert each of them to an ordinary 3-wire serial line. Therefore I think the best approach would be only doing the binding of the keyboard and the mouse port to the input subsystem if the virtual terminal device is opened. This is unfortunately not the way how things are set up right now. Opening the VT does not trigger a query for the associated input devices that could pull the necessary drivers. It merely uses whatever got registered beforehand (or actually at any point) and for the DECstation it means dummy devices (how useful!). But that is not the most important reason. That in fact is the way how it could be implemented in the driver. It means at least hacks to the receive interrupt and another hack to implement an alternative transmit interrupt handler. I refuse to do polled transmission with this chip because of its performance hit, sorry, and with the dz driver, which requires a corresponding change, the hit would be even worse. Finally, the lone reason for introducing the serial subsystem was to abstract serial ports from the TTY layer, so any sort of devices could use them, regardless of whether they resemble a terminal or not. And there is a proper serio driver for this abstract serial port already implemented. Therefore introducing hacks to the serial driver "under the bonnet" is certainly not the way to go. We did have such hacks in 2.4, but that was because there was no generic serial port layer back then and all serial ports were TTYs. ;-) Besides, I think the driver should not enforce any policy, because it does not "know" or enforce the external wiring of the serial ports. These are the part of the platform (and please note that there are two variations available for the DECstation and other two for the DEC 3000 AXP) and it's the platform that should mark each port appropriately. I do admit at the moment the device handled by the driver is not handled as a platform device as it should, but I'd like to avoid short-term hacks that do not add value. The DECstation port needs a generic way of registering platform devices (all the bits on the motherboard that do not pretend to be TURBOchannel options) like some other platforms already do and when this is implemented the serial ports will be handled as necessary as a part of it. Maciej From jbglaw@lug-owl.de Fri Jun 1 15:04:02 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 01 Jun 2007 15:04:03 +0100 (BST) Received: from lug-owl.de ([195.71.106.12]:14312 "EHLO lug-owl.de") by ftp.linux-mips.org with ESMTP id S20025610AbXFAOEC (ORCPT ); Fri, 1 Jun 2007 15:04:02 +0100 Received: by lug-owl.de (Postfix, from userid 1001) id 42637F0057; Fri, 1 Jun 2007 16:03:31 +0200 (CEST) Date: Fri, 1 Jun 2007 16:03:31 +0200 From: Jan-Benedict Glaw To: "Maciej W. Rozycki" Cc: Jan Rekorajski , linux-mips@linux-mips.org Subject: Re: [PATCH] zs: Move to the serial subsystem Message-ID: <20070601140331.GH2649@lug-owl.de> Mail-Followup-To: "Maciej W. Rozycki" , Jan Rekorajski , linux-mips@linux-mips.org References: <20070530165842.GL29894@sith.mimuw.edu.pl> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="KIzF6Cje4W/osXrF" Content-Disposition: inline In-Reply-To: X-Operating-System: Linux mail 2.6.18-4-686 X-gpg-fingerprint: 250D 3BCF 7127 0D8C A444 A961 1DBD 5E75 8399 E1BB X-gpg-key: wwwkeys.de.pgp.net X-Echelon-Enable: howto poison arsenous mail psychological biological nuclear warfare test the bombastical terror of flooding the spy listeners explosion sex drugs and rock'n'roll X-TKUeV: howto poison arsenous mail psychological biological nuclear warfare test the bombastical terror of flooding the spy listeners explosion sex drugs and rock'n'roll User-Agent: Mutt/1.5.13 (2006-08-11) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15216 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jbglaw@lug-owl.de Precedence: bulk X-list: linux-mips --KIzF6Cje4W/osXrF Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, 2007-05-30 18:25:46 +0100, Maciej W. Rozycki = wrote: > On Wed, 30 May 2007, Jan Rekorajski wrote: > > Any chance to get LK201/401 keyboard and vsxxxaa mouse working with thi= s? >=20 > For the time being a solution is the patch below and then: >=20 > CONFIG_INPUT=3Dy > CONFIG_INPUT_KEYBOARD=3Dy > CONFIG_KEYBOARD_LKKBD=3Dy > CONFIG_INPUT_MOUSE=3Dy > CONFIG_MOUSE_VSXXXAA=3Dy > CONFIG_SERIO=3Dy > CONFIG_SERIO_SERPORT=3Dy > CONFIG_VT=3Dy > CONFIG_VT_CONSOLE=3Dy > CONFIG_HW_CONSOLE=3Dy > CONFIG_VT_HW_CONSOLE_BINDING=3Dy >=20 > plus your framebuffer of choice. To activate the keyboard you have to ru= n=20 > the following program: >=20 > #include > #include > #include >=20 > #define SPIOCSTYPE _IOW('q', 0x01, unsigned long) > #define SERIO_LKKBD 0x28 >=20 > int main(void) > { > int fd, ldisc =3D N_MOUSE, type =3D SERIO_LKKBD; > char buf; >=20 > fd =3D open("/dev/ttyS2", O_RDWR | O_NONBLOCK); > ioctl(fd, TIOCSETD, &ldisc); > ioctl(fd, SPIOCSTYPE, &type); > read(fd, &buf, 1); > close(fd); >=20 > return 0; > } Another way would be to use the `inputattach' program, which is shipped with the `joystick' package (sic) and also does line speed setting etc. for you. MfG, JBG > I am looking into a solution that would make it automatic without the=20 > need of involving userland which just does not seem right here -- you do= =20 > want to run your kernel with "init=3D/bin/bash" or suchlike and have your= =20 > virtual terminal console usable. I will remove the old lk201 bits then. IIRC the serial port needs to register a serio device, set correct baud/cstopb/... settings and set VSXXXAA/LKKBD identity on the two serio ports. I *hope* the rest happens automatically then. (Another way would be to look into how the Sun guys get their keyboards up'n'running...) MfG, JBG --=20 Jan-Benedict Glaw jbglaw@lug-owl.de +49-172-7608481 Signature of: 23:53 <@jbglaw> So, ich kletter' jetzt mal ins Bett. the second : 23:57 <@jever2> .oO( kletter ..., hat er noch Gitter vorm Bet= t, wie fr=C3=BCher meine Kinder?) 00:00 <@jbglaw> jever2: *patsch* 00:01 <@jever2> *aua*, wof=C3=BCr, Gedanken sind frei! 00:02 <@jbglaw> Nee, freie Gedanken, die sind seit 1984 doch = aus! 00:03 <@jever2> 1984? ich bin erst seit 1985 verheiratet! --KIzF6Cje4W/osXrF Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature Content-Disposition: inline -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.6 (GNU/Linux) iD8DBQFGYCczHb1edYOZ4bsRAiuTAKCStrSWG2GfdCeIX3jjKmIXGPdtMACfZQ5J LovqjD15JqjBCnCG0rLuGE4= =GI1u -----END PGP SIGNATURE----- --KIzF6Cje4W/osXrF-- From anemo@mba.ocn.ne.jp Fri Jun 1 15:40:36 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 01 Jun 2007 15:40:39 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:20680 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20025609AbXFAOkg (ORCPT ); Fri, 1 Jun 2007 15:40:36 +0100 Received: from localhost (p8230-ipad205funabasi.chiba.ocn.ne.jp [222.146.103.230]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 399C0AF8E; Fri, 1 Jun 2007 23:40:32 +0900 (JST) Date: Fri, 01 Jun 2007 23:40:59 +0900 (JST) Message-Id: <20070601.234059.72707771.anemo@mba.ocn.ne.jp> To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: [PATCH] Fix IP27 build From: Atsushi Nemoto X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15217 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips IP27 does not have ZONE_DMA now. Signed-off-by: Atsushi Nemoto --- diff --git a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c index fe8a106..e5e023f 100644 --- a/arch/mips/sgi-ip27/ip27-memory.c +++ b/arch/mips/sgi-ip27/ip27-memory.c @@ -517,7 +517,7 @@ void __init paging_init(void) pfn_t start_pfn = slot_getbasepfn(node, 0); pfn_t end_pfn = node_getmaxclick(node) + 1; - zones_size[ZONE_DMA] = end_pfn - start_pfn; + zones_size[ZONE_NORMAL] = end_pfn - start_pfn; free_area_init_node(node, NODE_DATA(node), zones_size, start_pfn, NULL); From macro@linux-mips.org Fri Jun 1 16:11:24 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 01 Jun 2007 16:11:25 +0100 (BST) Received: from pollux.ds.pg.gda.pl ([153.19.208.7]:62472 "EHLO pollux.ds.pg.gda.pl") by ftp.linux-mips.org with ESMTP id S20025621AbXFAPLY (ORCPT ); Fri, 1 Jun 2007 16:11:24 +0100 Received: from localhost (localhost [127.0.0.1]) by pollux.ds.pg.gda.pl (Postfix) with ESMTP id A180BE1CF3; Fri, 1 Jun 2007 17:11:10 +0200 (CEST) X-Virus-Scanned: by amavisd-new at pollux.ds.pg.gda.pl Received: from pollux.ds.pg.gda.pl ([127.0.0.1]) by localhost (pollux.ds.pg.gda.pl [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id AS+VNiW5PBi0; Fri, 1 Jun 2007 17:11:10 +0200 (CEST) Received: from piorun.ds.pg.gda.pl (piorun.ds.pg.gda.pl [153.19.208.8]) by pollux.ds.pg.gda.pl (Postfix) with ESMTP id 42730E1C82; Fri, 1 Jun 2007 17:11:10 +0200 (CEST) Received: from blysk.ds.pg.gda.pl (macro@blysk.ds.pg.gda.pl [153.19.208.6]) by piorun.ds.pg.gda.pl (8.13.8/8.13.8) with ESMTP id l51FBNpO002999; Fri, 1 Jun 2007 17:11:23 +0200 Date: Fri, 1 Jun 2007 16:11:17 +0100 (BST) From: "Maciej W. Rozycki" To: Jan-Benedict Glaw cc: Jan Rekorajski , linux-mips@linux-mips.org Subject: Re: [PATCH] zs: Move to the serial subsystem In-Reply-To: <20070601140331.GH2649@lug-owl.de> Message-ID: References: <20070530165842.GL29894@sith.mimuw.edu.pl> <20070601140331.GH2649@lug-owl.de> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Virus-Scanned: ClamAV 0.90.2/3336/Fri Jun 1 13:28:33 2007 on piorun.ds.pg.gda.pl X-Virus-Status: Clean Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15218 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@linux-mips.org Precedence: bulk X-list: linux-mips On Fri, 1 Jun 2007, Jan-Benedict Glaw wrote: > IIRC the serial port needs to register a serio device, set correct > baud/cstopb/... settings and set VSXXXAA/LKKBD identity on the two > serio ports. I *hope* the rest happens automatically then. (Another > way would be to look into how the Sun guys get their keyboards > up'n'running...) No it does not happen. The default serial line discipline is always N_TTY. The Sun guys got their keyboards running by the way of a hack that I am currently actively refusing being dragged into. The serial driver itself has no business with CONFIG_SERIO at all. Maciej From anemo@mba.ocn.ne.jp Fri Jun 1 16:21:11 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 01 Jun 2007 16:21:15 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:35822 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20021392AbXFAPVL (ORCPT ); Fri, 1 Jun 2007 16:21:11 +0100 Received: from localhost (p8230-ipad205funabasi.chiba.ocn.ne.jp [222.146.103.230]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id DE7C5B775; Sat, 2 Jun 2007 00:21:03 +0900 (JST) Date: Sat, 02 Jun 2007 00:21:30 +0900 (JST) Message-Id: <20070602.002130.41010462.anemo@mba.ocn.ne.jp> To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: [PATCH] Unify dump_tlb From: Atsushi Nemoto X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15219 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips Unify lib-{32,64}/dump_tlb.c into lib/dump_tlb.c and move lib-32/r3k_dump_tlb.c to lib directory. Signed-off-by: Atsushi Nemoto --- arch/mips/lib-32/Makefile | 18 --- arch/mips/lib-32/dump_tlb.c | 240 ------------------------------ arch/mips/lib-64/Makefile | 18 --- arch/mips/lib/Makefile | 18 +++ arch/mips/{lib-64 => lib}/dump_tlb.c | 56 +++++-- arch/mips/{lib-32 => lib}/r3k_dump_tlb.c | 0 6 files changed, 60 insertions(+), 290 deletions(-) diff --git a/arch/mips/lib-32/Makefile b/arch/mips/lib-32/Makefile index 8b94d4c..7bae849 100644 --- a/arch/mips/lib-32/Makefile +++ b/arch/mips/lib-32/Makefile @@ -3,21 +3,3 @@ # lib-y += watch.o - -obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o -obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o -obj-$(CONFIG_CPU_NEVADA) += dump_tlb.o -obj-$(CONFIG_CPU_R10000) += dump_tlb.o -obj-$(CONFIG_CPU_R3000) += r3k_dump_tlb.o -obj-$(CONFIG_CPU_R4300) += dump_tlb.o -obj-$(CONFIG_CPU_R4X00) += dump_tlb.o -obj-$(CONFIG_CPU_R5000) += dump_tlb.o -obj-$(CONFIG_CPU_R5432) += dump_tlb.o -obj-$(CONFIG_CPU_R6000) += -obj-$(CONFIG_CPU_R8000) += -obj-$(CONFIG_CPU_RM7000) += dump_tlb.o -obj-$(CONFIG_CPU_RM9000) += dump_tlb.o -obj-$(CONFIG_CPU_SB1) += dump_tlb.o -obj-$(CONFIG_CPU_TX39XX) += r3k_dump_tlb.o -obj-$(CONFIG_CPU_TX49XX) += dump_tlb.o -obj-$(CONFIG_CPU_VR41XX) += dump_tlb.o diff --git a/arch/mips/lib-32/dump_tlb.c b/arch/mips/lib-32/dump_tlb.c deleted file mode 100644 index 63525ec..0000000 --- a/arch/mips/lib-32/dump_tlb.c +++ /dev/null @@ -1,240 +0,0 @@ -/* - * Dump R4x00 TLB for debugging purposes. - * - * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle. - * Copyright (C) 1999 by Silicon Graphics, Inc. - */ -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -static inline const char *msk2str(unsigned int mask) -{ - switch (mask) { - case PM_4K: - return "4kb"; - case PM_16K: - return "16kb"; - case PM_64K: - return "64kb"; - case PM_256K: - return "256kb"; -#ifndef CONFIG_CPU_VR41XX - case PM_1M: - return "1Mb"; - case PM_4M: - return "4Mb"; - case PM_16M: - return "16Mb"; - case PM_64M: - return "64Mb"; - case PM_256M: - return "256Mb"; -#endif - } -} - -#define BARRIER() \ - __asm__ __volatile__( \ - ".set\tnoreorder\n\t" \ - "nop;nop;nop;nop;nop;nop;nop\n\t" \ - ".set\treorder"); - -void dump_tlb(int first, int last) -{ - unsigned int pagemask, c0, c1, asid; - unsigned long long entrylo0, entrylo1; - unsigned long entryhi; - int i; - - asid = read_c0_entryhi() & 0xff; - - printk("\n"); - for (i = first; i <= last; i++) { - write_c0_index(i); - BARRIER(); - tlb_read(); - BARRIER(); - pagemask = read_c0_pagemask(); - entryhi = read_c0_entryhi(); - entrylo0 = read_c0_entrylo0(); - entrylo1 = read_c0_entrylo1(); - - /* Unused entries have a virtual address in KSEG0. */ - if ((entryhi & 0xf0000000) != 0x80000000 - && (entryhi & 0xff) == asid) { - /* - * Only print entries in use - */ - printk("Index: %2d pgmask=%s ", i, msk2str(pagemask)); - - c0 = (entrylo0 >> 3) & 7; - c1 = (entrylo1 >> 3) & 7; - - printk("va=%08lx asid=%02lx\n", - (entryhi & 0xffffe000), (entryhi & 0xff)); - printk("\t\t\t[pa=%08Lx c=%d d=%d v=%d g=%Ld]\n", - (entrylo0 << 6) & PAGE_MASK, c0, - (entrylo0 & 4) ? 1 : 0, - (entrylo0 & 2) ? 1 : 0, (entrylo0 & 1)); - printk("\t\t\t[pa=%08Lx c=%d d=%d v=%d g=%Ld]\n", - (entrylo1 << 6) & PAGE_MASK, c1, - (entrylo1 & 4) ? 1 : 0, - (entrylo1 & 2) ? 1 : 0, (entrylo1 & 1)); - printk("\n"); - } - } - - write_c0_entryhi(asid); -} - -void dump_tlb_all(void) -{ - dump_tlb(0, current_cpu_data.tlbsize - 1); -} - -void dump_tlb_wired(void) -{ - int wired; - - wired = read_c0_wired(); - printk("Wired: %d", wired); - dump_tlb(0, read_c0_wired()); -} - -void dump_tlb_addr(unsigned long addr) -{ - unsigned int flags, oldpid; - int index; - - local_irq_save(flags); - oldpid = read_c0_entryhi() & 0xff; - BARRIER(); - write_c0_entryhi((addr & PAGE_MASK) | oldpid); - BARRIER(); - tlb_probe(); - BARRIER(); - index = read_c0_index(); - write_c0_entryhi(oldpid); - local_irq_restore(flags); - - if (index < 0) { - printk("No entry for address 0x%08lx in TLB\n", addr); - return; - } - - printk("Entry %d maps address 0x%08lx\n", index, addr); - dump_tlb(index, index); -} - -void dump_tlb_nonwired(void) -{ - dump_tlb(read_c0_wired(), current_cpu_data.tlbsize - 1); -} - -void dump_list_process(struct task_struct *t, void *address) -{ - pgd_t *page_dir, *pgd; - pud_t *pud; - pmd_t *pmd; - pte_t *pte, page; - unsigned long addr, val; - - addr = (unsigned long) address; - - printk("Addr == %08lx\n", addr); - printk("task == %8p\n", t); - printk("task->mm == %8p\n", t->mm); - //printk("tasks->mm.pgd == %08x\n", (unsigned int) t->mm->pgd); - - if (addr > KSEG0) { - page_dir = pgd_offset_k(0); - pgd = pgd_offset_k(addr); - } else if (t->mm) { - page_dir = pgd_offset(t->mm, 0); - pgd = pgd_offset(t->mm, addr); - } else { - printk("Current thread has no mm\n"); - return; - } - printk("page_dir == %08x\n", (unsigned int) page_dir); - printk("pgd == %08x, ", (unsigned int) pgd); - pud = pud_offset(pgd, addr); - printk("pud == %08x, ", (unsigned int) pud); - - pmd = pmd_offset(pud, addr); - printk("pmd == %08x, ", (unsigned int) pmd); - - pte = pte_offset(pmd, addr); - printk("pte == %08x, ", (unsigned int) pte); - - page = *pte; -#ifdef CONFIG_64BIT_PHYS_ADDR - printk("page == %08Lx\n", pte_val(page)); -#else - printk("page == %08lx\n", pte_val(page)); -#endif - - val = pte_val(page); - if (val & _PAGE_PRESENT) - printk("present "); - if (val & _PAGE_READ) - printk("read "); - if (val & _PAGE_WRITE) - printk("write "); - if (val & _PAGE_ACCESSED) - printk("accessed "); - if (val & _PAGE_MODIFIED) - printk("modified "); - if (val & _PAGE_R4KBUG) - printk("r4kbug "); - if (val & _PAGE_GLOBAL) - printk("global "); - if (val & _PAGE_VALID) - printk("valid "); - printk("\n"); -} - -void dump_list_current(void *address) -{ - dump_list_process(current, address); -} - -unsigned int vtop(void *address) -{ - pgd_t *pgd; - pud_t *pud; - pmd_t *pmd; - pte_t *pte; - unsigned int addr, paddr; - - addr = (unsigned long) address; - pgd = pgd_offset(current->mm, addr); - pud = pud_offset(pgd, addr); - pmd = pmd_offset(pud, addr); - pte = pte_offset(pmd, addr); - paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK; - paddr |= (addr & ~PAGE_MASK); - - return paddr; -} - -void dump16(unsigned long *p) -{ - int i; - - for (i = 0; i < 8; i++) { - printk("*%08lx == %08lx, ", (unsigned long) p, *p); - p++; - printk("*%08lx == %08lx\n", (unsigned long) p, *p); - p++; - } -} diff --git a/arch/mips/lib-32/r3k_dump_tlb.c b/arch/mips/lib-32/r3k_dump_tlb.c deleted file mode 100644 index 4f2cb74..0000000 --- a/arch/mips/lib-32/r3k_dump_tlb.c +++ /dev/null @@ -1,182 +0,0 @@ -/* - * Dump R3000 TLB for debugging purposes. - * - * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle. - * Copyright (C) 1999 by Silicon Graphics, Inc. - * Copyright (C) 1999 by Harald Koerfgen - */ -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -extern int r3k_have_wired_reg; /* defined in tlb-r3k.c */ - -void dump_tlb(int first, int last) -{ - int i; - unsigned int asid; - unsigned long entryhi, entrylo0; - - asid = read_c0_entryhi() & 0xfc0; - - for (i = first; i <= last; i++) { - write_c0_index(i<<8); - __asm__ __volatile__( - ".set\tnoreorder\n\t" - "tlbr\n\t" - "nop\n\t" - ".set\treorder"); - entryhi = read_c0_entryhi(); - entrylo0 = read_c0_entrylo0(); - - /* Unused entries have a virtual address of KSEG0. */ - if ((entryhi & 0xffffe000) != 0x80000000 - && (entryhi & 0xfc0) == asid) { - /* - * Only print entries in use - */ - printk("Index: %2d ", i); - - printk("va=%08lx asid=%08lx" - " [pa=%06lx n=%d d=%d v=%d g=%d]", - (entryhi & 0xffffe000), - entryhi & 0xfc0, - entrylo0 & PAGE_MASK, - (entrylo0 & (1 << 11)) ? 1 : 0, - (entrylo0 & (1 << 10)) ? 1 : 0, - (entrylo0 & (1 << 9)) ? 1 : 0, - (entrylo0 & (1 << 8)) ? 1 : 0); - } - } - printk("\n"); - - write_c0_entryhi(asid); -} - -void dump_tlb_all(void) -{ - dump_tlb(0, current_cpu_data.tlbsize - 1); -} - -void dump_tlb_wired(void) -{ - int wired = r3k_have_wired_reg ? read_c0_wired() : 8; - - printk("Wired: %d", wired); - dump_tlb(0, wired - 1); -} - -void dump_tlb_addr(unsigned long addr) -{ - unsigned long flags, oldpid; - int index; - - local_irq_save(flags); - oldpid = read_c0_entryhi() & 0xff; - write_c0_entryhi((addr & PAGE_MASK) | oldpid); - tlb_probe(); - index = read_c0_index(); - write_c0_entryhi(oldpid); - local_irq_restore(flags); - - if (index < 0) { - printk("No entry for address 0x%08lx in TLB\n", addr); - return; - } - - printk("Entry %d maps address 0x%08lx\n", index, addr); - dump_tlb(index, index); -} - -void dump_tlb_nonwired(void) -{ - int wired = r3k_have_wired_reg ? read_c0_wired() : 8; - dump_tlb(wired, current_cpu_data.tlbsize - 1); -} - -void dump_list_process(struct task_struct *t, void *address) -{ - pgd_t *page_dir, *pgd; - pud_t *pud; - pmd_t *pmd; - pte_t *pte, page; - unsigned int addr; - unsigned long val; - - addr = (unsigned int) address; - - printk("Addr == %08x\n", addr); - printk("tasks->mm.pgd == %08x\n", (unsigned int) t->mm->pgd); - - page_dir = pgd_offset(t->mm, 0); - printk("page_dir == %08x\n", (unsigned int) page_dir); - - pgd = pgd_offset(t->mm, addr); - printk("pgd == %08x, ", (unsigned int) pgd); - - pud = pud_offset(pgd, addr); - printk("pud == %08x, ", (unsigned int) pud); - - pmd = pmd_offset(pud, addr); - printk("pmd == %08x, ", (unsigned int) pmd); - - pte = pte_offset(pmd, addr); - printk("pte == %08x, ", (unsigned int) pte); - - page = *pte; - printk("page == %08x\n", (unsigned int) pte_val(page)); - - val = pte_val(page); - if (val & _PAGE_PRESENT) printk("present "); - if (val & _PAGE_READ) printk("read "); - if (val & _PAGE_WRITE) printk("write "); - if (val & _PAGE_ACCESSED) printk("accessed "); - if (val & _PAGE_MODIFIED) printk("modified "); - if (val & _PAGE_GLOBAL) printk("global "); - if (val & _PAGE_VALID) printk("valid "); - printk("\n"); -} - -void dump_list_current(void *address) -{ - dump_list_process(current, address); -} - -unsigned int vtop(void *address) -{ - pgd_t *pgd; - pud_t *pud; - pmd_t *pmd; - pte_t *pte; - unsigned int addr, paddr; - - addr = (unsigned long) address; - pgd = pgd_offset(current->mm, addr); - pud = pud_offset(pgd, addr); - pmd = pmd_offset(pud, addr); - pte = pte_offset(pmd, addr); - paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK; - paddr |= (addr & ~PAGE_MASK); - - return paddr; -} - -void dump16(unsigned long *p) -{ - int i; - - for (i = 0; i < 8; i++) { - printk("*%08lx == %08lx, ", (unsigned long)p, *p); - p++; - printk("*%08lx == %08lx\n", (unsigned long)p, *p); - p++; - } -} diff --git a/arch/mips/lib-64/Makefile b/arch/mips/lib-64/Makefile index 8b94d4c..7bae849 100644 --- a/arch/mips/lib-64/Makefile +++ b/arch/mips/lib-64/Makefile @@ -3,21 +3,3 @@ # lib-y += watch.o - -obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o -obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o -obj-$(CONFIG_CPU_NEVADA) += dump_tlb.o -obj-$(CONFIG_CPU_R10000) += dump_tlb.o -obj-$(CONFIG_CPU_R3000) += r3k_dump_tlb.o -obj-$(CONFIG_CPU_R4300) += dump_tlb.o -obj-$(CONFIG_CPU_R4X00) += dump_tlb.o -obj-$(CONFIG_CPU_R5000) += dump_tlb.o -obj-$(CONFIG_CPU_R5432) += dump_tlb.o -obj-$(CONFIG_CPU_R6000) += -obj-$(CONFIG_CPU_R8000) += -obj-$(CONFIG_CPU_RM7000) += dump_tlb.o -obj-$(CONFIG_CPU_RM9000) += dump_tlb.o -obj-$(CONFIG_CPU_SB1) += dump_tlb.o -obj-$(CONFIG_CPU_TX39XX) += r3k_dump_tlb.o -obj-$(CONFIG_CPU_TX49XX) += dump_tlb.o -obj-$(CONFIG_CPU_VR41XX) += dump_tlb.o diff --git a/arch/mips/lib-64/dump_tlb.c b/arch/mips/lib-64/dump_tlb.c deleted file mode 100644 index 8232900..0000000 --- a/arch/mips/lib-64/dump_tlb.c +++ /dev/null @@ -1,214 +0,0 @@ -/* - * Dump R4x00 TLB for debugging purposes. - * - * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle. - * Copyright (C) 1999 by Silicon Graphics, Inc. - */ -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -static inline const char *msk2str(unsigned int mask) -{ - switch (mask) { - case PM_4K: return "4kb"; - case PM_16K: return "16kb"; - case PM_64K: return "64kb"; - case PM_256K: return "256kb"; -#ifndef CONFIG_CPU_VR41XX - case PM_1M: return "1Mb"; - case PM_4M: return "4Mb"; - case PM_16M: return "16Mb"; - case PM_64M: return "64Mb"; - case PM_256M: return "256Mb"; -#endif - } -} - -#define BARRIER() \ - __asm__ __volatile__( \ - ".set\tnoreorder\n\t" \ - "nop;nop;nop;nop;nop;nop;nop\n\t" \ - ".set\treorder"); - -void dump_tlb(int first, int last) -{ - unsigned long s_entryhi, entryhi, entrylo0, entrylo1, asid; - unsigned int s_index, pagemask, c0, c1, i; - - s_entryhi = read_c0_entryhi(); - s_index = read_c0_index(); - asid = s_entryhi & 0xff; - - for (i = first; i <= last; i++) { - write_c0_index(i); - BARRIER(); - tlb_read(); - BARRIER(); - pagemask = read_c0_pagemask(); - entryhi = read_c0_entryhi(); - entrylo0 = read_c0_entrylo0(); - entrylo1 = read_c0_entrylo1(); - - /* Unused entries have a virtual address of CKSEG0. */ - if ((entryhi & ~0x1ffffUL) != CKSEG0 - && (entryhi & 0xff) == asid) { - /* - * Only print entries in use - */ - printk("Index: %2d pgmask=%s ", i, msk2str(pagemask)); - - c0 = (entrylo0 >> 3) & 7; - c1 = (entrylo1 >> 3) & 7; - - printk("va=%011lx asid=%02lx\n", - (entryhi & ~0x1fffUL), - entryhi & 0xff); - printk("\t[pa=%011lx c=%d d=%d v=%d g=%ld] ", - (entrylo0 << 6) & PAGE_MASK, c0, - (entrylo0 & 4) ? 1 : 0, - (entrylo0 & 2) ? 1 : 0, - (entrylo0 & 1)); - printk("[pa=%011lx c=%d d=%d v=%d g=%ld]\n", - (entrylo1 << 6) & PAGE_MASK, c1, - (entrylo1 & 4) ? 1 : 0, - (entrylo1 & 2) ? 1 : 0, - (entrylo1 & 1)); - } - } - printk("\n"); - - write_c0_entryhi(s_entryhi); - write_c0_index(s_index); -} - -void dump_tlb_all(void) -{ - dump_tlb(0, current_cpu_data.tlbsize - 1); -} - -void dump_tlb_wired(void) -{ - int wired; - - wired = read_c0_wired(); - printk("Wired: %d", wired); - dump_tlb(0, read_c0_wired()); -} - -void dump_tlb_addr(unsigned long addr) -{ - unsigned int flags, oldpid; - int index; - - local_irq_save(flags); - oldpid = read_c0_entryhi() & 0xff; - BARRIER(); - write_c0_entryhi((addr & PAGE_MASK) | oldpid); - BARRIER(); - tlb_probe(); - BARRIER(); - index = read_c0_index(); - write_c0_entryhi(oldpid); - local_irq_restore(flags); - - if (index < 0) { - printk("No entry for address 0x%08lx in TLB\n", addr); - return; - } - - printk("Entry %d maps address 0x%08lx\n", index, addr); - dump_tlb(index, index); -} - -void dump_tlb_nonwired(void) -{ - dump_tlb(read_c0_wired(), current_cpu_data.tlbsize - 1); -} - -void dump_list_process(struct task_struct *t, void *address) -{ - pgd_t *page_dir, *pgd; - pud_t *pud; - pmd_t *pmd; - pte_t *pte, page; - unsigned long addr, val; - - addr = (unsigned long) address; - - printk("Addr == %08lx\n", addr); - printk("tasks->mm.pgd == %08lx\n", (unsigned long) t->mm->pgd); - - page_dir = pgd_offset(t->mm, 0UL); - printk("page_dir == %016lx\n", (unsigned long) page_dir); - - pgd = pgd_offset(t->mm, addr); - printk("pgd == %016lx\n", (unsigned long) pgd); - - pud = pud_offset(pgd, addr); - printk("pud == %016lx\n", (unsigned long) pud); - - pmd = pmd_offset(pud, addr); - printk("pmd == %016lx\n", (unsigned long) pmd); - - pte = pte_offset(pmd, addr); - printk("pte == %016lx\n", (unsigned long) pte); - - page = *pte; - printk("page == %08lx\n", pte_val(page)); - - val = pte_val(page); - if (val & _PAGE_PRESENT) printk("present "); - if (val & _PAGE_READ) printk("read "); - if (val & _PAGE_WRITE) printk("write "); - if (val & _PAGE_ACCESSED) printk("accessed "); - if (val & _PAGE_MODIFIED) printk("modified "); - if (val & _PAGE_R4KBUG) printk("r4kbug "); - if (val & _PAGE_GLOBAL) printk("global "); - if (val & _PAGE_VALID) printk("valid "); - printk("\n"); -} - -void dump_list_current(void *address) -{ - dump_list_process(current, address); -} - -unsigned long vtop(void *address) -{ - pgd_t *pgd; - pud_t *pud; - pmd_t *pmd; - pte_t *pte; - unsigned long addr, paddr; - - addr = (unsigned long) address; - pgd = pgd_offset(current->mm, addr); - pud = pud_offset(pgd, addr); - pmd = pmd_offset(pud, addr); - pte = pte_offset(pmd, addr); - paddr = (CKSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK; - paddr |= (addr & ~PAGE_MASK); - - return paddr; -} - -void dump16(unsigned long *p) -{ - int i; - - for (i = 0; i < 8; i++) { - printk("*%08lx == %08lx, ", (unsigned long)p, *p); - p++; - printk("*%08lx == %08lx\n", (unsigned long)p, *p); - p++; - } -} diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile index 5dad13e..b27a326 100644 --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile @@ -8,5 +8,23 @@ lib-y += csum_partial.o memcpy.o memcpy-inatomic.o memset.o strlen_user.o \ obj-y += iomap.o obj-$(CONFIG_PCI) += iomap-pci.o +obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o +obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o +obj-$(CONFIG_CPU_NEVADA) += dump_tlb.o +obj-$(CONFIG_CPU_R10000) += dump_tlb.o +obj-$(CONFIG_CPU_R3000) += r3k_dump_tlb.o +obj-$(CONFIG_CPU_R4300) += dump_tlb.o +obj-$(CONFIG_CPU_R4X00) += dump_tlb.o +obj-$(CONFIG_CPU_R5000) += dump_tlb.o +obj-$(CONFIG_CPU_R5432) += dump_tlb.o +obj-$(CONFIG_CPU_R6000) += +obj-$(CONFIG_CPU_R8000) += +obj-$(CONFIG_CPU_RM7000) += dump_tlb.o +obj-$(CONFIG_CPU_RM9000) += dump_tlb.o +obj-$(CONFIG_CPU_SB1) += dump_tlb.o +obj-$(CONFIG_CPU_TX39XX) += r3k_dump_tlb.o +obj-$(CONFIG_CPU_TX49XX) += dump_tlb.o +obj-$(CONFIG_CPU_VR41XX) += dump_tlb.o + # libgcc-style stuff needed in the kernel lib-y += ashldi3.o ashrdi3.o lshrdi3.o ucmpdi2.o diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c new file mode 100644 index 0000000..fbf4b72 --- /dev/null +++ b/arch/mips/lib/dump_tlb.c @@ -0,0 +1,242 @@ +/* + * Dump R4x00 TLB for debugging purposes. + * + * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle. + * Copyright (C) 1999 by Silicon Graphics, Inc. + */ +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +static inline const char *msk2str(unsigned int mask) +{ + switch (mask) { + case PM_4K: return "4kb"; + case PM_16K: return "16kb"; + case PM_64K: return "64kb"; + case PM_256K: return "256kb"; +#ifndef CONFIG_CPU_VR41XX + case PM_1M: return "1Mb"; + case PM_4M: return "4Mb"; + case PM_16M: return "16Mb"; + case PM_64M: return "64Mb"; + case PM_256M: return "256Mb"; +#endif + } + return ""; +} + +#define BARRIER() \ + __asm__ __volatile__( \ + ".set\tnoreorder\n\t" \ + "nop;nop;nop;nop;nop;nop;nop\n\t" \ + ".set\treorder"); + +void dump_tlb(int first, int last) +{ + unsigned long s_entryhi, entryhi, asid; + unsigned long long entrylo0, entrylo1; + unsigned int s_index, pagemask, c0, c1, i; + + s_entryhi = read_c0_entryhi(); + s_index = read_c0_index(); + asid = s_entryhi & 0xff; + + for (i = first; i <= last; i++) { + write_c0_index(i); + BARRIER(); + tlb_read(); + BARRIER(); + pagemask = read_c0_pagemask(); + entryhi = read_c0_entryhi(); + entrylo0 = read_c0_entrylo0(); + entrylo1 = read_c0_entrylo1(); + + /* Unused entries have a virtual address of CKSEG0. */ + if ((entryhi & ~0x1ffffUL) != CKSEG0 + && (entryhi & 0xff) == asid) { +#ifdef CONFIG_32BIT + int width = 8; +#else + int width = 11; +#endif + /* + * Only print entries in use + */ + printk("Index: %2d pgmask=%s ", i, msk2str(pagemask)); + + c0 = (entrylo0 >> 3) & 7; + c1 = (entrylo1 >> 3) & 7; + + printk("va=%0*lx asid=%02lx\n", + width, (entryhi & ~0x1fffUL), + entryhi & 0xff); + printk("\t[pa=%0*llx c=%d d=%d v=%d g=%d] ", + width, + (entrylo0 << 6) & PAGE_MASK, c0, + (entrylo0 & 4) ? 1 : 0, + (entrylo0 & 2) ? 1 : 0, + (entrylo0 & 1) ? 1 : 0); + printk("[pa=%0*llx c=%d d=%d v=%d g=%d]\n", + width, + (entrylo1 << 6) & PAGE_MASK, c1, + (entrylo1 & 4) ? 1 : 0, + (entrylo1 & 2) ? 1 : 0, + (entrylo1 & 1) ? 1 : 0); + } + } + printk("\n"); + + write_c0_entryhi(s_entryhi); + write_c0_index(s_index); +} + +void dump_tlb_all(void) +{ + dump_tlb(0, current_cpu_data.tlbsize - 1); +} + +void dump_tlb_wired(void) +{ + int wired; + + wired = read_c0_wired(); + printk("Wired: %d", wired); + dump_tlb(0, read_c0_wired()); +} + +void dump_tlb_addr(unsigned long addr) +{ + unsigned int flags, oldpid; + int index; + + local_irq_save(flags); + oldpid = read_c0_entryhi() & 0xff; + BARRIER(); + write_c0_entryhi((addr & PAGE_MASK) | oldpid); + BARRIER(); + tlb_probe(); + BARRIER(); + index = read_c0_index(); + write_c0_entryhi(oldpid); + local_irq_restore(flags); + + if (index < 0) { + printk("No entry for address 0x%08lx in TLB\n", addr); + return; + } + + printk("Entry %d maps address 0x%08lx\n", index, addr); + dump_tlb(index, index); +} + +void dump_tlb_nonwired(void) +{ + dump_tlb(read_c0_wired(), current_cpu_data.tlbsize - 1); +} + +void dump_list_process(struct task_struct *t, void *address) +{ + pgd_t *page_dir, *pgd; + pud_t *pud; + pmd_t *pmd; + pte_t *pte, page; + unsigned long addr, val; + int width = sizeof(long) * 2; + + addr = (unsigned long) address; + + printk("Addr == %08lx\n", addr); +#ifdef CONFIG_64BIT + printk("tasks->mm.pgd == %08lx\n", (unsigned long) t->mm->pgd); +#endif + +#ifdef CONFIG_64BIT + page_dir = pgd_offset(t->mm, 0UL); + pgd = pgd_offset(t->mm, addr); +#else + if (addr > KSEG0) { + page_dir = pgd_offset_k(0); + pgd = pgd_offset_k(addr); + } else if (t->mm) { + page_dir = pgd_offset(t->mm, 0); + pgd = pgd_offset(t->mm, addr); + } else { + printk("Current thread has no mm\n"); + return; + } +#endif + printk("page_dir == %0*lx\n", width, (unsigned long) page_dir); + printk("pgd == %0*lx\n", width, (unsigned long) pgd); + + pud = pud_offset(pgd, addr); + printk("pud == %0*lx\n", width, (unsigned long) pud); + + pmd = pmd_offset(pud, addr); + printk("pmd == %0*lx\n", width, (unsigned long) pmd); + + pte = pte_offset(pmd, addr); + printk("pte == %0*lx\n", width, (unsigned long) pte); + + page = *pte; +#ifdef CONFIG_64BIT_PHYS_ADDR + printk("page == %08Lx\n", pte_val(page)); +#else + printk("page == %0*lx\n", width, pte_val(page)); +#endif + + val = pte_val(page); + if (val & _PAGE_PRESENT) printk("present "); + if (val & _PAGE_READ) printk("read "); + if (val & _PAGE_WRITE) printk("write "); + if (val & _PAGE_ACCESSED) printk("accessed "); + if (val & _PAGE_MODIFIED) printk("modified "); + if (val & _PAGE_R4KBUG) printk("r4kbug "); + if (val & _PAGE_GLOBAL) printk("global "); + if (val & _PAGE_VALID) printk("valid "); + printk("\n"); +} + +void dump_list_current(void *address) +{ + dump_list_process(current, address); +} + +unsigned long vtop(void *address) +{ + pgd_t *pgd; + pud_t *pud; + pmd_t *pmd; + pte_t *pte; + unsigned long addr, paddr; + + addr = (unsigned long) address; + pgd = pgd_offset(current->mm, addr); + pud = pud_offset(pgd, addr); + pmd = pmd_offset(pud, addr); + pte = pte_offset(pmd, addr); + paddr = (CKSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK; + paddr |= (addr & ~PAGE_MASK); + + return paddr; +} + +void dump16(unsigned long *p) +{ + int i; + + for (i = 0; i < 8; i++) { + printk("*%08lx == %08lx, ", (unsigned long)p, *p); + p++; + printk("*%08lx == %08lx\n", (unsigned long)p, *p); + p++; + } +} diff --git a/arch/mips/lib/r3k_dump_tlb.c b/arch/mips/lib/r3k_dump_tlb.c new file mode 100644 index 0000000..4f2cb74 --- /dev/null +++ b/arch/mips/lib/r3k_dump_tlb.c @@ -0,0 +1,182 @@ +/* + * Dump R3000 TLB for debugging purposes. + * + * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle. + * Copyright (C) 1999 by Silicon Graphics, Inc. + * Copyright (C) 1999 by Harald Koerfgen + */ +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +extern int r3k_have_wired_reg; /* defined in tlb-r3k.c */ + +void dump_tlb(int first, int last) +{ + int i; + unsigned int asid; + unsigned long entryhi, entrylo0; + + asid = read_c0_entryhi() & 0xfc0; + + for (i = first; i <= last; i++) { + write_c0_index(i<<8); + __asm__ __volatile__( + ".set\tnoreorder\n\t" + "tlbr\n\t" + "nop\n\t" + ".set\treorder"); + entryhi = read_c0_entryhi(); + entrylo0 = read_c0_entrylo0(); + + /* Unused entries have a virtual address of KSEG0. */ + if ((entryhi & 0xffffe000) != 0x80000000 + && (entryhi & 0xfc0) == asid) { + /* + * Only print entries in use + */ + printk("Index: %2d ", i); + + printk("va=%08lx asid=%08lx" + " [pa=%06lx n=%d d=%d v=%d g=%d]", + (entryhi & 0xffffe000), + entryhi & 0xfc0, + entrylo0 & PAGE_MASK, + (entrylo0 & (1 << 11)) ? 1 : 0, + (entrylo0 & (1 << 10)) ? 1 : 0, + (entrylo0 & (1 << 9)) ? 1 : 0, + (entrylo0 & (1 << 8)) ? 1 : 0); + } + } + printk("\n"); + + write_c0_entryhi(asid); +} + +void dump_tlb_all(void) +{ + dump_tlb(0, current_cpu_data.tlbsize - 1); +} + +void dump_tlb_wired(void) +{ + int wired = r3k_have_wired_reg ? read_c0_wired() : 8; + + printk("Wired: %d", wired); + dump_tlb(0, wired - 1); +} + +void dump_tlb_addr(unsigned long addr) +{ + unsigned long flags, oldpid; + int index; + + local_irq_save(flags); + oldpid = read_c0_entryhi() & 0xff; + write_c0_entryhi((addr & PAGE_MASK) | oldpid); + tlb_probe(); + index = read_c0_index(); + write_c0_entryhi(oldpid); + local_irq_restore(flags); + + if (index < 0) { + printk("No entry for address 0x%08lx in TLB\n", addr); + return; + } + + printk("Entry %d maps address 0x%08lx\n", index, addr); + dump_tlb(index, index); +} + +void dump_tlb_nonwired(void) +{ + int wired = r3k_have_wired_reg ? read_c0_wired() : 8; + dump_tlb(wired, current_cpu_data.tlbsize - 1); +} + +void dump_list_process(struct task_struct *t, void *address) +{ + pgd_t *page_dir, *pgd; + pud_t *pud; + pmd_t *pmd; + pte_t *pte, page; + unsigned int addr; + unsigned long val; + + addr = (unsigned int) address; + + printk("Addr == %08x\n", addr); + printk("tasks->mm.pgd == %08x\n", (unsigned int) t->mm->pgd); + + page_dir = pgd_offset(t->mm, 0); + printk("page_dir == %08x\n", (unsigned int) page_dir); + + pgd = pgd_offset(t->mm, addr); + printk("pgd == %08x, ", (unsigned int) pgd); + + pud = pud_offset(pgd, addr); + printk("pud == %08x, ", (unsigned int) pud); + + pmd = pmd_offset(pud, addr); + printk("pmd == %08x, ", (unsigned int) pmd); + + pte = pte_offset(pmd, addr); + printk("pte == %08x, ", (unsigned int) pte); + + page = *pte; + printk("page == %08x\n", (unsigned int) pte_val(page)); + + val = pte_val(page); + if (val & _PAGE_PRESENT) printk("present "); + if (val & _PAGE_READ) printk("read "); + if (val & _PAGE_WRITE) printk("write "); + if (val & _PAGE_ACCESSED) printk("accessed "); + if (val & _PAGE_MODIFIED) printk("modified "); + if (val & _PAGE_GLOBAL) printk("global "); + if (val & _PAGE_VALID) printk("valid "); + printk("\n"); +} + +void dump_list_current(void *address) +{ + dump_list_process(current, address); +} + +unsigned int vtop(void *address) +{ + pgd_t *pgd; + pud_t *pud; + pmd_t *pmd; + pte_t *pte; + unsigned int addr, paddr; + + addr = (unsigned long) address; + pgd = pgd_offset(current->mm, addr); + pud = pud_offset(pgd, addr); + pmd = pmd_offset(pud, addr); + pte = pte_offset(pmd, addr); + paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK; + paddr |= (addr & ~PAGE_MASK); + + return paddr; +} + +void dump16(unsigned long *p) +{ + int i; + + for (i = 0; i < 8; i++) { + printk("*%08lx == %08lx, ", (unsigned long)p, *p); + p++; + printk("*%08lx == %08lx\n", (unsigned long)p, *p); + p++; + } +} From anemo@mba.ocn.ne.jp Fri Jun 1 17:06:10 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 01 Jun 2007 17:06:13 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:26622 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20022934AbXFAQGK (ORCPT ); Fri, 1 Jun 2007 17:06:10 +0100 Received: from localhost (p8230-ipad205funabasi.chiba.ocn.ne.jp [222.146.103.230]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 6000FB656; Sat, 2 Jun 2007 00:29:58 +0900 (JST) Date: Sat, 02 Jun 2007 00:30:25 +0900 (JST) Message-Id: <20070602.003025.51867254.anemo@mba.ocn.ne.jp> To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: [PATCH] Remove unused dump_tlb functions From: Atsushi Nemoto X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15220 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips Remove unused dump_tlb functions and cleanup some includes. Signed-off-by: Atsushi Nemoto --- This patch can be applied after "[PATCH] Unify dump_tlb". arch/mips/lib/dump_tlb.c | 144 +--------------------------------------- arch/mips/lib/r3k_dump_tlb.c | 122 +--------------------------------- arch/mips/sgi-ip27/ip27-berr.c | 1 - 3 files changed, 2 insertions(+), 265 deletions(-) diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c index fbf4b72..1a4db7d 100644 --- a/arch/mips/lib/dump_tlb.c +++ b/arch/mips/lib/dump_tlb.c @@ -6,12 +6,7 @@ */ #include #include -#include -#include -#include -#include -#include #include #include #include @@ -40,7 +35,7 @@ static inline const char *msk2str(unsigned int mask) "nop;nop;nop;nop;nop;nop;nop\n\t" \ ".set\treorder"); -void dump_tlb(int first, int last) +static void dump_tlb(int first, int last) { unsigned long s_entryhi, entryhi, asid; unsigned long long entrylo0, entrylo1; @@ -103,140 +98,3 @@ void dump_tlb_all(void) { dump_tlb(0, current_cpu_data.tlbsize - 1); } - -void dump_tlb_wired(void) -{ - int wired; - - wired = read_c0_wired(); - printk("Wired: %d", wired); - dump_tlb(0, read_c0_wired()); -} - -void dump_tlb_addr(unsigned long addr) -{ - unsigned int flags, oldpid; - int index; - - local_irq_save(flags); - oldpid = read_c0_entryhi() & 0xff; - BARRIER(); - write_c0_entryhi((addr & PAGE_MASK) | oldpid); - BARRIER(); - tlb_probe(); - BARRIER(); - index = read_c0_index(); - write_c0_entryhi(oldpid); - local_irq_restore(flags); - - if (index < 0) { - printk("No entry for address 0x%08lx in TLB\n", addr); - return; - } - - printk("Entry %d maps address 0x%08lx\n", index, addr); - dump_tlb(index, index); -} - -void dump_tlb_nonwired(void) -{ - dump_tlb(read_c0_wired(), current_cpu_data.tlbsize - 1); -} - -void dump_list_process(struct task_struct *t, void *address) -{ - pgd_t *page_dir, *pgd; - pud_t *pud; - pmd_t *pmd; - pte_t *pte, page; - unsigned long addr, val; - int width = sizeof(long) * 2; - - addr = (unsigned long) address; - - printk("Addr == %08lx\n", addr); -#ifdef CONFIG_64BIT - printk("tasks->mm.pgd == %08lx\n", (unsigned long) t->mm->pgd); -#endif - -#ifdef CONFIG_64BIT - page_dir = pgd_offset(t->mm, 0UL); - pgd = pgd_offset(t->mm, addr); -#else - if (addr > KSEG0) { - page_dir = pgd_offset_k(0); - pgd = pgd_offset_k(addr); - } else if (t->mm) { - page_dir = pgd_offset(t->mm, 0); - pgd = pgd_offset(t->mm, addr); - } else { - printk("Current thread has no mm\n"); - return; - } -#endif - printk("page_dir == %0*lx\n", width, (unsigned long) page_dir); - printk("pgd == %0*lx\n", width, (unsigned long) pgd); - - pud = pud_offset(pgd, addr); - printk("pud == %0*lx\n", width, (unsigned long) pud); - - pmd = pmd_offset(pud, addr); - printk("pmd == %0*lx\n", width, (unsigned long) pmd); - - pte = pte_offset(pmd, addr); - printk("pte == %0*lx\n", width, (unsigned long) pte); - - page = *pte; -#ifdef CONFIG_64BIT_PHYS_ADDR - printk("page == %08Lx\n", pte_val(page)); -#else - printk("page == %0*lx\n", width, pte_val(page)); -#endif - - val = pte_val(page); - if (val & _PAGE_PRESENT) printk("present "); - if (val & _PAGE_READ) printk("read "); - if (val & _PAGE_WRITE) printk("write "); - if (val & _PAGE_ACCESSED) printk("accessed "); - if (val & _PAGE_MODIFIED) printk("modified "); - if (val & _PAGE_R4KBUG) printk("r4kbug "); - if (val & _PAGE_GLOBAL) printk("global "); - if (val & _PAGE_VALID) printk("valid "); - printk("\n"); -} - -void dump_list_current(void *address) -{ - dump_list_process(current, address); -} - -unsigned long vtop(void *address) -{ - pgd_t *pgd; - pud_t *pud; - pmd_t *pmd; - pte_t *pte; - unsigned long addr, paddr; - - addr = (unsigned long) address; - pgd = pgd_offset(current->mm, addr); - pud = pud_offset(pgd, addr); - pmd = pmd_offset(pud, addr); - pte = pte_offset(pmd, addr); - paddr = (CKSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK; - paddr |= (addr & ~PAGE_MASK); - - return paddr; -} - -void dump16(unsigned long *p) -{ - int i; - - for (i = 0; i < 8; i++) { - printk("*%08lx == %08lx, ", (unsigned long)p, *p); - p++; - printk("*%08lx == %08lx\n", (unsigned long)p, *p); - p++; - } -} diff --git a/arch/mips/lib/r3k_dump_tlb.c b/arch/mips/lib/r3k_dump_tlb.c index 4f2cb74..52f8779 100644 --- a/arch/mips/lib/r3k_dump_tlb.c +++ b/arch/mips/lib/r3k_dump_tlb.c @@ -7,19 +7,14 @@ */ #include #include -#include -#include -#include -#include -#include #include #include #include extern int r3k_have_wired_reg; /* defined in tlb-r3k.c */ -void dump_tlb(int first, int last) +static void dump_tlb(int first, int last) { int i; unsigned int asid; @@ -65,118 +60,3 @@ void dump_tlb_all(void) { dump_tlb(0, current_cpu_data.tlbsize - 1); } - -void dump_tlb_wired(void) -{ - int wired = r3k_have_wired_reg ? read_c0_wired() : 8; - - printk("Wired: %d", wired); - dump_tlb(0, wired - 1); -} - -void dump_tlb_addr(unsigned long addr) -{ - unsigned long flags, oldpid; - int index; - - local_irq_save(flags); - oldpid = read_c0_entryhi() & 0xff; - write_c0_entryhi((addr & PAGE_MASK) | oldpid); - tlb_probe(); - index = read_c0_index(); - write_c0_entryhi(oldpid); - local_irq_restore(flags); - - if (index < 0) { - printk("No entry for address 0x%08lx in TLB\n", addr); - return; - } - - printk("Entry %d maps address 0x%08lx\n", index, addr); - dump_tlb(index, index); -} - -void dump_tlb_nonwired(void) -{ - int wired = r3k_have_wired_reg ? read_c0_wired() : 8; - dump_tlb(wired, current_cpu_data.tlbsize - 1); -} - -void dump_list_process(struct task_struct *t, void *address) -{ - pgd_t *page_dir, *pgd; - pud_t *pud; - pmd_t *pmd; - pte_t *pte, page; - unsigned int addr; - unsigned long val; - - addr = (unsigned int) address; - - printk("Addr == %08x\n", addr); - printk("tasks->mm.pgd == %08x\n", (unsigned int) t->mm->pgd); - - page_dir = pgd_offset(t->mm, 0); - printk("page_dir == %08x\n", (unsigned int) page_dir); - - pgd = pgd_offset(t->mm, addr); - printk("pgd == %08x, ", (unsigned int) pgd); - - pud = pud_offset(pgd, addr); - printk("pud == %08x, ", (unsigned int) pud); - - pmd = pmd_offset(pud, addr); - printk("pmd == %08x, ", (unsigned int) pmd); - - pte = pte_offset(pmd, addr); - printk("pte == %08x, ", (unsigned int) pte); - - page = *pte; - printk("page == %08x\n", (unsigned int) pte_val(page)); - - val = pte_val(page); - if (val & _PAGE_PRESENT) printk("present "); - if (val & _PAGE_READ) printk("read "); - if (val & _PAGE_WRITE) printk("write "); - if (val & _PAGE_ACCESSED) printk("accessed "); - if (val & _PAGE_MODIFIED) printk("modified "); - if (val & _PAGE_GLOBAL) printk("global "); - if (val & _PAGE_VALID) printk("valid "); - printk("\n"); -} - -void dump_list_current(void *address) -{ - dump_list_process(current, address); -} - -unsigned int vtop(void *address) -{ - pgd_t *pgd; - pud_t *pud; - pmd_t *pmd; - pte_t *pte; - unsigned int addr, paddr; - - addr = (unsigned long) address; - pgd = pgd_offset(current->mm, addr); - pud = pud_offset(pgd, addr); - pmd = pmd_offset(pud, addr); - pte = pte_offset(pmd, addr); - paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK; - paddr |= (addr & ~PAGE_MASK); - - return paddr; -} - -void dump16(unsigned long *p) -{ - int i; - - for (i = 0; i < 8; i++) { - printk("*%08lx == %08lx, ", (unsigned long)p, *p); - p++; - printk("*%08lx == %08lx\n", (unsigned long)p, *p); - p++; - } -} diff --git a/arch/mips/sgi-ip27/ip27-berr.c b/arch/mips/sgi-ip27/ip27-berr.c index ce907ed..123141a 100644 --- a/arch/mips/sgi-ip27/ip27-berr.c +++ b/arch/mips/sgi-ip27/ip27-berr.c @@ -21,7 +21,6 @@ #include #include -extern void dump_tlb_addr(unsigned long addr); extern void dump_tlb_all(void); static void dump_hub_information(unsigned long errst0, unsigned long errst1) From anemo@mba.ocn.ne.jp Fri Jun 1 17:29:58 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 01 Jun 2007 17:30:01 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:43765 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20021424AbXFAQ36 (ORCPT ); Fri, 1 Jun 2007 17:29:58 +0100 Received: from localhost (p8230-ipad205funabasi.chiba.ocn.ne.jp [222.146.103.230]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 43258ACE2; Sat, 2 Jun 2007 01:29:55 +0900 (JST) Date: Sat, 02 Jun 2007 01:30:22 +0900 (JST) Message-Id: <20070602.013022.52128810.anemo@mba.ocn.ne.jp> To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: Re: [MIPS] Fix modpost warnings by making start_secondary __cpuinit From: Atsushi Nemoto In-Reply-To: References: X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15221 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Thu, 31 May 2007 16:59:44 +0100, linux-mips@linux-mips.org wrote: > WARNING: arch/mips/kernel/built-in.o(.text+0x9a58): Section mismatch: reference to .init.text:cpu_report (between 'start_secondary' and 'smp_prepare_boot_cpu') Looking at arch/mips/kernel/smp.c, I suppose there should be much more functions to be marked as __cpuinit. For example, prom_init_secondary(), prom_smp_finish(), prom_smp_finish(), prom_boot_secondary(), etc. And then, smtc_init_secondary(), smtc_smp_finish(), etc. ... --- Atsushi Nemoto From yoichi_yuasa@tripeaks.co.jp Fri Jun 1 18:14:07 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 01 Jun 2007 18:14:10 +0100 (BST) Received: from mo31.po.2iij.NET ([210.128.50.54]:56077 "EHLO mo31.po.2iij.net") by ftp.linux-mips.org with ESMTP id S20022941AbXFAROG (ORCPT ); Fri, 1 Jun 2007 18:14:06 +0100 Received: by mo.po.2iij.net (mo31) id l51HClqD037337; Sat, 2 Jun 2007 02:12:47 +0900 (JST) Received: from localhost.localdomain (70.27.30.125.dy.iij4u.or.jp [125.30.27.70]) by mbox.po.2iij.net (mbox33) id l51HCgwS002020 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Sat, 2 Jun 2007 02:12:42 +0900 (JST) Date: Sat, 2 Jun 2007 02:12:41 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: yoichi_yuasa@tripeaks.co.jp, linux-mips Subject: [PATCH][MIPS] update cobalt_defconfig Message-Id: <20070602021241.2147f7ee.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.6 (GTK+ 1.2.10; i486-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15222 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has updated cobalt_defconfig. Cobalt button support has added to it. Also ATA driver has changed BLK_DEV_VIA82CXXX to PATA_VIA. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/configs/cobalt_defconfig mips/arch/mips/configs/cobalt_defconfig --- mips-orig/arch/mips/configs/cobalt_defconfig 2007-05-24 22:44:52.504133500 +0900 +++ mips/arch/mips/configs/cobalt_defconfig 2007-05-25 12:33:37.123381000 +0900 @@ -1,27 +1,14 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.21-rc7 -# Wed Apr 18 14:25:45 2007 +# Linux kernel version: 2.6.22-rc2 +# Fri May 25 11:17:29 2007 # CONFIG_MIPS=y # # Machine selection # -CONFIG_ZONE_DMA=y -# CONFIG_MIPS_MTX1 is not set -# CONFIG_MIPS_BOSPORUS is not set -# CONFIG_MIPS_PB1000 is not set -# CONFIG_MIPS_PB1100 is not set -# CONFIG_MIPS_PB1500 is not set -# CONFIG_MIPS_PB1550 is not set -# CONFIG_MIPS_PB1200 is not set -# CONFIG_MIPS_DB1000 is not set -# CONFIG_MIPS_DB1100 is not set -# CONFIG_MIPS_DB1500 is not set -# CONFIG_MIPS_DB1550 is not set -# CONFIG_MIPS_DB1200 is not set -# CONFIG_MIPS_MIRAGE is not set +# CONFIG_MACH_ALCHEMY is not set # CONFIG_BASLER_EXCITE is not set CONFIG_MIPS_COBALT=y # CONFIG_MACH_DECSTATION is not set @@ -33,12 +20,9 @@ CONFIG_MIPS_COBALT=y # CONFIG_MIPS_SEAD is not set # CONFIG_WR_PPMC is not set # CONFIG_MIPS_SIM is not set -# CONFIG_MOMENCO_JAGUAR_ATX is not set # CONFIG_MOMENCO_OCELOT is not set # CONFIG_MOMENCO_OCELOT_3 is not set # CONFIG_MOMENCO_OCELOT_C is not set -# CONFIG_MOMENCO_OCELOT_G is not set -# CONFIG_MIPS_XXS1500 is not set # CONFIG_PNX8550_JBS is not set # CONFIG_PNX8550_STB810 is not set # CONFIG_DDB5477 is not set @@ -138,7 +122,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y # CONFIG_SPARSEMEM_STATIC is not set CONFIG_SPLIT_PTLOCK_CPUS=4 # CONFIG_RESOURCES_64BIT is not set -CONFIG_ZONE_DMA_FLAG=1 +CONFIG_ZONE_DMA_FLAG=0 # CONFIG_HZ_48 is not set # CONFIG_HZ_100 is not set # CONFIG_HZ_128 is not set @@ -178,6 +162,7 @@ CONFIG_SYSVIPC_SYSCTL=y # CONFIG_UTS_NS is not set # CONFIG_AUDIT is not set # CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 CONFIG_SYSFS_DEPRECATED=y CONFIG_RELAY=y # CONFIG_BLK_DEV_INITRD is not set @@ -193,14 +178,19 @@ CONFIG_BUG=y CONFIG_ELF_CORE=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y +CONFIG_ANON_INODES=y CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y CONFIG_SHMEM=y -CONFIG_SLAB=y CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set CONFIG_RT_MUTEXES=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 -# CONFIG_SLOB is not set # # Loadable module support @@ -233,16 +223,13 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" # CONFIG_HW_HAS_PCI=y CONFIG_PCI=y +# CONFIG_ARCH_SUPPORTS_MSI is not set CONFIG_MMU=y # # PCCARD (PCMCIA/CardBus) support # # CONFIG_PCCARD is not set - -# -# PCI Hotplug Support -# # CONFIG_HOTPLUG_PCI is not set # @@ -268,7 +255,6 @@ CONFIG_NET=y # # Networking options # -# CONFIG_NETDEBUG is not set CONFIG_PACKET=y # CONFIG_PACKET_MMAP is not set CONFIG_UNIX=y @@ -300,11 +286,11 @@ CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_CUBIC=y CONFIG_DEFAULT_TCP_CONG="cubic" -CONFIG_TCP_MD5SIG=y +# CONFIG_TCP_MD5SIG is not set # CONFIG_IPV6 is not set # CONFIG_INET6_XFRM_TUNNEL is not set # CONFIG_INET6_TUNNEL is not set -CONFIG_NETWORK_SECMARK=y +# CONFIG_NETWORK_SECMARK is not set # CONFIG_NETFILTER is not set # @@ -345,13 +331,16 @@ CONFIG_NETWORK_SECMARK=y # CONFIG_HAMRADIO is not set # CONFIG_IRDA is not set # CONFIG_BT is not set -CONFIG_IEEE80211=y -# CONFIG_IEEE80211_DEBUG is not set -CONFIG_IEEE80211_CRYPT_WEP=y -CONFIG_IEEE80211_CRYPT_CCMP=y -CONFIG_IEEE80211_SOFTMAC=y -# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set -CONFIG_WIRELESS_EXT=y +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set # # Device Drivers @@ -370,10 +359,6 @@ CONFIG_FW_LOADER=y # CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y - -# -# Memory Technology Devices (MTD) -# CONFIG_MTD=y # CONFIG_MTD_DEBUG is not set # CONFIG_MTD_CONCAT is not set @@ -418,7 +403,6 @@ CONFIG_MTD_CFI_UTIL=y # CONFIG_MTD_RAM is not set # CONFIG_MTD_ROM is not set # CONFIG_MTD_ABSENT is not set -# CONFIG_MTD_OBSOLETE_CHIPS is not set # # Mapping drivers for chip access @@ -445,16 +429,13 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=0 # CONFIG_MTD_DOC2000 is not set # CONFIG_MTD_DOC2001 is not set # CONFIG_MTD_DOC2001PLUS is not set - -# -# NAND Flash Device Drivers -# # CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set # -# OneNAND Flash Device Drivers +# UBI - Unsorted block images # -# CONFIG_MTD_ONENAND is not set +# CONFIG_MTD_UBI is not set # # Parallel port support @@ -479,87 +460,145 @@ CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_RAM is not set -CONFIG_CDROM_PKTCDVD=y -CONFIG_CDROM_PKTCDVD_BUFFERS=8 -# CONFIG_CDROM_PKTCDVD_WCACHE is not set -CONFIG_ATA_OVER_ETH=y +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set # # Misc devices # -CONFIG_SGI_IOC4=y +# CONFIG_PHANTOM is not set +# CONFIG_SGI_IOC4 is not set # CONFIG_TIFM_CORE is not set - -# -# ATA/ATAPI/MFM/RLL support -# -CONFIG_IDE=y -CONFIG_IDE_MAX_HWIFS=4 -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_IDE_SATA is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_IDE_TASK_IOCTL is not set - -# -# IDE chipset support/bugfixes -# -CONFIG_IDE_GENERIC=y -CONFIG_BLK_DEV_IDEPCI=y -# CONFIG_IDEPCI_SHARE_IRQ is not set -# CONFIG_BLK_DEV_OFFBOARD is not set -# CONFIG_BLK_DEV_GENERIC is not set -# CONFIG_BLK_DEV_OPTI621 is not set -CONFIG_BLK_DEV_IDEDMA_PCI=y -# CONFIG_BLK_DEV_IDEDMA_FORCED is not set -# CONFIG_IDEDMA_ONLYDISK is not set -# CONFIG_BLK_DEV_AEC62XX is not set -# CONFIG_BLK_DEV_ALI15X3 is not set -# CONFIG_BLK_DEV_AMD74XX is not set -# CONFIG_BLK_DEV_CMD64X is not set -# CONFIG_BLK_DEV_TRIFLEX is not set -# CONFIG_BLK_DEV_CY82C693 is not set -# CONFIG_BLK_DEV_CS5520 is not set -# CONFIG_BLK_DEV_CS5530 is not set -# CONFIG_BLK_DEV_HPT34X is not set -# CONFIG_BLK_DEV_HPT366 is not set -# CONFIG_BLK_DEV_JMICRON is not set -# CONFIG_BLK_DEV_SC1200 is not set -# CONFIG_BLK_DEV_PIIX is not set -CONFIG_BLK_DEV_IT8213=y -# CONFIG_BLK_DEV_IT821X is not set -# CONFIG_BLK_DEV_NS87415 is not set -# CONFIG_BLK_DEV_PDC202XX_OLD is not set -# CONFIG_BLK_DEV_PDC202XX_NEW is not set -# CONFIG_BLK_DEV_SVWKS is not set -# CONFIG_BLK_DEV_SIIMAGE is not set -# CONFIG_BLK_DEV_SLC90E66 is not set -# CONFIG_BLK_DEV_TRM290 is not set -CONFIG_BLK_DEV_VIA82CXXX=y -CONFIG_BLK_DEV_TC86C001=y -# CONFIG_IDE_ARM is not set -CONFIG_BLK_DEV_IDEDMA=y -# CONFIG_IDEDMA_IVB is not set -# CONFIG_BLK_DEV_HD is not set +# CONFIG_BLINK is not set +# CONFIG_IDE is not set # # SCSI device support # CONFIG_RAID_ATTRS=y -# CONFIG_SCSI is not set +CONFIG_SCSI=y +# CONFIG_SCSI_TGT is not set # CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y # -# Serial ATA (prod) and Parallel ATA (experimental) drivers +# SCSI support type (disk, tape, CD-ROM) # -# CONFIG_ATA is not set +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set + +# +# SCSI low-level drivers +# +# CONFIG_ISCSI_TCP is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_FC is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_ESP_CORE is not set +# CONFIG_SCSI_SRP is not set +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +# CONFIG_SATA_AHCI is not set +# CONFIG_SATA_SVW is not set +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SX4 is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIL24 is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CS5520 is not set +# CONFIG_PATA_CS5530 is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RZ1000 is not set +# CONFIG_PATA_SC1200 is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +CONFIG_PATA_VIA=y +# CONFIG_PATA_WINBOND is not set +# CONFIG_PATA_PLATFORM is not set # # Multi-device support (RAID and LVM) @@ -570,10 +609,14 @@ CONFIG_RAID_ATTRS=y # Fusion MPT device support # # CONFIG_FUSION is not set +# CONFIG_FUSION_SPI is not set +# CONFIG_FUSION_FC is not set +# CONFIG_FUSION_SAS is not set # # IEEE 1394 (FireWire) support # +# CONFIG_FIREWIRE is not set # CONFIG_IEEE1394 is not set # @@ -594,24 +637,7 @@ CONFIG_NETDEVICES=y # ARCnet devices # # CONFIG_ARCNET is not set - -# -# PHY device support -# -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -CONFIG_MARVELL_PHY=y -CONFIG_DAVICOM_PHY=y -CONFIG_QSEMI_PHY=y -CONFIG_LXT_PHY=y -CONFIG_CICADA_PHY=y -CONFIG_VITESSE_PHY=y -CONFIG_SMSC_PHY=y -# CONFIG_BROADCOM_PHY is not set -# CONFIG_FIXED_PHY is not set +# CONFIG_PHYLIB is not set # # Ethernet (10 or 100Mbit) @@ -639,35 +665,8 @@ CONFIG_TULIP=y # CONFIG_ULI526X is not set # CONFIG_HP100 is not set # CONFIG_NET_PCI is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_R8169 is not set -# CONFIG_SIS190 is not set -# CONFIG_SKGE is not set -# CONFIG_SKY2 is not set -# CONFIG_SK98LIN is not set -# CONFIG_TIGON3 is not set -# CONFIG_BNX2 is not set -CONFIG_QLA3XXX=y -# CONFIG_ATL1 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_CHELSIO_T1 is not set -CONFIG_CHELSIO_T3=y -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set -# CONFIG_MYRI10GE is not set -CONFIG_NETXEN_NIC=y +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set # # Token Ring devices @@ -675,18 +674,16 @@ CONFIG_NETXEN_NIC=y # CONFIG_TR is not set # -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces +# Wireless LAN # +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set # CONFIG_WAN is not set # CONFIG_FDDI is not set # CONFIG_HIPPI is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set +# CONFIG_NET_FC is not set # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set # CONFIG_NETPOLL is not set @@ -711,10 +708,7 @@ CONFIG_INPUT=y # # Userland interfaces # -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_JOYDEV is not set # CONFIG_INPUT_TSDEV is not set # CONFIG_INPUT_EVDEV is not set @@ -726,18 +720,23 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set # CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_PCSPKR is not set +CONFIG_INPUT_COBALT_BTNS=y +# CONFIG_INPUT_ATI_REMOTE is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_UINPUT is not set +CONFIG_INPUT_POLLDEV=y # # Hardware I/O ports # -CONFIG_SERIO=y -# CONFIG_SERIO_I8042 is not set -CONFIG_SERIO_SERPORT=y -# CONFIG_SERIO_PCIPS2 is not set -# CONFIG_SERIO_LIBPS2 is not set -CONFIG_SERIO_RAW=y +# CONFIG_SERIO is not set # CONFIG_GAMEPORT is not set # @@ -754,7 +753,7 @@ CONFIG_VT_HW_CONSOLE_BINDING=y # CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_PCI=y +# CONFIG_SERIAL_8250_PCI is not set CONFIG_SERIAL_8250_NR_UARTS=4 CONFIG_SERIAL_8250_RUNTIME_UARTS=4 # CONFIG_SERIAL_8250_EXTENDED is not set @@ -773,16 +772,11 @@ CONFIG_LEGACY_PTY_COUNT=256 # IPMI # # CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# # CONFIG_WATCHDOG is not set # CONFIG_HW_RANDOM is not set # CONFIG_RTC is not set # CONFIG_GEN_RTC is not set CONFIG_COBALT_LCD=y -# CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set # CONFIG_DRM is not set @@ -792,10 +786,7 @@ CONFIG_COBALT_LCD=y # TPM devices # # CONFIG_TCG_TPM is not set - -# -# I2C support -# +CONFIG_DEVPORT=y # CONFIG_I2C is not set # @@ -808,12 +799,7 @@ CONFIG_COBALT_LCD=y # Dallas's 1-wire bus # # CONFIG_W1 is not set - -# -# Hardware Monitoring support -# # CONFIG_HWMON is not set -# CONFIG_HWMON_VID is not set # # Multifunction device drivers @@ -824,16 +810,19 @@ CONFIG_COBALT_LCD=y # Multimedia devices # # CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_DAB is not set # -# Digital Video Broadcasting Devices +# Graphics support # -# CONFIG_DVB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # -# Graphics support +# Display device support # -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set +# CONFIG_DISPLAY_SUPPORT is not set +# CONFIG_VGASTATE is not set # CONFIG_FB is not set # @@ -868,10 +857,6 @@ CONFIG_USB_ARCH_HAS_EHCI=y # USB Gadget Support # # CONFIG_USB_GADGET is not set - -# -# MMC/SD Card support -# # CONFIG_MMC is not set # @@ -912,18 +897,30 @@ CONFIG_RTC_INTF_SYSFS=y CONFIG_RTC_INTF_PROC=y CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# # -# RTC drivers +# SPI RTC drivers +# + +# +# Platform RTC drivers # CONFIG_RTC_DRV_CMOS=y # CONFIG_RTC_DRV_DS1553 is not set # CONFIG_RTC_DRV_DS1742 is not set # CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_TEST is not set # CONFIG_RTC_DRV_V3020 is not set # +# on-CPU RTC drivers +# + +# # DMA Engine support # # CONFIG_DMA_ENGINE is not set @@ -937,14 +934,6 @@ CONFIG_RTC_DRV_CMOS=y # # -# Auxiliary Display support -# - -# -# Virtualization -# - -# # File systems # CONFIG_EXT2_FS=y @@ -952,8 +941,13 @@ CONFIG_EXT2_FS_XATTR=y CONFIG_EXT2_FS_POSIX_ACL=y CONFIG_EXT2_FS_SECURITY=y # CONFIG_EXT2_FS_XIP is not set -# CONFIG_EXT3_FS is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y # CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set @@ -969,7 +963,7 @@ CONFIG_INOTIFY_USER=y CONFIG_DNOTIFY=y # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set -CONFIG_FUSE_FS=y +# CONFIG_FUSE_FS is not set CONFIG_GENERIC_ACL=y # @@ -1003,7 +997,6 @@ CONFIG_CONFIGFS_FS=y # # CONFIG_ADFS_FS is not set # CONFIG_AFFS_FS is not set -# CONFIG_ECRYPT_FS is not set # CONFIG_HFS_FS is not set # CONFIG_HFSPLUS_FS is not set # CONFIG_BEFS_FS is not set @@ -1021,13 +1014,23 @@ CONFIG_CONFIGFS_FS=y # Network File Systems # CONFIG_NFS_FS=y -# CONFIG_NFS_V3 is not set +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y # CONFIG_NFS_V4 is not set # CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set +CONFIG_NFSD=y +CONFIG_NFSD_V2_ACL=y +CONFIG_NFSD_V3=y +CONFIG_NFSD_V3_ACL=y +# CONFIG_NFSD_V4 is not set +CONFIG_NFSD_TCP=y CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=y +CONFIG_NFS_ACL_SUPPORT=y CONFIG_NFS_COMMON=y CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set # CONFIG_RPCSEC_GSS_KRB5 is not set # CONFIG_RPCSEC_GSS_SPKM3 is not set # CONFIG_SMB_FS is not set @@ -1051,10 +1054,7 @@ CONFIG_MSDOS_PARTITION=y # # Distributed Lock Manager # -CONFIG_DLM=y -CONFIG_DLM_TCP=y -# CONFIG_DLM_SCTP is not set -# CONFIG_DLM_DEBUG is not set +# CONFIG_DLM is not set # # Profiling support @@ -1072,72 +1072,30 @@ CONFIG_ENABLE_MUST_CHECK=y # CONFIG_DEBUG_FS is not set # CONFIG_HEADERS_CHECK is not set # CONFIG_DEBUG_KERNEL is not set -CONFIG_LOG_BUF_SHIFT=14 CONFIG_CROSSCOMPILE=y CONFIG_CMDLINE="" # # Security options # -CONFIG_KEYS=y -CONFIG_KEYS_DEBUG_PROC_KEYS=y +# CONFIG_KEYS is not set # CONFIG_SECURITY is not set # # Cryptographic options # -CONFIG_CRYPTO=y -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_XCBC=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_MD4=y -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_WP512=y -CONFIG_CRYPTO_TGR192=y -CONFIG_CRYPTO_GF128MUL=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_PCBC=y -CONFIG_CRYPTO_LRW=y -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_FCRYPT=y -CONFIG_CRYPTO_BLOWFISH=y -CONFIG_CRYPTO_TWOFISH=y -CONFIG_CRYPTO_TWOFISH_COMMON=y -CONFIG_CRYPTO_SERPENT=y -CONFIG_CRYPTO_AES=y -CONFIG_CRYPTO_CAST5=y -CONFIG_CRYPTO_CAST6=y -CONFIG_CRYPTO_TEA=y -CONFIG_CRYPTO_ARC4=y -CONFIG_CRYPTO_KHAZAD=y -CONFIG_CRYPTO_ANUBIS=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_MICHAEL_MIC=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CAMELLIA=y - -# -# Hardware crypto devices -# +# CONFIG_CRYPTO is not set # # Library routines # CONFIG_BITREVERSE=y # CONFIG_CRC_CCITT is not set -CONFIG_CRC16=y +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y CONFIG_LIBCRC32C=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y CONFIG_PLIST=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y From ralf@linux-mips.org Fri Jun 1 18:40:40 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 01 Jun 2007 18:40:43 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:33205 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022944AbXFARkk (ORCPT ); Fri, 1 Jun 2007 18:40:40 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.13.8/8.13.8) with ESMTP id l51HeNtm028504; Fri, 1 Jun 2007 18:40:23 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.13.8/8.13.8/Submit) id l51HeMMk028503; Fri, 1 Jun 2007 18:40:22 +0100 Date: Fri, 1 Jun 2007 18:40:21 +0100 From: Ralf Baechle To: Atsushi Nemoto Cc: linux-mips@linux-mips.org Subject: Re: [MIPS] Fix modpost warnings by making start_secondary __cpuinit Message-ID: <20070601174021.GA28461@linux-mips.org> References: <20070602.013022.52128810.anemo@mba.ocn.ne.jp> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070602.013022.52128810.anemo@mba.ocn.ne.jp> User-Agent: Mutt/1.4.2.3i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15223 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Sat, Jun 02, 2007 at 01:30:22AM +0900, Atsushi Nemoto wrote: > Looking at arch/mips/kernel/smp.c, I suppose there should be much more > functions to be marked as __cpuinit. For example, > prom_init_secondary(), prom_smp_finish(), prom_smp_finish(), > prom_boot_secondary(), etc. > > And then, smtc_init_secondary(), smtc_smp_finish(), etc. ... That is absolutely correct but beyond the minimal fix needed to deal with the warning for 2.6.22. Longer term I'd like to get CPU hotplugging working, it could be a handy feature with multi-threaded kernel models such as VSMP and SMTC. Ralf From sar_van81@yahoo.co.in Sat Jun 2 07:50:09 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 02 Jun 2007 07:50:12 +0100 (BST) Received: from web94308.mail.in2.yahoo.com ([203.104.16.218]:9396 "HELO web94308.mail.in2.yahoo.com") by ftp.linux-mips.org with SMTP id S20022044AbXFBGuJ (ORCPT ); Sat, 2 Jun 2007 07:50:09 +0100 Received: (qmail 9709 invoked by uid 60001); 2 Jun 2007 06:49:01 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=s1024; d=yahoo.co.in; h=X-YMail-OSG:Received:Date:From:Subject:To:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-ID; b=vWMmtScOjhU2aOM16aEtKAADrpfTKPLjA9T4f8WvBJ0awpVc9RYnqOBsSJjnLvuJ/VxAorbXQNHOzNqJbPK9+OHxu8SduV1j5hXXY7XUPD7TIjEZyEbYi9g/wVorpdQW8IMExyp4Rp24REXDPnR38Pp9JLHt+YtMHtl6u4dBuLU=; X-YMail-OSG: hjyJSqgVM1kE7zIAUu2h6fVeKKKUqpd3lD8aIxB7 Received: from [59.92.35.197] by web94308.mail.in2.yahoo.com via HTTP; Sat, 02 Jun 2007 07:49:01 BST Date: Sat, 2 Jun 2007 07:49:01 +0100 (BST) From: saravanan sar Subject: porting linux to DBau1200 To: linux-mips@linux-mips.org MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="0-47621698-1180766941=:6401" Content-Transfer-Encoding: 8bit Message-ID: <858843.6401.qm@web94308.mail.in2.yahoo.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15224 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sar_van81@yahoo.co.in Precedence: bulk X-list: linux-mips --0-47621698-1180766941=:6401 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8bit hi, has anyone successfully ported linux to DBau1200 board ? here i have problem in mounting root filesystem. i compiled the linux kernel and got the vmlinuz image and ported to the board also. but when i boots up it shows the following error: YAMON> go Linux version 2.6.11-r000069-smp (root@suse) (gcc version 3.4.4) #8 Wed May 30 19:22:16 IST 2007 CPU revision is: 04030201 AMD Alchemy Db1200 Board (PRId 04030201) @ 396MHZ Determined physical RAM map: memory: 10000000 @ 00000000 (usable) Built 1 zonelists Kernel command line: video=au1200fb:panel:bs console=ttyS0,115200 Primary instruction cache 16kB, physically tagged, 4-way, linesize 32 bytes. Primary data cache 16kB, 4-way, linesize 32 bytes. Synthesized TLB refill handler (17 instructions). Synthesized TLB load handler fastpath (34 instructions). Synthesized TLB store handler fastpath (34 instructions). Synthesized TLB modify handler fastpath (33 instructions). PID hash table entries: 2048 (order: 11, 32768 bytes) calculating r4koff... 00060ae0(396000) Using 396.000 MHz high precision timer. Console: colour dummy device 80x25 Dentry cache hash table entries: 65536 (order: 6, 262144 bytes) Inode-cache hash table entries: 32768 (order: 5, 131072 bytes) Memory: 255872k/262144k available (1894k kernel code, 6124k reserved, 337k data, 116k init, 0k highmem) Mount-cache hash table entries: 512 (order: 0, 4096 bytes) Checking for 'wait' instruction... unavailable. NET: Registered protocol family 16 Au1XXX Real Time Clock Driver v1.0 audit: initializing netlink socket (disabled) audit(120525897.203:0): initialized VFS: Disk quotas dquot_6.5.1 Dquot-cache hash table entries: 1024 (order 0, 4096 bytes) Initializing Cryptographic API au1200fb: LCD controller driver for AU1200 processors<6> au1200fb: Panel 2 SVGA_800x600 au1200fb: Win 2 0-FS gfx, 1-video, 2-ovly gfx, 3-ovly gfx Panel(SVGA_800x600), 800x600 Console: switching to colour frame buffer device 100x75 rtc: I/O resource 70 is not free. Serial: Au1x00 driver ttyS0 at I/O 0xb1100000 (irq = 0) is a AU1X00_UART ttyS1 at I/O 0xb1200000 (irq = 8) is a AU1X00_UART io scheduler noop registered io scheduler anticipatory registered io scheduler deadline registered io scheduler cfq registered RAMDISK driver initialized: 16 RAM disks of 64000K size 1024 blocksize netconsole: not configured, aborting NET: Registered protocol family 2 IP: routing cache hash table of 2048 buckets, 16Kbytes TCP established hash table entries: 16384 (order: 5, 131072 bytes) TCP bind hash table entries: 16384 (order: 4, 65536 bytes) TCP: Hash tables configured (established 16384 bind 16384) NET: Registered protocol family 1 Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(1,0). . i searched in the google regarding this and found that this corresponds to root filesystem not found. can anyone provide me any suggestions or solutions for creating root filesystem and linking that with the kernel ? thanks in advance, saravanan. --------------------------------- Did you know? You can CHAT without downloading messenger. Know how! --0-47621698-1180766941=:6401 Content-Type: text/html; charset=iso-8859-1 Content-Transfer-Encoding: 8bit hi,

has anyone successfully ported linux to DBau1200 board ? here i have problem in mounting root filesystem. i compiled the linux kernel and got the vmlinuz image and ported to the board also. but when i boots up it shows the following error:
YAMON> go
Linux version 2.6.11-r000069-smp (root@suse) (gcc version 3.4.4) #8 Wed May 30 19:22:16 IST 2007
CPU revision is: 04030201
AMD Alchemy Db1200 Board
(PRId 04030201) @ 396MHZ
Determined physical RAM map:
 memory: 10000000 @ 00000000 (usable)
Built 1 zonelists
Kernel command line:  video=au1200fb:panel:bs console=ttyS0,115200
Primary instruction cache 16kB, physically tagged, 4-way, linesize 32 bytes.
Primary data cache 16kB, 4-way, linesize 32 bytes.
Synthesized TLB refill handler (17 instructions).
Synthesized TLB load handler fastpath (34 instructions).
Synthesized TLB store handler fastpath (34 instructions).
Synthesized TLB modify handler fastpath (33 instructions).
PID hash table entries: 2048 (order: 11, 32768 bytes)
calculating r4koff... 00060ae0(396000)
Using 396.000 MHz high precision timer.
Console: colour dummy device 80x25
Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
Memory: 255872k/262144k available (1894k kernel code, 6124k reserved, 337k data, 116k init, 0k highmem)
Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
Checking for 'wait' instruction...  unavailable.
NET: Registered protocol family 16
Au1XXX Real Time Clock Driver v1.0
audit: initializing netlink socket (disabled)
audit(120525897.203:0): initialized
VFS: Disk quotas dquot_6.5.1
Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
Initializing Cryptographic API
au1200fb: LCD controller driver for AU1200 processors<6>
au1200fb: Panel 2 SVGA_800x600
au1200fb: Win 2 0-FS gfx, 1-video, 2-ovly gfx, 3-ovly gfx
Panel(SVGA_800x600), 800x600
Console: switching to colour frame buffer device 100x75
rtc: I/O resource 70 is not free.
Serial: Au1x00 driver
ttyS0 at I/O 0xb1100000 (irq = 0) is a AU1X00_UART
ttyS1 at I/O 0xb1200000 (irq = 8) is a AU1X00_UART
io scheduler noop registered
io scheduler anticipatory registered
io scheduler deadline registered
io scheduler cfq registered
RAMDISK driver initialized: 16 RAM disks of 64000K size 1024 blocksize
netconsole: not configured, aborting
NET: Registered protocol family 2
IP: routing cache hash table of 2048 buckets, 16Kbytes
TCP established hash table entries: 16384 (order: 5, 131072 bytes)
TCP bind hash table entries: 16384 (order: 4, 65536 bytes)
TCP: Hash tables configured (established 16384 bind 16384)
NET: Registered protocol family 1
Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(1,0).

. i searched in the google regarding this and found that this corresponds to root filesystem not found.

can anyone provide me any suggestions or solutions for creating root filesystem and linking that with the kernel ?

thanks in advance,

saravanan.

Did you know? You can CHAT without downloading messenger. Know how! --0-47621698-1180766941=:6401-- From florian.fainelli@telecomint.eu Sat Jun 2 09:35:52 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 02 Jun 2007 09:35:55 +0100 (BST) Received: from smtp-ext.int-evry.fr ([157.159.11.17]:35984 "EHLO smtp-ext.int-evry.fr") by ftp.linux-mips.org with ESMTP id S20025786AbXFBIfw (ORCPT ); Sat, 2 Jun 2007 09:35:52 +0100 Received: from ibook.alphacore.home (florian.alphacore.net [82.67.132.19]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by smtp-ext.int-evry.fr (Postfix) with ESMTP id 00AFE8D16A2; Sat, 2 Jun 2007 10:35:17 +0200 (CEST) From: Florian Fainelli To: saravanan sar Subject: Re: {Spam} porting linux to DBau1200 Date: Sat, 2 Jun 2007 10:35:08 +0200 User-Agent: KMail/1.9.6 Cc: linux-mips@linux-mips.org References: <858843.6401.qm@web94308.mail.in2.yahoo.com> In-Reply-To: <858843.6401.qm@web94308.mail.in2.yahoo.com> MIME-Version: 1.0 Content-Type: multipart/signed; boundary="nextPart2534517.S8akteklza"; protocol="application/pgp-signature"; micalg=pgp-sha1 Content-Transfer-Encoding: 7bit Message-Id: <200706021035.10229.florian.fainelli@telecomint.eu> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15225 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian.fainelli@telecomint.eu Precedence: bulk X-list: linux-mips --nextPart2534517.S8akteklza Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Hello, In the bootlog you pasted, I see no flash map being enabled for your device= =2E=20 You might want to have a look at the AMD alchemy flash driver which should= =20 provide you a basic mapping. This driver is located in linux/drivers/mtd/maps/alchemy-flash.c and can be= =20 enabled within Kconfig in the Device Driver / Memory Technology Device /=20 Mapping drivers for chip access. Le samedi 2 juin 2007, saravanan sar a =E9crit=A0: > hi, > > has anyone successfully ported linux to DBau1200 board ? here i have > problem in mounting root filesystem. i compiled the linux kernel and got > the vmlinuz image and ported to the board also. but when i boots up it > shows the following error: YAMON> go > Linux version 2.6.11-r000069-smp (root@suse) (gcc version 3.4.4) #8 Wed M= ay > 30 19:22:16 IST 2007 CPU revision is: 04030201 > AMD Alchemy Db1200 Board > (PRId 04030201) @ 396MHZ > Determined physical RAM map: > memory: 10000000 @ 00000000 (usable) > Built 1 zonelists > Kernel command line: video=3Dau1200fb:panel:bs console=3DttyS0,115200 > Primary instruction cache 16kB, physically tagged, 4-way, linesize 32 > bytes. Primary data cache 16kB, 4-way, linesize 32 bytes. > Synthesized TLB refill handler (17 instructions). > Synthesized TLB load handler fastpath (34 instructions). > Synthesized TLB store handler fastpath (34 instructions). > Synthesized TLB modify handler fastpath (33 instructions). > PID hash table entries: 2048 (order: 11, 32768 bytes) > calculating r4koff... 00060ae0(396000) > Using 396.000 MHz high precision timer. > Console: colour dummy device 80x25 > Dentry cache hash table entries: 65536 (order: 6, 262144 bytes) > Inode-cache hash table entries: 32768 (order: 5, 131072 bytes) > Memory: 255872k/262144k available (1894k kernel code, 6124k reserved, 337k > data, 116k init, 0k highmem) Mount-cache hash table entries: 512 (order: = 0, > 4096 bytes) > Checking for 'wait' instruction... unavailable. > NET: Registered protocol family 16 > Au1XXX Real Time Clock Driver v1.0 > audit: initializing netlink socket (disabled) > audit(120525897.203:0): initialized > VFS: Disk quotas dquot_6.5.1 > Dquot-cache hash table entries: 1024 (order 0, 4096 bytes) > Initializing Cryptographic API > au1200fb: LCD controller driver for AU1200 processors<6> > au1200fb: Panel 2 SVGA_800x600 > au1200fb: Win 2 0-FS gfx, 1-video, 2-ovly gfx, 3-ovly gfx > Panel(SVGA_800x600), 800x600 > Console: switching to colour frame buffer device 100x75 > rtc: I/O resource 70 is not free. > Serial: Au1x00 driver > ttyS0 at I/O 0xb1100000 (irq =3D 0) is a AU1X00_UART > ttyS1 at I/O 0xb1200000 (irq =3D 8) is a AU1X00_UART > io scheduler noop registered > io scheduler anticipatory registered > io scheduler deadline registered > io scheduler cfq registered > RAMDISK driver initialized: 16 RAM disks of 64000K size 1024 blocksize > netconsole: not configured, aborting > NET: Registered protocol family 2 > IP: routing cache hash table of 2048 buckets, 16Kbytes > TCP established hash table entries: 16384 (order: 5, 131072 bytes) > TCP bind hash table entries: 16384 (order: 4, 65536 bytes) > TCP: Hash tables configured (established 16384 bind 16384) > NET: Registered protocol family 1 > Kernel panic - not syncing: VFS: Unable to mount root fs on > unknown-block(1,0). > > . i searched in the google regarding this and found that this corresponds > to root filesystem not found. > > can anyone provide me any suggestions or solutions for creating root > filesystem and linking that with the kernel ? > > thanks in advance, > > saravanan. > > > --------------------------------- > Did you know? You can CHAT without downloading messenger. Know how! =2D-=20 Cordialement, Florian Fainelli =2D-------------------------------------------- --nextPart2534517.S8akteklza Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.4 (GNU/Linux) iD8DBQBGYSu+mx9n1G/316sRAr2bAJ9zI0B6cZ425WySU7+irFqzvIwZewCeOIBW dWHlR2EidJNPLDYZUHbIojo= =Z6wM -----END PGP SIGNATURE----- --nextPart2534517.S8akteklza-- From Sagar_Borikar@pmc-sierra.com Sat Jun 2 13:19:10 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 02 Jun 2007 13:19:12 +0100 (BST) Received: from mother.pmc-sierra.com ([216.241.224.12]:6614 "HELO mother.pmc-sierra.bc.ca") by ftp.linux-mips.org with SMTP id S20025829AbXFBMTK (ORCPT ); Sat, 2 Jun 2007 13:19:10 +0100 Received: (qmail 19272 invoked by uid 101); 2 Jun 2007 12:19:01 -0000 Received: from unknown (HELO pmxedge1.pmc-sierra.bc.ca) (216.241.226.183) by mother.pmc-sierra.com with SMTP; 2 Jun 2007 12:19:01 -0000 Received: from bby1exi01.pmc_nt.nt.pmc-sierra.bc.ca (bby1exi01.pmc-sierra.bc.ca [216.241.231.251]) by pmxedge1.pmc-sierra.bc.ca (8.13.4/8.12.7) with ESMTP id l52CIuS0008947 for ; Sat, 2 Jun 2007 05:19:01 -0700 Received: by bby1exi01.pmc-sierra.bc.ca with Internet Mail Service (5.5.2657.72) id ; Sat, 2 Jun 2007 05:18:56 -0700 Message-ID: <340C71CD25A7EB49BFA81AE8C839266706C3B3@BBY1EXM10.pmc_nt.nt.pmc-sierra.bc.ca> From: Sagar Borikar To: linux-mips@linux-mips.org Subject: call graph support in oprofile for MIPS Date: Sat, 2 Jun 2007 05:18:34 -0700 MIME-Version: 1.0 X-Mailer: Internet Mail Service (5.5.2657.72) Content-Type: text/plain; charset="iso-8859-1" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15226 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: Sagar_Borikar@pmc-sierra.com Precedence: bulk X-list: linux-mips Folks, We are interested in using call graph feature in oprofile for RM9000 platform. Could you please let me know status and current efforts involved in this. Since I could see that backtracking feature is supported in ARM, x86 and ia64 as well but not for MIPS. If anybody has done some work on this, I can continue from that state. Please let me know. Thanks in advance, Sagar Borikar From freddy@dusktilldawn.nl Sat Jun 2 19:45:27 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 02 Jun 2007 19:45:29 +0100 (BST) Received: from tool.snarl.nl ([82.95.241.19]:16139 "EHLO tool.snarl.nl") by ftp.linux-mips.org with ESMTP id S28575744AbXFBSp1 (ORCPT ); Sat, 2 Jun 2007 19:45:27 +0100 Received: from localhost (tool.local.snarl.nl [127.0.0.1]) by tool.snarl.nl (Postfix) with ESMTP id 892635DFC8; Sat, 2 Jun 2007 20:44:51 +0200 (CEST) Received: from tool.snarl.nl ([127.0.0.1]) by localhost (tool.local.snarl.nl [127.0.0.1]) (amavisd-new, port 10024) with LMTP id P0ED9M0KYBcb; Sat, 2 Jun 2007 20:44:51 +0200 (CEST) Received: by tool.snarl.nl (Postfix, from userid 1000) id 3083C5DF9C; Sat, 2 Jun 2007 20:44:51 +0200 (CEST) Date: Sat, 2 Jun 2007 20:44:51 +0200 From: Freddy Spierenburg To: saravanan sar Cc: linux-mips@linux-mips.org Subject: Re: porting linux to DBau1200 Message-ID: <20070602184450.GD28306@dusktilldawn.nl> References: <858843.6401.qm@web94308.mail.in2.yahoo.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="BI5RvnYi6R4T2M87" Content-Disposition: inline In-Reply-To: <858843.6401.qm@web94308.mail.in2.yahoo.com> X-User-Agent-Feature: All mail clients suck. This one just sucks less. X-GPG-Key: http://snarl.nl/~freddy/keys/freddyPublicKey.gpg User-Agent: Mutt/1.5.13 (2006-08-11) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15227 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: freddy@dusktilldawn.nl Precedence: bulk X-list: linux-mips --BI5RvnYi6R4T2M87 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi Sar, On Sat, Jun 02, 2007 at 07:49:01AM +0100, saravanan sar wrote: > has anyone successfully ported linux to DBau1200 board? I am successfully running it on the DBAu1100 board, so I am most sure it works on the 1200 board too. No worries on that part. > YAMON> go [cut] > Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block= (1,0). You might want to try an NFS mount first, before loading a root filesystem on the Flash memory that's part of the board. Setup a root filesystem on a workstation and export it by means of NFS. You might want to take a look at debootstrap (Debian GNU/Linux), but there do exist an almost infite amount of other ways to do just that. Probably an obvious note, but I like to make it anyway: make sure you use mipsel binaries!! Next you start from YAMON in a way like this: go . ip=3D10.42.69.2 nfsroot=3D10.42.69.1:/opt/debianfs/ rw Of course you can use any IP address you like and the '/opt/debianfs/' is only a suggestion to where the just created root filesystem resides on your workstation. Good luck! --=20 $ cat ~/.signature Freddy Spierenburg http://freddy.snarl.nl/ GnuPG: 0x7941D1E1=3DC948 5851 26D2 FA5C 39F1 E588 6F17 FD5D 7941 D1E1 $ # Please read http://www.ietf.org/rfc/rfc2015.txt before complain! --BI5RvnYi6R4T2M87 Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature Content-Disposition: inline -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.6 (GNU/Linux) iD8DBQFGYbqibxf9XXlB0eERAjSBAJ98GiMhR6Szx0GYAN9U4Av2q5iP2gCg6mu/ goZxNy5pK3+6ahLwYDqD+lA= =6zWd -----END PGP SIGNATURE----- --BI5RvnYi6R4T2M87-- From lists@nabble.com Mon Jun 4 10:33:31 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jun 2007 10:33:34 +0100 (BST) Received: from kuber.nabble.com ([216.139.236.158]:36326 "EHLO kuber.nabble.com") by ftp.linux-mips.org with ESMTP id S20021666AbXFDJdb (ORCPT ); Mon, 4 Jun 2007 10:33:31 +0100 Received: from isper.nabble.com ([192.168.236.156]) by kuber.nabble.com with esmtp (Exim 4.63) (envelope-from ) id 1Hv8wK-0001hE-Um for linux-mips@linux-mips.org; Mon, 04 Jun 2007 02:33:28 -0700 Message-ID: <10946489.post@talk.nabble.com> Date: Mon, 4 Jun 2007 02:33:28 -0700 (PDT) From: Daniel Laird To: linux-mips@linux-mips.org Subject: Adding more MIPS configuration for PNX8550 systems MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Nabble-From: daniel.j.laird@nxp.com Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15228 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: daniel.j.laird@nxp.com Precedence: bulk X-list: linux-mips The following patch allows for MIPS processor setup on pnx8550 systems --- /include/asm-mips/mipsregs.h.orig +++ /include/asm-mips/mipsregs.h.new @@ -498,6 +498,25 @@ #define MIPS_CONF_AT (_ULCAST_(3) << 13) #define MIPS_CONF_M (_ULCAST_(1) << 31) +/* Bits specific to the PR4450 CMEM Registers */ +#define PR4450_CMEMF_BBA (_ULCAST_(2047) << 20) +#define PR4450_CMEMB_BBA 20 +#define PR4450_CMEMF_SIZE (_ULCAST_(15) << 1) +#define PR4450_CMEMB_SIZE 1 +#define PR4450_CMEM_SIZE_1MB 0 +#define PR4450_CMEM_SIZE_2MB 1 +#define PR4450_CMEM_SIZE_4MB 2 +#define PR4450_CMEM_SIZE_8MB 3 +#define PR4450_CMEM_SIZE_16MB 4 +#define PR4450_CMEM_SIZE_32MB 5 +#define PR4450_CMEM_SIZE_64MB 6 +#define PR4450_CMEM_SIZE_128MB 7 +#define PR4450_CMEM_SIZE_256MB 8 +#define PR4450_CMEM_SIZE_512MB 9 +#define PR4450_CMEM_SIZE_1GB 10 +#define PR4450_CMEMF_VALID (_ULCAST_(1) << 0) +#define PR4450_CMEMB_VALID 0 + /* * Bits in the MIPS32/64 PRA coprocessor 0 config registers 1 and above. */ @@ -917,6 +936,14 @@ #define read_c0_diag5() __read_32bit_c0_register($22, 5) #define write_c0_diag5(val) __write_32bit_c0_register($22, 5, val) +#ifdef CONFIG_SOC_PNX8550 +#define read_c0_diag6() __read_32bit_c0_register($22, 6) +#define write_c0_diag6(val) __write_32bit_c0_register($22, 6, val) + +#define read_c0_diag7() __read_32bit_c0_register($22, 7) +#define write_c0_diag7(val) __write_32bit_c0_register($22, 7, val) +#endif + #define read_c0_debug() __read_32bit_c0_register($23, 0) #define write_c0_debug(val) __write_32bit_c0_register($23, 0, val) Cheers Dan Laird -- View this message in context: http://www.nabble.com/Adding-more-MIPS-configuration-for-PNX8550-systems-tf3864017.html#a10946489 Sent from the linux-mips main mailing list archive at Nabble.com. From lists@nabble.com Mon Jun 4 10:33:54 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jun 2007 10:33:58 +0100 (BST) Received: from kuber.nabble.com ([216.139.236.158]:36582 "EHLO kuber.nabble.com") by ftp.linux-mips.org with ESMTP id S20021682AbXFDJdx (ORCPT ); Mon, 4 Jun 2007 10:33:53 +0100 Received: from isper.nabble.com ([192.168.236.156]) by kuber.nabble.com with esmtp (Exim 4.63) (envelope-from ) id 1Hv8td-0001da-PL for linux-mips@linux-mips.org; Mon, 04 Jun 2007 02:30:41 -0700 Message-ID: <10946448.post@talk.nabble.com> Date: Mon, 4 Jun 2007 02:30:41 -0700 (PDT) From: Daniel Laird To: linux-mips@linux-mips.org Subject: Adding 256MB support for PNX8550 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Nabble-From: daniel.j.laird@nxp.com Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15229 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: daniel.j.laird@nxp.com Precedence: bulk X-list: linux-mips The following patch allows for 256MB support on pnx8550 based systems: --- /include/asm-mips/mach-pnx8550/pci.h.orig +++ /include/asm-mips/mach-pnx8550/pci.h.new @@ -63,6 +63,7 @@ #define SIZE_32M 0x4 #define SIZE_64M 0x5 #define SIZE_128M 0x6 +#define SIZE_256M 0x7 #define PCI_SETUP_BASE18_SIZE(X) (X<<18) #define PCI_SETUP_BASE18_EN (1<<17) #define PCI_SETUP_BASE14_PREF (1<<16) Cheers Dan Laird -- View this message in context: http://www.nabble.com/Adding-256MB-support-for-PNX8550-tf3864000.html#a10946448 Sent from the linux-mips main mailing list archive at Nabble.com. From ralf@linux-mips.org Mon Jun 4 14:36:11 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jun 2007 14:36:13 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:33413 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20021982AbXFDNgL (ORCPT ); Mon, 4 Jun 2007 14:36:11 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l54DZqrP027577 for ; Mon, 4 Jun 2007 14:35:52 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l54DZpnD027576 for linux-mips@linux-mips.org; Mon, 4 Jun 2007 14:35:51 +0100 Date: Mon, 4 Jun 2007 14:35:51 +0100 From: Ralf Baechle To: linux-mips@linux-mips.org Subject: Mailing patches Message-ID: <20070604133551.GA24405@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15230 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips I've updated the wiki page on the mechanics of how to mail patches to cover more modern versions of thunderbird or similar: http://www.linux-mips.org/wiki/Mailing-patches I'm not a Thunderbird (or Evolution) user myself, so I'd appreciate proofreading and comments. Ralf From ralf@linux-mips.org Mon Jun 4 14:47:46 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jun 2007 14:47:48 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:27795 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022162AbXFDNrq (ORCPT ); Mon, 4 Jun 2007 14:47:46 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l54DlRhW027885 for ; Mon, 4 Jun 2007 14:47:27 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l54DlRZo027884 for linux-mips@linux-mips.org; Mon, 4 Jun 2007 14:47:27 +0100 Date: Mon, 4 Jun 2007 14:47:27 +0100 From: Ralf Baechle To: linux-mips@linux-mips.org Subject: Wiki vandalism & spam Message-ID: <20070604134727.GA27841@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15231 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Today the wiki was hit by another wave of vandalism. If you observe something like this please don't roll back the changes yourself just notify me. I have tools to efficiently cleanup that sort of incidents. Thanks, Ralf From ralf@linux-mips.org Mon Jun 4 15:34:23 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jun 2007 15:34:25 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:33465 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022410AbXFDOeX (ORCPT ); Mon, 4 Jun 2007 15:34:23 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l54EY3lB029470; Mon, 4 Jun 2007 15:34:03 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l54EY3qt029469; Mon, 4 Jun 2007 15:34:03 +0100 Date: Mon, 4 Jun 2007 15:34:03 +0100 From: Ralf Baechle To: Daniel Laird Cc: linux-mips@linux-mips.org Subject: Re: Adding more MIPS configuration for PNX8550 systems Message-ID: <20070604143403.GC24975@linux-mips.org> References: <10946489.post@talk.nabble.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <10946489.post@talk.nabble.com> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15232 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Mon, Jun 04, 2007 at 02:33:28AM -0700, Daniel Laird wrote: > The following patch allows for MIPS processor setup on pnx8550 systems This patch and the other patch you've posted add various definitions but don't add any user for them. Is this really the complete patch set? Also please add a Signed-off-by: line to each patch. Thanks, Ralf From anemo@mba.ocn.ne.jp Mon Jun 4 16:03:32 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jun 2007 16:03:34 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:44747 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20022410AbXFDPDc (ORCPT ); Mon, 4 Jun 2007 16:03:32 +0100 Received: from localhost (p3180-ipad201funabasi.chiba.ocn.ne.jp [222.146.66.180]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id C17B2A64F; Tue, 5 Jun 2007 00:02:09 +0900 (JST) Date: Tue, 05 Jun 2007 00:02:39 +0900 (JST) Message-Id: <20070605.000239.31638706.anemo@mba.ocn.ne.jp> To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: [PATCH] Unify watch.S and remove arch/mips/lib-{32,64} From: Atsushi Nemoto X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15233 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips Unify lib-{32,64}/watch.S into lib/watch.S and remove lib-{32,64} completely. The old 64-bit __watch_set() expected an physical address and the old 32-bit __watch_set() expected a KSEG0 virtual address. The new unified __watch_set() is based on the 64-bit one. Since there is no real user of the __watch_set(), this incompatibility would not cause any problem. Signed-off-by: Atsushi Nemoto --- This patch can be applied after "[PATCH] Unify dump_tlb". arch/mips/Makefile | 2 - arch/mips/lib-32/Makefile | 5 --- arch/mips/lib-32/watch.S | 60 ------------------------------------- arch/mips/lib-64/Makefile | 5 --- arch/mips/lib/Makefile | 2 +- arch/mips/{lib-64 => lib}/watch.S | 16 +++++----- 6 files changed, 9 insertions(+), 81 deletions(-) diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 2b19605..fdade85 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -633,8 +633,6 @@ CPPFLAGS_vmlinux.lds := \ head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o libs-y += arch/mips/lib/ -libs-$(CONFIG_32BIT) += arch/mips/lib-32/ -libs-$(CONFIG_64BIT) += arch/mips/lib-64/ core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/ diff --git a/arch/mips/lib-32/Makefile b/arch/mips/lib-32/Makefile deleted file mode 100644 index 7bae849..0000000 --- a/arch/mips/lib-32/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -# -# Makefile for MIPS-specific library files.. -# - -lib-y += watch.o diff --git a/arch/mips/lib-32/watch.S b/arch/mips/lib-32/watch.S deleted file mode 100644 index 808b3af..0000000 --- a/arch/mips/lib-32/watch.S +++ /dev/null @@ -1,60 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Kernel debug stuff to use the Watch registers. - * Useful to find stack overflows, dangling pointers etc. - * - * Copyright (C) 1995, 1996, 1999 by Ralf Baechle - */ -#include -#include -#include - - .set noreorder -/* - * Parameter: a0 - logic address to watch - * Currently only KSEG0 addresses are allowed! - * a1 - set bit #1 to trap on load references - * bit #0 to trap on store references - * Results : none - */ - LEAF(__watch_set) - li t0, 0x80000000 - subu a0, t0 - ori a0, 7 - xori a0, 7 - or a0, a1 - mtc0 a0, CP0_WATCHLO - sw a0, watch_savelo - - jr ra - mtc0 zero, CP0_WATCHHI - END(__watch_set) - -/* - * Parameter: none - * Results : none - */ - LEAF(__watch_clear) - jr ra - mtc0 zero, CP0_WATCHLO - END(__watch_clear) - -/* - * Parameter: none - * Results : none - */ - LEAF(__watch_reenable) - lw t0, watch_savelo - jr ra - mtc0 t0, CP0_WATCHLO - END(__watch_reenable) - -/* - * Saved value of the c0_watchlo register for watch_reenable() - */ - .data -watch_savelo: .word 0 - .text diff --git a/arch/mips/lib-64/Makefile b/arch/mips/lib-64/Makefile deleted file mode 100644 index 7bae849..0000000 --- a/arch/mips/lib-64/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -# -# Makefile for MIPS-specific library files.. -# - -lib-y += watch.o diff --git a/arch/mips/lib-64/watch.S b/arch/mips/lib-64/watch.S deleted file mode 100644 index f914340..0000000 --- a/arch/mips/lib-64/watch.S +++ /dev/null @@ -1,57 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Kernel debug stuff to use the Watch registers. - * Useful to find stack overflows, dangling pointers etc. - * - * Copyright (C) 1995, 1996, 1999, 2001 by Ralf Baechle - */ -#include -#include -#include - - .set noreorder -/* - * Parameter: a0 - physical address to watch - * a1 - set bit #1 to trap on load references - * bit #0 to trap on store references - * Results : none - */ - LEAF(__watch_set) - ori a0, 7 - xori a0, 7 - or a0, a1 - mtc0 a0, CP0_WATCHLO - sd a0, watch_savelo - dsrl32 a0, a0, 0 - - jr ra - mtc0 zero, CP0_WATCHHI - END(__watch_set) - -/* - * Parameter: none - * Results : none - */ - LEAF(__watch_clear) - jr ra - mtc0 zero, CP0_WATCHLO - END(__watch_clear) - -/* - * Parameter: none - * Results : none - */ - LEAF(__watch_reenable) - ld t0, watch_savelo - jr ra - mtc0 t0, CP0_WATCHLO - END(__watch_reenable) - -/* - * Saved value of the c0_watchlo register for watch_reenable() - */ - .local watch_savelo - .comm watch_savelo, 8, 8 diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile index b27a326..ccf0f2e 100644 --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile @@ -3,7 +3,7 @@ # lib-y += csum_partial.o memcpy.o memcpy-inatomic.o memset.o strlen_user.o \ - strncpy_user.o strnlen_user.o uncached.o + strncpy_user.o strnlen_user.o uncached.o watch.o obj-y += iomap.o obj-$(CONFIG_PCI) += iomap-pci.o diff --git a/arch/mips/lib/watch.S b/arch/mips/lib/watch.S new file mode 100644 index 0000000..591a73f --- /dev/null +++ b/arch/mips/lib/watch.S @@ -0,0 +1,57 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Kernel debug stuff to use the Watch registers. + * Useful to find stack overflows, dangling pointers etc. + * + * Copyright (C) 1995, 1996, 1999, 2001 by Ralf Baechle + */ +#include +#include +#include + + .set noreorder +/* + * Parameter: a0 - physical address to watch + * a1 - set bit #1 to trap on load references + * bit #0 to trap on store references + * Results : none + */ + LEAF(__watch_set) + ori a0, 7 + xori a0, 7 + or a0, a1 + MTC0 a0, CP0_WATCHLO + LONG_S a0, watch_savelo + + jr ra + mtc0 zero, CP0_WATCHHI + END(__watch_set) + +/* + * Parameter: none + * Results : none + */ + LEAF(__watch_clear) + jr ra + MTC0 zero, CP0_WATCHLO + END(__watch_clear) + +/* + * Parameter: none + * Results : none + */ + LEAF(__watch_reenable) + LONG_L t0, watch_savelo + jr ra + MTC0 t0, CP0_WATCHLO + END(__watch_reenable) + +/* + * Saved value of the c0_watchlo register for watch_reenable() + */ + .data +watch_savelo: LONG 0 + .text From ralf@linux-mips.org Mon Jun 4 16:11:11 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jun 2007 16:11:13 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:52106 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022453AbXFDPLL (ORCPT ); Mon, 4 Jun 2007 16:11:11 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l54FAnw6030351; Mon, 4 Jun 2007 16:10:49 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l54FAm90030350; Mon, 4 Jun 2007 16:10:48 +0100 Date: Mon, 4 Jun 2007 16:10:48 +0100 From: Ralf Baechle To: Atsushi Nemoto Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] Unify watch.S and remove arch/mips/lib-{32,64} Message-ID: <20070604151048.GA30128@linux-mips.org> References: <20070605.000239.31638706.anemo@mba.ocn.ne.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070605.000239.31638706.anemo@mba.ocn.ne.jp> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15234 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Tue, Jun 05, 2007 at 12:02:39AM +0900, Atsushi Nemoto wrote: > Unify lib-{32,64}/watch.S into lib/watch.S and remove lib-{32,64} > completely. > > The old 64-bit __watch_set() expected an physical address and the old > 32-bit __watch_set() expected a KSEG0 virtual address. The new > unified __watch_set() is based on the 64-bit one. Since there is no > real user of the __watch_set(), this incompatibility would not cause > any problem. I think we can simply drop the entire watchpoint support. This was only ever working on R4000/R4400 and even there only somewhat useful for kernel debugging. So if we ever use watchpoint support I think something needs to be developed from scratch. Ralf From sshtylyov@ru.mvista.com Mon Jun 4 16:14:56 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jun 2007 16:14:58 +0100 (BST) Received: from h155.mvista.com ([63.81.120.155]:804 "EHLO imap.sh.mvista.com") by ftp.linux-mips.org with ESMTP id S20022454AbXFDPO4 (ORCPT ); Mon, 4 Jun 2007 16:14:56 +0100 Received: from [192.168.1.248] (unknown [10.150.0.9]) by imap.sh.mvista.com (Postfix) with ESMTP id 08F803EC9; Mon, 4 Jun 2007 08:14:20 -0700 (PDT) Message-ID: <46642CA9.20103@ru.mvista.com> Date: Mon, 04 Jun 2007 19:15:53 +0400 From: Sergei Shtylyov Organization: MontaVista Software Inc. User-Agent: Mozilla/5.0 (X11; U; Linux i686; rv:1.7.2) Gecko/20040803 X-Accept-Language: ru, en-us, en-gb MIME-Version: 1.0 To: Ralf Baechle Cc: Atsushi Nemoto , linux-mips@linux-mips.org Subject: Re: [PATCH] Unify watch.S and remove arch/mips/lib-{32,64} References: <20070605.000239.31638706.anemo@mba.ocn.ne.jp> <20070604151048.GA30128@linux-mips.org> In-Reply-To: <20070604151048.GA30128@linux-mips.org> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15235 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sshtylyov@ru.mvista.com Precedence: bulk X-list: linux-mips Hello. Ralf Baechle wrote: >>Unify lib-{32,64}/watch.S into lib/watch.S and remove lib-{32,64} >>completely. >>The old 64-bit __watch_set() expected an physical address and the old >>32-bit __watch_set() expected a KSEG0 virtual address. The new >>unified __watch_set() is based on the 64-bit one. Since there is no >>real user of the __watch_set(), this incompatibility would not cause >>any problem. > I think we can simply drop the entire watchpoint support. This was > only ever working on R4000/R4400 and even there only somewhat useful > for kernel debugging. So if we ever use watchpoint support I think > something needs to be developed from scratch. Watchpoints *could* be supported as part of KGDB, BTW. > Ralf WBR, Sergei From macro@linux-mips.org Mon Jun 4 16:24:06 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jun 2007 16:24:08 +0100 (BST) Received: from pollux.ds.pg.gda.pl ([153.19.208.7]:3078 "EHLO pollux.ds.pg.gda.pl") by ftp.linux-mips.org with ESMTP id S20022453AbXFDPYG (ORCPT ); Mon, 4 Jun 2007 16:24:06 +0100 Received: from localhost (localhost [127.0.0.1]) by pollux.ds.pg.gda.pl (Postfix) with ESMTP id DC3A8E1CF5; Mon, 4 Jun 2007 17:23:21 +0200 (CEST) X-Virus-Scanned: by amavisd-new at pollux.ds.pg.gda.pl Received: from pollux.ds.pg.gda.pl ([127.0.0.1]) by localhost (pollux.ds.pg.gda.pl [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Zldui7yqERii; Mon, 4 Jun 2007 17:23:21 +0200 (CEST) Received: from piorun.ds.pg.gda.pl (piorun.ds.pg.gda.pl [153.19.208.8]) by pollux.ds.pg.gda.pl (Postfix) with ESMTP id 6790AE1C69; Mon, 4 Jun 2007 17:23:21 +0200 (CEST) Received: from blysk.ds.pg.gda.pl (macro@blysk.ds.pg.gda.pl [153.19.208.6]) by piorun.ds.pg.gda.pl (8.13.8/8.13.8) with ESMTP id l54FNXx7005550; Mon, 4 Jun 2007 17:23:33 +0200 Date: Mon, 4 Jun 2007 16:23:29 +0100 (BST) From: "Maciej W. Rozycki" To: Ralf Baechle cc: Atsushi Nemoto , linux-mips@linux-mips.org Subject: Re: [PATCH] Unify watch.S and remove arch/mips/lib-{32,64} In-Reply-To: <20070604151048.GA30128@linux-mips.org> Message-ID: References: <20070605.000239.31638706.anemo@mba.ocn.ne.jp> <20070604151048.GA30128@linux-mips.org> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Virus-Scanned: ClamAV 0.90.3/3348/Mon Jun 4 12:51:57 2007 on piorun.ds.pg.gda.pl X-Virus-Status: Clean Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15236 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@linux-mips.org Precedence: bulk X-list: linux-mips On Mon, 4 Jun 2007, Ralf Baechle wrote: > I think we can simply drop the entire watchpoint support. This was > only ever working on R4000/R4400 and even there only somewhat useful > for kernel debugging. So if we ever use watchpoint support I think > something needs to be developed from scratch. A long-term plan is to make them available to userland through ptrace() in a uniform way covering MIPS32/64 watchpoints as well for gdb and suchlike. Maciej From vagabon.xyz@gmail.com Mon Jun 4 16:41:22 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jun 2007 16:41:24 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.173]:48393 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S20022447AbXFDPlW (ORCPT ); Mon, 4 Jun 2007 16:41:22 +0100 Received: by ug-out-1314.google.com with SMTP id m3so851211ugc for ; Mon, 04 Jun 2007 08:41:17 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=SvUDyLdb3bhb+ejrdlm7VUkQw4on458otsWyAIZgJEnhUeQRUOl7PLY4QCBD+KEexe/RLOLDMAkzs8ZxSVCS9/2FTz7gGsPVUkmBOmBAcyB2H7UpqBFEe034FDBxLddBHxnRy/k7cu/ifPZeZI3CFpjMOseDX3GbZaDZ2Mcj39A= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=A5WlfWj8Vj2phvZ77KRXFOnkay29PGaxdxxKSl2gLLcfrUd4uHqRBEcbUFDIQu5jU8WBvTqDKNLJDKsAS+18xizAxYJcIP1GpvMFVzhMnWh1ud/dNN6Snc9SHwFLEAa05Xx8uN57sB46rw/7wjeMdyfmOaKfyCOg6NORnjWGbGI= Received: by 10.67.28.2 with SMTP id f2mr3171595ugj.1180971677922; Mon, 04 Jun 2007 08:41:17 -0700 (PDT) Received: from spoutnik.innova-card.com ( [81.252.61.1]) by mx.google.com with ESMTP id z33sm1053080ikz.2007.06.04.08.41.16; Mon, 04 Jun 2007 08:41:17 -0700 (PDT) Received: by spoutnik.innova-card.com (Postfix, from userid 500) id 1540D23F76A; Mon, 4 Jun 2007 17:46:36 +0200 (CEST) To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org Subject: [PATCH 2/5] Clean up asm-mips/mach-generic/spaces.h Date: Mon, 4 Jun 2007 17:46:32 +0200 Message-Id: <118097199516-git-send-email-fbuihuu@gmail.com> X-Mailer: git-send-email 1.5.1.4 In-Reply-To: <1180971995757-git-send-email-fbuihuu@gmail.com> References: <1180971995757-git-send-email-fbuihuu@gmail.com> From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15237 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips From: Franck Bui-Huu PAGE_OFFSET definition is now using CAC_BASE by default. This patch also reorder some macros to make them appear in the same order for both 32 and 64 bits configs. It also makes use of const.h generic header file to annotate constants. Signed-off-by: Franck Bui-Huu --- include/asm-mips/mach-generic/spaces.h | 66 +++++++++++++------------------ 1 files changed, 28 insertions(+), 38 deletions(-) diff --git a/include/asm-mips/mach-generic/spaces.h b/include/asm-mips/mach-generic/spaces.h index 9a3c521..c90900b 100644 --- a/include/asm-mips/mach-generic/spaces.h +++ b/include/asm-mips/mach-generic/spaces.h @@ -10,74 +10,56 @@ #ifndef _ASM_MACH_GENERIC_SPACES_H #define _ASM_MACH_GENERIC_SPACES_H +#include #ifdef CONFIG_32BIT -#define CAC_BASE 0x80000000 -#define IO_BASE 0xa0000000 -#define UNCAC_BASE 0xa0000000 +#define CAC_BASE _AC(0x80000000,UL) +#define IO_BASE _AC(0xa0000000,UL) +#define UNCAC_BASE _AC(0xa0000000,UL) #ifndef MAP_BASE -#define MAP_BASE 0xc0000000 -#endif - -/* - * This handles the memory map. - * We handle pages at KSEG0 for kernels with 32 bit address space. - */ -#ifndef PAGE_OFFSET -#define PAGE_OFFSET 0x80000000UL +#define MAP_BASE _AC(0xc0000000,UL) #endif /* * Memory above this physical address will be considered highmem. */ #ifndef HIGHMEM_START -#define HIGHMEM_START 0x20000000UL +#define HIGHMEM_START _AC(0x20000000,UL) #endif #endif /* CONFIG_32BIT */ #ifdef CONFIG_64BIT -/* - * This handles the memory map. - */ -#ifndef PAGE_OFFSET -#ifdef CONFIG_DMA_NONCOHERENT -#define PAGE_OFFSET 0x9800000000000000UL -#else -#define PAGE_OFFSET 0xa800000000000000UL -#endif -#endif - -/* - * Memory above this physical address will be considered highmem. - * Fixme: 59 bits is a fictive number and makes assumptions about processors - * in the distant future. Nobody will care for a few years :-) - */ -#ifndef HIGHMEM_START -#define HIGHMEM_START (1UL << 59UL) -#endif - #ifndef CAC_BASE #ifdef CONFIG_DMA_NONCOHERENT -#define CAC_BASE 0x9800000000000000UL +#define CAC_BASE _AC(0x9800000000000000,UL) #else -#define CAC_BASE 0xa800000000000000UL +#define CAC_BASE _AC(0xa800000000000000,UL) #endif #endif #ifndef IO_BASE -#define IO_BASE 0x9000000000000000UL +#define IO_BASE _AC(0x9000000000000000,UL) #endif #ifndef UNCAC_BASE -#define UNCAC_BASE 0x9000000000000000UL +#define UNCAC_BASE _AC(0x9000000000000000,UL) #endif #ifndef MAP_BASE -#define MAP_BASE 0xc000000000000000UL +#define MAP_BASE _AC(0xc000000000000000,UL) +#endif + +/* + * Memory above this physical address will be considered highmem. + * Fixme: 59 bits is a fictive number and makes assumptions about processors + * in the distant future. Nobody will care for a few years :-) + */ +#ifndef HIGHMEM_START +#define HIGHMEM_START (_AC(1,UL) << _AC(59,UL)) #endif #define TO_PHYS(x) ( ((x) & TO_PHYS_MASK)) @@ -86,4 +68,12 @@ #endif /* CONFIG_64BIT */ +/* + * This handles the memory map. + */ +#ifndef PAGE_OFFSET +#define PAGE_OFFSET CAC_BASE +#endif + + #endif /* __ASM_MACH_GENERIC_SPACES_H */ -- 1.5.1.4 From vagabon.xyz@gmail.com Mon Jun 4 16:41:45 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jun 2007 16:41:48 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.169]:40713 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S20022482AbXFDPlW (ORCPT ); Mon, 4 Jun 2007 16:41:22 +0100 Received: by ug-out-1314.google.com with SMTP id m3so851223ugc for ; Mon, 04 Jun 2007 08:41:19 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=QMGkxkHMUIpZHAiWDKGFh20V8GNkxvoKr0C3EAivookPQjm6A7DiE1lrRhU5ss0bEGyIS/D60NVj5v9GkRbVIK9mFQcGUPD0D1Ihu/Kmrie60IH3wpMl7He+Wjr5hoKRkA0LDSrjIcswh5/a/0q6pGNnzO2O4EEa7jFKPxqcP8w= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=eDL0ZqpmP8Q+jeH75k6YY95ZKr1UdVtpAtVD2I//Nop1ChUQGp95LQt9+5p3MpLyuxudHjuOJjCN3lpro70VOCEjSW6F35IyI8Xinowj750Uk9ileE/3TiuiSA7NnuQmzGSCsAQ1zq+fh9b0Y3eT6wJcn5pkzIrubuSKEZGuthw= Received: by 10.67.100.17 with SMTP id c17mr3214079ugm.1180971679374; Mon, 04 Jun 2007 08:41:19 -0700 (PDT) Received: from spoutnik.innova-card.com ( [81.252.61.1]) by mx.google.com with ESMTP id y37sm1095907iky.2007.06.04.08.41.16; Mon, 04 Jun 2007 08:41:17 -0700 (PDT) Received: by spoutnik.innova-card.com (Postfix, from userid 500) id 4063E23F770; Mon, 4 Jun 2007 17:46:35 +0200 (CEST) To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org Subject: [PATCH 1/5] Allow generic spaces.h to be included by platform specific ones Date: Mon, 4 Jun 2007 17:46:31 +0200 Message-Id: <11809719951783-git-send-email-fbuihuu@gmail.com> X-Mailer: git-send-email 1.5.1.4 In-Reply-To: <1180971995757-git-send-email-fbuihuu@gmail.com> References: <1180971995757-git-send-email-fbuihuu@gmail.com> From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15238 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips From: Franck Bui-Huu Before this patch, when a platform needed to customize one constant in spaces.h, they need to redefine all of them. Now they can just redefine one constant and include the generic file header at the end: #include This patch doesn't allow to redefine CAC_BASE, IO_BASE and UNCAC_BASE for 32 bits platforms because there's no need to do so. This will avoid some macro duplications. It's important specially if we'll add complex macros. Signed-off-by: Franck Bui-Huu --- include/asm-mips/mach-generic/spaces.h | 18 ++++++++++++++++ include/asm-mips/mach-ip22/spaces.h | 33 ++-------------------------- include/asm-mips/mach-ip27/spaces.h | 9 +------ include/asm-mips/mach-ip32/spaces.h | 36 -------------------------------- 4 files changed, 23 insertions(+), 73 deletions(-) delete mode 100644 include/asm-mips/mach-ip32/spaces.h diff --git a/include/asm-mips/mach-generic/spaces.h b/include/asm-mips/mach-generic/spaces.h index 0ae9997..9a3c521 100644 --- a/include/asm-mips/mach-generic/spaces.h +++ b/include/asm-mips/mach-generic/spaces.h @@ -16,13 +16,18 @@ #define CAC_BASE 0x80000000 #define IO_BASE 0xa0000000 #define UNCAC_BASE 0xa0000000 + +#ifndef MAP_BASE #define MAP_BASE 0xc0000000 +#endif /* * This handles the memory map. * We handle pages at KSEG0 for kernels with 32 bit address space. */ +#ifndef PAGE_OFFSET #define PAGE_OFFSET 0x80000000UL +#endif /* * Memory above this physical address will be considered highmem. @@ -38,11 +43,13 @@ /* * This handles the memory map. */ +#ifndef PAGE_OFFSET #ifdef CONFIG_DMA_NONCOHERENT #define PAGE_OFFSET 0x9800000000000000UL #else #define PAGE_OFFSET 0xa800000000000000UL #endif +#endif /* * Memory above this physical address will be considered highmem. @@ -53,14 +60,25 @@ #define HIGHMEM_START (1UL << 59UL) #endif +#ifndef CAC_BASE #ifdef CONFIG_DMA_NONCOHERENT #define CAC_BASE 0x9800000000000000UL #else #define CAC_BASE 0xa800000000000000UL #endif +#endif + +#ifndef IO_BASE #define IO_BASE 0x9000000000000000UL +#endif + +#ifndef UNCAC_BASE #define UNCAC_BASE 0x9000000000000000UL +#endif + +#ifndef MAP_BASE #define MAP_BASE 0xc000000000000000UL +#endif #define TO_PHYS(x) ( ((x) & TO_PHYS_MASK)) #define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK)) diff --git a/include/asm-mips/mach-ip22/spaces.h b/include/asm-mips/mach-ip22/spaces.h index ab20c02..7f9fa6f 100644 --- a/include/asm-mips/mach-ip22/spaces.h +++ b/include/asm-mips/mach-ip22/spaces.h @@ -11,44 +11,17 @@ #define _ASM_MACH_IP22_SPACES_H -#ifdef CONFIG_32BIT - -#define CAC_BASE 0x80000000 -#define IO_BASE 0xa0000000 -#define UNCAC_BASE 0xa0000000 -#define MAP_BASE 0xc0000000 - -/* - * This handles the memory map. - * We handle pages at KSEG0 for kernels with 32 bit address space. - */ -#define PAGE_OFFSET 0x80000000UL - -/* - * Memory above this physical address will be considered highmem. - */ -#ifndef HIGHMEM_START -#define HIGHMEM_START 0x20000000UL -#endif - -#endif /* CONFIG_32BIT */ - #ifdef CONFIG_64BIT -#define PAGE_OFFSET 0xffffffff80000000UL -#ifndef HIGHMEM_START -#define HIGHMEM_START (1UL << 59UL) -#endif +#define PAGE_OFFSET 0xffffffff80000000UL #define CAC_BASE 0xffffffff80000000 #define IO_BASE 0xffffffffa0000000 #define UNCAC_BASE 0xffffffffa0000000 #define MAP_BASE 0xc000000000000000 -#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK)) -#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK)) -#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK)) - #endif /* CONFIG_64BIT */ +#include + #endif /* __ASM_MACH_IP22_SPACES_H */ diff --git a/include/asm-mips/mach-ip27/spaces.h b/include/asm-mips/mach-ip27/spaces.h index 45e6178..b18802a 100644 --- a/include/asm-mips/mach-ip27/spaces.h +++ b/include/asm-mips/mach-ip27/spaces.h @@ -14,22 +14,17 @@ * IP27 uses the R10000's uncached attribute feature. Attribute 3 selects * uncached memory addressing. */ -#define CAC_BASE 0xa800000000000000 #define HSPEC_BASE 0x9000000000000000 #define IO_BASE 0x9200000000000000 #define MSPEC_BASE 0x9400000000000000 #define UNCAC_BASE 0x9600000000000000 -#define MAP_BASE 0xc000000000000000 -#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK)) -#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK)) -#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK)) #define TO_MSPEC(x) (MSPEC_BASE | ((x) & TO_PHYS_MASK)) #define TO_HSPEC(x) (HSPEC_BASE | ((x) & TO_PHYS_MASK)) -#define PAGE_OFFSET CAC_BASE - #define HIGHMEM_START (~0UL) +#include + #endif /* _ASM_MACH_IP27_SPACES_H */ diff --git a/include/asm-mips/mach-ip32/spaces.h b/include/asm-mips/mach-ip32/spaces.h deleted file mode 100644 index 44abe5c..0000000 --- a/include/asm-mips/mach-ip32/spaces.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1994 - 1999, 2000, 03, 04, 05 Ralf Baechle (ralf@linux-mips.org) - * Copyright (C) 2000, 2002 Maciej W. Rozycki - * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc. - */ -#ifndef _ASM_MACH_IP32_SPACES_H -#define _ASM_MACH_IP32_SPACES_H - -/* - * Memory above this physical address will be considered highmem. - * Fixme: 59 bits is a fictive number and makes assumptions about processors - * in the distant future. Nobody will care for a few years :-) - */ -#ifndef HIGHMEM_START -#define HIGHMEM_START (1UL << 59UL) -#endif - -#define CAC_BASE 0x9800000000000000UL -#define IO_BASE 0x9000000000000000UL -#define UNCAC_BASE 0x9000000000000000UL -#define MAP_BASE 0xc000000000000000UL - -#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK)) -#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK)) -#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK)) - -/* - * This handles the memory map. - */ -#define PAGE_OFFSET CAC_BASE - -#endif /* __ASM_MACH_IP32_SPACES_H */ -- 1.5.1.4 From vagabon.xyz@gmail.com Mon Jun 4 16:42:09 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jun 2007 16:42:12 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.168]:47880 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S20022488AbXFDPlW (ORCPT ); Mon, 4 Jun 2007 16:41:22 +0100 Received: by ug-out-1314.google.com with SMTP id m3so851221ugc for ; Mon, 04 Jun 2007 08:41:19 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:received:to:cc:subject:date:message-id:x-mailer:from; b=DRUCGnWCke8lzP25Y+q99evcQ68CphuHF5Fuqxjr5WFnVZM/HdbDs5JOS1K4zCVcU06RwY+WsOvRUjycq2h68yvmXH3YlRj75f81RsCFBKg9vwALsM2TTFLnuBiVFUkSBtfh9t3Kwuuq23OKzcEYWdRtdFFt2r+5jd03kuhYskY= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:to:cc:subject:date:message-id:x-mailer:from; b=qndoaH41cOur+1qjrlsLBHvYKSNy89kR5PW0M2wKCXi/znChgPJfjyBDqu6BtzjQELiwvpCdv58XmDb3nGQiH0Z7oyL1SxvZ3VkP4OY+c8YHqFf/1RQeKmnAiUlck+K8KtJuJKUGGi3m5fkwQ9ou/Fa9r8DzdNv07L0M7qgdMug= Received: by 10.67.27.3 with SMTP id e3mr3173228ugj.1180971679118; Mon, 04 Jun 2007 08:41:19 -0700 (PDT) Received: from spoutnik.innova-card.com ( [81.252.61.1]) by mx.google.com with ESMTP id y34sm1086780iky.2007.06.04.08.41.16; Mon, 04 Jun 2007 08:41:17 -0700 (PDT) Received: by spoutnik.innova-card.com (Postfix, from userid 500) id D2F5923F76E; Mon, 4 Jun 2007 17:46:35 +0200 (CEST) To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org Subject: [PATCH 0/5] PHYS_OFFSET fix and cleanup [take #2] Date: Mon, 4 Jun 2007 17:46:30 +0200 Message-Id: <1180971995757-git-send-email-fbuihuu@gmail.com> X-Mailer: git-send-email 1.5.1.4 From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15239 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips Hi Ralf, This patchset is an updated version of the following one: http://marc.info/?l=linux-mips&m=117499082903803&w=2 http://marc.info/?l=linux-mips&m=117499090603935&w=2 http://marc.info/?l=linux-mips&m=117499083003809&w=2 http://marc.info/?l=linux-mips&m=117499086003851&w=2 http://marc.info/?l=linux-mips&m=117499088403902&w=2 It builds on ip-{22,27,32} now and have more clean up for spaces.h. Please consider, Franck From vagabon.xyz@gmail.com Mon Jun 4 16:42:33 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jun 2007 16:42:37 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.175]:43016 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S20022456AbXFDPlW (ORCPT ); Mon, 4 Jun 2007 16:41:22 +0100 Received: by ug-out-1314.google.com with SMTP id m3so851218ugc for ; Mon, 04 Jun 2007 08:41:18 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=BU6IQqOuNpzSlmX6eHWwkWgaU5iaV6bL7U5D6vsQAQgqiv5lYJHUaV6lX4EvApuMAbPSDZerhUCcOcMdNVOKHNRZN+2Tba2bVw2wP8YRc30KRn50O7ua0h7Qiob+QKllDtkFWkLA/li4rA/tHD/A7m4DWQHGAnFulvdcWF0kHcE= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=T0Gn/1PBCW1jx91tcTIxjr2Pbs/cLNiJeFG2B0vRC4gV9li5vCKHMHubqPWBgX4hg5pa0PLpAL33u2OZewO3Ljb8E3brqLqbGdZd5bgQUo17AuIbkvyr3sBhynAVAv9Ab6g/r9ytOUk8QO3ndkxTX0OFlBTMoBET5jMP8s2ZOwQ= Received: by 10.66.243.2 with SMTP id q2mr3204030ugh.1180971678846; Mon, 04 Jun 2007 08:41:18 -0700 (PDT) Received: from spoutnik.innova-card.com ( [81.252.61.1]) by mx.google.com with ESMTP id b33sm1072116ika.2007.06.04.08.41.16; Mon, 04 Jun 2007 08:41:17 -0700 (PDT) Received: by spoutnik.innova-card.com (Postfix, from userid 500) id 6A5AF23F76F; Mon, 4 Jun 2007 17:46:36 +0200 (CEST) To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org Subject: [PATCH 4/5] Move PHY_OFFSET definition in spaces.h Date: Mon, 4 Jun 2007 17:46:34 +0200 Message-Id: <11809719961788-git-send-email-fbuihuu@gmail.com> X-Mailer: git-send-email 1.5.1.4 In-Reply-To: <1180971995757-git-send-email-fbuihuu@gmail.com> References: <1180971995757-git-send-email-fbuihuu@gmail.com> From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15240 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips From: Franck Bui-Huu Signed-off-by: Franck Bui-Huu --- include/asm-mips/mach-generic/spaces.h | 7 +++++++ include/asm-mips/page.h | 11 ++--------- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/include/asm-mips/mach-generic/spaces.h b/include/asm-mips/mach-generic/spaces.h index 96c8971..8ca3d70 100644 --- a/include/asm-mips/mach-generic/spaces.h +++ b/include/asm-mips/mach-generic/spaces.h @@ -12,6 +12,13 @@ #include +/* + * This gives the physical RAM offset. + */ +#ifndef PHYS_OFFSET +#define PHYS_OFFSET _AC(0,UL) +#endif + #ifdef CONFIG_32BIT #define CAC_BASE _AC(0x80000000,UL) diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h index 5c3239d..09c60d5 100644 --- a/include/asm-mips/page.h +++ b/include/asm-mips/page.h @@ -34,12 +34,8 @@ #ifndef __ASSEMBLY__ -/* - * This gives the physical RAM offset. - */ -#ifndef PHYS_OFFSET -#define PHYS_OFFSET 0UL -#endif +#include +#include /* * It's normally defined only for FLATMEM config but it's @@ -48,9 +44,6 @@ */ #define ARCH_PFN_OFFSET PFN_UP(PHYS_OFFSET) -#include -#include - extern void clear_page(void * page); extern void copy_page(void * to, void * from); -- 1.5.1.4 From ralf@linux-mips.org Mon Jun 4 16:42:57 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jun 2007 16:43:01 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:42718 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022483AbXFDPl5 (ORCPT ); Mon, 4 Jun 2007 16:41:57 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l54FfalG030940; Mon, 4 Jun 2007 16:41:36 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l54FfaBF030939; Mon, 4 Jun 2007 16:41:36 +0100 Date: Mon, 4 Jun 2007 16:41:36 +0100 From: Ralf Baechle To: "Maciej W. Rozycki" Cc: Atsushi Nemoto , linux-mips@linux-mips.org Subject: Re: [PATCH] Unify watch.S and remove arch/mips/lib-{32,64} Message-ID: <20070604154135.GA30296@linux-mips.org> References: <20070605.000239.31638706.anemo@mba.ocn.ne.jp> <20070604151048.GA30128@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15241 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Mon, Jun 04, 2007 at 04:23:29PM +0100, Maciej W. Rozycki wrote: > > I think we can simply drop the entire watchpoint support. This was > > only ever working on R4000/R4400 and even there only somewhat useful > > for kernel debugging. So if we ever use watchpoint support I think > > something needs to be developed from scratch. > > A long-term plan is to make them available to userland through ptrace() > in a uniform way covering MIPS32/64 watchpoints as well for gdb and > suchlike. Sure, one of infinitly many things on the to do list. However the code we currently havee isn't very useful for that purpose. For maintenance sake it should rather be rewritten in C and it needs to learn about processors of the post R4400 era. Ralf From vagabon.xyz@gmail.com Mon Jun 4 16:43:21 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jun 2007 16:43:24 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.172]:56334 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S20022491AbXFDPmU (ORCPT ); Mon, 4 Jun 2007 16:42:20 +0100 Received: by ug-out-1314.google.com with SMTP id m3so851214ugc for ; Mon, 04 Jun 2007 08:41:18 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=NjPQKiYGHry3KqoXYyoWgMeelk67gIZJ1PtmX9wx75+icnY1X1OCpF4HMNHUC+V0K8Sr4RQ9SMnHyJ1kdg7Q49RCsm5KnSziW9cryyQ2dYwSZnhl75sD2zDY62Q+Jncg62NND6i8oXDjAPpMIJN71sS9rNfEo5a0O2HZeK3wo2A= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=VUwbJ1GKYr9Sfh6xNACSlMfEZk6ACL0u7t2GkWSdf85Z7WKHmU+FYv5ZDXIuGn7eVsQbc4khgKgCGHUv2qDwnXOH040wKs8//wakULV4+ygIuhetr/kLGxfQy/TDJwGQTD9TZJnGnCmnm3PbWm6yYo6haMIFKUNJ9dqH83jkNwI= Received: by 10.67.19.13 with SMTP id w13mr3212659ugi.1180971678518; Mon, 04 Jun 2007 08:41:18 -0700 (PDT) Received: from spoutnik.innova-card.com ( [81.252.61.1]) by mx.google.com with ESMTP id b33sm1072117ika.2007.06.04.08.41.16; Mon, 04 Jun 2007 08:41:17 -0700 (PDT) Received: by spoutnik.innova-card.com (Postfix, from userid 500) id 76FF723F773; Mon, 4 Jun 2007 17:46:36 +0200 (CEST) To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org Subject: [PATCH 3/5] Make PAGE_OFFSET aware of PHYS_OFFSET Date: Mon, 4 Jun 2007 17:46:33 +0200 Message-Id: <1180971996831-git-send-email-fbuihuu@gmail.com> X-Mailer: git-send-email 1.5.1.4 In-Reply-To: <1180971995757-git-send-email-fbuihuu@gmail.com> References: <1180971995757-git-send-email-fbuihuu@gmail.com> From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15242 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips From: Franck Bui-Huu For platforms that use PHYS_OFFSET and do not use a mapped kernel, this patch automatically adds PHYS_OFFSET into PAGE_OFFSET. Therefore there are no more needs for them to redefine PAGE_OFFSET. For mapped kernel, they need to redefine PAGE_OFFSET anyways. Signed-off-by: Franck Bui-Huu --- include/asm-mips/mach-generic/spaces.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/asm-mips/mach-generic/spaces.h b/include/asm-mips/mach-generic/spaces.h index c90900b..96c8971 100644 --- a/include/asm-mips/mach-generic/spaces.h +++ b/include/asm-mips/mach-generic/spaces.h @@ -72,7 +72,7 @@ * This handles the memory map. */ #ifndef PAGE_OFFSET -#define PAGE_OFFSET CAC_BASE +#define PAGE_OFFSET (CAC_BASE + PHYS_OFFSET) #endif -- 1.5.1.4 From vagabon.xyz@gmail.com Mon Jun 4 16:43:45 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jun 2007 16:43:48 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.169]:25359 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S20022524AbXFDPmV (ORCPT ); Mon, 4 Jun 2007 16:42:21 +0100 Received: by ug-out-1314.google.com with SMTP id m3so851234ugc for ; Mon, 04 Jun 2007 08:41:20 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=szTJG0icWA/dOFQHlzBC7v1Bw2DvRPsBWHeEqOObXJIt7sEiiCH8+eh+qPxfUwVaPJt5bSzQo1rJRz6OaYtnTby84uVOuHfno+ZU77HxAjyXMhG/TCdhFLKNQCar/8X8ZjFoTxaCE4fqu0J0ittJR5dITGsYiyQaJ69UWTLmgOc= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=CvJ+4yH1ZedFC7eQD8+3Sm4rWuRzJjvYMmF05i1IBJCor6w1YWt4DYc4UGru7pzOJzeinyMfFifNf8QS4pTlTjwVVOYdZKw/541CH5nTMuMqYKoDUitk5vu+mXxRLs8ENJwjrYSspNMEiwg+v0LyqcwutWaPiXVPL6a4ywTuv3U= Received: by 10.67.22.14 with SMTP id z14mr3185186ugi.1180971680504; Mon, 04 Jun 2007 08:41:20 -0700 (PDT) Received: from spoutnik.innova-card.com ( [81.252.61.1]) by mx.google.com with ESMTP id z33sm1053147ikz.2007.06.04.08.41.19; Mon, 04 Jun 2007 08:41:19 -0700 (PDT) Received: by spoutnik.innova-card.com (Postfix, from userid 500) id B0E7923F774; Mon, 4 Jun 2007 17:46:36 +0200 (CEST) To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org Subject: [PATCH 5/5] Fix PHYS_OFFSET for 64-bits kernels with 32-bits symbols Date: Mon, 4 Jun 2007 17:46:35 +0200 Message-Id: <11809719962417-git-send-email-fbuihuu@gmail.com> X-Mailer: git-send-email 1.5.1.4 In-Reply-To: <1180971995757-git-send-email-fbuihuu@gmail.com> References: <1180971995757-git-send-email-fbuihuu@gmail.com> From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15243 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips From: Franck Bui-Huu The current implementation of __pa() for 64-bits kernels with 32-bits symbols is broken. In this configuration, we need 2 values for PAGE_OFFSET, one in XKPHYS and the other in CKSEG0 space. When the value in CKSEG0 space is used, it doesn't take into account of PHYS_OFFSET. Even worse we can't redefine this value. The patch restores CPHYSADDR() but in __pa()'s implementation because it removes the need of 2 PAGE_OFFSET. OTOH, CPHYSADDR() is quite bad when dealing with mapped kernels. So this patch assumes there's no need to deal with such kernel in 64-bits world. Signed-off-by: Franck Bui-Huu --- include/asm-mips/page.h | 10 +++++++--- 1 files changed, 7 insertions(+), 3 deletions(-) diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h index 09c60d5..b92dd8c 100644 --- a/include/asm-mips/page.h +++ b/include/asm-mips/page.h @@ -143,11 +143,15 @@ typedef struct { unsigned long pgprot; } pgprot_t; * __pa()/__va() should be used only during mem init. */ #if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64) -#define __pa_page_offset(x) ((unsigned long)(x) < CKSEG0 ? PAGE_OFFSET : CKSEG0) +#define __pa(x) \ +({ \ + unsigned long __x = (unsigned long)(x); \ + __x < CKSEG0 ? XPHYSADDR(__x) : CPHYSADDR(__x); \ +}) #else -#define __pa_page_offset(x) PAGE_OFFSET +#define __pa(x) \ + ((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET) #endif -#define __pa(x) ((unsigned long)(x) - __pa_page_offset(x) + PHYS_OFFSET) #define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET)) #define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x),0)) -- 1.5.1.4 From anemo@mba.ocn.ne.jp Mon Jun 4 17:27:42 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jun 2007 17:27:44 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:52717 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20022521AbXFDQ1m (ORCPT ); Mon, 4 Jun 2007 17:27:42 +0100 Received: from localhost (p3180-ipad201funabasi.chiba.ocn.ne.jp [222.146.66.180]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 0AF0F97CB; Tue, 5 Jun 2007 01:27:38 +0900 (JST) Date: Tue, 05 Jun 2007 01:28:07 +0900 (JST) Message-Id: <20070605.012807.112854731.anemo@mba.ocn.ne.jp> To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] Unify watch.S and remove arch/mips/lib-{32,64} From: Atsushi Nemoto In-Reply-To: <20070604151048.GA30128@linux-mips.org> References: <20070605.000239.31638706.anemo@mba.ocn.ne.jp> <20070604151048.GA30128@linux-mips.org> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15244 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Mon, 4 Jun 2007 16:10:48 +0100, Ralf Baechle wrote: > I think we can simply drop the entire watchpoint support. This was > only ever working on R4000/R4400 and even there only somewhat useful > for kernel debugging. So if we ever use watchpoint support I think > something needs to be developed from scratch. OK, then this is an alternative patch to drop them. Subject: [PATCH] Remove unused watchpoint support and arch/mips/lib-{32,64} Signed-off-by: Atsushi Nemoto --- This patch can be applied after "[PATCH] Unify dump_tlb". arch/mips/Makefile | 2 - arch/mips/kernel/proc.c | 1 - arch/mips/kernel/traps.c | 1 - arch/mips/lib-32/Makefile | 5 --- arch/mips/lib-32/watch.S | 60 --------------------------------------------- arch/mips/lib-64/Makefile | 5 --- arch/mips/lib-64/watch.S | 57 ------------------------------------------ include/asm-mips/watch.h | 35 -------------------------- 8 files changed, 0 insertions(+), 166 deletions(-) diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 2b19605..fdade85 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -633,8 +633,6 @@ CPPFLAGS_vmlinux.lds := \ head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o libs-y += arch/mips/lib/ -libs-$(CONFIG_32BIT) += arch/mips/lib-32/ -libs-$(CONFIG_64BIT) += arch/mips/lib-64/ core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/ diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 5ddc2e9..eb7730d 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -14,7 +14,6 @@ #include #include #include -#include unsigned int vced_count, vcei_count; diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index a7a17eb..5de0734 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -39,7 +39,6 @@ #include #include #include -#include #include #include diff --git a/arch/mips/lib-32/Makefile b/arch/mips/lib-32/Makefile deleted file mode 100644 index 7bae849..0000000 --- a/arch/mips/lib-32/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -# -# Makefile for MIPS-specific library files.. -# - -lib-y += watch.o diff --git a/arch/mips/lib-32/watch.S b/arch/mips/lib-32/watch.S deleted file mode 100644 index 808b3af..0000000 --- a/arch/mips/lib-32/watch.S +++ /dev/null @@ -1,60 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Kernel debug stuff to use the Watch registers. - * Useful to find stack overflows, dangling pointers etc. - * - * Copyright (C) 1995, 1996, 1999 by Ralf Baechle - */ -#include -#include -#include - - .set noreorder -/* - * Parameter: a0 - logic address to watch - * Currently only KSEG0 addresses are allowed! - * a1 - set bit #1 to trap on load references - * bit #0 to trap on store references - * Results : none - */ - LEAF(__watch_set) - li t0, 0x80000000 - subu a0, t0 - ori a0, 7 - xori a0, 7 - or a0, a1 - mtc0 a0, CP0_WATCHLO - sw a0, watch_savelo - - jr ra - mtc0 zero, CP0_WATCHHI - END(__watch_set) - -/* - * Parameter: none - * Results : none - */ - LEAF(__watch_clear) - jr ra - mtc0 zero, CP0_WATCHLO - END(__watch_clear) - -/* - * Parameter: none - * Results : none - */ - LEAF(__watch_reenable) - lw t0, watch_savelo - jr ra - mtc0 t0, CP0_WATCHLO - END(__watch_reenable) - -/* - * Saved value of the c0_watchlo register for watch_reenable() - */ - .data -watch_savelo: .word 0 - .text diff --git a/arch/mips/lib-64/Makefile b/arch/mips/lib-64/Makefile deleted file mode 100644 index 7bae849..0000000 --- a/arch/mips/lib-64/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -# -# Makefile for MIPS-specific library files.. -# - -lib-y += watch.o diff --git a/arch/mips/lib-64/watch.S b/arch/mips/lib-64/watch.S deleted file mode 100644 index f914340..0000000 --- a/arch/mips/lib-64/watch.S +++ /dev/null @@ -1,57 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Kernel debug stuff to use the Watch registers. - * Useful to find stack overflows, dangling pointers etc. - * - * Copyright (C) 1995, 1996, 1999, 2001 by Ralf Baechle - */ -#include -#include -#include - - .set noreorder -/* - * Parameter: a0 - physical address to watch - * a1 - set bit #1 to trap on load references - * bit #0 to trap on store references - * Results : none - */ - LEAF(__watch_set) - ori a0, 7 - xori a0, 7 - or a0, a1 - mtc0 a0, CP0_WATCHLO - sd a0, watch_savelo - dsrl32 a0, a0, 0 - - jr ra - mtc0 zero, CP0_WATCHHI - END(__watch_set) - -/* - * Parameter: none - * Results : none - */ - LEAF(__watch_clear) - jr ra - mtc0 zero, CP0_WATCHLO - END(__watch_clear) - -/* - * Parameter: none - * Results : none - */ - LEAF(__watch_reenable) - ld t0, watch_savelo - jr ra - mtc0 t0, CP0_WATCHLO - END(__watch_reenable) - -/* - * Saved value of the c0_watchlo register for watch_reenable() - */ - .local watch_savelo - .comm watch_savelo, 8, 8 diff --git a/include/asm-mips/watch.h b/include/asm-mips/watch.h deleted file mode 100644 index 6aa90ca..0000000 --- a/include/asm-mips/watch.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1996, 1997, 1998, 2000, 2001 by Ralf Baechle - */ -#ifndef _ASM_WATCH_H -#define _ASM_WATCH_H - -#include - -/* - * Types of reference for watch_set() - */ -enum wref_type { - wr_save = 1, - wr_load = 2 -}; - -extern asmlinkage void __watch_set(unsigned long addr, enum wref_type ref); -extern asmlinkage void __watch_clear(void); -extern asmlinkage void __watch_reenable(void); - -#define watch_set(addr, ref) \ - if (cpu_has_watch) \ - __watch_set(addr, ref) -#define watch_clear() \ - if (cpu_has_watch) \ - __watch_clear() -#define watch_reenable() \ - if (cpu_has_watch) \ - __watch_reenable() - -#endif /* _ASM_WATCH_H */ From joseph@codesourcery.com Mon Jun 4 21:57:13 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jun 2007 21:57:15 +0100 (BST) Received: from mail.codesourcery.com ([65.74.133.4]:1667 "EHLO mail.codesourcery.com") by ftp.linux-mips.org with ESMTP id S20022535AbXFDU5N (ORCPT ); Mon, 4 Jun 2007 21:57:13 +0100 Received: (qmail 13127 invoked from network); 4 Jun 2007 20:56:59 -0000 Received: from unknown (HELO digraph.polyomino.org.uk) (joseph@127.0.0.2) by mail.codesourcery.com with ESMTPA; 4 Jun 2007 20:56:59 -0000 Received: from jsm28 (helo=localhost) by digraph.polyomino.org.uk with local-esmtp (Exim 4.63) (envelope-from ) id 1HvJbl-0004bH-Hs; Mon, 04 Jun 2007 20:56:57 +0000 Date: Mon, 4 Jun 2007 20:56:57 +0000 (UTC) From: "Joseph S. Myers" X-X-Sender: jsm28@digraph.polyomino.org.uk To: linux-kernel@vger.kernel.org, linux-mips@linux-mips.org Subject: 64-bit syscall ABI issue Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15245 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: joseph@codesourcery.com Precedence: bulk X-list: linux-mips When arguments of types narrower than a register are passed to a C function in a register, the ABI typically requires that they be sign-extended or zero-extended to the full width of the register. The compiler, generating code for the called function, may presume that the registers have been properly extended (and GCC is getting increasingly good at avoiding redundant sign and zero extensions). In turn, it may generate instructions for which the processor presumes the values for properly extended - for example, on MIPS64, 32-bit arithmetic instructions are documented as yielding unpredicatable results if the operands are not sign-extended to 64 bits. Consider, for example, . Here glibc has passed an improperly extended value to a syscall, so the syscall implementation (written in C) receives a register value not conforming to the ABI, and undefined behavior in the kernel duly ensues. Depending on the particular form the undefined behavior takes for a given function, compiler and CPU implementation, security issues might arise if sanity checks of the arguments to a syscall fail to allow for values that can be passed in registers but are beyond those permitted by the ABI. What should the kernel syscall ABI be in such cases (any case where the syscall implementations expect arguments narrower than registers, so mainly 32-bit arguments on 64-bit platforms)? There are two obvious possibilities: (a) The upper bits of 32-bit syscall arguments are undefined, the kernel should deal with this. (b) The upper bits of 32-bit syscall arguments must be extended according to the ABI, the kernel should detect invalid register values and treat them as erroneous syscall arguments (probably returning EINVAL). In either case, the kernel needs a way to handle the improperly extended syscall arguments. Possibilities include: * For (a), a new compiler option (or function attribute) to change the ABI so that improperly extended arguments are valid; the compiler would then generate the necessary code to convert them to properly extended values in registers. * Code at the assembly level, before syscalls get passed to their C implementations, that uses a table of which arguments to which syscalls are narrower than registers and either extends (for (a)) or returns EINVAL for improperly extended values (for (b)). * Making the C syscall implementations take register-sized arguments, with some macros to check they are properly extended (for (b)) or reduce them in width to variables of the narrower type (for (a)). If (a), existing glibc is fine for 32-bit arguments on all targets - but cases which glibc passes a 64-bit argument and the kernel expects a 32-bit one (e.g. passing size_t where the kernel expects int) would have such arguments silently truncated to 32 bits. If (b) (which I prefer), MIPS64 (only) would need a new glibc that properly sign-extends 32-bit syscall arguments to 64-bit values, in order to work with a kernel that detects improper extension. This mainly affects -1 as a uid/gid argument - a case we see is currently broken anyway. Such a glibc should work on older kernels as well, and this need for a glibc change should not affect platforms where unsigned 32-bit values are zero-extended rather than sign-extended to 64 bits. -- Joseph S. Myers joseph@codesourcery.com From davem@davemloft.net Mon Jun 4 22:25:44 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 04 Jun 2007 22:25:47 +0100 (BST) Received: from 74-93-104-97-Washington.hfc.comcastbusiness.net ([74.93.104.97]:11225 "EHLO sunset.davemloft.net") by ftp.linux-mips.org with ESMTP id S20022575AbXFDVZo (ORCPT ); Mon, 4 Jun 2007 22:25:44 +0100 Received: from localhost (localhost [127.0.0.1]) by sunset.davemloft.net (Postfix) with ESMTP id 39B04510001; Mon, 4 Jun 2007 14:25:57 -0700 (PDT) Date: Mon, 04 Jun 2007 14:25:57 -0700 (PDT) Message-Id: <20070604.142557.68139332.davem@davemloft.net> To: joseph@codesourcery.com Cc: linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, linux-arch@vger.kernel.org Subject: Re: 64-bit syscall ABI issue From: David Miller In-Reply-To: References: X-Mailer: Mew version 5.1.52 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15246 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: davem@davemloft.net Precedence: bulk X-list: linux-mips From: "Joseph S. Myers" Date: Mon, 4 Jun 2007 20:56:57 +0000 (UTC) [ added linux-arch which is a great place to discuss these kinds of issues. ] > What should the kernel syscall ABI be in such cases (any case where the > syscall implementations expect arguments narrower than registers, so > mainly 32-bit arguments on 64-bit platforms)? There are two obvious > possibilities: In general we've taken the stance that the syscall dispatch should create the proper calling environment for C code implementing the system calls, and this thus means properly sign and zero extending the arguments as expected by the C calling convention. From stjeanma@pmc-sierra.com Tue Jun 5 00:24:18 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 05 Jun 2007 00:24:28 +0100 (BST) Received: from mother.pmc-sierra.com ([216.241.224.12]:37103 "HELO mother.pmc-sierra.bc.ca") by ftp.linux-mips.org with SMTP id S20026655AbXFDXYS (ORCPT ); Tue, 5 Jun 2007 00:24:18 +0100 Received: (qmail 14398 invoked by uid 101); 4 Jun 2007 23:23:54 -0000 Received: from unknown (HELO pmxedge1.pmc-sierra.bc.ca) (216.241.226.183) by mother.pmc-sierra.com with SMTP; 4 Jun 2007 23:23:54 -0000 Received: from pasqua.pmc-sierra.bc.ca (pasqua.pmc-sierra.bc.ca [134.87.183.161]) by pmxedge1.pmc-sierra.bc.ca (8.13.4/8.12.7) with ESMTP id l54NNrPp014781; Mon, 4 Jun 2007 16:23:53 -0700 From: Marc St-Jean Received: (from stjeanma@localhost) by pasqua.pmc-sierra.bc.ca (8.13.4/8.12.11) id l54NNi6e013258; Mon, 4 Jun 2007 17:23:44 -0600 Date: Mon, 4 Jun 2007 17:23:44 -0600 Message-Id: <200706042323.l54NNi6e013258@pasqua.pmc-sierra.bc.ca> To: gregkh@suse.de Subject: [PATCH 11/12] drivers: PMC MSP71xx USB driver Cc: akpm@linux-foundation.org, linux-mips@linux-mips.org, linux-usb-devel@lists.sourceforge.net Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15247 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: stjeanma@pmc-sierra.com Precedence: bulk X-list: linux-mips [PATCH 11/12] drivers: PMC MSP71xx USB driver Patch to add an USB driver for the PMC-Sierra MSP71xx devices. Patches 1 through 10 were posted to linux-mips@linux-mips.org as well as other sub-system lists/maintainers as appropriate. This patch has some dependencies on the first few patches in the set. If you would like to receive these or the entire set, please email me. Thanks, Marc Signed-off-by: Marc St-Jean --- Initial posting of patch, includes host and gadget support. Kconfig | 1 core/hub.c | 46 gadget/Kconfig | 19 gadget/Makefile | 1 gadget/epautoconf.c | 23 gadget/ether.c | 22 gadget/file_storage.c | 14 gadget/gadget_chips.h | 8 gadget/pmc-sierra/Makefile | 4 gadget/pmc-sierra/arc.c | 90 + gadget/pmc-sierra/arc.h | 72 + gadget/pmc-sierra/debug.c | 23 gadget/pmc-sierra/debug.h | 115 ++ gadget/pmc-sierra/dev_cncl.c | 63 + gadget/pmc-sierra/dev_ep_deinit.c | 58 + gadget/pmc-sierra/dev_main.c | 486 ++++++++ gadget/pmc-sierra/dev_recv.c | 104 + gadget/pmc-sierra/dev_send.c | 104 + gadget/pmc-sierra/dev_shut.c | 64 + gadget/pmc-sierra/dev_utl.c | 243 ++++ gadget/pmc-sierra/devapi.h | 95 + gadget/pmc-sierra/msp71xx_dev.c | 1192 +++++++++++++++++++++ gadget/pmc-sierra/msp71xx_dev.h | 97 + gadget/pmc-sierra/msp71xx_udc.c | 1863 ++++++++++++++++++++++++++++++++++ gadget/pmc-sierra/msp71xx_udc.h | 284 +++++ gadget/pmc-sierra/usb.h | 127 ++ gadget/pmc-sierra/usbprv_dev.h | 245 ++++ gadget/pmc-sierra/vusbhs.h | 725 +++++++++++++ gadget/pmc-sierra/vusbhs_dev_cncl.c | 180 +++ gadget/pmc-sierra/vusbhs_dev_deinit.c | 85 + gadget/pmc-sierra/vusbhs_dev_main.c | 1418 +++++++++++++++++++++++++ gadget/pmc-sierra/vusbhs_dev_shut.c | 73 + gadget/pmc-sierra/vusbhs_dev_utl.c | 265 ++++ gadget/serial.c | 14 gadget/zero.c | 16 host/Kconfig | 32 host/ehci-dbg.c | 92 - host/ehci-hcd.c | 24 host/ehci-hub.c | 9 host/ehci-mem.c | 6 host/ehci-pmcmsp.c | 434 +++++++ host/ehci-q.c | 48 host/ehci-sched.c | 107 + host/ehci.h | 204 +++ 44 files changed, 8994 insertions(+), 201 deletions(-) diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index 9980a4d..bb97a0b 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -37,6 +37,7 @@ config USB_ARCH_HAS_OHCI # some non-PCI hcds implement EHCI config USB_ARCH_HAS_EHCI boolean + default y if PMC_MSP7120_GW || PMC_MSP7120_EVAL || PMC_MSP7120_FPGA default y if PPC_83xx default y if SOC_AU1200 default PCI diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c index b89a98e..17c36cb 100644 --- a/drivers/usb/core/hub.c +++ b/drivers/usb/core/hub.c @@ -73,7 +73,6 @@ struct usb_hub { struct delayed_work leds; }; - /* Protect struct usb_device->state and ->children members * Note: Both are also protected by ->dev.sem, except that ->state can * change to USB_STATE_NOTATTACHED even when the semaphore isn't held. */ @@ -2749,12 +2748,45 @@ static void hub_events(void) } if (portchange & USB_PORT_STAT_C_OVERCURRENT) { - dev_err (hub_dev, - "over-current change on port %d\n", - i); - clear_port_feature(hdev, i, - USB_PORT_FEAT_C_OVER_CURRENT); - hub_power_on(hub); + if (strcmp(hdev->bus->controller->driver->name, + "pmcmsp-ehci") == 0) { + /* clear OCC bit */ + clear_port_feature(hdev, i, + USB_PORT_FEAT_C_OVER_CURRENT); + + /* + * This step is required to toggle + * the PP bit to 0 and 1 (by + * hub_power_on) in order the CSC bit + * to be transitioned properly for + * device hotplug + */ + /* clear PP bit */ + clear_port_feature(hdev, i, + USB_PORT_FEAT_POWER); + + /* resume power */ + hub_power_on(hub); + + /* delay 100 usec */ + udelay(100); + + /* read OCA bit */ + if (portstatus & + (1 << USB_PORT_FEAT_OVER_CURRENT)) { + /* declare overcurrent */ + dev_err(hub_dev, + "over-current change " + "on port %d\n", i); + } + } else { + dev_err (hub_dev, + "over-current change " + "on port %d\n", i); + clear_port_feature(hdev, i, + USB_PORT_FEAT_C_OVER_CURRENT); + hub_power_on(hub); + } } if (portchange & USB_PORT_STAT_C_RESET) { diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 4097a86..57a9914 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -154,6 +154,25 @@ config USB_LH7A40X default USB_GADGET select USB_GADGET_SELECTED +config USB_GADGET_MSP71XX + boolean "MSP71XX" + select USB_GADGET_DUALSPEED + help + PMC MSP71XX USB peripheral controller which + supports both full and high speed USB 2.0 data transfers. + + It has 6 endpoints, including endpoint zero + (for control transfers) + + Say "y" to link the driver statically, or "m" to build a + dynamically linked module called "pmc_tdi" and force all + gadget drivers to also be dynamically linked. + +config USB_MSP71XX + tristate + depends on USB_GADGET_MSP71XX + default USB_GADGET + select USB_GADGET_SELECTED config USB_GADGET_OMAP boolean "OMAP USB Device Controller" diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index e71e086..f8c2888 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -8,6 +8,7 @@ obj-$(CONFIG_USB_GOKU) += goku_udc.o obj-$(CONFIG_USB_OMAP) += omap_udc.o obj-$(CONFIG_USB_LH7A40X) += lh7a40x_udc.o obj-$(CONFIG_USB_AT91) += at91_udc.o +obj-$(CONFIG_USB_MSP71XX) += pmc-sierra/ # # USB gadget drivers diff --git a/drivers/usb/gadget/epautoconf.c b/drivers/usb/gadget/epautoconf.c index f28af06..5312457 100644 --- a/drivers/usb/gadget/epautoconf.c +++ b/drivers/usb/gadget/epautoconf.c @@ -179,8 +179,10 @@ ep_matches ( int size = ep->maxpacket; /* min() doesn't work on bitfields with gcc-3.5 */ - if (size > 64) - size = 64; + if (!gadget_is_msp71xx (gadget)) { + if (size > 64) + size = 64; + } desc->wMaxPacketSize = cpu_to_le16(size); } return 1; @@ -274,6 +276,23 @@ struct usb_ep * __devinit usb_ep_autoconfig ( ep = find_ep (gadget, "ep1-bulk"); if (ep && ep_matches (gadget, ep, desc)) return ep; + } else if (gadget_is_msp71xx (gadget)) { + if (USB_ENDPOINT_XFER_BULK == type) { + /* ep1in-bulk, ep1out-bulk */ + ep = find_ep (gadget, "ep1in-bulk"); + if (ep && ep_matches (gadget, ep, desc)) + return ep; + ep = find_ep (gadget, "ep1out-bulk"); + if (ep && ep_matches (gadget, ep, desc)) + return ep; + } else if (USB_ENDPOINT_XFER_INT == type) { + ep = find_ep (gadget, "ep2in-intr"); + if (ep && ep_matches (gadget, ep, desc)) + return ep; + ep = find_ep (gadget, "ep2out-intr"); + if (ep && ep_matches (gadget, ep, desc)) + return ep; + } } /* Second, look at endpoints until an unclaimed one looks usable */ diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c index 04e6b85..3608f21 100644 --- a/drivers/usb/gadget/ether.c +++ b/drivers/usb/gadget/ether.c @@ -282,6 +282,10 @@ MODULE_PARM_DESC(host_addr, "Host Ethernet Address"); #define DEV_CONFIG_CDC #endif +#ifdef CONFIG_USB_GADGET_MSP71XX +#define DEV_CONFIG_CDC +#endif + /* For CDC-incapable hardware, choose the simple cdc subset. * Anything that talks bulk (without notable bugs) can do this. @@ -1598,14 +1602,16 @@ done_set_intf: /* respond with data transfer before status phase? */ if (value >= 0) { - req->length = value; - req->zero = value < wLength - && (value % gadget->ep0->maxpacket) == 0; - value = usb_ep_queue (gadget->ep0, req, GFP_ATOMIC); - if (value < 0) { - DEBUG (dev, "ep_queue --> %d\n", value); - req->status = 0; - eth_setup_complete (gadget->ep0, req); + if ((!gadget_is_msp71xx (gadget)) || (value != 0)) { + req->length = value; + req->zero = value < wLength + && (value % gadget->ep0->maxpacket) == 0; + value = usb_ep_queue (gadget->ep0, req, GFP_ATOMIC); + if (value < 0) { + DEBUG (dev, "ep_queue --> %d\n", value); + req->status = 0; + eth_setup_complete (gadget->ep0, req); + } } } diff --git a/drivers/usb/gadget/file_storage.c b/drivers/usb/gadget/file_storage.c index c6b6479..4b06c69 100644 --- a/drivers/usb/gadget/file_storage.c +++ b/drivers/usb/gadget/file_storage.c @@ -1134,14 +1134,16 @@ static void fsg_disconnect(struct usb_gadget *gadget) static int ep0_queue(struct fsg_dev *fsg) { - int rc; - - rc = usb_ep_queue(fsg->ep0, fsg->ep0req, GFP_ATOMIC); - if (rc != 0 && rc != -ESHUTDOWN) { + int rc = 0; - /* We can't do much more than wait for a reset */ - WARN(fsg, "error in submission: %s --> %d\n", + if ((!gadget_is_msp71xx (fsg->gadget)) || + (fsg->ep0req->length != 0)) { + rc = usb_ep_queue(fsg->ep0, fsg->ep0req, GFP_ATOMIC); + if (rc != 0 && rc != -ESHUTDOWN) { + /* We can't do much more than wait for a reset */ + WARN(fsg, "error in submission: %s --> %d\n", fsg->ep0->name, rc); + } } return rc; } diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h index 2e3d662..02039cb 100644 --- a/drivers/usb/gadget/gadget_chips.h +++ b/drivers/usb/gadget/gadget_chips.h @@ -119,6 +119,12 @@ #define gadget_is_mpc8272(g) 0 #endif +#ifdef CONFIG_USB_GADGET_MSP71XX +#define gadget_is_msp71xx(g) !strcmp("msp71xx_udc", (g)->name) +#else +#define gadget_is_msp71xx(g) 0 +#endif + // CONFIG_USB_GADGET_SX2 // CONFIG_USB_GADGET_AU1X00 // ... @@ -177,5 +183,7 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget) return 0x17; else if (gadget_is_husb2dev(gadget)) return 0x18; + else if (gadget_is_msp71xx(gadget)) + return 0x19; return -ENOENT; } diff --git a/drivers/usb/gadget/serial.c b/drivers/usb/gadget/serial.c index e552668..86a1797 100644 --- a/drivers/usb/gadget/serial.c +++ b/drivers/usb/gadget/serial.c @@ -1536,12 +1536,14 @@ static int gs_setup(struct usb_gadget *gadget, req->length = ret; req->zero = ret < wLength && (ret % gadget->ep0->maxpacket) == 0; - ret = usb_ep_queue(gadget->ep0, req, GFP_ATOMIC); - if (ret < 0) { - printk(KERN_ERR "gs_setup: cannot queue response, ret=%d\n", - ret); - req->status = 0; - gs_setup_complete(gadget->ep0, req); + if ((!gadget_is_msp71xx (gadget)) || (req->length != 0)) { + ret = usb_ep_queue(gadget->ep0, req, GFP_ATOMIC); + if (ret < 0) { + printk(KERN_ERR "gs_setup: cannot " + "queue response, ret=%d\n", ret); + req->status = 0; + gs_setup_complete(gadget->ep0, req); + } } } diff --git a/drivers/usb/gadget/zero.c b/drivers/usb/gadget/zero.c index 8c85e33..a8f0e62 100644 --- a/drivers/usb/gadget/zero.c +++ b/drivers/usb/gadget/zero.c @@ -1069,13 +1069,15 @@ unknown: /* respond with data transfer before status phase? */ if (value >= 0) { - req->length = value; - req->zero = value < w_length; - value = usb_ep_queue (gadget->ep0, req, GFP_ATOMIC); - if (value < 0) { - DBG (dev, "ep_queue --> %d\n", value); - req->status = 0; - zero_setup_complete (gadget->ep0, req); + if (!gadget_is_msp71xx(gadget) || value != 0) { + req->length = value; + req->zero = value < w_length; + value = usb_ep_queue (gadget->ep0, req, GFP_ATOMIC); + if (value < 0) { + DBG (dev, "ep_queue --> %d\n", value); + req->status = 0; + zero_setup_complete (gadget->ep0, req); + } } } diff --git a/drivers/usb/gadget/pmc-sierra/arc.c b/drivers/usb/gadget/pmc-sierra/arc.c new file mode 100644 index 0000000..ed2d786 --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/arc.c @@ -0,0 +1,90 @@ +/* + * arc.c -- This file contains all architecture declarations and functions + * + * Copyright (C) 1989-2006 Chipidea + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even + * the implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include + +#include "arc.h" + +volatile bool in_isr = false; + +/**************************************************************************** + * + * Function Name : _bsp_install_isr + * Returned Value : None + * Comments : + * Installs the USB interrupt service routine + * + ***************************************************************************/ +void _bsp_install_isr( + u8 vector_number, + void ( * isr_ptr)(void), + void * handle) +{ +} + + +/**************************************************************************** + * + * Function Name : _bsp_get_usb_vector + * Returned Value : interrupt vector number + * Comments : + * Get the vector number for the specified device number + ***************************************************************************/ +u8 _bsp_get_usb_vector(u8 device_number) +{ + if (device_number == 0) + return BSP_VUSB20_DEVICE_VECTOR0; + + return -1; +} + +/**************************************************************************** + * + * Function Name : _bsp_get_usb_base + * Returned Value : Address of the VUSB register base + * Comments : + * Get the USB register base address + ***************************************************************************/ +void * _bsp_get_usb_base(u8 device_number) +{ + if (device_number == 0) + return ioremap_nocache(BSP_VUSB20_DEVICE_BASE_ADDRESS0, + BSP_VUSB20_DEVICE_SIZE0); + + return (void *)-1; +} + +/**************************************************************************** + * + * Function Name : _bsp_get_usb_capability_register_base + * Returned Value : Address of the VUSB1.1 capability register base + * Comments : + * Get the USB capability register base address + ***************************************************************************/ +void * _bsp_get_usb_capability_register_base(u8 device_number) +{ + if (device_number == 0) + return ioremap_nocache(BSP_VUSB20_DEVICE_CAP_BASE_ADDRESS0, + BSP_VUSB20_DEVICE_CAP_SIZE0); + + return (void *)-1; +} diff --git a/drivers/usb/gadget/pmc-sierra/debug.c b/drivers/usb/gadget/pmc-sierra/debug.c new file mode 100644 index 0000000..640900b --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/debug.c @@ -0,0 +1,23 @@ +/* + * debug.c -- This file contains all debug trace declarations + * + * Copyright (C) 1989-2006 Chipidea + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#define __TRACE_VARIABLES_DEFINED__ +#include "debug.h" diff --git a/drivers/usb/gadget/pmc-sierra/dev_cncl.c b/drivers/usb/gadget/pmc-sierra/dev_cncl.c new file mode 100644 index 0000000..ec86a12 --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/dev_cncl.c @@ -0,0 +1,63 @@ +/* + * dev_cncl.c -- This file contains USB device API specific function to cancel + * transfer + * + * Copyright (C) 1989-2006 Chipidea + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "devapi.h" +#include "usbprv_dev.h" + +/**************************************************************************** + * + * Function Name : _usb_device_cancel_transfer + * Returned Value : USB_OK or error code + * Comments : + * returns the status of the transaction on the specified endpoint. + * + ***************************************************************************/ +u8 _usb_device_cancel_transfer( + _usb_device_handle handle, + u8 ep_num, + u8 direction) +{ + u8 error = USB_OK; + struct usb_dev_state * usb_dev_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_cancel_transfer"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + + spin_lock(&usb_dev_ptr->lock); + + /* + * Cancel transfer on the specified endpoint for the specified + * direction. + */ + error = _usb_dci_vusb20_cancel_transfer(handle, ep_num, direction); + + spin_unlock(&usb_dev_ptr->lock); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_cancel_transfer, SUCCESSFUL"); +#endif + + return error; +} diff --git a/drivers/usb/gadget/pmc-sierra/dev_ep_deinit.c b/drivers/usb/gadget/pmc-sierra/dev_ep_deinit.c new file mode 100644 index 0000000..343a915 --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/dev_ep_deinit.c @@ -0,0 +1,58 @@ +/* + * dev_ep_deinit.c -- This file contains USB device API specific function to + * deinitialize the endpoint. + * + * Copyright (C) 1989-2006 Chipidea + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "devapi.h" +#include "usbprv_dev.h" + +/**************************************************************************** + * + * Function Name : _usb_device_deinit_endpoint + * Returned Value : USB_OK or error code + * Comments : + * Disables the endpoint and the data structures associated with the + * endpoint + * + ***************************************************************************/ +u8 _usb_device_deinit_endpoint( + _usb_device_handle handle, + u8 ep_num, + u8 direction) +{ + u8 error = 0; + struct usb_dev_state * usb_dev_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_deinit_endpoint"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + + spin_lock(&usb_dev_ptr->lock); + error = _usb_dci_vusb20_deinit_endpoint(handle, ep_num, direction); + spin_unlock(&usb_dev_ptr->lock); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_deinit_endpoint,SUCCESSFUL"); +#endif + + return error; +} diff --git a/drivers/usb/gadget/pmc-sierra/dev_main.c b/drivers/usb/gadget/pmc-sierra/dev_main.c new file mode 100644 index 0000000..c23217b --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/dev_main.c @@ -0,0 +1,486 @@ +/* + * dev_main.c -- This file contains the main USB device API functions that + * will be used by most applications. + * + * Copyright (C) 1989-2006 Chipidea + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "devapi.h" +#include "usbprv_dev.h" + +/**************************************************************************** + * + * Function Name : _usb_device_free_xd + * Returned Value : void + * Comments : + * Enqueues a XD onto the free XD ring. + * + ***************************************************************************/ +void _usb_device_free_xd(void * xd_ptr) +{ + struct usb_dev_state * usb_dev_ptr = (struct usb_dev_state *) + ((struct xd *)xd_ptr)->scratch_ptr->private; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_free_xd"); +#endif + + /* + * This function can be called from any context, and it needs mutual + * exclusion with itself. + */ + spin_lock(&usb_dev_ptr->lock); + + /* + * Add the XD to the free XD queue (linked via private) and + * increment the tail to the next descriptor + */ + USB_XD_QADD(usb_dev_ptr->xd_head, usb_dev_ptr->xd_tail, + (struct xd *)xd_ptr); + usb_dev_ptr->xd_entries++; + + spin_unlock(&usb_dev_ptr->lock); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_free_xd, SUCCESSFUL"); +#endif +} + +/**************************************************************************** + * + * Function Name : _usb_device_init + * Returned Value : USB_OK or error code + * Comments : + * Initializes the USB device specific data structures and calls + * the low-level device controller chip initialization routine. + * + ***************************************************************************/ +u8 _usb_device_init( + u8 devnum, + _usb_device_handle * handle, + u8 endpoints) +{ + struct usb_dev_state * usb_dev_ptr; + struct xd * xd_ptr; + u8 i, error; + struct scratch * temp_scratch_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_init"); +#endif + + if (devnum > MAX_USB_DEVICES) { +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE( + "_usb_device_init, error invalid device number"); +#endif + return USBERR_INVALID_DEVICE_NUM; + } + + /* Allocate memory for the state structure */ + usb_dev_ptr = (struct usb_dev_state *) + kzalloc(sizeof(struct usb_dev_state), GFP_KERNEL); + + if (usb_dev_ptr == NULL) { +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE( + "_usb_device_init, error NULL device handle"); +#endif + return USBERR_ALLOC_STATE; + } + + /* Initialize device lock */ + spin_lock_init(&usb_dev_ptr->lock); + + /* + * Multiple devices will have different base addresses and + * interrupt vectors (For future). + */ + usb_dev_ptr->dev_ptr = _bsp_get_usb_base(devnum); + usb_dev_ptr->dev_vec = _bsp_get_usb_vector(devnum); + usb_dev_ptr->usb_state = USB_STATE_UNKNOWN; + + usb_dev_ptr->max_endpoints = endpoints; + + /* Allocate MAX_XDS_FOR_TR_CALLS */ + xd_ptr = (struct xd *)kzalloc(sizeof(struct xd) * + MAX_XDS_FOR_TR_CALLS, GFP_KERNEL); + + if (xd_ptr == NULL) { +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_init, malloc error"); +#endif + return USBERR_ALLOC_TR; + } + + usb_dev_ptr->xd_base = xd_ptr; + + /* Allocate memory for internal scratch structure */ + usb_dev_ptr->xd_scratch_base = (struct scratch *)kmalloc( + sizeof(struct scratch) * MAX_XDS_FOR_TR_CALLS, GFP_KERNEL); + + if (usb_dev_ptr->xd_scratch_base == NULL) { +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_init, malloc error"); +#endif + return USBERR_ALLOC; + } + + temp_scratch_ptr = usb_dev_ptr->xd_scratch_base; + usb_dev_ptr->xd_head = NULL; + usb_dev_ptr->xd_tail = NULL; + usb_dev_ptr->xd_entries = 0; + + /* Enqueue all the XDs */ + for (i = 0; i < MAX_XDS_FOR_TR_CALLS; i++) { + xd_ptr->scratch_ptr = temp_scratch_ptr; + xd_ptr->scratch_ptr->free = _usb_device_free_xd; + xd_ptr->scratch_ptr->private = (void *)usb_dev_ptr; + _usb_device_free_xd((void *)xd_ptr); + xd_ptr++; + temp_scratch_ptr++; + } + + usb_dev_ptr->temp_xd_ptr = (struct xd *)kzalloc( + sizeof(struct xd), GFP_KERNEL); + + /* Initialize the USB controller chip */ + error = _usb_dci_vusb20_init(devnum, usb_dev_ptr); + if (error) { +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_init, init failed"); +#endif + return USBERR_INIT_FAILED; + } + + *handle = usb_dev_ptr; +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_init, SUCCESSFUL"); +#endif + return USB_OK; +} + +/**************************************************************************** + * + * Function Name : _usb_device_register_service + * Returned Value : USB_OK or error code + * Comments : + * Registers a callback routine for a specified event or endpoint. + * + ***************************************************************************/ +u8 _usb_device_register_service( + _usb_device_handle handle, + u8 type, + void( * service)(void *, bool, u8, u8 *, u32, u8)) +{ + struct usb_dev_state * usb_dev_ptr; + struct service * service_ptr; + struct service * * search_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_register_service"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + + /* Needs mutual exclusion */ + spin_lock(&usb_dev_ptr->lock); + + /* Search for an existing entry for type */ + for (search_ptr = &usb_dev_ptr->service_head_ptr; + *search_ptr; search_ptr = &(*search_ptr)->next) { + if ((*search_ptr)->type == type) { + /* Found an existing entry */ + spin_unlock(&usb_dev_ptr->lock); +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_register_service, " + "service closed"); +#endif + return USBERR_OPEN_SERVICE; + } + } + + /* No existing entry found - create a new one */ + service_ptr = (struct service *)kmalloc( + sizeof(struct service), GFP_KERNEL); + if (!service_ptr) { + spin_unlock(&usb_dev_ptr->lock); +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_register_service, " + "error allocating service"); +#endif + return USBERR_ALLOC; + } + + service_ptr->type = type; + service_ptr->service = service; + service_ptr->next = NULL; + *search_ptr = service_ptr; + + spin_unlock(&usb_dev_ptr->lock); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_register_service, SUCCESSFUL"); +#endif + return USB_OK; +} + +/**************************************************************************** + * + * Function Name : _usb_device_unregister_service + * Returned Value : USB_OK or error code + * Comments : + * Unregisters a callback routine for a specified event or endpoint. + * + ***************************************************************************/ +u8 _usb_device_unregister_service( + _usb_device_handle handle, + u8 type) +{ + struct usb_dev_state * usb_dev_ptr; + struct service * service_ptr; + struct service * * search_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_unregister_service"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + + /* Needs mutual exclusion */ + spin_lock(&usb_dev_ptr->lock); + + /* Search for an existing entry for type */ + for (search_ptr = &usb_dev_ptr->service_head_ptr; + *search_ptr; search_ptr = &(*search_ptr)->next) { + /* Found an existing entry - delete it */ + if ((*search_ptr)->type == type) + break; + } + + /* No existing entry found */ + if (!*search_ptr) { + spin_unlock(&usb_dev_ptr->lock); +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_unregister_service, " + "no service found"); +#endif + return USBERR_CLOSED_SERVICE; + } + + service_ptr = *search_ptr; + *search_ptr = service_ptr->next; + + kfree((void *)service_ptr); + + spin_unlock(&usb_dev_ptr->lock); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_unregister_service, SUCCESSFUL"); +#endif + + return USB_OK; +} + +/**************************************************************************** + * + * Function Name : _usb_device_call_service + * Returned Value : USB_OK or error code + * Comments : + * Calls the appropriate service for the specified type, if one is + * registered. Used internally only. + * + ***************************************************************************/ +u8 _usb_device_call_service( + _usb_device_handle handle, + u8 type, + bool setup, + bool direction, + u8 * buffer_ptr, + u32 length, + u8 errors) +{ + struct usb_dev_state * usb_dev_ptr; + struct service * service_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_call_service"); +#endif + usb_dev_ptr = (struct usb_dev_state *)handle; + + /* Needs mutual exclusion */ + spin_lock(&usb_dev_ptr->lock); + + /* Search for an existing entry for type */ + for (service_ptr = usb_dev_ptr->service_head_ptr; + service_ptr; service_ptr = service_ptr->next) { + if (service_ptr->type == type) { + service_ptr->service(handle, setup, direction, + buffer_ptr, length, errors); + spin_unlock(&usb_dev_ptr->lock); +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_call_service, " + "SUCCESSFUL service called"); +#endif + return USB_OK; + } + } + + spin_unlock(&usb_dev_ptr->lock); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE( + "_usb_device_call_service, SUCCESSFUL service closed"); +#endif + + return USBERR_CLOSED_SERVICE; +} + +/**************************************************************************** + * + * Function Name : _usb_device_init_endpoint + * Returned Value : USB_OK or error code + * Comments : + * Initializes the endpoint and the data structures associated with the + * endpoint + * + ***************************************************************************/ +u8 _usb_device_init_endpoint( + _usb_device_handle handle, + u8 ep_num, + u16 max_pkt_size, + u8 direction, + u8 type, + u8 flag) +{ + u8 error = 0; + struct usb_dev_state * usb_dev_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_init_endpoint"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + + /* Initialize the transfer descriptor */ + usb_dev_ptr->temp_xd_ptr->ep_num = ep_num; + usb_dev_ptr->temp_xd_ptr->bdirection = direction; + usb_dev_ptr->temp_xd_ptr->wmaxpacketsize = max_pkt_size; + usb_dev_ptr->temp_xd_ptr->ep_type = type; + usb_dev_ptr->temp_xd_ptr->dont_zero_terminate = flag; + usb_dev_ptr->temp_xd_ptr->max_pkts_per_uframe = + ((flag & USB_MAX_PKTS_PER_UFRAME) >> 1); + + error = _usb_dci_vusb20_init_endpoint(handle, + usb_dev_ptr->temp_xd_ptr); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_init_endpoint, SUCCESSFUL"); +#endif + return error; +} + +/**************************************************************************** + * + * Function Name : _usb_device_get_transfer_status + * Returned Value : Status of the transfer + * Comments : + * returns the status of the transaction on the specified endpoint. + * + ***************************************************************************/ +u8 _usb_device_get_transfer_status( + _usb_device_handle handle, + u8 ep_num, + u8 direction) +{ + u8 status; + struct usb_dev_state * usb_dev_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_get_transfer_status"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + + spin_lock(&usb_dev_ptr->lock); + status = _usb_dci_vusb20_get_transfer_status(handle, + ep_num, direction); + spin_unlock(&usb_dev_ptr->lock); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_get_transfer_status, SUCCESSFUL"); +#endif + + /* Return the status of the last queued transfer */ + return status; +} + +/**************************************************************************** + * + * Function Name : _usb_device_read_setup_data + * Returned Value : USB_OK or error code + * Comments : + * Reads the setup data from the hardware + * + ***************************************************************************/ +void _usb_device_read_setup_data( + _usb_device_handle handle, + u8 ep_num, + u8 * buff_ptr) +{ + struct usb_dev_state * usb_dev_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_read_setup_data"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + + _usb_dci_vusb20_get_setup_data(handle, ep_num, buff_ptr); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_read_setup_data, SUCCESSFUL"); +#endif +} + +/**************************************************************************** + * + * Function Name : _usb_device_set_address + * Returned Value : USB_OK or error code + * Comments : + * Sets the device address as assigned by the host during enumeration + * + ***************************************************************************/ +void _usb_device_set_address( + _usb_device_handle handle, + u8 address) +{ + struct usb_dev_state * usb_dev_ptr; + + usb_dev_ptr = (struct usb_dev_state *)handle; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_set_address"); +#endif + + _usb_dci_vusb20_set_address(handle, address); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_set_address, SUCCESSFUL"); +#endif +} diff --git a/drivers/usb/gadget/pmc-sierra/dev_recv.c b/drivers/usb/gadget/pmc-sierra/dev_recv.c new file mode 100644 index 0000000..18d01b3 --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/dev_recv.c @@ -0,0 +1,104 @@ +/* + * dev_recv.c -- This file contains USB device API specific function to + * receive data. + * + * Copyright (C) 1989-2006 Chipidea + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "devapi.h" +#include "usbprv_dev.h" + +/**************************************************************************** + * + * Function Name : _usb_device_recv_data + * Returned Value : USB_OK or error code + * Comments : + * Receives data on a specified endpoint. + * + ***************************************************************************/ +u8 _usb_device_recv_data( + _usb_device_handle handle, + u8 ep_num, + u8 * buff_ptr, + u32 size) +{ + u8 error = USB_OK; + struct xd * xd_ptr; + struct usb_dev_state * usb_dev_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_recv_data"); +#endif + +#ifdef CONFIG_DMA_NONCOHERENT + /* + * If system has a data cache, it is assumed that buffer + * passed to this routine will be aligned on a cache line + * boundry. The following code will invalidate the + * buffer before passing it to hardware driver. + */ + if (buff_ptr) { + dma_addr_t dma_buff = dma_map_single( + msp71xx_get_dev_ptr()->dev, + buff_ptr, size, DMA_FROM_DEVICE); + dma_unmap_single(msp71xx_get_dev_ptr()->dev, + dma_buff, size, DMA_FROM_DEVICE); + } +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + + spin_lock(&usb_dev_ptr->lock); + + if (!usb_dev_ptr->xd_entries) { + spin_unlock(&usb_dev_ptr->lock); +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_recv_data, transfer in progress"); +#endif + return USB_STATUS_TRANSFER_IN_PROGRESS; + } + + /* + * Get a transfer descriptor for the specified endpoint + * and direction. + */ + USB_XD_QGET(usb_dev_ptr->xd_head, usb_dev_ptr->xd_tail, xd_ptr); + + usb_dev_ptr->xd_entries--; + + /* Initialize the new transfer descriptor */ + xd_ptr->ep_num = ep_num; + xd_ptr->bdirection = USB_RECV; + xd_ptr->wtotallength = size; + xd_ptr->wstartaddress = buff_ptr; + + xd_ptr->bstatus = USB_STATUS_TRANSFER_ACCEPTED; + + error = _usb_dci_vusb20_recv_data(handle, xd_ptr); + + spin_unlock(&usb_dev_ptr->lock); + + if (error) { +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_recv_data, receive failed"); +#endif + return USBERR_RX_FAILED; + } + + return error; +} diff --git a/drivers/usb/gadget/pmc-sierra/dev_send.c b/drivers/usb/gadget/pmc-sierra/dev_send.c new file mode 100644 index 0000000..9fccdc1 --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/dev_send.c @@ -0,0 +1,104 @@ +/* + * dev_send.c -- This file contains USB device API specific function to send + * data. + * + * Copyright (C) 1989-2006 Chipidea + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "devapi.h" +#include "usbprv_dev.h" + +/**************************************************************************** + * + * Function Name : _usb_device_send_data + * Returned Value : USB_OK or error code + * Comments : + * Sends data on a specified endpoint. + * + ***************************************************************************/ +u8 _usb_device_send_data( + _usb_device_handle handle, + u8 ep_num, + u8 * buff_ptr, + u32 size) +{ + u8 error; + struct xd * xd_ptr; + struct usb_dev_state * usb_dev_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_send_data"); +#endif + +#ifdef CONFIG_DMA_NONCOHERENT + /* + * If system has a data cache, it is assumed that buffer + * passed to this routine will be aligned on a cache line + * boundry. The following code will flush the + * buffer before passing it to hardware driver. + */ + if (buff_ptr) { + dma_addr_t dma_buff = dma_map_single( + msp71xx_get_dev_ptr()->dev, + buff_ptr, size, DMA_TO_DEVICE); + dma_unmap_single(msp71xx_get_dev_ptr()->dev, + dma_buff, size, DMA_TO_DEVICE); + } +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + + spin_lock(&usb_dev_ptr->lock); + + if (!usb_dev_ptr->xd_entries) { + spin_unlock(&usb_dev_ptr->lock); +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_send_data, transfer in progress"); +#endif + return USB_STATUS_TRANSFER_IN_PROGRESS; + } + + /* Get a transfer descriptor */ + USB_XD_QGET(usb_dev_ptr->xd_head, usb_dev_ptr->xd_tail, xd_ptr); + + usb_dev_ptr->xd_entries--; + + /* Initialize the new transfer descriptor */ + xd_ptr->ep_num = ep_num; + xd_ptr->bdirection = USB_SEND; + xd_ptr->wtotallength = size; + xd_ptr->wstartaddress = buff_ptr; + + xd_ptr->bstatus = USB_STATUS_TRANSFER_ACCEPTED; + + error = _usb_dci_vusb20_send_data(handle, xd_ptr); + + spin_unlock(&usb_dev_ptr->lock); + + if (error) { +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_send_data, transfer failed"); +#endif + return USBERR_TX_FAILED; + } + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_send_data, SUCCESSFUL"); +#endif + return error; +} diff --git a/drivers/usb/gadget/pmc-sierra/dev_shut.c b/drivers/usb/gadget/pmc-sierra/dev_shut.c new file mode 100644 index 0000000..643fe70 --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/dev_shut.c @@ -0,0 +1,64 @@ +/* + * dev_shut.c -- This file contains USB device API specific function to + * shutdown the device + * + * Copyright (C) 1989-2006 Chipidea + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "devapi.h" +#include "usbprv_dev.h" + +/**************************************************************************** + * + * Function Name : _usb_device_shutdown + * Returned Value : USB_OK or error code + * Comments : + * Shutdown an initialized USB device + * + ***************************************************************************/ +void _usb_device_shutdown(_usb_device_handle handle) +{ + struct usb_dev_state * usb_dev_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_shutdown"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + + _usb_dci_vusb20_shutdown(usb_dev_ptr); + + /* Free all the Callback function structure memory */ + kfree((void *)usb_dev_ptr->service_head_ptr); + + /* Free all internal transfer descriptors */ + kfree((void *)usb_dev_ptr->xd_base); + + /* Free all XD scratch memory */ + kfree((void *)usb_dev_ptr->xd_scratch_base); + + /* Free the temp ep init XD */ + kfree((void *)usb_dev_ptr->temp_xd_ptr); + + /* Free the USB state structure */ + kfree((void *)usb_dev_ptr); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_shutdown, SUCCESSFUL"); +#endif +} diff --git a/drivers/usb/gadget/pmc-sierra/dev_utl.c b/drivers/usb/gadget/pmc-sierra/dev_utl.c new file mode 100644 index 0000000..daee69e --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/dev_utl.c @@ -0,0 +1,243 @@ +/* + * dev_utl.c -- This file contains USB device API specific utility functions. + * + * Copyright (C) 1989-2006 Chipidea + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "devapi.h" +#include "usbprv_dev.h" + +/**************************************************************************** + * + * Function Name : _usb_device_unstall_endpoint + * Returned Value : USB_OK or error code + * Comments : + * Unstalls the endpoint in specified direction + * + ***************************************************************************/ +void _usb_device_unstall_endpoint( + _usb_device_handle handle, + u8 ep_num, + u8 direction) +{ + struct usb_dev_state * usb_dev_ptr; + + usb_dev_ptr = (struct usb_dev_state *)handle; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_unstall_endpoint"); +#endif + + spin_lock(&usb_dev_ptr->lock); + _usb_dci_vusb20_unstall_endpoint(handle, ep_num, direction); + spin_unlock(&usb_dev_ptr->lock); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_unstall_endpoint, SUCCESSFULL"); +#endif +} + +/**************************************************************************** + * + * Function Name : _usb_device_get_status + * Returned Value : USB_OK or error code + * Comments : + * Provides API to access the USB internal state. + * + ***************************************************************************/ +u8 _usb_device_get_status( + _usb_device_handle handle, + u8 component, + u16 * status) +{ + struct usb_dev_state * usb_dev_ptr = (struct usb_dev_state *)handle; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_get_status, SUCCESSFULL"); +#endif + + spin_lock(&usb_dev_ptr->lock); + + switch (component) { + case USB_STATUS_DEVICE_STATE: + *status = usb_dev_ptr->usb_state; + break; + + case USB_STATUS_DEVICE: + *status = usb_dev_ptr->usb_dev_state; + break; + + case USB_STATUS_INTERFACE: + break; + + case USB_STATUS_ADDRESS: + *status = usb_dev_ptr->device_address; + break; + + case USB_STATUS_CURRENT_CONFIG: + *status = usb_dev_ptr->usb_curr_config; + break; + + case USB_STATUS_SOF_COUNT: + *status = usb_dev_ptr->usb_sof_count; + break; + + default: + if (component & USB_STATUS_ENDPOINT) { + *status = _usb_dci_vusb20_get_endpoint_status(handle, + component & USB_STATUS_ENDPOINT_NUMBER_MASK); + } else { + spin_unlock(&usb_dev_ptr->lock); +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_get_status, bad status"); +#endif + return USBERR_BAD_STATUS; + } + break; + } + + spin_unlock(&usb_dev_ptr->lock); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_get_status, SUCCESSFUL"); +#endif + + return USB_OK; +} + +/**************************************************************************** + * + * Function Name : _usb_device_set_status + * Returned Value : USB_OK or error code + * Comments : + * Provides API to set internal state + * + ***************************************************************************/ +u8 _usb_device_set_status( + _usb_device_handle handle, + u8 component, + u16 setting) +{ + struct usb_dev_state * usb_dev_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_set_status"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + + spin_lock(&usb_dev_ptr->lock); + + switch (component) { + case USB_STATUS_DEVICE_STATE: + usb_dev_ptr->usb_state = setting; + break; + + case USB_STATUS_DEVICE: + usb_dev_ptr->usb_dev_state = setting; + break; + + case USB_STATUS_INTERFACE: + break; + + case USB_STATUS_CURRENT_CONFIG: + usb_dev_ptr->usb_curr_config = setting; + break; + + case USB_STATUS_SOF_COUNT: + usb_dev_ptr->usb_sof_count = setting; + break; + + case USB_STATUS_ADDRESS: + usb_dev_ptr->device_address = setting; + + _usb_dci_vusb20_set_address((void *)usb_dev_ptr, setting); + break; + + case USB_STATUS_TEST_MODE: + _usb_dci_vusb20_set_test_mode(handle, setting); + break; + + default: + if (component & USB_STATUS_ENDPOINT) { + _usb_dci_vusb20_set_endpoint_status(handle, + component & USB_STATUS_ENDPOINT_NUMBER_MASK, + setting); + } else { + spin_unlock(&usb_dev_ptr->lock); +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_set_status, bad status"); +#endif + return USBERR_BAD_STATUS; + } + break; + } + + spin_unlock(&usb_dev_ptr->lock); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_set_status, SUCCESSFUL"); +#endif + + return USB_OK; +} + +/**************************************************************************** + * + * Function Name : _usb_device_stall_endpoint + * Returned Value : USB_OK or error code + * Comments : + * Stalls the endpoint. + * + ***************************************************************************/ +void _usb_device_stall_endpoint( + _usb_device_handle handle, + u8 ep_num, + u8 direction) +{ +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_stall_endpoint"); +#endif + + _usb_dci_vusb20_stall_endpoint(handle, ep_num, direction); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_stall_endpoint, SUCCESSFUL"); +#endif +} + +/**************************************************************************** + * + * Function Name : _usb_device_process_resume + * Returned Value : USB_OK or error code + * Comments : + * Process Resume event + * + ***************************************************************************/ +void _usb_device_assert_resume(_usb_device_handle handle) +{ +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_assert_resume"); +#endif + + _usb_dci_vusb20_assert_resume(handle); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_device_assert_resume, SUCCESSFUL"); +#endif +} diff --git a/drivers/usb/gadget/pmc-sierra/vusbhs_dev_cncl.c b/drivers/usb/gadget/pmc-sierra/vusbhs_dev_cncl.c new file mode 100644 index 0000000..3caded3 --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/vusbhs_dev_cncl.c @@ -0,0 +1,180 @@ +/* + * vusbhs_dev_cncl.c -- This file contains the VUSB_HS Device Controller + * interface function to cancel a transfer. + * + * Copyright (C) 1989-2006 Chipidea + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "devapi.h" +#include "usbprv_dev.h" + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_cancel_transfer + * Returned Value : USB_OK or error code + * Comments : + * Cancels a transfer + * + ***************************************************************************/ +u8 _usb_dci_vusb20_cancel_transfer( + _usb_device_handle handle, + u8 ep_num, + u8 direction) +{ + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + volatile struct vusb20_ep_tr * dtd_ptr, * check_dtd_ptr; + volatile struct vusb20_ep_queue_head * ep_queue_head_ptr; + struct xd * xd_ptr; + u32 temp, bit_pos; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_cancel_transfer"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + + bit_pos = 1 << (16 * direction + ep_num); + temp = 2 * ep_num + direction; + + ep_queue_head_ptr = (struct vusb20_ep_queue_head *)phys_to_virt( + dev_ptr->regs.op_dev.ep_list_addr) + temp; + + /* Unlink the dTD */ + dtd_ptr = usb_dev_ptr->ep_dtd_heads[temp]; + if (dtd_ptr) { + check_dtd_ptr = (struct vusb20_ep_tr *)((u32)phys_to_virt( + dtd_ptr->next_tr_elem_ptr) & + VUSBHS_TD_ADDR_MASK); + if (dtd_ptr->size_ioc_sts & VUSBHS_TD_STATUS_ACTIVE) { + /* + * Flushing will halt the pipe. + * Write 1 to the Flush register. + */ + dev_ptr->regs.op_dev.ep_flush = bit_pos; + + /* Wait until flushing completed */ + while (dev_ptr->regs.op_dev.ep_flush & bit_pos) { + /* + * ep_flush bit should be cleared to + * indicate this operation is complete. + */ + } + + while (dev_ptr->regs.op_dev.ep_status & bit_pos) { + /* Write 1 to the Flush register */ + dev_ptr->regs.op_dev.ep_flush = bit_pos; + + /* Wait until flushing completed */ + while (dev_ptr->regs.op_dev.ep_flush & + bit_pos) { + /* + * ep_flush bit should be cleared to + * indicate this operation is complete. + */ + } + } + } + + /* Retire the current dTD */ + dtd_ptr->size_ioc_sts = 0; + dtd_ptr->next_tr_elem_ptr = VUSBHS_TD_NEXT_TERMINATE; + + /* The transfer descriptor for this dTD */ + xd_ptr = (struct xd *)dtd_ptr->scratch_ptr->xd_for_this_dtd; + dtd_ptr->scratch_ptr->private = (void *)usb_dev_ptr; + /* Free the dTD */ + _usb_dci_vusb20_free_dtd((void *)dtd_ptr); + + /* + * Update the dTD head and tail for specific + * endpoint/direction + */ + if (!((u32)check_dtd_ptr & 0x1ffffffe)) { + usb_dev_ptr->ep_dtd_heads[temp] = NULL; + usb_dev_ptr->ep_dtd_tails[temp] = NULL; + if (xd_ptr) { + xd_ptr->scratch_ptr->private = + (void *)usb_dev_ptr; + /* Free the transfer descriptor */ + _usb_device_free_xd((void *)xd_ptr); + } + + /* No other transfers on the queue */ + ep_queue_head_ptr->next_dtd_ptr = + VUSB_EP_QUEUE_HEAD_NEXT_TERMINATE; + ep_queue_head_ptr->size_ioc_int_sts = 0; + } else { + usb_dev_ptr->ep_dtd_heads[temp] = check_dtd_ptr; + if (xd_ptr) { + if ((u32)check_dtd_ptr->scratch_ptr-> + xd_for_this_dtd != (u32)xd_ptr) { + xd_ptr->scratch_ptr->private = + (void *)usb_dev_ptr; + /* Free the transfer descriptor */ + _usb_device_free_xd((void *)xd_ptr); + } + } + + if (check_dtd_ptr->size_ioc_sts & + VUSBHS_TD_STATUS_ACTIVE) { + /* Start CR 1015 */ + /* Prime the Endpoint */ + dev_ptr->regs.op_dev.ep_prime = bit_pos; + if (!(dev_ptr->regs.op_dev.ep_status & + bit_pos)) { + while (dev_ptr->regs.op_dev.ep_prime & + bit_pos) { + /* + * Wait for the ep_prime + * to go to zero + */ + } + + if (dev_ptr->regs.op_dev.ep_status & + bit_pos) { + /* + * The endpoint was not not + * primed so no other + * transfers on the queue. + */ + goto done; + } + } else + goto done; + + /* No other transfers on the queue */ + ep_queue_head_ptr->next_dtd_ptr = + (u32)check_dtd_ptr; + ep_queue_head_ptr->size_ioc_int_sts = 0; + + /* Prime the Endpoint */ + dev_ptr->regs.op_dev.ep_prime = bit_pos; + } + } + } + +done: + /* End CR 1015 */ + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_cancel_transfer, SUCCESSFUL"); +#endif + return USB_OK; +} diff --git a/drivers/usb/gadget/pmc-sierra/vusbhs_dev_deinit.c b/drivers/usb/gadget/pmc-sierra/vusbhs_dev_deinit.c new file mode 100644 index 0000000..686e569 --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/vusbhs_dev_deinit.c @@ -0,0 +1,85 @@ +/* + * vusbhs_dev_deinit.c -- This file contains the VUSB_HS Device Controller + * interface to de-initialize the endpoints. + * + * Copyright (C) 1989-2006 Chipidea + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "devapi.h" +#include "usbprv_dev.h" + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_deinit_endpoint + * Returned Value : None + * Comments : + * Disables the specified endpoint and the endpoint queue head + * + ***************************************************************************/ +u8 _usb_dci_vusb20_deinit_endpoint( + _usb_device_handle handle, + u8 ep_num, + u8 direction) +{ + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + volatile struct vusb20_ep_queue_head * ep_queue_head_ptr; + u32 bit_pos; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_deinit_endpoint"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + + /* Get the endpoint queue head address */ + ep_queue_head_ptr = (struct vusb20_ep_queue_head *) + phys_to_virt(dev_ptr->regs.op_dev.ep_list_addr) + + 2 * ep_num + direction; + + bit_pos = 1 << (16 * direction + ep_num); + + /* Check if the Endpoint is Primed */ + if (!(dev_ptr->regs.op_dev.ep_prime & bit_pos) && + !(dev_ptr->regs.op_dev.ep_status & bit_pos)) { + /* Reset the max packet length and the interrupt on Setup */ + ep_queue_head_ptr->max_pkt_length = 0; + + /* + * Disable the endpoint for Rx or Tx and reset the + * endpoint type + */ + dev_ptr->regs.op_dev.ep_ctrlx[ep_num] &= + (direction ? ~EHCI_EPCTRL_TX_ENABLE : + ~EHCI_EPCTRL_RX_ENABLE) | + (direction ? ~EHCI_EPCTRL_TX_TYPE : + ~EHCI_EPCTRL_RX_TYPE); + } else { +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_deinit_endpoint, " + "error deinit failed"); +#endif + return USBERR_EP_DEINIT_FAILED; + } +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_deinit_endpoint, SUCCESSFUL"); +#endif + + return USB_OK; +} diff --git a/drivers/usb/gadget/pmc-sierra/vusbhs_dev_main.c b/drivers/usb/gadget/pmc-sierra/vusbhs_dev_main.c new file mode 100644 index 0000000..aeb4e17 --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/vusbhs_dev_main.c @@ -0,0 +1,1418 @@ +/* + * vusbhs_dev_main.c -- This file contains the main VUSB_HS Device Controller + * interface functions. + * + * Copyright (C) 1989-2006 Chipidea + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "devapi.h" +#include "usbprv_dev.h" + +/* in the OTG mode this need to be a global */ +struct usb_dev_state * usb_device_state_ptr; + +/* USB 1.1 Setup Packet */ +struct vusbhs_setup { + u8 request_type; + u8 request; + u16 value; + u16 index; + u16 length; +}; + +extern volatile bool in_isr; + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_init + * Returned Value : USB_OK or error code + * Comments : + * Initializes the USB device controller. + * + ***************************************************************************/ +u8 _usb_dci_vusb20_init( + u8 devnum, + _usb_device_handle handle) +{ + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + volatile struct vusb20 * cap_dev_ptr; + u32 temp; + u32 total_memory = 0; + u8 * driver_memory; +#ifdef CONFIG_DMA_NONCOHERENT + dma_addr_t dma_buff; +#endif + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_init"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + + cap_dev_ptr = (struct vusb20 *) + _bsp_get_usb_capability_register_base(devnum); + + /* Get the base address of the VUSB_HS registers */ + usb_dev_ptr->dev_ptr = (struct vusb20 *)((u32)cap_dev_ptr + + (cap_dev_ptr->regs.capab.caplength_hciver & + EHCI_CAP_LEN_MASK)); + + /* + * Get the maximum number of endpoints supported by this + * USB controller + */ + usb_dev_ptr->max_endpoints = cap_dev_ptr->regs.capab.dcc_params & + VUSB20_MAX_ENDPTS_SUPPORTED; + + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + + temp = usb_dev_ptr->max_endpoints * 2; + + /**************************************************************** + * Consolidated memory allocation + ****************************************************************/ + total_memory = (temp * sizeof(struct vusb20_ep_queue_head) + 2048) + + (MAX_EP_TR_DESCRS * sizeof(struct vusb20_ep_tr) + 32) + + sizeof(struct scratch) * MAX_EP_TR_DESCRS; + + driver_memory = (u8 *)kzalloc(total_memory, GFP_KERNEL); + if (driver_memory == NULL) { +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_init, malloc failed"); +#endif + return USBERR_ALLOC; + } + +#ifdef CONFIG_DMA_NONCOHERENT + /**************************************************************** + * Flush the zeroed memory if cache is enabled + ****************************************************************/ + dma_buff = dma_map_single(msp71xx_get_dev_ptr()->dev, + driver_memory, total_memory, DMA_TO_DEVICE); + dma_unmap_single(msp71xx_get_dev_ptr()->dev, + dma_buff, total_memory, DMA_NONE); +#endif + + driver_memory = UNCAC_ADDR(driver_memory); + + /**************************************************************** + * Keep a pointer to driver memory alloctaion + ****************************************************************/ + usb_dev_ptr->driver_memory = driver_memory; + + /**************************************************************** + * Assign QH base + ****************************************************************/ + usb_dev_ptr->ep_queue_head_base = (struct vusb20_ep_queue_head *) + driver_memory; + driver_memory += temp * sizeof(struct vusb20_ep_queue_head) + 2048; + + /* Align the endpoint queue head to 2K boundary */ + usb_dev_ptr->ep_queue_head_ptr = (struct vusb20_ep_queue_head *) + USB_MEM2048_ALIGN((u32)usb_dev_ptr->ep_queue_head_base); + + /**************************************************************** + * Assign DTD base + ****************************************************************/ + usb_dev_ptr->dtd_base_ptr = (struct vusb20_ep_tr *)driver_memory; + driver_memory += MAX_EP_TR_DESCRS * sizeof(struct vusb20_ep_tr) + 32; + + /* Align the dTD base to 32 byte boundary */ + usb_dev_ptr->dtd_aligned_base_ptr = (struct vusb20_ep_tr *) + USB_MEM32_ALIGN((u32)usb_dev_ptr->dtd_base_ptr); + + /**************************************************************** + * Assign scratch structure base + ****************************************************************/ + /* Allocate memory for internal scratch structure */ + usb_dev_ptr->scratch_base = (struct scratch *)driver_memory; + +#ifndef __USB_OTG__ + /* Install the interrupt service routine */ + _bsp_install_isr(usb_dev_ptr->dev_vec, _usb_dci_vusb20_isr, NULL); +#endif /* __USB_OTG__ */ + + usb_dev_ptr->usb_state = USB_STATE_UNKNOWN; + + /* Initialize the VUSB_HS controller */ + _usb_dci_vusb20_chip_initialize((void *)usb_dev_ptr); + + usb_device_state_ptr = usb_dev_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_init, SUCCESSFUL"); +#endif + + return USB_OK; +} + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_chip_initialize + * Returned Value : USB_OK or error code + * Comments : + * Initializes the USB device controller. + * + ***************************************************************************/ +void _usb_dci_vusb20_chip_initialize(_usb_device_handle handle) +{ + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + volatile struct vusb20 * cap_dev_ptr; + volatile struct vusb20_ep_queue_head * ep_queue_head_ptr; + volatile struct vusb20_ep_tr * dtd_ptr; + u32 temp, i, port_control; + struct scratch * temp_scratch_ptr; + u32 status; + u32 otg_status; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_chip_initialize"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + cap_dev_ptr = (struct vusb20 *)_bsp_get_usb_capability_register_base( + usb_dev_ptr->dev_num); + + /* Stop the controller */ + dev_ptr->regs.op_dev.usb_cmd &= ~EHCI_CMD_RUN_STOP; + + /* Reset the controller to get default values */ + dev_ptr->regs.op_dev.usb_cmd = EHCI_CMD_CTRL_RESET; + + /* Wait for the controller reset to complete */ + while (dev_ptr->regs.op_dev.usb_cmd & EHCI_CMD_CTRL_RESET); + +#ifdef TRIP_WIRE + /* Program the controller to be the USB device controller */ + dev_ptr->regs.op_dev.usb_mode = + VUSBHS_MODE_CTRL_MODE_DEV | VUSBHS_MODE_SETUP_LOCK_DISABLE | + VUSBHS_MODE_BIG_ENDIAN | VUSBHS_MODE_STREAM_DISABLE; +#else + /* Program the controller to be the USB device controller */ + dev_ptr->regs.op_dev.usb_mode = + VUSBHS_MODE_CTRL_MODE_DEV | VUSBHS_MODE_BIG_ENDIAN | + VUSBHS_MODE_STREAM_DISABLE; +#endif + + status = dev_ptr->regs.op_dev.portscx[0]; + status = status & ~EHCI_STS_SER_SELECT; + dev_ptr->regs.op_dev.portscx[0] = status; + + temp = usb_dev_ptr->max_endpoints * 2; + + /* Initialize the internal dTD head and tail to NULL */ + usb_dev_ptr->dtd_head = NULL; + usb_dev_ptr->dtd_tail = NULL; + + /* Make sure the 16 MSBs of this register are 0s */ + dev_ptr->regs.op_dev.ep_setup_stat = 0; + + ep_queue_head_ptr = usb_dev_ptr->ep_queue_head_ptr; + + /* Initialize all device queue heads */ + for (i = 0; i < temp; i++) { + /* Interrupt on Setup packet */ + (ep_queue_head_ptr + i)->max_pkt_length = + (((u32)USB_MAX_CTRL_PAYLOAD << + VUSB_EP_QUEUE_HEAD_MAX_PKT_LEN_POS) | + VUSB_EP_QUEUE_HEAD_IOS); + (ep_queue_head_ptr + i)->next_dtd_ptr = + VUSB_EP_QUEUE_HEAD_NEXT_TERMINATE; + } + + /* Configure the Endpoint List Address */ + dev_ptr->regs.op_dev.ep_list_addr = virt_to_phys(ep_queue_head_ptr); + + if (cap_dev_ptr->regs.capab.hcs_params & + VUSB20_HCS_PARAMS_PORT_POWER_CONTROL_FLAG) { + port_control = dev_ptr->regs.op_dev.portscx[0]; + port_control &= ~EHCI_PORTSCX_W1C_BITS | + ~EHCI_PORTSCX_PORT_POWER; + dev_ptr->regs.op_dev.portscx[0] = port_control; + } + + dtd_ptr = usb_dev_ptr->dtd_aligned_base_ptr; + + temp_scratch_ptr = usb_dev_ptr->scratch_base; + + /* Enqueue all the dTDs */ + for (i = 0; i < MAX_EP_TR_DESCRS; i++) { + dtd_ptr->scratch_ptr = temp_scratch_ptr; + dtd_ptr->scratch_ptr->free = _usb_dci_vusb20_free_dtd; + /* Set the dTD to be invalid */ + dtd_ptr->next_tr_elem_ptr = VUSBHS_TD_NEXT_TERMINATE; + /* Set the Reserved fields to 0 */ + dtd_ptr->size_ioc_sts &= ~VUSBHS_TD_RESERVED_FIELDS; + dtd_ptr->scratch_ptr->private = (void *)usb_dev_ptr; + _usb_dci_vusb20_free_dtd((void *)dtd_ptr); + dtd_ptr++; + temp_scratch_ptr++; + } + + /* Initialize the endpoint 0 properties */ + dev_ptr->regs.op_dev.ep_ctrlx[0] = EHCI_EPCTRL_TX_DATA_TOGGLE_RST | + EHCI_EPCTRL_RX_DATA_TOGGLE_RST; + dev_ptr->regs.op_dev.ep_ctrlx[0] &= + ~(EHCI_EPCTRL_TX_EP_STALL | EHCI_EPCTRL_RX_EP_STALL); + + /* Enable OTG interrupts */ + dev_ptr->regs.op_dev.otgsc = VUSBHS_OTGSC_AVVIE; + + /* Enable USB interrupts */ + dev_ptr->regs.op_dev.usb_intr = EHCI_INTR_INT_EN | + EHCI_INTR_ERR_INT_EN | EHCI_INTR_PORT_CHANGE_DETECT_EN | + EHCI_INTR_RESET_EN | EHCI_INTR_DEVICE_SUSPEND; + + /* USB state */ + usb_dev_ptr->usb_state = USB_STATE_UNKNOWN; + + /* Set device state to be self powered and remote wakeup */ + usb_dev_ptr->usb_dev_state = USB_SELF_POWERED; + + /* get OTGSC status */ + otg_status = dev_ptr->regs.op_dev.otgsc; + if (otg_status & VUSBHS_OTGSC_AVV) { + dev_ptr->regs.op_dev.usb_cmd = EHCI_CMD_RUN_STOP; + } else { + /* Stop the controller */ + dev_ptr->regs.op_dev.usb_cmd &= ~EHCI_CMD_RUN_STOP; + } + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_chip_initialize, SUCCESSFUL"); +#endif +} + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_free_dtd + * Returned Value : void + * Comments : + * Enqueues a dTD onto the free DTD ring. + * + ***************************************************************************/ +void _usb_dci_vusb20_free_dtd(void * dtd_ptr) +{ + struct usb_dev_state * usb_dev_ptr = (struct usb_dev_state *) + ((struct vusb20_ep_tr *)dtd_ptr)->scratch_ptr->private; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_free_dtd"); +#endif + + /* + * This function can be called from any context, and it needs mutual + * exclusion with itself. + */ + spin_lock(&usb_dev_ptr->lock); + + /* + * Add the dTD to the free dTD queue (linked via private) and + * increment the tail to the next descriptor + */ + EHCI_DTD_QADD(usb_dev_ptr->dtd_head, usb_dev_ptr->dtd_tail, + (struct vusb20_ep_tr *)dtd_ptr); + usb_dev_ptr->dtd_entries++; + + spin_unlock(&usb_dev_ptr->lock); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_free_dtd, SUCCESSFUL"); +#endif +} + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_add_dtd + * Returned Value : USB_OK or error code + * Comments : + * Adds a device transfer desriptor(s) to the queue. + * + ***************************************************************************/ +u8 _usb_dci_vusb20_add_dtd( + _usb_device_handle handle, + struct xd * xd_ptr) +{ + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + volatile struct vusb20_ep_tr * dtd_ptr, * temp_dtd_ptr, + * first_dtd_ptr = NULL; + volatile struct vusb20_ep_queue_head * ep_queue_head_ptr; + u32 curr_pkt_len, remaining_len; + u32 curr_offset, temp, bit_pos; + + /********************************************************************* + * For a optimal implementation, we need to detect the fact that + * we are adding DTD to an empty list. If list is empty, we can + * actually skip several programming steps esp. those for ensuring + * that there is no race condition.The following boolean will be + * useful in skipping some code here. + ********************************************************************/ + bool list_empty = false; +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_add_dtd"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + + remaining_len = xd_ptr->wtotallength; + + curr_offset = 0; + temp = 2 * xd_ptr->ep_num + xd_ptr->bdirection; + bit_pos = 1 << (16 * xd_ptr->bdirection + xd_ptr->ep_num); + + ep_queue_head_ptr = (struct vusb20_ep_queue_head *)phys_to_virt( + dev_ptr->regs.op_dev.ep_list_addr) + temp; + + /********************************************************************* + * This loops iterates through the length of the transfer and divides + * the data in to DTDs each handling the a max of 0x4000 bytes of + * data. + * The first DTD in the list is stored in a pointer called + * first_dtd_ptr. This pointer is later linked in to QH for processing + * by the hardware. + ********************************************************************/ + + do { + /* Check if we need to split the transfer into multiple dTDs */ + if (remaining_len > VUSB_EP_MAX_LENGTH_TRANSFER) + curr_pkt_len = VUSB_EP_MAX_LENGTH_TRANSFER; + else + curr_pkt_len = remaining_len; + + remaining_len -= curr_pkt_len; + + /* Get a dTD from the queue */ + EHCI_DTD_QGET(usb_dev_ptr->dtd_head, + usb_dev_ptr->dtd_tail, dtd_ptr); + + if (!dtd_ptr) { +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_add_dtd, SUCCESSFUL"); +#endif + return USBERR_TR_FAILED; + } + + usb_dev_ptr->dtd_entries--; + + if (curr_offset == 0) + first_dtd_ptr = dtd_ptr; + +#ifdef CONFIG_DMA_NONCOHERENT + /************************************************************ + * memset does not bypass the cache and hence we must + * use DTD pointer to update the memory and bypass the cache. + * If your DTD are allocated from an uncached regigio, you + * can eliminitate this approach and switch back to + * memset. + ***********************************************************/ + dtd_ptr->next_tr_elem_ptr = 0; + dtd_ptr->size_ioc_sts = 0; + dtd_ptr->buff_ptr0 = 0; + dtd_ptr->buff_ptr1 = 0; + dtd_ptr->buff_ptr2 = 0; + dtd_ptr->buff_ptr3 = 0; + dtd_ptr->buff_ptr4 = 0; +#else + /* + * Zero the dTD. Leave the last 4 bytes as that is + * the scratch pointer + */ + memset((void *)dtd_ptr, 0, sizeof(struct vusb20_ep_tr) - 4); +#endif + + /* Initialize the dTD */ + dtd_ptr->scratch_ptr->private = handle; + + /* Set the Terminate bit */ + dtd_ptr->next_tr_elem_ptr = VUSB_EP_QUEUE_HEAD_NEXT_TERMINATE; + + + /************************************************************ + * TODO: For hig-speed and high-bandwidth ISO IN endpoints, + * we must initialize the multiplied field so that Host can + * issues multiple IN transactions on the endpoint. See the + * DTD data structure for MultiIO field. + * + * S Garg 11/06/2003 + ***********************************************************/ + + /* Fill in the transfer size */ + if (!remaining_len) + dtd_ptr->size_ioc_sts = + ((curr_pkt_len << VUSBHS_TD_LENGTH_BIT_POS) | + VUSBHS_TD_IOC | VUSBHS_TD_STATUS_ACTIVE); + else + dtd_ptr->size_ioc_sts = + ((curr_pkt_len << VUSBHS_TD_LENGTH_BIT_POS) | + VUSBHS_TD_STATUS_ACTIVE); + + /* Set the reserved field to 0 */ + dtd_ptr->size_ioc_sts &= ~VUSBHS_TD_RESERVED_FIELDS; + + /* 4K apart buffer page pointers */ + dtd_ptr->buff_ptr0 = virt_to_phys(xd_ptr->wstartaddress) + + curr_offset; + dtd_ptr->buff_ptr1 = dtd_ptr->buff_ptr0 + 4096; + dtd_ptr->buff_ptr2 = dtd_ptr->buff_ptr1 + 4096; + dtd_ptr->buff_ptr3 = dtd_ptr->buff_ptr2 + 4096; + dtd_ptr->buff_ptr4 = dtd_ptr->buff_ptr3 + 4096; + + curr_offset += curr_pkt_len; + + /* + * Maintain the first and last device transfer descriptor per + * endpoint and direction. + */ + if (!usb_dev_ptr->ep_dtd_heads[temp]) { + usb_dev_ptr->ep_dtd_heads[temp] = dtd_ptr; + /*********************************************** + * If list does not have a head, it means that + * list is empty. An empty condition is detected. + ***********************************************/ + list_empty = true; + } + + /* + * Check if the transfer is to be queued at the end or + * beginning + */ + temp_dtd_ptr = usb_dev_ptr->ep_dtd_tails[temp]; + + /* Remember which XD to use for this dTD */ + dtd_ptr->scratch_ptr->xd_for_this_dtd = (void *)xd_ptr; + + /* New tail */ + usb_dev_ptr->ep_dtd_tails[temp] = dtd_ptr; + if (temp_dtd_ptr) { + /* + * Should not do |=. The Terminate bit should + * be zero + */ + temp_dtd_ptr->next_tr_elem_ptr = virt_to_phys(dtd_ptr); + } + } while (remaining_len); + + /************************************************************** + * In the loop above DTD has already been added to the list + * However endpoint has not been primed yet. If list is not + * empty we need safter ways to add DTD to the existing list. + * Else we just skip to adding DTD to QH safely. + **************************************************************/ + + if (!list_empty) { +#ifdef TRIP_WIRE + /********************************************************* + * Hardware v3.2+ require the use of semaphore to ensure + * that QH is safely updated. + *********************************************************/ + + /********************************************************* + * Check the prime bit. If set goto done + *********************************************************/ + if (dev_ptr->regs.op_dev.ep_prime & bit_pos) + goto done; + + bool read_safe = false; + while (!read_safe) { + /**************************************************** + * start with setting the semaphores + ***************************************************/ + dev_ptr->regs.op_dev.usb_cmd |= + EHCI_CMD_ATDTW_TRIPWIRE_SET; + + /**************************************************** + * Read the endpoint status + ***************************************************/ + if (dev_ptr->regs.op_dev.ep_status & bit_pos) + read_safe = true; + } + + /********************************************************* + * Clear the semaphore + *********************************************************/ + dev_ptr->regs.op_dev.usb_cmd &= + EHCI_CMD_ATDTW_TRIPWIRE_CLEAR; + +#else /* workaround old method */ + + /* Start CR 1015 */ + /* Prime the Endpoint */ + dev_ptr->regs.op_dev.ep_prime = bit_pos; + + /* old workaround will be compiled */ + if (!(dev_ptr->regs.op_dev.ep_status & bit_pos)) { + /* Wait for the ep_prime to go to zero */ + while (dev_ptr->regs.op_dev.ep_prime & bit_pos); + + if (dev_ptr->regs.op_dev.ep_status & bit_pos) { + /* + * The endpoint was not primed so no + * other transfers on the queue. + */ + printk(KERN_ERR "1 prime ERR %8x\r\n", + (int)bit_pos); + goto done; + } + } else { + printk(KERN_ERR "2 prime ERR %8x\r\n", (int)bit_pos); + goto done; + } + + /* No other transfers on the queue */ + ep_queue_head_ptr->next_dtd_ptr = virt_to_phys(first_dtd_ptr); + ep_queue_head_ptr->size_ioc_int_sts = 0; + + /* Prime the Endpoint */ + dev_ptr->regs.op_dev.ep_prime = bit_pos; +#endif + } else { + /* No other transfers on the queue */ + ep_queue_head_ptr->next_dtd_ptr = virt_to_phys(first_dtd_ptr); + ep_queue_head_ptr->size_ioc_int_sts = 0; + + /* Prime the Endpoint */ + dev_ptr->regs.op_dev.ep_prime = bit_pos; + } + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_add_dtd, SUCCESSFUL"); +#endif + +done: +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_add_dtd, SUCCESSFUL"); +#endif + /* End CR 1015 */ + return USB_OK; +} + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_send_data + * Returned Value : USB_OK or error code + * Comments : + * Sends data by adding and executing the dTD. Non-blocking. + * + ***************************************************************************/ +u8 _usb_dci_vusb20_send_data( + _usb_device_handle handle, + struct xd * xd_ptr) +{ +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_send_data, SUCCESSFUL"); +#endif + + /* Add and execute the device transfer descriptor */ + return _usb_dci_vusb20_add_dtd(handle, xd_ptr); +} + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_recv_data + * Returned Value : USB_OK or error code + * Comments : + * Receives data by adding and executing the dTD. Non-blocking. + * + ***************************************************************************/ +u8 _usb_dci_vusb20_recv_data( + _usb_device_handle handle, + struct xd * xd_ptr) +{ +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_recv_data, SUCCESSFUL"); +#endif + + /* Add and execute the device transfer descriptor */ + return _usb_dci_vusb20_add_dtd(handle, xd_ptr); +} + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_process_tr_complete + * Returned Value : None + * Comments : + * Services transaction complete interrupt + * + ***************************************************************************/ +void _usb_dci_vusb20_process_tr_complete(_usb_device_handle handle) +{ + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + volatile struct vusb20_ep_tr * dtd_ptr; + volatile struct vusb20_ep_tr * temp_dtd_ptr; + volatile struct vusb20_ep_queue_head * ep_queue_head_ptr; + u32 temp, i, ep_num, direction, bit_pos; + u32 remaining_length = 0; + u32 actual_transfer_length = 0; + u32 errors = 0; + struct xd * xd_ptr; + struct xd * temp_xd_ptr = NULL; + u8 * buff_start_address = NULL; + + usb_dev_ptr = (struct usb_dev_state *)handle; + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_process_tr_complete"); +#endif + + /* + * We use separate loops for ep_setup_stat and ep_complete because the + * setup packets are to be read ASAP. + */ + + /* Process all Setup packet received interrupts */ + bit_pos = dev_ptr->regs.op_dev.ep_setup_stat; + if (bit_pos) { + for (i = 0; i < 16; i++) { + if (bit_pos & (1 << i)) + _usb_device_call_service( + handle, i, true, 0, 0, 8, 0); + } + } + + /* + * Don't clear the endpoint setup status register here. It is + * cleared as a setup packet is read out of the buffer. + */ + + /* Process non-setup transaction complete interrupts */ + bit_pos = dev_ptr->regs.op_dev.ep_complete; + + /* Clear the bits in the register */ + dev_ptr->regs.op_dev.ep_complete = bit_pos; + if (bit_pos) { + /* Get the endpoint number and the direction of transfer */ + for (i = 0; i < 32; i++) { + if (bit_pos & (1 << i)) { + if (i > 15) { + ep_num = (i - 16); + direction = 1; + } else { + ep_num = i; + direction = 0; + } + + temp = 2 * ep_num + direction; + + /* Get the first dTD */ + dtd_ptr = usb_dev_ptr->ep_dtd_heads[temp]; + + ep_queue_head_ptr = + (struct vusb20_ep_queue_head *) + phys_to_virt( + dev_ptr->regs.op_dev.ep_list_addr) + + temp; + + /* + * Process all the dTDs for respective + * transfers + */ + while (dtd_ptr && + ((u32)dtd_ptr & 0x1ffffffe)) { + if (dtd_ptr->size_ioc_sts & + VUSBHS_TD_STATUS_ACTIVE) { + /* + * No more dTDs to process. + * Next one is owned by VUSB. + */ + break; + } + + /* + * Get the correct internal transfer + * descriptor + */ + xd_ptr = (struct xd *)dtd_ptr-> + scratch_ptr->xd_for_this_dtd; + if (xd_ptr) { + buff_start_address = + xd_ptr->wstartaddress; + actual_transfer_length = + xd_ptr->wtotallength; + temp_xd_ptr = xd_ptr; + } + + /* Get the address of the next dTD */ + temp_dtd_ptr = (struct vusb20_ep_tr *) + ((u32)phys_to_virt( + dtd_ptr->next_tr_elem_ptr) & + VUSBHS_TD_ADDR_MASK); + + /* Read the errors */ + errors = dtd_ptr->size_ioc_sts & + VUSBHS_TD_ERROR_MASK; + if (!errors) { + /* + * No errors. + * Get the length of transfer + * from the current dTD. + */ + remaining_length += (dtd_ptr-> + size_ioc_sts & + VUSB_EP_TR_PACKET_SIZE) + >> 16; + actual_transfer_length -= + remaining_length; + } else if (errors & + VUSBHS_TD_STATUS_HALTED) { + /* + * Clear the errors and + * Halt condition. + */ + ep_queue_head_ptr-> + size_ioc_int_sts &= + ~errors; + } + + /* Retire the processed dTD */ + _usb_dci_vusb20_cancel_transfer( + handle, ep_num, direction); + if (!(temp_dtd_ptr && + ((u32)temp_dtd_ptr & + 0x1ffffffe))) { + /* + * Transfer complete. Call the + * register service function + * for the endpoint. + */ + _usb_device_call_service( + handle, ep_num, + false, direction, + buff_start_address, + actual_transfer_length, + errors); + } else if ((u32)temp_dtd_ptr-> + scratch_ptr-> + xd_for_this_dtd != + (u32)temp_xd_ptr) { + /* + * Transfer complete. + * Call the register + * service function + * for the endpoint. + */ + _usb_device_call_service( + handle, ep_num, + false, direction, + buff_start_address, + actual_transfer_length, + errors); + remaining_length = 0; + } + dtd_ptr = temp_dtd_ptr; + errors = 0; + } + } + } + } + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_process_tr_complete, SUCCESSFUL"); +#endif +} + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_isr + * Returned Value : None + * Comments : + * Services all the VUSB_HS interrupt sources + * + ***************************************************************************/ +void _usb_dci_vusb20_isr(void) +{ + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + u32 otg_status; + u32 run_status; + u32 status; + u32 int_ena; + + usb_dev_ptr = (struct usb_dev_state *)usb_device_state_ptr; +#ifndef __USB_OTG__ + in_isr = true; +#endif + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_isr"); +#endif + + /* get interrupt enables */ + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + int_ena = dev_ptr->regs.op_dev.usb_intr; + + /* clear USB interrupts */ + dev_ptr->regs.op_dev.usb_intr = 0; + + /* get OTGSC status */ + otg_status = dev_ptr->regs.op_dev.otgsc; + + /* clear OTGSC interrupts */ + dev_ptr->regs.op_dev.otgsc &= VUSBHS_OTGSC_AVVIS; + + if (otg_status & VUSBHS_OTGSC_AVV) { + /* Set the Run bit in the command register if stopped */ + run_status = dev_ptr->regs.op_dev.usb_cmd & EHCI_CMD_RUN_STOP; + if (!run_status) + dev_ptr->regs.op_dev.usb_cmd = EHCI_CMD_RUN_STOP; + } else { + /* Stop the controller */ + dev_ptr->regs.op_dev.usb_cmd &= ~EHCI_CMD_RUN_STOP; + } + for (;;) { + status = dev_ptr->regs.op_dev.usb_sts; + if (!(status & int_ena)) + break; + + /* Clear all the interrupts occured */ + dev_ptr->regs.op_dev.usb_sts = status; + + if (status & EHCI_STS_RESET & int_ena) + _usb_dci_vusb20_process_reset((void *)usb_dev_ptr); + + if (status & EHCI_STS_PORT_CHANGE & int_ena) + _usb_dci_vusb20_process_port_change( + (void *)usb_dev_ptr); + + if (status & EHCI_STS_ERR & int_ena) + _usb_dci_vusb20_process_error((void *)usb_dev_ptr); + + if (status & EHCI_STS_SOF & int_ena) + _usb_dci_vusb20_process_SOF((void *)usb_dev_ptr); + + if (status & EHCI_STS_INT & int_ena) + _usb_dci_vusb20_process_tr_complete( + (void *)usb_dev_ptr); + + if (status & EHCI_STS_SUSPEND & int_ena) { + _usb_dci_vusb20_process_suspend((void *)usb_dev_ptr); + dev_ptr->regs.op_dev.usb_intr = int_ena; + return; + } + } + dev_ptr->regs.op_dev.usb_intr = int_ena; + +#ifndef __USB_OTG__ + in_isr = false; +#endif + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_isr, SUCCESSFUL"); +#endif +} + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_process_reset + * Returned Value : None + * Comments : + * Services reset interrupt + * + ***************************************************************************/ +void _usb_dci_vusb20_process_reset(_usb_device_handle handle) +{ + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + u32 temp; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_process_reset"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + + /* + * Inform the application so that it can cancel all + * previously queued transfers + */ + _usb_device_call_service(usb_dev_ptr, USB_SERVICE_BUS_RESET, + 0, 0, 0, 0, 0); + + /* The address bits are past bit 25-31. Set the address */ + dev_ptr->regs.op_dev.device_addr &= ~0xFE000000; + + /* Clear all the setup token semaphores */ + temp = dev_ptr->regs.op_dev.ep_setup_stat; + dev_ptr->regs.op_dev.ep_setup_stat = temp; + + /* Clear all the endpoint complete status bits */ + temp = dev_ptr->regs.op_dev.ep_complete; + dev_ptr->regs.op_dev.ep_complete = temp; + + /* Wait until all ep_prime bits cleared */ + while (dev_ptr->regs.op_dev.ep_prime & 0xFFFFFFFF); + + /* Write 1s to the Flush register */ + dev_ptr->regs.op_dev.ep_flush = 0xFFFFFFFF; + + if (dev_ptr->regs.op_dev.portscx[0] & EHCI_PORTSCX_PORT_RESET) { + usb_dev_ptr->bus_resetting = true; + usb_dev_ptr->usb_state = USB_STATE_POWERED; + } else { + /* re-initialize */ + _usb_dci_vusb20_chip_initialize((void *)usb_dev_ptr); +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE( + "_usb_dci_vusb20_process_reset, SUCCESSFUL reinit hw"); +#endif + return; + } + + _usb_device_call_service(usb_dev_ptr, USB_SERVICE_BUS_RESET, + 0, 0, 0, 0, 0); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_process_reset, SUCCESSFUL"); +#endif +} + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_process_suspend + * Returned Value : None + * Comments : + * Services suspend interrupt + * + ***************************************************************************/ +void _usb_dci_vusb20_process_suspend(_usb_device_handle handle) +{ + struct usb_dev_state * usb_dev_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_process_suspend"); +#endif + usb_dev_ptr = (struct usb_dev_state *)handle; + + usb_dev_ptr->usb_dev_state_b4_suspend = usb_dev_ptr->usb_state; + + usb_dev_ptr->usb_state = USB_STATE_SUSPEND; + + /* Inform the upper layers */ + _usb_device_call_service(usb_dev_ptr, USB_SERVICE_SLEEP, + 0, 0, 0, 0, 0); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_process_suspend, SUCCESSFUL"); +#endif +} + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_process_SOF + * Returned Value : None + * Comments : + * Services SOF interrupt + * + ***************************************************************************/ +void _usb_dci_vusb20_process_SOF(_usb_device_handle handle) +{ + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_process_SOF"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + + /* Inform the upper layer */ + _usb_device_call_service(usb_dev_ptr, USB_SERVICE_SOF, 0, 0, 0, + dev_ptr->regs.op_dev.usb_frindex, 0); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_process_SOF, SUCCESSFUL"); +#endif +} + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_process_port_change + * Returned Value : None + * Comments : + * Services port change detect interrupt + * + ***************************************************************************/ +void _usb_dci_vusb20_process_port_change(_usb_device_handle handle) +{ + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_process_port_change"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + + if (usb_dev_ptr->bus_resetting) { + /* Bus reset operation complete */ + usb_dev_ptr->bus_resetting = false; + } + + if (!(dev_ptr->regs.op_dev.portscx[0] & EHCI_PORTSCX_PORT_RESET)) { + /* Get the speed */ + if (dev_ptr->regs.op_dev.portscx[0] & + EHCI_PORTSCX_PORT_HIGH_SPEED) + usb_dev_ptr->dev_speed = USB_DEV_SPEED_HIGH; + else + usb_dev_ptr->dev_speed = USB_DEV_SPEED_FULL; + + /* Inform the upper layers of the speed of operation */ + _usb_device_call_service(usb_dev_ptr, + USB_SERVICE_SPEED_DETECTION, + 0, 0, 0, usb_dev_ptr->dev_speed, 0); + } + + if (dev_ptr->regs.op_dev.portscx[0] & EHCI_PORTSCX_PORT_SUSPEND) { + usb_dev_ptr->usb_dev_state_b4_suspend = usb_dev_ptr->usb_state; + usb_dev_ptr->usb_state = USB_STATE_SUSPEND; + + /* Inform the upper layers */ + _usb_device_call_service(usb_dev_ptr, USB_SERVICE_SUSPEND, + 0, 0, 0, 0, 0); + } + + if (!(dev_ptr->regs.op_dev.portscx[0] & EHCI_PORTSCX_PORT_SUSPEND) && + (usb_dev_ptr->usb_state == USB_STATE_SUSPEND)) { + usb_dev_ptr->usb_state = usb_dev_ptr->usb_dev_state_b4_suspend; + /* Inform the upper layers */ + _usb_device_call_service(usb_dev_ptr, USB_SERVICE_RESUME, + 0, 0, 0, 0, 0); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_process_port_change, " + "SUCCESSFUL, resumed"); +#endif + return; + } + + usb_dev_ptr->usb_state = USB_STATE_DEFAULT; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_process_port_change, SUCCESSFUL"); +#endif +} + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_process_error + * Returned Value : None + * Comments : + * Services error interrupt + * + ***************************************************************************/ +void _usb_dci_vusb20_process_error(_usb_device_handle handle) +{ + struct usb_dev_state * usb_dev_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_process_error"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + + /* Increment the error count */ + usb_dev_ptr->errors++; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_process_error, SUCCESSFUL"); +#endif +} + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_set_address + * Returned Value : None + * Comments : + * Sets the newly assigned device address + * + ***************************************************************************/ +void _usb_dci_vusb20_set_address( + _usb_device_handle handle, + u8 address) +{ + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_set_address"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + + /* The address bits are past bit 25-31. Set the address */ + dev_ptr->regs.op_dev.device_addr = + (u32)address << VUSBHS_ADDRESS_BIT_SHIFT; + + usb_dev_ptr->usb_state = USB_STATE_ADDRESS; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_set_address, SUCCESSFUL"); +#endif +} + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_get_setup_data + * Returned Value : None + * Comments : + * Reads the Setup data from the 8-byte setup buffer + * + ***************************************************************************/ +void _usb_dci_vusb20_get_setup_data( + _usb_device_handle handle, + u8 ep_num, + u8 * buffer_ptr) +{ + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + volatile struct vusb20_ep_queue_head * ep_queue_head_ptr; + u32 temp; + struct vusbhs_setup * setup_ptr; +#ifdef CONFIG_DMA_NONCOHERENT + int i; +#endif + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_get_setup_data"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + + /* Get the endpoint queue head */ + ep_queue_head_ptr = (struct vusb20_ep_queue_head *)phys_to_virt( + dev_ptr->regs.op_dev.ep_list_addr) + + 2 * ep_num + USB_RECV; + + /******************************************************************** + * CR 1219. Hardware versions 2.3+ have a implementation of tripwire + * semaphore mechanism that requires that we read the contents of + * QH safely by using the semaphore. Read the USBHS document to under + * stand how the code uses the semaphore mechanism. The following are + * the steps in brief + * + * 1. USBCMD Write 1 to Setup Tripwire in register. + * 2. Duplicate contents of dQH.StatusBuffer into local software byte + * array. + * 3. Read Setup TripWire in register. (if set - continue; if + * cleared goto 1.) + * 4. Write '0' to clear Setup Tripwire in register. + * 5. Process setup packet using local software byte array copy and + * execute status/handshake phases. + *******************************************************************/ +#ifdef TRIP_WIRE + /* If semaphore mechanism is used the following code is compiled in */ + bool read_safe = false; + while (!read_safe) { + /********************************************************* + * start with setting the semaphores + *********************************************************/ + dev_ptr->regs.op_dev.usb_cmd |= EHCI_CMD_SETUP_TRIPWIRE_SET; + + /********************************************************* + * Duplicate the contents of SETUP buffer to our buffer + *********************************************************/ +#ifdef CONFIG_DMA_NONCOHERENT + for (i = 0; i < 8; i++) + *(buffer_ptr + i) = ep_queue_head_ptr->setup_buffer[i]; +#else + /* Copy the setup packet to private buffer */ + memcpy(buffer_ptr, (u8 *)ep_queue_head_ptr->setup_buffer, 8); +#endif + /********************************************************* + * If setup tripwire semaphore is cleared by hardware it + * means that we have a danger and we need to restart. + * else we can exit out of loop safely. + *********************************************************/ + if (dev_ptr->regs.op_dev.usb_cmd & + EHCI_CMD_SETUP_TRIPWIRE_SET) { + /* we can proceed exiting out of loop */ + read_safe = true; + } + } + + /********************************************************* + * Clear the semaphore bit now + *********************************************************/ + dev_ptr->regs.op_dev.usb_cmd &= EHCI_CMD_SETUP_TRIPWIRE_CLEAR; + +#else + /* when semaphore is not used */ +#ifdef CONFIG_DMA_NONCOHERENT + for (i = 0; i < 8; i++) + *(buffer_ptr + i) = ep_queue_head_ptr->setup_buffer[i]; +#else + /* Copy the setup packet to private buffer */ + memcpy(buffer_ptr, (u8 *)ep_queue_head_ptr->setup_buffer, 8); +#endif +#endif + + /* Clear the bit in the ep_setup_stat */ + dev_ptr->regs.op_dev.ep_setup_stat = 1 << ep_num; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_get_setup_data, SUCCESSFUL"); +#endif + setup_ptr = (struct vusbhs_setup *)buffer_ptr; + temp = USB_SWAP(*((u32 *)buffer_ptr)); + *(u32 *)buffer_ptr = temp; + buffer_ptr += 4; + temp = USB_SWAP(*((u32 *)buffer_ptr)); + *(u32 *)buffer_ptr = temp; + setup_ptr->value = USB_WORD_SWAP(setup_ptr->value); + setup_ptr->length = USB_WORD_SWAP(setup_ptr->length); + setup_ptr->index = USB_WORD_SWAP(setup_ptr->index); +} + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_init_endpoint + * Returned Value : None + * Comments : + * Initializes the specified endpoint and the endpoint queue head + * + ***************************************************************************/ +u8 _usb_dci_vusb20_init_endpoint( + _usb_device_handle handle, + struct xd * xd_ptr) +{ + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + volatile struct vusb20_ep_queue_head * ep_queue_head_ptr; + u32 bit_pos; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_init_endpoint"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + + /* Get the endpoint queue head address */ + ep_queue_head_ptr = (struct vusb20_ep_queue_head *)phys_to_virt( + dev_ptr->regs.op_dev.ep_list_addr) + + 2 * xd_ptr->ep_num + xd_ptr->bdirection; + + bit_pos = 1 << (16 * xd_ptr->bdirection + xd_ptr->ep_num); + + /* Check if the Endpoint is Primed */ + if (!(dev_ptr->regs.op_dev.ep_prime & bit_pos) && + !(dev_ptr->regs.op_dev.ep_status & bit_pos)) { + /* + * Set the max packet length, interrupt on Setup and + * Mult fields + */ + if (xd_ptr->ep_type == USB_ISOCHRONOUS_ENDPOINT) { + /* Mult bit should be set for isochronous endpoints */ + ep_queue_head_ptr->max_pkt_length = + (xd_ptr->wmaxpacketsize << 16) | + ((xd_ptr->max_pkts_per_uframe ? + xd_ptr->max_pkts_per_uframe : 1) << + VUSB_EP_QUEUE_HEAD_MULT_POS); + } else { + if (xd_ptr->ep_type != USB_CONTROL_ENDPOINT) { + ep_queue_head_ptr->max_pkt_length = + (xd_ptr->wmaxpacketsize << 16) | + (xd_ptr->dont_zero_terminate ? + VUSB_EP_QUEUE_HEAD_ZERO_LEN_TER_SEL : + 0); + } else { + ep_queue_head_ptr->max_pkt_length = + (xd_ptr->wmaxpacketsize << 16) | + VUSB_EP_QUEUE_HEAD_IOS; + } + } + + /* + * Enable the endpoint for Rx and Tx and set the + * endpoint type + */ + dev_ptr->regs.op_dev.ep_ctrlx[xd_ptr->ep_num] |= + (xd_ptr->bdirection ? + (EHCI_EPCTRL_TX_ENABLE | + EHCI_EPCTRL_TX_DATA_TOGGLE_RST) : + (EHCI_EPCTRL_RX_ENABLE | + EHCI_EPCTRL_RX_DATA_TOGGLE_RST)) | + (xd_ptr->ep_type << (xd_ptr->bdirection ? + EHCI_EPCTRL_TX_EP_TYPE_SHIFT : + EHCI_EPCTRL_RX_EP_TYPE_SHIFT)); + } else { +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_init_endpoint, " + "error ep init"); +#endif + return USBERR_EP_INIT_FAILED; + } + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_init_endpoint, SUCCESSFUL"); +#endif + + return USB_OK; +} + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_get_transfer_status + * Returned Value : USB_OK or error code + * Comments : + * Gets the status of a transfer + * + ***************************************************************************/ +u8 _usb_dci_vusb20_get_transfer_status( + _usb_device_handle handle, + u8 ep_num, + u8 direction) +{ + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20_ep_tr * dtd_ptr; + struct xd * xd_ptr; + u8 status; + + usb_dev_ptr = (struct usb_dev_state *)handle; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_get_transfer_status"); +#endif + + /* Unlink the dTD */ + dtd_ptr = usb_dev_ptr->ep_dtd_heads[2 * ep_num + direction]; + if (dtd_ptr) { + /* Get the transfer descriptor for the dTD */ + xd_ptr = (struct xd *)dtd_ptr->scratch_ptr->xd_for_this_dtd; + status = xd_ptr->bstatus; + } else + status = USB_STATUS_IDLE; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_get_transfer_status, SUCCESSFUL"); +#endif + + return status; +} diff --git a/drivers/usb/gadget/pmc-sierra/vusbhs_dev_shut.c b/drivers/usb/gadget/pmc-sierra/vusbhs_dev_shut.c new file mode 100644 index 0000000..80509bb --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/vusbhs_dev_shut.c @@ -0,0 +1,73 @@ +/* + * vusbhs_dev_shut.c -- This file contains the VUSB_HS Device Controller + * interface function to shutdown the device. + * + * Copyright (C) 1989-2006 Chipidea + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "devapi.h" +#include "usbprv_dev.h" + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_shutdown + * Returned Value : None + * Comments : + * Shuts down the VUSB_HS Device + * + ***************************************************************************/ +void _usb_dci_vusb20_shutdown(_usb_device_handle handle) +{ + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_shutdown"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + + /* Disable interrupts */ + dev_ptr->regs.op_dev.usb_intr &= + ~(EHCI_INTR_INT_EN | EHCI_INTR_ERR_INT_EN | + EHCI_INTR_PORT_CHANGE_DETECT_EN | EHCI_INTR_RESET_EN); + + /* Reset the Run the bit in the command register to stop VUSB */ + dev_ptr->regs.op_dev.usb_cmd &= ~EHCI_CMD_RUN_STOP; + + /* Reset the controller to get default values */ + dev_ptr->regs.op_dev.usb_cmd = EHCI_CMD_CTRL_RESET; + + kfree((void *)usb_dev_ptr->driver_memory); + +#if 0 + /* Free all the Endpoint Queue Heads */ + kfree((void *)usb_dev_ptr->ep_queue_head_base); + + /* Free all dTDs */ + kfree((void *)usb_dev_ptr->dtd_base_ptr); + + /* Free scratch structures */ + kfree((void *)usb_dev_ptr->scratch_base); +#endif + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_shutdown, SUCCESSFUL"); +#endif +} diff --git a/drivers/usb/gadget/pmc-sierra/vusbhs_dev_utl.c b/drivers/usb/gadget/pmc-sierra/vusbhs_dev_utl.c new file mode 100644 index 0000000..c8be2d7 --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/vusbhs_dev_utl.c @@ -0,0 +1,265 @@ +/* + * vusbhs_dev_utl.c -- This file contains the VUSB_HS Device Controller + * interface functions. + * + * Copyright (C) 1989-2006 Chipidea + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "devapi.h" +#include "usbprv_dev.h" + +#define USB_TEST_MODE_TEST_PACKET_LENGTH 53 + +/* + * Test packet for Test Mode : + * TEST_PACKET. USB 2.0 Specification section 7.1.20 + */ +u8 test_packet[USB_TEST_MODE_TEST_PACKET_LENGTH] = +{ + /* Synch */ + /* DATA 0 PID */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, + 0xAA, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, + 0xEE, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7F, 0xBF, 0xDF, + 0xEF, 0xF7, 0xFB, 0xFD, 0xFC, 0x7E, 0xBF, 0xDF, + 0xEF, 0xF7, 0xFB, 0xFD, 0x7E +}; + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_assert_resume + * Returned Value : None + * Comments : + * Resume signalling for remote wakeup + * + ***************************************************************************/ +void _usb_dci_vusb20_assert_resume(_usb_device_handle handle) +{ + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + u32 temp; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_assert_resume"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + + /* Assert the Resume signal */ + temp = dev_ptr->regs.op_dev.portscx[0]; + temp &= ~EHCI_PORTSCX_W1C_BITS; + temp |= EHCI_PORTSCX_PORT_FORCE_RESUME; + dev_ptr->regs.op_dev.portscx[0] = temp; + + /* + * Port change interrupt will be asserted at the end of resume + * operation. + */ + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_assert_resume, SUCCESSFUL"); +#endif +} + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_stall_endpoint + * Returned Value : None + * Comments : + * Stalls the specified endpoint + * + ***************************************************************************/ +void _usb_dci_vusb20_stall_endpoint( + _usb_device_handle handle, + u8 ep_num, + u8 direction) +{ + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + volatile struct vusb20_ep_queue_head * ep_queue_head_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_stall_endpoint"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + + /* Get the endpoint queue head address */ + ep_queue_head_ptr = (struct vusb20_ep_queue_head *)phys_to_virt( + dev_ptr->regs.op_dev.ep_list_addr) + + 2 * ep_num + direction; + + /* Stall the endpoint for Rx or Tx and set the endpoint type */ + if (ep_queue_head_ptr->max_pkt_length & VUSB_EP_QUEUE_HEAD_IOS) { + /* This is a control endpoint so STALL both directions */ + dev_ptr->regs.op_dev.ep_ctrlx[ep_num] |= + EHCI_EPCTRL_TX_EP_STALL | EHCI_EPCTRL_RX_EP_STALL; + } else { + dev_ptr->regs.op_dev.ep_ctrlx[ep_num] |= + direction ? EHCI_EPCTRL_TX_EP_STALL : + EHCI_EPCTRL_RX_EP_STALL; + } + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_stall_endpoint, SUCCESSFUL"); +#endif +} + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_unstall_endpoint + * Returned Value : None + * Comments : + * Unstall the specified endpoint in the specified direction + * + ***************************************************************************/ +void _usb_dci_vusb20_unstall_endpoint( + _usb_device_handle handle, + u8 ep_num, + u8 direction) +{ + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_unstall_endpoint"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + + /* Enable the endpoint for Rx or Tx and set the endpoint type */ + dev_ptr->regs.op_dev.ep_ctrlx[ep_num] &= + direction ? ~EHCI_EPCTRL_TX_EP_STALL : + ~EHCI_EPCTRL_RX_EP_STALL; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_unstall_endpoint, SUCCESSFUL"); +#endif +} + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_get_endpoint_status + * Returned Value : None + * Comments : + * Gets the endpoint status + * + ***************************************************************************/ +u8 _usb_dci_vusb20_get_endpoint_status( + _usb_device_handle handle, + u8 ep) +{ + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_get_endpoint_status"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_get_endpoint_status, SUCCESSFUL"); +#endif + + return (dev_ptr->regs.op_dev.ep_ctrlx[ep] & + (EHCI_EPCTRL_TX_EP_STALL | EHCI_EPCTRL_RX_EP_STALL)) ? 1 : 0; +} + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_set_test_mode + * Returned Value : None + * Comments : + * sets/resets the test mode + * + ***************************************************************************/ +void _usb_dci_vusb20_set_test_mode( + _usb_device_handle handle, + u16 test_mode) +{ + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + u32 temp; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_set_test_mode"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + + temp = dev_ptr->regs.op_dev.ep_ctrlx[0]; + + dev_ptr->regs.op_dev.ep_ctrlx[0] = + (temp | EHCI_EPCTRL_TX_DATA_TOGGLE_RST); + + if (test_mode == USB_TEST_MODE_TEST_PACKET) + _usb_device_send_data(handle, 0, test_packet, + USB_TEST_MODE_TEST_PACKET_LENGTH); + + temp = dev_ptr->regs.op_dev.portscx[0]; + temp &= ~EHCI_PORTSCX_W1C_BITS; + + dev_ptr->regs.op_dev.portscx[0] = temp | ((u32)test_mode << 8); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_set_test_mode, SUCCESSFUL"); +#endif +} + +/**************************************************************************** + * + * Function Name : _usb_dci_vusb20_set_endpoint_status + * Returned Value : None + * Comments : + * Sets the endpoint registers e.g. to enable TX, RX, control + * + ***************************************************************************/ +void _usb_dci_vusb20_set_endpoint_status( + _usb_device_handle handle, + u8 ep, + u8 stall) +{ + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_set_endpoint_status"); +#endif + + usb_dev_ptr = (struct usb_dev_state *)handle; + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + + if (stall) + dev_ptr->regs.op_dev.ep_ctrlx[ep] |= + EHCI_EPCTRL_TX_EP_STALL | EHCI_EPCTRL_RX_EP_STALL; + else + dev_ptr->regs.op_dev.ep_ctrlx[ep] &= + ~(EHCI_EPCTRL_TX_EP_STALL | EHCI_EPCTRL_RX_EP_STALL); + +#ifdef _DEVICE_DEBUG_ + DEBUG_LOG_TRACE("_usb_dci_vusb20_set_endpoint_status, SUCCESSFUL"); +#endif +} diff --git a/drivers/usb/gadget/pmc-sierra/arc.h b/drivers/usb/gadget/pmc-sierra/arc.h new file mode 100644 index 0000000..aabf67a --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/arc.h @@ -0,0 +1,72 @@ +/* + * arc.h -- This file contains architecture specific defines + * + * Copyright (C) 1989-2006 Chipidea + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef __arc_h__ +#define __arc_h__ + +#include "msp_cic_int.h" +#include "msp_regs.h" + +/* + * STANDARD CONSTANTS + */ +#define BSP_VUSB20_DEVICE_BASE_ADDRESS0 MSP_USB_BASE +#define BSP_VUSB20_DEVICE_SIZE0 0x1D0 +#define BSP_VUSB20_DEVICE_CAP_BASE_ADDRESS0 (MSP_USB_BASE + 0x100) +#define BSP_VUSB20_DEVICE_CAP_SIZE0 0x28 +#define BSP_VUSB20_DEVICE_VECTOR0 MSP_INT_USB + +/* + * Common macros + */ +#define MSB(x) (((x) >> 8) & 0xff) /* MSB of 2-byte integer */ +#define LSB(x) ((x) & 0xff) /* LSB of 2-byte integer */ + +#define LLSB(x) ((x) & 0xff) /* 32bit word byte/word swap macros */ +#define LNLSB(x) (((x) >> 8) & 0xff) +#define LNMSB(x) (((x) >> 16) & 0xff) +#define LMSB(x) (((x) >> 24) & 0xff) +#define LONGSWAP(x) ((LLSB(x) << 24) | \ + (LNLSB(x) << 16) | \ + (LNMSB(x) << 8) | \ + (LMSB(x))) + +#ifdef __BIG_ENDIAN +#define USB_SWAP(x) LONGSWAP((int)(x)) +#define USB_WORD_SWAP(x) ((LSB((u16)(x)) << 8) | \ + MSB((u16)(x))) +#else +#define USB_SWAP(x) (x) +#define USB_WORD_SWAP(x) (x) +#endif + +#ifdef __cplusplus +extern "C" { +#endif +extern void _bsp_install_isr(u8, void (*)(void), void *); +extern u8 _bsp_get_usb_vector(u8); +extern void * _bsp_get_usb_base(u8); +extern void * _bsp_get_usb_capability_register_base(u8); +#ifdef __cplusplus +} +#endif + +#endif diff --git a/drivers/usb/gadget/pmc-sierra/debug.h b/drivers/usb/gadget/pmc-sierra/debug.h new file mode 100644 index 0000000..18d4a72 --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/debug.h @@ -0,0 +1,115 @@ +/* + * debug.h -- This file contains definitions for debugging the software stack + * + * Copyright (C) 1989-2006 Chipidea + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef __host_debug_h__ +#define __host_debug_h__ + +#include "arc.h" + +/************************************************************ + * Debug macros, assume _DBUG_ is defined during development + * (perhaps in the make file), and undefined for production. + ************************************************************/ +#ifndef _DBUG_ +#define DEBUG_FLUSH +#define DEBUG_PRINT(X) +#define DEBUG_PRINT2(X, Y) +#else +#define DEBUG_FLUSH fflush(stdout); +#define DEBUG_PRINT(X) printf(X); +#define DEBUG_PRINT2(X, Y) printf(X, Y); +#endif + +/************************************************************ + * ASSERT macros, assume _ASSERT_ is defined during development + * (perhaps in the make file), and undefined for production. + * This macro will check for pointer values and other validations + * wherever appropriate. + ************************************************************/ +#ifndef _ASSERT_ +#define ASSERT(X, Y) +#else +#define ASSERT(X, Y) if (Y) { printf(X); exit(1); } +#endif + +/************************************************************ + * The following array is used to make a run time trace route + * inside the USB stack. + ************************************************************/ + +#ifdef _DEBUG_INFO_TRACE_LEVEL_ + +#define TRACE_ARRAY_SIZE 1000 +#define MAX_STRING_SIZE 50 + +#ifndef __TRACE_VARIABLES_DEFINED__ +extern u16 debug_trace_array_counter; +extern char debug_trace_array[TRACE_ARRAY_SIZE][MAX_STRING_SIZE]; +extern bool debug_trace_enabled; +#else +u16 debug_trace_array_counter; +char debug_trace_array[TRACE_ARRAY_SIZE][MAX_STRING_SIZE]; +bool debug_trace_enabled; +#endif + +#define DEBUG_LOG_TRACE(x) \ +{ \ + if (debug_trace_enabled) { \ + memcpy(debug_trace_array[debug_trace_array_counter], x, \ + MAX_STRING_SIZE); \ + debug_trace_array_counter++; \ + if (debug_trace_array_counter >= TRACE_ARRAY_SIZE) \ + debug_trace_array_counter = 0; \ + } \ +} +#define START_DEBUG_TRACE \ +{ \ + debug_trace_array_counter = 0; \ + debug_trace_enabled = true; \ +} + +#define STOP_DEBUG_TRACE \ +{ \ + debug_trace_enabled = false; \ +} + +/* if trace switch is not enabled define debug log trace to empty */ +#else + +#define DEBUG_LOG_TRACE(x) +#define START_DEBUG_TRACE +#define STOP_DEBUG_TRACE + +#endif + +/************************************************************ + * The following are global data structures that can be used + * to copy data from stack on run time. This structure can + * be analyzed at run time to see the state of various other + * data structures in the memory. + ************************************************************/ + +#ifdef _DEBUG_INFO_DATA_LEVEL_ +struct debug_data { +}; +#endif + +#endif diff --git a/drivers/usb/gadget/pmc-sierra/devapi.h b/drivers/usb/gadget/pmc-sierra/devapi.h new file mode 100644 index 0000000..f6b947e --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/devapi.h @@ -0,0 +1,95 @@ +/* + * devapi.h -- This file contains the declarations specific to the USB + * Device API + * + * Copyright (C) 1989-2006 Chipidea + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef __devapi_h__ +#define __devapi_h__ + +#include "arc.h" +#include "usb.h" +#include "debug.h" + +/* Endpoint types */ +#define USB_CONTROL_ENDPOINT 0 +#define USB_ISOCHRONOUS_ENDPOINT 1 +#define USB_BULK_ENDPOINT 2 +#define USB_INTERRUPT_ENDPOINT 3 + +/* Informational Request/Set Types */ +#define USB_STATUS_DEVICE_STATE 0x01 +#define USB_STATUS_INTERFACE 0x02 +#define USB_STATUS_ADDRESS 0x03 +#define USB_STATUS_CURRENT_CONFIG 0x04 +#define USB_STATUS_SOF_COUNT 0x05 +#define USB_STATUS_DEVICE 0x06 +#define USB_STATUS_TEST_MODE 0x07 +#define USB_STATUS_ENDPOINT 0x10 +#define USB_STATUS_ENDPOINT_NUMBER_MASK 0x0F + +#define USB_TEST_MODE_TEST_PACKET 0x0400 + +/* + * Available service types + * Services 0 through 15 are reserved for endpoints + */ +#define USB_SERVICE_EP0 0x00 +#define USB_SERVICE_EP1 0x01 +#define USB_SERVICE_EP2 0x02 +#define USB_SERVICE_EP3 0x03 +#define USB_SERVICE_BUS_RESET 0x10 +#define USB_SERVICE_SUSPEND 0x11 +#define USB_SERVICE_SOF 0x12 +#define USB_SERVICE_RESUME 0x13 +#define USB_SERVICE_SLEEP 0x14 +#define USB_SERVICE_SPEED_DETECTION 0x15 +#define USB_SERVICE_ERROR 0x16 +#define USB_SERVICE_STALL 0x17 + +#define _usb_device_handle void * + +#ifdef __cplusplus +extern "C" { +#endif +extern u8 _usb_device_init(u8, _usb_device_handle *, u8); +extern u8 _usb_device_recv_data(_usb_device_handle, u8, u8 *, u32); +extern u8 _usb_device_send_data(_usb_device_handle, u8, u8 *, u32); +extern u8 _usb_device_get_transfer_status(_usb_device_handle, u8, u8); +extern u8 _usb_device_cancel_transfer(_usb_device_handle, u8, u8); +extern u8 _usb_device_get_status(_usb_device_handle, u8, u16 *); +extern u8 _usb_device_set_status(_usb_device_handle, u8, u16); +extern u8 _usb_device_register_service(_usb_device_handle, u8, + void( * service)(void *, bool, u8, u8 *, u32, u8)); +extern u8 _usb_device_unregister_service(_usb_device_handle, u8); +extern u8 _usb_device_call_service(_usb_device_handle, u8, + bool, bool, u8 *, u32, u8); +extern void _usb_device_shutdown(_usb_device_handle); +extern void _usb_device_set_address(_usb_device_handle, u8); +extern void _usb_device_read_setup_data(_usb_device_handle, u8, u8 *); +extern void _usb_device_assert_resume(_usb_device_handle); +extern u8 _usb_device_init_endpoint(_usb_device_handle, u8, u16, u8, u8, u8); +extern void _usb_device_stall_endpoint(_usb_device_handle, u8, u8); +extern void _usb_device_unstall_endpoint(_usb_device_handle, u8, u8); +extern u8 _usb_device_deinit_endpoint(_usb_device_handle, u8, u8); +#ifdef __cplusplus +} +#endif + +#endif diff --git a/drivers/usb/gadget/pmc-sierra/usb.h b/drivers/usb/gadget/pmc-sierra/usb.h new file mode 100644 index 0000000..bf50d5e --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/usb.h @@ -0,0 +1,127 @@ +/* + * usb.h -- This file contains USB Device API defines for state and + * function returns + * + * Copyright (C) 1989-2006 Chipidea + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef __usb_h__ +#define __usb_h__ + +/* Host specific */ +#define USB_DEBOUNCE_DELAY 101 +#define USB_RESET_RECOVERY_DELAY 11 +#define USB_RESET_DELAY 60 + +/* Error codes */ +#define USB_OK 0x00 +#define USBERR_ALLOC 0x81 +#define USBERR_BAD_STATUS 0x82 +#define USBERR_CLOSED_SERVICE 0x83 +#define USBERR_OPEN_SERVICE 0x84 +#define USBERR_TRANSFER_IN_PROGRESS 0x85 +#define USBERR_ENDPOINT_STALLED 0x86 +#define USBERR_ALLOC_STATE 0x87 +#define USBERR_DRIVER_INSTALL_FAILED 0x88 +#define USBERR_DRIVER_NOT_INSTALLED 0x89 +#define USBERR_INSTALL_ISR 0x8A +#define USBERR_INVALID_DEVICE_NUM 0x8B +#define USBERR_ALLOC_SERVICE 0x8C +#define USBERR_INIT_FAILED 0x8D +#define USBERR_SHUTDOWN 0x8E +#define USBERR_INVALID_PIPE_HANDLE 0x8F +#define USBERR_OPEN_PIPE_FAILED 0x90 +#define USBERR_INIT_DATA 0x91 +#define USBERR_SRP_REQ_INVALID_STATE 0x92 +#define USBERR_TX_FAILED 0x93 +#define USBERR_RX_FAILED 0x94 +#define USBERR_EP_INIT_FAILED 0x95 +#define USBERR_EP_DEINIT_FAILED 0x96 +#define USBERR_TR_FAILED 0x97 +#define USBERR_BANDWIDTH_ALLOC_FAILED 0x98 +#define USBERR_INVALID_NUM_OF_ENDPOINTS 0x99 + +#define USBERR_DEVICE_NOT_FOUND 0xC0 +#define USBERR_DEVICE_BUSY 0xC1 +#define USBERR_NO_DEVICE_CLASS 0xC3 +#define USBERR_UNKNOWN_ERROR 0xC4 +#define USBERR_INVALID_BMREQ_TYPE 0xC5 +#define USBERR_GET_MEMORY_FAILED 0xC6 +#define USBERR_INVALID_MEM_TYPE 0xC7 +#define USBERR_NO_DESCRIPTOR 0xC8 +#define USBERR_NULL_CALLBACK 0xC9 +#define USBERR_NO_INTERFACE 0xCA +#define USBERR_INVALID_CFIG_NUM 0xCB +#define USBERR_INVALID_ANCHOR 0xCC +#define USBERR_INVALID_REQ_TYPE 0xCD + +/* Error Codes for lower-layer */ +#define USBERR_ALLOC_EP_QUEUE_HEAD 0xA8 +#define USBERR_ALLOC_TR 0xA9 +#define USBERR_ALLOC_DTD_BASE 0xAA +#define USBERR_CLASS_DRIVER_INSTALL 0xAB + +/* Pipe Types */ +#define USB_ISOCHRONOUS_PIPE 0x01 +#define USB_INTERRUPT_PIPE 0x02 +#define USB_CONTROL_PIPE 0x03 +#define USB_BULK_PIPE 0x04 + +#define USB_STATE_UNKNOWN 0xff +#define USB_STATE_POWERED 0x03 +#define USB_STATE_DEFAULT 0x02 +#define USB_STATE_ADDRESS 0x01 +#define USB_STATE_CONFIG 0x00 +#define USB_STATE_SUSPEND 0x80 + +#define USB_SELF_POWERED 0x01 +#define USB_REMOTE_WAKEUP 0x02 + +/* Bus Control values */ +#define USB_NO_OPERATION 0x00 +#define USB_ASSERT_BUS_RESET 0x01 +#define USB_DEASSERT_BUS_RESET 0x02 +#define USB_ASSERT_RESUME 0x03 +#define USB_DEASSERT_RESUME 0x04 +#define USB_SUSPEND_SOF 0x05 +#define USB_RESUME_SOF 0x06 + +/* possible values of XD->bStatus */ +#define USB_STATUS_IDLE 0 +#define USB_STATUS_TRANSFER_ACCEPTED 1 +#define USB_STATUS_TRANSFER_PENDING 2 +#define USB_STATUS_TRANSFER_IN_PROGRESS 3 +#define USB_STATUS_ERROR 4 +#define USB_STATUS_DISABLED 5 +#define USB_STATUS_STALLED 6 +#define USB_STATUS_TRANSFER_QUEUED 7 + +#define USB_RECV 0 +#define USB_SEND 1 + +#define USB_DEVICE_DONT_ZERO_TERMINATE 0x1 + +#define USB_SETUP_DATA_XFER_DIRECTION 0x80 + +#define USB_DEV_SPEED_FULL 0 +#define USB_DEV_SPEED_LOW 1 +#define USB_DEV_SPEED_HIGH 2 + +#define USB_MAX_PKTS_PER_UFRAME 0x6 + +#endif diff --git a/drivers/usb/gadget/pmc-sierra/usbprv_dev.h b/drivers/usb/gadget/pmc-sierra/usbprv_dev.h new file mode 100644 index 0000000..5b4edd2 --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/usbprv_dev.h @@ -0,0 +1,245 @@ +/* + * usbprv_dev.h -- This file contains the private defines, externs and + * data structure definitions required by the VUSB_HS Device + * driver. + * + * Copyright (C) 1989-2006 Chipidea + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef __usbprv_dev_h__ +#define __usbprv_dev_h__ + +#include "vusbhs.h" + +#define MAX_EP_TR_DESCRS 32 +#define MAX_XDS_FOR_TR_CALLS 32 +#define MAX_USB_DEVICES 1 +#define USB_MAX_ENDPOINTS 16 + +#define USB_MAX_CTRL_PAYLOAD 64 + +/* Macro for aligning the EP queue head to 32 byte boundary */ +#define USB_MEM32_ALIGN(n) ((n) + (-(n) & 31)) + +/* Macro for aligning the EP queue head to 1024 byte boundary */ +#define USB_MEM1024_ALIGN(n) ((n) + (-(n) & 1023)) + +/* Macro for aligning the EP queue head to 1024 byte boundary */ +#define USB_MEM2048_ALIGN(n) ((n) + (-(n) & 2047)) + +#define USB_XD_QADD(head, tail, xd) \ +({ \ + if ((head) == NULL) \ + (head) = (xd); \ + else \ + (tail)->scratch_ptr->private = (xd); \ + (tail) = (xd); \ + (xd)->scratch_ptr->private = NULL; \ +}) + +#define USB_XD_QGET(head, tail, xd) \ +({ \ + (xd) = (head); \ + if (head) { \ + (head) = (head)->scratch_ptr->private; \ + if ((head) == NULL) \ + (tail) = NULL; \ + } \ +}) + +#define EHCI_DTD_QADD(head, tail, dtd) \ +({ \ + if ((head) == NULL) \ + (head) = (dtd); \ + else \ + (tail)->scratch_ptr->private = (dtd); \ + (tail) = (dtd); \ + (dtd)->scratch_ptr->private = NULL; \ +}) + +#define EHCI_DTD_QGET(head, tail, dtd) \ +({ \ + (dtd) = (head); \ + if (head) { \ + (head) = (head)->scratch_ptr->private; \ + if ((head) == NULL) \ + (tail) = NULL; \ + } \ +}) + +/* + * Data structures + */ + +/* Callback function storage structure */ +struct service { + u8 type; + void ( * service)(void *, bool, u8, u8 *, u32, u8); + struct service *next; +}; + +struct xd { + u8 ep_num; /* Endpoint number */ + u8 bdirection; /* Direction : Send/Receive */ + u8 ep_type; /* Type of the endpoint: Ctrl, Isoch, + * Bulk, Int + */ + u8 bstatus; /* Current transfer status */ + u8 * wstartaddress; /* Address of first byte */ + u32 wtotallength; /* Number of bytes to send/recv */ + u32 wsofar; /* Number of bytes recv'd so far */ + u16 wmaxpacketsize; /* Max Packet size */ + u32 dont_zero_terminate; + u8 max_pkts_per_uframe; + struct scratch *scratch_ptr; +}; + +/* The USB Device State Structure */ +struct usb_dev_state { + u32 bus_resetting; /* Device is + * being reset + */ + u32 transfer_pending; /* Transfer pending ? */ + + volatile struct vusb20 *dev_ptr; /* Device Controller + * Register base + * address + */ + + void * callback_ptr; + + struct service * service_head_ptr; /* Head struct + * address of + * registered services + */ + struct xd * temp_xd_ptr; /* Temp xd for ep init */ + struct xd * xd_base; + struct xd * xd_head; /* Head Transaction + * descriptors + */ + struct xd * xd_tail; /* Tail Transaction + * descriptors + */ + struct xd * pending_xd_ptr; /* pending transfer */ + u32 xd_entries; + volatile struct vusb20_ep_queue_head *ep_queue_head_ptr; + /* Endpoint Queue + * head + */ + u8 * driver_memory; + volatile struct vusb20_ep_queue_head *ep_queue_head_base; + volatile struct vusb20_ep_tr *dtd_base_ptr; + /* Device transfer + * descriptor pool + * address + */ + volatile struct vusb20_ep_tr *dtd_aligned_base_ptr; + /* Aligned transfer + * descriptor pool + * address + */ + volatile struct vusb20_ep_tr *dtd_head; + volatile struct vusb20_ep_tr *dtd_tail; + volatile struct vusb20_ep_tr *ep_dtd_heads[USB_MAX_ENDPOINTS * 2]; + volatile struct vusb20_ep_tr *ep_dtd_tails[USB_MAX_ENDPOINTS * 2]; + struct scratch * xd_scratch_base; + struct scratch * scratch_base; + + /* These fields are kept only for USB_shutdown() */ + void ( * oldisr_ptr)(void *); + void * oldisr_data; + u16 usb_state; + u16 usb_dev_state; + u16 usb_sof_count; + u16 dtd_entries; + u16 errors; + u16 usb_dev_state_b4_suspend; + u8 dev_num; /* USB device number + * on the board + */ + u8 dev_vec; /* Interrupt vector + * number for USB + */ + u8 dev_speed; /* Low Speed, + * High Speed, + * Full Speed + */ + u8 max_endpoints; /* Max endpoints + * supported by this + * device + */ + u8 usb_curr_config; + u8 device_address; + + /* + * All high-speed device are supposed to support test mode + * see USB specification + */ + u32 enter_test_mode; + u16 test_mode_index; + u8 speed; + u8 usb_if_alt[4]; + u8 usb_status[2]; + struct setup local_setup_packet; + u8 endpoint; + u8 if_status; + + /* Lock to provide mutual exclusion for device */ + spinlock_t lock; +}; + +/* + * Prototypes + */ +#ifdef __cplusplus +extern "C" { +#endif +extern void _usb_dci_vusb20_isr(void); + +extern u8 _usb_dci_vusb20_init(u8, _usb_device_handle); +extern void _usb_device_free_xd(void *); +extern void _usb_dci_vusb20_free_dtd(void *); +extern u8 _usb_dci_vusb20_add_dtd(_usb_device_handle, struct xd *); +extern u8 _usb_dci_vusb20_send_data(_usb_device_handle, struct xd *); +extern u8 _usb_dci_vusb20_recv_data(_usb_device_handle, struct xd *); +extern u8 _usb_dci_vusb20_cancel_transfer(_usb_device_handle, u8, u8); +extern u8 _usb_dci_vusb20_get_transfer_status(_usb_device_handle, u8, u8); +extern void _usb_dci_vusb20_process_tr_complete(_usb_device_handle); +extern void _usb_dci_vusb20_process_reset(_usb_device_handle); +extern void _usb_dci_vusb20_process_tr_complete(_usb_device_handle); +extern void _usb_dci_vusb20_process_suspend(_usb_device_handle); +extern void _usb_dci_vusb20_process_SOF(_usb_device_handle); +extern void _usb_dci_vusb20_process_port_change(_usb_device_handle); +extern void _usb_dci_vusb20_process_error(_usb_device_handle); +extern void _usb_dci_vusb20_shutdown(_usb_device_handle); +extern void _usb_dci_vusb20_set_address(_usb_device_handle, u8); +extern void _usb_dci_vusb20_get_setup_data(_usb_device_handle, u8, u8 *); +extern void _usb_dci_vusb20_assert_resume(_usb_device_handle); +extern u8 _usb_dci_vusb20_init_endpoint(_usb_device_handle, struct xd *); +extern void _usb_dci_vusb20_stall_endpoint(_usb_device_handle, u8, u8); +extern void _usb_dci_vusb20_unstall_endpoint(_usb_device_handle, u8, u8); +extern u8 _usb_dci_vusb20_deinit_endpoint(_usb_device_handle, u8, u8); +extern void _usb_dci_vusb20_set_endpoint_status(_usb_device_handle, u8, u8); +extern void _usb_dci_vusb20_set_test_mode(_usb_device_handle, u16); +extern u8 _usb_dci_vusb20_get_endpoint_status(_usb_device_handle, u8); +extern void _usb_dci_vusb20_chip_initialize(_usb_device_handle); +#ifdef __cplusplus +} +#endif + +#endif diff --git a/drivers/usb/gadget/pmc-sierra/vusbhs.h b/drivers/usb/gadget/pmc-sierra/vusbhs.h new file mode 100644 index 0000000..32e7341 --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/vusbhs.h @@ -0,0 +1,725 @@ +/* + * vusbhs.h -- This file contains the defines, externs and + * data structure definitions required by the VUSB_HS Device + * driver. + * + * Copyright (C) 1989-2006 Chipidea + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef __vusbhs_h__ +#define __vusbhs_h__ + +#include "arc.h" + +/* VUSBHS specific defines */ +#define VUSBHS_MAX_PORTS 8 +#define EHCI_CAP_LEN_MASK 0x000000FF +#define EHCI_DATA_STRUCTURE_BASE_ADDR 0 + +/* Command Register Bit Masks */ +#define EHCI_CMD_RUN_STOP 0x00000001 +#define EHCI_CMD_CTRL_RESET 0x00000002 +#define EHCI_CMD_SETUP_TRIPWIRE_SET 0x00002000 +#define EHCI_CMD_SETUP_TRIPWIRE_CLEAR (~EHCI_CMD_SETUP_TRIPWIRE_SET) + +#define EHCI_CMD_ATDTW_TRIPWIRE_SET 0x00001000 +#define EHCI_CMD_ATDTW_TRIPWIRE_CLEAR (~EHCI_CMD_SETUP_TRIPWIRE_CLEAR) + +/* Bits 15, 3, 2 are for frame list size */ +#define EHCI_CMD_FRAME_SIZE_1024 0x00000000 /* 000 */ +#define EHCI_CMD_FRAME_SIZE_512 0x00000004 /* 001 */ +#define EHCI_CMD_FRAME_SIZE_256 0x00000008 /* 010 */ +#define EHCI_CMD_FRAME_SIZE_128 0x0000000C /* 011 */ +#define EHCI_CMD_FRAME_SIZE_64 0x00008000 /* 100 */ +#define EHCI_CMD_FRAME_SIZE_32 0x00008004 /* 101 */ +#define EHCI_CMD_FRAME_SIZE_16 0x00008008 /* 110 */ +#define EHCI_CMD_FRAME_SIZE_8 0x0000800C /* 111 */ + +/* Mode Register Bit Masks */ +#define VUSBHS_MODE_CTRL_MODE_IDLE 0x00000000 +#define VUSBHS_MODE_CTRL_MODE_DEV 0x00000002 +#define VUSBHS_MODE_CTRL_MODE_HOST 0x00000003 +#define VUSBHS_MODE_BIG_ENDIAN 0x00000004 +#define VUSBHS_MODE_SETUP_LOCK_DISABLE 0x00000008 +#define VUSBHS_MODE_STREAM_DISABLE 0x00000010 + +/* Interrupt Enable Register Bit Masks */ +#define EHCI_INTR_INT_EN 0x00000001 +#define EHCI_INTR_ERR_INT_EN 0x00000002 +#define EHCI_INTR_PORT_CHANGE_DETECT_EN 0x00000004 + +#define EHCI_INTR_ASYNC_ADV_AAE 0x00000020 +#define EHCI_INTR_ASYNC_ADV_AAE_ENABLE 0x00000020 /* | with this to enable */ +#define EHCI_INTR_ASYNC_ADV_AAE_DISABLE 0xFFFFFFDF /* & with this to disable */ + +#define EHCI_INTR_RESET_EN 0x00000040 +#define EHCI_INTR_SOF_UFRAME_EN 0x00000080 +#define EHCI_INTR_DEVICE_SUSPEND 0x00000100 + +/* Interrupt Status Register Masks */ +#define EHCI_STS_SOF 0x00000080 +#define EHCI_STS_RESET 0x00000040 +#define EHCI_STS_PORT_CHANGE 0x00000004 +#define EHCI_STS_ERR 0x00000002 +#define EHCI_STS_INT 0x00000001 +#define EHCI_STS_SUSPEND 0x00000100 +#define EHCI_STS_HC_HALTED 0x00001000 +#define EHCI_STS_SER_SELECT 0x20000000 + +/* Endpoint Queue Head Bit Masks */ +#define VUSB_EP_QUEUE_HEAD_IOS 0x00008000 +#define VUSB_EP_QUEUE_HEAD_IOC 0x00008000 +#define VUSB_EP_QUEUE_HEAD_INT 0x00000100 +#define VUSB_EP_QUEUE_HEAD_NEXT_TERMINATE 0x00000001 +#define VUSB_EP_QUEUE_HEAD_MAX_PKT_LEN_POS 16 +#define VUSB_EP_QUEUE_HEAD_ZERO_LEN_TER_SEL 0x20000000 +#define VUSB_EP_QUEUE_HEAD_MULT_POS 30 +#define VUSB_EP_MAX_LENGTH_TRANSFER 0x4000 + +#define VUSB_EP_QUEUE_HEAD_STATUS_ACTIVE 0x00000080 + +#define VUSBHS_TD_NEXT_TERMINATE 0x00000001 +#define VUSBHS_TD_IOC 0x00008000 +#define VUSBHS_TD_STATUS_ACTIVE 0x00000080 +#define VUSBHS_TD_STATUS_HALTED 0x00000040 +#define VUSBHS_TD_RESERVED_FIELDS 0x00007F00 +#define VUSBHS_TD_ERROR_MASK 0x68 +#define VUSBHS_TD_ADDR_MASK 0xFFFFFFE0 +#define VUSBHS_TD_LENGTH_BIT_POS 16 + +#define EHCI_EPCTRL_TX_DATA_TOGGLE_RST 0x00400000 +#define EHCI_EPCTRL_TX_EP_STALL 0x00010000 +#define EHCI_EPCTRL_RX_EP_STALL 0x00000001 +#define EHCI_EPCTRL_RX_DATA_TOGGLE_RST 0x00000040 +#define EHCI_EPCTRL_RX_ENABLE 0x00000080 +#define EHCI_EPCTRL_TX_ENABLE 0x00800000 +#define EHCI_EPCTRL_CONTROL 0x00000000 +#define EHCI_EPCTRL_ISOCHRONOUS 0x00040000 +#define EHCI_EPCTRL_BULK 0x00080000 +#define EHCI_EPCTRL_INT 0x000C0000 +#define EHCI_EPCTRL_TX_TYPE 0x000C0000 +#define EHCI_EPCTRL_RX_TYPE 0x0000000C +#define EHCI_EPCTRL_DATA_TOGGLE_INHIBIT 0x00000020 +#define EHCI_EPCTRL_TX_EP_TYPE_SHIFT 18 +#define EHCI_EPCTRL_RX_EP_TYPE_SHIFT 2 + +#define EHCI_PORTSCX_PORT_POWER 0x00001000 +#define EHCI_PORTSCX_LINE_STATUS_BITS 0x00000C00 +#define EHCI_PORTSCX_LINE_STATUS_SE0 0x00000000 +#define EHCI_PORTSCX_LINE_STATUS_KSTATE 0x00000400 +#define EHCI_PORTSCX_LINE_STATUS_JSTATE 0x00000800 +#define EHCI_PORTSCX_PORT_HIGH_SPEED 0x00000200 +#define EHCI_PORTSCX_PORT_RESET 0x00000100 +#define EHCI_PORTSCX_PORT_SUSPEND 0x00000080 +#define EHCI_PORTSCX_PORT_FORCE_RESUME 0x00000040 +#define EHCI_PORTSCX_PORT_EN_DIS_CHANGE 0x00000008 +#define EHCI_PORTSCX_PORT_ENABLE 0x00000004 +#define EHCI_PORTSCX_CONNECT_STATUS_CHANGE 0x00000002 +#define EHCI_PORTSCX_CURRENT_CONNECT_STATUS 0x00000001 + +#define VUSBHS_PORTSCX_PORT_SPEED_FULL 0x00000000 +#define VUSBHS_PORTSCX_PORT_SPEED_LOW 0x04000000 +#define VUSBHS_PORTSCX_PORT_SPEED_HIGH 0x08000000 +#define VUSBHS_SPEED_MASK 0x0C000000 +#define VUSBHS_SPEED_BIT_POS 26 + +#define EHCI_PORTSCX_W1C_BITS 0x2A + +#define VUSB_EP_TR_PACKET_SIZE 0x7FFF0000 + +#define VUSBHS_FRINDEX_MS_MASK 0xFFFFFFF8 +#define VUSBHS_ADDRESS_BIT_SHIFT 25 + +#define VUSB20_MAX_ENDPTS_SUPPORTED 0x1F +#define EHCI_HCC_PARAMS_64_BIT_ADDR_CAP 0x01 +#define EHCI_HCC_PARAMS_PGM_FRM_LIST_FLAG 0x02 +#define EHCI_HCC_PARAMS_ASYNC_PARK_CAP 0x04 +#define EHCI_HCC_PARAMS_ISOCH_SCHED_THRESHOLD 0xF0 +#define EHCI_HCC_PARAMS_ISOCH_FRAME_CACHED 0x80 + +#define VUSB20_HCS_PARAMS_PORT_POWER_CONTROL_FLAG 0x10 + +#define VUSB20_HOST_INTR_EN_BITS 0x37 + +#define VUSB20_DEFAULT_PERIODIC_FRAME_LIST_SIZE 1024 +#define VUSB20_NEW_PERIODIC_FRAME_LIST_BITS 2 +#define EHCI_FRAME_LIST_ELEMENT_POINTER_T_BIT 0x01 +#define EHCI_ITD_T_BIT 0x01 +#define EHCI_SITD_T_BIT 0x01 +#define EHCI_QUEUE_HEAD_POINTER_T_BIT 0x01 + +/************************************************************ + * Split transatcions specific defines + ************************************************************/ +#define EHCI_START_SPLIT_MAX_BUDGET 188 + +#define EHCI_ELEMENT_TYPE_ITD 0x00 +#define EHCI_ELEMENT_TYPE_QH 0x02 +#define EHCI_ELEMENT_TYPE_SITD 0x04 +#define EHCI_ELEMENT_TYPE_FSTN 0x06 +#define EHCI_ELEMENT_TYPE_MASK 0x06 + +#define EHCI_FRAME_LIST_ELEMENT_TYPE_ITD 0x00 +#define EHCI_FRAME_LIST_ELEMENT_TYPE_QH 0x01 +#define EHCI_FRAME_LIST_ELEMENT_TYPE_SITD 0x02 +#define EHCI_FRAME_LIST_ELEMENT_TYPE_FSTN 0x03 +#define EHCI_FRAME_LIST_ELEMENT_TYPE_BIT_POS 1 + +#define EHCI_QH_ELEMENT_TYPE_ITD 0x00 +#define EHCI_QH_ELEMENT_TYPE_QH 0x01 +#define EHCI_QH_ELEMENT_TYPE_SITD 0x02 +#define EHCI_QH_ELEMENT_TYPE_FSTN 0x03 + +#define EHCI_QH_ELEMENT_TYPE_BIT_POS 1 + +#define EHCI_QTD_PID_OUT_TOKEN 0x000 +#define EHCI_QTD_PID_IN_TOKEN 0x100 +#define EHCI_QTD_PID_SETUP_TOKEN 0x200 +#define EHCI_QTD_IOC 0x8000 +#define EHCI_QTD_STATUS_ACTIVE 0x0080 +#define EHCI_QTD_STATUS_HALTED 0x0040 +#define EHCI_QTD_PID_SETUP 0x0200 +#define EHCI_QTD_PID_IN 0x0100 +#define EHCI_QTD_PID_OUT 0x0000 +#define EHCI_QTD_LENGTH_BIT_POS 16 +#define EHCI_QTD_DATA_TOGGLE 0x80000000 +#define EHCI_QTD_DATA_TOGGLE_BIT_POS 31 +#define EHCI_QTD_LENGTH_BIT_MASK 0x7FFF0000 +#define EHCI_QTD_ERROR_BITS_MASK 0x0000003E +#define EHCI_QTD_DEFAULT_CERR_VALUE 0xC00 + +#define EHCI_SETUP_TOKEN 2 +#define EHCI_OUT_TOKEN 0 +#define EHCI_IN_TOKEN 1 + +#define EHCI_QTD_T_BIT 0x01 + +#define EHCI_QH_ENDPOINT_SPEED_FULL 0x00 +#define EHCI_QH_ENDPOINT_SPEED_LOW 0x01 +#define EHCI_QH_ENDPOINT_SPEED_HIGH 0x02 +#define EHCI_QH_ENDPOINT_SPEED_RESERVED 0x03 + +#define EHCI_ITD_LENGTH_BIT_POS 16 +#define EHCI_ITD_IOC_BIT 0x00008000 +#define EHCI_ITD_ACTIVE_BIT 0x80000000 +#define EHCI_ITD_PG_SELECT_BIT_POS 12 +#define EHCI_ITD_DIRECTION_BIT_POS 11 +#define EHCI_ITD_EP_BIT_POS 8 +#define EHCI_ITD_STATUS 0xF0000000 +#define EHCI_ITD_STATUS_ACTIVE 0x80000000 /* bit 4 = 1000 */ +#define EHCI_ITD_STATUS_DATA_BUFFER_ERR 0x40000000 /* bit 3 = 0100 */ +#define EHCI_ITD_STATUS_BABBLE_ERROR 0x20000000 /* bit 2 = 0010 */ +#define EHCI_ITD_STATUS_TRANSACTION_ERR 0x10000000 /* bit 4 = 0001 */ + +#define EHCI_ITD_LENGTH_TRANSMITTED 0x0FFF0000 +#define EHCI_ITD_BUFFER_OFFSET 0x00000FFF +#define EHCI_ITD_PAGE_NUMBER 0x00007000 +#define EHCI_ITD_BUFFER_POINTER 0xFFFFF000 +#define EHCI_ITD_MULTI_TRANSACTION_BITS 0x00000003 + +/* SITD position bits */ +#define EHCI_SITD_DIRECTION_BIT_POS 31 +#define EHCI_SITD_PORT_NUMBER_BIT_POS 24 +#define EHCI_SITD_HUB_ADDR_BIT_POS 16 +#define EHCI_SITD_EP_ADDR_BIT_POS 8 + +#define EHCI_SITD_COMPLETE_SPLIT_MASK_BIT_POS 8 + +#define EHCI_SITD_IOC_BIT_SET 0x80000000 +#define EHCI_SITD_PAGE_SELECT_BIT_POS 30 +#define EHCI_SITD_TRANSFER_LENGTH_BIT_POS 16 +#define EHCI_SITD_STATUS_ACTIVE 0x80 + +#define EHCI_SITD_STATUS 0xFF +#define EHCI_SITD_LENGTH_TRANSMITTED 0x03FF0000 +#define EHCI_SITD_BUFFER_OFFSET 0x00000FFF +#define EHCI_SITD_PAGE_NUMBER 0x40000000 +#define EHCI_SITD_BUFFER_POINTER 0xFFFFF000 + +#define EHCI_SITD_BUFFER_PTR_BIT_POS 12 +#define EHCI_SITD_TP_BIT_POS 3 +#define EHCI_SITD_TP_ALL 0 +#define EHCI_SITD_TP_BEGIN 1 +#define EHCI_SITD_TP_MID 2 +#define EHCI_SITD_TP_END 3 + +/* Interrupt enable bit masks */ +#define EHCI_IER_ASYNCH_ADVANCE 0x00000020 +#define EHCI_IER_HOST_SYS_ERROR 0x00000010 +#define EHCI_IER_FRAME_LIST_ROLLOVER 0x00000008 +#define EHCI_IER_PORT_CHANGE 0x00000004 +#define EHCI_IER_USB_ERROR 0x00000002 +#define EHCI_IER_USB_INTERRUPT 0x00000001 + +/* Interrupt status bit masks */ +#define EHCI_STS_RECLAIMATION 0x00002000 +#define EHCI_STS_SOF_COUNT 0x00000080 +#define EHCI_STS_ASYNCH_ADVANCE 0x00000020 +#define EHCI_STS_HOST_SYS_ERROR 0x00000010 +#define EHCI_STS_FRAME_LIST_ROLLOVER 0x00000008 +#define EHCI_STS_PORT_CHANGE 0x00000004 +#define EHCI_STS_USB_ERROR 0x00000002 +#define EHCI_STS_USB_INTERRUPT 0x00000001 + +/* Status bit masks */ +#define EHCI_STS_ASYNCH_SCHEDULE 0x00008000 +#define EHCI_STS_PERIODIC_SCHEDULE 0x00004000 +#define EHCI_STS_RECLAMATION 0x00002000 +#define EHCI_STS_HC_HALTED 0x00001000 + +/* USB command bit masks */ +#define EHCI_USBCMD_ASYNC_SCHED_ENABLE 0x00000020 +#define EHCI_USBCMD_PERIODIC_SCHED_ENABLE 0x00000010 + +#define EHCI_HCS_PARAMS_N_PORTS 0x0F + +#define VUSB_HS_DELAY 3500 + +#define EHCI_QH_EP_NUM_MASK 0x0F00 +#define EHCI_QH_EP_NUM_BITS_POS 8 +#define EHCI_QH_DEVICE_ADDRESS_MASK 0x7F +#define EHCI_QH_SPEED_BITS_POS 12 +#define EHCI_QH_MAX_PKT_SIZE_BITS_POS 16 +#define EHCI_QH_NAK_COUNT_RL_BITS_POS 28 +#define EHCI_QH_EP_CTRL_FLAG_BIT_POS 27 +#define EHCI_QH_HEAD_RECLAMATION_BIT_POS 15 +#define EHCI_QH_DTC_BIT_POS 14 +#define EHCI_QH_HIGH_BW_MULT_BIT_POS 30 +#define EHCI_QH_HUB_PORT_NUM_BITS_POS 23 +#define EHCI_QH_HUB_ADDR_BITS_POS 16 +#define EHCI_QH_SPLIT_COMPLETION_MASK_BITS_POS 8 +#define EHCI_QH_SPLIT_COMPLETION_MASK 0xFF00 +#define EHCI_QH_INTR_SCHED_MASK 0xFF +#define EHCI_QH_INACTIVATE_NEXT_TR_BIT_POS 7 +#define EHCI_QH_HORIZ_PHY_ADDRESS_MASK 0xFFFFFFE0 +#define EHCI_QH_TR_OVERLAY_DT_BIT 0x80000000 + +#define EHCI_SITD_SPLIT_COMPLETION_MASK_BITS_POS 8 + +#define EHCI_INTR_NO_THRESHOLD_IMMEDIATE 0x00010000 +#define EHCI_NEW_PERIODIC_FRAME_LIST_SIZE 1024 +#define EHCI_FRAME_LIST_SIZE_BITS_POS 2 +#define EHCI_HORIZ_PHY_ADDRESS_MASK 0xFFFFFFE0 + +#define DEFAULT_MAX_NAK_COUNT 15 + +/* OTG Status and control register bit masks */ + +/* OTG interrupt enable bit masks */ +#define VUSBHS_OTGSC_INTERRUPT_ENABLE_BITS_MASK 0x5F000000 +#define VUSBHS_OTGSC_DPIE 0x40000000 /* Data-line pulsing IE */ +#define VUSBHS_OTGSC_1MSIE 0x20000000 +#define VUSBHS_OTGSC_BSEIE 0x10000000 /* B-session end IE */ +#define VUSBHS_OTGSC_BSVIE 0x08000000 /* B-session valid IE */ +#define VUSBHS_OTGSC_ASVIE 0x04000000 /* A-session valid IE */ +#define VUSBHS_OTGSC_AVVIE 0x02000000 /* A-V-bus valid IE */ +#define VUSBHS_OTGSC_IDIE 0x01000000 /* OTG ID IE */ + +/* OTG interrupt status bit masks */ +#define VUSBHS_OTGSC_INTERRUPT_STATUS_BITS_MASK 0x005F0000 +#define VUSBHS_OTGSC_DPIS 0x00400000 /* Data-line pulsing IS */ +#define VUSBHS_OTGSC_1MSIS 0x00200000 +#define VUSBHS_OTGSC_BSEIS 0x00100000 /* B-session end IS */ +#define VUSBHS_OTGSC_BSVIS 0x00080000 /* B-session valid IS */ +#define VUSBHS_OTGSC_ASVIS 0x00040000 /* A-session valid IS */ +#define VUSBHS_OTGSC_AVVIS 0x00020000 /* A-Vbus valid IS */ +#define VUSBHS_OTGSC_IDIS 0x00010000 /* OTG ID IS */ + +/* OTG status bit masks */ +#define VUSBHS_OTGSC_DPS 0x00004000 +#define VUSBHS_OTGSC_BSE 0x00001000 /* B-session end */ +#define VUSBHS_OTGSC_BSV 0x00000800 /* B-session valid */ +#define VUSBHS_OTGSC_ASV 0x00000400 /* A-session valid */ +#define VUSBHS_OTGSC_AVV 0x00000200 /* A-Vbus Valid */ +#define VUSBHS_OTGSC_ID 0x00000100 /* OTG ID */ + +/* OTG control bit masks */ +#define VUSBHS_OTGSC_CTL_BITS 0x2F +#define VUSBHS_OTGSC_B_HOST_EN 0x00000020 /* B_host_enable */ +#define VUSBHS_OTGSC_DP 0x00000010 /* Data-pulsing */ +#define VUSBHS_OTGSC_OT 0x00000008 /* OTG termination */ +#define VUSBHS_OTGSC_VO 0x00000004 /* Vbus on */ +#define VUSBHS_OTGSC_VC 0x00000002 /* Vbus charge */ +#define VUSBHS_OTGSC_VD 0x00000001 /* Vbus discharge */ + +#define usb_register volatile u32 +#define ehci_frame_list_element_pointer u32 + +/* The VUSB register structure */ +struct vusb20 { + union { + struct { + usb_register id; + usb_register hw_general; + usb_register hw_host; + usb_register hw_device; + usb_register hw_txbuf; + usb_register hw_rxbuf; + } id; + + struct { + usb_register caplength_hciver; + usb_register hcs_params; + /* HC structural parameters */ + usb_register hcc_params; + /* HC Capability Parameters */ + usb_register reserved1[5]; + usb_register dci_version; + /* DC version number and resv'd bits */ + usb_register dcc_params; + /* DC Capability Parameters */ + } capab; + + struct { + usb_register usb_cmd; /* Command register */ + usb_register usb_sts; /* Status register */ + usb_register usb_intr; /* Interrupt enable */ + usb_register usb_frindex; /* Frame index */ + usb_register ctrldssegment; + /* 4G segment selector */ + usb_register device_addr; /* Device Address */ + usb_register ep_list_addr; + /* Endpoint List Address */ + usb_register reserved0[9]; + usb_register config_flag; + /* Configured Flag register */ + usb_register portscx[VUSBHS_MAX_PORTS]; + /* Port Status/Control x, x = 1..8 */ + usb_register otgsc; + usb_register usb_mode; + /* USB Host/Device mode */ + usb_register ep_setup_stat; + /* Endpoint Setup Status */ + usb_register ep_prime; + /* Endpoint Initialize */ + usb_register ep_flush; + /* Endpoint De-initialize */ + usb_register ep_status; + /* Endpoint Status */ + usb_register ep_complete; + /* Endpoint Interrupt On Complete */ + usb_register ep_ctrlx[16]; + /* Endpoint Control, where x = 0..15 */ + } op_dev; + + struct { + usb_register usb_cmd; /* Command register */ + usb_register usb_sts; /* Status register */ + usb_register usb_intr; /* Interrupt enable */ + usb_register usb_frindex; /* Frame index */ + usb_register ctrldssegment; + /* 4G segment selector */ + usb_register periodic_list_base_addr; + /* Periodic schedule list */ + usb_register curr_async_list_addr; + /* Current Asynch schedule list */ + usb_register asyncttsts; + /* Async buf in embedded TT control */ + usb_register reserved0[8]; + usb_register config_flag; + /* Configured Flag register */ + usb_register portscx[VUSBHS_MAX_PORTS]; + /* Port Status/Control x, x = 1..8 */ + usb_register otgsc; + /* OTG status and control register */ + usb_register usb_mode; + /* USB Host/Device mode */ + } op_host; + } regs; +}; + +struct vusb20_ep_queue_head { + u32 max_pkt_length; /* Bits 16..26 Bit 15 is Interrupt + * On Setup + */ + u32 curr_dtd_ptr; /* Current dTD Pointer */ + u32 next_dtd_ptr; /* Next dTD Pointer */ + u32 size_ioc_int_sts; /* Total bytes (16..30), IOC (15), + * INT (8), STS (0-7) + */ + u32 buff_ptr0; /* Buffer pointer Page 0 (12-31) */ + u32 buff_ptr1; /* Buffer pointer Page 1 (12-31) */ + u32 buff_ptr2; /* Buffer pointer Page 2 (12-31) */ + u32 buff_ptr3; /* Buffer pointer Page 3 (12-31) */ + u32 buff_ptr4; /* Buffer pointer Page 4 (12-31) */ + u32 reserved1; + u8 setup_buffer[8]; /* 8 bytes of setup data that + * follows the Setup PID + */ + u32 reserved2[4]; +}; + +struct scratch { + void * private; + void ( * free)(void *); + void * xd_for_this_dtd; +}; + +struct vusb20_ep_tr { + u32 next_tr_elem_ptr; /* Memory address of next + * dTD to be processed (5-31) + * and the T (bit 0) indicating + * pointer validity + */ + u32 size_ioc_sts; /* Total bytes (16-30), + * IOC (15), Status (0-7) + */ + u32 buff_ptr0; /* Buffer pointer Page 0 */ + u32 buff_ptr1; /* Buffer pointer Page 1 */ + u32 buff_ptr2; /* Buffer pointer Page 2 */ + u32 buff_ptr3; /* Buffer pointer Page 3 */ + u32 buff_ptr4; /* Buffer pointer Page 4 */ + struct scratch *scratch_ptr; +}; + +struct ehci_itd { + u32 next_link_ptr; /* (5-31) Memory address of + * next schedule data structure + * item Type (1..2 ) and the + * T (bit 0) indicating pointer + * validity + */ + u32 tr_status_ctl_list[8]; /* bits 31-28: Status, + * bits 27-16: Tr X length + * bit 15: Int on complete + * bits 14-12: Page Select + * bits 11-0: Tr X offset + */ + u32 buffer_page_ptr_list[7]; /* bits 31-12 4K aligned + * pointer to physical memory + * bits 11-8 endpoint no. + * bit 7: reserved + * bits 6-0 device address + */ + struct scratch *scratch_ptr; + void * pipe_descr_for_this_itd; + void * pipe_tr_descr_for_this_itd; + u32 * frame_list_ptr; + u32 number_of_transactions; + + /* 32-byte aligned structures */ + u32 reserved[11]; +}; + +struct ehci_sitd { + u32 next_link_ptr; /* (5-31) Memory address of + * next schedule data structure + * item Type (1..2 ) and the + * T (bit 0) indicating pointer + * validity + */ + u32 ep_capab_charac; /* bits 31: Direction (I/O), + * bits 30-24: Port number + * bit 23: reserved + * bits 22-16: Hub address + * bits 15-12: Reserved + * bits 11-8: Endpoint number + * bit 7: reserved + * bits 6-0: device address + */ + u32 uframe_sched_ctl; /* bits 31-16: reserved + * bits 15-8: Split completion mask + * bits 7-0: Split start mask + */ + u32 transfer_state; /* bit 31: int on complete + * bit 30: Page Select + * bits 29-26: Reserved + * bits 25-16: total bytes to + * transfer + * bits 15-8: uframe + * complete-split progress mask + * bits 7-0: status + */ + u32 buffer_ptr_0; /* bits 31-12: 4K aligned pointer + * to physical memory + * bits 11-0: Current offset + */ + u32 buffer_ptr_1; /* bits 31-12: 4K aligned pointer + * to physical memory + * bits 11-5 reserved + * bits 4-3 tr position + * bits 2-0 tr count + */ + u32 back_link_ptr; /* bits 31-5 back pointer points to sITD + * bits 4-1: reserved + * bit 0: terminate + */ + struct scratch *scratch_ptr; + void * pipe_descr_for_this_sitd; + void * pipe_tr_descr_for_this_sitd; + u32 * frame_list_ptr; + + /* align to 16 word boundry */ + u32 reserved[5]; +}; + +struct ehci_qtd { + u32 next_qtd_ptr; /* (5-31) Memory address of + * next qTD to be processed + * (4..1) reserved + * T (bit 0) indicating pointer + * validity + */ + u32 alt_next_qtd_ptr; /* bits 31-5: alternate next + * qTD if the above one encounters + * a short packet + * (4..1) reserved + * T (bit 0) indicating pointer + * validity + */ + u32 token; /* bits 31: data toggle + * bits 30-16: Total bytes to transfer + * bit 15: Interrupt on Complete + * bits 14-12: Current page + * bits 11-10: Error Counter + * bits 9-8: PID code + * bits 7-0: status + */ + u32 buffer_ptr_0; /* bit 31-12: 4K-page aligned + * physical memory address + * bit 11-0: Current Offset + */ + u32 buffer_ptr_1; /* bit 31-12: 4K-page aligned + * physical memory address + * bit 11-0: reserved + */ + u32 buffer_ptr_2; /* bit 31-12: 4K-page aligned + * physical memory address + * bit 11-0: reserved + */ + u32 buffer_ptr_3; /* bit 31-12: 4K-page aligned + * physical memory address + * bit 11-0: reserved + */ + u32 buffer_ptr_4; /* bit 31-12: 4K-page aligned + * physical memory address + * bit 11-0: reserved + */ + struct scratch *scratch_ptr; + void * pipe_descr_for_this_qtd; + void * pipe_tr_descr_for_this_qtd; + + u32 reserved[5]; +}; + +struct ehci_qh { + u32 horiz_link_tpr; /* (5-31) Memory address of + * next data object to be processed + * (4..3) reserved + * (2..1) type of the item + * T (bit 0) indicating pointer + * validity + */ + u32 ep_capab_charac1; /* bits 31-28: NAK count reload, + * bit 27: Control endpoint flag + * bit 26-16: Maximum packet length + * bit 15: Head of reclamation + * list flag + * bit 14: data toggle control + * bits 13-12: endpoint speed + * bit 11-8: endpoint number + * bits 7: Inactivate on next tr + * bits 6-0: Device address + */ + u32 ep_capab_charac2; /* bits 31-30: High-BW pipe + * Multiplier, + * bit 29-23: Port number + * bit 22-16: Hub address + * bit 15-8: Split completion mask + * bit 7-0: Interrupt schedule mask + */ + u32 curr_qtd_link_ptr;/* bits 31-5: physical memory address + * of the current xaction processed + */ + u32 next_qtd_link_ptr;/* bits 31-5: physical memory address + * of the current xaction processed + * bit 0: Terminate bit + */ + u32 alt_next_qtd_link_ptr; /* bits 31-5: physical memory + * address of the current + * xaction processed + * bits 4-1: NAK counter + * bit 0: Terminate bit + */ + u32 status; /* bit 31: data-toggle + * bits 30-16: total bytes to transfer + * bit 15: Interrupt on complete + * bits 11-10: Error counter + * bit 0: Ping state/Err + * physical memory address + * bit 11-0: reserved + */ + u32 buffer_ptr_0; /* bit 31-12: 4K-page aligned + * physical memory address + * bit 11-0: reserved + */ + u32 buffer_ptr_1; /* bit 31-12: 4K-page aligned + * physical memory address + * bit 7-0: Split-transaction, + * complete-split progress + */ + u32 buffer_ptr_2; /* bits 31-12: 4K-page aligned + * physical memory address + * bits 11-5: S-bytes + * bits 4-0: Split-transaction + * frame tag + */ + u32 buffer_ptr_3; /* bit 31-12: 4K-page aligned + * physical memory address + * bit 11-0: reserved + */ + u32 buffer_ptr_4; /* bit 31-12: 4K-page aligned + * physical memory address + * bit 11-0: reserved + */ + struct scratch *scratch_ptr; + void * pipe_descr_for_this_qh; + + u32 reserved[18]; +}; + +struct ehci_fstn { + u32 normal_path_link_ptr; /* (5-31) Memory address of + * next data object to be + * processed in the periodic + * list + * bits 4-3: reserved + * (2..1) type of the item + * T (bit 0) indicating pointer + * validity + */ + u32 back_path_link_ptr; /* bits 31-5: Memory address of + * the queue head, + * bit 4-3: reserved + * (2..1) type of the item + * T (bit 0) indicating pointer + * validity + */ + struct scratch *scratch_ptr; + + /* 32-bytes aligned */ + u32 reserved[6]; +}; + +struct frame_bw { + u32 allocated_bw; /* Allocated bandwidth for this + * frame/uframe + */ +}; + +#endif diff --git a/drivers/usb/gadget/pmc-sierra/Makefile b/drivers/usb/gadget/pmc-sierra/Makefile new file mode 100644 index 0000000..0e1850f --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/Makefile @@ -0,0 +1,4 @@ +# +# Makefile for PMC MSP71XX USB peripheral controller driver +# +obj-$(CONFIG_USB_MSP71XX) += msp71xx_udc.o diff --git a/drivers/usb/gadget/pmc-sierra/msp71xx_dev.c b/drivers/usb/gadget/pmc-sierra/msp71xx_dev.c new file mode 100644 index 0000000..0de95ef --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/msp71xx_dev.c @@ -0,0 +1,1192 @@ +/* + * msp71xx_dev.c -- This file contains all the chapter 9 handling routines + * and service handlers for handling bus reset, suspend and + * endpoints completion functions + * + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include + +#include "usb.h" +#include "devapi.h" +#include "msp71xx_dev.h" +#include "usbprv_dev.h" +#include "debug.c" +#include "debug.h" + +/* + * Local Constants + */ +#define APP_CONTROL_MAX_PKT_SIZE 64 +#define DEV_DESC_MAX_PACKET_SIZE 7 +#define EP1_FS_MAX_TX_PACKET_SIZE 64 +#define EP1_FS_MAX_RX_PACKET_SIZE 64 + +#define EP1_HS_MAX_TX_PACKET_SIZE 512 +#define EP1_HS_MAX_RX_PACKET_SIZE 512 + +#define EP2_FS_MAX_TX_PACKET_SIZE 64 +#define EP2_FS_MAX_RX_PACKET_SIZE 64 +#define EP2_HS_MAX_TX_PACKET_SIZE 512 +#define EP2_HS_MAX_RX_PACKET_SIZE 512 + +#define DEV_MAX_CFG 4 + +/* + * Local Variables + */ + +/* A temporary buffer for control enpoint to send data */ +static u8 * ep_temp_buf; + +/**************************************************************************** + * + * FUNCTION: ch9_get_status + * __________________________________________________________________________ + * + * DESCRIPTION: Executes the Chapter 9 Get Status command + * + * INPUTS: handle - (pointer to) USB device handle + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: + * Chapter 9 GetStatus command + * wValue=Zero + * wIndex=Zero + * wLength=1 + * DATA=bmERR_STAT + * The GET_STATUS command is used to read the bmERR_STAT register. + * + * Return the status based on the bRrequestType bits: + * device (0) = bit 0 = 1 = self powered + * bit 1 = 0 = DEVICE_REMOTE_WAKEUP which can be modified + * with a SET_FEATURE/CLEAR_FEATURE command. + * interface(1) = 0000. + * endpoint(2) = bit 0 = stall. + * static u8 * pData; + * + * See section 9.4.5 (page 190) of the USB 1.1 Specification. + * + ***************************************************************************/ +static void ch9_get_status( + _usb_device_handle handle, + bool setup, + struct setup * setup_ptr) +{ + u16 temp_status; + struct usb_dev_state * usb_dev_ptr = (struct usb_dev_state *)handle; + + if (setup) { + switch (setup_ptr->request_type) { + case (USB_RECIP_DEVICE | USB_DIR_IN): + /* Device request */ + _usb_device_get_status(handle, USB_STATUS_DEVICE, + (u16 *)&temp_status); + usb_dev_ptr->usb_status[0] = temp_status & 0xFF; + usb_dev_ptr->usb_status[1] = (temp_status >> 8) & 0xFF; + /* Send the requested data */ + _usb_device_send_data(handle, 0, + (u8 *)&usb_dev_ptr->usb_status[0], + 2 /* two bytes */); + break; + + case (USB_RECIP_INTERFACE | USB_DIR_IN): + /* Interface request */ + usb_dev_ptr->if_status = usb_dev_ptr->usb_if_alt[ + setup_ptr->index & 0x0003]; + + /* Send the requested data */ + _usb_device_send_data(handle, 0, + (void *)&usb_dev_ptr->if_status, + sizeof(usb_dev_ptr->if_status)); + break; + + case (USB_RECIP_ENDPOINT | USB_DIR_IN): + /* Endpoint request */ + usb_dev_ptr->endpoint = setup_ptr->index & + USB_STATUS_ENDPOINT_NUMBER_MASK; + + _usb_device_get_status(handle, USB_STATUS_ENDPOINT | + usb_dev_ptr->endpoint, &temp_status); + + /* + * copy status to usb_status global buffer for + * uncached access + */ + usb_dev_ptr->usb_status[0] = temp_status & 0xFF; + usb_dev_ptr->usb_status[1] = (temp_status >> 8) & 0xFF; + + /* Send the requested data */ + _usb_device_send_data(handle, 0, + (u8 *)&usb_dev_ptr->usb_status[0], + 2 /* sizeof(usb_status) */); + break; + + default: + /* Unknown request */ + _usb_device_stall_endpoint(handle, 0, 0); + return; + + } + + /* status phase */ + _usb_device_recv_data(handle, 0, 0, 0); + } +} + +/**************************************************************************** + * + * FUNCTION: ch9_clear_feature + * __________________________________________________________________________ + * + * DESCRIPTION: Executes the Chapter 9 Clear Feature command + * + * INPUTS: handle - (pointer to) USB device handle + * setup - setup phase + * setup_ptr - pointer to setup packet + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: None + * + ***************************************************************************/ +static void ch9_clear_feature( + _usb_device_handle handle, + bool setup, + struct setup * setup_ptr) +{ + static u8 endpoint; + u16 usb_status; + + _usb_device_get_status(handle, USB_STATUS_DEVICE_STATE, &usb_status); + + if ((usb_status != USB_STATE_CONFIG) && + (usb_status != USB_STATE_ADDRESS)) { + _usb_device_stall_endpoint(handle, 0, 0); + return; + } + + if (setup) { + switch (setup_ptr->request_type) { + case USB_RECIP_DEVICE: + /* DEVICE */ + if (setup_ptr->value == 1) { + /* clear remote wakeup */ + _usb_device_get_status(handle, + USB_STATUS_DEVICE, &usb_status); + usb_status &= ~USB_REMOTE_WAKEUP; + _usb_device_set_status(handle, + USB_STATUS_DEVICE, usb_status); + } else { + _usb_device_stall_endpoint(handle, 0, 0); + return; + } + break; + + case USB_RECIP_ENDPOINT: + /* ENDPOINT */ + if (setup_ptr->value != 0) { + _usb_device_stall_endpoint(handle, 0, 0); + return; + } + endpoint = setup_ptr->index & + USB_STATUS_ENDPOINT_NUMBER_MASK; + _usb_device_get_status(handle, + USB_STATUS_ENDPOINT | endpoint, + &usb_status); + /* unstall */ + _usb_device_set_status(handle, + USB_STATUS_ENDPOINT | endpoint, + 0); + break; + default: + _usb_device_stall_endpoint(handle, 0, 0); + return; + } + + /* status phase */ + _usb_device_send_data(handle, 0, 0, 0); + } +} + +/**************************************************************************** + * + * FUNCTION: ch9_set_feature + * __________________________________________________________________________ + * + * DESCRIPTION: Executes the Chapter 9 Set Feature command + * + * INPUTS: handle - (pointer to) USB device handle + * setup - setup phase + * setup_ptr - pointer to setup packet + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: None + * + ***************************************************************************/ +static void ch9_set_feature( + _usb_device_handle handle, + bool setup, + struct setup * setup_ptr) +{ + u16 usb_status; + u8 endpoint; + struct usb_dev_state * usb_dev_ptr; + + usb_dev_ptr = (struct usb_dev_state *)handle; + + if (setup) { + switch (setup_ptr->request_type) { + case USB_RECIP_DEVICE: + /* DEVICE */ + switch (setup_ptr->value) { + case USB_DEVICE_REMOTE_WAKEUP: + /* set remote wakeup */ + _usb_device_get_status(handle, + USB_STATUS_DEVICE, &usb_status); + usb_status |= USB_REMOTE_WAKEUP; + _usb_device_set_status(handle, + USB_STATUS_DEVICE, usb_status); + break; + case USB_DEVICE_TEST_MODE: + /* Test Mode */ + if (setup_ptr->index & 0x00FF) { + _usb_device_stall_endpoint( + handle, 0, 0); + return; + } + _usb_device_get_status(handle, + USB_STATUS_DEVICE_STATE, + &usb_status); + if ((usb_status == USB_STATE_CONFIG) || + (usb_status == USB_STATE_ADDRESS) || + (usb_status == USB_STATE_DEFAULT)) { + usb_dev_ptr->enter_test_mode = true; + usb_dev_ptr->test_mode_index = + setup_ptr->index & 0xFF00; + } else { + _usb_device_stall_endpoint( + handle, 0, 0); + return; + } + break; + default: + _usb_device_stall_endpoint(handle, 0, 0); + return; + } + break; + + case USB_RECIP_ENDPOINT: + /* ENDPOINT */ + if (setup_ptr->value != 0) { + _usb_device_stall_endpoint(handle, 0, 0); + return; + } + endpoint = setup_ptr->index & + USB_STATUS_ENDPOINT_NUMBER_MASK; + _usb_device_get_status(handle, + USB_STATUS_ENDPOINT | endpoint, + &usb_status); + /* set stall */ + _usb_device_set_status(handle, + USB_STATUS_ENDPOINT | endpoint, + 1); + break; + + default: + _usb_device_stall_endpoint(handle, 0, 0); + return; + } + + /* status phase */ + _usb_device_send_data(handle, 0, 0, 0); + } + + if (usb_dev_ptr->enter_test_mode) { + /* Enter Test Mode */ + _usb_device_set_status(handle, USB_STATUS_TEST_MODE, + usb_dev_ptr->test_mode_index); + } +} + +/**************************************************************************** + * + * FUNCTION: ch9_set_address + * __________________________________________________________________________ + * + * DESCRIPTION: Executes the Chapter 9 Set Address command + * + * INPUTS: handle - (pointer to) USB device handle + * setup - setup phase + * setup_ptr - pointer to setup packet + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: We setup a TX packet of 0 length ready for the IN token + * Once we get the TOK_DNE interrupt for the IN token, then + * we change the ADDR register and go to the ADDRESS state. + * + ***************************************************************************/ +static void ch9_set_address( + _usb_device_handle handle, + bool setup, + struct setup * setup_ptr) +{ + static u8 new_address; + u32 max_pkt_tx_size1; + u32 max_pkt_rx_size1; + u32 max_pkt_tx_size2; + u32 max_pkt_rx_size2; + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + struct msp71xx_udc *dev; + + usb_dev_ptr = (struct usb_dev_state *)handle; + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + + /* get device handle */ + dev = msp71xx_get_dev_ptr(); + + if (setup) { + new_address = setup_ptr->value; + /* ack */ + _usb_device_send_data(handle, 0, 0, 0); + } else { + _usb_device_set_status(handle, + USB_STATUS_ADDRESS, new_address); + _usb_device_set_status(handle, + USB_STATUS_DEVICE_STATE, USB_STATE_ADDRESS); + + if (usb_dev_ptr->speed == USB_DEV_SPEED_HIGH) { + max_pkt_tx_size1 = EP1_HS_MAX_TX_PACKET_SIZE; + max_pkt_rx_size1 = EP1_HS_MAX_RX_PACKET_SIZE; + max_pkt_tx_size2 = EP2_HS_MAX_TX_PACKET_SIZE; + max_pkt_rx_size2 = EP2_HS_MAX_RX_PACKET_SIZE; + } else { + max_pkt_tx_size1 = EP1_FS_MAX_TX_PACKET_SIZE; + max_pkt_rx_size1 = EP1_FS_MAX_RX_PACKET_SIZE; + max_pkt_tx_size2 = EP2_FS_MAX_TX_PACKET_SIZE; + max_pkt_rx_size2 = EP2_FS_MAX_RX_PACKET_SIZE; + } + + /* initialize bulk endpoints */ + if (dev) { + printk(KERN_INFO "max pkt size rx %8x tx %8x\r\n", + (u32)max_pkt_rx_size1, + (u32)max_pkt_tx_size1); + _usb_device_init_endpoint(handle, + dev->ep[EP_1_OUT].num, max_pkt_rx_size1, + USB_RECV, USB_BULK_ENDPOINT, + USB_DEVICE_DONT_ZERO_TERMINATE); + _usb_device_init_endpoint(handle, + dev->ep[EP_1_IN].num, max_pkt_tx_size1, + USB_SEND, USB_BULK_ENDPOINT, + USB_DEVICE_DONT_ZERO_TERMINATE); + + /* initialize interrupt endpoints */ + _usb_device_init_endpoint(handle, + dev->ep[EP_2_OUT].num, max_pkt_rx_size2, + USB_RECV, USB_INTERRUPT_ENDPOINT, + USB_DEVICE_DONT_ZERO_TERMINATE); + _usb_device_init_endpoint(handle, + dev->ep[EP_2_IN].num, max_pkt_tx_size2, + USB_SEND, USB_INTERRUPT_ENDPOINT, + USB_DEVICE_DONT_ZERO_TERMINATE); + } + } +} + +/**************************************************************************** + * + * FUNCTION: ch9_get_descriptor + * __________________________________________________________________________ + * + * DESCRIPTION: Executes the Chapter 9 Get Description command + * + * INPUTS: handle - (pointer to) USB device handle + * setup - setup phase + * setup_ptr - pointer to setup packet + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: The Device Request can ask for + * Device/Config/string/interface/endpoint + * descriptors (via wValue). + * We then post an IN response to return the + * requested descriptor. And then wait for the + * OUT which terminates the control transfer. + * + ***************************************************************************/ +static void ch9_get_descriptor( + _usb_device_handle handle, + bool setup, + struct setup * setup_ptr) +{ + /* status phase */ + _usb_device_recv_data(handle, 0, 0, 0); +} + +/**************************************************************************** + * + * FUNCTION: ch9_set_descriptor + * __________________________________________________________________________ + * + * DESCRIPTION: Executes the Chapter 9 Set Description command + * + * INPUTS: handle - (pointer to) USB device handle + * setup - setup phase + * setup_ptr - pointer to setup packet + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES + * + ***************************************************************************/ +static void ch9_set_descriptor( + _usb_device_handle handle, + bool setup, + struct setup * setup_ptr) +{ + _usb_device_send_data(handle, 0, 0, 0); +} + +/**************************************************************************** + * + * FUNCTION: ch9_get_config + * __________________________________________________________________________ + * + * DESCRIPTION: Executes the Chapter 9 Get Configuration command + * + * INPUTS: handle - (pointer to) USB device handle + * setup - setup phase + * setup_ptr - pointer to setup packet + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: + * + ***************************************************************************/ +static void ch9_get_config( + _usb_device_handle handle, + bool setup, + struct setup * setup_ptr) +{ + /* Return the currently selected configuration */ + if (setup) { + /* status phase */ + _usb_device_recv_data(handle, 0, 0, 0); + } +} + +/**************************************************************************** + * + * FUNCTION: ch9_set_config + * __________________________________________________________________________ + * + * DESCRIPTION: Executes the Chapter 9 Set Configuration command + * + * INPUTS: handle - (pointer to) USB device handle + * setup - setup phase + * setup_ptr - pointer to setup packet + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: + * + ***************************************************************************/ +static void ch9_set_config( + _usb_device_handle handle, + bool setup, + struct setup * setup_ptr) +{ + u16 usb_state; + + if (setup) { + if ((setup_ptr->value & 0x00FF) > DEV_MAX_CFG) { + /* generate stall */ + _usb_device_stall_endpoint(handle, 0, 0); + return; + } + + /* 0 indicates return to unconfigured state */ + if ((setup_ptr->value & 0x00FF) == 0) { + _usb_device_get_status(handle, + USB_STATUS_DEVICE_STATE, &usb_state); + if ((usb_state == USB_STATE_CONFIG) || + (usb_state == USB_STATE_ADDRESS)) { + /* clear the currently selected config value */ + _usb_device_set_status(handle, + USB_STATUS_CURRENT_CONFIG, 0); + _usb_device_set_status(handle, + USB_STATUS_DEVICE_STATE, + USB_STATE_ADDRESS); + /* status phase */ + _usb_device_send_data(handle, 0, 0, 0); + } else + _usb_device_stall_endpoint(handle, 0, 0); + return; + } + + /* + * If the configuration value (setup_ptr->value & 0x00FF) + * differs from the current configuration value, then + * endpoints must be reconfigured to match the new device + * configuration + */ + _usb_device_get_status(handle, USB_STATUS_CURRENT_CONFIG, + &usb_state); + if (usb_state != (setup_ptr->value & 0x00FF)) { + /* Reconfigure endpoints here */ + _usb_device_set_status(handle, + USB_STATUS_CURRENT_CONFIG, + setup_ptr->value & 0x00FF); + _usb_device_set_status(handle, + USB_STATUS_DEVICE_STATE, + USB_STATE_CONFIG); + /* status phase */ + _usb_device_send_data(handle, 0, 0, 0); + return; + } + _usb_device_set_status(handle, USB_STATUS_DEVICE_STATE, + USB_STATE_CONFIG); + + /* status phase */ + _usb_device_send_data(handle, 0, 0, 0); + } +} + +/**************************************************************************** + * + * FUNCTION: ch9_get_interface + * __________________________________________________________________________ + * + * DESCRIPTION: Executes the Chapter 9 Get Interface command + * + * INPUTS: handle - (pointer to) USB device handle + * setup - setup phase + * setup_ptr - pointer to setup packet + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: + * + ***************************************************************************/ +static void ch9_get_interface( + _usb_device_handle handle, + bool setup, + struct setup * setup_ptr) +{ + if (setup) { + /* status phase */ + _usb_device_recv_data(handle, 0, 0, 0); + } +} + +/**************************************************************************** + * + * FUNCTION: ch9_set_interface + * __________________________________________________________________________ + * + * DESCRIPTION: Executes the Chapter 9 Set Interface command + * + * INPUTS: handle - (pointer to) USB device handle + * setup - setup phase + * setup_ptr - pointer to setup packet + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: + * + ***************************************************************************/ +static void ch9_set_interface( + _usb_device_handle handle, + bool setup, + struct setup * setup_ptr) +{ + /* status phase */ + _usb_device_send_data(handle, 0, 0, 0); +} + +/**************************************************************************** + * + * FUNCTION: ch9_synch_frame + * __________________________________________________________________________ + * + * DESCRIPTION: Executes the Chapter 9 Synch Frame command + * + * INPUTS: handle - (pointer to) USB device handle + * setup - setup phase + * setup_ptr - pointer to setup packet + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: + * + ***************************************************************************/ +static void ch9_synch_frame( + _usb_device_handle handle, + bool setup, + struct setup * setup_ptr) +{ + if (setup) { + if (setup_ptr->request_type != 0x02) { + _usb_device_stall_endpoint(handle, 0, 0); + return; + } + + _usb_device_get_status(handle, USB_STATUS_SOF_COUNT, + (u16 *)ep_temp_buf); + _usb_device_send_data(handle, 0, ep_temp_buf, + min((size_t)setup_ptr->length, sizeof(u16))); + + /* status phase */ + _usb_device_recv_data(handle, 0, 0, 0); + } +} + +/**************************************************************************** + * + * FUNCTION: ch9_class + * __________________________________________________________________________ + * + * DESCRIPTION: Executes the Chapter 9 specific class driver command + * + * INPUTS: handle - (pointer to) USB device handle + * setup - setup phase + * direction - transmit or receive + * buffer - (pointer) to buffer + * length - length of transfer + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: + * + ***************************************************************************/ +static void ch9_class( + _usb_device_handle handle, + bool setup, + u8 direction, + u8 * buffer, + u32 length, + u8 error) +{ + struct msp71xx_udc *dev; + int status; + struct setup * setup_ptr; + struct usb_dev_state * usb_dev_ptr; + + usb_dev_ptr = (struct usb_dev_state *)handle; + + /* get device handle */ + dev = msp71xx_get_dev_ptr(); + + if (setup) { + /* This spin_lock is locked in the msp71xx_udc_irq() */ + spin_unlock (&dev->lock); + status = 0; + if (dev) { + setup_ptr = &usb_dev_ptr->local_setup_packet; + /* + * Preserve little endian setup value, length, + * index for driver->setup function. + */ + setup_ptr->value = USB_WORD_SWAP(setup_ptr->value); + setup_ptr->length = USB_WORD_SWAP(setup_ptr->length); + setup_ptr->index = USB_WORD_SWAP(setup_ptr->index); + if (dev->driver) + status = dev->driver->setup(&dev->gadget, + (const struct usb_ctrlrequest *) + &usb_dev_ptr->local_setup_packet); + + /* restore big endian setup value, length, index */ + setup_ptr->value = USB_WORD_SWAP(setup_ptr->value); + setup_ptr->length = USB_WORD_SWAP(setup_ptr->length); + setup_ptr->index = USB_WORD_SWAP(setup_ptr->index); + } + if (status) + _usb_device_stall_endpoint(handle, 0, 0); + + /* This spin_lock will be unlocked in the msp71xx_udc_irq() */ + spin_lock (&dev->lock); + switch (usb_dev_ptr->local_setup_packet.request) { + case USB_CDC_SEND_ENCAPSULATED_COMMAND: + /* status phase */ + _usb_device_send_data(handle, 0, 0, 0); + break; + case USB_CDC_GET_ENCAPSULATED_RESPONSE: + /* status phase */ + _usb_device_recv_data(handle, 0, 0, 0); + break; + default: + _usb_device_stall_endpoint(handle, 0, 0); + break; + } + } +} + +/**************************************************************************** + * + * FUNCTION: service_ep0 + * __________________________________________________________________________ + * + * DESCRIPTION: Handles endpoint 0 interrupt event + * + * INPUTS: handle - (pointer to) USB device handle + * setup - setup phase + * direction - transmit or receive + * buffer - (pointer) to buffer + * length - length of transfer + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: + * + ***************************************************************************/ +static void service_ep0( + _usb_device_handle handle, + bool setup, + u8 direction, + u8 * buffer, + u32 length, + u8 error) +{ + struct msp71xx_udc *dev; + int status; + int flag; + struct setup * setup_ptr; + struct usb_dev_state * usb_dev_ptr; + + usb_dev_ptr = (struct usb_dev_state *)handle; + setup_ptr = &usb_dev_ptr->local_setup_packet; + + /* get device handle */ + dev = msp71xx_get_dev_ptr(); + flag = 0; + + if (setup) + _usb_device_read_setup_data(handle, 0, (u8 *)setup_ptr); + + if (setup_ptr->request_type & USB_DIR_IN) + dev->ep[EP_0].is_in = 1; + else + dev->ep[EP_0].is_in = 0; + + switch (setup_ptr->request_type & + (USB_TYPE_CLASS | USB_TYPE_VENDOR)) { + case USB_TYPE_STANDARD: + switch (setup_ptr->request) { + case USB_REQ_GET_STATUS: + ch9_get_status(handle, setup, setup_ptr); + break; + + case USB_REQ_CLEAR_FEATURE: + ch9_clear_feature(handle, setup, setup_ptr); + break; + + case USB_REQ_SET_FEATURE: + ch9_set_feature(handle, setup, setup_ptr); + break; + + case USB_REQ_SET_ADDRESS: + ch9_set_address(handle, setup, setup_ptr); + break; + + /* Let upper layer handles this */ + case USB_REQ_SET_DESCRIPTOR: + ch9_set_descriptor(handle, setup, setup_ptr); + /* fall through */ + + case USB_REQ_SET_CONFIGURATION: + case USB_REQ_SET_INTERFACE: + case USB_REQ_GET_CONFIGURATION: + case USB_REQ_GET_INTERFACE: + case USB_REQ_GET_DESCRIPTOR: + if (setup) { + /* + * This spin_lock is locked in the + * msp71xx_udc_irq() + */ + spin_unlock (&dev->lock); + status = 0; + if (dev) { + /* + * Preserve little endian setup value, + * length, index for driver->setup + * function. + */ + setup_ptr->value = USB_WORD_SWAP( + setup_ptr->value); + setup_ptr->length = USB_WORD_SWAP( + setup_ptr->length); + setup_ptr->index = USB_WORD_SWAP( + setup_ptr->index); + + if (dev->driver) + status = dev->driver->setup( + &dev->gadget, + (const struct + usb_ctrlrequest*) + setup_ptr); + /* + * restore big endian setup value, + * length, index + */ + setup_ptr->value = USB_WORD_SWAP( + setup_ptr->value); + setup_ptr->length = USB_WORD_SWAP( + setup_ptr->length); + setup_ptr->index = USB_WORD_SWAP( + setup_ptr->index); + } + if (status) + _usb_device_stall_endpoint(handle, + 0, 0); + else { + /* send ack */ + switch (setup_ptr->request) { + case USB_REQ_GET_DESCRIPTOR: + ch9_get_descriptor(handle, + setup, setup_ptr); + break; + case USB_REQ_SET_CONFIGURATION: + ch9_set_config(handle, + setup, setup_ptr); + break; + case USB_REQ_SET_INTERFACE: + ch9_set_interface(handle, + setup, setup_ptr); + break; + case USB_REQ_GET_CONFIGURATION: + ch9_get_config(handle, + setup, setup_ptr); + break; + case USB_REQ_GET_INTERFACE: + ch9_get_interface(handle, + setup, setup_ptr); + break; + case USB_REQ_SET_DESCRIPTOR: + ch9_set_descriptor(handle, + setup, setup_ptr); + break; + default: + break; + } + } + /* + * This spin_lock will be unlocked in the + * msp71xx_udc_irq() + */ + spin_lock(&dev->lock); + } + break; + + case USB_REQ_SYNCH_FRAME: + ch9_synch_frame(handle, setup, setup_ptr); + break; + + default: + _usb_device_stall_endpoint(handle, 0, 0); + break; + } + break; + + case USB_TYPE_CLASS: + /* class specific request */ + if (setup) + ch9_class(handle, setup, direction, + (u8 *)setup_ptr, 0, 0); + else + ch9_class(handle, setup, direction, + buffer, length, error); + break; + + case USB_TYPE_VENDOR: + /* vendor specific request can be handled here */ + break; + } + + if (!setup) { + /* service to ep0 bulk in and out */ + if (dev) { + pmc_io_complete(&dev->ep[EP_0], buffer, + length, error); + pmc_io_advance(&dev->ep[EP_0]); + } + } +} + +/**************************************************************************** + * + * FUNCTION: service_ep1 + * __________________________________________________________________________ + * + * DESCRIPTION: Handles endpoint 1 interrupt event + * + * INPUTS: handle - (pointer to) USB device handle + * setup - setup phase + * direction - transmit or receive + * buffer - (pointer) to buffer + * length - length of transfer + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: + * + ***************************************************************************/ +static void service_ep1( + _usb_device_handle handle, + bool setup, + u8 direction, + u8 * buffer, + u32 length, + u8 error) +{ + struct msp71xx_udc *dev = msp71xx_get_dev_ptr(); + + if (!direction) { + if (dev) { + /* service ep1 bulk out */ + pmc_io_complete(&dev->ep[EP_1_OUT], buffer, + length, error); + pmc_io_advance(&dev->ep[EP_1_OUT]); + } + } else { + if (dev) { + /* service ep1 bulk in */ + pmc_io_complete(&dev->ep[EP_1_IN], buffer, + length, error); + pmc_io_advance(&dev->ep[EP_1_IN]); + } + } +} + +/**************************************************************************** + * + * FUNCTION: service_ep2 + * __________________________________________________________________________ + * + * DESCRIPTION: Handles endpoint 2 interrupt event + * + * INPUTS: handle - (pointer to) USB device handle + * setup - setup phase + * direction - transmit or receive + * buffer - (pointer) to buffer + * length - length of transfer + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: + * + ***************************************************************************/ +static void service_ep2( + _usb_device_handle handle, + bool setup, + u8 direction, + u8 * buffer, + u32 length, + u8 error) +{ + struct msp71xx_udc *dev = msp71xx_get_dev_ptr(); + + if (!direction) { + if (dev) { + /* service ep2 intr out */ + pmc_io_complete(&dev->ep[EP_2_OUT], buffer, + length, error); + pmc_io_advance(&dev->ep[EP_2_OUT]); + } + } else { + /* service ep2 intr in */ + if (dev) { + pmc_io_complete(&dev->ep[EP_2_IN], buffer, + length, error); + pmc_io_advance(&dev->ep[EP_2_IN]); + } + } +} + +/**************************************************************************** + * + * FUNCTION: service_speed + * __________________________________________________________________________ + * + * DESCRIPTION: Handles speed detection interrupt event + * + * INPUTS: handle - (pointer to) USB device handle + * setup - setup phase + * direction - transmit or receive + * buffer - (pointer) to buffer + * length - length of transfer + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: + * + ***************************************************************************/ +static void service_speed( + _usb_device_handle handle, + bool setup, + u8 direction, + u8 * buffer, + u32 length, + u8 error) +{ + struct msp71xx_udc *dev; + enum usb_device_speed sp; + u8 flag; + struct usb_dev_state * usb_dev_ptr; + u8 speed; + + usb_dev_ptr = (struct usb_dev_state *)handle; + flag = 0; + dev = msp71xx_get_dev_ptr(); + usb_dev_ptr->speed = length; + speed = length; + + sp = USB_SPEED_HIGH; + if (speed == USB_DEV_SPEED_LOW) { + sp = USB_SPEED_LOW; + flag = 1; + } else if (speed == USB_DEV_SPEED_FULL) { + sp = USB_SPEED_FULL; + flag = 1; + } else if (speed == USB_DEV_SPEED_HIGH) { + sp = USB_SPEED_HIGH; + flag = 1; + } + if (dev) + dev->gadget.speed = sp; + if (!flag) + printk(KERN_WARNING "Speed not detected %8x, " + "using Default High Speed\r\n", sp); + else + printk(KERN_INFO "Speed detected %8x\r\n", sp); +} + +/**************************************************************************** + * + * FUNCTION: service_suspend + * __________________________________________________________________________ + * + * DESCRIPTION: Handles suspend detection interrupt event + * + * INPUTS: handle - (pointer to) USB device handle + * setup - setup phase + * direction - transmit or receive + * buffer - (pointer) to buffer + * length - length of transfer + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: + * + ***************************************************************************/ +static void service_suspend( + _usb_device_handle handle, + bool setup, + u8 direction, + u8 * buffer, + u32 length, + u8 error) +{ + struct usb_dev_state * usb_dev_ptr; + + usb_dev_ptr = (struct usb_dev_state *)handle; +} + +/**************************************************************************** + * + * FUNCTION: reset_ep0 + * __________________________________________________________________________ + * + * DESCRIPTION: Handles bus reset interrupt event + * + * INPUTS: handle - (pointer to) USB device handle + * setup - setup phase + * direction - transmit or receive + * buffer - (pointer) to buffer + * length - length of transfer + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: + * + ***************************************************************************/ +static void reset_ep0( + _usb_device_handle handle, + bool setup, + u8 direction, + u8 * buffer, + u32 length, + u8 error) +{ + struct usb_dev_state * usb_dev_ptr; + + usb_dev_ptr = (struct usb_dev_state *)handle; + + /* + * on a reset always ensure all transfers are cancelled on + * control EP + */ + _usb_device_cancel_transfer(handle, 0, USB_RECV); + _usb_device_cancel_transfer(handle, 0, USB_SEND); + + /* Initialize the endpoint 0 in both directions */ + _usb_device_init_endpoint(handle, 0, APP_CONTROL_MAX_PKT_SIZE, + USB_RECV, USB_CONTROL_ENDPOINT, 0); + _usb_device_init_endpoint(handle, 0, APP_CONTROL_MAX_PKT_SIZE, + USB_SEND, USB_CONTROL_ENDPOINT, 0); +} diff --git a/drivers/usb/gadget/pmc-sierra/msp71xx_dev.h b/drivers/usb/gadget/pmc-sierra/msp71xx_dev.h new file mode 100644 index 0000000..32540c5 --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/msp71xx_dev.h @@ -0,0 +1,97 @@ +/* + * msp71xx_dev.h -- This file contains all the definitions & declaration + * for the PMC MSP71XX USB peripheral device driver + * for handling chapter 9 commands + * + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef MSP71XX_DEV_H +#define MSP71XX_DEV_H + +/* + * Constants + */ + +/* endpoint offset for in and out */ +#define EP_0 0 +#define EP_0_OUT 1 +#define EP_1_IN 2 +#define EP_1_OUT 3 +#define EP_2_IN 4 +#define EP_2_OUT 5 + +/* + * Structures and Unions + */ + +/***************************************************************************** + * STRUCTURE: setup + * ___________________________________________________________________________ + * + * This structure is used to define the setup control packet + * + * ELEMENTS: + * request_type - request type fields + * first field: USB direction: USB_DIR_IN, + * USB_DIR_OUT + * second field: USB types: USB_TYPE_STANDARD + * USB_TYPE_CLASS + * USB_TYPE_VENDOR + * USB_TYPE_RESERVED + * third field: USB recipients: USB_RECIP_DEVICE + * USB_RECIP_INTERFACE + * USB_RECIP_ENDPOINT + * USB_RECIP_OTHER + * request - request + * example standard requests: + * USB_REQ_GET_STATUS + * USB_REQ_CLEAR_FEATURE + * USB_REQ_SET_FEATURE + * USB_REQ_SET_ADDRESS + * USB_REQ_GET_DESCRIPTOR + * USB_REQ_SET_DESCRIPTOR + * USB_REQ_GET_CONFIGURATION + * USB_REQ_SET_CONFIGURATION + * USB_REQ_GET_INTERFACE + * USB_REQ_SET_INTERFACE + * value - value can be the following or any other values + * required by the control request + * USB_DEVICE_SELF_POWERED + * USB_DEVICE_REMOTE_WAKEUP + * USB_DEVICE_TEST_MODE + * USB_DEVICE_BATTERY + * USB_DEVICE_B_HNP_ENABLE + * USB_DEVICE_WUSB_DEVICE + * USB_DEVICE_A_HNP_SUPPORT + * USB_DEVICE_A_ALT_HNP_SUPPORT + * USB_DEVICE_DEBUG_MODE + * index - index + * length - length + * + ****************************************************************************/ + +/* USB 1.1 Setup Packet */ +struct setup { + u8 request_type; + u8 request; + u16 value; + u16 index; + u16 length; +}; + +#endif /* MSP71XX_DEV_H */ diff --git a/drivers/usb/gadget/pmc-sierra/msp71xx_udc.c b/drivers/usb/gadget/pmc-sierra/msp71xx_udc.c new file mode 100644 index 0000000..5bb0031 --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/msp71xx_udc.c @@ -0,0 +1,1863 @@ +/* + * msp71xx_udc.c -- This file contains all the definitions & declaration + * for the PMC MSP71XX USB peripheral device driver + * This driver should work with some "gadget" drivers, + * including Ethernet/RNDIS gadget drivers as well as + * Gadget Zero. + * + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#undef DEBUG /* messages on error and most fault paths */ +#undef VERBOSE /* extra debug messages (success too) */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "devapi.h" +#include "msp71xx_dev.h" +#include "usbprv_dev.h" +#include "msp71xx_udc.h" + +#include "arc.c" +#include "debug.c" +#include "dev_cncl.c" +#include "dev_ep_deinit.c" +#include "dev_main.c" +#include "dev_recv.c" +#include "dev_send.c" +#include "dev_shut.c" +#include "dev_utl.c" +#include "vusbhs_dev_cncl.c" +#include "vusbhs_dev_deinit.c" +#include "vusbhs_dev_main.c" +#include "vusbhs_dev_shut.c" +#include "vusbhs_dev_utl.c" +#include "msp71xx_dev.c" + +#ifdef CONFIG_PMCTWILED +#include "msp_led_macros.h" +#endif + +/* + * Forward References + */ +static void nuke(struct msp71xx_udc_ep *); +static int msp71xx_udc_enable(struct usb_ep *_ep, + const struct usb_endpoint_descriptor *desc); +static int msp71xx_udc_disable(struct usb_ep *_ep); +static struct usb_request * msp71xx_udc_alloc_request(struct usb_ep *_ep, + gfp_t gfp_flags); +static void msp71xx_udc_free_request(struct usb_ep *_ep, + struct usb_request *_req); +static void * msp71xx_udc_alloc_buffer(struct usb_ep *_ep, unsigned int bytes, + dma_addr_t *dma, gfp_t gfp_flags); +static void msp71xx_udc_free_buffer(struct usb_ep *_ep, void *buf, + dma_addr_t dma, unsigned int bytes); +static int msp71xx_udc_queue(struct usb_ep *_ep, + struct usb_request *_req, gfp_t gfp_flags); +static int msp71xx_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req); +static int msp71xx_udc_set_halt(struct usb_ep *_ep, int value); +static void msp71xx_udc_fifo_flush(struct usb_ep *_ep); +static int msp71xx_udc_get_frame(struct usb_gadget *_gadget); +static int msp71xx_udc_wakeup(struct usb_gadget *_gadget); + +/* + * Local Constants + */ +#define USE_SYSFS_DEBUG_FILES +#define DMA_ADDR_INVALID (~(dma_addr_t)0) + +/* + * Local Macro Definitions + */ +#define DIR_STRING(bAddress) (((bAddress) & USB_DIR_IN) ? "in" : "out") + +/* + * Local Structures + */ +static const char driver_name[] = "msp71xx_udc"; +static const char driver_desc[] = "PMC MSP71XX USB Peripheral Controller"; + +static const char ep0in[] = "ep0in"; +static const char ep0out[] = "ep0out"; +static const char ep1in[] = "ep1in-bulk"; +static const char ep1out[] = "ep1out-bulk"; +static const char ep2in[] = "ep2in-intr"; +static const char ep2out[] = "ep2out-intr"; +static const char *ep_name[] = { + ep0in, ep0out, + ep1in, ep1out, + ep2in, ep2out +}; + +static struct usb_ep_ops msp71xx_udc_ep_ops = { + .enable = msp71xx_udc_enable, + .disable = msp71xx_udc_disable, + + .alloc_request = msp71xx_udc_alloc_request, + .free_request = msp71xx_udc_free_request, + + .alloc_buffer = msp71xx_udc_alloc_buffer, + .free_buffer = msp71xx_udc_free_buffer, + + .queue = msp71xx_udc_queue, + .dequeue = msp71xx_udc_dequeue, + + .set_halt = msp71xx_udc_set_halt, + .fifo_flush = msp71xx_udc_fifo_flush, +}; + +static const struct usb_gadget_ops msp71xx_udc_ops = { + .get_frame = msp71xx_udc_get_frame, + .wakeup = msp71xx_udc_wakeup, +}; + +static struct msp71xx_udc *the_controller; + +/**************************************************************************** + * + * FUNCTION: set_halt + * __________________________________________________________________________ + * + * DESCRIPTION: Halts an endpoint + * + * INPUTS: ep - (pointer to) pmc td endpoint structure + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: None + * + ***************************************************************************/ +static inline void set_halt(struct msp71xx_udc_ep *ep) +{ + /* ep0 and bulk/intr endpoints */ + _usb_device_stall_endpoint(ep->dev->handle, ep->num, USB_SEND); + _usb_device_stall_endpoint(ep->dev->handle, ep->num, USB_RECV); +} + +/**************************************************************************** + * + * FUNCTION: clear_halt + * __________________________________________________________________________ + * + * DESCRIPTION: Clears an endpoint + * + * INPUTS: ep - (pointer to) pmc td endpoint structure + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: None + * + ***************************************************************************/ +static inline void clear_halt(struct msp71xx_udc_ep *ep) +{ + /* ep0 and bulk/intr endpoints */ + _usb_device_unstall_endpoint(ep->dev->handle, ep->num, USB_SEND); + _usb_device_unstall_endpoint(ep->dev->handle, ep->num, USB_RECV); +} + +/**************************************************************************** + * + * FUNCTION: msp71xx_udc_enable + * __________________________________________________________________________ + * + * DESCRIPTION: Enables the endpoint + * + * INPUTS: _ep - (pointer to) usb endpoint descriptor structure + * desc - (pointer to) usb endpoint description + * + * OUTPUTS: None + * + * RETURNS: Success = 0 + * Error = EINVAL + * = ESHUTDOWN + * = EIO + * + * NOTES: None + * + ***************************************************************************/ +static int msp71xx_udc_enable( + struct usb_ep *_ep, + const struct usb_endpoint_descriptor *desc) +{ + struct msp71xx_udc *dev; + struct msp71xx_udc_ep *ep; + u32 max, tmp; + unsigned long flags; + int retval1, retval2, retval = 0; + + ep = container_of(_ep, struct msp71xx_udc_ep, ep); + if (!_ep || !desc || ep->desc || + _ep->name == ep0in || _ep->name == ep0out || + desc->bDescriptorType != USB_DT_ENDPOINT) + return -EINVAL; + + dev = ep->dev; + if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) + return -ESHUTDOWN; + + /* get max packet size */ + max = le16_to_cpu(desc->wMaxPacketSize) & 0x1fff; + + if (ep->num > (MSP71XX_UDC_MAX_ENDPT / 2)) + return -ERANGE; + + /* validate max range */ + if (max > MSP71XX_UDC_HS_MAX_PACKET_SIZE) + return -ERANGE; + + spin_lock_irqsave(&dev->lock, flags); + _ep->maxpacket = max & 0x7ff; + ep->desc = desc; + + /* ep_reset() has already been called */ + ep->stopped = 0; + + tmp = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK; + if (tmp == USB_ENDPOINT_XFER_BULK) { + /* catch some particularly blatant driver bugs */ + if ((dev->gadget.speed == USB_SPEED_HIGH && + max > MSP71XX_UDC_HS_MAX_PACKET_SIZE) || + (dev->gadget.speed == USB_SPEED_FULL && + max > MSP71XX_UDC_FS_MAX_PACKET_SIZE)) { + spin_unlock_irqrestore(&dev->lock, flags); + return -ERANGE; + } + } + + /* for OUT transfers, block the rx fifo until a read is posted */ + tmp = desc->bEndpointAddress; + ep->is_in = (tmp & USB_DIR_IN) != 0; + + /* flush endpoints */ + retval1 = _usb_device_cancel_transfer(dev->handle, ep->num, USB_RECV); + retval2 = _usb_device_cancel_transfer(dev->handle, ep->num, USB_SEND); + + /* unstall bulk endpoint */ + _usb_device_unstall_endpoint(dev->handle, ep->num, USB_RECV); + _usb_device_unstall_endpoint(dev->handle, ep->num, USB_SEND); + + if (retval1 | retval2) + retval = EIO; + + spin_unlock_irqrestore(&dev->lock, flags); + + return retval; +} + +/**************************************************************************** + * + * FUNCTION: ep_reset + * __________________________________________________________________________ + * + * DESCRIPTION: Resets the endpoint + * + * INPUTS: ep - (pointer to) pmc usb endpoint descriptor structure + * + * OUTPUTS: None + * + * RETURNS: Success = 0 + * Error = EIO + * + * NOTES: This function is called with spinlock held + * + ***************************************************************************/ +static int ep_reset(struct msp71xx_udc_ep *ep) +{ + int retval1, retval2, retval = 0; + struct msp71xx_udc *dev; + + dev = ep->dev; + ep->desc = NULL; + INIT_LIST_HEAD(&ep->queue); + + ep->ep.ops = &msp71xx_udc_ep_ops; + ep->ep.maxpacket = MSP71XX_UDC_FS_MAX_PACKET_SIZE; + if (dev->gadget.speed == USB_SPEED_HIGH) + ep->ep.maxpacket = MSP71XX_UDC_HS_MAX_PACKET_SIZE; + ep->desc = 0; + ep->irqs = 0; + + retval1 = _usb_device_cancel_transfer(dev->handle, ep->num, USB_RECV); + retval2 = _usb_device_cancel_transfer(dev->handle, ep->num, USB_SEND); + _usb_device_stall_endpoint(dev->handle, ep->num, USB_RECV); + _usb_device_stall_endpoint(dev->handle, ep->num, USB_SEND); + + if (retval1 | retval2) + retval = EIO; + + return retval; +} + +/**************************************************************************** + * + * FUNCTION: msp71xx_udc_disable + * __________________________________________________________________________ + * + * DESCRIPTION: Disables the endpoint specified + * + * INPUTS: _ep - (pointer to) usb endpoint descriptor structure + * + * OUTPUTS: None + * + * RETURNS: Success = 0 + * Error = EIO + * + * NOTES: None + * + ***************************************************************************/ +static int msp71xx_udc_disable(struct usb_ep *_ep) +{ + struct msp71xx_udc_ep *ep; + unsigned long flags; + int retval = 0; + + ep = container_of(_ep, struct msp71xx_udc_ep, ep); + if (!_ep || !ep->desc || _ep->name == ep0in || _ep->name == ep0out) + return -EINVAL; + + spin_lock_irqsave(&ep->dev->lock, flags); + nuke(ep); + retval = ep_reset(ep); + + VDEBUG(ep->dev, "endpt disabled %s\n", _ep->name); + + spin_unlock_irqrestore(&ep->dev->lock, flags); + + return retval; +} + +/**************************************************************************** + * + * FUNCTION: msp71xx_udc_alloc_request + * __________________________________________________________________________ + * + * DESCRIPTION: Allocates a usb request block + * + * INPUTS: _ep - (pointer to) usb endpoint descriptor structure + * gfp_flags - allocation flags + * + * OUTPUTS: (pointer to) usb request block + * + * RETURNS: (pointer to) usb request block + * + * NOTES: None + * + ***************************************************************************/ +static struct usb_request * msp71xx_udc_alloc_request( + struct usb_ep *_ep, + gfp_t gfp_flags) +{ + struct msp71xx_udc_request *req; + + /* allocate memory */ + req = kzalloc(sizeof(*req), gfp_flags); + if (!req) + return NULL; + + INIT_LIST_HEAD(&req->queue); + + return &req->req; +} + +/**************************************************************************** + * + * FUNCTION: msp71xx_udc_free_request + * __________________________________________________________________________ + * + * DESCRIPTION: Deallocates a usb request block + * + * INPUTS: _ep - (pointer to) usb endpoint descriptor structure + * _req - (pointer to) usb request block + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: None + * + ***************************************************************************/ +static void msp71xx_udc_free_request( + struct usb_ep *_ep, + struct usb_request *_req) +{ + struct msp71xx_udc_ep *ep; + struct msp71xx_udc_request *req; + + ep = container_of(_ep, struct msp71xx_udc_ep, ep); + if (!_ep || !_req) + return; + + req = container_of(_req, struct msp71xx_udc_request, req); + WARN_ON(!list_empty(&req->queue)); + kfree(req); +} + +/*-------------------------------------------------------------------------*/ +#undef USE_KMALLOC + +/* + * Many common platforms have dma-coherent caches, which means that it's + * safe to use kmalloc() memory for all i/o buffers without using any + * cache flushing calls. (unless you're trying to share cache lines + * between dma and non-dma activities, which is a slow idea in any case.) + * + * other platforms need more care, with 2.5 having a moderately general + * solution (which falls down for allocations smaller than one page) + * that improves significantly on the 2.4 PCI allocators by removing + * the restriction that memory never be freed in_interrupt(). + */ +#if defined(CONFIG_X86) +#define USE_KMALLOC +#elif defined(CONFIG_PPC) && !defined(CONFIG_NOT_COHERENT_CACHE) +#define USE_KMALLOC +#elif defined(CONFIG_MIPS) && \ + (defined(CONFIG_DMA_COHERENT) || defined(CONFIG_DMA_IP27)) +#define USE_KMALLOC +#elif defined(CONFIG_USB_GADGET_MSP71XX) +#define USE_KMALLOC +/* TODO: there are other cases, including an x86-64 one ... */ +#endif + +/**************************************************************************** + * + * FUNCTION: msp71xx_udc_alloc_buffer + * __________________________________________________________________________ + * + * DESCRIPTION: Allocates a buffer to I/O operation + * + * INPUTS: _ep - (pointer to) usb endpoint descriptor structure + * bytes - number of bytes to allocate + * dma - (pointer to) dma address returned + * gfp_flags - allocation flags + * + * OUTPUTS: (pointer to) usb buffer + * + * RETURNS: (pointer to) usb buffer + * + * NOTES: This code currently uses kmalloc to allocate, this code + * can be updated to use scratch pad RAM in future + * + ***************************************************************************/ +static void * msp71xx_udc_alloc_buffer( + struct usb_ep *_ep, + unsigned int bytes, + dma_addr_t *dma, + gfp_t gfp_flags) +{ + *dma = DMA_ADDR_INVALID; + + if (!_ep) + return NULL; + + return (void *)kmalloc(bytes, gfp_flags); +} + +/**************************************************************************** + * + * FUNCTION: msp71xx_udc_free_buffer + * __________________________________________________________________________ + * + * DESCRIPTION: Deallocates a buffer previously allocated + * + * INPUTS: _ep: (pointer to) usb endpoint descriptor structure + * buf: (pointer to) buffer + * dma: (pointer to) dma address + * bytes: number of bytes + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: This code currently uses kfree to deallocate, this code + * can be updated to deallocate scratch pad RAM in future + * + ***************************************************************************/ +static void msp71xx_udc_free_buffer( + struct usb_ep *_ep, + void *buf, + dma_addr_t dma, + unsigned int bytes) +{ + kfree(buf); +} + +/**************************************************************************** + * + * FUNCTION: write_fifo + * __________________________________________________________________________ + * + * DESCRIPTION: Writes data to the transmission fifo for usb IN transfers + * + * INPUTS: ep - (pointer to) pmc usb endpoint descriptor structure + * req - (pointer to) pmc usb request block + * + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: None + * + ***************************************************************************/ +static void write_fifo( + struct msp71xx_udc_ep *ep, + struct msp71xx_udc_request *req) +{ + u8 *bufp; + unsigned int len; + + if (req) { + bufp = req->req.buf; + len = req->req.length; + if (ep) { + _usb_device_send_data(ep->dev->handle, + ep->num, bufp, len); + VDEBUG(ep->dev, + "write %s fifo (IN) buf %8x %d bytes req %p\n", + ep->ep.name, (int)bufp, len, req); + } + } +} + +/**************************************************************************** + * + * FUNCTION: read_fifo + * __________________________________________________________________________ + * + * DESCRIPTION: Reads data from receive fifo + * + * INPUTS: ep - (pointer to) pmc usb endpoint descriptor structure + * req - (pointer to) pmc usb request block + * + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: None + * + ***************************************************************************/ +static void read_fifo( + struct msp71xx_udc_ep *ep, + struct msp71xx_udc_request *req) +{ + u8 *bufp; + unsigned int len; + + if (req) { + bufp = req->req.buf; + len = req->req.length; + if (ep) { + _usb_device_recv_data(ep->dev->handle, + ep->num, bufp, len); + VDEBUG(ep->dev, + "read %s fifo (IN) buf %8x %d bytes req %p\n", + ep->ep.name, (int)bufp, len, req); + } + } +} + +/**************************************************************************** + * + * FUNCTION: pmc_io_advance + * __________________________________________________________________________ + * + * DESCRIPTION: Advances the usb request queue and service it + * + * INPUTS: ep - (pointer to) pmc usb endpoint descriptor structure + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: None + * + ***************************************************************************/ +void pmc_io_advance(struct msp71xx_udc_ep *ep) +{ + struct msp71xx_udc_request *req; + + if (unlikely(list_empty(&ep->queue))) + return; + + req = list_entry(ep->queue.next, struct msp71xx_udc_request, queue); + if (req && !ep->stopped) { + req->req.status = -EINPROGRESS; + req->valid = 1; + (ep->is_in ? write_fifo : read_fifo)(ep, req); + } +} + +/**************************************************************************** + * + * FUNCTION: io_done + * __________________________________________________________________________ + * + * DESCRIPTION: Completes an IO operation by invoking + * completion callback + * + * INPUTS: ep - (pointer to) pmc usb endpoint descriptor structure + * req - (pointer to) pmc usb request block + * status - status + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: None + * + ***************************************************************************/ +static void io_done( + struct msp71xx_udc_ep *ep, + struct msp71xx_udc_request *req, + int status) +{ + struct msp71xx_udc *dev; + unsigned int stopped = ep->stopped; + + list_del_init(&req->queue); + + if (req->req.status == -EINPROGRESS) + req->req.status = status; + else + status = req->req.status; + + dev = ep->dev; + + if (status && status != -ESHUTDOWN) + VDEBUG(dev, "complete %s req %p stat %d len %u/%u\n", + ep->ep.name, &req->req, status, + req->req.actual, req->req.length); + + /* don't modify queue heads during completion callback */ + ep->stopped = 1; + spin_unlock(&dev->lock); + req->req.complete(&ep->ep, &req->req); + spin_lock(&dev->lock); + ep->stopped = stopped; +} + +/**************************************************************************** + * + * FUNCTION: msp71xx_udc_queue + * __________________________________________________________________________ + * + * DESCRIPTION: Enqueues a usb request + * + * INPUTS: _ep - (pointer to) usb endpoint descriptor structure + * _req - (pointer to) usb request block + * gfp_flags - allocation flags + * + * OUTPUTS: None + * + * RETURNS: Success = 0 + * Error = EINVAL + * = EDOM + * = ESHUTDOWN + * = EINPROGRESS + * + * NOTES: None + * + ***************************************************************************/ +static int msp71xx_udc_queue( + struct usb_ep *_ep, + struct usb_request *_req, + gfp_t gfp_flags) +{ + struct msp71xx_udc_request *req; + struct msp71xx_udc_ep *ep; + struct msp71xx_udc *dev; + unsigned long flags; + const struct list_head *headp; + + ep = container_of(_ep, struct msp71xx_udc_ep, ep); + if (!_ep || (!ep->desc && ep->num != 0)) + return -EINVAL; + + dev = ep->dev; + + req = container_of(_req, struct msp71xx_udc_request, req); + if (!_req || !_req->complete || !_req->buf || + !list_empty(&req->queue)) { + ERROR(dev, + "list is not empty req %8x complete %8x buf %8x\r\n", + (int)_req, (int)_req->complete, (int)_req->buf); + headp = (const struct list_head *)&req->queue; + VDEBUG("list head %8x next %8x \r\n", + (int)headp, (int)headp->next); + return -EINVAL; + } + + if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) + return -ESHUTDOWN; + + VDEBUG(dev, "%s queue req %p, len %d buf %p\n", + _ep->name, _req, _req->length, _req->buf); + + spin_lock_irqsave(&dev->lock, flags); + + _req->status = -EINPROGRESS; + _req->actual = 0; + req->valid = 1; + + /* + * kickstart this i/o queue if empty + * else irq handler will advance the queue. + */ + if (list_empty(&ep->queue) && !ep->stopped) { + /* issue write or read fifo data */ + (ep->is_in ? write_fifo : read_fifo)(ep, req); + } + + if (req) + list_add_tail(&req->queue, &ep->queue); + + spin_unlock_irqrestore(&dev->lock, flags); + + return 0; +} + +/**************************************************************************** + * + * FUNCTION: pmc_io_complete + * __________________________________________________________________________ + * + * DESCRIPTION: Complete the I/O process by removing the entry and + * invoking the completion function + * + * INPUTS: ep: - (pointer to) pmc usb endpoint descriptor structure + * buffer: buffer + * length: length received or transmitted + * status: status of reception or transmission + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: None + * + ***************************************************************************/ +void pmc_io_complete( + struct msp71xx_udc_ep *ep, + void *buffer, + unsigned int length, + int status) +{ + struct msp71xx_udc_request *req; + + /* + * only look at descriptors that were "naturally" retired, + * so fifo and list head state won't matter + */ + if (ep) { + if (!list_empty(&ep->queue)) { + if (ep->queue.next) { + req = list_entry(ep->queue.next, + struct msp71xx_udc_request, + queue); + if (req) { + if (req->valid) { + req->req.actual = length; + io_done(ep, req, status); + } + } + } + } + } +} + +/**************************************************************************** + * + * FUNCTION: nuke + * __________________________________________________________________________ + * + * DESCRIPTION: Dequeues ALL requests + * + * INPUTS: ep - (pointer to) pmc usb endpoint descriptor structure + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: This function is called with spinlock held + * + ***************************************************************************/ +static void nuke(struct msp71xx_udc_ep *ep) +{ + struct msp71xx_udc_request *req; + + /* called with spinlock held */ + ep->stopped = 1; + while (!list_empty(&ep->queue)) { + req = list_entry(ep->queue.next, + struct msp71xx_udc_request, + queue); + io_done(ep, req, -ESHUTDOWN); + } +} + +/**************************************************************************** + * + * FUNCTION: msp71xx_udc_dequeue + * __________________________________________________________________________ + * + * DESCRIPTION: Dequeues a usb request + * + * INPUTS: _ep - (pointer to) usb endpoint descriptor structure + * _req - (pointer to) usb request block + * + * OUTPUTS: None + * + * RETURNS: Success = 0 + * Error = EINVAL + * = ECONNRESET + * = EOPNOTSUPP + * + * NOTES: None + * + ***************************************************************************/ +static int msp71xx_udc_dequeue( + struct usb_ep *_ep, + struct usb_request *_req) +{ + struct msp71xx_udc_ep *ep; + struct msp71xx_udc_request *req; + unsigned long flags; + + ep = container_of(_ep, struct msp71xx_udc_ep, ep); + if (!_ep || (!ep->desc && ep->num != 0) || !_req) + return -EINVAL; + + spin_lock_irqsave(&ep->dev->lock, flags); + + /* make sure it's actually queued on this endpoint */ + list_for_each_entry(req, &ep->queue, queue) { + if (&req->req == _req) + break; + } + if (&req->req != _req) { + spin_unlock_irqrestore(&ep->dev->lock, flags); + return -EINVAL; + } + + if (!list_empty(&req->queue)) + io_done(ep, req, -ECONNRESET); + else + req = 0; + spin_unlock_irqrestore(&ep->dev->lock, flags); + + return req ? 0 : -EOPNOTSUPP; +} + +/**************************************************************************** + * + * FUNCTION: msp71xx_udc_set_halt + * __________________________________________________________________________ + * + * DESCRIPTION: Stalls/Unstalls an endpoint + * + * INPUTS: _ep - (pointer to) usb endpoint descriptor structure + * value - =1 to set + * =0 to clear + * + * OUTPUTS: None + * + * RETURNS: Success = 0 + * Error = EINVAL + * = ESHUTDOWN + * = EAGAIN + * + * NOTES: None + * + ***************************************************************************/ +static int msp71xx_udc_set_halt( + struct usb_ep *_ep, + int value) +{ + struct msp71xx_udc_ep *ep; + unsigned long flags; + int retval = 0; + + ep = container_of(_ep, struct msp71xx_udc_ep, ep); + if (!_ep || (!ep->desc && ep->num != 0)) + return -EINVAL; + if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) + return -ESHUTDOWN; + if (ep->desc /* not ep0 */ && + (ep->desc->bmAttributes & 0x03) == USB_ENDPOINT_XFER_ISOC) + return -EINVAL; + + spin_lock_irqsave(&ep->dev->lock, flags); + if (!list_empty(&ep->queue)) + retval = -EAGAIN; + else { + VDEBUG(ep->dev, "%s %s halt\n", _ep->name, + value ? "set" : "clear"); + /* set/clear, then synch memory views with the device */ + if (value) { + if (ep->num == 0) + ep->dev->protocol_stall = 1; + else + set_halt(ep); + } else + clear_halt(ep); + } + spin_unlock_irqrestore(&ep->dev->lock, flags); + + return retval; +} + +/**************************************************************************** + * + * FUNCTION: msp71xx_udc_fifo_flush + * __________________________________________________________________________ + * + * DESCRIPTION: Flushes the endpoint + * + * INPUTS: _ep - (pointer to) usb endpoint descriptor structure + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: None + * + ***************************************************************************/ +static void msp71xx_udc_fifo_flush(struct usb_ep *_ep) +{ + struct msp71xx_udc_ep *ep; + + ep = container_of(_ep, struct msp71xx_udc_ep, ep); + if (!_ep || (!ep->desc && ep->num != 0)) + return; + if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) + return; + + /* flush endpoints */ + _usb_device_cancel_transfer(ep->dev->handle, ep->num, USB_RECV); + _usb_device_cancel_transfer(ep->dev->handle, ep->num, USB_SEND); +} + + +/**************************************************************************** + * + * FUNCTION: msp71xx_udc_get_frame + * __________________________________________________________________________ + * + * DESCRIPTION: Gets the frame index + * + * INPUTS: _gadget - (pointer to) gadget structure + * + * OUTPUTS: None + * + * RETURNS: frame index + * + * NOTES: None + * + ***************************************************************************/ +static int msp71xx_udc_get_frame(struct usb_gadget *_gadget) +{ + struct msp71xx_udc *dev; + u32 retval; + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + + if (!_gadget) + return -ENODEV; + + dev = container_of(_gadget, struct msp71xx_udc, gadget); + usb_dev_ptr = (struct usb_dev_state *)dev->handle; + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + retval = dev_ptr->regs.op_dev.usb_frindex & MSP71XX_UDC_FRINDEX_MASK; + + return retval; +} + +/**************************************************************************** + * + * FUNCTION: msp71xx_udc_wakeup + * __________________________________________________________________________ + * + * DESCRIPTION: Wakeups the device + * + * INPUTS: _gadget - (pointer to) gadget structure + * + * OUTPUTS: None + * + * RETURNS: Success = 0 + * + * NOTES: None + * + ***************************************************************************/ +static int msp71xx_udc_wakeup(struct usb_gadget *_gadget) +{ + struct msp71xx_udc *dev; + unsigned long flags; + + if (!_gadget) + return 0; + + dev = container_of(_gadget, struct msp71xx_udc, gadget); + + spin_lock_irqsave(&dev->lock, flags); + _usb_device_assert_resume(dev->handle); + spin_unlock_irqrestore(&dev->lock, flags); + + return 0; +} + +/*-------------------------------------------------------------------------*/ + +#ifdef CONFIG_USB_GADGET_DEBUG_FILES + +/**************************************************************************** + * + * FUNCTION: show_function + * __________________________________________________________________________ + * + * DESCRIPTION: Shows device function + * + * INPUTS: _dev: (pointer to) device structure + * attr: device attribute + * buf: print buffer + * + * OUTPUTS: page size + * + * RETURNS: page size + * + * NOTES: None + * + ***************************************************************************/ +static ssize_t show_function( + struct device *_dev, + struct device_attribute *attr, + char *buf) +{ + struct msp71xx_udc *dev = dev_get_drvdata(_dev); + + if (!dev->driver || !dev->driver->function || + strlen(dev->driver->function) > PAGE_SIZE) + return 0; + + return scnprintf(buf, PAGE_SIZE, "%s\n", dev->driver->function); +} + +static DEVICE_ATTR(function, S_IRUGO, show_function, NULL); + +/**************************************************************************** + * + * FUNCTION: show_registers + * __________________________________________________________________________ + * + * DESCRIPTION: Shows device registers function + * + * INPUTS: _dev: (pointer to) device structure + * attr: device attribute + * buf: print buffer + * + * OUTPUTS: page size + * + * RETURNS: page size + * + * NOTES: None + * + ***************************************************************************/ +static ssize_t show_registers( + struct device *_dev, + struct device_attribute *attr, + char *buf) +{ + struct msp71xx_udc *dev; + struct msp71xx_udc_ep *ep; + char *next; + unsigned int size, t; + unsigned long flags; + int i; + const char *s; + struct usb_dev_state * usb_dev_ptr; + volatile struct vusb20 * dev_ptr; + + dev = dev_get_drvdata(_dev); + usb_dev_ptr = (struct usb_dev_state *)dev->handle; + dev_ptr = (struct vusb20 *)usb_dev_ptr->dev_ptr; + + next = buf; + size = PAGE_SIZE; + spin_lock_irqsave(&dev->lock, flags); + + if (dev->driver) + s = dev->driver->driver.name; + else + s = "(none)"; + + /* Main Control Registers */ + t = scnprintf(next, size, "%s " + "cmd %08x status %08x intr %8x fridx %8x\n" + "ctrlseg %08x device addr %08x ep list addr %8x " + "ctrl flag %8x\n" + "mode %08x end setup %08x prime %8x flush %8x\n" + "end status %08x complete %08x \n", + driver_name, + readl(&dev_ptr->regs.op_dev.usb_cmd), + readl(&dev_ptr->regs.op_dev.usb_sts), + readl(&dev_ptr->regs.op_dev.usb_intr), + readl(&dev_ptr->regs.op_dev.usb_frindex), + readl(&dev_ptr->regs.op_dev.ctrldssegment), + readl(&dev_ptr->regs.op_dev.device_addr), + readl(&dev_ptr->regs.op_dev.ep_list_addr), + readl(&dev_ptr->regs.op_dev.config_flag), + readl(&dev_ptr->regs.op_dev.usb_mode), + readl(&dev_ptr->regs.op_dev.ep_setup_stat), + readl(&dev_ptr->regs.op_dev.ep_prime), + readl(&dev_ptr->regs.op_dev.ep_flush), + readl(&dev_ptr->regs.op_dev.ep_status), + readl(&dev_ptr->regs.op_dev.ep_complete)); + size -= t; + next += t; + + /* Configurable EP Control Registers */ + t = scnprintf(next, size, "\nport ctrl: "); + size -= t; + next += t; + for (i = 0; i < VUSBHS_MAX_PORTS; i++) { + t = scnprintf(next, size, "%08x ", + readl(&dev_ptr->regs.op_dev.portscx[i])); + size -= t; + next += t; + } + t = scnprintf(next, size, "\nend ctrl: "); + size -= t; + next += t; + for (i = 0; i < MSP71XX_UDC_MAX_ENDPT; i++) { + ep = &dev->ep[i]; + t = scnprintf(next, size, "%08x ", + readl(&dev_ptr->regs.op_dev.ep_ctrlx[i])); + size -= t; + next += t; + } + + /* Indexed Registers - none yet */ + + /* Statistics */ + t = scnprintf(next, size, "\nirqs: "); + size -= t; + next += t; + for (i = 0; i < MSP71XX_UDC_MAX_ENDPT; i++) { + ep = &dev->ep[i]; + t = scnprintf(next, size, " %s/%lu", ep->ep.name, ep->irqs); + size -= t; + next += t; + } + t = scnprintf(next, size, "\n"); + size -= t; + next += t; + + spin_unlock_irqrestore(&dev->lock, flags); + + return PAGE_SIZE - size; +} + +static DEVICE_ATTR(registers, S_IRUGO, show_registers, NULL); + +/**************************************************************************** + * + * FUNCTION: show_queues + * __________________________________________________________________________ + * + * DESCRIPTION: Shows device queues function + * + * INPUTS: _dev: (pointer to) device structure + * attr: device attribute + * buf: print buffer + * + * OUTPUTS: page size + * + * RETURNS: page size + * + * NOTES: None + * + ***************************************************************************/ +static ssize_t show_queues( + struct device *_dev, + struct device_attribute *attr, + char *buf) +{ + struct msp71xx_udc *dev; + char *next; + unsigned int size; + unsigned long flags; + int i; + + dev = dev_get_drvdata(_dev); + next = buf; + size = PAGE_SIZE; + spin_lock_irqsave(&dev->lock, flags); + + for (i = 0; i < MSP71XX_UDC_MAX_ENDPT; i++) { + struct msp71xx_udc_ep *ep = &dev->ep[i]; + struct msp71xx_udc_request *req; + int t; + + if (i > 2) { + const struct usb_endpoint_descriptor *d = ep->desc; + if (!d) + continue; + + t = d->bEndpointAddress; + t = scnprintf(next, size, + "\n%s (ep%d%s-%s) max %04x \n", + ep->ep.name, t & USB_ENDPOINT_NUMBER_MASK, + (t & USB_DIR_IN) ? "in" : "out", + ({ char *val; + switch (d->bmAttributes & 0x03) { + case USB_ENDPOINT_XFER_BULK: + val = "bulk"; + break; + case USB_ENDPOINT_XFER_INT: + val = "intr"; + break; + default: + val = "iso"; + break; + }; val; }), + le16_to_cpu(d->wMaxPacketSize) & 0x1fff); + } else /* ep0 should only have one transfer queued */ + t = scnprintf(next, size, "ep0 max 64 pio %s\n", + ep->is_in ? "in" : "out"); + if (t <= 0 || t > size) + goto done; + size -= t; + next += t; + + if (list_empty(&ep->queue)) { + t = scnprintf(next, size, "\t(nothing queued)\n"); + if (t <= 0 || t > size) + goto done; + size -= t; + next += t; + continue; + } + list_for_each_entry(req, &ep->queue, queue) { + t = scnprintf(next, size, + "\treq %p len %d/%d buf %p\n", + &req->req, req->req.actual, + req->req.length, req->req.buf); + if (t <= 0 || t > size) + goto done; + size -= t; + next += t; + + } + } + +done: + spin_unlock_irqrestore(&dev->lock, flags); + + return PAGE_SIZE - size; +} + +static DEVICE_ATTR(queues, S_IRUGO, show_queues, NULL); + +#else + +#define device_create_file(a, b) do {} while (0) +#define device_remove_file device_create_file + +#endif + +/**************************************************************************** + * + * FUNCTION: usb_reset + * __________________________________________________________________________ + * + * DESCRIPTION: Resets and initializes the usb device controller + * + * INPUTS: dev: (pointer to) pmc udc device structure + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: None + * + ***************************************************************************/ +static void usb_reset(struct msp71xx_udc *dev) +{ + u8 error; + + dev->gadget.speed = USB_SPEED_UNKNOWN; + + spin_lock(&dev->lock); + + /* Initialize the USB interface */ + error = _usb_device_init(0, (void *)&dev->handle, + MSP71XX_UDC_MAX_ENDPT); + if (error != USB_OK) + ERROR(dev, "\nUSB Initialization failed. Error: %x\n", error); + + error = _usb_device_register_service(dev->handle, + USB_SERVICE_EP0, service_ep0); + if (error != USB_OK) + ERROR(dev, "\nUSB Service Registration failed ep0. " + "Error: %x\n", error); + + error = _usb_device_register_service(dev->handle, + USB_SERVICE_BUS_RESET, reset_ep0); + if (error != USB_OK) + ERROR(dev, "\nUSB Service Registration failed reset ep0. " + "Error: %x\n", error); + + error = _usb_device_register_service(dev->handle, + USB_SERVICE_SUSPEND, service_suspend); + if (error != USB_OK) + ERROR(dev, "\nUSB Service Registration failed service suspend. " + "Error: %x\n", error); + + error = _usb_device_register_service(dev->handle, + USB_SERVICE_SPEED_DETECTION, + service_speed); + if (error != USB_OK) + ERROR(dev, "\nUSB Service Registration failed speed detect. " + "Error: %x\n", error); + + error = _usb_device_register_service(dev->handle, + USB_SERVICE_EP1, service_ep1); + if (error != USB_OK) + ERROR(dev, "\nUSB Service Registration failed ep1. " + "Error: %x\n", error); + + error = _usb_device_register_service(dev->handle, + USB_SERVICE_EP2, service_ep2); + if (error != USB_OK) + ERROR(dev, "\nUSB Service Registration failed ep2. " + "Error: %x\n", error); + +#ifdef CONFIG_PMCTWILED + /* set TWI GPIO USB_HOST_DEV pin to active low */ + msp_led_pin_lo(MSP_PIN_USB_HOST_DEV); +#endif + + spin_unlock(&dev->lock); +} + +/**************************************************************************** + * + * FUNCTION: usb_shutdown + * __________________________________________________________________________ + * + * DESCRIPTION: Shuts down the device controller + * + * INPUTS: dev: (pointer to) pmc udc device structure + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: None + * + ***************************************************************************/ +static void usb_shutdown(struct msp71xx_udc *dev) +{ + /* shut down device */ + _usb_device_shutdown(dev->handle); + + spin_lock(&dev->lock); + _usb_device_unregister_service(dev->handle, USB_SERVICE_EP0); + _usb_device_unregister_service(dev->handle, USB_SERVICE_BUS_RESET); + _usb_device_unregister_service(dev->handle, USB_SERVICE_SUSPEND); + _usb_device_unregister_service(dev->handle, + USB_SERVICE_SPEED_DETECTION); + _usb_device_unregister_service(dev->handle, USB_SERVICE_EP1); + _usb_device_unregister_service(dev->handle, USB_SERVICE_EP2); + spin_unlock(&dev->lock); +} + +/**************************************************************************** + * + * FUNCTION: usb_reinit + * __________________________________________________________________________ + * + * DESCRIPTION: Initializes the device control block + * + * INPUTS: dev: (pointer to) PMC udc device structure + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: None + * + ***************************************************************************/ +static void usb_reinit(struct msp71xx_udc *dev) +{ + int i; + + /* basic endpoint init */ + for (i = 0; i < MSP71XX_UDC_MAX_ENDPT; i++) { + struct msp71xx_udc_ep *ep = &dev->ep[i]; + ep->ep.name = ep_name[i]; + ep->dev = dev; + ep->num = i/2; + if (i % 2) + ep->is_in = 0; + else + ep->is_in = 1; + + ep->ep.maxpacket = MSP71XX_UDC_FS_MAX_PACKET_SIZE; + if (dev->gadget.speed == USB_SPEED_HIGH) + ep->ep.maxpacket = MSP71XX_UDC_HS_MAX_PACKET_SIZE; + ep->irqs = 0; + ep_reset(ep); + } + + dev->gadget.ep0 = &dev->ep[EP_0].ep; + INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); + + /* always ep lists */ + INIT_LIST_HEAD(&dev->gadget.ep_list); + list_add_tail(&dev->ep[EP_1_IN].ep.ep_list, &dev->gadget.ep_list); + list_add_tail(&dev->ep[EP_1_OUT].ep.ep_list, &dev->gadget.ep_list); + list_add_tail(&dev->ep[EP_2_IN].ep.ep_list, &dev->gadget.ep_list); + list_add_tail(&dev->ep[EP_2_OUT].ep.ep_list, &dev->gadget.ep_list); +} + +/**************************************************************************** + * + * FUNCTION: usb_gadget_register_device + * __________________________________________________________________________ + * + * DESCRIPTION: Registers the gadget driver + * + * INPUTS: driver: (pointer to) gadget driver + * + * OUTPUTS: None + * + * RETURNS: Success = 0 + * Error = EINVAL + * = ENODEV + * = EBUSY + * + * NOTES: When a driver is successfully registered, it will receive + * control requests including set_configuration(), which + * enables non-control requests. then usb traffic follows + * until a disconnect is reported. then a host may connect + * again, or the driver might get unbound. + * + ***************************************************************************/ +int usb_gadget_register_driver(struct usb_gadget_driver *driver) +{ + struct msp71xx_udc *dev = the_controller; + int retval; + unsigned int i; + + if (!driver || !driver->bind || !driver->unbind || !driver->setup) + return -EINVAL; + if (!dev) + return -ENODEV; + if (dev->driver) + return -EBUSY; + + for (i = 0; i < MSP71XX_UDC_MAX_ENDPT; i++) + dev->ep[i].irqs = 0; + + /* hook up the driver... */ + dev->softconnect = 1; + driver->driver.bus = NULL; + dev->driver = driver; + dev->gadget.dev.driver = &driver->driver; + + retval = driver->bind(&dev->gadget); + if (retval) { + DEBUG(dev, "bind to driver %s --> %d\n", + driver->driver.name, retval); + dev->driver = NULL; + dev->gadget.dev.driver = NULL; + return retval; + } + device_create_file(dev->dev, &dev_attr_function); + device_create_file(dev->dev, &dev_attr_queues); + + DEBUG(dev, "%s ready \n", driver->driver.name); + + return 0; +} +EXPORT_SYMBOL(usb_gadget_register_driver); + +/**************************************************************************** + * + * FUNCTION: stop_activity + * __________________________________________________________________________ + * + * DESCRIPTION: Stops activity on the usb device + * + * INPUTS: dev: (pointer to) PMC udc device structure + * driver: (pointer to) gadget driver + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: This function is called with spinlock held + * + ***************************************************************************/ +static void stop_activity( + struct msp71xx_udc *dev, + struct usb_gadget_driver *driver) +{ + int i; + + /* don't disconnect if it's not connected */ + if (dev->gadget.speed == USB_SPEED_UNKNOWN) + driver = NULL; + + /* + * stop hardware; prevent new request submissions; + * and kill any outstanding requests. + */ + for (i = 0; i < MSP71XX_UDC_MAX_ENDPT; i++) { + /* reset endpoint queues */ + nuke(&dev->ep[i]); + ep_reset(&dev->ep[i]); + } + + /* report disconnect; the driver is already quiesced */ + if (driver) { + spin_unlock(&dev->lock); + driver->disconnect(&dev->gadget); + spin_lock(&dev->lock); + } + + usb_reinit(dev); +} + +/**************************************************************************** + * + * FUNCTION: usb_gadget_unregister_device + * __________________________________________________________________________ + * + * DESCRIPTION: Unregisters the gadget driver + * + * INPUTS: driver: (pointer to) gadget driver + * + * OUTPUTS: None + * + * RETURNS: Success = 0 + * Error = ENODEV + * = EINVAL + * + * NOTES: None + * + ***************************************************************************/ +int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) +{ + struct msp71xx_udc *dev = the_controller; + unsigned long flags; + + if (!dev) + return -ENODEV; + if (!driver || driver != dev->driver) + return -EINVAL; + + spin_lock_irqsave(&dev->lock, flags); + stop_activity(dev, driver); + usb_shutdown(dev); + spin_unlock_irqrestore(&dev->lock, flags); + + driver->unbind(&dev->gadget); + dev->gadget.dev.driver = NULL; + dev->driver = NULL; + + device_remove_file(dev->dev, &dev_attr_function); + device_remove_file(dev->dev, &dev_attr_queues); + + DEBUG(dev, "unregistered driver '%s'\n", driver->driver.name); + + return 0; +} +EXPORT_SYMBOL(usb_gadget_unregister_driver); + +/**************************************************************************** + * + * FUNCTION: msp71xx_udc_irq + * __________________________________________________________________________ + * + * DESCRIPTION: Handles USB interrupts + * + * INPUTS: irq: IRQ number + * pdevice: (pointer to) PMC device structure + * r: (pointer to) registers + * + * OUTPUTS: None + * + * RETURNS: IRQ_HANDLED + * + * NOTES: None + * + ***************************************************************************/ +static irqreturn_t msp71xx_udc_irq(int irq, void *pdevice) +{ + struct msp71xx_udc *dev; + dev = (struct msp71xx_udc *)pdevice; + + spin_lock(&dev->lock); + + /* invoke device controller int handler */ + _usb_dci_vusb20_isr(); + + spin_unlock(&dev->lock); + + return IRQ_HANDLED; +} + +/**************************************************************************** + * + * FUNCTION: gadget_release + * __________________________________________________________________________ + * + * DESCRIPTION: Release the gadget driver + * + * INPUTS: _dev: (pointer to) device structure + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: None + * + ***************************************************************************/ +static void gadget_release(struct device *_dev) +{ + struct msp71xx_udc *dev = dev_get_drvdata(_dev); + + kfree(dev); +} + +/**************************************************************************** + * + * FUNCTION: msp71xx_udc_remove + * __________________________________________________________________________ + * + * DESCRIPTION: Removes the gadget device + * + * INPUTS: pdev: (pointer to) platform device structure + * + * OUTPUTS: None + * + * RETURNS: Success = 0 + * + * NOTES: None + * + ***************************************************************************/ + +static int msp71xx_udc_remove(struct platform_device *pdev) +{ + struct msp71xx_udc *dev = platform_get_drvdata(pdev); + + /* start with the driver above us */ + if (dev->driver) { + /* should have been done already by driver model core */ + VDEBUG(dev, "msp71xx_udc remove, driver '%s' " + "is still registered\n", + dev->driver->driver.name); + usb_gadget_unregister_driver(dev->driver); + } + + if (dev->got_irq) { + free_irq(pdev->resource[1].start, dev); + dev->got_irq = 0; + } + device_unregister(&dev->gadget.dev); + device_remove_file(dev->dev, &dev_attr_registers); + + platform_set_drvdata(pdev, 0); + the_controller = 0; + + INFO(dev, "unbind\n"); + + return 0; +} + +/**************************************************************************** + * + * FUNCTION: msp71xx_udc_probe + * __________________________________________________________________________ + * + * DESCRIPTION: Probes the usb gadget device controller + * + * INPUTS: pdev: (pointer to) platform device structure + * + * OUTPUTS: None + * + * RETURNS: Success = 0 + * Error = EBUSY + * = ENOMEM + * + * NOTES: None + * + ***************************************************************************/ +static int msp71xx_udc_probe(struct platform_device *pdev) +{ + struct msp71xx_udc *dev = NULL; + int retval; + + /* + * if you want to support more than one controller in a system, + * usb_gadget_driver_{register,unregister}() must change. + */ + if (the_controller) { + DEBUG(dev, "ignoring\n"); + return -EBUSY; + } + + /* alloc, and start init */ + dev = kzalloc(sizeof(*dev), GFP_KERNEL); + if (dev == NULL) { + retval = -ENOMEM; + goto done; + } + + spin_lock_init(&dev->lock); + dev->dev = &pdev->dev; + dev->gadget.ops = &msp71xx_udc_ops; + dev->gadget.is_dualspeed = 1; + + the_controller = dev; + platform_set_drvdata(pdev, dev); + + /* the "gadget" abstracts/virtualizes the controller */ + device_initialize(&dev->gadget.dev); + strcpy(dev->gadget.dev.bus_id, "gadget"); + dev->gadget.dev.parent = &pdev->dev; + dev->gadget.dev.release = gadget_release; + dev->gadget.name = driver_name; + + dev->enabled = 1; + + /* put into initial config, link up all endpoints */ + usb_reset(dev); + usb_reinit(dev); + + if (request_irq(pdev->resource[1].start, msp71xx_udc_irq, 0, + driver_name, dev) != 0) { + DEBUG(dev, "request interrupt failed\n"); + retval = -EBUSY; + goto done; + } + dev->got_irq = 1; + + retval = device_register(&dev->gadget.dev); + if (retval != 0) + goto done; + + device_create_file(dev->dev, &dev_attr_registers); + + return 0; + +done: + if (dev) + msp71xx_udc_remove(pdev); + + return retval; +} + +/* device driver structure */ +static struct platform_driver msp71xx_udc_driver = { + .probe = msp71xx_udc_probe, + .remove = __exit_p(msp71xx_udc_remove), + .driver = { + .owner = THIS_MODULE, + .name = "msp71xx_udc", + }, + /* + * TODO: power management support + * .suspend = ... disable UDC + * .resume = ... re-enable UDC + */ +}; + +/**************************************************************************** + * + * FUNCTION: msp71xx_udc_init + * __________________________________________________________________________ + * + * DESCRIPTION: Initializes the device controller and register the driver + * + * INPUTS: None + * + * OUTPUTS: None + * + * RETURNS: Success =0 + * + * NOTES: None + * + ***************************************************************************/ +static int __init msp71xx_udc_init(void) +{ + printk(KERN_INFO "%s: %s\n", driver_name, driver_desc); + + return platform_driver_register(&msp71xx_udc_driver); +} + +/**************************************************************************** + * + * FUNCTION: msp71xx_udc_exit + * __________________________________________________________________________ + * + * DESCRIPTION: Shutdowns the device controller and unregister the druiver + * + * INPUTS: None + * + * OUTPUTS: None + * + * RETURNS: None + * + * NOTES: None + * + ***************************************************************************/ +static void __exit msp71xx_udc_exit(void) +{ + platform_driver_unregister(&msp71xx_udc_driver); +} + +module_init(msp71xx_udc_init); +module_exit(msp71xx_udc_exit); diff --git a/drivers/usb/gadget/pmc-sierra/msp71xx_udc.h b/drivers/usb/gadget/pmc-sierra/msp71xx_udc.h new file mode 100644 index 0000000..5a4aa89 --- /dev/null +++ b/drivers/usb/gadget/pmc-sierra/msp71xx_udc.h @@ -0,0 +1,284 @@ +/* + * msp71xx_udc.h -- This file contains all the definitions & declaration + * for the PMC MSP71XX USB peripheral device driver + * + * Copyright (C) 2006-2007 PMC-Sierra + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY, RESPONSIBILITY OR LIABILITY; without even the + * implied warranty of NON- INFRINGEMENT AND MERCHANTABILITY or FITNESS FOR A + * PARTICULAR PURPOSE. See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef MSP71XX_UDC_H +#define MSP71XX_UDC_H + +/* + * Constants + */ +#define MSP71XX_UDC_MAX_ENDPT 6 +#define MSP71XX_UDC_FS_MAX_PACKET_SIZE 64 +#define MSP71XX_UDC_HS_MAX_PACKET_SIZE 512 + +#define MSP71XX_UDC_FRINDEX_MASK 0x3FFF + +/* + * External variables + */ +extern struct msp71xx_udc *the_controller; + + +/* + * Macro Definitions + */ + +/***************************************************************************** + * + * MACRO: xprintf + * ___________________________________________________________________________ + * + * DESCRIPTION: + * print gadget driver msg + * + * INPUTS: + * dev - device + * level - print level + * fmt - print format + * args - arg list + * + * RETURNS: + * + ****************************************************************************/ +#define xprintk(dev, level, fmt, args...) \ + printk(level "%s %s: " fmt, driver_name, \ + dev->gadget.name, ## args) + +/***************************************************************************** + * + * MACRO: DEBUG + * ___________________________________________________________________________ + * + * DESCRIPTION: + * print gadget driver debug msg + * + * INPUTS: + * dev - device + * fmt - print format + * args - arg list + * + * RETURNS: + * + ****************************************************************************/ +#ifdef DEBUG +#undef DEBUG +#define DEBUG(dev, fmt, args...) \ + xprintk(dev, KERN_DEBUG, fmt, ## args) +#else +#define DEBUG(dev, fmt, args...) \ + do { } while (0) +#endif /* DEBUG */ + +/***************************************************************************** + * + * MACRO: VDEBUG + * ___________________________________________________________________________ + * + * DESCRIPTION: + * print gadget driver verbose msg only if VERBOSE and DEBUG is defined + * + * INPUTS: + * dev - device + * fmt - print format + * args - arg list + * + * RETURNS: + * + ****************************************************************************/ +#ifdef VERBOSE +#define VDEBUG DEBUG +#else +#define VDEBUG(dev, fmt, args...) \ + do { } while (0) +#endif /* VERBOSE */ + +/***************************************************************************** + * + * MACRO: ERROR + * ___________________________________________________________________________ + * + * DESCRIPTION: + * print driver error msg + * + * INPUTS: + * dev - device + * fmt - print format + * args - arg list + * + * RETURNS: + * + ****************************************************************************/ +#define ERROR(dev, fmt, args...) \ + xprintk(dev, KERN_ERR, fmt, ## args) + +/***************************************************************************** + * + * MACRO: WARN + * ___________________________________________________________________________ + * + * DESCRIPTION: + * print driver warning msg + * + * INPUTS: + * dev - device + * fmt - print format + * args - arg list + * + * RETURNS: + * + ****************************************************************************/ +#define WARN(dev, fmt, args...) \ + xprintk(dev, KERN_WARNING, fmt, ## args) + +/***************************************************************************** + * + * MACRO: INFO + * ___________________________________________________________________________ + * + * DESCRIPTION: + * print driver info msg + * + * INPUTS: + * dev - device + * fmt - print format + * args - arg list + * + * RETURNS: + * + ****************************************************************************/ +#define INFO(dev, fmt, args...) \ + xprintk(dev, KERN_INFO, fmt, ## args) + +/* + * Inline functions + */ + +/**************************************************************************** + * + * FUNCTION: msp71xx_get_dev_ptr + * __________________________________________________________________________ + * + * DESCRIPTION: Get the device controller pointer + * + * INPUTS: None + * + * OUTPUTS: None + * + * RETURNS: Success = the controller device pointer + * + * NOTES: None + * + ***************************************************************************/ +static inline struct msp71xx_udc *msp71xx_get_dev_ptr(void) +{ + return the_controller; +} + +/* + * Structures and Unions + */ + +/***************************************************************************** + * STRUCTURE: msp71xx_udc_ep + * ___________________________________________________________________________ + * + * This structure defines the PMC td endpoint descriptor. + * + * ELEMENTS: + * usb_ep - usb endpoint structure + * dev - (pointer to) PMC td device structure + * irq - number of interrupts + * queue - list head structure + * desc - (pointer to) usb endpoint descriptor + * num - endpoint address number + * stopped - endpoint stop + * is_in - is bulk in or out + * + ****************************************************************************/ +struct msp71xx_udc_ep { + struct usb_ep ep; + struct msp71xx_udc *dev; + unsigned long irqs; + + /* analogous to a host-side qh */ + struct list_head queue; + const struct usb_endpoint_descriptor *desc; + unsigned int num : 8, /* endpoint address */ + stopped : 1, + is_in : 1; /* bulk in or out */ +}; + +/***************************************************************************** + * STRUCTURE: msp71xx_udc_request + * ___________________________________________________________________________ + * + * This structure defines the PMC td user request + * + * ELEMENTS: + * req - usb request + * queue - list head structure + * valid - indicates request is valid + * + ****************************************************************************/ +struct msp71xx_udc_request { + struct usb_request req; + struct list_head queue; + unsigned int valid : 1; +}; + +/***************************************************************************** + * STRUCTURE: msp71xx_udc + * ___________________________________________________________________________ + * + * This structure defines the PMC td device structure + * + * ELEMENTS: + * gadget - gadget device structure + * driver - (pointer to) gadget driver structure + * dev - (pointer to) device structure + * handle - usb device handle + * lock - lock + * ep - array of endpoint structures + * enabled - device is enable + * protocol_stall - device is stalled + * softconnect - soft connect + * got_irq - got interrupt + * + ****************************************************************************/ +struct msp71xx_udc { + struct usb_gadget gadget; + struct usb_gadget_driver * driver; + struct device * dev; + _usb_device_handle * handle; + spinlock_t lock; + struct msp71xx_udc_ep ep[MSP71XX_UDC_MAX_ENDPT]; + unsigned int enabled : 1, + protocol_stall : 1, + softconnect : 1, + got_irq : 1; +}; + +/* External functions */ +extern void pmc_io_complete(struct msp71xx_udc_ep *ep, void *buffer, + unsigned int length, int status); +extern void pmc_io_advance(struct msp71xx_udc_ep *ep); + +#endif /* MSP71XX_UDC_H */ diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 6271187..902e059 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -72,6 +72,38 @@ config USB_EHCI_BIG_ENDIAN_MMIO depends on USB_EHCI_HCD default n +config USB_EHCI_HCD_PMC_MSP + bool "EHCI support for on-chip PMC MSP USB controller" + depends on USB_EHCI_HCD && (PMC_MSP7120_GW || PMC_MSP7120_EVAL || \ + PMC_MSP7120_FPGA) + default y if (PMC_MSP7120_GW || PMC_MSP7120_EVAL || PMC_MSP7120_FPGA) + select USB_EHCI_BIG_ENDIAN + select USB_EHCI_BIG_ENDIAN_MMIO + ---help--- + Enables support for the onchip USB controller on the PMC_MSP7120_GW + or PMC_MSP7120_EVAL or PMC_MSP7120_FPGA processor chip. + If unsure, say N. + +config USB_EHCI_HCD_PCI + bool "EHCI support for PCI-bus USB controllers" + depends on USB_EHCI_HCD && PCI && !USB_EHCI_HCD_PMC_MSP + default n if USB_EHCI_HCD_PMC_MSP + select USB_EHCI_LITTLE_ENDIAN + ---help--- + Enables support for PCI-bus plug-in USB controller cards. + If unsure, say Y. + +config USB_EHCI_BIG_ENDIAN + bool + depends on USB_EHCI_HCD + default n + +config USB_EHCI_LITTLE_ENDIAN + bool + depends on USB_EHCI_HCD + default n if USB_EHCI_HCD_PMC_MSP + default y + config USB_ISP116X_HCD tristate "ISP116X HCD support" depends on USB diff --git a/drivers/usb/host/ehci-dbg.c b/drivers/usb/host/ehci-dbg.c index 43eddae..68f8868 100644 --- a/drivers/usb/host/ehci-dbg.c +++ b/drivers/usb/host/ehci-dbg.c @@ -119,16 +119,16 @@ static void __attribute__((__unused__)) dbg_qtd (const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd) { ehci_dbg (ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd, - le32_to_cpup (&qtd->hw_next), - le32_to_cpup (&qtd->hw_alt_next), - le32_to_cpup (&qtd->hw_token), - le32_to_cpup (&qtd->hw_buf [0])); + ehci32_to_cpup (&qtd->hw_next), + ehci32_to_cpup (&qtd->hw_alt_next), + ehci32_to_cpup (&qtd->hw_token), + ehci32_to_cpup (&qtd->hw_buf [0])); if (qtd->hw_buf [1]) ehci_dbg (ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n", - le32_to_cpup (&qtd->hw_buf [1]), - le32_to_cpup (&qtd->hw_buf [2]), - le32_to_cpup (&qtd->hw_buf [3]), - le32_to_cpup (&qtd->hw_buf [4])); + ehci32_to_cpup (&qtd->hw_buf [1]), + ehci32_to_cpup (&qtd->hw_buf [2]), + ehci32_to_cpup (&qtd->hw_buf [3]), + ehci32_to_cpup (&qtd->hw_buf [4])); } static void __attribute__((__unused__)) @@ -144,26 +144,27 @@ static void __attribute__((__unused__)) dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd) { ehci_dbg (ehci, "%s [%d] itd %p, next %08x, urb %p\n", - label, itd->frame, itd, le32_to_cpu(itd->hw_next), itd->urb); + label, itd->frame, itd, ehci32_to_cpu(itd->hw_next), + itd->urb); ehci_dbg (ehci, " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n", - le32_to_cpu(itd->hw_transaction[0]), - le32_to_cpu(itd->hw_transaction[1]), - le32_to_cpu(itd->hw_transaction[2]), - le32_to_cpu(itd->hw_transaction[3]), - le32_to_cpu(itd->hw_transaction[4]), - le32_to_cpu(itd->hw_transaction[5]), - le32_to_cpu(itd->hw_transaction[6]), - le32_to_cpu(itd->hw_transaction[7])); + ehci32_to_cpu(itd->hw_transaction[0]), + ehci32_to_cpu(itd->hw_transaction[1]), + ehci32_to_cpu(itd->hw_transaction[2]), + ehci32_to_cpu(itd->hw_transaction[3]), + ehci32_to_cpu(itd->hw_transaction[4]), + ehci32_to_cpu(itd->hw_transaction[5]), + ehci32_to_cpu(itd->hw_transaction[6]), + ehci32_to_cpu(itd->hw_transaction[7])); ehci_dbg (ehci, " buf: %08x %08x %08x %08x %08x %08x %08x\n", - le32_to_cpu(itd->hw_bufp[0]), - le32_to_cpu(itd->hw_bufp[1]), - le32_to_cpu(itd->hw_bufp[2]), - le32_to_cpu(itd->hw_bufp[3]), - le32_to_cpu(itd->hw_bufp[4]), - le32_to_cpu(itd->hw_bufp[5]), - le32_to_cpu(itd->hw_bufp[6])); + ehci32_to_cpu(itd->hw_bufp[0]), + ehci32_to_cpu(itd->hw_bufp[1]), + ehci32_to_cpu(itd->hw_bufp[2]), + ehci32_to_cpu(itd->hw_bufp[3]), + ehci32_to_cpu(itd->hw_bufp[4]), + ehci32_to_cpu(itd->hw_bufp[5]), + ehci32_to_cpu(itd->hw_bufp[6])); ehci_dbg (ehci, " index: %d %d %d %d %d %d %d %d\n", itd->index[0], itd->index[1], itd->index[2], itd->index[3], itd->index[4], itd->index[5], @@ -174,14 +175,15 @@ static void __attribute__((__unused__)) dbg_sitd (const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd) { ehci_dbg (ehci, "%s [%d] sitd %p, next %08x, urb %p\n", - label, sitd->frame, sitd, le32_to_cpu(sitd->hw_next), sitd->urb); + label, sitd->frame, sitd, ehci32_to_cpu(sitd->hw_next), + sitd->urb); ehci_dbg (ehci, " addr %08x sched %04x result %08x buf %08x %08x\n", - le32_to_cpu(sitd->hw_fullspeed_ep), - le32_to_cpu(sitd->hw_uframe), - le32_to_cpu(sitd->hw_results), - le32_to_cpu(sitd->hw_buf [0]), - le32_to_cpu(sitd->hw_buf [1])); + ehci32_to_cpu(sitd->hw_fullspeed_ep), + ehci32_to_cpu(sitd->hw_uframe), + ehci32_to_cpu(sitd->hw_results), + ehci32_to_cpu(sitd->hw_buf [0]), + ehci32_to_cpu(sitd->hw_buf [1])); } static int __attribute__((__unused__)) @@ -332,9 +334,9 @@ static inline void remove_debug_files (struct ehci_hcd *bus) { } default: tmp = '?'; break; \ }; tmp; }) -static inline char token_mark (__le32 token) +static inline char token_mark (__ehci32 token) { - __u32 v = le32_to_cpu (token); + __u32 v = ehci32_to_cpu (token); if (v & QTD_STS_ACTIVE) return '*'; if (v & QTD_STS_HALT) @@ -372,29 +374,29 @@ static void qh_lines ( mark = '.'; /* use hw_qtd_next */ /* else alt_next points to some other qtd */ } - scratch = le32_to_cpup (&qh->hw_info1); - hw_curr = (mark == '*') ? le32_to_cpup (&qh->hw_current) : 0; + scratch = ehci32_to_cpup (&qh->hw_info1); + hw_curr = (mark == '*') ? ehci32_to_cpup (&qh->hw_current) : 0; temp = scnprintf (next, size, "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)", qh, scratch & 0x007f, speed_char (scratch), (scratch >> 8) & 0x000f, - scratch, le32_to_cpup (&qh->hw_info2), - le32_to_cpup (&qh->hw_token), mark, - (__constant_cpu_to_le32 (QTD_TOGGLE) & qh->hw_token) + scratch, ehci32_to_cpup (&qh->hw_info2), + ehci32_to_cpup (&qh->hw_token), mark, + (__constant_cpu_to_ehci32 (QTD_TOGGLE) & qh->hw_token) ? "data1" : "data0", - (le32_to_cpup (&qh->hw_alt_next) >> 1) & 0x0f); + (ehci32_to_cpup (&qh->hw_alt_next) >> 1) & 0x0f); size -= temp; next += temp; /* hc may be modifying the list as we read it ... */ list_for_each (entry, &qh->qtd_list) { td = list_entry (entry, struct ehci_qtd, qtd_list); - scratch = le32_to_cpup (&td->hw_token); + scratch = ehci32_to_cpup (&td->hw_token); mark = ' '; if (hw_curr == td->qtd_dma) mark = '*'; - else if (qh->hw_qtd_next == cpu_to_le32(td->qtd_dma)) + else if (qh->hw_qtd_next == cpu_to_ehci32(td->qtd_dma)) mark = '+'; else if (QTD_LENGTH (scratch)) { if (td->hw_alt_next == ehci->async->hw_alt_next) @@ -490,7 +492,7 @@ show_periodic (struct class_device *class_dev, char *buf) unsigned temp, size, seen_count; char *next; unsigned i; - __le32 tag; + __ehci32 tag; if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, GFP_ATOMIC))) return 0; @@ -525,7 +527,7 @@ show_periodic (struct class_device *class_dev, char *buf) case Q_TYPE_QH: temp = scnprintf (next, size, " qh%d-%04x/%p", p.qh->period, - le32_to_cpup (&p.qh->hw_info2) + ehci32_to_cpup(&p.qh->hw_info2) /* uframe masks */ & (QH_CMASK | QH_SMASK), p.qh); @@ -543,7 +545,7 @@ show_periodic (struct class_device *class_dev, char *buf) } /* show more info the first time around */ if (temp == seen_count && p.ptr) { - u32 scratch = le32_to_cpup ( + u32 scratch = ehci32_to_cpup ( &p.qh->hw_info1); struct ehci_qtd *qtd; char *type = ""; @@ -554,7 +556,7 @@ show_periodic (struct class_device *class_dev, char *buf) &p.qh->qtd_list, qtd_list) { temp++; - switch (0x03 & (le32_to_cpu ( + switch (0x03 & (ehci32_to_cpu ( qtd->hw_token) >> 8)) { case 0: type = "out"; continue; case 1: type = "in"; continue; @@ -597,7 +599,7 @@ show_periodic (struct class_device *class_dev, char *buf) temp = scnprintf (next, size, " sitd%d-%04x/%p", p.sitd->stream->interval, - le32_to_cpup (&p.sitd->hw_uframe) + ehci32_to_cpup (&p.sitd->hw_uframe) & 0x0000ffff, p.sitd); tag = Q_NEXT_TYPE (p.sitd->hw_next); diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index c7458f7..fee885a 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -16,6 +16,12 @@ * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ +#ifdef CONFIG_USB_DEBUG + #define DEBUG +#else + #undef DEBUG +#endif + #include #include #include @@ -141,6 +147,12 @@ MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications"); #include "ehci.h" #include "ehci-dbg.c" +#ifdef CONFIG_USB_EHCI_HCD_PMC_MSP +extern void usb_hcd_tdi_set_mode(struct ehci_hcd *ehci); +#else +#define usb_hcd_tdi_set_mode(ehci) do { } while (0) +#endif + /*-------------------------------------------------------------------------*/ /* @@ -206,6 +218,9 @@ static void tdi_reset (struct ehci_hcd *ehci) tmp = ehci_readl(ehci, reg_ptr); tmp |= 0x3; ehci_writel(ehci, tmp, reg_ptr); + + /* set controller to host mode */ + usb_hcd_tdi_set_mode(ehci); } /* reset a non-running (STS_HALT == 1) controller */ @@ -472,8 +487,8 @@ static int ehci_init(struct usb_hcd *hcd) */ ehci->async->qh_next.qh = NULL; ehci->async->hw_next = QH_NEXT(ehci->async->qh_dma); - ehci->async->hw_info1 = cpu_to_le32(QH_HEAD); - ehci->async->hw_token = cpu_to_le32(QTD_STS_HALT); + ehci->async->hw_info1 = cpu_to_ehci32(QH_HEAD); + ehci->async->hw_token = cpu_to_ehci32(QTD_STS_HALT); ehci->async->hw_qtd_next = EHCI_LIST_END; ehci->async->qh_state = QH_STATE_LINKED; ehci->async->hw_alt_next = QTD_NEXT(ehci->async->dummy->qtd_dma); @@ -936,6 +951,11 @@ MODULE_LICENSE ("GPL"); #define PLATFORM_DRIVER ehci_hcd_au1xxx_driver #endif +#ifdef CONFIG_USB_EHCI_HCD_PMC_MSP +#include "ehci-pmcmsp.c" +#define PLATFORM_DRIVER ehci_hcd_msp_driver +#endif + #ifdef CONFIG_PPC_PS3 #include "ehci-ps3.c" #define PS3_SYSTEM_BUS_DRIVER ps3_ehci_sb_driver diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c index 1813b7c..9eb6489 100644 --- a/drivers/usb/host/ehci-hub.c +++ b/drivers/usb/host/ehci-hub.c @@ -552,9 +552,16 @@ static int ehci_hub_control ( status |= 1 << USB_PORT_FEAT_C_CONNECTION; if (temp & PORT_PEC) status |= 1 << USB_PORT_FEAT_C_ENABLE; - if ((temp & PORT_OCC) && !ignore_oc) + if ((temp & PORT_OCC) && !ignore_oc) { status |= 1 << USB_PORT_FEAT_C_OVER_CURRENT; + /* read PORT_OC bit as well */ + if ((temp & PORT_OC) && + strcmp(hcd->self.controller->driver->name, + "pmcmsp-ehci") == 0) + status |= 1 << USB_PORT_FEAT_OVER_CURRENT; + } + /* whoever resumes must GetPortStatus to complete it!! */ if (temp & PORT_RESUME) { diff --git a/drivers/usb/host/ehci-mem.c b/drivers/usb/host/ehci-mem.c index a8ba2e1..1134b55 100644 --- a/drivers/usb/host/ehci-mem.c +++ b/drivers/usb/host/ehci-mem.c @@ -39,7 +39,7 @@ static inline void ehci_qtd_init (struct ehci_qtd *qtd, dma_addr_t dma) { memset (qtd, 0, sizeof *qtd); qtd->qtd_dma = dma; - qtd->hw_token = cpu_to_le32 (QTD_STS_HALT); + qtd->hw_token = cpu_to_ehci32 (QTD_STS_HALT); qtd->hw_next = EHCI_LIST_END; qtd->hw_alt_next = EHCI_LIST_END; INIT_LIST_HEAD (&qtd->qtd_list); @@ -209,9 +209,9 @@ static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags) } /* Hardware periodic table */ - ehci->periodic = (__le32 *) + ehci->periodic = (__ehci32 *) dma_alloc_coherent (ehci_to_hcd(ehci)->self.controller, - ehci->periodic_size * sizeof(__le32), + ehci->periodic_size * sizeof(__ehci32), &ehci->periodic_dma, 0); if (ehci->periodic == NULL) { goto fail; diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c index e7fbbd0..b87344d 100644 --- a/drivers/usb/host/ehci-q.c +++ b/drivers/usb/host/ehci-q.c @@ -50,8 +50,8 @@ qtd_fill (struct ehci_qtd *qtd, dma_addr_t buf, size_t len, u64 addr = buf; /* one buffer entry per 4K ... first might be short or unaligned */ - qtd->hw_buf [0] = cpu_to_le32 ((u32)addr); - qtd->hw_buf_hi [0] = cpu_to_le32 ((u32)(addr >> 32)); + qtd->hw_buf [0] = cpu_to_ehci32 ((u32)addr); + qtd->hw_buf_hi [0] = cpu_to_ehci32 ((u32)(addr >> 32)); count = 0x1000 - (buf & 0x0fff); /* rest of that page */ if (likely (len < count)) /* ... iff needed */ count = len; @@ -62,8 +62,8 @@ qtd_fill (struct ehci_qtd *qtd, dma_addr_t buf, size_t len, /* per-qtd limit: from 16K to 20K (best alignment) */ for (i = 1; count < len && i < 5; i++) { addr = buf; - qtd->hw_buf [i] = cpu_to_le32 ((u32)addr); - qtd->hw_buf_hi [i] = cpu_to_le32 ((u32)(addr >> 32)); + qtd->hw_buf [i] = cpu_to_ehci32 ((u32)addr); + qtd->hw_buf_hi [i] = cpu_to_ehci32 ((u32)(addr >> 32)); buf += 0x1000; if ((count + 0x1000) < len) count += 0x1000; @@ -75,7 +75,7 @@ qtd_fill (struct ehci_qtd *qtd, dma_addr_t buf, size_t len, if (count != len) count -= (count % maxpacket); } - qtd->hw_token = cpu_to_le32 ((count << 16) | token); + qtd->hw_token = cpu_to_ehci32 ((count << 16) | token); qtd->length = count; return count; @@ -97,20 +97,20 @@ qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd) * and set the pseudo-toggle in udev. Only usb_clear_halt() will * ever clear it. */ - if (!(qh->hw_info1 & cpu_to_le32(1 << 14))) { + if (!(qh->hw_info1 & cpu_to_ehci32(1 << 14))) { unsigned is_out, epnum; - is_out = !(qtd->hw_token & cpu_to_le32(1 << 8)); - epnum = (le32_to_cpup(&qh->hw_info1) >> 8) & 0x0f; + is_out = !(qtd->hw_token & cpu_to_ehci32(1 << 8)); + epnum = (ehci32_to_cpup(&qh->hw_info1) >> 8) & 0x0f; if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) { - qh->hw_token &= ~__constant_cpu_to_le32 (QTD_TOGGLE); + qh->hw_token &= ~__constant_cpu_to_ehci32 (QTD_TOGGLE); usb_settoggle (qh->dev, epnum, is_out, 1); } } /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */ wmb (); - qh->hw_token &= __constant_cpu_to_le32 (QTD_TOGGLE | QTD_STS_PING); + qh->hw_token &= __constant_cpu_to_ehci32 (QTD_TOGGLE | QTD_STS_PING); } /* if it weren't for a common silicon quirk (writing the dummy into the qh @@ -128,7 +128,7 @@ qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh) qtd = list_entry (qh->qtd_list.next, struct ehci_qtd, qtd_list); /* first qtd may already be partially processed */ - if (cpu_to_le32 (qtd->qtd_dma) == qh->hw_current) + if (cpu_to_ehci32 (qtd->qtd_dma) == qh->hw_current) qtd = NULL; } @@ -222,7 +222,7 @@ __acquires(ehci->lock) struct ehci_qh *qh = (struct ehci_qh *) urb->hcpriv; /* S-mask in a QH means it's an interrupt urb */ - if ((qh->hw_info2 & __constant_cpu_to_le32 (QH_SMASK)) != 0) { + if ((qh->hw_info2 & __constant_cpu_to_ehci32 (QH_SMASK)) != 0) { /* ... update hc-wide periodic stats (for usbfs) */ ehci_to_hcd(ehci)->self.bandwidth_int_reqs--; @@ -277,7 +277,7 @@ static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh); * Chases up to qh->hw_current. Returns number of completions called, * indicating how much "real" work we did. */ -#define HALT_BIT __constant_cpu_to_le32(QTD_STS_HALT) +#define HALT_BIT __constant_cpu_to_ehci32(QTD_STS_HALT) static unsigned qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh) { @@ -330,7 +330,7 @@ qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh) /* hardware copies qtd out of qh overlay */ rmb (); - token = le32_to_cpu (qtd->hw_token); + token = ehci32_to_cpu (qtd->hw_token); /* always clean up qtds the hc de-activated */ if ((token & QTD_STS_ACTIVE) == 0) { @@ -374,9 +374,9 @@ qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh) /* token in overlay may be most current */ if (state == QH_STATE_IDLE - && cpu_to_le32 (qtd->qtd_dma) + && cpu_to_ehci32 (qtd->qtd_dma) == qh->hw_current) - token = le32_to_cpu (qh->hw_token); + token = ehci32_to_cpu (qh->hw_token); /* force halt for unlinked or blocked qh, so we'll * patch the qh later and so that completions can't @@ -428,7 +428,7 @@ halt: /* should be rare for periodic transfers, * except maybe high bandwidth ... */ - if ((__constant_cpu_to_le32 (QH_SMASK) + if ((__constant_cpu_to_ehci32 (QH_SMASK) & qh->hw_info2) != 0) { intr_deschedule (ehci, qh); (void) qh_schedule (ehci, qh); @@ -600,7 +600,7 @@ qh_urb_transaction ( /* by default, enable interrupt on urb completion */ if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT))) - qtd->hw_token |= __constant_cpu_to_le32 (QTD_IOC); + qtd->hw_token |= __constant_cpu_to_ehci32 (QTD_IOC); return head; cleanup: @@ -769,8 +769,8 @@ done: /* init as live, toggle clear, advance to dummy */ qh->qh_state = QH_STATE_IDLE; - qh->hw_info1 = cpu_to_le32 (info1); - qh->hw_info2 = cpu_to_le32 (info2); + qh->hw_info1 = cpu_to_ehci32 (info1); + qh->hw_info2 = cpu_to_ehci32 (info2); usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1); qh_refresh (ehci, qh); return qh; @@ -782,7 +782,7 @@ done: static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh) { - __le32 dma = QH_NEXT (qh->qh_dma); + __ehci32 dma = QH_NEXT (qh->qh_dma); struct ehci_qh *head; /* (re)start the async schedule? */ @@ -820,7 +820,7 @@ static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh) /*-------------------------------------------------------------------------*/ -#define QH_ADDR_MASK __constant_cpu_to_le32(0x7f) +#define QH_ADDR_MASK __constant_cpu_to_ehci32(0x7f) /* * For control/bulk/interrupt, return QH with these TDs appended. @@ -867,7 +867,7 @@ static struct ehci_qh *qh_append_tds ( if (likely (qtd != NULL)) { struct ehci_qtd *dummy; dma_addr_t dma; - __le32 token; + __ehci32 token; /* to avoid racing the HC, use the dummy td instead of * the first td of our list (becomes new dummy). both @@ -970,7 +970,7 @@ static void end_unlink_async (struct ehci_hcd *ehci) timer_action_done (ehci, TIMER_IAA_WATCHDOG); - // qh->hw_next = cpu_to_le32 (qh->qh_dma); + /* qh->hw_next = cpu_to_ehci32 (qh->qh_dma); */ qh->qh_state = QH_STATE_IDLE; qh->qh_next.qh = NULL; qh_put (qh); // refcount from reclaim diff --git a/drivers/usb/host/ehci-sched.c b/drivers/usb/host/ehci-sched.c index 7b5ae71..1e51c0d 100644 --- a/drivers/usb/host/ehci-sched.c +++ b/drivers/usb/host/ehci-sched.c @@ -44,7 +44,7 @@ static int ehci_get_frame (struct usb_hcd *hcd); * @tag: hardware tag for type of this record */ static union ehci_shadow * -periodic_next_shadow (union ehci_shadow *periodic, __le32 tag) +periodic_next_shadow (union ehci_shadow *periodic, __ehci32 tag) { switch (tag) { case Q_TYPE_QH: @@ -63,7 +63,7 @@ periodic_next_shadow (union ehci_shadow *periodic, __le32 tag) static void periodic_unlink (struct ehci_hcd *ehci, unsigned frame, void *ptr) { union ehci_shadow *prev_p = &ehci->pshadow [frame]; - __le32 *hw_p = &ehci->periodic [frame]; + __ehci32 *hw_p = &ehci->periodic [frame]; union ehci_shadow here = *prev_p; /* find predecessor of "ptr"; hw and shadow lists are in sync */ @@ -87,7 +87,7 @@ static void periodic_unlink (struct ehci_hcd *ehci, unsigned frame, void *ptr) static unsigned short periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe) { - __le32 *hw_p = &ehci->periodic [frame]; + __ehci32 *hw_p = &ehci->periodic [frame]; union ehci_shadow *q = &ehci->pshadow [frame]; unsigned usecs = 0; @@ -95,10 +95,11 @@ periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe) switch (Q_NEXT_TYPE (*hw_p)) { case Q_TYPE_QH: /* is it in the S-mask? */ - if (q->qh->hw_info2 & cpu_to_le32 (1 << uframe)) + if (q->qh->hw_info2 & cpu_to_ehci32 (1 << uframe)) usecs += q->qh->usecs; /* ... or C-mask? */ - if (q->qh->hw_info2 & cpu_to_le32 (1 << (8 + uframe))) + if (q->qh->hw_info2 & + cpu_to_ehci32 (1 << (8 + uframe))) usecs += q->qh->c_usecs; hw_p = &q->qh->hw_next; q = &q->qh->qh_next; @@ -121,9 +122,10 @@ periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe) break; case Q_TYPE_SITD: /* is it in the S-mask? (count SPLIT, DATA) */ - if (q->sitd->hw_uframe & cpu_to_le32 (1 << uframe)) { + if (q->sitd->hw_uframe & + cpu_to_ehci32 (1 << uframe)) { if (q->sitd->hw_fullspeed_ep & - __constant_cpu_to_le32 (1<<31)) + __constant_cpu_to_ehci32 (1<<31)) usecs += q->sitd->stream->usecs; else /* worst case for OUT start-split */ usecs += HS_USECS_ISO (188); @@ -131,7 +133,7 @@ periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe) /* ... C-mask? (count CSPLIT, DATA) */ if (q->sitd->hw_uframe & - cpu_to_le32 (1 << (8 + uframe))) { + cpu_to_ehci32 (1 << (8 + uframe))) { /* worst case for IN complete-split */ usecs += q->sitd->stream->c_usecs; } @@ -173,9 +175,10 @@ static int same_tt (struct usb_device *dev1, struct usb_device *dev2) * will cause a transfer in "B-frame" uframe 0. "B-frames" lag * "H-frames" by 1 uframe. See the EHCI spec sec 4.5 and figure 4.7. */ -static inline unsigned char tt_start_uframe(struct ehci_hcd *ehci, __le32 mask) +static inline unsigned char tt_start_uframe(struct ehci_hcd *ehci, + __ehci32 mask) { - unsigned char smask = QH_SMASK & le32_to_cpu(mask); + unsigned char smask = QH_SMASK & ehci32_to_cpu(mask); if (!smask) { ehci_err(ehci, "invalid empty smask!\n"); /* uframe 7 can't have bw so this will indicate failure */ @@ -217,7 +220,7 @@ periodic_tt_usecs ( unsigned short tt_usecs[8] ) { - __le32 *hw_p = &ehci->periodic [frame]; + __ehci32 *hw_p = &ehci->periodic [frame]; union ehci_shadow *q = &ehci->pshadow [frame]; unsigned char uf; @@ -368,7 +371,7 @@ static int tt_no_collision ( */ for (; frame < ehci->periodic_size; frame += period) { union ehci_shadow here; - __le32 type; + __ehci32 type; here = ehci->pshadow [frame]; type = Q_NEXT_TYPE (ehci->periodic [frame]); @@ -382,7 +385,8 @@ static int tt_no_collision ( if (same_tt (dev, here.qh->dev)) { u32 mask; - mask = le32_to_cpu (here.qh->hw_info2); + mask = ehci32_to_cpu( + here.qh->hw_info2); /* "knows" no gap is needed */ mask |= mask >> 8; if (mask & uf_mask) @@ -395,7 +399,7 @@ static int tt_no_collision ( if (same_tt (dev, here.sitd->urb->dev)) { u16 mask; - mask = le32_to_cpu (here.sitd + mask = ehci32_to_cpu (here.sitd ->hw_uframe); /* FIXME assumes no gap for IN! */ mask |= mask >> 8; @@ -487,7 +491,7 @@ static int qh_link_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh) dev_dbg (&qh->dev->dev, "link qh%d-%04x/%p start %d [%d/%d us]\n", - period, le32_to_cpup (&qh->hw_info2) & (QH_CMASK | QH_SMASK), + period, ehci32_to_cpup (&qh->hw_info2) & (QH_CMASK | QH_SMASK), qh, qh->start, qh->usecs, qh->c_usecs); /* high bandwidth, or otherwise every microframe */ @@ -496,9 +500,9 @@ static int qh_link_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh) for (i = qh->start; i < ehci->periodic_size; i += period) { union ehci_shadow *prev = &ehci->pshadow [i]; - __le32 *hw_p = &ehci->periodic [i]; + __ehci32 *hw_p = &ehci->periodic [i]; union ehci_shadow here = *prev; - __le32 type = 0; + __ehci32 type = 0; /* skip the iso nodes at list head */ while (here.ptr) { @@ -555,7 +559,7 @@ static void qh_unlink_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh) // and this qh is active in the current uframe // (and overlay token SplitXstate is false?) // THEN - // qh->hw_info1 |= __constant_cpu_to_le32 (1 << 7 /* "ignore" */); + // qh->hw_info1 |= __constant_cpu_to_ehci32 (1 << 7 /* "ignore" */); /* high bandwidth, or otherwise part of every microframe */ if ((period = qh->period) == 0) @@ -572,7 +576,7 @@ static void qh_unlink_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh) dev_dbg (&qh->dev->dev, "unlink qh%d-%04x/%p start %d [%d/%d us]\n", qh->period, - le32_to_cpup (&qh->hw_info2) & (QH_CMASK | QH_SMASK), + ehci32_to_cpup (&qh->hw_info2) & (QH_CMASK | QH_SMASK), qh, qh->start, qh->usecs, qh->c_usecs); /* qh->qh_next still "live" to HC */ @@ -598,7 +602,7 @@ static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh) * active high speed queues may need bigger delays... */ if (list_empty (&qh->qtd_list) - || (__constant_cpu_to_le32 (QH_CMASK) + || (__constant_cpu_to_ehci32 (QH_CMASK) & qh->hw_info2) != 0) wait = 2; else @@ -663,7 +667,7 @@ static int check_intr_schedule ( unsigned frame, unsigned uframe, const struct ehci_qh *qh, - __le32 *c_maskp + __ehci32 *c_maskp ) { int retval = -ENOSPC; @@ -685,7 +689,7 @@ static int check_intr_schedule ( qh->tt_usecs)) { unsigned i; - /* TODO : this may need FSTN for SSPLIT in uframe 5. */ + /* TODO: this may need FSTN for SSPLIT in uframe 5. */ for (i=uframe+1; i<8 && iperiod, qh->c_usecs)) @@ -695,7 +699,7 @@ static int check_intr_schedule ( retval = 0; - *c_maskp = cpu_to_le32 (mask << 8); + *c_maskp = cpu_to_ehci32 (mask << 8); } #else /* Make sure this tt's buffer is also available for CSPLITs. @@ -706,7 +710,7 @@ static int check_intr_schedule ( * one smart pass... */ mask = 0x03 << (uframe + qh->gap_uf); - *c_maskp = cpu_to_le32 (mask << 8); + *c_maskp = cpu_to_ehci32 (mask << 8); mask |= 1 << uframe; if (tt_no_collision (ehci, qh->period, qh->dev, frame, mask)) { @@ -730,7 +734,7 @@ static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh) { int status; unsigned uframe; - __le32 c_mask; + __ehci32 c_mask; unsigned frame; /* 0..(qh->period - 1), or NO_FRAME */ qh_refresh(ehci, qh); @@ -739,7 +743,7 @@ static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh) /* reuse the previous schedule slots, if we can */ if (frame < qh->period) { - uframe = ffs (le32_to_cpup (&qh->hw_info2) & QH_SMASK); + uframe = ffs (ehci32_to_cpup (&qh->hw_info2) & QH_SMASK); status = check_intr_schedule (ehci, frame, --uframe, qh, &c_mask); } else { @@ -775,10 +779,11 @@ static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh) qh->start = frame; /* reset S-frame and (maybe) C-frame masks */ - qh->hw_info2 &= __constant_cpu_to_le32(~(QH_CMASK | QH_SMASK)); + qh->hw_info2 &= __constant_cpu_to_ehci32( + ~(QH_CMASK | QH_SMASK)); qh->hw_info2 |= qh->period - ? cpu_to_le32 (1 << uframe) - : __constant_cpu_to_le32 (QH_SMASK); + ? cpu_to_ehci32 (1 << uframe) + : __constant_cpu_to_ehci32 (QH_SMASK); qh->hw_info2 |= c_mask; } else ehci_dbg (ehci, "reused qh %p schedule\n", qh); @@ -898,9 +903,9 @@ iso_stream_init ( buf1 |= maxp; maxp *= multi; - stream->buf0 = cpu_to_le32 ((epnum << 8) | dev->devnum); - stream->buf1 = cpu_to_le32 (buf1); - stream->buf2 = cpu_to_le32 (multi); + stream->buf0 = cpu_to_ehci32 ((epnum << 8) | dev->devnum); + stream->buf1 = cpu_to_ehci32 (buf1); + stream->buf2 = cpu_to_ehci32 (multi); /* usbfs wants to report the average usecs per frame tied up * when transfers on this endpoint are scheduled ... @@ -943,7 +948,7 @@ iso_stream_init ( bandwidth /= 1 << (interval + 2); /* stream->splits gets created from raw_mask later */ - stream->address = cpu_to_le32 (addr); + stream->address = cpu_to_ehci32 (addr); } stream->bandwidth = bandwidth; @@ -1107,7 +1112,7 @@ itd_sched_init ( && !(urb->transfer_flags & URB_NO_INTERRUPT)) trans |= EHCI_ITD_IOC; trans |= length << 16; - uframe->transaction = cpu_to_le32 (trans); + uframe->transaction = cpu_to_ehci32 (trans); /* might need to cross a buffer page within a uframe */ uframe->bufp = (buf & ~(u64)0x0fff); @@ -1294,7 +1299,7 @@ sitd_slot_ok ( uframe += period_uframes; } while (uframe < mod); - stream->splits = cpu_to_le32(stream->raw_mask << (uframe & 7)); + stream->splits = cpu_to_ehci32(stream->raw_mask << (uframe & 7)); return 1; } @@ -1448,16 +1453,16 @@ itd_patch ( itd->index [uframe] = index; itd->hw_transaction [uframe] = uf->transaction; - itd->hw_transaction [uframe] |= cpu_to_le32 (pg << 12); - itd->hw_bufp [pg] |= cpu_to_le32 (uf->bufp & ~(u32)0); - itd->hw_bufp_hi [pg] |= cpu_to_le32 ((u32)(uf->bufp >> 32)); + itd->hw_transaction [uframe] |= cpu_to_ehci32 (pg << 12); + itd->hw_bufp [pg] |= cpu_to_ehci32 (uf->bufp & ~(u32)0); + itd->hw_bufp_hi [pg] |= cpu_to_ehci32 ((u32)(uf->bufp >> 32)); /* iso_frame_desc[].offset must be strictly increasing */ if (unlikely (uf->cross)) { u64 bufp = uf->bufp + 4096; itd->pg = ++pg; - itd->hw_bufp [pg] |= cpu_to_le32 (bufp & ~(u32)0); - itd->hw_bufp_hi [pg] |= cpu_to_le32 ((u32)(bufp >> 32)); + itd->hw_bufp [pg] |= cpu_to_ehci32 (bufp & ~(u32)0); + itd->hw_bufp_hi [pg] |= cpu_to_ehci32 ((u32)(bufp >> 32)); } } @@ -1470,7 +1475,7 @@ itd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_itd *itd) ehci->pshadow [frame].itd = itd; itd->frame = frame; wmb (); - ehci->periodic [frame] = cpu_to_le32 (itd->itd_dma) | Q_TYPE_ITD; + ehci->periodic [frame] = cpu_to_ehci32 (itd->itd_dma) | Q_TYPE_ITD; } /* fit urb's itds into the selected schedule slot; activate as needed */ @@ -1570,7 +1575,7 @@ itd_complete ( urb_index = itd->index[uframe]; desc = &urb->iso_frame_desc [urb_index]; - t = le32_to_cpup (&itd->hw_transaction [uframe]); + t = ehci32_to_cpup (&itd->hw_transaction [uframe]); itd->hw_transaction [uframe] = 0; stream->depth -= stream->interval; @@ -1729,7 +1734,7 @@ sitd_sched_init ( && !(urb->transfer_flags & URB_NO_INTERRUPT)) trans |= SITD_IOC; trans |= length << 16; - packet->transaction = cpu_to_le32 (trans); + packet->transaction = cpu_to_ehci32 (trans); /* might need to cross a buffer page within a td */ packet->bufp = buf; @@ -1834,13 +1839,13 @@ sitd_patch ( sitd->hw_backpointer = EHCI_LIST_END; bufp = uf->bufp; - sitd->hw_buf [0] = cpu_to_le32 (bufp); - sitd->hw_buf_hi [0] = cpu_to_le32 (bufp >> 32); + sitd->hw_buf [0] = cpu_to_ehci32 (bufp); + sitd->hw_buf_hi [0] = cpu_to_ehci32 (bufp >> 32); - sitd->hw_buf [1] = cpu_to_le32 (uf->buf1); + sitd->hw_buf [1] = cpu_to_ehci32 (uf->buf1); if (uf->cross) bufp += 4096; - sitd->hw_buf_hi [1] = cpu_to_le32 (bufp >> 32); + sitd->hw_buf_hi [1] = cpu_to_ehci32 (bufp >> 32); sitd->index = index; } @@ -1853,7 +1858,7 @@ sitd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_sitd *sitd) ehci->pshadow [frame].sitd = sitd; sitd->frame = frame; wmb (); - ehci->periodic [frame] = cpu_to_le32 (sitd->sitd_dma) | Q_TYPE_SITD; + ehci->periodic [frame] = cpu_to_ehci32 (sitd->sitd_dma) | Q_TYPE_SITD; } /* fit urb's sitds into the selected schedule slot; activate as needed */ @@ -1881,7 +1886,7 @@ sitd_link_urb ( urb->dev->devpath, stream->bEndpointAddress & 0x0f, (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out", (next_uframe >> 3) % ehci->periodic_size, - stream->interval, le32_to_cpu (stream->splits)); + stream->interval, ehci32_to_cpu (stream->splits)); stream->start = jiffies; } ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++; @@ -1940,7 +1945,7 @@ sitd_complete ( urb_index = sitd->index; desc = &urb->iso_frame_desc [urb_index]; - t = le32_to_cpup (&sitd->hw_results); + t = ehci32_to_cpup (&sitd->hw_results); /* report transfer status */ if (t & SITD_ERRS) { @@ -2095,7 +2100,7 @@ scan_periodic (struct ehci_hcd *ehci) for (;;) { union ehci_shadow q, *q_p; - __le32 type, *hw_p; + __ehci32 type, *hw_p; unsigned uframes; /* don't scan past the live uframe */ diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h index 46fa57a..b5de2cf 100644 --- a/drivers/usb/host/ehci.h +++ b/drivers/usb/host/ehci.h @@ -21,6 +21,99 @@ /* definitions used for the EHCI driver */ +/* + * __ehci32 and __ehci16 are "EHCI Host Controller" types, they may be + * equivalent to __leXX (normally) or __beXX (given EHCI_BIG_ENDIAN), + * depending on the host controller implementation. + */ +typedef __u32 __bitwise __ehci32; +typedef __u16 __bitwise __ehci16; + +/* cpu to ehci */ +static inline __ehci16 cpu_to_ehci16 (const u16 x) +{ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN + return (__force __ehci16)cpu_to_be16(x); +#else + return (__force __ehci16)cpu_to_le16(x); +#endif +} + +static inline __ehci16 cpu_to_ehci16p (const u16 *x) +{ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN + return cpu_to_be16p(x); +#else + return cpu_to_le16p(x); +#endif +} + +static inline __ehci32 cpu_to_ehci32 (const u32 x) +{ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN + return (__force __ehci32)cpu_to_be32(x); +#else + return (__force __ehci32)cpu_to_le32(x); +#endif +} + +static inline __ehci32 cpu_to_ehci32p (const u32 *x) +{ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN + return cpu_to_be32p(x); +#else + return cpu_to_le32p(x); +#endif +} + +/* ehci to cpu */ +static inline u16 ehci16_to_cpu (const __ehci16 x) +{ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN + return be16_to_cpu((__force __be16)x); +#else + return le16_to_cpu((__force __le16)x); +#endif +} + +static inline u16 ehci16_to_cpup (const __ehci16 *x) +{ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN + return be16_to_cpup((__force __be16 *)x); +#else + return le16_to_cpup((__force __le16 *)x); +#endif +} + +static inline u32 ehci32_to_cpu (const __ehci32 x) +{ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN + return be32_to_cpu((__force __be32)x); +#else + return le32_to_cpu((__force __le32)x); +#endif +} + +static inline u32 ehci32_to_cpup (const __ehci32 *x) +{ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN + return be32_to_cpup((__force __be32 *)x); +#else + return le32_to_cpup((__force __le32 *)x); +#endif +} + +static inline u32 __constant_cpu_to_ehci32(const __ehci32 x) +{ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN + return __constant_cpu_to_be32((__force __be32)x); +#else + return __constant_cpu_to_le32((__force __le32 )x); +#endif +} + +/*-------------------------------------------------------------------------*/ + /* statistics can be kept for for tuning/monitoring */ struct ehci_stats { /* irq usage */ @@ -64,7 +157,7 @@ struct ehci_hcd { /* one per controller */ /* periodic schedule support */ #define DEFAULT_I_TDPS 1024 /* some HCs can do less */ unsigned periodic_size; - __le32 *periodic; /* hw periodic table */ + __ehci32 *periodic; /* hw periodic table */ dma_addr_t periodic_dma; unsigned i_thresh; /* uframes HC might cache */ @@ -303,7 +396,7 @@ struct ehci_dbg_port { /*-------------------------------------------------------------------------*/ -#define QTD_NEXT(dma) cpu_to_le32((u32)dma) +#define QTD_NEXT(dma) cpu_to_ehci32((u32)dma) /* * EHCI Specification 0.95 Section 3.5 @@ -315,9 +408,9 @@ struct ehci_dbg_port { */ struct ehci_qtd { /* first part defined by EHCI spec */ - __le32 hw_next; /* see EHCI 3.5.1 */ - __le32 hw_alt_next; /* see EHCI 3.5.2 */ - __le32 hw_token; /* see EHCI 3.5.3 */ + __ehci32 hw_next; /* see EHCI 3.5.1 */ + __ehci32 hw_alt_next; /* see EHCI 3.5.2 */ + __ehci32 hw_token; /* see EHCI 3.5.3 */ #define QTD_TOGGLE (1 << 31) /* data toggle */ #define QTD_LENGTH(tok) (((tok)>>16) & 0x7fff) #define QTD_IOC (1 << 15) /* interrupt on complete */ @@ -331,8 +424,8 @@ struct ehci_qtd { #define QTD_STS_MMF (1 << 2) /* incomplete split transaction */ #define QTD_STS_STS (1 << 1) /* split transaction state */ #define QTD_STS_PING (1 << 0) /* issue PING? */ - __le32 hw_buf [5]; /* see EHCI 3.5.4 */ - __le32 hw_buf_hi [5]; /* Appendix B */ + __ehci32 hw_buf [5]; /* see EHCI 3.5.4 */ + __ehci32 hw_buf_hi [5]; /* Appendix B */ /* the rest is HCD-private */ dma_addr_t qtd_dma; /* qtd address */ @@ -342,26 +435,45 @@ struct ehci_qtd { } __attribute__ ((aligned (32))); /* mask NakCnt+T in qh->hw_alt_next */ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN +#define QTD_MASK __constant_cpu_to_be32 (~0x1f) +#else #define QTD_MASK __constant_cpu_to_le32 (~0x1f) +#endif #define IS_SHORT_READ(token) (QTD_LENGTH (token) != 0 && QTD_PID (token) == 1) /*-------------------------------------------------------------------------*/ /* type tag from {qh,itd,sitd,fstn}->hw_next */ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN +#define Q_NEXT_TYPE(dma) ((dma) & __constant_cpu_to_be32 (3 << 1)) +#else #define Q_NEXT_TYPE(dma) ((dma) & __constant_cpu_to_le32 (3 << 1)) +#endif /* values for that type tag */ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN +#define Q_TYPE_ITD __constant_cpu_to_be32 (0 << 1) +#define Q_TYPE_QH __constant_cpu_to_be32 (1 << 1) +#define Q_TYPE_SITD __constant_cpu_to_be32 (2 << 1) +#define Q_TYPE_FSTN __constant_cpu_to_be32 (3 << 1) +#else #define Q_TYPE_ITD __constant_cpu_to_le32 (0 << 1) #define Q_TYPE_QH __constant_cpu_to_le32 (1 << 1) #define Q_TYPE_SITD __constant_cpu_to_le32 (2 << 1) #define Q_TYPE_FSTN __constant_cpu_to_le32 (3 << 1) +#endif /* next async queue entry, or pointer to interrupt/periodic QH */ -#define QH_NEXT(dma) (cpu_to_le32(((u32)dma)&~0x01f)|Q_TYPE_QH) +#define QH_NEXT(dma) (cpu_to_ehci32(((u32)dma)&~0x01f)|Q_TYPE_QH) /* for periodic/async schedules and qtd lists, mark end of list */ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN +#define EHCI_LIST_END __constant_cpu_to_be32(1) /* "null pointer" to hw */ +#else #define EHCI_LIST_END __constant_cpu_to_le32(1) /* "null pointer" to hw */ +#endif /* * Entries in periodic shadow table are pointers to one of four kinds @@ -376,7 +488,7 @@ union ehci_shadow { struct ehci_itd *itd; /* Q_TYPE_ITD */ struct ehci_sitd *sitd; /* Q_TYPE_SITD */ struct ehci_fstn *fstn; /* Q_TYPE_FSTN */ - __le32 *hw_next; /* (all types) */ + __ehci32 *hw_next; /* (all types) */ void *ptr; }; @@ -392,23 +504,23 @@ union ehci_shadow { struct ehci_qh { /* first part defined by EHCI spec */ - __le32 hw_next; /* see EHCI 3.6.1 */ - __le32 hw_info1; /* see EHCI 3.6.2 */ + __ehci32 hw_next; /* see EHCI 3.6.1 */ + __ehci32 hw_info1; /* see EHCI 3.6.2 */ #define QH_HEAD 0x00008000 - __le32 hw_info2; /* see EHCI 3.6.2 */ + __ehci32 hw_info2; /* see EHCI 3.6.2 */ #define QH_SMASK 0x000000ff #define QH_CMASK 0x0000ff00 #define QH_HUBADDR 0x007f0000 #define QH_HUBPORT 0x3f800000 #define QH_MULT 0xc0000000 - __le32 hw_current; /* qtd list - see EHCI 3.6.4 */ + __ehci32 hw_current; /* qtd list - see EHCI 3.6.4 */ /* qtd overlay (hardware parts of a struct ehci_qtd) */ - __le32 hw_qtd_next; - __le32 hw_alt_next; - __le32 hw_token; - __le32 hw_buf [5]; - __le32 hw_buf_hi [5]; + __ehci32 hw_qtd_next; + __ehci32 hw_alt_next; + __ehci32 hw_token; + __ehci32 hw_buf [5]; + __ehci32 hw_buf_hi [5]; /* the rest is HCD-private */ dma_addr_t qh_dma; /* address of qh */ @@ -445,7 +557,7 @@ struct ehci_qh { struct ehci_iso_packet { /* These will be copied to iTD when scheduling */ u64 bufp; /* itd->hw_bufp{,_hi}[pg] |= */ - __le32 transaction; /* itd->hw_transaction[i] |= */ + __ehci32 transaction; /* itd->hw_transaction[i] |= */ u8 cross; /* buf crosses pages */ /* for full speed OUT splits */ u32 buf1; @@ -467,8 +579,8 @@ struct ehci_iso_sched { */ struct ehci_iso_stream { /* first two fields match QH, but info1 == 0 */ - __le32 hw_next; - __le32 hw_info1; + __ehci32 hw_next; + __ehci32 hw_info1; u32 refcount; u8 bEndpointAddress; @@ -483,7 +595,7 @@ struct ehci_iso_stream { unsigned long start; /* jiffies */ unsigned long rescheduled; int next_uframe; - __le32 splits; + __ehci32 splits; /* the rest is derived from the endpoint descriptor, * trusting urb->interval == f(epdesc->bInterval) and @@ -497,12 +609,12 @@ struct ehci_iso_stream { unsigned bandwidth; /* This is used to initialize iTD's hw_bufp fields */ - __le32 buf0; - __le32 buf1; - __le32 buf2; + __ehci32 buf0; + __ehci32 buf1; + __ehci32 buf2; /* this is used to initialize sITD's tt info */ - __le32 address; + __ehci32 address; }; /*-------------------------------------------------------------------------*/ @@ -515,8 +627,8 @@ struct ehci_iso_stream { */ struct ehci_itd { /* first part defined by EHCI spec */ - __le32 hw_next; /* see EHCI 3.3.1 */ - __le32 hw_transaction [8]; /* see EHCI 3.3.2 */ + __ehci32 hw_next; /* see EHCI 3.3.1 */ + __ehci32 hw_transaction [8]; /* see EHCI 3.3.2 */ #define EHCI_ISOC_ACTIVE (1<<31) /* activate transfer this slot */ #define EHCI_ISOC_BUF_ERR (1<<30) /* Data buffer error */ #define EHCI_ISOC_BABBLE (1<<29) /* babble detected */ @@ -524,10 +636,14 @@ struct ehci_itd { #define EHCI_ITD_LENGTH(tok) (((tok)>>16) & 0x0fff) #define EHCI_ITD_IOC (1 << 15) /* interrupt on complete */ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN +#define ITD_ACTIVE __constant_cpu_to_be32(EHCI_ISOC_ACTIVE) +#else #define ITD_ACTIVE __constant_cpu_to_le32(EHCI_ISOC_ACTIVE) +#endif - __le32 hw_bufp [7]; /* see EHCI 3.3.3 */ - __le32 hw_bufp_hi [7]; /* Appendix B */ + __ehci32 hw_bufp [7]; /* see EHCI 3.3.3 */ + __ehci32 hw_bufp_hi [7]; /* Appendix B */ /* the rest is HCD-private */ dma_addr_t itd_dma; /* for this itd */ @@ -554,11 +670,11 @@ struct ehci_itd { */ struct ehci_sitd { /* first part defined by EHCI spec */ - __le32 hw_next; + __ehci32 hw_next; /* uses bit field macros above - see EHCI 0.95 Table 3-8 */ - __le32 hw_fullspeed_ep; /* EHCI table 3-9 */ - __le32 hw_uframe; /* EHCI table 3-10 */ - __le32 hw_results; /* EHCI table 3-11 */ + __ehci32 hw_fullspeed_ep; /* EHCI table 3-9 */ + __ehci32 hw_uframe; /* EHCI table 3-10 */ + __ehci32 hw_results; /* EHCI table 3-11 */ #define SITD_IOC (1 << 31) /* interrupt on completion */ #define SITD_PAGE (1 << 30) /* buffer 0/1 */ #define SITD_LENGTH(x) (0x3ff & ((x)>>16)) @@ -570,11 +686,15 @@ struct ehci_sitd { #define SITD_STS_MMF (1 << 2) /* incomplete split transaction */ #define SITD_STS_STS (1 << 1) /* split transaction state */ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN +#define SITD_ACTIVE __constant_cpu_to_be32(SITD_STS_ACTIVE) +#else #define SITD_ACTIVE __constant_cpu_to_le32(SITD_STS_ACTIVE) +#endif - __le32 hw_buf [2]; /* EHCI table 3-12 */ - __le32 hw_backpointer; /* EHCI table 3-13 */ - __le32 hw_buf_hi [2]; /* Appendix B */ + __ehci32 hw_buf [2]; /* EHCI table 3-12 */ + __ehci32 hw_backpointer; /* EHCI table 3-13 */ + __ehci32 hw_buf_hi [2]; /* Appendix B */ /* the rest is HCD-private */ dma_addr_t sitd_dma; @@ -599,8 +719,8 @@ struct ehci_sitd { * it hits a "restore" FSTN; then it returns to finish other uframe 0/1 work. */ struct ehci_fstn { - __le32 hw_next; /* any periodic q entry */ - __le32 hw_prev; /* qh or EHCI_LIST_END */ + __ehci32 hw_next; /* any periodic q entry */ + __ehci32 hw_prev; /* qh or EHCI_LIST_END */ /* the rest is HCD-private */ dma_addr_t fstn_dma; @@ -672,6 +792,12 @@ ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc) #define ehci_big_endian_mmio(e) 0 #endif +#if defined(CONFIG_USB_EHCI_BIG_ENDIAN) && \ + defined(CONFIG_USB_EHCI_BIG_ENDIAN_MMIO) +#define readl_be(addr) __raw_readl((addr)) +#define writel_be(val, addr) __raw_writel((val), (addr)) +#endif + static inline unsigned int ehci_readl (const struct ehci_hcd *ehci, __u32 __iomem * regs) { diff --git a/drivers/usb/host/ehci-pmcmsp.c b/drivers/usb/host/ehci-pmcmsp.c new file mode 100644 index 0000000..18aa74d --- /dev/null +++ b/drivers/usb/host/ehci-pmcmsp.c @@ -0,0 +1,434 @@ +/* + * PMC MSP EHCI (Host Controller Driver) for USB. + * + * (C) Copyright 2006-2007 PMC-Sierra Inc + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include + +#ifdef CONFIG_PMCTWILED +#include "msp_led_macros.h" +#endif + +/* includes */ +#define USB_CTRL_MODE_HOST 0x3 /* host mode */ +#define USB_CTRL_MODE_BIG_ENDIAN 0x4 /* big endian */ +#define USB_CTRL_MODE_STREAM_DISABLE 0x10 /* stream disable*/ +#define USB_CTRL_FIFO_THRESH 0x00300000 /* thresh hold */ +#define USB_EHCI_REG_USB_MODE 0x68 /* reg offset usb mode */ +#define USB_EHCI_REG_USB_FIFO 0x24 /* reg offset usb fifo */ +#define USB_EHCI_REG_USB_STATUS 0x44 /* reg offset usb status*/ +#define USB_EHCI_REG_BIT_STAT_STS (1<<29) /* serial/parallel xcvr */ + +extern int usb_disabled(void); +extern void usb_hcd_tdi_set_mode(struct ehci_hcd *ehci); + +void usb_hcd_tdi_set_mode(struct ehci_hcd *ehci) +{ + u8 *base; + u8 *statreg; + u8 *fiforeg; + u32 val; + + /* get register base */ + base = (u8 *)ehci->regs + USB_EHCI_REG_USB_MODE; + statreg = (u8 *)ehci->regs + USB_EHCI_REG_USB_STATUS; + fiforeg = (u8 *)ehci->regs + USB_EHCI_REG_USB_FIFO; + + /* set the controller to host mode and BIG ENDIAN */ + ehci_writel(ehci, (USB_CTRL_MODE_HOST | USB_CTRL_MODE_BIG_ENDIAN | + USB_CTRL_MODE_STREAM_DISABLE), (u32 *)base); + + /* clear STS to select parallel transceiver interface */ + val = ehci_readl(ehci, (u32 *)statreg); + val = val & ~USB_EHCI_REG_BIT_STAT_STS; + ehci_writel(ehci, val, (u32 *)statreg); + + /* write to set the proper fifo threshold */ + ehci_writel(ehci, USB_CTRL_FIFO_THRESH, (u32 *)fiforeg); + +#ifdef CONFIG_PMCTWILED + /* set TWI GPIO USB_HOST_DEV pin to active high */ + msp_led_pin_hi(MSP_PIN_USB_HOST_DEV); +#endif +} + +/* called after powerup, by probe or system-pm "wakeup" */ +static int ehci_msp_reinit(struct ehci_hcd *ehci) +{ + ehci_port_power(ehci, 0); + + return 0; +} + +/* called during probe() after chip reset completes */ +static int ehci_msp_setup(struct usb_hcd *hcd) +{ + struct ehci_hcd *ehci = hcd_to_ehci(hcd); + u32 temp; + int retval; + +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO + ehci->big_endian_mmio = 1; +#endif + + ehci->caps = hcd->regs; + ehci->regs = hcd->regs + HC_LENGTH( + ehci_readl(ehci, &ehci->caps->hc_capbase)); + dbg_hcs_params(ehci, "reset"); + dbg_hcc_params(ehci, "reset"); + + /* cache this readonly data; minimize chip reads */ + ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); + + ehci->is_tdi_rh_tt = 1; + tdi_reset(ehci); + + ehci_reset(ehci); + + retval = ehci_halt(ehci); + if (retval) + return retval; + + /* data structure init */ + retval = ehci_init(hcd); + if (retval) + return retval; + + temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params); + temp &= 0x0f; + if (temp && HCS_N_PORTS(ehci->hcs_params) > temp) { + ehci_dbg(ehci, "bogus port configuration: " + "cc=%d x pcc=%d < ports=%d\n", + HCS_N_CC(ehci->hcs_params), + HCS_N_PCC(ehci->hcs_params), + HCS_N_PORTS(ehci->hcs_params)); + } + + retval = ehci_msp_reinit(ehci); + + return retval; +} + +/*-------------------------------------------------------------------------*/ + +#ifdef CONFIG_PM +/* suspend/resume, section 4.3 */ + +/* + * These routines rely on the bus glue + * to handle powerdown and wakeup, and currently also on + * transceivers that don't need any software attention to set up + * the right sort of wakeup. + * Also they depend on separate root hub suspend/resume. + */ + +static int ehci_msp_suspend(struct usb_hcd *hcd, pm_message_t message) +{ + struct ehci_hcd *ehci = hcd_to_ehci(hcd); + unsigned long flags; + int rc = 0; + + if (time_before(jiffies, ehci->next_statechange)) + msleep(10); + + /* + * Root hub was already suspended. Disable irq emission and + * mark HW unaccessible, bail out if RH has been resumed. Use + * the spinlock to properly synchronize with possible pending + * RH suspend or resume activity. + * + * This is still racy as hcd->state is manipulated outside of + * any locks =P But that will be a different fix. + */ + spin_lock_irqsave(&ehci->lock, flags); + if (hcd->state != HC_STATE_SUSPENDED) { + rc = -EINVAL; + goto bail; + } + ehci_writel(ehci, 0, &ehci->regs->intr_enable); + (void)ehci_readl(ehci, &ehci->regs->intr_enable); + clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); + + bail: + spin_unlock_irqrestore(&ehci->lock, flags); + + /* + * could save FLADJ in case of Vaux power loss + * ... we'd only use it to handle clock skew + */ + return rc; +} + +static int ehci_msp_resume(struct usb_hcd *hcd) +{ + struct ehci_hcd *ehci = hcd_to_ehci(hcd); + unsigned port; + struct usb_device *root = hcd->self.root_hub; + int retval = -EINVAL; + + /* maybe restore FLADJ */ + + if (time_before(jiffies, ehci->next_statechange)) + msleep(100); + + /* Mark hardware accessible again as we are out of D3 state by now */ + set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); + + /* If CF is clear, we lost PCI Vaux power and need to restart. */ + if (ehci_readl(ehci, &ehci->regs->configured_flag) != FLAG_CF) + goto restart; + + /* + * If any port is suspended (or owned by the companion), + * we know we can/must resume the HC (and mustn't reset it). + * We just defer that to the root hub code. + */ + for (port = HCS_N_PORTS(ehci->hcs_params); port > 0; ) { + u32 status; + port--; + status = ehci_readl(ehci, &ehci->regs->port_status [port]); + if (!(status & PORT_POWER)) + continue; + if (status & (PORT_SUSPEND | PORT_RESUME | PORT_OWNER)) { + usb_hcd_resume_root_hub(hcd); + return 0; + } + } + +restart: + ehci_dbg(ehci, "lost power, restarting\n"); + for (port = HCS_N_PORTS(ehci->hcs_params); port > 0; ) { + port--; + if (!root->children [port]) + continue; + usb_set_device_state(root->children[port], + USB_STATE_NOTATTACHED); + } + + /* + * Else reset, to cope with power loss or flush-to-storage + * style "resume" having let BIOS kick in during reboot. + */ + (void) ehci_halt(ehci); + (void) ehci_reset(ehci); + (void) ehci_msp_reinit(ehci, pdev); + + /* emptying the schedule aborts any urbs */ + spin_lock_irq(&ehci->lock); + if (ehci->reclaim) + ehci->reclaim_ready = 1; + ehci_work(ehci, NULL); + spin_unlock_irq(&ehci->lock); + + /* restart; khubd will disconnect devices */ + retval = ehci_run(hcd); + + /* here we "know" root ports should always stay powered */ + ehci_port_power(ehci, 1); + + return retval; +} +#endif + +/*-------------------------------------------------------------------------*/ + +static void msp_start_hc(struct platform_device *dev) +{ + printk(KERN_DEBUG __FILE__ + ": starting PMC MSP EHCI USB Controller\n"); + + /* + * Now, carefully enable the USB clock, and take + * the USB host controller out of reset. + */ + + printk(KERN_DEBUG __FILE__ + ": Clock to USB host has been enabled \n"); +} + +static void msp_stop_hc(struct platform_device *dev) +{ + printk(KERN_DEBUG __FILE__ + ": stopping PMC MSP EHCI USB Controller\n"); +} + + +/*-------------------------------------------------------------------------*/ + +/* configure so an HC device and id are always provided */ +/* always called with process context; sleeping is OK */ + + +/* + * usb_hcd_msp_probe - initialize PMC MSP-based HCDs + * Context: !in_interrupt() + * + * Allocates basic resources for this USB host controller, and + * then invokes the start() method for the HCD associated with it + * through the hotplug entry's driver_data. + */ +int usb_hcd_msp_probe(const struct hc_driver *driver, + struct platform_device *dev) +{ + int retval; + struct usb_hcd *hcd; + + if (dev->resource[1].flags != IORESOURCE_IRQ) { + pr_debug("resource[1] is not IORESOURCE_IRQ"); + return -ENOMEM; + } + + hcd = usb_create_hcd(driver, &dev->dev, "pmcmsp"); + if (!hcd) + return -ENOMEM; + hcd->rsrc_start = dev->resource[0].start; + hcd->rsrc_len = dev->resource[0].end - dev->resource[0].start + 1; + + if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { + pr_debug("request_mem_region failed"); + retval = -EBUSY; + goto err1; + } + + hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); + if (!hcd->regs) { + pr_debug("ioremap failed"); + retval = -ENOMEM; + goto err2; + } + + msp_start_hc(dev); + + retval = usb_add_hcd(hcd, dev->resource[1].start, 0); + if (retval == 0) + return retval; + + msp_stop_hc(dev); + iounmap(hcd->regs); + + err2: + release_mem_region(hcd->rsrc_start, hcd->rsrc_len); + err1: + usb_put_hcd(hcd); + + return retval; +} + +/* may be called without controller electrically present */ +/* may be called with controller, bus, and devices active */ + +/* + * usb_hcd_msp_remove - shutdown processing for PMC MSP-based HCDs + * @dev: USB Host Controller being removed + * Context: !in_interrupt() + * + * Reverses the effect of usb_hcd_msp_probe(), first invoking + * the HCD's stop() method. It is always called from a thread + * context, normally "rmmod", "apmd", or something similar. + */ +void usb_hcd_msp_remove(struct usb_hcd *hcd, struct platform_device *dev) +{ + usb_remove_hcd(hcd); + msp_stop_hc(dev); + iounmap(hcd->regs); + release_mem_region(hcd->rsrc_start, hcd->rsrc_len); + usb_put_hcd(hcd); +} + +/*-------------------------------------------------------------------------*/ + +static const struct hc_driver ehci_msp_hc_driver = { + .description = hcd_name, + .product_desc = "PMC MSP EHCI", + .hcd_priv_size = sizeof(struct ehci_hcd), + + /* + * generic hardware linkage + */ + .irq = ehci_irq, + .flags = HCD_MEMORY | HCD_USB2, + + /* + * basic lifecycle operations + */ + .reset = ehci_msp_setup, + .start = ehci_run, +#ifdef CONFIG_PM + .suspend = ehci_msp_suspend, + .resume = ehci_msp_resume, +#endif /*CONFIG_PM*/ + .stop = ehci_stop, + + /* + * managing i/o requests and associated device resources + */ + .urb_enqueue = ehci_urb_enqueue, + .urb_dequeue = ehci_urb_dequeue, + .endpoint_disable = ehci_endpoint_disable, + + /* + * scheduling support + */ + .get_frame_number = ehci_get_frame, + + /* + * root hub support + */ + .hub_status_data = ehci_hub_status_data, + .hub_control = ehci_hub_control, +}; + +/*-------------------------------------------------------------------------*/ + +static int ehci_hcd_msp_drv_probe(struct platform_device *pdev) +{ + int ret; + + pr_debug("In ehci_hcd_msp_drv_probe"); + + if (usb_disabled()) + return -ENODEV; + + ret = usb_hcd_msp_probe(&ehci_msp_hc_driver, pdev); + + return ret; +} + +static int ehci_hcd_msp_drv_remove(struct platform_device *pdev) +{ + struct usb_hcd *hcd = platform_get_drvdata(pdev); + + usb_hcd_msp_remove(hcd, pdev); + + return 0; +} + +MODULE_ALIAS("pmcmsp-ehci"); +static struct platform_driver ehci_hcd_msp_driver = { + .probe = ehci_hcd_msp_drv_probe, + .remove = ehci_hcd_msp_drv_remove, + .driver = { + .name = "pmcmsp-ehci", + }, +}; From gregkh@suse.de Tue Jun 5 00:58:02 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 05 Jun 2007 00:58:05 +0100 (BST) Received: from cantor.suse.de ([195.135.220.2]:691 "EHLO mx1.suse.de") by ftp.linux-mips.org with ESMTP id S20026650AbXFDX6C (ORCPT ); Tue, 5 Jun 2007 00:58:02 +0100 Received: from Relay1.suse.de (mail2.suse.de [195.135.221.8]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.suse.de (Postfix) with ESMTP id 5C1C0127B1; Tue, 5 Jun 2007 01:57:53 +0200 (CEST) Date: Mon, 4 Jun 2007 16:35:26 -0700 From: Greg KH To: Marc St-Jean , dbrownell@users.sourceforge.net Cc: akpm@linux-foundation.org, linux-mips@linux-mips.org, linux-usb-devel@lists.sourceforge.net Subject: Re: [PATCH 11/12] drivers: PMC MSP71xx USB driver Message-ID: <20070604233526.GA18567@suse.de> References: <200706042323.l54NNi6e013258@pasqua.pmc-sierra.bc.ca> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <200706042323.l54NNi6e013258@pasqua.pmc-sierra.bc.ca> User-Agent: Mutt/1.5.15 (2007-04-06) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15248 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: gregkh@suse.de Precedence: bulk X-list: linux-mips On Mon, Jun 04, 2007 at 05:23:44PM -0600, Marc St-Jean wrote: > [PATCH 11/12] drivers: PMC MSP71xx USB driver > > Patch to add an USB driver for the PMC-Sierra MSP71xx devices. > > Patches 1 through 10 were posted to linux-mips@linux-mips.org as well > as other sub-system lists/maintainers as appropriate. This patch has > some dependencies on the first few patches in the set. If you would > like to receive these or the entire set, please email me. Note, David Brownell is the USB Gadget maintainer, he should ack this before going into the tree. thanks, greg k-h From hpa@zytor.com Tue Jun 5 01:06:22 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 05 Jun 2007 01:06:27 +0100 (BST) Received: from terminus.zytor.com ([192.83.249.54]:18392 "EHLO terminus.zytor.com") by ftp.linux-mips.org with ESMTP id S20026674AbXFEAGW (ORCPT ); Tue, 5 Jun 2007 01:06:22 +0100 Received: from tazenda.hos.anvin.org (c-67-169-144-158.hsd1.ca.comcast.net [67.169.144.158]) (authenticated bits=0) by terminus.zytor.com (8.13.8/8.13.8) with ESMTP id l5504C0L008097 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Mon, 4 Jun 2007 17:04:13 -0700 Message-ID: <4664A87C.5040609@zytor.com> Date: Mon, 04 Jun 2007 17:04:12 -0700 From: "H. Peter Anvin" User-Agent: Thunderbird 2.0.0.0 (X11/20070419) MIME-Version: 1.0 To: David Miller CC: joseph@codesourcery.com, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, linux-arch@vger.kernel.org Subject: Re: 64-bit syscall ABI issue References: <20070604.142557.68139332.davem@davemloft.net> In-Reply-To: <20070604.142557.68139332.davem@davemloft.net> X-Enigmail-Version: 0.95.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-Virus-Scanned: ClamAV 0.88.7/3351/Mon Jun 4 15:52:05 2007 on terminus.zytor.com X-Virus-Status: Clean Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15249 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hpa@zytor.com Precedence: bulk X-list: linux-mips David Miller wrote: > From: "Joseph S. Myers" > Date: Mon, 4 Jun 2007 20:56:57 +0000 (UTC) > > [ added linux-arch which is a great place to discuss these > kinds of issues. ] > >> What should the kernel syscall ABI be in such cases (any case where the >> syscall implementations expect arguments narrower than registers, so >> mainly 32-bit arguments on 64-bit platforms)? There are two obvious >> possibilities: > > In general we've taken the stance that the syscall dispatch > should create the proper calling environment for C code > implementing the system calls, and this thus means properly > sign and zero extending the arguments as expected by the C > calling convention. This is, in fact, rather fundamental (some ABIs don't require sign or zero extension, e.g. x86-64); otherwise libc's job becomes a whole lot harder. -hpa From Marc_St-Jean@pmc-sierra.com Tue Jun 5 01:08:12 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 05 Jun 2007 01:08:14 +0100 (BST) Received: from father.pmc-sierra.com ([216.241.224.13]:52872 "HELO father.pmc-sierra.bc.ca") by ftp.linux-mips.org with SMTP id S20026652AbXFEAIM (ORCPT ); Tue, 5 Jun 2007 01:08:12 +0100 Received: (qmail 26809 invoked by uid 101); 5 Jun 2007 00:08:05 -0000 Received: from unknown (HELO pmxedge1.pmc-sierra.bc.ca) (216.241.226.183) by father.pmc-sierra.com with SMTP; 5 Jun 2007 00:08:05 -0000 Received: from bby1exi01.pmc_nt.nt.pmc-sierra.bc.ca (bby1exi01.pmc-sierra.bc.ca [216.241.231.251]) by pmxedge1.pmc-sierra.bc.ca (8.13.4/8.12.7) with ESMTP id l55080Nm031360; Mon, 4 Jun 2007 17:08:00 -0700 Received: by bby1exi01.pmc-sierra.bc.ca with Internet Mail Service (5.5.2657.72) id ; Mon, 4 Jun 2007 17:08:00 -0700 Message-ID: <4664A958.2030508@pmc-sierra.com> From: Marc St-Jean To: Greg KH Cc: Marc St-Jean , dbrownell@users.sourceforge.net, akpm@linux-foundation.org, linux-mips@linux-mips.org, linux-usb-devel@lists.sourceforge.net Subject: Re: [PATCH 11/12] drivers: PMC MSP71xx USB driver Date: Mon, 4 Jun 2007 17:07:52 -0700 MIME-Version: 1.0 X-Mailer: Internet Mail Service (5.5.2657.72) x-originalarrivaltime: 05 Jun 2007 00:07:53.0523 (UTC) FILETIME=[8FF52030:01C7A705] user-agent: Thunderbird 1.5.0.12 (X11/20070509) Content-Type: text/plain; charset="iso-8859-1" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15250 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: Marc_St-Jean@pmc-sierra.com Precedence: bulk X-list: linux-mips Greg KH wrote: > On Mon, Jun 04, 2007 at 05:23:44PM -0600, Marc St-Jean wrote: > > [PATCH 11/12] drivers: PMC MSP71xx USB driver > > > > Patch to add an USB driver for the PMC-Sierra MSP71xx devices. > > > > Patches 1 through 10 were posted to linux-mips@linux-mips.org as well > > as other sub-system lists/maintainers as appropriate. This patch has > > some dependencies on the first few patches in the set. If you would > > like to receive these or the entire set, please email me. > > Note, David Brownell is the USB Gadget maintainer, he should ack this > before going into the tree. > > thanks, > > greg k-h I'll send it to him separately for now and add to the CC list next time. Thanks, Marc From kumba@gentoo.org Tue Jun 5 04:40:10 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 05 Jun 2007 04:40:13 +0100 (BST) Received: from alnrmhc11.comcast.net ([204.127.225.91]:30870 "EHLO alnrmhc11.comcast.net") by ftp.linux-mips.org with ESMTP id S20021445AbXFEDkK (ORCPT ); Tue, 5 Jun 2007 04:40:10 +0100 Received: from [192.168.1.4] (c-76-106-119-205.hsd1.md.comcast.net[76.106.119.205]) by comcast.net (alnrmhc11) with ESMTP id <20070605034003b1100g9f56e>; Tue, 5 Jun 2007 03:40:03 +0000 Message-ID: <4664DB12.80906@gentoo.org> Date: Mon, 04 Jun 2007 23:40:02 -0400 From: Kumba User-Agent: Thunderbird 2.0.0.0 (Windows/20070326) MIME-Version: 1.0 To: Ralf Baechle CC: linux-mips@linux-mips.org Subject: Re: Mailing patches References: <20070604133551.GA24405@linux-mips.org> In-Reply-To: <20070604133551.GA24405@linux-mips.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15251 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kumba@gentoo.org Precedence: bulk X-list: linux-mips Ralf Baechle wrote: > I've updated the wiki page on the mechanics of how to mail patches to > cover more modern versions of thunderbird or similar: > > http://www.linux-mips.org/wiki/Mailing-patches > > I'm not a Thunderbird (or Evolution) user myself, so I'd appreciate > proofreading and comments. > > Ralf What about just attaching the patches to a message? Seems like it'll avoid most of the problems Tbird has with them. I'm just not sure if that hampers importing them into git or not. --Kumba -- Gentoo/MIPS Team Lead "Such is oft the course of deeds that move the wheels of the world: small hands do them because they must, while the eyes of the great are elsewhere." --Elrond From kumba@gentoo.org Tue Jun 5 04:55:20 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 05 Jun 2007 04:55:25 +0100 (BST) Received: from sccrmhc15.comcast.net ([63.240.77.85]:136 "EHLO sccrmhc15.comcast.net") by ftp.linux-mips.org with ESMTP id S20021747AbXFEDzT (ORCPT ); Tue, 5 Jun 2007 04:55:19 +0100 Received: from [192.168.1.4] (c-76-106-119-205.hsd1.md.comcast.net[76.106.119.205]) by comcast.net (sccrmhc15) with ESMTP id <2007060503543601500ceea2e>; Tue, 5 Jun 2007 03:54:36 +0000 Message-ID: <4664DE7B.6070701@gentoo.org> Date: Mon, 04 Jun 2007 23:54:35 -0400 From: Kumba User-Agent: Thunderbird 2.0.0.0 (Windows/20070326) MIME-Version: 1.0 To: Ralf Baechle CC: linux-mips@linux-mips.org Subject: Re: Mailing patches References: <20070604133551.GA24405@linux-mips.org> <4664DB12.80906@gentoo.org> In-Reply-To: <4664DB12.80906@gentoo.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15252 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kumba@gentoo.org Precedence: bulk X-list: linux-mips Kumba wrote: > > What about just attaching the patches to a message? Seems like it'll > avoid most of the problems Tbird has with them. I'm just not sure if > that hampers importing them into git or not. > > > --Kumba Deeerrr... > 6) No MIME, no links, no compression, no attachments. Just plain text. # dd if=/dev/coffee of=/proc/self/root cpc=135 count=2 2+0 cups in 2+0 cups out 270 milligrams (0.2 g) drank, 0 s, Infinity C/s --Kumba -- Gentoo/MIPS Team Lead "Such is oft the course of deeds that move the wheels of the world: small hands do them because they must, while the eyes of the great are elsewhere." --Elrond From vksavl@gmail.com Tue Jun 5 10:43:01 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 05 Jun 2007 10:43:04 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.168]:29996 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S20021765AbXFEJnB (ORCPT ); Tue, 5 Jun 2007 10:43:01 +0100 Received: by ug-out-1314.google.com with SMTP id m3so127159ugc for ; Tue, 05 Jun 2007 02:42:00 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:date:from:x-mailer:reply-to:x-priority:message-id:to:subject:mime-version:content-type; b=XC7CMK5pd6IYW7lHPvaj/rTOG+Rj5RkCR0hGJuc1qYkm9BTaGsSaDzPTA7ecg7OQwGi2M8r+AiiDi7LOJto1ncAEim4S7ohTHZxTsSKwBPSmX8koIE+kbsB2qngeBkUXBj+gQa1D7eMpGGNravsQk5IU8EB/FhAFtALjfwB4yK4= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:date:from:x-mailer:reply-to:x-priority:message-id:to:subject:mime-version:content-type; b=UPNrzo9qArqP7mjgRIzZ4P3/qXZh6Jn/qgy9rQdPuDFLmrK1OHeL4ZpQrdES0R7HBmimgAqF+KMicTLQi3QU8psizA4lZkUWcMR9knbznvQLXGPn+eAylwdZGYbESjkfkJbfniWIJT0RxdTiZpD7DUKX6NoYT4gELUlyINPYVOU= Received: by 10.78.170.6 with SMTP id s6mr2338779hue.1181036520671; Tue, 05 Jun 2007 02:42:00 -0700 (PDT) Received: from PAVEL-57E50373D ( [85.141.175.237]) by mx.google.com with ESMTP id 34sm515066nfu.2007.06.05.02.41.58; Tue, 05 Jun 2007 02:41:59 -0700 (PDT) Date: Tue, 5 Jun 2007 13:42:20 +0400 From: Pavel Kiryukhin X-Mailer: The Bat! (v3.80.06) Professional Reply-To: Pavel Kiryukhin X-Priority: 3 (Normal) Message-ID: <97136920.20070605134220@gmail.com> To: linux-mips@linux-mips.org Subject: use compat_siginfo in rt_sigframe_n32 MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----------671721163521A93E" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15253 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vksavl@gmail.com Precedence: bulk X-list: linux-mips ------------671721163521A93E Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit There was an old patch that suggested (also) to use compat_siginfo in rt_sigframe_n32. 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bik7CiAKIAkvKiBDcmVhdGUgc2lnaW5mby4gICovCi0JZXJyIHw9IGNvcHlfc2lnaW5mb190 b191c2VyKCZmcmFtZS0+cnNfaW5mbywgaW5mbyk7CisJZXJyIHw9IGNvcHlfc2lnaW5mb190 b191c2VyMzIoJmZyYW1lLT5yc19pbmZvLCBpbmZvKTsKIAogCS8qIENyZWF0ZSB0aGUgdWNv bnRleHQuICAqLwogCWVyciB8PSBfX3B1dF91c2VyKDAsICZmcmFtZS0+cnNfdWMudWNfZmxh Z3MpOwotLSAKMS41LjIuMQoK ------------671721163521A93E-- From macro@linux-mips.org Tue Jun 5 11:45:44 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 05 Jun 2007 11:45:46 +0100 (BST) Received: from pollux.ds.pg.gda.pl ([153.19.208.7]:18450 "EHLO pollux.ds.pg.gda.pl") by ftp.linux-mips.org with ESMTP id S20021841AbXFEKpo (ORCPT ); Tue, 5 Jun 2007 11:45:44 +0100 Received: from localhost (localhost [127.0.0.1]) by pollux.ds.pg.gda.pl (Postfix) with ESMTP id 10898E1CA8; Tue, 5 Jun 2007 12:45:05 +0200 (CEST) X-Virus-Scanned: by amavisd-new at pollux.ds.pg.gda.pl Received: from pollux.ds.pg.gda.pl ([127.0.0.1]) by localhost (pollux.ds.pg.gda.pl [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id hI1TMtaqXzhs; Tue, 5 Jun 2007 12:45:04 +0200 (CEST) Received: from piorun.ds.pg.gda.pl (piorun.ds.pg.gda.pl [153.19.208.8]) by pollux.ds.pg.gda.pl (Postfix) with ESMTP id 35E67E1C6F; Tue, 5 Jun 2007 12:45:03 +0200 (CEST) Received: from blysk.ds.pg.gda.pl (macro@blysk.ds.pg.gda.pl [153.19.208.6]) by piorun.ds.pg.gda.pl (8.13.8/8.13.8) with ESMTP id l55AjAMY028600; Tue, 5 Jun 2007 12:45:10 +0200 Date: Tue, 5 Jun 2007 11:45:07 +0100 (BST) From: "Maciej W. Rozycki" To: Ralf Baechle cc: linux-mips@linux-mips.org Subject: [PATCH] DECstation: Optimised early printk() Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Virus-Scanned: ClamAV 0.90.3/3360/Tue Jun 5 06:32:46 2007 on piorun.ds.pg.gda.pl X-Virus-Status: Clean Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15254 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@linux-mips.org Precedence: bulk X-list: linux-mips This is an optimised implementation of early printk() for the DECstation. After the recent conversion to a MIPS-specific generic routine using a character-by-character output the performance dropped significantly. This change reverts to the previous speed -- even at 9600 bps of the serial console the difference is visible with a naked eye; I presume for a framebuffer it is even worse (it may depend on exactly which one is used though). Additionally the change includes a fix for a problem that the old implementation had -- the format used would not actually limit the length of the string output. This new implementation uses a local buffer to deal with it -- even with this additional copying it is much faster than the generic function. Plus this driver is registered much earlier than the generic one, allowing one to see critical messages, such as one about an incorrect CPU setting used, that are produced beforehand. :-) Signed-off-by: Maciej W. Rozycki --- Hi, As a side note, the SYS_HAS_EARLY_PRINTK option could probably be called SYS_HAS_GENERIC_EARLY_PRINTK or something... Note this patch depends on "patch-mips-2.6.21-20070502-dec-no_ioport-0"; please let me know if you want them to be applied in the other order. Please apply, Maciej patch-mips-2.6.21-20070502-dec-prom-console-3 diff -up --recursive --new-file linux-mips-2.6.21-20070502.macro/arch/mips/Kconfig linux-mips-2.6.21-20070502/arch/mips/Kconfig --- linux-mips-2.6.21-20070502.macro/arch/mips/Kconfig 2007-05-27 22:19:35.000000000 +0000 +++ linux-mips-2.6.21-20070502/arch/mips/Kconfig 2007-06-04 22:59:11.000000000 +0000 @@ -178,7 +178,6 @@ config MACH_DECSTATION select BOOT_ELF32 select DMA_NONCOHERENT select NO_IOPORT - select SYS_HAS_EARLY_PRINTK select IRQ_CPU select SYS_HAS_CPU_R3000 select SYS_HAS_CPU_R4X00 diff -up --recursive --new-file linux-mips-2.6.21-20070502.macro/arch/mips/dec/prom/console.c linux-mips-2.6.21-20070502/arch/mips/dec/prom/console.c --- linux-mips-2.6.21-20070502.macro/arch/mips/dec/prom/console.c 2007-05-02 04:55:33.000000000 +0000 +++ linux-mips-2.6.21-20070502/arch/mips/dec/prom/console.c 2007-06-04 22:38:34.000000000 +0000 @@ -3,7 +3,7 @@ * * DECstation PROM-based early console support. * - * Copyright (C) 2004 Maciej W. Rozycki + * Copyright (C) 2004, 2007 Maciej W. Rozycki * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -13,15 +13,35 @@ #include #include #include +#include #include -void prom_putchar(char c) +static void __init prom_console_write(struct console *con, const char *s, + unsigned int c) { - char s[2]; + char buf[81]; + unsigned int chunk = sizeof(buf) - 1; - s[0] = c; - s[1] = '\0'; + while (c > 0) { + if (chunk > c) + chunk = c; + memcpy(buf, s, chunk); + buf[chunk] = '\0'; + prom_printf("%s", buf); + s += chunk; + c -= chunk; + } +} + +static struct console promcons __initdata = { + .name = "prom", + .write = prom_console_write, + .flags = CON_BOOT | CON_PRINTBUFFER, + .index = -1, +}; - prom_printf( s); +void __init register_prom_console(void) +{ + register_console(&promcons); } diff -up --recursive --new-file linux-mips-2.6.21-20070502.macro/arch/mips/dec/prom/init.c linux-mips-2.6.21-20070502/arch/mips/dec/prom/init.c --- linux-mips-2.6.21-20070502.macro/arch/mips/dec/prom/init.c 2007-05-02 04:55:33.000000000 +0000 +++ linux-mips-2.6.21-20070502/arch/mips/dec/prom/init.c 2007-06-04 22:42:39.000000000 +0000 @@ -103,6 +103,9 @@ void __init prom_init(void) if (prom_is_rex(magic)) rex_clear_cache(); + /* Register the early console. */ + register_prom_console(); + /* Were we compiled with the right CPU option? */ #if defined(CONFIG_CPU_R3000) if ((current_cpu_data.cputype == CPU_R4000SC) || From ralf@linux-mips.org Tue Jun 5 16:28:38 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 05 Jun 2007 16:28:40 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:22982 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20021620AbXFEP2i (ORCPT ); Tue, 5 Jun 2007 16:28:38 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l55FNdFU030384; Tue, 5 Jun 2007 16:23:40 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l55FNc3E030383; Tue, 5 Jun 2007 16:23:39 +0100 Date: Tue, 5 Jun 2007 16:23:38 +0100 From: Ralf Baechle To: Kumba Cc: linux-mips@linux-mips.org Subject: Re: Mailing patches Message-ID: <20070605152338.GA22937@linux-mips.org> References: <20070604133551.GA24405@linux-mips.org> <4664DB12.80906@gentoo.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4664DB12.80906@gentoo.org> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15255 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Mon, Jun 04, 2007 at 11:40:02PM -0400, Kumba wrote: > What about just attaching the patches to a message? Seems like it'll avoid > most of the problems Tbird has with them. I'm just not sure if that > hampers importing them into git or not. There are issues if people have the log message in the attachment as well. And of course there is still the prime reason why attachments are a no-no - most mailers won't quote them so commenting on them is hard when discussing things. Git has some limited abilities to handle MIME messages since quite a while though. But quilt which is the heart of how I manage the queue tree doesn't. Ralf From ralf@linux-mips.org Tue Jun 5 16:30:57 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 05 Jun 2007 16:30:59 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:25798 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20021678AbXFEPa5 (ORCPT ); Tue, 5 Jun 2007 16:30:57 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l55FO6Z2030649; Tue, 5 Jun 2007 16:24:06 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l55FO68k030648; Tue, 5 Jun 2007 16:24:06 +0100 Date: Tue, 5 Jun 2007 16:24:06 +0100 From: Ralf Baechle To: Kumba Cc: linux-mips@linux-mips.org Subject: Re: Mailing patches Message-ID: <20070605152406.GB22937@linux-mips.org> References: <20070604133551.GA24405@linux-mips.org> <4664DB12.80906@gentoo.org> <4664DE7B.6070701@gentoo.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4664DE7B.6070701@gentoo.org> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15256 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Mon, Jun 04, 2007 at 11:54:35PM -0400, Kumba wrote: > # dd if=/dev/coffee of=/proc/self/root cpc=135 count=2 > 2+0 cups in > 2+0 cups out > 270 milligrams (0.2 g) drank, 0 s, Infinity C/s Good idea :-) Ralf From stern@rowland.harvard.edu Tue Jun 5 22:12:43 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 05 Jun 2007 22:12:47 +0100 (BST) Received: from iolanthe.rowland.org ([192.131.102.54]:65465 "HELO iolanthe.rowland.org") by ftp.linux-mips.org with SMTP id S20021863AbXFEVMm (ORCPT ); Tue, 5 Jun 2007 22:12:42 +0100 Received: (qmail 4007 invoked by uid 2102); 5 Jun 2007 17:12:35 -0400 Received: from localhost (sendmail-bs@127.0.0.1) by localhost with SMTP; 5 Jun 2007 17:12:35 -0400 Date: Tue, 5 Jun 2007 17:12:35 -0400 (EDT) From: Alan Stern X-X-Sender: stern@iolanthe.rowland.org To: Marc St-Jean cc: gregkh@suse.de, , , Subject: Re: [linux-usb-devel] [PATCH 11/12] drivers: PMC MSP71xx USB driver In-Reply-To: <200706042323.l54NNi6e013258@pasqua.pmc-sierra.bc.ca> Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15257 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: stern@rowland.harvard.edu Precedence: bulk X-list: linux-mips On Mon, 4 Jun 2007, Marc St-Jean wrote: > [PATCH 11/12] drivers: PMC MSP71xx USB driver > > Patch to add an USB driver for the PMC-Sierra MSP71xx devices. > > Patches 1 through 10 were posted to linux-mips@linux-mips.org as well > as other sub-system lists/maintainers as appropriate. This patch has > some dependencies on the first few patches in the set. If you would > like to receive these or the entire set, please email me. My personal impressions: This does far too much to be a single patch. It needs to be broken up. The change to hub.c looks more complicated than necessary. You ought to be able to share more of the code. Turning off power to the overcurrent port would probably be okay for any hub. The changes to file_storage.c and other gadget drivers look completely unnecessary. You're apparently trying to disallow 0-length transfers on endpoint 0. For one thing, that's liable to break some protocols. For another, it would be better to make the test at one place, in your controller driver, instead of spread out among multiple gadget drivers. Alan Stern From david-b@pacbell.net Tue Jun 5 23:29:27 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 05 Jun 2007 23:29:29 +0100 (BST) Received: from smtp109.sbc.mail.mud.yahoo.com ([68.142.198.208]:36502 "HELO smtp109.sbc.mail.mud.yahoo.com") by ftp.linux-mips.org with SMTP id S20021917AbXFEW31 (ORCPT ); Tue, 5 Jun 2007 23:29:27 +0100 Received: (qmail 37580 invoked from network); 5 Jun 2007 22:29:18 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=s1024; d=pacbell.net; h=Received:X-YMail-OSG:Received:Date:From:To:Subject:Cc:References:In-Reply-To:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id; b=UOCXJCTFAVBpcAnmYnvJnzuFfOkeCIEDyxlZrnifeqGNh+V1uxs26qqc5owx25cNQ4Ss3cU8jwWLu1T1vqGkQCpTjHMXYdaD1uCLyTobr0PmJ6FWDE2j2aqcvuZ1l+pjbzpwA7VuppWvoYx4XxD0ugvMMBJ9TR+WacaYfr1RMk4= ; Received: from unknown (HELO adsl-69-226-248-13.dsl.pltn13.pacbell.net) (david-b@pacbell.net@69.226.212.132 with login) by smtp109.sbc.mail.mud.yahoo.com with SMTP; 5 Jun 2007 22:29:18 -0000 X-YMail-OSG: AtTQ7CUVM1lNabwFvJm1ZisN0mUCrvaVSmfX34xcIG3AXXxzwMjaZMn2KjvRB0Kpd6dTlWOEnw-- Received: by adsl-69-226-248-13.dsl.pltn13.pacbell.net (Postfix, from userid 500) id B61BD230C66; Tue, 5 Jun 2007 15:28:53 -0700 (PDT) Date: Tue, 05 Jun 2007 15:28:53 -0700 From: David Brownell To: stjeanma@pmc-sierra.com, stern@rowland.harvard.edu Subject: Re: [linux-usb-devel] [PATCH 11/12] drivers: PMC MSP71xx USB driver Cc: linux-usb-devel@lists.sourceforge.net, linux-mips@linux-mips.org, gregkh@suse.de, akpm@linux-foundation.org References: In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Message-Id: <20070605222853.B61BD230C66@adsl-69-226-248-13.dsl.pltn13.pacbell.net> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15258 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: david-b@pacbell.net Precedence: bulk X-list: linux-mips > This does far too much to be a single patch. It needs to be broken up. Agreed. 300+ KB is not digestible at all. Most maintainers like to see patches on the order of 10 KB; that much is easy to review. New drivers are rarely that small of course, but that should give you some understanding of just how excessive this is... But the fact that this one "driver" patch touched so many other files outside its own directory is a dead giveaway that it's got something pretty wrong... - Dave From Marc_St-Jean@pmc-sierra.com Wed Jun 6 01:47:27 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 01:47:29 +0100 (BST) Received: from father.pmc-sierra.com ([216.241.224.13]:56530 "HELO father.pmc-sierra.bc.ca") by ftp.linux-mips.org with SMTP id S20021971AbXFFAr1 (ORCPT ); Wed, 6 Jun 2007 01:47:27 +0100 Received: (qmail 29958 invoked by uid 101); 6 Jun 2007 00:47:19 -0000 Received: from unknown (HELO pmxedge1.pmc-sierra.bc.ca) (216.241.226.183) by father.pmc-sierra.com with SMTP; 6 Jun 2007 00:47:19 -0000 Received: from bby1exi01.pmc_nt.nt.pmc-sierra.bc.ca (bby1exi01.pmc-sierra.bc.ca [216.241.231.251]) by pmxedge1.pmc-sierra.bc.ca (8.13.4/8.12.7) with ESMTP id l560lF9N024091; Tue, 5 Jun 2007 17:47:15 -0700 Received: by bby1exi01.pmc-sierra.bc.ca with Internet Mail Service (5.5.2657.72) id ; Tue, 5 Jun 2007 17:47:15 -0700 Message-ID: <46660410.3070703@pmc-sierra.com> From: Marc St-Jean To: Alan Stern Cc: david-b@pacbell.net, gregkh@suse.de, linux-mips@linux-mips.org, akpm@linux-foundation.org, linux-usb-devel@lists.sourceforge.net Subject: Re: [linux-usb-devel] [PATCH 11/12] drivers: PMC MSP71xx USB driv er Date: Tue, 5 Jun 2007 17:47:12 -0700 MIME-Version: 1.0 X-Mailer: Internet Mail Service (5.5.2657.72) x-originalarrivaltime: 06 Jun 2007 00:47:12.0587 (UTC) FILETIME=[387B79B0:01C7A7D4] user-agent: Thunderbird 1.5.0.12 (X11/20070509) Content-Type: text/plain; charset="iso-8859-1" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15259 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: Marc_St-Jean@pmc-sierra.com Precedence: bulk X-list: linux-mips Alan Stern wrote: > On Mon, 4 Jun 2007, Marc St-Jean wrote: > > > [PATCH 11/12] drivers: PMC MSP71xx USB driver > > > > Patch to add an USB driver for the PMC-Sierra MSP71xx devices. > > > > Patches 1 through 10 were posted to linux-mips@linux-mips.org as well > > as other sub-system lists/maintainers as appropriate. This patch has > > some dependencies on the first few patches in the set. If you would > > like to receive these or the entire set, please email me. > > My personal impressions: > > This does far too much to be a single patch. It needs to be broken up. > > The change to hub.c looks more complicated than necessary. You ought > to be able to share more of the code. Turning off power to the > overcurrent port would probably be okay for any hub. > > The changes to file_storage.c and other gadget drivers look completely > unnecessary. You're apparently trying to disallow 0-length transfers > on endpoint 0. For one thing, that's liable to break some protocols. > For another, it would be better to make the test at one place, in your > controller driver, instead of spread out among multiple gadget drivers. > > Alan Stern Thanks to everyone that provided feedback. I'll be resubmitting the host code only and will resume with gadget once the host is accepted. The host only patch is still ~50k but that's mostly due to all the le32 -> ehci32 conversion in order to support the big endian controller. The actual platform driver code is small. Marc From stjeanma@pmc-sierra.com Wed Jun 6 01:49:10 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 01:49:14 +0100 (BST) Received: from mother.pmc-sierra.com ([216.241.224.12]:39889 "HELO mother.pmc-sierra.bc.ca") by ftp.linux-mips.org with SMTP id S20022005AbXFFAtK (ORCPT ); Wed, 6 Jun 2007 01:49:10 +0100 Received: (qmail 29051 invoked by uid 101); 6 Jun 2007 00:49:03 -0000 Received: from unknown (HELO pmxedge1.pmc-sierra.bc.ca) (216.241.226.183) by mother.pmc-sierra.com with SMTP; 6 Jun 2007 00:49:03 -0000 Received: from pasqua.pmc-sierra.bc.ca (pasqua.pmc-sierra.bc.ca [134.87.183.161]) by pmxedge1.pmc-sierra.bc.ca (8.13.4/8.12.7) with ESMTP id l560n22R024713; Tue, 5 Jun 2007 17:49:02 -0700 From: Marc St-Jean Received: (from stjeanma@localhost) by pasqua.pmc-sierra.bc.ca (8.13.4/8.12.11) id l560moU4007288; Tue, 5 Jun 2007 18:48:50 -0600 Date: Tue, 5 Jun 2007 18:48:50 -0600 Message-Id: <200706060048.l560moU4007288@pasqua.pmc-sierra.bc.ca> To: gregkh@suse.de Subject: [PATCH 11/12] drivers: PMC MSP71xx USB driver Cc: akpm@linux-foundation.org, dbrownell@users.sourceforge.net, linux-mips@linux-mips.org, linux-usb-devel@lists.sourceforge.net Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15260 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: stjeanma@pmc-sierra.com Precedence: bulk X-list: linux-mips [PATCH 11/12] drivers: PMC MSP71xx USB driver Patch to add an USB driver for the PMC-Sierra MSP71xx devices. Patches 1 through 10 were posted to linux-mips@linux-mips.org as well as other sub-system lists/maintainers as appropriate. This patch has some dependencies on the first few patches in the set. If you would like to receive these or the entire set, please email me. Thanks, Marc Signed-off-by: Marc St-Jean --- Re-posting patch with recommended changes: - Dropping gadget code until host patch accepted. - Changed overcurrent fixes in host/hub.c and ehci-hub.c to apply to all hubs. Kconfig | 1 core/hub.c | 27 ++- host/Kconfig | 32 +++ host/ehci-dbg.c | 92 +++++------ host/ehci-hcd.c | 18 +- host/ehci-hub.c | 6 host/ehci-mem.c | 6 host/ehci-pmcmsp.c | 434 +++++++++++++++++++++++++++++++++++++++++++++++++++++ host/ehci-q.c | 48 ++--- host/ehci-sched.c | 105 ++++++------ host/ehci.h | 204 ++++++++++++++++++++---- 11 files changed, 806 insertions(+), 167 deletions(-) diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index 9980a4d..bb97a0b 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -37,6 +37,7 @@ config USB_ARCH_HAS_OHCI # some non-PCI hcds implement EHCI config USB_ARCH_HAS_EHCI boolean + default y if PMC_MSP7120_GW || PMC_MSP7120_EVAL || PMC_MSP7120_FPGA default y if PPC_83xx default y if SOC_AU1200 default PCI diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c index b89a98e..e93399c 100644 --- a/drivers/usb/core/hub.c +++ b/drivers/usb/core/hub.c @@ -2749,12 +2749,33 @@ static void hub_events(void) } if (portchange & USB_PORT_STAT_C_OVERCURRENT) { - dev_err (hub_dev, - "over-current change on port %d\n", - i); + /* clear OCC bit */ clear_port_feature(hdev, i, USB_PORT_FEAT_C_OVER_CURRENT); + + /* + * This step is required to toggle the + * PP bit to 0 and 1 (by hub_power_on) + * in order the CSC bit to be transitioned + * properly for device hotplug. + */ + /* clear PP bit */ + clear_port_feature(hdev, i, + USB_PORT_FEAT_POWER); + + /* resume power */ hub_power_on(hub); + + udelay(100); + + /* read OCA bit */ + if (portstatus & + (1 << USB_PORT_FEAT_OVER_CURRENT)) { + /* declare overcurrent */ + dev_err(hub_dev, + "over-current change " + "on port %d\n", i); + } } if (portchange & USB_PORT_STAT_C_RESET) { diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 6271187..902e059 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -72,6 +72,38 @@ config USB_EHCI_BIG_ENDIAN_MMIO depends on USB_EHCI_HCD default n +config USB_EHCI_HCD_PMC_MSP + bool "EHCI support for on-chip PMC MSP USB controller" + depends on USB_EHCI_HCD && (PMC_MSP7120_GW || PMC_MSP7120_EVAL || \ + PMC_MSP7120_FPGA) + default y if (PMC_MSP7120_GW || PMC_MSP7120_EVAL || PMC_MSP7120_FPGA) + select USB_EHCI_BIG_ENDIAN + select USB_EHCI_BIG_ENDIAN_MMIO + ---help--- + Enables support for the onchip USB controller on the PMC_MSP7120_GW + or PMC_MSP7120_EVAL or PMC_MSP7120_FPGA processor chip. + If unsure, say N. + +config USB_EHCI_HCD_PCI + bool "EHCI support for PCI-bus USB controllers" + depends on USB_EHCI_HCD && PCI && !USB_EHCI_HCD_PMC_MSP + default n if USB_EHCI_HCD_PMC_MSP + select USB_EHCI_LITTLE_ENDIAN + ---help--- + Enables support for PCI-bus plug-in USB controller cards. + If unsure, say Y. + +config USB_EHCI_BIG_ENDIAN + bool + depends on USB_EHCI_HCD + default n + +config USB_EHCI_LITTLE_ENDIAN + bool + depends on USB_EHCI_HCD + default n if USB_EHCI_HCD_PMC_MSP + default y + config USB_ISP116X_HCD tristate "ISP116X HCD support" depends on USB diff --git a/drivers/usb/host/ehci-dbg.c b/drivers/usb/host/ehci-dbg.c index 43eddae..68f8868 100644 --- a/drivers/usb/host/ehci-dbg.c +++ b/drivers/usb/host/ehci-dbg.c @@ -119,16 +119,16 @@ static void __attribute__((__unused__)) dbg_qtd (const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd) { ehci_dbg (ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd, - le32_to_cpup (&qtd->hw_next), - le32_to_cpup (&qtd->hw_alt_next), - le32_to_cpup (&qtd->hw_token), - le32_to_cpup (&qtd->hw_buf [0])); + ehci32_to_cpup (&qtd->hw_next), + ehci32_to_cpup (&qtd->hw_alt_next), + ehci32_to_cpup (&qtd->hw_token), + ehci32_to_cpup (&qtd->hw_buf [0])); if (qtd->hw_buf [1]) ehci_dbg (ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n", - le32_to_cpup (&qtd->hw_buf [1]), - le32_to_cpup (&qtd->hw_buf [2]), - le32_to_cpup (&qtd->hw_buf [3]), - le32_to_cpup (&qtd->hw_buf [4])); + ehci32_to_cpup (&qtd->hw_buf [1]), + ehci32_to_cpup (&qtd->hw_buf [2]), + ehci32_to_cpup (&qtd->hw_buf [3]), + ehci32_to_cpup (&qtd->hw_buf [4])); } static void __attribute__((__unused__)) @@ -144,26 +144,27 @@ static void __attribute__((__unused__)) dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd) { ehci_dbg (ehci, "%s [%d] itd %p, next %08x, urb %p\n", - label, itd->frame, itd, le32_to_cpu(itd->hw_next), itd->urb); + label, itd->frame, itd, ehci32_to_cpu(itd->hw_next), + itd->urb); ehci_dbg (ehci, " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n", - le32_to_cpu(itd->hw_transaction[0]), - le32_to_cpu(itd->hw_transaction[1]), - le32_to_cpu(itd->hw_transaction[2]), - le32_to_cpu(itd->hw_transaction[3]), - le32_to_cpu(itd->hw_transaction[4]), - le32_to_cpu(itd->hw_transaction[5]), - le32_to_cpu(itd->hw_transaction[6]), - le32_to_cpu(itd->hw_transaction[7])); + ehci32_to_cpu(itd->hw_transaction[0]), + ehci32_to_cpu(itd->hw_transaction[1]), + ehci32_to_cpu(itd->hw_transaction[2]), + ehci32_to_cpu(itd->hw_transaction[3]), + ehci32_to_cpu(itd->hw_transaction[4]), + ehci32_to_cpu(itd->hw_transaction[5]), + ehci32_to_cpu(itd->hw_transaction[6]), + ehci32_to_cpu(itd->hw_transaction[7])); ehci_dbg (ehci, " buf: %08x %08x %08x %08x %08x %08x %08x\n", - le32_to_cpu(itd->hw_bufp[0]), - le32_to_cpu(itd->hw_bufp[1]), - le32_to_cpu(itd->hw_bufp[2]), - le32_to_cpu(itd->hw_bufp[3]), - le32_to_cpu(itd->hw_bufp[4]), - le32_to_cpu(itd->hw_bufp[5]), - le32_to_cpu(itd->hw_bufp[6])); + ehci32_to_cpu(itd->hw_bufp[0]), + ehci32_to_cpu(itd->hw_bufp[1]), + ehci32_to_cpu(itd->hw_bufp[2]), + ehci32_to_cpu(itd->hw_bufp[3]), + ehci32_to_cpu(itd->hw_bufp[4]), + ehci32_to_cpu(itd->hw_bufp[5]), + ehci32_to_cpu(itd->hw_bufp[6])); ehci_dbg (ehci, " index: %d %d %d %d %d %d %d %d\n", itd->index[0], itd->index[1], itd->index[2], itd->index[3], itd->index[4], itd->index[5], @@ -174,14 +175,15 @@ static void __attribute__((__unused__)) dbg_sitd (const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd) { ehci_dbg (ehci, "%s [%d] sitd %p, next %08x, urb %p\n", - label, sitd->frame, sitd, le32_to_cpu(sitd->hw_next), sitd->urb); + label, sitd->frame, sitd, ehci32_to_cpu(sitd->hw_next), + sitd->urb); ehci_dbg (ehci, " addr %08x sched %04x result %08x buf %08x %08x\n", - le32_to_cpu(sitd->hw_fullspeed_ep), - le32_to_cpu(sitd->hw_uframe), - le32_to_cpu(sitd->hw_results), - le32_to_cpu(sitd->hw_buf [0]), - le32_to_cpu(sitd->hw_buf [1])); + ehci32_to_cpu(sitd->hw_fullspeed_ep), + ehci32_to_cpu(sitd->hw_uframe), + ehci32_to_cpu(sitd->hw_results), + ehci32_to_cpu(sitd->hw_buf [0]), + ehci32_to_cpu(sitd->hw_buf [1])); } static int __attribute__((__unused__)) @@ -332,9 +334,9 @@ static inline void remove_debug_files (struct ehci_hcd *bus) { } default: tmp = '?'; break; \ }; tmp; }) -static inline char token_mark (__le32 token) +static inline char token_mark (__ehci32 token) { - __u32 v = le32_to_cpu (token); + __u32 v = ehci32_to_cpu (token); if (v & QTD_STS_ACTIVE) return '*'; if (v & QTD_STS_HALT) @@ -372,29 +374,29 @@ static void qh_lines ( mark = '.'; /* use hw_qtd_next */ /* else alt_next points to some other qtd */ } - scratch = le32_to_cpup (&qh->hw_info1); - hw_curr = (mark == '*') ? le32_to_cpup (&qh->hw_current) : 0; + scratch = ehci32_to_cpup (&qh->hw_info1); + hw_curr = (mark == '*') ? ehci32_to_cpup (&qh->hw_current) : 0; temp = scnprintf (next, size, "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)", qh, scratch & 0x007f, speed_char (scratch), (scratch >> 8) & 0x000f, - scratch, le32_to_cpup (&qh->hw_info2), - le32_to_cpup (&qh->hw_token), mark, - (__constant_cpu_to_le32 (QTD_TOGGLE) & qh->hw_token) + scratch, ehci32_to_cpup (&qh->hw_info2), + ehci32_to_cpup (&qh->hw_token), mark, + (__constant_cpu_to_ehci32 (QTD_TOGGLE) & qh->hw_token) ? "data1" : "data0", - (le32_to_cpup (&qh->hw_alt_next) >> 1) & 0x0f); + (ehci32_to_cpup (&qh->hw_alt_next) >> 1) & 0x0f); size -= temp; next += temp; /* hc may be modifying the list as we read it ... */ list_for_each (entry, &qh->qtd_list) { td = list_entry (entry, struct ehci_qtd, qtd_list); - scratch = le32_to_cpup (&td->hw_token); + scratch = ehci32_to_cpup (&td->hw_token); mark = ' '; if (hw_curr == td->qtd_dma) mark = '*'; - else if (qh->hw_qtd_next == cpu_to_le32(td->qtd_dma)) + else if (qh->hw_qtd_next == cpu_to_ehci32(td->qtd_dma)) mark = '+'; else if (QTD_LENGTH (scratch)) { if (td->hw_alt_next == ehci->async->hw_alt_next) @@ -490,7 +492,7 @@ show_periodic (struct class_device *class_dev, char *buf) unsigned temp, size, seen_count; char *next; unsigned i; - __le32 tag; + __ehci32 tag; if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, GFP_ATOMIC))) return 0; @@ -525,7 +527,7 @@ show_periodic (struct class_device *class_dev, char *buf) case Q_TYPE_QH: temp = scnprintf (next, size, " qh%d-%04x/%p", p.qh->period, - le32_to_cpup (&p.qh->hw_info2) + ehci32_to_cpup(&p.qh->hw_info2) /* uframe masks */ & (QH_CMASK | QH_SMASK), p.qh); @@ -543,7 +545,7 @@ show_periodic (struct class_device *class_dev, char *buf) } /* show more info the first time around */ if (temp == seen_count && p.ptr) { - u32 scratch = le32_to_cpup ( + u32 scratch = ehci32_to_cpup ( &p.qh->hw_info1); struct ehci_qtd *qtd; char *type = ""; @@ -554,7 +556,7 @@ show_periodic (struct class_device *class_dev, char *buf) &p.qh->qtd_list, qtd_list) { temp++; - switch (0x03 & (le32_to_cpu ( + switch (0x03 & (ehci32_to_cpu ( qtd->hw_token) >> 8)) { case 0: type = "out"; continue; case 1: type = "in"; continue; @@ -597,7 +599,7 @@ show_periodic (struct class_device *class_dev, char *buf) temp = scnprintf (next, size, " sitd%d-%04x/%p", p.sitd->stream->interval, - le32_to_cpup (&p.sitd->hw_uframe) + ehci32_to_cpup (&p.sitd->hw_uframe) & 0x0000ffff, p.sitd); tag = Q_NEXT_TYPE (p.sitd->hw_next); diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index c7458f7..6fbf9d3 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -141,6 +141,12 @@ MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications"); #include "ehci.h" #include "ehci-dbg.c" +#ifdef CONFIG_USB_EHCI_HCD_PMC_MSP +extern void usb_hcd_tdi_set_mode(struct ehci_hcd *ehci); +#else +#define usb_hcd_tdi_set_mode(ehci) do { } while (0) +#endif + /*-------------------------------------------------------------------------*/ /* @@ -206,6 +212,9 @@ static void tdi_reset (struct ehci_hcd *ehci) tmp = ehci_readl(ehci, reg_ptr); tmp |= 0x3; ehci_writel(ehci, tmp, reg_ptr); + + /* set controller to host mode */ + usb_hcd_tdi_set_mode(ehci); } /* reset a non-running (STS_HALT == 1) controller */ @@ -472,8 +481,8 @@ static int ehci_init(struct usb_hcd *hcd) */ ehci->async->qh_next.qh = NULL; ehci->async->hw_next = QH_NEXT(ehci->async->qh_dma); - ehci->async->hw_info1 = cpu_to_le32(QH_HEAD); - ehci->async->hw_token = cpu_to_le32(QTD_STS_HALT); + ehci->async->hw_info1 = cpu_to_ehci32(QH_HEAD); + ehci->async->hw_token = cpu_to_ehci32(QTD_STS_HALT); ehci->async->hw_qtd_next = EHCI_LIST_END; ehci->async->qh_state = QH_STATE_LINKED; ehci->async->hw_alt_next = QTD_NEXT(ehci->async->dummy->qtd_dma); @@ -936,6 +945,11 @@ MODULE_LICENSE ("GPL"); #define PLATFORM_DRIVER ehci_hcd_au1xxx_driver #endif +#ifdef CONFIG_USB_EHCI_HCD_PMC_MSP +#include "ehci-pmcmsp.c" +#define PLATFORM_DRIVER ehci_hcd_msp_driver +#endif + #ifdef CONFIG_PPC_PS3 #include "ehci-ps3.c" #define PS3_SYSTEM_BUS_DRIVER ps3_ehci_sb_driver diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c index 1813b7c..0d57f62 100644 --- a/drivers/usb/host/ehci-hub.c +++ b/drivers/usb/host/ehci-hub.c @@ -552,9 +552,13 @@ static int ehci_hub_control ( status |= 1 << USB_PORT_FEAT_C_CONNECTION; if (temp & PORT_PEC) status |= 1 << USB_PORT_FEAT_C_ENABLE; - if ((temp & PORT_OCC) && !ignore_oc) + if ((temp & PORT_OCC) && !ignore_oc) { status |= 1 << USB_PORT_FEAT_C_OVER_CURRENT; + if (temp & PORT_OC) + status |= 1 << USB_PORT_FEAT_OVER_CURRENT; + } + /* whoever resumes must GetPortStatus to complete it!! */ if (temp & PORT_RESUME) { diff --git a/drivers/usb/host/ehci-mem.c b/drivers/usb/host/ehci-mem.c index a8ba2e1..1134b55 100644 --- a/drivers/usb/host/ehci-mem.c +++ b/drivers/usb/host/ehci-mem.c @@ -39,7 +39,7 @@ static inline void ehci_qtd_init (struct ehci_qtd *qtd, dma_addr_t dma) { memset (qtd, 0, sizeof *qtd); qtd->qtd_dma = dma; - qtd->hw_token = cpu_to_le32 (QTD_STS_HALT); + qtd->hw_token = cpu_to_ehci32 (QTD_STS_HALT); qtd->hw_next = EHCI_LIST_END; qtd->hw_alt_next = EHCI_LIST_END; INIT_LIST_HEAD (&qtd->qtd_list); @@ -209,9 +209,9 @@ static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags) } /* Hardware periodic table */ - ehci->periodic = (__le32 *) + ehci->periodic = (__ehci32 *) dma_alloc_coherent (ehci_to_hcd(ehci)->self.controller, - ehci->periodic_size * sizeof(__le32), + ehci->periodic_size * sizeof(__ehci32), &ehci->periodic_dma, 0); if (ehci->periodic == NULL) { goto fail; diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c index e7fbbd0..b87344d 100644 --- a/drivers/usb/host/ehci-q.c +++ b/drivers/usb/host/ehci-q.c @@ -50,8 +50,8 @@ qtd_fill (struct ehci_qtd *qtd, dma_addr_t buf, size_t len, u64 addr = buf; /* one buffer entry per 4K ... first might be short or unaligned */ - qtd->hw_buf [0] = cpu_to_le32 ((u32)addr); - qtd->hw_buf_hi [0] = cpu_to_le32 ((u32)(addr >> 32)); + qtd->hw_buf [0] = cpu_to_ehci32 ((u32)addr); + qtd->hw_buf_hi [0] = cpu_to_ehci32 ((u32)(addr >> 32)); count = 0x1000 - (buf & 0x0fff); /* rest of that page */ if (likely (len < count)) /* ... iff needed */ count = len; @@ -62,8 +62,8 @@ qtd_fill (struct ehci_qtd *qtd, dma_addr_t buf, size_t len, /* per-qtd limit: from 16K to 20K (best alignment) */ for (i = 1; count < len && i < 5; i++) { addr = buf; - qtd->hw_buf [i] = cpu_to_le32 ((u32)addr); - qtd->hw_buf_hi [i] = cpu_to_le32 ((u32)(addr >> 32)); + qtd->hw_buf [i] = cpu_to_ehci32 ((u32)addr); + qtd->hw_buf_hi [i] = cpu_to_ehci32 ((u32)(addr >> 32)); buf += 0x1000; if ((count + 0x1000) < len) count += 0x1000; @@ -75,7 +75,7 @@ qtd_fill (struct ehci_qtd *qtd, dma_addr_t buf, size_t len, if (count != len) count -= (count % maxpacket); } - qtd->hw_token = cpu_to_le32 ((count << 16) | token); + qtd->hw_token = cpu_to_ehci32 ((count << 16) | token); qtd->length = count; return count; @@ -97,20 +97,20 @@ qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd) * and set the pseudo-toggle in udev. Only usb_clear_halt() will * ever clear it. */ - if (!(qh->hw_info1 & cpu_to_le32(1 << 14))) { + if (!(qh->hw_info1 & cpu_to_ehci32(1 << 14))) { unsigned is_out, epnum; - is_out = !(qtd->hw_token & cpu_to_le32(1 << 8)); - epnum = (le32_to_cpup(&qh->hw_info1) >> 8) & 0x0f; + is_out = !(qtd->hw_token & cpu_to_ehci32(1 << 8)); + epnum = (ehci32_to_cpup(&qh->hw_info1) >> 8) & 0x0f; if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) { - qh->hw_token &= ~__constant_cpu_to_le32 (QTD_TOGGLE); + qh->hw_token &= ~__constant_cpu_to_ehci32 (QTD_TOGGLE); usb_settoggle (qh->dev, epnum, is_out, 1); } } /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */ wmb (); - qh->hw_token &= __constant_cpu_to_le32 (QTD_TOGGLE | QTD_STS_PING); + qh->hw_token &= __constant_cpu_to_ehci32 (QTD_TOGGLE | QTD_STS_PING); } /* if it weren't for a common silicon quirk (writing the dummy into the qh @@ -128,7 +128,7 @@ qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh) qtd = list_entry (qh->qtd_list.next, struct ehci_qtd, qtd_list); /* first qtd may already be partially processed */ - if (cpu_to_le32 (qtd->qtd_dma) == qh->hw_current) + if (cpu_to_ehci32 (qtd->qtd_dma) == qh->hw_current) qtd = NULL; } @@ -222,7 +222,7 @@ __acquires(ehci->lock) struct ehci_qh *qh = (struct ehci_qh *) urb->hcpriv; /* S-mask in a QH means it's an interrupt urb */ - if ((qh->hw_info2 & __constant_cpu_to_le32 (QH_SMASK)) != 0) { + if ((qh->hw_info2 & __constant_cpu_to_ehci32 (QH_SMASK)) != 0) { /* ... update hc-wide periodic stats (for usbfs) */ ehci_to_hcd(ehci)->self.bandwidth_int_reqs--; @@ -277,7 +277,7 @@ static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh); * Chases up to qh->hw_current. Returns number of completions called, * indicating how much "real" work we did. */ -#define HALT_BIT __constant_cpu_to_le32(QTD_STS_HALT) +#define HALT_BIT __constant_cpu_to_ehci32(QTD_STS_HALT) static unsigned qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh) { @@ -330,7 +330,7 @@ qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh) /* hardware copies qtd out of qh overlay */ rmb (); - token = le32_to_cpu (qtd->hw_token); + token = ehci32_to_cpu (qtd->hw_token); /* always clean up qtds the hc de-activated */ if ((token & QTD_STS_ACTIVE) == 0) { @@ -374,9 +374,9 @@ qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh) /* token in overlay may be most current */ if (state == QH_STATE_IDLE - && cpu_to_le32 (qtd->qtd_dma) + && cpu_to_ehci32 (qtd->qtd_dma) == qh->hw_current) - token = le32_to_cpu (qh->hw_token); + token = ehci32_to_cpu (qh->hw_token); /* force halt for unlinked or blocked qh, so we'll * patch the qh later and so that completions can't @@ -428,7 +428,7 @@ halt: /* should be rare for periodic transfers, * except maybe high bandwidth ... */ - if ((__constant_cpu_to_le32 (QH_SMASK) + if ((__constant_cpu_to_ehci32 (QH_SMASK) & qh->hw_info2) != 0) { intr_deschedule (ehci, qh); (void) qh_schedule (ehci, qh); @@ -600,7 +600,7 @@ qh_urb_transaction ( /* by default, enable interrupt on urb completion */ if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT))) - qtd->hw_token |= __constant_cpu_to_le32 (QTD_IOC); + qtd->hw_token |= __constant_cpu_to_ehci32 (QTD_IOC); return head; cleanup: @@ -769,8 +769,8 @@ done: /* init as live, toggle clear, advance to dummy */ qh->qh_state = QH_STATE_IDLE; - qh->hw_info1 = cpu_to_le32 (info1); - qh->hw_info2 = cpu_to_le32 (info2); + qh->hw_info1 = cpu_to_ehci32 (info1); + qh->hw_info2 = cpu_to_ehci32 (info2); usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1); qh_refresh (ehci, qh); return qh; @@ -782,7 +782,7 @@ done: static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh) { - __le32 dma = QH_NEXT (qh->qh_dma); + __ehci32 dma = QH_NEXT (qh->qh_dma); struct ehci_qh *head; /* (re)start the async schedule? */ @@ -820,7 +820,7 @@ static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh) /*-------------------------------------------------------------------------*/ -#define QH_ADDR_MASK __constant_cpu_to_le32(0x7f) +#define QH_ADDR_MASK __constant_cpu_to_ehci32(0x7f) /* * For control/bulk/interrupt, return QH with these TDs appended. @@ -867,7 +867,7 @@ static struct ehci_qh *qh_append_tds ( if (likely (qtd != NULL)) { struct ehci_qtd *dummy; dma_addr_t dma; - __le32 token; + __ehci32 token; /* to avoid racing the HC, use the dummy td instead of * the first td of our list (becomes new dummy). both @@ -970,7 +970,7 @@ static void end_unlink_async (struct ehci_hcd *ehci) timer_action_done (ehci, TIMER_IAA_WATCHDOG); - // qh->hw_next = cpu_to_le32 (qh->qh_dma); + /* qh->hw_next = cpu_to_ehci32 (qh->qh_dma); */ qh->qh_state = QH_STATE_IDLE; qh->qh_next.qh = NULL; qh_put (qh); // refcount from reclaim diff --git a/drivers/usb/host/ehci-sched.c b/drivers/usb/host/ehci-sched.c index 7b5ae71..6427de0 100644 --- a/drivers/usb/host/ehci-sched.c +++ b/drivers/usb/host/ehci-sched.c @@ -44,7 +44,7 @@ static int ehci_get_frame (struct usb_hcd *hcd); * @tag: hardware tag for type of this record */ static union ehci_shadow * -periodic_next_shadow (union ehci_shadow *periodic, __le32 tag) +periodic_next_shadow (union ehci_shadow *periodic, __ehci32 tag) { switch (tag) { case Q_TYPE_QH: @@ -63,7 +63,7 @@ periodic_next_shadow (union ehci_shadow *periodic, __le32 tag) static void periodic_unlink (struct ehci_hcd *ehci, unsigned frame, void *ptr) { union ehci_shadow *prev_p = &ehci->pshadow [frame]; - __le32 *hw_p = &ehci->periodic [frame]; + __ehci32 *hw_p = &ehci->periodic [frame]; union ehci_shadow here = *prev_p; /* find predecessor of "ptr"; hw and shadow lists are in sync */ @@ -87,7 +87,7 @@ static void periodic_unlink (struct ehci_hcd *ehci, unsigned frame, void *ptr) static unsigned short periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe) { - __le32 *hw_p = &ehci->periodic [frame]; + __ehci32 *hw_p = &ehci->periodic [frame]; union ehci_shadow *q = &ehci->pshadow [frame]; unsigned usecs = 0; @@ -95,10 +95,11 @@ periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe) switch (Q_NEXT_TYPE (*hw_p)) { case Q_TYPE_QH: /* is it in the S-mask? */ - if (q->qh->hw_info2 & cpu_to_le32 (1 << uframe)) + if (q->qh->hw_info2 & cpu_to_ehci32 (1 << uframe)) usecs += q->qh->usecs; /* ... or C-mask? */ - if (q->qh->hw_info2 & cpu_to_le32 (1 << (8 + uframe))) + if (q->qh->hw_info2 & + cpu_to_ehci32 (1 << (8 + uframe))) usecs += q->qh->c_usecs; hw_p = &q->qh->hw_next; q = &q->qh->qh_next; @@ -121,9 +122,10 @@ periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe) break; case Q_TYPE_SITD: /* is it in the S-mask? (count SPLIT, DATA) */ - if (q->sitd->hw_uframe & cpu_to_le32 (1 << uframe)) { + if (q->sitd->hw_uframe & + cpu_to_ehci32 (1 << uframe)) { if (q->sitd->hw_fullspeed_ep & - __constant_cpu_to_le32 (1<<31)) + __constant_cpu_to_ehci32 (1<<31)) usecs += q->sitd->stream->usecs; else /* worst case for OUT start-split */ usecs += HS_USECS_ISO (188); @@ -131,7 +133,7 @@ periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe) /* ... C-mask? (count CSPLIT, DATA) */ if (q->sitd->hw_uframe & - cpu_to_le32 (1 << (8 + uframe))) { + cpu_to_ehci32 (1 << (8 + uframe))) { /* worst case for IN complete-split */ usecs += q->sitd->stream->c_usecs; } @@ -173,9 +175,10 @@ static int same_tt (struct usb_device *dev1, struct usb_device *dev2) * will cause a transfer in "B-frame" uframe 0. "B-frames" lag * "H-frames" by 1 uframe. See the EHCI spec sec 4.5 and figure 4.7. */ -static inline unsigned char tt_start_uframe(struct ehci_hcd *ehci, __le32 mask) +static inline unsigned char tt_start_uframe(struct ehci_hcd *ehci, + __ehci32 mask) { - unsigned char smask = QH_SMASK & le32_to_cpu(mask); + unsigned char smask = QH_SMASK & ehci32_to_cpu(mask); if (!smask) { ehci_err(ehci, "invalid empty smask!\n"); /* uframe 7 can't have bw so this will indicate failure */ @@ -217,7 +220,7 @@ periodic_tt_usecs ( unsigned short tt_usecs[8] ) { - __le32 *hw_p = &ehci->periodic [frame]; + __ehci32 *hw_p = &ehci->periodic [frame]; union ehci_shadow *q = &ehci->pshadow [frame]; unsigned char uf; @@ -368,7 +371,7 @@ static int tt_no_collision ( */ for (; frame < ehci->periodic_size; frame += period) { union ehci_shadow here; - __le32 type; + __ehci32 type; here = ehci->pshadow [frame]; type = Q_NEXT_TYPE (ehci->periodic [frame]); @@ -382,7 +385,8 @@ static int tt_no_collision ( if (same_tt (dev, here.qh->dev)) { u32 mask; - mask = le32_to_cpu (here.qh->hw_info2); + mask = ehci32_to_cpu( + here.qh->hw_info2); /* "knows" no gap is needed */ mask |= mask >> 8; if (mask & uf_mask) @@ -395,7 +399,7 @@ static int tt_no_collision ( if (same_tt (dev, here.sitd->urb->dev)) { u16 mask; - mask = le32_to_cpu (here.sitd + mask = ehci32_to_cpu (here.sitd ->hw_uframe); /* FIXME assumes no gap for IN! */ mask |= mask >> 8; @@ -487,7 +491,7 @@ static int qh_link_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh) dev_dbg (&qh->dev->dev, "link qh%d-%04x/%p start %d [%d/%d us]\n", - period, le32_to_cpup (&qh->hw_info2) & (QH_CMASK | QH_SMASK), + period, ehci32_to_cpup (&qh->hw_info2) & (QH_CMASK | QH_SMASK), qh, qh->start, qh->usecs, qh->c_usecs); /* high bandwidth, or otherwise every microframe */ @@ -496,9 +500,9 @@ static int qh_link_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh) for (i = qh->start; i < ehci->periodic_size; i += period) { union ehci_shadow *prev = &ehci->pshadow [i]; - __le32 *hw_p = &ehci->periodic [i]; + __ehci32 *hw_p = &ehci->periodic [i]; union ehci_shadow here = *prev; - __le32 type = 0; + __ehci32 type = 0; /* skip the iso nodes at list head */ while (here.ptr) { @@ -555,7 +559,7 @@ static void qh_unlink_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh) // and this qh is active in the current uframe // (and overlay token SplitXstate is false?) // THEN - // qh->hw_info1 |= __constant_cpu_to_le32 (1 << 7 /* "ignore" */); + // qh->hw_info1 |= __constant_cpu_to_ehci32 (1 << 7 /* "ignore" */); /* high bandwidth, or otherwise part of every microframe */ if ((period = qh->period) == 0) @@ -572,7 +576,7 @@ static void qh_unlink_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh) dev_dbg (&qh->dev->dev, "unlink qh%d-%04x/%p start %d [%d/%d us]\n", qh->period, - le32_to_cpup (&qh->hw_info2) & (QH_CMASK | QH_SMASK), + ehci32_to_cpup (&qh->hw_info2) & (QH_CMASK | QH_SMASK), qh, qh->start, qh->usecs, qh->c_usecs); /* qh->qh_next still "live" to HC */ @@ -598,7 +602,7 @@ static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh) * active high speed queues may need bigger delays... */ if (list_empty (&qh->qtd_list) - || (__constant_cpu_to_le32 (QH_CMASK) + || (__constant_cpu_to_ehci32 (QH_CMASK) & qh->hw_info2) != 0) wait = 2; else @@ -663,7 +667,7 @@ static int check_intr_schedule ( unsigned frame, unsigned uframe, const struct ehci_qh *qh, - __le32 *c_maskp + __ehci32 *c_maskp ) { int retval = -ENOSPC; @@ -695,7 +699,7 @@ static int check_intr_schedule ( retval = 0; - *c_maskp = cpu_to_le32 (mask << 8); + *c_maskp = cpu_to_ehci32 (mask << 8); } #else /* Make sure this tt's buffer is also available for CSPLITs. @@ -706,7 +710,7 @@ static int check_intr_schedule ( * one smart pass... */ mask = 0x03 << (uframe + qh->gap_uf); - *c_maskp = cpu_to_le32 (mask << 8); + *c_maskp = cpu_to_ehci32 (mask << 8); mask |= 1 << uframe; if (tt_no_collision (ehci, qh->period, qh->dev, frame, mask)) { @@ -730,7 +734,7 @@ static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh) { int status; unsigned uframe; - __le32 c_mask; + __ehci32 c_mask; unsigned frame; /* 0..(qh->period - 1), or NO_FRAME */ qh_refresh(ehci, qh); @@ -739,7 +743,7 @@ static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh) /* reuse the previous schedule slots, if we can */ if (frame < qh->period) { - uframe = ffs (le32_to_cpup (&qh->hw_info2) & QH_SMASK); + uframe = ffs (ehci32_to_cpup (&qh->hw_info2) & QH_SMASK); status = check_intr_schedule (ehci, frame, --uframe, qh, &c_mask); } else { @@ -775,10 +779,11 @@ static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh) qh->start = frame; /* reset S-frame and (maybe) C-frame masks */ - qh->hw_info2 &= __constant_cpu_to_le32(~(QH_CMASK | QH_SMASK)); + qh->hw_info2 &= __constant_cpu_to_ehci32( + ~(QH_CMASK | QH_SMASK)); qh->hw_info2 |= qh->period - ? cpu_to_le32 (1 << uframe) - : __constant_cpu_to_le32 (QH_SMASK); + ? cpu_to_ehci32 (1 << uframe) + : __constant_cpu_to_ehci32 (QH_SMASK); qh->hw_info2 |= c_mask; } else ehci_dbg (ehci, "reused qh %p schedule\n", qh); @@ -898,9 +903,9 @@ iso_stream_init ( buf1 |= maxp; maxp *= multi; - stream->buf0 = cpu_to_le32 ((epnum << 8) | dev->devnum); - stream->buf1 = cpu_to_le32 (buf1); - stream->buf2 = cpu_to_le32 (multi); + stream->buf0 = cpu_to_ehci32 ((epnum << 8) | dev->devnum); + stream->buf1 = cpu_to_ehci32 (buf1); + stream->buf2 = cpu_to_ehci32 (multi); /* usbfs wants to report the average usecs per frame tied up * when transfers on this endpoint are scheduled ... @@ -943,7 +948,7 @@ iso_stream_init ( bandwidth /= 1 << (interval + 2); /* stream->splits gets created from raw_mask later */ - stream->address = cpu_to_le32 (addr); + stream->address = cpu_to_ehci32 (addr); } stream->bandwidth = bandwidth; @@ -1107,7 +1112,7 @@ itd_sched_init ( && !(urb->transfer_flags & URB_NO_INTERRUPT)) trans |= EHCI_ITD_IOC; trans |= length << 16; - uframe->transaction = cpu_to_le32 (trans); + uframe->transaction = cpu_to_ehci32 (trans); /* might need to cross a buffer page within a uframe */ uframe->bufp = (buf & ~(u64)0x0fff); @@ -1294,7 +1299,7 @@ sitd_slot_ok ( uframe += period_uframes; } while (uframe < mod); - stream->splits = cpu_to_le32(stream->raw_mask << (uframe & 7)); + stream->splits = cpu_to_ehci32(stream->raw_mask << (uframe & 7)); return 1; } @@ -1448,16 +1453,16 @@ itd_patch ( itd->index [uframe] = index; itd->hw_transaction [uframe] = uf->transaction; - itd->hw_transaction [uframe] |= cpu_to_le32 (pg << 12); - itd->hw_bufp [pg] |= cpu_to_le32 (uf->bufp & ~(u32)0); - itd->hw_bufp_hi [pg] |= cpu_to_le32 ((u32)(uf->bufp >> 32)); + itd->hw_transaction [uframe] |= cpu_to_ehci32 (pg << 12); + itd->hw_bufp [pg] |= cpu_to_ehci32 (uf->bufp & ~(u32)0); + itd->hw_bufp_hi [pg] |= cpu_to_ehci32 ((u32)(uf->bufp >> 32)); /* iso_frame_desc[].offset must be strictly increasing */ if (unlikely (uf->cross)) { u64 bufp = uf->bufp + 4096; itd->pg = ++pg; - itd->hw_bufp [pg] |= cpu_to_le32 (bufp & ~(u32)0); - itd->hw_bufp_hi [pg] |= cpu_to_le32 ((u32)(bufp >> 32)); + itd->hw_bufp [pg] |= cpu_to_ehci32 (bufp & ~(u32)0); + itd->hw_bufp_hi [pg] |= cpu_to_ehci32 ((u32)(bufp >> 32)); } } @@ -1470,7 +1475,7 @@ itd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_itd *itd) ehci->pshadow [frame].itd = itd; itd->frame = frame; wmb (); - ehci->periodic [frame] = cpu_to_le32 (itd->itd_dma) | Q_TYPE_ITD; + ehci->periodic [frame] = cpu_to_ehci32 (itd->itd_dma) | Q_TYPE_ITD; } /* fit urb's itds into the selected schedule slot; activate as needed */ @@ -1570,7 +1575,7 @@ itd_complete ( urb_index = itd->index[uframe]; desc = &urb->iso_frame_desc [urb_index]; - t = le32_to_cpup (&itd->hw_transaction [uframe]); + t = ehci32_to_cpup (&itd->hw_transaction [uframe]); itd->hw_transaction [uframe] = 0; stream->depth -= stream->interval; @@ -1729,7 +1734,7 @@ sitd_sched_init ( && !(urb->transfer_flags & URB_NO_INTERRUPT)) trans |= SITD_IOC; trans |= length << 16; - packet->transaction = cpu_to_le32 (trans); + packet->transaction = cpu_to_ehci32 (trans); /* might need to cross a buffer page within a td */ packet->bufp = buf; @@ -1834,13 +1839,13 @@ sitd_patch ( sitd->hw_backpointer = EHCI_LIST_END; bufp = uf->bufp; - sitd->hw_buf [0] = cpu_to_le32 (bufp); - sitd->hw_buf_hi [0] = cpu_to_le32 (bufp >> 32); + sitd->hw_buf [0] = cpu_to_ehci32 (bufp); + sitd->hw_buf_hi [0] = cpu_to_ehci32 (bufp >> 32); - sitd->hw_buf [1] = cpu_to_le32 (uf->buf1); + sitd->hw_buf [1] = cpu_to_ehci32 (uf->buf1); if (uf->cross) bufp += 4096; - sitd->hw_buf_hi [1] = cpu_to_le32 (bufp >> 32); + sitd->hw_buf_hi [1] = cpu_to_ehci32 (bufp >> 32); sitd->index = index; } @@ -1853,7 +1858,7 @@ sitd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_sitd *sitd) ehci->pshadow [frame].sitd = sitd; sitd->frame = frame; wmb (); - ehci->periodic [frame] = cpu_to_le32 (sitd->sitd_dma) | Q_TYPE_SITD; + ehci->periodic [frame] = cpu_to_ehci32 (sitd->sitd_dma) | Q_TYPE_SITD; } /* fit urb's sitds into the selected schedule slot; activate as needed */ @@ -1881,7 +1886,7 @@ sitd_link_urb ( urb->dev->devpath, stream->bEndpointAddress & 0x0f, (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out", (next_uframe >> 3) % ehci->periodic_size, - stream->interval, le32_to_cpu (stream->splits)); + stream->interval, ehci32_to_cpu (stream->splits)); stream->start = jiffies; } ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++; @@ -1940,7 +1945,7 @@ sitd_complete ( urb_index = sitd->index; desc = &urb->iso_frame_desc [urb_index]; - t = le32_to_cpup (&sitd->hw_results); + t = ehci32_to_cpup (&sitd->hw_results); /* report transfer status */ if (t & SITD_ERRS) { @@ -2095,7 +2100,7 @@ scan_periodic (struct ehci_hcd *ehci) for (;;) { union ehci_shadow q, *q_p; - __le32 type, *hw_p; + __ehci32 type, *hw_p; unsigned uframes; /* don't scan past the live uframe */ diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h index 46fa57a..b5de2cf 100644 --- a/drivers/usb/host/ehci.h +++ b/drivers/usb/host/ehci.h @@ -21,6 +21,99 @@ /* definitions used for the EHCI driver */ +/* + * __ehci32 and __ehci16 are "EHCI Host Controller" types, they may be + * equivalent to __leXX (normally) or __beXX (given EHCI_BIG_ENDIAN), + * depending on the host controller implementation. + */ +typedef __u32 __bitwise __ehci32; +typedef __u16 __bitwise __ehci16; + +/* cpu to ehci */ +static inline __ehci16 cpu_to_ehci16 (const u16 x) +{ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN + return (__force __ehci16)cpu_to_be16(x); +#else + return (__force __ehci16)cpu_to_le16(x); +#endif +} + +static inline __ehci16 cpu_to_ehci16p (const u16 *x) +{ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN + return cpu_to_be16p(x); +#else + return cpu_to_le16p(x); +#endif +} + +static inline __ehci32 cpu_to_ehci32 (const u32 x) +{ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN + return (__force __ehci32)cpu_to_be32(x); +#else + return (__force __ehci32)cpu_to_le32(x); +#endif +} + +static inline __ehci32 cpu_to_ehci32p (const u32 *x) +{ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN + return cpu_to_be32p(x); +#else + return cpu_to_le32p(x); +#endif +} + +/* ehci to cpu */ +static inline u16 ehci16_to_cpu (const __ehci16 x) +{ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN + return be16_to_cpu((__force __be16)x); +#else + return le16_to_cpu((__force __le16)x); +#endif +} + +static inline u16 ehci16_to_cpup (const __ehci16 *x) +{ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN + return be16_to_cpup((__force __be16 *)x); +#else + return le16_to_cpup((__force __le16 *)x); +#endif +} + +static inline u32 ehci32_to_cpu (const __ehci32 x) +{ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN + return be32_to_cpu((__force __be32)x); +#else + return le32_to_cpu((__force __le32)x); +#endif +} + +static inline u32 ehci32_to_cpup (const __ehci32 *x) +{ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN + return be32_to_cpup((__force __be32 *)x); +#else + return le32_to_cpup((__force __le32 *)x); +#endif +} + +static inline u32 __constant_cpu_to_ehci32(const __ehci32 x) +{ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN + return __constant_cpu_to_be32((__force __be32)x); +#else + return __constant_cpu_to_le32((__force __le32 )x); +#endif +} + +/*-------------------------------------------------------------------------*/ + /* statistics can be kept for for tuning/monitoring */ struct ehci_stats { /* irq usage */ @@ -64,7 +157,7 @@ struct ehci_hcd { /* one per controller */ /* periodic schedule support */ #define DEFAULT_I_TDPS 1024 /* some HCs can do less */ unsigned periodic_size; - __le32 *periodic; /* hw periodic table */ + __ehci32 *periodic; /* hw periodic table */ dma_addr_t periodic_dma; unsigned i_thresh; /* uframes HC might cache */ @@ -303,7 +396,7 @@ struct ehci_dbg_port { /*-------------------------------------------------------------------------*/ -#define QTD_NEXT(dma) cpu_to_le32((u32)dma) +#define QTD_NEXT(dma) cpu_to_ehci32((u32)dma) /* * EHCI Specification 0.95 Section 3.5 @@ -315,9 +408,9 @@ struct ehci_dbg_port { */ struct ehci_qtd { /* first part defined by EHCI spec */ - __le32 hw_next; /* see EHCI 3.5.1 */ - __le32 hw_alt_next; /* see EHCI 3.5.2 */ - __le32 hw_token; /* see EHCI 3.5.3 */ + __ehci32 hw_next; /* see EHCI 3.5.1 */ + __ehci32 hw_alt_next; /* see EHCI 3.5.2 */ + __ehci32 hw_token; /* see EHCI 3.5.3 */ #define QTD_TOGGLE (1 << 31) /* data toggle */ #define QTD_LENGTH(tok) (((tok)>>16) & 0x7fff) #define QTD_IOC (1 << 15) /* interrupt on complete */ @@ -331,8 +424,8 @@ struct ehci_qtd { #define QTD_STS_MMF (1 << 2) /* incomplete split transaction */ #define QTD_STS_STS (1 << 1) /* split transaction state */ #define QTD_STS_PING (1 << 0) /* issue PING? */ - __le32 hw_buf [5]; /* see EHCI 3.5.4 */ - __le32 hw_buf_hi [5]; /* Appendix B */ + __ehci32 hw_buf [5]; /* see EHCI 3.5.4 */ + __ehci32 hw_buf_hi [5]; /* Appendix B */ /* the rest is HCD-private */ dma_addr_t qtd_dma; /* qtd address */ @@ -342,26 +435,45 @@ struct ehci_qtd { } __attribute__ ((aligned (32))); /* mask NakCnt+T in qh->hw_alt_next */ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN +#define QTD_MASK __constant_cpu_to_be32 (~0x1f) +#else #define QTD_MASK __constant_cpu_to_le32 (~0x1f) +#endif #define IS_SHORT_READ(token) (QTD_LENGTH (token) != 0 && QTD_PID (token) == 1) /*-------------------------------------------------------------------------*/ /* type tag from {qh,itd,sitd,fstn}->hw_next */ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN +#define Q_NEXT_TYPE(dma) ((dma) & __constant_cpu_to_be32 (3 << 1)) +#else #define Q_NEXT_TYPE(dma) ((dma) & __constant_cpu_to_le32 (3 << 1)) +#endif /* values for that type tag */ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN +#define Q_TYPE_ITD __constant_cpu_to_be32 (0 << 1) +#define Q_TYPE_QH __constant_cpu_to_be32 (1 << 1) +#define Q_TYPE_SITD __constant_cpu_to_be32 (2 << 1) +#define Q_TYPE_FSTN __constant_cpu_to_be32 (3 << 1) +#else #define Q_TYPE_ITD __constant_cpu_to_le32 (0 << 1) #define Q_TYPE_QH __constant_cpu_to_le32 (1 << 1) #define Q_TYPE_SITD __constant_cpu_to_le32 (2 << 1) #define Q_TYPE_FSTN __constant_cpu_to_le32 (3 << 1) +#endif /* next async queue entry, or pointer to interrupt/periodic QH */ -#define QH_NEXT(dma) (cpu_to_le32(((u32)dma)&~0x01f)|Q_TYPE_QH) +#define QH_NEXT(dma) (cpu_to_ehci32(((u32)dma)&~0x01f)|Q_TYPE_QH) /* for periodic/async schedules and qtd lists, mark end of list */ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN +#define EHCI_LIST_END __constant_cpu_to_be32(1) /* "null pointer" to hw */ +#else #define EHCI_LIST_END __constant_cpu_to_le32(1) /* "null pointer" to hw */ +#endif /* * Entries in periodic shadow table are pointers to one of four kinds @@ -376,7 +488,7 @@ union ehci_shadow { struct ehci_itd *itd; /* Q_TYPE_ITD */ struct ehci_sitd *sitd; /* Q_TYPE_SITD */ struct ehci_fstn *fstn; /* Q_TYPE_FSTN */ - __le32 *hw_next; /* (all types) */ + __ehci32 *hw_next; /* (all types) */ void *ptr; }; @@ -392,23 +504,23 @@ union ehci_shadow { struct ehci_qh { /* first part defined by EHCI spec */ - __le32 hw_next; /* see EHCI 3.6.1 */ - __le32 hw_info1; /* see EHCI 3.6.2 */ + __ehci32 hw_next; /* see EHCI 3.6.1 */ + __ehci32 hw_info1; /* see EHCI 3.6.2 */ #define QH_HEAD 0x00008000 - __le32 hw_info2; /* see EHCI 3.6.2 */ + __ehci32 hw_info2; /* see EHCI 3.6.2 */ #define QH_SMASK 0x000000ff #define QH_CMASK 0x0000ff00 #define QH_HUBADDR 0x007f0000 #define QH_HUBPORT 0x3f800000 #define QH_MULT 0xc0000000 - __le32 hw_current; /* qtd list - see EHCI 3.6.4 */ + __ehci32 hw_current; /* qtd list - see EHCI 3.6.4 */ /* qtd overlay (hardware parts of a struct ehci_qtd) */ - __le32 hw_qtd_next; - __le32 hw_alt_next; - __le32 hw_token; - __le32 hw_buf [5]; - __le32 hw_buf_hi [5]; + __ehci32 hw_qtd_next; + __ehci32 hw_alt_next; + __ehci32 hw_token; + __ehci32 hw_buf [5]; + __ehci32 hw_buf_hi [5]; /* the rest is HCD-private */ dma_addr_t qh_dma; /* address of qh */ @@ -445,7 +557,7 @@ struct ehci_qh { struct ehci_iso_packet { /* These will be copied to iTD when scheduling */ u64 bufp; /* itd->hw_bufp{,_hi}[pg] |= */ - __le32 transaction; /* itd->hw_transaction[i] |= */ + __ehci32 transaction; /* itd->hw_transaction[i] |= */ u8 cross; /* buf crosses pages */ /* for full speed OUT splits */ u32 buf1; @@ -467,8 +579,8 @@ struct ehci_iso_sched { */ struct ehci_iso_stream { /* first two fields match QH, but info1 == 0 */ - __le32 hw_next; - __le32 hw_info1; + __ehci32 hw_next; + __ehci32 hw_info1; u32 refcount; u8 bEndpointAddress; @@ -483,7 +595,7 @@ struct ehci_iso_stream { unsigned long start; /* jiffies */ unsigned long rescheduled; int next_uframe; - __le32 splits; + __ehci32 splits; /* the rest is derived from the endpoint descriptor, * trusting urb->interval == f(epdesc->bInterval) and @@ -497,12 +609,12 @@ struct ehci_iso_stream { unsigned bandwidth; /* This is used to initialize iTD's hw_bufp fields */ - __le32 buf0; - __le32 buf1; - __le32 buf2; + __ehci32 buf0; + __ehci32 buf1; + __ehci32 buf2; /* this is used to initialize sITD's tt info */ - __le32 address; + __ehci32 address; }; /*-------------------------------------------------------------------------*/ @@ -515,8 +627,8 @@ struct ehci_iso_stream { */ struct ehci_itd { /* first part defined by EHCI spec */ - __le32 hw_next; /* see EHCI 3.3.1 */ - __le32 hw_transaction [8]; /* see EHCI 3.3.2 */ + __ehci32 hw_next; /* see EHCI 3.3.1 */ + __ehci32 hw_transaction [8]; /* see EHCI 3.3.2 */ #define EHCI_ISOC_ACTIVE (1<<31) /* activate transfer this slot */ #define EHCI_ISOC_BUF_ERR (1<<30) /* Data buffer error */ #define EHCI_ISOC_BABBLE (1<<29) /* babble detected */ @@ -524,10 +636,14 @@ struct ehci_itd { #define EHCI_ITD_LENGTH(tok) (((tok)>>16) & 0x0fff) #define EHCI_ITD_IOC (1 << 15) /* interrupt on complete */ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN +#define ITD_ACTIVE __constant_cpu_to_be32(EHCI_ISOC_ACTIVE) +#else #define ITD_ACTIVE __constant_cpu_to_le32(EHCI_ISOC_ACTIVE) +#endif - __le32 hw_bufp [7]; /* see EHCI 3.3.3 */ - __le32 hw_bufp_hi [7]; /* Appendix B */ + __ehci32 hw_bufp [7]; /* see EHCI 3.3.3 */ + __ehci32 hw_bufp_hi [7]; /* Appendix B */ /* the rest is HCD-private */ dma_addr_t itd_dma; /* for this itd */ @@ -554,11 +670,11 @@ struct ehci_itd { */ struct ehci_sitd { /* first part defined by EHCI spec */ - __le32 hw_next; + __ehci32 hw_next; /* uses bit field macros above - see EHCI 0.95 Table 3-8 */ - __le32 hw_fullspeed_ep; /* EHCI table 3-9 */ - __le32 hw_uframe; /* EHCI table 3-10 */ - __le32 hw_results; /* EHCI table 3-11 */ + __ehci32 hw_fullspeed_ep; /* EHCI table 3-9 */ + __ehci32 hw_uframe; /* EHCI table 3-10 */ + __ehci32 hw_results; /* EHCI table 3-11 */ #define SITD_IOC (1 << 31) /* interrupt on completion */ #define SITD_PAGE (1 << 30) /* buffer 0/1 */ #define SITD_LENGTH(x) (0x3ff & ((x)>>16)) @@ -570,11 +686,15 @@ struct ehci_sitd { #define SITD_STS_MMF (1 << 2) /* incomplete split transaction */ #define SITD_STS_STS (1 << 1) /* split transaction state */ +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN +#define SITD_ACTIVE __constant_cpu_to_be32(SITD_STS_ACTIVE) +#else #define SITD_ACTIVE __constant_cpu_to_le32(SITD_STS_ACTIVE) +#endif - __le32 hw_buf [2]; /* EHCI table 3-12 */ - __le32 hw_backpointer; /* EHCI table 3-13 */ - __le32 hw_buf_hi [2]; /* Appendix B */ + __ehci32 hw_buf [2]; /* EHCI table 3-12 */ + __ehci32 hw_backpointer; /* EHCI table 3-13 */ + __ehci32 hw_buf_hi [2]; /* Appendix B */ /* the rest is HCD-private */ dma_addr_t sitd_dma; @@ -599,8 +719,8 @@ struct ehci_sitd { * it hits a "restore" FSTN; then it returns to finish other uframe 0/1 work. */ struct ehci_fstn { - __le32 hw_next; /* any periodic q entry */ - __le32 hw_prev; /* qh or EHCI_LIST_END */ + __ehci32 hw_next; /* any periodic q entry */ + __ehci32 hw_prev; /* qh or EHCI_LIST_END */ /* the rest is HCD-private */ dma_addr_t fstn_dma; @@ -672,6 +792,12 @@ ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc) #define ehci_big_endian_mmio(e) 0 #endif +#if defined(CONFIG_USB_EHCI_BIG_ENDIAN) && \ + defined(CONFIG_USB_EHCI_BIG_ENDIAN_MMIO) +#define readl_be(addr) __raw_readl((addr)) +#define writel_be(val, addr) __raw_writel((val), (addr)) +#endif + static inline unsigned int ehci_readl (const struct ehci_hcd *ehci, __u32 __iomem * regs) { diff --git a/drivers/usb/host/ehci-pmcmsp.c b/drivers/usb/host/ehci-pmcmsp.c new file mode 100644 index 0000000..18aa74d --- /dev/null +++ b/drivers/usb/host/ehci-pmcmsp.c @@ -0,0 +1,434 @@ +/* + * PMC MSP EHCI (Host Controller Driver) for USB. + * + * (C) Copyright 2006-2007 PMC-Sierra Inc + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include + +#ifdef CONFIG_PMCTWILED +#include "msp_led_macros.h" +#endif + +/* includes */ +#define USB_CTRL_MODE_HOST 0x3 /* host mode */ +#define USB_CTRL_MODE_BIG_ENDIAN 0x4 /* big endian */ +#define USB_CTRL_MODE_STREAM_DISABLE 0x10 /* stream disable*/ +#define USB_CTRL_FIFO_THRESH 0x00300000 /* thresh hold */ +#define USB_EHCI_REG_USB_MODE 0x68 /* reg offset usb mode */ +#define USB_EHCI_REG_USB_FIFO 0x24 /* reg offset usb fifo */ +#define USB_EHCI_REG_USB_STATUS 0x44 /* reg offset usb status*/ +#define USB_EHCI_REG_BIT_STAT_STS (1<<29) /* serial/parallel xcvr */ + +extern int usb_disabled(void); +extern void usb_hcd_tdi_set_mode(struct ehci_hcd *ehci); + +void usb_hcd_tdi_set_mode(struct ehci_hcd *ehci) +{ + u8 *base; + u8 *statreg; + u8 *fiforeg; + u32 val; + + /* get register base */ + base = (u8 *)ehci->regs + USB_EHCI_REG_USB_MODE; + statreg = (u8 *)ehci->regs + USB_EHCI_REG_USB_STATUS; + fiforeg = (u8 *)ehci->regs + USB_EHCI_REG_USB_FIFO; + + /* set the controller to host mode and BIG ENDIAN */ + ehci_writel(ehci, (USB_CTRL_MODE_HOST | USB_CTRL_MODE_BIG_ENDIAN | + USB_CTRL_MODE_STREAM_DISABLE), (u32 *)base); + + /* clear STS to select parallel transceiver interface */ + val = ehci_readl(ehci, (u32 *)statreg); + val = val & ~USB_EHCI_REG_BIT_STAT_STS; + ehci_writel(ehci, val, (u32 *)statreg); + + /* write to set the proper fifo threshold */ + ehci_writel(ehci, USB_CTRL_FIFO_THRESH, (u32 *)fiforeg); + +#ifdef CONFIG_PMCTWILED + /* set TWI GPIO USB_HOST_DEV pin to active high */ + msp_led_pin_hi(MSP_PIN_USB_HOST_DEV); +#endif +} + +/* called after powerup, by probe or system-pm "wakeup" */ +static int ehci_msp_reinit(struct ehci_hcd *ehci) +{ + ehci_port_power(ehci, 0); + + return 0; +} + +/* called during probe() after chip reset completes */ +static int ehci_msp_setup(struct usb_hcd *hcd) +{ + struct ehci_hcd *ehci = hcd_to_ehci(hcd); + u32 temp; + int retval; + +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO + ehci->big_endian_mmio = 1; +#endif + + ehci->caps = hcd->regs; + ehci->regs = hcd->regs + HC_LENGTH( + ehci_readl(ehci, &ehci->caps->hc_capbase)); + dbg_hcs_params(ehci, "reset"); + dbg_hcc_params(ehci, "reset"); + + /* cache this readonly data; minimize chip reads */ + ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); + + ehci->is_tdi_rh_tt = 1; + tdi_reset(ehci); + + ehci_reset(ehci); + + retval = ehci_halt(ehci); + if (retval) + return retval; + + /* data structure init */ + retval = ehci_init(hcd); + if (retval) + return retval; + + temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params); + temp &= 0x0f; + if (temp && HCS_N_PORTS(ehci->hcs_params) > temp) { + ehci_dbg(ehci, "bogus port configuration: " + "cc=%d x pcc=%d < ports=%d\n", + HCS_N_CC(ehci->hcs_params), + HCS_N_PCC(ehci->hcs_params), + HCS_N_PORTS(ehci->hcs_params)); + } + + retval = ehci_msp_reinit(ehci); + + return retval; +} + +/*-------------------------------------------------------------------------*/ + +#ifdef CONFIG_PM +/* suspend/resume, section 4.3 */ + +/* + * These routines rely on the bus glue + * to handle powerdown and wakeup, and currently also on + * transceivers that don't need any software attention to set up + * the right sort of wakeup. + * Also they depend on separate root hub suspend/resume. + */ + +static int ehci_msp_suspend(struct usb_hcd *hcd, pm_message_t message) +{ + struct ehci_hcd *ehci = hcd_to_ehci(hcd); + unsigned long flags; + int rc = 0; + + if (time_before(jiffies, ehci->next_statechange)) + msleep(10); + + /* + * Root hub was already suspended. Disable irq emission and + * mark HW unaccessible, bail out if RH has been resumed. Use + * the spinlock to properly synchronize with possible pending + * RH suspend or resume activity. + * + * This is still racy as hcd->state is manipulated outside of + * any locks =P But that will be a different fix. + */ + spin_lock_irqsave(&ehci->lock, flags); + if (hcd->state != HC_STATE_SUSPENDED) { + rc = -EINVAL; + goto bail; + } + ehci_writel(ehci, 0, &ehci->regs->intr_enable); + (void)ehci_readl(ehci, &ehci->regs->intr_enable); + clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); + + bail: + spin_unlock_irqrestore(&ehci->lock, flags); + + /* + * could save FLADJ in case of Vaux power loss + * ... we'd only use it to handle clock skew + */ + return rc; +} + +static int ehci_msp_resume(struct usb_hcd *hcd) +{ + struct ehci_hcd *ehci = hcd_to_ehci(hcd); + unsigned port; + struct usb_device *root = hcd->self.root_hub; + int retval = -EINVAL; + + /* maybe restore FLADJ */ + + if (time_before(jiffies, ehci->next_statechange)) + msleep(100); + + /* Mark hardware accessible again as we are out of D3 state by now */ + set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); + + /* If CF is clear, we lost PCI Vaux power and need to restart. */ + if (ehci_readl(ehci, &ehci->regs->configured_flag) != FLAG_CF) + goto restart; + + /* + * If any port is suspended (or owned by the companion), + * we know we can/must resume the HC (and mustn't reset it). + * We just defer that to the root hub code. + */ + for (port = HCS_N_PORTS(ehci->hcs_params); port > 0; ) { + u32 status; + port--; + status = ehci_readl(ehci, &ehci->regs->port_status [port]); + if (!(status & PORT_POWER)) + continue; + if (status & (PORT_SUSPEND | PORT_RESUME | PORT_OWNER)) { + usb_hcd_resume_root_hub(hcd); + return 0; + } + } + +restart: + ehci_dbg(ehci, "lost power, restarting\n"); + for (port = HCS_N_PORTS(ehci->hcs_params); port > 0; ) { + port--; + if (!root->children [port]) + continue; + usb_set_device_state(root->children[port], + USB_STATE_NOTATTACHED); + } + + /* + * Else reset, to cope with power loss or flush-to-storage + * style "resume" having let BIOS kick in during reboot. + */ + (void) ehci_halt(ehci); + (void) ehci_reset(ehci); + (void) ehci_msp_reinit(ehci, pdev); + + /* emptying the schedule aborts any urbs */ + spin_lock_irq(&ehci->lock); + if (ehci->reclaim) + ehci->reclaim_ready = 1; + ehci_work(ehci, NULL); + spin_unlock_irq(&ehci->lock); + + /* restart; khubd will disconnect devices */ + retval = ehci_run(hcd); + + /* here we "know" root ports should always stay powered */ + ehci_port_power(ehci, 1); + + return retval; +} +#endif + +/*-------------------------------------------------------------------------*/ + +static void msp_start_hc(struct platform_device *dev) +{ + printk(KERN_DEBUG __FILE__ + ": starting PMC MSP EHCI USB Controller\n"); + + /* + * Now, carefully enable the USB clock, and take + * the USB host controller out of reset. + */ + + printk(KERN_DEBUG __FILE__ + ": Clock to USB host has been enabled \n"); +} + +static void msp_stop_hc(struct platform_device *dev) +{ + printk(KERN_DEBUG __FILE__ + ": stopping PMC MSP EHCI USB Controller\n"); +} + + +/*-------------------------------------------------------------------------*/ + +/* configure so an HC device and id are always provided */ +/* always called with process context; sleeping is OK */ + + +/* + * usb_hcd_msp_probe - initialize PMC MSP-based HCDs + * Context: !in_interrupt() + * + * Allocates basic resources for this USB host controller, and + * then invokes the start() method for the HCD associated with it + * through the hotplug entry's driver_data. + */ +int usb_hcd_msp_probe(const struct hc_driver *driver, + struct platform_device *dev) +{ + int retval; + struct usb_hcd *hcd; + + if (dev->resource[1].flags != IORESOURCE_IRQ) { + pr_debug("resource[1] is not IORESOURCE_IRQ"); + return -ENOMEM; + } + + hcd = usb_create_hcd(driver, &dev->dev, "pmcmsp"); + if (!hcd) + return -ENOMEM; + hcd->rsrc_start = dev->resource[0].start; + hcd->rsrc_len = dev->resource[0].end - dev->resource[0].start + 1; + + if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { + pr_debug("request_mem_region failed"); + retval = -EBUSY; + goto err1; + } + + hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); + if (!hcd->regs) { + pr_debug("ioremap failed"); + retval = -ENOMEM; + goto err2; + } + + msp_start_hc(dev); + + retval = usb_add_hcd(hcd, dev->resource[1].start, 0); + if (retval == 0) + return retval; + + msp_stop_hc(dev); + iounmap(hcd->regs); + + err2: + release_mem_region(hcd->rsrc_start, hcd->rsrc_len); + err1: + usb_put_hcd(hcd); + + return retval; +} + +/* may be called without controller electrically present */ +/* may be called with controller, bus, and devices active */ + +/* + * usb_hcd_msp_remove - shutdown processing for PMC MSP-based HCDs + * @dev: USB Host Controller being removed + * Context: !in_interrupt() + * + * Reverses the effect of usb_hcd_msp_probe(), first invoking + * the HCD's stop() method. It is always called from a thread + * context, normally "rmmod", "apmd", or something similar. + */ +void usb_hcd_msp_remove(struct usb_hcd *hcd, struct platform_device *dev) +{ + usb_remove_hcd(hcd); + msp_stop_hc(dev); + iounmap(hcd->regs); + release_mem_region(hcd->rsrc_start, hcd->rsrc_len); + usb_put_hcd(hcd); +} + +/*-------------------------------------------------------------------------*/ + +static const struct hc_driver ehci_msp_hc_driver = { + .description = hcd_name, + .product_desc = "PMC MSP EHCI", + .hcd_priv_size = sizeof(struct ehci_hcd), + + /* + * generic hardware linkage + */ + .irq = ehci_irq, + .flags = HCD_MEMORY | HCD_USB2, + + /* + * basic lifecycle operations + */ + .reset = ehci_msp_setup, + .start = ehci_run, +#ifdef CONFIG_PM + .suspend = ehci_msp_suspend, + .resume = ehci_msp_resume, +#endif /*CONFIG_PM*/ + .stop = ehci_stop, + + /* + * managing i/o requests and associated device resources + */ + .urb_enqueue = ehci_urb_enqueue, + .urb_dequeue = ehci_urb_dequeue, + .endpoint_disable = ehci_endpoint_disable, + + /* + * scheduling support + */ + .get_frame_number = ehci_get_frame, + + /* + * root hub support + */ + .hub_status_data = ehci_hub_status_data, + .hub_control = ehci_hub_control, +}; + +/*-------------------------------------------------------------------------*/ + +static int ehci_hcd_msp_drv_probe(struct platform_device *pdev) +{ + int ret; + + pr_debug("In ehci_hcd_msp_drv_probe"); + + if (usb_disabled()) + return -ENODEV; + + ret = usb_hcd_msp_probe(&ehci_msp_hc_driver, pdev); + + return ret; +} + +static int ehci_hcd_msp_drv_remove(struct platform_device *pdev) +{ + struct usb_hcd *hcd = platform_get_drvdata(pdev); + + usb_hcd_msp_remove(hcd, pdev); + + return 0; +} + +MODULE_ALIAS("pmcmsp-ehci"); +static struct platform_driver ehci_hcd_msp_driver = { + .probe = ehci_hcd_msp_drv_probe, + .remove = ehci_hcd_msp_drv_remove, + .driver = { + .name = "pmcmsp-ehci", + }, +}; From david-b@pacbell.net Wed Jun 6 02:34:13 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 02:34:16 +0100 (BST) Received: from smtp109.sbc.mail.mud.yahoo.com ([68.142.198.208]:32893 "HELO smtp109.sbc.mail.mud.yahoo.com") by ftp.linux-mips.org with SMTP id S20021982AbXFFBeN (ORCPT ); Wed, 6 Jun 2007 02:34:13 +0100 Received: (qmail 30650 invoked from network); 6 Jun 2007 01:33:07 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=s1024; d=pacbell.net; h=Received:X-YMail-OSG:Received:Date:From:To:Subject:Cc:References:In-Reply-To:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id; b=4KIj5DJaGkJ5QyB8ow8LY7hxaJUMCPSHb0JqCxdv9wbYTznEWhxsTXlSZRWSbB4yZ85T0A1jMQIf8dbmVZHKA4OGnTMTnbwGPlG3OCn5i6t0ZcRXqXj0B8TtshuZE5Yoy5JzM2v6/XVcDAhdk9EbefN6dRx0PoYWeqNmC5D3E2o= ; Received: from unknown (HELO adsl-69-226-248-13.dsl.pltn13.pacbell.net) (david-b@pacbell.net@69.226.212.132 with login) by smtp109.sbc.mail.mud.yahoo.com with SMTP; 6 Jun 2007 01:33:06 -0000 X-YMail-OSG: Ds4aQqkVM1ntyUvuOj9LPwyyjNeU61MRjLcMoFNVTttHuwdlChBTlNbFCn5Sffcakf8YFR3oFA-- Received: by adsl-69-226-248-13.dsl.pltn13.pacbell.net (Postfix, from userid 500) id 058F0230A73; Tue, 5 Jun 2007 18:32:43 -0700 (PDT) Date: Tue, 05 Jun 2007 18:32:43 -0700 From: David Brownell To: stjeanma@pmc-sierra.com, gregkh@suse.de Subject: Re: [PATCH 11/12] drivers: PMC MSP71xx USB driver Cc: linux-usb-devel@lists.sourceforge.net, linux-mips@linux-mips.org, akpm@linux-foundation.org References: <200706060048.l560moU4007288@pasqua.pmc-sierra.bc.ca> In-Reply-To: <200706060048.l560moU4007288@pasqua.pmc-sierra.bc.ca> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Message-Id: <20070606013243.058F0230A73@adsl-69-226-248-13.dsl.pltn13.pacbell.net> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15261 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: david-b@pacbell.net Precedence: bulk X-list: linux-mips [ $SUBJECT is getting less accurate... ] There are already big-endian support patches for EHCI in the USB queue. I strongly suspect this patch will clash with those. For example, they obviously don't cope with mixed configuration systems, where an SOC includes big-endian EHCI registers but there's also PCI which is "normal"-endian. The register accessors all accept a handle to the host controller, so they can figure out which byte sex to use on an access-by-access basis if the system needs that... Another split you need to do: the usb/core/hub.c stuff should be a patch in its own right. But hmm, wait ... that looks like it mirrors something done in another EHCI patch that's already in the USB queue. There's some other EHCI silicon that chose the "software (vs hardware) powers ports off" implementation option. So you should grab those patches from Greg's queue and redo yours to match. Looks like a bunch of the host side work you did has already been done... - Dave From tiansm@lemote.com Wed Jun 6 05:42:59 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 05:43:01 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:7404 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20022012AbXFFEm7 (ORCPT ); Wed, 6 Jun 2007 05:42:59 +0100 Received: (qmail 26324 invoked by uid 511); 6 Jun 2007 04:50:08 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 04:50:08 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH] define MODULE_PROC_FAMILY for Loongson2 Date: Wed, 6 Jun 2007 12:42:40 +0800 Message-Id: <11811049644042-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811049622818-git-send-email-tiansm@lemote.com> References: <11811049622818-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15262 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- arch/mips/mm/c-r4k.c | 57 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 57 insertions(+), 0 deletions(-) diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index df04a31..e9988a3 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -335,6 +335,10 @@ static void r4k_flush_cache_all(void) static inline void local_r4k___flush_cache_all(void * args) { +#if defined(CONFIG_CPU_LOONGSON2) + r4k_blast_scache(); + return; +#endif r4k_blast_dcache(); r4k_blast_icache(); @@ -848,6 +852,26 @@ static void __init probe_pcache(void) c->options |= MIPS_CPU_PREFETCH; break; + case CPU_LOONGSON2: + icache_size = 1 << (12 + ((config & CONF_IC) >> 9)); + c->icache.linesz = 16 << ((config & CONF_IB) >> 5); + if (prid & 0x3) { + c->icache.ways = 4; + } else { + c->icache.ways = 2; + } + c->icache.waybit= 0; + + dcache_size = 1 << (12 + ((config & CONF_DC) >> 6)); + c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); + if (prid & 0x3) { + c->dcache.ways = 4; + } else { + c->dcache.ways = 2; + } + c->dcache.waybit = 0; + break; + default: if (!(config & MIPS_CONF_M)) panic("Don't know how to probe P-caches on this cpu."); @@ -963,6 +987,14 @@ static void __init probe_pcache(void) break; } +#ifdef CONFIG_CPU_LOONGSON2 + /* + * LOONGSON2 has 4 way icache, but when using indexed cache op, + * one op will act on all 4 ways + */ + c->icache.ways = 1; +#endif + printk("Primary instruction cache %ldkB, %s, %s, linesize %d bytes.\n", icache_size >> 10, cpu_has_vtag_icache ? "virtually tagged" : "physically tagged", @@ -1036,6 +1068,25 @@ static int __init probe_scache(void) return 1; } +#if defined(CONFIG_CPU_LOONGSON2) +static void __init loongson2_sc_init(void) +{ + struct cpuinfo_mips *c = ¤t_cpu_data; + + scache_size = 512*1024; + c->scache.linesz = 32; + c->scache.ways = 4; + c->scache.waybit = 0; + c->scache.waysize = scache_size / (c->scache.ways); + c->scache.sets = scache_size /(c->scache.linesz * c->scache.ways); + printk("Unified secondary cache %ldkB %s, linesize %d bytes.\n", + scache_size >> 10, way_string[c->scache.ways], c->scache.linesz); + + c->options |= MIPS_CPU_INCLUSIVE_CACHES; + return; +} +#endif + extern int r5k_sc_init(void); extern int rm7k_sc_init(void); extern int mips_sc_init(void); @@ -1085,6 +1136,12 @@ static void __init setup_scache(void) #endif return; +#if defined(CONFIG_CPU_LOONGSON2) + case CPU_LOONGSON2: + loongson2_sc_init(); + return; +#endif + default: if (c->isa_level == MIPS_CPU_ISA_M32R1 || c->isa_level == MIPS_CPU_ISA_M32R2 || -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 05:43:22 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 05:43:25 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:5868 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20022021AbXFFEm7 (ORCPT ); Wed, 6 Jun 2007 05:42:59 +0100 Received: (qmail 26284 invoked by uid 511); 6 Jun 2007 04:50:07 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 04:50:07 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH] add MACH_GROUP_LEMOTE & MACH_LEMOTE_FULONG Date: Wed, 6 Jun 2007 12:42:32 +0800 Message-Id: <11811049632193-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811049622818-git-send-email-tiansm@lemote.com> References: <11811049622818-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15263 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- include/asm-mips/bootinfo.h | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h index b0c3297..5006930 100644 --- a/include/asm-mips/bootinfo.h +++ b/include/asm-mips/bootinfo.h @@ -213,6 +213,12 @@ #define MACH_GROUP_NEC_EMMA2RH 25 /* NEC EMMA2RH (was 23) */ #define MACH_NEC_MARKEINS 0 /* NEC EMMA2RH Mark-eins */ +/* + * Valid machtype for group LEMOTE + */ +#define MACH_GROUP_LEMOTE 27 +#define MACH_LEMOTE_FULONG 0 + #define CL_SIZE COMMAND_LINE_SIZE const char *get_system_type(void); -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 05:43:45 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 05:43:48 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:8684 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20022030AbXFFEnC (ORCPT ); Wed, 6 Jun 2007 05:43:02 +0100 Received: (qmail 26335 invoked by uid 511); 6 Jun 2007 04:50:08 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 04:50:08 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH] work around for more than 256MB memory support Date: Wed, 6 Jun 2007 12:42:42 +0800 Message-Id: <11811049641189-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811049622818-git-send-email-tiansm@lemote.com> References: <11811049622818-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15264 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- drivers/char/mem.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/drivers/char/mem.c b/drivers/char/mem.c index cc9a9d0..a19b46a 100644 --- a/drivers/char/mem.c +++ b/drivers/char/mem.c @@ -82,8 +82,12 @@ static inline int uncached_access(struct file *file, unsigned long addr) */ if (file->f_flags & O_SYNC) return 1; +#if defined(CONFIG_LEMOTE_FULONG) && defined(CONFIG_64BIT) + return (addr >= __pa(high_memory)) || ((addr >=0x10000000) && (addr < 0x20000000)); +#else return addr >= __pa(high_memory); #endif +#endif } #ifndef ARCH_HAS_VALID_PHYS_ADDR_RANGE -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 05:44:09 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 05:44:12 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:9196 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20022034AbXFFEnD (ORCPT ); Wed, 6 Jun 2007 05:43:03 +0100 Received: (qmail 26279 invoked by uid 511); 6 Jun 2007 04:50:07 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 04:50:07 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH] TO_PHYS_MASK for loongson2 Date: Wed, 6 Jun 2007 12:42:31 +0800 Message-Id: <1181104963568-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811049622818-git-send-email-tiansm@lemote.com> References: <11811049622818-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15265 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- include/asm-mips/addrspace.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h index c627508..42e2578 100644 --- a/include/asm-mips/addrspace.h +++ b/include/asm-mips/addrspace.h @@ -144,7 +144,7 @@ #define TO_PHYS_MASK _CONST64_(0x000000ffffffffff) /* 2^^40 - 1 */ #endif -#if defined (CONFIG_CPU_R10000) +#if defined (CONFIG_CPU_R10000) || defined (CONFIG_CPU_LOONGSON2) #define TO_PHYS_MASK _CONST64_(0x000000ffffffffff) /* 2^^40 - 1 */ #endif -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 05:44:33 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 05:44:36 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:8940 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20022033AbXFFEnD (ORCPT ); Wed, 6 Jun 2007 05:43:03 +0100 Received: (qmail 26269 invoked by uid 511); 6 Jun 2007 04:50:07 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 04:50:07 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Sun Haiyong Subject: [PATCH] Kconfig update for lemote fulong miniPC Date: Wed, 6 Jun 2007 12:42:30 +0800 Message-Id: <11811049633703-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811049622818-git-send-email-tiansm@lemote.com> References: <11811049622818-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15266 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Sun Haiyong Signed-off-by: Fuxin Zhang Signed-off-by: Sun Haiyong --- arch/mips/Kconfig | 36 ++++++++++++++++++++++++++++++++++++ 1 files changed, 36 insertions(+), 0 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 0f09412..2d01523 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -14,6 +14,25 @@ config ZONE_DMA choice prompt "System type" default SGI_IP22 +config LEMOTE_FULONG + bool "Support for Lemote's fulong mini-PC" + select SYS_HAS_CPU_LOONGSON2 + select DMA_NONCOHERENT + select BOOT_ELF32 + select BOARD_SCACHE + select HW_HAS_PCI + select I8259 + select ISA + select IRQ_CPU + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_HIGHMEM + select SYS_HAS_EARLY_PRINTK + select GENERIC_HARDIRQS_NO__DO_IRQ + select CPU_HAS_WB + help + Lemote Fulong mini-PC board, which uses Chinese Loongson-2E CPU and a fpga north bridge config MACH_ALCHEMY bool "Alchemy processor based machines" @@ -944,6 +963,13 @@ choice prompt "CPU type" default CPU_R4X00 +config CPU_LOONGSON2 + bool "LOONGSON2" + depends on SYS_HAS_CPU_LOONGSON2 + select CPU_SUPPORTS_32BIT_KERNEL + select CPU_SUPPORTS_64BIT_KERNEL + select CPU_SUPPORTS_HIGHMEM + config CPU_MIPS32_R1 bool "MIPS32 Release 1" depends on SYS_HAS_CPU_MIPS32_R1 @@ -1154,6 +1180,9 @@ config CPU_SB1 endchoice +config SYS_HAS_CPU_LOONGSON2 + bool + config SYS_HAS_CPU_MIPS32_R1 bool @@ -1487,6 +1516,13 @@ config CPU_HAS_SMARTMIPS config CPU_HAS_WB bool +config 64BIT_CONTEXT + bool "Save 64bit integer registers" if CPU_LOONGSON2 && 32BIT + help + Loongson2 CPU is 64bit , when used in 32BIT mode, its integer registers + can still be accessed as 64bit, mainly for multimedia instructions. We must have + all 64bit save/restored to make sure those instructions to get correct result. + # # Vectored interrupt mode is an R2 feature # -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 05:44:56 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 05:45:00 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:9964 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20022036AbXFFEnF (ORCPT ); Wed, 6 Jun 2007 05:43:05 +0100 Received: (qmail 26299 invoked by uid 511); 6 Jun 2007 04:50:07 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 04:50:07 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH] define MODULE_PROC_FAMILY for Loongson2 Date: Wed, 6 Jun 2007 12:42:35 +0800 Message-Id: <11811049632588-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811049622818-git-send-email-tiansm@lemote.com> References: <11811049622818-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15267 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- include/asm-mips/module.h | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/include/asm-mips/module.h b/include/asm-mips/module.h index 399d03f..f615324 100644 --- a/include/asm-mips/module.h +++ b/include/asm-mips/module.h @@ -112,6 +112,8 @@ search_module_dbetables(unsigned long addr) #define MODULE_PROC_FAMILY "RM9000 " #elif defined CONFIG_CPU_SB1 #define MODULE_PROC_FAMILY "SB1 " +#elif defined CONFIG_CPU_LOONGSON2 +#define MODULE_PROC_FAMILY "LOONGSON2 " #else #error MODULE_PROC_FAMILY undefined for your processor configuration #endif -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 05:45:20 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 05:45:24 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:10732 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20022049AbXFFEnG (ORCPT ); Wed, 6 Jun 2007 05:43:06 +0100 Received: (qmail 26319 invoked by uid 511); 6 Jun 2007 04:50:08 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 04:50:08 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH] cheat for support of more than 256MB memory Date: Wed, 6 Jun 2007 12:42:39 +0800 Message-Id: <11811049643791-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811049622818-git-send-email-tiansm@lemote.com> References: <11811049622818-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15268 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- arch/mips/kernel/setup.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 4975da0..62ef100 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -509,6 +509,14 @@ static void __init resource_init(void) res->end = end; res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; +#if defined(CONFIG_LEMOTE_FULONG) && defined(CONFIG_64BIT) + /* to keep memory continous, we tell system 0x10000000 - 0x20000000 is reserved + * for memory, in fact it is io region, don't occupy it + * + * SPARSEMEM? + */ + if (boot_mem_map.map[i].type != BOOT_MEM_RESERVED) +#endif request_resource(&iomem_resource, res); /* -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 05:45:44 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 05:45:47 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:10476 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20022046AbXFFEnH (ORCPT ); Wed, 6 Jun 2007 05:43:07 +0100 Received: (qmail 26294 invoked by uid 511); 6 Jun 2007 04:50:07 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 04:50:07 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH] add Loongson processor definitions Date: Wed, 6 Jun 2007 12:42:34 +0800 Message-Id: <11811049633121-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811049622818-git-send-email-tiansm@lemote.com> References: <11811049622818-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15269 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- include/asm-mips/cpu.h | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletions(-) diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h index d38fdbf..d289359 100644 --- a/include/asm-mips/cpu.h +++ b/include/asm-mips/cpu.h @@ -89,6 +89,8 @@ #define PRID_IMP_34K 0x9500 #define PRID_IMP_24KE 0x9600 #define PRID_IMP_74K 0x9700 +#define PRID_IMP_LOONGSON1 0x4200 +#define PRID_IMP_LOONGSON2 0x6300 /* * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE @@ -200,7 +202,10 @@ #define CPU_SB1A 62 #define CPU_74K 63 #define CPU_R14000 64 -#define CPU_LAST 64 +#define CPU_LOONGSON1 65 +#define CPU_LOONGSON2 66 + +#define CPU_LAST 66 /* * ISA Level encodings -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 05:46:08 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 05:46:11 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:19948 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20022075AbXFFEnz (ORCPT ); Wed, 6 Jun 2007 05:43:55 +0100 Received: (qmail 26261 invoked by uid 511); 6 Jun 2007 04:50:07 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 04:50:07 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Subject: Lemote Loongson 2E patch update Date: Wed, 6 Jun 2007 12:42:27 +0800 Message-Id: <11811049622818-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15270 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips loongson 2e patch updated for 2.6.22-rc4 arch/mips/Kconfig | 37 ++ arch/mips/Makefile | 8 arch/mips/kernel/Makefile | 1 arch/mips/kernel/cpu-probe.c | 9 arch/mips/kernel/proc.c | 2 arch/mips/kernel/setup.c | 9 arch/mips/lemote/lm2e/Makefile | 7 arch/mips/lemote/lm2e/bonito-irq.c | 74 +++++ arch/mips/lemote/lm2e/dbg_io.c | 146 ++++++++++ arch/mips/lemote/lm2e/irq.c | 146 ++++++++++ arch/mips/lemote/lm2e/pci.c | 72 +++++ arch/mips/lemote/lm2e/prom.c | 109 +++++++ arch/mips/lemote/lm2e/reset.c | 49 +++ arch/mips/lemote/lm2e/setup.c | 144 ++++++++++ arch/mips/lib-32/Makefile | 1 arch/mips/lib-64/Makefile | 1 arch/mips/mm/Makefile | 1 arch/mips/mm/c-r4k.c | 58 ++++ arch/mips/mm/tlb-r4k.c | 23 + arch/mips/mm/tlbex.c | 9 arch/mips/pci/Makefile | 2 arch/mips/pci/fixup-lm2e.c | 255 ++++++++++++++++++ arch/mips/pci/ops-lm2e.c | 153 ++++++++++ drivers/char/mem.c | 5 include/asm-mips/addrspace.h | 3 include/asm-mips/bootinfo.h | 7 include/asm-mips/cacheops.h | 5 include/asm-mips/cpu.h | 8 include/asm-mips/mach-lemote/bonito.h | 381 +++++++++++++++++++++++++++ include/asm-mips/mach-lemote/dma-coherence.h | 43 +++ include/asm-mips/mach-lemote/mc146818rtc.h | 37 ++ include/asm-mips/module.h | 3 include/asm-mips/serial.h | 10 33 files changed, 1796 insertions(+), 22 deletions(-) From tiansm@lemote.com Wed Jun 6 05:46:31 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 05:46:35 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:20716 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20022091AbXFFEn6 (ORCPT ); Wed, 6 Jun 2007 05:43:58 +0100 Received: (qmail 26268 invoked by uid 511); 6 Jun 2007 04:50:07 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 04:50:07 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH] arch related Makefile update for lemote fulong mini-PC Date: Wed, 6 Jun 2007 12:42:29 +0800 Message-Id: <11811049632191-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811049622818-git-send-email-tiansm@lemote.com> References: <11811049622818-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15271 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- arch/mips/Makefile | 8 ++++++++ arch/mips/kernel/Makefile | 1 + arch/mips/lib-32/Makefile | 1 + arch/mips/lib-64/Makefile | 1 + arch/mips/mm/Makefile | 1 + arch/mips/pci/Makefile | 1 + 6 files changed, 13 insertions(+), 0 deletions(-) diff --git a/arch/mips/Makefile b/arch/mips/Makefile index f450066..7e59365 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -118,6 +118,7 @@ cflags-$(CONFIG_CPU_R4300) += -march=r4300 -Wa,--trap cflags-$(CONFIG_CPU_VR41XX) += -march=r4100 -Wa,--trap cflags-$(CONFIG_CPU_R4X00) += -march=r4600 -Wa,--trap cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap +cflags-$(CONFIG_CPU_LOONGSON2) += -march=r4600 -Wa,--trap cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \ -Wa,-mips32 -Wa,--trap cflags-$(CONFIG_CPU_MIPS32_R2) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \ @@ -298,6 +299,13 @@ cflags-$(CONFIG_WR_PPMC) += -Iinclude/asm-mips/mach-wrppmc load-$(CONFIG_WR_PPMC) += 0xffffffff80100000 # +# lemote fulong mini-PC board +# +core-$(CONFIG_LEMOTE_FULONG) +=arch/mips/lemote/lm2e/ +load-$(CONFIG_LEMOTE_FULONG) +=0xffffffff80100000 +cflags-$(CONFIG_LEMOTE_FULONG) += -Iinclude/asm-mips/mach-lemote + +# # For all MIPS, Inc. eval boards # core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/ diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index 4924626..40fdf79 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -31,6 +31,7 @@ obj-$(CONFIG_CPU_R10000) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_SB1) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_MIPS32) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_MIPS64) += r4k_fpu.o r4k_switch.o +obj-$(CONFIG_CPU_LOONGSON2) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_R6000) += r6000_fpu.o r4k_switch.o obj-$(CONFIG_SMP) += smp.o diff --git a/arch/mips/lib-32/Makefile b/arch/mips/lib-32/Makefile index 8b94d4c..b4be604 100644 --- a/arch/mips/lib-32/Makefile +++ b/arch/mips/lib-32/Makefile @@ -21,3 +21,4 @@ obj-$(CONFIG_CPU_SB1) += dump_tlb.o obj-$(CONFIG_CPU_TX39XX) += r3k_dump_tlb.o obj-$(CONFIG_CPU_TX49XX) += dump_tlb.o obj-$(CONFIG_CPU_VR41XX) += dump_tlb.o +obj-$(CONFIG_CPU_LOONGSON2) += dump_tlb.o diff --git a/arch/mips/lib-64/Makefile b/arch/mips/lib-64/Makefile index 8b94d4c..b4be604 100644 --- a/arch/mips/lib-64/Makefile +++ b/arch/mips/lib-64/Makefile @@ -21,3 +21,4 @@ obj-$(CONFIG_CPU_SB1) += dump_tlb.o obj-$(CONFIG_CPU_TX39XX) += r3k_dump_tlb.o obj-$(CONFIG_CPU_TX49XX) += dump_tlb.o obj-$(CONFIG_CPU_VR41XX) += dump_tlb.o +obj-$(CONFIG_CPU_LOONGSON2) += dump_tlb.o diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile index 293697b..ab24195 100644 --- a/arch/mips/mm/Makefile +++ b/arch/mips/mm/Makefile @@ -21,6 +21,7 @@ obj-$(CONFIG_CPU_R5432) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o obj-$(CONFIG_CPU_R8000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r8k.o obj-$(CONFIG_CPU_RM7000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o obj-$(CONFIG_CPU_RM9000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o +obj-$(CONFIG_CPU_LOONGSON2) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o obj-$(CONFIG_CPU_SB1) += c-sb1.o cerr-sb1.o cex-sb1.o pg-sb1.o \ tlb-r4k.o obj-$(CONFIG_CPU_TX39XX) += c-tx39.o pg-r4k.o tlb-r3k.o diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index aba3dbf..6396e02 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile @@ -50,3 +50,4 @@ obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-tx4938.o ops-tx4938.o obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o +obj-$(CONFIG_LEMOTE_FULONG) += fixup-lm2e.o ops-lm2e.o -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 05:46:55 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 05:46:58 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:20972 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20022093AbXFFEn6 (ORCPT ); Wed, 6 Jun 2007 05:43:58 +0100 Received: (qmail 26289 invoked by uid 511); 6 Jun 2007 04:50:07 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 04:50:07 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH] define Hit_Invalidate_I to Index_Invalidate_I for loongson2 Date: Wed, 6 Jun 2007 12:42:33 +0800 Message-Id: <11811049634062-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811049622818-git-send-email-tiansm@lemote.com> References: <11811049622818-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15272 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- include/asm-mips/cacheops.h | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/include/asm-mips/cacheops.h b/include/asm-mips/cacheops.h index c4a1ec3..df7f2de 100644 --- a/include/asm-mips/cacheops.h +++ b/include/asm-mips/cacheops.h @@ -20,7 +20,11 @@ #define Index_Load_Tag_D 0x05 #define Index_Store_Tag_I 0x08 #define Index_Store_Tag_D 0x09 +#if defined(CONFIG_CPU_LOONGSON2) +#define Hit_Invalidate_I 0x00 +#else #define Hit_Invalidate_I 0x10 +#endif #define Hit_Invalidate_D 0x11 #define Hit_Writeback_Inv_D 0x15 -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 05:47:19 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 05:47:22 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:21228 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20022095AbXFFEn7 (ORCPT ); Wed, 6 Jun 2007 05:43:59 +0100 Received: (qmail 26300 invoked by uid 511); 6 Jun 2007 04:50:07 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 04:50:07 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Songmao Tian Subject: [PATCH] add serial port definition for lemote fulong Date: Wed, 6 Jun 2007 12:42:36 +0800 Message-Id: <11811049642577-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811049622818-git-send-email-tiansm@lemote.com> References: <11811049622818-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15273 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Songmao Tian Signed-off-by: Fuxin Zhang --- include/asm-mips/serial.h | 9 ++++++++- 1 files changed, 8 insertions(+), 1 deletions(-) diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h index ce51213..1237704 100644 --- a/include/asm-mips/serial.h +++ b/include/asm-mips/serial.h @@ -164,6 +164,12 @@ #define IP32_SERIAL_PORT_DEFNS #endif /* CONFIG_SGI_IP32 */ +#if defined(CONFIG_LEMOTE_FULONG) +#define LEMOTE_FULONG_SERIAL_PORT_DEFNS \ + /* UART CLK PORT IRQ FLAGS */ \ + { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ +#endif + #define SERIAL_PORT_DFNS \ DDB5477_SERIAL_PORT_DEFNS \ EV64120_SERIAL_PORT_DEFNS \ @@ -172,6 +178,7 @@ STD_SERIAL_PORT_DEFNS \ MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ MOMENCO_OCELOT_SERIAL_PORT_DEFNS \ - MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS + MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \ + LEMOTE_FULONG_SERIAL_PORT_DEFNS #endif /* _ASM_SERIAL_H */ -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 05:47:42 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 05:47:46 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:21740 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20022096AbXFFEn7 (ORCPT ); Wed, 6 Jun 2007 05:43:59 +0100 Received: (qmail 26330 invoked by uid 511); 6 Jun 2007 04:50:08 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 04:50:08 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH] tlb handling support for Loongson2 processor Date: Wed, 6 Jun 2007 12:42:41 +0800 Message-Id: <11811049642318-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811049622818-git-send-email-tiansm@lemote.com> References: <11811049622818-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15274 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- arch/mips/mm/tlb-r4k.c | 23 ++++++++++++++++++++++- arch/mips/mm/tlbex.c | 8 +++++--- 2 files changed, 27 insertions(+), 4 deletions(-) diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c index 65160d4..dcd6913 100644 --- a/arch/mips/mm/tlb-r4k.c +++ b/arch/mips/mm/tlb-r4k.c @@ -48,6 +48,22 @@ extern void build_tlb_refill_handler(void); #endif /* CONFIG_MIPS_MT_SMTC */ +#if defined(CONFIG_CPU_LOONGSON2) +/* + * LOONGSON2 has a 4 entry itlb which is a subset of dtlb, + * unfortrunately, itlb is not totally transparent to software. + */ +#define FLUSH_ITLB write_c0_diag(4); + +#define FLUSH_ITLB_VM(vma) { if ((vma)->vm_flags & VM_EXEC) write_c0_diag(4); } + +#else + +#define FLUSH_ITLB +#define FLUSH_ITLB_VM(vma) + +#endif + void local_flush_tlb_all(void) { unsigned long flags; @@ -73,6 +89,7 @@ void local_flush_tlb_all(void) } tlbw_use_hazard(); write_c0_entryhi(old_ctx); + FLUSH_ITLB; EXIT_CRITICAL(flags); } @@ -136,6 +153,7 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, } else { drop_mmu_context(mm, cpu); } + FLUSH_ITLB; EXIT_CRITICAL(flags); } } @@ -178,6 +196,7 @@ void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) } else { local_flush_tlb_all(); } + FLUSH_ITLB; EXIT_CRITICAL(flags); } @@ -210,6 +229,7 @@ void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) finish: write_c0_entryhi(oldpid); + FLUSH_ITLB_VM(vma); EXIT_CRITICAL(flags); } } @@ -241,7 +261,7 @@ void local_flush_tlb_one(unsigned long page) tlbw_use_hazard(); } write_c0_entryhi(oldpid); - + FLUSH_ITLB; EXIT_CRITICAL(flags); } @@ -293,6 +313,7 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte) else tlb_write_indexed(); tlbw_use_hazard(); + FLUSH_ITLB_VM(vma); EXIT_CRITICAL(flags); } diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index e714929..4ec0964 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -893,6 +893,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l, case CPU_4KSC: case CPU_20KC: case CPU_25KF: + case CPU_LOONGSON2: tlbw(p); break; @@ -1276,7 +1277,8 @@ static void __init build_r4000_tlb_refill_handler(void) * need three, with the second nop'ed and the third being * unused. */ -#ifdef CONFIG_32BIT + /* Loongson2 ebase is different than r4k, we have more space */ +#if defined(CONFIG_32BIT) || defined(CONFIG_CPU_LOONGSON2) if ((p - tlb_handler) > 64) panic("TLB refill handler space exceeded"); #else @@ -1289,7 +1291,7 @@ static void __init build_r4000_tlb_refill_handler(void) /* * Now fold the handler in the TLB refill handler space. */ -#ifdef CONFIG_32BIT +#if defined(CONFIG_32BIT) || defined(CONFIG_CPU_LOONGSON2) f = final_handler; /* Simplest case, just copy the handler. */ copy_handler(relocs, labels, tlb_handler, p, f); @@ -1336,7 +1338,7 @@ static void __init build_r4000_tlb_refill_handler(void) final_len); f = final_handler; -#ifdef CONFIG_64BIT +#if defined(CONFIG_64BIT) && !defined(CONFIG_CPU_LOONGSON2) if (final_len > 32) final_len = 64; else -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 05:48:06 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 05:48:12 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:20460 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20022073AbXFFEoB (ORCPT ); Wed, 6 Jun 2007 05:44:01 +0100 Received: (qmail 26263 invoked by uid 511); 6 Jun 2007 04:50:07 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 04:50:07 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Songmao Tian Subject: [PATCH] new files for lemote fulong mini-PC support Date: Wed, 6 Jun 2007 12:42:28 +0800 Message-Id: <1181104963629-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811049622818-git-send-email-tiansm@lemote.com> References: <11811049622818-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15275 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Songmao Tian Signed-off-by: Fuxin Zhang Signed-off-by: Songmao Tian --- arch/mips/lemote/lm2e/Makefile | 7 + arch/mips/lemote/lm2e/bonito-irq.c | 74 +++++ arch/mips/lemote/lm2e/dbg_io.c | 146 ++++++++++ arch/mips/lemote/lm2e/irq.c | 146 ++++++++++ arch/mips/lemote/lm2e/pci.c | 72 +++++ arch/mips/lemote/lm2e/prom.c | 109 ++++++++ arch/mips/lemote/lm2e/reset.c | 49 ++++ arch/mips/lemote/lm2e/setup.c | 144 ++++++++++ arch/mips/pci/fixup-lm2e.c | 255 +++++++++++++++++ arch/mips/pci/ops-lm2e.c | 153 +++++++++++ include/asm-mips/mach-lemote/bonito.h | 381 ++++++++++++++++++++++++++ include/asm-mips/mach-lemote/dma-coherence.h | 43 +++ include/asm-mips/mach-lemote/mc146818rtc.h | 36 +++ 13 files changed, 1615 insertions(+), 0 deletions(-) create mode 100644 arch/mips/lemote/lm2e/Makefile create mode 100644 arch/mips/lemote/lm2e/bonito-irq.c create mode 100644 arch/mips/lemote/lm2e/dbg_io.c create mode 100644 arch/mips/lemote/lm2e/irq.c create mode 100644 arch/mips/lemote/lm2e/pci.c create mode 100644 arch/mips/lemote/lm2e/prom.c create mode 100644 arch/mips/lemote/lm2e/reset.c create mode 100644 arch/mips/lemote/lm2e/setup.c create mode 100644 arch/mips/pci/fixup-lm2e.c create mode 100644 arch/mips/pci/ops-lm2e.c create mode 100644 include/asm-mips/mach-lemote/bonito.h create mode 100644 include/asm-mips/mach-lemote/dma-coherence.h create mode 100644 include/asm-mips/mach-lemote/mc146818rtc.h diff --git a/arch/mips/lemote/lm2e/Makefile b/arch/mips/lemote/lm2e/Makefile new file mode 100644 index 0000000..0ba6f12 --- /dev/null +++ b/arch/mips/lemote/lm2e/Makefile @@ -0,0 +1,7 @@ +# +# Makefile for Lemote Fulong mini-PC board. +# + +obj-y += setup.o prom.o reset.o irq.o pci.o bonito-irq.o dbg_io.o +EXTRA_AFLAGS := $(CFLAGS) + diff --git a/arch/mips/lemote/lm2e/bonito-irq.c b/arch/mips/lemote/lm2e/bonito-irq.c new file mode 100644 index 0000000..e7decd3 --- /dev/null +++ b/arch/mips/lemote/lm2e/bonito-irq.c @@ -0,0 +1,74 @@ +/* + * Copyright 2001 MontaVista Software Inc. + * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net + * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org) + * + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ +#include +#include +#include +#include +#include +#include + +#include + + +static inline void bonito_irq_enable(unsigned int irq) +{ + BONITO_INTENSET = (1 << (irq - BONITO_IRQ_BASE)); + mmiowb(); +} + +static inline void bonito_irq_disable(unsigned int irq) +{ + BONITO_INTENCLR = (1 << (irq - BONITO_IRQ_BASE)); + mmiowb(); +} + +static struct irq_chip bonito_irq_type = { + .name = "bonito_irq", + .ack = bonito_irq_disable, + .mask = bonito_irq_disable, + .mask_ack = bonito_irq_disable, + .unmask = bonito_irq_enable, +}; + +static struct irqaction dma_timeout_irqaction = { + .handler = no_action, + .name = "dma_timeout", +}; + +void bonito_irq_init(void) +{ + u32 i; + + for (i = BONITO_IRQ_BASE; i < BONITO_IRQ_BASE + 32; i++) { + set_irq_chip_and_handler(i, &bonito_irq_type, handle_level_irq); + } + + setup_irq(BONITO_IRQ_BASE + 10, &dma_timeout_irqaction); +} diff --git a/arch/mips/lemote/lm2e/dbg_io.c b/arch/mips/lemote/lm2e/dbg_io.c new file mode 100644 index 0000000..b82d34a --- /dev/null +++ b/arch/mips/lemote/lm2e/dbg_io.c @@ -0,0 +1,146 @@ +/* + * Copyright 2001 MontaVista Software Inc. + * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net + * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org) + * + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ + +#include +#include +#include /* For the serial port location and base baud */ + +#define UART16550_BAUD_2400 2400 +#define UART16550_BAUD_4800 4800 +#define UART16550_BAUD_9600 9600 +#define UART16550_BAUD_19200 19200 +#define UART16550_BAUD_38400 38400 +#define UART16550_BAUD_57600 57600 +#define UART16550_BAUD_115200 115200 + +#define UART16550_PARITY_NONE 0 +#define UART16550_PARITY_ODD 0x08 +#define UART16550_PARITY_EVEN 0x18 +#define UART16550_PARITY_MARK 0x28 +#define UART16550_PARITY_SPACE 0x38 + +#define UART16550_DATA_5BIT 0x0 +#define UART16550_DATA_6BIT 0x1 +#define UART16550_DATA_7BIT 0x2 +#define UART16550_DATA_8BIT 0x3 + +#define UART16550_STOP_1BIT 0x0 +#define UART16550_STOP_2BIT 0x4 + +/* ----------------------------------------------------- */ + +/* === CONFIG === */ +#ifdef CONFIG_64BIT +#define BASE (0xffffffffbfd003f8) +#else +#define BASE (0xbfd003f8) +#endif + +#define MAX_BAUD BASE_BAUD +/* === END OF CONFIG === */ + +#define REG_OFFSET 1 + +/* register offset */ +#define OFS_RCV_BUFFER 0 +#define OFS_TRANS_HOLD 0 +#define OFS_SEND_BUFFER 0 +#define OFS_INTR_ENABLE (1*REG_OFFSET) +#define OFS_INTR_ID (2*REG_OFFSET) +#define OFS_DATA_FORMAT (3*REG_OFFSET) +#define OFS_LINE_CONTROL (3*REG_OFFSET) +#define OFS_MODEM_CONTROL (4*REG_OFFSET) +#define OFS_RS232_OUTPUT (4*REG_OFFSET) +#define OFS_LINE_STATUS (5*REG_OFFSET) +#define OFS_MODEM_STATUS (6*REG_OFFSET) +#define OFS_RS232_INPUT (6*REG_OFFSET) +#define OFS_SCRATCH_PAD (7*REG_OFFSET) + +#define OFS_DIVISOR_LSB (0*REG_OFFSET) +#define OFS_DIVISOR_MSB (1*REG_OFFSET) + +/* memory-mapped read/write of the port */ +#define UART16550_READ(y) (*((volatile u8*)(BASE + y))) +#define UART16550_WRITE(y, z) ((*((volatile u8*)(BASE + y))) = z) + +void debugInit(u32 baud, u8 data, u8 parity, u8 stop) +{ + /* disable interrupts */ + UART16550_WRITE(OFS_INTR_ENABLE, 0); + + /* set up buad rate */ + { + u32 divisor; + + /* set DIAB bit */ + UART16550_WRITE(OFS_LINE_CONTROL, 0x80); + + /* set divisor */ + divisor = MAX_BAUD / baud; + UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff); + UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8); + + /* clear DIAB bit */ + UART16550_WRITE(OFS_LINE_CONTROL, 0x0); + } + + /* set data format */ + UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop); +} + +static int remoteDebugInitialized = 0; + +u8 getDebugChar(void) +{ + if (!remoteDebugInitialized) { + remoteDebugInitialized = 1; + debugInit(UART16550_BAUD_115200, + UART16550_DATA_8BIT, + UART16550_PARITY_NONE, UART16550_STOP_1BIT); + } + + while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0) ; + return UART16550_READ(OFS_RCV_BUFFER); +} + +int putDebugChar(u8 byte) +{ + if (!remoteDebugInitialized) { + remoteDebugInitialized = 1; + /* + debugInit(UART16550_BAUD_115200, + UART16550_DATA_8BIT, + UART16550_PARITY_NONE, UART16550_STOP_1BIT); */ + } + + while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0) ; + UART16550_WRITE(OFS_SEND_BUFFER, byte); + return 1; +} diff --git a/arch/mips/lemote/lm2e/irq.c b/arch/mips/lemote/lm2e/irq.c new file mode 100644 index 0000000..1f31ec9 --- /dev/null +++ b/arch/mips/lemote/lm2e/irq.c @@ -0,0 +1,146 @@ +/* + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +/* + * the first level int-handler will jump here if it is a bonito irq + */ +static void bonito_irqdispatch(void) +{ + u32 int_status; + int i; + + /* workaround the IO dma problem: let cpu looping to allow DMA finish */ + int_status = BONITO_INTISR; + if (int_status & (1 << 10)) { + while (int_status & (1 << 10)) { + udelay(1); + int_status = BONITO_INTISR; + } + } + + /* Get pending sources, masked by current enables */ + int_status = BONITO_INTISR & BONITO_INTEN; + + if (int_status != 0) { + i = __ffs(int_status); + int_status &= ~(1 << i); + do_IRQ(i +BONITO_IRQ_BASE); + } + return; +} + +static void i8259_irqdispatch(void) +{ + int irq; + + irq = i8259_irq(); + if (irq >= 0) { + do_IRQ(irq); + } else { + spurious_interrupt(); + } + +} + +asmlinkage void plat_irq_dispatch(void) +{ + unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM; + + if (pending & CAUSEF_IP7) { + do_IRQ(MIPS_CPU_IRQ_BASE + 7); + } else if (pending & CAUSEF_IP5) { + i8259_irqdispatch(); + } else if (pending & CAUSEF_IP2) { + bonito_irqdispatch(); + } else { + spurious_interrupt(); + } +} + +static struct irqaction cascade_irqaction = { + .handler = no_action, + .mask = CPU_MASK_NONE, + .name = "cascade", +}; + +void __init arch_init_irq(void) +{ + extern void bonito_irq_init(void); + + printk(KERN_INFO"arch init irq\n"); + /* + * Clear all of the interrupts while we change the able around a bit. + * int-handler is not on bootstrap + */ + clear_c0_status(ST0_IM | ST0_BEV); + local_irq_disable(); + + /* most bonito irq should be level triggered */ + BONITO_INTEDGE = BONITO_ICU_SYSTEMERR | BONITO_ICU_MASTERERR + | BONITO_ICU_RETRYERR | BONITO_ICU_MBOXES; + BONITO_INTSTEER = 0; + + /* + * Mask out all interrupt by writing "1" to all bit position in + * the interrupt reset reg. + */ + BONITO_INTENCLR = ~0; + + /* init all controller + * 0-15 ------> i8259 interrupt + * 16-23 ------> mips cpu interrupt + * 32-63 ------> bonito irq + */ + + /* Sets the first-level interrupt dispatcher. */ + mips_cpu_irq_init(); + init_i8259_irqs(); + bonito_irq_init(); + + /* + printk("GPIODATA=%x, GPIOIE=%x\n", BONITO_GPIODATA, BONITO_GPIOIE); + printk("INTEN=%x, INTSET=%x, INTCLR=%x, INTISR=%x\n", + BONITO_INTEN, BONITO_INTENSET, + BONITO_INTENCLR, BONITO_INTISR); + */ + + /* bonito irq at IP2 */ + setup_irq(MIPS_CPU_IRQ_BASE + 2, &cascade_irqaction); + /* 8259 irq at IP5 */ + setup_irq(MIPS_CPU_IRQ_BASE + 5, &cascade_irqaction); + +} diff --git a/arch/mips/lemote/lm2e/pci.c b/arch/mips/lemote/lm2e/pci.c new file mode 100644 index 0000000..e9c5ce2 --- /dev/null +++ b/arch/mips/lemote/lm2e/pci.c @@ -0,0 +1,72 @@ +/* + * pci.c + * + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ +#include +#include +#include +#include + +extern struct pci_ops loongson2e_pci_pci_ops; + +static struct resource loongson2e_pci_mem_resource = { + .name = "LOONGSON2E PCI MEM", + .start = 0x14000000UL, + .end = 0x1fffffffUL, + .flags = IORESOURCE_MEM, +}; + +static struct resource loongson2e_pci_io_resource = { + .name = "LOONGSON2E PCI IO MEM", + .start = 0x00004000UL, + .end = 0x1fffffffUL, + .flags = IORESOURCE_IO, +}; + + +static struct pci_controller loongson2e_pci_controller = { + .pci_ops = &loongson2e_pci_pci_ops, + .io_resource = &loongson2e_pci_io_resource, + .mem_resource = &loongson2e_pci_mem_resource, + .mem_offset = 0x00000000UL, + .io_offset = 0x00000000UL, +}; + + +static int __init pcibios_init(void) +{ + extern int pci_probe_only; + pci_probe_only = 0; + +#ifdef CONFIG_TRACE_BOOT + printk(KERN_INFO"arch_initcall:pcibios_init\n"); + printk(KERN_INFO"register_pci_controller : %x\n",&loongson2e_pci_controller); +#endif + register_pci_controller(&loongson2e_pci_controller); + return 0; +} + +arch_initcall(pcibios_init); diff --git a/arch/mips/lemote/lm2e/prom.c b/arch/mips/lemote/lm2e/prom.c new file mode 100644 index 0000000..6704ca0 --- /dev/null +++ b/arch/mips/lemote/lm2e/prom.c @@ -0,0 +1,109 @@ +/* + * Based on Ocelot Linux port, which is + * Copyright 2001 MontaVista Software Inc. + * Author: jsun@mvista.com or jsun@junsun.net + * + * Copyright 2003 ICT CAS + * Author: Michael Guo + * + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#include +#include +#include +#include + +#include +#include + +extern unsigned long bus_clock; +extern unsigned long cpu_clock; +extern unsigned int memsize, highmemsize; +extern int putDebugChar(unsigned char byte); + +static int argc; +/* pmon passes arguments in 32bit pointers */ +static int *arg; +static int *env; + +const char *get_system_type(void) +{ + return "lemote-fulong"; +} + +void __init prom_init_cmdline(void) +{ + int i; + long l; + + /* arg[0] is "g", the rest is boot parameters */ + arcs_cmdline[0] = '\0'; + for (i = 1; i < argc; i++) { + l = (long)arg[i]; + if (strlen(arcs_cmdline) + strlen(((char *)l) + 1) + >= sizeof(arcs_cmdline)) + break; + strcat(arcs_cmdline, ((char *)l)); + strcat(arcs_cmdline, " "); + } +} + +void __init prom_init(void) +{ + long l; + argc = fw_arg0; + arg = (int *)fw_arg1; + env = (int *)fw_arg2; + + mips_machgroup = MACH_GROUP_LEMOTE; + mips_machtype = MACH_LEMOTE_FULONG; + + prom_init_cmdline(); + + if ((strstr(arcs_cmdline, "console=")) == NULL) + strcat(arcs_cmdline, " console=ttyS0,115200"); + if ((strstr(arcs_cmdline, "root=")) == NULL) + strcat(arcs_cmdline, " root=/dev/hda1"); + + l = (long)*env; + while (l != 0) { + if (strncmp("busclock", (char *)l, strlen("busclock")) == 0) { + bus_clock = simple_strtol((char *)l + strlen("busclock="), + NULL, 10); + } + if (strncmp("cpuclock", (char *)l, strlen("cpuclock")) == 0) { + cpu_clock = simple_strtol((char *)l + strlen("cpuclock="), + NULL, 10); + } + if (strncmp("memsize", (char *)l, strlen("memsize")) == 0) { + memsize = simple_strtol((char *)l + strlen("memsize="), + NULL, 10); + } + if (strncmp("highmemsize", (char *)l, strlen("highmemsize")) == 0) { + highmemsize = simple_strtol((char *)l + strlen("highmemsize="), + NULL, 10); + } + env++; + l = (long)*env; + } + if (memsize == 0) + memsize = 256; + + printk("busclock=%ld, cpuclock=%ld,memsize=%d,highmemsize=%d\n", + bus_clock, cpu_clock, memsize, highmemsize); +} + +void __init prom_free_prom_memory(void) +{ +} + +void prom_putchar(char c) +{ + putDebugChar(c); +} diff --git a/arch/mips/lemote/lm2e/reset.c b/arch/mips/lemote/lm2e/reset.c new file mode 100644 index 0000000..ec1b08c --- /dev/null +++ b/arch/mips/lemote/lm2e/reset.c @@ -0,0 +1,49 @@ +/* + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +static void loongson2e_restart(char *command) +{ +#ifdef CONFIG_32BIT + *(unsigned long *)0xbfe00104 &= ~(1 << 2); + *(unsigned long *)0xbfe00104 |= (1 << 2); +#else + *(unsigned long *)0xffffffffbfe00104 &= ~(1 << 2); + *(unsigned long *)0xffffffffbfe00104 |= (1 << 2); +#endif + __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000)); +} + +static void loongson2e_halt(void) +{ + while (1) ; +} + +static void loongson2e_power_off(void) +{ + loongson2e_halt(); +} + +void mips_reboot_setup(void) +{ + _machine_restart = loongson2e_restart; + _machine_halt = loongson2e_halt; + pm_power_off = loongson2e_power_off; +} diff --git a/arch/mips/lemote/lm2e/setup.c b/arch/mips/lemote/lm2e/setup.c new file mode 100644 index 0000000..3030518 --- /dev/null +++ b/arch/mips/lemote/lm2e/setup.c @@ -0,0 +1,144 @@ +/* + * BRIEF MODULE DESCRIPTION + * setup.c - board dependent boot routines + * + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#ifdef CONFIG_VT +#include +#include +#endif + +extern void mips_reboot_setup(void); + +#ifdef CONFIG_64BIT +#define PTR_PAD(p) ((0xffffffff00000000)|((unsigned long long)(p))) +#else +#define PTR_PAD(p) (p) +#endif + +unsigned long cpu_clock; +unsigned long bus_clock; +unsigned int memsize; +unsigned int highmemsize = 0; + +void __init plat_timer_setup(struct irqaction *irq) +{ + setup_irq(MIPS_CPU_IRQ_BASE + 7, irq); +} + +static void __init loongson2e_time_init(void) +{ + /* setup mips r4k timer */ + mips_hpt_frequency = cpu_clock / 2; +} + +static unsigned long __init mips_rtc_get_time(void) +{ + return mc146818_get_cmos_time(); +} + +void (*__wbflush) (void); +static void wbflush_loongson2e(void) +{ + asm(".set\tpush\n\t" + ".set\tnoreorder\n\t" + ".set mips3\n\t" + "sync\n\t" + "nop\n\t" + ".set\tpop\n\t" + ".set mips0\n\t"); +} + +void __init plat_mem_setup(void) +{ + set_io_port_base(PTR_PAD(0xbfd00000)); + + ioport_resource.start = 0; + ioport_resource.end = 0xffffffff; + iomem_resource.start = 0; + iomem_resource.end = 0xffffffff; + + mips_reboot_setup(); + + board_time_init = loongson2e_time_init; + rtc_mips_get_time = mips_rtc_get_time; + + __wbflush = wbflush_loongson2e; + + //add_memory_region(0x100000, (memsize<<20) - 0x100000, BOOT_MEM_RAM); + add_memory_region(0x0, (memsize << 20), BOOT_MEM_RAM); +#ifdef CONFIG_64BIT + if (highmemsize > 0) { + add_memory_region(0x10000000, 0x10000000, BOOT_MEM_RESERVED); + add_memory_region(0x20000000, highmemsize << 20, BOOT_MEM_RAM); + } +#endif + +#ifdef CONFIG_VT +#if defined(CONFIG_VGA_CONSOLE) + conswitchp = &vga_con; + + screen_info = (struct screen_info) { + 0, 25, /* orig-x, orig-y */ + 0, /* unused */ + 0, /* orig-video-page */ + 0, /* orig-video-mode */ + 80, /* orig-video-cols */ + 0, 0, 0, /* ega_ax, ega_bx, ega_cx */ + 25, /* orig-video-lines */ + VIDEO_TYPE_VGAC, /* orig-video-isVGA */ + 16 /* orig-video-points */ + }; +#elif defined(CONFIG_DUMMY_CONSOLE) + conswitchp = &dummy_con; +#endif +#endif + +} + +#include +EXPORT_SYMBOL(__wbflush); + diff --git a/arch/mips/pci/fixup-lm2e.c b/arch/mips/pci/fixup-lm2e.c new file mode 100644 index 0000000..e9ae996 --- /dev/null +++ b/arch/mips/pci/fixup-lm2e.c @@ -0,0 +1,255 @@ +/* + * fixup-lm2e.c + * + * Copyright (C) 2004 ICT CAS + * Author: Li xiaoyu, ICT CAS + * lixy@ict.ac.cn + * + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ +#include +#include +#include + +int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + unsigned int val; + if (PCI_SLOT(dev->devfn) == 4) { /* wireless card(notebook) */ + dev->irq = BONITO_IRQ_BASE + 26; + return dev->irq; + } else if (PCI_SLOT(dev->devfn) == 5) { /* via686b */ + switch (PCI_FUNC(dev->devfn)) { + case 2: + dev->irq = 10; + break; + case 3: + dev->irq = 11; + break; + case 5: + dev->irq = 9; + break; + } + return dev->irq; + } else if (PCI_SLOT(dev->devfn) == 6) { /* radeon 7000 */ + dev->irq = BONITO_IRQ_BASE + 27; + return dev->irq; + } else if (PCI_SLOT(dev->devfn) == 7) { /* 8139 */ + dev->irq = BONITO_IRQ_BASE + 26; + return dev->irq; + } else if (PCI_SLOT(dev->devfn) == 8) { /* nec usb */ + switch (PCI_FUNC(dev->devfn)) { + case 0: + dev->irq = BONITO_IRQ_BASE + 26; + break; + case 1: + dev->irq = BONITO_IRQ_BASE + 27; + break; + case 2: + dev->irq = BONITO_IRQ_BASE + 28; + break; + } + pci_read_config_dword(dev, 0xe0, &val); + pci_write_config_dword(dev, 0xe0, (val & ~7) | 0x4); + pci_write_config_dword(dev, 0xe4, 1 << 5); + return dev->irq; + } else + return 0; +} + +/* Do platform specific device initialization at pci_enable_device() time */ +int pcibios_plat_dev_init(struct pci_dev *dev) +{ + return 0; +} + +static void __init loongson2e_686b_func0_fixup(struct pci_dev *pdev) +{ + unsigned char c; + + printk(KERN_INFO"via686b fix: ISA bridge\n"); + + /* Enable I/O Recovery time */ + pci_write_config_byte(pdev, 0x40, 0x08); + + /* Enable ISA refresh */ + pci_write_config_byte(pdev, 0x41, 0x01); + + /* disable ISA line buffer */ + pci_write_config_byte(pdev, 0x45, 0x00); + + /* Gate INTR, and flush line buffer */ + pci_write_config_byte(pdev, 0x46, 0xe0); + + /* Disable PCI Delay Transaction, Enable EISA ports 4D0/4D1. */ + //pci_write_config_byte(pdev, 0x47, 0x20); + /* enable PCI Delay Transaction, Enable EISA ports 4D0/4D1. + * enable time-out timer + */ + pci_write_config_byte(pdev, 0x47, 0xe6); + + /* enable level trigger on pci irqs: 9,10,11,13 */ + /* important! without this PCI interrupts won't work */ + outb(0x2e, 0x4d1); + + /* 512 K PCI Decode */ + pci_write_config_byte(pdev, 0x48, 0x01); + + /* Wait for PGNT before grant to ISA Master/DMA */ + pci_write_config_byte(pdev, 0x4a, 0x84); + + /* Plug'n'Play */ + /* Parallel DRQ 3, Floppy DRQ 2 (default) */ + pci_write_config_byte(pdev, 0x50, 0x0e); + + /* IRQ Routing for Floppy and Parallel port */ + /* IRQ 6 for floppy, IRQ 7 for parallel port */ + pci_write_config_byte(pdev, 0x51, 0x76); + + /* IRQ Routing for serial ports (take IRQ 3 and 4) */ + pci_write_config_byte(pdev, 0x52, 0x34); + + /* All IRQ's level triggered. */ + pci_write_config_byte(pdev, 0x54, 0x00); + + /* route PIRQA-D irq */ + pci_write_config_byte(pdev, 0x55, 0x90); /* bit 7-4, PIRQA */ + pci_write_config_byte(pdev, 0x56, 0xba); /* bit 7-4, PIRQC; 3-0, PIRQB */ + pci_write_config_byte(pdev, 0x57, 0xd0); /* bit 7-4, PIRQD */ + + /* enable function 5/6, audio/modem */ + pci_read_config_byte(pdev, 0x85, &c); + c &= ~(0x3 << 2); + pci_write_config_byte(pdev, 0x85, c); + + printk(KERN_INFO"via686b fix: ISA bridge done\n"); +} + +static void __init loongson2e_686b_func1_fixup(struct pci_dev *pdev) +{ + printk(KERN_INFO"via686b fix: IDE\n"); + + /* Modify IDE controller setup */ + pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 48); + pci_write_config_byte(pdev, PCI_COMMAND, + PCI_COMMAND_IO | PCI_COMMAND_MEMORY | + PCI_COMMAND_MASTER); + pci_write_config_byte(pdev, 0x40, 0x0b); + /* legacy mode */ + pci_write_config_byte(pdev, 0x42, 0x09); + +#if 1/* play safe, otherwise we may see notebook's usb keyboard lockup */ + /* disable read prefetch/write post buffers */ + pci_write_config_byte(pdev, 0x41, 0x02); + + /* use 3/4 as fifo thresh hold */ + pci_write_config_byte(pdev, 0x43, 0x0a); + pci_write_config_byte(pdev, 0x44, 0x00); + + pci_write_config_byte(pdev, 0x45, 0x00); +#else + pci_write_config_byte(pdev, 0x41, 0xc2); + pci_write_config_byte(pdev, 0x43, 0x35); + pci_write_config_byte(pdev, 0x44, 0x1c); + + pci_write_config_byte(pdev, 0x45, 0x10); +#endif + + printk(KERN_INFO"via686b fix: IDE done\n"); +} + +static void __init loongson2e_686b_func5_fixup(struct pci_dev *pdev) +{ + unsigned int val; + unsigned char c; + + /* enable IO */ + pci_write_config_byte(pdev, PCI_COMMAND, + PCI_COMMAND_IO | PCI_COMMAND_MEMORY | + PCI_COMMAND_MASTER); + pci_read_config_dword(pdev, 0x4, &val); + pci_write_config_dword(pdev, 0x4, val | 1); + + /* route ac97 IRQ */ + pci_write_config_byte(pdev, 0x3c, 9); + pdev->irq = 9; + printk(KERN_INFO"ac97 interrupt = 9\n"); + + pci_read_config_byte(pdev, 0x8, &c); + printk(KERN_INFO"ac97 rev=%d\n", c); + + /* link control: enable link & SGD PCM output */ + pci_write_config_byte(pdev, 0x41, 0xcc); + + /* disable game port, FM, midi, sb, enable write to reg2c-2f */ + pci_write_config_byte(pdev, 0x42, 0x20); + + printk(KERN_INFO"Setting sub-vendor ID & device ID\n"); + + /* we are using Avance logic codec */ + pci_write_config_word(pdev, 0x2c, 0x1005); + pci_write_config_word(pdev, 0x2e, 0x4710); + pci_read_config_dword(pdev, 0x2c, &val); + printk(KERN_INFO"sub vendor-device id=%x\n", val); + + pci_write_config_byte(pdev, 0x42, 0x0); +} + +static void __init loongson2e_fixup_pcimap(struct pci_dev *pdev) +{ + static int first = 1; + + (void)pdev; + if (first) + first = 0; + else + return; + + /* local to PCI mapping: [256M,512M] -> [256M,512M]; differ from pmon */ + /* + * cpu address space [256M,448M] is window for accessing pci space + * we set pcimap_lo[0,1,2] to map it to pci space [256M,448M] + * pcimap: bit18,pcimap_2; bit[17-12],lo2;bit[11-6],lo1;bit[5-0],lo0 + */ + /* 1,00 0110 ,0001 01,00 0000 */ + BONITO_PCIMAP = 0x46140; + //1, 00 0010, 0000,01, 00 0000 + //BONITO_PCIMAP = 0x42040; + + /* + * PCI to local mapping: [2G,2G+256M] -> [0,256M] + */ + BONITO_PCIBASE0 = 0x80000000; + BONITO_PCIBASE1 = 0x00800000; + BONITO_PCIBASE2 = 0x90000000; + +} + +DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, loongson2e_fixup_pcimap); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, + loongson2e_686b_func0_fixup); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, + loongson2e_686b_func1_fixup); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_5, + loongson2e_686b_func5_fixup); diff --git a/arch/mips/pci/ops-lm2e.c b/arch/mips/pci/ops-lm2e.c new file mode 100644 index 0000000..87497e8 --- /dev/null +++ b/arch/mips/pci/ops-lm2e.c @@ -0,0 +1,153 @@ +/* + * ops-lm2e.c + * + * Copyright (C) 2004 ICT CAS + * Author: Li xiaoyu, ICT CAS + * lixy@ict.ac.cn + * + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ + +#include +#include +#include + +#include + +#define PCI_ACCESS_READ 0 +#define PCI_ACCESS_WRITE 1 + +static inline void bflush(void) +{ + /* flush Bonito register writes */ + (void)BONITO_PCICMD; +} + +static int lm2e_pci_config_access(unsigned char access_type, + struct pci_bus *bus, unsigned int devfn, + int where, u32 *data) +{ + u32 busnum = bus->number; + u32 addr, type; + void *addrp; + int device = PCI_SLOT(devfn); + int function = PCI_FUNC(devfn); + int reg = where & ~3; + + if (busnum == 0) { + /* Type 0 configuration on onboard PCI bus */ + if (device > 20 || function > 7) { + *data = -1; /* device out of range */ + return PCIBIOS_DEVICE_NOT_FOUND; + } + addr = (1 << (device + 11)) | (function << 8) | reg; + type = 0; + } else { + /* Type 1 configuration on offboard PCI bus */ + if (device > 31 || function > 7) { + *data = -1; /* device out of range */ + return PCIBIOS_DEVICE_NOT_FOUND; + } + addr = (busnum << 16) | (device << 11) | (function << 8) | reg; + type = 0x10000; + } + + /* clear aborts */ + BONITO_PCICMD |= BONITO_PCICMD_MABORT | BONITO_PCICMD_MTABORT; + + BONITO_PCIMAP_CFG = (addr >> 16) | type; + bflush(); + + addrp = (void *)CKSEG1ADDR(BONITO_PCICFG_BASE | (addr & 0xffff)); + if (access_type == PCI_ACCESS_WRITE) { + *(volatile unsigned int *)addrp = cpu_to_le32(*data); + } else { + *data = le32_to_cpu(*(volatile unsigned int *)addrp); + } + if (BONITO_PCICMD & (BONITO_PCICMD_MABORT | BONITO_PCICMD_MTABORT)) { + BONITO_PCICMD |= BONITO_PCICMD_MABORT | BONITO_PCICMD_MTABORT; + *data = -1; + return PCIBIOS_DEVICE_NOT_FOUND; + } + + return PCIBIOS_SUCCESSFUL; + +} + +static int lm2e_pci_pcibios_read(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 * val) +{ + u32 data = 0; + + int ret = lm2e_pci_config_access(PCI_ACCESS_READ, + bus, devfn, where, &data); + + if (ret != PCIBIOS_SUCCESSFUL) + return ret; + + if (size == 1) + *val = (data >> ((where & 3) << 3)) & 0xff; + else if (size == 2) + *val = (data >> ((where & 3) << 3)) & 0xffff; + else + *val = data; + + return PCIBIOS_SUCCESSFUL; +} + +static int lm2e_pci_pcibios_write(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 val) +{ + u32 data = 0; + int ret; + + if (size == 4) + data = val; + else { + ret = lm2e_pci_config_access(PCI_ACCESS_READ, + bus, devfn, where, &data); + if (ret != PCIBIOS_SUCCESSFUL) + return ret; + + if (size == 1) + data = (data & ~(0xff << ((where & 3) << 3))) | + (val << ((where & 3) << 3)); + else if (size == 2) + data = (data & ~(0xffff << ((where & 3) << 3))) | + (val << ((where & 3) << 3)); + } + + ret = lm2e_pci_config_access(PCI_ACCESS_WRITE, + bus, devfn, where, &data); + if (ret != PCIBIOS_SUCCESSFUL) + return ret; + + return PCIBIOS_SUCCESSFUL; +} + +struct pci_ops loongson2e_pci_pci_ops = { + .read = lm2e_pci_pcibios_read, + .write = lm2e_pci_pcibios_write +}; diff --git a/include/asm-mips/mach-lemote/bonito.h b/include/asm-mips/mach-lemote/bonito.h new file mode 100644 index 0000000..83f7ac3 --- /dev/null +++ b/include/asm-mips/mach-lemote/bonito.h @@ -0,0 +1,381 @@ +/* + * Based on Algorithmics header + */ + +#ifndef _BONITO_H +#define _BONITI_H + +#ifdef __ASSEMBLER__ + +/* offsets from base register */ +#define BONITO(x) (x) + +#else /* !__ASSEMBLER */ + +/* offsets from base pointer */ +#define BONITO(x) *(volatile u32 *)((char *)CKSEG1ADDR(BONITO_REG_BASE) + (x)) + +#endif /* __ASSEMBLER__ */ + +#define BONITO_BOOT_BASE 0x1fc00000 +#define BONITO_BOOT_SIZE 0x00100000 +#define BONITO_BOOT_TOP (BONITO_BOOT_BASE+BONITO_BOOT_SIZE-1) +#define BONITO_FLASH_BASE 0x1c000000 +#define BONITO_FLASH_SIZE 0x03000000 +#define BONITO_FLASH_TOP (BONITO_FLASH_BASE+BONITO_FLASH_SIZE-1) +#define BONITO_SOCKET_BASE 0x1f800000 +#define BONITO_SOCKET_SIZE 0x00400000 +#define BONITO_SOCKET_TOP (BONITO_SOCKET_BASE+BONITO_SOCKET_SIZE-1) +#define BONITO_REG_BASE 0x1fe00000 +#define BONITO_REG_SIZE 0x00040000 +#define BONITO_REG_TOP (BONITO_REG_BASE+BONITO_REG_SIZE-1) +#define BONITO_DEV_BASE 0x1ff00000 +#define BONITO_DEV_SIZE 0x00100000 +#define BONITO_DEV_TOP (BONITO_DEV_BASE+BONITO_DEV_SIZE-1) +#define BONITO_PCILO_BASE 0x10000000 +#define BONITO_PCILO_SIZE 0x0c000000 +#define BONITO_PCILO_TOP (BONITO_PCILO_BASE+BONITO_PCILO_SIZE-1) +#define BONITO_PCILO0_BASE 0x10000000 +#define BONITO_PCILO1_BASE 0x14000000 +#define BONITO_PCILO2_BASE 0x18000000 +#define BONITO_PCIHI_BASE 0x20000000 +#define BONITO_PCIHI_SIZE 0x20000000 +#define BONITO_PCIHI_TOP (BONITO_PCIHI_BASE+BONITO_PCIHI_SIZE-1) +#define BONITO_PCIIO_BASE 0x1fd00000 +#define BONITO_PCIIO_SIZE 0x00100000 +#define BONITO_PCIIO_TOP (BONITO_PCIIO_BASE+BONITO_PCIIO_SIZE-1) +#define BONITO_PCICFG_BASE 0x1fe80000 +#define BONITO_PCICFG_SIZE 0x00080000 +#define BONITO_PCICFG_TOP (BONITO_PCICFG_BASE+BONITO_PCICFG_SIZE-1) + +/* Bonito Register Bases */ + +#define BONITO_PCICONFIGBASE 0x00 +#define BONITO_REGBASE 0x100 + +/* PCI Configuration Registers */ + +#define BONITO_PCI_REG(x) BONITO(BONITO_PCICONFIGBASE + (x)) +#define BONITO_PCIDID BONITO_PCI_REG(0x00) +#define BONITO_PCICMD BONITO_PCI_REG(0x04) +#define BONITO_PCICLASS BONITO_PCI_REG(0x08) +#define BONITO_PCILTIMER BONITO_PCI_REG(0x0c) +#define BONITO_PCIBASE0 BONITO_PCI_REG(0x10) +#define BONITO_PCIBASE1 BONITO_PCI_REG(0x14) +#define BONITO_PCIBASE2 BONITO_PCI_REG(0x18) +#define BONITO_PCIEXPRBASE BONITO_PCI_REG(0x30) +#define BONITO_PCIINT BONITO_PCI_REG(0x3c) + +#define BONITO_PCICMD_PERR 0x80000000 +#define BONITO_PCICMD_SERR 0x40000000 +#define BONITO_PCICMD_MABORT 0x20000000 +#define BONITO_PCICMD_MTABORT 0x10000000 +#define BONITO_PCICMD_TABORT 0x08000000 +#define BONITO_PCICMD_MPERR 0x01000000 +#define BONITO_PCICMD_PERRRESPEN 0x00000040 +#define BONITO_PCICMD_ASTEPEN 0x00000080 +#define BONITO_PCICMD_SERREN 0x00000100 +#define BONITO_PCILTIMER_BUSLATENCY 0x0000ff00 +#define BONITO_PCILTIMER_BUSLATENCY_SHIFT 8 + +/* 1. Bonito h/w Configuration */ +/* Power on register */ + +#define BONITO_BONPONCFG BONITO(BONITO_REGBASE + 0x00) + +#define BONITO_BONPONCFG_SYSCONTROLLERRD 0x00040000 +#define BONITO_BONPONCFG_ROMCS1SAMP 0x00020000 +#define BONITO_BONPONCFG_ROMCS0SAMP 0x00010000 +#define BONITO_BONPONCFG_CPUBIGEND 0x00004000 +#define BONITO_BONPONCFG_CPUPARITY 0x00002000 +#define BONITO_BONPONCFG_CPUTYPE 0x00000007 +#define BONITO_BONPONCFG_CPUTYPE_SHIFT 0 +#define BONITO_BONPONCFG_PCIRESET_OUT 0x00000008 +#define BONITO_BONPONCFG_IS_ARBITER 0x00000010 +#define BONITO_BONPONCFG_ROMBOOT 0x000000c0 +#define BONITO_BONPONCFG_ROMBOOT_SHIFT 6 + +#define BONITO_BONPONCFG_ROMBOOT_FLASH (0x0<>26) & BONITO_PCIMAP_PCIMAP_LO0) << ((WIN)*6)) + +#define BONITO_PCIMAP_WINSIZE (1<<26) +#define BONITO_PCIMAP_WINOFFSET(ADDR) ((ADDR) & (BONITO_PCIMAP_WINSIZE - 1)) +#define BONITO_PCIMAP_WINBASE(ADDR) ((ADDR) << 26) + +/* pcimembaseCfg */ + +#define BONITO_PCIMEMBASECFG_MASK 0xf0000000 +#define BONITO_PCIMEMBASECFG_MEMBASE0_MASK 0x0000001f +#define BONITO_PCIMEMBASECFG_MEMBASE0_MASK_SHIFT 0 +#define BONITO_PCIMEMBASECFG_MEMBASE0_TRANS 0x000003e0 +#define BONITO_PCIMEMBASECFG_MEMBASE0_TRANS_SHIFT 5 +#define BONITO_PCIMEMBASECFG_MEMBASE0_CACHED 0x00000400 +#define BONITO_PCIMEMBASECFG_MEMBASE0_IO 0x00000800 + +#define BONITO_PCIMEMBASECFG_MEMBASE1_MASK 0x0001f000 +#define BONITO_PCIMEMBASECFG_MEMBASE1_MASK_SHIFT 12 +#define BONITO_PCIMEMBASECFG_MEMBASE1_TRANS 0x003e0000 +#define BONITO_PCIMEMBASECFG_MEMBASE1_TRANS_SHIFT 17 +#define BONITO_PCIMEMBASECFG_MEMBASE1_CACHED 0x00400000 +#define BONITO_PCIMEMBASECFG_MEMBASE1_IO 0x00800000 + +#define BONITO_PCIMEMBASECFG_ASHIFT 23 +#define BONITO_PCIMEMBASECFG_AMASK 0x007fffff +#define BONITO_PCIMEMBASECFGSIZE(WIN,SIZE) (((~((SIZE)-1))>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) +#define BONITO_PCIMEMBASECFGBASE(WIN,BASE) (((BASE)>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS) + +#define BONITO_PCIMEMBASECFG_SIZE(WIN,CFG) (((((~(CFG)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK)) << (BONITO_PCIMEMBASECFG_ASHIFT - BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) | BONITO_PCIMEMBASECFG_AMASK) + +#define BONITO_PCIMEMBASECFG_ADDRMASK(WIN,CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT) +#define BONITO_PCIMEMBASECFG_ADDRMASK(WIN,CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT) +#define BONITO_PCIMEMBASECFG_ADDRTRANS(WIN,CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT) + +#define BONITO_PCITOPHYS(WIN,ADDR,CFG) ( \ + (((ADDR) & (~(BONITO_PCIMEMBASECFG_MASK))) & (~(BONITO_PCIMEMBASECFG_ADDRMASK(WIN,CFG)))) | \ + (BONITO_PCIMEMBASECFG_ADDRTRANS(WIN,CFG)) \ + ) + +/* PCICmd */ + +#define BONITO_PCICMD_MEMEN 0x00000002 +#define BONITO_PCICMD_MSTREN 0x00000004 + +#define BONITO_IRQ_BASE 32 + +#endif /* !_BONITO_H */ diff --git a/include/asm-mips/mach-lemote/dma-coherence.h b/include/asm-mips/mach-lemote/dma-coherence.h new file mode 100644 index 0000000..9506af4 --- /dev/null +++ b/include/asm-mips/mach-lemote/dma-coherence.h @@ -0,0 +1,43 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2006 Ralf Baechle + * + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + * + */ +#ifndef __ASM_MACH_GENERIC_DMA_COHERENCE_H +#define __ASM_MACH_GENERIC_DMA_COHERENCE_H + +struct device; + +static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, + size_t size) +{ + return virt_to_phys(addr) | 0x80000000; +} + +static inline dma_addr_t plat_map_dma_mem_page(struct device *dev, + struct page *page) +{ + return page_to_phys(page) | 0x80000000; +} + +static inline unsigned long plat_dma_addr_to_phys(dma_addr_t dma_addr) +{ + return dma_addr & 0x7fffffff; +} + +static inline void plat_unmap_dma_mem(dma_addr_t dma_addr) +{ +} + +static inline int plat_device_is_coherent(struct device *dev) +{ + return 0; +} + +#endif /* __ASM_MACH_GENERIC_DMA_COHERENCE_H */ diff --git a/include/asm-mips/mach-lemote/mc146818rtc.h b/include/asm-mips/mach-lemote/mc146818rtc.h new file mode 100644 index 0000000..7850f89 --- /dev/null +++ b/include/asm-mips/mach-lemote/mc146818rtc.h @@ -0,0 +1,36 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1998, 2001, 03 by Ralf Baechle + * + * RTC routines for PC style attached Dallas chip. + */ +#ifndef __ASM_MACH_GENERIC_MC146818RTC_H +#define __ASM_MACH_GENERIC_MC146818RTC_H + +#include + +#define RTC_PORT(x) (0x70 + (x)) +#define RTC_IRQ 8 + +static inline unsigned char CMOS_READ(unsigned long addr) +{ + outb_p(addr, RTC_PORT(0)); + return inb_p(RTC_PORT(1)); +} + +static inline void CMOS_WRITE(unsigned char data, unsigned long addr) +{ + outb_p(addr, RTC_PORT(0)); + outb_p(data, RTC_PORT(1)); +} + +#define RTC_ALWAYS_BCD 0 + +#ifndef mc146818_decode_year +#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1970) +#endif + +#endif /* __ASM_MACH_GENERIC_MC146818RTC_H */ -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 05:48:32 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 05:48:36 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:21484 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20022098AbXFFEoC (ORCPT ); Wed, 6 Jun 2007 05:44:02 +0100 Received: (qmail 26309 invoked by uid 511); 6 Jun 2007 04:50:07 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 04:50:07 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH] make cpu_probe recognize Loongson2 Date: Wed, 6 Jun 2007 12:42:37 +0800 Message-Id: <11811049643823-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811049622818-git-send-email-tiansm@lemote.com> References: <11811049622818-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15276 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- arch/mips/kernel/cpu-probe.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index ab755ea..c9e3637 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -464,6 +464,14 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c) MIPS_CPU_LLSC; c->tlbsize = 64; break; + case PRID_IMP_LOONGSON2: + c->cputype = CPU_LOONGSON2; + c->isa_level = MIPS_CPU_ISA_III; + c->options = R4K_OPTS | + MIPS_CPU_FPU | MIPS_CPU_LLSC | + MIPS_CPU_32FPR; + c->tlbsize = 64; + break; } } -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 05:48:56 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 05:48:58 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:22764 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20022100AbXFFEoG (ORCPT ); Wed, 6 Jun 2007 05:44:06 +0100 Received: (qmail 26314 invoked by uid 511); 6 Jun 2007 04:50:08 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 04:50:08 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH] add Loongson support to /proc/cpuinfo Date: Wed, 6 Jun 2007 12:42:38 +0800 Message-Id: <11811049641617-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811049622818-git-send-email-tiansm@lemote.com> References: <11811049622818-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15277 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- arch/mips/kernel/proc.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 5ddc2e9..e915117 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -84,6 +84,7 @@ static const char *cpu_name[] = { [CPU_VR4181A] = "NEC VR4181A", [CPU_SR71000] = "Sandcraft SR71000", [CPU_PR4450] = "Philips PR4450", + [CPU_LOONGSON2] = "ICT Loongson-2", }; -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 06:09:52 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 06:09:54 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:50048 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021356AbXFFFJw (ORCPT ); Wed, 6 Jun 2007 06:09:52 +0100 Received: (qmail 2220 invoked by uid 511); 6 Jun 2007 05:16:59 -0000 Received: from unknown (HELO ?192.168.2.233?) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 05:16:59 -0000 Message-ID: <4666418C.9040401@lemote.com> Date: Wed, 06 Jun 2007 13:09:32 +0800 From: Tian User-Agent: Icedove 1.5.0.8 (X11/20061116) MIME-Version: 1.0 To: Ralf Baechle CC: Kumba , linux-mips@linux-mips.org Subject: Re: Mailing patches References: <20070604133551.GA24405@linux-mips.org> <4664DB12.80906@gentoo.org> <20070605152338.GA22937@linux-mips.org> In-Reply-To: <20070605152338.GA22937@linux-mips.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15278 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips sorry for the mess，when git-format-patch , wo forgot the -n para and i would like to know what command para is recommended for sending patch on maillist? git-send-email --no-chain-reply-to --compose --from tiansm@lemote.com --no-signed-off-by-cc --smtp-server --subject "Lemote Loongson 2E patch update" --suppress-from --to linux-mips@linux-mips.org 00* --no-chain-reply-to or --chain-reply-to ? and.....should i resend the patches? Tian Ralf Baechle wrote: > On Mon, Jun 04, 2007 at 11:40:02PM -0400, Kumba wrote: > > >> What about just attaching the patches to a message? Seems like it'll avoid >> most of the problems Tbird has with them. I'm just not sure if that >> hampers importing them into git or not. >> > > There are issues if people have the log message in the attachment as > well. And of course there is still the prime reason why attachments > are a no-no - most mailers won't quote them so commenting on them is > hard when discussing things. > > Git has some limited abilities to handle MIME messages since quite a > while though. But quilt which is the heart of how I manage the queue > tree doesn't. > > Ralf > > > > From vagabon.xyz@gmail.com Wed Jun 6 07:33:48 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 07:33:50 +0100 (BST) Received: from py-out-1112.google.com ([64.233.166.181]:58638 "EHLO py-out-1112.google.com") by ftp.linux-mips.org with ESMTP id S20021435AbXFFGds (ORCPT ); Wed, 6 Jun 2007 07:33:48 +0100 Received: by py-out-1112.google.com with SMTP id f31so79514pyh for ; Tue, 05 Jun 2007 23:33:47 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=aQVLoJx6qYHmrvXQLXpWztl2/zHl1RUK/tvRAxPpDA9rqqtgJEPF0WysuwadCwDozYiH5tAHucyUfmhYQnqwl1kXiVkM3uJSohfrCt8pv5dZJCIR9ExPn0+1c4F/lKLqGYyKI1zKfw97JGCd4zQJeRrUpE/46gOaMD9XbtPUz98= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=DVL8/+Boat4cWTT1+ggSlwp48s2yvr/wmyWC80bHnFdxlmJVegw2Qf852WtgTb5vW4jvQ1aqr4xnBUy5DbUFruEhas2NjlDF25cbQ+djO4oRaUuqojgFxYLdW8MvT7rnTGJ4gFJq/oQaMiXHN6RrXnUpacqNEhA2M6FgUfdpyvg= Received: by 10.65.239.14 with SMTP id q14mr313981qbr.1181111625981; Tue, 05 Jun 2007 23:33:45 -0700 (PDT) Received: by 10.65.241.19 with HTTP; Tue, 5 Jun 2007 23:33:45 -0700 (PDT) Message-ID: Date: Wed, 6 Jun 2007 08:33:45 +0200 From: "Franck Bui-Huu" To: Tian Subject: Re: Mailing patches Cc: "Ralf Baechle" , Kumba , linux-mips@linux-mips.org In-Reply-To: <4666418C.9040401@lemote.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20070604133551.GA24405@linux-mips.org> <4664DB12.80906@gentoo.org> <20070605152338.GA22937@linux-mips.org> <4666418C.9040401@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15279 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips Hi, On 6/6/07, Tian wrote: > > --no-chain-reply-to or --chain-reply-to ? Usually "--no-chain-reply-to" is used and I think it's easier to discuss on the patchset with this option. > > and.....should i resend the patches? Does your patchset have order depedency ? if so, I think you should. -- Franck From vagabon.xyz@gmail.com Wed Jun 6 07:39:20 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 07:39:22 +0100 (BST) Received: from py-out-1112.google.com ([64.233.166.177]:53531 "EHLO py-out-1112.google.com") by ftp.linux-mips.org with ESMTP id S20021454AbXFFGjU (ORCPT ); Wed, 6 Jun 2007 07:39:20 +0100 Received: by py-out-1112.google.com with SMTP id f31so80842pyh for ; Tue, 05 Jun 2007 23:38:19 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=YxPou/KbM6EoOTJ8+yOXyz8wRC6SCF1dyFw+ViJgRjeNOR5yPVuK7aGzWb5poJg3KNlP1/glRjLRSCJsWPzdt+eYrirOVP5ax4gaRjb4gPF3hqTsPxtU2/ehlDbFU5V92Fo4T1XL4MitJlc5/rZYkH12B722e390wsVV/q1SFYw= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=B90HNdjJCtF6a0tQtRcXOj+ZQVICBMdEmvdwMeC8b6E9B5hYcqF28nmfR1L1zwqYaYbiFgP4GPli3SqXTqNBvy4zIFzLoGI+u/pHFw1skjPqTPI9zYMwmV/x/azoLf2OkE20sK/5q96kBxtAqFafXW4F9D1G0B5Q3m1R14mjCAo= Received: by 10.65.135.19 with SMTP id m19mr255177qbn.1181111899035; Tue, 05 Jun 2007 23:38:19 -0700 (PDT) Received: by 10.65.241.19 with HTTP; Tue, 5 Jun 2007 23:38:18 -0700 (PDT) Message-ID: Date: Wed, 6 Jun 2007 08:38:18 +0200 From: "Franck Bui-Huu" To: "tiansm@lemote.com" Subject: Re: [PATCH] cheat for support of more than 256MB memory Cc: linux-mips@linux-mips.org, "Fuxin Zhang" In-Reply-To: <11811049643791-git-send-email-tiansm@lemote.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <11811049622818-git-send-email-tiansm@lemote.com> <11811049643791-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15280 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips Hi, On 6/6/07, tiansm@lemote.com wrote: > From: Fuxin Zhang > > Signed-off-by: Fuxin Zhang > --- > arch/mips/kernel/setup.c | 8 ++++++++ > 1 files changed, 8 insertions(+), 0 deletions(-) > > diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c > index 4975da0..62ef100 100644 > --- a/arch/mips/kernel/setup.c > +++ b/arch/mips/kernel/setup.c > @@ -509,6 +509,14 @@ static void __init resource_init(void) > res->end = end; > > res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; > +#if defined(CONFIG_LEMOTE_FULONG) && defined(CONFIG_64BIT) > + /* to keep memory continous, we tell system 0x10000000 - 0x20000000 is reserved > + * for memory, in fact it is io region, don't occupy it > + * > + * SPARSEMEM? Definetly yes ! It has been designed for such issue and it should save you some memory. -- Franck From tiansm@lemote.com Wed Jun 6 07:53:05 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 07:53:08 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:56713 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021497AbXFFGxF (ORCPT ); Wed, 6 Jun 2007 07:53:05 +0100 Received: (qmail 7096 invoked by uid 511); 6 Jun 2007 07:00:19 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 07:00:19 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH 13/15] define MODULE_PROC_FAMILY for Loongson2 Date: Wed, 6 Jun 2007 14:52:50 +0800 Message-Id: <11811127741422-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811127722019-git-send-email-tiansm@lemote.com> References: <11811127722019-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15281 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- arch/mips/mm/c-r4k.c | 57 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 57 insertions(+), 0 deletions(-) diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index df04a31..e9988a3 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -335,6 +335,10 @@ static void r4k_flush_cache_all(void) static inline void local_r4k___flush_cache_all(void * args) { +#if defined(CONFIG_CPU_LOONGSON2) + r4k_blast_scache(); + return; +#endif r4k_blast_dcache(); r4k_blast_icache(); @@ -848,6 +852,26 @@ static void __init probe_pcache(void) c->options |= MIPS_CPU_PREFETCH; break; + case CPU_LOONGSON2: + icache_size = 1 << (12 + ((config & CONF_IC) >> 9)); + c->icache.linesz = 16 << ((config & CONF_IB) >> 5); + if (prid & 0x3) { + c->icache.ways = 4; + } else { + c->icache.ways = 2; + } + c->icache.waybit= 0; + + dcache_size = 1 << (12 + ((config & CONF_DC) >> 6)); + c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); + if (prid & 0x3) { + c->dcache.ways = 4; + } else { + c->dcache.ways = 2; + } + c->dcache.waybit = 0; + break; + default: if (!(config & MIPS_CONF_M)) panic("Don't know how to probe P-caches on this cpu."); @@ -963,6 +987,14 @@ static void __init probe_pcache(void) break; } +#ifdef CONFIG_CPU_LOONGSON2 + /* + * LOONGSON2 has 4 way icache, but when using indexed cache op, + * one op will act on all 4 ways + */ + c->icache.ways = 1; +#endif + printk("Primary instruction cache %ldkB, %s, %s, linesize %d bytes.\n", icache_size >> 10, cpu_has_vtag_icache ? "virtually tagged" : "physically tagged", @@ -1036,6 +1068,25 @@ static int __init probe_scache(void) return 1; } +#if defined(CONFIG_CPU_LOONGSON2) +static void __init loongson2_sc_init(void) +{ + struct cpuinfo_mips *c = ¤t_cpu_data; + + scache_size = 512*1024; + c->scache.linesz = 32; + c->scache.ways = 4; + c->scache.waybit = 0; + c->scache.waysize = scache_size / (c->scache.ways); + c->scache.sets = scache_size /(c->scache.linesz * c->scache.ways); + printk("Unified secondary cache %ldkB %s, linesize %d bytes.\n", + scache_size >> 10, way_string[c->scache.ways], c->scache.linesz); + + c->options |= MIPS_CPU_INCLUSIVE_CACHES; + return; +} +#endif + extern int r5k_sc_init(void); extern int rm7k_sc_init(void); extern int mips_sc_init(void); @@ -1085,6 +1136,12 @@ static void __init setup_scache(void) #endif return; +#if defined(CONFIG_CPU_LOONGSON2) + case CPU_LOONGSON2: + loongson2_sc_init(); + return; +#endif + default: if (c->isa_level == MIPS_CPU_ISA_M32R1 || c->isa_level == MIPS_CPU_ISA_M32R2 || -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 07:53:28 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 07:53:31 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:55945 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021471AbXFFGxF (ORCPT ); Wed, 6 Jun 2007 07:53:05 +0100 Received: (qmail 7081 invoked by uid 511); 6 Jun 2007 07:00:19 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 07:00:19 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH 10/15] make cpu_probe recognize Loongson2 Date: Wed, 6 Jun 2007 14:52:47 +0800 Message-Id: <11811127742180-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811127722019-git-send-email-tiansm@lemote.com> References: <11811127722019-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15282 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- arch/mips/kernel/cpu-probe.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index ab755ea..c9e3637 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -464,6 +464,14 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c) MIPS_CPU_LLSC; c->tlbsize = 64; break; + case PRID_IMP_LOONGSON2: + c->cputype = CPU_LOONGSON2; + c->isa_level = MIPS_CPU_ISA_III; + c->options = R4K_OPTS | + MIPS_CPU_FPU | MIPS_CPU_LLSC | + MIPS_CPU_32FPR; + c->tlbsize = 64; + break; } } -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 07:53:51 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 07:53:55 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:56457 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021488AbXFFGxF (ORCPT ); Wed, 6 Jun 2007 07:53:05 +0100 Received: (qmail 7091 invoked by uid 511); 6 Jun 2007 07:00:19 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 07:00:19 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH 12/15] cheat for support of more than 256MB memory Date: Wed, 6 Jun 2007 14:52:49 +0800 Message-Id: <11811127741078-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811127722019-git-send-email-tiansm@lemote.com> References: <11811127722019-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15283 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- arch/mips/kernel/setup.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 4975da0..62ef100 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -509,6 +509,14 @@ static void __init resource_init(void) res->end = end; res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; +#if defined(CONFIG_LEMOTE_FULONG) && defined(CONFIG_64BIT) + /* to keep memory continous, we tell system 0x10000000 - 0x20000000 is reserved + * for memory, in fact it is io region, don't occupy it + * + * SPARSEMEM? + */ + if (boot_mem_map.map[i].type != BOOT_MEM_RESERVED) +#endif request_resource(&iomem_resource, res); /* -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 07:54:15 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 07:54:19 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:55689 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021494AbXFFGxF (ORCPT ); Wed, 6 Jun 2007 07:53:05 +0100 Received: (qmail 7076 invoked by uid 511); 6 Jun 2007 07:00:19 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 07:00:19 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Songmao Tian Subject: [PATCH 09/15] add serial port definition for lemote fulong Date: Wed, 6 Jun 2007 14:52:46 +0800 Message-Id: <11811127741719-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811127722019-git-send-email-tiansm@lemote.com> References: <11811127722019-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15284 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Songmao Tian Signed-off-by: Fuxin Zhang --- include/asm-mips/serial.h | 9 ++++++++- 1 files changed, 8 insertions(+), 1 deletions(-) diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h index ce51213..1237704 100644 --- a/include/asm-mips/serial.h +++ b/include/asm-mips/serial.h @@ -164,6 +164,12 @@ #define IP32_SERIAL_PORT_DEFNS #endif /* CONFIG_SGI_IP32 */ +#if defined(CONFIG_LEMOTE_FULONG) +#define LEMOTE_FULONG_SERIAL_PORT_DEFNS \ + /* UART CLK PORT IRQ FLAGS */ \ + { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ +#endif + #define SERIAL_PORT_DFNS \ DDB5477_SERIAL_PORT_DEFNS \ EV64120_SERIAL_PORT_DEFNS \ @@ -172,6 +178,7 @@ STD_SERIAL_PORT_DEFNS \ MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ MOMENCO_OCELOT_SERIAL_PORT_DEFNS \ - MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS + MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \ + LEMOTE_FULONG_SERIAL_PORT_DEFNS #endif /* _ASM_SERIAL_H */ -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 07:54:39 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 07:54:42 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:57225 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021496AbXFFGxF (ORCPT ); Wed, 6 Jun 2007 07:53:05 +0100 Received: (qmail 7112 invoked by uid 511); 6 Jun 2007 07:00:20 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 07:00:20 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH 15/15] work around for more than 256MB memory support Date: Wed, 6 Jun 2007 14:52:52 +0800 Message-Id: <11811127744038-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811127722019-git-send-email-tiansm@lemote.com> References: <11811127722019-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15285 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- drivers/char/mem.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/drivers/char/mem.c b/drivers/char/mem.c index cc9a9d0..a19b46a 100644 --- a/drivers/char/mem.c +++ b/drivers/char/mem.c @@ -82,8 +82,12 @@ static inline int uncached_access(struct file *file, unsigned long addr) */ if (file->f_flags & O_SYNC) return 1; +#if defined(CONFIG_LEMOTE_FULONG) && defined(CONFIG_64BIT) + return (addr >= __pa(high_memory)) || ((addr >=0x10000000) && (addr < 0x20000000)); +#else return addr >= __pa(high_memory); #endif +#endif } #ifndef ARCH_HAS_VALID_PHYS_ADDR_RANGE -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 07:55:03 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 07:55:08 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:54921 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021498AbXFFGxJ (ORCPT ); Wed, 6 Jun 2007 07:53:09 +0100 Received: (qmail 7030 invoked by uid 511); 6 Jun 2007 07:00:18 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 07:00:18 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Songmao Tian Subject: [PATCH 01/15] new files for lemote fulong mini-PC support Date: Wed, 6 Jun 2007 14:52:38 +0800 Message-Id: <1181112773134-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811127722019-git-send-email-tiansm@lemote.com> References: <11811127722019-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15286 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Songmao Tian Signed-off-by: Fuxin Zhang Signed-off-by: Songmao Tian --- arch/mips/lemote/lm2e/Makefile | 7 + arch/mips/lemote/lm2e/bonito-irq.c | 74 +++++ arch/mips/lemote/lm2e/dbg_io.c | 146 ++++++++++ arch/mips/lemote/lm2e/irq.c | 146 ++++++++++ arch/mips/lemote/lm2e/pci.c | 72 +++++ arch/mips/lemote/lm2e/prom.c | 109 ++++++++ arch/mips/lemote/lm2e/reset.c | 49 ++++ arch/mips/lemote/lm2e/setup.c | 144 ++++++++++ arch/mips/pci/fixup-lm2e.c | 255 +++++++++++++++++ arch/mips/pci/ops-lm2e.c | 153 +++++++++++ include/asm-mips/mach-lemote/bonito.h | 381 ++++++++++++++++++++++++++ include/asm-mips/mach-lemote/dma-coherence.h | 43 +++ include/asm-mips/mach-lemote/mc146818rtc.h | 36 +++ 13 files changed, 1615 insertions(+), 0 deletions(-) create mode 100644 arch/mips/lemote/lm2e/Makefile create mode 100644 arch/mips/lemote/lm2e/bonito-irq.c create mode 100644 arch/mips/lemote/lm2e/dbg_io.c create mode 100644 arch/mips/lemote/lm2e/irq.c create mode 100644 arch/mips/lemote/lm2e/pci.c create mode 100644 arch/mips/lemote/lm2e/prom.c create mode 100644 arch/mips/lemote/lm2e/reset.c create mode 100644 arch/mips/lemote/lm2e/setup.c create mode 100644 arch/mips/pci/fixup-lm2e.c create mode 100644 arch/mips/pci/ops-lm2e.c create mode 100644 include/asm-mips/mach-lemote/bonito.h create mode 100644 include/asm-mips/mach-lemote/dma-coherence.h create mode 100644 include/asm-mips/mach-lemote/mc146818rtc.h diff --git a/arch/mips/lemote/lm2e/Makefile b/arch/mips/lemote/lm2e/Makefile new file mode 100644 index 0000000..0ba6f12 --- /dev/null +++ b/arch/mips/lemote/lm2e/Makefile @@ -0,0 +1,7 @@ +# +# Makefile for Lemote Fulong mini-PC board. +# + +obj-y += setup.o prom.o reset.o irq.o pci.o bonito-irq.o dbg_io.o +EXTRA_AFLAGS := $(CFLAGS) + diff --git a/arch/mips/lemote/lm2e/bonito-irq.c b/arch/mips/lemote/lm2e/bonito-irq.c new file mode 100644 index 0000000..e7decd3 --- /dev/null +++ b/arch/mips/lemote/lm2e/bonito-irq.c @@ -0,0 +1,74 @@ +/* + * Copyright 2001 MontaVista Software Inc. + * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net + * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org) + * + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ +#include +#include +#include +#include +#include +#include + +#include + + +static inline void bonito_irq_enable(unsigned int irq) +{ + BONITO_INTENSET = (1 << (irq - BONITO_IRQ_BASE)); + mmiowb(); +} + +static inline void bonito_irq_disable(unsigned int irq) +{ + BONITO_INTENCLR = (1 << (irq - BONITO_IRQ_BASE)); + mmiowb(); +} + +static struct irq_chip bonito_irq_type = { + .name = "bonito_irq", + .ack = bonito_irq_disable, + .mask = bonito_irq_disable, + .mask_ack = bonito_irq_disable, + .unmask = bonito_irq_enable, +}; + +static struct irqaction dma_timeout_irqaction = { + .handler = no_action, + .name = "dma_timeout", +}; + +void bonito_irq_init(void) +{ + u32 i; + + for (i = BONITO_IRQ_BASE; i < BONITO_IRQ_BASE + 32; i++) { + set_irq_chip_and_handler(i, &bonito_irq_type, handle_level_irq); + } + + setup_irq(BONITO_IRQ_BASE + 10, &dma_timeout_irqaction); +} diff --git a/arch/mips/lemote/lm2e/dbg_io.c b/arch/mips/lemote/lm2e/dbg_io.c new file mode 100644 index 0000000..b82d34a --- /dev/null +++ b/arch/mips/lemote/lm2e/dbg_io.c @@ -0,0 +1,146 @@ +/* + * Copyright 2001 MontaVista Software Inc. + * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net + * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org) + * + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ + +#include +#include +#include /* For the serial port location and base baud */ + +#define UART16550_BAUD_2400 2400 +#define UART16550_BAUD_4800 4800 +#define UART16550_BAUD_9600 9600 +#define UART16550_BAUD_19200 19200 +#define UART16550_BAUD_38400 38400 +#define UART16550_BAUD_57600 57600 +#define UART16550_BAUD_115200 115200 + +#define UART16550_PARITY_NONE 0 +#define UART16550_PARITY_ODD 0x08 +#define UART16550_PARITY_EVEN 0x18 +#define UART16550_PARITY_MARK 0x28 +#define UART16550_PARITY_SPACE 0x38 + +#define UART16550_DATA_5BIT 0x0 +#define UART16550_DATA_6BIT 0x1 +#define UART16550_DATA_7BIT 0x2 +#define UART16550_DATA_8BIT 0x3 + +#define UART16550_STOP_1BIT 0x0 +#define UART16550_STOP_2BIT 0x4 + +/* ----------------------------------------------------- */ + +/* === CONFIG === */ +#ifdef CONFIG_64BIT +#define BASE (0xffffffffbfd003f8) +#else +#define BASE (0xbfd003f8) +#endif + +#define MAX_BAUD BASE_BAUD +/* === END OF CONFIG === */ + +#define REG_OFFSET 1 + +/* register offset */ +#define OFS_RCV_BUFFER 0 +#define OFS_TRANS_HOLD 0 +#define OFS_SEND_BUFFER 0 +#define OFS_INTR_ENABLE (1*REG_OFFSET) +#define OFS_INTR_ID (2*REG_OFFSET) +#define OFS_DATA_FORMAT (3*REG_OFFSET) +#define OFS_LINE_CONTROL (3*REG_OFFSET) +#define OFS_MODEM_CONTROL (4*REG_OFFSET) +#define OFS_RS232_OUTPUT (4*REG_OFFSET) +#define OFS_LINE_STATUS (5*REG_OFFSET) +#define OFS_MODEM_STATUS (6*REG_OFFSET) +#define OFS_RS232_INPUT (6*REG_OFFSET) +#define OFS_SCRATCH_PAD (7*REG_OFFSET) + +#define OFS_DIVISOR_LSB (0*REG_OFFSET) +#define OFS_DIVISOR_MSB (1*REG_OFFSET) + +/* memory-mapped read/write of the port */ +#define UART16550_READ(y) (*((volatile u8*)(BASE + y))) +#define UART16550_WRITE(y, z) ((*((volatile u8*)(BASE + y))) = z) + +void debugInit(u32 baud, u8 data, u8 parity, u8 stop) +{ + /* disable interrupts */ + UART16550_WRITE(OFS_INTR_ENABLE, 0); + + /* set up buad rate */ + { + u32 divisor; + + /* set DIAB bit */ + UART16550_WRITE(OFS_LINE_CONTROL, 0x80); + + /* set divisor */ + divisor = MAX_BAUD / baud; + UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff); + UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8); + + /* clear DIAB bit */ + UART16550_WRITE(OFS_LINE_CONTROL, 0x0); + } + + /* set data format */ + UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop); +} + +static int remoteDebugInitialized = 0; + +u8 getDebugChar(void) +{ + if (!remoteDebugInitialized) { + remoteDebugInitialized = 1; + debugInit(UART16550_BAUD_115200, + UART16550_DATA_8BIT, + UART16550_PARITY_NONE, UART16550_STOP_1BIT); + } + + while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0) ; + return UART16550_READ(OFS_RCV_BUFFER); +} + +int putDebugChar(u8 byte) +{ + if (!remoteDebugInitialized) { + remoteDebugInitialized = 1; + /* + debugInit(UART16550_BAUD_115200, + UART16550_DATA_8BIT, + UART16550_PARITY_NONE, UART16550_STOP_1BIT); */ + } + + while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0) ; + UART16550_WRITE(OFS_SEND_BUFFER, byte); + return 1; +} diff --git a/arch/mips/lemote/lm2e/irq.c b/arch/mips/lemote/lm2e/irq.c new file mode 100644 index 0000000..1f31ec9 --- /dev/null +++ b/arch/mips/lemote/lm2e/irq.c @@ -0,0 +1,146 @@ +/* + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +/* + * the first level int-handler will jump here if it is a bonito irq + */ +static void bonito_irqdispatch(void) +{ + u32 int_status; + int i; + + /* workaround the IO dma problem: let cpu looping to allow DMA finish */ + int_status = BONITO_INTISR; + if (int_status & (1 << 10)) { + while (int_status & (1 << 10)) { + udelay(1); + int_status = BONITO_INTISR; + } + } + + /* Get pending sources, masked by current enables */ + int_status = BONITO_INTISR & BONITO_INTEN; + + if (int_status != 0) { + i = __ffs(int_status); + int_status &= ~(1 << i); + do_IRQ(i +BONITO_IRQ_BASE); + } + return; +} + +static void i8259_irqdispatch(void) +{ + int irq; + + irq = i8259_irq(); + if (irq >= 0) { + do_IRQ(irq); + } else { + spurious_interrupt(); + } + +} + +asmlinkage void plat_irq_dispatch(void) +{ + unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM; + + if (pending & CAUSEF_IP7) { + do_IRQ(MIPS_CPU_IRQ_BASE + 7); + } else if (pending & CAUSEF_IP5) { + i8259_irqdispatch(); + } else if (pending & CAUSEF_IP2) { + bonito_irqdispatch(); + } else { + spurious_interrupt(); + } +} + +static struct irqaction cascade_irqaction = { + .handler = no_action, + .mask = CPU_MASK_NONE, + .name = "cascade", +}; + +void __init arch_init_irq(void) +{ + extern void bonito_irq_init(void); + + printk(KERN_INFO"arch init irq\n"); + /* + * Clear all of the interrupts while we change the able around a bit. + * int-handler is not on bootstrap + */ + clear_c0_status(ST0_IM | ST0_BEV); + local_irq_disable(); + + /* most bonito irq should be level triggered */ + BONITO_INTEDGE = BONITO_ICU_SYSTEMERR | BONITO_ICU_MASTERERR + | BONITO_ICU_RETRYERR | BONITO_ICU_MBOXES; + BONITO_INTSTEER = 0; + + /* + * Mask out all interrupt by writing "1" to all bit position in + * the interrupt reset reg. + */ + BONITO_INTENCLR = ~0; + + /* init all controller + * 0-15 ------> i8259 interrupt + * 16-23 ------> mips cpu interrupt + * 32-63 ------> bonito irq + */ + + /* Sets the first-level interrupt dispatcher. */ + mips_cpu_irq_init(); + init_i8259_irqs(); + bonito_irq_init(); + + /* + printk("GPIODATA=%x, GPIOIE=%x\n", BONITO_GPIODATA, BONITO_GPIOIE); + printk("INTEN=%x, INTSET=%x, INTCLR=%x, INTISR=%x\n", + BONITO_INTEN, BONITO_INTENSET, + BONITO_INTENCLR, BONITO_INTISR); + */ + + /* bonito irq at IP2 */ + setup_irq(MIPS_CPU_IRQ_BASE + 2, &cascade_irqaction); + /* 8259 irq at IP5 */ + setup_irq(MIPS_CPU_IRQ_BASE + 5, &cascade_irqaction); + +} diff --git a/arch/mips/lemote/lm2e/pci.c b/arch/mips/lemote/lm2e/pci.c new file mode 100644 index 0000000..e9c5ce2 --- /dev/null +++ b/arch/mips/lemote/lm2e/pci.c @@ -0,0 +1,72 @@ +/* + * pci.c + * + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ +#include +#include +#include +#include + +extern struct pci_ops loongson2e_pci_pci_ops; + +static struct resource loongson2e_pci_mem_resource = { + .name = "LOONGSON2E PCI MEM", + .start = 0x14000000UL, + .end = 0x1fffffffUL, + .flags = IORESOURCE_MEM, +}; + +static struct resource loongson2e_pci_io_resource = { + .name = "LOONGSON2E PCI IO MEM", + .start = 0x00004000UL, + .end = 0x1fffffffUL, + .flags = IORESOURCE_IO, +}; + + +static struct pci_controller loongson2e_pci_controller = { + .pci_ops = &loongson2e_pci_pci_ops, + .io_resource = &loongson2e_pci_io_resource, + .mem_resource = &loongson2e_pci_mem_resource, + .mem_offset = 0x00000000UL, + .io_offset = 0x00000000UL, +}; + + +static int __init pcibios_init(void) +{ + extern int pci_probe_only; + pci_probe_only = 0; + +#ifdef CONFIG_TRACE_BOOT + printk(KERN_INFO"arch_initcall:pcibios_init\n"); + printk(KERN_INFO"register_pci_controller : %x\n",&loongson2e_pci_controller); +#endif + register_pci_controller(&loongson2e_pci_controller); + return 0; +} + +arch_initcall(pcibios_init); diff --git a/arch/mips/lemote/lm2e/prom.c b/arch/mips/lemote/lm2e/prom.c new file mode 100644 index 0000000..6704ca0 --- /dev/null +++ b/arch/mips/lemote/lm2e/prom.c @@ -0,0 +1,109 @@ +/* + * Based on Ocelot Linux port, which is + * Copyright 2001 MontaVista Software Inc. + * Author: jsun@mvista.com or jsun@junsun.net + * + * Copyright 2003 ICT CAS + * Author: Michael Guo + * + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#include +#include +#include +#include + +#include +#include + +extern unsigned long bus_clock; +extern unsigned long cpu_clock; +extern unsigned int memsize, highmemsize; +extern int putDebugChar(unsigned char byte); + +static int argc; +/* pmon passes arguments in 32bit pointers */ +static int *arg; +static int *env; + +const char *get_system_type(void) +{ + return "lemote-fulong"; +} + +void __init prom_init_cmdline(void) +{ + int i; + long l; + + /* arg[0] is "g", the rest is boot parameters */ + arcs_cmdline[0] = '\0'; + for (i = 1; i < argc; i++) { + l = (long)arg[i]; + if (strlen(arcs_cmdline) + strlen(((char *)l) + 1) + >= sizeof(arcs_cmdline)) + break; + strcat(arcs_cmdline, ((char *)l)); + strcat(arcs_cmdline, " "); + } +} + +void __init prom_init(void) +{ + long l; + argc = fw_arg0; + arg = (int *)fw_arg1; + env = (int *)fw_arg2; + + mips_machgroup = MACH_GROUP_LEMOTE; + mips_machtype = MACH_LEMOTE_FULONG; + + prom_init_cmdline(); + + if ((strstr(arcs_cmdline, "console=")) == NULL) + strcat(arcs_cmdline, " console=ttyS0,115200"); + if ((strstr(arcs_cmdline, "root=")) == NULL) + strcat(arcs_cmdline, " root=/dev/hda1"); + + l = (long)*env; + while (l != 0) { + if (strncmp("busclock", (char *)l, strlen("busclock")) == 0) { + bus_clock = simple_strtol((char *)l + strlen("busclock="), + NULL, 10); + } + if (strncmp("cpuclock", (char *)l, strlen("cpuclock")) == 0) { + cpu_clock = simple_strtol((char *)l + strlen("cpuclock="), + NULL, 10); + } + if (strncmp("memsize", (char *)l, strlen("memsize")) == 0) { + memsize = simple_strtol((char *)l + strlen("memsize="), + NULL, 10); + } + if (strncmp("highmemsize", (char *)l, strlen("highmemsize")) == 0) { + highmemsize = simple_strtol((char *)l + strlen("highmemsize="), + NULL, 10); + } + env++; + l = (long)*env; + } + if (memsize == 0) + memsize = 256; + + printk("busclock=%ld, cpuclock=%ld,memsize=%d,highmemsize=%d\n", + bus_clock, cpu_clock, memsize, highmemsize); +} + +void __init prom_free_prom_memory(void) +{ +} + +void prom_putchar(char c) +{ + putDebugChar(c); +} diff --git a/arch/mips/lemote/lm2e/reset.c b/arch/mips/lemote/lm2e/reset.c new file mode 100644 index 0000000..ec1b08c --- /dev/null +++ b/arch/mips/lemote/lm2e/reset.c @@ -0,0 +1,49 @@ +/* + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +static void loongson2e_restart(char *command) +{ +#ifdef CONFIG_32BIT + *(unsigned long *)0xbfe00104 &= ~(1 << 2); + *(unsigned long *)0xbfe00104 |= (1 << 2); +#else + *(unsigned long *)0xffffffffbfe00104 &= ~(1 << 2); + *(unsigned long *)0xffffffffbfe00104 |= (1 << 2); +#endif + __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000)); +} + +static void loongson2e_halt(void) +{ + while (1) ; +} + +static void loongson2e_power_off(void) +{ + loongson2e_halt(); +} + +void mips_reboot_setup(void) +{ + _machine_restart = loongson2e_restart; + _machine_halt = loongson2e_halt; + pm_power_off = loongson2e_power_off; +} diff --git a/arch/mips/lemote/lm2e/setup.c b/arch/mips/lemote/lm2e/setup.c new file mode 100644 index 0000000..3030518 --- /dev/null +++ b/arch/mips/lemote/lm2e/setup.c @@ -0,0 +1,144 @@ +/* + * BRIEF MODULE DESCRIPTION + * setup.c - board dependent boot routines + * + * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#ifdef CONFIG_VT +#include +#include +#endif + +extern void mips_reboot_setup(void); + +#ifdef CONFIG_64BIT +#define PTR_PAD(p) ((0xffffffff00000000)|((unsigned long long)(p))) +#else +#define PTR_PAD(p) (p) +#endif + +unsigned long cpu_clock; +unsigned long bus_clock; +unsigned int memsize; +unsigned int highmemsize = 0; + +void __init plat_timer_setup(struct irqaction *irq) +{ + setup_irq(MIPS_CPU_IRQ_BASE + 7, irq); +} + +static void __init loongson2e_time_init(void) +{ + /* setup mips r4k timer */ + mips_hpt_frequency = cpu_clock / 2; +} + +static unsigned long __init mips_rtc_get_time(void) +{ + return mc146818_get_cmos_time(); +} + +void (*__wbflush) (void); +static void wbflush_loongson2e(void) +{ + asm(".set\tpush\n\t" + ".set\tnoreorder\n\t" + ".set mips3\n\t" + "sync\n\t" + "nop\n\t" + ".set\tpop\n\t" + ".set mips0\n\t"); +} + +void __init plat_mem_setup(void) +{ + set_io_port_base(PTR_PAD(0xbfd00000)); + + ioport_resource.start = 0; + ioport_resource.end = 0xffffffff; + iomem_resource.start = 0; + iomem_resource.end = 0xffffffff; + + mips_reboot_setup(); + + board_time_init = loongson2e_time_init; + rtc_mips_get_time = mips_rtc_get_time; + + __wbflush = wbflush_loongson2e; + + //add_memory_region(0x100000, (memsize<<20) - 0x100000, BOOT_MEM_RAM); + add_memory_region(0x0, (memsize << 20), BOOT_MEM_RAM); +#ifdef CONFIG_64BIT + if (highmemsize > 0) { + add_memory_region(0x10000000, 0x10000000, BOOT_MEM_RESERVED); + add_memory_region(0x20000000, highmemsize << 20, BOOT_MEM_RAM); + } +#endif + +#ifdef CONFIG_VT +#if defined(CONFIG_VGA_CONSOLE) + conswitchp = &vga_con; + + screen_info = (struct screen_info) { + 0, 25, /* orig-x, orig-y */ + 0, /* unused */ + 0, /* orig-video-page */ + 0, /* orig-video-mode */ + 80, /* orig-video-cols */ + 0, 0, 0, /* ega_ax, ega_bx, ega_cx */ + 25, /* orig-video-lines */ + VIDEO_TYPE_VGAC, /* orig-video-isVGA */ + 16 /* orig-video-points */ + }; +#elif defined(CONFIG_DUMMY_CONSOLE) + conswitchp = &dummy_con; +#endif +#endif + +} + +#include +EXPORT_SYMBOL(__wbflush); + diff --git a/arch/mips/pci/fixup-lm2e.c b/arch/mips/pci/fixup-lm2e.c new file mode 100644 index 0000000..e9ae996 --- /dev/null +++ b/arch/mips/pci/fixup-lm2e.c @@ -0,0 +1,255 @@ +/* + * fixup-lm2e.c + * + * Copyright (C) 2004 ICT CAS + * Author: Li xiaoyu, ICT CAS + * lixy@ict.ac.cn + * + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ +#include +#include +#include + +int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + unsigned int val; + if (PCI_SLOT(dev->devfn) == 4) { /* wireless card(notebook) */ + dev->irq = BONITO_IRQ_BASE + 26; + return dev->irq; + } else if (PCI_SLOT(dev->devfn) == 5) { /* via686b */ + switch (PCI_FUNC(dev->devfn)) { + case 2: + dev->irq = 10; + break; + case 3: + dev->irq = 11; + break; + case 5: + dev->irq = 9; + break; + } + return dev->irq; + } else if (PCI_SLOT(dev->devfn) == 6) { /* radeon 7000 */ + dev->irq = BONITO_IRQ_BASE + 27; + return dev->irq; + } else if (PCI_SLOT(dev->devfn) == 7) { /* 8139 */ + dev->irq = BONITO_IRQ_BASE + 26; + return dev->irq; + } else if (PCI_SLOT(dev->devfn) == 8) { /* nec usb */ + switch (PCI_FUNC(dev->devfn)) { + case 0: + dev->irq = BONITO_IRQ_BASE + 26; + break; + case 1: + dev->irq = BONITO_IRQ_BASE + 27; + break; + case 2: + dev->irq = BONITO_IRQ_BASE + 28; + break; + } + pci_read_config_dword(dev, 0xe0, &val); + pci_write_config_dword(dev, 0xe0, (val & ~7) | 0x4); + pci_write_config_dword(dev, 0xe4, 1 << 5); + return dev->irq; + } else + return 0; +} + +/* Do platform specific device initialization at pci_enable_device() time */ +int pcibios_plat_dev_init(struct pci_dev *dev) +{ + return 0; +} + +static void __init loongson2e_686b_func0_fixup(struct pci_dev *pdev) +{ + unsigned char c; + + printk(KERN_INFO"via686b fix: ISA bridge\n"); + + /* Enable I/O Recovery time */ + pci_write_config_byte(pdev, 0x40, 0x08); + + /* Enable ISA refresh */ + pci_write_config_byte(pdev, 0x41, 0x01); + + /* disable ISA line buffer */ + pci_write_config_byte(pdev, 0x45, 0x00); + + /* Gate INTR, and flush line buffer */ + pci_write_config_byte(pdev, 0x46, 0xe0); + + /* Disable PCI Delay Transaction, Enable EISA ports 4D0/4D1. */ + //pci_write_config_byte(pdev, 0x47, 0x20); + /* enable PCI Delay Transaction, Enable EISA ports 4D0/4D1. + * enable time-out timer + */ + pci_write_config_byte(pdev, 0x47, 0xe6); + + /* enable level trigger on pci irqs: 9,10,11,13 */ + /* important! without this PCI interrupts won't work */ + outb(0x2e, 0x4d1); + + /* 512 K PCI Decode */ + pci_write_config_byte(pdev, 0x48, 0x01); + + /* Wait for PGNT before grant to ISA Master/DMA */ + pci_write_config_byte(pdev, 0x4a, 0x84); + + /* Plug'n'Play */ + /* Parallel DRQ 3, Floppy DRQ 2 (default) */ + pci_write_config_byte(pdev, 0x50, 0x0e); + + /* IRQ Routing for Floppy and Parallel port */ + /* IRQ 6 for floppy, IRQ 7 for parallel port */ + pci_write_config_byte(pdev, 0x51, 0x76); + + /* IRQ Routing for serial ports (take IRQ 3 and 4) */ + pci_write_config_byte(pdev, 0x52, 0x34); + + /* All IRQ's level triggered. */ + pci_write_config_byte(pdev, 0x54, 0x00); + + /* route PIRQA-D irq */ + pci_write_config_byte(pdev, 0x55, 0x90); /* bit 7-4, PIRQA */ + pci_write_config_byte(pdev, 0x56, 0xba); /* bit 7-4, PIRQC; 3-0, PIRQB */ + pci_write_config_byte(pdev, 0x57, 0xd0); /* bit 7-4, PIRQD */ + + /* enable function 5/6, audio/modem */ + pci_read_config_byte(pdev, 0x85, &c); + c &= ~(0x3 << 2); + pci_write_config_byte(pdev, 0x85, c); + + printk(KERN_INFO"via686b fix: ISA bridge done\n"); +} + +static void __init loongson2e_686b_func1_fixup(struct pci_dev *pdev) +{ + printk(KERN_INFO"via686b fix: IDE\n"); + + /* Modify IDE controller setup */ + pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 48); + pci_write_config_byte(pdev, PCI_COMMAND, + PCI_COMMAND_IO | PCI_COMMAND_MEMORY | + PCI_COMMAND_MASTER); + pci_write_config_byte(pdev, 0x40, 0x0b); + /* legacy mode */ + pci_write_config_byte(pdev, 0x42, 0x09); + +#if 1/* play safe, otherwise we may see notebook's usb keyboard lockup */ + /* disable read prefetch/write post buffers */ + pci_write_config_byte(pdev, 0x41, 0x02); + + /* use 3/4 as fifo thresh hold */ + pci_write_config_byte(pdev, 0x43, 0x0a); + pci_write_config_byte(pdev, 0x44, 0x00); + + pci_write_config_byte(pdev, 0x45, 0x00); +#else + pci_write_config_byte(pdev, 0x41, 0xc2); + pci_write_config_byte(pdev, 0x43, 0x35); + pci_write_config_byte(pdev, 0x44, 0x1c); + + pci_write_config_byte(pdev, 0x45, 0x10); +#endif + + printk(KERN_INFO"via686b fix: IDE done\n"); +} + +static void __init loongson2e_686b_func5_fixup(struct pci_dev *pdev) +{ + unsigned int val; + unsigned char c; + + /* enable IO */ + pci_write_config_byte(pdev, PCI_COMMAND, + PCI_COMMAND_IO | PCI_COMMAND_MEMORY | + PCI_COMMAND_MASTER); + pci_read_config_dword(pdev, 0x4, &val); + pci_write_config_dword(pdev, 0x4, val | 1); + + /* route ac97 IRQ */ + pci_write_config_byte(pdev, 0x3c, 9); + pdev->irq = 9; + printk(KERN_INFO"ac97 interrupt = 9\n"); + + pci_read_config_byte(pdev, 0x8, &c); + printk(KERN_INFO"ac97 rev=%d\n", c); + + /* link control: enable link & SGD PCM output */ + pci_write_config_byte(pdev, 0x41, 0xcc); + + /* disable game port, FM, midi, sb, enable write to reg2c-2f */ + pci_write_config_byte(pdev, 0x42, 0x20); + + printk(KERN_INFO"Setting sub-vendor ID & device ID\n"); + + /* we are using Avance logic codec */ + pci_write_config_word(pdev, 0x2c, 0x1005); + pci_write_config_word(pdev, 0x2e, 0x4710); + pci_read_config_dword(pdev, 0x2c, &val); + printk(KERN_INFO"sub vendor-device id=%x\n", val); + + pci_write_config_byte(pdev, 0x42, 0x0); +} + +static void __init loongson2e_fixup_pcimap(struct pci_dev *pdev) +{ + static int first = 1; + + (void)pdev; + if (first) + first = 0; + else + return; + + /* local to PCI mapping: [256M,512M] -> [256M,512M]; differ from pmon */ + /* + * cpu address space [256M,448M] is window for accessing pci space + * we set pcimap_lo[0,1,2] to map it to pci space [256M,448M] + * pcimap: bit18,pcimap_2; bit[17-12],lo2;bit[11-6],lo1;bit[5-0],lo0 + */ + /* 1,00 0110 ,0001 01,00 0000 */ + BONITO_PCIMAP = 0x46140; + //1, 00 0010, 0000,01, 00 0000 + //BONITO_PCIMAP = 0x42040; + + /* + * PCI to local mapping: [2G,2G+256M] -> [0,256M] + */ + BONITO_PCIBASE0 = 0x80000000; + BONITO_PCIBASE1 = 0x00800000; + BONITO_PCIBASE2 = 0x90000000; + +} + +DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, loongson2e_fixup_pcimap); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, + loongson2e_686b_func0_fixup); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, + loongson2e_686b_func1_fixup); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_5, + loongson2e_686b_func5_fixup); diff --git a/arch/mips/pci/ops-lm2e.c b/arch/mips/pci/ops-lm2e.c new file mode 100644 index 0000000..87497e8 --- /dev/null +++ b/arch/mips/pci/ops-lm2e.c @@ -0,0 +1,153 @@ +/* + * ops-lm2e.c + * + * Copyright (C) 2004 ICT CAS + * Author: Li xiaoyu, ICT CAS + * lixy@ict.ac.cn + * + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ + +#include +#include +#include + +#include + +#define PCI_ACCESS_READ 0 +#define PCI_ACCESS_WRITE 1 + +static inline void bflush(void) +{ + /* flush Bonito register writes */ + (void)BONITO_PCICMD; +} + +static int lm2e_pci_config_access(unsigned char access_type, + struct pci_bus *bus, unsigned int devfn, + int where, u32 *data) +{ + u32 busnum = bus->number; + u32 addr, type; + void *addrp; + int device = PCI_SLOT(devfn); + int function = PCI_FUNC(devfn); + int reg = where & ~3; + + if (busnum == 0) { + /* Type 0 configuration on onboard PCI bus */ + if (device > 20 || function > 7) { + *data = -1; /* device out of range */ + return PCIBIOS_DEVICE_NOT_FOUND; + } + addr = (1 << (device + 11)) | (function << 8) | reg; + type = 0; + } else { + /* Type 1 configuration on offboard PCI bus */ + if (device > 31 || function > 7) { + *data = -1; /* device out of range */ + return PCIBIOS_DEVICE_NOT_FOUND; + } + addr = (busnum << 16) | (device << 11) | (function << 8) | reg; + type = 0x10000; + } + + /* clear aborts */ + BONITO_PCICMD |= BONITO_PCICMD_MABORT | BONITO_PCICMD_MTABORT; + + BONITO_PCIMAP_CFG = (addr >> 16) | type; + bflush(); + + addrp = (void *)CKSEG1ADDR(BONITO_PCICFG_BASE | (addr & 0xffff)); + if (access_type == PCI_ACCESS_WRITE) { + *(volatile unsigned int *)addrp = cpu_to_le32(*data); + } else { + *data = le32_to_cpu(*(volatile unsigned int *)addrp); + } + if (BONITO_PCICMD & (BONITO_PCICMD_MABORT | BONITO_PCICMD_MTABORT)) { + BONITO_PCICMD |= BONITO_PCICMD_MABORT | BONITO_PCICMD_MTABORT; + *data = -1; + return PCIBIOS_DEVICE_NOT_FOUND; + } + + return PCIBIOS_SUCCESSFUL; + +} + +static int lm2e_pci_pcibios_read(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 * val) +{ + u32 data = 0; + + int ret = lm2e_pci_config_access(PCI_ACCESS_READ, + bus, devfn, where, &data); + + if (ret != PCIBIOS_SUCCESSFUL) + return ret; + + if (size == 1) + *val = (data >> ((where & 3) << 3)) & 0xff; + else if (size == 2) + *val = (data >> ((where & 3) << 3)) & 0xffff; + else + *val = data; + + return PCIBIOS_SUCCESSFUL; +} + +static int lm2e_pci_pcibios_write(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 val) +{ + u32 data = 0; + int ret; + + if (size == 4) + data = val; + else { + ret = lm2e_pci_config_access(PCI_ACCESS_READ, + bus, devfn, where, &data); + if (ret != PCIBIOS_SUCCESSFUL) + return ret; + + if (size == 1) + data = (data & ~(0xff << ((where & 3) << 3))) | + (val << ((where & 3) << 3)); + else if (size == 2) + data = (data & ~(0xffff << ((where & 3) << 3))) | + (val << ((where & 3) << 3)); + } + + ret = lm2e_pci_config_access(PCI_ACCESS_WRITE, + bus, devfn, where, &data); + if (ret != PCIBIOS_SUCCESSFUL) + return ret; + + return PCIBIOS_SUCCESSFUL; +} + +struct pci_ops loongson2e_pci_pci_ops = { + .read = lm2e_pci_pcibios_read, + .write = lm2e_pci_pcibios_write +}; diff --git a/include/asm-mips/mach-lemote/bonito.h b/include/asm-mips/mach-lemote/bonito.h new file mode 100644 index 0000000..83f7ac3 --- /dev/null +++ b/include/asm-mips/mach-lemote/bonito.h @@ -0,0 +1,381 @@ +/* + * Based on Algorithmics header + */ + +#ifndef _BONITO_H +#define _BONITI_H + +#ifdef __ASSEMBLER__ + +/* offsets from base register */ +#define BONITO(x) (x) + +#else /* !__ASSEMBLER */ + +/* offsets from base pointer */ +#define BONITO(x) *(volatile u32 *)((char *)CKSEG1ADDR(BONITO_REG_BASE) + (x)) + +#endif /* __ASSEMBLER__ */ + +#define BONITO_BOOT_BASE 0x1fc00000 +#define BONITO_BOOT_SIZE 0x00100000 +#define BONITO_BOOT_TOP (BONITO_BOOT_BASE+BONITO_BOOT_SIZE-1) +#define BONITO_FLASH_BASE 0x1c000000 +#define BONITO_FLASH_SIZE 0x03000000 +#define BONITO_FLASH_TOP (BONITO_FLASH_BASE+BONITO_FLASH_SIZE-1) +#define BONITO_SOCKET_BASE 0x1f800000 +#define BONITO_SOCKET_SIZE 0x00400000 +#define BONITO_SOCKET_TOP (BONITO_SOCKET_BASE+BONITO_SOCKET_SIZE-1) +#define BONITO_REG_BASE 0x1fe00000 +#define BONITO_REG_SIZE 0x00040000 +#define BONITO_REG_TOP (BONITO_REG_BASE+BONITO_REG_SIZE-1) +#define BONITO_DEV_BASE 0x1ff00000 +#define BONITO_DEV_SIZE 0x00100000 +#define BONITO_DEV_TOP (BONITO_DEV_BASE+BONITO_DEV_SIZE-1) +#define BONITO_PCILO_BASE 0x10000000 +#define BONITO_PCILO_SIZE 0x0c000000 +#define BONITO_PCILO_TOP (BONITO_PCILO_BASE+BONITO_PCILO_SIZE-1) +#define BONITO_PCILO0_BASE 0x10000000 +#define BONITO_PCILO1_BASE 0x14000000 +#define BONITO_PCILO2_BASE 0x18000000 +#define BONITO_PCIHI_BASE 0x20000000 +#define BONITO_PCIHI_SIZE 0x20000000 +#define BONITO_PCIHI_TOP (BONITO_PCIHI_BASE+BONITO_PCIHI_SIZE-1) +#define BONITO_PCIIO_BASE 0x1fd00000 +#define BONITO_PCIIO_SIZE 0x00100000 +#define BONITO_PCIIO_TOP (BONITO_PCIIO_BASE+BONITO_PCIIO_SIZE-1) +#define BONITO_PCICFG_BASE 0x1fe80000 +#define BONITO_PCICFG_SIZE 0x00080000 +#define BONITO_PCICFG_TOP (BONITO_PCICFG_BASE+BONITO_PCICFG_SIZE-1) + +/* Bonito Register Bases */ + +#define BONITO_PCICONFIGBASE 0x00 +#define BONITO_REGBASE 0x100 + +/* PCI Configuration Registers */ + +#define BONITO_PCI_REG(x) BONITO(BONITO_PCICONFIGBASE + (x)) +#define BONITO_PCIDID BONITO_PCI_REG(0x00) +#define BONITO_PCICMD BONITO_PCI_REG(0x04) +#define BONITO_PCICLASS BONITO_PCI_REG(0x08) +#define BONITO_PCILTIMER BONITO_PCI_REG(0x0c) +#define BONITO_PCIBASE0 BONITO_PCI_REG(0x10) +#define BONITO_PCIBASE1 BONITO_PCI_REG(0x14) +#define BONITO_PCIBASE2 BONITO_PCI_REG(0x18) +#define BONITO_PCIEXPRBASE BONITO_PCI_REG(0x30) +#define BONITO_PCIINT BONITO_PCI_REG(0x3c) + +#define BONITO_PCICMD_PERR 0x80000000 +#define BONITO_PCICMD_SERR 0x40000000 +#define BONITO_PCICMD_MABORT 0x20000000 +#define BONITO_PCICMD_MTABORT 0x10000000 +#define BONITO_PCICMD_TABORT 0x08000000 +#define BONITO_PCICMD_MPERR 0x01000000 +#define BONITO_PCICMD_PERRRESPEN 0x00000040 +#define BONITO_PCICMD_ASTEPEN 0x00000080 +#define BONITO_PCICMD_SERREN 0x00000100 +#define BONITO_PCILTIMER_BUSLATENCY 0x0000ff00 +#define BONITO_PCILTIMER_BUSLATENCY_SHIFT 8 + +/* 1. Bonito h/w Configuration */ +/* Power on register */ + +#define BONITO_BONPONCFG BONITO(BONITO_REGBASE + 0x00) + +#define BONITO_BONPONCFG_SYSCONTROLLERRD 0x00040000 +#define BONITO_BONPONCFG_ROMCS1SAMP 0x00020000 +#define BONITO_BONPONCFG_ROMCS0SAMP 0x00010000 +#define BONITO_BONPONCFG_CPUBIGEND 0x00004000 +#define BONITO_BONPONCFG_CPUPARITY 0x00002000 +#define BONITO_BONPONCFG_CPUTYPE 0x00000007 +#define BONITO_BONPONCFG_CPUTYPE_SHIFT 0 +#define BONITO_BONPONCFG_PCIRESET_OUT 0x00000008 +#define BONITO_BONPONCFG_IS_ARBITER 0x00000010 +#define BONITO_BONPONCFG_ROMBOOT 0x000000c0 +#define BONITO_BONPONCFG_ROMBOOT_SHIFT 6 + +#define BONITO_BONPONCFG_ROMBOOT_FLASH (0x0<>26) & BONITO_PCIMAP_PCIMAP_LO0) << ((WIN)*6)) + +#define BONITO_PCIMAP_WINSIZE (1<<26) +#define BONITO_PCIMAP_WINOFFSET(ADDR) ((ADDR) & (BONITO_PCIMAP_WINSIZE - 1)) +#define BONITO_PCIMAP_WINBASE(ADDR) ((ADDR) << 26) + +/* pcimembaseCfg */ + +#define BONITO_PCIMEMBASECFG_MASK 0xf0000000 +#define BONITO_PCIMEMBASECFG_MEMBASE0_MASK 0x0000001f +#define BONITO_PCIMEMBASECFG_MEMBASE0_MASK_SHIFT 0 +#define BONITO_PCIMEMBASECFG_MEMBASE0_TRANS 0x000003e0 +#define BONITO_PCIMEMBASECFG_MEMBASE0_TRANS_SHIFT 5 +#define BONITO_PCIMEMBASECFG_MEMBASE0_CACHED 0x00000400 +#define BONITO_PCIMEMBASECFG_MEMBASE0_IO 0x00000800 + +#define BONITO_PCIMEMBASECFG_MEMBASE1_MASK 0x0001f000 +#define BONITO_PCIMEMBASECFG_MEMBASE1_MASK_SHIFT 12 +#define BONITO_PCIMEMBASECFG_MEMBASE1_TRANS 0x003e0000 +#define BONITO_PCIMEMBASECFG_MEMBASE1_TRANS_SHIFT 17 +#define BONITO_PCIMEMBASECFG_MEMBASE1_CACHED 0x00400000 +#define BONITO_PCIMEMBASECFG_MEMBASE1_IO 0x00800000 + +#define BONITO_PCIMEMBASECFG_ASHIFT 23 +#define BONITO_PCIMEMBASECFG_AMASK 0x007fffff +#define BONITO_PCIMEMBASECFGSIZE(WIN,SIZE) (((~((SIZE)-1))>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) +#define BONITO_PCIMEMBASECFGBASE(WIN,BASE) (((BASE)>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS) + +#define BONITO_PCIMEMBASECFG_SIZE(WIN,CFG) (((((~(CFG)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK)) << (BONITO_PCIMEMBASECFG_ASHIFT - BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) | BONITO_PCIMEMBASECFG_AMASK) + +#define BONITO_PCIMEMBASECFG_ADDRMASK(WIN,CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT) +#define BONITO_PCIMEMBASECFG_ADDRMASK(WIN,CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT) +#define BONITO_PCIMEMBASECFG_ADDRTRANS(WIN,CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT) + +#define BONITO_PCITOPHYS(WIN,ADDR,CFG) ( \ + (((ADDR) & (~(BONITO_PCIMEMBASECFG_MASK))) & (~(BONITO_PCIMEMBASECFG_ADDRMASK(WIN,CFG)))) | \ + (BONITO_PCIMEMBASECFG_ADDRTRANS(WIN,CFG)) \ + ) + +/* PCICmd */ + +#define BONITO_PCICMD_MEMEN 0x00000002 +#define BONITO_PCICMD_MSTREN 0x00000004 + +#define BONITO_IRQ_BASE 32 + +#endif /* !_BONITO_H */ diff --git a/include/asm-mips/mach-lemote/dma-coherence.h b/include/asm-mips/mach-lemote/dma-coherence.h new file mode 100644 index 0000000..9506af4 --- /dev/null +++ b/include/asm-mips/mach-lemote/dma-coherence.h @@ -0,0 +1,43 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2006 Ralf Baechle + * + * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + * + */ +#ifndef __ASM_MACH_GENERIC_DMA_COHERENCE_H +#define __ASM_MACH_GENERIC_DMA_COHERENCE_H + +struct device; + +static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, + size_t size) +{ + return virt_to_phys(addr) | 0x80000000; +} + +static inline dma_addr_t plat_map_dma_mem_page(struct device *dev, + struct page *page) +{ + return page_to_phys(page) | 0x80000000; +} + +static inline unsigned long plat_dma_addr_to_phys(dma_addr_t dma_addr) +{ + return dma_addr & 0x7fffffff; +} + +static inline void plat_unmap_dma_mem(dma_addr_t dma_addr) +{ +} + +static inline int plat_device_is_coherent(struct device *dev) +{ + return 0; +} + +#endif /* __ASM_MACH_GENERIC_DMA_COHERENCE_H */ diff --git a/include/asm-mips/mach-lemote/mc146818rtc.h b/include/asm-mips/mach-lemote/mc146818rtc.h new file mode 100644 index 0000000..7850f89 --- /dev/null +++ b/include/asm-mips/mach-lemote/mc146818rtc.h @@ -0,0 +1,36 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1998, 2001, 03 by Ralf Baechle + * + * RTC routines for PC style attached Dallas chip. + */ +#ifndef __ASM_MACH_GENERIC_MC146818RTC_H +#define __ASM_MACH_GENERIC_MC146818RTC_H + +#include + +#define RTC_PORT(x) (0x70 + (x)) +#define RTC_IRQ 8 + +static inline unsigned char CMOS_READ(unsigned long addr) +{ + outb_p(addr, RTC_PORT(0)); + return inb_p(RTC_PORT(1)); +} + +static inline void CMOS_WRITE(unsigned char data, unsigned long addr) +{ + outb_p(addr, RTC_PORT(0)); + outb_p(data, RTC_PORT(1)); +} + +#define RTC_ALWAYS_BCD 0 + +#ifndef mc146818_decode_year +#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1970) +#endif + +#endif /* __ASM_MACH_GENERIC_MC146818RTC_H */ -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 07:55:29 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 07:55:32 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:60553 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021502AbXFFGxT (ORCPT ); Wed, 6 Jun 2007 07:53:19 +0100 Received: (qmail 7045 invoked by uid 511); 6 Jun 2007 07:00:18 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 07:00:18 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH 04/15] TO_PHYS_MASK for loongson2 Date: Wed, 6 Jun 2007 14:52:41 +0800 Message-Id: <1181112773336-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811127722019-git-send-email-tiansm@lemote.com> References: <11811127722019-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15287 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- include/asm-mips/addrspace.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h index 964c5ed..a4d9a07 100644 --- a/include/asm-mips/addrspace.h +++ b/include/asm-mips/addrspace.h @@ -145,7 +145,7 @@ #define TO_PHYS_MASK _CONST64_(0x000000ffffffffff) /* 2^^40 - 1 */ #endif -#if defined (CONFIG_CPU_R10000) +#if defined (CONFIG_CPU_R10000) || defined (CONFIG_CPU_LOONGSON2) #define TO_PHYS_MASK _CONST64_(0x000000ffffffffff) /* 2^^40 - 1 */ #endif -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 07:55:54 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 07:56:02 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:64649 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021471AbXFFGyE (ORCPT ); Wed, 6 Jun 2007 07:54:04 +0100 Received: (qmail 7066 invoked by uid 511); 6 Jun 2007 07:00:19 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 07:00:19 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH 07/15] add Loongson processor definitions Date: Wed, 6 Jun 2007 14:52:44 +0800 Message-Id: <11811127742520-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811127722019-git-send-email-tiansm@lemote.com> References: <11811127722019-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15288 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- include/asm-mips/cpu.h | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletions(-) diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h index d38fdbf..d289359 100644 --- a/include/asm-mips/cpu.h +++ b/include/asm-mips/cpu.h @@ -89,6 +89,8 @@ #define PRID_IMP_34K 0x9500 #define PRID_IMP_24KE 0x9600 #define PRID_IMP_74K 0x9700 +#define PRID_IMP_LOONGSON1 0x4200 +#define PRID_IMP_LOONGSON2 0x6300 /* * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE @@ -200,7 +202,10 @@ #define CPU_SB1A 62 #define CPU_74K 63 #define CPU_R14000 64 -#define CPU_LAST 64 +#define CPU_LOONGSON1 65 +#define CPU_LOONGSON2 66 + +#define CPU_LAST 66 /* * ISA Level encodings -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 07:56:24 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 07:56:28 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:64905 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021506AbXFFGyE (ORCPT ); Wed, 6 Jun 2007 07:54:04 +0100 Received: (qmail 7071 invoked by uid 511); 6 Jun 2007 07:00:19 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 07:00:19 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH 08/15] define MODULE_PROC_FAMILY for Loongson2 Date: Wed, 6 Jun 2007 14:52:45 +0800 Message-Id: <1181112774520-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811127722019-git-send-email-tiansm@lemote.com> References: <11811127722019-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15289 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- include/asm-mips/module.h | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/include/asm-mips/module.h b/include/asm-mips/module.h index 399d03f..f615324 100644 --- a/include/asm-mips/module.h +++ b/include/asm-mips/module.h @@ -112,6 +112,8 @@ search_module_dbetables(unsigned long addr) #define MODULE_PROC_FAMILY "RM9000 " #elif defined CONFIG_CPU_SB1 #define MODULE_PROC_FAMILY "SB1 " +#elif defined CONFIG_CPU_LOONGSON2 +#define MODULE_PROC_FAMILY "LOONGSON2 " #else #error MODULE_PROC_FAMILY undefined for your processor configuration #endif -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 07:56:54 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 07:56:59 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:65161 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021510AbXFFGyE (ORCPT ); Wed, 6 Jun 2007 07:54:04 +0100 Received: (qmail 7086 invoked by uid 511); 6 Jun 2007 07:00:19 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 07:00:19 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH 11/15] add Loongson support to /proc/cpuinfo Date: Wed, 6 Jun 2007 14:52:48 +0800 Message-Id: <11811127741952-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811127722019-git-send-email-tiansm@lemote.com> References: <11811127722019-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15290 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- arch/mips/kernel/proc.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 5ddc2e9..e915117 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -84,6 +84,7 @@ static const char *cpu_name[] = { [CPU_VR4181A] = "NEC VR4181A", [CPU_SR71000] = "Sandcraft SR71000", [CPU_PR4450] = "Philips PR4450", + [CPU_LOONGSON2] = "ICT Loongson-2", }; -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 07:57:23 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 07:57:26 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:65417 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021514AbXFFGyE (ORCPT ); Wed, 6 Jun 2007 07:54:04 +0100 Received: (qmail 7101 invoked by uid 511); 6 Jun 2007 07:00:20 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 07:00:20 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH 14/15] tlb handling support for Loongson2 processor Date: Wed, 6 Jun 2007 14:52:51 +0800 Message-Id: <1181112774155-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811127722019-git-send-email-tiansm@lemote.com> References: <11811127722019-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15291 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- arch/mips/mm/tlb-r4k.c | 23 ++++++++++++++++++++++- arch/mips/mm/tlbex.c | 8 +++++--- 2 files changed, 27 insertions(+), 4 deletions(-) diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c index 65160d4..dcd6913 100644 --- a/arch/mips/mm/tlb-r4k.c +++ b/arch/mips/mm/tlb-r4k.c @@ -48,6 +48,22 @@ extern void build_tlb_refill_handler(void); #endif /* CONFIG_MIPS_MT_SMTC */ +#if defined(CONFIG_CPU_LOONGSON2) +/* + * LOONGSON2 has a 4 entry itlb which is a subset of dtlb, + * unfortrunately, itlb is not totally transparent to software. + */ +#define FLUSH_ITLB write_c0_diag(4); + +#define FLUSH_ITLB_VM(vma) { if ((vma)->vm_flags & VM_EXEC) write_c0_diag(4); } + +#else + +#define FLUSH_ITLB +#define FLUSH_ITLB_VM(vma) + +#endif + void local_flush_tlb_all(void) { unsigned long flags; @@ -73,6 +89,7 @@ void local_flush_tlb_all(void) } tlbw_use_hazard(); write_c0_entryhi(old_ctx); + FLUSH_ITLB; EXIT_CRITICAL(flags); } @@ -136,6 +153,7 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, } else { drop_mmu_context(mm, cpu); } + FLUSH_ITLB; EXIT_CRITICAL(flags); } } @@ -178,6 +196,7 @@ void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) } else { local_flush_tlb_all(); } + FLUSH_ITLB; EXIT_CRITICAL(flags); } @@ -210,6 +229,7 @@ void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) finish: write_c0_entryhi(oldpid); + FLUSH_ITLB_VM(vma); EXIT_CRITICAL(flags); } } @@ -241,7 +261,7 @@ void local_flush_tlb_one(unsigned long page) tlbw_use_hazard(); } write_c0_entryhi(oldpid); - + FLUSH_ITLB; EXIT_CRITICAL(flags); } @@ -293,6 +313,7 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte) else tlb_write_indexed(); tlbw_use_hazard(); + FLUSH_ITLB_VM(vma); EXIT_CRITICAL(flags); } diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index e714929..4ec0964 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -893,6 +893,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l, case CPU_4KSC: case CPU_20KC: case CPU_25KF: + case CPU_LOONGSON2: tlbw(p); break; @@ -1276,7 +1277,8 @@ static void __init build_r4000_tlb_refill_handler(void) * need three, with the second nop'ed and the third being * unused. */ -#ifdef CONFIG_32BIT + /* Loongson2 ebase is different than r4k, we have more space */ +#if defined(CONFIG_32BIT) || defined(CONFIG_CPU_LOONGSON2) if ((p - tlb_handler) > 64) panic("TLB refill handler space exceeded"); #else @@ -1289,7 +1291,7 @@ static void __init build_r4000_tlb_refill_handler(void) /* * Now fold the handler in the TLB refill handler space. */ -#ifdef CONFIG_32BIT +#if defined(CONFIG_32BIT) || defined(CONFIG_CPU_LOONGSON2) f = final_handler; /* Simplest case, just copy the handler. */ copy_handler(relocs, labels, tlb_handler, p, f); @@ -1336,7 +1338,7 @@ static void __init build_r4000_tlb_refill_handler(void) final_len); f = final_handler; -#ifdef CONFIG_64BIT +#if defined(CONFIG_64BIT) && !defined(CONFIG_CPU_LOONGSON2) if (final_len > 32) final_len = 64; else -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 07:57:47 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 07:57:50 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:138 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021519AbXFFGyH (ORCPT ); Wed, 6 Jun 2007 07:54:07 +0100 Received: (qmail 7028 invoked by uid 511); 6 Jun 2007 07:00:18 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 07:00:18 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Subject: Lemote Loongson 2E patch update [take 2] Date: Wed, 6 Jun 2007 14:52:37 +0800 Message-Id: <11811127722019-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15292 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips loongson 2e patch updated for 2.6.22-rc4 arch/mips/Kconfig | 37 ++ arch/mips/Makefile | 8 arch/mips/kernel/Makefile | 1 arch/mips/kernel/cpu-probe.c | 9 arch/mips/kernel/proc.c | 2 arch/mips/kernel/setup.c | 9 arch/mips/lemote/lm2e/Makefile | 7 arch/mips/lemote/lm2e/bonito-irq.c | 74 +++++ arch/mips/lemote/lm2e/dbg_io.c | 146 ++++++++++ arch/mips/lemote/lm2e/irq.c | 146 ++++++++++ arch/mips/lemote/lm2e/pci.c | 72 +++++ arch/mips/lemote/lm2e/prom.c | 109 +++++++ arch/mips/lemote/lm2e/reset.c | 49 +++ arch/mips/lemote/lm2e/setup.c | 144 ++++++++++ arch/mips/lib-32/Makefile | 1 arch/mips/lib-64/Makefile | 1 arch/mips/mm/Makefile | 1 arch/mips/mm/c-r4k.c | 58 ++++ arch/mips/mm/tlb-r4k.c | 23 + arch/mips/mm/tlbex.c | 9 arch/mips/pci/Makefile | 2 arch/mips/pci/fixup-lm2e.c | 255 ++++++++++++++++++ arch/mips/pci/ops-lm2e.c | 153 ++++++++++ drivers/char/mem.c | 5 include/asm-mips/addrspace.h | 3 include/asm-mips/bootinfo.h | 7 include/asm-mips/cacheops.h | 5 include/asm-mips/cpu.h | 8 include/asm-mips/mach-lemote/bonito.h | 381 +++++++++++++++++++++++++++ include/asm-mips/mach-lemote/dma-coherence.h | 43 +++ include/asm-mips/mach-lemote/mc146818rtc.h | 37 ++ include/asm-mips/module.h | 3 include/asm-mips/serial.h | 10 33 files changed, 1796 insertions(+), 22 deletions(-) From tiansm@lemote.com Wed Jun 6 07:58:11 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 07:58:15 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:1162 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021521AbXFFGyL (ORCPT ); Wed, 6 Jun 2007 07:54:11 +0100 Received: (qmail 7035 invoked by uid 511); 6 Jun 2007 07:00:18 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 07:00:18 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH 02/15] arch related Makefile update for lemote fulong mini-PC Date: Wed, 6 Jun 2007 14:52:39 +0800 Message-Id: <1181112773641-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811127722019-git-send-email-tiansm@lemote.com> References: <11811127722019-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15293 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- arch/mips/Makefile | 8 ++++++++ arch/mips/kernel/Makefile | 1 + arch/mips/lib-32/Makefile | 1 + arch/mips/lib-64/Makefile | 1 + arch/mips/mm/Makefile | 1 + arch/mips/pci/Makefile | 1 + 6 files changed, 13 insertions(+), 0 deletions(-) diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 2b19605..3aedcf4 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -118,6 +118,7 @@ cflags-$(CONFIG_CPU_R4300) += -march=r4300 -Wa,--trap cflags-$(CONFIG_CPU_VR41XX) += -march=r4100 -Wa,--trap cflags-$(CONFIG_CPU_R4X00) += -march=r4600 -Wa,--trap cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap +cflags-$(CONFIG_CPU_LOONGSON2) += -march=r4600 -Wa,--trap cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \ -Wa,-mips32 -Wa,--trap cflags-$(CONFIG_CPU_MIPS32_R2) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \ @@ -298,6 +299,13 @@ cflags-$(CONFIG_WR_PPMC) += -Iinclude/asm-mips/mach-wrppmc load-$(CONFIG_WR_PPMC) += 0xffffffff80100000 # +# lemote fulong mini-PC board +# +core-$(CONFIG_LEMOTE_FULONG) +=arch/mips/lemote/lm2e/ +load-$(CONFIG_LEMOTE_FULONG) +=0xffffffff80100000 +cflags-$(CONFIG_LEMOTE_FULONG) += -Iinclude/asm-mips/mach-lemote + +# # For all MIPS, Inc. eval boards # core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/ diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index 4924626..40fdf79 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -31,6 +31,7 @@ obj-$(CONFIG_CPU_R10000) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_SB1) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_MIPS32) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_MIPS64) += r4k_fpu.o r4k_switch.o +obj-$(CONFIG_CPU_LOONGSON2) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_R6000) += r6000_fpu.o r4k_switch.o obj-$(CONFIG_SMP) += smp.o diff --git a/arch/mips/lib-32/Makefile b/arch/mips/lib-32/Makefile index 8b94d4c..b4be604 100644 --- a/arch/mips/lib-32/Makefile +++ b/arch/mips/lib-32/Makefile @@ -21,3 +21,4 @@ obj-$(CONFIG_CPU_SB1) += dump_tlb.o obj-$(CONFIG_CPU_TX39XX) += r3k_dump_tlb.o obj-$(CONFIG_CPU_TX49XX) += dump_tlb.o obj-$(CONFIG_CPU_VR41XX) += dump_tlb.o +obj-$(CONFIG_CPU_LOONGSON2) += dump_tlb.o diff --git a/arch/mips/lib-64/Makefile b/arch/mips/lib-64/Makefile index 8b94d4c..b4be604 100644 --- a/arch/mips/lib-64/Makefile +++ b/arch/mips/lib-64/Makefile @@ -21,3 +21,4 @@ obj-$(CONFIG_CPU_SB1) += dump_tlb.o obj-$(CONFIG_CPU_TX39XX) += r3k_dump_tlb.o obj-$(CONFIG_CPU_TX49XX) += dump_tlb.o obj-$(CONFIG_CPU_VR41XX) += dump_tlb.o +obj-$(CONFIG_CPU_LOONGSON2) += dump_tlb.o diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile index 293697b..ab24195 100644 --- a/arch/mips/mm/Makefile +++ b/arch/mips/mm/Makefile @@ -21,6 +21,7 @@ obj-$(CONFIG_CPU_R5432) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o obj-$(CONFIG_CPU_R8000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r8k.o obj-$(CONFIG_CPU_RM7000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o obj-$(CONFIG_CPU_RM9000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o +obj-$(CONFIG_CPU_LOONGSON2) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o obj-$(CONFIG_CPU_SB1) += c-sb1.o cerr-sb1.o cex-sb1.o pg-sb1.o \ tlb-r4k.o obj-$(CONFIG_CPU_TX39XX) += c-tx39.o pg-r4k.o tlb-r3k.o diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index aba3dbf..6396e02 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile @@ -50,3 +50,4 @@ obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-tx4938.o ops-tx4938.o obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o +obj-$(CONFIG_LEMOTE_FULONG) += fixup-lm2e.o ops-lm2e.o -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 07:58:36 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 07:58:39 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:1418 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021523AbXFFGyM (ORCPT ); Wed, 6 Jun 2007 07:54:12 +0100 Received: (qmail 7061 invoked by uid 511); 6 Jun 2007 07:00:19 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 07:00:19 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH 06/15] define Hit_Invalidate_I to Index_Invalidate_I for loongson2 Date: Wed, 6 Jun 2007 14:52:43 +0800 Message-Id: <11811127732934-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811127722019-git-send-email-tiansm@lemote.com> References: <11811127722019-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15294 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- include/asm-mips/cacheops.h | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/include/asm-mips/cacheops.h b/include/asm-mips/cacheops.h index c4a1ec3..df7f2de 100644 --- a/include/asm-mips/cacheops.h +++ b/include/asm-mips/cacheops.h @@ -20,7 +20,11 @@ #define Index_Load_Tag_D 0x05 #define Index_Store_Tag_I 0x08 #define Index_Store_Tag_D 0x09 +#if defined(CONFIG_CPU_LOONGSON2) +#define Hit_Invalidate_I 0x00 +#else #define Hit_Invalidate_I 0x10 +#endif #define Hit_Invalidate_D 0x11 #define Hit_Writeback_Inv_D 0x15 -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 07:58:59 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 07:59:03 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:1674 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021467AbXFFGyP (ORCPT ); Wed, 6 Jun 2007 07:54:15 +0100 Received: (qmail 7040 invoked by uid 511); 6 Jun 2007 07:00:18 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 07:00:18 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Sun Haiyong Subject: [PATCH 03/15] Kconfig update for lemote fulong miniPC Date: Wed, 6 Jun 2007 14:52:40 +0800 Message-Id: <11811127733730-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811127722019-git-send-email-tiansm@lemote.com> References: <11811127722019-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15295 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Sun Haiyong Signed-off-by: Fuxin Zhang Signed-off-by: Sun Haiyong --- arch/mips/Kconfig | 36 ++++++++++++++++++++++++++++++++++++ 1 files changed, 36 insertions(+), 0 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index c20cd90..16f1861 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -14,6 +14,25 @@ config ZONE_DMA choice prompt "System type" default SGI_IP22 +config LEMOTE_FULONG + bool "Support for Lemote's fulong mini-PC" + select SYS_HAS_CPU_LOONGSON2 + select DMA_NONCOHERENT + select BOOT_ELF32 + select BOARD_SCACHE + select HW_HAS_PCI + select I8259 + select ISA + select IRQ_CPU + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_HIGHMEM + select SYS_HAS_EARLY_PRINTK + select GENERIC_HARDIRQS_NO__DO_IRQ + select CPU_HAS_WB + help + Lemote Fulong mini-PC board, which uses Chinese Loongson-2E CPU and a fpga north bridge config MACH_ALCHEMY bool "Alchemy processor based machines" @@ -933,6 +952,13 @@ choice prompt "CPU type" default CPU_R4X00 +config CPU_LOONGSON2 + bool "LOONGSON2" + depends on SYS_HAS_CPU_LOONGSON2 + select CPU_SUPPORTS_32BIT_KERNEL + select CPU_SUPPORTS_64BIT_KERNEL + select CPU_SUPPORTS_HIGHMEM + config CPU_MIPS32_R1 bool "MIPS32 Release 1" depends on SYS_HAS_CPU_MIPS32_R1 @@ -1143,6 +1169,9 @@ config CPU_SB1 endchoice +config SYS_HAS_CPU_LOONGSON2 + bool + config SYS_HAS_CPU_MIPS32_R1 bool @@ -1477,6 +1506,13 @@ config CPU_HAS_SMARTMIPS config CPU_HAS_WB bool +config 64BIT_CONTEXT + bool "Save 64bit integer registers" if CPU_LOONGSON2 && 32BIT + help + Loongson2 CPU is 64bit , when used in 32BIT mode, its integer registers + can still be accessed as 64bit, mainly for multimedia instructions. We must have + all 64bit save/restored to make sure those instructions to get correct result. + # # Vectored interrupt mode is an R2 feature # -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 07:59:23 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 07:59:27 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:2954 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021488AbXFFGyT (ORCPT ); Wed, 6 Jun 2007 07:54:19 +0100 Received: (qmail 7056 invoked by uid 511); 6 Jun 2007 07:00:19 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 07:00:19 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Fuxin Zhang Subject: [PATCH 05/15] add MACH_GROUP_LEMOTE & MACH_LEMOTE_FULONG Date: Wed, 6 Jun 2007 14:52:42 +0800 Message-Id: <1181112773204-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11811127722019-git-send-email-tiansm@lemote.com> References: <11811127722019-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15296 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Fuxin Zhang Signed-off-by: Fuxin Zhang --- include/asm-mips/bootinfo.h | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h index b0c3297..5006930 100644 --- a/include/asm-mips/bootinfo.h +++ b/include/asm-mips/bootinfo.h @@ -213,6 +213,12 @@ #define MACH_GROUP_NEC_EMMA2RH 25 /* NEC EMMA2RH (was 23) */ #define MACH_NEC_MARKEINS 0 /* NEC EMMA2RH Mark-eins */ +/* + * Valid machtype for group LEMOTE + */ +#define MACH_GROUP_LEMOTE 27 +#define MACH_LEMOTE_FULONG 0 + #define CL_SIZE COMMAND_LINE_SIZE const char *get_system_type(void); -- 1.5.2.1 From tiansm@lemote.com Wed Jun 6 08:26:05 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 08:26:07 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:2957 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021471AbXFFH0F (ORCPT ); Wed, 6 Jun 2007 08:26:05 +0100 Received: (qmail 24957 invoked by uid 511); 6 Jun 2007 07:32:12 -0000 Received: from unknown (HELO ?192.168.2.233?) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 07:32:12 -0000 Message-ID: <4666613A.8090807@lemote.com> Date: Wed, 06 Jun 2007 15:24:42 +0800 From: Tian User-Agent: Icedove 1.5.0.8 (X11/20061116) MIME-Version: 1.0 To: Franck Bui-Huu CC: Ralf Baechle , Kumba , linux-mips@linux-mips.org Subject: Re: Mailing patches References: <20070604133551.GA24405@linux-mips.org> <4664DB12.80906@gentoo.org> <20070605152338.GA22937@linux-mips.org> <4666418C.9040401@lemote.com> In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15297 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips thx for reply and would it be better if I use --thread when git-format-patch? Franck Bui-Huu wrote: > Hi, > > On 6/6/07, Tian wrote: >> >> --no-chain-reply-to or --chain-reply-to ? > > Usually "--no-chain-reply-to" is used and I think it's easier to > discuss on the patchset with this option. > >> >> and.....should i resend the patches? > > Does your patchset have order depedency ? if so, I think you should. > From vagabon.xyz@gmail.com Wed Jun 6 08:49:43 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 08:49:45 +0100 (BST) Received: from nz-out-0506.google.com ([64.233.162.225]:7598 "EHLO nz-out-0506.google.com") by ftp.linux-mips.org with ESMTP id S20022036AbXFFHtn (ORCPT ); Wed, 6 Jun 2007 08:49:43 +0100 Received: by nz-out-0506.google.com with SMTP id z3so49912nzf for ; Wed, 06 Jun 2007 00:48:41 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=S6sPVJcDmAGTvmd8pUrbX5IwTo8AVMi6xBmN/RB3PmfIv0ZADGt5bXrLJYMGG/0I2DWB5+PL8zc3GgrR+BVKYOzfy0pb9scwZkhHGAdz8TS1FJxsy+dAvstHGENTibbla7Nc6rcBMH6Z35RmZiT+pDaWPHpXctpXPwXy8bFZLlk= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=Jw0TyTtCKLbQYp4yT4KQpVuOayGYT+P9gVR3W5L7TQI/rHwx0by5G1ZEzyCm+NiA/Kvaqc9UCPmQ0SzpraJrUv7mCROtqo/z/Hj8+eBDcvqaLMbyOxuvIhcxHgkPwZwj7b5G93TXtlvPMAg/+s1k5sBwE1tP4FnSApXdczPIfec= Received: by 10.65.22.9 with SMTP id z9mr371252qbi.1181116121308; Wed, 06 Jun 2007 00:48:41 -0700 (PDT) Received: by 10.65.241.19 with HTTP; Wed, 6 Jun 2007 00:48:41 -0700 (PDT) Message-ID: Date: Wed, 6 Jun 2007 09:48:41 +0200 From: "Franck Bui-Huu" To: Tian Subject: Re: Mailing patches Cc: "Ralf Baechle" , Kumba , linux-mips@linux-mips.org In-Reply-To: <4666613A.8090807@lemote.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20070604133551.GA24405@linux-mips.org> <4664DB12.80906@gentoo.org> <20070605152338.GA22937@linux-mips.org> <4666418C.9040401@lemote.com> <4666613A.8090807@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15298 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips On 6/6/07, Tian wrote: > thx for reply > > and would it be better if I use --thread when git-format-patch? > Well, since you're using git-send-email with "--compose" and "--no-chain-reply-to" switches, you don't need it. Take a look at git-send-email and git-format-patch man pages, it's well described. -- Franck From tiansm@lemote.com Wed Jun 6 08:53:32 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 08:53:36 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:27533 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021575AbXFFHxc (ORCPT ); Wed, 6 Jun 2007 08:53:32 +0100 Received: (qmail 2180 invoked by uid 511); 6 Jun 2007 08:00:41 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 6 Jun 2007 08:00:41 -0000 From: Songmao Tian To: linux-mips@linux-mips.org Cc: Songmao Tian Subject: [PATCH] Add fulong default config Date: Wed, 6 Jun 2007 15:53:14 +0800 Message-Id: <1181116394772-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15299 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips fulong is mini pc based on loongson 2e developed by Lemote Signed-off-by: Songmao Tian --- arch/mips/configs/fulong_defconfig | 1767 ++++++++++++++++++++++++++++++++++++ 1 files changed, 1767 insertions(+), 0 deletions(-) create mode 100644 arch/mips/configs/fulong_defconfig diff --git a/arch/mips/configs/fulong_defconfig b/arch/mips/configs/fulong_defconfig new file mode 100644 index 0000000..cd6563a --- /dev/null +++ b/arch/mips/configs/fulong_defconfig @@ -0,0 +1,1767 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.22-rc3 +# Wed Jun 6 11:42:13 2007 +# +CONFIG_MIPS=y + +# +# Machine selection +# +CONFIG_LEMOTE_FULONG=y +# CONFIG_MACH_ALCHEMY is not set +# CONFIG_BASLER_EXCITE is not set +# CONFIG_MIPS_COBALT is not set +# CONFIG_MACH_DECSTATION is not set +# CONFIG_MIPS_EV64120 is not set +# CONFIG_MACH_JAZZ is not set +# CONFIG_LASAT is not set +# CONFIG_MIPS_ATLAS is not set +# CONFIG_MIPS_MALTA is not set +# CONFIG_MIPS_SEAD is not set +# CONFIG_WR_PPMC is not set +# CONFIG_MIPS_SIM is not set +# CONFIG_MOMENCO_OCELOT is not set +# CONFIG_MOMENCO_OCELOT_3 is not set +# CONFIG_MOMENCO_OCELOT_C is not set +# CONFIG_PNX8550_JBS is not set +# CONFIG_PNX8550_STB810 is not set +# CONFIG_DDB5477 is not set +# CONFIG_MACH_VR41XX is not set +# CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set +# CONFIG_MARKEINS is not set +# CONFIG_SGI_IP22 is not set +# CONFIG_SGI_IP27 is not set +# CONFIG_SGI_IP32 is not set +# CONFIG_SIBYTE_BIGSUR is not set +# CONFIG_SIBYTE_SWARM is not set +# CONFIG_SIBYTE_SENTOSA is not set +# CONFIG_SIBYTE_RHONE is not set +# CONFIG_SIBYTE_CARMEL is not set +# CONFIG_SIBYTE_PTSWARM is not set +# CONFIG_SIBYTE_LITTLESUR is not set +# CONFIG_SIBYTE_CRHINE is not set +# CONFIG_SIBYTE_CRHONE is not set +# CONFIG_SNI_RM is not set +# CONFIG_TOSHIBA_JMR3927 is not set +# CONFIG_TOSHIBA_RBTX4927 is not set +# CONFIG_TOSHIBA_RBTX4938 is not set +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_TIME=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DMA_NEED_PCI_MAP_STATE=y +CONFIG_EARLY_PRINTK=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_I8259=y +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_IRQ_CPU=y +CONFIG_BOOT_ELF32=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 + +# +# CPU selection +# +CONFIG_CPU_LOONGSON2=y +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS32_R2 is not set +# CONFIG_CPU_MIPS64_R1 is not set +# CONFIG_CPU_MIPS64_R2 is not set +# CONFIG_CPU_R3000 is not set +# CONFIG_CPU_TX39XX is not set +# CONFIG_CPU_VR41XX is not set +# CONFIG_CPU_R4300 is not set +# CONFIG_CPU_R4X00 is not set +# CONFIG_CPU_TX49XX is not set +# CONFIG_CPU_R5000 is not set +# CONFIG_CPU_R5432 is not set +# CONFIG_CPU_R6000 is not set +# CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R8000 is not set +# CONFIG_CPU_R10000 is not set +# CONFIG_CPU_RM7000 is not set +# CONFIG_CPU_RM9000 is not set +# CONFIG_CPU_SB1 is not set +CONFIG_SYS_HAS_CPU_LOONGSON2=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y + +# +# Kernel type +# +# CONFIG_32BIT is not set +CONFIG_64BIT=y +# CONFIG_PAGE_SIZE_4KB is not set +# CONFIG_PAGE_SIZE_8KB is not set +CONFIG_PAGE_SIZE_16KB=y +# CONFIG_PAGE_SIZE_64KB is not set +CONFIG_BOARD_SCACHE=y +CONFIG_MIPS_MT_DISABLED=y +# CONFIG_MIPS_MT_SMP is not set +# CONFIG_MIPS_MT_SMTC is not set +# CONFIG_MIPS_VPE_LOADER is not set +CONFIG_CPU_HAS_WB=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_SYS_SUPPORTS_HIGHMEM=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_RESOURCES_64BIT=y +CONFIG_ZONE_DMA_FLAG=0 +# CONFIG_HZ_48 is not set +# CONFIG_HZ_100 is not set +# CONFIG_HZ_128 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_256 is not set +# CONFIG_HZ_1000 is not set +# CONFIG_HZ_1024 is not set +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_HZ=250 +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y +# CONFIG_PREEMPT is not set +# CONFIG_KEXEC is not set +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="lm32" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_IPC_NS is not set +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +# CONFIG_TASKSTATS is not set +# CONFIG_UTS_NS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_SYSFS_DEPRECATED=y +# CONFIG_RELAY is not set +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y + +# +# Block layer +# +CONFIG_BLOCK=y +# CONFIG_BLK_DEV_IO_TRACE is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" + +# +# Bus options (PCI, PCMCIA, EISA, ISA, TC) +# +CONFIG_HW_HAS_PCI=y +CONFIG_PCI=y +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_ISA=y +CONFIG_MMU=y + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set +# CONFIG_HOTPLUG_PCI is not set + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +CONFIG_BINFMT_MISC=y +# CONFIG_BUILD_ELF64 is not set +CONFIG_MIPS32_COMPAT=y +CONFIG_COMPAT=y +CONFIG_SYSVIPC_COMPAT=y +CONFIG_MIPS32_O32=y +CONFIG_MIPS32_N32=y +CONFIG_BINFMT_ELF32=y + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_LEGACY is not set +# CONFIG_PM_DEBUG is not set +# CONFIG_PM_SYSFS_DEPRECATED is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +CONFIG_NET_IPIP=m +CONFIG_NET_IPGRE=m +CONFIG_NET_IPGRE_BROADCAST=y +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +CONFIG_INET_TUNNEL=m +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IP_VS is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_NETLINK=m +CONFIG_NETFILTER_NETLINK_QUEUE=m +CONFIG_NETFILTER_NETLINK_LOG=m +# CONFIG_NF_CONNTRACK_ENABLED is not set +# CONFIG_NF_CONNTRACK is not set +CONFIG_NETFILTER_XTABLES=m +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +CONFIG_NETFILTER_XT_TARGET_MARK=m +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_NETFILTER_XT_MATCH_DCCP=m +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +CONFIG_NETFILTER_XT_MATCH_ESP=m +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +CONFIG_NETFILTER_XT_MATCH_QUOTA=m +CONFIG_NETFILTER_XT_MATCH_REALM=m +CONFIG_NETFILTER_XT_MATCH_SCTP=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_STRING=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set + +# +# IP: Netfilter Configuration +# +CONFIG_IP_NF_QUEUE=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MATCH_IPRANGE=m +CONFIG_IP_NF_MATCH_TOS=m +CONFIG_IP_NF_MATCH_RECENT=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_MATCH_OWNER=m +CONFIG_IP_NF_MATCH_ADDRTYPE=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_TARGET_LOG=m +CONFIG_IP_NF_TARGET_ULOG=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_TARGET_TOS=m +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_RAW=m +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARP_MANGLE=m +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set +CONFIG_NET_CLS_ROUTE=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_EXT=y +# CONFIG_MAC80211 is not set +CONFIG_IEEE80211=m +# CONFIG_IEEE80211_DEBUG is not set +CONFIG_IEEE80211_CRYPT_WEP=m +# CONFIG_IEEE80211_CRYPT_CCMP is not set +# CONFIG_IEEE80211_CRYPT_TKIP is not set +# CONFIG_IEEE80211_SOFTMAC is not set +# CONFIG_RFKILL is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=m +# CONFIG_SYS_HYPERVISOR is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set +CONFIG_MTD=m +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +# CONFIG_MTD_PARTITIONS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=m +CONFIG_MTD_BLKDEVS=m +CONFIG_MTD_BLOCK=m +# CONFIG_MTD_BLOCK_RO is not set +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=m +CONFIG_MTD_JEDECPROBE=m +CONFIG_MTD_GEN_PROBE=m +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_GEOMETRY is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=m +CONFIG_MTD_CFI_STAA=m +CONFIG_MTD_CFI_UTIL=m +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=m +CONFIG_MTD_PHYSMAP_START=0x1fc00000 +CONFIG_MTD_PHYSMAP_LEN=0x80000 +CONFIG_MTD_PHYSMAP_BANKWIDTH=1 +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# +# CONFIG_PNP is not set +# CONFIG_PNPACPI is not set + +# +# Block devices +# +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_CRYPTOLOOP=m +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=m +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 +CONFIG_CDROM_PKTCDVD=m +CONFIG_CDROM_PKTCDVD_BUFFERS=8 +# CONFIG_CDROM_PKTCDVD_WCACHE is not set +CONFIG_ATA_OVER_ETH=m + +# +# Misc devices +# +# CONFIG_PHANTOM is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_BLINK is not set +CONFIG_IDE=y +CONFIG_IDE_MAX_HWIFS=4 +CONFIG_BLK_DEV_IDE=y + +# +# Please see Documentation/ide.txt for help/info on IDE drives +# +# CONFIG_BLK_DEV_IDE_SATA is not set +CONFIG_BLK_DEV_IDEDISK=y +CONFIG_IDEDISK_MULTI_MODE=y +CONFIG_BLK_DEV_IDECD=y +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDEFLOPPY is not set +CONFIG_BLK_DEV_IDESCSI=y +CONFIG_IDE_TASK_IOCTL=y +CONFIG_IDE_PROC_FS=y + +# +# IDE chipset support/bugfixes +# +CONFIG_IDE_GENERIC=y +CONFIG_BLK_DEV_IDEPCI=y +CONFIG_IDEPCI_SHARE_IRQ=y +CONFIG_IDEPCI_PCIBUS_ORDER=y +# CONFIG_BLK_DEV_OFFBOARD is not set +CONFIG_BLK_DEV_GENERIC=y +# CONFIG_BLK_DEV_OPTI621 is not set +CONFIG_BLK_DEV_IDEDMA_PCI=y +# CONFIG_BLK_DEV_IDEDMA_FORCED is not set +# CONFIG_IDEDMA_ONLYDISK is not set +# CONFIG_BLK_DEV_AEC62XX is not set +# CONFIG_BLK_DEV_ALI15X3 is not set +# CONFIG_BLK_DEV_AMD74XX is not set +# CONFIG_BLK_DEV_CMD64X is not set +# CONFIG_BLK_DEV_TRIFLEX is not set +# CONFIG_BLK_DEV_CY82C693 is not set +# CONFIG_BLK_DEV_CS5520 is not set +# CONFIG_BLK_DEV_CS5530 is not set +# CONFIG_BLK_DEV_HPT34X is not set +# CONFIG_BLK_DEV_HPT366 is not set +# CONFIG_BLK_DEV_JMICRON is not set +# CONFIG_BLK_DEV_SC1200 is not set +# CONFIG_BLK_DEV_PIIX is not set +# CONFIG_BLK_DEV_IT8213 is not set +# CONFIG_BLK_DEV_IT821X is not set +# CONFIG_BLK_DEV_NS87415 is not set +# CONFIG_BLK_DEV_PDC202XX_OLD is not set +# CONFIG_BLK_DEV_PDC202XX_NEW is not set +# CONFIG_BLK_DEV_SVWKS is not set +# CONFIG_BLK_DEV_SIIMAGE is not set +# CONFIG_BLK_DEV_SLC90E66 is not set +# CONFIG_BLK_DEV_TRM290 is not set +CONFIG_BLK_DEV_VIA82CXXX=y +# CONFIG_BLK_DEV_TC86C001 is not set +# CONFIG_IDE_ARM is not set +# CONFIG_IDE_CHIPSETS is not set +CONFIG_BLK_DEV_IDEDMA=y +# CONFIG_IDEDMA_IVB is not set +# CONFIG_BLK_DEV_HD is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +CONFIG_BLK_DEV_SR_VENDOR=y +CONFIG_CHR_DEV_SG=y +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +CONFIG_SCSI_CONSTANTS=y +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set + +# +# SCSI low-level drivers +# +# CONFIG_ISCSI_TCP is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_IN2000 is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_DTC3280 is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_GENERIC_NCR5380 is not set +# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_NCR53C406A is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_PAS16 is not set +# CONFIG_SCSI_PSI240I is not set +# CONFIG_SCSI_QLOGIC_FAS is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_FC is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_SYM53C416 is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_T128 is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_SRP is not set +# CONFIG_ATA is not set + +# +# Old CD-ROM drivers (not SCSI, not IDE) +# +# CONFIG_CD_NO_IDESCSI is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set +# CONFIG_FUSION_SPI is not set +# CONFIG_FUSION_FC is not set +# CONFIG_FUSION_SAS is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# +# CONFIG_I2O is not set + +# +# Network device support +# +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_ARCNET is not set +CONFIG_PHYLIB=m + +# +# MII PHY device drivers +# +CONFIG_MARVELL_PHY=m +CONFIG_DAVICOM_PHY=m +CONFIG_QSEMI_PHY=m +CONFIG_LXT_PHY=m +CONFIG_CICADA_PHY=m +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_FIXED_PHY is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_SMC is not set +# CONFIG_DM9000 is not set +# CONFIG_NET_VENDOR_RACAL is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_AT1700 is not set +# CONFIG_DEPCA is not set +# CONFIG_HP100 is not set +# CONFIG_NET_ISA is not set +CONFIG_NET_PCI=y +# CONFIG_PCNET32 is not set +# CONFIG_AMD8111_ETH is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_AC3200 is not set +# CONFIG_APRICOT is not set +# CONFIG_B44 is not set +# CONFIG_FORCEDETH is not set +# CONFIG_CS89x0 is not set +# CONFIG_TC35815 is not set +# CONFIG_DGRS is not set +# CONFIG_EEPRO100 is not set +# CONFIG_E100 is not set +# CONFIG_FEALNX is not set +# CONFIG_NATSEMI is not set +# CONFIG_NE2K_PCI is not set +# CONFIG_8139CP is not set +CONFIG_8139TOO=y +# CONFIG_8139TOO_PIO is not set +# CONFIG_8139TOO_TUNE_TWISTER is not set +# CONFIG_8139TOO_8129 is not set +# CONFIG_8139_OLD_RX_RESET is not set +# CONFIG_SIS900 is not set +# CONFIG_EPIC100 is not set +# CONFIG_SUNDANCE is not set +# CONFIG_VIA_RHINE is not set +# CONFIG_SC92031 is not set +CONFIG_NETDEV_1000=y +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_SK98LIN is not set +# CONFIG_VIA_VELOCITY is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +# CONFIG_QLA3XXX is not set +# CONFIG_ATL1 is not set +CONFIG_NETDEV_10000=y +# CONFIG_CHELSIO_T1 is not set +# CONFIG_CHELSIO_T3 is not set +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set +# CONFIG_MYRI10GE is not set +# CONFIG_NETXEN_NIC is not set +# CONFIG_MLX4_CORE is not set +# CONFIG_TR is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET_MII is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +CONFIG_PPP=m +CONFIG_PPP_MULTILINK=y +CONFIG_PPP_FILTER=y +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_MPPE=m +CONFIG_PPPOE=m +CONFIG_SLIP=m +CONFIG_SLIP_COMPRESSED=y +CONFIG_SLHC=m +CONFIG_SLIP_SMART=y +CONFIG_SLIP_MODE_SLIP6=y +CONFIG_NET_FC=y +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_FF_MEMLESS=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ATKBD=m +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_LIFEBOOK=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_SERIAL=y +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_INPORT is not set +# CONFIG_MOUSE_LOGIBM is not set +# CONFIG_MOUSE_PC110PAD is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_I8042=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_NR_UARTS=2 +CONFIG_SERIAL_8250_RUNTIME_UARTS=2 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set +# CONFIG_WATCHDOG is not set +CONFIG_HW_RANDOM=y +CONFIG_RTC=y +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_DRM is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +CONFIG_I2C=m +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=m + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_ELEKTOR is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_TINY_USB is not set +# CONFIG_I2C_VIA is not set +CONFIG_I2C_VIAPRO=m +# CONFIG_I2C_VOODOO3 is not set +# CONFIG_I2C_PCA_ISA is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set +# CONFIG_HWMON is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set + +# +# Multimedia devices +# +CONFIG_VIDEO_DEV=m +CONFIG_VIDEO_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y +# CONFIG_VIDEO_VIVI is not set +# CONFIG_VIDEO_BT848 is not set +# CONFIG_VIDEO_PMS is not set +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_VIDEO_SAA5246A is not set +# CONFIG_VIDEO_SAA5249 is not set +# CONFIG_TUNER_3036 is not set +# CONFIG_VIDEO_STRADIS is not set +# CONFIG_VIDEO_SAA7134 is not set +# CONFIG_VIDEO_MXB is not set +# CONFIG_VIDEO_DPC is not set +# CONFIG_VIDEO_HEXIUM_ORION is not set +# CONFIG_VIDEO_HEXIUM_GEMINI is not set +# CONFIG_VIDEO_CX88 is not set +# CONFIG_VIDEO_IVTV is not set +# CONFIG_VIDEO_CAFE_CCIC is not set +CONFIG_V4L_USB_DRIVERS=y +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_VIDEO_USBVISION is not set +CONFIG_VIDEO_USBVIDEO=m +CONFIG_USB_VICAM=m +CONFIG_USB_IBMCAM=m +CONFIG_USB_KONICAWC=m +CONFIG_USB_QUICKCAM_MESSENGER=m +CONFIG_USB_ET61X251=m +# CONFIG_VIDEO_OVCAMCHIP is not set +# CONFIG_USB_W9968CF is not set +CONFIG_USB_OV511=m +CONFIG_USB_SE401=m +CONFIG_USB_SN9C102=m +CONFIG_USB_STV680=m +CONFIG_USB_ZC0301=m +CONFIG_USB_PWC=m +# CONFIG_USB_PWC_DEBUG is not set +# CONFIG_USB_ZR364XX is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_RADIO_CADET is not set +# CONFIG_RADIO_RTRACK is not set +# CONFIG_RADIO_RTRACK2 is not set +# CONFIG_RADIO_AZTECH is not set +# CONFIG_RADIO_GEMTEK is not set +# CONFIG_RADIO_GEMTEK_PCI is not set +# CONFIG_RADIO_MAXIRADIO is not set +# CONFIG_RADIO_MAESTRO is not set +# CONFIG_RADIO_SF16FMI is not set +# CONFIG_RADIO_SF16FMR2 is not set +# CONFIG_RADIO_TERRATEC is not set +# CONFIG_RADIO_TRUST is not set +# CONFIG_RADIO_TYPHOON is not set +# CONFIG_RADIO_ZOLTRIX is not set +# CONFIG_USB_DSBR is not set +# CONFIG_DVB_CORE is not set +CONFIG_DAB=y +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_LCD_CLASS_DEVICE=m + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set +# CONFIG_VGASTATE is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_SYS_FOPS is not set +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +CONFIG_FB_BACKLIGHT=y +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_MATROX is not set +CONFIG_FB_RADEON=y +# CONFIG_FB_RADEON_I2C is not set +CONFIG_FB_RADEON_BACKLIGHT=y +# CONFIG_FB_RADEON_DEBUG is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_SMIVGX is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_VIRTUAL is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +# CONFIG_MDA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +# CONFIG_LOGO is not set + +# +# Sound +# +CONFIG_SOUND=y + +# +# Advanced Linux Sound Architecture +# +CONFIG_SND=m +CONFIG_SND_TIMER=m +CONFIG_SND_PCM=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_SEQUENCER=m +CONFIG_SND_SEQ_DUMMY=m +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=m +CONFIG_SND_PCM_OSS=m +CONFIG_SND_PCM_OSS_PLUGINS=y +CONFIG_SND_SEQUENCER_OSS=y +CONFIG_SND_RTCTIMER=m +CONFIG_SND_SEQ_RTCTIMER_DEFAULT=y +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# +CONFIG_SND_MPU401_UART=m +CONFIG_SND_AC97_CODEC=m +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_VIRMIDI is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# PCI devices +# +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ALS300 is not set +# CONFIG_SND_ALI5451 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AZT3328 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_EMU10K1 is not set +# CONFIG_SND_EMU10K1X is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_ES1938 is not set +# CONFIG_SND_ES1968 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDA_INTEL is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_ICE1712 is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_MAESTRO3 is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SONICVIBES is not set +# CONFIG_SND_TRIDENT is not set +CONFIG_SND_VIA82XX=m +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set +# CONFIG_SND_AC97_POWER_SAVE is not set + +# +# ALSA MIPS devices +# + +# +# USB devices +# +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set + +# +# System on Chip audio support +# +# CONFIG_SND_SOC is not set + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set +CONFIG_AC97_BUS=m + +# +# HID Devices +# +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=m +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +CONFIG_USB_HIDDEV=y + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_DEVICE_CLASS is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_SPLIT_ISO=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +# CONFIG_USB_EHCI_BIG_ENDIAN_MMIO is not set +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_UHCI_HCD=m +# CONFIG_USB_SL811_HCD is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=y +CONFIG_USB_PRINTER=y + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_KARMA is not set +CONFIG_USB_LIBUSUAL=y + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USB_MON is not set + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set +# CONFIG_MMC is not set + +# +# LED devices +# +# CONFIG_NEW_LEDS is not set + +# +# LED drivers +# + +# +# LED Triggers +# + +# +# InfiniBand support +# +# CONFIG_INFINIBAND is not set + +# +# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) +# + +# +# Real Time Clock +# +# CONFIG_RTC_CLASS is not set + +# +# DMA Engine support +# +# CONFIG_DMA_ENGINE is not set + +# +# DMA Clients +# + +# +# DMA Devices +# + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +CONFIG_EXT2_FS_XIP=y +CONFIG_FS_XIP=y +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +# CONFIG_REISERFS_FS_XATTR is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +CONFIG_AUTOFS_FS=y +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=y + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=936 +CONFIG_FAT_DEFAULT_IOCHARSET="utf8" +CONFIG_NTFS_FS=m +# CONFIG_NTFS_DEBUG is not set +CONFIG_NTFS_RW=y + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=m +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NFS_DIRECTIO=y +CONFIG_NFSD=m +CONFIG_NFSD_V2_ACL=y +CONFIG_NFSD_V3=y +CONFIG_NFSD_V3_ACL=y +CONFIG_NFSD_V4=y +CONFIG_NFSD_TCP=y +CONFIG_LOCKD=m +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=m +CONFIG_NFS_ACL_SUPPORT=m +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=m +CONFIG_SUNRPC_GSS=m +# CONFIG_SUNRPC_BIND34 is not set +CONFIG_RPCSEC_GSS_KRB5=m +# CONFIG_RPCSEC_GSS_SPKM3 is not set +CONFIG_SMB_FS=m +CONFIG_SMB_NLS_DEFAULT=y +CONFIG_SMB_NLS_REMOTE="cp936" +CONFIG_CIFS=m +CONFIG_CIFS_STATS=y +CONFIG_CIFS_STATS2=y +CONFIG_CIFS_WEAK_PW_HASH=y +CONFIG_CIFS_XATTR=y +CONFIG_CIFS_POSIX=y +CONFIG_CIFS_DEBUG2=y +CONFIG_CIFS_EXPERIMENTAL=y +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set + +# +# Native Language Support +# +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="utf8" +# CONFIG_NLS_CODEPAGE_437 is not set +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +CONFIG_NLS_CODEPAGE_936=y +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=y + +# +# Distributed Lock Manager +# +# CONFIG_DLM is not set + +# +# Profiling support +# +CONFIG_PROFILING=y +CONFIG_OPROFILE=m + +# +# Kernel hacking +# +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +# CONFIG_PRINTK_TIME is not set +# CONFIG_ENABLE_MUST_CHECK is not set +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_CROSSCOMPILE=y +CONFIG_CMDLINE="" + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +CONFIG_CRYPTO=y +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=m +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=m +CONFIG_CRYPTO_SHA1=m +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_GF128MUL is not set +CONFIG_CRYPTO_ECB=m +CONFIG_CRYPTO_CBC=m +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_DES=m +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +CONFIG_CRYPTO_ARC4=m +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_DEFLATE=m +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_CRC_CCITT=y +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=m +CONFIG_ZLIB_DEFLATE=m +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_KMP=m +CONFIG_TEXTSEARCH_BM=m +CONFIG_TEXTSEARCH_FSM=m +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y -- 1.5.2.1 From vagabon.xyz@gmail.com Wed Jun 6 09:02:31 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 09:02:33 +0100 (BST) Received: from py-out-1112.google.com ([64.233.166.176]:32790 "EHLO py-out-1112.google.com") by ftp.linux-mips.org with ESMTP id S20021575AbXFFICb (ORCPT ); Wed, 6 Jun 2007 09:02:31 +0100 Received: by py-out-1112.google.com with SMTP id f31so109873pyh for ; Wed, 06 Jun 2007 01:01:30 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=XsRr3fLqOLtlW/d0TG68Kn0IqrajI0XGXrqtsKXfPFpws1k/O0vhy16CvwT5bjJccSFYc1J+RGC2HbtPyJLg8n10nSFfNAqhNJguDUHxRzvYkz/nW2akzJTwtA1EK95kCibxGDOhE4cYng6o7cpUBN0FP7SQu6CK5cNse47s8Is= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=aMDpmvlzR1ABFsjRnNx2BfELCHQQxtzT0/F4IXFiydAH9uZMF0hc68NE7pw9a+B4Sch96smFfTHCYr4YVizo8QPJWHPRkyQ5w5qsfhqiQ5zjelV6vfxiiMZgYmSe0fw4nSisDgYpg7agdjb0ljOrghntfQ0j52xXg+CfLqY9VMI= Received: by 10.65.219.20 with SMTP id w20mr396497qbq.1181116889831; Wed, 06 Jun 2007 01:01:29 -0700 (PDT) Received: by 10.65.241.19 with HTTP; Wed, 6 Jun 2007 01:01:29 -0700 (PDT) Message-ID: Date: Wed, 6 Jun 2007 10:01:29 +0200 From: "Franck Bui-Huu" To: "tiansm@lemote.com" Subject: Re: [PATCH 15/15] work around for more than 256MB memory support Cc: linux-mips@linux-mips.org, "Fuxin Zhang" In-Reply-To: <11811127744038-git-send-email-tiansm@lemote.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <11811127722019-git-send-email-tiansm@lemote.com> <11811127744038-git-send-email-tiansm@lemote.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15300 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips On 6/6/07, tiansm@lemote.com wrote: > From: Fuxin Zhang > > Signed-off-by: Fuxin Zhang > --- > drivers/char/mem.c | 4 ++++ > 1 files changed, 4 insertions(+), 0 deletions(-) > > diff --git a/drivers/char/mem.c b/drivers/char/mem.c > index cc9a9d0..a19b46a 100644 > --- a/drivers/char/mem.c > +++ b/drivers/char/mem.c > @@ -82,8 +82,12 @@ static inline int uncached_access(struct file *file, unsigned long addr) > */ > if (file->f_flags & O_SYNC) > return 1; > +#if defined(CONFIG_LEMOTE_FULONG) && defined(CONFIG_64BIT) > + return (addr >= __pa(high_memory)) || ((addr >=0x10000000) && (addr < 0x20000000)); > +#else > return addr >= __pa(high_memory); > #endif > +#endif > } That would be nice to have a nice log to justify such a hack.... Thanks -- Franck From macro@linux-mips.org Wed Jun 6 10:07:39 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 10:07:41 +0100 (BST) Received: from pollux.ds.pg.gda.pl ([153.19.208.7]:29967 "EHLO pollux.ds.pg.gda.pl") by ftp.linux-mips.org with ESMTP id S20021466AbXFFJHj (ORCPT ); Wed, 6 Jun 2007 10:07:39 +0100 Received: from localhost (localhost [127.0.0.1]) by pollux.ds.pg.gda.pl (Postfix) with ESMTP id 3A56CE1CC0; Wed, 6 Jun 2007 11:07:31 +0200 (CEST) X-Virus-Scanned: by amavisd-new at pollux.ds.pg.gda.pl Received: from pollux.ds.pg.gda.pl ([127.0.0.1]) by localhost (pollux.ds.pg.gda.pl [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id U+bzqJx5Mgsw; Wed, 6 Jun 2007 11:07:31 +0200 (CEST) Received: from piorun.ds.pg.gda.pl (piorun.ds.pg.gda.pl [153.19.208.8]) by pollux.ds.pg.gda.pl (Postfix) with ESMTP id E3A71E1C7F; Wed, 6 Jun 2007 11:07:30 +0200 (CEST) Received: from blysk.ds.pg.gda.pl (macro@blysk.ds.pg.gda.pl [153.19.208.6]) by piorun.ds.pg.gda.pl (8.13.8/8.13.8) with ESMTP id l5697bXW018717; Wed, 6 Jun 2007 11:07:38 +0200 Date: Wed, 6 Jun 2007 10:07:34 +0100 (BST) From: "Maciej W. Rozycki" To: Andrew Morton cc: linux-mips@linux-mips.org, linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] zs.c: Drain the transmission line Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Virus-Scanned: ClamAV 0.90.3/3367/Wed Jun 6 07:14:43 2007 on piorun.ds.pg.gda.pl X-Virus-Status: Clean Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15301 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@linux-mips.org Precedence: bulk X-list: linux-mips This is an update to the zs.c driver to make it wait for the transmission line to become idle before disabling the transmitter or resetting the chip. This way the character that is on the way at the time one of these actions is about to be performed does not get corrupted. Plus a change to reset the index/data pointer first before issuing a chip reset just in case the state is wrong when control of the chip is taken the first time. Signed-off-by: Maciej W. Rozycki --- These are almost obvious, but I have run-time tested them just in case. They make the switch from the initial (early printk) PROM-based console less disruptive. The change to load_zsregs() also affects set_termios(). Please apply, Maciej patch-mips-2.6.21-20070502-zs-serial-drain-3 diff -up --recursive --new-file linux-mips-2.6.21-20070502.macro/drivers/serial/zs.c linux-mips-2.6.21-20070502/drivers/serial/zs.c --- linux-mips-2.6.21-20070502.macro/drivers/serial/zs.c 2007-06-05 11:08:24.000000000 +0000 +++ linux-mips-2.6.21-20070502/drivers/serial/zs.c 2007-06-05 11:08:57.000000000 +0000 @@ -240,10 +240,24 @@ static int zs_transmit_drain(struct zs_p return loops; } +static int zs_line_drain(struct zs_port *zport, int irq) +{ + struct zs_scc *scc = zport->scc; + int loops = 10000; + + while (!(read_zsreg(zport, R1) & ALL_SNT) && loops--) { + zs_spin_unlock_cond_irq(&scc->zlock, irq); + udelay(2); + zs_spin_lock_cond_irq(&scc->zlock, irq); + } + return loops; +} + static void load_zsregs(struct zs_port *zport, u8 *regs, int irq) { - zs_transmit_drain(zport, irq); + /* Let the current transmission finish. */ + zs_line_drain(zport, irq); /* Load 'em up. */ write_zsreg(zport, R3, regs[3] & ~RxENABLE); write_zsreg(zport, R5, regs[5] & ~TxENAB); @@ -814,6 +828,10 @@ static void zs_reset(struct zs_port *zpo spin_lock_irqsave(&scc->zlock, flags); irq = !irqs_disabled_flags(flags); if (!scc->initialised) { + /* Reset the pointer first, just in case... */ + read_zsreg(zport, R0); + /* And let the current transmission finish. */ + zs_line_drain(zport, irq); write_zsreg(zport, R9, FHWRES); udelay(10); write_zsreg(zport, R9, 0); From linville@tuxdriver.com Wed Jun 6 15:27:38 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 15:27:40 +0100 (BST) Received: from ra.tuxdriver.com ([70.61.120.52]:47378 "EHLO ra.tuxdriver.com") by ftp.linux-mips.org with ESMTP id S20027067AbXFFO1i (ORCPT ); Wed, 6 Jun 2007 15:27:38 +0100 Received: from ra.tuxdriver.com (ra.tuxdriver.com [127.0.0.1]) by ra.tuxdriver.com (8.14.0/8.13.7) with ESMTP id l56EOCX0008289 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 6 Jun 2007 10:24:18 -0400 Received: (from uucp@localhost) by ra.tuxdriver.com (8.14.0/8.14.0/Submit) with UUCP id l56E0VWS007924; Wed, 6 Jun 2007 10:00:31 -0400 Received: from linville-t43.mobile (linville-t43.mobile [127.0.0.1]) by linville-t43.mobile (8.13.8/8.13.8) with ESMTP id l56DtpkG004931; Wed, 6 Jun 2007 09:55:51 -0400 Received: (from linville@localhost) by linville-t43.mobile (8.13.8/8.13.8/Submit) id l56DtpMF004930; Wed, 6 Jun 2007 09:55:51 -0400 Date: Wed, 6 Jun 2007 09:55:51 -0400 From: "John W. Linville" To: tiansm@lemote.com Cc: linux-mips@linux-mips.org Subject: Re: Lemote Loongson 2E patch update Message-ID: <20070606135551.GA4572@tuxdriver.com> References: <11811049622818-git-send-email-tiansm@lemote.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <11811049622818-git-send-email-tiansm@lemote.com> User-Agent: Mutt/1.4.2.3i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15302 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: linville@tuxdriver.com Precedence: bulk X-list: linux-mips No comment on the patches, but... Any chance I'm ever going to be able to buy one of these in the USA? John -- John W. Linville linville@tuxdriver.com From stern@rowland.harvard.edu Wed Jun 6 15:43:31 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 15:43:33 +0100 (BST) Received: from iolanthe.rowland.org ([192.131.102.54]:46995 "HELO iolanthe.rowland.org") by ftp.linux-mips.org with SMTP id S20027075AbXFFOnb (ORCPT ); Wed, 6 Jun 2007 15:43:31 +0100 Received: (qmail 3537 invoked by uid 2102); 6 Jun 2007 10:42:23 -0400 Received: from localhost (sendmail-bs@127.0.0.1) by localhost with SMTP; 6 Jun 2007 10:42:23 -0400 Date: Wed, 6 Jun 2007 10:42:23 -0400 (EDT) From: Alan Stern X-X-Sender: stern@iolanthe.rowland.org To: Marc St-Jean cc: gregkh@suse.de, , , , Subject: Re: [linux-usb-devel] [PATCH 11/12] drivers: PMC MSP71xx USB driver In-Reply-To: <200706060048.l560moU4007288@pasqua.pmc-sierra.bc.ca> Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15303 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: stern@rowland.harvard.edu Precedence: bulk X-list: linux-mips On Tue, 5 Jun 2007, Marc St-Jean wrote: > @@ -2749,12 +2749,33 @@ static void hub_events(void) > } > > if (portchange & USB_PORT_STAT_C_OVERCURRENT) { > - dev_err (hub_dev, > - "over-current change on port %d\n", > - i); > + /* clear OCC bit */ > clear_port_feature(hdev, i, > USB_PORT_FEAT_C_OVER_CURRENT); > + > + /* > + * This step is required to toggle the > + * PP bit to 0 and 1 (by hub_power_on) > + * in order the CSC bit to be transitioned > + * properly for device hotplug. > + */ > + /* clear PP bit */ > + clear_port_feature(hdev, i, > + USB_PORT_FEAT_POWER); > + > + /* resume power */ > hub_power_on(hub); > + > + udelay(100); > + > + /* read OCA bit */ > + if (portstatus & > + (1 << USB_PORT_FEAT_OVER_CURRENT)) { > + /* declare overcurrent */ > + dev_err(hub_dev, > + "over-current change " > + "on port %d\n", i); > + } > } Quite apart from all the issues David mentioned, you shouldn't change the way errors are reported. The dev_err() statement should always be executed when there is an overcurrent change; it shouldn't depend on whether the overcurrent feature is set at the moment. Remember, the message reports an overcurrent _change_, not an overcurrent _state_. Alan Stern From ralf@linux-mips.org Wed Jun 6 17:47:19 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 17:47:21 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:37047 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022915AbXFFQrT (ORCPT ); Wed, 6 Jun 2007 17:47:19 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l56GeJwW031742; Wed, 6 Jun 2007 17:40:20 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l56GeIFC031741; Wed, 6 Jun 2007 17:40:18 +0100 Date: Wed, 6 Jun 2007 17:40:18 +0100 From: Ralf Baechle To: Franck Bui-Huu Cc: "tiansm@lemote.com" , linux-mips@linux-mips.org, Fuxin Zhang Subject: Re: [PATCH] cheat for support of more than 256MB memory Message-ID: <20070606164018.GA30017@linux-mips.org> References: <11811049622818-git-send-email-tiansm@lemote.com> <11811049643791-git-send-email-tiansm@lemote.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15304 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Wed, Jun 06, 2007 at 08:38:18AM +0200, Franck Bui-Huu wrote: > >diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c > >index 4975da0..62ef100 100644 > >--- a/arch/mips/kernel/setup.c > >+++ b/arch/mips/kernel/setup.c > >@@ -509,6 +509,14 @@ static void __init resource_init(void) > > res->end = end; > > > > res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; > >+#if defined(CONFIG_LEMOTE_FULONG) && defined(CONFIG_64BIT) > >+ /* to keep memory continous, we tell system 0x10000000 - > >0x20000000 is reserved > >+ * for memory, in fact it is io region, don't occupy it > >+ * > >+ * SPARSEMEM? > > Definetly yes ! It has been designed for such issue and it should save > you some memory. A hole of 256MB size in the memory address map will cost 3.5MB with a 64-bit kernel. The other reason why I don't like this patch is that it drags platform specific code into the generic MIPS code. Ralf From ralf@linux-mips.org Wed Jun 6 17:55:57 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 17:55:59 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:28840 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022915AbXFFQz5 (ORCPT ); Wed, 6 Jun 2007 17:55:57 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l56Gp0ur031971; Wed, 6 Jun 2007 17:51:00 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l56GowKs031969; Wed, 6 Jun 2007 17:50:58 +0100 Date: Wed, 6 Jun 2007 17:50:58 +0100 From: Ralf Baechle To: "John W. Linville" Cc: tiansm@lemote.com, linux-mips@linux-mips.org Subject: Re: Lemote Loongson 2E patch update Message-ID: <20070606165058.GB30017@linux-mips.org> References: <11811049622818-git-send-email-tiansm@lemote.com> <20070606135551.GA4572@tuxdriver.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070606135551.GA4572@tuxdriver.com> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15305 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Wed, Jun 06, 2007 at 09:55:51AM -0400, John W. Linville wrote: > Any chance I'm ever going to be able to buy one of these in the USA? I haven't heared of a distributor for these boxes outside of China yet. As I understand the few Lemots that are out in the wild are still not from mass production. But I guess Fuxin may answer that better than I can. Ralf From ralf@linux-mips.org Wed Jun 6 18:03:53 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 18:03:56 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:7146 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20027087AbXFFRDx (ORCPT ); Wed, 6 Jun 2007 18:03:53 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l56Gwr3t032092; Wed, 6 Jun 2007 17:58:53 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l56GwqD8032091; Wed, 6 Jun 2007 17:58:52 +0100 Date: Wed, 6 Jun 2007 17:58:52 +0100 From: Ralf Baechle To: Tian Cc: Kumba , linux-mips@linux-mips.org Subject: Re: Mailing patches Message-ID: <20070606165852.GC29713@linux-mips.org> References: <20070604133551.GA24405@linux-mips.org> <4664DB12.80906@gentoo.org> <20070605152338.GA22937@linux-mips.org> <4666418C.9040401@lemote.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <4666418C.9040401@lemote.com> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15306 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Wed, Jun 06, 2007 at 01:09:32PM +0800, Tian wrote: > sorry for the mess，when git-format-patch , wo forgot the -n para > and i would like to know what command para is recommended for sending > patch on maillist? > > git-send-email --no-chain-reply-to --compose --from tiansm@lemote.com > --no-signed-off-by-cc --smtp-server --subject "Lemote Loongson > 2E patch update" --suppress-from --to linux-mips@linux-mips.org 00* > > --no-chain-reply-to or --chain-reply-to ? > > and.....should i resend the patches? No, that's fine. I don't like --no-chain-reply-to for no better reason than that looking a bit odd in some threded mail readers. But that's just a matter of preference not a technical need. The ordering of patches is guaranteed even without chain reply mode because git-send-email will ensure the dates of each email is different from the previous one. Ralf From ralf@linux-mips.org Wed Jun 6 18:48:52 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 18:48:55 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:17339 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20027100AbXFFRsw (ORCPT ); Wed, 6 Jun 2007 18:48:52 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l56HfsRu003195; Wed, 6 Jun 2007 18:41:55 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l56Hfqed003194; Wed, 6 Jun 2007 18:41:52 +0100 Date: Wed, 6 Jun 2007 18:41:52 +0100 From: Ralf Baechle To: tiansm@lemote.com Cc: linux-mips@linux-mips.org, Fuxin Zhang Subject: Re: [PATCH 04/15] TO_PHYS_MASK for loongson2 Message-ID: <20070606174152.GC30017@linux-mips.org> References: <11811127722019-git-send-email-tiansm@lemote.com> <1181112773336-git-send-email-tiansm@lemote.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1181112773336-git-send-email-tiansm@lemote.com> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15307 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Wed, Jun 06, 2007 at 02:52:41PM +0800, tiansm@lemote.com wrote: > diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h > index 964c5ed..a4d9a07 100644 > --- a/include/asm-mips/addrspace.h > +++ b/include/asm-mips/addrspace.h > @@ -145,7 +145,7 @@ > #define TO_PHYS_MASK _CONST64_(0x000000ffffffffff) /* 2^^40 - 1 */ > #endif > > -#if defined (CONFIG_CPU_R10000) > +#if defined (CONFIG_CPU_R10000) || defined (CONFIG_CPU_LOONGSON2) > #define TO_PHYS_MASK _CONST64_(0x000000ffffffffff) /* 2^^40 - 1 */ > #endif I've already previously rejected this patch, see http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20070418120240.GD3938%40linux-mips.org for why. Anyway, I've implemented the suggested fix for the -queue tree, so you can drop this one from your patch queue. Ralf From ralf@linux-mips.org Wed Jun 6 19:33:15 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 19:33:18 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:49337 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20027103AbXFFSdP (ORCPT ); Wed, 6 Jun 2007 19:33:15 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l56ISGD0007770; Wed, 6 Jun 2007 19:28:17 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l56ISEq6007769; Wed, 6 Jun 2007 19:28:14 +0100 Date: Wed, 6 Jun 2007 19:28:14 +0100 From: Ralf Baechle To: Franck Bui-Huu Cc: "tiansm@lemote.com" , linux-mips@linux-mips.org, Fuxin Zhang Subject: Re: [PATCH 15/15] work around for more than 256MB memory support Message-ID: <20070606182814.GD30017@linux-mips.org> References: <11811127722019-git-send-email-tiansm@lemote.com> <11811127744038-git-send-email-tiansm@lemote.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15308 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Wed, Jun 06, 2007 at 10:01:29AM +0200, Franck Bui-Huu wrote: > >diff --git a/drivers/char/mem.c b/drivers/char/mem.c > >index cc9a9d0..a19b46a 100644 > >--- a/drivers/char/mem.c > >+++ b/drivers/char/mem.c > >@@ -82,8 +82,12 @@ static inline int uncached_access(struct file *file, > >unsigned long addr) > > */ > > if (file->f_flags & O_SYNC) > > return 1; > >+#if defined(CONFIG_LEMOTE_FULONG) && defined(CONFIG_64BIT) > >+ return (addr >= __pa(high_memory)) || ((addr >=0x10000000) && > >(addr < 0x20000000)); > >+#else > > return addr >= __pa(high_memory); > > #endif > >+#endif > > } > > That would be nice to have a nice log to justify such a hack.... Unfortunately mem.c is soaked with #ifdef stuff. So I hope I can justify one more for another architecture but that'll be it. So I've put below patch into the queue tree. It will allow the Fulong code to override the function as needed. I also got this in the queue tree. Ralf Signed-off-by: Ralf Baechle arch/mips/mm/cache.c | 10 ++++++++++ drivers/char/mem.c | 7 +++++++ 2 files changed, 17 insertions(+) Index: linux-queue/arch/mips/mm/cache.c =================================================================== --- linux-queue.orig/arch/mips/mm/cache.c +++ linux-queue/arch/mips/mm/cache.c @@ -6,6 +6,8 @@ * Copyright (C) 1994 - 2003, 07 by Ralf Baechle (ralf@linux-mips.org) * Copyright (C) 2007 MIPS Technologies, Inc. */ +#include +#include #include #include #include @@ -164,3 +166,11 @@ void __init cpu_cache_init(void) panic(cache_panic); } + +int __weak __uncached_access(struct file *file, unsigned long addr) +{ + if (file->f_flags & O_SYNC) + return 1; + + return addr >= __pa(high_memory); +} Index: linux-queue/drivers/char/mem.c =================================================================== --- linux-queue.orig/drivers/char/mem.c +++ linux-queue/drivers/char/mem.c @@ -75,6 +75,13 @@ static inline int uncached_access(struct * On ia64, we ignore O_SYNC because we cannot tolerate memory attribute aliases. */ return !(efi_mem_attributes(addr) & EFI_MEMORY_WB); +#elif defined(CONFIG_MIPS) + { + extern int __uncached_access(struct file *file, + unsigned long addr); + + return __uncached_access(file, addr); + } #else /* * Accessing memory above the top the kernel knows about or through a file pointer From ralf@linux-mips.org Wed Jun 6 19:59:41 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 19:59:43 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:38567 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20027104AbXFFS7l (ORCPT ); Wed, 6 Jun 2007 19:59:41 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l56Isoqm010756 for ; Wed, 6 Jun 2007 19:54:50 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l56Iso9m010755 for linux-mips@linux-mips.org; Wed, 6 Jun 2007 19:54:50 +0100 Date: Wed, 6 Jun 2007 19:54:50 +0100 From: Ralf Baechle To: linux-mips@linux-mips.org Subject: Tickless/dyntick kernel, highres timer and general time crapectomy Message-ID: <20070606185450.GA10511@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15309 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Time to send bring this to a larger audience. I'm working on getting dyntick and highres timer support working for MIPS. This unavoidably implies dumping most of the MIPS-private time infrastructure we've piled up over the past decade. Which really is a major crapectomy. A first cut of the patches which are tested to run well on uniprocessor and VSMP Malta kernels is at: ftp://ftp.linux-mips.org/pub/linux/mips/people/ralf/dyntick-quilt It will also likely work on various other simple systems. A more recent version of these patches which I haven't yet gotten around to test on silicon is available at: ftp://ftp.linux-mips.org/pub/linux/mips/people/ralf/linux-time.patches The patchset is both large and intrusive. One of the things that are still missing is support for additional clocksources and clockevent_devices. Particularly Alchemy (and any other system supporting clock scaling) will need some work there since the cp0 count/compare timer are not useful on such systems. Help with those would be greatly appreciated. Ralf From sshtylyov@ru.mvista.com Wed Jun 6 20:03:40 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 20:03:42 +0100 (BST) Received: from h155.mvista.com ([63.81.120.155]:53380 "EHLO imap.sh.mvista.com") by ftp.linux-mips.org with ESMTP id S20027110AbXFFTDk (ORCPT ); Wed, 6 Jun 2007 20:03:40 +0100 Received: from [192.168.1.248] (unknown [10.150.0.9]) by imap.sh.mvista.com (Postfix) with ESMTP id C561A3EC9; Wed, 6 Jun 2007 12:03:07 -0700 (PDT) Message-ID: <46670559.4000907@ru.mvista.com> Date: Wed, 06 Jun 2007 23:04:57 +0400 From: Sergei Shtylyov Organization: MontaVista Software Inc. User-Agent: Mozilla/5.0 (X11; U; Linux i686; rv:1.7.2) Gecko/20040803 X-Accept-Language: ru, en-us, en-gb MIME-Version: 1.0 To: Ralf Baechle Cc: linux-mips@linux-mips.org Subject: Re: Tickless/dyntick kernel, highres timer and general time crapectomy References: <20070606185450.GA10511@linux-mips.org> In-Reply-To: <20070606185450.GA10511@linux-mips.org> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15310 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sshtylyov@ru.mvista.com Precedence: bulk X-list: linux-mips Hello. Ralf Baechle wrote: > Particularly Alchemy (and any other system supporting clock scaling) will > need some work there since the cp0 count/compare timer are not useful on > such systems. Hm, why it's being used then? :-) > Ralf WBR, Sergei From ralf@linux-mips.org Wed Jun 6 20:11:27 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 06 Jun 2007 20:11:29 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:3044 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20027113AbXFFTL1 (ORCPT ); Wed, 6 Jun 2007 20:11:27 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l56J4ZDL010964; Wed, 6 Jun 2007 20:04:35 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l56J4YU5010963; Wed, 6 Jun 2007 20:04:34 +0100 Date: Wed, 6 Jun 2007 20:04:34 +0100 From: Ralf Baechle To: Sergei Shtylyov Cc: linux-mips@linux-mips.org Subject: Re: Tickless/dyntick kernel, highres timer and general time crapectomy Message-ID: <20070606190434.GA10874@linux-mips.org> References: <20070606185450.GA10511@linux-mips.org> <46670559.4000907@ru.mvista.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <46670559.4000907@ru.mvista.com> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15311 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Wed, Jun 06, 2007 at 11:04:57PM +0400, Sergei Shtylyov wrote: > >Particularly Alchemy (and any other system supporting clock scaling) will > >need some work there since the cp0 count/compare timer are not useful on > >such systems. > > Hm, why it's being used then? :-) From a looks the whole Alchemy power managment code fishy. Ralf From tiansm@lemote.com Thu Jun 7 07:05:39 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 07:05:41 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:35473 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20022681AbXFGGFj (ORCPT ); Thu, 7 Jun 2007 07:05:39 +0100 Received: (qmail 1351 invoked by uid 511); 7 Jun 2007 06:11:56 -0000 Received: from unknown (HELO localhost.localdomain) (192.168.2.233) by lemote.com with SMTP; 7 Jun 2007 06:11:56 -0000 From: tiansm@lemote.com To: linux-mips@linux-mips.org Cc: Songmao Tian Subject: [PATCH] override of arch/mips/mm/cache.c: __uncached_access Date: Thu, 7 Jun 2007 14:04:17 +0800 Message-Id: <11811962573610-git-send-email-tiansm@lemote.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <20070606182814.GD30017@linux-mips.org> References: <20070606182814.GD30017@linux-mips.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15312 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips From: Songmao Tian Signed-off-by: Songmao Tian --- arch/mips/lemote/lm2e/Makefile | 2 +- arch/mips/lemote/lm2e/mem.c | 25 +++++++++++++++++++++++++ 2 files changed, 26 insertions(+), 1 deletions(-) create mode 100644 arch/mips/lemote/lm2e/mem.c diff --git a/arch/mips/lemote/lm2e/Makefile b/arch/mips/lemote/lm2e/Makefile index 0ba6f12..fb1b48c 100644 --- a/arch/mips/lemote/lm2e/Makefile +++ b/arch/mips/lemote/lm2e/Makefile @@ -2,6 +2,6 @@ # Makefile for Lemote Fulong mini-PC board. # -obj-y += setup.o prom.o reset.o irq.o pci.o bonito-irq.o dbg_io.o +obj-y += setup.o prom.o reset.o irq.o pci.o bonito-irq.o dbg_io.o mem.o EXTRA_AFLAGS := $(CFLAGS) diff --git a/arch/mips/lemote/lm2e/mem.c b/arch/mips/lemote/lm2e/mem.c new file mode 100644 index 0000000..6068a17 --- /dev/null +++ b/arch/mips/lemote/lm2e/mem.c @@ -0,0 +1,25 @@ +/* + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include + +/* override of arch/mips/mm/cache.c: __uncached_access */ +int __uncached_access(struct file *file, unsigned long addr) +{ + if (file->f_flags & O_SYNC) + return 1; + + /* + * on lemote loongson 2e system, peripheral register + * reside between 0x1000 0000 and 0x2000 0000 + */ + return addr >= __pa(high_memory) || + ((addr >=0x10000000) && (addr < 0x20000000)); +} + -- 1.5.2.1 From zhangfx@lemote.com Thu Jun 7 07:06:01 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 07:06:05 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:35729 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20022684AbXFGGFk (ORCPT ); Thu, 7 Jun 2007 07:05:40 +0100 Received: (qmail 1856 invoked by uid 511); 7 Jun 2007 06:13:04 -0000 Received: from unknown (HELO ?192.168.1.9?) (222.92.8.142) by lemote.com with SMTP; 7 Jun 2007 06:13:04 -0000 Message-ID: <4667A022.509@lemote.com> Date: Thu, 07 Jun 2007 14:05:22 +0800 From: Fuxin Zhang User-Agent: Thunderbird 2.0.0.0 (Windows/20070326) MIME-Version: 1.0 To: Ralf Baechle CC: "John W. Linville" , tiansm@lemote.com, linux-mips@linux-mips.org Subject: Re: Lemote Loongson 2E patch update References: <11811049622818-git-send-email-tiansm@lemote.com> <20070606135551.GA4572@tuxdriver.com> <20070606165058.GB30017@linux-mips.org> In-Reply-To: <20070606165058.GB30017@linux-mips.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15313 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zhangfx@lemote.com Precedence: bulk X-list: linux-mips Ralf Baechle 写道: > On Wed, Jun 06, 2007 at 09:55:51AM -0400, John W. Linville wrote: > > >> Any chance I'm ever going to be able to buy one of these in the USA? >> Strictly speaking we cannot sell to USA yet, because we did not get some required certifications for USA and Europe market(e.g. FCC, RoHS). But we can provide a sample if the customer can understand the status. > > I haven't heared of a distributor for these boxes outside of China yet. > As I understand the few Lemots that are out in the wild are still not > from mass production. But I guess Fuxin may answer that better than I > can. > Lemote has sold out around 1000 sets of Fulong, most users are in China. We don't have a distributor ourside of China yet, due to the lack of certifications and experience of oversea business. I think we will probably get some such distributors within this year, along with the upgraded versions of Fulong. > Ralf > > > > > -- ------------------------------------------------ 张福新 江苏中科龙梦科技有限公司 地址：江苏省常熟市虞山镇梦兰工业园 General Manager JiangSu Lemote Corp. Ltd. MengLan, Yushan, Changshu, JiangSu Province, China ZIP: 215500 Tel: 86-512-52308679 Fax: 86-512-52308688 Email: zhangfx@lemote.com http://www.lemote.com ------------------------------------------------ From zhangfx@lemote.com Thu Jun 7 07:24:14 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 07:24:17 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:39825 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20022670AbXFGGYO (ORCPT ); Thu, 7 Jun 2007 07:24:14 +0100 Received: (qmail 9566 invoked by uid 511); 7 Jun 2007 06:30:41 -0000 Received: from unknown (HELO ?192.168.1.9?) (222.92.8.142) by lemote.com with SMTP; 7 Jun 2007 06:30:41 -0000 Message-ID: <4667A443.8060105@lemote.com> Date: Thu, 07 Jun 2007 14:22:59 +0800 From: Fuxin Zhang User-Agent: Thunderbird 2.0.0.0 (Windows/20070326) MIME-Version: 1.0 To: tiansm@lemote.com CC: linux-mips@linux-mips.org Subject: Re: [PATCH] override of arch/mips/mm/cache.c: __uncached_access References: <20070606182814.GD30017@linux-mips.org> <11811962573610-git-send-email-tiansm@lemote.com> In-Reply-To: <11811962573610-git-send-email-tiansm@lemote.com> Content-Type: text/plain; charset=GB2312 Content-Transfer-Encoding: 8bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15314 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zhangfx@lemote.com Precedence: bulk X-list: linux-mips Recent Xorg depends on this hack/patch. For example,if we are using this memory layout: 0-256MB phys mem 256-512M pci io/mem region 512-768MB phys mem Xorg will crash due to pci video memory mapping problem. So this is not really only for Fulong. BTW: Songmao, we'd better add a comment to justify this code. tiansm@lemote.com д: > From: Songmao Tian > > Signed-off-by: Songmao Tian > --- > arch/mips/lemote/lm2e/Makefile | 2 +- > arch/mips/lemote/lm2e/mem.c | 25 +++++++++++++++++++++++++ > 2 files changed, 26 insertions(+), 1 deletions(-) > create mode 100644 arch/mips/lemote/lm2e/mem.c > > diff --git a/arch/mips/lemote/lm2e/Makefile b/arch/mips/lemote/lm2e/Makefile > index 0ba6f12..fb1b48c 100644 > --- a/arch/mips/lemote/lm2e/Makefile > +++ b/arch/mips/lemote/lm2e/Makefile > @@ -2,6 +2,6 @@ > # Makefile for Lemote Fulong mini-PC board. > # > > -obj-y += setup.o prom.o reset.o irq.o pci.o bonito-irq.o dbg_io.o > +obj-y += setup.o prom.o reset.o irq.o pci.o bonito-irq.o dbg_io.o mem.o > EXTRA_AFLAGS := $(CFLAGS) > > diff --git a/arch/mips/lemote/lm2e/mem.c b/arch/mips/lemote/lm2e/mem.c > new file mode 100644 > index 0000000..6068a17 > --- /dev/null > +++ b/arch/mips/lemote/lm2e/mem.c > @@ -0,0 +1,25 @@ > +/* > + * This program is free software; you can redistribute it and/or modify it > + * under the terms of the GNU General Public License as published by the > + * Free Software Foundation; either version 2 of the License, or (at your > + * option) any later version. > + */ > + > +#include > +#include > +#include > + > +/* override of arch/mips/mm/cache.c: __uncached_access */ > +int __uncached_access(struct file *file, unsigned long addr) > +{ > + if (file->f_flags & O_SYNC) > + return 1; > + > + /* > + * on lemote loongson 2e system, peripheral register > + * reside between 0x1000 0000 and 0x2000 0000 > + */ > + return addr >= __pa(high_memory) || > + ((addr >=0x10000000) && (addr < 0x20000000)); > +} > + > -- ------------------------------------------------ Ÿ пοƼ޹˾ ַʡɽҵ԰ General Manager JiangSu Lemote Corp. Ltd. MengLan, Yushan, Changshu, JiangSu Province, China ZIP: 215500 Tel: 86-512-52308679 Fax: 86-512-52308688 Email: zhangfx@lemote.com http://www.lemote.com ------------------------------------------------ From anemo@mba.ocn.ne.jp Thu Jun 7 08:53:32 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 08:53:34 +0100 (BST) Received: from topsns2.0.225.230.202.in-addr.arpa ([202.230.225.126]:49480 "EHLO topsns2.toshiba-tops.co.jp") by ftp.linux-mips.org with ESMTP id S20022690AbXFGHxc (ORCPT ); Thu, 7 Jun 2007 08:53:32 +0100 Received: from topsms.toshiba-tops.co.jp by topsns2.toshiba-tops.co.jp via smtpd (for ftp.linux-mips.org [194.74.144.162]) with ESMTP; Thu, 7 Jun 2007 16:53:30 +0900 Received: from topsms.toshiba-tops.co.jp (localhost.localdomain [127.0.0.1]) by localhost.toshiba-tops.co.jp (Postfix) with ESMTP id 6252241DF3; Thu, 7 Jun 2007 16:53:02 +0900 (JST) Received: from srd2sd.toshiba-tops.co.jp (srd2sd.toshiba-tops.co.jp [172.17.28.2]) by topsms.toshiba-tops.co.jp (Postfix) with ESMTP id 4DEC520457; Thu, 7 Jun 2007 16:53:02 +0900 (JST) Received: from localhost (fragile [172.17.28.65]) by srd2sd.toshiba-tops.co.jp (8.12.10/8.12.10) with ESMTP id l577r1AF049544; Thu, 7 Jun 2007 16:53:02 +0900 (JST) (envelope-from anemo@mba.ocn.ne.jp) Date: Thu, 07 Jun 2007 16:53:01 +0900 (JST) Message-Id: <20070607.165301.63743560.nemoto@toshiba-tops.co.jp> To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: smp_mb() in asm-mips/bitops.h From: Atsushi Nemoto X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15315 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips I found some funny usages of smp_mb() in asm-mips/bitops.h: static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *addr) { if (cpu_has_llsc && R10000_LLSC_WAR) { ... return res != 0; } else if (cpu_has_llsc) { ... return res != 0; } else { ... return retval; } smp_mb(); } It looks this smp_mb() never have any effects. This change is from: > commit 0004a9dfeaa709a7f853487aba19932c9b1a87c8 > Author: Ralf Baechle > Date: Tue Oct 31 03:45:07 2006 +0000 > > [MIPS] Cleanup memory barriers for weakly ordered systems. at 2.6.18 development cycle. --- Atsushi Nemoto From vagabon.xyz@gmail.com Thu Jun 7 08:59:54 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 08:59:57 +0100 (BST) Received: from py-out-1112.google.com ([64.233.166.182]:33042 "EHLO py-out-1112.google.com") by ftp.linux-mips.org with ESMTP id S20022670AbXFGH7y (ORCPT ); Thu, 7 Jun 2007 08:59:54 +0100 Received: by py-out-1112.google.com with SMTP id f31so735330pyh for ; Thu, 07 Jun 2007 00:59:53 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=mN4Uqpvn+wt9KgOaz+MLEGat+odnEyTIYYCWAtSeDa7mUYkO4AP0VxNfAlrLeBAMUM8gt+Wi3K5Zr6AyueVcYdQeq5opIhdalefyO6h5anKLESjKanv8Dx4zlPXEDtTHDCgGM2gAwfN9jipJrvAsaBJoewFGcqcRlRutf3MiO70= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=Z1bBYkZTyGIA2Hdb5EIhCIbI118XE29jGIPf4eisUK8UZrXgYnrccxdw4zsfjTnoLxLN2oek2TegBt5RBQ/K/oZa0NIVduy5PHm4im3vcQKrya3RCLu0D3LMcGOhpLsx15jEyz8HbpRVQa2rwEqwAQRB/kRzkPWYKWvWsGL4LgM= Received: by 10.64.184.16 with SMTP id h16mr466028qbf.1181203193402; Thu, 07 Jun 2007 00:59:53 -0700 (PDT) Received: by 10.65.204.8 with HTTP; Thu, 7 Jun 2007 00:59:53 -0700 (PDT) Message-ID: Date: Thu, 7 Jun 2007 09:59:53 +0200 From: "Franck Bui-Huu" To: "Ralf Baechle" Subject: Re: Tickless/dyntick kernel, highres timer and general time crapectomy Cc: linux-mips@linux-mips.org In-Reply-To: <20070606185450.GA10511@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20070606185450.GA10511@linux-mips.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15316 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips Hi Ralf, Ralf Baechle wrote: > Time to send bring this to a larger audience. > > I'm working on getting dyntick and highres timer support working for MIPS. > This unavoidably implies dumping most of the MIPS-private time > infrastructure we've piled up over the past decade. Which really is a > major crapectomy. A first cut of the patches which are tested to > run That's definitely true. I wrote my own version of clockevent support yesterday based on your patchset "dyntick-quilt" and I end up rewrite the whole time.c. The biggest part of the job would be to split this into several patches to ease the review but I doubt it worth it since we rewrite it almost from scratch. Another issue I have is to implement clockevent set_mode() method. You left it empty but I think we need at least to shut down the timer interrupt when setting the clock event device. Strangely I haven't found a "generic" way to stop them through cp0. Have I missed something ? If not, that would mean that either we need a new hook to achieve that or we find a way/hack to do that in a mips generic way. Advice on this point would be appreciated. > well on uniprocessor and VSMP Malta kernels is at: > > ftp://ftp.linux-mips.org/pub/linux/mips/people/ralf/dyntick-quilt > > It will also likely work on various other simple systems. A more recent > version of these patches which I haven't yet gotten around to test on > silicon is available at: > > ftp://ftp.linux-mips.org/pub/linux/mips/people/ralf/linux-time.patches > BTW any idea when "time-ntp-make-cmos-update-generic.patch" is going to be merged into mainline ? Note: I think there's a bug in notify_cmos_timer(). The following test should be negated, shouldn't it ? + if (no_sync_cmos_clock) + mod_timer(&sync_cmos_timer, jiffies + 1); The other patch named "time-move-to_tm-to-lib.patch" create a new file in arch/mips/lib directory. This new file is called "to_tm.c". Shouldn't we call it something less specific like "time.c" ? -- Franck From anemo@mba.ocn.ne.jp Thu Jun 7 09:49:28 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 09:49:31 +0100 (BST) Received: from topsns2.0.225.230.202.in-addr.arpa ([202.230.225.126]:43277 "EHLO topsns2.toshiba-tops.co.jp") by ftp.linux-mips.org with ESMTP id S20022752AbXFGIt2 (ORCPT ); Thu, 7 Jun 2007 09:49:28 +0100 Received: from topsms.toshiba-tops.co.jp by topsns2.toshiba-tops.co.jp via smtpd (for ftp.linux-mips.org [194.74.144.162]) with ESMTP; Thu, 7 Jun 2007 17:49:27 +0900 Received: from topsms.toshiba-tops.co.jp (localhost.localdomain [127.0.0.1]) by localhost.toshiba-tops.co.jp (Postfix) with ESMTP id D874141E85; Thu, 7 Jun 2007 17:49:01 +0900 (JST) Received: from srd2sd.toshiba-tops.co.jp (srd2sd.toshiba-tops.co.jp [172.17.28.2]) by topsms.toshiba-tops.co.jp (Postfix) with ESMTP id CC20B41500; Thu, 7 Jun 2007 17:49:01 +0900 (JST) Received: from localhost (fragile [172.17.28.65]) by srd2sd.toshiba-tops.co.jp (8.12.10/8.12.10) with ESMTP id l578n1AF049814; Thu, 7 Jun 2007 17:49:01 +0900 (JST) (envelope-from anemo@mba.ocn.ne.jp) Date: Thu, 07 Jun 2007 17:49:01 +0900 (JST) Message-Id: <20070607.174901.55513477.nemoto@toshiba-tops.co.jp> To: vagabon.xyz@gmail.com Cc: ralf@linux-mips.org, linux-mips@linux-mips.org Subject: Re: Tickless/dyntick kernel, highres timer and general time crapectomy From: Atsushi Nemoto In-Reply-To: References: <20070606185450.GA10511@linux-mips.org> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15317 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Thu, 7 Jun 2007 09:59:53 +0200, "Franck Bui-Huu" wrote: > The other patch named "time-move-to_tm-to-lib.patch" create a new file > in arch/mips/lib directory. This new file is called > "to_tm.c". Shouldn't we call it something less specific like "time.c" ? In long term, I think it should be removed and replaced by rtc_time_to_tm() in drivers/rtc/rtc-lib.c (but it will require some adjustments on caller-side for tm_year value). --- Atsushi Nemoto From ralf@linux-mips.org Thu Jun 7 11:46:26 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 11:46:28 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:42963 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022670AbXFGKq0 (ORCPT ); Thu, 7 Jun 2007 11:46:26 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l577OMK2018033 for ; Thu, 7 Jun 2007 08:24:22 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l577OMVN018032; Thu, 7 Jun 2007 08:24:22 +0100 Date: Thu, 7 Jun 2007 08:24:22 +0100 From: Ralf Baechle To: Atsushi Nemoto Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] Remove unused dump_tlb functions Message-ID: <20070607072422.GB17555@linux-mips.org> References: <20070602.003025.51867254.anemo@mba.ocn.ne.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070602.003025.51867254.anemo@mba.ocn.ne.jp> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15318 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Sat, Jun 02, 2007 at 12:30:25AM +0900, Atsushi Nemoto wrote: > Remove unused dump_tlb functions and cleanup some includes. Queued for 2.6.23. Thanks, Ralf From ralf@linux-mips.org Thu Jun 7 11:46:48 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 11:46:51 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:42963 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022789AbXFGKq0 (ORCPT ); Thu, 7 Jun 2007 11:46:26 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l577WYfe019028 for ; Thu, 7 Jun 2007 08:32:34 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l577WY6s019027; Thu, 7 Jun 2007 08:32:34 +0100 Date: Thu, 7 Jun 2007 08:32:34 +0100 From: Ralf Baechle To: Franck Bui-Huu Cc: linux-mips@linux-mips.org Subject: Re: [PATCH 3/5] Make PAGE_OFFSET aware of PHYS_OFFSET Message-ID: <20070607073234.GC18038@linux-mips.org> References: <1180971995757-git-send-email-fbuihuu@gmail.com> <1180971996831-git-send-email-fbuihuu@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1180971996831-git-send-email-fbuihuu@gmail.com> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15319 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Mon, Jun 04, 2007 at 05:46:33PM +0200, Franck Bui-Huu wrote: Queued up for 2.6.23. Thanks, Ralf From ralf@linux-mips.org Thu Jun 7 11:47:12 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 11:47:15 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:42963 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022816AbXFGKq0 (ORCPT ); Thu, 7 Jun 2007 11:46:26 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l577WPn9019022 for ; Thu, 7 Jun 2007 08:32:25 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l577WPJ5019021; Thu, 7 Jun 2007 08:32:25 +0100 Date: Thu, 7 Jun 2007 08:32:25 +0100 From: Ralf Baechle To: Franck Bui-Huu Cc: linux-mips@linux-mips.org Subject: Re: [PATCH 2/5] Clean up asm-mips/mach-generic/spaces.h Message-ID: <20070607073225.GB18038@linux-mips.org> References: <1180971995757-git-send-email-fbuihuu@gmail.com> <118097199516-git-send-email-fbuihuu@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <118097199516-git-send-email-fbuihuu@gmail.com> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15320 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Mon, Jun 04, 2007 at 05:46:32PM +0200, Franck Bui-Huu wrote: Queued up for 2.6.23. Thanks, Ralf From ralf@linux-mips.org Thu Jun 7 11:47:35 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 11:47:39 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:42963 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022822AbXFGKq0 (ORCPT ); Thu, 7 Jun 2007 11:46:26 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l577WgUV019036 for ; Thu, 7 Jun 2007 08:32:42 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l577WgOa019035; Thu, 7 Jun 2007 08:32:42 +0100 Date: Thu, 7 Jun 2007 08:32:42 +0100 From: Ralf Baechle To: Franck Bui-Huu Cc: linux-mips@linux-mips.org Subject: Re: [PATCH 4/5] Move PHY_OFFSET definition in spaces.h Message-ID: <20070607073242.GD18038@linux-mips.org> References: <1180971995757-git-send-email-fbuihuu@gmail.com> <11809719961788-git-send-email-fbuihuu@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <11809719961788-git-send-email-fbuihuu@gmail.com> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15321 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Mon, Jun 04, 2007 at 05:46:34PM +0200, Franck Bui-Huu wrote: Queued up for 2.6.23. Thanks, Ralf From ralf@linux-mips.org Thu Jun 7 11:47:59 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 11:48:03 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:42963 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022836AbXFGKq0 (ORCPT ); Thu, 7 Jun 2007 11:46:26 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l577O6C1018012 for ; Thu, 7 Jun 2007 08:24:06 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l577O6RX018011; Thu, 7 Jun 2007 08:24:06 +0100 Date: Thu, 7 Jun 2007 08:24:06 +0100 From: Ralf Baechle To: Atsushi Nemoto Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] Unify dump_tlb Message-ID: <20070607072406.GA17555@linux-mips.org> References: <20070602.002130.41010462.anemo@mba.ocn.ne.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070602.002130.41010462.anemo@mba.ocn.ne.jp> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15322 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Sat, Jun 02, 2007 at 12:21:30AM +0900, Atsushi Nemoto wrote: > Unify lib-{32,64}/dump_tlb.c into lib/dump_tlb.c and move > lib-32/r3k_dump_tlb.c to lib directory. Queued for 2.6.23. Thanks, Ralf From ralf@linux-mips.org Thu Jun 7 11:48:23 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 11:48:27 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:42963 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022843AbXFGKq0 (ORCPT ); Thu, 7 Jun 2007 11:46:26 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l577Wp7i019042 for ; Thu, 7 Jun 2007 08:32:51 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l577WpUB019041; Thu, 7 Jun 2007 08:32:51 +0100 Date: Thu, 7 Jun 2007 08:32:51 +0100 From: Ralf Baechle To: Franck Bui-Huu Cc: linux-mips@linux-mips.org Subject: Re: [PATCH 5/5] Fix PHYS_OFFSET for 64-bits kernels with 32-bits symbols Message-ID: <20070607073251.GE18038@linux-mips.org> References: <1180971995757-git-send-email-fbuihuu@gmail.com> <11809719962417-git-send-email-fbuihuu@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <11809719962417-git-send-email-fbuihuu@gmail.com> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15323 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Mon, Jun 04, 2007 at 05:46:35PM +0200, Franck Bui-Huu wrote: Queued up for 2.6.23. Thanks, Ralf From ralf@linux-mips.org Thu Jun 7 11:48:47 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 11:48:51 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:42963 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022847AbXFGKq0 (ORCPT ); Thu, 7 Jun 2007 11:46:26 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l577WGx6019016 for ; Thu, 7 Jun 2007 08:32:16 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l577WGJ2019015; Thu, 7 Jun 2007 08:32:16 +0100 Date: Thu, 7 Jun 2007 08:32:15 +0100 From: Ralf Baechle To: Franck Bui-Huu Cc: linux-mips@linux-mips.org Subject: Re: [PATCH 1/5] Allow generic spaces.h to be included by platform specific ones Message-ID: <20070607073215.GA18038@linux-mips.org> References: <1180971995757-git-send-email-fbuihuu@gmail.com> <11809719951783-git-send-email-fbuihuu@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <11809719951783-git-send-email-fbuihuu@gmail.com> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15324 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Mon, Jun 04, 2007 at 05:46:31PM +0200, Franck Bui-Huu wrote: Queued up for 2.6.23. Thanks, Ralf From ralf@linux-mips.org Thu Jun 7 12:35:28 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 12:35:30 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:23967 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20027194AbXFGLf2 (ORCPT ); Thu, 7 Jun 2007 12:35:28 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l57BUWER026602; Thu, 7 Jun 2007 12:30:32 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l57BUWL2026601; Thu, 7 Jun 2007 12:30:32 +0100 Date: Thu, 7 Jun 2007 12:30:32 +0100 From: Ralf Baechle To: Franck Bui-Huu Cc: linux-mips@linux-mips.org Subject: Re: Tickless/dyntick kernel, highres timer and general time crapectomy Message-ID: <20070607113032.GA26047@linux-mips.org> References: <20070606185450.GA10511@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15325 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Thu, Jun 07, 2007 at 09:59:53AM +0200, Franck Bui-Huu wrote: > >I'm working on getting dyntick and highres timer support working for MIPS. > >This unavoidably implies dumping most of the MIPS-private time > >infrastructure we've piled up over the past decade. Which really is a > >major crapectomy. A first cut of the patches which are tested to > >run > > That's definitely true. I wrote my own version of clockevent support > yesterday based on your patchset "dyntick-quilt" and I end up rewrite > the whole time.c. The biggest part of the job would be to split this > into several patches to ease the review but I doubt it worth it since > we rewrite it almost from scratch. I'm actually getting closer and closer to the point where keep things in a nicely split patchset stops being workable. > Another issue I have is to implement clockevent set_mode() method. You > left it empty but I think we need at least to shut down the timer > interrupt when setting the clock event device. Strangely I haven't > found a "generic" way to stop them through cp0. Have I missed > something ? You can mask the count/compare interrupt in the status register like any other interrupt. Keep in mind that on many CPUs this interrupt is shared with the performance counter interrupt so cannot always be disabled. There is no other disable bit for this interrupt than the IE bit in the status register. So it may just have to be ignored. Other issues to solve: o The R4000/R4400 (others?) allow the use of hwint5 for either the count/compare interrupt or as a normal hardware interrupt. The switch happens based on a bootstream setting. There is no config register bit for this, so we either have to hardcode the knowledge about the affected machines or construct a probe. Where the count/compare is not usable we cannot use this as a clockevent device. o Old revisions of the R4000 have a bug where if the count register is read in exactly the moment where it matches the compare register the timer interrupt is lost. This means the system will be interrupt-less for the next typicall like 86s (at the typical 100MHz clock for the affected processors). The workaround needs to be implemented. Both are currently the least of my concerns, there is much bigger fish to catch ... > BTW any idea when "time-ntp-make-cmos-update-generic.patch" is going > to be merged into mainline ? Note: I think there's a bug in > notify_cmos_timer(). The following test should be negated, shouldn't > it ? > > + if (no_sync_cmos_clock) > + mod_timer(&sync_cmos_timer, jiffies + 1); In theory the patch should be in -mm to be merged early just after .22. > The other patch named "time-move-to_tm-to-lib.patch" create a new file > in arch/mips/lib directory. This new file is called > "to_tm.c". Shouldn't we call it something less specific like "time.c" ? I actually may drop that one for now. Two problems with it: o to_tm() is being used in modules but having the function in a lib means it may not be linked into the kernel so the modules might fail. o arch/mips/lib is not the right place anyway. There are several nearly identical copies of the function around under arch/ so they should be unified. Ralf From ralf@linux-mips.org Thu Jun 7 13:28:40 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 13:28:43 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:41158 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20027204AbXFGM2k (ORCPT ); Thu, 7 Jun 2007 13:28:40 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l57CNiYM020050; Thu, 7 Jun 2007 13:23:44 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l57CNiMG020049; Thu, 7 Jun 2007 13:23:44 +0100 Date: Thu, 7 Jun 2007 13:23:44 +0100 From: Ralf Baechle To: Atsushi Nemoto Cc: linux-mips@linux-mips.org Subject: Re: smp_mb() in asm-mips/bitops.h Message-ID: <20070607122344.GD26047@linux-mips.org> References: <20070607.165301.63743560.nemoto@toshiba-tops.co.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070607.165301.63743560.nemoto@toshiba-tops.co.jp> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15326 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Thu, Jun 07, 2007 at 04:53:01PM +0900, Atsushi Nemoto wrote: > I found some funny usages of smp_mb() in asm-mips/bitops.h: Funny indeed ;-) Below patch should do the trick. Due to very inagressive memory reordering on the few non-strongly ordered MIPS SMP systems I am somewhat confident this didn't break anything but if so, Sibyte and PMC-Sierra RM9000 SMP systems are affected. Ralf Signed-off-by: Ralf Baechle diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h index d995413..ffe245b 100644 --- a/include/asm-mips/bitops.h +++ b/include/asm-mips/bitops.h @@ -238,10 +238,11 @@ static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *addr) { unsigned short bit = nr & SZLONG_MASK; + unsigned long res; if (cpu_has_llsc && R10000_LLSC_WAR) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); - unsigned long temp, res; + unsigned long temp; __asm__ __volatile__( " .set mips3 \n" @@ -254,11 +255,9 @@ static inline int test_and_set_bit(unsigned long nr, : "=&r" (temp), "=m" (*m), "=&r" (res) : "r" (1UL << bit), "m" (*m) : "memory"); - - return res != 0; } else if (cpu_has_llsc) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); - unsigned long temp, res; + unsigned long temp; __asm__ __volatile__( " .set push \n" @@ -277,25 +276,22 @@ static inline int test_and_set_bit(unsigned long nr, : "=&r" (temp), "=m" (*m), "=&r" (res) : "r" (1UL << bit), "m" (*m) : "memory"); - - return res != 0; } else { volatile unsigned long *a = addr; unsigned long mask; - int retval; unsigned long flags; a += nr >> SZLONG_LOG; mask = 1UL << bit; raw_local_irq_save(flags); - retval = (mask & *a) != 0; + res = (mask & *a); *a |= mask; raw_local_irq_restore(flags); - - return retval; } smp_mb(); + + return res != 0; } /* @@ -310,6 +306,7 @@ static inline int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr) { unsigned short bit = nr & SZLONG_MASK; + unsigned long res; if (cpu_has_llsc && R10000_LLSC_WAR) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); @@ -327,12 +324,10 @@ static inline int test_and_clear_bit(unsigned long nr, : "=&r" (temp), "=m" (*m), "=&r" (res) : "r" (1UL << bit), "m" (*m) : "memory"); - - return res != 0; #ifdef CONFIG_CPU_MIPSR2 } else if (__builtin_constant_p(nr)) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); - unsigned long temp, res; + unsigned long temp; __asm__ __volatile__( "1: " __LL "%0, %1 # test_and_clear_bit \n" @@ -346,12 +341,10 @@ static inline int test_and_clear_bit(unsigned long nr, : "=&r" (temp), "=m" (*m), "=&r" (res) : "ri" (bit), "m" (*m) : "memory"); - - return res; #endif } else if (cpu_has_llsc) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); - unsigned long temp, res; + unsigned long temp; __asm__ __volatile__( " .set push \n" @@ -371,25 +364,22 @@ static inline int test_and_clear_bit(unsigned long nr, : "=&r" (temp), "=m" (*m), "=&r" (res) : "r" (1UL << bit), "m" (*m) : "memory"); - - return res != 0; } else { volatile unsigned long *a = addr; unsigned long mask; - int retval; unsigned long flags; a += nr >> SZLONG_LOG; mask = 1UL << bit; raw_local_irq_save(flags); - retval = (mask & *a) != 0; + res = (mask & *a); *a &= ~mask; raw_local_irq_restore(flags); - - return retval; } smp_mb(); + + return res != 0; } /* @@ -404,10 +394,11 @@ static inline int test_and_change_bit(unsigned long nr, volatile unsigned long *addr) { unsigned short bit = nr & SZLONG_MASK; + unsigned long res; if (cpu_has_llsc && R10000_LLSC_WAR) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); - unsigned long temp, res; + unsigned long temp; __asm__ __volatile__( " .set mips3 \n" @@ -420,11 +411,9 @@ static inline int test_and_change_bit(unsigned long nr, : "=&r" (temp), "=m" (*m), "=&r" (res) : "r" (1UL << bit), "m" (*m) : "memory"); - - return res != 0; } else if (cpu_has_llsc) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); - unsigned long temp, res; + unsigned long temp; __asm__ __volatile__( " .set push \n" @@ -443,24 +432,22 @@ static inline int test_and_change_bit(unsigned long nr, : "=&r" (temp), "=m" (*m), "=&r" (res) : "r" (1UL << bit), "m" (*m) : "memory"); - - return res != 0; } else { volatile unsigned long *a = addr; - unsigned long mask, retval; + unsigned long mask; unsigned long flags; a += nr >> SZLONG_LOG; mask = 1UL << bit; raw_local_irq_save(flags); - retval = (mask & *a) != 0; + res = (mask & *a); *a ^= mask; raw_local_irq_restore(flags); - - return retval; } smp_mb(); + + return res != 0; } #include From lhrkernelcoder@gmail.com Thu Jun 7 13:51:37 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 13:51:39 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.168]:11186 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S20027202AbXFGMvh (ORCPT ); Thu, 7 Jun 2007 13:51:37 +0100 Received: by ug-out-1314.google.com with SMTP id m3so737755ugc for ; Thu, 07 Jun 2007 05:50:36 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:mime-version:content-type:content-transfer-encoding:content-disposition; b=QPk6ko0BKq4sVKIbF3n07VLnJ2KDD9/WPCKEMG/WCItPqeNxZJkCFVGark6+m9PUA4gB/g7EcobzUnv2oJy/EJs/m5r7QEcgM+uwH5UDN5blvIIrnUAE50q8kYqmo7G2OlYIVhoLVMIfZC1L5U8tMC4nceNuIwOqNZUQshOrUZs= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:mime-version:content-type:content-transfer-encoding:content-disposition; b=Hp/kOnKw+Oc3AdURq2Cb/zzwmDGmg9j3xTSD+pmYh7MYCftwd6rATzz+GjvD2L1svOtdO/roD/W+Tse5ikCJv9NuWIFTFb6VM0VifoyKlZ6jYYBeWbOIPhLtwxar5p/0twtd6vEMHpy9WF/u46Glvx0wvbQ0K+WD3b3cDLsb28o= Received: by 10.82.106.14 with SMTP id e14mr3156825buc.1181220636447; Thu, 07 Jun 2007 05:50:36 -0700 (PDT) Received: by 10.82.121.13 with HTTP; Thu, 7 Jun 2007 05:50:36 -0700 (PDT) Message-ID: Date: Thu, 7 Jun 2007 05:50:36 -0700 From: "kernel coder" To: linux-mips@linux-mips.org Subject: tcp/ip stack question MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15327 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: lhrkernelcoder@gmail.com Precedence: bulk X-list: linux-mips hi, I am recieveing the packet on eth1 and want to send it through eth2. I've written code in netif_recieve_skb function .This code changes the mac header in sk_buff structure so that it can be send through other interface card.But when i call ip_dev_find fucntion to get the second interface structure ,NULL is returned.I checked the ip of second ethernet card and it was similar to one passed to ip_dev_find fucntion,then why NULL is being returned? Actually if i get the correct dev structure from ip_dev_find fucntion then i'll assign that dev structure to current skbuff->dev and call dev_queue_xmit fucntion,so that it transmitted through second interface card.Is mine approach correct? shahzad From vagabon.xyz@gmail.com Thu Jun 7 14:12:49 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 14:12:52 +0100 (BST) Received: from py-out-1112.google.com ([64.233.166.182]:37103 "EHLO py-out-1112.google.com") by ftp.linux-mips.org with ESMTP id S20027212AbXFGNMt (ORCPT ); Thu, 7 Jun 2007 14:12:49 +0100 Received: by py-out-1112.google.com with SMTP id f31so855508pyh for ; Thu, 07 Jun 2007 06:11:48 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=sKwl+jhGy7ojUxuOTuGk6J50Ottw2Jye7+ZdNgmEi8EceQrsIIEs69fpdtziAiB7pNue/6S0xDfCmidF9l+1NOHW872absNPzUGwaLQGC6MqrojoFqUhdZjcrGysrJ/Az9a6NQPS0sgnGgLW7rwA9koRScX1LTrakxh7dfNJYqc= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=j/pq+OumHiYs/azaO3k27o0IujpndLCUQ0i78ifn+S6ag18lmSorDpy2w69aZpSCLO/LSxyH9UGfTxziGaeTrrtlKxdE+lyzmhK3If9G0CrOGLD/hZaZQpsF3tfi8flD4iuOp9aRAgUyxo9cOmi3lurtkZU012VC0EU6YsUL0aY= Received: by 10.65.133.8 with SMTP id k8mr3024605qbn.1181221908290; Thu, 07 Jun 2007 06:11:48 -0700 (PDT) Received: by 10.65.204.8 with HTTP; Thu, 7 Jun 2007 06:11:48 -0700 (PDT) Message-ID: Date: Thu, 7 Jun 2007 15:11:48 +0200 From: "Franck Bui-Huu" To: "Ralf Baechle" Subject: Re: Tickless/dyntick kernel, highres timer and general time crapectomy Cc: linux-mips@linux-mips.org In-Reply-To: <20070607113032.GA26047@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20070606185450.GA10511@linux-mips.org> <20070607113032.GA26047@linux-mips.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15328 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips Ralf Baechle wrote: > On Thu, Jun 07, 2007 at 09:59:53AM +0200, Franck Bui-Huu wrote: > >>> I'm working on getting dyntick and highres timer support working for MIPS. >>> This unavoidably implies dumping most of the MIPS-private time >>> infrastructure we've piled up over the past decade. Which really is a >>> major crapectomy. A first cut of the patches which are tested to >>> run >> That's definitely true. I wrote my own version of clockevent support >> yesterday based on your patchset "dyntick-quilt" and I end up rewrite >> the whole time.c. The biggest part of the job would be to split this >> into several patches to ease the review but I doubt it worth it since >> we rewrite it almost from scratch. > > I'm actually getting closer and closer to the point where keep things in > a nicely split patchset stops being workable. > Actually I'm wondering if we shouldn't create a new file "arch/mips/kernel/time2.c" which will be a complete rewrite of the old one (interrupt handler, function pointers, clocksource, clockevent). This file would be the future replacement of the old time.c. This new file would be used only if the board have been updated accordingly. That may help to migrate... >> Another issue I have is to implement clockevent set_mode() method. You >> left it empty but I think we need at least to shut down the timer >> interrupt when setting the clock event device. Strangely I haven't >> found a "generic" way to stop them through cp0. Have I missed >> something ? > > You can mask the count/compare interrupt in the status register like any > other interrupt. Keep in mind that on many CPUs this interrupt is > shared with the performance counter interrupt so cannot always be > disabled. Well this interrupt could be shared with other devices too, couldn't it ? If so only the board code can disable it. > There is no other disable bit for this interrupt than the IE bit in the > status register. So it may just have to be ignored. > That would mean we can't have a tickless system in these cases, wouldn't it ? > Other issues to solve: > > o The R4000/R4400 (others?) allow the use of hwint5 for either the > count/compare interrupt or as a normal hardware interrupt. The switch > happens based on a bootstream setting. There is no config register > bit for this, so we either have to hardcode the knowledge about the > affected machines or construct a probe. Where the count/compare is > not usable we cannot use this as a clockevent device. > o Old revisions of the R4000 have a bug where if the count register is > read in exactly the moment where it matches the compare register the > timer interrupt is lost. This means the system will be interrupt-less > for the next typicall like 86s (at the typical 100MHz clock for the > affected processors). The workaround needs to be implemented. > > Both are currently the least of my concerns, there is much bigger fish to > catch ... > I agree a first implementation without these concerns addressed would be easier. But it's still good to keep them in mind. >> BTW any idea when "time-ntp-make-cmos-update-generic.patch" is going >> to be merged into mainline ? Note: I think there's a bug in >> notify_cmos_timer(). The following test should be negated, shouldn't >> it ? >> >> + if (no_sync_cmos_clock) >> + mod_timer(&sync_cmos_timer, jiffies + 1); > > In theory the patch should be in -mm to be merged early just after .22. > Haven't found any trace of it. -- Franck From yoichi_yuasa@tripeaks.co.jp Thu Jun 7 14:28:00 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 14:28:03 +0100 (BST) Received: from mo31.po.2iij.net ([210.128.50.54]:51259 "EHLO mo31.po.2iij.net") by ftp.linux-mips.org with ESMTP id S20027213AbXFGN2A (ORCPT ); Thu, 7 Jun 2007 14:28:00 +0100 Received: by mo.po.2iij.net (mo31) id l57DRtY4054584; Thu, 7 Jun 2007 22:27:55 +0900 (JST) Received: from localhost.localdomain (70.27.30.125.dy.iij4u.or.jp [125.30.27.70]) by mbox.po.2iij.net (mbox33) id l57DRpbk025912 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 7 Jun 2007 22:27:51 +0900 (JST) Date: Thu, 7 Jun 2007 22:27:50 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: yoichi_yuasa@tripeaks.co.jp, linux-mips Subject: [PATCH][MIPS] remove unused time.c for swarm Message-Id: <20070607222750.5f43aa85.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.6 (GTK+ 1.2.10; i486-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15329 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has removed unused time.c for swarm. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/sibyte/swarm/time.c mips/arch/mips/sibyte/swarm/time.c --- mips-orig/arch/mips/sibyte/swarm/time.c 2007-06-07 22:14:14.002365750 +0900 +++ mips/arch/mips/sibyte/swarm/time.c 1970-01-01 09:00:00.000000000 +0900 @@ -1,244 +0,0 @@ -/* - * Copyright (C) 2000, 2001 Broadcom Corporation - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - */ - -/* - * Time routines for the swarm board. We pass all the hard stuff - * through to the sb1250 handling code. Only thing we really keep - * track of here is what time of day we think it is. And we don't - * really even do a good job of that... - */ - - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -static unsigned long long sec_bias = 0; -static unsigned int usec_bias = 0; - -/* Xicor 1241 definitions */ - -/* - * Register bits - */ - -#define X1241REG_SR_BAT 0x80 /* currently on battery power */ -#define X1241REG_SR_RWEL 0x04 /* r/w latch is enabled, can write RTC */ -#define X1241REG_SR_WEL 0x02 /* r/w latch is unlocked, can enable r/w now */ -#define X1241REG_SR_RTCF 0x01 /* clock failed */ -#define X1241REG_BL_BP2 0x80 /* block protect 2 */ -#define X1241REG_BL_BP1 0x40 /* block protect 1 */ -#define X1241REG_BL_BP0 0x20 /* block protect 0 */ -#define X1241REG_BL_WD1 0x10 -#define X1241REG_BL_WD0 0x08 -#define X1241REG_HR_MIL 0x80 /* military time format */ - -/* - * Register numbers - */ - -#define X1241REG_BL 0x10 /* block protect bits */ -#define X1241REG_INT 0x11 /* */ -#define X1241REG_SC 0x30 /* Seconds */ -#define X1241REG_MN 0x31 /* Minutes */ -#define X1241REG_HR 0x32 /* Hours */ -#define X1241REG_DT 0x33 /* Day of month */ -#define X1241REG_MO 0x34 /* Month */ -#define X1241REG_YR 0x35 /* Year */ -#define X1241REG_DW 0x36 /* Day of Week */ -#define X1241REG_Y2K 0x37 /* Year 2K */ -#define X1241REG_SR 0x3F /* Status register */ - -#define X1241_CCR_ADDRESS 0x6F - -#define SMB_CSR(reg) (IOADDR(A_SMB_REGISTER(1, reg))) - -static int xicor_read(uint8_t addr) -{ - while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) - ; - - __raw_writeq((addr >> 8) & 0x7, SMB_CSR(R_SMB_CMD)); - __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_DATA)); - __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR2BYTE, - SMB_CSR(R_SMB_START)); - - while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) - ; - - __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_RD1BYTE, - SMB_CSR(R_SMB_START)); - - while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) - ; - - if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { - /* Clear error bit by writing a 1 */ - __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); - return -1; - } - - return (__raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff); -} - -static int xicor_write(uint8_t addr, int b) -{ - while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) - ; - - __raw_writeq(addr, SMB_CSR(R_SMB_CMD)); - __raw_writeq((addr & 0xff) | ((b & 0xff) << 8), SMB_CSR(R_SMB_DATA)); - __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR3BYTE, - SMB_CSR(R_SMB_START)); - - while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) - ; - - if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { - /* Clear error bit by writing a 1 */ - __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); - return -1; - } else { - return 0; - } -} - -/* - * In order to set the CMOS clock precisely, set_rtc_mmss has to be - * called 500 ms after the second nowtime has started, because when - * nowtime is written into the registers of the CMOS clock, it will - * jump to the next second precisely 500 ms later. Check the Motorola - * MC146818A or Dallas DS12887 data sheet for details. - * - * BUG: This routine does not handle hour overflow properly; it just - * sets the minutes. Usually you'll only notice that after reboot! - */ -int set_rtc_mmss(unsigned long nowtime) -{ - int retval = 0; - int real_seconds, real_minutes, cmos_minutes; - - cmos_minutes = xicor_read(X1241REG_MN); - cmos_minutes = BCD2BIN(cmos_minutes); - - /* - * since we're only adjusting minutes and seconds, - * don't interfere with hour overflow. This avoids - * messing with unknown time zones but requires your - * RTC not to be off by more than 15 minutes - */ - real_seconds = nowtime % 60; - real_minutes = nowtime / 60; - if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1) - real_minutes += 30; /* correct for half hour time zone */ - real_minutes %= 60; - - /* unlock writes to the CCR */ - xicor_write(X1241REG_SR, X1241REG_SR_WEL); - xicor_write(X1241REG_SR, X1241REG_SR_WEL | X1241REG_SR_RWEL); - - if (abs(real_minutes - cmos_minutes) < 30) { - real_seconds = BIN2BCD(real_seconds); - real_minutes = BIN2BCD(real_minutes); - xicor_write(X1241REG_SC, real_seconds); - xicor_write(X1241REG_MN, real_minutes); - } else { - printk(KERN_WARNING - "set_rtc_mmss: can't update from %d to %d\n", - cmos_minutes, real_minutes); - retval = -1; - } - - xicor_write(X1241REG_SR, 0); - - printk("set_rtc_mmss: %02d:%02d\n", real_minutes, real_seconds); - - return retval; -} - -static unsigned long __init get_swarm_time(void) -{ - unsigned int year, mon, day, hour, min, sec, y2k; - - sec = xicor_read(X1241REG_SC); - min = xicor_read(X1241REG_MN); - hour = xicor_read(X1241REG_HR); - - if (hour & X1241REG_HR_MIL) { - hour &= 0x3f; - } else { - if (hour & 0x20) - hour = (hour & 0xf) + 0x12; - } - - sec = BCD2BIN(sec); - min = BCD2BIN(min); - hour = BCD2BIN(hour); - - day = xicor_read(X1241REG_DT); - mon = xicor_read(X1241REG_MO); - year = xicor_read(X1241REG_YR); - y2k = xicor_read(X1241REG_Y2K); - - day = BCD2BIN(day); - mon = BCD2BIN(mon); - year = BCD2BIN(year); - y2k = BCD2BIN(y2k); - - year += (y2k * 100); - - return mktime(year, mon, day, hour, min, sec); -} - -/* - * Bring up the timer at 100 Hz. - */ -void __init swarm_time_init(void) -{ - unsigned int flags; - int status; - - /* Set up the scd general purpose timer 0 to cpu 0 */ - sb1250_time_init(); - - /* Establish communication with the Xicor 1241 RTC */ - /* XXXKW how do I share the SMBus with the I2C subsystem? */ - - __raw_writeq(K_SMB_FREQ_400KHZ, SMB_CSR(R_SMB_FREQ)); - __raw_writeq(0, SMB_CSR(R_SMB_CONTROL)); - - if ((status = xicor_read(X1241REG_SR_RTCF)) < 0) { - printk("x1241: couldn't detect on SWARM SMBus 1\n"); - } else { - if (status & X1241REG_SR_RTCF) - printk("x1241: battery failed -- time is probably wrong\n"); - write_seqlock_irqsave(&xtime_lock, flags); - xtime.tv_sec = get_swarm_time(); - xtime.tv_nsec = 0; - write_sequnlock_irqrestore(&xtime_lock, flags); - } -} From sshtylyov@ru.mvista.com Thu Jun 7 14:41:30 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 14:41:33 +0100 (BST) Received: from h155.mvista.com ([63.81.120.155]:37553 "EHLO imap.sh.mvista.com") by ftp.linux-mips.org with ESMTP id S20027221AbXFGNla (ORCPT ); Thu, 7 Jun 2007 14:41:30 +0100 Received: from [192.168.1.248] (unknown [10.150.0.9]) by imap.sh.mvista.com (Postfix) with ESMTP id 4437D3EC9; Thu, 7 Jun 2007 06:41:28 -0700 (PDT) Message-ID: <46680B75.5040809@ru.mvista.com> Date: Thu, 07 Jun 2007 17:43:17 +0400 From: Sergei Shtylyov Organization: MontaVista Software Inc. User-Agent: Mozilla/5.0 (X11; U; Linux i686; rv:1.7.2) Gecko/20040803 X-Accept-Language: ru, en-us, en-gb MIME-Version: 1.0 To: Franck Bui-Huu Cc: Ralf Baechle , linux-mips@linux-mips.org Subject: Re: Tickless/dyntick kernel, highres timer and general time crapectomy References: <20070606185450.GA10511@linux-mips.org> <20070607113032.GA26047@linux-mips.org> In-Reply-To: Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15330 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sshtylyov@ru.mvista.com Precedence: bulk X-list: linux-mips Hello. Franck Bui-Huu wrote: > Actually I'm wondering if we shouldn't create a new file > "arch/mips/kernel/time2.c" which will be a complete rewrite of the > old one (interrupt handler, function pointers, clocksource, > clockevent). This file would be the future replacement of the old > time.c. This new file would be used only if the board have been > updated accordingly. That may help to migrate... We've been there and done that -- for George Anzinger's HRT. :-) >>> Another issue I have is to implement clockevent set_mode() method. You >>> left it empty but I think we need at least to shut down the timer >>> interrupt when setting the clock event device. Strangely I haven't >>> found a "generic" way to stop them through cp0. Have I missed >>> something ? >> You can mask the count/compare interrupt in the status register like any >> other interrupt. Keep in mind that on many CPUs this interrupt is >> shared with the performance counter interrupt so cannot always be >> disabled. > Well this interrupt could be shared with other devices too, couldn't it ? > If so only the board code can disable it. >> There is no other disable bit for this interrupt than the IE bit in the >> status register. So it may just have to be ignored. > That would mean we can't have a tickless system in these cases, wouldn't > it ? No, it doesn't. Even on dyntick kernels, interrupts do happen several times a second. Dynticks have nothing to do with disabling timer interrupts... WBR, Sergei From anemo@mba.ocn.ne.jp Thu Jun 7 15:42:07 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 15:42:09 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:19702 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20027211AbXFGOmH (ORCPT ); Thu, 7 Jun 2007 15:42:07 +0100 Received: from localhost (p2004-ipad22funabasi.chiba.ocn.ne.jp [220.104.80.4]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id C6E46B499; Thu, 7 Jun 2007 23:40:45 +0900 (JST) Date: Thu, 07 Jun 2007 23:41:17 +0900 (JST) Message-Id: <20070607.234117.61509367.anemo@mba.ocn.ne.jp> To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org Subject: Re: smp_mb() in asm-mips/bitops.h From: Atsushi Nemoto In-Reply-To: <20070607122344.GD26047@linux-mips.org> References: <20070607.165301.63743560.nemoto@toshiba-tops.co.jp> <20070607122344.GD26047@linux-mips.org> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15331 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Thu, 7 Jun 2007 13:23:44 +0100, Ralf Baechle wrote: > Funny indeed ;-) Below patch should do the trick. > > Due to very inagressive memory reordering on the few non-strongly ordered > MIPS SMP systems I am somewhat confident this didn't break anything but > if so, Sibyte and PMC-Sierra RM9000 SMP systems are affected. > > Ralf > > Signed-off-by: Ralf Baechle Thanks, looks good for me. --- Atsushi Nemoto From vagabon.xyz@gmail.com Thu Jun 7 15:44:22 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 15:44:24 +0100 (BST) Received: from ik-out-1112.google.com ([66.249.90.177]:17223 "EHLO ik-out-1112.google.com") by ftp.linux-mips.org with ESMTP id S20022694AbXFGOoW (ORCPT ); Thu, 7 Jun 2007 15:44:22 +0100 Received: by ik-out-1112.google.com with SMTP id b35so448905ika for ; Thu, 07 Jun 2007 07:44:12 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=B3Y9WFujKMzKjyfnQ5jL0ZazMAZyaffUlmQt37EzPlJW5xqhYfuqTNh127n/S7PAJm/jqFonexLNbNgvjMBycpAVIjvofUA7C/QDMX9JRW2Rjrq/D0MmxPO+zbrl9LCuFRT6I8hdArCRfSFnIPe3jQuFH5s+dB69pxTFngvRbOg= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=IHjAgE1br5Ce4U3NzGfCFGSv+ApiXYiH6h0spFlqHDmanV86Fe+wz9Xmdp4EXZ/MruKQ2EGRDAdD/C/RtNip1AdTye0rFeABLZ+oeqv10XE2svxCdbvvJamZHNQaT2kKaPF298mBbtmfFTsA1zR+fjgagbeP97qOxqSyV+P2WjU= Received: by 10.65.222.11 with SMTP id z11mr12371871qbq.1181227452011; Thu, 07 Jun 2007 07:44:12 -0700 (PDT) Received: by 10.65.204.8 with HTTP; Thu, 7 Jun 2007 07:44:11 -0700 (PDT) Message-ID: Date: Thu, 7 Jun 2007 16:44:11 +0200 From: "Franck Bui-Huu" To: "Sergei Shtylyov" Subject: Re: Tickless/dyntick kernel, highres timer and general time crapectomy Cc: "Ralf Baechle" , linux-mips@linux-mips.org In-Reply-To: <46680B75.5040809@ru.mvista.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20070606185450.GA10511@linux-mips.org> <20070607113032.GA26047@linux-mips.org> <46680B75.5040809@ru.mvista.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15332 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips Hi, [ weird, Gmail thought you were a spamer... ] Sergei Shtylyov wrote: > > No, it doesn't. Even on dyntick kernels, interrupts do happen several > times a second. Dynticks have nothing to do with disabling timer > interrupts... > That's true however if your system has 2 clock devices. One is the r4k-hpt and the other one soemthing else with a higher rating. If you don't stop r4k-hpt interrupts, how does it work ? -- Franck From sshtylyov@ru.mvista.com Thu Jun 7 15:48:14 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 15:48:16 +0100 (BST) Received: from h155.mvista.com ([63.81.120.155]:43955 "EHLO imap.sh.mvista.com") by ftp.linux-mips.org with ESMTP id S20022670AbXFGOsO (ORCPT ); Thu, 7 Jun 2007 15:48:14 +0100 Received: from [192.168.1.248] (unknown [10.150.0.9]) by imap.sh.mvista.com (Postfix) with ESMTP id D39B03EC9; Thu, 7 Jun 2007 07:48:10 -0700 (PDT) Message-ID: <46681B17.2080207@ru.mvista.com> Date: Thu, 07 Jun 2007 18:49:59 +0400 From: Sergei Shtylyov Organization: MontaVista Software Inc. User-Agent: Mozilla/5.0 (X11; U; Linux i686; rv:1.7.2) Gecko/20040803 X-Accept-Language: ru, en-us, en-gb MIME-Version: 1.0 To: Franck Bui-Huu Cc: Ralf Baechle , linux-mips@linux-mips.org Subject: Re: Tickless/dyntick kernel, highres timer and general time crapectomy References: <20070606185450.GA10511@linux-mips.org> <20070607113032.GA26047@linux-mips.org> <46680B75.5040809@ru.mvista.com> In-Reply-To: Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15333 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sshtylyov@ru.mvista.com Precedence: bulk X-list: linux-mips Hello. Franck Bui-Huu wrote: > [ weird, Gmail thought you were a spamer... ] Well, I guess I should thank my ISP which indeed hosts many spammers. :-) > Sergei Shtylyov wrote: >> No, it doesn't. Even on dyntick kernels, interrupts do happen several >> times a second. Dynticks have nothing to do with disabling timer >> interrupts... >> > > That's true however if your system has 2 clock devices. One is the r4k-hpt > and the other one soemthing else with a higher rating. If you don't stop > r4k-hpt interrupts, how does it work ? The unwanted events just gets ignored by higher-level code, IIRC... Classic PowerPC CPUs have the same problem (even worse, actually) -- one can't disable the decrementer interrupt at all. WBR, Sergei From sar_van81@yahoo.co.in Thu Jun 7 16:04:40 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 16:04:43 +0100 (BST) Received: from web94311.mail.in2.yahoo.com ([203.104.16.221]:65455 "HELO web94311.mail.in2.yahoo.com") by ftp.linux-mips.org with SMTP id S20027220AbXFGPEk (ORCPT ); Thu, 7 Jun 2007 16:04:40 +0100 Received: (qmail 39018 invoked by uid 60001); 6 Jun 2007 11:19:41 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=s1024; d=yahoo.co.in; h=X-YMail-OSG:Received:Date:From:Subject:To:Cc:In-Reply-To:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-ID; b=3jqEXGkbIk1HuBGC65s6pZ7QVgqX9E18+ZltfDKipxoaXvMaE5lugjOOTOXsFkehRKhLsSC9gu+MahKPOPD6A2Qe0qFCr71oQ0IDGg2p3XwTZXxWaC9uQczPEg/zj6ThZBbVHdUqdEBM7bAAhVV+j7XAJbdv54T0QuIeHxGHUfk=; X-YMail-OSG: 3XyBt6AVM1k7_HDRK1yE9H6up76p3kywbfHFGRvi Received: from [59.92.55.239] by web94311.mail.in2.yahoo.com via HTTP; Wed, 06 Jun 2007 12:19:41 BST Date: Wed, 6 Jun 2007 12:19:41 +0100 (BST) From: saravanan Subject: Re: porting linux to DBau1200 To: Freddy Spierenburg Cc: linux-mips@linux-mips.org In-Reply-To: <20070602184450.GD28306@dusktilldawn.nl> MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="0-294751016-1181128781=:36765" Content-Transfer-Encoding: 8bit Message-ID: <687058.36765.qm@web94311.mail.in2.yahoo.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15334 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sar_van81@yahoo.co.in Precedence: bulk X-list: linux-mips --0-294751016-1181128781=:36765 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8bit Hi, can you say me to create a simple rootfilesystem for MIPS? i searched in the net but i could not find anything. i tried cross compiling busybox for our MIPS but that too was not successfull. can you please help me ? saravanan. --------------------------------- Looking for people who are YOUR TYPE? Find them here! --0-294751016-1181128781=:36765 Content-Type: text/html; charset=iso-8859-1 Content-Transfer-Encoding: 8bit Hi,

can you say me to create a simple rootfilesystem for MIPS? i searched in the net but i could not find anything. i tried cross compiling busybox for our MIPS but that too was not successfull.

can you please help me ?


saravanan.

Looking for people who are YOUR TYPE? Find them here! --0-294751016-1181128781=:36765-- From ralf@linux-mips.org Thu Jun 7 16:07:50 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 16:07:52 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:12960 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20027230AbXFGPHu (ORCPT ); Thu, 7 Jun 2007 16:07:50 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l57F2pGe023981; Thu, 7 Jun 2007 16:02:51 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l57F2o9P023980; Thu, 7 Jun 2007 16:02:50 +0100 Date: Thu, 7 Jun 2007 16:02:50 +0100 From: Ralf Baechle To: Franck Bui-Huu Cc: linux-mips@linux-mips.org Subject: Re: Tickless/dyntick kernel, highres timer and general time crapectomy Message-ID: <20070607150250.GE26047@linux-mips.org> References: <20070606185450.GA10511@linux-mips.org> <20070607113032.GA26047@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15335 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Thu, Jun 07, 2007 at 03:11:48PM +0200, Franck Bui-Huu wrote: > >In theory the patch should be in -mm to be merged early just after .22. My bad, I meant -rt - which I'm not following. Realtime is one step further than I want to look ahead right now. Ralf From alan@lxorguk.ukuu.org.uk Thu Jun 7 16:20:44 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 16:20:46 +0100 (BST) Received: from outpipe-village-512-1.bc.nu ([81.2.110.250]:17312 "EHLO the-village.bc.nu") by ftp.linux-mips.org with ESMTP id S20027192AbXFGPUn (ORCPT ); Thu, 7 Jun 2007 16:20:43 +0100 Received: from the-village.bc.nu (localhost.localdomain [127.0.0.1]) by the-village.bc.nu (8.13.8/8.13.8) with ESMTP id l57FPtVH032670; Thu, 7 Jun 2007 16:25:55 +0100 Date: Thu, 7 Jun 2007 16:25:55 +0100 From: Alan Cox To: akpm@osdl.org, linux-mips@linux-mips.org Subject: [PATCH] tty: Add the new ioctls and definitionto the MIPS architecture Message-ID: <20070607162555.3e09c8d0@the-village.bc.nu> X-Mailer: Claws Mail 2.9.1 (GTK+ 2.10.8; i386-redhat-linux-gnu) Organization: Red Hat UK Cyf., Amberley Place, 107-111 Peascod Street, Windsor, Berkshire, SL4 1TE, Y Deyrnas Gyfunol. Cofrestrwyd yng Nghymru a Lloegr o'r rhif cofrestru 3798903 Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15336 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: alan@lxorguk.ukuu.org.uk Precedence: bulk X-list: linux-mips Same as all the others, just put in the constants for the existing kernel code and termios2 structure Signed-off-by: Alan Cox diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla-2.6.22-rc4-mm2/include/asm-mips/ioctls.h linux-2.6.22-rc4-mm2/include/asm-mips/ioctls.h --- linux.vanilla-2.6.22-rc4-mm2/include/asm-mips/ioctls.h 2007-06-07 14:24:30.000000000 +0100 +++ linux-2.6.22-rc4-mm2/include/asm-mips/ioctls.h 2007-06-07 14:36:17.000000000 +0100 @@ -77,6 +77,10 @@ #define TIOCSBRK 0x5427 /* BSD compatibility */ #define TIOCCBRK 0x5428 /* BSD compatibility */ #define TIOCGSID 0x7416 /* Return the session ID of FD */ +#define TCGETS2 _IOR('T',0x2A, struct termios2) +#define TCSETS2 _IOW('T',0x2B, struct termios2) +#define TCSETSW2 _IOW('T',0x2C, struct termios2) +#define TCSETSF2 _IOW('T',0x2D, struct termios2) #define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ #define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla-2.6.22-rc4-mm2/include/asm-mips/termbits.h linux-2.6.22-rc4-mm2/include/asm-mips/termbits.h --- linux.vanilla-2.6.22-rc4-mm2/include/asm-mips/termbits.h 2007-06-07 14:26:10.000000000 +0100 +++ linux-2.6.22-rc4-mm2/include/asm-mips/termbits.h 2007-06-07 14:36:36.000000000 +0100 @@ -164,6 +164,7 @@ #define HUPCL 0002000 /* Hang up on last close. */ #define CLOCAL 0004000 /* Ignore modem status lines. */ #define CBAUDEX 0010000 +#define BOTHER 0010000 #define B57600 0010001 #define B115200 0010002 #define B230400 0010003 @@ -179,9 +180,11 @@ #define B3000000 0010015 #define B3500000 0010016 #define B4000000 0010017 -#define CIBAUD 002003600000 /* input baud rate (not used) */ +#define CIBAUD 002003600000 /* input baud rate */ #define CMSPAR 010000000000 /* mark or space (stick) parity */ -#define CRTSCTS 020000000000 /* flow control */ +#define CRTSCTS 020000000000 /* flow control */ + +#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */ /* c_lflag bits */ #define ISIG 0000001 /* Enable signals. */ diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla-2.6.22-rc4-mm2/include/asm-mips/termios.h linux-2.6.22-rc4-mm2/include/asm-mips/termios.h --- linux.vanilla-2.6.22-rc4-mm2/include/asm-mips/termios.h 2007-06-07 14:24:30.000000000 +0100 +++ linux-2.6.22-rc4-mm2/include/asm-mips/termios.h 2007-06-07 14:36:36.000000000 +0100 @@ -122,8 +122,10 @@ copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ }) -#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios)) -#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios)) +#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2)) +#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2)) +#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios)) +#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios)) #endif /* defined(__KERNEL__) */ From ralf@linux-mips.org Thu Jun 7 16:21:46 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 16:21:48 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:3024 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20027192AbXFGPVq (ORCPT ); Thu, 7 Jun 2007 16:21:46 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l57FEmPu024225; Thu, 7 Jun 2007 16:14:48 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l57FElXJ024224; Thu, 7 Jun 2007 16:14:47 +0100 Date: Thu, 7 Jun 2007 16:14:47 +0100 From: Ralf Baechle To: Franck Bui-Huu Cc: linux-mips@linux-mips.org Subject: Re: Tickless/dyntick kernel, highres timer and general time crapectomy Message-ID: <20070607151447.GF26047@linux-mips.org> References: <20070606185450.GA10511@linux-mips.org> <20070607113032.GA26047@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15337 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Thu, Jun 07, 2007 at 03:11:48PM +0200, Franck Bui-Huu wrote: > Actually I'm wondering if we shouldn't create a new file > "arch/mips/kernel/time2.c" which will be a complete rewrite of the > old one (interrupt handler, function pointers, clocksource, > clockevent). This file would be the future replacement of the old > time.c. This new file would be used only if the board have been > updated accordingly. That may help to migrate... And we'll still be stuck with the compat crap for years - no thank you. One of the strength of Linux has always been that if necessary we've been able to turn the code base upside down as needed - even if sometimes it takes a snow plough to move old stuff out of the way ;-) > >You can mask the count/compare interrupt in the status register like any > >other interrupt. Keep in mind that on many CPUs this interrupt is > >shared with the performance counter interrupt so cannot always be > >disabled. > > Well this interrupt could be shared with other devices too, couldn't it ? > If so only the board code can disable it. No, the boot mode bit controls a multiplexer so there is either count/compare or the external interrupt. > >There is no other disable bit for this interrupt than the IE bit in the > >status register. So it may just have to be ignored. > > > > That would mean we can't have a tickless system in these cases, wouldn't > it ? It would simply mean we will receive a useless every 2^32 cycles - nothing terrible. The tickless kernel isn't really tickless. It's more accurately called dyntick. One thing that keeps us from completly getting rid of regular timer interrupts under all circumstances is the current scheduler. Only if a CPU is idle Linux can stop the regular timer interrupts for it. With all the software interrupts that happen to be running on a usual system we expect just a hand full of interrupts per second. And the good news is that mingo's current scheduler work is going to remove the concept of time slices from the scheduler and once that is done we _finally_ will be able to go even on non-idle CPUs. Ralf From freddy@dusktilldawn.nl Thu Jun 7 16:25:23 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 16:25:26 +0100 (BST) Received: from tool.snarl.nl ([82.95.241.19]:6161 "EHLO tool.snarl.nl") by ftp.linux-mips.org with ESMTP id S20027193AbXFGPZX (ORCPT ); Thu, 7 Jun 2007 16:25:23 +0100 Received: from localhost (tool.local.snarl.nl [127.0.0.1]) by tool.snarl.nl (Postfix) with ESMTP id 91DFF5DFB2; Thu, 7 Jun 2007 17:25:17 +0200 (CEST) Received: from tool.snarl.nl ([127.0.0.1]) by localhost (tool.local.snarl.nl [127.0.0.1]) (amavisd-new, port 10024) with LMTP id nXwd62cIA8h9; Thu, 7 Jun 2007 17:25:17 +0200 (CEST) Received: by tool.snarl.nl (Postfix, from userid 1000) id 35C825DF94; Thu, 7 Jun 2007 17:25:17 +0200 (CEST) Date: Thu, 7 Jun 2007 17:25:17 +0200 From: Freddy Spierenburg To: saravanan Cc: linux-mips@linux-mips.org Subject: Re: porting linux to DBau1200 Message-ID: <20070607152516.GD25907@dusktilldawn.nl> References: <20070602184450.GD28306@dusktilldawn.nl> <687058.36765.qm@web94311.mail.in2.yahoo.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="SFyWQ0h3ruR435lw" Content-Disposition: inline In-Reply-To: <687058.36765.qm@web94311.mail.in2.yahoo.com> X-User-Agent-Feature: All mail clients suck. This one just sucks less. X-GPG-Key: http://snarl.nl/~freddy/keys/freddyPublicKey.gpg User-Agent: Mutt/1.5.13 (2006-08-11) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15338 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: freddy@dusktilldawn.nl Precedence: bulk X-list: linux-mips --SFyWQ0h3ruR435lw Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi Saravanan, On Wed, Jun 06, 2007 at 12:19:41PM +0100, saravanan wrote: > can you say me to create a simple rootfilesystem for MIPS? Like I say'd in my previous email, have a look at debootstrap: http://packages.debian.org/stable/admin/debootstrap It's a very easy and fast way to create a simple filesystem. Good luck! --=20 $ cat ~/.signature Freddy Spierenburg http://freddy.snarl.nl/ GnuPG: 0x7941D1E1=3DC948 5851 26D2 FA5C 39F1 E588 6F17 FD5D 7941 D1E1 $ # Please read http://www.ietf.org/rfc/rfc2015.txt before complain! --SFyWQ0h3ruR435lw Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature Content-Disposition: inline -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.6 (GNU/Linux) iD8DBQFGaCNcbxf9XXlB0eERAnBYAKCWEKzAKz4EarmCpvmqJ3jAuNuBVwCglpn4 2I9z2o513c8Dlxa+Tf4ytOQ= =savZ -----END PGP SIGNATURE----- --SFyWQ0h3ruR435lw-- From ralf@linux-mips.org Thu Jun 7 16:53:05 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 16:53:07 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:48604 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20027236AbXFGPxF (ORCPT ); Thu, 7 Jun 2007 16:53:05 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l57Fm29P024944; Thu, 7 Jun 2007 16:48:02 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l57Fm15T024943; Thu, 7 Jun 2007 16:48:01 +0100 Date: Thu, 7 Jun 2007 16:48:01 +0100 From: Ralf Baechle To: Franck Bui-Huu Cc: Sergei Shtylyov , linux-mips@linux-mips.org Subject: Re: Tickless/dyntick kernel, highres timer and general time crapectomy Message-ID: <20070607154801.GG26047@linux-mips.org> References: <20070606185450.GA10511@linux-mips.org> <20070607113032.GA26047@linux-mips.org> <46680B75.5040809@ru.mvista.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15339 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Thu, Jun 07, 2007 at 04:44:11PM +0200, Franck Bui-Huu wrote: > > No, it doesn't. Even on dyntick kernels, interrupts do happen several > >times a second. Dynticks have nothing to do with disabling timer > >interrupts... > > > > That's true however if your system has 2 clock devices. One is the r4k-hpt > and the other one soemthing else with a higher rating. If you don't stop > r4k-hpt interrupts, how does it work ? To some degree this question is hypothetic because generally the cp0 count/compare timer will be the highest rated counter. But even if so, the basic solution is the same - just ignore the interrupt whenever it happens to be triggered. Or if it isn't shared with an active performance counter interrupt, you could even disable_irq() it. Ralf From ralf@linux-mips.org Thu Jun 7 17:23:29 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 17:23:31 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:1237 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022694AbXFGQX3 (ORCPT ); Thu, 7 Jun 2007 17:23:29 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l57GGTLE030066; Thu, 7 Jun 2007 17:16:29 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l57GGSgi030065; Thu, 7 Jun 2007 17:16:28 +0100 Date: Thu, 7 Jun 2007 17:16:28 +0100 From: Ralf Baechle To: Yoichi Yuasa Cc: linux-mips Subject: Re: [PATCH][MIPS] remove unused time.c for swarm Message-ID: <20070607161628.GA30044@linux-mips.org> References: <20070607222750.5f43aa85.yoichi_yuasa@tripeaks.co.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070607222750.5f43aa85.yoichi_yuasa@tripeaks.co.jp> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15340 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Thu, Jun 07, 2007 at 10:27:50PM +0900, Yoichi Yuasa wrote: > This patch has removed unused time.c for swarm. Thanks, I've put this into the -time patch series. One file less to clean. Ralf From ralf@linux-mips.org Thu Jun 7 17:49:31 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 17:49:33 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:61352 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20027210AbXFGQtb (ORCPT ); Thu, 7 Jun 2007 17:49:31 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l57GgW3x030787; Thu, 7 Jun 2007 17:42:32 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l57GgVMI030786; Thu, 7 Jun 2007 17:42:31 +0100 Date: Thu, 7 Jun 2007 17:42:31 +0100 From: Ralf Baechle To: Alan Cox Cc: akpm@osdl.org, linux-mips@linux-mips.org Subject: Re: [PATCH] tty: Add the new ioctls and definitionto the MIPS architecture Message-ID: <20070607164231.GC30044@linux-mips.org> References: <20070607162555.3e09c8d0@the-village.bc.nu> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070607162555.3e09c8d0@the-village.bc.nu> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15341 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Thu, Jun 07, 2007 at 04:25:55PM +0100, Alan Cox wrote: > Same as all the others, just put in the constants for the existing kernel > code and termios2 structure > > Signed-off-by: Alan Cox Acked-by: Ralf Baechle Ralf From ralf@linux-mips.org Thu Jun 7 18:12:49 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 18:12:51 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:59835 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20027214AbXFGRMt (ORCPT ); Thu, 7 Jun 2007 18:12:49 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l57H5i5u031360; Thu, 7 Jun 2007 18:05:44 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l57H5g9h031359; Thu, 7 Jun 2007 18:05:42 +0100 Date: Thu, 7 Jun 2007 18:05:42 +0100 From: Ralf Baechle To: Fuxin Zhang Cc: tiansm@lemote.com, linux-mips@linux-mips.org Subject: Re: [PATCH] override of arch/mips/mm/cache.c: __uncached_access Message-ID: <20070607170542.GD30044@linux-mips.org> References: <20070606182814.GD30017@linux-mips.org> <11811962573610-git-send-email-tiansm@lemote.com> <4667A443.8060105@lemote.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4667A443.8060105@lemote.com> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15342 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Thu, Jun 07, 2007 at 02:22:59PM +0800, Fuxin Zhang wrote: > For example,if we are using this memory layout: > 0-256MB phys mem > 256-512M pci io/mem region > 512-768MB phys mem > Xorg will crash due to pci video memory mapping problem. > > So this is not really only for Fulong. > > BTW: > Songmao, we'd better add a comment to justify this code. Note I didn't fundamentally object to the patch; it was rather a a question of _how_ to do it. The patch I put into the -queue tree will allow you to put all the Fulong-specifics into the Fulong code rather than the generic code. Ralf From ralf@linux-mips.org Thu Jun 7 18:18:11 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 18:18:13 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:34484 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022753AbXFGRSL (ORCPT ); Thu, 7 Jun 2007 18:18:11 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l57HBC2q031484; Thu, 7 Jun 2007 18:11:12 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l57HBB8B031483; Thu, 7 Jun 2007 18:11:11 +0100 Date: Thu, 7 Jun 2007 18:11:11 +0100 From: Ralf Baechle To: Yoichi Yuasa Cc: linux-mips Subject: Re: [PATCH][MIPS] update cobalt_defconfig Message-ID: <20070607171111.GB31413@linux-mips.org> References: <20070602021241.2147f7ee.yoichi_yuasa@tripeaks.co.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070602021241.2147f7ee.yoichi_yuasa@tripeaks.co.jp> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15343 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Sat, Jun 02, 2007 at 02:12:41AM +0900, Yoichi Yuasa wrote: > This patch has updated cobalt_defconfig. > Cobalt button support has added to it. > Also ATA driver has changed BLK_DEV_VIA82CXXX to PATA_VIA. Queued up for 2.6.23. Ralf From ralf@linux-mips.org Thu Jun 7 18:44:04 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 18:44:06 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:9447 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20027225AbXFGRoE (ORCPT ); Thu, 7 Jun 2007 18:44:04 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l57Hd5Pw002569; Thu, 7 Jun 2007 18:39:05 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l57Hd423002568; Thu, 7 Jun 2007 18:39:04 +0100 Date: Thu, 7 Jun 2007 18:39:04 +0100 From: Ralf Baechle To: Atsushi Nemoto Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] Unify watch.S and remove arch/mips/lib-{32,64} Message-ID: <20070607173904.GA1893@linux-mips.org> References: <20070605.000239.31638706.anemo@mba.ocn.ne.jp> <20070604151048.GA30128@linux-mips.org> <20070605.012807.112854731.anemo@mba.ocn.ne.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070605.012807.112854731.anemo@mba.ocn.ne.jp> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15344 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Tue, Jun 05, 2007 at 01:28:07AM +0900, Atsushi Nemoto wrote: > OK, then this is an alternative patch to drop them. Wonderful, so arch/mips/lib-{32,64} is history now. Thanks! Ralf From ralf@linux-mips.org Thu Jun 7 18:52:48 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 18:52:50 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:27580 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20027213AbXFGRws (ORCPT ); Thu, 7 Jun 2007 18:52:48 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l57HlncP003262; Thu, 7 Jun 2007 18:47:49 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l57Hlndu003261; Thu, 7 Jun 2007 18:47:49 +0100 Date: Thu, 7 Jun 2007 18:47:49 +0100 From: Ralf Baechle To: "Maciej W. Rozycki" Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] No I/O ports on the DECstation Message-ID: <20070607174749.GB1893@linux-mips.org> References: <20070531121521.GE28936@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15345 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Thu, May 31, 2007 at 02:21:11PM +0100, Maciej W. Rozycki wrote: > > Stale patch? > > Not at all, it would seem. It applies just fine and is still required as > of 2.6.22-rc3. These CONFIG_HAS_IOMEM and CONFIG_HAS_IOPORT options are > pretty recent anyway -- there is little chance for anything about them to > get stale yet. Git is pickier than patch. Anything that will still be applied by patch with a fuzz will be rejected by git-apply. For good reason, I several times ended with a corrupt tree thanks to patch happily (miss-)applying some stale patch with fuzz. Heck, it hit akpm recently ... Anyway, this one was trivial and is in my queue tree now. Ralf From macro@linux-mips.org Thu Jun 7 19:02:14 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 19:02:16 +0100 (BST) Received: from pollux.ds.pg.gda.pl ([153.19.208.7]:42765 "EHLO pollux.ds.pg.gda.pl") by ftp.linux-mips.org with ESMTP id S20022694AbXFGSCO (ORCPT ); Thu, 7 Jun 2007 19:02:14 +0100 Received: from localhost (localhost [127.0.0.1]) by pollux.ds.pg.gda.pl (Postfix) with ESMTP id 73627E1D38; Thu, 7 Jun 2007 20:01:27 +0200 (CEST) X-Virus-Scanned: by amavisd-new at pollux.ds.pg.gda.pl Received: from pollux.ds.pg.gda.pl ([127.0.0.1]) by localhost (pollux.ds.pg.gda.pl [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Sg3-9mJPEz2Z; Thu, 7 Jun 2007 20:01:27 +0200 (CEST) Received: from piorun.ds.pg.gda.pl (piorun.ds.pg.gda.pl [153.19.208.8]) by pollux.ds.pg.gda.pl (Postfix) with ESMTP id 13386E1C6B; Thu, 7 Jun 2007 20:01:27 +0200 (CEST) Received: from blysk.ds.pg.gda.pl (macro@blysk.ds.pg.gda.pl [153.19.208.6]) by piorun.ds.pg.gda.pl (8.13.8/8.13.8) with ESMTP id l57I1fG4032689; Thu, 7 Jun 2007 20:01:41 +0200 Date: Thu, 7 Jun 2007 19:01:36 +0100 (BST) From: "Maciej W. Rozycki" To: Ralf Baechle cc: linux-mips@linux-mips.org Subject: Re: [PATCH] No I/O ports on the DECstation In-Reply-To: <20070607174749.GB1893@linux-mips.org> Message-ID: References: <20070531121521.GE28936@linux-mips.org> <20070607174749.GB1893@linux-mips.org> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Virus-Scanned: ClamAV 0.90.3/3376/Thu Jun 7 10:39:26 2007 on piorun.ds.pg.gda.pl X-Virus-Status: Clean Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15346 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@linux-mips.org Precedence: bulk X-list: linux-mips On Thu, 7 Jun 2007, Ralf Baechle wrote: > Git is pickier than patch. Anything that will still be applied by patch > with a fuzz will be rejected by git-apply. For good reason, I several > times ended with a corrupt tree thanks to patch happily (miss-)applying > some stale patch with fuzz. Heck, it hit akpm recently ... I see -- I'll regenerate patches if they are fuzzy then. Thanks. Maciej From ralf@linux-mips.org Thu Jun 7 19:11:03 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 19:11:06 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:29905 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20027233AbXFGSLD (ORCPT ); Thu, 7 Jun 2007 19:11:03 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l57I44vN005341; Thu, 7 Jun 2007 19:04:04 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l57I44eA005340; Thu, 7 Jun 2007 19:04:04 +0100 Date: Thu, 7 Jun 2007 19:04:04 +0100 From: Ralf Baechle To: "Maciej W. Rozycki" Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] DECstation: Optimised early printk() Message-ID: <20070607180404.GA3285@linux-mips.org> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15347 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Tue, Jun 05, 2007 at 11:45:07AM +0100, Maciej W. Rozycki wrote: > This is an optimised implementation of early printk() for the DECstation. > After the recent conversion to a MIPS-specific generic routine using a > character-by-character output the performance dropped significantly. > This change reverts to the previous speed -- even at 9600 bps of the > serial console the difference is visible with a naked eye; I presume for a > framebuffer it is even worse (it may depend on exactly which one is used > though). > > Additionally the change includes a fix for a problem that the old > implementation had -- the format used would not actually limit the length > of the string output. This new implementation uses a local buffer to deal > with it -- even with this additional copying it is much faster than the > generic function. > > Plus this driver is registered much earlier than the generic one, > allowing one to see critical messages, such as one about an incorrect CPU > setting used, that are produced beforehand. :-) Queued up for 2.6.23, too. > As a side note, the SYS_HAS_EARLY_PRINTK option could probably be called > SYS_HAS_GENERIC_EARLY_PRINTK or something... I take a patch to rename this :-) Ralf From ralf@linux-mips.org Thu Jun 7 19:23:27 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 07 Jun 2007 19:23:29 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:12212 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20027231AbXFGSX1 (ORCPT ); Thu, 7 Jun 2007 19:23:27 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l57IIRr5010954; Thu, 7 Jun 2007 19:18:27 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l57IIQVc010953; Thu, 7 Jun 2007 19:18:26 +0100 Date: Thu, 7 Jun 2007 19:18:26 +0100 From: Ralf Baechle To: Atsushi Nemoto Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] Fix IP27 build Message-ID: <20070607181826.GA5470@linux-mips.org> References: <20070601.234059.72707771.anemo@mba.ocn.ne.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070601.234059.72707771.anemo@mba.ocn.ne.jp> User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15348 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Fri, Jun 01, 2007 at 11:40:59PM +0900, Atsushi Nemoto wrote: > IP27 does not have ZONE_DMA now. Applied also. Thanks! Ralf From tiansm@lemote.com Fri Jun 8 05:49:13 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 08 Jun 2007 05:49:15 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:34711 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021588AbXFHEtN (ORCPT ); Fri, 8 Jun 2007 05:49:13 +0100 Received: (qmail 7540 invoked by uid 511); 8 Jun 2007 04:55:48 -0000 Received: from unknown (HELO ?192.168.2.233?) (192.168.2.233) by lemote.com with SMTP; 8 Jun 2007 04:55:48 -0000 Message-ID: <4668DF7A.6040807@lemote.com> Date: Fri, 08 Jun 2007 12:47:54 +0800 From: Tian User-Agent: Icedove 1.5.0.8 (X11/20061116) MIME-Version: 1.0 To: Ralf Baechle CC: Franck Bui-Huu , linux-mips@linux-mips.org, Fuxin Zhang Subject: Re: [PATCH] cheat for support of more than 256MB memory References: <11811049622818-git-send-email-tiansm@lemote.com> <11811049643791-git-send-email-tiansm@lemote.com> <20070606164018.GA30017@linux-mips.org> In-Reply-To: <20070606164018.GA30017@linux-mips.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15349 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips Ralf Baechle wrote: > On Wed, Jun 06, 2007 at 08:38:18AM +0200, Franck Bui-Huu wrote: > > >>> diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c >>> index 4975da0..62ef100 100644 >>> --- a/arch/mips/kernel/setup.c >>> +++ b/arch/mips/kernel/setup.c >>> @@ -509,6 +509,14 @@ static void __init resource_init(void) >>> res->end = end; >>> >>> res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; >>> +#if defined(CONFIG_LEMOTE_FULONG) && defined(CONFIG_64BIT) >>> + /* to keep memory continous, we tell system 0x10000000 - >>> 0x20000000 is reserved >>> + * for memory, in fact it is io region, don't occupy it >>> + * >>> + * SPARSEMEM? >>> >> Definetly yes ! It has been designed for such issue and it should save >> you some memory. >> > > A hole of 256MB size in the memory address map will cost 3.5MB with a 64-bit > kernel. The other reason why I don't like this patch is that it drags > platform specific code into the generic MIPS code. > > Ralf > > > we use 16k page，so it's cheaper than that:) Before I work out sparse memory solution, I think I can drop this patch and make some trivial fix of the first patch. Subject: [PATCH] simply ignore the memory hole Signed-off-by: Songmao Tian --- arch/mips/lemote/lm2e/setup.c | 1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/arch/mips/lemote/lm2e/setup.c b/arch/mips/lemote/lm2e/setup.c index 3030518..2498bbf 100644 --- a/arch/mips/lemote/lm2e/setup.c +++ b/arch/mips/lemote/lm2e/setup.c @@ -112,7 +112,6 @@ void __init plat_mem_setup(void) add_memory_region(0x0, (memsize << 20), BOOT_MEM_RAM); #ifdef CONFIG_64BIT if (highmemsize > 0) { - add_memory_region(0x10000000, 0x10000000, BOOT_MEM_RESERVED); add_memory_region(0x20000000, highmemsize << 20, BOOT_MEM_RAM); } #endif From domen.puncer@telargo.com Fri Jun 8 06:16:50 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 08 Jun 2007 06:16:52 +0100 (BST) Received: from out002.atlarge.net ([129.41.63.60]:37014 "EHLO out002.atlarge.net") by ftp.linux-mips.org with ESMTP id S20021638AbXFHFQu (ORCPT ); Fri, 8 Jun 2007 06:16:50 +0100 Received: from hpmailfe-01.atlarge.net ([10.100.60.156]) by out002.atlarge.net with Microsoft SMTPSVC(6.0.3790.1830); Fri, 8 Jun 2007 00:13:05 -0500 Received: from localhost ([213.250.36.225]) by hpmailfe-01.atlarge.net with Microsoft SMTPSVC(6.0.3790.1830); Fri, 8 Jun 2007 00:13:05 -0500 Date: Fri, 8 Jun 2007 07:16:41 +0200 From: Domen Puncer To: kernel coder Cc: linux-mips@linux-mips.org Subject: Re: tcp/ip stack question Message-ID: <20070608051641.GE23294@moe.telargo.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.12-2006-07-14 X-OriginalArrivalTime: 08 Jun 2007 05:13:05.0990 (UTC) FILETIME=[B2471660:01C7A98B] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15350 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: domen.puncer@telargo.com Precedence: bulk X-list: linux-mips On 07/06/07 05:50 -0700, kernel coder wrote: > hi, > I am recieveing the packet on eth1 and want to send it through eth2. Then you picked the wrong list, try netdev or netfilter one. Have you looked at bridging and/or netfilter, because provide similar functionality that you require. Domen From sar_van81@yahoo.co.in Fri Jun 8 08:27:22 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 08 Jun 2007 08:27:24 +0100 (BST) Received: from n10a.bullet.mail.re3.yahoo.com ([68.142.236.51]:58002 "HELO n10a.bullet.mail.re3.yahoo.com") by ftp.linux-mips.org with SMTP id S20021775AbXFHH1W (ORCPT ); Fri, 8 Jun 2007 08:27:22 +0100 Received: from [68.142.230.28] by n10.bullet.re3.yahoo.com with NNFMP; 08 Jun 2007 07:27:15 -0000 Received: from [66.196.101.133] by t1.bullet.re2.yahoo.com with NNFMP; 08 Jun 2007 07:27:15 -0000 Received: from [127.0.0.1] by rrr4.mail.re1.yahoo.com with NNFMP; 08 Jun 2007 07:27:15 -0000 X-Yahoo-Newman-Property: ymail-5 X-Yahoo-Newman-Id: 784046.4008.bm@rrr4.mail.re1.yahoo.com Received: (qmail 18938 invoked by uid 60001); 8 Jun 2007 05:20:25 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=s1024; d=yahoo.co.in; h=X-YMail-OSG:Received:Date:From:Subject:To:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-ID; b=KgGB2Jx/TIN9Av8dY0rlIHiqAfgUV3lxlE3t6wlFaucRLfYE6yYShw6VGM/Htzc3vtgfYCKJsbJ6e1DeGU3jq/yeJ9A0G+LA3jcA08Mknzw1vt0zw3uw1wUJoh3+JgIj1hiTOlEu7LN2NVLqyaRj7ptZuMdYdSzye/JOVuDZPZE=; X-YMail-OSG: LRWxqHMVM1ldtB7RKaWtRzLNQJxR3mQNUv2c9q.T Received: from [59.92.92.15] by web94312.mail.in2.yahoo.com via HTTP; Fri, 08 Jun 2007 06:20:25 BST Date: Fri, 8 Jun 2007 06:20:25 +0100 (BST) From: saravanan Subject: web browser support for MIPS DBAU1200 To: linux-mips@linux-mips.org MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="0-168749831-1181280025=:91989" Content-Transfer-Encoding: 8bit Message-ID: <308540.91989.qm@web94312.mail.in2.yahoo.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15351 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sar_van81@yahoo.co.in Precedence: bulk X-list: linux-mips --0-168749831-1181280025=:91989 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8bit hi, i need to port a web browser into AU1200.can anyone suggest me any browsers ? also if anyone has any docs regarding this can you send me ? thanks in advance, saravanan. --------------------------------- Did you know? You can CHAT without downloading messenger. Know how! --0-168749831-1181280025=:91989 Content-Type: text/html; charset=iso-8859-1 Content-Transfer-Encoding: 8bit hi,

i need to port a web browser into AU1200.can anyone suggest me any browsers ?

also if anyone has any docs regarding this can you send me  ?

thanks in advance,

saravanan.

Did you know? You can CHAT without downloading messenger. Know how! --0-168749831-1181280025=:91989-- From mano@roarinelk.homelinux.net Fri Jun 8 08:33:58 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 08 Jun 2007 08:34:00 +0100 (BST) Received: from fnoeppeil48.netpark.at ([217.175.205.176]:45067 "EHLO roarinelk.homelinux.net") by ftp.linux-mips.org with ESMTP id S20021758AbXFHHd6 (ORCPT ); Fri, 8 Jun 2007 08:33:58 +0100 Received: (qmail 8309 invoked from network); 8 Jun 2007 09:33:56 +0200 Received: from scarran.roarinelk.net (HELO ?192.168.0.242?) (192.168.0.242) by wormhole.roarinelk.net with SMTP; 8 Jun 2007 09:33:56 +0200 Message-ID: <4669063A.9030306@roarinelk.homelinux.net> Date: Fri, 08 Jun 2007 09:33:14 +0200 From: Manuel Lauss User-Agent: Thunderbird/1.0 Mnenhy/0.7 MIME-Version: 1.0 To: saravanan CC: linux-mips@linux-mips.org Subject: Re: web browser support for MIPS DBAU1200 References: <308540.91989.qm@web94312.mail.in2.yahoo.com> In-Reply-To: <308540.91989.qm@web94312.mail.in2.yahoo.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15352 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mano@roarinelk.homelinux.net Precedence: bulk X-list: linux-mips saravanan wrote: > i need to port a web browser into AU1200.can anyone suggest me any browsers ? you can start with w3m or lynx and if you have X running, "dillo" works really well. > also if anyone has any docs regarding this can you send me ? simply compile the apps/libs of your choice for mips32r1 arch. At least that's what I do and it has never failed me so far... Greetings, Manuel Lauss From tiansm@lemote.com Fri Jun 8 08:53:56 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 08 Jun 2007 08:53:58 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:22168 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021814AbXFHHx4 (ORCPT ); Fri, 8 Jun 2007 08:53:56 +0100 Received: (qmail 17551 invoked by uid 511); 8 Jun 2007 08:00:30 -0000 Received: from unknown (HELO ?192.168.2.233?) (192.168.2.233) by lemote.com with SMTP; 8 Jun 2007 08:00:30 -0000 Message-ID: <46690AC3.8000805@lemote.com> Date: Fri, 08 Jun 2007 15:52:35 +0800 From: Tian User-Agent: Icedove 1.5.0.8 (X11/20061116) MIME-Version: 1.0 To: Tian CC: Ralf Baechle , Franck Bui-Huu , linux-mips@linux-mips.org, Fuxin Zhang Subject: Re: [PATCH] cheat for support of more than 256MB memory References: <11811049622818-git-send-email-tiansm@lemote.com> <11811049643791-git-send-email-tiansm@lemote.com> <20070606164018.GA30017@linux-mips.org> <4668DF7A.6040807@lemote.com> In-Reply-To: <4668DF7A.6040807@lemote.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15353 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips Tian wrote: > Ralf Baechle wrote: >> On Wed, Jun 06, 2007 at 08:38:18AM +0200, Franck Bui-Huu wrote: >> >> >>>> diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c >>>> index 4975da0..62ef100 100644 >>>> --- a/arch/mips/kernel/setup.c >>>> +++ b/arch/mips/kernel/setup.c >>>> @@ -509,6 +509,14 @@ static void __init resource_init(void) >>>> res->end = end; >>>> >>>> res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; >>>> +#if defined(CONFIG_LEMOTE_FULONG) && defined(CONFIG_64BIT) >>>> + /* to keep memory continous, we tell system >>>> 0x10000000 - 0x20000000 is reserved >>>> + * for memory, in fact it is io region, don't >>>> occupy it >>>> + * >>>> + * SPARSEMEM? >>>> >>> Definetly yes ! It has been designed for such issue and it should save >>> you some memory. >>> >> >> A hole of 256MB size in the memory address map will cost 3.5MB with a >> 64-bit >> kernel. The other reason why I don't like this patch is that it drags >> platform specific code into the generic MIPS code. >> >> Ralf >> >> >> > we use 16k page，so it's cheaper than that:) > > Before I work out sparse memory solution, I think I can drop this > patch and make some trivial fix of the first patch. > > Subject: [PATCH] simply ignore the memory hole > > Signed-off-by: Songmao Tian > --- > arch/mips/lemote/lm2e/setup.c | 1 - > 1 files changed, 0 insertions(+), 1 deletions(-) > > diff --git a/arch/mips/lemote/lm2e/setup.c > b/arch/mips/lemote/lm2e/setup.c > index 3030518..2498bbf 100644 > --- a/arch/mips/lemote/lm2e/setup.c > +++ b/arch/mips/lemote/lm2e/setup.c > @@ -112,7 +112,6 @@ void __init plat_mem_setup(void) > add_memory_region(0x0, (memsize << 20), BOOT_MEM_RAM); > #ifdef CONFIG_64BIT > if (highmemsize > 0) { > - add_memory_region(0x10000000, 0x10000000, BOOT_MEM_RESERVED); > add_memory_region(0x20000000, highmemsize << 20, BOOT_MEM_RAM); > } > #endif > > > It seems it's no need to modify code, just config to use sparse memory will be ok, paging_init can handle the non-flat-memory situatioins, and i notify the pages drop down as expected. Subject: [PATCH] use SPARSEMEM to deal with the memory hole of peripheral IO Signed-off-by: Songmao Tian --- arch/mips/Kconfig | 1 + arch/mips/configs/fulong_defconfig | 13 +++++++------ 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 16f1861..376cbd6 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -957,6 +957,7 @@ config CPU_LOONGSON2 depends on SYS_HAS_CPU_LOONGSON2 select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL + select ARCH_SPARSEMEM_ENABLE select CPU_SUPPORTS_HIGHMEM config CPU_MIPS32_R1 diff --git a/arch/mips/configs/fulong_defconfig b/arch/mips/configs/fulong_defconfig index cd6563a..92d9772 100644 --- a/arch/mips/configs/fulong_defconfig +++ b/arch/mips/configs/fulong_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.22-rc3 -# Wed Jun 6 11:42:13 2007 +# Fri Jun 8 15:09:24 2007 # CONFIG_MIPS=y @@ -118,13 +118,14 @@ CONFIG_GENERIC_IRQ_PROBE=y CONFIG_CPU_SUPPORTS_HIGHMEM=y CONFIG_SYS_SUPPORTS_HIGHMEM=y CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y +# CONFIG_FLATMEM_MANUAL is not set # CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_SPARSEMEM_STATIC=y CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_RESOURCES_64BIT=y CONFIG_ZONE_DMA_FLAG=0 From tiansm@lemote.com Fri Jun 8 08:55:22 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 08 Jun 2007 08:55:24 +0100 (BST) Received: from [222.92.8.141] ([222.92.8.141]:23448 "HELO lemote.com") by ftp.linux-mips.org with SMTP id S20021807AbXFHHzW (ORCPT ); Fri, 8 Jun 2007 08:55:22 +0100 Received: (qmail 18573 invoked by uid 511); 8 Jun 2007 08:02:54 -0000 Received: from unknown (HELO ?192.168.2.233?) (192.168.2.233) by lemote.com with SMTP; 8 Jun 2007 08:02:54 -0000 Message-ID: <46690B52.8070600@lemote.com> Date: Fri, 08 Jun 2007 15:54:58 +0800 From: Tian User-Agent: Icedove 1.5.0.8 (X11/20061116) MIME-Version: 1.0 To: Tian CC: Ralf Baechle , Franck Bui-Huu , linux-mips@linux-mips.org, Fuxin Zhang Subject: Re: [PATCH] cheat for support of more than 256MB memory References: <11811049622818-git-send-email-tiansm@lemote.com> <11811049643791-git-send-email-tiansm@lemote.com> <20070606164018.GA30017@linux-mips.org> <4668DF7A.6040807@lemote.com> <46690AC3.8000805@lemote.com> In-Reply-To: <46690AC3.8000805@lemote.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15354 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tiansm@lemote.com Precedence: bulk X-list: linux-mips Tian wrote: > Tian wrote: >> Ralf Baechle wrote: >>> On Wed, Jun 06, 2007 at 08:38:18AM +0200, Franck Bui-Huu wrote: >>> >>> >>>>> diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c >>>>> index 4975da0..62ef100 100644 >>>>> --- a/arch/mips/kernel/setup.c >>>>> +++ b/arch/mips/kernel/setup.c >>>>> @@ -509,6 +509,14 @@ static void __init resource_init(void) >>>>> res->end = end; >>>>> >>>>> res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; >>>>> +#if defined(CONFIG_LEMOTE_FULONG) && defined(CONFIG_64BIT) >>>>> + /* to keep memory continous, we tell system >>>>> 0x10000000 - 0x20000000 is reserved >>>>> + * for memory, in fact it is io region, don't >>>>> occupy it >>>>> + * >>>>> + * SPARSEMEM? >>>>> >>>> Definetly yes ! It has been designed for such issue and it should save >>>> you some memory. >>>> >>> >>> A hole of 256MB size in the memory address map will cost 3.5MB with >>> a 64-bit >>> kernel. The other reason why I don't like this patch is that it drags >>> platform specific code into the generic MIPS code. >>> >>> Ralf >>> >>> >>> >> we use 16k page，so it's cheaper than that:) >> >> Before I work out sparse memory solution, I think I can drop this >> patch and make some trivial fix of the first patch. >> >> Subject: [PATCH] simply ignore the memory hole >> >> Signed-off-by: Songmao Tian >> --- >> arch/mips/lemote/lm2e/setup.c | 1 - >> 1 files changed, 0 insertions(+), 1 deletions(-) >> >> diff --git a/arch/mips/lemote/lm2e/setup.c >> b/arch/mips/lemote/lm2e/setup.c >> index 3030518..2498bbf 100644 >> --- a/arch/mips/lemote/lm2e/setup.c >> +++ b/arch/mips/lemote/lm2e/setup.c >> @@ -112,7 +112,6 @@ void __init plat_mem_setup(void) >> add_memory_region(0x0, (memsize << 20), BOOT_MEM_RAM); >> #ifdef CONFIG_64BIT >> if (highmemsize > 0) { >> - add_memory_region(0x10000000, 0x10000000, BOOT_MEM_RESERVED); >> add_memory_region(0x20000000, highmemsize << 20, BOOT_MEM_RAM); >> } >> #endif >> >> >> > It seems it's no need to modify code, just config to use > sparse memory will be ok, paging_init can handle the > non-flat-memory situatioins, and i notify the pages drop down as > expected. Well, I mean notice...forgive me, I don't speak english often:) > > > Subject: [PATCH] use SPARSEMEM to deal with the memory hole of > peripheral IO > > Signed-off-by: Songmao Tian > --- > arch/mips/Kconfig | 1 + > arch/mips/configs/fulong_defconfig | 13 +++++++------ > 2 files changed, 8 insertions(+), 6 deletions(-) > > diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig > index 16f1861..376cbd6 100644 > --- a/arch/mips/Kconfig > +++ b/arch/mips/Kconfig > @@ -957,6 +957,7 @@ config CPU_LOONGSON2 > depends on SYS_HAS_CPU_LOONGSON2 > select CPU_SUPPORTS_32BIT_KERNEL > select CPU_SUPPORTS_64BIT_KERNEL > + select ARCH_SPARSEMEM_ENABLE > select CPU_SUPPORTS_HIGHMEM > > config CPU_MIPS32_R1 > diff --git a/arch/mips/configs/fulong_defconfig > b/arch/mips/configs/fulong_defconfig > index cd6563a..92d9772 100644 > --- a/arch/mips/configs/fulong_defconfig > +++ b/arch/mips/configs/fulong_defconfig > @@ -1,7 +1,7 @@ > # > # Automatically generated make config: don't edit > # Linux kernel version: 2.6.22-rc3 > -# Wed Jun 6 11:42:13 2007 > +# Fri Jun 8 15:09:24 2007 > # > CONFIG_MIPS=y > > @@ -118,13 +118,14 @@ CONFIG_GENERIC_IRQ_PROBE=y > CONFIG_CPU_SUPPORTS_HIGHMEM=y > CONFIG_SYS_SUPPORTS_HIGHMEM=y > CONFIG_ARCH_FLATMEM_ENABLE=y > +CONFIG_ARCH_SPARSEMEM_ENABLE=y > CONFIG_SELECT_MEMORY_MODEL=y > -CONFIG_FLATMEM_MANUAL=y > +# CONFIG_FLATMEM_MANUAL is not set > # CONFIG_DISCONTIGMEM_MANUAL is not set > -# CONFIG_SPARSEMEM_MANUAL is not set > -CONFIG_FLATMEM=y > -CONFIG_FLAT_NODE_MEM_MAP=y > -# CONFIG_SPARSEMEM_STATIC is not set > +CONFIG_SPARSEMEM_MANUAL=y > +CONFIG_SPARSEMEM=y > +CONFIG_HAVE_MEMORY_PRESENT=y > +CONFIG_SPARSEMEM_STATIC=y > CONFIG_SPLIT_PTLOCK_CPUS=4 > CONFIG_RESOURCES_64BIT=y > CONFIG_ZONE_DMA_FLAG=0 > > From vagabon.xyz@gmail.com Fri Jun 8 09:29:45 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 08 Jun 2007 09:29:47 +0100 (BST) Received: from wr-out-0506.google.com ([64.233.184.233]:57276 "EHLO wr-out-0506.google.com") by ftp.linux-mips.org with ESMTP id S20021576AbXFHI3p (ORCPT ); Fri, 8 Jun 2007 09:29:45 +0100 Received: by wr-out-0506.google.com with SMTP id 69so613382wri for ; Fri, 08 Jun 2007 01:29:42 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=TgJUem85BINlU5uy5xmPww98hOQutQo1j7m9EbMrXcSQmKYYf+21xlcLX9hjvFrGHMWacHDcmSJyKhORyDEEXjikgiH7W4rwkfb3JMQA1EwtLVAFzNT8lACQvC9yslZRuvgvF8a93h4IsO6taVZ88zIhUgA4S5KC9lIXYHdMvIU= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=ahKRB+Ny55TSoXUqzAs4WEUn8rHQdK0AX671gZ1PMbYN6ZsDDIBMN7q1frFxXOa5GTm41DhmHNT52JYLMKLgnvSzV5hr3JxtoMMLQFmxo29NvZG1iCT+OqSmxZRjt9hXjEYrAecKKSSi8zUZoHijZpTg13QiiA+a8jVK375z0vA= Received: by 10.65.103.14 with SMTP id f14mr4696680qbm.1181291382134; Fri, 08 Jun 2007 01:29:42 -0700 (PDT) Received: by 10.65.204.8 with HTTP; Fri, 8 Jun 2007 01:29:42 -0700 (PDT) Message-ID: Date: Fri, 8 Jun 2007 10:29:42 +0200 From: "Franck Bui-Huu" To: "Ralf Baechle" Subject: Re: Tickless/dyntick kernel, highres timer and general time crapectomy Cc: "Sergei Shtylyov" , linux-mips@linux-mips.org In-Reply-To: <20070607154801.GG26047@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20070606185450.GA10511@linux-mips.org> <20070607113032.GA26047@linux-mips.org> <46680B75.5040809@ru.mvista.com> <20070607154801.GG26047@linux-mips.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15355 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips Hi Ralf, Ralf Baechle wrote: > On Thu, Jun 07, 2007 at 04:44:11PM +0200, Franck Bui-Huu wrote: > >>> No, it doesn't. Even on dyntick kernels, interrupts do happen several >>> times a second. Dynticks have nothing to do with disabling timer >>> interrupts... >>> >> That's true however if your system has 2 clock devices. One is the r4k-hpt >> and the other one soemthing else with a higher rating. If you don't stop >> r4k-hpt interrupts, how does it work ? > > To some degree this question is hypothetic because generally the cp0 > count/compare timer will be the highest rated counter. > Well it increments every other clock. So it's not impossible to have a an other higher rated counter. > But even if so, the basic solution is the same - just ignore the interrupt > whenever it happens to be triggered. Or if it isn't shared with an > active performance counter interrupt, you could even disable_irq() it. > OK, but the current code doesn't seem to support very well multiple clock event devices. For example the global_cd array is not updated if a new clock event device is registered. Even ll_timer_interrupt() handler should be renamed something like ll_hpt_interrupt() for example. Thanks, -- Franck From vagabon.xyz@gmail.com Fri Jun 8 10:08:26 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 08 Jun 2007 10:08:28 +0100 (BST) Received: from wx-out-0506.google.com ([66.249.82.224]:8329 "EHLO wx-out-0506.google.com") by ftp.linux-mips.org with ESMTP id S20021601AbXFHJIZ (ORCPT ); Fri, 8 Jun 2007 10:08:25 +0100 Received: by wx-out-0506.google.com with SMTP id s14so638911wxc for ; Fri, 08 Jun 2007 02:07:24 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=W0PlsBGnT+xG7hBwxPzsSJxM/FOLaVc/o5ObTrJ28JAtFAXqF9dT0yY8haLt5yhTwo2BQ48Zb6zoiA3UGd6ugYVHbYCEdofviuZIWWNRN+CFPedc4CbqJBk/gYvRdJtQXHxZVQFwfEdjp8fofL8dNMkpxsCOS2WdB/3KXAfftOU= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=uQz+ozmFdP/QX8lsm7zBWKy034kj/P+mte8HIl3cFA44k0Vhal8rfE/YsL7sOH62QGDKlhRjYYE0IIvM+XSxAPVGt3jei6fdPLxtZnCimh3uFmYPcuJWK73lnUk8yHUpZxX+jD28E+v3RAqI7g9oVX5C4ruLAK2kh+DZ864NU14= Received: by 10.65.163.8 with SMTP id q8mr4756046qbo.1181293643776; Fri, 08 Jun 2007 02:07:23 -0700 (PDT) Received: by 10.65.204.8 with HTTP; Fri, 8 Jun 2007 02:07:23 -0700 (PDT) Message-ID: Date: Fri, 8 Jun 2007 11:07:23 +0200 From: "Franck Bui-Huu" To: "Ralf Baechle" Subject: Re: Tickless/dyntick kernel, highres timer and general time crapectomy Cc: linux-mips@linux-mips.org In-Reply-To: <20070607151447.GF26047@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20070606185450.GA10511@linux-mips.org> <20070607113032.GA26047@linux-mips.org> <20070607151447.GF26047@linux-mips.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15356 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips On 6/7/07, Ralf Baechle wrote: > On Thu, Jun 07, 2007 at 03:11:48PM +0200, Franck Bui-Huu wrote: > > > Actually I'm wondering if we shouldn't create a new file > > "arch/mips/kernel/time2.c" which will be a complete rewrite of the > > old one (interrupt handler, function pointers, clocksource, > > clockevent). This file would be the future replacement of the old > > time.c. This new file would be used only if the board have been > > updated accordingly. That may help to migrate... > > And we'll still be stuck with the compat crap for years - no thank you. > One of the strength of Linux has always been that if necessary we've been > able to turn the code base upside down as needed - even if sometimes it > takes a snow plough to move old stuff out of the way ;-) > OK. > > >You can mask the count/compare interrupt in the status register like any > > >other interrupt. Keep in mind that on many CPUs this interrupt is > > >shared with the performance counter interrupt so cannot always be > > >disabled. > > > > Well this interrupt could be shared with other devices too, couldn't it ? > > If so only the board code can disable it. > > No, the boot mode bit controls a multiplexer so there is either count/compare > or the external interrupt. > The board I'm working on shares count/compare interrupt with others devices. Actually an external interrupt controller, which is a simple MUX, allows several devices to share the same irq line. To know which device generates an irq you need to probe this irq controller. So it seems to me that if the hardware designers decide to not reserve the highest irq line for the timer irq, you're in trouble... > > >There is no other disable bit for this interrupt than the IE bit in the > > >status register. So it may just have to be ignored. > > > > > > > That would mean we can't have a tickless system in these cases, wouldn't > > it ? > > It would simply mean we will receive a useless every 2^32 cycles - nothing > terrible. The tickless kernel isn't really tickless. It's more accurately > called dyntick. One thing that keeps us from completly getting rid of > regular timer interrupts under all circumstances is the current scheduler. > Only if a CPU is idle Linux can stop the regular timer interrupts for it. > With all the software interrupts that happen to be running on a usual > system we expect just a hand full of interrupts per second. And the good > news is that mingo's current scheduler work is going to remove the concept > of time slices from the scheduler and once that is done we _finally_ will > be able to go even on non-idle CPUs. > OK. thanks, -- Franck From ralf@linux-mips.org Fri Jun 8 10:49:00 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 08 Jun 2007 10:49:02 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:17327 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20021756AbXFHJtA (ORCPT ); Fri, 8 Jun 2007 10:49:00 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l589fsOV016453; Fri, 8 Jun 2007 10:41:55 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l589frD2016452; Fri, 8 Jun 2007 10:41:53 +0100 Date: Fri, 8 Jun 2007 10:41:53 +0100 From: Ralf Baechle To: Franck Bui-Huu Cc: Sergei Shtylyov , linux-mips@linux-mips.org Subject: Re: Tickless/dyntick kernel, highres timer and general time crapectomy Message-ID: <20070608094153.GA13686@linux-mips.org> References: <20070606185450.GA10511@linux-mips.org> <20070607113032.GA26047@linux-mips.org> <46680B75.5040809@ru.mvista.com> <20070607154801.GG26047@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15357 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Fri, Jun 08, 2007 at 10:29:42AM +0200, Franck Bui-Huu wrote: > Well it increments every other clock. So it's not impossible to have a > an other higher rated counter. In practice that's very rare. Otoh there are reasons why the cp0 counter might be unusable - clockscaling, no interrupt, CPU powered off. > >But even if so, the basic solution is the same - just ignore the interrupt > >whenever it happens to be triggered. Or if it isn't shared with an > >active performance counter interrupt, you could even disable_irq() it. > > OK, but the current code doesn't seem to support very well multiple > clock event devices. For example the global_cd array is not updated if > a new clock event device is registered. Even ll_timer_interrupt() > handler should be renamed something like ll_hpt_interrupt() for > example. global_cd is meant to only hold the pointers to all processors' count/compare clockevent devices, nothing else. So if another clockevent device should have a higher rating on a particular CPU the content of global_cd[] just doesn't matter. Ralf From ralf@linux-mips.org Fri Jun 8 11:04:36 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 08 Jun 2007 11:04:38 +0100 (BST) Received: from wf1.mips-uk.com ([194.74.144.154]:42644 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20021775AbXFHKEg (ORCPT ); Fri, 8 Jun 2007 11:04:36 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.14.1/8.13.8) with ESMTP id l589vYtG016723; Fri, 8 Jun 2007 10:57:34 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.14.1/8.14.1/Submit) id l589vYns016722; Fri, 8 Jun 2007 10:57:34 +0100 Date: Fri, 8 Jun 2007 10:57:34 +0100 From: Ralf Baechle To: Franck Bui-Huu Cc: linux-mips@linux-mips.org Subject: Re: Tickless/dyntick kernel, highres timer and general time crapectomy Message-ID: <20070608095734.GB13686@linux-mips.org> References: <20070606185450.GA10511@linux-mips.org> <20070607113032.GA26047@linux-mips.org> <20070607151447.GF26047@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.14 (2007-02-12) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15358 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Fri, Jun 08, 2007 at 11:07:23AM +0200, Franck Bui-Huu wrote: > devices. Actually an external interrupt controller, which is a simple > MUX, allows several devices to share the same irq line. To know which > device generates an irq you need to probe this irq controller. > > So it seems to me that if the hardware designers decide to not reserve > the highest irq line for the timer irq, you're in trouble... Yuck. That's a new configuration ... Thinking about a really bad one. If your processor is a MIPS R2 processor, fine. If it's older you can't reliably test for a timer interrupt pending other than by masking all performance counter interrupts, then testing if IE7 is still pending in the cause register. If of course that probe isn't reliable because there is another device you will have to do more guessing by trying to acknowledge the cp0 compare interrupt. If IE7 transitioned to 0, there was a timer interrupt pending if not there was an external interrupt pending and there there may or may not have been a compare interrupt have been pending. And if the external goes 1->0 at just that time you may believe you got a timer interrupt anyway. Things get slightly better if the external interrupt controller has a register where interrupt pending can be queried but it's still ... interesting. I guess the easy solution in such a case is to not use the compare interrupt in such a configuration and just ack it. Or go for an R2 processor. Ralf From anemo@mba.ocn.ne.jp Fri Jun 8 15:23:32 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 08 Jun 2007 15:23:34 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:42966 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20022057AbXFHOXc (ORCPT ); Fri, 8 Jun 2007 15:23:32 +0100 Received: from localhost (p7198-ipad25funabasi.chiba.ocn.ne.jp [220.104.85.198]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 071A0B6E4; Fri, 8 Jun 2007 23:22:12 +0900 (JST) Date: Fri, 08 Jun 2007 23:22:43 +0900 (JST) Message-Id: <20070608.232243.108308444.anemo@mba.ocn.ne.jp> To: ralf@linux-mips.org Cc: vagabon.xyz@gmail.com, sshtylyov@ru.mvista.com, linux-mips@linux-mips.org Subject: Re: Tickless/dyntick kernel, highres timer and general time crapectomy From: Atsushi Nemoto In-Reply-To: <20070607154801.GG26047@linux-mips.org> References: <46680B75.5040809@ru.mvista.com> <20070607154801.GG26047@linux-mips.org> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15359 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Thu, 7 Jun 2007 16:48:01 +0100, Ralf Baechle wrote: > But even if so, the basic solution is the same - just ignore the interrupt > whenever it happens to be triggered. Or if it isn't shared with an > active performance counter interrupt, you could even disable_irq() it. Using disable_irq() on the counter/compare interrupt might make the WAIT instruction really not wait on some chips. It is implementation dependent wheather an assertion of masked interrupt break the WAIT instruction or not. Busy looping in cpu_idle() would not preferred, but I'm not sure this is really a problem yet. Maybe I should have closer look at dyntick. --- Atsushi Nemoto From aurelien@aurel32.net Mon Jun 11 10:57:33 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 11 Jun 2007 10:57:36 +0100 (BST) Received: from farad.aurel32.net ([82.232.2.251]:20806 "EHLO mail.aurel32.net") by ftp.linux-mips.org with ESMTP id S20022583AbXFKJ5d (ORCPT ); Mon, 11 Jun 2007 10:57:33 +0100 Received: from anguille.univ-lyon1.fr ([134.214.4.207]) by mail.aurel32.net with esmtpsa (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.63) (envelope-from ) id 1HxgbK-00016L-FI for linux-mips@linux-mips.org; Mon, 11 Jun 2007 11:54:18 +0200 Message-ID: <466D1BBF.6030403@aurel32.net> Date: Mon, 11 Jun 2007 11:54:07 +0200 From: Aurelien Jarno User-Agent: IceDove 1.5.0.10 (X11/20070329) MIME-Version: 1.0 To: linux-mips@linux-mips.org Subject: MIPS 20Kc and WAIT instruction Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15360 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: aurelien@aurel32.net Precedence: bulk X-list: linux-mips Hi all, The latest kernels from kernel.org or linux-mips.org do not enter low power mode when the CPU is idle on a MIPS 20Kc CPU. Looking at the code in arch/mips/kernel/cpu-probe.c, the "case" corresponding to the 20Kc CPU is commented out: case CPU_5KC: /* case CPU_20KC:*/ case CPU_24K: According to the datasheet this CPU supports the WAIT instruction, so I don't really understand why it is disabled in the kernel. Does anybody know why? Thanks, Aurelien -- .''`. Aurelien Jarno | GPG: 1024D/F1BCDB73 : :' : Debian developer | Electrical Engineer `. `' aurel32@debian.org | aurelien@aurel32.net `- people.debian.org/~aurel32 | www.aurel32.net From tbm@cyrius.com Mon Jun 11 12:24:41 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 11 Jun 2007 12:24:43 +0100 (BST) Received: from sorrow.cyrius.com ([65.19.161.204]:33040 "EHLO sorrow.cyrius.com") by ftp.linux-mips.org with ESMTP id S20024007AbXFKLYl (ORCPT ); Mon, 11 Jun 2007 12:24:41 +0100 Received: by sorrow.cyrius.com (Postfix, from userid 10) id B2CD2D8D1; Mon, 11 Jun 2007 11:24:34 +0000 (UTC) Received: by deprecation.cyrius.com (Postfix, from userid 1000) id 62EC0544B2; Mon, 11 Jun 2007 13:17:08 +0200 (CEST) Date: Mon, 11 Jun 2007 13:17:08 +0200 From: Martin Michlmayr To: linux-mips@linux-mips.org Subject: Re: -stable branches usage Message-ID: <20070611111708.GA12814@deprecation.cyrius.com> References: <20070529130833.GA4334@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070529130833.GA4334@linux-mips.org> User-Agent: Mutt/1.5.13 (2006-08-11) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15361 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tbm@cyrius.com Precedence: bulk X-list: linux-mips * Ralf Baechle [2007-05-29 14:08]: > It's probably not a surprise when I'm saying that maintaining all > the -stable branches of 2.6.16..2.6.21 for MIPS is a major effort > and increasingly simply a huge pain in the ... you know where due > to the differences. So before I actually deciede when and which of > the branches I'm going to dump I would like to poll who actually > uses these -stable branches. For Debian, the 2.6.18 tree is useful since our stable kernel is based on that release. However, we can only put crucial fixes into a stable release, so I wouldn't expect much to show up on the 2.6.18 branch. -- Martin Michlmayr http://www.cyrius.com/ From vagabon.xyz@gmail.com Mon Jun 11 14:09:00 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 11 Jun 2007 14:09:04 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.170]:44704 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S20024012AbXFKNJA (ORCPT ); Mon, 11 Jun 2007 14:09:00 +0100 Received: by ug-out-1314.google.com with SMTP id m3so1568811ugc for ; Mon, 11 Jun 2007 06:08:59 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=W4+nFUhmEMuJbcQEZgbIPq1iH1+uUaDdBqDGWsY6h/TtYKS/j52wzAvkwnGedp4bNJT1pkukSO3JEYfK7WIy4Fcrj/W2ujSWHAqVr8JIq7dZUF/aQanvE361fym5EJ9vzTByX/Di5YgYSTVXecUyoANfRk8JacZwYMzAj3DHuic= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=SsZakm/z6DJwgOZbYOhtvrU7unVz/w2vxIqLxzu9kcz8hrRqhnyhZm1E+Qyg75EDuVNa4HU5t9Y+kW3W9Hb78JyvuNYGGglqeLNEqxrb/LeUOmcmGjMtZzMH4ZQr3j2jbcv6wGHaPuwEEH/ssxY7wcLnQMD0KiB4li8fqn4zn74= Received: by 10.82.126.5 with SMTP id y5mr10840158buc.1181567339164; Mon, 11 Jun 2007 06:08:59 -0700 (PDT) Received: from spoutnik.innova-card.com ( [81.252.61.1]) by mx.google.com with ESMTP id z34sm13865042ikz.2007.06.11.06.08.54 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 11 Jun 2007 06:08:54 -0700 (PDT) Received: by spoutnik.innova-card.com (Postfix, from userid 500) id 4F77323F770; Mon, 11 Jun 2007 15:08:56 +0200 (CEST) To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org Subject: [PATCH 2/3] Remove MIPS SEAD support Date: Mon, 11 Jun 2007 15:08:54 +0200 Message-Id: <11815673362011-git-send-email-fbuihuu@gmail.com> X-Mailer: git-send-email 1.5.2.1 In-Reply-To: <11815673353523-git-send-email-fbuihuu@gmail.com> References: <11815673353523-git-send-email-fbuihuu@gmail.com> From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15362 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips From: Franck Bui-Huu Mips Sead support is deprecated and scheduled for removal since September 2006. Signed-off-by: Franck Bui-Huu --- arch/mips/Kconfig | 19 - arch/mips/Makefile | 11 - arch/mips/configs/sead_defconfig | 651 ------------------------------- arch/mips/mips-boards/generic/console.c | 13 - arch/mips/mips-boards/generic/init.c | 5 +- arch/mips/mips-boards/generic/reset.c | 2 - arch/mips/mips-boards/generic/time.c | 11 +- arch/mips/mips-boards/sead/Makefile | 26 -- arch/mips/mips-boards/sead/sead_int.c | 117 ------ arch/mips/mips-boards/sead/sead_setup.