From ralf@linux-mips.org Tue May 1 13:03:59 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 01 May 2007 13:04:03 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:22696 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022751AbXEAMD7 (ORCPT ); Tue, 1 May 2007 13:03:59 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.13.8/8.13.8) with ESMTP id l41C3Ove008537; Tue, 1 May 2007 13:03:25 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.13.8/8.13.8/Submit) id l416VYUg005206; Tue, 1 May 2007 07:31:34 +0100 Date: Tue, 1 May 2007 07:31:34 +0100 From: Ralf Baechle To: Atsushi Nemoto Cc: linux-mips@linux-mips.org, netdev@vger.kernel.org, jeff@garzik.org, sshtylyov@ru.mvista.com, akpm@linux-foundation.org Subject: Re: [PATCH 4/5] ne: MIPS: Use platform_driver for ne on RBTX49XX Message-ID: <20070501063134.GA5183@linux-mips.org> References: <20070501.002758.15250764.anemo@mba.ocn.ne.jp> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070501.002758.15250764.anemo@mba.ocn.ne.jp> User-Agent: Mutt/1.4.2.2i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14957 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Tue, May 01, 2007 at 12:27:58AM +0900, Atsushi Nemoto wrote: > This patch lets RBTX49XX boards use generic platform_driver interface > for the ne driver. > > * Use platform_device to pass ioaddr and irq to the ne driver. > * Remove unnecessary ifdefs for RBTX49XX from the ne driver. > * Make the ne driver selectable on these boards regardless of CONFIG_ISA > > Signed-off-by: Atsushi Nemoto Acked-by: Ralf Baechle Ralf From ths@networkno.de Tue May 1 19:10:38 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 01 May 2007 19:10:40 +0100 (BST) Received: from phoenix.bawue.net ([193.7.176.60]:55529 "EHLO mail.bawue.net") by ftp.linux-mips.org with ESMTP id S20022839AbXEASKi (ORCPT ); Tue, 1 May 2007 19:10:38 +0100 Received: from lagash (intrt.mips-uk.com [194.74.144.130]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.bawue.net (Postfix) with ESMTP id 27EBEB937F; Tue, 1 May 2007 20:10:33 +0200 (CEST) Received: from ths by lagash with local (Exim 4.67) (envelope-from ) id 1Hiwor-0004LC-AF; Tue, 01 May 2007 19:11:21 +0100 Date: Tue, 1 May 2007 19:11:21 +0100 To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: [PATCH] Use do_div for a subtract loop Message-ID: <20070501181121.GC30083@networkno.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.13 (2006-08-11) From: Thiemo Seufer Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14958 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ths@networkno.de Precedence: bulk X-list: linux-mips Hello All, this patch switches the subtract loop in timespec_add_ns to use do_div. The latest GCC SVN version grew intelligent enough to optimize the loop to a division which calls libgcc's __udivdi3, which breaks kernel builds. Tested by building and booting a little endian qemu MIPS kernel. Thiemo Signed-off-by: Thiemo Seufer diff --git a/include/linux/time.h b/include/linux/time.h index 8ea8dea..e1a11d7 100644 --- a/include/linux/time.h +++ b/include/linux/time.h @@ -5,6 +5,7 @@ #ifdef __KERNEL__ # include +# include #endif #ifndef _STRUCT_TIMESPEC @@ -169,9 +170,10 @@ extern struct timeval ns_to_timeval(const s64 nsec); static inline void timespec_add_ns(struct timespec *a, u64 ns) { ns += a->tv_nsec; - while(unlikely(ns >= NSEC_PER_SEC)) { - ns -= NSEC_PER_SEC; - a->tv_sec++; + if(unlikely(ns >= NSEC_PER_SEC)) { + u64 tmp = ns; + ns = do_div(tmp, NSEC_PER_SEC); + a->tv_sec += tmp; } a->tv_nsec = ns; } From ths@networkno.de Tue May 1 19:14:03 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 01 May 2007 19:14:05 +0100 (BST) Received: from phoenix.bawue.net ([193.7.176.60]:22764 "EHLO mail.bawue.net") by ftp.linux-mips.org with ESMTP id S20022838AbXEASOD (ORCPT ); Tue, 1 May 2007 19:14:03 +0100 Received: from lagash (intrt.mips-uk.com [194.74.144.130]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.bawue.net (Postfix) with ESMTP id 7A86CB8C56; Tue, 1 May 2007 20:13:28 +0200 (CEST) Received: from ths by lagash with local (Exim 4.67) (envelope-from ) id 1Hiwrg-0004MI-Un; Tue, 01 May 2007 19:14:16 +0100 Date: Tue, 1 May 2007 19:14:16 +0100 To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: [PATCH] Add a __ucmpdi2 implementation Message-ID: <20070501181416.GD30083@networkno.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.13 (2006-08-11) From: Thiemo Seufer Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14959 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ths@networkno.de Precedence: bulk X-list: linux-mips Hello All, this patch adds a __ucmpdi2 implementation, recent GCC SVN versions generate calls to it from some of the FPU emulator functions. Tested by building and booting a little endian qemu MIPS kernel. Thiemo Signed-off-by: Thiemo Seufer diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile index d7d3b14..5dad13e 100644 --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile @@ -9,4 +9,4 @@ obj-y += iomap.o obj-$(CONFIG_PCI) += iomap-pci.o # libgcc-style stuff needed in the kernel -lib-y += ashldi3.o ashrdi3.o lshrdi3.o +lib-y += ashldi3.o ashrdi3.o lshrdi3.o ucmpdi2.o diff --git a/arch/mips/lib/ucmpdi2.c b/arch/mips/lib/ucmpdi2.c new file mode 100644 index 0000000..e9ff258 --- /dev/null +++ b/arch/mips/lib/ucmpdi2.c @@ -0,0 +1,19 @@ +#include + +#include "libgcc.h" + +word_type __ucmpdi2 (unsigned long a, unsigned long b) +{ + const DWunion au = {.ll = a}; + const DWunion bu = {.ll = b}; + + if ((unsigned int) au.s.high < (unsigned int) bu.s.high) + return 0; + else if ((unsigned int) au.s.high > (unsigned int) bu.s.high) + return 2; + if ((unsigned int) au.s.low < (unsigned int) bu.s.low) + return 0; + else if ((unsigned int) au.s.low > (unsigned int) bu.s.low) + return 2; + return 1; +} From ths@networkno.de Tue May 1 23:51:31 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 01 May 2007 23:51:33 +0100 (BST) Received: from phoenix.bawue.net ([193.7.176.60]:5046 "EHLO mail.bawue.net") by ftp.linux-mips.org with ESMTP id S20022872AbXEAWvb (ORCPT ); Tue, 1 May 2007 23:51:31 +0100 Received: from lagash (88-106-169-123.dynamic.dsl.as9105.com [88.106.169.123]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.bawue.net (Postfix) with ESMTP id E33AFB82C9 for ; Wed, 2 May 2007 00:51:25 +0200 (CEST) Received: from ths by lagash with local (Exim 4.67) (envelope-from ) id 1Hj1Cg-00039J-Iv for linux-mips@linux-mips.org; Tue, 01 May 2007 23:52:14 +0100 Date: Tue, 1 May 2007 23:52:14 +0100 To: linux-mips@linux-mips.org Subject: Some potential FPU emulator problem Message-ID: <20070501225214.GE30083@networkno.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.13 (2006-08-11) From: Thiemo Seufer Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14960 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ths@networkno.de Precedence: bulk X-list: linux-mips Hello All, I used the appended patch which enables the assert() in the FPU emulator. The result (running in qemu) is: [snip] Will now check root file system:fsck 1.40-WIP (14-Nov-2006) [/sbin/fsck.ext3 (1) -- /] fsck.ext3 -a -C0 /dev/hda1 /dev/hda1: clean, 21846/131072 files, 371295/524272 blocks . EXT3 FS on hda1, internal journal Setting the system clock.. System Clock set. Local time: Tue May 1 22:43:28 UTC 2007. Cleaning up ifupdown.... Loading device-mapper support. Will now check all file systems. fsck 1.40-WIP (14-Nov-2006) Checking all file systems. Done checking file systems. A log is being saved in /var/log/fsck/checkfs if that location is writable. Setting kernel variables...done. Will now mount local filesystems:. Will now activate swapfile swap:done. BUG: soft lockup detected on CPU#0! Call Trace: [<80016d98>] dump_stack+0x8/0x34 [<800594ac>] softlockup_tick+0x114/0x178 [<800405bc>] update_process_times+0x38/0x90 [<80016510>] timer_interrupt+0x120/0x150 [<80059b60>] handle_IRQ_event+0x6c/0xdc [<8005b650>] handle_level_irq+0xd4/0x17c [<80010b70>] plat_irq_dispatch+0xb0/0x150 [<80011200>] ret_from_irq+0x0/0x4 [<80249a28>] _spin_unlock_irqrestore+0x28/0x48 [<80042ed0>] force_sig_info+0xa4/0xf8 [<80017f1c>] do_tr+0xb4/0x134 [<800111e0>] ret_from_exception+0x0/0x20 [<80021dac>] ieee754sp_format+0x28/0x50c [<80027e14>] ieee754sp_fdp+0x94/0x3d0 [<80020194>] fpu_emulator_cop1Handler+0x1334/0x1b40 [<80017934>] do_cpu+0x344/0x380 [<800111e0>] ret_from_exception+0x0/0x20 Without this patch the same configuration boot fine. I don't know i f this just means one of the asserts is broken or if there is something wrong with the FPU emulation. Thiemo diff --git a/arch/mips/math-emu/ieee754dp.h b/arch/mips/math-emu/ieee754dp.h index a37370d..f777806 100644 --- a/arch/mips/math-emu/ieee754dp.h +++ b/arch/mips/math-emu/ieee754dp.h @@ -28,7 +28,7 @@ #include "ieee754int.h" -#define assert(expr) ((void)0) +#define assert(expr) BUG_ON(expr) /* 3bit extended double precision sticky right shift */ #define XDPSRS(v,rs) \ diff --git a/arch/mips/math-emu/ieee754sp.h b/arch/mips/math-emu/ieee754sp.h index ae82f51..68bd4c0 100644 --- a/arch/mips/math-emu/ieee754sp.h +++ b/arch/mips/math-emu/ieee754sp.h @@ -28,7 +28,7 @@ #include "ieee754int.h" -#define assert(expr) ((void)0) +#define assert(expr) BUG_ON(expr) /* 3bit extended single precision sticky right shift */ #define SPXSRSXn(rs) \ From anemo@mba.ocn.ne.jp Wed May 2 16:00:27 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 02 May 2007 16:00:29 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:11213 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20022991AbXEBPA1 (ORCPT ); Wed, 2 May 2007 16:00:27 +0100 Received: from localhost (p6152-ipad211funabasi.chiba.ocn.ne.jp [58.91.162.152]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 12F89A6BE; Thu, 3 May 2007 00:00:22 +0900 (JST) Date: Thu, 03 May 2007 00:00:27 +0900 (JST) Message-Id: <20070503.000027.25909441.anemo@mba.ocn.ne.jp> To: ths@networkno.de Cc: linux-mips@linux-mips.org Subject: Re: Some potential FPU emulator problem From: Atsushi Nemoto In-Reply-To: <20070501225214.GE30083@networkno.de> References: <20070501225214.GE30083@networkno.de> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14961 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Tue, 1 May 2007 23:52:14 +0100, Thiemo Seufer wrote: > [<80042ed0>] force_sig_info+0xa4/0xf8 > [<80017f1c>] do_tr+0xb4/0x134 > [<800111e0>] ret_from_exception+0x0/0x20 > [<80021dac>] ieee754sp_format+0x28/0x50c > [<80027e14>] ieee754sp_fdp+0x94/0x3d0 > [<80020194>] fpu_emulator_cop1Handler+0x1334/0x1b40 > [<80017934>] do_cpu+0x344/0x380 > [<800111e0>] ret_from_exception+0x0/0x20 Is this kernel contain commit ba755f8ec80fdbf2b5212622eabf7355464c6327 ? I suppose the fix might show you a little bit better result. > Without this patch the same configuration boot fine. I don't know i > f this just means one of the asserts is broken or if there is > something wrong with the FPU emulation. Perhaps the triggered assert() is the first one in ieee754sp_format(), but I do not know if it was a proper test... --- Atsushi Nemoto From vagabon.xyz@gmail.com Fri May 4 11:55:44 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 04 May 2007 11:55:47 +0100 (BST) Received: from mu-out-0910.google.com ([209.85.134.185]:52069 "EHLO mu-out-0910.google.com") by ftp.linux-mips.org with ESMTP id S20021957AbXEDKzo (ORCPT ); Fri, 4 May 2007 11:55:44 +0100 Received: by mu-out-0910.google.com with SMTP id w1so826293mue for ; Fri, 04 May 2007 03:55:43 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:reply-to:user-agent:mime-version:to:cc:subject:content-type:content-transfer-encoding:from; b=elSDFqR2Goe8FR09bC6K+DOFvO/jzF9KTNNSu+++GRePEJ/XgOCG+rhq7V67ZCmgmSI3hlbdYu3ovV/CO/MwX6FSBr8lbx7U49FnjaJBOmgIt5CrBs+VEomwreGJl4B2D8U7j4bIEWphJzr0HLWbrIsPXOd2wjqFEFAO30TpDCs= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:reply-to:user-agent:mime-version:to:cc:subject:content-type:content-transfer-encoding:from; b=tgYZv+iW72H37+47bwjY/gjzrXOA4E4kYfCrWUX/ZteEEs3eg+u1Zk1mo/UiBc7KkvjLsyUsVZj4BJFW+J3vjxa0WJG/omRlFnCWrqrD/maw1OQx35Q/Yg2KqXKvWBufIUOk8fx8jZRLsgbjMX6JUlt3GUpq3EIU9+QKeWgtYQQ= Received: by 10.82.184.2 with SMTP id h2mr6169759buf.1178276141988; Fri, 04 May 2007 03:55:41 -0700 (PDT) Received: from ?192.168.0.24? ( [81.252.61.1]) by mx.google.com with ESMTP id c24sm377310ika.2007.05.04.03.55.35; Fri, 04 May 2007 03:55:38 -0700 (PDT) Message-ID: <463B117F.1070009@innova-card.com> Date: Fri, 04 May 2007 12:57:03 +0200 Reply-To: Franck User-Agent: Thunderbird 1.5.0.4 (X11/20060614) MIME-Version: 1.0 To: Ralf Baechle CC: linux-mips Subject: [PATCH] Simplify pte_offset_{map,map_nested}() on 32 bits [try #2] Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14962 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips From: Franck Bui-Huu Since both kernel and process page tables are never allocated in highmem these 2 macros were doing unnecessary extra works for getting a pte from a pmd. This patch also clean up pte allocation functions by passing __GFP_ZERO to alloc_pages() and by removing a useless local variable. With this patch the size of the kernel is slighly reduced. Signed-off-by: Franck Bui-Huu --- Hi Ralf, Maybe I'm missing something but it seems that page tables are never allocated from highmem. Please correct me if I'm wrong. This patch boot fine on a 32-bits platform without highmem though. This patch does not include any modifications for 64-bits platforms since I can't test them but this assertion should be more true since there's no highmem on these platforms. I can make another patch for such platforms if you think it makes sense. Please consider, Franck include/asm-mips/pgalloc.h | 22 ++++++---------------- include/asm-mips/pgtable-32.h | 13 +++++-------- 2 files changed, 11 insertions(+), 24 deletions(-) diff --git a/include/asm-mips/pgalloc.h b/include/asm-mips/pgalloc.h index 5685d4f..a3b9953 100644 --- a/include/asm-mips/pgalloc.h +++ b/include/asm-mips/pgalloc.h @@ -62,26 +62,16 @@ static inline void pgd_free(pgd_t *pgd) free_pages((unsigned long)pgd, PGD_ORDER); } -static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, - unsigned long address) +static inline pte_t * +pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address) { - pte_t *pte; - - pte = (pte_t *) __get_free_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, PTE_ORDER); - - return pte; + return (pte_t *)__get_free_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, PTE_ORDER); } -static inline struct page *pte_alloc_one(struct mm_struct *mm, - unsigned long address) +static inline struct page * +pte_alloc_one(struct mm_struct *mm, unsigned long address) { - struct page *pte; - - pte = alloc_pages(GFP_KERNEL | __GFP_REPEAT, PTE_ORDER); - if (pte) - clear_highpage(pte); - - return pte; + return alloc_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, PTE_ORDER); } static inline void pte_free_kernel(pte_t *pte) diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h index 2fbd47e..9e0a8c7 100644 --- a/include/asm-mips/pgtable-32.h +++ b/include/asm-mips/pgtable-32.h @@ -143,6 +143,7 @@ pfn_pte(unsigned long pfn, pgprot_t prot) #define __pgd_offset(address) pgd_index(address) #define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) #define __pmd_offset(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) +#define __pte_offset(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1)) /* to find an entry in a kernel page-table-directory */ #define pgd_offset_k(address) pgd_offset(&init_mm, address) @@ -153,19 +154,15 @@ pfn_pte(unsigned long pfn, pgprot_t prot) #define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr)) /* Find an entry in the third-level page table.. */ -#define __pte_offset(address) \ - (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) #define pte_offset(dir, address) \ ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address)) #define pte_offset_kernel(dir, address) \ ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address)) -#define pte_offset_map(dir, address) \ - ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address)) -#define pte_offset_map_nested(dir, address) \ - ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address)) -#define pte_unmap(pte) ((void)(pte)) -#define pte_unmap_nested(pte) ((void)(pte)) +#define pte_offset_map(dir, address) pte_offset_kernel(dir,address) +#define pte_offset_map_nested(dir, address) pte_offset_kernel(dir,address) +#define pte_unmap(pte) ((void)(pte)) +#define pte_unmap_nested(pte) ((void)(pte)) #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) -- 1.5.1.3 From vagabon.xyz@gmail.com Fri May 4 16:35:16 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 04 May 2007 16:35:18 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.174]:30613 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S20022115AbXEDPfQ (ORCPT ); Fri, 4 May 2007 16:35:16 +0100 Received: by ug-out-1314.google.com with SMTP id 40so585612uga for ; Fri, 04 May 2007 08:35:15 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=LOqRDPmNQi9mHy6zNYfTEJ7bIDS5J8huiCcvlKdRyOsrrzq5ZemZwtqZJPN/e1JWYP8oaF8+73Z9zxGeRdUe9U6ZRSkXBR+HG6d5Umxv570Tzw0BGhMp+zJcLe3okZRzesZ5YfCj5dXnswRm7JTPyQo7zMevOiLelcPWyyblCfo= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=J/jIny91Ino2wqa3AfVP0RJeW9Fw198M+JFbdJq9gClVh16d9EoPKtR5WNaMB2oiRjLXDqgke42OQexgWJBj9ZavqHoLUtlHd1+MOqewsaj4bhuBCQtXQBtwkgl5u2MBi1wXc3fRdpCmOCXQF/yiBx78OKzTNkrofAo2DQLQg+g= Received: by 10.82.187.16 with SMTP id k16mr6791308buf.1178292915444; Fri, 04 May 2007 08:35:15 -0700 (PDT) Received: from spoutnik.innova-card.com ( [81.252.61.1]) by mx.google.com with ESMTP id c25sm94823ika.2007.05.04.08.35.12; Fri, 04 May 2007 08:35:13 -0700 (PDT) Received: by spoutnik.innova-card.com (Postfix, from userid 500) id BFA7023F773; Fri, 4 May 2007 17:36:46 +0200 (CEST) To: ralf@linux-mips.org, anemo@mba.ocn.ne.jp Cc: linux-mips@linux-mips.org Subject: [PATCH 3/3] time: implement read_persistent_clock() Date: Fri, 4 May 2007 17:36:46 +0200 Message-Id: <1178293006620-git-send-email-fbuihuu@gmail.com> X-Mailer: git-send-email 1.5.1.3 In-Reply-To: <11782930063123-git-send-email-fbuihuu@gmail.com> References: <1178293006633-git-send-email-fbuihuu@gmail.com> <11782930063123-git-send-email-fbuihuu@gmail.com> From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14963 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips From: Franck Bui-Huu This function is needed by timekeeping subsystem. This also removes the need to setup xtime. Signed-off-by: Franck Bui-Huu --- arch/mips/kernel/time.c | 11 +++++------ 1 files changed, 5 insertions(+), 6 deletions(-) diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index 5a4fd06..0d6efda 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c @@ -326,17 +326,16 @@ static void __init init_mips_clocksource(void) clocksource_register(&clocksource_mips); } +unsigned long read_persistent_clock(void) +{ + return rtc_mips_get_time(); +} + void __init time_init(void) { if (!rtc_mips_set_mmss) rtc_mips_set_mmss = rtc_mips_set_time; - xtime.tv_sec = rtc_mips_get_time(); - xtime.tv_nsec = 0; - - set_normalized_timespec(&wall_to_monotonic, - -xtime.tv_sec, -xtime.tv_nsec); - /* Choose appropriate high precision timer routines. */ if (!cpu_has_counter && !clocksource_mips.read) /* No high precision timer -- sorry. */ -- 1.5.1.3 From vagabon.xyz@gmail.com Fri May 4 16:35:38 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 04 May 2007 16:35:41 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.172]:54169 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S20022136AbXEDPfV (ORCPT ); Fri, 4 May 2007 16:35:21 +0100 Received: by ug-out-1314.google.com with SMTP id 40so585624uga for ; Fri, 04 May 2007 08:35:20 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=jXct1Nt4dPMyxV1iLyLJPHOVHuJRVbbmWyJtABDBFTVbmUydY8rt0gV0w5szQjnvna0notS8zUlKpXL6gkAFli+V/GJd2Ezsdp9tZM5gFLrmJgn9HbO9ew/WdMAMLrUU9BBPczzYvtePqnpxpBGj4MM3fnerzbp2Sfbt5nmil1M= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=X6TWkN7JGwMIE1PtVgfxP1agZeRSOVuEe7OntGhm4RSoWhE6EdckLra/BSv0HyAOYLw95qKtpZQ3aIbTcaA3Ukyf5ZCaQVa+tmOxtY2jtqnkbwLQhJF0SO3CbyF8NWNWfmxyoIttehbxWgqYJDN0Q433WRHSBIfNb5Z/2GPPaRw= Received: by 10.82.185.12 with SMTP id i12mr6712598buf.1178292920039; Fri, 04 May 2007 08:35:20 -0700 (PDT) Received: from spoutnik.innova-card.com ( [81.252.61.1]) by mx.google.com with ESMTP id z34sm102534ikz.2007.05.04.08.35.16; Fri, 04 May 2007 08:35:18 -0700 (PDT) Received: by spoutnik.innova-card.com (Postfix, from userid 500) id 99BD323F772; Fri, 4 May 2007 17:36:46 +0200 (CEST) To: ralf@linux-mips.org, anemo@mba.ocn.ne.jp Cc: linux-mips@linux-mips.org Subject: [PATCH 2/3] time: replace board_time_init() by plat_clk_setup() Date: Fri, 4 May 2007 17:36:45 +0200 Message-Id: <11782930063123-git-send-email-fbuihuu@gmail.com> X-Mailer: git-send-email 1.5.1.3 In-Reply-To: <1178293006633-git-send-email-fbuihuu@gmail.com> References: <1178293006633-git-send-email-fbuihuu@gmail.com> From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14964 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips From: Franck Bui-Huu This patch introduces plat_clk_setup() which is a hook that platforms can implement to setup clock and mips_hpt_frequency. This was done by board_time_init function pointer previously. There are 3 reasons why we should prefer plat_clk_setup() over board_time_init: 1/ There's no need for platforms to initialize a function pointer anymore. 2/ board_time_init was previously initialized in plat_mem_setup() which is normally used to setup platform's *memories*. 3/ plat_clk_setup() is called earlier in boot process. Therefore others subsystems can get the time during their initialisation, timekeeping subsystem is an example. Signed-off-by: Franck Bui-Huu --- arch/mips/au1000/common/setup.c | 2 -- arch/mips/au1000/common/time.c | 4 ---- arch/mips/basler/excite/excite_setup.c | 5 +---- arch/mips/ddb5xxx/ddb5477/setup.c | 4 +--- arch/mips/dec/setup.c | 3 --- arch/mips/dec/time.c | 2 +- arch/mips/emma2rh/markeins/setup.c | 4 +--- arch/mips/gt64120/wrppmc/setup.c | 4 ---- arch/mips/gt64120/wrppmc/time.c | 2 +- arch/mips/jmr3927/rbhma3100/setup.c | 4 +--- arch/mips/kernel/setup.c | 13 +++++++++++++ arch/mips/kernel/time.c | 16 +++------------- arch/mips/lasat/setup.c | 4 +--- arch/mips/mips-boards/atlas/atlas_setup.c | 2 -- arch/mips/mips-boards/generic/time.c | 2 +- arch/mips/mips-boards/malta/malta_setup.c | 2 -- arch/mips/mips-boards/sead/sead_setup.c | 4 ---- arch/mips/mips-boards/sim/sim_setup.c | 2 -- arch/mips/mips-boards/sim/sim_time.c | 2 +- arch/mips/momentum/jaguar_atx/setup.c | 6 +----- arch/mips/momentum/ocelot_3/setup.c | 5 +---- arch/mips/momentum/ocelot_c/setup.c | 8 ++------ arch/mips/momentum/ocelot_g/gt-irq.c | 2 +- arch/mips/momentum/ocelot_g/setup.c | 3 --- arch/mips/philips/pnx8550/common/setup.c | 3 --- arch/mips/philips/pnx8550/common/time.c | 5 ++--- arch/mips/pmc-sierra/yosemite/setup.c | 4 ++-- arch/mips/sgi-ip22/ip22-time.c | 4 +--- arch/mips/sgi-ip27/ip27-init.c | 3 --- arch/mips/sgi-ip27/ip27-timer.c | 2 +- arch/mips/sgi-ip32/ip32-setup.c | 4 +--- arch/mips/sibyte/swarm/setup.c | 3 +-- arch/mips/sni/pcimt.c | 1 - arch/mips/sni/pcit.c | 1 - arch/mips/sni/rm200.c | 1 - arch/mips/sni/time.c | 2 +- arch/mips/tx4927/common/tx4927_setup.c | 5 +---- arch/mips/tx4938/common/setup.c | 4 +--- arch/mips/vr41xx/common/init.c | 8 +------- include/asm-mips/sni.h | 3 --- 40 files changed, 42 insertions(+), 116 deletions(-) diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c index 13fe187..646d7aa 100644 --- a/arch/mips/au1000/common/setup.c +++ b/arch/mips/au1000/common/setup.c @@ -50,7 +50,6 @@ extern void au1000_halt(void); extern void au1000_power_off(void); extern void au1x_time_init(void); extern void au1x_timer_setup(struct irqaction *irq); -extern void au1xxx_time_init(void); extern void set_cpuspec(void); void __init plat_mem_setup(void) @@ -121,7 +120,6 @@ void __init plat_mem_setup(void) _machine_restart = au1000_restart; _machine_halt = au1000_halt; pm_power_off = au1000_power_off; - board_time_init = au1xxx_time_init; /* IO/MEM resources. */ set_io_port_base(0); diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c index fa1c62f..b32bf46 100644 --- a/arch/mips/au1000/common/time.c +++ b/arch/mips/au1000/common/time.c @@ -358,7 +358,3 @@ void __init plat_timer_setup(struct irqaction *irq) #endif } - -void __init au1xxx_time_init(void) -{ -} diff --git a/arch/mips/basler/excite/excite_setup.c b/arch/mips/basler/excite/excite_setup.c index 2f0e4c0..a337e0d 100644 --- a/arch/mips/basler/excite/excite_setup.c +++ b/arch/mips/basler/excite/excite_setup.c @@ -67,7 +67,7 @@ DEFINE_SPINLOCK(titan_lock); int titan_irqflags; -static void excite_timer_init(void) +void __init plat_clk_setup(void) { const u32 modebit5 = ocd_readl(0x00e4); unsigned int @@ -260,9 +260,6 @@ void __init plat_mem_setup(void) /* Announce RAM to system */ add_memory_region(0x00000000, memsize, BOOT_MEM_RAM); - /* Set up timer initialization hooks */ - board_time_init = excite_timer_init; - /* Set up the peripheral address map */ *(boot_ocd_base + (LKB9 / sizeof (u32))) = 0; *(boot_ocd_base + (LKB10 / sizeof (u32))) = 0; diff --git a/arch/mips/ddb5xxx/ddb5477/setup.c b/arch/mips/ddb5xxx/ddb5477/setup.c index f0cc0e8..94aebbb 100644 --- a/arch/mips/ddb5xxx/ddb5477/setup.c +++ b/arch/mips/ddb5xxx/ddb5477/setup.c @@ -121,7 +121,7 @@ static unsigned int __init detect_bus_frequency(unsigned long rtc_base) return freq; } -static void __init ddb_time_init(void) +void __init plat_clk_setup(void) { unsigned long rtc_base; unsigned int i; @@ -176,8 +176,6 @@ void __init plat_mem_setup(void) set_io_port_base(KSEG1ADDR(DDB_PCI_IO_BASE)); - board_time_init = ddb_time_init; - _machine_restart = ddb_machine_restart; _machine_halt = ddb_machine_halt; pm_power_off = ddb_machine_power_off; diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c index b8a5e75..25b879b 100644 --- a/arch/mips/dec/setup.c +++ b/arch/mips/dec/setup.c @@ -146,12 +146,9 @@ static void __init dec_be_init(void) } -extern void dec_time_init(void); - void __init plat_mem_setup(void) { board_be_init = dec_be_init; - board_time_init = dec_time_init; wbflush_setup(); diff --git a/arch/mips/dec/time.c b/arch/mips/dec/time.c index 8b7e0c1..47d11a2 100644 --- a/arch/mips/dec/time.c +++ b/arch/mips/dec/time.c @@ -161,7 +161,7 @@ static cycle_t dec_ioasic_hpt_read(void) } -void __init dec_time_init(void) +void __init plat_clk_setup(void) { rtc_mips_get_time = dec_rtc_get_time; rtc_mips_set_mmss = dec_rtc_set_mmss; diff --git a/arch/mips/emma2rh/markeins/setup.c b/arch/mips/emma2rh/markeins/setup.c index b29a447..2cd8c28 100644 --- a/arch/mips/emma2rh/markeins/setup.c +++ b/arch/mips/emma2rh/markeins/setup.c @@ -88,7 +88,7 @@ static unsigned int __init detect_bus_frequency(unsigned long rtc_base) return clock[reg]; } -static void __init emma2rh_time_init(void) +void __init plat_clk_setup(void) { u32 reg; if (bus_frequency == 0) @@ -148,8 +148,6 @@ void __init plat_mem_setup(void) set_io_port_base(KSEG1ADDR(EMMA2RH_PCI_IO_BASE)); - board_time_init = emma2rh_time_init; - _machine_restart = markeins_machine_restart; _machine_halt = markeins_machine_halt; pm_power_off = markeins_machine_power_off; diff --git a/arch/mips/gt64120/wrppmc/setup.c b/arch/mips/gt64120/wrppmc/setup.c index 121188d..46abb59 100644 --- a/arch/mips/gt64120/wrppmc/setup.c +++ b/arch/mips/gt64120/wrppmc/setup.c @@ -125,7 +125,6 @@ static void wrppmc_setup_serial(void) void __init plat_mem_setup(void) { - extern void wrppmc_time_init(void); extern void wrppmc_machine_restart(char *command); extern void wrppmc_machine_halt(void); extern void wrppmc_machine_power_off(void); @@ -134,9 +133,6 @@ void __init plat_mem_setup(void) _machine_halt = wrppmc_machine_halt; pm_power_off = wrppmc_machine_power_off; - /* Use MIPS Count/Compare Timer */ - board_time_init = wrppmc_time_init; - /* This makes the operations of 'in/out[bwl]' to the * physical address ( < KSEG0) can work via KSEG1 */ diff --git a/arch/mips/gt64120/wrppmc/time.c b/arch/mips/gt64120/wrppmc/time.c index 5b44085..dbb8fae 100644 --- a/arch/mips/gt64120/wrppmc/time.c +++ b/arch/mips/gt64120/wrppmc/time.c @@ -38,7 +38,7 @@ void __init plat_timer_setup(struct irqaction *irq) * NOTE: We disable all GT64120 timers, and use MIPS processor internal * timer as the source of kernel clock tick. */ -void __init wrppmc_time_init(void) +void __init plat_clk_setup(void) { /* Disable GT64120 timers */ GT_WRITE(GT_TC_CONTROL_OFS, 0x00); diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c index 8303001..8c4a988 100644 --- a/arch/mips/jmr3927/rbhma3100/setup.c +++ b/arch/mips/jmr3927/rbhma3100/setup.c @@ -109,7 +109,7 @@ static void jmr3927_timer_ack(void) jmr3927_tmrptr->tisr = 0; /* ack interrupt */ } -static void __init jmr3927_time_init(void) +void __init plat_clk_setup(void) { clocksource_mips.read = jmr3927_hpt_read; mips_timer_ack = jmr3927_timer_ack; @@ -141,8 +141,6 @@ void __init plat_mem_setup(void) set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO); - board_time_init = jmr3927_time_init; - _machine_restart = jmr3927_machine_restart; _machine_halt = jmr3927_machine_halt; pm_power_off = jmr3927_machine_power_off; diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 4975da0..6cdd596 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -521,6 +521,18 @@ static void __init resource_init(void) } } +/* + * plat_clk_setup() -- optional + * + * a) set up RTC routines, + * b) calibrate and set the mips_hpt_frequency (only needed if + * you intended to use cpu counter as timer interrupt source) + */ +void __init __weak plat_clk_setup(void) +{ + return; +} + void __init setup_arch(char **cmdline_p) { cpu_probe(); @@ -549,6 +561,7 @@ void __init setup_arch(char **cmdline_p) #ifdef CONFIG_SMP plat_smp_setup(); #endif + plat_clk_setup(); } static int __init fpu_disable(char *s) diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index 751b4a1..5a4fd06 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c @@ -239,21 +239,14 @@ asmlinkage void ll_local_timer_interrupt(int irq) /* * time_init() - it does the following things. * - * 1) board_time_init() - - * a) (optional) set up RTC routines, - * b) (optional) calibrate and set the mips_hpt_frequency - * (only needed if you intended to use cpu counter as timer interrupt - * source) - * 2) setup xtime based on rtc_mips_get_time(). - * 3) calculate a couple of cached variables for later usage - * 4) plat_timer_setup() - + * 1) setup xtime based on rtc_mips_get_time(). + * 2) calculate a couple of cached variables for later usage + * 3) plat_timer_setup() - * a) (optional) over-write any choices made above by time_init(). * b) machine specific code should setup the timer irqaction. * c) enable the timer interrupt */ -void (*board_time_init)(void); - unsigned int mips_hpt_frequency; static struct irqaction timer_irqaction = { @@ -335,9 +328,6 @@ static void __init init_mips_clocksource(void) void __init time_init(void) { - if (board_time_init) - board_time_init(); - if (!rtc_mips_set_mmss) rtc_mips_set_mmss = rtc_mips_set_time; diff --git a/arch/mips/lasat/setup.c b/arch/mips/lasat/setup.c index 488007f..1b3221c 100644 --- a/arch/mips/lasat/setup.c +++ b/arch/mips/lasat/setup.c @@ -109,7 +109,7 @@ static struct notifier_block lasat_panic_block[] = { lasat_panic_prom_monitor, NULL, INT_MIN } }; -static void lasat_time_init(void) +void __init plat_clk_setup(void) { mips_hpt_frequency = lasat_board_info.li_cpu_hz / 2; } @@ -164,8 +164,6 @@ void __init plat_mem_setup(void) lasat_reboot_setup(); - board_time_init = lasat_time_init; - #ifdef CONFIG_DS1603 ds1603 = &ds_defs[mips_machtype]; rtc_mips_get_time = ds1603_read; diff --git a/arch/mips/mips-boards/atlas/atlas_setup.c b/arch/mips/mips-boards/atlas/atlas_setup.c index 0c6b0ce..cc4057e 100644 --- a/arch/mips/mips-boards/atlas/atlas_setup.c +++ b/arch/mips/mips-boards/atlas/atlas_setup.c @@ -34,7 +34,6 @@ #include extern void mips_reboot_setup(void); -extern void mips_time_init(void); extern unsigned long mips_rtc_get_time(void); #ifdef CONFIG_KGDB @@ -61,7 +60,6 @@ void __init plat_mem_setup(void) #endif mips_reboot_setup(); - board_time_init = mips_time_init; rtc_mips_get_time = mips_rtc_get_time; } diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c index df2a2bd..d24ffe9 100644 --- a/arch/mips/mips-boards/generic/time.c +++ b/arch/mips/mips-boards/generic/time.c @@ -249,7 +249,7 @@ unsigned long __init mips_rtc_get_time(void) return mc146818_get_cmos_time(); } -void __init mips_time_init(void) +void __init plat_clk_setup(void) { unsigned int est_freq; diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mips-boards/malta/malta_setup.c index 7873932..2602131 100644 --- a/arch/mips/mips-boards/malta/malta_setup.c +++ b/arch/mips/mips-boards/malta/malta_setup.c @@ -36,7 +36,6 @@ #endif extern void mips_reboot_setup(void); -extern void mips_time_init(void); extern unsigned long mips_rtc_get_time(void); #ifdef CONFIG_KGDB @@ -182,6 +181,5 @@ void __init plat_mem_setup(void) #endif mips_reboot_setup(); - board_time_init = mips_time_init; rtc_mips_get_time = mips_rtc_get_time; } diff --git a/arch/mips/mips-boards/sead/sead_setup.c b/arch/mips/mips-boards/sead/sead_setup.c index a189dec..ad52e14 100644 --- a/arch/mips/mips-boards/sead/sead_setup.c +++ b/arch/mips/mips-boards/sead/sead_setup.c @@ -34,8 +34,6 @@ #include extern void mips_reboot_setup(void); -extern void mips_time_init(void); - static void __init serial_init(void); const char *get_system_type(void) @@ -49,8 +47,6 @@ void __init plat_mem_setup(void) serial_init (); - board_time_init = mips_time_init; - mips_reboot_setup(); } diff --git a/arch/mips/mips-boards/sim/sim_setup.c b/arch/mips/mips-boards/sim/sim_setup.c index b705f09..58c427a 100644 --- a/arch/mips/mips-boards/sim/sim_setup.c +++ b/arch/mips/mips-boards/sim/sim_setup.c @@ -36,7 +36,6 @@ #include -extern void sim_time_init(void); static void __init serial_init(void); unsigned int _isbonito = 0; @@ -54,7 +53,6 @@ void __init plat_mem_setup(void) serial_init(); - board_time_init = sim_time_init; pr_info("Linux started...\n"); #ifdef CONFIG_MIPS_MT_SMP diff --git a/arch/mips/mips-boards/sim/sim_time.c b/arch/mips/mips-boards/sim/sim_time.c index d3a21c7..2dcda66 100644 --- a/arch/mips/mips-boards/sim/sim_time.c +++ b/arch/mips/mips-boards/sim/sim_time.c @@ -146,7 +146,7 @@ static unsigned int __init estimate_cpu_frequency(void) return count; } -void __init sim_time_init(void) +void __init plat_clk_setup(void) { unsigned int est_freq, flags; diff --git a/arch/mips/momentum/jaguar_atx/setup.c b/arch/mips/momentum/jaguar_atx/setup.c index 5a51014..14ed3f5 100644 --- a/arch/mips/momentum/jaguar_atx/setup.c +++ b/arch/mips/momentum/jaguar_atx/setup.c @@ -75,8 +75,6 @@ extern void momenco_jaguar_restart(char *command); extern void momenco_jaguar_halt(void); extern void momenco_jaguar_power_off(void); -void momenco_time_init(void); - static char reset_reason; static inline unsigned long ENTRYLO(unsigned long paddr) @@ -220,7 +218,7 @@ void __init plat_timer_setup(struct irqaction *irq) * Ugly but the least of all evils. TLB initialization did flush the TLB so * We need to setup mappings again before we can touch the RTC. */ -void momenco_time_init(void) +void __init plat_clk_setup(void) { wire_stupidity_into_tlb(); @@ -360,8 +358,6 @@ void __init plat_mem_setup(void) { unsigned int tmpword; - board_time_init = momenco_time_init; - _machine_restart = momenco_jaguar_restart; _machine_halt = momenco_jaguar_halt; pm_power_off = momenco_jaguar_power_off; diff --git a/arch/mips/momentum/ocelot_3/setup.c b/arch/mips/momentum/ocelot_3/setup.c index ff0829f..7191dc4 100644 --- a/arch/mips/momentum/ocelot_3/setup.c +++ b/arch/mips/momentum/ocelot_3/setup.c @@ -98,7 +98,6 @@ extern void momenco_ocelot_restart(char *command); extern void momenco_ocelot_halt(void); extern void momenco_ocelot_power_off(void); -void momenco_time_init(void); static char reset_reason; void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, @@ -201,7 +200,7 @@ void __init plat_timer_setup(struct irqaction *irq) setup_irq(7, irq); /* Timer interrupt, unmask status IM7 */ } -void momenco_time_init(void) +void __init plat_clk_setup(void) { setup_wired_tlb_entries(); @@ -315,8 +314,6 @@ void __init plat_mem_setup(void) { unsigned int tmpword; - board_time_init = momenco_time_init; - _machine_restart = momenco_ocelot_restart; _machine_halt = momenco_ocelot_halt; pm_power_off = momenco_ocelot_power_off; diff --git a/arch/mips/momentum/ocelot_c/setup.c b/arch/mips/momentum/ocelot_c/setup.c index 0b6b233..8e083c8 100644 --- a/arch/mips/momentum/ocelot_c/setup.c +++ b/arch/mips/momentum/ocelot_c/setup.c @@ -76,8 +76,6 @@ extern void momenco_ocelot_restart(char *command); extern void momenco_ocelot_halt(void); extern void momenco_ocelot_power_off(void); -void momenco_time_init(void); - static char reset_reason; void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, unsigned long entryhi, unsigned long pagemask); @@ -210,7 +208,7 @@ void __init plat_timer_setup(struct irqaction *irq) setup_irq(7, irq); } -void momenco_time_init(void) +void __init plat_clk_setup(void) { #ifdef CONFIG_CPU_SR71000 mips_hpt_frequency = cpu_clock; @@ -219,7 +217,7 @@ void momenco_time_init(void) #else #error Unknown CPU for this board #endif - printk("momenco_time_init cpu_clock=%d\n", cpu_clock); + printk("%s cpu_clock=%d\n", __FUNCTION__, cpu_clock); rtc_mips_get_time = m48t37y_get_time; rtc_mips_set_time = m48t37y_set_time; @@ -229,8 +227,6 @@ void __init plat_mem_setup(void) { unsigned int tmpword; - board_time_init = momenco_time_init; - _machine_restart = momenco_ocelot_restart; _machine_halt = momenco_ocelot_halt; pm_power_off = momenco_ocelot_power_off; diff --git a/arch/mips/momentum/ocelot_g/gt-irq.c b/arch/mips/momentum/ocelot_g/gt-irq.c index e5576bd..8b06f4f 100644 --- a/arch/mips/momentum/ocelot_g/gt-irq.c +++ b/arch/mips/momentum/ocelot_g/gt-irq.c @@ -156,7 +156,7 @@ static irqreturn_t gt64240_p0int_irq(int irq, void *dev) * that is passed in as *irq (=irq0 in ../kernel/time.c). * We will do our own timer interrupt handling. */ -void gt64240_time_init(void) +void plat_clk_setup(void) { static struct irqaction timer; diff --git a/arch/mips/momentum/ocelot_g/setup.c b/arch/mips/momentum/ocelot_g/setup.c index 9db638a..b0513cc 100644 --- a/arch/mips/momentum/ocelot_g/setup.c +++ b/arch/mips/momentum/ocelot_g/setup.c @@ -75,7 +75,6 @@ extern void momenco_ocelot_restart(char *command); extern void momenco_ocelot_halt(void); extern void momenco_ocelot_power_off(void); -extern void gt64240_time_init(void); extern void momenco_ocelot_irq_setup(void); static char reset_reason; @@ -170,8 +169,6 @@ void __init plat_mem_setup(void) void (*l3func)(unsigned long) = (void *) KSEG1ADDR(setup_l3cache); unsigned int tmpword; - board_time_init = gt64240_time_init; - _machine_restart = momenco_ocelot_restart; _machine_halt = momenco_ocelot_halt; pm_power_off = momenco_ocelot_power_off; diff --git a/arch/mips/philips/pnx8550/common/setup.c b/arch/mips/philips/pnx8550/common/setup.c index 5bd7374..2ce298f 100644 --- a/arch/mips/philips/pnx8550/common/setup.c +++ b/arch/mips/philips/pnx8550/common/setup.c @@ -47,7 +47,6 @@ extern void pnx8550_machine_halt(void); extern void pnx8550_machine_power_off(void); extern struct resource ioport_resource; extern struct resource iomem_resource; -extern void pnx8550_time_init(void); extern void rs_kgdb_hook(int tty_no); extern char *prom_getcmdline(void); @@ -104,8 +103,6 @@ void __init plat_mem_setup(void) _machine_halt = pnx8550_machine_halt; pm_power_off = pnx8550_machine_power_off; - board_time_init = pnx8550_time_init; - /* Clear the Global 2 Register, PCI Inta Output Enable Registers Bit 1:Enable DAC Powerdown -> 0:DACs are enabled and are working normally diff --git a/arch/mips/philips/pnx8550/common/time.c b/arch/mips/philips/pnx8550/common/time.c index 68def38..0e1ae35 100644 --- a/arch/mips/philips/pnx8550/common/time.c +++ b/arch/mips/philips/pnx8550/common/time.c @@ -46,16 +46,15 @@ static void timer_ack(void) } /* - * pnx8550_time_init() - it does the following things: + * plat_clk_setup() - it does the following things: * - * 1) board_time_init() - * a) (optional) set up RTC routines, * b) (optional) calibrate and set the mips_hpt_frequency * (only needed if you intended to use cpu counter as timer interrupt * source) */ -void pnx8550_time_init(void) +void __init plat_clk_setup(void) { unsigned int n; unsigned int m; diff --git a/arch/mips/pmc-sierra/yosemite/setup.c b/arch/mips/pmc-sierra/yosemite/setup.c index 6a6e15e..ceae27c 100644 --- a/arch/mips/pmc-sierra/yosemite/setup.c +++ b/arch/mips/pmc-sierra/yosemite/setup.c @@ -137,8 +137,9 @@ void __init plat_timer_setup(struct irqaction *irq) setup_irq(7, irq); } -void yosemite_time_init(void) +void __init plat_clk_setup(void) { + /* FIXME: what's this code is doing ? */ mips_hpt_frequency = cpu_clock / 2; mips_hpt_frequency = 33000000 * 3 * 5; } @@ -220,7 +221,6 @@ static void __init py_late_time_init(void) void __init plat_mem_setup(void) { - board_time_init = yosemite_time_init; late_time_init = py_late_time_init; /* Add memory regions */ diff --git a/arch/mips/sgi-ip22/ip22-time.c b/arch/mips/sgi-ip22/ip22-time.c index 8e88a44..202fe80 100644 --- a/arch/mips/sgi-ip22/ip22-time.c +++ b/arch/mips/sgi-ip22/ip22-time.c @@ -128,7 +128,7 @@ static unsigned long dosample(void) /* * Here we need to calibrate the cycle counter to at least be close. */ -static __init void indy_time_init(void) +void __init plat_clk_setup(void) { unsigned long r4k_ticks[3]; unsigned long r4k_tick; @@ -213,6 +213,4 @@ void __init ip22_time_init(void) /* setup hookup functions */ rtc_mips_get_time = indy_rtc_get_time; rtc_mips_set_time = indy_rtc_set_time; - - board_time_init = indy_time_init; } diff --git a/arch/mips/sgi-ip27/ip27-init.c b/arch/mips/sgi-ip27/ip27-init.c index 74158d3..8427231 100644 --- a/arch/mips/sgi-ip27/ip27-init.c +++ b/arch/mips/sgi-ip27/ip27-init.c @@ -191,7 +191,6 @@ static inline void ioc3_eth_init(void) ioc3->eier = 0; } -extern void ip27_time_init(void); extern void ip27_reboot_setup(void); void __init plat_mem_setup(void) @@ -238,6 +237,4 @@ void __init plat_mem_setup(void) per_cpu_init(); set_io_port_base(IO_BASE); - - board_time_init = ip27_time_init; } diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c index 8c3c78c..d7740c4 100644 --- a/arch/mips/sgi-ip27/ip27-timer.c +++ b/arch/mips/sgi-ip27/ip27-timer.c @@ -223,7 +223,7 @@ static cycle_t ip27_hpt_read(void) return REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT); } -void __init ip27_time_init(void) +void __init plat_clk_setup(void) { clocksource_mips.read = ip27_hpt_read; mips_hpt_frequency = CYCLES_PER_SEC; diff --git a/arch/mips/sgi-ip32/ip32-setup.c b/arch/mips/sgi-ip32/ip32-setup.c index 57708fe..0910b84 100644 --- a/arch/mips/sgi-ip32/ip32-setup.c +++ b/arch/mips/sgi-ip32/ip32-setup.c @@ -71,7 +71,7 @@ static inline void str2eaddr(unsigned char *ea, unsigned char *str) /* An arbitrary time; this can be decreased if reliability looks good */ #define WAIT_MS 10 -void __init ip32_time_init(void) +void __init plat_clk_setup(void) { printk(KERN_INFO "Calibrating system timer... "); write_c0_count(0); @@ -94,8 +94,6 @@ void __init plat_mem_setup(void) rtc_mips_get_time = mc146818_get_cmos_time; rtc_mips_set_mmss = mc146818_set_rtc_mmss; - board_time_init = ip32_time_init; - #ifdef CONFIG_SERIAL_8250 { static struct uart_port o2_serial[2]; diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c index 83572d8..93f8d14 100644 --- a/arch/mips/sibyte/swarm/setup.c +++ b/arch/mips/sibyte/swarm/setup.c @@ -69,7 +69,7 @@ const char *get_system_type(void) return "SiByte " SIBYTE_BOARD_NAME; } -void __init swarm_time_init(void) +void __init plat_clk_setup(void) { #if defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X) /* Setup HPT */ @@ -116,7 +116,6 @@ void __init plat_mem_setup(void) panic_timeout = 5; /* For debug. */ - board_time_init = swarm_time_init; board_be_handler = swarm_be_handler; if (xicor_probe()) { diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c index 9ee208d..ba04719 100644 --- a/arch/mips/sni/pcimt.c +++ b/arch/mips/sni/pcimt.c @@ -280,7 +280,6 @@ void sni_pcimt_init(void) sni_pcimt_sc_init(); rtc_mips_get_time = mc146818_get_cmos_time; rtc_mips_set_time = mc146818_set_rtc_mmss; - board_time_init = sni_cpu_time_init; ioport_resource.end = sni_io_resource.end; #ifdef CONFIG_PCI PCIBIOS_MIN_IO = 0x9000; diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c index 00d151f..4d722ae 100644 --- a/arch/mips/sni/pcit.c +++ b/arch/mips/sni/pcit.c @@ -247,7 +247,6 @@ void sni_pcit_init(void) { rtc_mips_get_time = mc146818_get_cmos_time; rtc_mips_set_time = mc146818_set_rtc_mmss; - board_time_init = sni_cpu_time_init; ioport_resource.end = sni_io_resource.end; #ifdef CONFIG_PCI PCIBIOS_MIN_IO = 0x9000; diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c index b82ff12..2421441 100644 --- a/arch/mips/sni/rm200.c +++ b/arch/mips/sni/rm200.c @@ -182,5 +182,4 @@ void sni_rm200_init(void) ioport_resource.end += 0x02000000; ds1216_base = (volatile unsigned char *) SNI_DS1216_RM200_BASE; rtc_mips_get_time = ds1216_get_cmos_time; - board_time_init = sni_cpu_time_init; } diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c index 20028fc..85b4986 100644 --- a/arch/mips/sni/time.c +++ b/arch/mips/sni/time.c @@ -71,7 +71,7 @@ static __init unsigned long dosample(void) /* * Here we need to calibrate the cycle counter to at least be close. */ -__init void sni_cpu_time_init(void) +void __init plat_clk_setup(void) { unsigned long r4k_ticks[3]; unsigned long r4k_tick; diff --git a/arch/mips/tx4927/common/tx4927_setup.c b/arch/mips/tx4927/common/tx4927_setup.c index c8e49fe..60f594c 100644 --- a/arch/mips/tx4927/common/tx4927_setup.c +++ b/arch/mips/tx4927/common/tx4927_setup.c @@ -49,14 +49,11 @@ #undef DEBUG -void __init tx4927_time_init(void); void dump_cp0(char *key); void __init plat_mem_setup(void) { - board_time_init = tx4927_time_init; - #ifdef CONFIG_TOSHIBA_RBTX4927 { extern void toshiba_rbtx4927_setup(void); @@ -65,7 +62,7 @@ void __init plat_mem_setup(void) #endif } -void __init tx4927_time_init(void) +void __init plat_clk_setup(void) { #ifdef CONFIG_TOSHIBA_RBTX4927 diff --git a/arch/mips/tx4938/common/setup.c b/arch/mips/tx4938/common/setup.c index 142abf4..e7f2dfc 100644 --- a/arch/mips/tx4938/common/setup.c +++ b/arch/mips/tx4938/common/setup.c @@ -37,18 +37,16 @@ extern void toshiba_rbtx4938_setup(void); extern void rbtx4938_time_init(void); void __init tx4938_setup(void); -void __init tx4938_time_init(void); void dump_cp0(char *key); void __init plat_mem_setup(void) { - board_time_init = tx4938_time_init; toshiba_rbtx4938_setup(); } void __init -tx4938_time_init(void) +plat_clk_setup(void) { rbtx4938_time_init(); } diff --git a/arch/mips/vr41xx/common/init.c b/arch/mips/vr41xx/common/init.c index 4f97e0b..14ac696 100644 --- a/arch/mips/vr41xx/common/init.c +++ b/arch/mips/vr41xx/common/init.c @@ -36,7 +36,7 @@ static void __init iomem_resource_init(void) iomem_resource.end = IO_MEM_RESOURCE_END; } -static void __init setup_timer_frequency(void) +void __init plat_clk_setup(void) { unsigned long tclock; @@ -53,16 +53,10 @@ void __init plat_timer_setup(struct irqaction *irq) setup_irq(TIMER_IRQ, irq); } -static void __init timer_init(void) -{ - board_time_init = setup_timer_frequency; -} - void __init plat_mem_setup(void) { vr41xx_calculate_clock_frequency(); - timer_init(); iomem_resource_init(); } diff --git a/include/asm-mips/sni.h b/include/asm-mips/sni.h index f257509..5667797 100644 --- a/include/asm-mips/sni.h +++ b/include/asm-mips/sni.h @@ -209,9 +209,6 @@ extern void sni_pcit_cplus_irq_init (void); extern void sni_rm200_irq_init (void); extern void sni_pcimt_irq_init (void); -/* timer inits */ -extern void sni_cpu_time_init(void); - /* common irq stuff */ extern void (*sni_hwint)(void); extern struct irqaction sni_isa_irq; -- 1.5.1.3 From vagabon.xyz@gmail.com Fri May 4 16:36:22 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 04 May 2007 16:36:23 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.174]:43674 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S20022135AbXEDPgW (ORCPT ); Fri, 4 May 2007 16:36:22 +0100 Received: by ug-out-1314.google.com with SMTP id 40so585614uga for ; Fri, 04 May 2007 08:35:16 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:received:to:cc:subject:date:message-id:x-mailer:from; b=c+OqXXqjikgZbmhYCXb5vFf6/QV1ldL0zAXokz+7A9YcU1zA9uujCeskm2YzTXoZXgBfls22B9udk+eOGS17ihWbI1vgv48lNC2VmrqDRz5gIacV6Z1aqi3tECda3qnfFNfK/BYIE/ug7uEyUHzLhlD+6V73jTk/u89ArGBBzYE= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:to:cc:subject:date:message-id:x-mailer:from; b=kI9p8vj36AjKwUJ0Ax7ywHXrgADxazPPgKl3YPdmaNYvClQxn/BwL8ntHiHlA8571NpB1PCmtySz2GgwWnl4D5TVGJ9b2TLXxFaEtQRGoOcspzDmhTfIvUzTHu/TsF40exwh5ADoqaMkgV0crZwpGl0biIqg8nWPjraevJz9kX8= Received: by 10.82.145.7 with SMTP id s7mr6745753bud.1178292916323; Fri, 04 May 2007 08:35:16 -0700 (PDT) Received: from spoutnik.innova-card.com ( [81.252.61.1]) by mx.google.com with ESMTP id y37sm149313iky.2007.05.04.08.35.13; Fri, 04 May 2007 08:35:15 -0700 (PDT) Received: by spoutnik.innova-card.com (Postfix, from userid 500) id 6D82323F76E; Fri, 4 May 2007 17:36:46 +0200 (CEST) To: ralf@linux-mips.org, anemo@mba.ocn.ne.jp Cc: linux-mips@linux-mips.org Subject: [PATCH 1/3] clocksource: use CLOCKSOURCE_MASK() macro Date: Fri, 4 May 2007 17:36:44 +0200 Message-Id: <1178293006633-git-send-email-fbuihuu@gmail.com> X-Mailer: git-send-email 1.5.1.3 From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14965 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips From: Franck Bui-Huu Signed-off-by: Franck Bui-Huu --- arch/mips/kernel/time.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index e5e56bd..751b4a1 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c @@ -306,7 +306,7 @@ static unsigned int __init calibrate_hpt(void) struct clocksource clocksource_mips = { .name = "MIPS", - .mask = 0xffffffff, + .mask = CLOCKSOURCE_MASK(32), .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; -- 1.5.1.3 From anemo@mba.ocn.ne.jp Sat May 5 17:03:26 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 05 May 2007 17:03:31 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:49143 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20022578AbXEEQD0 (ORCPT ); Sat, 5 May 2007 17:03:26 +0100 Received: from localhost (p1094-ipad26funabasi.chiba.ocn.ne.jp [220.104.87.94]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id CA0BFA104; Sun, 6 May 2007 01:03:05 +0900 (JST) Date: Sun, 06 May 2007 01:03:13 +0900 (JST) Message-Id: <20070506.010313.41199101.anemo@mba.ocn.ne.jp> To: vagabon.xyz@gmail.com Cc: ralf@linux-mips.org, linux-mips@linux-mips.org Subject: Re: [PATCH 2/3] time: replace board_time_init() by plat_clk_setup() From: Atsushi Nemoto In-Reply-To: <11782930063123-git-send-email-fbuihuu@gmail.com> References: <1178293006633-git-send-email-fbuihuu@gmail.com> <11782930063123-git-send-email-fbuihuu@gmail.com> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14966 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Fri, 4 May 2007 17:36:45 +0200, Franck Bui-Huu wrote: > This patch introduces plat_clk_setup() which is a hook that platforms > can implement to setup clock and mips_hpt_frequency. > > This was done by board_time_init function pointer previously. > > There are 3 reasons why we should prefer plat_clk_setup() over > board_time_init: > > 1/ There's no need for platforms to initialize a function > pointer anymore. > > 2/ board_time_init was previously initialized in plat_mem_setup() > which is normally used to setup platform's *memories*. > > 3/ plat_clk_setup() is called earlier in boot process. Therefore > others subsystems can get the time during their initialisation, > timekeeping subsystem is an example. Though providing plat_clk_setup() for timekeeping code might be a good idea, I think your patch break at least those two platforms: MOMENCO_JAGUAR_ATX: momenco_time_init() assumes tlb_init() was already called. (wire_stupidity_into_tlb() calls local_flush_tlb_all()) MOMENCO_OCELOT_G: gt64240_time_init() assumes IRQ subsystem are already initialized. How about keeping board_time_init pointer as is and adding plat_clk_setup only for simple platforms? --- Atsushi Nemoto From anemo@mba.ocn.ne.jp Sat May 5 17:17:56 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 05 May 2007 17:17:58 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:216 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20022580AbXEEQR4 (ORCPT ); Sat, 5 May 2007 17:17:56 +0100 Received: from localhost (p1094-ipad26funabasi.chiba.ocn.ne.jp [220.104.87.94]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 25266969E; Sun, 6 May 2007 01:16:28 +0900 (JST) Date: Sun, 06 May 2007 01:16:36 +0900 (JST) Message-Id: <20070506.011636.92588372.anemo@mba.ocn.ne.jp> To: vagabon.xyz@gmail.com Cc: ralf@linux-mips.org, linux-mips@linux-mips.org Subject: Re: [PATCH 2/3] time: replace board_time_init() by plat_clk_setup() From: Atsushi Nemoto In-Reply-To: <11782930063123-git-send-email-fbuihuu@gmail.com> References: <1178293006633-git-send-email-fbuihuu@gmail.com> <11782930063123-git-send-email-fbuihuu@gmail.com> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14967 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Fri, 4 May 2007 17:36:45 +0200, Franck Bui-Huu wrote: > --- a/arch/mips/kernel/time.c > +++ b/arch/mips/kernel/time.c > @@ -239,21 +239,14 @@ asmlinkage void ll_local_timer_interrupt(int irq) > /* > * time_init() - it does the following things. > * > - * 1) board_time_init() - > - * a) (optional) set up RTC routines, > - * b) (optional) calibrate and set the mips_hpt_frequency > - * (only needed if you intended to use cpu counter as timer interrupt > - * source) > - * 2) setup xtime based on rtc_mips_get_time(). > - * 3) calculate a couple of cached variables for later usage > - * 4) plat_timer_setup() - > + * 1) setup xtime based on rtc_mips_get_time(). > + * 2) calculate a couple of cached variables for later usage > + * 3) plat_timer_setup() - > * a) (optional) over-write any choices made above by time_init(). > * b) machine specific code should setup the timer irqaction. > * c) enable the timer interrupt > */ > > -void (*board_time_init)(void); > - > unsigned int mips_hpt_frequency; > > static struct irqaction timer_irqaction = { As I wrote in another mail I think we can not remove board_time_init for now, but if you really removed it please update Documentation/mips/time.README too. --- Atsushi Nemoto From vagabon.xyz@gmail.com Mon May 7 09:51:23 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 07 May 2007 09:51:27 +0100 (BST) Received: from nz-out-0506.google.com ([64.233.162.234]:43769 "EHLO nz-out-0506.google.com") by ftp.linux-mips.org with ESMTP id S20021969AbXEGIvX (ORCPT ); Mon, 7 May 2007 09:51:23 +0100 Received: by nz-out-0506.google.com with SMTP id x7so1593998nzc for ; Mon, 07 May 2007 01:50:22 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=Y++pxD+tD/TDeG6S0D/Lle5UsC/I74lqP3nZnUDKuf7qNCyCsh+0ITIDfUTqP+5KBLXZZ6lBQWDzpNIDenVPEYNUCLT9IlnJIderkpi/khah+QNZvrkkDhKmR79s+xtbz2ktaxqgsZW34ArbM1oolsenRp04qCSdgHmnxAzxgts= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=pGlGtz/GnMNjZcBfKt7Dc9VgzV5tXilILdISt8Q9qJIkKshXuCyHqQ2/DEGG9WGgbdn3SG3mUizwwmPux0WSfn0yzqjXsjvMGQN8fS154mep13qLAEyuI2LJUMk47Svw47hQTr9DwZB+k2DjglYGLI9ibA4U6AvgEsb5C8Yf2OU= Received: by 10.114.136.1 with SMTP id j1mr2055588wad.1178527820528; Mon, 07 May 2007 01:50:20 -0700 (PDT) Received: by 10.115.94.16 with HTTP; Mon, 7 May 2007 01:50:20 -0700 (PDT) Message-ID: Date: Mon, 7 May 2007 10:50:20 +0200 From: "Franck Bui-Huu" To: "Atsushi Nemoto" Subject: Re: [PATCH 2/3] time: replace board_time_init() by plat_clk_setup() Cc: ralf@linux-mips.org, linux-mips@linux-mips.org In-Reply-To: <20070506.010313.41199101.anemo@mba.ocn.ne.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <1178293006633-git-send-email-fbuihuu@gmail.com> <11782930063123-git-send-email-fbuihuu@gmail.com> <20070506.010313.41199101.anemo@mba.ocn.ne.jp> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14968 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips Hi Atsushi, On 5/5/07, Atsushi Nemoto wrote: > > Though providing plat_clk_setup() for timekeeping code might be a good > idea, I think your patch break at least those two platforms: > > MOMENCO_JAGUAR_ATX: momenco_time_init() assumes tlb_init() was already > called. (wire_stupidity_into_tlb() calls local_flush_tlb_all()) > Ok, but in this case it seems a bad use of time init hook: the platform seems to use its time init hook to setup the tlb. That sounds pretty hackish, isn't it ? If so, doesn't it mean that we should give the opportunity to platform's code to modify the tlb mapping properly ? Actually I had the same problem with mapped kernels and the only way to solve it was to hack tlb_init()... BTW, do you know why wire_stupidity_into_tlb() is called twice: one time in plat_mem_setup() and a second time in momenco_time_init() ? Note for the former case, tlb_init() hasn't been called yet... > MOMENCO_OCELOT_G: gt64240_time_init() assumes IRQ subsystem are > already initialized. > heh ? why not using plat_timer_setup() hook in this case ? > How about keeping board_time_init pointer as is and adding > plat_clk_setup only for simple platforms? > Not sure that would force us to duplicate all timekeeping stuff in time_init() hook because of several hacks. If this is really true, let's try to clean up some code. Thanks -- Franck From vagabon.xyz@gmail.com Mon May 7 09:52:18 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 07 May 2007 09:52:20 +0100 (BST) Received: from wr-out-0506.google.com ([64.233.184.232]:35554 "EHLO wr-out-0506.google.com") by ftp.linux-mips.org with ESMTP id S20021969AbXEGIwS (ORCPT ); Mon, 7 May 2007 09:52:18 +0100 Received: by wr-out-0506.google.com with SMTP id q50so1540760wrq for ; Mon, 07 May 2007 01:51:17 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=Sy1WoHd9aDWCLegy0Pqr3py11INU6Gyt9vFDNme8Mjvow2ULdrc0hoM/GFnNMUa6ugJTB8TWUnjv5dsGqPdHFd2/mhXORPkuGO0hNpf49aKwGngFRYWpLMudpDfdJThfXyscvgtRlCygFTf6YK7PQ97TClSteuLixL5ibVRZxNo= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=eBAYlLdDiggmi1R1C5GrQPOXxF+OFQLJz82dwCJOrtXiYSIr14+3gqy02+dOL1TYb8EobF7d0PcPTJa8QZRF7Z8iBNVDlJj4mGTt8CFKrv96ZqurYBqUHQMu6sZmnyRlhIh2wE68Ay0Fp78nvwqMH1jxstXlOmwMqhy8Ho5JqK0= Received: by 10.115.46.9 with SMTP id y9mr990947waj.1178527877426; Mon, 07 May 2007 01:51:17 -0700 (PDT) Received: by 10.115.94.16 with HTTP; Mon, 7 May 2007 01:51:17 -0700 (PDT) Message-ID: Date: Mon, 7 May 2007 10:51:17 +0200 From: "Franck Bui-Huu" To: "Atsushi Nemoto" Subject: Re: [PATCH 2/3] time: replace board_time_init() by plat_clk_setup() Cc: ralf@linux-mips.org, linux-mips@linux-mips.org In-Reply-To: <20070506.011636.92588372.anemo@mba.ocn.ne.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <1178293006633-git-send-email-fbuihuu@gmail.com> <11782930063123-git-send-email-fbuihuu@gmail.com> <20070506.011636.92588372.anemo@mba.ocn.ne.jp> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14969 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips On 5/5/07, Atsushi Nemoto wrote: > As I wrote in another mail I think we can not remove board_time_init > for now, but if you really removed it please update > Documentation/mips/time.README too. > Let see where this thread will lead us but in any cases I agree. -- Franck From anemo@mba.ocn.ne.jp Mon May 7 10:28:45 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 07 May 2007 10:28:47 +0100 (BST) Received: from topsns2.toshiba-tops.co.jp ([202.230.225.126]:64226 "EHLO topsns2.toshiba-tops.co.jp") by ftp.linux-mips.org with ESMTP id S20021984AbXEGJ2p (ORCPT ); Mon, 7 May 2007 10:28:45 +0100 Received: from topsms.toshiba-tops.co.jp by topsns2.toshiba-tops.co.jp via smtpd (for ftp.linux-mips.org [194.74.144.162]) with ESMTP; Mon, 7 May 2007 18:28:43 +0900 Received: from topsms.toshiba-tops.co.jp (localhost.localdomain [127.0.0.1]) by localhost.toshiba-tops.co.jp (Postfix) with ESMTP id 105B24220B; Mon, 7 May 2007 18:28:38 +0900 (JST) Received: from srd2sd.toshiba-tops.co.jp (srd2sd.toshiba-tops.co.jp [172.17.28.2]) by topsms.toshiba-tops.co.jp (Postfix) with ESMTP id 04FFD204C3; Mon, 7 May 2007 18:28:38 +0900 (JST) Received: from localhost (fragile [172.17.28.65]) by srd2sd.toshiba-tops.co.jp (8.12.10/8.12.10) with ESMTP id l479SbW0068428; Mon, 7 May 2007 18:28:37 +0900 (JST) (envelope-from anemo@mba.ocn.ne.jp) Date: Mon, 07 May 2007 18:28:37 +0900 (JST) Message-Id: <20070507.182837.126143175.nemoto@toshiba-tops.co.jp> To: vagabon.xyz@gmail.com Cc: ralf@linux-mips.org, linux-mips@linux-mips.org Subject: Re: [PATCH 2/3] time: replace board_time_init() by plat_clk_setup() From: Atsushi Nemoto In-Reply-To: References: <11782930063123-git-send-email-fbuihuu@gmail.com> <20070506.010313.41199101.anemo@mba.ocn.ne.jp> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14970 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Mon, 7 May 2007 10:50:20 +0200, "Franck Bui-Huu" wrote: > > How about keeping board_time_init pointer as is and adding > > plat_clk_setup only for simple platforms? > > Not sure that would force us to duplicate all timekeeping stuff in > time_init() hook because of several hacks. If this is really true, > let's try to clean up some code. Well, I have not looked closer those hackish board_time_init functions yet. Maybe we can do the cleanups, but frankly, now I think it is a time for removal of them. Both boards have been listed on http://www.linux-mips.org/wiki/Category:Deprecated since Jun 2006. --- Atsushi Nemoto From vagabon.xyz@gmail.com Mon May 7 11:09:06 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 07 May 2007 11:09:08 +0100 (BST) Received: from wr-out-0506.google.com ([64.233.184.224]:48216 "EHLO wr-out-0506.google.com") by ftp.linux-mips.org with ESMTP id S20021928AbXEGKJG (ORCPT ); Mon, 7 May 2007 11:09:06 +0100 Received: by wr-out-0506.google.com with SMTP id q50so1555911wrq for ; Mon, 07 May 2007 03:08:05 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=j0dAkv4fnT1g01eKe4/0j7u2jLnnlc6VtTpIXhrUJ0x3cO2/0oXwhSjfdPrFHCYzmVekX0eA0tfh20gZt2mbK6HXM9PEbHG+Hbphpn/3IV15+9n/xXYaPe+O/Yskbdd6pDg/Qx2RmxpRNmLeLhJA1aamtn1Jx0gB6TVkyixc61M= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=raAbReImDrvq6GS1qMrUQbOSRURo2Xo4ypbjyi0hsaVc9AVKCBXibKirGCWHhwT/StjaNYFoXQQqL/XuZvShAWrW+gzY/oLDpBw6UPM00ZN118giiu8HgOn06HBjNpzGp5X/WE2I0MzWfFTH1Je/D/cvk+BJn4fjFVnaiatgg8Q= Received: by 10.114.75.1 with SMTP id x1mr140829waa.1178532485029; Mon, 07 May 2007 03:08:05 -0700 (PDT) Received: by 10.115.94.16 with HTTP; Mon, 7 May 2007 03:08:04 -0700 (PDT) Message-ID: Date: Mon, 7 May 2007 12:08:04 +0200 From: "Franck Bui-Huu" To: "Atsushi Nemoto" Subject: Re: [PATCH 2/3] time: replace board_time_init() by plat_clk_setup() Cc: ralf@linux-mips.org, linux-mips@linux-mips.org In-Reply-To: <20070507.182837.126143175.nemoto@toshiba-tops.co.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <11782930063123-git-send-email-fbuihuu@gmail.com> <20070506.010313.41199101.anemo@mba.ocn.ne.jp> <20070507.182837.126143175.nemoto@toshiba-tops.co.jp> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14971 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips On 5/7/07, Atsushi Nemoto wrote: > > Well, I have not looked closer those hackish board_time_init functions > yet. Maybe we can do the cleanups, but frankly, now I think it is a > time for removal of them. > Amen. Unfortunately I don't know and don't have any idea if it's now a good thing to get rid of these 2 board supports... Maybe submitting a patch to linux-mips which does that could be a good start... Let's see... -- Franck From vagabon.xyz@gmail.com Mon May 7 12:09:26 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 07 May 2007 12:09:28 +0100 (BST) Received: from wx-out-0506.google.com ([66.249.82.238]:6482 "EHLO wx-out-0506.google.com") by ftp.linux-mips.org with ESMTP id S20021936AbXEGLJ0 (ORCPT ); Mon, 7 May 2007 12:09:26 +0100 Received: by wx-out-0506.google.com with SMTP id s14so746125wxc for ; Mon, 07 May 2007 04:09:24 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:received:to:cc:subject:date:message-id:x-mailer:from; b=e9Ozlg3N9t0ZelpehxEXXoI3bsVUsrWzTXjVrtkZbcikBRtjFbJdh0jZU8mU9SnG+qGgeYD5kRkNgp4as52wfA9bgGA57slaEPFZgeGgD1gzRn3ZUK0y9jdvw33em6hbTCh97B/EvPqwk2LDkFLMs5mPmq5DUzP+eYNgdPEPqDg= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:to:cc:subject:date:message-id:x-mailer:from; b=ZC01Um9s5tEdiAOqfVuy2AWPV+2ZtyrsgxuDT6XDQ2T+GexvaHj2yNxxcEZvU/+mB5RtptYGp2uRpzLs9wLUlTSZcPxBfToI5cRsqpYSAOiT66Fvg7hpXOn1mcbsi9GXp1J3XNBVJf8BNpTMWT4SNkwBriD0asWiE1ZsWpNqoSw= Received: by 10.90.63.16 with SMTP id l16mr4787601aga.1178536164513; Mon, 07 May 2007 04:09:24 -0700 (PDT) Received: from spoutnik.innova-card.com ( [81.252.61.1]) by mx.google.com with ESMTP id m6sm10187529wrm.2007.05.07.04.09.21; Mon, 07 May 2007 04:09:23 -0700 (PDT) Received: by spoutnik.innova-card.com (Postfix, from userid 500) id 32E9C23F76E; Mon, 7 May 2007 13:11:13 +0200 (CEST) To: ralf@linux-mips.org Cc: anemo@mba.ocn.ne.jp, linux-mips@linux-mips.org Subject: [RFC 0/3] Remove Momentum Jaguar and Ocelot G board supports Date: Mon, 7 May 2007 13:11:10 +0200 Message-Id: <11785362732731-git-send-email-fbuihuu@gmail.com> X-Mailer: git-send-email 1.5.1.3 From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14972 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips Hi all, These 2 boards have several hacks that make them annoying to support. Specially when improving generic MIPS code. Since they're scheduled for removal since June 2006, it should be high time to get rid of them. Please consider, Franck --- arch/mips/Kconfig | 51 +-- arch/mips/Makefile | 20 - arch/mips/configs/jaguar-atx_defconfig | 897 --------------------- arch/mips/configs/ocelot_g_defconfig | 981 ----------------------- arch/mips/mm/highmem.c | 21 - arch/mips/mm/init.c | 3 - arch/mips/momentum/Kconfig | 6 - arch/mips/momentum/jaguar_atx/Makefile | 12 - arch/mips/momentum/jaguar_atx/dbg_io.c | 125 --- arch/mips/momentum/jaguar_atx/irq.c | 94 --- arch/mips/momentum/jaguar_atx/ja-console.c | 101 --- arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h | 54 -- arch/mips/momentum/jaguar_atx/platform.c | 208 ----- arch/mips/momentum/jaguar_atx/prom.c | 210 ----- arch/mips/momentum/jaguar_atx/reset.c | 56 -- arch/mips/momentum/jaguar_atx/setup.c | 475 ----------- arch/mips/momentum/ocelot_g/Makefile | 6 - arch/mips/momentum/ocelot_g/dbg_io.c | 121 --- arch/mips/momentum/ocelot_g/gt-irq.c | 212 ----- arch/mips/momentum/ocelot_g/irq.c | 101 --- arch/mips/momentum/ocelot_g/ocelot_pld.h | 30 - arch/mips/momentum/ocelot_g/prom.c | 84 -- arch/mips/momentum/ocelot_g/reset.c | 47 -- arch/mips/momentum/ocelot_g/setup.c | 267 ------ arch/mips/pci/Makefile | 2 - arch/mips/pci/fixup-jaguar.c | 43 - arch/mips/pci/fixup-ocelot-g.c | 37 - arch/mips/pci/pci-ocelot-g.c | 97 --- 28 files changed, 3 insertions(+), 4358 deletions(-) delete mode 100644 arch/mips/configs/jaguar-atx_defconfig delete mode 100644 arch/mips/configs/ocelot_g_defconfig delete mode 100644 arch/mips/momentum/Kconfig delete mode 100644 arch/mips/momentum/jaguar_atx/Makefile delete mode 100644 arch/mips/momentum/jaguar_atx/dbg_io.c delete mode 100644 arch/mips/momentum/jaguar_atx/irq.c delete mode 100644 arch/mips/momentum/jaguar_atx/ja-console.c delete mode 100644 arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h delete mode 100644 arch/mips/momentum/jaguar_atx/platform.c delete mode 100644 arch/mips/momentum/jaguar_atx/prom.c delete mode 100644 arch/mips/momentum/jaguar_atx/reset.c delete mode 100644 arch/mips/momentum/jaguar_atx/setup.c delete mode 100644 arch/mips/momentum/ocelot_g/Makefile delete mode 100644 arch/mips/momentum/ocelot_g/dbg_io.c delete mode 100644 arch/mips/momentum/ocelot_g/gt-irq.c delete mode 100644 arch/mips/momentum/ocelot_g/irq.c delete mode 100644 arch/mips/momentum/ocelot_g/ocelot_pld.h delete mode 100644 arch/mips/momentum/ocelot_g/prom.c delete mode 100644 arch/mips/momentum/ocelot_g/reset.c delete mode 100644 arch/mips/momentum/ocelot_g/setup.c delete mode 100644 arch/mips/pci/fixup-jaguar.c delete mode 100644 arch/mips/pci/fixup-ocelot-g.c delete mode 100644 arch/mips/pci/pci-ocelot-g.c From vagabon.xyz@gmail.com Mon May 7 12:09:48 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 07 May 2007 12:09:52 +0100 (BST) Received: from wx-out-0506.google.com ([66.249.82.238]:6482 "EHLO wx-out-0506.google.com") by ftp.linux-mips.org with ESMTP id S20022026AbXEGLJa (ORCPT ); Mon, 7 May 2007 12:09:30 +0100 Received: by wx-out-0506.google.com with SMTP id s14so746125wxc for ; Mon, 07 May 2007 04:09:28 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=e3XNEtIfFL+pPGtUiaNc3kdfFrJKsXddEImxlFSI6XQuLwm+y1zocHljdJpAQWacNyHm1ebFS/AVwoAskhF7DK39pfm9JhdaqkiwzTaSfQeQx7+5CcGSBPvGxaHnWYXk3PvW/vuvNVWtfXqvdyUZGNvWqdPAmHbkZEvslYW/qmA= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=Vo4Pg1dk8fEhb1c4XyD+m36B9rRwTypZafPUUZNIf55u97UDLTiyxX+//aCJNV0Mum91/Mw0i/kYcRuQ5sEYBiHbQ/fEJOyolUlPmDfZS9P+wZIwj3hkLtwS1jnd1lEAthY3cSxcOVJTqQxT06urF7vIIiHQBGV1H0Jsa65Pw6c= Received: by 10.90.116.6 with SMTP id o6mr1870345agc.1178536168606; Mon, 07 May 2007 04:09:28 -0700 (PDT) Received: from spoutnik.innova-card.com ( [81.252.61.1]) by mx.google.com with ESMTP id q57sm10146488wrq.2007.05.07.04.09.21; Mon, 07 May 2007 04:09:26 -0700 (PDT) Received: by spoutnik.innova-card.com (Postfix, from userid 500) id 634FF23F76F; Mon, 7 May 2007 13:11:13 +0200 (CEST) To: ralf@linux-mips.org Cc: anemo@mba.ocn.ne.jp, linux-mips@linux-mips.org Subject: [PATCH 1/3] Remove Momenco Ocelot G support Date: Mon, 7 May 2007 13:11:11 +0200 Message-Id: <1178536273551-git-send-email-fbuihuu@gmail.com> X-Mailer: git-send-email 1.5.1.3 In-Reply-To: <11785362732731-git-send-email-fbuihuu@gmail.com> References: <11785362732731-git-send-email-fbuihuu@gmail.com> From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14973 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips From: Franck Bui-Huu Signed-off-by: Franck Bui-Huu --- arch/mips/Kconfig | 23 +- arch/mips/Makefile | 9 - arch/mips/configs/ocelot_g_defconfig | 981 ------------------------------ arch/mips/momentum/ocelot_g/Makefile | 6 - arch/mips/momentum/ocelot_g/dbg_io.c | 121 ---- arch/mips/momentum/ocelot_g/gt-irq.c | 212 ------- arch/mips/momentum/ocelot_g/irq.c | 101 --- arch/mips/momentum/ocelot_g/ocelot_pld.h | 30 - arch/mips/momentum/ocelot_g/prom.c | 84 --- arch/mips/momentum/ocelot_g/reset.c | 47 -- arch/mips/momentum/ocelot_g/setup.c | 267 -------- arch/mips/pci/Makefile | 1 - arch/mips/pci/fixup-ocelot-g.c | 37 -- arch/mips/pci/pci-ocelot-g.c | 97 --- 14 files changed, 3 insertions(+), 2013 deletions(-) delete mode 100644 arch/mips/configs/ocelot_g_defconfig delete mode 100644 arch/mips/momentum/ocelot_g/Makefile delete mode 100644 arch/mips/momentum/ocelot_g/dbg_io.c delete mode 100644 arch/mips/momentum/ocelot_g/gt-irq.c delete mode 100644 arch/mips/momentum/ocelot_g/irq.c delete mode 100644 arch/mips/momentum/ocelot_g/ocelot_pld.h delete mode 100644 arch/mips/momentum/ocelot_g/prom.c delete mode 100644 arch/mips/momentum/ocelot_g/reset.c delete mode 100644 arch/mips/momentum/ocelot_g/setup.c delete mode 100644 arch/mips/pci/fixup-ocelot-g.c delete mode 100644 arch/mips/pci/pci-ocelot-g.c diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 130d825..ab79b98 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -446,23 +446,6 @@ config MOMENCO_OCELOT_C The Ocelot is a MIPS-based Single Board Computer (SBC) made by Momentum Computer . -config MOMENCO_OCELOT_G - bool "Momentum Ocelot-G board" - select DMA_NONCOHERENT - select HW_HAS_PCI - select IRQ_CPU - select IRQ_CPU_RM7K - select PCI_MARVELL - select RM7000_CPU_SCACHE - select SWAP_IO_SPACE - select SYS_HAS_CPU_RM7000 - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL if BROKEN - select SYS_SUPPORTS_BIG_ENDIAN - help - The Ocelot is a MIPS-based Single Board Computer (SBC) made by - Momentum Computer . - config MIPS_XXS1500 bool "MyCable XXS1500 board" select DMA_NONCOHERENT @@ -1080,9 +1063,9 @@ config WDT_RM9000 choice prompt "Galileo Chip Clock" #default SYSCLK_83 if MIPS_EV64120 - depends on MIPS_EV64120 || MOMENCO_OCELOT || MOMENCO_OCELOT_G + depends on MIPS_EV64120 || MOMENCO_OCELOT default SYSCLK_83 if MIPS_EV64120 - default SYSCLK_100 if MOMENCO_OCELOT || MOMENCO_OCELOT_G + default SYSCLK_100 if MOMENCO_OCELOT config SYSCLK_75 bool "75" if MIPS_EV64120 @@ -1091,7 +1074,7 @@ config SYSCLK_83 bool "83.3" if MIPS_EV64120 config SYSCLK_100 - bool "100" if MIPS_EV64120 || MOMENCO_OCELOT || MOMENCO_OCELOT_G + bool "100" if MIPS_EV64120 || MOMENCO_OCELOT endchoice diff --git a/arch/mips/Makefile b/arch/mips/Makefile index f2f742d..3e8a777 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -343,15 +343,6 @@ cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000 # -# Momentum Ocelot-G board -# -# The Ocelot-G setup.o must be linked early - it does the ioremap() for the -# mips_io_port_base. -# -core-$(CONFIG_MOMENCO_OCELOT_G) += arch/mips/momentum/ocelot_g/ -load-$(CONFIG_MOMENCO_OCELOT_G) += 0xffffffff80100000 - -# # Momentum Ocelot-C and -CS boards # # The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the diff --git a/arch/mips/configs/ocelot_g_defconfig b/arch/mips/configs/ocelot_g_defconfig deleted file mode 100644 index 7078e6b..0000000 --- a/arch/mips/configs/ocelot_g_defconfig +++ /dev/null @@ -1,981 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.20 -# Tue Feb 20 21:47:36 2007 -# -CONFIG_MIPS=y - -# -# Machine selection -# -CONFIG_ZONE_DMA=y -# CONFIG_MIPS_MTX1 is not set -# CONFIG_MIPS_BOSPORUS is not set -# CONFIG_MIPS_PB1000 is not set -# CONFIG_MIPS_PB1100 is not set -# CONFIG_MIPS_PB1500 is not set -# CONFIG_MIPS_PB1550 is not set -# CONFIG_MIPS_PB1200 is not set -# CONFIG_MIPS_DB1000 is not set -# CONFIG_MIPS_DB1100 is not set -# CONFIG_MIPS_DB1500 is not set -# CONFIG_MIPS_DB1550 is not set -# CONFIG_MIPS_DB1200 is not set -# CONFIG_MIPS_MIRAGE is not set -# CONFIG_BASLER_EXCITE is not set -# CONFIG_MIPS_COBALT is not set -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MIPS_EV64120 is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_LASAT is not set -# CONFIG_MIPS_ATLAS is not set -# CONFIG_MIPS_MALTA is not set -# CONFIG_MIPS_SEAD is not set -# CONFIG_WR_PPMC is not set -# CONFIG_MIPS_SIM is not set -# CONFIG_MOMENCO_JAGUAR_ATX is not set -# CONFIG_MOMENCO_OCELOT is not set -# CONFIG_MOMENCO_OCELOT_3 is not set -# CONFIG_MOMENCO_OCELOT_C is not set -CONFIG_MOMENCO_OCELOT_G=y -# CONFIG_MIPS_XXS1500 is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_STB810 is not set -# CONFIG_DDB5477 is not set -# CONFIG_MACH_VR41XX is not set -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_QEMU is not set -# CONFIG_MARKEINS is not set -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_SWARM is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_PTSWARM is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM is not set -# CONFIG_TOSHIBA_JMR3927 is not set -# CONFIG_TOSHIBA_RBTX4927 is not set -# CONFIG_TOSHIBA_RBTX4938 is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_TIME=y -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y -# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set -CONFIG_DMA_NONCOHERENT=y -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_CPU_BIG_ENDIAN=y -# CONFIG_CPU_LITTLE_ENDIAN is not set -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_IRQ_CPU=y -CONFIG_IRQ_CPU_RM7K=y -CONFIG_PCI_MARVELL=y -CONFIG_SWAP_IO_SPACE=y -# CONFIG_SYSCLK_75 is not set -# CONFIG_SYSCLK_83 is not set -CONFIG_SYSCLK_100=y -CONFIG_MIPS_L1_CACHE_SHIFT=5 - -# -# CPU selection -# -# CONFIG_CPU_MIPS32_R1 is not set -# CONFIG_CPU_MIPS32_R2 is not set -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_VR41XX is not set -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_NEVADA is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_R10000 is not set -CONFIG_CPU_RM7000=y -# CONFIG_CPU_RM9000 is not set -# CONFIG_CPU_SB1 is not set -CONFIG_SYS_HAS_CPU_RM7000=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y - -# -# Kernel type -# -CONFIG_32BIT=y -# CONFIG_64BIT is not set -CONFIG_PAGE_SIZE_4KB=y -# CONFIG_PAGE_SIZE_8KB is not set -# CONFIG_PAGE_SIZE_16KB is not set -# CONFIG_PAGE_SIZE_64KB is not set -CONFIG_BOARD_SCACHE=y -CONFIG_RM7000_CPU_SCACHE=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -# CONFIG_MIPS_VPE_LOADER is not set -# CONFIG_64BIT_PHYS_ADDR is not set -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -CONFIG_ARCH_FLATMEM_ENABLE=y -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -CONFIG_RESOURCES_64BIT=y -CONFIG_ZONE_DMA_FLAG=1 -# CONFIG_HZ_48 is not set -# CONFIG_HZ_100 is not set -# CONFIG_HZ_128 is not set -# CONFIG_HZ_250 is not set -# CONFIG_HZ_256 is not set -CONFIG_HZ_1000=y -# CONFIG_HZ_1024 is not set -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_HZ=1000 -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set -# CONFIG_KEXEC is not set -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# -CONFIG_LOCALVERSION="" -CONFIG_LOCALVERSION_AUTO=y -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_IPC_NS is not set -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_UTS_NS is not set -# CONFIG_AUDIT is not set -# CONFIG_IKCONFIG is not set -CONFIG_SYSFS_DEPRECATED=y -CONFIG_RELAY=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_SYSCTL=y -CONFIG_EMBEDDED=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SHMEM=y -CONFIG_SLAB=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_RT_MUTEXES=y -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 -# CONFIG_SLOB is not set - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# Block layer -# -CONFIG_BLOCK=y -# CONFIG_LBD is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -CONFIG_LSF=y - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -CONFIG_DEFAULT_AS=y -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="anticipatory" - -# -# Bus options (PCI, PCMCIA, EISA, ISA, TC) -# -CONFIG_HW_HAS_PCI=y -CONFIG_PCI=y -CONFIG_MMU=y - -# -# PCCARD (PCMCIA/CardBus) support -# -# CONFIG_PCCARD is not set - -# -# PCI Hotplug Support -# -# CONFIG_HOTPLUG_PCI is not set - -# -# Executable file formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_TRAD_SIGNALS=y - -# -# Power management options -# -CONFIG_PM=y -# CONFIG_PM_LEGACY is not set -# CONFIG_PM_DEBUG is not set -# CONFIG_PM_SYSFS_DEPRECATED is not set - -# -# Networking -# -CONFIG_NET=y - -# -# Networking options -# -# CONFIG_NETDEBUG is not set -# CONFIG_PACKET is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -CONFIG_XFRM_USER=y -# CONFIG_XFRM_SUB_POLICY is not set -CONFIG_XFRM_MIGRATE=y -CONFIG_NET_KEY=y -CONFIG_NET_KEY_MIGRATE=y -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -CONFIG_TCP_MD5SIG=y -# CONFIG_IPV6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set -CONFIG_NETWORK_SECMARK=y -# CONFIG_NETFILTER is not set - -# -# DCCP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_DCCP is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set - -# -# TIPC Configuration (EXPERIMENTAL) -# -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -CONFIG_IEEE80211=y -# CONFIG_IEEE80211_DEBUG is not set -CONFIG_IEEE80211_CRYPT_WEP=y -CONFIG_IEEE80211_CRYPT_CCMP=y -CONFIG_IEEE80211_SOFTMAC=y -# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set -CONFIG_WIRELESS_EXT=y - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -# CONFIG_SYS_HYPERVISOR is not set - -# -# Connector - unified userspace <-> kernelspace linker -# -CONFIG_CONNECTOR=y -CONFIG_PROC_EVENTS=y - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# -# CONFIG_PNPACPI is not set - -# -# Block devices -# -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_SX8 is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_CDROM_PKTCDVD=y -CONFIG_CDROM_PKTCDVD_BUFFERS=8 -# CONFIG_CDROM_PKTCDVD_WCACHE is not set -CONFIG_ATA_OVER_ETH=y - -# -# Misc devices -# -CONFIG_SGI_IOC4=y -# CONFIG_TIFM_CORE is not set - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -CONFIG_RAID_ATTRS=y -# CONFIG_SCSI is not set -# CONFIG_SCSI_NETLINK is not set - -# -# Serial ATA (prod) and Parallel ATA (experimental) drivers -# -# CONFIG_ATA is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Network device support -# -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# PHY device support -# -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -CONFIG_MARVELL_PHY=y -CONFIG_DAVICOM_PHY=y -CONFIG_QSEMI_PHY=y -CONFIG_LXT_PHY=y -CONFIG_CICADA_PHY=y -CONFIG_VITESSE_PHY=y -CONFIG_SMSC_PHY=y -# CONFIG_BROADCOM_PHY is not set -# CONFIG_FIXED_PHY is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -CONFIG_GALILEO_64240_ETH=y -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_CASSINI is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_DM9000 is not set - -# -# Tulip family network device support -# -# CONFIG_NET_TULIP is not set -# CONFIG_HP100 is not set -# CONFIG_NET_PCI is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_R8169 is not set -# CONFIG_SIS190 is not set -# CONFIG_SKGE is not set -# CONFIG_SKY2 is not set -# CONFIG_SK98LIN is not set -# CONFIG_TIGON3 is not set -# CONFIG_BNX2 is not set -CONFIG_QLA3XXX=y -# CONFIG_ATL1 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_CHELSIO_T1 is not set -CONFIG_CHELSIO_T3=y -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set -# CONFIG_MYRI10GE is not set -CONFIG_NETXEN_NIC=y - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -# CONFIG_SERIO_I8042 is not set -CONFIG_SERIO_SERPORT=y -# CONFIG_SERIO_PCIPS2 is not set -# CONFIG_SERIO_LIBPS2 is not set -CONFIG_SERIO_RAW=y -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_PCI=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_JSM is not set -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_HW_RANDOM is not set -# CONFIG_RTC is not set -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# -# CONFIG_TCG_TPM is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# SPI support -# -# CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set - -# -# Dallas's 1-wire bus -# -# CONFIG_W1 is not set - -# -# Hardware Monitoring support -# -# CONFIG_HWMON is not set -# CONFIG_HWMON_VID is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# HID Devices -# -# CONFIG_HID is not set - -# -# USB support -# -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -# CONFIG_USB is not set - -# -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -# - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# MMC/SD Card support -# -# CONFIG_MMC is not set - -# -# LED devices -# -# CONFIG_NEW_LEDS is not set - -# -# LED drivers -# - -# -# LED Triggers -# - -# -# InfiniBand support -# -# CONFIG_INFINIBAND is not set - -# -# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) -# - -# -# Real Time Clock -# -# CONFIG_RTC_CLASS is not set - -# -# DMA Engine support -# -# CONFIG_DMA_ENGINE is not set - -# -# DMA Clients -# - -# -# DMA Devices -# - -# -# Auxiliary Display support -# - -# -# Virtualization -# - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -# CONFIG_EXT3_FS is not set -# CONFIG_EXT4DEV_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -CONFIG_FS_POSIX_ACL=y -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -CONFIG_FUSE_FS=y -CONFIG_GENERIC_ACL=y - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_PROC_SYSCTL=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y -CONFIG_CONFIGFS_FS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_ECRYPT_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -# CONFIG_NFS_V3 is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -CONFIG_NFSD=y -# CONFIG_NFSD_V3 is not set -# CONFIG_NFSD_TCP is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -CONFIG_EXPORTFS=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set -# CONFIG_9P_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Distributed Lock Manager -# -CONFIG_DLM=y -CONFIG_DLM_TCP=y -# CONFIG_DLM_SCTP is not set -# CONFIG_DLM_DEBUG is not set - -# -# Profiling support -# -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_MUST_CHECK=y -# CONFIG_MAGIC_SYSRQ is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_FS is not set -# CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_KERNEL is not set -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_CROSSCOMPILE=y -CONFIG_CMDLINE="" - -# -# Security options -# -CONFIG_KEYS=y -CONFIG_KEYS_DEBUG_PROC_KEYS=y -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -CONFIG_CRYPTO=y -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_XCBC=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_MD4=y -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_WP512=y -CONFIG_CRYPTO_TGR192=y -CONFIG_CRYPTO_GF128MUL=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_PCBC=y -CONFIG_CRYPTO_LRW=y -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_FCRYPT=y -CONFIG_CRYPTO_BLOWFISH=y -CONFIG_CRYPTO_TWOFISH=y -CONFIG_CRYPTO_TWOFISH_COMMON=y -CONFIG_CRYPTO_SERPENT=y -CONFIG_CRYPTO_AES=y -CONFIG_CRYPTO_CAST5=y -CONFIG_CRYPTO_CAST6=y -CONFIG_CRYPTO_TEA=y -CONFIG_CRYPTO_ARC4=y -CONFIG_CRYPTO_KHAZAD=y -CONFIG_CRYPTO_ANUBIS=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_MICHAEL_MIC=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CAMELLIA=y - -# -# Hardware crypto devices -# - -# -# Library routines -# -CONFIG_BITREVERSE=y -# CONFIG_CRC_CCITT is not set -CONFIG_CRC16=y -CONFIG_CRC32=y -CONFIG_LIBCRC32C=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_PLIST=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y diff --git a/arch/mips/momentum/ocelot_g/Makefile b/arch/mips/momentum/ocelot_g/Makefile deleted file mode 100644 index c0a0030..0000000 --- a/arch/mips/momentum/ocelot_g/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# -# Makefile for Momentum Computer's Ocelot-G board. -# - -obj-y += irq.o gt-irq.o prom.o reset.o setup.o -obj-$(CONFIG_KGDB) += dbg_io.o diff --git a/arch/mips/momentum/ocelot_g/dbg_io.c b/arch/mips/momentum/ocelot_g/dbg_io.c deleted file mode 100644 index 32d6fb4..0000000 --- a/arch/mips/momentum/ocelot_g/dbg_io.c +++ /dev/null @@ -1,121 +0,0 @@ - -#include /* For the serial port location and base baud */ - -/* --- CONFIG --- */ - -typedef unsigned char uint8; -typedef unsigned int uint32; - -/* --- END OF CONFIG --- */ - -#define UART16550_BAUD_2400 2400 -#define UART16550_BAUD_4800 4800 -#define UART16550_BAUD_9600 9600 -#define UART16550_BAUD_19200 19200 -#define UART16550_BAUD_38400 38400 -#define UART16550_BAUD_57600 57600 -#define UART16550_BAUD_115200 115200 - -#define UART16550_PARITY_NONE 0 -#define UART16550_PARITY_ODD 0x08 -#define UART16550_PARITY_EVEN 0x18 -#define UART16550_PARITY_MARK 0x28 -#define UART16550_PARITY_SPACE 0x38 - -#define UART16550_DATA_5BIT 0x0 -#define UART16550_DATA_6BIT 0x1 -#define UART16550_DATA_7BIT 0x2 -#define UART16550_DATA_8BIT 0x3 - -#define UART16550_STOP_1BIT 0x0 -#define UART16550_STOP_2BIT 0x4 - -/* ----------------------------------------------------- */ - -/* === CONFIG === */ - -/* [jsun] we use the second serial port for kdb */ -#define BASE OCELOT_SERIAL1_BASE -#define MAX_BAUD OCELOT_BASE_BAUD - -/* === END OF CONFIG === */ - -#define REG_OFFSET 4 - -/* register offset */ -#define OFS_RCV_BUFFER 0 -#define OFS_TRANS_HOLD 0 -#define OFS_SEND_BUFFER 0 -#define OFS_INTR_ENABLE (1*REG_OFFSET) -#define OFS_INTR_ID (2*REG_OFFSET) -#define OFS_DATA_FORMAT (3*REG_OFFSET) -#define OFS_LINE_CONTROL (3*REG_OFFSET) -#define OFS_MODEM_CONTROL (4*REG_OFFSET) -#define OFS_RS232_OUTPUT (4*REG_OFFSET) -#define OFS_LINE_STATUS (5*REG_OFFSET) -#define OFS_MODEM_STATUS (6*REG_OFFSET) -#define OFS_RS232_INPUT (6*REG_OFFSET) -#define OFS_SCRATCH_PAD (7*REG_OFFSET) - -#define OFS_DIVISOR_LSB (0*REG_OFFSET) -#define OFS_DIVISOR_MSB (1*REG_OFFSET) - - -/* memory-mapped read/write of the port */ -#define UART16550_READ(y) (*((volatile uint8*)(BASE + y))) -#define UART16550_WRITE(y, z) ((*((volatile uint8*)(BASE + y))) = z) - -void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop) -{ - /* disable interrupts */ - UART16550_WRITE(OFS_INTR_ENABLE, 0); - - /* set up baud rate */ - { - uint32 divisor; - - /* set DIAB bit */ - UART16550_WRITE(OFS_LINE_CONTROL, 0x80); - - /* set divisor */ - divisor = MAX_BAUD / baud; - UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff); - UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8); - - /* clear DIAB bit */ - UART16550_WRITE(OFS_LINE_CONTROL, 0x0); - } - - /* set data format */ - UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop); -} - -static int remoteDebugInitialized = 0; - -uint8 getDebugChar(void) -{ - if (!remoteDebugInitialized) { - remoteDebugInitialized = 1; - debugInit(UART16550_BAUD_38400, - UART16550_DATA_8BIT, - UART16550_PARITY_NONE, UART16550_STOP_1BIT); - } - - while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0); - return UART16550_READ(OFS_RCV_BUFFER); -} - - -int putDebugChar(uint8 byte) -{ - if (!remoteDebugInitialized) { - remoteDebugInitialized = 1; - debugInit(UART16550_BAUD_38400, - UART16550_DATA_8BIT, - UART16550_PARITY_NONE, UART16550_STOP_1BIT); - } - - while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0); - UART16550_WRITE(OFS_SEND_BUFFER, byte); - return 1; -} diff --git a/arch/mips/momentum/ocelot_g/gt-irq.c b/arch/mips/momentum/ocelot_g/gt-irq.c deleted file mode 100644 index e5576bd..0000000 --- a/arch/mips/momentum/ocelot_g/gt-irq.c +++ /dev/null @@ -1,212 +0,0 @@ -/* - * - * Copyright 2002 Momentum Computer - * Author: mdharm@momenco.com - * - * arch/mips/momentum/ocelot_g/gt_irq.c - * Interrupt routines for gt64240. Currently it only handles timer irq. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#include -#include -#include -#include -#include -#include -#include - -unsigned long bus_clock; - -/* - * These are interrupt handlers for the GT on-chip interrupts. They - * all come in to the MIPS on a single interrupt line, and have to - * be handled and ack'ed differently than other MIPS interrupts. - */ - -#if 0 - -struct tq_struct irq_handlers[MAX_CAUSE_REGS][MAX_CAUSE_REG_WIDTH]; -void hook_irq_handler(int int_cause, int bit_num, void *isr_ptr); - -/* - * Hooks IRQ handler to the system. When the system is interrupted - * the interrupt service routine is called. - * - * Inputs : - * int_cause - The interrupt cause number. In EVB64120 two parameters - * are declared, INT_CAUSE_MAIN and INT_CAUSE_HIGH. - * bit_num - Indicates which bit number in the cause register - * isr_ptr - Pointer to the interrupt service routine - */ -void hook_irq_handler(int int_cause, int bit_num, void *isr_ptr) -{ - irq_handlers[int_cause][bit_num].routine = isr_ptr; -} - - -/* - * Enables the IRQ on Galileo Chip - * - * Inputs : - * int_cause - The interrupt cause number. In EVB64120 two parameters - * are declared, INT_CAUSE_MAIN and INT_CAUSE_HIGH. - * bit_num - Indicates which bit number in the cause register - * - * Outputs : - * 1 if successful, 0 if failure - */ -int enable_galileo_irq(int int_cause, int bit_num) -{ - if (int_cause == INT_CAUSE_MAIN) - SET_REG_BITS(CPU_INTERRUPT_MASK_REGISTER, (1 << bit_num)); - else if (int_cause == INT_CAUSE_HIGH) - SET_REG_BITS(CPU_HIGH_INTERRUPT_MASK_REGISTER, - (1 << bit_num)); - else - return 0; - - return 1; -} - -/* - * Disables the IRQ on Galileo Chip - * - * Inputs : - * int_cause - The interrupt cause number. In EVB64120 two parameters - * are declared, INT_CAUSE_MAIN and INT_CAUSE_HIGH. - * bit_num - Indicates which bit number in the cause register - * - * Outputs : - * 1 if successful, 0 if failure - */ -int disable_galileo_irq(int int_cause, int bit_num) -{ - if (int_cause == INT_CAUSE_MAIN) - RESET_REG_BITS(CPU_INTERRUPT_MASK_REGISTER, - (1 << bit_num)); - else if (int_cause == INT_CAUSE_HIGH) - RESET_REG_BITS(CPU_HIGH_INTERRUPT_MASK_REGISTER, - (1 << bit_num)); - else - return 0; - return 1; -} -#endif /* 0 */ - -/* - * Interrupt handler for interrupts coming from the Galileo chip via P0_INT#. - * - * We route the timer interrupt to P0_INT# (IRQ 6), and that's all this - * routine can handle, for now. - * - * In the future, we'll route more interrupts to this pin, and that's why - * we keep this particular structure in the function. - */ - -static irqreturn_t gt64240_p0int_irq(int irq, void *dev) -{ - uint32_t irq_src, irq_src_mask; - int handled; - - /* get the low interrupt cause register */ - irq_src = MV_READ(LOW_INTERRUPT_CAUSE_REGISTER); - - /* get the mask register for this pin */ - irq_src_mask = MV_READ(PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW); - - /* mask off only the interrupts we're interested in */ - irq_src = irq_src & irq_src_mask; - - handled = IRQ_NONE; - - /* Check for timer interrupt */ - if (irq_src & 0x00000100) { - handled = IRQ_HANDLED; - irq_src &= ~0x00000100; - - /* Clear any pending cause bits */ - MV_WRITE(TIMER_COUNTER_0_3_INTERRUPT_CAUSE, 0x0); - - /* handle the timer call */ - do_timer(1); -#ifndef CONFIG_SMP - update_process_times(user_mode(get_irq_regs())); -#endif - } - - if (irq_src) { - printk(KERN_INFO - "UNKNOWN P0_INT# interrupt received, irq_src=0x%x\n", - irq_src); - } - - return handled; -} - -/* - * Initializes timer using galileo's built in timer. - */ - -/* - * This will ignore the standard MIPS timer interrupt handler - * that is passed in as *irq (=irq0 in ../kernel/time.c). - * We will do our own timer interrupt handling. - */ -void gt64240_time_init(void) -{ - static struct irqaction timer; - - /* Stop the timer -- we'll use timer #0 */ - MV_WRITE(TIMER_COUNTER_0_3_CONTROL, 0x0); - - /* Load timer value for 100 Hz */ - MV_WRITE(TIMER_COUNTER0, bus_clock / 100); - - /* - * Create the IRQ structure entry for the timer. Since we're too early - * in the boot process to use the "request_irq()" call, we'll hard-code - * the values to the correct interrupt line. - */ - timer.handler = >64240_p0int_irq; - timer.flags = IRQF_SHARED | IRQF_DISABLED; - timer.name = "timer"; - timer.dev_id = NULL; - timer.next = NULL; - timer.mask = CPU_MASK_NONE; - irq_desc[6].action = &timer; - - enable_irq(6); - - /* Clear any pending cause bits */ - MV_WRITE(TIMER_COUNTER_0_3_INTERRUPT_CAUSE, 0x0); - - /* Enable the interrupt for timer 0 */ - MV_WRITE(TIMER_COUNTER_0_3_INTERRUPT_MASK, 0x1); - - /* Enable the timer interrupt for GT-64240 pin P0_INT# */ - MV_WRITE (PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW, 0x100); - - /* Configure and start the timer */ - MV_WRITE(TIMER_COUNTER_0_3_CONTROL, 0x3); -} - -void gt64240_irq_init(void) -{ -#if 0 - int i, j; - - /* Reset irq handlers pointers to NULL */ - for (i = 0; i < MAX_CAUSE_REGS; i++) { - for (j = 0; j < MAX_CAUSE_REG_WIDTH; j++) { - irq_handlers[i][j].next = NULL; - irq_handlers[i][j].sync = 0; - irq_handlers[i][j].routine = NULL; - irq_handlers[i][j].data = NULL; - } - } -#endif /* 0 */ -} diff --git a/arch/mips/momentum/ocelot_g/irq.c b/arch/mips/momentum/ocelot_g/irq.c deleted file mode 100644 index 273541f..0000000 --- a/arch/mips/momentum/ocelot_g/irq.c +++ /dev/null @@ -1,101 +0,0 @@ -/* - * Copyright (C) 2000 RidgeRun, Inc. - * Author: RidgeRun, Inc. - * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com - * - * Copyright 2001 MontaVista Software Inc. - * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net - * Copyright (C) 2000, 01, 05 Ralf Baechle (ralf@linux-mips.org) - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - * - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -asmlinkage void plat_irq_dispatch(void) -{ - unsigned int pending = read_c0_cause() & read_c0_status(); - - if (pending & STATUSF_IP2) - do_IRQ(2); - else if (pending & STATUSF_IP3) - do_IRQ(3); - else if (pending & STATUSF_IP4) - do_IRQ(4); - else if (pending & STATUSF_IP5) - do_IRQ(5); - else if (pending & STATUSF_IP6) - do_IRQ(6); - else if (pending & STATUSF_IP7) - do_IRQ(7); - else { - /* - * Now look at the extended interrupts - */ - pending = (read_c0_cause() & (read_c0_intcontrol() << 8)) >> 16; - - if (pending & STATUSF_IP8) - do_IRQ(8); - else if (pending & STATUSF_IP9) - do_IRQ(9); - else if (pending & STATUSF_IP10) - do_IRQ(10); - else if (pending & STATUSF_IP11) - do_IRQ(11); - else - spurious_interrupt(); - } -} - -extern void gt64240_irq_init(void); - -void __init arch_init_irq(void) -{ - /* - * Clear all of the interrupts while we change the able around a bit. - * int-handler is not on bootstrap - */ - clear_c0_status(ST0_IM); - local_irq_disable(); - - mips_cpu_irq_init(); - rm7k_cpu_irq_init(); - - gt64240_irq_init(); -} diff --git a/arch/mips/momentum/ocelot_g/ocelot_pld.h b/arch/mips/momentum/ocelot_g/ocelot_pld.h deleted file mode 100644 index 95e0534..0000000 --- a/arch/mips/momentum/ocelot_g/ocelot_pld.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Ocelot Board Register Definitions - * - * (C) 2001 Red Hat, Inc. - * - * GPL'd - */ -#ifndef __MOMENCO_OCELOT_PLD_H__ -#define __MOMENCO_OCELOT_PLD_H__ - -#define OCELOT_CS0_ADDR (0xfc000000) - -#define OCELOT_REG_BOARDREV (0) -#define OCELOT_REG_PLD1_ID (1) -#define OCELOT_REG_PLD2_ID (2) -#define OCELOT_REG_RESET_STATUS (3) -#define OCELOT_REG_BOARD_STATUS (4) -#define OCELOT_REG_CPCI_ID (5) -#define OCELOT_REG_I2C_CTRL (8) -#define OCELOT_REG_EEPROM_MODE (9) -#define OCELOT_REG_INTMASK (10) -#define OCELOT_REG_INTSTATUS (11) -#define OCELOT_REG_INTSET (12) -#define OCELOT_REG_INTCLR (13) - -#define __PLD_REG_TO_ADDR(reg) ((void *) OCELOT_CS0_ADDR + OCELOT_REG_##reg) -#define OCELOT_PLD_WRITE(x, reg) writeb(x, __PLD_REG_TO_ADDR(reg)) -#define OCELOT_PLD_READ(reg) readb(__PLD_REG_TO_ADDR(reg)) - -#endif /* __MOMENCO_OCELOT_PLD_H__ */ diff --git a/arch/mips/momentum/ocelot_g/prom.c b/arch/mips/momentum/ocelot_g/prom.c deleted file mode 100644 index 836d083..0000000 --- a/arch/mips/momentum/ocelot_g/prom.c +++ /dev/null @@ -1,84 +0,0 @@ -/* - * Copyright 2002 Momentum Computer Inc. - * Author: Matthew Dharm - * - * Based on Ocelot Linux port, which is - * Copyright 2001 MontaVista Software Inc. - * Author: jsun@mvista.com or jsun@junsun.net - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "ocelot_pld.h" - -struct callvectors* debug_vectors; - -extern unsigned long marvell_base; -extern unsigned long bus_clock; - -#ifdef CONFIG_GALILEO_GT64240_ETH -extern unsigned char prom_mac_addr_base[6]; -#endif - -const char *get_system_type(void) -{ - return "Momentum Ocelot"; -} - -void __init prom_init(void) -{ - int argc = fw_arg0; - char **arg = (char **) fw_arg1; - char **env = (char **) fw_arg2; - struct callvectors *cv = (struct callvectors *) fw_arg3; - int i; - - /* save the PROM vectors for debugging use */ - debug_vectors = cv; - - /* arg[0] is "g", the rest is boot parameters */ - arcs_cmdline[0] = '\0'; - for (i = 1; i < argc; i++) { - if (strlen(arcs_cmdline) + strlen(arg[i] + 1) - >= sizeof(arcs_cmdline)) - break; - strcat(arcs_cmdline, arg[i]); - strcat(arcs_cmdline, " "); - } - - mips_machgroup = MACH_GROUP_MOMENCO; - mips_machtype = MACH_MOMENCO_OCELOT_G; - -#ifdef CONFIG_GALILEO_GT64240_ETH - /* get the base MAC address for on-board ethernet ports */ - memcpy(prom_mac_addr_base, (void*)0xfc807cf2, 6); -#endif - - while (*env) { - if (strncmp("gtbase", *env, strlen("gtbase")) == 0) { - marvell_base = simple_strtol(*env + strlen("gtbase="), - NULL, 16); - } - if (strncmp("busclock", *env, strlen("busclock")) == 0) { - bus_clock = simple_strtol(*env + strlen("busclock="), - NULL, 10); - } - env++; - } -} - -void __init prom_free_prom_memory(void) -{ -} diff --git a/arch/mips/momentum/ocelot_g/reset.c b/arch/mips/momentum/ocelot_g/reset.c deleted file mode 100644 index 3fd499a..0000000 --- a/arch/mips/momentum/ocelot_g/reset.c +++ /dev/null @@ -1,47 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * Copyright (C) 1997, 2001 Ralf Baechle - * Copyright 2001 MontaVista Software Inc. - * Author: jsun@mvista.com or jsun@junsun.net - */ -#include -#include -#include -#include -#include -#include -#include -#include - -void momenco_ocelot_restart(char *command) -{ - void *nvram = ioremap_nocache(0x2c807000, 0x1000); - - if (!nvram) { - printk(KERN_NOTICE "ioremap of reset register failed\n"); - return; - } - writeb(0x84, nvram + 0xff7); /* Ask the NVRAM/RTC/watchdog chip to - assert reset in 1/16 second */ - mdelay(10+(1000/16)); - iounmap(nvram); - printk(KERN_NOTICE "Watchdog reset failed\n"); -} - -void momenco_ocelot_halt(void) -{ - printk(KERN_NOTICE "\n** You can safely turn off the power\n"); - while (1) - __asm__(".set\tmips3\n\t" - "wait\n\t" - ".set\tmips0"); -} - -void momenco_ocelot_power_off(void) -{ - momenco_ocelot_halt(); -} diff --git a/arch/mips/momentum/ocelot_g/setup.c b/arch/mips/momentum/ocelot_g/setup.c deleted file mode 100644 index 9db638a..0000000 --- a/arch/mips/momentum/ocelot_g/setup.c +++ /dev/null @@ -1,267 +0,0 @@ -/* - * BRIEF MODULE DESCRIPTION - * Momentum Computer Ocelot-G (CP7000G) - board dependent boot routines - * - * Copyright (C) 1996, 1997, 2001 Ralf Baechle - * Copyright (C) 2000 RidgeRun, Inc. - * Copyright (C) 2001 Red Hat, Inc. - * Copyright (C) 2002 Momentum Computer - * - * Author: Matthew Dharm, Momentum Computer - * mdharm@momenco.com - * - * Author: RidgeRun, Inc. - * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com - * - * Copyright 2001 MontaVista Software Inc. - * Author: jsun@mvista.com or jsun@junsun.net - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - * - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "ocelot_pld.h" - -#ifdef CONFIG_GALILEO_GT64240_ETH -extern unsigned char prom_mac_addr_base[6]; -#endif - -unsigned long marvell_base; - -/* These functions are used for rebooting or halting the machine*/ -extern void momenco_ocelot_restart(char *command); -extern void momenco_ocelot_halt(void); -extern void momenco_ocelot_power_off(void); - -extern void gt64240_time_init(void); -extern void momenco_ocelot_irq_setup(void); - -static char reset_reason; - -static unsigned long ENTRYLO(unsigned long paddr) -{ - return ((paddr & PAGE_MASK) | - (_PAGE_PRESENT | __READABLE | __WRITEABLE | _PAGE_GLOBAL | - _CACHE_UNCACHED)) >> 6; -} - -/* setup code for a handoff from a version 2 PMON 2000 PROM */ -void PMON_v2_setup(void) -{ - /* A wired TLB entry for the GT64240 and the serial port. The - GT64240 is going to be hit on every IRQ anyway - there's - absolutely no point in letting it be a random TLB entry, as - it'll just cause needless churning of the TLB. And we use - the other half for the serial port, which is just a PITA - otherwise :) - - Device Physical Virtual - GT64240 Internal Regs 0xf4000000 0xe0000000 - UARTs (CS2) 0xfd000000 0xe0001000 - */ - add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), - 0xf4000000, PM_64K); - add_wired_entry(ENTRYLO(0xfd000000), ENTRYLO(0xfd001000), - 0xfd000000, PM_4K); - - /* Also a temporary entry to let us talk to the Ocelot PLD and NVRAM - in the CS[012] region. We can't use ioremap() yet. The NVRAM - is a ST M48T37Y, which includes NVRAM, RTC, and Watchdog functions. - - Ocelot PLD (CS0) 0xfc000000 0xe0020000 - NVRAM (CS1) 0xfc800000 0xe0030000 - */ - add_temporary_entry(ENTRYLO(0xfc000000), ENTRYLO(0xfc010000), - 0xfc000000, PM_64K); - add_temporary_entry(ENTRYLO(0xfc800000), ENTRYLO(0xfc810000), - 0xfc800000, PM_64K); - - marvell_base = 0xf4000000; -} - -extern int rm7k_tcache_enabled; - -/* - * This runs in KSEG1. See the verbiage in rm7k.c::probe_scache() - */ -#define Page_Invalidate_T 0x16 -static void __init setup_l3cache(unsigned long size) -{ - int register i; - - printk("Enabling L3 cache..."); - - /* Enable the L3 cache in the GT64120A's CPU Configuration register */ - MV_WRITE(0, MV_READ(0) | (1<<14)); - - /* Enable the L3 cache in the CPU */ - set_c0_config(1<<12 /* CONF_TE */); - - /* Clear the cache */ - write_c0_taglo(0); - write_c0_taghi(0); - - for (i=0; i < size; i+= 4096) { - __asm__ __volatile__ ( - ".set noreorder\n\t" - ".set mips3\n\t" - "cache %1, (%0)\n\t" - ".set mips0\n\t" - ".set reorder" - : - : "r" (KSEG0ADDR(i)), - "i" (Page_Invalidate_T)); - } - - /* Let the RM7000 MM code know that the tertiary cache is enabled */ - rm7k_tcache_enabled = 1; - - printk("Done\n"); -} - -void __init plat_timer_setup(struct irqaction *irq) -{ -} - -void __init plat_mem_setup(void) -{ - void (*l3func)(unsigned long) = (void *) KSEG1ADDR(setup_l3cache); - unsigned int tmpword; - - board_time_init = gt64240_time_init; - - _machine_restart = momenco_ocelot_restart; - _machine_halt = momenco_ocelot_halt; - pm_power_off = momenco_ocelot_power_off; - - /* - * initrd_start = (unsigned long)ocelot_initrd_start; - * initrd_end = (unsigned long)ocelot_initrd_start + (ulong)ocelot_initrd_size; - * initrd_below_start_ok = 1; - */ - - /* do handoff reconfiguration */ - PMON_v2_setup(); - -#ifdef CONFIG_GALILEO_GT64240_ETH - /* get the mac addr */ - memcpy(prom_mac_addr_base, (void*)0xfc807cf2, 6); -#endif - - /* Turn off the Bit-Error LED */ - OCELOT_PLD_WRITE(0x80, INTCLR); - - tmpword = OCELOT_PLD_READ(BOARDREV); - if (tmpword < 26) - printk("Momenco Ocelot-G: Board Assembly Rev. %c\n", 'A'+tmpword); - else - printk("Momenco Ocelot-G: Board Assembly Revision #0x%x\n", tmpword); - - tmpword = OCELOT_PLD_READ(PLD1_ID); - printk("PLD 1 ID: %d.%d\n", tmpword>>4, tmpword&15); - tmpword = OCELOT_PLD_READ(PLD2_ID); - printk("PLD 2 ID: %d.%d\n", tmpword>>4, tmpword&15); - tmpword = OCELOT_PLD_READ(RESET_STATUS); - printk("Reset reason: 0x%x\n", tmpword); - reset_reason = tmpword; - OCELOT_PLD_WRITE(0xff, RESET_STATUS); - - tmpword = OCELOT_PLD_READ(BOARD_STATUS); - printk("Board Status register: 0x%02x\n", tmpword); - printk(" - User jumper: %s\n", (tmpword & 0x80)?"installed":"absent"); - printk(" - Boot flash write jumper: %s\n", (tmpword&0x40)?"installed":"absent"); - printk(" - Tulip PHY %s connected\n", (tmpword&0x10)?"is":"not"); - printk(" - L3 Cache size: %d MiB\n", (1<<((tmpword&12) >> 2))&~1); - printk(" - SDRAM size: %d MiB\n", 1<<(6+(tmpword&3))); - - if (tmpword&12) - l3func((1<<(((tmpword&12) >> 2)+20))); - - switch(tmpword &3) { - case 3: - /* 512MiB -- two banks of 256MiB */ - add_memory_region( 0x0<<20, 0x100<<20, BOOT_MEM_RAM); -/* - add_memory_region(0x100<<20, 0x100<<20, BOOT_MEM_RAM); -*/ - break; - case 2: - /* 256MiB -- two banks of 128MiB */ - add_memory_region( 0x0<<20, 0x80<<20, BOOT_MEM_RAM); - add_memory_region(0x80<<20, 0x80<<20, BOOT_MEM_RAM); - break; - case 1: - /* 128MiB -- 64MiB per bank */ - add_memory_region( 0x0<<20, 0x40<<20, BOOT_MEM_RAM); - add_memory_region(0x40<<20, 0x40<<20, BOOT_MEM_RAM); - break; - case 0: - /* 64MiB */ - add_memory_region( 0x0<<20, 0x40<<20, BOOT_MEM_RAM); - break; - } - - /* FIXME: Fix up the DiskOnChip mapping */ - MV_WRITE(0x468, 0xfef73); -} - -/* This needs to be one of the first initcalls, because no I/O port access - can work before this */ - -static int io_base_ioremap(void) -{ - /* we're mapping PCI accesses from 0xc0000000 to 0xf0000000 */ - unsigned long io_remap_range; - - io_remap_range = (unsigned long) ioremap(0xc0000000, 0x30000000); - if (!io_remap_range) - panic("Could not ioremap I/O port range"); - - set_io_port_base(io_remap_range - 0xc0000000); - - return 0; -} - -module_init(io_base_ioremap); diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index df487c0..30a1c79 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile @@ -34,7 +34,6 @@ obj-$(CONFIG_MOMENCO_JAGUAR_ATX)+= fixup-jaguar.o obj-$(CONFIG_MOMENCO_OCELOT) += fixup-ocelot.o pci-ocelot.o obj-$(CONFIG_MOMENCO_OCELOT_3) += fixup-ocelot3.o obj-$(CONFIG_MOMENCO_OCELOT_C) += fixup-ocelot-c.o pci-ocelot-c.o -obj-$(CONFIG_MOMENCO_OCELOT_G) += fixup-ocelot-g.o pci-ocelot-g.o obj-$(CONFIG_PMC_YOSEMITE) += fixup-yosemite.o ops-titan.o ops-titan-ht.o \ pci-yosemite.o obj-$(CONFIG_SGI_IP27) += ops-bridge.o pci-ip27.o diff --git a/arch/mips/pci/fixup-ocelot-g.c b/arch/mips/pci/fixup-ocelot-g.c deleted file mode 100644 index d7a652e..0000000 --- a/arch/mips/pci/fixup-ocelot-g.c +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * Copyright (C) 2004 Ralf Baechle (ralf@linux-mips.org) - */ -#include -#include -#include -#include - -int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) -{ - int bus = dev->bus->number; - - if (bus == 0 && slot == 1) /* Intel 82543 Gigabit MAC */ - return 2; /* irq_nr is 2 for INT0 */ - - if (bus == 0 && slot == 2) /* Intel 82543 Gigabit MAC */ - return 3; /* irq_nr is 3 for INT1 */ - - if (bus == 1 && slot == 3) /* Intel 21555 bridge */ - return 5; /* irq_nr is 8 for INT6 */ - - if (bus == 1 && slot == 4) /* PMC Slot */ - return 9; /* irq_nr is 9 for INT7 */ - - return -1; -} - -/* Do platform specific device initialization at pci_enable_device() time */ -int pcibios_plat_dev_init(struct pci_dev *dev) -{ - return 0; -} diff --git a/arch/mips/pci/pci-ocelot-g.c b/arch/mips/pci/pci-ocelot-g.c deleted file mode 100644 index 1e34301..0000000 --- a/arch/mips/pci/pci-ocelot-g.c +++ /dev/null @@ -1,97 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) - * - * This doesn't really fly - but I don't have a GT64240 system for testing. - */ -#include -#include -#include -#include -#include - -/* - * We assume these address ranges have been programmed into the GT-64240 by - * the firmware. PMON in case of the Ocelot G does that. Note the size of - * the I/O range is completly stupid; I/O mappings are limited to at most - * 256 bytes by the PCI spec and deprecated; and just to make things worse - * apparently many devices don't decode more than 64k of I/O space. - */ - -#define gt_io_size 0x20000000UL -#define gt_io_base 0xe0000000UL - -static struct resource gt_pci_mem0_resource = { - .name = "MV64240 PCI0 MEM", - .start = 0xc0000000UL, - .end = 0xcfffffffUL, - .flags = IORESOURCE_MEM -}; - -static struct resource gt_pci_io_mem0_resource = { - .name = "MV64240 PCI0 IO MEM", - .start = 0xe0000000UL, - .end = 0xefffffffUL, - .flags = IORESOURCE_IO -}; - -static struct mv_pci_controller gt_bus0_controller = { - .pcic = { - .pci_ops = &mv_pci_ops, - .mem_resource = >_pci_mem0_resource, - .mem_offset = 0xc0000000UL, - .io_resource = >_pci_io_mem0_resource, - .io_offset = 0x00000000UL - }, - .config_addr = PCI_0CONFIGURATION_ADDRESS, - .config_vreg = PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER, -}; - -static struct resource gt_pci_mem1_resource = { - .name = "MV64240 PCI1 MEM", - .start = 0xd0000000UL, - .end = 0xdfffffffUL, - .flags = IORESOURCE_MEM -}; - -static struct resource gt_pci_io_mem1_resource = { - .name = "MV64240 PCI1 IO MEM", - .start = 0xf0000000UL, - .end = 0xffffffffUL, - .flags = IORESOURCE_IO -}; - -static struct mv_pci_controller gt_bus1_controller = { - .pcic = { - .pci_ops = &mv_pci_ops, - .mem_resource = >_pci_mem1_resource, - .mem_offset = 0xd0000000UL, - .io_resource = >_pci_io_mem1_resource, - .io_offset = 0x10000000UL - }, - .config_addr = PCI_1CONFIGURATION_ADDRESS, - .config_vreg = PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER, -}; - -static __init int __init ocelot_g_pci_init(void) -{ - unsigned long io_v_base; - - if (gt_io_size) { - io_v_base = (unsigned long) ioremap(gt_io_base, gt_io_size); - if (!io_v_base) - panic("Could not ioremap I/O port range"); - - set_io_port_base(io_v_base); - } - - register_pci_controller(>_bus0_controller.pcic); - register_pci_controller(>_bus1_controller.pcic); - - return 0; -} - -arch_initcall(ocelot_g_pci_init); -- 1.5.1.3 From vagabon.xyz@gmail.com Mon May 7 12:10:12 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 07 May 2007 12:10:16 +0100 (BST) Received: from wx-out-0506.google.com ([66.249.82.236]:37202 "EHLO wx-out-0506.google.com") by ftp.linux-mips.org with ESMTP id S20022031AbXEGLJd (ORCPT ); Mon, 7 May 2007 12:09:33 +0100 Received: by wx-out-0506.google.com with SMTP id s14so746131wxc for ; Mon, 07 May 2007 04:09:25 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=FVN0k63OBDKwMsFUldwFegydKsS1aOQRBwe7bFT4fWj7XNQkuaFD2Q8TV96J/wNEVA/g+dar+JOD4gKOajLqQBD4hz7LjwltV5dbK40QC2yG+ufnH7NZHxkzxdE+BLImu8cC/GkGfvZS1nvdrKrlRYNXwYuDLID6xCBzcrMDC+k= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=finoUPP8FOFklLsc4X2qZGH/f/gWw8AWFSfIOSDxGJIuQbj1OUGOtRPItUmy/2tfas7Tcr+3uhm6CwsZLKR7ui/0yvQFGd2DpEzTpdNeuO1r/+WnjJVLhU3kTiGAXE0LSkFyTO3mdYrfOxyunKdOFWbsCR7nU042xiDF+bVzQ1Y= Received: by 10.90.116.6 with SMTP id o6mr1870284agc.1178536165522; Mon, 07 May 2007 04:09:25 -0700 (PDT) Received: from spoutnik.innova-card.com ( [81.252.61.1]) by mx.google.com with ESMTP id 44sm7871952wri.2007.05.07.04.09.20; Mon, 07 May 2007 04:09:23 -0700 (PDT) Received: by spoutnik.innova-card.com (Postfix, from userid 500) id 8FF4223F770; Mon, 7 May 2007 13:11:13 +0200 (CEST) To: ralf@linux-mips.org Cc: anemo@mba.ocn.ne.jp, linux-mips@linux-mips.org Subject: [PATCH 2/3] Remove Momenco Jaguar ATX support Date: Mon, 7 May 2007 13:11:12 +0200 Message-Id: <11785362732732-git-send-email-fbuihuu@gmail.com> X-Mailer: git-send-email 1.5.1.3 In-Reply-To: <11785362732731-git-send-email-fbuihuu@gmail.com> References: <11785362732731-git-send-email-fbuihuu@gmail.com> From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14974 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips From: Franck Bui-Huu Jaguar ATX support is deprecated and scheduled for removal since June 2006. It has some hackish code and it odd DMA results in the need to support old feature in kernel code. Signed-off-by: Franck Bui-Huu --- arch/mips/Kconfig | 23 - arch/mips/Makefile | 11 - arch/mips/configs/jaguar-atx_defconfig | 897 ----------------------- arch/mips/momentum/Kconfig | 6 - arch/mips/momentum/jaguar_atx/Makefile | 12 - arch/mips/momentum/jaguar_atx/dbg_io.c | 125 ---- arch/mips/momentum/jaguar_atx/irq.c | 94 --- arch/mips/momentum/jaguar_atx/ja-console.c | 101 --- arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h | 54 -- arch/mips/momentum/jaguar_atx/platform.c | 208 ------ arch/mips/momentum/jaguar_atx/prom.c | 210 ------ arch/mips/momentum/jaguar_atx/reset.c | 56 -- arch/mips/momentum/jaguar_atx/setup.c | 475 ------------ arch/mips/pci/Makefile | 1 - arch/mips/pci/fixup-jaguar.c | 43 -- 15 files changed, 0 insertions(+), 2316 deletions(-) delete mode 100644 arch/mips/configs/jaguar-atx_defconfig delete mode 100644 arch/mips/momentum/Kconfig delete mode 100644 arch/mips/momentum/jaguar_atx/Makefile delete mode 100644 arch/mips/momentum/jaguar_atx/dbg_io.c delete mode 100644 arch/mips/momentum/jaguar_atx/irq.c delete mode 100644 arch/mips/momentum/jaguar_atx/ja-console.c delete mode 100644 arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h delete mode 100644 arch/mips/momentum/jaguar_atx/platform.c delete mode 100644 arch/mips/momentum/jaguar_atx/prom.c delete mode 100644 arch/mips/momentum/jaguar_atx/reset.c delete mode 100644 arch/mips/momentum/jaguar_atx/setup.c delete mode 100644 arch/mips/pci/fixup-jaguar.c diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index ab79b98..28caf80 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -369,28 +369,6 @@ config MIPS_SIM This option enables support for MIPS Technologies MIPSsim software emulator. -config MOMENCO_JAGUAR_ATX - bool "Momentum Jaguar board" - select BOOT_ELF32 - select DMA_NONCOHERENT - select HW_HAS_PCI - select IRQ_CPU - select IRQ_CPU_RM7K - select IRQ_MV64340 - select LIMITED_DMA - select PCI_MARVELL - select RM7000_CPU_SCACHE - select SWAP_IO_SPACE - select SYS_HAS_CPU_RM9000 - select SYS_HAS_EARLY_PRINTK - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL - select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_KGDB - help - The Jaguar ATX is a MIPS-based Single Board Computer (SBC) made by - Momentum Computer . - config MOMENCO_OCELOT bool "Momentum Ocelot board" select DMA_NONCOHERENT @@ -808,7 +786,6 @@ source "arch/mips/ddb5xxx/Kconfig" source "arch/mips/gt64120/ev64120/Kconfig" source "arch/mips/jazz/Kconfig" source "arch/mips/lasat/Kconfig" -source "arch/mips/momentum/Kconfig" source "arch/mips/pmc-sierra/Kconfig" source "arch/mips/sgi-ip27/Kconfig" source "arch/mips/sibyte/Kconfig" diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 3e8a777..38817f5 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -379,17 +379,6 @@ cflags-$(CONFIG_BASLER_EXCITE) += -Iinclude/asm-mips/mach-excite load-$(CONFIG_BASLER_EXCITE) += 0x80100000 # -# Momentum Jaguar ATX -# -core-$(CONFIG_MOMENCO_JAGUAR_ATX) += arch/mips/momentum/jaguar_atx/ -cflags-$(CONFIG_MOMENCO_JAGUAR_ATX) += -Iinclude/asm-mips/mach-ja -#ifdef CONFIG_JAGUAR_DMALOW -#load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff88000000 -#else -load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff80100000 -#endif - -# # NEC DDB # core-$(CONFIG_DDB5XXX_COMMON) += arch/mips/ddb5xxx/common/ diff --git a/arch/mips/configs/jaguar-atx_defconfig b/arch/mips/configs/jaguar-atx_defconfig deleted file mode 100644 index 083104d..0000000 --- a/arch/mips/configs/jaguar-atx_defconfig +++ /dev/null @@ -1,897 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.20 -# Tue Feb 20 21:47:33 2007 -# -CONFIG_MIPS=y - -# -# Machine selection -# -CONFIG_ZONE_DMA=y -# CONFIG_MIPS_MTX1 is not set -# CONFIG_MIPS_BOSPORUS is not set -# CONFIG_MIPS_PB1000 is not set -# CONFIG_MIPS_PB1100 is not set -# CONFIG_MIPS_PB1500 is not set -# CONFIG_MIPS_PB1550 is not set -# CONFIG_MIPS_PB1200 is not set -# CONFIG_MIPS_DB1000 is not set -# CONFIG_MIPS_DB1100 is not set -# CONFIG_MIPS_DB1500 is not set -# CONFIG_MIPS_DB1550 is not set -# CONFIG_MIPS_DB1200 is not set -# CONFIG_MIPS_MIRAGE is not set -# CONFIG_BASLER_EXCITE is not set -# CONFIG_MIPS_COBALT is not set -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MIPS_EV64120 is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_LASAT is not set -# CONFIG_MIPS_ATLAS is not set -# CONFIG_MIPS_MALTA is not set -# CONFIG_MIPS_SEAD is not set -# CONFIG_WR_PPMC is not set -# CONFIG_MIPS_SIM is not set -CONFIG_MOMENCO_JAGUAR_ATX=y -# CONFIG_MOMENCO_OCELOT is not set -# CONFIG_MOMENCO_OCELOT_3 is not set -# CONFIG_MOMENCO_OCELOT_C is not set -# CONFIG_MOMENCO_OCELOT_G is not set -# CONFIG_MIPS_XXS1500 is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_STB810 is not set -# CONFIG_DDB5477 is not set -# CONFIG_MACH_VR41XX is not set -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_QEMU is not set -# CONFIG_MARKEINS is not set -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_SWARM is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_PTSWARM is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM is not set -# CONFIG_TOSHIBA_JMR3927 is not set -# CONFIG_TOSHIBA_RBTX4927 is not set -# CONFIG_TOSHIBA_RBTX4938 is not set -CONFIG_JAGUAR_DMALOW=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_TIME=y -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y -# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set -CONFIG_DMA_NONCOHERENT=y -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_LIMITED_DMA=y -CONFIG_CPU_BIG_ENDIAN=y -# CONFIG_CPU_LITTLE_ENDIAN is not set -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_IRQ_CPU=y -CONFIG_IRQ_CPU_RM7K=y -CONFIG_IRQ_MV64340=y -CONFIG_PCI_MARVELL=y -CONFIG_SWAP_IO_SPACE=y -CONFIG_BOOT_ELF32=y -CONFIG_MIPS_L1_CACHE_SHIFT=5 - -# -# CPU selection -# -# CONFIG_CPU_MIPS32_R1 is not set -# CONFIG_CPU_MIPS32_R2 is not set -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_VR41XX is not set -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_NEVADA is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_R10000 is not set -# CONFIG_CPU_RM7000 is not set -CONFIG_CPU_RM9000=y -# CONFIG_CPU_SB1 is not set -CONFIG_SYS_HAS_CPU_RM9000=y -CONFIG_WEAK_ORDERING=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y - -# -# Kernel type -# -CONFIG_32BIT=y -# CONFIG_64BIT is not set -CONFIG_PAGE_SIZE_4KB=y -# CONFIG_PAGE_SIZE_8KB is not set -# CONFIG_PAGE_SIZE_16KB is not set -# CONFIG_PAGE_SIZE_64KB is not set -CONFIG_BOARD_SCACHE=y -CONFIG_RM7000_CPU_SCACHE=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -# CONFIG_MIPS_VPE_LOADER is not set -# CONFIG_64BIT_PHYS_ADDR is not set -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_HIGHMEM=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -CONFIG_SYS_SUPPORTS_HIGHMEM=y -CONFIG_ARCH_FLATMEM_ENABLE=y -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_RESOURCES_64BIT is not set -CONFIG_ZONE_DMA_FLAG=1 -# CONFIG_HZ_48 is not set -# CONFIG_HZ_100 is not set -# CONFIG_HZ_128 is not set -# CONFIG_HZ_250 is not set -# CONFIG_HZ_256 is not set -CONFIG_HZ_1000=y -# CONFIG_HZ_1024 is not set -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_HZ=1000 -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - -# -# Code maturity level options -# -# CONFIG_EXPERIMENTAL is not set -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# -CONFIG_LOCALVERSION="" -CONFIG_LOCALVERSION_AUTO=y -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_IPC_NS is not set -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_UTS_NS is not set -# CONFIG_AUDIT is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_SYSFS_DEPRECATED=y -CONFIG_RELAY=y -CONFIG_SYSCTL=y -CONFIG_EMBEDDED=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SHMEM=y -CONFIG_SLAB=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_RT_MUTEXES=y -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 -# CONFIG_SLOB is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODVERSIONS is not set -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_KMOD=y - -# -# Block layer -# -CONFIG_BLOCK=y -# CONFIG_LBD is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_LSF is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -CONFIG_DEFAULT_AS=y -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="anticipatory" - -# -# Bus options (PCI, PCMCIA, EISA, ISA, TC) -# -CONFIG_HW_HAS_PCI=y -CONFIG_PCI=y -CONFIG_MMU=y - -# -# PCCARD (PCMCIA/CardBus) support -# -# CONFIG_PCCARD is not set - -# -# PCI Hotplug Support -# - -# -# Executable file formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_TRAD_SIGNALS=y - -# -# Power management options -# -CONFIG_PM=y -# CONFIG_PM_LEGACY is not set -# CONFIG_PM_DEBUG is not set -# CONFIG_PM_SYSFS_DEPRECATED is not set - -# -# Networking -# -CONFIG_NET=y - -# -# Networking options -# -# CONFIG_NETDEBUG is not set -# CONFIG_PACKET is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -CONFIG_XFRM_USER=m -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -# CONFIG_IP_PNP_DHCP is not set -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=m -CONFIG_INET_XFRM_MODE_TUNNEL=m -CONFIG_INET_XFRM_MODE_BEET=m -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -CONFIG_IPV6=m -CONFIG_IPV6_PRIVACY=y -CONFIG_IPV6_ROUTER_PREF=y -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -CONFIG_INET6_IPCOMP=m -CONFIG_INET6_XFRM_TUNNEL=m -CONFIG_INET6_TUNNEL=m -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -CONFIG_IPV6_SIT=m -CONFIG_IPV6_TUNNEL=m -CONFIG_NETWORK_SECMARK=y -# CONFIG_NETFILTER is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -CONFIG_IEEE80211=m -# CONFIG_IEEE80211_DEBUG is not set -CONFIG_IEEE80211_CRYPT_WEP=m -CONFIG_IEEE80211_CRYPT_CCMP=m - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=m -# CONFIG_SYS_HYPERVISOR is not set - -# -# Connector - unified userspace <-> kernelspace linker -# -CONFIG_CONNECTOR=m - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# -# CONFIG_PNPACPI is not set - -# -# Block devices -# -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_SX8 is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_CDROM_PKTCDVD=m -CONFIG_CDROM_PKTCDVD_BUFFERS=8 -CONFIG_ATA_OVER_ETH=m - -# -# Misc devices -# -CONFIG_SGI_IOC4=m - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -CONFIG_RAID_ATTRS=m -# CONFIG_SCSI is not set -# CONFIG_SCSI_NETLINK is not set - -# -# Serial ATA (prod) and Parallel ATA (experimental) drivers -# -# CONFIG_ATA is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Network device support -# -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# PHY device support -# -CONFIG_PHYLIB=m - -# -# MII PHY device drivers -# -CONFIG_MARVELL_PHY=m -CONFIG_DAVICOM_PHY=m -CONFIG_QSEMI_PHY=m -CONFIG_LXT_PHY=m -CONFIG_CICADA_PHY=m -CONFIG_VITESSE_PHY=m -CONFIG_SMSC_PHY=m -# CONFIG_BROADCOM_PHY is not set -# CONFIG_FIXED_PHY is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_CASSINI is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_DM9000 is not set - -# -# Tulip family network device support -# -# CONFIG_NET_TULIP is not set -# CONFIG_HP100 is not set -CONFIG_NET_PCI=y -# CONFIG_PCNET32 is not set -# CONFIG_AMD8111_ETH is not set -# CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_B44 is not set -# CONFIG_FORCEDETH is not set -# CONFIG_DGRS is not set -CONFIG_EEPRO100=y -# CONFIG_E100 is not set -# CONFIG_FEALNX is not set -# CONFIG_NATSEMI is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_8139TOO is not set -# CONFIG_SIS900 is not set -# CONFIG_EPIC100 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_TLAN is not set -# CONFIG_VIA_RHINE is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_R8169 is not set -# CONFIG_SIS190 is not set -# CONFIG_SKGE is not set -# CONFIG_SKY2 is not set -# CONFIG_SK98LIN is not set -# CONFIG_VIA_VELOCITY is not set -# CONFIG_TIGON3 is not set -# CONFIG_BNX2 is not set -CONFIG_MV643XX_ETH=y -CONFIG_QLA3XXX=m - -# -# Ethernet (10000 Mbit) -# -# CONFIG_CHELSIO_T1 is not set -CONFIG_CHELSIO_T3=m -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set -# CONFIG_MYRI10GE is not set -CONFIG_NETXEN_NIC=m - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -# CONFIG_INPUT is not set - -# -# Hardware I/O ports -# -# CONFIG_SERIO is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_PCI=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_JSM is not set -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_HW_RANDOM is not set -# CONFIG_RTC is not set -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# SPI support -# -# CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set - -# -# Dallas's 1-wire bus -# -# CONFIG_W1 is not set - -# -# Hardware Monitoring support -# -# CONFIG_HWMON is not set -# CONFIG_HWMON_VID is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -# CONFIG_USB is not set - -# -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -# - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# MMC/SD Card support -# -# CONFIG_MMC is not set - -# -# LED devices -# -# CONFIG_NEW_LEDS is not set - -# -# LED drivers -# - -# -# LED Triggers -# - -# -# InfiniBand support -# -# CONFIG_INFINIBAND is not set - -# -# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) -# - -# -# Real Time Clock -# - -# -# DMA Engine support -# -# CONFIG_DMA_ENGINE is not set - -# -# DMA Clients -# - -# -# DMA Devices -# - -# -# Auxiliary Display support -# - -# -# Virtualization -# - -# -# File systems -# -# CONFIG_EXT2_FS is not set -# CONFIG_EXT3_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -CONFIG_FS_POSIX_ACL=y -# CONFIG_XFS_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -CONFIG_FUSE_FS=m -CONFIG_GENERIC_ACL=y - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_PROC_SYSCTL=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_HFSPLUS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -# CONFIG_NFS_V3 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Kernel hacking -# -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_MUST_CHECK=y -# CONFIG_MAGIC_SYSRQ is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_FS is not set -# CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_KERNEL is not set -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_CROSSCOMPILE=y -CONFIG_CMDLINE="" -CONFIG_SYS_SUPPORTS_KGDB=y - -# -# Security options -# -CONFIG_KEYS=y -CONFIG_KEYS_DEBUG_PROC_KEYS=y -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -CONFIG_CRYPTO=y -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_BLKCIPHER=m -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=m -CONFIG_CRYPTO_SHA1=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_WP512=m -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_CBC=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_DES=m -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_TWOFISH_COMMON=m -CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_AES=m -CONFIG_CRYPTO_CAST5=m -CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_ARC4=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_DEFLATE=m -CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_CRC32C=m -CONFIG_CRYPTO_CAMELLIA=m -# CONFIG_CRYPTO_TEST is not set - -# -# Hardware crypto devices -# - -# -# Library routines -# -CONFIG_BITREVERSE=m -# CONFIG_CRC_CCITT is not set -CONFIG_CRC16=m -CONFIG_CRC32=m -CONFIG_LIBCRC32C=m -CONFIG_ZLIB_INFLATE=m -CONFIG_ZLIB_DEFLATE=m -CONFIG_PLIST=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y diff --git a/arch/mips/momentum/Kconfig b/arch/mips/momentum/Kconfig deleted file mode 100644 index 70a61cf..0000000 --- a/arch/mips/momentum/Kconfig +++ /dev/null @@ -1,6 +0,0 @@ -config JAGUAR_DMALOW - bool "Low DMA Mode" - depends on MOMENCO_JAGUAR_ATX - help - Select to Y if jump JP5 is set on your board, N otherwise. Normally - the jumper is set, so if you feel unsafe, just say Y. diff --git a/arch/mips/momentum/jaguar_atx/Makefile b/arch/mips/momentum/jaguar_atx/Makefile deleted file mode 100644 index 2e8cebd..0000000 --- a/arch/mips/momentum/jaguar_atx/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# Makefile for Momentum Computer's Jaguar-ATX board. -# -# Note! Dependencies are done automagically by 'make dep', which also -# removes any old dependencies. DON'T put your own dependencies here -# unless it's something special (ie not a .c file). -# - -obj-y += irq.o platform.o prom.o reset.o setup.o - -obj-$(CONFIG_SERIAL_8250_CONSOLE) += ja-console.o -obj-$(CONFIG_REMOTE_DEBUG) += dbg_io.o diff --git a/arch/mips/momentum/jaguar_atx/dbg_io.c b/arch/mips/momentum/jaguar_atx/dbg_io.c deleted file mode 100644 index b85a652..0000000 --- a/arch/mips/momentum/jaguar_atx/dbg_io.c +++ /dev/null @@ -1,125 +0,0 @@ - -#if defined(CONFIG_REMOTE_DEBUG) - -#include /* For the serial port location and base baud */ - -/* --- CONFIG --- */ - -typedef unsigned char uint8; -typedef unsigned int uint32; - -/* --- END OF CONFIG --- */ - -#define UART16550_BAUD_2400 2400 -#define UART16550_BAUD_4800 4800 -#define UART16550_BAUD_9600 9600 -#define UART16550_BAUD_19200 19200 -#define UART16550_BAUD_38400 38400 -#define UART16550_BAUD_57600 57600 -#define UART16550_BAUD_115200 115200 - -#define UART16550_PARITY_NONE 0 -#define UART16550_PARITY_ODD 0x08 -#define UART16550_PARITY_EVEN 0x18 -#define UART16550_PARITY_MARK 0x28 -#define UART16550_PARITY_SPACE 0x38 - -#define UART16550_DATA_5BIT 0x0 -#define UART16550_DATA_6BIT 0x1 -#define UART16550_DATA_7BIT 0x2 -#define UART16550_DATA_8BIT 0x3 - -#define UART16550_STOP_1BIT 0x0 -#define UART16550_STOP_2BIT 0x4 - -/* ----------------------------------------------------- */ - -/* === CONFIG === */ - -/* [jsun] we use the second serial port for kdb */ -#define BASE OCELOT_SERIAL1_BASE -#define MAX_BAUD OCELOT_BASE_BAUD - -/* === END OF CONFIG === */ - -#define REG_OFFSET 4 - -/* register offset */ -#define OFS_RCV_BUFFER 0 -#define OFS_TRANS_HOLD 0 -#define OFS_SEND_BUFFER 0 -#define OFS_INTR_ENABLE (1*REG_OFFSET) -#define OFS_INTR_ID (2*REG_OFFSET) -#define OFS_DATA_FORMAT (3*REG_OFFSET) -#define OFS_LINE_CONTROL (3*REG_OFFSET) -#define OFS_MODEM_CONTROL (4*REG_OFFSET) -#define OFS_RS232_OUTPUT (4*REG_OFFSET) -#define OFS_LINE_STATUS (5*REG_OFFSET) -#define OFS_MODEM_STATUS (6*REG_OFFSET) -#define OFS_RS232_INPUT (6*REG_OFFSET) -#define OFS_SCRATCH_PAD (7*REG_OFFSET) - -#define OFS_DIVISOR_LSB (0*REG_OFFSET) -#define OFS_DIVISOR_MSB (1*REG_OFFSET) - - -/* memory-mapped read/write of the port */ -#define UART16550_READ(y) (*((volatile uint8*)(BASE + y))) -#define UART16550_WRITE(y, z) ((*((volatile uint8*)(BASE + y))) = z) - -void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop) -{ - /* disable interrupts */ - UART16550_WRITE(OFS_INTR_ENABLE, 0); - - /* set up baud rate */ - { - uint32 divisor; - - /* set DIAB bit */ - UART16550_WRITE(OFS_LINE_CONTROL, 0x80); - - /* set divisor */ - divisor = MAX_BAUD / baud; - UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff); - UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8); - - /* clear DIAB bit */ - UART16550_WRITE(OFS_LINE_CONTROL, 0x0); - } - - /* set data format */ - UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop); -} - -static int remoteDebugInitialized = 0; - -uint8 getDebugChar(void) -{ - if (!remoteDebugInitialized) { - remoteDebugInitialized = 1; - debugInit(UART16550_BAUD_38400, - UART16550_DATA_8BIT, - UART16550_PARITY_NONE, UART16550_STOP_1BIT); - } - - while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0); - return UART16550_READ(OFS_RCV_BUFFER); -} - - -int putDebugChar(uint8 byte) -{ - if (!remoteDebugInitialized) { - remoteDebugInitialized = 1; - debugInit(UART16550_BAUD_38400, - UART16550_DATA_8BIT, - UART16550_PARITY_NONE, UART16550_STOP_1BIT); - } - - while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0); - UART16550_WRITE(OFS_SEND_BUFFER, byte); - return 1; -} - -#endif diff --git a/arch/mips/momentum/jaguar_atx/irq.c b/arch/mips/momentum/jaguar_atx/irq.c deleted file mode 100644 index f2b4325..0000000 --- a/arch/mips/momentum/jaguar_atx/irq.c +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Copyright (C) 2002 Momentum Computer, Inc. - * Author: Matthew Dharm, mdharm@momenco.com - * - * Based on work by: - * Copyright (C) 2000 RidgeRun, Inc. - * Author: RidgeRun, Inc. - * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com - * - * Copyright 2001 MontaVista Software Inc. - * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net - * - * Copyright (C) 2000, 01, 06 Ralf Baechle (ralf@linux-mips.org) - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#include -#include -#include -#include -#include -#include -#include - -asmlinkage void plat_irq_dispatch(void) -{ - unsigned int pending = read_c0_cause() & read_c0_status(); - - if (pending & STATUSF_IP0) - do_IRQ(0); - else if (pending & STATUSF_IP1) - do_IRQ(1); - else if (pending & STATUSF_IP2) - do_IRQ(2); - else if (pending & STATUSF_IP3) - do_IRQ(3); - else if (pending & STATUSF_IP4) - do_IRQ(4); - else if (pending & STATUSF_IP5) - do_IRQ(5); - else if (pending & STATUSF_IP6) - do_IRQ(6); - else if (pending & STATUSF_IP7) - ll_timer_interrupt(7); - else { - /* - * Now look at the extended interrupts - */ - pending = (read_c0_cause() & (read_c0_intcontrol() << 8)) >> 16; - if (pending & STATUSF_IP8) - ll_mv64340_irq(); - } -} - -static struct irqaction cascade_mv64340 = { - no_action, IRQF_DISABLED, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL -}; - -void __init arch_init_irq(void) -{ - /* - * Clear all of the interrupts while we change the able around a bit. - * int-handler is not on bootstrap - */ - clear_c0_status(ST0_IM); - - mips_cpu_irq_init(); - rm7k_cpu_irq_init(); - - /* set up the cascading interrupts */ - setup_irq(8, &cascade_mv64340); - - mv64340_irq_init(16); - - set_c0_status(ST0_IM); -} diff --git a/arch/mips/momentum/jaguar_atx/ja-console.c b/arch/mips/momentum/jaguar_atx/ja-console.c deleted file mode 100644 index 2c30b4f..0000000 --- a/arch/mips/momentum/jaguar_atx/ja-console.c +++ /dev/null @@ -1,101 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2001, 2002, 2004 Ralf Baechle - */ -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -/* SUPERIO uart register map */ -struct ja_uartregs { - union { - volatile u8 pad0[3]; - volatile u8 rbr; /* read only, DLAB == 0 */ - volatile u8 pad1[3]; - volatile u8 thr; /* write only, DLAB == 0 */ - volatile u8 pad2[3]; - volatile u8 dll; /* DLAB == 1 */ - } u1; - union { - volatile u8 pad0[3]; - volatile u8 ier; /* DLAB == 0 */ - volatile u8 pad1[3]; - volatile u8 dlm; /* DLAB == 1 */ - } u2; - union { - volatile u8 pad0[3]; - volatile u8 iir; /* read only */ - volatile u8 pad1[3]; - volatile u8 fcr; /* write only */ - } u3; - volatile u8 pad0[3]; - volatile u8 iu_lcr; - volatile u8 pad1[3]; - volatile u8 iu_mcr; - volatile u8 pad2[3]; - volatile u8 iu_lsr; - volatile u8 pad3[3]; - volatile u8 iu_msr; - volatile u8 pad4[3]; - volatile u8 iu_scr; -} ja_uregs_t; - -#define iu_rbr u1.rbr -#define iu_thr u1.thr -#define iu_dll u1.dll -#define iu_ier u2.ier -#define iu_dlm u2.dlm -#define iu_iir u3.iir -#define iu_fcr u3.fcr - -extern unsigned long uart_base; - -static inline struct ja_uartregs *console_uart(void) -{ - return (struct ja_uartregs *) (uart_base + 0x23UL); -} - -void prom_putchar(char c) -{ - struct ja_uartregs *uart = console_uart(); - - while ((uart->iu_lsr & 0x20) == 0); - uart->iu_thr = c; -} - -static void inline ja_console_probe(void) -{ - struct uart_port up; - - /* - * Register to interrupt zero because we share the interrupt with - * the serial driver which we don't properly support yet. - */ - memset(&up, 0, sizeof(up)); - up.membase = (unsigned char *) uart_base + 0x23UL; - up.irq = JAGUAR_ATX_SERIAL1_IRQ; - up.uartclk = JAGUAR_ATX_UART_CLK; - up.regshift = 2; - up.iotype = UPIO_MEM; - up.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST; - up.line = 0; - - if (early_serial_setup(&up)) - printk(KERN_ERR "Early serial init of port 0 failed\n"); -} - -__init void ja_setup_console(void) -{ - ja_console_probe(); -} diff --git a/arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h b/arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h deleted file mode 100644 index 022f697..0000000 --- a/arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Jaguar-ATX Board Register Definitions - * - * (C) 2002 Momentum Computer Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#ifndef __JAGUAR_ATX_FPGA_H__ -#define __JAGUAR_ATX_FPGA_H__ - -#define JAGUAR_ATX_REG_BOARDREV 0x0 -#define JAGUAR_ATX_REG_FPGA_REV 0x1 -#define JAGUAR_ATX_REG_FPGA_TYPE 0x2 -#define JAGUAR_ATX_REG_RESET_STATUS 0x3 -#define JAGUAR_ATX_REG_BOARD_STATUS 0x4 -#define JAGUAR_ATX_REG_RESERVED1 0x5 -#define JAGUAR_ATX_REG_SET 0x6 -#define JAGUAR_ATX_REG_CLR 0x7 -#define JAGUAR_ATX_REG_EEPROM_MODE 0x9 -#define JAGUAR_ATX_REG_RESERVED2 0xa -#define JAGUAR_ATX_REG_RESERVED3 0xb -#define JAGUAR_ATX_REG_RESERVED4 0xc -#define JAGUAR_ATX_REG_PHY_INTSTAT 0xd -#define JAGUAR_ATX_REG_RESERVED5 0xe -#define JAGUAR_ATX_REG_RESERVED6 0xf - -#define JAGUAR_ATX_CS0_ADDR 0xfc000000L - -extern unsigned long ja_fpga_base; - -#define __FPGA_REG_TO_ADDR(reg) \ - ((void *) ja_fpga_base + JAGUAR_ATX_REG_##reg) -#define JAGUAR_FPGA_WRITE(x, reg) writeb(x, __FPGA_REG_TO_ADDR(reg)) -#define JAGUAR_FPGA_READ(reg) readb(__FPGA_REG_TO_ADDR(reg)) - -#endif diff --git a/arch/mips/momentum/jaguar_atx/platform.c b/arch/mips/momentum/jaguar_atx/platform.c deleted file mode 100644 index 5618448..0000000 --- a/arch/mips/momentum/jaguar_atx/platform.c +++ /dev/null @@ -1,208 +0,0 @@ -#include -#include -#include -#include -#include - -#include "jaguar_atx_fpga.h" - -#if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) - -static struct resource mv643xx_eth_shared_resources[] = { - [0] = { - .name = "ethernet shared base", - .start = 0xf1000000 + MV643XX_ETH_SHARED_REGS, - .end = 0xf1000000 + MV643XX_ETH_SHARED_REGS + - MV643XX_ETH_SHARED_REGS_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device mv643xx_eth_shared_device = { - .name = MV643XX_ETH_SHARED_NAME, - .id = 0, - .num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources), - .resource = mv643xx_eth_shared_resources, -}; - -#define MV_SRAM_BASE 0xfe000000UL -#define MV_SRAM_SIZE (256 * 1024) - -#define MV_SRAM_RXRING_SIZE (MV_SRAM_SIZE / 4) -#define MV_SRAM_TXRING_SIZE (MV_SRAM_SIZE / 4) - -#define MV_SRAM_BASE_ETH0 MV_SRAM_BASE -#define MV_SRAM_BASE_ETH1 (MV_SRAM_BASE + (MV_SRAM_SIZE / 2)) - -#define MV64x60_IRQ_ETH_0 48 -#define MV64x60_IRQ_ETH_1 49 -#define MV64x60_IRQ_ETH_2 50 - -static struct resource mv64x60_eth0_resources[] = { - [0] = { - .name = "eth0 irq", - .start = MV64x60_IRQ_ETH_0, - .end = MV64x60_IRQ_ETH_0, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct mv643xx_eth_platform_data eth0_pd = { - .port_number = 0, - - .tx_sram_addr = MV_SRAM_BASE_ETH0, - .tx_sram_size = MV_SRAM_TXRING_SIZE, - .tx_queue_size = MV_SRAM_TXRING_SIZE / 16, - - .rx_sram_addr = MV_SRAM_BASE_ETH0 + MV_SRAM_TXRING_SIZE, - .rx_sram_size = MV_SRAM_RXRING_SIZE, - .rx_queue_size = MV_SRAM_RXRING_SIZE / 16, -}; - -static struct platform_device eth0_device = { - .name = MV643XX_ETH_NAME, - .id = 0, - .num_resources = ARRAY_SIZE(mv64x60_eth0_resources), - .resource = mv64x60_eth0_resources, - .dev = { - .platform_data = ð0_pd, - }, -}; - -static struct resource mv64x60_eth1_resources[] = { - [0] = { - .name = "eth1 irq", - .start = MV64x60_IRQ_ETH_1, - .end = MV64x60_IRQ_ETH_1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct mv643xx_eth_platform_data eth1_pd = { - .port_number = 1, - - .tx_sram_addr = MV_SRAM_BASE_ETH1, - .tx_sram_size = MV_SRAM_TXRING_SIZE, - .tx_queue_size = MV_SRAM_TXRING_SIZE / 16, - - .rx_sram_addr = MV_SRAM_BASE_ETH1 + MV_SRAM_TXRING_SIZE, - .rx_sram_size = MV_SRAM_RXRING_SIZE, - .rx_queue_size = MV_SRAM_RXRING_SIZE / 16, -}; - -static struct platform_device eth1_device = { - .name = MV643XX_ETH_NAME, - .id = 1, - .num_resources = ARRAY_SIZE(mv64x60_eth1_resources), - .resource = mv64x60_eth1_resources, - .dev = { - .platform_data = ð1_pd, - }, -}; - -static struct resource mv64x60_eth2_resources[] = { - [0] = { - .name = "eth2 irq", - .start = MV64x60_IRQ_ETH_2, - .end = MV64x60_IRQ_ETH_2, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct mv643xx_eth_platform_data eth2_pd = { - .port_number = 2, -}; - -static struct platform_device eth2_device = { - .name = MV643XX_ETH_NAME, - .id = 2, - .num_resources = ARRAY_SIZE(mv64x60_eth2_resources), - .resource = mv64x60_eth2_resources, - .dev = { - .platform_data = ð2_pd, - }, -}; - -static struct platform_device *mv643xx_eth_pd_devs[] __initdata = { - &mv643xx_eth_shared_device, - ð0_device, - ð1_device, - ð2_device, -}; - -static u8 __init exchange_bit(u8 val, u8 cs) -{ - /* place the data */ - JAGUAR_FPGA_WRITE((val << 2) | cs, EEPROM_MODE); - udelay(1); - - /* turn the clock on */ - JAGUAR_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE); - udelay(1); - - /* turn the clock off and read-strobe */ - JAGUAR_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE); - - /* return the data */ - return (JAGUAR_FPGA_READ(EEPROM_MODE) >> 3) & 0x1; -} - -static void __init get_mac(char dest[6]) -{ - u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; - int i,j; - - for (i = 0; i < 12; i++) - exchange_bit(read_opcode[i], 1); - - for (j = 0; j < 6; j++) { - dest[j] = 0; - for (i = 0; i < 8; i++) { - dest[j] <<= 1; - dest[j] |= exchange_bit(0, 1); - } - } - - /* turn off CS */ - exchange_bit(0,0); -} - -/* - * Copy and increment ethernet MAC address by a small value. - * - * This is useful for systems where the only one MAC address is stored in - * non-volatile memory for multiple ports. - */ -static inline void eth_mac_add(unsigned char *dst, unsigned char *src, - unsigned int add) -{ - int i; - - BUG_ON(add >= 256); - - for (i = ETH_ALEN; i >= 0; i--) { - dst[i] = src[i] + add; - add = dst[i] < src[i]; /* compute carry */ - } - - WARN_ON(add); -} - -static int __init mv643xx_eth_add_pds(void) -{ - unsigned char mac[ETH_ALEN]; - int ret; - - get_mac(mac); - eth_mac_add(eth0_pd.mac_addr, mac, 0); - eth_mac_add(eth1_pd.mac_addr, mac, 1); - eth_mac_add(eth2_pd.mac_addr, mac, 2); - ret = platform_add_devices(mv643xx_eth_pd_devs, - ARRAY_SIZE(mv643xx_eth_pd_devs)); - - return ret; -} - -device_initcall(mv643xx_eth_add_pds); - -#endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */ diff --git a/arch/mips/momentum/jaguar_atx/prom.c b/arch/mips/momentum/jaguar_atx/prom.c deleted file mode 100644 index 5dd154e..0000000 --- a/arch/mips/momentum/jaguar_atx/prom.c +++ /dev/null @@ -1,210 +0,0 @@ -/* - * Copyright 2002 Momentum Computer Inc. - * Author: Matthew Dharm - * - * Louis Hamilton, Red Hat, Inc. - * hamilton@redhat.com [MIPS64 modifications] - * - * Based on Ocelot Linux port, which is - * Copyright 2001 MontaVista Software Inc. - * Author: jsun@mvista.com or jsun@junsun.net - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * Added changes for SMP - Manish Lachwani (lachwani@pmc-sierra.com) - */ -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "jaguar_atx_fpga.h" - -extern void ja_setup_console(void); - -struct callvectors *debug_vectors; - -extern unsigned long cpu_clock; - -const char *get_system_type(void) -{ - return "Momentum Jaguar-ATX"; -} - -#ifdef CONFIG_64BIT - -unsigned long signext(unsigned long addr) -{ - addr &= 0xffffffff; - return (unsigned long)((int)addr); -} - -void *get_arg(unsigned long args, int arc) -{ - unsigned long ul; - unsigned char *puc, uc; - - args += (arc * 4); - ul = (unsigned long)signext(args); - puc = (unsigned char *)ul; - if (puc == 0) - return (void *)0; - -#ifdef CONFIG_CPU_LITTLE_ENDIAN - uc = *puc++; - l = (unsigned long)uc; - uc = *puc++; - ul |= (((unsigned long)uc) << 8); - uc = *puc++; - ul |= (((unsigned long)uc) << 16); - uc = *puc++; - ul |= (((unsigned long)uc) << 24); -#else - uc = *puc++; - ul = ((unsigned long)uc) << 24; - uc = *puc++; - ul |= (((unsigned long)uc) << 16); - uc = *puc++; - ul |= (((unsigned long)uc) << 8); - uc = *puc++; - ul |= ((unsigned long)uc); -#endif - ul = signext(ul); - - return (void *)ul; -} - -char *arg64(unsigned long addrin, int arg_index) -{ - unsigned long args; - char *p; - - args = signext(addrin); - p = (char *)get_arg(args, arg_index); - - return p; -} -#endif /* CONFIG_64BIT */ - -/* PMON passes arguments in C main() style */ -void __init prom_init(void) -{ - int argc = fw_arg0; - char **arg = (char **) fw_arg1; - char **env = (char **) fw_arg2; - struct callvectors *cv = (struct callvectors *) fw_arg3; - int i; - -#ifdef CONFIG_SERIAL_8250_CONSOLE -// ja_setup_console(); /* The very first thing. */ -#endif - -#ifdef CONFIG_64BIT - char *ptr; - - printk("Mips64 Jaguar-ATX\n"); - /* save the PROM vectors for debugging use */ - debug_vectors = (struct callvectors *)signext((unsigned long)cv); - - /* arg[0] is "g", the rest is boot parameters */ - arcs_cmdline[0] = '\0'; - - for (i = 1; i < argc; i++) { - ptr = (char *)arg64((unsigned long)arg, i); - if ((strlen(arcs_cmdline) + strlen(ptr) + 1) >= - sizeof(arcs_cmdline)) - break; - strcat(arcs_cmdline, ptr); - strcat(arcs_cmdline, " "); - } - - i = 0; - while (1) { - ptr = (char *)arg64((unsigned long)env, i); - if (! ptr) - break; - - if (strncmp("gtbase", ptr, strlen("gtbase")) == 0) { - marvell_base = simple_strtol(ptr + strlen("gtbase="), - NULL, 16); - - if ((marvell_base & 0xffffffff00000000) == 0) - marvell_base |= 0xffffffff00000000; - - printk("marvell_base set to 0x%016lx\n", marvell_base); - } - if (strncmp("cpuclock", ptr, strlen("cpuclock")) == 0) { - cpu_clock = simple_strtol(ptr + strlen("cpuclock="), - NULL, 10); - printk("cpu_clock set to %d\n", cpu_clock); - } - i++; - } - printk("arcs_cmdline: %s\n", arcs_cmdline); - -#else /* CONFIG_64BIT */ - /* save the PROM vectors for debugging use */ - debug_vectors = cv; - - /* arg[0] is "g", the rest is boot parameters */ - arcs_cmdline[0] = '\0'; - for (i = 1; i < argc; i++) { - if (strlen(arcs_cmdline) + strlen(arg[i] + 1) - >= sizeof(arcs_cmdline)) - break; - strcat(arcs_cmdline, arg[i]); - strcat(arcs_cmdline, " "); - } - - while (*env) { - if (strncmp("gtbase", *env, strlen("gtbase")) == 0) { - marvell_base = simple_strtol(*env + strlen("gtbase="), - NULL, 16); - } - if (strncmp("cpuclock", *env, strlen("cpuclock")) == 0) { - cpu_clock = simple_strtol(*env + strlen("cpuclock="), - NULL, 10); - } - env++; - } -#endif /* CONFIG_64BIT */ - mips_machgroup = MACH_GROUP_MOMENCO; - mips_machtype = MACH_MOMENCO_JAGUAR_ATX; -} - -void __init prom_free_prom_memory(void) -{ -} - -void __init prom_fixup_mem_map(unsigned long start, unsigned long end) -{ -} - -int prom_boot_secondary(int cpu, unsigned long sp, unsigned long gp) -{ - /* Clear the semaphore */ - *(volatile uint32_t *)(0xbb000a68) = 0x80000000; - - return 1; -} - -void prom_init_secondary(void) -{ - clear_c0_config(CONF_CM_CMASK); - set_c0_config(0x2); - - clear_c0_status(ST0_IM); - set_c0_status(0x1ffff); -} - -void prom_smp_finish(void) -{ -} diff --git a/arch/mips/momentum/jaguar_atx/reset.c b/arch/mips/momentum/jaguar_atx/reset.c deleted file mode 100644 index c73b089..0000000 --- a/arch/mips/momentum/jaguar_atx/reset.c +++ /dev/null @@ -1,56 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * Copyright (C) 1997, 2001 Ralf Baechle - * Copyright 2001 MontaVista Software Inc. - * Author: jsun@mvista.com or jsun@junsun.net - * - * Copyright (C) 2002 Momentum Computer Inc. - * Author: Matthew Dharm - * - * Louis Hamilton, Red Hat, Inc. - * hamilton@redhat.com [MIPS64 modifications] - */ -#include -#include -#include -#include -#include -#include -#include -#include - -void momenco_jaguar_restart(char *command) -{ - /* base address of timekeeper portion of part */ -#ifdef CONFIG_64BIT - void *nvram = (void*) 0xfffffffffc807000; -#else - void *nvram = (void*) 0xfc807000; -#endif - /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */ - writeb(0x84, nvram + 0xff7); - - /* wait for the watchdog to go off */ - mdelay(100+(1000/16)); - - /* if the watchdog fails for some reason, let people know */ - printk(KERN_NOTICE "Watchdog reset failed\n"); -} - -void momenco_jaguar_halt(void) -{ - printk(KERN_NOTICE "\n** You can safely turn off the power\n"); - while (1) - __asm__(".set\tmips3\n\t" - "wait\n\t" - ".set\tmips0"); -} - -void momenco_jaguar_power_off(void) -{ - momenco_jaguar_halt(); -} diff --git a/arch/mips/momentum/jaguar_atx/setup.c b/arch/mips/momentum/jaguar_atx/setup.c deleted file mode 100644 index 5a51014..0000000 --- a/arch/mips/momentum/jaguar_atx/setup.c +++ /dev/null @@ -1,475 +0,0 @@ -/* - * BRIEF MODULE DESCRIPTION - * Momentum Computer Jaguar-ATX board dependent boot routines - * - * Copyright (C) 1996, 1997, 2001, 04, 06 Ralf Baechle (ralf@linux-mips.org) - * Copyright (C) 2000 RidgeRun, Inc. - * Copyright (C) 2001 Red Hat, Inc. - * Copyright (C) 2002 Momentum Computer - * - * Author: Matthew Dharm, Momentum Computer - * mdharm@momenco.com - * - * Louis Hamilton, Red Hat, Inc. - * hamilton@redhat.com [MIPS64 modifications] - * - * Author: RidgeRun, Inc. - * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com - * - * Copyright 2001 MontaVista Software Inc. - * Author: jsun@mvista.com or jsun@junsun.net - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "jaguar_atx_fpga.h" - -extern unsigned long mv64340_sram_base; -unsigned long cpu_clock; - -/* These functions are used for rebooting or halting the machine*/ -extern void momenco_jaguar_restart(char *command); -extern void momenco_jaguar_halt(void); -extern void momenco_jaguar_power_off(void); - -void momenco_time_init(void); - -static char reset_reason; - -static inline unsigned long ENTRYLO(unsigned long paddr) -{ - return ((paddr & PAGE_MASK) | - (_PAGE_PRESENT | __READABLE | __WRITEABLE | _PAGE_GLOBAL | - _CACHE_UNCACHED)) >> 6; -} - -void __init bus_error_init(void) { /* nothing */ } - -/* - * Load a few TLB entries for the MV64340 and perhiperals. The MV64340 is going - * to be hit on every IRQ anyway - there's absolutely no point in letting it be - * a random TLB entry, as it'll just cause needless churning of the TLB. And we - * use the other half for the serial port, which is just a PITA otherwise :) - * - * Device Physical Virtual - * MV64340 Internal Regs 0xf4000000 0xf4000000 - * Ocelot-C[S] PLD (CS0) 0xfc000000 0xfc000000 - * NVRAM (CS1) 0xfc800000 0xfc800000 - * UARTs (CS2) 0xfd000000 0xfd000000 - * Internal SRAM 0xfe000000 0xfe000000 - * M-Systems DOC (CS3) 0xff000000 0xff000000 - */ - -static __init void wire_stupidity_into_tlb(void) -{ -#ifdef CONFIG_32BIT - write_c0_wired(0); - local_flush_tlb_all(); - - /* marvell and extra space */ - add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), - 0xf4000000UL, PM_64K); - /* fpga, rtc, and uart */ - add_wired_entry(ENTRYLO(0xfc000000), ENTRYLO(0xfd000000), - 0xfc000000UL, PM_16M); -// /* m-sys and internal SRAM */ -// add_wired_entry(ENTRYLO(0xfe000000), ENTRYLO(0xff000000), -// 0xfe000000UL, PM_16M); - - marvell_base = 0xf4000000; - //mv64340_sram_base = 0xfe000000; /* Currently unused */ -#endif -} - -unsigned long marvell_base = 0xf4000000L; -unsigned long ja_fpga_base = JAGUAR_ATX_CS0_ADDR; -unsigned long uart_base = 0xfd000000L; -static unsigned char *rtc_base = (unsigned char*) 0xfc800000L; - -EXPORT_SYMBOL(marvell_base); - -static __init int per_cpu_mappings(void) -{ - marvell_base = (unsigned long) ioremap(0xf4000000, 0x10000); - ja_fpga_base = (unsigned long) ioremap(JAGUAR_ATX_CS0_ADDR, 0x1000); - uart_base = (unsigned long) ioremap(0xfd000000UL, 0x1000); - rtc_base = ioremap(0xfc000000UL, 0x8000); - // ioremap(0xfe000000, 32 << 20); - write_c0_wired(0); - local_flush_tlb_all(); - ja_setup_console(); - - return 0; -} -arch_initcall(per_cpu_mappings); - -unsigned long m48t37y_get_time(void) -{ - unsigned int year, month, day, hour, min, sec; - unsigned long flags; - - spin_lock_irqsave(&rtc_lock, flags); - /* stop the update */ - rtc_base[0x7ff8] = 0x40; - - year = BCD2BIN(rtc_base[0x7fff]); - year += BCD2BIN(rtc_base[0x7ff1]) * 100; - - month = BCD2BIN(rtc_base[0x7ffe]); - - day = BCD2BIN(rtc_base[0x7ffd]); - - hour = BCD2BIN(rtc_base[0x7ffb]); - min = BCD2BIN(rtc_base[0x7ffa]); - sec = BCD2BIN(rtc_base[0x7ff9]); - - /* start the update */ - rtc_base[0x7ff8] = 0x00; - spin_unlock_irqrestore(&rtc_lock, flags); - - return mktime(year, month, day, hour, min, sec); -} - -int m48t37y_set_time(unsigned long sec) -{ - struct rtc_time tm; - unsigned long flags; - - /* convert to a more useful format -- note months count from 0 */ - to_tm(sec, &tm); - tm.tm_mon += 1; - - spin_lock_irqsave(&rtc_lock, flags); - /* enable writing */ - rtc_base[0x7ff8] = 0x80; - - /* year */ - rtc_base[0x7fff] = BIN2BCD(tm.tm_year % 100); - rtc_base[0x7ff1] = BIN2BCD(tm.tm_year / 100); - - /* month */ - rtc_base[0x7ffe] = BIN2BCD(tm.tm_mon); - - /* day */ - rtc_base[0x7ffd] = BIN2BCD(tm.tm_mday); - - /* hour/min/sec */ - rtc_base[0x7ffb] = BIN2BCD(tm.tm_hour); - rtc_base[0x7ffa] = BIN2BCD(tm.tm_min); - rtc_base[0x7ff9] = BIN2BCD(tm.tm_sec); - - /* day of week -- not really used, but let's keep it up-to-date */ - rtc_base[0x7ffc] = BIN2BCD(tm.tm_wday + 1); - - /* disable writing */ - rtc_base[0x7ff8] = 0x00; - spin_unlock_irqrestore(&rtc_lock, flags); - - return 0; -} - -void __init plat_timer_setup(struct irqaction *irq) -{ - setup_irq(8, irq); -} - -/* - * Ugly but the least of all evils. TLB initialization did flush the TLB so - * We need to setup mappings again before we can touch the RTC. - */ -void momenco_time_init(void) -{ - wire_stupidity_into_tlb(); - - mips_hpt_frequency = cpu_clock / 2; - - rtc_mips_get_time = m48t37y_get_time; - rtc_mips_set_time = m48t37y_set_time; -} - -static struct resource mv_pci_io_mem0_resource = { - .name = "MV64340 PCI0 IO MEM", - .flags = IORESOURCE_IO -}; - -static struct resource mv_pci_mem0_resource = { - .name = "MV64340 PCI0 MEM", - .flags = IORESOURCE_MEM -}; - -static struct mv_pci_controller mv_bus0_controller = { - .pcic = { - .pci_ops = &mv_pci_ops, - .mem_resource = &mv_pci_mem0_resource, - .io_resource = &mv_pci_io_mem0_resource, - }, - .config_addr = MV64340_PCI_0_CONFIG_ADDR, - .config_vreg = MV64340_PCI_0_CONFIG_DATA_VIRTUAL_REG, -}; - -static uint32_t mv_io_base, mv_io_size; - -static void ja_pci0_init(void) -{ - uint32_t mem0_base, mem0_size; - uint32_t io_base, io_size; - - io_base = MV_READ(MV64340_PCI_0_IO_BASE_ADDR) << 16; - io_size = (MV_READ(MV64340_PCI_0_IO_SIZE) + 1) << 16; - mem0_base = MV_READ(MV64340_PCI_0_MEMORY0_BASE_ADDR) << 16; - mem0_size = (MV_READ(MV64340_PCI_0_MEMORY0_SIZE) + 1) << 16; - - mv_pci_io_mem0_resource.start = 0; - mv_pci_io_mem0_resource.end = io_size - 1; - mv_pci_mem0_resource.start = mem0_base; - mv_pci_mem0_resource.end = mem0_base + mem0_size - 1; - mv_bus0_controller.pcic.mem_offset = mem0_base; - mv_bus0_controller.pcic.io_offset = 0; - - ioport_resource.end = io_size - 1; - - register_pci_controller(&mv_bus0_controller.pcic); - - mv_io_base = io_base; - mv_io_size = io_size; -} - -static struct resource mv_pci_io_mem1_resource = { - .name = "MV64340 PCI1 IO MEM", - .flags = IORESOURCE_IO -}; - -static struct resource mv_pci_mem1_resource = { - .name = "MV64340 PCI1 MEM", - .flags = IORESOURCE_MEM -}; - -static struct mv_pci_controller mv_bus1_controller = { - .pcic = { - .pci_ops = &mv_pci_ops, - .mem_resource = &mv_pci_mem1_resource, - .io_resource = &mv_pci_io_mem1_resource, - }, - .config_addr = MV64340_PCI_1_CONFIG_ADDR, - .config_vreg = MV64340_PCI_1_CONFIG_DATA_VIRTUAL_REG, -}; - -static __init void ja_pci1_init(void) -{ - uint32_t mem0_base, mem0_size; - uint32_t io_base, io_size; - - io_base = MV_READ(MV64340_PCI_1_IO_BASE_ADDR) << 16; - io_size = (MV_READ(MV64340_PCI_1_IO_SIZE) + 1) << 16; - mem0_base = MV_READ(MV64340_PCI_1_MEMORY0_BASE_ADDR) << 16; - mem0_size = (MV_READ(MV64340_PCI_1_MEMORY0_SIZE) + 1) << 16; - - /* - * Here we assume the I/O window of second bus to be contiguous with - * the first. A gap is no problem but would waste address space for - * remapping the port space. - */ - mv_pci_io_mem1_resource.start = mv_io_size; - mv_pci_io_mem1_resource.end = mv_io_size + io_size - 1; - mv_pci_mem1_resource.start = mem0_base; - mv_pci_mem1_resource.end = mem0_base + mem0_size - 1; - mv_bus1_controller.pcic.mem_offset = mem0_base; - mv_bus1_controller.pcic.io_offset = 0; - - ioport_resource.end = io_base + io_size -mv_io_base - 1; - - register_pci_controller(&mv_bus1_controller.pcic); - - mv_io_size = io_base + io_size - mv_io_base; -} - -static __init int __init ja_pci_init(void) -{ - unsigned long io_v_base; - uint32_t enable; - - enable = ~MV_READ(MV64340_BASE_ADDR_ENABLE); - - /* - * We require at least one enabled I/O or PCI memory window or we - * will ignore this PCI bus. We ignore PCI windows 1, 2 and 3. - */ - if (enable & (0x01 << 9) || enable & (0x01 << 10)) - ja_pci0_init(); - - if (enable & (0x01 << 14) || enable & (0x01 << 15)) - ja_pci1_init(); - - if (mv_io_size) { - io_v_base = (unsigned long) ioremap(mv_io_base, mv_io_size); - if (!io_v_base) - panic("Could not ioremap I/O port range"); - - set_io_port_base(io_v_base); - } - - return 0; -} - -arch_initcall(ja_pci_init); - -void __init plat_mem_setup(void) -{ - unsigned int tmpword; - - board_time_init = momenco_time_init; - - _machine_restart = momenco_jaguar_restart; - _machine_halt = momenco_jaguar_halt; - pm_power_off = momenco_jaguar_power_off; - - /* - * initrd_start = (unsigned long)jaguar_initrd_start; - * initrd_end = (unsigned long)jaguar_initrd_start + (ulong)jaguar_initrd_size; - * initrd_below_start_ok = 1; - */ - - wire_stupidity_into_tlb(); - - /* - * shut down ethernet ports, just to be sure our memory doesn't get - * corrupted by random ethernet traffic. - */ - MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(0), 0xff << 8); - MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(1), 0xff << 8); - MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(2), 0xff << 8); - MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(0), 0xff << 8); - MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(1), 0xff << 8); - MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(2), 0xff << 8); - while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(0)) & 0xff); - while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(1)) & 0xff); - while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(2)) & 0xff); - while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(0)) & 0xff); - while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(1)) & 0xff); - while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(2)) & 0xff); - MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(0), - MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(0)) & ~1); - MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(1), - MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(1)) & ~1); - MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(2), - MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(2)) & ~1); - - /* Turn off the Bit-Error LED */ - JAGUAR_FPGA_WRITE(0x80, CLR); - - tmpword = JAGUAR_FPGA_READ(BOARDREV); - if (tmpword < 26) - printk("Momentum Jaguar-ATX: Board Assembly Rev. %c\n", - 'A'+tmpword); - else - printk("Momentum Jaguar-ATX: Board Assembly Revision #0x%x\n", - tmpword); - - tmpword = JAGUAR_FPGA_READ(FPGA_REV); - printk("FPGA Rev: %d.%d\n", tmpword>>4, tmpword&15); - tmpword = JAGUAR_FPGA_READ(RESET_STATUS); - printk("Reset reason: 0x%x\n", tmpword); - switch (tmpword) { - case 0x1: - printk(" - Power-up reset\n"); - break; - case 0x2: - printk(" - Push-button reset\n"); - break; - case 0x8: - printk(" - Watchdog reset\n"); - break; - case 0x10: - printk(" - JTAG reset\n"); - break; - default: - printk(" - Unknown reset cause\n"); - } - reset_reason = tmpword; - JAGUAR_FPGA_WRITE(0xff, RESET_STATUS); - - tmpword = JAGUAR_FPGA_READ(BOARD_STATUS); - printk("Board Status register: 0x%02x\n", tmpword); - printk(" - User jumper: %s\n", (tmpword & 0x80)?"installed":"absent"); - printk(" - Boot flash write jumper: %s\n", (tmpword&0x40)?"installed":"absent"); - - /* 256MiB of RM9000x2 DDR */ -// add_memory_region(0x0, 0x100<<20, BOOT_MEM_RAM); - - /* 128MiB of MV-64340 DDR */ -// add_memory_region(0x100<<20, 0x80<<20, BOOT_MEM_RAM); - - /* XXX Memory configuration should be picked up from PMON2k */ -#ifdef CONFIG_JAGUAR_DMALOW - printk("Jaguar ATX DMA-low mode set\n"); - add_memory_region(0x00000000, 0x08000000, BOOT_MEM_RAM); - add_memory_region(0x08000000, 0x10000000, BOOT_MEM_RAM); -#else - /* 128MiB of MV-64340 DDR RAM */ - printk("Jaguar ATX DMA-low mode is not set\n"); - add_memory_region(0x100<<20, 0x80<<20, BOOT_MEM_RAM); -#endif - -#ifdef GEMDEBUG_TRACEBUFFER - { - unsigned int tbControl; - tbControl = - 0 << 26 | /* post trigger delay 0 */ - 0x2 << 16 | /* sequential trace mode */ - // 0x0 << 16 | /* non-sequential trace mode */ - // 0xf << 4 | /* watchpoints disabled */ - 2 << 2 | /* armed */ - 2 ; /* interrupt disabled */ - printk ("setting tbControl = %08lx\n", tbControl); - write_32bit_cp0_set1_register($22, tbControl); - __asm__ __volatile__(".set noreorder\n\t" \ - "nop; nop; nop; nop; nop; nop;\n\t" \ - "nop; nop; nop; nop; nop; nop;\n\t" \ - ".set reorder\n\t"); - - } -#endif -} diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index 30a1c79..aba3dbf 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile @@ -30,7 +30,6 @@ obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o obj-$(CONFIG_SOC_AU1550) += fixup-au1000.o ops-au1000.o obj-$(CONFIG_SOC_PNX8550) += fixup-pnx8550.o ops-pnx8550.o obj-$(CONFIG_MIPS_MALTA) += fixup-malta.o -obj-$(CONFIG_MOMENCO_JAGUAR_ATX)+= fixup-jaguar.o obj-$(CONFIG_MOMENCO_OCELOT) += fixup-ocelot.o pci-ocelot.o obj-$(CONFIG_MOMENCO_OCELOT_3) += fixup-ocelot3.o obj-$(CONFIG_MOMENCO_OCELOT_C) += fixup-ocelot-c.o pci-ocelot-c.o diff --git a/arch/mips/pci/fixup-jaguar.c b/arch/mips/pci/fixup-jaguar.c deleted file mode 100644 index 6c5e1d4..0000000 --- a/arch/mips/pci/fixup-jaguar.c +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Marvell MV64340 interrupt fixup code. - * - * Marvell wants an NDA for their docs so this was written without - * documentation. You've been warned. - * - * Copyright (C) 2004 Ralf Baechle (ralf@linux-mips.org) - */ -#include -#include -#include - -#include - -/* - * WARNING: Example of how _NOT_ to do it. - */ -int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) -{ - int bus = dev->bus->number; - - if (bus == 0 && slot == 1) - return 3; /* PCI-X A */ - if (bus == 0 && slot == 2) - return 4; /* PCI-X B */ - if (bus == 1 && slot == 1) - return 5; /* PCI A */ - if (bus == 1 && slot == 2) - return 6; /* PCI B */ - -return 0; - panic("Whooops in pcibios_map_irq"); -} - -/* Do platform specific device initialization at pci_enable_device() time */ -int pcibios_plat_dev_init(struct pci_dev *dev) -{ - return 0; -} -- 1.5.1.3 From vagabon.xyz@gmail.com Mon May 7 12:10:36 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 07 May 2007 12:10:39 +0100 (BST) Received: from wx-out-0506.google.com ([66.249.82.233]:9556 "EHLO wx-out-0506.google.com") by ftp.linux-mips.org with ESMTP id S20022038AbXEGLKb (ORCPT ); Mon, 7 May 2007 12:10:31 +0100 Received: by wx-out-0506.google.com with SMTP id s14so746132wxc for ; Mon, 07 May 2007 04:09:25 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=uHWoNYJR1R8wounVfiHFROUnQ85CmIa3IMXi0Th1dpAh70RMhdF3jyllWdrvziG1a5W1Do8hFMVv0gFvG25ZU6NgKDRRhiv6sq/y0Sz5gSdB5aWg/ycjYHOonY2DYB6FnLB968kly5m6A4ueJictRhh+wGtx3fjszG9AlBKgFUk= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=ecVZI3t7ytA6XRdfIdTRMmolhd/n/wYYN7c3Wg4PoHgnamJMZ+y2AbDkEVTPYBjCR/hSoITrEoMngr3Tf/YOdF8ypb3DDXd97ygxVAt0qKKPCgZnXq0DU8IGFtLHORasyuZyn6Y1Ij/HDWdW4c7xc+5iWZwE5aeFnFOk2qccKM0= Received: by 10.90.89.5 with SMTP id m5mr4797101agb.1178536165860; Mon, 07 May 2007 04:09:25 -0700 (PDT) Received: from spoutnik.innova-card.com ( [81.252.61.1]) by mx.google.com with ESMTP id 25sm7846775wra.2007.05.07.04.09.22; Mon, 07 May 2007 04:09:25 -0700 (PDT) Received: by spoutnik.innova-card.com (Postfix, from userid 500) id BACEF23F772; Mon, 7 May 2007 13:11:13 +0200 (CEST) To: ralf@linux-mips.org Cc: anemo@mba.ocn.ne.jp, linux-mips@linux-mips.org Subject: [PATCH 3/3] Remove LIMITED_DMA support Date: Mon, 7 May 2007 13:11:13 +0200 Message-Id: <11785362732290-git-send-email-fbuihuu@gmail.com> X-Mailer: git-send-email 1.5.1.3 In-Reply-To: <11785362732731-git-send-email-fbuihuu@gmail.com> References: <11785362732731-git-send-email-fbuihuu@gmail.com> From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14975 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips From: Franck Bui-Huu This code was needed only by Jaguar ATX. Signed-off-by: Franck Bui-Huu --- arch/mips/Kconfig | 5 ----- arch/mips/mm/highmem.c | 2 -- arch/mips/mm/init.c | 3 --- include/asm-mips/highmem.h | 42 ------------------------------------------ include/asm-mips/page.h | 4 ---- 5 files changed, 0 insertions(+), 56 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 28caf80..77a1ef0 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -885,11 +885,6 @@ config GENERIC_ISA_DMA config I8259 bool -config LIMITED_DMA - bool - select HIGHMEM - select SYS_SUPPORTS_HIGHMEM - config MIPS_BONITO64 bool diff --git a/arch/mips/mm/highmem.c b/arch/mips/mm/highmem.c index 675502a..10dd2af 100644 --- a/arch/mips/mm/highmem.c +++ b/arch/mips/mm/highmem.c @@ -80,7 +80,6 @@ void __kunmap_atomic(void *kvaddr, enum km_type type) pagefault_enable(); } -#ifndef CONFIG_LIMITED_DMA /* * This is the same as kmap_atomic() but can map memory that doesn't * have a struct page associated with it. @@ -99,7 +98,6 @@ void *kmap_atomic_pfn(unsigned long pfn, enum km_type type) return (void*) vaddr; } -#endif /* CONFIG_LIMITED_DMA */ struct page *__kmap_atomic_to_page(void *ptr) { diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 2d1c2c0..4c80528 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c @@ -424,9 +424,6 @@ void __init mem_init(void) continue; } ClearPageReserved(page); -#ifdef CONFIG_LIMITED_DMA - set_page_address(page, lowmem_page_address(page)); -#endif init_page_count(page); __free_page(page); totalhigh_pages++; diff --git a/include/asm-mips/highmem.h b/include/asm-mips/highmem.h index f8c8182..4d6bd5c 100644 --- a/include/asm-mips/highmem.h +++ b/include/asm-mips/highmem.h @@ -48,46 +48,6 @@ extern pte_t *pkmap_page_table; extern void * kmap_high(struct page *page); extern void kunmap_high(struct page *page); -/* - * CONFIG_LIMITED_DMA is for systems with DMA limitations such as Momentum's - * Jaguar ATX. This option exploits the highmem code in the kernel so is - * always enabled together with CONFIG_HIGHMEM but at this time doesn't - * actually add highmem functionality. - */ - -#ifdef CONFIG_LIMITED_DMA - -/* - * These are the default functions for the no-highmem case from - * - */ -static inline void *kmap(struct page *page) -{ - might_sleep(); - return page_address(page); -} - -#define kunmap(page) do { (void) (page); } while (0) - -static inline void *kmap_atomic(struct page *page, enum km_type type) -{ - pagefault_disable(); - return page_address(page); -} - -static inline void kunmap_atomic(void *kvaddr, enum km_type type) -{ - pagefault_enable(); -} - -#define kmap_atomic_pfn(pfn, idx) kmap_atomic(pfn_to_page(pfn), (idx)) - -#define kmap_atomic_to_page(ptr) virt_to_page(ptr) - -#define flush_cache_kmaps() do { } while (0) - -#else /* LIMITED_DMA */ - extern void *__kmap(struct page *page); extern void __kunmap(struct page *page); extern void *__kmap_atomic(struct page *page, enum km_type type); @@ -103,8 +63,6 @@ extern struct page *__kmap_atomic_to_page(void *ptr); #define flush_cache_kmaps() flush_cache_all() -#endif /* LIMITED_DMA */ - #endif /* __KERNEL__ */ #endif /* _ASM_HIGHMEM_H */ diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h index d3fbd83..5c3239d 100644 --- a/include/asm-mips/page.h +++ b/include/asm-mips/page.h @@ -190,10 +190,6 @@ typedef struct { unsigned long pgprot; } pgprot_t; #define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE) #define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET) -#ifdef CONFIG_LIMITED_DMA -#define WANT_PAGE_VIRTUAL -#endif - #include #include -- 1.5.1.3 From anemo@mba.ocn.ne.jp Mon May 7 16:17:11 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 07 May 2007 16:17:13 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:48334 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20021871AbXEGPRL (ORCPT ); Mon, 7 May 2007 16:17:11 +0100 Received: from localhost (p1067-ipad301funabasi.chiba.ocn.ne.jp [122.17.251.67]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 8785EA824; Tue, 8 May 2007 00:17:04 +0900 (JST) Date: Tue, 08 May 2007 00:17:14 +0900 (JST) Message-Id: <20070508.001714.126573516.anemo@mba.ocn.ne.jp> To: vagabon.xyz@gmail.com Cc: ralf@linux-mips.org, linux-mips@linux-mips.org Subject: Re: [RFC 0/3] Remove Momentum Jaguar and Ocelot G board supports From: Atsushi Nemoto In-Reply-To: <11785362732731-git-send-email-fbuihuu@gmail.com> References: <11785362732731-git-send-email-fbuihuu@gmail.com> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14976 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Mon, 7 May 2007 13:11:10 +0200, Franck Bui-Huu wrote: > These 2 boards have several hacks that make them annoying to > support. Specially when improving generic MIPS code. > > Since they're scheduled for removal since June 2006, it should be high > time to get rid of them. JFI, here is the related discussion: http://www.linux-mips.org/archives/linux-mips/2006-06/msg00139.html I think nobody complained for Jaguar-atx and Ocelot boards at that time. > delete mode 100644 arch/mips/configs/jaguar-atx_defconfig > delete mode 100644 arch/mips/configs/ocelot_g_defconfig > delete mode 100644 arch/mips/momentum/Kconfig > delete mode 100644 arch/mips/momentum/jaguar_atx/Makefile > delete mode 100644 arch/mips/momentum/jaguar_atx/dbg_io.c > delete mode 100644 arch/mips/momentum/jaguar_atx/irq.c > delete mode 100644 arch/mips/momentum/jaguar_atx/ja-console.c > delete mode 100644 arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h > delete mode 100644 arch/mips/momentum/jaguar_atx/platform.c > delete mode 100644 arch/mips/momentum/jaguar_atx/prom.c > delete mode 100644 arch/mips/momentum/jaguar_atx/reset.c > delete mode 100644 arch/mips/momentum/jaguar_atx/setup.c > delete mode 100644 arch/mips/momentum/ocelot_g/Makefile > delete mode 100644 arch/mips/momentum/ocelot_g/dbg_io.c > delete mode 100644 arch/mips/momentum/ocelot_g/gt-irq.c > delete mode 100644 arch/mips/momentum/ocelot_g/irq.c > delete mode 100644 arch/mips/momentum/ocelot_g/ocelot_pld.h > delete mode 100644 arch/mips/momentum/ocelot_g/prom.c > delete mode 100644 arch/mips/momentum/ocelot_g/reset.c > delete mode 100644 arch/mips/momentum/ocelot_g/setup.c > delete mode 100644 arch/mips/pci/fixup-jaguar.c > delete mode 100644 arch/mips/pci/fixup-ocelot-g.c > delete mode 100644 arch/mips/pci/pci-ocelot-g.c include/asm-mips/mach-ja/ and some lines in include/asm-mips/serial.h can be zapped too. :-) --- Atsushi Nemoto From vagabon.xyz@gmail.com Mon May 7 16:34:16 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 07 May 2007 16:34:17 +0100 (BST) Received: from wr-out-0506.google.com ([64.233.184.236]:4787 "EHLO wr-out-0506.google.com") by ftp.linux-mips.org with ESMTP id S20022059AbXEGPeQ (ORCPT ); Mon, 7 May 2007 16:34:16 +0100 Received: by wr-out-0506.google.com with SMTP id q50so1652044wrq for ; Mon, 07 May 2007 08:34:15 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=f3IpF2q+DwFTTTNfKgL5ZBv68lLY47O9Ptlup+Yg3ZA8Hdbtx5WGeC2/l8vdkrlWLVqQr5JtUfH4sp6EEG1Ywm40GLe3B9tLiWgNQtc1YK5xtOvH7nYSc5wDznSEEKvGxLODd2VQqyhl9K+NEXzuL4NNNT1mNhUhOddc3ioqXVQ= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=cOD1/Gl50Faqeo6LzLhao7vyQ6uKbFr04xPznwokZdppB507oMp1TcMEV+bc0RsZI9bnYag1bWYoJ0kN+PW5jsFk7Up8vDNFYLra1dgtfTSAbYP8piMhh2mv1CVOPVr1z1KqAYGuPOGiwH6OpHhRqg3ZWYcPL9T5EnjcI3Z9Q6k= Received: by 10.115.17.1 with SMTP id u1mr2166793wai.1178552053730; Mon, 07 May 2007 08:34:13 -0700 (PDT) Received: by 10.115.94.16 with HTTP; Mon, 7 May 2007 08:34:13 -0700 (PDT) Message-ID: Date: Mon, 7 May 2007 17:34:13 +0200 From: "Franck Bui-Huu" To: "Atsushi Nemoto" Subject: Re: [RFC 0/3] Remove Momentum Jaguar and Ocelot G board supports Cc: ralf@linux-mips.org, linux-mips@linux-mips.org In-Reply-To: <20070508.001714.126573516.anemo@mba.ocn.ne.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <11785362732731-git-send-email-fbuihuu@gmail.com> <20070508.001714.126573516.anemo@mba.ocn.ne.jp> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14977 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips On 5/7/07, Atsushi Nemoto wrote: > > include/asm-mips/mach-ja/ and some lines in include/asm-mips/serial.h > can be zapped too. :-) argh, I always forget to look into header file directories ! Rebuilding the patch serie... -- Franck From vagabon.xyz@gmail.com Mon May 7 17:00:32 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 07 May 2007 17:00:38 +0100 (BST) Received: from wx-out-0506.google.com ([66.249.82.225]:30695 "EHLO wx-out-0506.google.com") by ftp.linux-mips.org with ESMTP id S20022066AbXEGQAc (ORCPT ); Mon, 7 May 2007 17:00:32 +0100 Received: by wx-out-0506.google.com with SMTP id s14so831990wxc for ; Mon, 07 May 2007 09:00:30 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=Gtw2at+PLSZ4d/5djCXV3RamqPBfih9l21y0+qcZx+KCOay5X4c4Wm1YgL9VMc8USHIxSrqhkNWdJwDU8lrYxKMG7dbklFtFR7m14+QQk4FdU0Vqdty30wSEyFSH4DvcVpevJpMcIFMsZR+zsJejY+am+1ls+cdz9pTLWanwaUo= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=khdd0jWJ7WnpATUA7F5l+u6WqDI3GvAHTLXyxDopK2KOMJOxyxbMtfM7L2/sWDiH5Tl334VDm/+8Mf/rBjR+fMd/RWeIFegMhluW5k/kFnBv9ZT3OpsY6hv4/oSTFNKcDruDigcYBMwhK3hIVCIeSLKO2QUGiwAd1XS5PYWTy/c= Received: by 10.90.119.15 with SMTP id r15mr5261660agc.1178553629855; Mon, 07 May 2007 09:00:29 -0700 (PDT) Received: from spoutnik.innova-card.com ( [81.252.61.1]) by mx.google.com with ESMTP id 13sm142223wrl.2007.05.07.09.00.06; Mon, 07 May 2007 09:00:16 -0700 (PDT) Received: by spoutnik.innova-card.com (Postfix, from userid 500) id BB3AE23F772; Mon, 7 May 2007 18:01:54 +0200 (CEST) To: ralf@linux-mips.org Cc: anemo@mba.ocn.ne.jp, linux-mips@linux-mips.org Subject: [PATCH 2/3] Remove Momenco Jaguar ATX support Date: Mon, 7 May 2007 18:01:52 +0200 Message-Id: <11785537143305-git-send-email-fbuihuu@gmail.com> X-Mailer: git-send-email 1.5.1.3 In-Reply-To: <11785537132378-git-send-email-fbuihuu@gmail.com> References: <11785537132378-git-send-email-fbuihuu@gmail.com> From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14978 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips From: Franck Bui-Huu Jaguar ATX support is deprecated and scheduled for removal since June 2006. It has some hackish code and it odd DMA results in the need to support old feature in kernel code. Signed-off-by: Franck Bui-Huu --- arch/mips/Kconfig | 23 - arch/mips/Makefile | 11 - arch/mips/configs/jaguar-atx_defconfig | 897 ---------------------- arch/mips/momentum/Kconfig | 6 - arch/mips/momentum/jaguar_atx/Makefile | 12 - arch/mips/momentum/jaguar_atx/dbg_io.c | 125 --- arch/mips/momentum/jaguar_atx/irq.c | 94 --- arch/mips/momentum/jaguar_atx/ja-console.c | 101 --- arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h | 54 -- arch/mips/momentum/jaguar_atx/platform.c | 208 ----- arch/mips/momentum/jaguar_atx/prom.c | 210 ----- arch/mips/momentum/jaguar_atx/reset.c | 56 -- arch/mips/momentum/jaguar_atx/setup.c | 475 ------------ arch/mips/pci/Makefile | 1 - arch/mips/pci/fixup-jaguar.c | 43 - include/asm-mips/bootinfo.h | 2 +- include/asm-mips/mach-ja/cpu-feature-overrides.h | 45 -- include/asm-mips/mach-ja/spaces.h | 20 - include/asm-mips/serial.h | 19 - 19 files changed, 1 insertions(+), 2401 deletions(-) delete mode 100644 arch/mips/configs/jaguar-atx_defconfig delete mode 100644 arch/mips/momentum/Kconfig delete mode 100644 arch/mips/momentum/jaguar_atx/Makefile delete mode 100644 arch/mips/momentum/jaguar_atx/dbg_io.c delete mode 100644 arch/mips/momentum/jaguar_atx/irq.c delete mode 100644 arch/mips/momentum/jaguar_atx/ja-console.c delete mode 100644 arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h delete mode 100644 arch/mips/momentum/jaguar_atx/platform.c delete mode 100644 arch/mips/momentum/jaguar_atx/prom.c delete mode 100644 arch/mips/momentum/jaguar_atx/reset.c delete mode 100644 arch/mips/momentum/jaguar_atx/setup.c delete mode 100644 arch/mips/pci/fixup-jaguar.c delete mode 100644 include/asm-mips/mach-ja/cpu-feature-overrides.h delete mode 100644 include/asm-mips/mach-ja/spaces.h diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index ab79b98..28caf80 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -369,28 +369,6 @@ config MIPS_SIM This option enables support for MIPS Technologies MIPSsim software emulator. -config MOMENCO_JAGUAR_ATX - bool "Momentum Jaguar board" - select BOOT_ELF32 - select DMA_NONCOHERENT - select HW_HAS_PCI - select IRQ_CPU - select IRQ_CPU_RM7K - select IRQ_MV64340 - select LIMITED_DMA - select PCI_MARVELL - select RM7000_CPU_SCACHE - select SWAP_IO_SPACE - select SYS_HAS_CPU_RM9000 - select SYS_HAS_EARLY_PRINTK - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL - select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_KGDB - help - The Jaguar ATX is a MIPS-based Single Board Computer (SBC) made by - Momentum Computer . - config MOMENCO_OCELOT bool "Momentum Ocelot board" select DMA_NONCOHERENT @@ -808,7 +786,6 @@ source "arch/mips/ddb5xxx/Kconfig" source "arch/mips/gt64120/ev64120/Kconfig" source "arch/mips/jazz/Kconfig" source "arch/mips/lasat/Kconfig" -source "arch/mips/momentum/Kconfig" source "arch/mips/pmc-sierra/Kconfig" source "arch/mips/sgi-ip27/Kconfig" source "arch/mips/sibyte/Kconfig" diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 3e8a777..38817f5 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -379,17 +379,6 @@ cflags-$(CONFIG_BASLER_EXCITE) += -Iinclude/asm-mips/mach-excite load-$(CONFIG_BASLER_EXCITE) += 0x80100000 # -# Momentum Jaguar ATX -# -core-$(CONFIG_MOMENCO_JAGUAR_ATX) += arch/mips/momentum/jaguar_atx/ -cflags-$(CONFIG_MOMENCO_JAGUAR_ATX) += -Iinclude/asm-mips/mach-ja -#ifdef CONFIG_JAGUAR_DMALOW -#load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff88000000 -#else -load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff80100000 -#endif - -# # NEC DDB # core-$(CONFIG_DDB5XXX_COMMON) += arch/mips/ddb5xxx/common/ diff --git a/arch/mips/configs/jaguar-atx_defconfig b/arch/mips/configs/jaguar-atx_defconfig deleted file mode 100644 index 083104d..0000000 --- a/arch/mips/configs/jaguar-atx_defconfig +++ /dev/null @@ -1,897 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.20 -# Tue Feb 20 21:47:33 2007 -# -CONFIG_MIPS=y - -# -# Machine selection -# -CONFIG_ZONE_DMA=y -# CONFIG_MIPS_MTX1 is not set -# CONFIG_MIPS_BOSPORUS is not set -# CONFIG_MIPS_PB1000 is not set -# CONFIG_MIPS_PB1100 is not set -# CONFIG_MIPS_PB1500 is not set -# CONFIG_MIPS_PB1550 is not set -# CONFIG_MIPS_PB1200 is not set -# CONFIG_MIPS_DB1000 is not set -# CONFIG_MIPS_DB1100 is not set -# CONFIG_MIPS_DB1500 is not set -# CONFIG_MIPS_DB1550 is not set -# CONFIG_MIPS_DB1200 is not set -# CONFIG_MIPS_MIRAGE is not set -# CONFIG_BASLER_EXCITE is not set -# CONFIG_MIPS_COBALT is not set -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MIPS_EV64120 is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_LASAT is not set -# CONFIG_MIPS_ATLAS is not set -# CONFIG_MIPS_MALTA is not set -# CONFIG_MIPS_SEAD is not set -# CONFIG_WR_PPMC is not set -# CONFIG_MIPS_SIM is not set -CONFIG_MOMENCO_JAGUAR_ATX=y -# CONFIG_MOMENCO_OCELOT is not set -# CONFIG_MOMENCO_OCELOT_3 is not set -# CONFIG_MOMENCO_OCELOT_C is not set -# CONFIG_MOMENCO_OCELOT_G is not set -# CONFIG_MIPS_XXS1500 is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_STB810 is not set -# CONFIG_DDB5477 is not set -# CONFIG_MACH_VR41XX is not set -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_QEMU is not set -# CONFIG_MARKEINS is not set -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_SWARM is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_PTSWARM is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM is not set -# CONFIG_TOSHIBA_JMR3927 is not set -# CONFIG_TOSHIBA_RBTX4927 is not set -# CONFIG_TOSHIBA_RBTX4938 is not set -CONFIG_JAGUAR_DMALOW=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_TIME=y -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y -# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set -CONFIG_DMA_NONCOHERENT=y -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_LIMITED_DMA=y -CONFIG_CPU_BIG_ENDIAN=y -# CONFIG_CPU_LITTLE_ENDIAN is not set -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_IRQ_CPU=y -CONFIG_IRQ_CPU_RM7K=y -CONFIG_IRQ_MV64340=y -CONFIG_PCI_MARVELL=y -CONFIG_SWAP_IO_SPACE=y -CONFIG_BOOT_ELF32=y -CONFIG_MIPS_L1_CACHE_SHIFT=5 - -# -# CPU selection -# -# CONFIG_CPU_MIPS32_R1 is not set -# CONFIG_CPU_MIPS32_R2 is not set -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_VR41XX is not set -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_NEVADA is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_R10000 is not set -# CONFIG_CPU_RM7000 is not set -CONFIG_CPU_RM9000=y -# CONFIG_CPU_SB1 is not set -CONFIG_SYS_HAS_CPU_RM9000=y -CONFIG_WEAK_ORDERING=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y - -# -# Kernel type -# -CONFIG_32BIT=y -# CONFIG_64BIT is not set -CONFIG_PAGE_SIZE_4KB=y -# CONFIG_PAGE_SIZE_8KB is not set -# CONFIG_PAGE_SIZE_16KB is not set -# CONFIG_PAGE_SIZE_64KB is not set -CONFIG_BOARD_SCACHE=y -CONFIG_RM7000_CPU_SCACHE=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -# CONFIG_MIPS_VPE_LOADER is not set -# CONFIG_64BIT_PHYS_ADDR is not set -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_HIGHMEM=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -CONFIG_SYS_SUPPORTS_HIGHMEM=y -CONFIG_ARCH_FLATMEM_ENABLE=y -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_RESOURCES_64BIT is not set -CONFIG_ZONE_DMA_FLAG=1 -# CONFIG_HZ_48 is not set -# CONFIG_HZ_100 is not set -# CONFIG_HZ_128 is not set -# CONFIG_HZ_250 is not set -# CONFIG_HZ_256 is not set -CONFIG_HZ_1000=y -# CONFIG_HZ_1024 is not set -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_HZ=1000 -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - -# -# Code maturity level options -# -# CONFIG_EXPERIMENTAL is not set -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# -CONFIG_LOCALVERSION="" -CONFIG_LOCALVERSION_AUTO=y -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_IPC_NS is not set -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_UTS_NS is not set -# CONFIG_AUDIT is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_SYSFS_DEPRECATED=y -CONFIG_RELAY=y -CONFIG_SYSCTL=y -CONFIG_EMBEDDED=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SHMEM=y -CONFIG_SLAB=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_RT_MUTEXES=y -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 -# CONFIG_SLOB is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODVERSIONS is not set -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_KMOD=y - -# -# Block layer -# -CONFIG_BLOCK=y -# CONFIG_LBD is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_LSF is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -CONFIG_DEFAULT_AS=y -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="anticipatory" - -# -# Bus options (PCI, PCMCIA, EISA, ISA, TC) -# -CONFIG_HW_HAS_PCI=y -CONFIG_PCI=y -CONFIG_MMU=y - -# -# PCCARD (PCMCIA/CardBus) support -# -# CONFIG_PCCARD is not set - -# -# PCI Hotplug Support -# - -# -# Executable file formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_TRAD_SIGNALS=y - -# -# Power management options -# -CONFIG_PM=y -# CONFIG_PM_LEGACY is not set -# CONFIG_PM_DEBUG is not set -# CONFIG_PM_SYSFS_DEPRECATED is not set - -# -# Networking -# -CONFIG_NET=y - -# -# Networking options -# -# CONFIG_NETDEBUG is not set -# CONFIG_PACKET is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -CONFIG_XFRM_USER=m -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -# CONFIG_IP_PNP_DHCP is not set -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=m -CONFIG_INET_XFRM_MODE_TUNNEL=m -CONFIG_INET_XFRM_MODE_BEET=m -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -CONFIG_IPV6=m -CONFIG_IPV6_PRIVACY=y -CONFIG_IPV6_ROUTER_PREF=y -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -CONFIG_INET6_IPCOMP=m -CONFIG_INET6_XFRM_TUNNEL=m -CONFIG_INET6_TUNNEL=m -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -CONFIG_IPV6_SIT=m -CONFIG_IPV6_TUNNEL=m -CONFIG_NETWORK_SECMARK=y -# CONFIG_NETFILTER is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -CONFIG_IEEE80211=m -# CONFIG_IEEE80211_DEBUG is not set -CONFIG_IEEE80211_CRYPT_WEP=m -CONFIG_IEEE80211_CRYPT_CCMP=m - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=m -# CONFIG_SYS_HYPERVISOR is not set - -# -# Connector - unified userspace <-> kernelspace linker -# -CONFIG_CONNECTOR=m - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# -# CONFIG_PNPACPI is not set - -# -# Block devices -# -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_SX8 is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_CDROM_PKTCDVD=m -CONFIG_CDROM_PKTCDVD_BUFFERS=8 -CONFIG_ATA_OVER_ETH=m - -# -# Misc devices -# -CONFIG_SGI_IOC4=m - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -CONFIG_RAID_ATTRS=m -# CONFIG_SCSI is not set -# CONFIG_SCSI_NETLINK is not set - -# -# Serial ATA (prod) and Parallel ATA (experimental) drivers -# -# CONFIG_ATA is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Network device support -# -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# PHY device support -# -CONFIG_PHYLIB=m - -# -# MII PHY device drivers -# -CONFIG_MARVELL_PHY=m -CONFIG_DAVICOM_PHY=m -CONFIG_QSEMI_PHY=m -CONFIG_LXT_PHY=m -CONFIG_CICADA_PHY=m -CONFIG_VITESSE_PHY=m -CONFIG_SMSC_PHY=m -# CONFIG_BROADCOM_PHY is not set -# CONFIG_FIXED_PHY is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_CASSINI is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_DM9000 is not set - -# -# Tulip family network device support -# -# CONFIG_NET_TULIP is not set -# CONFIG_HP100 is not set -CONFIG_NET_PCI=y -# CONFIG_PCNET32 is not set -# CONFIG_AMD8111_ETH is not set -# CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_B44 is not set -# CONFIG_FORCEDETH is not set -# CONFIG_DGRS is not set -CONFIG_EEPRO100=y -# CONFIG_E100 is not set -# CONFIG_FEALNX is not set -# CONFIG_NATSEMI is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_8139TOO is not set -# CONFIG_SIS900 is not set -# CONFIG_EPIC100 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_TLAN is not set -# CONFIG_VIA_RHINE is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_R8169 is not set -# CONFIG_SIS190 is not set -# CONFIG_SKGE is not set -# CONFIG_SKY2 is not set -# CONFIG_SK98LIN is not set -# CONFIG_VIA_VELOCITY is not set -# CONFIG_TIGON3 is not set -# CONFIG_BNX2 is not set -CONFIG_MV643XX_ETH=y -CONFIG_QLA3XXX=m - -# -# Ethernet (10000 Mbit) -# -# CONFIG_CHELSIO_T1 is not set -CONFIG_CHELSIO_T3=m -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set -# CONFIG_MYRI10GE is not set -CONFIG_NETXEN_NIC=m - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -# CONFIG_INPUT is not set - -# -# Hardware I/O ports -# -# CONFIG_SERIO is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_PCI=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_JSM is not set -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_HW_RANDOM is not set -# CONFIG_RTC is not set -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# SPI support -# -# CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set - -# -# Dallas's 1-wire bus -# -# CONFIG_W1 is not set - -# -# Hardware Monitoring support -# -# CONFIG_HWMON is not set -# CONFIG_HWMON_VID is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -# CONFIG_USB is not set - -# -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -# - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# MMC/SD Card support -# -# CONFIG_MMC is not set - -# -# LED devices -# -# CONFIG_NEW_LEDS is not set - -# -# LED drivers -# - -# -# LED Triggers -# - -# -# InfiniBand support -# -# CONFIG_INFINIBAND is not set - -# -# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) -# - -# -# Real Time Clock -# - -# -# DMA Engine support -# -# CONFIG_DMA_ENGINE is not set - -# -# DMA Clients -# - -# -# DMA Devices -# - -# -# Auxiliary Display support -# - -# -# Virtualization -# - -# -# File systems -# -# CONFIG_EXT2_FS is not set -# CONFIG_EXT3_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -CONFIG_FS_POSIX_ACL=y -# CONFIG_XFS_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -CONFIG_FUSE_FS=m -CONFIG_GENERIC_ACL=y - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_PROC_SYSCTL=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_HFSPLUS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -# CONFIG_NFS_V3 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Kernel hacking -# -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_MUST_CHECK=y -# CONFIG_MAGIC_SYSRQ is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_FS is not set -# CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_KERNEL is not set -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_CROSSCOMPILE=y -CONFIG_CMDLINE="" -CONFIG_SYS_SUPPORTS_KGDB=y - -# -# Security options -# -CONFIG_KEYS=y -CONFIG_KEYS_DEBUG_PROC_KEYS=y -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -CONFIG_CRYPTO=y -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_BLKCIPHER=m -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=m -CONFIG_CRYPTO_SHA1=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_WP512=m -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_CBC=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_DES=m -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_TWOFISH_COMMON=m -CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_AES=m -CONFIG_CRYPTO_CAST5=m -CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_ARC4=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_DEFLATE=m -CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_CRC32C=m -CONFIG_CRYPTO_CAMELLIA=m -# CONFIG_CRYPTO_TEST is not set - -# -# Hardware crypto devices -# - -# -# Library routines -# -CONFIG_BITREVERSE=m -# CONFIG_CRC_CCITT is not set -CONFIG_CRC16=m -CONFIG_CRC32=m -CONFIG_LIBCRC32C=m -CONFIG_ZLIB_INFLATE=m -CONFIG_ZLIB_DEFLATE=m -CONFIG_PLIST=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y diff --git a/arch/mips/momentum/Kconfig b/arch/mips/momentum/Kconfig deleted file mode 100644 index 70a61cf..0000000 --- a/arch/mips/momentum/Kconfig +++ /dev/null @@ -1,6 +0,0 @@ -config JAGUAR_DMALOW - bool "Low DMA Mode" - depends on MOMENCO_JAGUAR_ATX - help - Select to Y if jump JP5 is set on your board, N otherwise. Normally - the jumper is set, so if you feel unsafe, just say Y. diff --git a/arch/mips/momentum/jaguar_atx/Makefile b/arch/mips/momentum/jaguar_atx/Makefile deleted file mode 100644 index 2e8cebd..0000000 --- a/arch/mips/momentum/jaguar_atx/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# Makefile for Momentum Computer's Jaguar-ATX board. -# -# Note! Dependencies are done automagically by 'make dep', which also -# removes any old dependencies. DON'T put your own dependencies here -# unless it's something special (ie not a .c file). -# - -obj-y += irq.o platform.o prom.o reset.o setup.o - -obj-$(CONFIG_SERIAL_8250_CONSOLE) += ja-console.o -obj-$(CONFIG_REMOTE_DEBUG) += dbg_io.o diff --git a/arch/mips/momentum/jaguar_atx/dbg_io.c b/arch/mips/momentum/jaguar_atx/dbg_io.c deleted file mode 100644 index b85a652..0000000 --- a/arch/mips/momentum/jaguar_atx/dbg_io.c +++ /dev/null @@ -1,125 +0,0 @@ - -#if defined(CONFIG_REMOTE_DEBUG) - -#include /* For the serial port location and base baud */ - -/* --- CONFIG --- */ - -typedef unsigned char uint8; -typedef unsigned int uint32; - -/* --- END OF CONFIG --- */ - -#define UART16550_BAUD_2400 2400 -#define UART16550_BAUD_4800 4800 -#define UART16550_BAUD_9600 9600 -#define UART16550_BAUD_19200 19200 -#define UART16550_BAUD_38400 38400 -#define UART16550_BAUD_57600 57600 -#define UART16550_BAUD_115200 115200 - -#define UART16550_PARITY_NONE 0 -#define UART16550_PARITY_ODD 0x08 -#define UART16550_PARITY_EVEN 0x18 -#define UART16550_PARITY_MARK 0x28 -#define UART16550_PARITY_SPACE 0x38 - -#define UART16550_DATA_5BIT 0x0 -#define UART16550_DATA_6BIT 0x1 -#define UART16550_DATA_7BIT 0x2 -#define UART16550_DATA_8BIT 0x3 - -#define UART16550_STOP_1BIT 0x0 -#define UART16550_STOP_2BIT 0x4 - -/* ----------------------------------------------------- */ - -/* === CONFIG === */ - -/* [jsun] we use the second serial port for kdb */ -#define BASE OCELOT_SERIAL1_BASE -#define MAX_BAUD OCELOT_BASE_BAUD - -/* === END OF CONFIG === */ - -#define REG_OFFSET 4 - -/* register offset */ -#define OFS_RCV_BUFFER 0 -#define OFS_TRANS_HOLD 0 -#define OFS_SEND_BUFFER 0 -#define OFS_INTR_ENABLE (1*REG_OFFSET) -#define OFS_INTR_ID (2*REG_OFFSET) -#define OFS_DATA_FORMAT (3*REG_OFFSET) -#define OFS_LINE_CONTROL (3*REG_OFFSET) -#define OFS_MODEM_CONTROL (4*REG_OFFSET) -#define OFS_RS232_OUTPUT (4*REG_OFFSET) -#define OFS_LINE_STATUS (5*REG_OFFSET) -#define OFS_MODEM_STATUS (6*REG_OFFSET) -#define OFS_RS232_INPUT (6*REG_OFFSET) -#define OFS_SCRATCH_PAD (7*REG_OFFSET) - -#define OFS_DIVISOR_LSB (0*REG_OFFSET) -#define OFS_DIVISOR_MSB (1*REG_OFFSET) - - -/* memory-mapped read/write of the port */ -#define UART16550_READ(y) (*((volatile uint8*)(BASE + y))) -#define UART16550_WRITE(y, z) ((*((volatile uint8*)(BASE + y))) = z) - -void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop) -{ - /* disable interrupts */ - UART16550_WRITE(OFS_INTR_ENABLE, 0); - - /* set up baud rate */ - { - uint32 divisor; - - /* set DIAB bit */ - UART16550_WRITE(OFS_LINE_CONTROL, 0x80); - - /* set divisor */ - divisor = MAX_BAUD / baud; - UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff); - UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8); - - /* clear DIAB bit */ - UART16550_WRITE(OFS_LINE_CONTROL, 0x0); - } - - /* set data format */ - UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop); -} - -static int remoteDebugInitialized = 0; - -uint8 getDebugChar(void) -{ - if (!remoteDebugInitialized) { - remoteDebugInitialized = 1; - debugInit(UART16550_BAUD_38400, - UART16550_DATA_8BIT, - UART16550_PARITY_NONE, UART16550_STOP_1BIT); - } - - while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0); - return UART16550_READ(OFS_RCV_BUFFER); -} - - -int putDebugChar(uint8 byte) -{ - if (!remoteDebugInitialized) { - remoteDebugInitialized = 1; - debugInit(UART16550_BAUD_38400, - UART16550_DATA_8BIT, - UART16550_PARITY_NONE, UART16550_STOP_1BIT); - } - - while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0); - UART16550_WRITE(OFS_SEND_BUFFER, byte); - return 1; -} - -#endif diff --git a/arch/mips/momentum/jaguar_atx/irq.c b/arch/mips/momentum/jaguar_atx/irq.c deleted file mode 100644 index f2b4325..0000000 --- a/arch/mips/momentum/jaguar_atx/irq.c +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Copyright (C) 2002 Momentum Computer, Inc. - * Author: Matthew Dharm, mdharm@momenco.com - * - * Based on work by: - * Copyright (C) 2000 RidgeRun, Inc. - * Author: RidgeRun, Inc. - * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com - * - * Copyright 2001 MontaVista Software Inc. - * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net - * - * Copyright (C) 2000, 01, 06 Ralf Baechle (ralf@linux-mips.org) - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#include -#include -#include -#include -#include -#include -#include - -asmlinkage void plat_irq_dispatch(void) -{ - unsigned int pending = read_c0_cause() & read_c0_status(); - - if (pending & STATUSF_IP0) - do_IRQ(0); - else if (pending & STATUSF_IP1) - do_IRQ(1); - else if (pending & STATUSF_IP2) - do_IRQ(2); - else if (pending & STATUSF_IP3) - do_IRQ(3); - else if (pending & STATUSF_IP4) - do_IRQ(4); - else if (pending & STATUSF_IP5) - do_IRQ(5); - else if (pending & STATUSF_IP6) - do_IRQ(6); - else if (pending & STATUSF_IP7) - ll_timer_interrupt(7); - else { - /* - * Now look at the extended interrupts - */ - pending = (read_c0_cause() & (read_c0_intcontrol() << 8)) >> 16; - if (pending & STATUSF_IP8) - ll_mv64340_irq(); - } -} - -static struct irqaction cascade_mv64340 = { - no_action, IRQF_DISABLED, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL -}; - -void __init arch_init_irq(void) -{ - /* - * Clear all of the interrupts while we change the able around a bit. - * int-handler is not on bootstrap - */ - clear_c0_status(ST0_IM); - - mips_cpu_irq_init(); - rm7k_cpu_irq_init(); - - /* set up the cascading interrupts */ - setup_irq(8, &cascade_mv64340); - - mv64340_irq_init(16); - - set_c0_status(ST0_IM); -} diff --git a/arch/mips/momentum/jaguar_atx/ja-console.c b/arch/mips/momentum/jaguar_atx/ja-console.c deleted file mode 100644 index 2c30b4f..0000000 --- a/arch/mips/momentum/jaguar_atx/ja-console.c +++ /dev/null @@ -1,101 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2001, 2002, 2004 Ralf Baechle - */ -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -/* SUPERIO uart register map */ -struct ja_uartregs { - union { - volatile u8 pad0[3]; - volatile u8 rbr; /* read only, DLAB == 0 */ - volatile u8 pad1[3]; - volatile u8 thr; /* write only, DLAB == 0 */ - volatile u8 pad2[3]; - volatile u8 dll; /* DLAB == 1 */ - } u1; - union { - volatile u8 pad0[3]; - volatile u8 ier; /* DLAB == 0 */ - volatile u8 pad1[3]; - volatile u8 dlm; /* DLAB == 1 */ - } u2; - union { - volatile u8 pad0[3]; - volatile u8 iir; /* read only */ - volatile u8 pad1[3]; - volatile u8 fcr; /* write only */ - } u3; - volatile u8 pad0[3]; - volatile u8 iu_lcr; - volatile u8 pad1[3]; - volatile u8 iu_mcr; - volatile u8 pad2[3]; - volatile u8 iu_lsr; - volatile u8 pad3[3]; - volatile u8 iu_msr; - volatile u8 pad4[3]; - volatile u8 iu_scr; -} ja_uregs_t; - -#define iu_rbr u1.rbr -#define iu_thr u1.thr -#define iu_dll u1.dll -#define iu_ier u2.ier -#define iu_dlm u2.dlm -#define iu_iir u3.iir -#define iu_fcr u3.fcr - -extern unsigned long uart_base; - -static inline struct ja_uartregs *console_uart(void) -{ - return (struct ja_uartregs *) (uart_base + 0x23UL); -} - -void prom_putchar(char c) -{ - struct ja_uartregs *uart = console_uart(); - - while ((uart->iu_lsr & 0x20) == 0); - uart->iu_thr = c; -} - -static void inline ja_console_probe(void) -{ - struct uart_port up; - - /* - * Register to interrupt zero because we share the interrupt with - * the serial driver which we don't properly support yet. - */ - memset(&up, 0, sizeof(up)); - up.membase = (unsigned char *) uart_base + 0x23UL; - up.irq = JAGUAR_ATX_SERIAL1_IRQ; - up.uartclk = JAGUAR_ATX_UART_CLK; - up.regshift = 2; - up.iotype = UPIO_MEM; - up.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST; - up.line = 0; - - if (early_serial_setup(&up)) - printk(KERN_ERR "Early serial init of port 0 failed\n"); -} - -__init void ja_setup_console(void) -{ - ja_console_probe(); -} diff --git a/arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h b/arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h deleted file mode 100644 index 022f697..0000000 --- a/arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Jaguar-ATX Board Register Definitions - * - * (C) 2002 Momentum Computer Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#ifndef __JAGUAR_ATX_FPGA_H__ -#define __JAGUAR_ATX_FPGA_H__ - -#define JAGUAR_ATX_REG_BOARDREV 0x0 -#define JAGUAR_ATX_REG_FPGA_REV 0x1 -#define JAGUAR_ATX_REG_FPGA_TYPE 0x2 -#define JAGUAR_ATX_REG_RESET_STATUS 0x3 -#define JAGUAR_ATX_REG_BOARD_STATUS 0x4 -#define JAGUAR_ATX_REG_RESERVED1 0x5 -#define JAGUAR_ATX_REG_SET 0x6 -#define JAGUAR_ATX_REG_CLR 0x7 -#define JAGUAR_ATX_REG_EEPROM_MODE 0x9 -#define JAGUAR_ATX_REG_RESERVED2 0xa -#define JAGUAR_ATX_REG_RESERVED3 0xb -#define JAGUAR_ATX_REG_RESERVED4 0xc -#define JAGUAR_ATX_REG_PHY_INTSTAT 0xd -#define JAGUAR_ATX_REG_RESERVED5 0xe -#define JAGUAR_ATX_REG_RESERVED6 0xf - -#define JAGUAR_ATX_CS0_ADDR 0xfc000000L - -extern unsigned long ja_fpga_base; - -#define __FPGA_REG_TO_ADDR(reg) \ - ((void *) ja_fpga_base + JAGUAR_ATX_REG_##reg) -#define JAGUAR_FPGA_WRITE(x, reg) writeb(x, __FPGA_REG_TO_ADDR(reg)) -#define JAGUAR_FPGA_READ(reg) readb(__FPGA_REG_TO_ADDR(reg)) - -#endif diff --git a/arch/mips/momentum/jaguar_atx/platform.c b/arch/mips/momentum/jaguar_atx/platform.c deleted file mode 100644 index 5618448..0000000 --- a/arch/mips/momentum/jaguar_atx/platform.c +++ /dev/null @@ -1,208 +0,0 @@ -#include -#include -#include -#include -#include - -#include "jaguar_atx_fpga.h" - -#if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) - -static struct resource mv643xx_eth_shared_resources[] = { - [0] = { - .name = "ethernet shared base", - .start = 0xf1000000 + MV643XX_ETH_SHARED_REGS, - .end = 0xf1000000 + MV643XX_ETH_SHARED_REGS + - MV643XX_ETH_SHARED_REGS_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device mv643xx_eth_shared_device = { - .name = MV643XX_ETH_SHARED_NAME, - .id = 0, - .num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources), - .resource = mv643xx_eth_shared_resources, -}; - -#define MV_SRAM_BASE 0xfe000000UL -#define MV_SRAM_SIZE (256 * 1024) - -#define MV_SRAM_RXRING_SIZE (MV_SRAM_SIZE / 4) -#define MV_SRAM_TXRING_SIZE (MV_SRAM_SIZE / 4) - -#define MV_SRAM_BASE_ETH0 MV_SRAM_BASE -#define MV_SRAM_BASE_ETH1 (MV_SRAM_BASE + (MV_SRAM_SIZE / 2)) - -#define MV64x60_IRQ_ETH_0 48 -#define MV64x60_IRQ_ETH_1 49 -#define MV64x60_IRQ_ETH_2 50 - -static struct resource mv64x60_eth0_resources[] = { - [0] = { - .name = "eth0 irq", - .start = MV64x60_IRQ_ETH_0, - .end = MV64x60_IRQ_ETH_0, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct mv643xx_eth_platform_data eth0_pd = { - .port_number = 0, - - .tx_sram_addr = MV_SRAM_BASE_ETH0, - .tx_sram_size = MV_SRAM_TXRING_SIZE, - .tx_queue_size = MV_SRAM_TXRING_SIZE / 16, - - .rx_sram_addr = MV_SRAM_BASE_ETH0 + MV_SRAM_TXRING_SIZE, - .rx_sram_size = MV_SRAM_RXRING_SIZE, - .rx_queue_size = MV_SRAM_RXRING_SIZE / 16, -}; - -static struct platform_device eth0_device = { - .name = MV643XX_ETH_NAME, - .id = 0, - .num_resources = ARRAY_SIZE(mv64x60_eth0_resources), - .resource = mv64x60_eth0_resources, - .dev = { - .platform_data = ð0_pd, - }, -}; - -static struct resource mv64x60_eth1_resources[] = { - [0] = { - .name = "eth1 irq", - .start = MV64x60_IRQ_ETH_1, - .end = MV64x60_IRQ_ETH_1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct mv643xx_eth_platform_data eth1_pd = { - .port_number = 1, - - .tx_sram_addr = MV_SRAM_BASE_ETH1, - .tx_sram_size = MV_SRAM_TXRING_SIZE, - .tx_queue_size = MV_SRAM_TXRING_SIZE / 16, - - .rx_sram_addr = MV_SRAM_BASE_ETH1 + MV_SRAM_TXRING_SIZE, - .rx_sram_size = MV_SRAM_RXRING_SIZE, - .rx_queue_size = MV_SRAM_RXRING_SIZE / 16, -}; - -static struct platform_device eth1_device = { - .name = MV643XX_ETH_NAME, - .id = 1, - .num_resources = ARRAY_SIZE(mv64x60_eth1_resources), - .resource = mv64x60_eth1_resources, - .dev = { - .platform_data = ð1_pd, - }, -}; - -static struct resource mv64x60_eth2_resources[] = { - [0] = { - .name = "eth2 irq", - .start = MV64x60_IRQ_ETH_2, - .end = MV64x60_IRQ_ETH_2, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct mv643xx_eth_platform_data eth2_pd = { - .port_number = 2, -}; - -static struct platform_device eth2_device = { - .name = MV643XX_ETH_NAME, - .id = 2, - .num_resources = ARRAY_SIZE(mv64x60_eth2_resources), - .resource = mv64x60_eth2_resources, - .dev = { - .platform_data = ð2_pd, - }, -}; - -static struct platform_device *mv643xx_eth_pd_devs[] __initdata = { - &mv643xx_eth_shared_device, - ð0_device, - ð1_device, - ð2_device, -}; - -static u8 __init exchange_bit(u8 val, u8 cs) -{ - /* place the data */ - JAGUAR_FPGA_WRITE((val << 2) | cs, EEPROM_MODE); - udelay(1); - - /* turn the clock on */ - JAGUAR_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE); - udelay(1); - - /* turn the clock off and read-strobe */ - JAGUAR_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE); - - /* return the data */ - return (JAGUAR_FPGA_READ(EEPROM_MODE) >> 3) & 0x1; -} - -static void __init get_mac(char dest[6]) -{ - u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; - int i,j; - - for (i = 0; i < 12; i++) - exchange_bit(read_opcode[i], 1); - - for (j = 0; j < 6; j++) { - dest[j] = 0; - for (i = 0; i < 8; i++) { - dest[j] <<= 1; - dest[j] |= exchange_bit(0, 1); - } - } - - /* turn off CS */ - exchange_bit(0,0); -} - -/* - * Copy and increment ethernet MAC address by a small value. - * - * This is useful for systems where the only one MAC address is stored in - * non-volatile memory for multiple ports. - */ -static inline void eth_mac_add(unsigned char *dst, unsigned char *src, - unsigned int add) -{ - int i; - - BUG_ON(add >= 256); - - for (i = ETH_ALEN; i >= 0; i--) { - dst[i] = src[i] + add; - add = dst[i] < src[i]; /* compute carry */ - } - - WARN_ON(add); -} - -static int __init mv643xx_eth_add_pds(void) -{ - unsigned char mac[ETH_ALEN]; - int ret; - - get_mac(mac); - eth_mac_add(eth0_pd.mac_addr, mac, 0); - eth_mac_add(eth1_pd.mac_addr, mac, 1); - eth_mac_add(eth2_pd.mac_addr, mac, 2); - ret = platform_add_devices(mv643xx_eth_pd_devs, - ARRAY_SIZE(mv643xx_eth_pd_devs)); - - return ret; -} - -device_initcall(mv643xx_eth_add_pds); - -#endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */ diff --git a/arch/mips/momentum/jaguar_atx/prom.c b/arch/mips/momentum/jaguar_atx/prom.c deleted file mode 100644 index 5dd154e..0000000 --- a/arch/mips/momentum/jaguar_atx/prom.c +++ /dev/null @@ -1,210 +0,0 @@ -/* - * Copyright 2002 Momentum Computer Inc. - * Author: Matthew Dharm - * - * Louis Hamilton, Red Hat, Inc. - * hamilton@redhat.com [MIPS64 modifications] - * - * Based on Ocelot Linux port, which is - * Copyright 2001 MontaVista Software Inc. - * Author: jsun@mvista.com or jsun@junsun.net - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * Added changes for SMP - Manish Lachwani (lachwani@pmc-sierra.com) - */ -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "jaguar_atx_fpga.h" - -extern void ja_setup_console(void); - -struct callvectors *debug_vectors; - -extern unsigned long cpu_clock; - -const char *get_system_type(void) -{ - return "Momentum Jaguar-ATX"; -} - -#ifdef CONFIG_64BIT - -unsigned long signext(unsigned long addr) -{ - addr &= 0xffffffff; - return (unsigned long)((int)addr); -} - -void *get_arg(unsigned long args, int arc) -{ - unsigned long ul; - unsigned char *puc, uc; - - args += (arc * 4); - ul = (unsigned long)signext(args); - puc = (unsigned char *)ul; - if (puc == 0) - return (void *)0; - -#ifdef CONFIG_CPU_LITTLE_ENDIAN - uc = *puc++; - l = (unsigned long)uc; - uc = *puc++; - ul |= (((unsigned long)uc) << 8); - uc = *puc++; - ul |= (((unsigned long)uc) << 16); - uc = *puc++; - ul |= (((unsigned long)uc) << 24); -#else - uc = *puc++; - ul = ((unsigned long)uc) << 24; - uc = *puc++; - ul |= (((unsigned long)uc) << 16); - uc = *puc++; - ul |= (((unsigned long)uc) << 8); - uc = *puc++; - ul |= ((unsigned long)uc); -#endif - ul = signext(ul); - - return (void *)ul; -} - -char *arg64(unsigned long addrin, int arg_index) -{ - unsigned long args; - char *p; - - args = signext(addrin); - p = (char *)get_arg(args, arg_index); - - return p; -} -#endif /* CONFIG_64BIT */ - -/* PMON passes arguments in C main() style */ -void __init prom_init(void) -{ - int argc = fw_arg0; - char **arg = (char **) fw_arg1; - char **env = (char **) fw_arg2; - struct callvectors *cv = (struct callvectors *) fw_arg3; - int i; - -#ifdef CONFIG_SERIAL_8250_CONSOLE -// ja_setup_console(); /* The very first thing. */ -#endif - -#ifdef CONFIG_64BIT - char *ptr; - - printk("Mips64 Jaguar-ATX\n"); - /* save the PROM vectors for debugging use */ - debug_vectors = (struct callvectors *)signext((unsigned long)cv); - - /* arg[0] is "g", the rest is boot parameters */ - arcs_cmdline[0] = '\0'; - - for (i = 1; i < argc; i++) { - ptr = (char *)arg64((unsigned long)arg, i); - if ((strlen(arcs_cmdline) + strlen(ptr) + 1) >= - sizeof(arcs_cmdline)) - break; - strcat(arcs_cmdline, ptr); - strcat(arcs_cmdline, " "); - } - - i = 0; - while (1) { - ptr = (char *)arg64((unsigned long)env, i); - if (! ptr) - break; - - if (strncmp("gtbase", ptr, strlen("gtbase")) == 0) { - marvell_base = simple_strtol(ptr + strlen("gtbase="), - NULL, 16); - - if ((marvell_base & 0xffffffff00000000) == 0) - marvell_base |= 0xffffffff00000000; - - printk("marvell_base set to 0x%016lx\n", marvell_base); - } - if (strncmp("cpuclock", ptr, strlen("cpuclock")) == 0) { - cpu_clock = simple_strtol(ptr + strlen("cpuclock="), - NULL, 10); - printk("cpu_clock set to %d\n", cpu_clock); - } - i++; - } - printk("arcs_cmdline: %s\n", arcs_cmdline); - -#else /* CONFIG_64BIT */ - /* save the PROM vectors for debugging use */ - debug_vectors = cv; - - /* arg[0] is "g", the rest is boot parameters */ - arcs_cmdline[0] = '\0'; - for (i = 1; i < argc; i++) { - if (strlen(arcs_cmdline) + strlen(arg[i] + 1) - >= sizeof(arcs_cmdline)) - break; - strcat(arcs_cmdline, arg[i]); - strcat(arcs_cmdline, " "); - } - - while (*env) { - if (strncmp("gtbase", *env, strlen("gtbase")) == 0) { - marvell_base = simple_strtol(*env + strlen("gtbase="), - NULL, 16); - } - if (strncmp("cpuclock", *env, strlen("cpuclock")) == 0) { - cpu_clock = simple_strtol(*env + strlen("cpuclock="), - NULL, 10); - } - env++; - } -#endif /* CONFIG_64BIT */ - mips_machgroup = MACH_GROUP_MOMENCO; - mips_machtype = MACH_MOMENCO_JAGUAR_ATX; -} - -void __init prom_free_prom_memory(void) -{ -} - -void __init prom_fixup_mem_map(unsigned long start, unsigned long end) -{ -} - -int prom_boot_secondary(int cpu, unsigned long sp, unsigned long gp) -{ - /* Clear the semaphore */ - *(volatile uint32_t *)(0xbb000a68) = 0x80000000; - - return 1; -} - -void prom_init_secondary(void) -{ - clear_c0_config(CONF_CM_CMASK); - set_c0_config(0x2); - - clear_c0_status(ST0_IM); - set_c0_status(0x1ffff); -} - -void prom_smp_finish(void) -{ -} diff --git a/arch/mips/momentum/jaguar_atx/reset.c b/arch/mips/momentum/jaguar_atx/reset.c deleted file mode 100644 index c73b089..0000000 --- a/arch/mips/momentum/jaguar_atx/reset.c +++ /dev/null @@ -1,56 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * Copyright (C) 1997, 2001 Ralf Baechle - * Copyright 2001 MontaVista Software Inc. - * Author: jsun@mvista.com or jsun@junsun.net - * - * Copyright (C) 2002 Momentum Computer Inc. - * Author: Matthew Dharm - * - * Louis Hamilton, Red Hat, Inc. - * hamilton@redhat.com [MIPS64 modifications] - */ -#include -#include -#include -#include -#include -#include -#include -#include - -void momenco_jaguar_restart(char *command) -{ - /* base address of timekeeper portion of part */ -#ifdef CONFIG_64BIT - void *nvram = (void*) 0xfffffffffc807000; -#else - void *nvram = (void*) 0xfc807000; -#endif - /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */ - writeb(0x84, nvram + 0xff7); - - /* wait for the watchdog to go off */ - mdelay(100+(1000/16)); - - /* if the watchdog fails for some reason, let people know */ - printk(KERN_NOTICE "Watchdog reset failed\n"); -} - -void momenco_jaguar_halt(void) -{ - printk(KERN_NOTICE "\n** You can safely turn off the power\n"); - while (1) - __asm__(".set\tmips3\n\t" - "wait\n\t" - ".set\tmips0"); -} - -void momenco_jaguar_power_off(void) -{ - momenco_jaguar_halt(); -} diff --git a/arch/mips/momentum/jaguar_atx/setup.c b/arch/mips/momentum/jaguar_atx/setup.c deleted file mode 100644 index 5a51014..0000000 --- a/arch/mips/momentum/jaguar_atx/setup.c +++ /dev/null @@ -1,475 +0,0 @@ -/* - * BRIEF MODULE DESCRIPTION - * Momentum Computer Jaguar-ATX board dependent boot routines - * - * Copyright (C) 1996, 1997, 2001, 04, 06 Ralf Baechle (ralf@linux-mips.org) - * Copyright (C) 2000 RidgeRun, Inc. - * Copyright (C) 2001 Red Hat, Inc. - * Copyright (C) 2002 Momentum Computer - * - * Author: Matthew Dharm, Momentum Computer - * mdharm@momenco.com - * - * Louis Hamilton, Red Hat, Inc. - * hamilton@redhat.com [MIPS64 modifications] - * - * Author: RidgeRun, Inc. - * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com - * - * Copyright 2001 MontaVista Software Inc. - * Author: jsun@mvista.com or jsun@junsun.net - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "jaguar_atx_fpga.h" - -extern unsigned long mv64340_sram_base; -unsigned long cpu_clock; - -/* These functions are used for rebooting or halting the machine*/ -extern void momenco_jaguar_restart(char *command); -extern void momenco_jaguar_halt(void); -extern void momenco_jaguar_power_off(void); - -void momenco_time_init(void); - -static char reset_reason; - -static inline unsigned long ENTRYLO(unsigned long paddr) -{ - return ((paddr & PAGE_MASK) | - (_PAGE_PRESENT | __READABLE | __WRITEABLE | _PAGE_GLOBAL | - _CACHE_UNCACHED)) >> 6; -} - -void __init bus_error_init(void) { /* nothing */ } - -/* - * Load a few TLB entries for the MV64340 and perhiperals. The MV64340 is going - * to be hit on every IRQ anyway - there's absolutely no point in letting it be - * a random TLB entry, as it'll just cause needless churning of the TLB. And we - * use the other half for the serial port, which is just a PITA otherwise :) - * - * Device Physical Virtual - * MV64340 Internal Regs 0xf4000000 0xf4000000 - * Ocelot-C[S] PLD (CS0) 0xfc000000 0xfc000000 - * NVRAM (CS1) 0xfc800000 0xfc800000 - * UARTs (CS2) 0xfd000000 0xfd000000 - * Internal SRAM 0xfe000000 0xfe000000 - * M-Systems DOC (CS3) 0xff000000 0xff000000 - */ - -static __init void wire_stupidity_into_tlb(void) -{ -#ifdef CONFIG_32BIT - write_c0_wired(0); - local_flush_tlb_all(); - - /* marvell and extra space */ - add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), - 0xf4000000UL, PM_64K); - /* fpga, rtc, and uart */ - add_wired_entry(ENTRYLO(0xfc000000), ENTRYLO(0xfd000000), - 0xfc000000UL, PM_16M); -// /* m-sys and internal SRAM */ -// add_wired_entry(ENTRYLO(0xfe000000), ENTRYLO(0xff000000), -// 0xfe000000UL, PM_16M); - - marvell_base = 0xf4000000; - //mv64340_sram_base = 0xfe000000; /* Currently unused */ -#endif -} - -unsigned long marvell_base = 0xf4000000L; -unsigned long ja_fpga_base = JAGUAR_ATX_CS0_ADDR; -unsigned long uart_base = 0xfd000000L; -static unsigned char *rtc_base = (unsigned char*) 0xfc800000L; - -EXPORT_SYMBOL(marvell_base); - -static __init int per_cpu_mappings(void) -{ - marvell_base = (unsigned long) ioremap(0xf4000000, 0x10000); - ja_fpga_base = (unsigned long) ioremap(JAGUAR_ATX_CS0_ADDR, 0x1000); - uart_base = (unsigned long) ioremap(0xfd000000UL, 0x1000); - rtc_base = ioremap(0xfc000000UL, 0x8000); - // ioremap(0xfe000000, 32 << 20); - write_c0_wired(0); - local_flush_tlb_all(); - ja_setup_console(); - - return 0; -} -arch_initcall(per_cpu_mappings); - -unsigned long m48t37y_get_time(void) -{ - unsigned int year, month, day, hour, min, sec; - unsigned long flags; - - spin_lock_irqsave(&rtc_lock, flags); - /* stop the update */ - rtc_base[0x7ff8] = 0x40; - - year = BCD2BIN(rtc_base[0x7fff]); - year += BCD2BIN(rtc_base[0x7ff1]) * 100; - - month = BCD2BIN(rtc_base[0x7ffe]); - - day = BCD2BIN(rtc_base[0x7ffd]); - - hour = BCD2BIN(rtc_base[0x7ffb]); - min = BCD2BIN(rtc_base[0x7ffa]); - sec = BCD2BIN(rtc_base[0x7ff9]); - - /* start the update */ - rtc_base[0x7ff8] = 0x00; - spin_unlock_irqrestore(&rtc_lock, flags); - - return mktime(year, month, day, hour, min, sec); -} - -int m48t37y_set_time(unsigned long sec) -{ - struct rtc_time tm; - unsigned long flags; - - /* convert to a more useful format -- note months count from 0 */ - to_tm(sec, &tm); - tm.tm_mon += 1; - - spin_lock_irqsave(&rtc_lock, flags); - /* enable writing */ - rtc_base[0x7ff8] = 0x80; - - /* year */ - rtc_base[0x7fff] = BIN2BCD(tm.tm_year % 100); - rtc_base[0x7ff1] = BIN2BCD(tm.tm_year / 100); - - /* month */ - rtc_base[0x7ffe] = BIN2BCD(tm.tm_mon); - - /* day */ - rtc_base[0x7ffd] = BIN2BCD(tm.tm_mday); - - /* hour/min/sec */ - rtc_base[0x7ffb] = BIN2BCD(tm.tm_hour); - rtc_base[0x7ffa] = BIN2BCD(tm.tm_min); - rtc_base[0x7ff9] = BIN2BCD(tm.tm_sec); - - /* day of week -- not really used, but let's keep it up-to-date */ - rtc_base[0x7ffc] = BIN2BCD(tm.tm_wday + 1); - - /* disable writing */ - rtc_base[0x7ff8] = 0x00; - spin_unlock_irqrestore(&rtc_lock, flags); - - return 0; -} - -void __init plat_timer_setup(struct irqaction *irq) -{ - setup_irq(8, irq); -} - -/* - * Ugly but the least of all evils. TLB initialization did flush the TLB so - * We need to setup mappings again before we can touch the RTC. - */ -void momenco_time_init(void) -{ - wire_stupidity_into_tlb(); - - mips_hpt_frequency = cpu_clock / 2; - - rtc_mips_get_time = m48t37y_get_time; - rtc_mips_set_time = m48t37y_set_time; -} - -static struct resource mv_pci_io_mem0_resource = { - .name = "MV64340 PCI0 IO MEM", - .flags = IORESOURCE_IO -}; - -static struct resource mv_pci_mem0_resource = { - .name = "MV64340 PCI0 MEM", - .flags = IORESOURCE_MEM -}; - -static struct mv_pci_controller mv_bus0_controller = { - .pcic = { - .pci_ops = &mv_pci_ops, - .mem_resource = &mv_pci_mem0_resource, - .io_resource = &mv_pci_io_mem0_resource, - }, - .config_addr = MV64340_PCI_0_CONFIG_ADDR, - .config_vreg = MV64340_PCI_0_CONFIG_DATA_VIRTUAL_REG, -}; - -static uint32_t mv_io_base, mv_io_size; - -static void ja_pci0_init(void) -{ - uint32_t mem0_base, mem0_size; - uint32_t io_base, io_size; - - io_base = MV_READ(MV64340_PCI_0_IO_BASE_ADDR) << 16; - io_size = (MV_READ(MV64340_PCI_0_IO_SIZE) + 1) << 16; - mem0_base = MV_READ(MV64340_PCI_0_MEMORY0_BASE_ADDR) << 16; - mem0_size = (MV_READ(MV64340_PCI_0_MEMORY0_SIZE) + 1) << 16; - - mv_pci_io_mem0_resource.start = 0; - mv_pci_io_mem0_resource.end = io_size - 1; - mv_pci_mem0_resource.start = mem0_base; - mv_pci_mem0_resource.end = mem0_base + mem0_size - 1; - mv_bus0_controller.pcic.mem_offset = mem0_base; - mv_bus0_controller.pcic.io_offset = 0; - - ioport_resource.end = io_size - 1; - - register_pci_controller(&mv_bus0_controller.pcic); - - mv_io_base = io_base; - mv_io_size = io_size; -} - -static struct resource mv_pci_io_mem1_resource = { - .name = "MV64340 PCI1 IO MEM", - .flags = IORESOURCE_IO -}; - -static struct resource mv_pci_mem1_resource = { - .name = "MV64340 PCI1 MEM", - .flags = IORESOURCE_MEM -}; - -static struct mv_pci_controller mv_bus1_controller = { - .pcic = { - .pci_ops = &mv_pci_ops, - .mem_resource = &mv_pci_mem1_resource, - .io_resource = &mv_pci_io_mem1_resource, - }, - .config_addr = MV64340_PCI_1_CONFIG_ADDR, - .config_vreg = MV64340_PCI_1_CONFIG_DATA_VIRTUAL_REG, -}; - -static __init void ja_pci1_init(void) -{ - uint32_t mem0_base, mem0_size; - uint32_t io_base, io_size; - - io_base = MV_READ(MV64340_PCI_1_IO_BASE_ADDR) << 16; - io_size = (MV_READ(MV64340_PCI_1_IO_SIZE) + 1) << 16; - mem0_base = MV_READ(MV64340_PCI_1_MEMORY0_BASE_ADDR) << 16; - mem0_size = (MV_READ(MV64340_PCI_1_MEMORY0_SIZE) + 1) << 16; - - /* - * Here we assume the I/O window of second bus to be contiguous with - * the first. A gap is no problem but would waste address space for - * remapping the port space. - */ - mv_pci_io_mem1_resource.start = mv_io_size; - mv_pci_io_mem1_resource.end = mv_io_size + io_size - 1; - mv_pci_mem1_resource.start = mem0_base; - mv_pci_mem1_resource.end = mem0_base + mem0_size - 1; - mv_bus1_controller.pcic.mem_offset = mem0_base; - mv_bus1_controller.pcic.io_offset = 0; - - ioport_resource.end = io_base + io_size -mv_io_base - 1; - - register_pci_controller(&mv_bus1_controller.pcic); - - mv_io_size = io_base + io_size - mv_io_base; -} - -static __init int __init ja_pci_init(void) -{ - unsigned long io_v_base; - uint32_t enable; - - enable = ~MV_READ(MV64340_BASE_ADDR_ENABLE); - - /* - * We require at least one enabled I/O or PCI memory window or we - * will ignore this PCI bus. We ignore PCI windows 1, 2 and 3. - */ - if (enable & (0x01 << 9) || enable & (0x01 << 10)) - ja_pci0_init(); - - if (enable & (0x01 << 14) || enable & (0x01 << 15)) - ja_pci1_init(); - - if (mv_io_size) { - io_v_base = (unsigned long) ioremap(mv_io_base, mv_io_size); - if (!io_v_base) - panic("Could not ioremap I/O port range"); - - set_io_port_base(io_v_base); - } - - return 0; -} - -arch_initcall(ja_pci_init); - -void __init plat_mem_setup(void) -{ - unsigned int tmpword; - - board_time_init = momenco_time_init; - - _machine_restart = momenco_jaguar_restart; - _machine_halt = momenco_jaguar_halt; - pm_power_off = momenco_jaguar_power_off; - - /* - * initrd_start = (unsigned long)jaguar_initrd_start; - * initrd_end = (unsigned long)jaguar_initrd_start + (ulong)jaguar_initrd_size; - * initrd_below_start_ok = 1; - */ - - wire_stupidity_into_tlb(); - - /* - * shut down ethernet ports, just to be sure our memory doesn't get - * corrupted by random ethernet traffic. - */ - MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(0), 0xff << 8); - MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(1), 0xff << 8); - MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(2), 0xff << 8); - MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(0), 0xff << 8); - MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(1), 0xff << 8); - MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(2), 0xff << 8); - while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(0)) & 0xff); - while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(1)) & 0xff); - while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(2)) & 0xff); - while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(0)) & 0xff); - while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(1)) & 0xff); - while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(2)) & 0xff); - MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(0), - MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(0)) & ~1); - MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(1), - MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(1)) & ~1); - MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(2), - MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(2)) & ~1); - - /* Turn off the Bit-Error LED */ - JAGUAR_FPGA_WRITE(0x80, CLR); - - tmpword = JAGUAR_FPGA_READ(BOARDREV); - if (tmpword < 26) - printk("Momentum Jaguar-ATX: Board Assembly Rev. %c\n", - 'A'+tmpword); - else - printk("Momentum Jaguar-ATX: Board Assembly Revision #0x%x\n", - tmpword); - - tmpword = JAGUAR_FPGA_READ(FPGA_REV); - printk("FPGA Rev: %d.%d\n", tmpword>>4, tmpword&15); - tmpword = JAGUAR_FPGA_READ(RESET_STATUS); - printk("Reset reason: 0x%x\n", tmpword); - switch (tmpword) { - case 0x1: - printk(" - Power-up reset\n"); - break; - case 0x2: - printk(" - Push-button reset\n"); - break; - case 0x8: - printk(" - Watchdog reset\n"); - break; - case 0x10: - printk(" - JTAG reset\n"); - break; - default: - printk(" - Unknown reset cause\n"); - } - reset_reason = tmpword; - JAGUAR_FPGA_WRITE(0xff, RESET_STATUS); - - tmpword = JAGUAR_FPGA_READ(BOARD_STATUS); - printk("Board Status register: 0x%02x\n", tmpword); - printk(" - User jumper: %s\n", (tmpword & 0x80)?"installed":"absent"); - printk(" - Boot flash write jumper: %s\n", (tmpword&0x40)?"installed":"absent"); - - /* 256MiB of RM9000x2 DDR */ -// add_memory_region(0x0, 0x100<<20, BOOT_MEM_RAM); - - /* 128MiB of MV-64340 DDR */ -// add_memory_region(0x100<<20, 0x80<<20, BOOT_MEM_RAM); - - /* XXX Memory configuration should be picked up from PMON2k */ -#ifdef CONFIG_JAGUAR_DMALOW - printk("Jaguar ATX DMA-low mode set\n"); - add_memory_region(0x00000000, 0x08000000, BOOT_MEM_RAM); - add_memory_region(0x08000000, 0x10000000, BOOT_MEM_RAM); -#else - /* 128MiB of MV-64340 DDR RAM */ - printk("Jaguar ATX DMA-low mode is not set\n"); - add_memory_region(0x100<<20, 0x80<<20, BOOT_MEM_RAM); -#endif - -#ifdef GEMDEBUG_TRACEBUFFER - { - unsigned int tbControl; - tbControl = - 0 << 26 | /* post trigger delay 0 */ - 0x2 << 16 | /* sequential trace mode */ - // 0x0 << 16 | /* non-sequential trace mode */ - // 0xf << 4 | /* watchpoints disabled */ - 2 << 2 | /* armed */ - 2 ; /* interrupt disabled */ - printk ("setting tbControl = %08lx\n", tbControl); - write_32bit_cp0_set1_register($22, tbControl); - __asm__ __volatile__(".set noreorder\n\t" \ - "nop; nop; nop; nop; nop; nop;\n\t" \ - "nop; nop; nop; nop; nop; nop;\n\t" \ - ".set reorder\n\t"); - - } -#endif -} diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index 30a1c79..aba3dbf 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile @@ -30,7 +30,6 @@ obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o obj-$(CONFIG_SOC_AU1550) += fixup-au1000.o ops-au1000.o obj-$(CONFIG_SOC_PNX8550) += fixup-pnx8550.o ops-pnx8550.o obj-$(CONFIG_MIPS_MALTA) += fixup-malta.o -obj-$(CONFIG_MOMENCO_JAGUAR_ATX)+= fixup-jaguar.o obj-$(CONFIG_MOMENCO_OCELOT) += fixup-ocelot.o pci-ocelot.o obj-$(CONFIG_MOMENCO_OCELOT_3) += fixup-ocelot3.o obj-$(CONFIG_MOMENCO_OCELOT_C) += fixup-ocelot-c.o pci-ocelot-c.o diff --git a/arch/mips/pci/fixup-jaguar.c b/arch/mips/pci/fixup-jaguar.c deleted file mode 100644 index 6c5e1d4..0000000 --- a/arch/mips/pci/fixup-jaguar.c +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Marvell MV64340 interrupt fixup code. - * - * Marvell wants an NDA for their docs so this was written without - * documentation. You've been warned. - * - * Copyright (C) 2004 Ralf Baechle (ralf@linux-mips.org) - */ -#include -#include -#include - -#include - -/* - * WARNING: Example of how _NOT_ to do it. - */ -int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) -{ - int bus = dev->bus->number; - - if (bus == 0 && slot == 1) - return 3; /* PCI-X A */ - if (bus == 0 && slot == 2) - return 4; /* PCI-X B */ - if (bus == 1 && slot == 1) - return 5; /* PCI A */ - if (bus == 1 && slot == 2) - return 6; /* PCI B */ - -return 0; - panic("Whooops in pcibios_map_irq"); -} - -/* Do platform specific device initialization at pci_enable_device() time */ -int pcibios_plat_dev_init(struct pci_dev *dev) -{ - return 0; -} diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h index 05fc263..a66e49a 100644 --- a/include/asm-mips/bootinfo.h +++ b/include/asm-mips/bootinfo.h @@ -121,7 +121,7 @@ #define MACH_MOMENCO_OCELOT 0 #define MACH_MOMENCO_OCELOT_G 1 /* no more supported (may 2007) */ #define MACH_MOMENCO_OCELOT_C 2 -#define MACH_MOMENCO_JAGUAR_ATX 3 +#define MACH_MOMENCO_JAGUAR_ATX 3 /* no more supported (may 2007) */ #define MACH_MOMENCO_OCELOT_3 4 /* diff --git a/include/asm-mips/mach-ja/cpu-feature-overrides.h b/include/asm-mips/mach-ja/cpu-feature-overrides.h deleted file mode 100644 index 84b6dea..0000000 --- a/include/asm-mips/mach-ja/cpu-feature-overrides.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2003, 2004 Ralf Baechle - */ -#ifndef __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H -#define __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H - -/* - * Momentum Jaguar ATX always has the RM9000 processor. - */ -#define cpu_has_watch 1 -#define cpu_has_mips16 0 -#define cpu_has_divec 0 -#define cpu_has_vce 0 -#define cpu_has_cache_cdex_p 0 -#define cpu_has_cache_cdex_s 0 -#define cpu_has_prefetch 1 -#define cpu_has_mcheck 0 -#define cpu_has_ejtag 0 - -#define cpu_has_llsc 1 -#define cpu_has_vtag_icache 0 -#define cpu_has_dc_aliases 0 -#define cpu_has_ic_fills_f_dc 0 -#define cpu_has_dsp 0 -#define cpu_icache_snoops_remote_store 0 - -#define cpu_has_nofpuex 0 -#define cpu_has_64bits 1 - -#define cpu_has_inclusive_pcaches 0 - -#define cpu_dcache_line_size() 32 -#define cpu_icache_line_size() 32 -#define cpu_scache_line_size() 32 - -#define cpu_has_mips32r1 0 -#define cpu_has_mips32r2 0 -#define cpu_has_mips64r1 0 -#define cpu_has_mips64r2 0 - -#endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-ja/spaces.h b/include/asm-mips/mach-ja/spaces.h deleted file mode 100644 index 8466a0e..0000000 --- a/include/asm-mips/mach-ja/spaces.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle - * Copyright (C) 2000, 2002 Maciej W. Rozycki - * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc. - */ -#ifndef __ASM_MACH_JA_SPACES_H -#define __ASM_MACH_JA_SPACES_H - -/* - * Memory above this physical address will be considered highmem. - */ -#define HIGHMEM_START 0x08000000UL - -#include_next - -#endif /* __ASM_MACH_JA_SPACES_H */ diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h index 5e0da6e..ce51213 100644 --- a/include/asm-mips/serial.h +++ b/include/asm-mips/serial.h @@ -81,25 +81,6 @@ #define STD_SERIAL_PORT_DEFNS #endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */ -#ifdef CONFIG_MOMENCO_JAGUAR_ATX -/* Ordinary NS16552 duart with a 20MHz crystal. */ -#define JAGUAR_ATX_UART_CLK 20000000 -#define JAGUAR_ATX_BASE_BAUD (JAGUAR_ATX_UART_CLK / 16) - -#define JAGUAR_ATX_SERIAL1_IRQ 6 -#define JAGUAR_ATX_SERIAL1_BASE 0xfd000023L - -#define _JAGUAR_ATX_SERIAL_INIT(int, base) \ - { .baud_base = JAGUAR_ATX_BASE_BAUD, irq: int, \ - .flags = (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ - .iomem_base = (u8 *) base, iomem_reg_shift: 2, \ - io_type: SERIAL_IO_MEM } -#define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS \ - _JAGUAR_ATX_SERIAL_INIT(JAGUAR_ATX_SERIAL1_IRQ, JAGUAR_ATX_SERIAL1_BASE) -#else -#define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS -#endif - #ifdef CONFIG_MOMENCO_OCELOT_3 #define OCELOT_3_BASE_BAUD ( 20000000 / 16 ) #define OCELOT_3_SERIAL_IRQ 6 -- 1.5.1.3 From vagabon.xyz@gmail.com Mon May 7 17:00:58 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 07 May 2007 17:01:03 +0100 (BST) Received: from wr-out-0506.google.com ([64.233.184.234]:26601 "EHLO wr-out-0506.google.com") by ftp.linux-mips.org with ESMTP id S20022094AbXEGQAe (ORCPT ); Mon, 7 May 2007 17:00:34 +0100 Received: by wr-out-0506.google.com with SMTP id q50so1661382wrq for ; Mon, 07 May 2007 09:00:32 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=nJODJaGD+6GsbRipkzp/dJSsCYGbwePCZRzWhe7QCRFjH+EsFvd2LVrv4QTdgNPY/Y15Sng3g3pVDSfC8LOk8XOrdvkmO2V7ADFm0XZI6WXwXKDBnWyBOp7Bga+V7I3b2w8bMlRCU9PIGxTV7GIKIPtqIRJ1PA0pZ0upreEovDs= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=Y/3yQ3zM48Wp5WCwOvUYoR670L7gVpdcnyf+VfQTGM+iVTrq7JJj7N/dFe3l/szgTgJMBdIf6w3oXsUCiEowoQYFqRjhvLd1enzSB6jOntWDHA2qQkd2GChZUHrftUWlK8L0oz6F1uSf8CJMX2hlAeNK0nC8Wn6eXsI8gRYR8Pk= Received: by 10.90.88.13 with SMTP id l13mr5276815agb.1178553631586; Mon, 07 May 2007 09:00:31 -0700 (PDT) Received: from spoutnik.innova-card.com ( [81.252.61.1]) by mx.google.com with ESMTP id q30sm8382478wrq.2007.05.07.09.00.10; Mon, 07 May 2007 09:00:17 -0700 (PDT) Received: by spoutnik.innova-card.com (Postfix, from userid 500) id 6F9F723F76A; Mon, 7 May 2007 18:01:54 +0200 (CEST) To: ralf@linux-mips.org Cc: anemo@mba.ocn.ne.jp, linux-mips@linux-mips.org Subject: [PATCH 1/3] Remove Momenco Ocelot G support Date: Mon, 7 May 2007 18:01:51 +0200 Message-Id: <11785537144016-git-send-email-fbuihuu@gmail.com> X-Mailer: git-send-email 1.5.1.3 In-Reply-To: <11785537132378-git-send-email-fbuihuu@gmail.com> References: <11785537132378-git-send-email-fbuihuu@gmail.com> From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14979 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips From: Franck Bui-Huu Signed-off-by: Franck Bui-Huu --- arch/mips/Kconfig | 23 +- arch/mips/Makefile | 9 - arch/mips/configs/ocelot_g_defconfig | 981 ------------------------------ arch/mips/momentum/ocelot_g/Makefile | 6 - arch/mips/momentum/ocelot_g/dbg_io.c | 121 ---- arch/mips/momentum/ocelot_g/gt-irq.c | 212 ------- arch/mips/momentum/ocelot_g/irq.c | 101 --- arch/mips/momentum/ocelot_g/ocelot_pld.h | 30 - arch/mips/momentum/ocelot_g/prom.c | 84 --- arch/mips/momentum/ocelot_g/reset.c | 47 -- arch/mips/momentum/ocelot_g/setup.c | 267 -------- arch/mips/pci/Makefile | 1 - arch/mips/pci/fixup-ocelot-g.c | 37 -- arch/mips/pci/pci-ocelot-g.c | 97 --- include/asm-mips/bootinfo.h | 2 +- include/asm-mips/serial.h | 22 - 16 files changed, 4 insertions(+), 2036 deletions(-) delete mode 100644 arch/mips/configs/ocelot_g_defconfig delete mode 100644 arch/mips/momentum/ocelot_g/Makefile delete mode 100644 arch/mips/momentum/ocelot_g/dbg_io.c delete mode 100644 arch/mips/momentum/ocelot_g/gt-irq.c delete mode 100644 arch/mips/momentum/ocelot_g/irq.c delete mode 100644 arch/mips/momentum/ocelot_g/ocelot_pld.h delete mode 100644 arch/mips/momentum/ocelot_g/prom.c delete mode 100644 arch/mips/momentum/ocelot_g/reset.c delete mode 100644 arch/mips/momentum/ocelot_g/setup.c delete mode 100644 arch/mips/pci/fixup-ocelot-g.c delete mode 100644 arch/mips/pci/pci-ocelot-g.c diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 130d825..ab79b98 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -446,23 +446,6 @@ config MOMENCO_OCELOT_C The Ocelot is a MIPS-based Single Board Computer (SBC) made by Momentum Computer . -config MOMENCO_OCELOT_G - bool "Momentum Ocelot-G board" - select DMA_NONCOHERENT - select HW_HAS_PCI - select IRQ_CPU - select IRQ_CPU_RM7K - select PCI_MARVELL - select RM7000_CPU_SCACHE - select SWAP_IO_SPACE - select SYS_HAS_CPU_RM7000 - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL if BROKEN - select SYS_SUPPORTS_BIG_ENDIAN - help - The Ocelot is a MIPS-based Single Board Computer (SBC) made by - Momentum Computer . - config MIPS_XXS1500 bool "MyCable XXS1500 board" select DMA_NONCOHERENT @@ -1080,9 +1063,9 @@ config WDT_RM9000 choice prompt "Galileo Chip Clock" #default SYSCLK_83 if MIPS_EV64120 - depends on MIPS_EV64120 || MOMENCO_OCELOT || MOMENCO_OCELOT_G + depends on MIPS_EV64120 || MOMENCO_OCELOT default SYSCLK_83 if MIPS_EV64120 - default SYSCLK_100 if MOMENCO_OCELOT || MOMENCO_OCELOT_G + default SYSCLK_100 if MOMENCO_OCELOT config SYSCLK_75 bool "75" if MIPS_EV64120 @@ -1091,7 +1074,7 @@ config SYSCLK_83 bool "83.3" if MIPS_EV64120 config SYSCLK_100 - bool "100" if MIPS_EV64120 || MOMENCO_OCELOT || MOMENCO_OCELOT_G + bool "100" if MIPS_EV64120 || MOMENCO_OCELOT endchoice diff --git a/arch/mips/Makefile b/arch/mips/Makefile index f2f742d..3e8a777 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -343,15 +343,6 @@ cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000 # -# Momentum Ocelot-G board -# -# The Ocelot-G setup.o must be linked early - it does the ioremap() for the -# mips_io_port_base. -# -core-$(CONFIG_MOMENCO_OCELOT_G) += arch/mips/momentum/ocelot_g/ -load-$(CONFIG_MOMENCO_OCELOT_G) += 0xffffffff80100000 - -# # Momentum Ocelot-C and -CS boards # # The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the diff --git a/arch/mips/configs/ocelot_g_defconfig b/arch/mips/configs/ocelot_g_defconfig deleted file mode 100644 index 7078e6b..0000000 --- a/arch/mips/configs/ocelot_g_defconfig +++ /dev/null @@ -1,981 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.20 -# Tue Feb 20 21:47:36 2007 -# -CONFIG_MIPS=y - -# -# Machine selection -# -CONFIG_ZONE_DMA=y -# CONFIG_MIPS_MTX1 is not set -# CONFIG_MIPS_BOSPORUS is not set -# CONFIG_MIPS_PB1000 is not set -# CONFIG_MIPS_PB1100 is not set -# CONFIG_MIPS_PB1500 is not set -# CONFIG_MIPS_PB1550 is not set -# CONFIG_MIPS_PB1200 is not set -# CONFIG_MIPS_DB1000 is not set -# CONFIG_MIPS_DB1100 is not set -# CONFIG_MIPS_DB1500 is not set -# CONFIG_MIPS_DB1550 is not set -# CONFIG_MIPS_DB1200 is not set -# CONFIG_MIPS_MIRAGE is not set -# CONFIG_BASLER_EXCITE is not set -# CONFIG_MIPS_COBALT is not set -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MIPS_EV64120 is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_LASAT is not set -# CONFIG_MIPS_ATLAS is not set -# CONFIG_MIPS_MALTA is not set -# CONFIG_MIPS_SEAD is not set -# CONFIG_WR_PPMC is not set -# CONFIG_MIPS_SIM is not set -# CONFIG_MOMENCO_JAGUAR_ATX is not set -# CONFIG_MOMENCO_OCELOT is not set -# CONFIG_MOMENCO_OCELOT_3 is not set -# CONFIG_MOMENCO_OCELOT_C is not set -CONFIG_MOMENCO_OCELOT_G=y -# CONFIG_MIPS_XXS1500 is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_STB810 is not set -# CONFIG_DDB5477 is not set -# CONFIG_MACH_VR41XX is not set -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_QEMU is not set -# CONFIG_MARKEINS is not set -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_SWARM is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_PTSWARM is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM is not set -# CONFIG_TOSHIBA_JMR3927 is not set -# CONFIG_TOSHIBA_RBTX4927 is not set -# CONFIG_TOSHIBA_RBTX4938 is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_TIME=y -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y -# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set -CONFIG_DMA_NONCOHERENT=y -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_CPU_BIG_ENDIAN=y -# CONFIG_CPU_LITTLE_ENDIAN is not set -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_IRQ_CPU=y -CONFIG_IRQ_CPU_RM7K=y -CONFIG_PCI_MARVELL=y -CONFIG_SWAP_IO_SPACE=y -# CONFIG_SYSCLK_75 is not set -# CONFIG_SYSCLK_83 is not set -CONFIG_SYSCLK_100=y -CONFIG_MIPS_L1_CACHE_SHIFT=5 - -# -# CPU selection -# -# CONFIG_CPU_MIPS32_R1 is not set -# CONFIG_CPU_MIPS32_R2 is not set -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_VR41XX is not set -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_NEVADA is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_R10000 is not set -CONFIG_CPU_RM7000=y -# CONFIG_CPU_RM9000 is not set -# CONFIG_CPU_SB1 is not set -CONFIG_SYS_HAS_CPU_RM7000=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y - -# -# Kernel type -# -CONFIG_32BIT=y -# CONFIG_64BIT is not set -CONFIG_PAGE_SIZE_4KB=y -# CONFIG_PAGE_SIZE_8KB is not set -# CONFIG_PAGE_SIZE_16KB is not set -# CONFIG_PAGE_SIZE_64KB is not set -CONFIG_BOARD_SCACHE=y -CONFIG_RM7000_CPU_SCACHE=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -# CONFIG_MIPS_VPE_LOADER is not set -# CONFIG_64BIT_PHYS_ADDR is not set -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -CONFIG_ARCH_FLATMEM_ENABLE=y -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -CONFIG_RESOURCES_64BIT=y -CONFIG_ZONE_DMA_FLAG=1 -# CONFIG_HZ_48 is not set -# CONFIG_HZ_100 is not set -# CONFIG_HZ_128 is not set -# CONFIG_HZ_250 is not set -# CONFIG_HZ_256 is not set -CONFIG_HZ_1000=y -# CONFIG_HZ_1024 is not set -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_HZ=1000 -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set -# CONFIG_KEXEC is not set -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# -CONFIG_LOCALVERSION="" -CONFIG_LOCALVERSION_AUTO=y -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_IPC_NS is not set -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_UTS_NS is not set -# CONFIG_AUDIT is not set -# CONFIG_IKCONFIG is not set -CONFIG_SYSFS_DEPRECATED=y -CONFIG_RELAY=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_SYSCTL=y -CONFIG_EMBEDDED=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SHMEM=y -CONFIG_SLAB=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_RT_MUTEXES=y -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 -# CONFIG_SLOB is not set - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# Block layer -# -CONFIG_BLOCK=y -# CONFIG_LBD is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -CONFIG_LSF=y - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -CONFIG_DEFAULT_AS=y -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="anticipatory" - -# -# Bus options (PCI, PCMCIA, EISA, ISA, TC) -# -CONFIG_HW_HAS_PCI=y -CONFIG_PCI=y -CONFIG_MMU=y - -# -# PCCARD (PCMCIA/CardBus) support -# -# CONFIG_PCCARD is not set - -# -# PCI Hotplug Support -# -# CONFIG_HOTPLUG_PCI is not set - -# -# Executable file formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_TRAD_SIGNALS=y - -# -# Power management options -# -CONFIG_PM=y -# CONFIG_PM_LEGACY is not set -# CONFIG_PM_DEBUG is not set -# CONFIG_PM_SYSFS_DEPRECATED is not set - -# -# Networking -# -CONFIG_NET=y - -# -# Networking options -# -# CONFIG_NETDEBUG is not set -# CONFIG_PACKET is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -CONFIG_XFRM_USER=y -# CONFIG_XFRM_SUB_POLICY is not set -CONFIG_XFRM_MIGRATE=y -CONFIG_NET_KEY=y -CONFIG_NET_KEY_MIGRATE=y -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -CONFIG_TCP_MD5SIG=y -# CONFIG_IPV6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set -CONFIG_NETWORK_SECMARK=y -# CONFIG_NETFILTER is not set - -# -# DCCP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_DCCP is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set - -# -# TIPC Configuration (EXPERIMENTAL) -# -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -CONFIG_IEEE80211=y -# CONFIG_IEEE80211_DEBUG is not set -CONFIG_IEEE80211_CRYPT_WEP=y -CONFIG_IEEE80211_CRYPT_CCMP=y -CONFIG_IEEE80211_SOFTMAC=y -# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set -CONFIG_WIRELESS_EXT=y - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -# CONFIG_SYS_HYPERVISOR is not set - -# -# Connector - unified userspace <-> kernelspace linker -# -CONFIG_CONNECTOR=y -CONFIG_PROC_EVENTS=y - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# -# CONFIG_PNPACPI is not set - -# -# Block devices -# -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_SX8 is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_CDROM_PKTCDVD=y -CONFIG_CDROM_PKTCDVD_BUFFERS=8 -# CONFIG_CDROM_PKTCDVD_WCACHE is not set -CONFIG_ATA_OVER_ETH=y - -# -# Misc devices -# -CONFIG_SGI_IOC4=y -# CONFIG_TIFM_CORE is not set - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -CONFIG_RAID_ATTRS=y -# CONFIG_SCSI is not set -# CONFIG_SCSI_NETLINK is not set - -# -# Serial ATA (prod) and Parallel ATA (experimental) drivers -# -# CONFIG_ATA is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Network device support -# -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# PHY device support -# -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -CONFIG_MARVELL_PHY=y -CONFIG_DAVICOM_PHY=y -CONFIG_QSEMI_PHY=y -CONFIG_LXT_PHY=y -CONFIG_CICADA_PHY=y -CONFIG_VITESSE_PHY=y -CONFIG_SMSC_PHY=y -# CONFIG_BROADCOM_PHY is not set -# CONFIG_FIXED_PHY is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -CONFIG_GALILEO_64240_ETH=y -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_CASSINI is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_DM9000 is not set - -# -# Tulip family network device support -# -# CONFIG_NET_TULIP is not set -# CONFIG_HP100 is not set -# CONFIG_NET_PCI is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_R8169 is not set -# CONFIG_SIS190 is not set -# CONFIG_SKGE is not set -# CONFIG_SKY2 is not set -# CONFIG_SK98LIN is not set -# CONFIG_TIGON3 is not set -# CONFIG_BNX2 is not set -CONFIG_QLA3XXX=y -# CONFIG_ATL1 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_CHELSIO_T1 is not set -CONFIG_CHELSIO_T3=y -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set -# CONFIG_MYRI10GE is not set -CONFIG_NETXEN_NIC=y - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -# CONFIG_SERIO_I8042 is not set -CONFIG_SERIO_SERPORT=y -# CONFIG_SERIO_PCIPS2 is not set -# CONFIG_SERIO_LIBPS2 is not set -CONFIG_SERIO_RAW=y -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_PCI=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_JSM is not set -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_HW_RANDOM is not set -# CONFIG_RTC is not set -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# -# CONFIG_TCG_TPM is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# SPI support -# -# CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set - -# -# Dallas's 1-wire bus -# -# CONFIG_W1 is not set - -# -# Hardware Monitoring support -# -# CONFIG_HWMON is not set -# CONFIG_HWMON_VID is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# HID Devices -# -# CONFIG_HID is not set - -# -# USB support -# -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -# CONFIG_USB is not set - -# -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -# - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# MMC/SD Card support -# -# CONFIG_MMC is not set - -# -# LED devices -# -# CONFIG_NEW_LEDS is not set - -# -# LED drivers -# - -# -# LED Triggers -# - -# -# InfiniBand support -# -# CONFIG_INFINIBAND is not set - -# -# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) -# - -# -# Real Time Clock -# -# CONFIG_RTC_CLASS is not set - -# -# DMA Engine support -# -# CONFIG_DMA_ENGINE is not set - -# -# DMA Clients -# - -# -# DMA Devices -# - -# -# Auxiliary Display support -# - -# -# Virtualization -# - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -# CONFIG_EXT3_FS is not set -# CONFIG_EXT4DEV_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -CONFIG_FS_POSIX_ACL=y -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -CONFIG_FUSE_FS=y -CONFIG_GENERIC_ACL=y - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_PROC_SYSCTL=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y -CONFIG_CONFIGFS_FS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_ECRYPT_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -# CONFIG_NFS_V3 is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -CONFIG_NFSD=y -# CONFIG_NFSD_V3 is not set -# CONFIG_NFSD_TCP is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -CONFIG_EXPORTFS=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set -# CONFIG_9P_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Distributed Lock Manager -# -CONFIG_DLM=y -CONFIG_DLM_TCP=y -# CONFIG_DLM_SCTP is not set -# CONFIG_DLM_DEBUG is not set - -# -# Profiling support -# -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_MUST_CHECK=y -# CONFIG_MAGIC_SYSRQ is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_FS is not set -# CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_KERNEL is not set -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_CROSSCOMPILE=y -CONFIG_CMDLINE="" - -# -# Security options -# -CONFIG_KEYS=y -CONFIG_KEYS_DEBUG_PROC_KEYS=y -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -CONFIG_CRYPTO=y -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_XCBC=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_MD4=y -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_WP512=y -CONFIG_CRYPTO_TGR192=y -CONFIG_CRYPTO_GF128MUL=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_PCBC=y -CONFIG_CRYPTO_LRW=y -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_FCRYPT=y -CONFIG_CRYPTO_BLOWFISH=y -CONFIG_CRYPTO_TWOFISH=y -CONFIG_CRYPTO_TWOFISH_COMMON=y -CONFIG_CRYPTO_SERPENT=y -CONFIG_CRYPTO_AES=y -CONFIG_CRYPTO_CAST5=y -CONFIG_CRYPTO_CAST6=y -CONFIG_CRYPTO_TEA=y -CONFIG_CRYPTO_ARC4=y -CONFIG_CRYPTO_KHAZAD=y -CONFIG_CRYPTO_ANUBIS=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_MICHAEL_MIC=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CAMELLIA=y - -# -# Hardware crypto devices -# - -# -# Library routines -# -CONFIG_BITREVERSE=y -# CONFIG_CRC_CCITT is not set -CONFIG_CRC16=y -CONFIG_CRC32=y -CONFIG_LIBCRC32C=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_PLIST=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y diff --git a/arch/mips/momentum/ocelot_g/Makefile b/arch/mips/momentum/ocelot_g/Makefile deleted file mode 100644 index c0a0030..0000000 --- a/arch/mips/momentum/ocelot_g/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# -# Makefile for Momentum Computer's Ocelot-G board. -# - -obj-y += irq.o gt-irq.o prom.o reset.o setup.o -obj-$(CONFIG_KGDB) += dbg_io.o diff --git a/arch/mips/momentum/ocelot_g/dbg_io.c b/arch/mips/momentum/ocelot_g/dbg_io.c deleted file mode 100644 index 32d6fb4..0000000 --- a/arch/mips/momentum/ocelot_g/dbg_io.c +++ /dev/null @@ -1,121 +0,0 @@ - -#include /* For the serial port location and base baud */ - -/* --- CONFIG --- */ - -typedef unsigned char uint8; -typedef unsigned int uint32; - -/* --- END OF CONFIG --- */ - -#define UART16550_BAUD_2400 2400 -#define UART16550_BAUD_4800 4800 -#define UART16550_BAUD_9600 9600 -#define UART16550_BAUD_19200 19200 -#define UART16550_BAUD_38400 38400 -#define UART16550_BAUD_57600 57600 -#define UART16550_BAUD_115200 115200 - -#define UART16550_PARITY_NONE 0 -#define UART16550_PARITY_ODD 0x08 -#define UART16550_PARITY_EVEN 0x18 -#define UART16550_PARITY_MARK 0x28 -#define UART16550_PARITY_SPACE 0x38 - -#define UART16550_DATA_5BIT 0x0 -#define UART16550_DATA_6BIT 0x1 -#define UART16550_DATA_7BIT 0x2 -#define UART16550_DATA_8BIT 0x3 - -#define UART16550_STOP_1BIT 0x0 -#define UART16550_STOP_2BIT 0x4 - -/* ----------------------------------------------------- */ - -/* === CONFIG === */ - -/* [jsun] we use the second serial port for kdb */ -#define BASE OCELOT_SERIAL1_BASE -#define MAX_BAUD OCELOT_BASE_BAUD - -/* === END OF CONFIG === */ - -#define REG_OFFSET 4 - -/* register offset */ -#define OFS_RCV_BUFFER 0 -#define OFS_TRANS_HOLD 0 -#define OFS_SEND_BUFFER 0 -#define OFS_INTR_ENABLE (1*REG_OFFSET) -#define OFS_INTR_ID (2*REG_OFFSET) -#define OFS_DATA_FORMAT (3*REG_OFFSET) -#define OFS_LINE_CONTROL (3*REG_OFFSET) -#define OFS_MODEM_CONTROL (4*REG_OFFSET) -#define OFS_RS232_OUTPUT (4*REG_OFFSET) -#define OFS_LINE_STATUS (5*REG_OFFSET) -#define OFS_MODEM_STATUS (6*REG_OFFSET) -#define OFS_RS232_INPUT (6*REG_OFFSET) -#define OFS_SCRATCH_PAD (7*REG_OFFSET) - -#define OFS_DIVISOR_LSB (0*REG_OFFSET) -#define OFS_DIVISOR_MSB (1*REG_OFFSET) - - -/* memory-mapped read/write of the port */ -#define UART16550_READ(y) (*((volatile uint8*)(BASE + y))) -#define UART16550_WRITE(y, z) ((*((volatile uint8*)(BASE + y))) = z) - -void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop) -{ - /* disable interrupts */ - UART16550_WRITE(OFS_INTR_ENABLE, 0); - - /* set up baud rate */ - { - uint32 divisor; - - /* set DIAB bit */ - UART16550_WRITE(OFS_LINE_CONTROL, 0x80); - - /* set divisor */ - divisor = MAX_BAUD / baud; - UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff); - UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8); - - /* clear DIAB bit */ - UART16550_WRITE(OFS_LINE_CONTROL, 0x0); - } - - /* set data format */ - UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop); -} - -static int remoteDebugInitialized = 0; - -uint8 getDebugChar(void) -{ - if (!remoteDebugInitialized) { - remoteDebugInitialized = 1; - debugInit(UART16550_BAUD_38400, - UART16550_DATA_8BIT, - UART16550_PARITY_NONE, UART16550_STOP_1BIT); - } - - while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0); - return UART16550_READ(OFS_RCV_BUFFER); -} - - -int putDebugChar(uint8 byte) -{ - if (!remoteDebugInitialized) { - remoteDebugInitialized = 1; - debugInit(UART16550_BAUD_38400, - UART16550_DATA_8BIT, - UART16550_PARITY_NONE, UART16550_STOP_1BIT); - } - - while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0); - UART16550_WRITE(OFS_SEND_BUFFER, byte); - return 1; -} diff --git a/arch/mips/momentum/ocelot_g/gt-irq.c b/arch/mips/momentum/ocelot_g/gt-irq.c deleted file mode 100644 index e5576bd..0000000 --- a/arch/mips/momentum/ocelot_g/gt-irq.c +++ /dev/null @@ -1,212 +0,0 @@ -/* - * - * Copyright 2002 Momentum Computer - * Author: mdharm@momenco.com - * - * arch/mips/momentum/ocelot_g/gt_irq.c - * Interrupt routines for gt64240. Currently it only handles timer irq. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#include -#include -#include -#include -#include -#include -#include - -unsigned long bus_clock; - -/* - * These are interrupt handlers for the GT on-chip interrupts. They - * all come in to the MIPS on a single interrupt line, and have to - * be handled and ack'ed differently than other MIPS interrupts. - */ - -#if 0 - -struct tq_struct irq_handlers[MAX_CAUSE_REGS][MAX_CAUSE_REG_WIDTH]; -void hook_irq_handler(int int_cause, int bit_num, void *isr_ptr); - -/* - * Hooks IRQ handler to the system. When the system is interrupted - * the interrupt service routine is called. - * - * Inputs : - * int_cause - The interrupt cause number. In EVB64120 two parameters - * are declared, INT_CAUSE_MAIN and INT_CAUSE_HIGH. - * bit_num - Indicates which bit number in the cause register - * isr_ptr - Pointer to the interrupt service routine - */ -void hook_irq_handler(int int_cause, int bit_num, void *isr_ptr) -{ - irq_handlers[int_cause][bit_num].routine = isr_ptr; -} - - -/* - * Enables the IRQ on Galileo Chip - * - * Inputs : - * int_cause - The interrupt cause number. In EVB64120 two parameters - * are declared, INT_CAUSE_MAIN and INT_CAUSE_HIGH. - * bit_num - Indicates which bit number in the cause register - * - * Outputs : - * 1 if successful, 0 if failure - */ -int enable_galileo_irq(int int_cause, int bit_num) -{ - if (int_cause == INT_CAUSE_MAIN) - SET_REG_BITS(CPU_INTERRUPT_MASK_REGISTER, (1 << bit_num)); - else if (int_cause == INT_CAUSE_HIGH) - SET_REG_BITS(CPU_HIGH_INTERRUPT_MASK_REGISTER, - (1 << bit_num)); - else - return 0; - - return 1; -} - -/* - * Disables the IRQ on Galileo Chip - * - * Inputs : - * int_cause - The interrupt cause number. In EVB64120 two parameters - * are declared, INT_CAUSE_MAIN and INT_CAUSE_HIGH. - * bit_num - Indicates which bit number in the cause register - * - * Outputs : - * 1 if successful, 0 if failure - */ -int disable_galileo_irq(int int_cause, int bit_num) -{ - if (int_cause == INT_CAUSE_MAIN) - RESET_REG_BITS(CPU_INTERRUPT_MASK_REGISTER, - (1 << bit_num)); - else if (int_cause == INT_CAUSE_HIGH) - RESET_REG_BITS(CPU_HIGH_INTERRUPT_MASK_REGISTER, - (1 << bit_num)); - else - return 0; - return 1; -} -#endif /* 0 */ - -/* - * Interrupt handler for interrupts coming from the Galileo chip via P0_INT#. - * - * We route the timer interrupt to P0_INT# (IRQ 6), and that's all this - * routine can handle, for now. - * - * In the future, we'll route more interrupts to this pin, and that's why - * we keep this particular structure in the function. - */ - -static irqreturn_t gt64240_p0int_irq(int irq, void *dev) -{ - uint32_t irq_src, irq_src_mask; - int handled; - - /* get the low interrupt cause register */ - irq_src = MV_READ(LOW_INTERRUPT_CAUSE_REGISTER); - - /* get the mask register for this pin */ - irq_src_mask = MV_READ(PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW); - - /* mask off only the interrupts we're interested in */ - irq_src = irq_src & irq_src_mask; - - handled = IRQ_NONE; - - /* Check for timer interrupt */ - if (irq_src & 0x00000100) { - handled = IRQ_HANDLED; - irq_src &= ~0x00000100; - - /* Clear any pending cause bits */ - MV_WRITE(TIMER_COUNTER_0_3_INTERRUPT_CAUSE, 0x0); - - /* handle the timer call */ - do_timer(1); -#ifndef CONFIG_SMP - update_process_times(user_mode(get_irq_regs())); -#endif - } - - if (irq_src) { - printk(KERN_INFO - "UNKNOWN P0_INT# interrupt received, irq_src=0x%x\n", - irq_src); - } - - return handled; -} - -/* - * Initializes timer using galileo's built in timer. - */ - -/* - * This will ignore the standard MIPS timer interrupt handler - * that is passed in as *irq (=irq0 in ../kernel/time.c). - * We will do our own timer interrupt handling. - */ -void gt64240_time_init(void) -{ - static struct irqaction timer; - - /* Stop the timer -- we'll use timer #0 */ - MV_WRITE(TIMER_COUNTER_0_3_CONTROL, 0x0); - - /* Load timer value for 100 Hz */ - MV_WRITE(TIMER_COUNTER0, bus_clock / 100); - - /* - * Create the IRQ structure entry for the timer. Since we're too early - * in the boot process to use the "request_irq()" call, we'll hard-code - * the values to the correct interrupt line. - */ - timer.handler = >64240_p0int_irq; - timer.flags = IRQF_SHARED | IRQF_DISABLED; - timer.name = "timer"; - timer.dev_id = NULL; - timer.next = NULL; - timer.mask = CPU_MASK_NONE; - irq_desc[6].action = &timer; - - enable_irq(6); - - /* Clear any pending cause bits */ - MV_WRITE(TIMER_COUNTER_0_3_INTERRUPT_CAUSE, 0x0); - - /* Enable the interrupt for timer 0 */ - MV_WRITE(TIMER_COUNTER_0_3_INTERRUPT_MASK, 0x1); - - /* Enable the timer interrupt for GT-64240 pin P0_INT# */ - MV_WRITE (PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW, 0x100); - - /* Configure and start the timer */ - MV_WRITE(TIMER_COUNTER_0_3_CONTROL, 0x3); -} - -void gt64240_irq_init(void) -{ -#if 0 - int i, j; - - /* Reset irq handlers pointers to NULL */ - for (i = 0; i < MAX_CAUSE_REGS; i++) { - for (j = 0; j < MAX_CAUSE_REG_WIDTH; j++) { - irq_handlers[i][j].next = NULL; - irq_handlers[i][j].sync = 0; - irq_handlers[i][j].routine = NULL; - irq_handlers[i][j].data = NULL; - } - } -#endif /* 0 */ -} diff --git a/arch/mips/momentum/ocelot_g/irq.c b/arch/mips/momentum/ocelot_g/irq.c deleted file mode 100644 index 273541f..0000000 --- a/arch/mips/momentum/ocelot_g/irq.c +++ /dev/null @@ -1,101 +0,0 @@ -/* - * Copyright (C) 2000 RidgeRun, Inc. - * Author: RidgeRun, Inc. - * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com - * - * Copyright 2001 MontaVista Software Inc. - * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net - * Copyright (C) 2000, 01, 05 Ralf Baechle (ralf@linux-mips.org) - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - * - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -asmlinkage void plat_irq_dispatch(void) -{ - unsigned int pending = read_c0_cause() & read_c0_status(); - - if (pending & STATUSF_IP2) - do_IRQ(2); - else if (pending & STATUSF_IP3) - do_IRQ(3); - else if (pending & STATUSF_IP4) - do_IRQ(4); - else if (pending & STATUSF_IP5) - do_IRQ(5); - else if (pending & STATUSF_IP6) - do_IRQ(6); - else if (pending & STATUSF_IP7) - do_IRQ(7); - else { - /* - * Now look at the extended interrupts - */ - pending = (read_c0_cause() & (read_c0_intcontrol() << 8)) >> 16; - - if (pending & STATUSF_IP8) - do_IRQ(8); - else if (pending & STATUSF_IP9) - do_IRQ(9); - else if (pending & STATUSF_IP10) - do_IRQ(10); - else if (pending & STATUSF_IP11) - do_IRQ(11); - else - spurious_interrupt(); - } -} - -extern void gt64240_irq_init(void); - -void __init arch_init_irq(void) -{ - /* - * Clear all of the interrupts while we change the able around a bit. - * int-handler is not on bootstrap - */ - clear_c0_status(ST0_IM); - local_irq_disable(); - - mips_cpu_irq_init(); - rm7k_cpu_irq_init(); - - gt64240_irq_init(); -} diff --git a/arch/mips/momentum/ocelot_g/ocelot_pld.h b/arch/mips/momentum/ocelot_g/ocelot_pld.h deleted file mode 100644 index 95e0534..0000000 --- a/arch/mips/momentum/ocelot_g/ocelot_pld.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Ocelot Board Register Definitions - * - * (C) 2001 Red Hat, Inc. - * - * GPL'd - */ -#ifndef __MOMENCO_OCELOT_PLD_H__ -#define __MOMENCO_OCELOT_PLD_H__ - -#define OCELOT_CS0_ADDR (0xfc000000) - -#define OCELOT_REG_BOARDREV (0) -#define OCELOT_REG_PLD1_ID (1) -#define OCELOT_REG_PLD2_ID (2) -#define OCELOT_REG_RESET_STATUS (3) -#define OCELOT_REG_BOARD_STATUS (4) -#define OCELOT_REG_CPCI_ID (5) -#define OCELOT_REG_I2C_CTRL (8) -#define OCELOT_REG_EEPROM_MODE (9) -#define OCELOT_REG_INTMASK (10) -#define OCELOT_REG_INTSTATUS (11) -#define OCELOT_REG_INTSET (12) -#define OCELOT_REG_INTCLR (13) - -#define __PLD_REG_TO_ADDR(reg) ((void *) OCELOT_CS0_ADDR + OCELOT_REG_##reg) -#define OCELOT_PLD_WRITE(x, reg) writeb(x, __PLD_REG_TO_ADDR(reg)) -#define OCELOT_PLD_READ(reg) readb(__PLD_REG_TO_ADDR(reg)) - -#endif /* __MOMENCO_OCELOT_PLD_H__ */ diff --git a/arch/mips/momentum/ocelot_g/prom.c b/arch/mips/momentum/ocelot_g/prom.c deleted file mode 100644 index 836d083..0000000 --- a/arch/mips/momentum/ocelot_g/prom.c +++ /dev/null @@ -1,84 +0,0 @@ -/* - * Copyright 2002 Momentum Computer Inc. - * Author: Matthew Dharm - * - * Based on Ocelot Linux port, which is - * Copyright 2001 MontaVista Software Inc. - * Author: jsun@mvista.com or jsun@junsun.net - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "ocelot_pld.h" - -struct callvectors* debug_vectors; - -extern unsigned long marvell_base; -extern unsigned long bus_clock; - -#ifdef CONFIG_GALILEO_GT64240_ETH -extern unsigned char prom_mac_addr_base[6]; -#endif - -const char *get_system_type(void) -{ - return "Momentum Ocelot"; -} - -void __init prom_init(void) -{ - int argc = fw_arg0; - char **arg = (char **) fw_arg1; - char **env = (char **) fw_arg2; - struct callvectors *cv = (struct callvectors *) fw_arg3; - int i; - - /* save the PROM vectors for debugging use */ - debug_vectors = cv; - - /* arg[0] is "g", the rest is boot parameters */ - arcs_cmdline[0] = '\0'; - for (i = 1; i < argc; i++) { - if (strlen(arcs_cmdline) + strlen(arg[i] + 1) - >= sizeof(arcs_cmdline)) - break; - strcat(arcs_cmdline, arg[i]); - strcat(arcs_cmdline, " "); - } - - mips_machgroup = MACH_GROUP_MOMENCO; - mips_machtype = MACH_MOMENCO_OCELOT_G; - -#ifdef CONFIG_GALILEO_GT64240_ETH - /* get the base MAC address for on-board ethernet ports */ - memcpy(prom_mac_addr_base, (void*)0xfc807cf2, 6); -#endif - - while (*env) { - if (strncmp("gtbase", *env, strlen("gtbase")) == 0) { - marvell_base = simple_strtol(*env + strlen("gtbase="), - NULL, 16); - } - if (strncmp("busclock", *env, strlen("busclock")) == 0) { - bus_clock = simple_strtol(*env + strlen("busclock="), - NULL, 10); - } - env++; - } -} - -void __init prom_free_prom_memory(void) -{ -} diff --git a/arch/mips/momentum/ocelot_g/reset.c b/arch/mips/momentum/ocelot_g/reset.c deleted file mode 100644 index 3fd499a..0000000 --- a/arch/mips/momentum/ocelot_g/reset.c +++ /dev/null @@ -1,47 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * Copyright (C) 1997, 2001 Ralf Baechle - * Copyright 2001 MontaVista Software Inc. - * Author: jsun@mvista.com or jsun@junsun.net - */ -#include -#include -#include -#include -#include -#include -#include -#include - -void momenco_ocelot_restart(char *command) -{ - void *nvram = ioremap_nocache(0x2c807000, 0x1000); - - if (!nvram) { - printk(KERN_NOTICE "ioremap of reset register failed\n"); - return; - } - writeb(0x84, nvram + 0xff7); /* Ask the NVRAM/RTC/watchdog chip to - assert reset in 1/16 second */ - mdelay(10+(1000/16)); - iounmap(nvram); - printk(KERN_NOTICE "Watchdog reset failed\n"); -} - -void momenco_ocelot_halt(void) -{ - printk(KERN_NOTICE "\n** You can safely turn off the power\n"); - while (1) - __asm__(".set\tmips3\n\t" - "wait\n\t" - ".set\tmips0"); -} - -void momenco_ocelot_power_off(void) -{ - momenco_ocelot_halt(); -} diff --git a/arch/mips/momentum/ocelot_g/setup.c b/arch/mips/momentum/ocelot_g/setup.c deleted file mode 100644 index 9db638a..0000000 --- a/arch/mips/momentum/ocelot_g/setup.c +++ /dev/null @@ -1,267 +0,0 @@ -/* - * BRIEF MODULE DESCRIPTION - * Momentum Computer Ocelot-G (CP7000G) - board dependent boot routines - * - * Copyright (C) 1996, 1997, 2001 Ralf Baechle - * Copyright (C) 2000 RidgeRun, Inc. - * Copyright (C) 2001 Red Hat, Inc. - * Copyright (C) 2002 Momentum Computer - * - * Author: Matthew Dharm, Momentum Computer - * mdharm@momenco.com - * - * Author: RidgeRun, Inc. - * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com - * - * Copyright 2001 MontaVista Software Inc. - * Author: jsun@mvista.com or jsun@junsun.net - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - * - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "ocelot_pld.h" - -#ifdef CONFIG_GALILEO_GT64240_ETH -extern unsigned char prom_mac_addr_base[6]; -#endif - -unsigned long marvell_base; - -/* These functions are used for rebooting or halting the machine*/ -extern void momenco_ocelot_restart(char *command); -extern void momenco_ocelot_halt(void); -extern void momenco_ocelot_power_off(void); - -extern void gt64240_time_init(void); -extern void momenco_ocelot_irq_setup(void); - -static char reset_reason; - -static unsigned long ENTRYLO(unsigned long paddr) -{ - return ((paddr & PAGE_MASK) | - (_PAGE_PRESENT | __READABLE | __WRITEABLE | _PAGE_GLOBAL | - _CACHE_UNCACHED)) >> 6; -} - -/* setup code for a handoff from a version 2 PMON 2000 PROM */ -void PMON_v2_setup(void) -{ - /* A wired TLB entry for the GT64240 and the serial port. The - GT64240 is going to be hit on every IRQ anyway - there's - absolutely no point in letting it be a random TLB entry, as - it'll just cause needless churning of the TLB. And we use - the other half for the serial port, which is just a PITA - otherwise :) - - Device Physical Virtual - GT64240 Internal Regs 0xf4000000 0xe0000000 - UARTs (CS2) 0xfd000000 0xe0001000 - */ - add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), - 0xf4000000, PM_64K); - add_wired_entry(ENTRYLO(0xfd000000), ENTRYLO(0xfd001000), - 0xfd000000, PM_4K); - - /* Also a temporary entry to let us talk to the Ocelot PLD and NVRAM - in the CS[012] region. We can't use ioremap() yet. The NVRAM - is a ST M48T37Y, which includes NVRAM, RTC, and Watchdog functions. - - Ocelot PLD (CS0) 0xfc000000 0xe0020000 - NVRAM (CS1) 0xfc800000 0xe0030000 - */ - add_temporary_entry(ENTRYLO(0xfc000000), ENTRYLO(0xfc010000), - 0xfc000000, PM_64K); - add_temporary_entry(ENTRYLO(0xfc800000), ENTRYLO(0xfc810000), - 0xfc800000, PM_64K); - - marvell_base = 0xf4000000; -} - -extern int rm7k_tcache_enabled; - -/* - * This runs in KSEG1. See the verbiage in rm7k.c::probe_scache() - */ -#define Page_Invalidate_T 0x16 -static void __init setup_l3cache(unsigned long size) -{ - int register i; - - printk("Enabling L3 cache..."); - - /* Enable the L3 cache in the GT64120A's CPU Configuration register */ - MV_WRITE(0, MV_READ(0) | (1<<14)); - - /* Enable the L3 cache in the CPU */ - set_c0_config(1<<12 /* CONF_TE */); - - /* Clear the cache */ - write_c0_taglo(0); - write_c0_taghi(0); - - for (i=0; i < size; i+= 4096) { - __asm__ __volatile__ ( - ".set noreorder\n\t" - ".set mips3\n\t" - "cache %1, (%0)\n\t" - ".set mips0\n\t" - ".set reorder" - : - : "r" (KSEG0ADDR(i)), - "i" (Page_Invalidate_T)); - } - - /* Let the RM7000 MM code know that the tertiary cache is enabled */ - rm7k_tcache_enabled = 1; - - printk("Done\n"); -} - -void __init plat_timer_setup(struct irqaction *irq) -{ -} - -void __init plat_mem_setup(void) -{ - void (*l3func)(unsigned long) = (void *) KSEG1ADDR(setup_l3cache); - unsigned int tmpword; - - board_time_init = gt64240_time_init; - - _machine_restart = momenco_ocelot_restart; - _machine_halt = momenco_ocelot_halt; - pm_power_off = momenco_ocelot_power_off; - - /* - * initrd_start = (unsigned long)ocelot_initrd_start; - * initrd_end = (unsigned long)ocelot_initrd_start + (ulong)ocelot_initrd_size; - * initrd_below_start_ok = 1; - */ - - /* do handoff reconfiguration */ - PMON_v2_setup(); - -#ifdef CONFIG_GALILEO_GT64240_ETH - /* get the mac addr */ - memcpy(prom_mac_addr_base, (void*)0xfc807cf2, 6); -#endif - - /* Turn off the Bit-Error LED */ - OCELOT_PLD_WRITE(0x80, INTCLR); - - tmpword = OCELOT_PLD_READ(BOARDREV); - if (tmpword < 26) - printk("Momenco Ocelot-G: Board Assembly Rev. %c\n", 'A'+tmpword); - else - printk("Momenco Ocelot-G: Board Assembly Revision #0x%x\n", tmpword); - - tmpword = OCELOT_PLD_READ(PLD1_ID); - printk("PLD 1 ID: %d.%d\n", tmpword>>4, tmpword&15); - tmpword = OCELOT_PLD_READ(PLD2_ID); - printk("PLD 2 ID: %d.%d\n", tmpword>>4, tmpword&15); - tmpword = OCELOT_PLD_READ(RESET_STATUS); - printk("Reset reason: 0x%x\n", tmpword); - reset_reason = tmpword; - OCELOT_PLD_WRITE(0xff, RESET_STATUS); - - tmpword = OCELOT_PLD_READ(BOARD_STATUS); - printk("Board Status register: 0x%02x\n", tmpword); - printk(" - User jumper: %s\n", (tmpword & 0x80)?"installed":"absent"); - printk(" - Boot flash write jumper: %s\n", (tmpword&0x40)?"installed":"absent"); - printk(" - Tulip PHY %s connected\n", (tmpword&0x10)?"is":"not"); - printk(" - L3 Cache size: %d MiB\n", (1<<((tmpword&12) >> 2))&~1); - printk(" - SDRAM size: %d MiB\n", 1<<(6+(tmpword&3))); - - if (tmpword&12) - l3func((1<<(((tmpword&12) >> 2)+20))); - - switch(tmpword &3) { - case 3: - /* 512MiB -- two banks of 256MiB */ - add_memory_region( 0x0<<20, 0x100<<20, BOOT_MEM_RAM); -/* - add_memory_region(0x100<<20, 0x100<<20, BOOT_MEM_RAM); -*/ - break; - case 2: - /* 256MiB -- two banks of 128MiB */ - add_memory_region( 0x0<<20, 0x80<<20, BOOT_MEM_RAM); - add_memory_region(0x80<<20, 0x80<<20, BOOT_MEM_RAM); - break; - case 1: - /* 128MiB -- 64MiB per bank */ - add_memory_region( 0x0<<20, 0x40<<20, BOOT_MEM_RAM); - add_memory_region(0x40<<20, 0x40<<20, BOOT_MEM_RAM); - break; - case 0: - /* 64MiB */ - add_memory_region( 0x0<<20, 0x40<<20, BOOT_MEM_RAM); - break; - } - - /* FIXME: Fix up the DiskOnChip mapping */ - MV_WRITE(0x468, 0xfef73); -} - -/* This needs to be one of the first initcalls, because no I/O port access - can work before this */ - -static int io_base_ioremap(void) -{ - /* we're mapping PCI accesses from 0xc0000000 to 0xf0000000 */ - unsigned long io_remap_range; - - io_remap_range = (unsigned long) ioremap(0xc0000000, 0x30000000); - if (!io_remap_range) - panic("Could not ioremap I/O port range"); - - set_io_port_base(io_remap_range - 0xc0000000); - - return 0; -} - -module_init(io_base_ioremap); diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index df487c0..30a1c79 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile @@ -34,7 +34,6 @@ obj-$(CONFIG_MOMENCO_JAGUAR_ATX)+= fixup-jaguar.o obj-$(CONFIG_MOMENCO_OCELOT) += fixup-ocelot.o pci-ocelot.o obj-$(CONFIG_MOMENCO_OCELOT_3) += fixup-ocelot3.o obj-$(CONFIG_MOMENCO_OCELOT_C) += fixup-ocelot-c.o pci-ocelot-c.o -obj-$(CONFIG_MOMENCO_OCELOT_G) += fixup-ocelot-g.o pci-ocelot-g.o obj-$(CONFIG_PMC_YOSEMITE) += fixup-yosemite.o ops-titan.o ops-titan-ht.o \ pci-yosemite.o obj-$(CONFIG_SGI_IP27) += ops-bridge.o pci-ip27.o diff --git a/arch/mips/pci/fixup-ocelot-g.c b/arch/mips/pci/fixup-ocelot-g.c deleted file mode 100644 index d7a652e..0000000 --- a/arch/mips/pci/fixup-ocelot-g.c +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * Copyright (C) 2004 Ralf Baechle (ralf@linux-mips.org) - */ -#include -#include -#include -#include - -int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) -{ - int bus = dev->bus->number; - - if (bus == 0 && slot == 1) /* Intel 82543 Gigabit MAC */ - return 2; /* irq_nr is 2 for INT0 */ - - if (bus == 0 && slot == 2) /* Intel 82543 Gigabit MAC */ - return 3; /* irq_nr is 3 for INT1 */ - - if (bus == 1 && slot == 3) /* Intel 21555 bridge */ - return 5; /* irq_nr is 8 for INT6 */ - - if (bus == 1 && slot == 4) /* PMC Slot */ - return 9; /* irq_nr is 9 for INT7 */ - - return -1; -} - -/* Do platform specific device initialization at pci_enable_device() time */ -int pcibios_plat_dev_init(struct pci_dev *dev) -{ - return 0; -} diff --git a/arch/mips/pci/pci-ocelot-g.c b/arch/mips/pci/pci-ocelot-g.c deleted file mode 100644 index 1e34301..0000000 --- a/arch/mips/pci/pci-ocelot-g.c +++ /dev/null @@ -1,97 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) - * - * This doesn't really fly - but I don't have a GT64240 system for testing. - */ -#include -#include -#include -#include -#include - -/* - * We assume these address ranges have been programmed into the GT-64240 by - * the firmware. PMON in case of the Ocelot G does that. Note the size of - * the I/O range is completly stupid; I/O mappings are limited to at most - * 256 bytes by the PCI spec and deprecated; and just to make things worse - * apparently many devices don't decode more than 64k of I/O space. - */ - -#define gt_io_size 0x20000000UL -#define gt_io_base 0xe0000000UL - -static struct resource gt_pci_mem0_resource = { - .name = "MV64240 PCI0 MEM", - .start = 0xc0000000UL, - .end = 0xcfffffffUL, - .flags = IORESOURCE_MEM -}; - -static struct resource gt_pci_io_mem0_resource = { - .name = "MV64240 PCI0 IO MEM", - .start = 0xe0000000UL, - .end = 0xefffffffUL, - .flags = IORESOURCE_IO -}; - -static struct mv_pci_controller gt_bus0_controller = { - .pcic = { - .pci_ops = &mv_pci_ops, - .mem_resource = >_pci_mem0_resource, - .mem_offset = 0xc0000000UL, - .io_resource = >_pci_io_mem0_resource, - .io_offset = 0x00000000UL - }, - .config_addr = PCI_0CONFIGURATION_ADDRESS, - .config_vreg = PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER, -}; - -static struct resource gt_pci_mem1_resource = { - .name = "MV64240 PCI1 MEM", - .start = 0xd0000000UL, - .end = 0xdfffffffUL, - .flags = IORESOURCE_MEM -}; - -static struct resource gt_pci_io_mem1_resource = { - .name = "MV64240 PCI1 IO MEM", - .start = 0xf0000000UL, - .end = 0xffffffffUL, - .flags = IORESOURCE_IO -}; - -static struct mv_pci_controller gt_bus1_controller = { - .pcic = { - .pci_ops = &mv_pci_ops, - .mem_resource = >_pci_mem1_resource, - .mem_offset = 0xd0000000UL, - .io_resource = >_pci_io_mem1_resource, - .io_offset = 0x10000000UL - }, - .config_addr = PCI_1CONFIGURATION_ADDRESS, - .config_vreg = PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER, -}; - -static __init int __init ocelot_g_pci_init(void) -{ - unsigned long io_v_base; - - if (gt_io_size) { - io_v_base = (unsigned long) ioremap(gt_io_base, gt_io_size); - if (!io_v_base) - panic("Could not ioremap I/O port range"); - - set_io_port_base(io_v_base); - } - - register_pci_controller(>_bus0_controller.pcic); - register_pci_controller(>_bus1_controller.pcic); - - return 0; -} - -arch_initcall(ocelot_g_pci_init); diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h index c7c945b..05fc263 100644 --- a/include/asm-mips/bootinfo.h +++ b/include/asm-mips/bootinfo.h @@ -119,7 +119,7 @@ */ #define MACH_GROUP_MOMENCO 12 /* Momentum Boards */ #define MACH_MOMENCO_OCELOT 0 -#define MACH_MOMENCO_OCELOT_G 1 +#define MACH_MOMENCO_OCELOT_G 1 /* no more supported (may 2007) */ #define MACH_MOMENCO_OCELOT_C 2 #define MACH_MOMENCO_JAGUAR_ATX 3 #define MACH_MOMENCO_OCELOT_3 4 diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h index d7a6513..5e0da6e 100644 --- a/include/asm-mips/serial.h +++ b/include/asm-mips/serial.h @@ -134,27 +134,6 @@ #define MOMENCO_OCELOT_SERIAL_PORT_DEFNS #endif -#ifdef CONFIG_MOMENCO_OCELOT_G -/* Ordinary NS16552 duart with a 20MHz crystal. */ -#define OCELOT_G_BASE_BAUD ( 20000000 / 16 ) - -#define OCELOT_G_SERIAL1_IRQ 4 -#if 0 -#define OCELOT_G_SERIAL1_BASE 0xe0001020 -#else -#define OCELOT_G_SERIAL1_BASE 0xfd000020 -#endif - -#define _OCELOT_G_SERIAL_INIT(int, base) \ - { .baud_base = OCELOT_G_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS,\ - .iomem_base = (u8 *) base, .iomem_reg_shift = 2, \ - .io_type = SERIAL_IO_MEM } -#define MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \ - _OCELOT_G_SERIAL_INIT(OCELOT_G_SERIAL1_IRQ, OCELOT_G_SERIAL1_BASE) -#else -#define MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS -#endif - #ifdef CONFIG_MOMENCO_OCELOT_C /* Ordinary NS16552 duart with a 20MHz crystal. */ #define OCELOT_C_BASE_BAUD ( 20000000 / 16 ) @@ -210,7 +189,6 @@ IP32_SERIAL_PORT_DEFNS \ JAZZ_SERIAL_PORT_DEFNS \ STD_SERIAL_PORT_DEFNS \ - MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \ MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ MOMENCO_OCELOT_SERIAL_PORT_DEFNS \ MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS -- 1.5.1.3 From vagabon.xyz@gmail.com Mon May 7 17:01:23 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 07 May 2007 17:01:28 +0100 (BST) Received: from wx-out-0506.google.com ([66.249.82.227]:19946 "EHLO wx-out-0506.google.com") by ftp.linux-mips.org with ESMTP id S20022095AbXEGQBN (ORCPT ); Mon, 7 May 2007 17:01:13 +0100 Received: by wx-out-0506.google.com with SMTP id s14so831989wxc for ; Mon, 07 May 2007 09:00:06 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:received:to:cc:subject:date:message-id:x-mailer:from; b=Fv6nPU+58COhpTk8VJpEllu7wGikLRqxu5w9IWSVZR6PTsAKIV7PIyS+pXQQ+Uk7SJSPzTuqHmooi8/VD8ypuEjHf3oH2PBanjGkxgXXUtkLgIkOaqxxj7HrwmVMyyvd+g+OQcvFzmCxsZK9b861KWOzdgXaERslIbw69eVCHK8= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:to:cc:subject:date:message-id:x-mailer:from; b=JetYoeFvLVvbovVayUGPcGOT7KUOeY0trES/zC01U5l14NpXzeV72i0Pm20qAy6lxiA6Y5v8EpmMeA2Rhe681jYIDQKtZ5r+FEVFie5JYbmxN7U6TM3kn8NMHbggSRUouEJjVNLvx/CTaSsBH9tKga7w21PwimjdIz4uW3X2t0Y= Received: by 10.90.27.13 with SMTP id a13mr5253474aga.1178553606745; Mon, 07 May 2007 09:00:06 -0700 (PDT) Received: from spoutnik.innova-card.com ( [81.252.61.1]) by mx.google.com with ESMTP id 33sm8362155wra.2007.05.07.09.00.03; Mon, 07 May 2007 09:00:06 -0700 (PDT) Received: by spoutnik.innova-card.com (Postfix, from userid 500) id 4B35E23F76F; Mon, 7 May 2007 18:01:54 +0200 (CEST) To: ralf@linux-mips.org Cc: anemo@mba.ocn.ne.jp, linux-mips@linux-mips.org Subject: [RFC 0/3] Remove Momentum Jaguar and Ocelot G board supports [take #2] Date: Mon, 7 May 2007 18:01:50 +0200 Message-Id: <11785537132378-git-send-email-fbuihuu@gmail.com> X-Mailer: git-send-email 1.5.1.3 From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14980 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips Hi all, These 2 boards have several hacks that make them annoying to support. Specially when improving generic MIPS code. Since they're scheduled for removal since June 2006, it should be high time to get rid of them. Take #2 has removed and fixed some header files as suggested by Atsushi. Please consider, Franck --- arch/mips/Kconfig | 51 +-- arch/mips/Makefile | 20 - arch/mips/configs/jaguar-atx_defconfig | 897 -------------------- arch/mips/configs/ocelot_g_defconfig | 981 ---------------------- arch/mips/mm/highmem.c | 2 - arch/mips/mm/init.c | 3 - arch/mips/momentum/Kconfig | 6 - arch/mips/momentum/jaguar_atx/Makefile | 12 - arch/mips/momentum/jaguar_atx/dbg_io.c | 125 --- arch/mips/momentum/jaguar_atx/irq.c | 94 -- arch/mips/momentum/jaguar_atx/ja-console.c | 101 --- arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h | 54 -- arch/mips/momentum/jaguar_atx/platform.c | 208 ----- arch/mips/momentum/jaguar_atx/prom.c | 210 ----- arch/mips/momentum/jaguar_atx/reset.c | 56 -- arch/mips/momentum/jaguar_atx/setup.c | 475 ----------- arch/mips/momentum/ocelot_g/Makefile | 6 - arch/mips/momentum/ocelot_g/dbg_io.c | 121 --- arch/mips/momentum/ocelot_g/gt-irq.c | 212 ----- arch/mips/momentum/ocelot_g/irq.c | 101 --- arch/mips/momentum/ocelot_g/ocelot_pld.h | 30 - arch/mips/momentum/ocelot_g/prom.c | 84 -- arch/mips/momentum/ocelot_g/reset.c | 47 - arch/mips/momentum/ocelot_g/setup.c | 267 ------ arch/mips/pci/Makefile | 2 - arch/mips/pci/fixup-jaguar.c | 43 - arch/mips/pci/fixup-ocelot-g.c | 37 - arch/mips/pci/pci-ocelot-g.c | 97 --- include/asm-mips/bootinfo.h | 4 +- include/asm-mips/highmem.h | 42 - include/asm-mips/mach-ja/cpu-feature-overrides.h | 45 - include/asm-mips/mach-ja/spaces.h | 20 - include/asm-mips/page.h | 4 - include/asm-mips/serial.h | 41 - 34 files changed, 5 insertions(+), 4493 deletions(-) delete mode 100644 arch/mips/configs/jaguar-atx_defconfig delete mode 100644 arch/mips/configs/ocelot_g_defconfig delete mode 100644 arch/mips/momentum/Kconfig delete mode 100644 arch/mips/momentum/jaguar_atx/Makefile delete mode 100644 arch/mips/momentum/jaguar_atx/dbg_io.c delete mode 100644 arch/mips/momentum/jaguar_atx/irq.c delete mode 100644 arch/mips/momentum/jaguar_atx/ja-console.c delete mode 100644 arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h delete mode 100644 arch/mips/momentum/jaguar_atx/platform.c delete mode 100644 arch/mips/momentum/jaguar_atx/prom.c delete mode 100644 arch/mips/momentum/jaguar_atx/reset.c delete mode 100644 arch/mips/momentum/jaguar_atx/setup.c delete mode 100644 arch/mips/momentum/ocelot_g/Makefile delete mode 100644 arch/mips/momentum/ocelot_g/dbg_io.c delete mode 100644 arch/mips/momentum/ocelot_g/gt-irq.c delete mode 100644 arch/mips/momentum/ocelot_g/irq.c delete mode 100644 arch/mips/momentum/ocelot_g/ocelot_pld.h delete mode 100644 arch/mips/momentum/ocelot_g/prom.c delete mode 100644 arch/mips/momentum/ocelot_g/reset.c delete mode 100644 arch/mips/momentum/ocelot_g/setup.c delete mode 100644 arch/mips/pci/fixup-jaguar.c delete mode 100644 arch/mips/pci/fixup-ocelot-g.c delete mode 100644 arch/mips/pci/pci-ocelot-g.c delete mode 100644 include/asm-mips/mach-ja/cpu-feature-overrides.h delete mode 100644 include/asm-mips/mach-ja/spaces.h From vagabon.xyz@gmail.com Mon May 7 17:01:48 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 07 May 2007 17:01:50 +0100 (BST) Received: from wx-out-0506.google.com ([66.249.82.225]:27626 "EHLO wx-out-0506.google.com") by ftp.linux-mips.org with ESMTP id S20022100AbXEGQBP (ORCPT ); Mon, 7 May 2007 17:01:15 +0100 Received: by wx-out-0506.google.com with SMTP id s14so831996wxc for ; Mon, 07 May 2007 09:00:07 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=C7n7RULIEQ6Fqb6zFVxjR+MZDZ3zeINkzTQn9PV6G+TFzueVsOGHqy9yED+8/yREhQpzZ3TzG9tNRIJ5E7rHlXqoW2fSBDHEoiTYI7XlNHjFySESjfsEk4CRx0rrj3e4LdftEFV+PE7ANKJeRp5vy74rs3wWnF/bOB9HzZqQo54= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:to:cc:subject:date:message-id:x-mailer:in-reply-to:references:from; b=AuSMYTiQGWdDpvca3RK6GOm+NoXEK8vWfb7QY+x3p38GtLjbxXC3HSAGsvjUOTad1nQYpV5kF3RygEXr4javeuLXQaVmGGQA3Df9ft7qwjAP95ZGvmUcRrht33tDWURgmsrQ0DcGmAhMEfSWspGOAHpI1bbc1DVd0Rj8eOtqAA0= Received: by 10.90.105.19 with SMTP id d19mr5271463agc.1178553607526; Mon, 07 May 2007 09:00:07 -0700 (PDT) Received: from spoutnik.innova-card.com ( [81.252.61.1]) by mx.google.com with ESMTP id 9sm8417174wrl.2007.05.07.09.00.02; Mon, 07 May 2007 09:00:06 -0700 (PDT) Received: by spoutnik.innova-card.com (Postfix, from userid 500) id 8DE8023F76E; Mon, 7 May 2007 18:01:54 +0200 (CEST) To: ralf@linux-mips.org Cc: anemo@mba.ocn.ne.jp, linux-mips@linux-mips.org Subject: [PATCH 3/3] Remove LIMITED_DMA support Date: Mon, 7 May 2007 18:01:53 +0200 Message-Id: <11785537142626-git-send-email-fbuihuu@gmail.com> X-Mailer: git-send-email 1.5.1.3 In-Reply-To: <11785537132378-git-send-email-fbuihuu@gmail.com> References: <11785537132378-git-send-email-fbuihuu@gmail.com> From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14981 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips From: Franck Bui-Huu This code was needed only by Jaguar ATX. Signed-off-by: Franck Bui-Huu --- arch/mips/Kconfig | 5 ----- arch/mips/mm/highmem.c | 2 -- arch/mips/mm/init.c | 3 --- include/asm-mips/highmem.h | 42 ------------------------------------------ include/asm-mips/page.h | 4 ---- 5 files changed, 0 insertions(+), 56 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 28caf80..77a1ef0 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -885,11 +885,6 @@ config GENERIC_ISA_DMA config I8259 bool -config LIMITED_DMA - bool - select HIGHMEM - select SYS_SUPPORTS_HIGHMEM - config MIPS_BONITO64 bool diff --git a/arch/mips/mm/highmem.c b/arch/mips/mm/highmem.c index 675502a..10dd2af 100644 --- a/arch/mips/mm/highmem.c +++ b/arch/mips/mm/highmem.c @@ -80,7 +80,6 @@ void __kunmap_atomic(void *kvaddr, enum km_type type) pagefault_enable(); } -#ifndef CONFIG_LIMITED_DMA /* * This is the same as kmap_atomic() but can map memory that doesn't * have a struct page associated with it. @@ -99,7 +98,6 @@ void *kmap_atomic_pfn(unsigned long pfn, enum km_type type) return (void*) vaddr; } -#endif /* CONFIG_LIMITED_DMA */ struct page *__kmap_atomic_to_page(void *ptr) { diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 2d1c2c0..4c80528 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c @@ -424,9 +424,6 @@ void __init mem_init(void) continue; } ClearPageReserved(page); -#ifdef CONFIG_LIMITED_DMA - set_page_address(page, lowmem_page_address(page)); -#endif init_page_count(page); __free_page(page); totalhigh_pages++; diff --git a/include/asm-mips/highmem.h b/include/asm-mips/highmem.h index f8c8182..4d6bd5c 100644 --- a/include/asm-mips/highmem.h +++ b/include/asm-mips/highmem.h @@ -48,46 +48,6 @@ extern pte_t *pkmap_page_table; extern void * kmap_high(struct page *page); extern void kunmap_high(struct page *page); -/* - * CONFIG_LIMITED_DMA is for systems with DMA limitations such as Momentum's - * Jaguar ATX. This option exploits the highmem code in the kernel so is - * always enabled together with CONFIG_HIGHMEM but at this time doesn't - * actually add highmem functionality. - */ - -#ifdef CONFIG_LIMITED_DMA - -/* - * These are the default functions for the no-highmem case from - * - */ -static inline void *kmap(struct page *page) -{ - might_sleep(); - return page_address(page); -} - -#define kunmap(page) do { (void) (page); } while (0) - -static inline void *kmap_atomic(struct page *page, enum km_type type) -{ - pagefault_disable(); - return page_address(page); -} - -static inline void kunmap_atomic(void *kvaddr, enum km_type type) -{ - pagefault_enable(); -} - -#define kmap_atomic_pfn(pfn, idx) kmap_atomic(pfn_to_page(pfn), (idx)) - -#define kmap_atomic_to_page(ptr) virt_to_page(ptr) - -#define flush_cache_kmaps() do { } while (0) - -#else /* LIMITED_DMA */ - extern void *__kmap(struct page *page); extern void __kunmap(struct page *page); extern void *__kmap_atomic(struct page *page, enum km_type type); @@ -103,8 +63,6 @@ extern struct page *__kmap_atomic_to_page(void *ptr); #define flush_cache_kmaps() flush_cache_all() -#endif /* LIMITED_DMA */ - #endif /* __KERNEL__ */ #endif /* _ASM_HIGHMEM_H */ diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h index d3fbd83..5c3239d 100644 --- a/include/asm-mips/page.h +++ b/include/asm-mips/page.h @@ -190,10 +190,6 @@ typedef struct { unsigned long pgprot; } pgprot_t; #define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE) #define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET) -#ifdef CONFIG_LIMITED_DMA -#define WANT_PAGE_VIRTUAL -#endif - #include #include -- 1.5.1.3 From guido.zeiger@mailprocessor.de Mon May 7 18:38:18 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 07 May 2007 18:38:20 +0100 (BST) Received: from moutng.kundenserver.de ([212.227.126.171]:50633 "EHLO moutng.kundenserver.de") by ftp.linux-mips.org with ESMTP id S20022095AbXEGRiS convert rfc822-to-8bit (ORCPT ); Mon, 7 May 2007 18:38:18 +0100 Received: from [87.166.150.201] (helo=[192.168.6.7]) by mrelayeu.kundenserver.de (node=mrelayeu4) with ESMTP (Nemesis), id 0ML21M-1Hl79a0Ili-0003GP; Mon, 07 May 2007 19:37:42 +0200 Mime-Version: 1.0 (Apple Message framework v752.3) Content-Transfer-Encoding: 8BIT Message-Id: <8FBE82E8-F399-426A-A263-E0EA85095A08@mailprocessor.de> Content-Type: text/plain; charset=ISO-8859-1; delsp=yes; format=flowed To: linux-mips@linux-mips.org From: Guido Zeiger Subject: Segmentation Fault from MP3-Player with Etch on Qube2 Date: Mon, 7 May 2007 19:37:40 +0200 X-Mailer: Apple Mail (2.752.3) X-Provags-ID: V01U2FsdGVkX1/q2QwEPqIOlrFtVQamVd3Wp9r+WFRuZTz6KCq tXKW9U14cAe3osRwN+ouAxhpZF75wM0FjlkMGUCkEZzxkkp6Ie JwkB5ST2NIAY6UscFV+Xg== Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14982 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: guido.zeiger@mailprocessor.de Precedence: bulk X-list: linux-mips Hello, after reinstalling debian, (now etch , therefore sid) on my Qube2, because of changing to a 2.5" HD (from 3.5") and installing the current debian version I got a Segmentation Fault on every usage of a program which should produce sound :-(( The programs are > mpg123 > mpg321 > mp3blaster The programs did work with this qube2, soundcard and mp3-file under debian sid, but now with etch it didnt work anymore. Hopefully someone could point me to the problem which is generating the Segmentation Fault. Here the complete SegFault-Listing...if this could help to find the problem: littleghost:/home/guido# mpg321 ./mss.mp3 High Performance MPEG 1.0/2.0/2.5 Audio Player for Layer 1, 2, and 3. Version 0.59q (2002/03/23). Written and copyrights by Joe Drew. Uses code from various people. See 'README' for more! THIS SOFTWARE COMES WITH ABSOLUTELY NO WARRANTY! USE AT YOUR OWN RISK! Title : Magical Sound Shower (Original Artist: Sega/S.S.T. Band Album : Outrun OST Year : 1986 Comment: copyright Pony Canyon RecordsÆ Genre : Soundtrack Directory: ./ Playing MPEG stream from mss.mp3 ... MPEG 1.0 layer III, 160 kbit/s, 44100 Hz stereo Data bus error, epc == 801ae38c, ra == c00904b4 Oops[#1]: Cpu 0 $ 0 : 00000000 100028c8 00000000 80000000 $ 4 : c011f000 100016c8 000011e0 100016c8 $ 8 : ffff0001 ffff0001 00000000 00010000 $12 : 0000ffff 00001fff 0000000d 00000000 $16 : 00004000 8f80d000 00000480 00000000 $20 : 80389c80 00000480 100016c8 00000000 $24 : 00000000 c008c738 $28 : 8e544000 8e545de8 c0090408 c00904b4 Hi : 00000000 Lo : 00000000 epc : 801ae38c both_aligned+0x2c/0x64 Not tainted ra : c00904b4 snd_pcm_lib_write_transfer+0xac/0xc4 [snd_pcm] Status: b0006c03 KERNEL EXL IE Cause : 0080801c PrId : 000028a0 Modules linked in: ipv6 dm_snapshot dm_mirror dm_mod loop snd_emu10k1 snd_rawmid i snd_ac97_codec snd_ac97_bus snd_pcm snd_seq_device snd_timer snd_page_alloc sn d_util_mem snd_hwdep uhci_hcd snd usbcore soundcore Process mpg321 (pid: 889, threadinfo=8e544000, task=8037a8b8) Stack : 8eb0fe24 2afd7000 00000000 8e5242ac 2afd7c7c 00000f5c c008ea40 800defd4 8ff20df4 00000000 8e545e28 00000000 00000480 00000100 00000000 00000000 00000002 00000000 00000000 00000000 00000000 00000000 00000000 7fe40b20 80389c80 800c4150 00000004 100327e8 7fe42ca8 1002f370 10004050 c008ed50 8f95a980 c0684113 00000004 00000000 c0090408 00000000 c008c92c c008c794 ... Call Trace: [<801ae38c>] both_aligned+0x2c/0x64 [] snd_pcm_lib_write_transfer+0xac/0xc4 [snd_pcm] [] snd_pcm_lib_write1+0x3c8/0x620 [snd_pcm] [] snd_pcm_lib_write+0x50/0x7c [snd_pcm] [] snd_pcm_playback_ioctl1+0x1f4/0x5ec [snd_pcm] [<8010a4bc>] do_ioctl+0x2c/0x80 [<8010a57c>] vfs_ioctl+0x6c/0x34c [<8010a908>] sys_ioctl+0xac/0xc4 [<8008a9a0>] stack_done+0x20/0x3c Code: 24c6ffe0 8cac0010 8caf0014 ac890004 8ca80018 8ca9001c 24a5 0020 24840020 Segmentation fault lspci for the soundcard which did work on Sid: 00:0a.0 Multimedia audio controller: Creative Labs SB Live! EMU10k1 (rev 04) 00:0a.1 Input device controller: Creative Labs SB Live! Game Port (rev 01) littleghost:/home/guido# lsmod Module Size Used by ipv6 314976 10 dm_snapshot 20000 0 dm_mirror 24512 0 dm_mod 68320 2 dm_snapshot,dm_mirror loop 17168 0 snd_emu10k1 134864 0 snd_rawmidi 29696 1 snd_emu10k1 snd_ac97_codec 105152 1 snd_emu10k1 snd_ac97_bus 2208 1 snd_ac97_codec snd_pcm 89440 2 snd_emu10k1,snd_ac97_codec snd_seq_device 9968 2 snd_emu10k1,snd_rawmidi snd_timer 27024 2 snd_emu10k1,snd_pcm snd_page_alloc 11248 2 snd_emu10k1,snd_pcm snd_util_mem 5184 1 snd_emu10k1 snd_hwdep 10576 1 snd_emu10k1 uhci_hcd 27536 0 snd 58992 7 snd_emu10k1,snd_rawmidi,snd_ac97_codec,snd_pcm,s nd_seq_device,snd_timer,snd_hwdep usbcore 130896 1 uhci_hcd soundcore 11056 1 snd The programs saytime and saydate did produce a error regarding the pcm sounddevice. Thanks Bye Guido. From jeff@garzik.org Tue May 8 06:23:25 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 08 May 2007 06:23:27 +0100 (BST) Received: from srv5.dvmed.net ([207.36.208.214]:40916 "EHLO mail.dvmed.net") by ftp.linux-mips.org with ESMTP id S20021702AbXEHFXZ (ORCPT ); Tue, 8 May 2007 06:23:25 +0100 Received: from cpe-065-190-194-075.nc.res.rr.com ([65.190.194.75] helo=[10.10.10.10]) by mail.dvmed.net with esmtpsa (Exim 4.63 #1 (Red Hat Linux)) id 1HlIAT-0002fy-79; Tue, 08 May 2007 05:23:21 +0000 Message-ID: <46400948.9060007@garzik.org> Date: Tue, 08 May 2007 01:23:20 -0400 From: Jeff Garzik User-Agent: Thunderbird 1.5.0.10 (X11/20070302) MIME-Version: 1.0 To: Atsushi Nemoto CC: linux-mips@linux-mips.org, netdev@vger.kernel.org, ralf@linux-mips.org, sshtylyov@ru.mvista.com, akpm@linux-foundation.org Subject: Re: [PATCH 1/5] ne: Add platform_driver References: <20070501.002731.104031408.anemo@mba.ocn.ne.jp> In-Reply-To: <20070501.002731.104031408.anemo@mba.ocn.ne.jp> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14983 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jeff@garzik.org Precedence: bulk X-list: linux-mips Atsushi Nemoto wrote: > Add a platform_driver interface to ne driver. > (Existing legacy ports did not covered by this ne_driver for now) > > Signed-off-by: Atsushi Nemoto > --- > drivers/net/ne.c | 91 ++++++++++++++++++++++++++++++++++++++++++++++++++++- > 1 files changed, 89 insertions(+), 2 deletions(-) applied 1-5 From jeff@garzik.org Tue May 8 06:42:15 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 08 May 2007 06:42:18 +0100 (BST) Received: from srv5.dvmed.net ([207.36.208.214]:16341 "EHLO mail.dvmed.net") by ftp.linux-mips.org with ESMTP id S20021831AbXEHFmP (ORCPT ); Tue, 8 May 2007 06:42:15 +0100 Received: from cpe-065-190-194-075.nc.res.rr.com ([65.190.194.75] helo=[10.10.10.10]) by mail.dvmed.net with esmtpsa (Exim 4.63 #1 (Red Hat Linux)) id 1HlIPX-0002j4-4e; Tue, 08 May 2007 05:38:57 +0000 Message-ID: <46400CEE.8050709@garzik.org> Date: Tue, 08 May 2007 01:38:54 -0400 From: Jeff Garzik User-Agent: Thunderbird 1.5.0.10 (X11/20070302) MIME-Version: 1.0 To: Marc St-Jean CC: netdev@vger.kernel.org, akpm@linux-foundation.org, linux-mips@linux-mips.org Subject: Re: [PATCH 10/12] drivers: PMC MSP71xx ethernet driver References: <200704270048.l3R0m3WV015597@pasqua.pmc-sierra.bc.ca> In-Reply-To: <200704270048.l3R0m3WV015597@pasqua.pmc-sierra.bc.ca> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14984 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jeff@garzik.org Precedence: bulk X-list: linux-mips > +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) > +#include > +#include > +#include > +#include > +#include > +#include > +#endif /* LINUX_VERSION_CODE */ > + > +#include "pmcmspeth.h" > + > +/************************************************************************** > + * The name of the card. Is used for messages and in the requests for > + * io regions, irqs and dma channels, versions, etc. Also, various other > + * identifying character constants. > + */ > +static const char cardname[] = "pmcmspeth"; > + > +/************************************************************************** > + * List of PHYs. Each MAC will have a certain number (maybe zero) > + * PHYs hanging off the MDIO interface. > + */ > +static struct mspeth_phy *root_phy_dev = NULL; > + > +/* Debugging flags */ > +static unsigned int mspeth_debug = MSPETH_DEBUG; use netif_msg_init() and the bitmapped message flags. grep for 'netif_msg_' and 'msg_enable' in various drivers. > +/************************************************************************** > + * Function prototypes > + */ > + > +/* Functions that get called by upper layers */ > +static int mspeth_open(struct net_device *dev); > +static int mspeth_send_packet(struct sk_buff *skb, > + struct net_device *dev); > +static void mspeth_tx_timeout(struct net_device *dev); > +static void mspeth_hard_restart_bh(unsigned long dev_addr); > +static int mspeth_close(struct net_device *dev); > +static struct net_device_stats *mspeth_get_stats(struct net_device *dev); > +static void mspeth_set_multicast_list(struct net_device *dev); > + > +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) > +static irqreturn_t mspeth_interrupt(int irq, void *dev_id); > +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) > +static void mspeth_interrupt(int irq, void *dev_id, struct pt_regs *regs); > +#endif remove all kernel compat ifdefs > + /* protect access with spin lock */ > + spin_lock_irqsave(&(phyptr->lock), flags); > + > + while (__raw_readl(phyptr->memaddr + MSPPHY_MII_CTRL) & > + MD_CA_BUSY_BIT) {;} > + __raw_writel(MD_CA_BUSY_BIT | phyptr->phyaddr << 5 | phy_reg, > + phyptr->memaddr + MSPPHY_MII_CTRL); > + while (__raw_readl(phyptr->memaddr + MSPPHY_MII_CTRL) & > + MD_CA_BUSY_BIT) {;} > + data = __raw_readl(phyptr->memaddr + MSPPHY_MII_DATA); no infinite loops allowed > + /* unlock */ > + spin_unlock_irqrestore(&(phyptr->lock), flags); > + > + return data & 0xffff; > +} > + > +static void > +mspphy_write(struct mspeth_phy *phyptr, int phy_reg, u32 data) > +{ > + unsigned long flags; > + > + if (phyptr == NULL) { > + printk(KERN_WARNING "MSPETH(mspphy_write): " > + "Cannot write to a NULL PHY!\n"); This is a BUG_ON() condition > + /* protect access with spin lock */ > + spin_lock_irqsave(&(phyptr->lock), flags); remove extra parens > + while (__raw_readl(phyptr->memaddr + MSPPHY_MII_CTRL) & > + MD_CA_BUSY_BIT) {;} > + __raw_writel(data, phyptr->memaddr + MSPPHY_MII_DATA); > + __raw_writel(MD_CA_BUSY_BIT | MD_CA_Wr | > + phyptr->phyaddr << 5 | phy_reg, > + phyptr->memaddr + MSPPHY_MII_CTRL); > + while (__raw_readl(phyptr->memaddr + MSPPHY_MII_CTRL) & > + MD_CA_BUSY_BIT) {;} no infinite loops > + /* unlock */ > + spin_unlock_irqrestore(&(phyptr->lock), flags); > +} > + > +#ifdef CONFIG_MSPETH_SKB_RECYCLE > +/* initialise the recycle bin for skb */ > +static void > +init_skbuff_bin(void) > +{ > + spin_lock_init(&skb_bin.lock); > + skb_bin.recycle_max = RX_BUF_NUM * 4; /* max size of bin */ > + skb_bin.recycle_count = 0; > + skb_bin.recycle_queue = NULL; > + skb_bin.user_count = 0; > +} > + > +/* free the skb's in recycle bin */ > +static void > +free_skbuff_bin(void) > +{ > + spin_lock_bh(&skb_bin.lock); > + > + /* check any skb's are present in the recycle bin */ > + if (skb_bin.recycle_count > 0) { > + struct sk_buff *skb; > + while (skb_bin.recycle_queue != NULL ) { > + skb = skb_bin.recycle_queue->next; > + dev_kfree_skb_any(skb_bin.recycle_queue); > + skb_bin.recycle_queue = skb; > + } > + } > + > + /* reset fields */ > + skb_bin.recycle_queue = NULL; > + skb_bin.recycle_count = 0; > + > + spin_unlock_bh(&skb_bin.lock); > +} > + > +inline static void > +mspeth_skb_headerinit(struct sk_buff *skb) > +{ > + /* these are essential before init */ > + dst_release(skb->dst); > +#ifdef CONFIG_XFRM > + secpath_put(skb->sp); > +#endif > +#ifdef CONFIG_NETFILTER > + nf_conntrack_put(skb->nfct); > +#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) > + nf_conntrack_put_reasm(skb->nfct_reasm); > +#endif > +#ifdef CONFIG_BRIDGE_NETFILTER > + nf_bridge_put(skb->nf_bridge); > +#endif > +#endif /* CONFIG_NETFILTER */ > + > + /* now initialise the skb . . . */ > +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) > + /* clear the members till skb->truesize */ > + memset(skb, 0, offsetof(struct sk_buff, truesize)); > +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) > + skb->prev = NULL; > + skb->list = NULL; > + skb->sk = NULL; > + skb->stamp.tv_sec = 0; > +#ifdef CONFIG_BRECIS > + skb->stamp.tv_usec = 0; > +#endif /* CONFIG_BRECIS */ > + skb->dev = NULL; > + skb->real_dev = NULL; > + skb->dst = NULL; > + memset(skb->cb, 0, sizeof(skb->cb)); > + skb->pkt_type = PACKET_HOST; > + skb->priority = 0; > + skb->security = 0; > + > +#ifdef CONFIG_NETFILTER > + skb->nfmark = skb->nfcache = 0; > + skb->nfct = NULL; > +#ifdef CONFIG_NETFILTER_DEBUG > + skb->nf_debug = 0; > +#endif > +#if defined(CONFIG_BRIDGE) || defined(CONFIG_BRIDGE_MODULE) > + skb->nf_bridge = NULL; > +#endif > +#endif /* CONFIG_NETFILTER */ > +#ifdef CONFIG_NET_SCHED > + skb->tc_index = 0; > +#endif > +#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) > + skb->nfct_reasm = NULL; > +#endif > +#endif /* LINUX_VERSION_CODE */ > +} > +#endif /* CONFIG_MSPETH_SKB_RECYCLE */ Absolutely not. No. NAK. This is unmaintainable crap that does not belong in a driver at all. You should not be hand-initializing skbs. > +/************************************************************************** > + * Allocate and align a max length socket buffer for this device > + */ > +inline static struct sk_buff * > +mspeth_alloc_skb(struct net_device *dev) > +{ > + struct sk_buff *skb = NULL; > + > +#ifdef CONFIG_MSPETH_SKB_RECYCLE > + /* try to get an skb from the recycle bin */ > + spin_lock_bh(&skb_bin.lock); > + > + /* check if the bin si empty */ > + if (skb_bin.recycle_queue) { > + /* grab an skb from the bin */ > + skb = skb_bin.recycle_queue; > + skb_bin.recycle_queue = skb->next; > + > + /* we have taken one, so reduce the count */ > + skb_bin.recycle_count--; > + skb_bin.recycle_hits++; > + spin_unlock_bh(&skb_bin.lock); > + > + skb->next = NULL; /* must be set to NULL */ > + skb->truesize = (skb->end - skb->head) + > + sizeof(struct sk_buff); > + atomic_set(&skb->users, 1); > + > + /* reset the payload pointers */ > + skb->data = skb->head; > + skb->tail = skb->head; > + > + /* reset shared info fields */ > + atomic_set(&(skb_shinfo(skb)->dataref), 1); > + skb_shinfo(skb)->nr_frags = 0; > +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) > + skb_shinfo(skb)->gso_size = 0; > + skb_shinfo(skb)->gso_segs = 0; > +#endif > + skb_shinfo(skb)->frag_list = NULL; > + > + /* compliance with __dev_alloc_skb */ > + skb_reserve(skb, NET_SKB_PAD); > + } else { > + /* no skb in bin */ > + spin_unlock_bh(&skb_bin.lock); > + } > +#endif /* CONFIG_MSPETH_SKB_RECYCLE */ > + > + if (skb == NULL) { > + /* > + * We need a bit more than an ethernet frame for the > + * aligment stuff so preallocate two more. > + */ > + skb = dev_alloc_skb(MSP_END_BUFSIZE + 2); > +#ifdef CONFIG_MSPETH_SKB_RECYCLE > + skb_bin.recycle_misses++; > +#endif > + if (skb == NULL) { > + printk(KERN_WARNING "MSPETH(alloc_skb) %s: " > + "cannot allocate skb!\n", dev->name); > + return NULL; > + } > + } > + > + /* > + * Align and fill out fields specific to our device. Notice that > + * our device is smart about FCS etc ...... > + */ > + skb_reserve(skb, 2); > + skb->dev = dev; > + skb->ip_summed = CHECKSUM_NONE; > + > + return skb; > +} > + > +/************************************************************************** > + * Add the used skb to recycle bin or free it > + */ > +inline static void > +mspeth_free_skb(struct sk_buff *skb) > +{ > +#ifdef CONFIG_MSPETH_SKB_RECYCLE > + /* > + * First try to recycle the skb. > + * Check if the skb can be recycled. > + */ > + if ((skb->end - skb->head) >= SKBUFF_RECYCLABLE_SIZE && > + (!skb->destructor) && > + (!skb->cloned) && > + (atomic_dec_and_test(&skb->users))) { > + /* skb is recyclable */ > + spin_lock_bh(&skb_bin.lock); > + > + /* check the bin has room to add our skb */ > + if (likely(skb_bin.recycle_count < skb_bin.recycle_max)) { > + /* everything ok; go recycle it */ > + /* prerequisite before adding to recycle bin */ > + mspeth_skb_headerinit(skb); > + > + /* now we can add the skb to bin */ > + skb->next = skb_bin.recycle_queue; > + skb_bin.recycle_queue = skb; > + > + /* we have one more skb in bin, increase the count */ > + skb_bin.recycle_count++; > + > + spin_unlock_bh(&skb_bin.lock); > + return; > + } else { > + /* bin has no room */ > + spin_unlock_bh(&skb_bin.lock); > + } > + } > +#endif /* CONFIG_MSPETH_SKB_RECYCLE */ > + > + /* Can't add skb to recycle bin, so free it in normal way. */ > + dev_kfree_skb_any(skb); > +} > + > +/************************************************************************** > + * Error reporting functions -- used for debugging mostly > + */ > +static void > +dump_qdesc(struct q_desc *fd) > +{ > + printk(KERN_INFO " q_desc(%p): %08x %08x %08x %08x\n", > + fd, fd->fd.FDNext, fd->fd.FDSystem, > + fd->fd.FDStat, fd->fd.FDCtl); > + printk(KERN_INFO " BD: %08x %08x\n", > + fd->bd.BuffData, fd->bd.BDCtl); > +} > + > +static void > +print_buf(char *add, int length) > +{ > + int i; > + int len = length; > + > + printk(KERN_INFO "print_buf(%08x)(%x)\n", > + (unsigned int)add, length); > + > + if (len > 100) > + len = 100; > + for (i = 0; i < len; i++) { > + printk(KERN_INFO " %2.2X", (unsigned char)add[i]); > + if (!(i % 16)) > + printk(KERN_INFO "\n"); > + } > + printk(KERN_INFO "\n"); > +} > + > +static void > +print_eth(int rx, char *add, int len) > +{ > + int i; > + int lentyp; > + > + if (rx) > + printk(KERN_INFO "\n************************** RX packet " > + "0x%08x ****************************\n", (u32)add); > + else > + printk(KERN_INFO "\n************************** TX packet " > + "0x%08x ****************************\n", (u32)add); > + > + printk(KERN_INFO "---- ethernet ----\n"); > + printk(KERN_INFO "==> dest: "); > + for (i = 0; i < 6; i++) { > + printk(KERN_INFO "%02x", (unsigned char)add[i]); > + printk((i < 5) ? KERN_INFO ":" : KERN_INFO "\n"); > + } > + > + printk(KERN_INFO "==> src: "); > + for (i = 0; i < 6; i++) { > + printk(KERN_INFO "%02x", (unsigned char)add[i + 6]); > + printk((i < 5) ? KERN_INFO ":" : KERN_INFO "\n"); > + } > + lentyp = ((unsigned char)add[12] << 8) | (unsigned char)add[13]; > + if (lentyp <= 1500) > + printk(KERN_INFO "==> len: %d\n", lentyp); > + else if (lentyp > 1535) > + printk(KERN_INFO "==> type: 0x%04x\n", lentyp); > + else > + printk(KERN_INFO "==> ltyp: 0x%04x\n", lentyp); > + > + if (len > 0x100) > + len = 0x100; > + > + for (i = 0; i < ((u32)add & 0x0000000F); i++) > + printk(KERN_INFO " "); > + for (i = 0; i < len; i++, add++) { > + printk(KERN_INFO " %02x", *((unsigned char *)add)); > + if (!(((u32)add + 1) % 16)) > + printk(KERN_INFO "\n"); > + } > + printk(KERN_INFO "\n"); > +} > + > +/* > + * Used mainly for debugging unusual conditions signalled by a > + * fatal error interrupt (eg, IntBLEx). This function stops the transmit > + * and receive in an attempt to capture the true state of the queues > + * at the time of the interrupt. > + */ > +#undef MSPETH_DUMP_QUEUES > +#ifdef MSPETH_DUMP_QUEUES > +static void > +dump_blist(struct bl_desc *fd) > +{ > + int i; > + > + printk(KERN_INFO " bl_desc(%p): %08x %08x %08x %08x\n", > + fd, fd->fd.FDNext, > + fd->fd.FDSystem, fd->fd.FDStat, fd->fd.FDCtl); > + for (i = 0; i < RX_BUF_NUM << 1; i++) > + printk(KERN_INFO " BD #%d: %08x %08x\n", > + i, fd->bd[i].BuffData, fd->bd[i].BDCtl); > +} > + > +/* Catalog the received buffers numbers */ > +static int rx_bdnums[2][RX_BUF_NUM << 2]; > +static int rx_bdnums_ind[2] = {0, 0}; > +static inline void > +catalog_rx_bdnum(int hwnum, int bdnum) > +{ > + rx_bdnums_ind[hwnum] = (rx_bdnums_ind[hwnum] + 1) & > + ((RX_BUF_NUM << 2) - 1); > + rx_bdnums[hwnum][rx_bdnums_ind[hwnum]] = bdnum; > +} > + > +static void > +mspeth_dump_queues(struct net_device *dev) > +{ > + struct mspeth_priv *lp = netdev_priv(dev); > + int unit = lp->unit; > + int i; > + > + /* Halt Xmit and Recv to preserve the state of queues */ > + msp_write(lp, MSPETH_Rx_Ctl, msp_read(lp, MSPETH_Rx_Ctl) & ~Rx_RxEn); > + msp_write(lp, MSPETH_Tx_Ctl, msp_read(lp, MSPETH_Tx_Ctl) & ~Tx_En); > + > + /* Print receive queue */ > + printk(KERN_INFO "Receive Queue\n"); > + printk(KERN_INFO "=============\n\n"); > + printk(KERN_INFO "rxfd_base = 0x%08x\n", > + (unsigned int) lp->rxfd_base); > + printk(KERN_INFO "rxfd_curr = 0x%08x\n", > + (unsigned int) lp->rxfd_curr); > + for (i = 0; i < RX_BUF_NUM; i++) { > + printk(KERN_INFO "%d:", i); > + dump_qdesc((struct q_desc *) &lp->rxfd_base[i]); > + } > + > + /* Print transmit queue */ > + printk(KERN_INFO "\nTransmit Queue\n"); > + printk(KERN_INFO "==============\n"); > + printk(KERN_INFO "txfd_base = 0x%08x\n", > + (unsigned int) lp->txfd_base); > + printk(KERN_INFO "tx_head = %d, tx_tail = %d\n", > + lp->tx_head, lp->tx_tail); > + for (i = 0; i < TX_BUF_NUM; i++) { > + printk(KERN_INFO "%d:", i); > + dump_qdesc((struct q_desc *) &lp->txfd_base[i]); > + } > + > + /* Print the free buffer list */ > + printk(KERN_INFO "\nFree Buffer List\n"); > + printk(KERN_INFO "================\n"); > + printk(KERN_INFO "blfd_ptr = 0x%08x\n", (unsigned int) lp->blfd_ptr); > + dump_blist(lp->blfd_ptr); > + > + /* Print the bdnum history and current index as a reference */ > + printk(KERN_INFO "\nbdnum history\n"); > + printk(KERN_INFO "=============\n"); > + for (i = 0; i < RX_BUF_NUM; i++) { > + printk(KERN_INFO "\t%d\t%d\t%d\t%d\n", > + rx_bdnums[unit][4 * i], > + rx_bdnums[unit][4 * i + 1], > + rx_bdnums[unit][4 * i + 2], > + rx_bdnums[unit][4 * i + 3]); > + } > + printk(KERN_INFO "Current bdnum index: %d\n", rx_bdnums_ind[unit]); > + > + /* Re-enable Xmit/Recv */ > + msp_write(lp, MSPETH_Rx_Ctl, msp_read(lp, MSPETH_Rx_Ctl) | Rx_RxEn); > + msp_write(lp, MSPETH_Tx_Ctl, msp_read(lp, MSPETH_Tx_Ctl) | Tx_En); > +} > + > +static void > +mspeth_dump_stats(struct net_device *dev) > +{ > + struct mspeth_priv *lp = netdev_priv(dev); > + > + printk(KERN_INFO "Interface stats:\n"); > + printk(KERN_INFO "\ttx_ints: %d\n", lp->lstats.tx_ints); > + printk(KERN_INFO "\trx_ints: %d\n", lp->lstats.rx_ints); > + printk(KERN_INFO "\ttx_full: %d\n", lp->lstats.tx_full); > + printk(KERN_INFO "\tfd_exha: %d\n", lp->lstats.fd_exha); > +} > +#else > +#define mspeth_dump_stats(a) do {} while (0) > +#define mspeth_dump_queues(a) do {} while (0) > +#define catalog_rx_bdnum(a, b) do {} while (0) > +#define dump_blist(a) do {} while (0) > +#endif /* MSPETH_DUMP_QUEUES */ > + > +/* > + * Actual functions used in the driver are defined here. They should > + * all start with mspeth. > + */ > + > +/************************************************************************** > + * Check for an mspeth ethernet device and return 0 if there is one. > + * Also a good time to fill out some of the device fields and do some > + * preliminary initialization. The mspeth resources are statically > + * allocated. > + */ > + > +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) > +int mspeth_probe(struct platform_device *pldev) > +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) > +int __init mspeth_probe(struct net_device *dev) > +#endif > +{ > + int unit, hwunit; > + int i, err; > + u8 macaddr[8]; > + struct mspeth_priv *lp; > + char tmp_str[128]; > + > +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) > + struct net_device *dev = NULL; > + struct resource *res; > + void *mapaddr; > + unit = pldev->id; > +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) > + sscanf(dev->name, "eth%d", &unit); > +#endif > + > + /* default return value -- no device here */ > + err = -ENODEV; > + > + /* > + * Scan the hardware list and associate a logical unit with a > + * hardware unit it's important to keep these two straight. > + * hwunit is used for accessing the prom and all hardware. > + * unit is used when parsing the commandline and any other > + * uses that might refer to *all* eth devices (not just mspeth > + * devices) in the system. > + */ > + for (i = 0, hwunit = 0; hwunit < MSPETH_MAX_UNITS; hwunit++) { > + if (identify_enet(hwunit) != FEATURE_NOEXIST) > + if (i++ == unit) > + break; > + } > + > + /* Sanity checks on hardware parameters */ > + if (unit < 0 || hwunit >= MSPETH_MAX_UNITS) > + goto out_err; > + > + /* Retrieve the mac address from the PROM */ > + snprintf(tmp_str, 128, "ethaddr%d", hwunit); > + if (get_ethernet_addr(tmp_str, macaddr)) { > + printk(KERN_WARNING "MSPETH(probe): " > + "No Mac addr specified for eth%d, hwunit %d\n", > + unit, hwunit); > + goto out_err; > + } > + > + if (macaddr[0] & 0x01) { > + printk(KERN_WARNING "MSPETH(probe): " > + "Bad Multicast Mac addr specified for eth%d, " > + "hwunit %d %02x:%02x:%02x:%02x:%02x:%02x\n", > + unit, hwunit, > + macaddr[0], macaddr[1], macaddr[2], > + macaddr[3], macaddr[4], macaddr[5]); > + goto out_err; > + } > + > +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) > + dev = alloc_etherdev(sizeof(struct mspeth_priv)); > + if (!dev) { > + err = -ENOMEM; > + goto out_err; > + } > + > + SET_MODULE_OWNER(dev); > + SET_NETDEV_DEV(dev, &pldev->dev); > + dev_set_drvdata(&pldev->dev, dev); > +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) > + /* Create & initialize the local device structure */ > + if (dev->priv == NULL) { > + dev->priv = kmalloc(sizeof(struct mspeth_priv), > + GFP_KERNEL); > + if (dev->priv == NULL) > + goto out_err; > + } > +#endif > + > + lp = netdev_priv(dev); > + memset(lp, 0, sizeof(struct mspeth_priv)); redundant memset() > +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) > + lp->dev = &pldev->dev; > + > + res = platform_get_resource(pldev, IORESOURCE_MEM, 0); > + if (!res) { > + printk(KERN_ERR "MSPETH(probe) %s: " > + "IOMEM resource not found for eth%d\n", > + dev->name, unit); > + goto out_netdev; > + } > + > + /* reserve the memory region */ > + if (!request_mem_region(res->start, res->end - res->start + 1, > + cardname)) { > + printk(KERN_ERR "MSPETH(probe) %s: unable to " > + "get memory/io address region 0x08%lx\n", > + dev->name, dev->base_addr); > + goto out_netdev; > + } > + > + /* remap the memory */ > + mapaddr = ioremap_nocache(res->start, res->end - res->start + 1); > + if (!mapaddr) { > + printk(KERN_WARNING "MSPETH(probe) %s: " > + "unable to ioremap address 0x%08x\n", > + dev->name, res->start); > + goto out_unreserve; > + } > + > + lp->mapaddr = mapaddr; > + dev->base_addr = res->start; > + dev->irq = platform_get_irq(pldev, 0); > +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) > + /* > + * Dig out the parameters from the defines and do other > + * hwunit specific stuff > + */ > + switch (hwunit) { > + case 0: > + dev->base_addr = MSP_MAC0_BASE; > + dev->irq = MSP_INT_MAC0; > + break; > + case 1: > + dev->base_addr = MSP_MAC1_BASE; > + dev->irq = MSP_INT_MAC1; > + break; > + case 2: > + dev->base_addr = MSP_MAC2_BASE; > + dev->irq = MSP_INT_MAC2; > + break; > + default: > + printk(KERN_WARNING "MSPETH(probe): " > + "Unsupported hardware unit %d\n", hwunit); > + goto out_unmap; > + } > + > + /* reserve the memory region */ > + if (!request_mem_region(dev->base_addr, MSP_MAC_SIZE, cardname)) { > + printk(KERN_ERR "MSPETH(probe) %s: unable to " > + "get memory/io address region 0x08%lx\n", > + dev->name, dev->base_addr); > + goto out_err; > + } > + > + /* remap the memory */ > + lp->mapaddr = ioremap_nocache(dev->base_addr, MSP_MAC_SIZE); > + if (!lp->mapaddr) { > + printk(KERN_ERR "MSPETH(probe) %s: unable to " > + "ioremap address 0x%08lx\n", > + dev->name, dev->base_addr); > + goto out_unreserve; > + } > +#endif > + > + /* remap the system reset registers */ > + lp->rstaddr = ioremap_nocache(MSP_RST_BASE, MSP_RST_SIZE); > + if (!lp->rstaddr) { > + printk(KERN_ERR "MSPETH(probe) %s: unable to " > + "ioremap address 0x%08x\n", > + dev->name, MSP_RST_BASE); > + goto out_unmap; > + } > + > + /* set the logical and hardware units */ > + lp->unit = unit; > + lp->hwunit = hwunit; > + > + /* probe for PHYS attached to this MACs MDIO interface */ > + if (mspeth_phyprobe(dev)) > + goto out_unmap; > + > + /* parse the environment and command line */ > + mspeth_init_cmdline(dev); > + mspeth_init_phyaddr(dev); > + > + /* MAC address */ > + dev->addr_len = ETH_ALEN; > + for (i = 0; i < dev->addr_len; i++) > + dev->dev_addr[i] = macaddr[i]; > + > + /* register the /proc entry */ > + snprintf(tmp_str, 128, "pmcmspeth%d", unit); > + create_proc_read_entry(tmp_str, 0644, proc_net, > + mspeth_proc_info, dev); > + > +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)) && \ > + (LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)) > + ether_setup(dev); > +#endif > + /* set the various call back functions */ > + dev->open = mspeth_open; > + dev->stop = mspeth_close; > + dev->tx_timeout = mspeth_tx_timeout; > + dev->watchdog_timeo = TX_TIMEOUT * HZ; > + dev->hard_start_xmit = mspeth_send_packet; > + dev->get_stats = mspeth_get_stats; > + dev->set_multicast_list = mspeth_set_multicast_list; > +#ifdef CONFIG_MSPETH_NAPI > + dev->poll = mspeth_poll; > + dev->weight = NAPI_WEIGHT; > +#endif > + > + /* debugging output */ > + printk(KERN_INFO > + "eth%d: found at physical address %lx, irq %d\n", > + unit, dev->base_addr, dev->irq); > + if (mspeth_debug > 1) { > + printk(KERN_INFO "MSPETH(probe) eth%d: " > + "associated with hardware unit %d\n", > + unit, hwunit); > + printk(KERN_INFO "MSPETH(probe) eth%d: assigned " > + "MAC address %02x:%02x:%02x:%02x:%02x:%02x\n", > + unit, macaddr[0], macaddr[1], macaddr[2], > + macaddr[3], macaddr[4], macaddr[5]); > + printk(KERN_INFO "MSPETH(probe) eth%d: " > + "phytype %c, phyclk %c\n", > + unit, identify_enet(hwunit), > + identify_enetTxD(hwunit)); > + } > + > +#ifdef CONFIG_MSPETH_SKB_RECYCLE > + /* initialize the socket buffer recycle bin */ > + init_skbuff_bin(); > +#endif > + > +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) > + err = register_netdev(dev); > + if (err) { > + printk(KERN_WARNING "MSPETH(probe) eth%d: " > + "unable to register network device\n", unit); > + goto out_unmap; > + } > +#endif > + > + return 0; > + > +out_unmap: > + if (lp->rstaddr) > + iounmap(lp->rstaddr); > + iounmap(lp->mapaddr); > + > +out_unreserve: > +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) > + release_mem_region(res->start, res->end - res->start + 1); > + > +out_netdev: > + free_netdev(dev); > +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) > + release_mem_region(dev->base_addr, MSP_MAC_SIZE); > +#endif > + > +out_err: > + return err; > +} I stopped reviewing here. Will await resend with changes, particularly removal of all kernel back-compat code From sknauert@wesleyan.edu Tue May 8 07:27:41 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 08 May 2007 07:27:44 +0100 (BST) Received: from post2.wesleyan.edu ([129.133.6.128]:49840 "EHLO post2.wesleyan.edu") by ftp.linux-mips.org with ESMTP id S20021567AbXEHG1l (ORCPT ); Tue, 8 May 2007 07:27:41 +0100 Received: from pony1.wesleyan.edu (pony1.wesleyan.edu [129.133.6.192]) by courier2.wesleyan.edu (8.13.6/8.13.6) with ESMTP id l486OQiQ031655 for ; Tue, 8 May 2007 02:24:30 -0400 Received: (from apache@localhost) by pony1.wesleyan.edu (8.12.11.20060308/8.12.11/Submit) id l486OKs2022752; Tue, 8 May 2007 02:24:20 -0400 Received: from 129.133.142.66 (SquirrelMail authenticated user sknauert) by webmail.wesleyan.edu with HTTP; Tue, 8 May 2007 02:24:20 -0400 (EDT) Message-ID: <1978.129.133.142.66.1178605460.squirrel@webmail.wesleyan.edu> Date: Tue, 8 May 2007 02:24:20 -0400 (EDT) Subject: PCI video card on SGI O2 From: sknauert@wesleyan.edu To: linux-mips@linux-mips.org User-Agent: SquirrelMail/1.4.9a MIME-Version: 1.0 Content-Type: text/plain;charset=UTF-8 Content-Transfer-Encoding: 8bit X-Priority: 3 (Normal) Importance: Normal X-Wesleyan-MailScanner-Information: Please contact the ISP for more information X-Wesleyan-MailScanner: Found to be clean X-Originating-IP: 129.133.6.192 X-MailScanner-From: sknauert@wesleyan.edu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14985 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sknauert@wesleyan.edu Precedence: bulk X-list: linux-mips I'm trying to get a PCI video card to work on my O2, currently running Debian Etch (2.6.18). I first thought this was an X.org issue and posted to their mailing list, and was told that Linux-MIPS might lack some necessary support (mainly Legacy PCI Adressing), so I thought I'd roll up my sleves and try to port this. Sadly, I ran into vast amounts of trouble. I sent a couple e-mails to developers asking for some help but got little response. So I thought I would try the main mailing list. My main issues are: 1) Getting a newer kernel to boot on the O2. The 2.6.20 source I get off of linux-mips.org will not boot. I used the same .config and gcc-4.1 as my working 2.6.18. 2) Is legacy addressing even the issue? Compiling in generic VGA framebuffer (or card specific framebuffer support) causes the kernel not to boot. I can give the error from ARCs if desired. Is the issue in the O2 framebuffer code? Is this a limitation of the O2? 3) I tried a Voodoo 1, ATI Mach 64, S3 Virge DX, GX, etc., I actually have a Millenium I but it won't fit in the O2. I mention these since they were listed here http://www.linux-mips.org/wiki/PCI_graphics_cards as potentially working. I'm assuming I need more kernel support? Surprisingly, the character device drivers will compile and boot, and lspci and other tools will recognize the card as a VGA device. I just can't get a console or X to use them. 4) The only Linux port with working legacy addressing is ia64, which uses seemly very different PCI structures than MIPS. Any good documentation on this? Thanks in advance for any help. From betelheise@feelingofgreen.ru Tue May 8 08:00:35 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 08 May 2007 08:00:37 +0100 (BST) Received: from 69-100-st.zelcom.ru ([80.92.100.69]:19723 "EHLO etherstorm.feelingofgreen.ru") by ftp.linux-mips.org with ESMTP id S20021577AbXEHHAf (ORCPT ); Tue, 8 May 2007 08:00:35 +0100 Received: from betelheise.deep.net (betelheise.deep.net [10.128.0.1]) by etherstorm.feelingofgreen.ru (Postfix) with ESMTP id ACDEC2D1BC5; Tue, 8 May 2007 06:59:53 +0400 (MSD) Date: Tue, 08 May 2007 11:00:02 +0400 Message-ID: <876473x0jx.wl@betelheise.deep.net> From: Samium Gromoff <_deepfire@feelingofgreen.ru> To: sknauert@wesleyan.edu Cc: linux-mips@linux-mips.org Subject: Re: PCI video card on SGI O2 In-Reply-To: <1978.129.133.142.66.1178605460.squirrel@webmail.wesleyan.edu> References: <1978.129.133.142.66.1178605460.squirrel@webmail.wesleyan.edu> User-Agent: Wanderlust/2.15.5 (Almost Unreal) SEMI/1.14.6 (Maruoka) FLIM/1.14.8 (=?ISO-8859-4?Q?Shij=F2?=) APEL/10.6 Emacs/23.0.51 (i686-pc-linux-gnu) MULE/5.0 (SAKAKI) X-Face: "P-:w!.&Hdk.h~~pT`!Q%H6;/8Cce^m&%vIn"W-SXb4h88dCgwD\_}N5:\}lowY2gxg0u^wVO*L\$C@MvBDRTmh/=,468w{W{OTc$kfq5O9Y!`pd+N}SMHrN+Gs>jXe5}}EL`cRbc0^_0cZ-}M\b~55I;Qe$1uL8M`M`82<_%CQ(GwLk."M>zBLn:-u>n,$kjH`~Uo[pH`08#\G!GVMd`%7![m9]*w5PMts4@m>=;lX41Z90N MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-Type: text/plain; charset=US-ASCII Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14986 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: _deepfire@feelingofgreen.ru Precedence: bulk X-list: linux-mips At Tue, 8 May 2007 02:24:20 -0400 (EDT), sknauert@wesleyan.edu wrote: [snip] > 3) I tried a Voodoo 1, ATI Mach 64, S3 Virge DX, GX, etc., I actually have > a Millenium I but it won't fit in the O2. Are you sure those have/need not to have proper BIOSen flashed onto them? As i imagine, a videocard with x86 cr^Bode flashed into it is pretty useless, or worse than useless, on anything but x86... regards, Samium, Gromoff From geert@linux-m68k.org Tue May 8 08:22:03 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 08 May 2007 08:22:05 +0100 (BST) Received: from assei1bl6.telenet-ops.be ([195.130.133.68]:44181 "EHLO assei1bl6.telenet-ops.be") by ftp.linux-mips.org with ESMTP id S20021835AbXEHHWD (ORCPT ); Tue, 8 May 2007 08:22:03 +0100 Received: from localhost (localhost.localdomain [127.0.0.1]) by assei1bl6.telenet-ops.be (Postfix) with SMTP id 5B176220097; Tue, 8 May 2007 09:22:03 +0200 (CEST) Received: from anakin.of.borg (d54C15D55.access.telenet.be [84.193.93.85]) by assei1bl6.telenet-ops.be (Postfix) with ESMTP id 31954220087; Tue, 8 May 2007 09:22:03 +0200 (CEST) Received: from anakin.of.borg (geert@localhost [127.0.0.1]) by anakin.of.borg (8.13.8/8.13.8/Debian-3) with ESMTP id l487M29N000918 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 8 May 2007 09:22:02 +0200 Received: from localhost (geert@localhost) by anakin.of.borg (8.13.8/8.13.8/Submit) with ESMTP id l487M26U000915; Tue, 8 May 2007 09:22:02 +0200 X-Authentication-Warning: anakin.of.borg: geert owned process doing -bs Date: Tue, 8 May 2007 09:22:02 +0200 (CEST) From: Geert Uytterhoeven To: Samium Gromoff <_deepfire@feelingofgreen.ru> Cc: sknauert@wesleyan.edu, linux-mips@linux-mips.org Subject: Re: PCI video card on SGI O2 In-Reply-To: <876473x0jx.wl@betelheise.deep.net> Message-ID: References: <1978.129.133.142.66.1178605460.squirrel@webmail.wesleyan.edu> <876473x0jx.wl@betelheise.deep.net> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14987 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: geert@linux-m68k.org Precedence: bulk X-list: linux-mips On Tue, 8 May 2007, Samium Gromoff wrote: > At Tue, 8 May 2007 02:24:20 -0400 (EDT), > sknauert@wesleyan.edu wrote: > [snip] > > 3) I tried a Voodoo 1, ATI Mach 64, S3 Virge DX, GX, etc., I actually have > > a Millenium I but it won't fit in the O2. > > Are you sure those have/need not to have proper BIOSen flashed onto them? > > As i imagine, a videocard with x86 cr^Bode flashed into it is pretty useless, > or worse than useless, on anything but x86... You can run the x86 emulator to execute the BIOS code. IIRC, (some version of) the X server has such an emulator included. But that indeeds need `legacy I/O port' access to work. It's a pity the Millenium doesn't fit, as matroxfb is about the only frame buffer device that can initialize a graphics card from scratch, without help from the BIOS... Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds From anemo@mba.ocn.ne.jp Tue May 8 08:51:17 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 08 May 2007 08:51:18 +0100 (BST) Received: from topsns2.toshiba-tops.co.jp ([202.230.225.126]:58991 "EHLO topsns2.toshiba-tops.co.jp") by ftp.linux-mips.org with ESMTP id S20021972AbXEHHvR (ORCPT ); Tue, 8 May 2007 08:51:17 +0100 Received: from topsms.toshiba-tops.co.jp by topsns2.toshiba-tops.co.jp via smtpd (for ftp.linux-mips.org [194.74.144.162]) with ESMTP; Tue, 8 May 2007 16:51:15 +0900 Received: from topsms.toshiba-tops.co.jp (localhost.localdomain [127.0.0.1]) by localhost.toshiba-tops.co.jp (Postfix) with ESMTP id 60F174209F; Tue, 8 May 2007 16:50:49 +0900 (JST) Received: from srd2sd.toshiba-tops.co.jp (srd2sd.toshiba-tops.co.jp [172.17.28.2]) by topsms.toshiba-tops.co.jp (Postfix) with ESMTP id 5539B204C3; Tue, 8 May 2007 16:50:49 +0900 (JST) Received: from localhost (fragile [172.17.28.65]) by srd2sd.toshiba-tops.co.jp (8.12.10/8.12.10) with ESMTP id l487omW0072627; Tue, 8 May 2007 16:50:48 +0900 (JST) (envelope-from anemo@mba.ocn.ne.jp) Date: Tue, 08 May 2007 16:50:48 +0900 (JST) Message-Id: <20070508.165048.96687706.nemoto@toshiba-tops.co.jp> To: sknauert@wesleyan.edu Cc: linux-mips@linux-mips.org Subject: Re: PCI video card on SGI O2 From: Atsushi Nemoto In-Reply-To: <1978.129.133.142.66.1178605460.squirrel@webmail.wesleyan.edu> References: <1978.129.133.142.66.1178605460.squirrel@webmail.wesleyan.edu> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14988 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Tue, 8 May 2007 02:24:20 -0400 (EDT), sknauert@wesleyan.edu wrote: > 3) I tried a Voodoo 1, ATI Mach 64, S3 Virge DX, GX, etc., I actually have > a Millenium I but it won't fit in the O2. I mention these since they were > listed here http://www.linux-mips.org/wiki/PCI_graphics_cards as > potentially working. I'm assuming I need more kernel support? IIRC, patch for ATI Rage XL without BIOS was floating around a while ago (kernel 2.4 era?), but never merged to mainline in good shape. And the halfway codes are removed at kernel 2.6.16. commit cb639258f92b2407c50f79a95364f42932481389 Author: Antonino A. Daplas Date: Mon Jan 9 20:53:13 2006 -0800 [PATCH] fbdev: atyfb: Remove BIOS-less booting CONFIG_ATYFB_XL_INIT option is broken for a long time. It will always cause a kernel hang. Since no one has fixed this problem for some time now, remove it from atyfb. --- Atsushi Nemoto From alan@lxorguk.ukuu.org.uk Tue May 8 12:22:51 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 08 May 2007 12:22:53 +0100 (BST) Received: from outpipe-village-512-1.bc.nu ([81.2.110.250]:2998 "EHLO the-village.bc.nu") by ftp.linux-mips.org with ESMTP id S20022083AbXEHLWv (ORCPT ); Tue, 8 May 2007 12:22:51 +0100 Received: from the-village.bc.nu (localhost.localdomain [127.0.0.1]) by the-village.bc.nu (8.13.8/8.13.8) with ESMTP id l48BR07K022693; Tue, 8 May 2007 12:27:00 +0100 Date: Tue, 8 May 2007 12:27:00 +0100 From: Alan Cox To: sknauert@wesleyan.edu Cc: linux-mips@linux-mips.org Subject: Re: PCI video card on SGI O2 Message-ID: <20070508122700.262caec4@the-village.bc.nu> In-Reply-To: <1978.129.133.142.66.1178605460.squirrel@webmail.wesleyan.edu> References: <1978.129.133.142.66.1178605460.squirrel@webmail.wesleyan.edu> X-Mailer: Claws Mail 2.9.1 (GTK+ 2.10.8; i386-redhat-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14989 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: alan@lxorguk.ukuu.org.uk Precedence: bulk X-list: linux-mips > 3) I tried a Voodoo 1, ATI Mach 64, S3 Virge DX, GX, etc., I actually have > a Millenium I but it won't fit in the O2. I mention these since they were > listed here http://www.linux-mips.org/wiki/PCI_graphics_cards as > potentially working. I'm assuming I need more kernel support? > Surprisingly, the character device drivers will compile and boot, and > lspci and other tools will recognize the card as a VGA device. I just > can't get a console or X to use them. The voodoo1 and voodoo2 should work - they are not VGA devices and don't have any compatibility vga gunk on them at all. You will need the voodoo frame buffer and/or X server driver, neither of which needs BIOS support. There is no 3D support on them as I could never be bothered to write the 3D engine bootstrap code. Alan From attila@kinali.ch Tue May 8 13:05:47 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 08 May 2007 13:05:49 +0100 (BST) Received: from mail.blastwave.org ([147.87.98.10]:48599 "EHLO mail.blastwave.org") by ftp.linux-mips.org with ESMTP id S20022149AbXEHMFr (ORCPT ); Tue, 8 May 2007 13:05:47 +0100 Received: from localhost (localhost [127.0.0.1]) by mail.blastwave.org (Postfix) with ESMTP id 47746F92E; Tue, 8 May 2007 14:05:17 +0200 (MEST) X-Virus-Scanned: amavisd-new at blastwave.org Received: from mail.blastwave.org ([127.0.0.1]) by localhost (enterprise.blastwave.org [127.0.0.1]) (amavisd-new, port 10024) with LMTP id 3YWILGIhbQ9p; Tue, 8 May 2007 14:05:14 +0200 (MEST) Received: from aki.intern.liechtiag.ch (66-132.63-81.stat.fixnetdata.ch [81.63.132.66]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.blastwave.org (Postfix) with ESMTP id 2290EF8F7; Tue, 8 May 2007 14:04:58 +0200 (MEST) Date: Tue, 8 May 2007 14:04:57 +0200 From: Attila Kinali To: Geert Uytterhoeven Cc: Samium Gromoff <_deepfire@feelingofgreen.ru>, sknauert@wesleyan.edu, linux-mips@linux-mips.org Subject: Re: PCI video card on SGI O2 Message-Id: <20070508140457.13458d63.attila@kinali.ch> In-Reply-To: References: <1978.129.133.142.66.1178605460.squirrel@webmail.wesleyan.edu> <876473x0jx.wl@betelheise.deep.net> Organization: SEELE X-Mailer: Sylpheed 2.4.0rc (GTK+ 2.8.20; i686-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14990 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: attila@kinali.ch Precedence: bulk X-list: linux-mips On Tue, 8 May 2007 09:22:02 +0200 (CEST) Geert Uytterhoeven wrote: > It's a pity the Millenium doesn't fit, as matroxfb is about the only > frame buffer device that can initialize a graphics card from scratch, > without help from the BIOS... Why does the Millenium not fit? I'm asking because OGP might be a good replacement card for such systems (when it will be finished). And if the Millenium has some problems working in such systems, we could try not to do the same mistake with OGP. Attila Kinali -- Praised are the Fountains of Shelieth, the silver harp of the waters, But blest in my name forever this stream that stanched my thirst! -- Deed of Morred From claus.herrmann@cybits.de Tue May 8 16:03:23 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 08 May 2007 16:03:25 +0100 (BST) Received: from mail.cybits.de ([213.139.144.204]:34861 "EHLO mail.cybits.de") by ftp.linux-mips.org with ESMTP id S20022229AbXEHPDX (ORCPT ); Tue, 8 May 2007 16:03:23 +0100 Received: from localhost (unknown [127.0.0.1]) by mail.cybits.de (Postfix) with ESMTP id 482A12D6BB3 for ; Tue, 8 May 2007 15:04:52 +0000 (UTC) X-Virus-Scanned: amavisd-new at cybits.de Received: from mail.cybits.de ([127.0.0.1]) by localhost (mail.cybits.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 3OGHEAE9tB5q for ; Tue, 8 May 2007 17:04:51 +0200 (CEST) Received: from [192.168.1.177] (unknown [192.168.1.177]) by mail.cybits.de (Postfix) with ESMTP id 535942D6BB0 for ; Tue, 8 May 2007 17:04:51 +0200 (CEST) Message-ID: <4640911A.4080801@cybits.de> Date: Tue, 08 May 2007 17:02:50 +0200 From: Claus Herrmann User-Agent: Mozilla Thunderbird 1.0.7 (Windows/20050923) X-Accept-Language: de-DE, de, en-us, en MIME-Version: 1.0 To: linux-mips@linux-mips.org Subject: Building a cross kernel for the IP27/Origin System Content-Type: text/plain; charset=ISO-8859-15; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14991 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: claus.herrmann@cybits.de Precedence: bulk X-list: linux-mips Hi, ich have a question regarding the crosscompiling for an Origin 2000. First of all i get this warning: include/linux/mmzone.h:553:1: warning: "NODE_DATA" redefined In file included from include/asm/mmzone.h:9, from include/asm-mips/mach-ip27/topology.h:5, from include/asm/topology.h:1, from include/linux/topology.h:34, from include/linux/mmzone.h:544, from include/linux/gfp.h:4, from include/linux/slab.h:14, from include/linux/percpu.h:5, from include/linux/rcupdate.h:41, from include/linux/pid.h:4, from include/linux/sched.h:72, from arch/mips/kernel/asm-offsets.c:13: include/asm-mips/mach-ip27/mmzone.h:33:1: warning: this is the location of the previous definition I fixed it by doing a #define and a #ifndef around the golbal NODE_DATA. Now it compiles smoothly, but in the end I get this: mips-linux-ld: Dwarf Error: found dwarf version '0', this reader only handles version 2 information. mips-linux-ld: Dwarf Error: found dwarf version '0', this reader only handles version 2 information. mips-linux-ld: Dwarf Error: found dwarf version '365', this reader only handles version 2 information. mips-linux-ld: Dwarf Error: found dwarf version '22528', this reader only handles version 2 information. arch/mips/mm/built-in.o: In function `mem_init': : multiple definition of `mem_init' mips-linux-ld: Dwarf Error: found dwarf version '0', this reader only handles version 2 information. mips-linux-ld: Dwarf Error: found dwarf version '8704', this reader only handles version 2 information. arch/mips/sgi-ip27/built-in.o:: first defined here arch/mips/mm/built-in.o: In function `paging_init': : multiple definition of `paging_init' arch/mips/sgi-ip27/built-in.o:: first defined here make: *** [.tmp_vmlinux1] Fehler 1 Any suggestions what i am doing wrong? The toolchan i use is the one from MIPS SDE UK. I tried to build my own Toolchain, but the same error occur. Brgds Claus From yoichi_yuasa@tripeaks.co.jp Tue May 8 16:04:27 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 08 May 2007 16:04:30 +0100 (BST) Received: from mo30.po.2iij.NET ([210.128.50.53]:8763 "EHLO mo30.po.2iij.net") by ftp.linux-mips.org with ESMTP id S20022233AbXEHPE1 (ORCPT ); Tue, 8 May 2007 16:04:27 +0100 Received: by mo.po.2iij.net (mo30) id l48F36eU004444; Wed, 9 May 2007 00:03:06 +0900 (JST) Received: from localhost.localdomain (70.27.30.125.dy.iij4u.or.jp [125.30.27.70]) by mbox.po.2iij.net (mbox31) id l48F34L5031141 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Wed, 9 May 2007 00:03:05 +0900 (JST) Date: Wed, 9 May 2007 00:03:02 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: yoichi_yuasa@tripeaks.co.jp, linux-mips , linux-serial@vger.kernel.org Subject: [PATCH][MIPS] separate platform_device registration for VR41xx serial interface Message-Id: <20070509000302.21879fa9.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.6 (GTK+ 1.2.10; i486-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14992 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has separated platform_device registration for VR41xx serial interface. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X siu/Documentation/dontdiff siu-orig/arch/mips/vr41xx/common/Makefile siu/arch/mips/vr41xx/common/Makefile --- siu-orig/arch/mips/vr41xx/common/Makefile 2007-05-08 16:54:57.796693000 +0900 +++ siu/arch/mips/vr41xx/common/Makefile 2007-05-08 18:39:19.640910500 +0900 @@ -2,4 +2,4 @@ # Makefile for common code of the NEC VR4100 series. # -obj-y += bcu.o cmu.o icu.o init.o irq.o pmu.o type.o +obj-y += bcu.o cmu.o icu.o init.o irq.o pmu.o siu.o type.o diff -pruN -X siu/Documentation/dontdiff siu-orig/arch/mips/vr41xx/common/siu.c siu/arch/mips/vr41xx/common/siu.c --- siu-orig/arch/mips/vr41xx/common/siu.c 1970-01-01 09:00:00.000000000 +0900 +++ siu/arch/mips/vr41xx/common/siu.c 2007-05-08 23:48:32.000598250 +0900 @@ -0,0 +1,120 @@ +/* + * NEC VR4100 series SIU platform device. + * + * Copyright (C) 2007 Yoichi Yuasa + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + */ +#include +#include +#include +#include +#include + +#include +#include + +static unsigned int siu_type1_ports[SIU_PORTS_MAX] __initdata = { + PORT_VR41XX_SIU, + PORT_UNKNOWN, +}; + +static struct resource siu_type1_resource[] __initdata = { + { + .start = 0x0c000000, + .end = 0x0c00000a, + .flags = IORESOURCE_MEM, + }, + { + .start = SIU_IRQ, + .end = SIU_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static unsigned int siu_type2_ports[SIU_PORTS_MAX] __initdata = { + PORT_VR41XX_SIU, + PORT_VR41XX_DSIU, +}; + +static struct resource siu_type2_resource[] __initdata = { + { + .start = 0x0f000800, + .end = 0x0f00080a, + .flags = IORESOURCE_MEM, + }, + { + .start = 0x0f000820, + .end = 0x0f000829, + .flags = IORESOURCE_MEM, + }, + { + .start = SIU_IRQ, + .end = SIU_IRQ, + .flags = IORESOURCE_IRQ, + }, + { + .start = DSIU_IRQ, + .end = DSIU_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static int __init vr41xx_siu_add(void) +{ + struct platform_device *pdev; + struct resource *res; + unsigned int num; + int retval; + + pdev = platform_device_alloc("SIU", -1); + if (!pdev) + return -ENOMEM; + + switch (current_cpu_data.cputype) { + case CPU_VR4111: + case CPU_VR4121: + pdev->dev.platform_data = siu_type1_ports; + res = siu_type1_resource; + num = ARRAY_SIZE(siu_type1_resource); + break; + case CPU_VR4122: + case CPU_VR4131: + case CPU_VR4133: + pdev->dev.platform_data = siu_type2_ports; + res = siu_type2_resource; + num = ARRAY_SIZE(siu_type2_resource); + break; + default: + retval = -ENODEV; + goto err_free_device; + } + + retval = platform_device_add_resources(pdev, res, num); + if (retval) + goto err_free_device; + + retval = platform_device_add(pdev); + if (retval) + goto err_free_device; + + return 0; + +err_free_device: + platform_device_put(pdev); + + return retval; +} +device_initcall(vr41xx_siu_add); diff -pruN -X siu/Documentation/dontdiff siu-orig/drivers/serial/vr41xx_siu.c siu/drivers/serial/vr41xx_siu.c --- siu-orig/drivers/serial/vr41xx_siu.c 2007-05-08 16:56:25.746189500 +0900 +++ siu/drivers/serial/vr41xx_siu.c 2007-05-08 19:25:01.199921000 +0900 @@ -1,7 +1,7 @@ /* * Driver for NEC VR4100 series Serial Interface Unit. * - * Copyright (C) 2004-2005 Yoichi Yuasa + * Copyright (C) 2004-2007 Yoichi Yuasa * * Based on drivers/serial/8250.c, by Russell King. * @@ -25,12 +25,12 @@ #endif #include -#include -#include -#include +#include #include #include +#include #include +#include #include #include #include @@ -38,11 +38,9 @@ #include #include -#include #include #include -#define SIU_PORTS_MAX 2 #define SIU_BAUD_BASE 1152000 #define SIU_MAJOR 204 #define SIU_MINOR_BASE 82 @@ -60,32 +58,13 @@ #define IRUSESEL 0x02 #define SIRSEL 0x01 -struct siu_port { - unsigned int type; - unsigned int irq; - unsigned long start; -}; - -static const struct siu_port siu_type1_ports[] = { - { .type = PORT_VR41XX_SIU, - .irq = SIU_IRQ, - .start = 0x0c000000UL, }, -}; - -#define SIU_TYPE1_NR_PORTS (sizeof(siu_type1_ports) / sizeof(struct siu_port)) - -static const struct siu_port siu_type2_ports[] = { - { .type = PORT_VR41XX_SIU, - .irq = SIU_IRQ, - .start = 0x0f000800UL, }, - { .type = PORT_VR41XX_DSIU, - .irq = DSIU_IRQ, - .start = 0x0f000820UL, }, +static struct uart_port siu_uart_ports[SIU_PORTS_MAX] = { + [0 ... SIU_PORTS_MAX-1] = { + .lock = __SPIN_LOCK_UNLOCKED(siu_uart_ports->lock), + .irq = -1, + }, }; -#define SIU_TYPE2_NR_PORTS (sizeof(siu_type2_ports) / sizeof(struct siu_port)) - -static struct uart_port siu_uart_ports[SIU_PORTS_MAX]; static uint8_t lsr_break_flag[SIU_PORTS_MAX]; #define siu_read(port, offset) readb((port)->membase + (offset)) @@ -110,7 +89,6 @@ void vr41xx_select_siu_interface(siu_int spin_unlock_irqrestore(&port->lock, flags); } - EXPORT_SYMBOL_GPL(vr41xx_select_siu_interface); void vr41xx_use_irda(irda_use_t use) @@ -132,7 +110,6 @@ void vr41xx_use_irda(irda_use_t use) spin_unlock_irqrestore(&port->lock, flags); } - EXPORT_SYMBOL_GPL(vr41xx_use_irda); void vr41xx_select_irda_module(irda_module_t module, irda_speed_t speed) @@ -166,7 +143,6 @@ void vr41xx_select_irda_module(irda_modu spin_unlock_irqrestore(&port->lock, flags); } - EXPORT_SYMBOL_GPL(vr41xx_select_irda_module); static inline void siu_clear_fifo(struct uart_port *port) @@ -177,21 +153,6 @@ static inline void siu_clear_fifo(struct siu_write(port, UART_FCR, 0); } -static inline int siu_probe_ports(void) -{ - switch (current_cpu_data.cputype) { - case CPU_VR4111: - case CPU_VR4121: - return SIU_TYPE1_NR_PORTS; - case CPU_VR4122: - case CPU_VR4131: - case CPU_VR4133: - return SIU_TYPE2_NR_PORTS; - } - - return 0; -} - static inline unsigned long siu_port_size(struct uart_port *port) { switch (port->type) { @@ -206,21 +167,10 @@ static inline unsigned long siu_port_siz static inline unsigned int siu_check_type(struct uart_port *port) { - switch (current_cpu_data.cputype) { - case CPU_VR4111: - case CPU_VR4121: - if (port->line == 0) - return PORT_VR41XX_SIU; - break; - case CPU_VR4122: - case CPU_VR4131: - case CPU_VR4133: - if (port->line == 0) - return PORT_VR41XX_SIU; - else if (port->line == 1) - return PORT_VR41XX_DSIU; - break; - } + if (port->line == 0) + return PORT_VR41XX_SIU; + if (port->line == 1 && port->irq != -1) + return PORT_VR41XX_DSIU; return PORT_UNKNOWN; } @@ -751,44 +701,34 @@ static struct uart_ops siu_uart_ops = { .verify_port = siu_verify_port, }; -static int siu_init_ports(void) +static int siu_init_ports(struct platform_device *pdev) { - const struct siu_port *siu; struct uart_port *port; - int i, num; + struct resource *res; + int *type = pdev->dev.platform_data; + int i; - switch (current_cpu_data.cputype) { - case CPU_VR4111: - case CPU_VR4121: - siu = siu_type1_ports; - break; - case CPU_VR4122: - case CPU_VR4131: - case CPU_VR4133: - siu = siu_type2_ports; - break; - default: + if (!type) return 0; - } port = siu_uart_ports; - num = siu_probe_ports(); - for (i = 0; i < num; i++) { - spin_lock_init(&port->lock); - port->irq = siu->irq; + for (i = 0; i < SIU_PORTS_MAX; i++) { + port->type = type[i]; + if (port->type == PORT_UNKNOWN) + continue; + port->irq = platform_get_irq(pdev, i); port->uartclk = SIU_BAUD_BASE * 16; port->fifosize = 16; port->regshift = 0; port->iotype = UPIO_MEM; port->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF; - port->type = siu->type; port->line = i; - port->mapbase = siu->start; - siu++; + res = platform_get_resource(pdev, IORESOURCE_MEM, i); + port->mapbase = res->start; port++; } - return num; + return i; } #ifdef CONFIG_SERIAL_VR41XX_CONSOLE @@ -883,13 +823,9 @@ static struct console siu_console = { static int __devinit siu_console_init(void) { struct uart_port *port; - int num, i; - - num = siu_init_ports(); - if (num <= 0) - return -ENODEV; + int i; - for (i = 0; i < num; i++) { + for (i = 0; i < SIU_PORTS_MAX; i++) { port = &siu_uart_ports[i]; port->ops = &siu_uart_ops; } @@ -920,7 +856,7 @@ static int __devinit siu_probe(struct pl struct uart_port *port; int num, i, retval; - num = siu_init_ports(); + num = siu_init_ports(dev); if (num <= 0) return -ENODEV; @@ -998,8 +934,6 @@ static int siu_resume(struct platform_de return 0; } -static struct platform_device *siu_platform_device; - static struct platform_driver siu_device_driver = { .probe = siu_probe, .remove = __devexit_p(siu_remove), @@ -1013,29 +947,12 @@ static struct platform_driver siu_device static int __init vr41xx_siu_init(void) { - int retval; - - siu_platform_device = platform_device_alloc("SIU", -1); - if (!siu_platform_device) - return -ENOMEM; - - retval = platform_device_add(siu_platform_device); - if (retval < 0) { - platform_device_put(siu_platform_device); - return retval; - } - - retval = platform_driver_register(&siu_device_driver); - if (retval < 0) - platform_device_unregister(siu_platform_device); - - return retval; + return platform_driver_register(&siu_device_driver); } static void __exit vr41xx_siu_exit(void) { platform_driver_unregister(&siu_device_driver); - platform_device_unregister(siu_platform_device); } module_init(vr41xx_siu_init); diff -pruN -X siu/Documentation/dontdiff siu-orig/include/asm-mips/vr41xx/siu.h siu/include/asm-mips/vr41xx/siu.h --- siu-orig/include/asm-mips/vr41xx/siu.h 2007-05-08 16:57:23.021769000 +0900 +++ siu/include/asm-mips/vr41xx/siu.h 2007-05-08 16:54:45.507925000 +0900 @@ -20,6 +20,8 @@ #ifndef __NEC_VR41XX_SIU_H #define __NEC_VR41XX_SIU_H +#define SIU_PORTS_MAX 2 + typedef enum { SIU_INTERFACE_RS232C, SIU_INTERFACE_IRDA, From sknauert@wesleyan.edu Tue May 8 16:05:23 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 08 May 2007 16:05:25 +0100 (BST) Received: from post2.wesleyan.edu ([129.133.6.128]:50898 "EHLO post2.wesleyan.edu") by ftp.linux-mips.org with ESMTP id S20022226AbXEHPFX (ORCPT ); Tue, 8 May 2007 16:05:23 +0100 Received: from pony1.wesleyan.edu (pony1.wesleyan.edu [129.133.6.192]) by courier2.wesleyan.edu (8.13.6/8.13.6) with ESMTP id l48F26Ks000364 for ; Tue, 8 May 2007 11:02:07 -0400 Received: (from apache@localhost) by pony1.wesleyan.edu (8.12.11.20060308/8.12.11/Submit) id l48F261g025322; Tue, 8 May 2007 11:02:06 -0400 Received: from 129.133.92.31 (SquirrelMail authenticated user sknauert) by webmail.wesleyan.edu with HTTP; Tue, 8 May 2007 11:02:06 -0400 (EDT) Message-ID: <38827.129.133.92.31.1178636526.squirrel@webmail.wesleyan.edu> In-Reply-To: <20070508140457.13458d63.attila@kinali.ch> References: <1978.129.133.142.66.1178605460.squirrel@webmail.wesleyan.edu> <876473x0jx.wl@betelheise.deep.net> <20070508140457.13458d63.attila@kinali.ch> Date: Tue, 8 May 2007 11:02:06 -0400 (EDT) Subject: Re: PCI video card on SGI O2 From: sknauert@wesleyan.edu To: linux-mips@linux-mips.org User-Agent: SquirrelMail/1.4.9a MIME-Version: 1.0 Content-Type: text/plain;charset=UTF-8 Content-Transfer-Encoding: 8bit X-Priority: 3 (Normal) Importance: Normal X-Wesleyan-MailScanner-Information: Please contact the ISP for more information X-Wesleyan-MailScanner: Found to be clean X-Originating-IP: 129.133.6.192 X-MailScanner-From: sknauert@wesleyan.edu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14993 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sknauert@wesleyan.edu Precedence: bulk X-list: linux-mips > On Tue, 8 May 2007 09:22:02 +0200 (CEST) > Geert Uytterhoeven wrote: > >> It's a pity the Millenium doesn't fit, as matroxfb is about the only >> frame buffer device that can initialize a graphics card from scratch, >> without help from the BIOS... > > Why does the Millenium not fit? > I'm asking because OGP might be a good replacement > card for such systems (when it will be finished). > And if the Millenium has some problems working in such > systems, we could try not to do the same mistake with OGP. > > Attila Kinali > -- > Praised are the Fountains of Shelieth, the silver harp of the waters, > But blest in my name forever this stream that stanched my thirst! > -- Deed of Morred > > Wow, so many responses... I'll try to answer everyone. The O2, has a PCI cage on a daughter card which is 6.875" deep. A 64-bit PCI card with no overhang will just barely fit. You can see images of the PCI cage here: http://hardware.majix.org/computers/sgi.o2/images/o2.18.big.jpg http://hardware.majix.org/computers/sgi.o2/images/o2.26.big.jpg The Millenium I that I have does not fit, physically. It is 7.5" deep. I already removed the metal cage (only using the daughter board), but the end of the metal cage butts up against the metal housing, so while I might be able to fit a 7.25" PCI card this way (though it would be unsupported and this might not be the best idea) 7.5" is just too big. For example, I have a 3ware Escalade 8500 which is 7" deep and does not fit. It would fit without the metal cage (I only mention since its a PCI 64-bit card I have handy, I know putting an SATA RAID card into an O2 would be silly). If the Open Graphics Project (assuming this is the OGP you refer to) board does not have overhang, i.e. it is just the size of a 32 or even 64 bit PCI slot, it will fit the O2 just fine. From sknauert@wesleyan.edu Tue May 8 16:19:40 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 08 May 2007 16:19:43 +0100 (BST) Received: from post2.wesleyan.edu ([129.133.6.128]:39380 "EHLO post2.wesleyan.edu") by ftp.linux-mips.org with ESMTP id S20022229AbXEHPTk (ORCPT ); Tue, 8 May 2007 16:19:40 +0100 Received: from pony1.wesleyan.edu (pony1.wesleyan.edu [129.133.6.192]) by courier2.wesleyan.edu (8.13.6/8.13.6) with ESMTP id l48FGOtI002450 for ; Tue, 8 May 2007 11:16:24 -0400 Received: (from apache@localhost) by pony1.wesleyan.edu (8.12.11.20060308/8.12.11/Submit) id l48FGNac028599; Tue, 8 May 2007 11:16:23 -0400 Received: from 129.133.92.31 (SquirrelMail authenticated user sknauert) by webmail.wesleyan.edu with HTTP; Tue, 8 May 2007 11:16:23 -0400 (EDT) Message-ID: <55699.129.133.92.31.1178637383.squirrel@webmail.wesleyan.edu> In-Reply-To: <20070508122700.262caec4@the-village.bc.nu> References: <1978.129.133.142.66.1178605460.squirrel@webmail.wesleyan.edu> <20070508122700.262caec4@the-village.bc.nu> Date: Tue, 8 May 2007 11:16:23 -0400 (EDT) Subject: Re: PCI video card on SGI O2 From: sknauert@wesleyan.edu To: linux-mips@linux-mips.org User-Agent: SquirrelMail/1.4.9a MIME-Version: 1.0 Content-Type: text/plain;charset=UTF-8 Content-Transfer-Encoding: 8bit X-Priority: 3 (Normal) Importance: Normal X-Wesleyan-MailScanner-Information: Please contact the ISP for more information X-Wesleyan-MailScanner: Found to be clean X-Originating-IP: 129.133.6.192 X-MailScanner-From: sknauert@wesleyan.edu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14994 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sknauert@wesleyan.edu Precedence: bulk X-list: linux-mips >> 3) I tried a Voodoo 1, ATI Mach 64, S3 Virge DX, GX, etc., I actually >> have >> a Millenium I but it won't fit in the O2. I mention these since they >> were >> listed here http://www.linux-mips.org/wiki/PCI_graphics_cards as >> potentially working. I'm assuming I need more kernel support? >> Surprisingly, the character device drivers will compile and boot, and >> lspci and other tools will recognize the card as a VGA device. I just >> can't get a console or X to use them. > > The voodoo1 and voodoo2 should work - they are not VGA devices and don't > have any compatibility vga gunk on them at all. You will need the voodoo > frame buffer and/or X server driver, neither of which needs BIOS support. > There is no 3D support on them as I could never be bothered to write the > 3D engine bootstrap code. > > Alan > > I agree the Voodoo 1 should work. The issue here is that I can compile in tdfx character support for the kernel and still have it boot, but can't boot with tdfx framebuffer support on the O2 for some reason. With just character support lspci IDs the card 00:03.0 PCI VGA compatible controller: ... However, trying to start X.org gives the following errors: (EE) TDFX(0): V_BIOS address 0x0 out of range (EE) end of block range 0x1ffffef < begin 0xfffffff0 (EE) end of block range 0xfef < begin 0xffffff0 From alan@lxorguk.ukuu.org.uk Tue May 8 16:28:01 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 08 May 2007 16:28:02 +0100 (BST) Received: from outpipe-village-512-1.bc.nu ([81.2.110.250]:7379 "EHLO the-village.bc.nu") by ftp.linux-mips.org with ESMTP id S20022234AbXEHP2B (ORCPT ); Tue, 8 May 2007 16:28:01 +0100 Received: from the-village.bc.nu (localhost.localdomain [127.0.0.1]) by the-village.bc.nu (8.13.8/8.13.8) with ESMTP id l48FUB8a023313; Tue, 8 May 2007 16:30:11 +0100 Date: Tue, 8 May 2007 16:30:10 +0100 From: Alan Cox To: sknauert@wesleyan.edu Cc: linux-mips@linux-mips.org Subject: Re: PCI video card on SGI O2 Message-ID: <20070508163010.1d2dd724@the-village.bc.nu> In-Reply-To: <55699.129.133.92.31.1178637383.squirrel@webmail.wesleyan.edu> References: <1978.129.133.142.66.1178605460.squirrel@webmail.wesleyan.edu> <20070508122700.262caec4@the-village.bc.nu> <55699.129.133.92.31.1178637383.squirrel@webmail.wesleyan.edu> X-Mailer: Claws Mail 2.9.1 (GTK+ 2.10.8; i386-redhat-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14995 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: alan@lxorguk.ukuu.org.uk Precedence: bulk X-list: linux-mips > I agree the Voodoo 1 should work. The issue here is that I can compile in > tdfx character support for the kernel and still have it boot, but can't > boot with tdfx framebuffer support on the O2 for some reason. With just > character support lspci IDs the card > > 00:03.0 PCI VGA compatible controller: ... That isn't a Voodoo 1 if it reports PCI VGA compatible controller. What PCI ident values does it show. Also the tdfx framebuffer is for the later chips not the Voodoo1 or Voodoo2 - they use sstfb. It looks like your card is something else - a Banshee or Rush perhaps ? From sknauert@wesleyan.edu Tue May 8 16:32:23 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 08 May 2007 16:32:28 +0100 (BST) Received: from post2.wesleyan.edu ([129.133.6.128]:40150 "EHLO post2.wesleyan.edu") by ftp.linux-mips.org with ESMTP id S20021952AbXEHPcX (ORCPT ); Tue, 8 May 2007 16:32:23 +0100 Received: from pony1.wesleyan.edu (pony1.wesleyan.edu [129.133.6.192]) by courier2.wesleyan.edu (8.13.6/8.13.6) with ESMTP id l48FWCr5004424 for ; Tue, 8 May 2007 11:32:12 -0400 Received: (from apache@localhost) by pony1.wesleyan.edu (8.12.11.20060308/8.12.11/Submit) id l48FWCf6000304; Tue, 8 May 2007 11:32:12 -0400 Received: from 129.133.92.31 (SquirrelMail authenticated user sknauert) by webmail.wesleyan.edu with HTTP; Tue, 8 May 2007 11:32:12 -0400 (EDT) Message-ID: <55716.129.133.92.31.1178638332.squirrel@webmail.wesleyan.edu> In-Reply-To: References: <1978.129.133.142.66.1178605460.squirrel@webmail.wesleyan.edu> <876473x0jx.wl@betelheise.deep.net> Date: Tue, 8 May 2007 11:32:12 -0400 (EDT) Subject: Re: PCI video card on SGI O2 From: sknauert@wesleyan.edu To: linux-mips@linux-mips.org User-Agent: SquirrelMail/1.4.9a MIME-Version: 1.0 Content-Type: text/plain;charset=UTF-8 Content-Transfer-Encoding: 8bit X-Priority: 3 (Normal) Importance: Normal X-Wesleyan-MailScanner-Information: Please contact the ISP for more information X-Wesleyan-MailScanner: Found to be clean X-Originating-IP: 129.133.6.192 X-MailScanner-From: sknauert@wesleyan.edu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14996 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sknauert@wesleyan.edu Precedence: bulk X-list: linux-mips > On Tue, 8 May 2007, Samium Gromoff wrote: >> At Tue, 8 May 2007 02:24:20 -0400 (EDT), >> sknauert@wesleyan.edu wrote: >> [snip] >> > 3) I tried a Voodoo 1, ATI Mach 64, S3 Virge DX, GX, etc., I actually >> have >> > a Millenium I but it won't fit in the O2. >> >> Are you sure those have/need not to have proper BIOSen flashed onto >> them? >> >> As i imagine, a videocard with x86 cr^Bode flashed into it is pretty >> useless, >> or worse than useless, on anything but x86... > > You can run the x86 emulator to execute the BIOS code. IIRC, (some version > of) > the X server has such an emulator included. But that indeeds need `legacy > I/O > port' access to work. > > It's a pity the Millenium doesn't fit, as matroxfb is about the only > frame buffer device that can initialize a graphics card from scratch, > without help from the BIOS... > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- > geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. > But > when I'm talking to journalists I just say "programmer" or something like > that. > -- Linus Torvalds > X.org should have the x86 emulation, it's called Int10 and I have enabled it. However, I get the following errors: (EE) end of block range 0x1ffffef < begin 0xfffffff0 (EE) end of block range 0xfef < begin 0xffffff0 with all my cards when I try to use it. These are repeated many times, I can provide full error logs if anybody wants. My guess is this is indicating I'm lacking proper support for the emulation to work correctly, whether this is framebuffer support or purely legacy addressing. From sknauert@wesleyan.edu Tue May 8 17:02:15 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 08 May 2007 17:02:17 +0100 (BST) Received: from post2.wesleyan.edu ([129.133.6.128]:1755 "EHLO post2.wesleyan.edu") by ftp.linux-mips.org with ESMTP id S20021952AbXEHQCP (ORCPT ); Tue, 8 May 2007 17:02:15 +0100 Received: from pony2.wesleyan.edu (pony2.wesleyan.edu [129.133.6.193]) by courier2.wesleyan.edu (8.13.6/8.13.6) with ESMTP id l48FwvSj007902 for ; Tue, 8 May 2007 11:58:57 -0400 Received: from pony2.wesleyan.edu (pony2.wesleyan.edu [127.0.0.1]) by pony2.wesleyan.edu (8.12.11.20060308/8.12.11) with ESMTP id l48FwvSF005963 for ; Tue, 8 May 2007 11:58:57 -0400 Received: (from apache@localhost) by pony2.wesleyan.edu (8.12.11.20060308/8.12.11/Submit) id l48FwvxP005961; Tue, 8 May 2007 11:58:57 -0400 Received: from 129.133.92.31 (SquirrelMail authenticated user sknauert) by webmail.wesleyan.edu with HTTP; Tue, 8 May 2007 11:58:57 -0400 (EDT) Message-ID: <44952.129.133.92.31.1178639937.squirrel@webmail.wesleyan.edu> In-Reply-To: <20070508163010.1d2dd724@the-village.bc.nu> References: <1978.129.133.142.66.1178605460.squirrel@webmail.wesleyan.edu> <20070508122700.262caec4@the-village.bc.nu> <55699.129.133.92.31.1178637383.squirrel@webmail.wesleyan.edu> <20070508163010.1d2dd724@the-village.bc.nu> Date: Tue, 8 May 2007 11:58:57 -0400 (EDT) Subject: Re: PCI video card on SGI O2 From: sknauert@wesleyan.edu To: linux-mips@linux-mips.org User-Agent: SquirrelMail/1.4.9a MIME-Version: 1.0 Content-Type: text/plain;charset=UTF-8 Content-Transfer-Encoding: 8bit X-Priority: 3 (Normal) Importance: Normal X-Wesleyan-MailScanner-Information: Please contact the ISP for more information X-Wesleyan-MailScanner: Found to be clean X-Originating-IP: 129.133.6.193 X-MailScanner-From: sknauert@wesleyan.edu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14997 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sknauert@wesleyan.edu Precedence: bulk X-list: linux-mips >> I agree the Voodoo 1 should work. The issue here is that I can compile >> in >> tdfx character support for the kernel and still have it boot, but can't >> boot with tdfx framebuffer support on the O2 for some reason. With just >> character support lspci IDs the card >> >> 00:03.0 PCI VGA compatible controller: ... > > That isn't a Voodoo 1 if it reports PCI VGA compatible controller. What > PCI ident values does it show. Also the tdfx framebuffer is for the later > chips not the Voodoo1 or Voodoo2 - they use sstfb. > > It looks like your card is something else - a Banshee or Rush perhaps ? > > You're quite right. What I have is not a Voodoo 1, but a Banshee. The full output of lspci does say: 00:03.0 PCI VGA compatible controller: 3Dfx Interactive, Inc. Voodoo Banshee (rev 03) Sorry, hadn't had that card in the O2 for awhile. From Eckhardt@satorlaser.com Wed May 9 11:11:45 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 09 May 2007 11:11:47 +0100 (BST) Received: from mail.domino-printing.com ([64.212.99.82]:9221 "EHLO UK-HC-PS1.domino-printing.com") by ftp.linux-mips.org with ESMTP id S20022384AbXEIKLp convert rfc822-to-8bit (ORCPT ); Wed, 9 May 2007 11:11:45 +0100 Received: from emea-exchange3.emea.dps.local (emea-exchange3.emea.dps.local) by UK-HC-PS1.domino-printing.com (Clearswift SMTPRS 5.2.5) with ESMTP id for ; Wed, 9 May 2007 11:13:22 +0100 Received: from tuxator2.emea.dps.local ([192.168.55.75]) by emea-exchange3.emea.dps.local with Microsoft SMTPSVC(6.0.3790.1830); Wed, 9 May 2007 12:13:27 +0200 From: Ulrich Eckhardt Organization: Sator Laser GmbH To: linux-mips@linux-mips.org Subject: Re: PCI video card on SGI O2 Date: Wed, 9 May 2007 12:12:31 +0200 User-Agent: KMail/1.9.5 References: <1978.129.133.142.66.1178605460.squirrel@webmail.wesleyan.edu> <876473x0jx.wl@betelheise.deep.net> In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 8BIT Content-Disposition: inline Message-Id: <200705091212.32061.eckhardt@satorlaser.com> X-OriginalArrivalTime: 09 May 2007 10:13:27.0778 (UTC) FILETIME=[AFB53420:01C79222] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14998 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: eckhardt@satorlaser.com Precedence: bulk X-list: linux-mips On Tuesday 08 May 2007 09:22, Geert Uytterhoeven wrote: > It's a pity the Millenium doesn't fit, as matroxfb is about the only > frame buffer device that can initialize a graphics card from scratch, > without help from the BIOS... I'm not sure if this is the same thing you are referring to, but I have a G4 Mac Mini which has a Radeon 9200 chip. The autodetection does not find a BIOS ROM (is that what you meant?) but it works nonetheless, both with FB and X.org. From reading the sources, it seems that this is even normal, in particular for embedded graphic chips as typically found in laptops. Uli -- Sator Laser GmbH Geschäftsführer: Ronald Boers, Amtsgericht Hamburg HR B62 932 ************************************************************************************** Visit our website at ************************************************************************************** Diese E-Mail einschließlich sämtlicher Anhänge ist nur für den Adressaten bestimmt und kann vertrauliche Informationen enthalten. Bitte benachrichtigen Sie den Absender umgehend, falls Sie nicht der beabsichtigte Empfänger sein sollten. Die E-Mail ist in diesem Fall zu löschen und darf weder gelesen, weitergeleitet, veröffentlicht oder anderweitig benutzt werden. E-Mails können durch Dritte gelesen werden und Viren sowie nichtautorisierte Änderungen enthalten. Sator Laser GmbH ist für diese Folgen nicht verantwortlich. ************************************************************************************** From geert@linux-m68k.org Wed May 9 13:06:51 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 09 May 2007 13:06:53 +0100 (BST) Received: from assei1bl6.telenet-ops.be ([195.130.133.68]:44187 "EHLO assei1bl6.telenet-ops.be") by ftp.linux-mips.org with ESMTP id S20023079AbXEIMGv (ORCPT ); Wed, 9 May 2007 13:06:51 +0100 Received: from localhost (localhost.localdomain [127.0.0.1]) by assei1bl6.telenet-ops.be (Postfix) with SMTP id 7755A22008D; Wed, 9 May 2007 14:06:50 +0200 (CEST) Received: from anakin.of.borg (d54C15D55.access.telenet.be [84.193.93.85]) by assei1bl6.telenet-ops.be (Postfix) with ESMTP id 4F5BD220079; Wed, 9 May 2007 14:06:50 +0200 (CEST) Received: from anakin.of.borg (geert@localhost [127.0.0.1]) by anakin.of.borg (8.13.8/8.13.8/Debian-3) with ESMTP id l49C6nDi008195 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Wed, 9 May 2007 14:06:49 +0200 Received: from localhost (geert@localhost) by anakin.of.borg (8.13.8/8.13.8/Submit) with ESMTP id l49C6nT2008192; Wed, 9 May 2007 14:06:49 +0200 X-Authentication-Warning: anakin.of.borg: geert owned process doing -bs Date: Wed, 9 May 2007 14:06:49 +0200 (CEST) From: Geert Uytterhoeven To: Ulrich Eckhardt Cc: linux-mips@linux-mips.org Subject: Re: PCI video card on SGI O2 In-Reply-To: <200705091212.32061.eckhardt@satorlaser.com> Message-ID: References: <1978.129.133.142.66.1178605460.squirrel@webmail.wesleyan.edu> <876473x0jx.wl@betelheise.deep.net> <200705091212.32061.eckhardt@satorlaser.com> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 14999 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: geert@linux-m68k.org Precedence: bulk X-list: linux-mips On Wed, 9 May 2007, Ulrich Eckhardt wrote: > On Tuesday 08 May 2007 09:22, Geert Uytterhoeven wrote: > > It's a pity the Millenium doesn't fit, as matroxfb is about the only > > frame buffer device that can initialize a graphics card from scratch, > > without help from the BIOS... > > I'm not sure if this is the same thing you are referring to, but I have a G4 > Mac Mini which has a Radeon 9200 chip. The autodetection does not find a BIOS > ROM (is that what you meant?) but it works nonetheless, both with FB and > X.org. From reading the sources, it seems that this is even normal, in > particular for embedded graphic chips as typically found in laptops. Open Firmware in your Mac Mini has F-code to initialize the Radeon 9200. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds From ralf@linux-mips.org Wed May 9 14:15:14 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 09 May 2007 14:15:16 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:48862 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20023364AbXEINPO (ORCPT ); Wed, 9 May 2007 14:15:14 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.13.8/8.13.8) with ESMTP id l49DFAjJ025336; Wed, 9 May 2007 14:15:10 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.13.8/8.13.8/Submit) id l49DF9De025335; Wed, 9 May 2007 14:15:09 +0100 Date: Wed, 9 May 2007 14:15:09 +0100 From: Ralf Baechle To: Franck Bui-Huu Cc: anemo@mba.ocn.ne.jp, linux-mips@linux-mips.org Subject: Re: [PATCH 1/3] Remove Momenco Ocelot G support Message-ID: <20070509131509.GA25192@linux-mips.org> References: <11785537132378-git-send-email-fbuihuu@gmail.com> <11785537144016-git-send-email-fbuihuu@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <11785537144016-git-send-email-fbuihuu@gmail.com> User-Agent: Mutt/1.4.2.2i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15000 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Mon, May 07, 2007 at 06:01:51PM +0200, Franck Bui-Huu wrote: > Subject: [PATCH 1/3] Remove Momenco Ocelot G support Killed. Ralf From ralf@linux-mips.org Wed May 9 14:15:36 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 09 May 2007 14:15:38 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:50654 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20023363AbXEINPc (ORCPT ); Wed, 9 May 2007 14:15:32 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.13.8/8.13.8) with ESMTP id l49DFSNn025354; Wed, 9 May 2007 14:15:28 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.13.8/8.13.8/Submit) id l49DFSUl025353; Wed, 9 May 2007 14:15:28 +0100 Date: Wed, 9 May 2007 14:15:28 +0100 From: Ralf Baechle To: Franck Bui-Huu Cc: anemo@mba.ocn.ne.jp, linux-mips@linux-mips.org Subject: Re: [PATCH 2/3] Remove Momenco Jaguar ATX support Message-ID: <20070509131528.GB25192@linux-mips.org> References: <11785537132378-git-send-email-fbuihuu@gmail.com> <11785537143305-git-send-email-fbuihuu@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <11785537143305-git-send-email-fbuihuu@gmail.com> User-Agent: Mutt/1.4.2.2i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15001 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Mon, May 07, 2007 at 06:01:52PM +0200, Franck Bui-Huu wrote: > Subject: [PATCH 2/3] Remove Momenco Jaguar ATX support Zapped also. Ralf From ralf@linux-mips.org Wed May 9 14:16:14 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 09 May 2007 14:16:16 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:23216 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20023374AbXEINQO (ORCPT ); Wed, 9 May 2007 14:16:14 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.13.8/8.13.8) with ESMTP id l49DG7JB025361; Wed, 9 May 2007 14:16:07 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.13.8/8.13.8/Submit) id l49DG7Fo025360; Wed, 9 May 2007 14:16:07 +0100 Date: Wed, 9 May 2007 14:16:07 +0100 From: Ralf Baechle To: Franck Bui-Huu Cc: anemo@mba.ocn.ne.jp, linux-mips@linux-mips.org Subject: Re: [PATCH 3/3] Remove LIMITED_DMA support Message-ID: <20070509131607.GC25192@linux-mips.org> References: <11785537132378-git-send-email-fbuihuu@gmail.com> <11785537142626-git-send-email-fbuihuu@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <11785537142626-git-send-email-fbuihuu@gmail.com> User-Agent: Mutt/1.4.2.2i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15002 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Mon, May 07, 2007 at 06:01:53PM +0200, Franck Bui-Huu wrote: > Subject: [PATCH 3/3] Remove LIMITED_DMA support Pleased to say goodbye to this one also, Ralf From ralf@linux-mips.org Wed May 9 14:22:12 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 09 May 2007 14:22:14 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:10669 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20023396AbXEINWM (ORCPT ); Wed, 9 May 2007 14:22:12 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.13.8/8.13.8) with ESMTP id l49DM8xG025528; Wed, 9 May 2007 14:22:08 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.13.8/8.13.8/Submit) id l49DM7mo025527; Wed, 9 May 2007 14:22:07 +0100 Date: Wed, 9 May 2007 14:22:07 +0100 From: Ralf Baechle To: Franck Bui-Huu Cc: anemo@mba.ocn.ne.jp, linux-mips@linux-mips.org Subject: Re: [PATCH 1/3] clocksource: use CLOCKSOURCE_MASK() macro Message-ID: <20070509132207.GD25192@linux-mips.org> References: <1178293006633-git-send-email-fbuihuu@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1178293006633-git-send-email-fbuihuu@gmail.com> User-Agent: Mutt/1.4.2.2i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15003 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Fri, May 04, 2007 at 05:36:44PM +0200, Franck Bui-Huu wrote: > Subject: [PATCH 1/3] clocksource: use CLOCKSOURCE_MASK() macro Applied. Ralf From ralf@linux-mips.org Wed May 9 14:54:45 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 09 May 2007 14:54:47 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:64739 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20023494AbXEINyp (ORCPT ); Wed, 9 May 2007 14:54:45 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.13.8/8.13.8) with ESMTP id l49DsfHr026169; Wed, 9 May 2007 14:54:41 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.13.8/8.13.8/Submit) id l49Dse0K026168; Wed, 9 May 2007 14:54:40 +0100 Date: Wed, 9 May 2007 14:54:40 +0100 From: Ralf Baechle To: Atsushi Nemoto Cc: vagabon.xyz@gmail.com, linux-mips@linux-mips.org Subject: Re: [PATCH 2/3] time: replace board_time_init() by plat_clk_setup() Message-ID: <20070509135440.GE25192@linux-mips.org> References: <11782930063123-git-send-email-fbuihuu@gmail.com> <20070506.010313.41199101.anemo@mba.ocn.ne.jp> <20070507.182837.126143175.nemoto@toshiba-tops.co.jp> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070507.182837.126143175.nemoto@toshiba-tops.co.jp> User-Agent: Mutt/1.4.2.2i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15004 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Mon, May 07, 2007 at 06:28:37PM +0900, Atsushi Nemoto wrote: > Both boards have been listed on > > http://www.linux-mips.org/wiki/Category:Deprecated > > since Jun 2006. Mostly because when I removed them from feature-removal-schedule.txt I left them listed. Oh well, now they're gone and as usual if somebody cares (care as in sends patches) I can resurrect them. Ralf From yoichi_yuasa@tripeaks.co.jp Wed May 9 15:38:03 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 09 May 2007 15:38:06 +0100 (BST) Received: from mo32.po.2iij.NET ([210.128.50.17]:4419 "EHLO mo32.po.2iij.net") by ftp.linux-mips.org with ESMTP id S20023593AbXEIOiD (ORCPT ); Wed, 9 May 2007 15:38:03 +0100 Received: by mo.po.2iij.net (mo32) id l49Ebw4j049137; Wed, 9 May 2007 23:37:59 +0900 (JST) Received: from localhost.localdomain (70.27.30.125.dy.iij4u.or.jp [125.30.27.70]) by mbox.po.2iij.net (mbox31) id l49Ebujv013531 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Wed, 9 May 2007 23:37:56 +0900 (JST) Date: Wed, 9 May 2007 23:37:15 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: yoichi_yuasa@tripeaks.co.jp, linux-mips@linux-mips.org Subject: [PATCH][MIPS][2/2] rename tb0229_defconfig to tb0219_defconfig Message-Id: <20070509233715.7c408d4e.yoichi_yuasa@tripeaks.co.jp> In-Reply-To: <20070509233146.6e82a301.yoichi_yuasa@tripeaks.co.jp> References: <20070509233146.6e82a301.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.6 (GTK+ 1.2.10; i486-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15005 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has renamed tb0229_defconfig to tb0219_defconfig. It's real board name. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/configs/tb0219_defconfig mips/arch/mips/configs/tb0219_defconfig --- mips-orig/arch/mips/configs/tb0219_defconfig 1970-01-01 09:00:00.000000000 +0900 +++ mips/arch/mips/configs/tb0219_defconfig 2007-04-15 14:28:02.754318750 +0900 @@ -0,0 +1,1125 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.21-rc6 +# Sun Apr 15 01:06:01 2007 +# +CONFIG_MIPS=y + +# +# Machine selection +# +CONFIG_ZONE_DMA=y +# CONFIG_MIPS_MTX1 is not set +# CONFIG_MIPS_BOSPORUS is not set +# CONFIG_MIPS_PB1000 is not set +# CONFIG_MIPS_PB1100 is not set +# CONFIG_MIPS_PB1500 is not set +# CONFIG_MIPS_PB1550 is not set +# CONFIG_MIPS_PB1200 is not set +# CONFIG_MIPS_DB1000 is not set +# CONFIG_MIPS_DB1100 is not set +# CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set +# CONFIG_MIPS_DB1200 is not set +# CONFIG_MIPS_MIRAGE is not set +# CONFIG_BASLER_EXCITE is not set +# CONFIG_MIPS_COBALT is not set +# CONFIG_MACH_DECSTATION is not set +# CONFIG_MIPS_EV64120 is not set +# CONFIG_MACH_JAZZ is not set +# CONFIG_LASAT is not set +# CONFIG_MIPS_ATLAS is not set +# CONFIG_MIPS_MALTA is not set +# CONFIG_MIPS_SEAD is not set +# CONFIG_WR_PPMC is not set +# CONFIG_MIPS_SIM is not set +# CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_MOMENCO_OCELOT is not set +# CONFIG_MOMENCO_OCELOT_3 is not set +# CONFIG_MOMENCO_OCELOT_C is not set +# CONFIG_MOMENCO_OCELOT_G is not set +# CONFIG_MIPS_XXS1500 is not set +# CONFIG_PNX8550_JBS is not set +# CONFIG_PNX8550_STB810 is not set +# CONFIG_DDB5477 is not set +CONFIG_MACH_VR41XX=y +# CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set +# CONFIG_MARKEINS is not set +# CONFIG_SGI_IP22 is not set +# CONFIG_SGI_IP27 is not set +# CONFIG_SGI_IP32 is not set +# CONFIG_SIBYTE_BIGSUR is not set +# CONFIG_SIBYTE_SWARM is not set +# CONFIG_SIBYTE_SENTOSA is not set +# CONFIG_SIBYTE_RHONE is not set +# CONFIG_SIBYTE_CARMEL is not set +# CONFIG_SIBYTE_PTSWARM is not set +# CONFIG_SIBYTE_LITTLESUR is not set +# CONFIG_SIBYTE_CRHINE is not set +# CONFIG_SIBYTE_CRHONE is not set +# CONFIG_SNI_RM is not set +# CONFIG_TOSHIBA_JMR3927 is not set +# CONFIG_TOSHIBA_RBTX4927 is not set +# CONFIG_TOSHIBA_RBTX4938 is not set +# CONFIG_CASIO_E55 is not set +# CONFIG_IBM_WORKPAD is not set +# CONFIG_NEC_CMBVR4133 is not set +CONFIG_TANBAC_TB022X=y +# CONFIG_VICTOR_MPC30X is not set +# CONFIG_ZAO_CAPCELLA is not set +CONFIG_TANBAC_TB0219=y +# CONFIG_TANBAC_TB0226 is not set +# CONFIG_TANBAC_TB0287 is not set +CONFIG_PCI_VR41XX=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_TIME=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DMA_NEED_PCI_MAP_STATE=y +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_IRQ_CPU=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 + +# +# CPU selection +# +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS32_R2 is not set +# CONFIG_CPU_MIPS64_R1 is not set +# CONFIG_CPU_MIPS64_R2 is not set +# CONFIG_CPU_R3000 is not set +# CONFIG_CPU_TX39XX is not set +CONFIG_CPU_VR41XX=y +# CONFIG_CPU_R4300 is not set +# CONFIG_CPU_R4X00 is not set +# CONFIG_CPU_TX49XX is not set +# CONFIG_CPU_R5000 is not set +# CONFIG_CPU_R5432 is not set +# CONFIG_CPU_R6000 is not set +# CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R8000 is not set +# CONFIG_CPU_R10000 is not set +# CONFIG_CPU_RM7000 is not set +# CONFIG_CPU_RM9000 is not set +# CONFIG_CPU_SB1 is not set +CONFIG_SYS_HAS_CPU_VR41XX=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y + +# +# Kernel type +# +CONFIG_32BIT=y +# CONFIG_64BIT is not set +CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set +# CONFIG_PAGE_SIZE_16KB is not set +# CONFIG_PAGE_SIZE_64KB is not set +CONFIG_MIPS_MT_DISABLED=y +# CONFIG_MIPS_MT_SMP is not set +# CONFIG_MIPS_MT_SMTC is not set +# CONFIG_MIPS_VPE_LOADER is not set +CONFIG_CPU_HAS_SYNC=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +# CONFIG_HZ_48 is not set +# CONFIG_HZ_100 is not set +# CONFIG_HZ_128 is not set +# CONFIG_HZ_250 is not set +# CONFIG_HZ_256 is not set +CONFIG_HZ_1000=y +# CONFIG_HZ_1024 is not set +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_HZ=1000 +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +# CONFIG_KEXEC is not set +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_IPC_NS is not set +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_UTS_NS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_SYSFS_DEPRECATED=y +# CONFIG_RELAY is not set +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SHMEM=y +CONFIG_SLAB=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_KMOD=y + +# +# Block layer +# +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# Bus options (PCI, PCMCIA, EISA, ISA, TC) +# +CONFIG_HW_HAS_PCI=y +CONFIG_PCI=y +CONFIG_MMU=y + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# PCI Hotplug Support +# +# CONFIG_HOTPLUG_PCI is not set + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_MISC is not set +CONFIG_TRAD_SIGNALS=y + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_LEGACY is not set +# CONFIG_PM_DEBUG is not set +# CONFIG_PM_SYSFS_DEPRECATED is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +CONFIG_XFRM_MIGRATE=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_ASK_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +CONFIG_NET_IPIP=m +CONFIG_NET_IPGRE=m +# CONFIG_NET_IPGRE_BROADCAST is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_TRANSPORT=m +CONFIG_INET_XFRM_MODE_TUNNEL=m +CONFIG_INET_XFRM_MODE_BEET=m +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +CONFIG_TCP_MD5SIG=y +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +CONFIG_NETWORK_SECMARK=y +# CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_IEEE80211 is not set +CONFIG_FIB_RULES=y + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=m +# CONFIG_SYS_HYPERVISOR is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set + +# +# Memory Technology Devices (MTD) +# +# CONFIG_MTD is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# +# CONFIG_PNPACPI is not set + +# +# Block devices +# +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=m +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +CONFIG_BLK_DEV_NBD=m +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# Misc devices +# +CONFIG_SGI_IOC4=m +# CONFIG_TIFM_CORE is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_NETLINK is not set + +# +# Serial ATA (prod) and Parallel ATA (experimental) drivers +# +# CONFIG_ATA is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# +# CONFIG_I2O is not set + +# +# Network device support +# +CONFIG_NETDEVICES=y +CONFIG_DUMMY=m +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set + +# +# PHY device support +# +CONFIG_PHYLIB=m + +# +# MII PHY device drivers +# +CONFIG_MARVELL_PHY=m +CONFIG_DAVICOM_PHY=m +CONFIG_QSEMI_PHY=m +CONFIG_LXT_PHY=m +CONFIG_CICADA_PHY=m +CONFIG_VITESSE_PHY=m +CONFIG_SMSC_PHY=m +# CONFIG_BROADCOM_PHY is not set +# CONFIG_FIXED_PHY is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_DM9000 is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +# CONFIG_NET_PCI is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +CONFIG_R8169=y +# CONFIG_R8169_NAPI is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_SK98LIN is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +CONFIG_QLA3XXX=m +# CONFIG_ATL1 is not set + +# +# Ethernet (10000 Mbit) +# +# CONFIG_CHELSIO_T1 is not set +CONFIG_CHELSIO_T3=m +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set +# CONFIG_MYRI10GE is not set +CONFIG_NETXEN_NIC=m + +# +# Token Ring devices +# +# CONFIG_TR is not set + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_SERIAL_VR41XX=y +CONFIG_SERIAL_VR41XX_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_RTC is not set +# CONFIG_GEN_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +CONFIG_GPIO_TB0219=y +# CONFIG_DRM is not set +CONFIG_GPIO_VR41XX=y +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Hardware Monitoring support +# +# CONFIG_HWMON is not set +# CONFIG_HWMON_VID is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set +# CONFIG_FB is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# HID Devices +# +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=m +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +CONFIG_USB_EHCI_HCD=m +# CONFIG_USB_EHCI_SPLIT_ISO is not set +# CONFIG_USB_EHCI_ROOT_HUB_TT is not set +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +# CONFIG_USB_EHCI_BIG_ENDIAN_MMIO is not set +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=m +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Input Devices +# +# CONFIG_USB_HID is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +# CONFIG_USB_AIPTEK is not set +# CONFIG_USB_WACOM is not set +# CONFIG_USB_ACECAD is not set +# CONFIG_USB_KBTAB is not set +# CONFIG_USB_POWERMATE is not set +# CONFIG_USB_TOUCHSCREEN is not set +# CONFIG_USB_YEALINK is not set +# CONFIG_USB_XPAD is not set +# CONFIG_USB_ATI_REMOTE is not set +# CONFIG_USB_ATI_REMOTE2 is not set +# CONFIG_USB_KEYSPAN_REMOTE is not set +# CONFIG_USB_APPLETOUCH is not set +# CONFIG_USB_GTCO is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET_MII is not set +# CONFIG_USB_USBNET is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# LED devices +# +# CONFIG_NEW_LEDS is not set + +# +# LED drivers +# + +# +# LED Triggers +# + +# +# InfiniBand support +# +# CONFIG_INFINIBAND is not set + +# +# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) +# + +# +# Real Time Clock +# +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set + +# +# RTC drivers +# +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_M48T86 is not set +CONFIG_RTC_DRV_VR41XX=y +# CONFIG_RTC_DRV_TEST is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# DMA Engine support +# +# CONFIG_DMA_ENGINE is not set + +# +# DMA Clients +# + +# +# DMA Devices +# + +# +# Auxiliary Display support +# + +# +# Virtualization +# + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +CONFIG_ROMFS_FS=m +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=m +CONFIG_GENERIC_ACL=y + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +CONFIG_CONFIGFS_FS=m + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_CRAMFS=m +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +CONFIG_NFSD=y +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +# CONFIG_NFSD_V4 is not set +CONFIG_NFSD_TCP=y +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +# CONFIG_NLS is not set + +# +# Distributed Lock Manager +# +CONFIG_DLM=m +CONFIG_DLM_TCP=y +# CONFIG_DLM_SCTP is not set +# CONFIG_DLM_DEBUG is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_CROSSCOMPILE=y +CONFIG_CMDLINE="mem=64M console=ttyVR0,115200 ip=any root=/dev/nfs" + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +CONFIG_CRYPTO=y +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=m +CONFIG_CRYPTO_HASH=m +CONFIG_CRYPTO_MANAGER=m +CONFIG_CRYPTO_HMAC=m +CONFIG_CRYPTO_XCBC=m +CONFIG_CRYPTO_NULL=m +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_SHA1=m +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_WP512=m +CONFIG_CRYPTO_TGR192=m +CONFIG_CRYPTO_GF128MUL=m +CONFIG_CRYPTO_ECB=m +CONFIG_CRYPTO_CBC=m +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_DES=m +CONFIG_CRYPTO_FCRYPT=m +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_AES=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_KHAZAD=m +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_DEFLATE=m +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_CRC32C=m +CONFIG_CRYPTO_CAMELLIA=m +# CONFIG_CRYPTO_TEST is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC32=y +CONFIG_LIBCRC32C=m +CONFIG_ZLIB_INFLATE=m +CONFIG_ZLIB_DEFLATE=m +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/configs/tb0229_defconfig mips/arch/mips/configs/tb0229_defconfig --- mips-orig/arch/mips/configs/tb0229_defconfig 2007-04-15 15:01:02.699759500 +0900 +++ mips/arch/mips/configs/tb0229_defconfig 1970-01-01 09:00:00.000000000 +0900 @@ -1,1125 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.21-rc6 -# Sun Apr 15 01:06:01 2007 -# -CONFIG_MIPS=y - -# -# Machine selection -# -CONFIG_ZONE_DMA=y -# CONFIG_MIPS_MTX1 is not set -# CONFIG_MIPS_BOSPORUS is not set -# CONFIG_MIPS_PB1000 is not set -# CONFIG_MIPS_PB1100 is not set -# CONFIG_MIPS_PB1500 is not set -# CONFIG_MIPS_PB1550 is not set -# CONFIG_MIPS_PB1200 is not set -# CONFIG_MIPS_DB1000 is not set -# CONFIG_MIPS_DB1100 is not set -# CONFIG_MIPS_DB1500 is not set -# CONFIG_MIPS_DB1550 is not set -# CONFIG_MIPS_DB1200 is not set -# CONFIG_MIPS_MIRAGE is not set -# CONFIG_BASLER_EXCITE is not set -# CONFIG_MIPS_COBALT is not set -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MIPS_EV64120 is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_LASAT is not set -# CONFIG_MIPS_ATLAS is not set -# CONFIG_MIPS_MALTA is not set -# CONFIG_MIPS_SEAD is not set -# CONFIG_WR_PPMC is not set -# CONFIG_MIPS_SIM is not set -# CONFIG_MOMENCO_JAGUAR_ATX is not set -# CONFIG_MOMENCO_OCELOT is not set -# CONFIG_MOMENCO_OCELOT_3 is not set -# CONFIG_MOMENCO_OCELOT_C is not set -# CONFIG_MOMENCO_OCELOT_G is not set -# CONFIG_MIPS_XXS1500 is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_STB810 is not set -# CONFIG_DDB5477 is not set -CONFIG_MACH_VR41XX=y -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_QEMU is not set -# CONFIG_MARKEINS is not set -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_SWARM is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_PTSWARM is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM is not set -# CONFIG_TOSHIBA_JMR3927 is not set -# CONFIG_TOSHIBA_RBTX4927 is not set -# CONFIG_TOSHIBA_RBTX4938 is not set -# CONFIG_CASIO_E55 is not set -# CONFIG_IBM_WORKPAD is not set -# CONFIG_NEC_CMBVR4133 is not set -CONFIG_TANBAC_TB022X=y -# CONFIG_VICTOR_MPC30X is not set -# CONFIG_ZAO_CAPCELLA is not set -CONFIG_TANBAC_TB0219=y -# CONFIG_TANBAC_TB0226 is not set -# CONFIG_TANBAC_TB0287 is not set -CONFIG_PCI_VR41XX=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_TIME=y -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_DMA_NEED_PCI_MAP_STATE=y -# CONFIG_CPU_BIG_ENDIAN is not set -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y -CONFIG_IRQ_CPU=y -CONFIG_MIPS_L1_CACHE_SHIFT=5 - -# -# CPU selection -# -# CONFIG_CPU_MIPS32_R1 is not set -# CONFIG_CPU_MIPS32_R2 is not set -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_TX39XX is not set -CONFIG_CPU_VR41XX=y -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_NEVADA is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_R10000 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_RM9000 is not set -# CONFIG_CPU_SB1 is not set -CONFIG_SYS_HAS_CPU_VR41XX=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y - -# -# Kernel type -# -CONFIG_32BIT=y -# CONFIG_64BIT is not set -CONFIG_PAGE_SIZE_4KB=y -# CONFIG_PAGE_SIZE_8KB is not set -# CONFIG_PAGE_SIZE_16KB is not set -# CONFIG_PAGE_SIZE_64KB is not set -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -# CONFIG_MIPS_VPE_LOADER is not set -CONFIG_CPU_HAS_SYNC=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_ARCH_FLATMEM_ENABLE=y -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_RESOURCES_64BIT is not set -CONFIG_ZONE_DMA_FLAG=1 -# CONFIG_HZ_48 is not set -# CONFIG_HZ_100 is not set -# CONFIG_HZ_128 is not set -# CONFIG_HZ_250 is not set -# CONFIG_HZ_256 is not set -CONFIG_HZ_1000=y -# CONFIG_HZ_1024 is not set -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_HZ=1000 -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set -# CONFIG_KEXEC is not set -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# -CONFIG_LOCALVERSION="" -CONFIG_LOCALVERSION_AUTO=y -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_IPC_NS is not set -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_UTS_NS is not set -# CONFIG_AUDIT is not set -# CONFIG_IKCONFIG is not set -CONFIG_SYSFS_DEPRECATED=y -# CONFIG_RELAY is not set -# CONFIG_BLK_DEV_INITRD is not set -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_SYSCTL=y -CONFIG_EMBEDDED=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SHMEM=y -CONFIG_SLAB=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_RT_MUTEXES=y -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 -# CONFIG_SLOB is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_KMOD=y - -# -# Block layer -# -CONFIG_BLOCK=y -# CONFIG_LBD is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_LSF is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -CONFIG_DEFAULT_AS=y -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="anticipatory" - -# -# Bus options (PCI, PCMCIA, EISA, ISA, TC) -# -CONFIG_HW_HAS_PCI=y -CONFIG_PCI=y -CONFIG_MMU=y - -# -# PCCARD (PCMCIA/CardBus) support -# -# CONFIG_PCCARD is not set - -# -# PCI Hotplug Support -# -# CONFIG_HOTPLUG_PCI is not set - -# -# Executable file formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_TRAD_SIGNALS=y - -# -# Power management options -# -CONFIG_PM=y -# CONFIG_PM_LEGACY is not set -# CONFIG_PM_DEBUG is not set -# CONFIG_PM_SYSFS_DEPRECATED is not set - -# -# Networking -# -CONFIG_NET=y - -# -# Networking options -# -# CONFIG_NETDEBUG is not set -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -CONFIG_XFRM_MIGRATE=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_ADVANCED_ROUTER=y -CONFIG_ASK_IP_FIB_HASH=y -# CONFIG_IP_FIB_TRIE is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_MULTIPLE_TABLES=y -CONFIG_IP_ROUTE_MULTIPATH=y -# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set -CONFIG_IP_ROUTE_VERBOSE=y -CONFIG_IP_PNP=y -# CONFIG_IP_PNP_DHCP is not set -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE=m -# CONFIG_NET_IPGRE_BROADCAST is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -CONFIG_SYN_COOKIES=y -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=m -CONFIG_INET_XFRM_MODE_TUNNEL=m -CONFIG_INET_XFRM_MODE_BEET=m -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -CONFIG_TCP_MD5SIG=y -# CONFIG_IPV6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set -CONFIG_NETWORK_SECMARK=y -# CONFIG_NETFILTER is not set - -# -# DCCP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_DCCP is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set - -# -# TIPC Configuration (EXPERIMENTAL) -# -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_IEEE80211 is not set -CONFIG_FIB_RULES=y - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=m -# CONFIG_SYS_HYPERVISOR is not set - -# -# Connector - unified userspace <-> kernelspace linker -# -# CONFIG_CONNECTOR is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# -# CONFIG_PNPACPI is not set - -# -# Block devices -# -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=m -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -CONFIG_BLK_DEV_NBD=m -# CONFIG_BLK_DEV_SX8 is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set - -# -# Misc devices -# -CONFIG_SGI_IOC4=m -# CONFIG_TIFM_CORE is not set - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -# CONFIG_SCSI is not set -# CONFIG_SCSI_NETLINK is not set - -# -# Serial ATA (prod) and Parallel ATA (experimental) drivers -# -# CONFIG_ATA is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Network device support -# -CONFIG_NETDEVICES=y -CONFIG_DUMMY=m -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# PHY device support -# -CONFIG_PHYLIB=m - -# -# MII PHY device drivers -# -CONFIG_MARVELL_PHY=m -CONFIG_DAVICOM_PHY=m -CONFIG_QSEMI_PHY=m -CONFIG_LXT_PHY=m -CONFIG_CICADA_PHY=m -CONFIG_VITESSE_PHY=m -CONFIG_SMSC_PHY=m -# CONFIG_BROADCOM_PHY is not set -# CONFIG_FIXED_PHY is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_CASSINI is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_DM9000 is not set - -# -# Tulip family network device support -# -# CONFIG_NET_TULIP is not set -# CONFIG_HP100 is not set -# CONFIG_NET_PCI is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -CONFIG_R8169=y -# CONFIG_R8169_NAPI is not set -# CONFIG_SIS190 is not set -# CONFIG_SKGE is not set -# CONFIG_SKY2 is not set -# CONFIG_SK98LIN is not set -# CONFIG_TIGON3 is not set -# CONFIG_BNX2 is not set -CONFIG_QLA3XXX=m -# CONFIG_ATL1 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_CHELSIO_T1 is not set -CONFIG_CHELSIO_T3=m -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set -# CONFIG_MYRI10GE is not set -CONFIG_NETXEN_NIC=m - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -# CONFIG_SERIO is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_SERIAL_VR41XX=y -CONFIG_SERIAL_VR41XX_CONSOLE=y -# CONFIG_SERIAL_JSM is not set -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_HW_RANDOM is not set -# CONFIG_RTC is not set -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set -CONFIG_GPIO_TB0219=y -# CONFIG_DRM is not set -CONFIG_GPIO_VR41XX=y -# CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# -# CONFIG_TCG_TPM is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# SPI support -# -# CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set - -# -# Dallas's 1-wire bus -# -# CONFIG_W1 is not set - -# -# Hardware Monitoring support -# -# CONFIG_HWMON is not set -# CONFIG_HWMON_VID is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_SM501 is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set -# CONFIG_USB_DABUSB is not set - -# -# Graphics support -# -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -# CONFIG_FB is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# HID Devices -# -CONFIG_HID=y -# CONFIG_HID_DEBUG is not set - -# -# USB support -# -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -CONFIG_USB=m -# CONFIG_USB_DEBUG is not set - -# -# Miscellaneous USB options -# -CONFIG_USB_DEVICEFS=y -# CONFIG_USB_DYNAMIC_MINORS is not set -# CONFIG_USB_SUSPEND is not set -# CONFIG_USB_OTG is not set - -# -# USB Host Controller Drivers -# -CONFIG_USB_EHCI_HCD=m -# CONFIG_USB_EHCI_SPLIT_ISO is not set -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -# CONFIG_USB_EHCI_TT_NEWSCHED is not set -# CONFIG_USB_EHCI_BIG_ENDIAN_MMIO is not set -# CONFIG_USB_ISP116X_HCD is not set -CONFIG_USB_OHCI_HCD=m -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -# CONFIG_USB_UHCI_HCD is not set -# CONFIG_USB_SL811_HCD is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -# - -# -# may also be needed; see USB_STORAGE Help for more information -# -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Input Devices -# -# CONFIG_USB_HID is not set - -# -# USB HID Boot Protocol drivers -# -# CONFIG_USB_KBD is not set -# CONFIG_USB_MOUSE is not set -# CONFIG_USB_AIPTEK is not set -# CONFIG_USB_WACOM is not set -# CONFIG_USB_ACECAD is not set -# CONFIG_USB_KBTAB is not set -# CONFIG_USB_POWERMATE is not set -# CONFIG_USB_TOUCHSCREEN is not set -# CONFIG_USB_YEALINK is not set -# CONFIG_USB_XPAD is not set -# CONFIG_USB_ATI_REMOTE is not set -# CONFIG_USB_ATI_REMOTE2 is not set -# CONFIG_USB_KEYSPAN_REMOTE is not set -# CONFIG_USB_APPLETOUCH is not set -# CONFIG_USB_GTCO is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET_MII is not set -# CONFIG_USB_USBNET is not set -CONFIG_USB_MON=y - -# -# USB port drivers -# - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_AUERSWALD is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_BERRY_CHARGE is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_PHIDGET is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_TEST is not set - -# -# USB DSL modem support -# - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# MMC/SD Card support -# -# CONFIG_MMC is not set - -# -# LED devices -# -# CONFIG_NEW_LEDS is not set - -# -# LED drivers -# - -# -# LED Triggers -# - -# -# InfiniBand support -# -# CONFIG_INFINIBAND is not set - -# -# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) -# - -# -# Real Time Clock -# -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set - -# -# RTC drivers -# -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_M48T86 is not set -CONFIG_RTC_DRV_VR41XX=y -# CONFIG_RTC_DRV_TEST is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# DMA Engine support -# -# CONFIG_DMA_ENGINE is not set - -# -# DMA Clients -# - -# -# DMA Devices -# - -# -# Auxiliary Display support -# - -# -# Virtualization -# - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -# CONFIG_EXT3_FS is not set -# CONFIG_EXT4DEV_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -CONFIG_FS_POSIX_ACL=y -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_MINIX_FS is not set -CONFIG_ROMFS_FS=m -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -CONFIG_AUTOFS4_FS=y -CONFIG_FUSE_FS=m -CONFIG_GENERIC_ACL=y - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_PROC_SYSCTL=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y -CONFIG_CONFIGFS_FS=m - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_CRAMFS=m -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -CONFIG_NFSD=y -CONFIG_NFSD_V3=y -# CONFIG_NFSD_V3_ACL is not set -# CONFIG_NFSD_V4 is not set -CONFIG_NFSD_TCP=y -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set -# CONFIG_9P_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Distributed Lock Manager -# -CONFIG_DLM=m -CONFIG_DLM_TCP=y -# CONFIG_DLM_SCTP is not set -# CONFIG_DLM_DEBUG is not set - -# -# Profiling support -# -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_MUST_CHECK=y -# CONFIG_MAGIC_SYSRQ is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_FS is not set -# CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_KERNEL is not set -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_CROSSCOMPILE=y -CONFIG_CMDLINE="mem=64M console=ttyVR0,115200 ip=any root=/dev/nfs" - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -CONFIG_CRYPTO=y -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_BLKCIPHER=m -CONFIG_CRYPTO_HASH=m -CONFIG_CRYPTO_MANAGER=m -CONFIG_CRYPTO_HMAC=m -CONFIG_CRYPTO_XCBC=m -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_SHA1=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_WP512=m -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_GF128MUL=m -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_CBC=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_DES=m -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_TWOFISH_COMMON=m -CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_AES=m -CONFIG_CRYPTO_CAST5=m -CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_ARC4=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_DEFLATE=m -CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_CRC32C=m -CONFIG_CRYPTO_CAMELLIA=m -# CONFIG_CRYPTO_TEST is not set - -# -# Hardware crypto devices -# - -# -# Library routines -# -CONFIG_BITREVERSE=y -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC16 is not set -CONFIG_CRC32=y -CONFIG_LIBCRC32C=m -CONFIG_ZLIB_INFLATE=m -CONFIG_ZLIB_DEFLATE=m -CONFIG_PLIST=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y From yoichi_yuasa@tripeaks.co.jp Wed May 9 15:39:16 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 09 May 2007 15:39:19 +0100 (BST) Received: from mo31.po.2iij.NET ([210.128.50.54]:49419 "EHLO mo31.po.2iij.net") by ftp.linux-mips.org with ESMTP id S20023605AbXEIOjQ (ORCPT ); Wed, 9 May 2007 15:39:16 +0100 Received: by mo.po.2iij.net (mo31) id l49EbwX2081853; Wed, 9 May 2007 23:37:58 +0900 (JST) Received: from localhost.localdomain (70.27.30.125.dy.iij4u.or.jp [125.30.27.70]) by mbox.po.2iij.net (mbox31) id l49Ebs5k013518 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Wed, 9 May 2007 23:37:54 +0900 (JST) Date: Wed, 9 May 2007 23:31:46 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: yoichi_yuasa@tripeaks.co.jp, linux-mips Subject: [PATCH][MIPS][1/2] update tb0229_defconfig Message-Id: <20070509233146.6e82a301.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.6 (GTK+ 1.2.10; i486-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15006 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has updated tb0229_defconfig. It's added CONFIG_GPIO_TB0219. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/configs/tb0229_defconfig mips/arch/mips/configs/tb0229_defconfig --- mips-orig/arch/mips/configs/tb0229_defconfig 2007-04-15 01:01:05.341956750 +0900 +++ mips/arch/mips/configs/tb0229_defconfig 2007-04-15 01:10:51.182569500 +0900 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.20 -# Tue Feb 20 21:47:41 2007 +# Linux kernel version: 2.6.21-rc6 +# Sun Apr 15 01:06:01 2007 # CONFIG_MIPS=y @@ -66,10 +66,11 @@ CONFIG_MACH_VR41XX=y # CONFIG_IBM_WORKPAD is not set # CONFIG_NEC_CMBVR4133 is not set CONFIG_TANBAC_TB022X=y -# CONFIG_TANBAC_TB0226 is not set -# CONFIG_TANBAC_TB0287 is not set # CONFIG_VICTOR_MPC30X is not set # CONFIG_ZAO_CAPCELLA is not set +CONFIG_TANBAC_TB0219=y +# CONFIG_TANBAC_TB0226 is not set +# CONFIG_TANBAC_TB0287 is not set CONFIG_PCI_VR41XX=y CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_ARCH_HAS_ILOG2_U32 is not set @@ -184,6 +185,7 @@ CONFIG_SYSVIPC_SYSCTL=y # CONFIG_IKCONFIG is not set CONFIG_SYSFS_DEPRECATED=y # CONFIG_RELAY is not set +# CONFIG_BLK_DEV_INITRD is not set # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_SYSCTL=y CONFIG_EMBEDDED=y @@ -375,7 +377,7 @@ CONFIG_FIB_RULES=y # CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set +CONFIG_FW_LOADER=m # CONFIG_SYS_HYPERVISOR is not set # @@ -415,7 +417,6 @@ CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=4096 CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 -# CONFIG_BLK_DEV_INITRD is not set # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set @@ -646,7 +647,7 @@ CONFIG_LEGACY_PTY_COUNT=256 # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set -CONFIG_TANBAC_TB0219=y +CONFIG_GPIO_TB0219=y # CONFIG_DRM is not set CONFIG_GPIO_VR41XX=y # CONFIG_RAW_DRIVER is not set @@ -679,6 +680,11 @@ CONFIG_GPIO_VR41XX=y # CONFIG_HWMON_VID is not set # +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set + +# # Multimedia devices # # CONFIG_VIDEO_DEV is not set @@ -692,7 +698,7 @@ CONFIG_GPIO_VR41XX=y # # Graphics support # -# CONFIG_FIRMWARE_EDID is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # CONFIG_FB is not set # @@ -700,7 +706,6 @@ CONFIG_GPIO_VR41XX=y # # CONFIG_VGA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # # Sound @@ -831,6 +836,7 @@ CONFIG_USB_MON=y # CONFIG_USB_SISUSBVGA is not set # CONFIG_USB_LD is not set # CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set # CONFIG_USB_TEST is not set # From anemo@mba.ocn.ne.jp Wed May 9 15:42:34 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 09 May 2007 15:42:37 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:35780 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20023610AbXEIOme (ORCPT ); Wed, 9 May 2007 15:42:34 +0100 Received: from localhost (p3015-ipad31funabasi.chiba.ocn.ne.jp [221.189.127.15]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 5DBA2B629; Wed, 9 May 2007 23:42:27 +0900 (JST) Date: Wed, 09 May 2007 23:42:38 +0900 (JST) Message-Id: <20070509.234238.25909573.anemo@mba.ocn.ne.jp> To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org, sshtylyov@ru.mvista.com Subject: [PATCH] Remove unused CONFIG_TOSHIBA_BOARDS From: Atsushi Nemoto X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15007 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips Signed-off-by: Atsushi Nemoto --- arch/mips/Kconfig | 6 ------ arch/mips/configs/jmr3927_defconfig | 1 - arch/mips/configs/rbhma4500_defconfig | 1 - 3 files changed, 0 insertions(+), 8 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 4a4d94c..8959126 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -736,7 +736,6 @@ config TOSHIBA_JMR3927 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_SUPPORTS_BIG_ENDIAN - select TOSHIBA_BOARDS select GENERIC_HARDIRQS_NO__DO_IRQ config TOSHIBA_RBTX4927 @@ -752,7 +751,6 @@ config TOSHIBA_RBTX4927 select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_KGDB - select TOSHIBA_BOARDS select GENERIC_HARDIRQS_NO__DO_IRQ help This Toshiba board is based on the TX4927 processor. Say Y here to @@ -772,7 +770,6 @@ config TOSHIBA_RBTX4938 select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_KGDB - select TOSHIBA_BOARDS select GENERIC_HARDIRQS_NO__DO_IRQ help This Toshiba board is based on the TX4938 processor. Say Y here to @@ -1086,9 +1083,6 @@ config ARC64 config BOOT_ELF64 bool -config TOSHIBA_BOARDS - bool - menu "CPU selection" choice diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig index 068e48e..1b364cf 100644 --- a/arch/mips/configs/jmr3927_defconfig +++ b/arch/mips/configs/jmr3927_defconfig @@ -80,7 +80,6 @@ CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y CONFIG_MIPS_TX3927=y CONFIG_SWAP_IO_SPACE=y CONFIG_MIPS_L1_CACHE_SHIFT=5 -CONFIG_TOSHIBA_BOARDS=y # # CPU selection diff --git a/arch/mips/configs/rbhma4500_defconfig b/arch/mips/configs/rbhma4500_defconfig index 7d0f217..41011f7 100644 --- a/arch/mips/configs/rbhma4500_defconfig +++ b/arch/mips/configs/rbhma4500_defconfig @@ -89,7 +89,6 @@ CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y CONFIG_SWAP_IO_SPACE=y CONFIG_MIPS_L1_CACHE_SHIFT=5 CONFIG_HAVE_STD_PC_SERIAL_PORT=y -CONFIG_TOSHIBA_BOARDS=y # # CPU selection From anemo@mba.ocn.ne.jp Wed May 9 15:59:58 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 09 May 2007 16:00:01 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:27330 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20023644AbXEIO76 (ORCPT ); Wed, 9 May 2007 15:59:58 +0100 Received: from localhost (p3015-ipad31funabasi.chiba.ocn.ne.jp [221.189.127.15]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 91482B559; Wed, 9 May 2007 23:58:36 +0900 (JST) Date: Wed, 09 May 2007 23:58:47 +0900 (JST) Message-Id: <20070509.235847.41630434.anemo@mba.ocn.ne.jp> To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org, sshtylyov@ru.mvista.com Subject: [PATCH] Add minimum defconfig for RBHMA4200 From: Atsushi Nemoto X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15008 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips Signed-off-by: Atsushi Nemoto --- arch/mips/configs/rbhma4200_defconfig | 902 +++++++++++++++++++++++++++++++++ 1 files changed, 902 insertions(+), 0 deletions(-) diff --git a/arch/mips/configs/rbhma4200_defconfig b/arch/mips/configs/rbhma4200_defconfig new file mode 100644 index 0000000..35d6426 --- /dev/null +++ b/arch/mips/configs/rbhma4200_defconfig @@ -0,0 +1,902 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.21 +# Wed May 9 23:44:19 2007 +# +CONFIG_MIPS=y + +# +# Machine selection +# +# CONFIG_MIPS_MTX1 is not set +# CONFIG_MIPS_BOSPORUS is not set +# CONFIG_MIPS_PB1000 is not set +# CONFIG_MIPS_PB1100 is not set +# CONFIG_MIPS_PB1500 is not set +# CONFIG_MIPS_PB1550 is not set +# CONFIG_MIPS_PB1200 is not set +# CONFIG_MIPS_DB1000 is not set +# CONFIG_MIPS_DB1100 is not set +# CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set +# CONFIG_MIPS_DB1200 is not set +# CONFIG_MIPS_MIRAGE is not set +# CONFIG_BASLER_EXCITE is not set +# CONFIG_MIPS_COBALT is not set +# CONFIG_MACH_DECSTATION is not set +# CONFIG_MIPS_EV64120 is not set +# CONFIG_MACH_JAZZ is not set +# CONFIG_LASAT is not set +# CONFIG_MIPS_ATLAS is not set +# CONFIG_MIPS_MALTA is not set +# CONFIG_MIPS_SEAD is not set +# CONFIG_WR_PPMC is not set +# CONFIG_MIPS_SIM is not set +# CONFIG_MOMENCO_OCELOT is not set +# CONFIG_MOMENCO_OCELOT_3 is not set +# CONFIG_MOMENCO_OCELOT_C is not set +# CONFIG_MIPS_XXS1500 is not set +# CONFIG_PNX8550_JBS is not set +# CONFIG_PNX8550_STB810 is not set +# CONFIG_DDB5477 is not set +# CONFIG_MACH_VR41XX is not set +# CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set +# CONFIG_MARKEINS is not set +# CONFIG_SGI_IP22 is not set +# CONFIG_SGI_IP27 is not set +# CONFIG_SGI_IP32 is not set +# CONFIG_SIBYTE_BIGSUR is not set +# CONFIG_SIBYTE_SWARM is not set +# CONFIG_SIBYTE_SENTOSA is not set +# CONFIG_SIBYTE_RHONE is not set +# CONFIG_SIBYTE_CARMEL is not set +# CONFIG_SIBYTE_PTSWARM is not set +# CONFIG_SIBYTE_LITTLESUR is not set +# CONFIG_SIBYTE_CRHINE is not set +# CONFIG_SIBYTE_CRHONE is not set +# CONFIG_SNI_RM is not set +# CONFIG_TOSHIBA_JMR3927 is not set +CONFIG_TOSHIBA_RBTX4927=y +# CONFIG_TOSHIBA_RBTX4938 is not set +# CONFIG_TOSHIBA_FPCIB0 is not set +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_TIME=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DMA_NEED_PCI_MAP_STATE=y +CONFIG_I8259=y +CONFIG_CPU_BIG_ENDIAN=y +# CONFIG_CPU_LITTLE_ENDIAN is not set +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_SWAP_IO_SPACE=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 + +# +# CPU selection +# +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS32_R2 is not set +# CONFIG_CPU_MIPS64_R1 is not set +# CONFIG_CPU_MIPS64_R2 is not set +# CONFIG_CPU_R3000 is not set +# CONFIG_CPU_TX39XX is not set +# CONFIG_CPU_VR41XX is not set +# CONFIG_CPU_R4300 is not set +# CONFIG_CPU_R4X00 is not set +CONFIG_CPU_TX49XX=y +# CONFIG_CPU_R5000 is not set +# CONFIG_CPU_R5432 is not set +# CONFIG_CPU_R6000 is not set +# CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R8000 is not set +# CONFIG_CPU_R10000 is not set +# CONFIG_CPU_RM7000 is not set +# CONFIG_CPU_RM9000 is not set +# CONFIG_CPU_SB1 is not set +CONFIG_SYS_HAS_CPU_TX49XX=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y + +# +# Kernel type +# +CONFIG_32BIT=y +# CONFIG_64BIT is not set +CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set +# CONFIG_PAGE_SIZE_16KB is not set +# CONFIG_PAGE_SIZE_64KB is not set +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_MIPS_MT_DISABLED=y +# CONFIG_MIPS_MT_SMP is not set +# CONFIG_MIPS_MT_SMTC is not set +# CONFIG_MIPS_VPE_LOADER is not set +CONFIG_CPU_HAS_LLSC=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +# CONFIG_HZ_48 is not set +# CONFIG_HZ_100 is not set +# CONFIG_HZ_128 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_256 is not set +# CONFIG_HZ_1000 is not set +# CONFIG_HZ_1024 is not set +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_HZ=250 +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +# CONFIG_KEXEC is not set +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_IPC_NS is not set +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_UTS_NS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_SYSFS_DEPRECATED=y +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +# CONFIG_HOTPLUG is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +# CONFIG_FUTEX is not set +# CONFIG_EPOLL is not set +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 + +# +# Loadable module support +# +CONFIG_MODULES=y +# CONFIG_MODULE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y + +# +# Block layer +# +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# Bus options (PCI, PCMCIA, EISA, ISA, TC) +# +CONFIG_HW_HAS_PCI=y +CONFIG_PCI=y +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_MMU=y + +# +# PCCARD (PCMCIA/CardBus) support +# + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_MISC is not set +CONFIG_TRAD_SIGNALS=y + +# +# Power management options +# +# CONFIG_PM is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_SYS_HYPERVISOR is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set +# CONFIG_MTD is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# +# CONFIG_PNPACPI is not set + +# +# Block devices +# +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=8192 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# Misc devices +# +# CONFIG_PHANTOM is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_BLINK is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_NETLINK is not set + +# +# Serial ATA (prod) and Parallel ATA (experimental) drivers +# +# CONFIG_ATA is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# +# CONFIG_I2O is not set + +# +# Network device support +# +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set + +# +# PHY device support +# +# CONFIG_PHYLIB is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +# CONFIG_MII is not set +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_DM9000 is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +CONFIG_NE2000=y +# CONFIG_NET_PCI is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_SK98LIN is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +# CONFIG_QLA3XXX is not set +# CONFIG_ATL1 is not set + +# +# Ethernet (10000 Mbit) +# +# CONFIG_CHELSIO_T1 is not set +# CONFIG_CHELSIO_T3 is not set +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set +# CONFIG_MYRI10GE is not set +# CONFIG_NETXEN_NIC is not set + +# +# Token Ring devices +# +# CONFIG_TR is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +# CONFIG_INPUT is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_I8042 is not set +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_SERIAL_TXX9=y +CONFIG_HAS_TXX9_SERIAL=y +CONFIG_SERIAL_TXX9_NR_UARTS=6 +CONFIG_SERIAL_TXX9_CONSOLE=y +CONFIG_SERIAL_TXX9_STDSERIAL=y +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_RTC is not set +# CONFIG_GEN_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_DRM is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +# CONFIG_I2C is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set +# CONFIG_HWMON is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set +# CONFIG_VGASTATE is not set +# CONFIG_FB is not set + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +# CONFIG_USB is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set +# CONFIG_MMC is not set + +# +# LED devices +# +# CONFIG_NEW_LEDS is not set + +# +# LED drivers +# + +# +# LED Triggers +# + +# +# InfiniBand support +# +# CONFIG_INFINIBAND is not set + +# +# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) +# + +# +# Real Time Clock +# +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1553 is not set +CONFIG_RTC_DRV_DS1742=y +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# + +# +# DMA Engine support +# +# CONFIG_DMA_ENGINE is not set + +# +# DMA Clients +# + +# +# DMA Devices +# + +# +# Auxiliary Display support +# + +# +# Virtualization +# + +# +# File systems +# +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_DNOTIFY is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set +CONFIG_GENERIC_ACL=y + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +# CONFIG_NLS is not set + +# +# Distributed Lock Manager +# +# CONFIG_DLM is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_CROSSCOMPILE=y +CONFIG_CMDLINE="" +CONFIG_SYS_SUPPORTS_KGDB=y + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y From anemo@mba.ocn.ne.jp Wed May 9 16:03:30 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 09 May 2007 16:03:33 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:52479 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20023648AbXEIPDa (ORCPT ); Wed, 9 May 2007 16:03:30 +0100 Received: from localhost (p3015-ipad31funabasi.chiba.ocn.ne.jp [221.189.127.15]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 8EF0FADEF; Thu, 10 May 2007 00:03:25 +0900 (JST) Date: Thu, 10 May 2007 00:03:36 +0900 (JST) Message-Id: <20070510.000336.96686963.anemo@mba.ocn.ne.jp> To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org, sshtylyov@ru.mvista.com Subject: Re: [PATCH] rbtx4938: Fix secondary PCIC and glue internal NICs From: Atsushi Nemoto In-Reply-To: <20070317.012539.72709076.anemo@mba.ocn.ne.jp> References: <20070317.012539.72709076.anemo@mba.ocn.ne.jp> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15009 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Sat, 17 Mar 2007 01:25:39 +0900 (JST), Atsushi Nemoto wrote: > * Fix pci ops for secondary PCIC > * Do not reserve 1MB for PCI MEM region (leave PCIBIOS_MIN_MEM zero) > * Use NETDEV_REGISTER event to provide ethernet addresses for internal > NICs (tc35815 driver) > * Check return value of early_read_config_word() Updated against current git tree. Subject: [PATCH] rbtx4938: Fix secondary PCIC and glue internal NICs * Fix pci ops for secondary PCIC * Do not reserve 1MB for PCI MEM region (leave PCIBIOS_MIN_MEM zero) * Use NETDEV_REGISTER event to provide ethernet addresses for internal NICs (tc35815 driver) * Check return value of early_read_config_word() Signed-off-by: Atsushi Nemoto --- arch/mips/pci/ops-tx4938.c | 60 +++++++++++++++++----------- arch/mips/tx4938/toshiba_rbtx4938/setup.c | 56 +++++++++++++++++---------- 2 files changed, 72 insertions(+), 44 deletions(-) diff --git a/arch/mips/pci/ops-tx4938.c b/arch/mips/pci/ops-tx4938.c index 4450070..db435bf 100644 --- a/arch/mips/pci/ops-tx4938.c +++ b/arch/mips/pci/ops-tx4938.c @@ -46,50 +46,61 @@ struct resource tx4938_pcic1_pci_mem_resource = { .flags = IORESOURCE_MEM }; -static int mkaddr(int bus, int dev_fn, int where, int *flagsp) +static int mkaddr(int bus, int dev_fn, int where, + struct tx4938_pcic_reg *pcicptr) { if (bus > 0) { /* Type 1 configuration */ - tx4938_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) | + pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) | ((dev_fn & 0xff) << 0x08) | (where & 0xfc) | 1; } else { if (dev_fn >= PCI_DEVFN(TX4938_PCIC_MAX_DEVNU, 0)) return -1; /* Type 0 configuration */ - tx4938_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) | + pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) | ((dev_fn & 0xff) << 0x08) | (where & 0xfc); } /* clear M_ABORT and Disable M_ABORT Int. */ - tx4938_pcicptr->pcistatus = - (tx4938_pcicptr->pcistatus & 0x0000ffff) | + pcicptr->pcistatus = + (pcicptr->pcistatus & 0x0000ffff) | (PCI_STATUS_REC_MASTER_ABORT << 16); - tx4938_pcicptr->pcimask &= ~PCI_STATUS_REC_MASTER_ABORT; + pcicptr->pcimask &= ~PCI_STATUS_REC_MASTER_ABORT; return 0; } -static int check_abort(int flags) +static int check_abort(struct tx4938_pcic_reg *pcicptr) { int code = PCIBIOS_SUCCESSFUL; /* wait write cycle completion before checking error status */ - while (tx4938_pcicptr->pcicstatus & TX4938_PCIC_PCICSTATUS_IWB) + while (pcicptr->pcicstatus & TX4938_PCIC_PCICSTATUS_IWB) ; - if (tx4938_pcicptr->pcistatus & (PCI_STATUS_REC_MASTER_ABORT << 16)) { - tx4938_pcicptr->pcistatus = - (tx4938_pcicptr-> + if (pcicptr->pcistatus & (PCI_STATUS_REC_MASTER_ABORT << 16)) { + pcicptr->pcistatus = + (pcicptr-> pcistatus & 0x0000ffff) | (PCI_STATUS_REC_MASTER_ABORT << 16); - tx4938_pcicptr->pcimask |= PCI_STATUS_REC_MASTER_ABORT; + pcicptr->pcimask |= PCI_STATUS_REC_MASTER_ABORT; code = PCIBIOS_DEVICE_NOT_FOUND; } return code; } +extern struct pci_controller tx4938_pci_controller[]; +extern struct tx4938_pcic_reg *get_tx4938_pcicptr(int ch); + +static struct tx4938_pcic_reg *pci_bus_to_pcicptr(struct pci_bus *bus) +{ + struct pci_controller *channel = bus->sysdata; + return get_tx4938_pcicptr(channel - &tx4938_pci_controller[0]); +} + static int tx4938_pcibios_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * val) { - int flags, retval, dev, busno, func; + int retval, dev, busno, func; + struct tx4938_pcic_reg *pcicptr = pci_bus_to_pcicptr(bus); dev = PCI_SLOT(devfn); func = PCI_FUNC(devfn); @@ -101,12 +112,12 @@ static int tx4938_pcibios_read_config(struct pci_bus *bus, unsigned int devfn, busno = 0; } - if (mkaddr(busno, devfn, where, &flags)) + if (mkaddr(busno, devfn, where, pcicptr)) return -1; switch (size) { case 1: - *val = *(volatile u8 *) ((unsigned long) & tx4938_pcicptr->g2pcfgdata | + *val = *(volatile u8 *) ((unsigned long) & pcicptr->g2pcfgdata | #ifdef __BIG_ENDIAN ((where & 3) ^ 3)); #else @@ -114,7 +125,7 @@ static int tx4938_pcibios_read_config(struct pci_bus *bus, unsigned int devfn, #endif break; case 2: - *val = *(volatile u16 *) ((unsigned long) & tx4938_pcicptr->g2pcfgdata | + *val = *(volatile u16 *) ((unsigned long) & pcicptr->g2pcfgdata | #ifdef __BIG_ENDIAN ((where & 3) ^ 2)); #else @@ -122,11 +133,11 @@ static int tx4938_pcibios_read_config(struct pci_bus *bus, unsigned int devfn, #endif break; case 4: - *val = tx4938_pcicptr->g2pcfgdata; + *val = pcicptr->g2pcfgdata; break; } - retval = check_abort(flags); + retval = check_abort(pcicptr); if (retval == PCIBIOS_DEVICE_NOT_FOUND) *val = 0xffffffff; @@ -136,7 +147,8 @@ static int tx4938_pcibios_read_config(struct pci_bus *bus, unsigned int devfn, static int tx4938_pcibios_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) { - int flags, dev, busno, func; + int dev, busno, func; + struct tx4938_pcic_reg *pcicptr = pci_bus_to_pcicptr(bus); busno = bus->number; dev = PCI_SLOT(devfn); @@ -149,12 +161,12 @@ static int tx4938_pcibios_write_config(struct pci_bus *bus, unsigned int devfn, busno = 0; } - if (mkaddr(busno, devfn, where, &flags)) + if (mkaddr(busno, devfn, where, pcicptr)) return -1; switch (size) { case 1: - *(volatile u8 *) ((unsigned long) & tx4938_pcicptr->g2pcfgdata | + *(volatile u8 *) ((unsigned long) & pcicptr->g2pcfgdata | #ifdef __BIG_ENDIAN ((where & 3) ^ 3)) = val; #else @@ -162,7 +174,7 @@ static int tx4938_pcibios_write_config(struct pci_bus *bus, unsigned int devfn, #endif break; case 2: - *(volatile u16 *) ((unsigned long) & tx4938_pcicptr->g2pcfgdata | + *(volatile u16 *) ((unsigned long) & pcicptr->g2pcfgdata | #ifdef __BIG_ENDIAN ((where & 0x3) ^ 0x2)) = val; #else @@ -170,11 +182,11 @@ static int tx4938_pcibios_write_config(struct pci_bus *bus, unsigned int devfn, #endif break; case 4: - tx4938_pcicptr->g2pcfgdata = val; + pcicptr->g2pcfgdata = val; break; } - return check_abort(flags); + return check_abort(pcicptr); } struct pci_ops tx4938_pci_ops = { diff --git a/arch/mips/tx4938/toshiba_rbtx4938/setup.c b/arch/mips/tx4938/toshiba_rbtx4938/setup.c index f5d1ce7..4e26673 100644 --- a/arch/mips/tx4938/toshiba_rbtx4938/setup.c +++ b/arch/mips/tx4938/toshiba_rbtx4938/setup.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include @@ -349,7 +350,7 @@ static struct pci_dev *fake_pci_dev(struct pci_controller *hose, static struct pci_dev dev; static struct pci_bus bus; - dev.sysdata = (void *)hose; + dev.sysdata = bus.sysdata = hose; dev.devfn = devfn; bus.number = busnr; bus.ops = hose->pci_ops; @@ -382,8 +383,10 @@ int txboard_pci66_check(struct pci_controller *hose, int top_bus, int current_bu printk("PCI: Checking 66MHz capabilities...\n"); for (pci_devfn=devfn_start; pci_devfnccfg & TX4938_CCFG_PCIXARB); PCIBIOS_MIN_IO = 0x00001000UL; - PCIBIOS_MIN_MEM = 0x01000000UL; mem_base[0] = txboard_request_phys_region_shrink(&mem_size[0]); io_base[0] = txboard_request_phys_region_shrink(&io_size[0]); @@ -607,26 +609,11 @@ static int rbtx4938_spi_cs_func(int chipid, int on) #ifdef CONFIG_PCI extern int spi_eeprom_read(int chipid, int address, unsigned char *buf, int len); -int rbtx4938_get_tx4938_ethaddr(struct pci_dev *dev, unsigned char *addr) +static int rbtx4938_get_tx4938_ethaddr(int ch, unsigned char *addr) { - struct pci_controller *channel = (struct pci_controller *)dev->bus->sysdata; static unsigned char dat[17]; static int read_dat = 0; - int ch = 0; - if (channel != &tx4938_pci_controller[1]) - return -ENODEV; - /* TX4938 PCIC1 */ - switch (PCI_SLOT(dev->devfn)) { - case TX4938_PCIC_IDSEL_AD_TO_SLOT(31): - ch = 0; - break; - case TX4938_PCIC_IDSEL_AD_TO_SLOT(30): - ch = 1; - break; - default: - return -ENODEV; - } if (!read_dat) { unsigned char sum; int i; @@ -647,6 +634,35 @@ int rbtx4938_get_tx4938_ethaddr(struct pci_dev *dev, unsigned char *addr) memcpy(addr, &dat[4 + 6 * ch], 6); return 0; } + +static int rbtx4938_netdev_event(struct notifier_block *this, + unsigned long event, + void *ptr) +{ + struct net_device *dev = ptr; + if (event == NETDEV_REGISTER) { + int ch = -1; + if (dev->irq == RBTX4938_IRQ_IRC + TX4938_IR_ETH0) + ch = 0; + else if (dev->irq == RBTX4938_IRQ_IRC + TX4938_IR_ETH1) + ch = 1; + if (ch >= 0) + rbtx4938_get_tx4938_ethaddr(ch, dev->dev_addr); + } + return NOTIFY_DONE; +} + +static struct notifier_block rbtx4938_netdev_notifier = { + .notifier_call = rbtx4938_netdev_event, +}; + +static int __init rbtx4938_setup_eth(void) +{ + if (tx4938_ccfgptr->pcfg & (TX4938_PCFG_ETH0_SEL|TX4938_PCFG_ETH1_SEL)) + register_netdevice_notifier(&rbtx4938_netdev_notifier); + return 0; +} +device_initcall(rbtx4938_setup_eth); #endif /* CONFIG_PCI */ extern void __init txx9_spi_init(unsigned long base, int (*cs_func)(int chipid, int on)); From anemo@mba.ocn.ne.jp Wed May 9 16:55:05 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 09 May 2007 16:55:06 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:25806 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20023759AbXEIPzF (ORCPT ); Wed, 9 May 2007 16:55:05 +0100 Received: from localhost (p3015-ipad31funabasi.chiba.ocn.ne.jp [221.189.127.15]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 92180C2BC; Thu, 10 May 2007 00:53:43 +0900 (JST) Date: Thu, 10 May 2007 00:53:36 +0900 (JST) Message-Id: <20070510.005336.63743253.anemo@mba.ocn.ne.jp> To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: Re: [PATCH] Add some sysfs files to debug unaligned accesses From: Atsushi Nemoto In-Reply-To: <20070306.005143.69025642.anemo@mba.ocn.ne.jp> References: <20070306.005143.69025642.anemo@mba.ocn.ne.jp> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15010 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Tue, 06 Mar 2007 00:51:43 +0900 (JST), Atsushi Nemoto wrote: > Currently a number of unaligned instructions is counted but not used. > Add /sys/kernel/mips/unaligned_instructions file to show the value. Updated against current git tree. Subject: [PATCH] Add some sysfs files to debug unaligned accesses Currently a number of unaligned instructions is counted but not used. Add /sys/kernel/mips/unaligned_instructions file to show the value. And add /sys/kernel/mips/unaligned_action to control behavior upon an unaligned access. Possible actions are: quiet: silently fixup the unaligned access. signal: send SIGBUS. show: dump registers, process name, etc. and fixup. Signed-off-by: Atsushi Nemoto --- arch/mips/kernel/setup.c | 14 ++++++++ arch/mips/kernel/unaligned.c | 70 ++++++++++++++++++++++++++++++++++++++++-- 2 files changed, 81 insertions(+), 3 deletions(-) diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 4975da0..1c8629c 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -574,3 +574,17 @@ __setup("nodsp", dsp_disable); unsigned long kernelsp[NR_CPUS]; unsigned long fw_arg0, fw_arg1, fw_arg2, fw_arg3; + +static struct attribute *mips_attrs[] = { + NULL +}; +static struct attribute_group mips_attr_group = { + .name = "mips", + .attrs = mips_attrs, +}; + +static int __init sysfs_mips(void) +{ + return sysfs_create_group(&kernel_subsys.kobj, &mips_attr_group); +} +arch_initcall(sysfs_mips); diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c index a7d49ae..bdead88 100644 --- a/arch/mips/kernel/unaligned.c +++ b/arch/mips/kernel/unaligned.c @@ -87,9 +87,14 @@ #define STR(x) __STR(x) #define __STR(x) #x -#ifdef CONFIG_PROC_FS -unsigned long unaligned_instructions; +#ifdef CONFIG_SYSFS +static unsigned long unaligned_instructions; +static int unaligned_action; +static const char *unaligned_actions[] = {"quiet", "signal", "show"}; +#else +#define unaligned_action 0 #endif +extern void show_registers(struct pt_regs *regs); static inline int emulate_load_store_insn(struct pt_regs *regs, void __user *addr, unsigned int __user *pc, @@ -459,7 +464,7 @@ static inline int emulate_load_store_insn(struct pt_regs *regs, goto sigill; } -#ifdef CONFIG_PROC_FS +#ifdef CONFIG_SYSFS unaligned_instructions++; #endif @@ -516,6 +521,10 @@ asmlinkage void do_ade(struct pt_regs *regs) pc = (unsigned int __user *) exception_epc(regs); if (user_mode(regs) && (current->thread.mflags & MF_FIXADE) == 0) goto sigbus; + if (unaligned_action == 1) + goto sigbus; + else if (unaligned_action == 2) + show_registers(regs); /* * Do branch emulation only if we didn't forward the exception. @@ -546,3 +555,58 @@ sigbus: * XXX On return from the signal handler we should advance the epc */ } + +#ifdef CONFIG_SYSFS +static ssize_t unaligned_instructions_show(struct kset *kset, char *buf) +{ + return sprintf(buf, "%lu\n", unaligned_instructions); +} + +static ssize_t unaligned_action_show(struct kset *kset, char *buf) +{ + int i; + char *s = buf; + + for (i = 0; i < ARRAY_SIZE(unaligned_actions); i++) { + if (i == unaligned_action) + s += sprintf(s, "[%s] ", unaligned_actions[i]); + else + s += sprintf(s, "%s ", unaligned_actions[i]); + } + s += sprintf(s, "\n"); + return s - buf; +} + +static ssize_t unaligned_action_store(struct kset *kset, + const char *buf, size_t count) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(unaligned_actions); i++) { + if (!strncmp(buf, unaligned_actions[i], + min(count, strlen(unaligned_actions[i])))) { + unaligned_action = i; + return count; + } + } + return -EINVAL; +} + +#define __ATTR_RW(_name) __ATTR(_name, 0644, _name##_show, _name##_store) +static struct subsys_attribute unaligned_attrs[] = { + __ATTR_RO(unaligned_instructions), + __ATTR_RW(unaligned_action), +}; + +static int __init sysfs_unaligned(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(unaligned_attrs); i++) + sysfs_add_file_to_group(&kernel_subsys.kobj, + &unaligned_attrs[i].attr, + "mips"); + return 0; +} +__initcall(sysfs_unaligned); +#endif From vagabon.xyz@gmail.com Wed May 9 17:14:07 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 09 May 2007 17:14:09 +0100 (BST) Received: from nz-out-0506.google.com ([64.233.162.234]:38280 "EHLO nz-out-0506.google.com") by ftp.linux-mips.org with ESMTP id S20023784AbXEIQOH (ORCPT ); Wed, 9 May 2007 17:14:07 +0100 Received: by nz-out-0506.google.com with SMTP id x7so262359nzc for ; Wed, 09 May 2007 09:14:03 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=FMh2jAzqrwDrntDbFakZ4OvXftuZRbgXll864JFCpMzgmoaGUidzdtW88j4bniHos+KwXGLo9z66iikbvMkpDL1XFgpfVTtKKrfXkOXA7hcxRGxSCXlNYxuig+fRhSN4sBZ1is2vsCY/IAwTLVrvFMy/MOz4LwjAWASg/cm8d6I= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=grLDDWaHcAgX218Zo+TdZfCogFLz1ftRz+zS66FPBViojYVeMKLMz99QaevcgJwVgvtmyanSd0EQgYODhVqovSKFULKobPgq5feFtY8vqa/jWVwd92Hq/31HEqCMqqFykLdqvRrfmhGSvUgp04ha1NgwwYiis8HJ519LihrO5Co= Received: by 10.114.166.1 with SMTP id o1mr96974wae.1178727243413; Wed, 09 May 2007 09:14:03 -0700 (PDT) Received: by 10.114.134.16 with HTTP; Wed, 9 May 2007 09:14:03 -0700 (PDT) Message-ID: Date: Wed, 9 May 2007 18:14:03 +0200 From: "Franck Bui-Huu" To: "Ralf Baechle" Subject: Re: [PATCH 3/3] Remove LIMITED_DMA support Cc: anemo@mba.ocn.ne.jp, linux-mips@linux-mips.org In-Reply-To: <20070509131607.GC25192@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <11785537132378-git-send-email-fbuihuu@gmail.com> <11785537142626-git-send-email-fbuihuu@gmail.com> <20070509131607.GC25192@linux-mips.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15011 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips On 5/9/07, Ralf Baechle wrote: > On Mon, May 07, 2007 at 06:01:53PM +0200, Franck Bui-Huu wrote: > > > Subject: [PATCH 3/3] Remove LIMITED_DMA support > > Pleased to say goodbye to this one also, > Thanks ! -- Franck From anemo@mba.ocn.ne.jp Wed May 9 17:14:58 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 09 May 2007 17:15:00 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:3312 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20023796AbXEIQO6 (ORCPT ); Wed, 9 May 2007 17:14:58 +0100 Received: from localhost (p3015-ipad31funabasi.chiba.ocn.ne.jp [221.189.127.15]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id E3D089805; Thu, 10 May 2007 01:13:37 +0900 (JST) Date: Thu, 10 May 2007 01:13:48 +0900 (JST) Message-Id: <20070510.011348.25233649.anemo@mba.ocn.ne.jp> To: guido.zeiger@mailprocessor.de Cc: linux-mips@linux-mips.org Subject: Re: Segmentation Fault from MP3-Player with Etch on Qube2 From: Atsushi Nemoto In-Reply-To: <8FBE82E8-F399-426A-A263-E0EA85095A08@mailprocessor.de> References: <8FBE82E8-F399-426A-A263-E0EA85095A08@mailprocessor.de> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15012 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Mon, 7 May 2007 19:37:40 +0200, Guido Zeiger wrote: > after reinstalling debian, (now etch , therefore sid) on my Qube2, > because of changing to a 2.5" HD (from 3.5") and installing the > current debian version I got a Segmentation Fault on every usage of a > program which should produce sound :-(( > > The programs are > > > mpg123 > > mpg321 > > mp3blaster > > The programs did work with this qube2, soundcard and mp3-file under > debian sid, > but now with etch it didnt work anymore. There are know problems with PCI soundcard on noncoherent MIPS platform (including cobalt) and some patches are floating around. For example: http://www.linux-mips.org/archives/linux-mips/2007-04/msg00072.html This is a long standing issue and I wonder why your soundcard _did_ work with debian sid. The kernel of sid contains fixes for this issue? --- Atsushi Nemoto From anemo@mba.ocn.ne.jp Wed May 9 17:20:39 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 09 May 2007 17:20:41 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:21502 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20023824AbXEIQUj (ORCPT ); Wed, 9 May 2007 17:20:39 +0100 Received: from localhost (p3015-ipad31funabasi.chiba.ocn.ne.jp [221.189.127.15]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 98371B9AE; Thu, 10 May 2007 01:20:35 +0900 (JST) Date: Thu, 10 May 2007 01:20:30 +0900 (JST) Message-Id: <20070510.012030.55487433.anemo@mba.ocn.ne.jp> To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: [PATCH] Drop __devinit tag from allocate_irqno() and free_irqno() From: Atsushi Nemoto X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15013 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips This fix these warnings: WARNING: arch/mips/kernel/built-in.o - Section mismatch: reference to .init.text:free_irqno from __ksymtab_gpl between '__ksymtab_free_irqno' (at offset 0x0) and '__ksymtab_allocate_irqno' WARNING: arch/mips/kernel/built-in.o - Section mismatch: reference to .init.text:allocate_irqno from __ksymtab_gpl after '__ksymtab_allocate_irqno' (at offset 0x8) Signed-off-by: Atsushi Nemoto --- diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c index 2fe4c86..aeded6c 100644 --- a/arch/mips/kernel/irq.c +++ b/arch/mips/kernel/irq.c @@ -28,7 +28,7 @@ static unsigned long irq_map[NR_IRQS / BITS_PER_LONG]; -int __devinit allocate_irqno(void) +int allocate_irqno(void) { int irq; @@ -59,7 +59,7 @@ void __init alloc_legacy_irqno(void) BUG_ON(test_and_set_bit(i, irq_map)); } -void __devinit free_irqno(unsigned int irq) +void free_irqno(unsigned int irq) { smp_mb__before_clear_bit(); clear_bit(irq, irq_map); From Marc_St-Jean@pmc-sierra.com Wed May 9 20:09:57 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 09 May 2007 20:09:59 +0100 (BST) Received: from father.pmc-sierra.com ([216.241.224.13]:15815 "HELO father.pmc-sierra.bc.ca") by ftp.linux-mips.org with SMTP id S20024419AbXEITJ4 (ORCPT ); Wed, 9 May 2007 20:09:56 +0100 Received: (qmail 16100 invoked by uid 101); 9 May 2007 19:08:45 -0000 Received: from unknown (HELO pmxedge1.pmc-sierra.bc.ca) (216.241.226.183) by father.pmc-sierra.com with SMTP; 9 May 2007 19:08:45 -0000 Received: from bby1exi01.pmc_nt.nt.pmc-sierra.bc.ca (bby1exi01.pmc-sierra.bc.ca [216.241.231.251]) by pmxedge1.pmc-sierra.bc.ca (8.13.4/8.12.7) with ESMTP id l49J8ehn030102; Wed, 9 May 2007 12:08:45 -0700 Received: by bby1exi01.pmc-sierra.bc.ca with Internet Mail Service (5.5.2657.72) id <2MBTBBBH>; Wed, 9 May 2007 12:08:39 -0700 Message-ID: <46421C2C.3050603@pmc-sierra.com> From: Marc St-Jean To: Jeff Garzik Cc: Marc St-Jean , netdev@vger.kernel.org, akpm@linux-foundation.org, linux-mips@linux-mips.org Subject: Re: [PATCH 10/12] drivers: PMC MSP71xx ethernet driver Date: Wed, 9 May 2007 12:08:28 -0700 MIME-Version: 1.0 X-Mailer: Internet Mail Service (5.5.2657.72) x-originalarrivaltime: 09 May 2007 19:08:29.0429 (UTC) FILETIME=[6DC86A50:01C7926D] user-agent: Thunderbird 1.5.0.10 (X11/20070221) Content-Type: text/plain; charset="iso-8859-1" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15014 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: Marc_St-Jean@pmc-sierra.com Precedence: bulk X-list: linux-mips Thanks for the feedback Jeff. I have made all modifications but I have one question regarding the SKB recycling. Removing the backwards compatibility for the linux 2.4 eliminated the badness in mspeth_skb_headerinit(). However there is still some SKB code in mspeth_alloc_skb(). You didn't specifically comment on that, is it acceptable? We are reluctant to remove the SKB recycling code as it provides a significant performance improvement. Marc Jeff Garzik wrote: > > +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#endif /* LINUX_VERSION_CODE */ > > + > > +#include "pmcmspeth.h" > > + > > > +/************************************************************************** > > > + * The name of the card. Is used for messages and in the requests for > > + * io regions, irqs and dma channels, versions, etc. Also, various > other > > + * identifying character constants. > > + */ > > +static const char cardname[] = "pmcmspeth"; > > + > > > +/************************************************************************** > > > + * List of PHYs. Each MAC will have a certain number (maybe zero) > > + * PHYs hanging off the MDIO interface. > > + */ > > +static struct mspeth_phy *root_phy_dev = NULL; > > + > > +/* Debugging flags */ > > +static unsigned int mspeth_debug = MSPETH_DEBUG; > > use netif_msg_init() and the bitmapped message flags. grep for > 'netif_msg_' and 'msg_enable' in various drivers. > > > > > +/************************************************************************** > > > + * Function prototypes > > + */ > > + > > +/* Functions that get called by upper layers */ > > +static int mspeth_open(struct net_device *dev); > > +static int mspeth_send_packet(struct sk_buff *skb, > > + struct net_device *dev); > > +static void mspeth_tx_timeout(struct net_device *dev); > > +static void mspeth_hard_restart_bh(unsigned long dev_addr); > > +static int mspeth_close(struct net_device *dev); > > +static struct net_device_stats *mspeth_get_stats(struct net_device > *dev); > > +static void mspeth_set_multicast_list(struct net_device *dev); > > + > > +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) > > +static irqreturn_t mspeth_interrupt(int irq, void *dev_id); > > +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) > > +static void mspeth_interrupt(int irq, void *dev_id, struct pt_regs > *regs); > > +#endif > > remove all kernel compat ifdefs > > > > > + /* protect access with spin lock */ > > + spin_lock_irqsave(&(phyptr->lock), flags); > > + > > + while (__raw_readl(phyptr->memaddr + MSPPHY_MII_CTRL) & > > + MD_CA_BUSY_BIT) {;} > > + __raw_writel(MD_CA_BUSY_BIT | phyptr->phyaddr << 5 | phy_reg, > > + phyptr->memaddr + MSPPHY_MII_CTRL); > > + while (__raw_readl(phyptr->memaddr + MSPPHY_MII_CTRL) & > > + MD_CA_BUSY_BIT) {;} > > + data = __raw_readl(phyptr->memaddr + MSPPHY_MII_DATA); > > no infinite loops allowed > > > > + /* unlock */ > > + spin_unlock_irqrestore(&(phyptr->lock), flags); > > + > > + return data & 0xffff; > > +} > > + > > +static void > > +mspphy_write(struct mspeth_phy *phyptr, int phy_reg, u32 data) > > +{ > > + unsigned long flags; > > + > > + if (phyptr == NULL) { > > + printk(KERN_WARNING "MSPETH(mspphy_write): " > > + "Cannot write to a NULL PHY!\n"); > > This is a BUG_ON() condition > > > > + /* protect access with spin lock */ > > + spin_lock_irqsave(&(phyptr->lock), flags); > > remove extra parens > > > > + while (__raw_readl(phyptr->memaddr + MSPPHY_MII_CTRL) & > > + MD_CA_BUSY_BIT) {;} > > + __raw_writel(data, phyptr->memaddr + MSPPHY_MII_DATA); > > + __raw_writel(MD_CA_BUSY_BIT | MD_CA_Wr | > > + phyptr->phyaddr << 5 | phy_reg, > > + phyptr->memaddr + MSPPHY_MII_CTRL); > > + while (__raw_readl(phyptr->memaddr + MSPPHY_MII_CTRL) & > > + MD_CA_BUSY_BIT) {;} > > no infinite loops > > > > + /* unlock */ > > + spin_unlock_irqrestore(&(phyptr->lock), flags); > > +} > > + > > +#ifdef CONFIG_MSPETH_SKB_RECYCLE > > +/* initialise the recycle bin for skb */ > > +static void > > +init_skbuff_bin(void) > > +{ > > + spin_lock_init(&skb_bin.lock); > > + skb_bin.recycle_max = RX_BUF_NUM * 4; /* max size of bin */ > > + skb_bin.recycle_count = 0; > > + skb_bin.recycle_queue = NULL; > > + skb_bin.user_count = 0; > > +} > > + > > +/* free the skb's in recycle bin */ > > +static void > > +free_skbuff_bin(void) > > +{ > > + spin_lock_bh(&skb_bin.lock); > > + > > + /* check any skb's are present in the recycle bin */ > > + if (skb_bin.recycle_count > 0) { > > + struct sk_buff *skb; > > + while (skb_bin.recycle_queue != NULL ) { > > + skb = skb_bin.recycle_queue->next; > > + dev_kfree_skb_any(skb_bin.recycle_queue); > > + skb_bin.recycle_queue = skb; > > + } > > + } > > + > > + /* reset fields */ > > + skb_bin.recycle_queue = NULL; > > + skb_bin.recycle_count = 0; > > + > > + spin_unlock_bh(&skb_bin.lock); > > +} > > + > > +inline static void > > +mspeth_skb_headerinit(struct sk_buff *skb) > > +{ > > + /* these are essential before init */ > > + dst_release(skb->dst); > > +#ifdef CONFIG_XFRM > > + secpath_put(skb->sp); > > +#endif > > +#ifdef CONFIG_NETFILTER > > + nf_conntrack_put(skb->nfct); > > +#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) > > + nf_conntrack_put_reasm(skb->nfct_reasm); > > +#endif > > +#ifdef CONFIG_BRIDGE_NETFILTER > > + nf_bridge_put(skb->nf_bridge); > > +#endif > > +#endif /* CONFIG_NETFILTER */ > > + > > + /* now initialise the skb . . . */ > > +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) > > + /* clear the members till skb->truesize */ > > + memset(skb, 0, offsetof(struct sk_buff, truesize)); > > +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) > > + skb->prev = NULL; > > + skb->list = NULL; > > + skb->sk = NULL; > > + skb->stamp.tv_sec = 0; > > +#ifdef CONFIG_BRECIS > > + skb->stamp.tv_usec = 0; > > +#endif /* CONFIG_BRECIS */ > > + skb->dev = NULL; > > + skb->real_dev = NULL; > > + skb->dst = NULL; > > + memset(skb->cb, 0, sizeof(skb->cb)); > > + skb->pkt_type = PACKET_HOST; > > + skb->priority = 0; > > + skb->security = 0; > > + > > +#ifdef CONFIG_NETFILTER > > + skb->nfmark = skb->nfcache = 0; > > + skb->nfct = NULL; > > +#ifdef CONFIG_NETFILTER_DEBUG > > + skb->nf_debug = 0; > > +#endif > > +#if defined(CONFIG_BRIDGE) || defined(CONFIG_BRIDGE_MODULE) > > + skb->nf_bridge = NULL; > > +#endif > > +#endif /* CONFIG_NETFILTER */ > > +#ifdef CONFIG_NET_SCHED > > + skb->tc_index = 0; > > +#endif > > +#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) > > + skb->nfct_reasm = NULL; > > +#endif > > +#endif /* LINUX_VERSION_CODE */ > > +} > > +#endif /* CONFIG_MSPETH_SKB_RECYCLE */ > > Absolutely not. No. NAK. This is unmaintainable crap that does not > belong in a driver at all. > > You should not be hand-initializing skbs. > > > > > +/************************************************************************** > > > + * Allocate and align a max length socket buffer for this device > > + */ > > +inline static struct sk_buff * > > +mspeth_alloc_skb(struct net_device *dev) > > +{ > > + struct sk_buff *skb = NULL; > > + > > +#ifdef CONFIG_MSPETH_SKB_RECYCLE > > + /* try to get an skb from the recycle bin */ > > + spin_lock_bh(&skb_bin.lock); > > + > > + /* check if the bin si empty */ > > + if (skb_bin.recycle_queue) { > > + /* grab an skb from the bin */ > > + skb = skb_bin.recycle_queue; > > + skb_bin.recycle_queue = skb->next; > > + > > + /* we have taken one, so reduce the count */ > > + skb_bin.recycle_count--; > > + skb_bin.recycle_hits++; > > + spin_unlock_bh(&skb_bin.lock); > > + > > + skb->next = NULL; /* must be set to NULL */ > > + skb->truesize = (skb->end - skb->head) + > > + sizeof(struct sk_buff); > > + atomic_set(&skb->users, 1); > > + > > + /* reset the payload pointers */ > > + skb->data = skb->head; > > + skb->tail = skb->head; > > + > > + /* reset shared info fields */ > > + atomic_set(&(skb_shinfo(skb)->dataref), 1); > > + skb_shinfo(skb)->nr_frags = 0; > > +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) > > + skb_shinfo(skb)->gso_size = 0; > > + skb_shinfo(skb)->gso_segs = 0; > > +#endif > > + skb_shinfo(skb)->frag_list = NULL; > > + > > + /* compliance with __dev_alloc_skb */ > > + skb_reserve(skb, NET_SKB_PAD); > > + } else { > > + /* no skb in bin */ > > + spin_unlock_bh(&skb_bin.lock); > > + } > > +#endif /* CONFIG_MSPETH_SKB_RECYCLE */ > > + > > + if (skb == NULL) { > > + /* > > + * We need a bit more than an ethernet frame for the > > + * aligment stuff so preallocate two more. > > + */ > > + skb = dev_alloc_skb(MSP_END_BUFSIZE + 2); > > +#ifdef CONFIG_MSPETH_SKB_RECYCLE > > + skb_bin.recycle_misses++; > > +#endif > > + if (skb == NULL) { > > + printk(KERN_WARNING "MSPETH(alloc_skb) %s: " > > + "cannot allocate skb!\n", dev->name); > > + return NULL; > > + } > > + } > > + > > + /* > > + * Align and fill out fields specific to our device. Notice that > > + * our device is smart about FCS etc ...... > > + */ > > + skb_reserve(skb, 2); > > + skb->dev = dev; > > + skb->ip_summed = CHECKSUM_NONE; > > + > > + return skb; > > +} > > + > > > +/************************************************************************** > > > + * Add the used skb to recycle bin or free it > > + */ > > +inline static void > > +mspeth_free_skb(struct sk_buff *skb) > > +{ > > +#ifdef CONFIG_MSPETH_SKB_RECYCLE > > + /* > > + * First try to recycle the skb. > > + * Check if the skb can be recycled. > > + */ > > + if ((skb->end - skb->head) >= SKBUFF_RECYCLABLE_SIZE && > > + (!skb->destructor) && > > + (!skb->cloned) && > > + (atomic_dec_and_test(&skb->users))) { > > + /* skb is recyclable */ > > + spin_lock_bh(&skb_bin.lock); > > + > > + /* check the bin has room to add our skb */ > > + if (likely(skb_bin.recycle_count < skb_bin.recycle_max)) { > > + /* everything ok; go recycle it */ > > + /* prerequisite before adding to recycle bin */ > > + mspeth_skb_headerinit(skb); > > + > > + /* now we can add the skb to bin */ > > + skb->next = skb_bin.recycle_queue; > > + skb_bin.recycle_queue = skb; > > + > > + /* we have one more skb in bin, increase the > count */ > > + skb_bin.recycle_count++; > > + > > + spin_unlock_bh(&skb_bin.lock); > > + return; > > + } else { > > + /* bin has no room */ > > + spin_unlock_bh(&skb_bin.lock); > > + } > > + } > > +#endif /* CONFIG_MSPETH_SKB_RECYCLE */ > > + > > + /* Can't add skb to recycle bin, so free it in normal way. */ > > + dev_kfree_skb_any(skb); > > +} > > + > > > +/************************************************************************** > > > + * Error reporting functions -- used for debugging mostly > > + */ > > +static void > > +dump_qdesc(struct q_desc *fd) > > +{ > > + printk(KERN_INFO " q_desc(%p): %08x %08x %08x %08x\n", > > + fd, fd->fd.FDNext, fd->fd.FDSystem, > > + fd->fd.FDStat, fd->fd.FDCtl); > > + printk(KERN_INFO " BD: %08x %08x\n", > > + fd->bd.BuffData, fd->bd.BDCtl); > > +} > > + > > +static void > > +print_buf(char *add, int length) > > +{ > > + int i; > > + int len = length; > > + > > + printk(KERN_INFO "print_buf(%08x)(%x)\n", > > + (unsigned int)add, length); > > + > > + if (len > 100) > > + len = 100; > > + for (i = 0; i < len; i++) { > > + printk(KERN_INFO " %2.2X", (unsigned char)add[i]); > > + if (!(i % 16)) > > + printk(KERN_INFO "\n"); > > + } > > + printk(KERN_INFO "\n"); > > +} > > + > > +static void > > +print_eth(int rx, char *add, int len) > > +{ > > + int i; > > + int lentyp; > > + > > + if (rx) > > + printk(KERN_INFO "\n************************** RX packet " > > + "0x%08x ****************************\n", > (u32)add); > > + else > > + printk(KERN_INFO "\n************************** TX packet " > > + "0x%08x ****************************\n", > (u32)add); > > + > > + printk(KERN_INFO "---- ethernet ----\n"); > > + printk(KERN_INFO "==> dest: "); > > + for (i = 0; i < 6; i++) { > > + printk(KERN_INFO "%02x", (unsigned char)add[i]); > > + printk((i < 5) ? KERN_INFO ":" : KERN_INFO "\n"); > > + } > > + > > + printk(KERN_INFO "==> src: "); > > + for (i = 0; i < 6; i++) { > > + printk(KERN_INFO "%02x", (unsigned char)add[i + 6]); > > + printk((i < 5) ? KERN_INFO ":" : KERN_INFO "\n"); > > + } > > + lentyp = ((unsigned char)add[12] << 8) | (unsigned char)add[13]; > > + if (lentyp <= 1500) > > + printk(KERN_INFO "==> len: %d\n", lentyp); > > + else if (lentyp > 1535) > > + printk(KERN_INFO "==> type: 0x%04x\n", lentyp); > > + else > > + printk(KERN_INFO "==> ltyp: 0x%04x\n", lentyp); > > + > > + if (len > 0x100) > > + len = 0x100; > > + > > + for (i = 0; i < ((u32)add & 0x0000000F); i++) > > + printk(KERN_INFO " "); > > + for (i = 0; i < len; i++, add++) { > > + printk(KERN_INFO " %02x", *((unsigned char *)add)); > > + if (!(((u32)add + 1) % 16)) > > + printk(KERN_INFO "\n"); > > + } > > + printk(KERN_INFO "\n"); > > +} > > + > > +/* > > + * Used mainly for debugging unusual conditions signalled by a > > + * fatal error interrupt (eg, IntBLEx). This function stops the > transmit > > + * and receive in an attempt to capture the true state of the queues > > + * at the time of the interrupt. > > + */ > > +#undef MSPETH_DUMP_QUEUES > > +#ifdef MSPETH_DUMP_QUEUES > > +static void > > +dump_blist(struct bl_desc *fd) > > +{ > > + int i; > > + > > + printk(KERN_INFO " bl_desc(%p): %08x %08x %08x %08x\n", > > + fd, fd->fd.FDNext, > > + fd->fd.FDSystem, fd->fd.FDStat, fd->fd.FDCtl); > > + for (i = 0; i < RX_BUF_NUM << 1; i++) > > + printk(KERN_INFO " BD #%d: %08x %08x\n", > > + i, fd->bd[i].BuffData, fd->bd[i].BDCtl); > > +} > > + > > +/* Catalog the received buffers numbers */ > > +static int rx_bdnums[2][RX_BUF_NUM << 2]; > > +static int rx_bdnums_ind[2] = {0, 0}; > > +static inline void > > +catalog_rx_bdnum(int hwnum, int bdnum) > > +{ > > + rx_bdnums_ind[hwnum] = (rx_bdnums_ind[hwnum] + 1) & > > + ((RX_BUF_NUM << 2) - 1); > > + rx_bdnums[hwnum][rx_bdnums_ind[hwnum]] = bdnum; > > +} > > + > > +static void > > +mspeth_dump_queues(struct net_device *dev) > > +{ > > + struct mspeth_priv *lp = netdev_priv(dev); > > + int unit = lp->unit; > > + int i; > > + > > + /* Halt Xmit and Recv to preserve the state of queues */ > > + msp_write(lp, MSPETH_Rx_Ctl, msp_read(lp, MSPETH_Rx_Ctl) & > ~Rx_RxEn); > > + msp_write(lp, MSPETH_Tx_Ctl, msp_read(lp, MSPETH_Tx_Ctl) & > ~Tx_En); > > + > > + /* Print receive queue */ > > + printk(KERN_INFO "Receive Queue\n"); > > + printk(KERN_INFO "=============\n\n"); > > + printk(KERN_INFO "rxfd_base = 0x%08x\n", > > + (unsigned int) lp->rxfd_base); > > + printk(KERN_INFO "rxfd_curr = 0x%08x\n", > > + (unsigned int) lp->rxfd_curr); > > + for (i = 0; i < RX_BUF_NUM; i++) { > > + printk(KERN_INFO "%d:", i); > > + dump_qdesc((struct q_desc *) &lp->rxfd_base[i]); > > + } > > + > > + /* Print transmit queue */ > > + printk(KERN_INFO "\nTransmit Queue\n"); > > + printk(KERN_INFO "==============\n"); > > + printk(KERN_INFO "txfd_base = 0x%08x\n", > > + (unsigned int) lp->txfd_base); > > + printk(KERN_INFO "tx_head = %d, tx_tail = %d\n", > > + lp->tx_head, lp->tx_tail); > > + for (i = 0; i < TX_BUF_NUM; i++) { > > + printk(KERN_INFO "%d:", i); > > + dump_qdesc((struct q_desc *) &lp->txfd_base[i]); > > + } > > + > > + /* Print the free buffer list */ > > + printk(KERN_INFO "\nFree Buffer List\n"); > > + printk(KERN_INFO "================\n"); > > + printk(KERN_INFO "blfd_ptr = 0x%08x\n", (unsigned int) > lp->blfd_ptr); > > + dump_blist(lp->blfd_ptr); > > + > > + /* Print the bdnum history and current index as a reference */ > > + printk(KERN_INFO "\nbdnum history\n"); > > + printk(KERN_INFO "=============\n"); > > + for (i = 0; i < RX_BUF_NUM; i++) { > > + printk(KERN_INFO "\t%d\t%d\t%d\t%d\n", > > + rx_bdnums[unit][4 * i], > > + rx_bdnums[unit][4 * i + 1], > > + rx_bdnums[unit][4 * i + 2], > > + rx_bdnums[unit][4 * i + 3]); > > + } > > + printk(KERN_INFO "Current bdnum index: %d\n", > rx_bdnums_ind[unit]); > > + > > + /* Re-enable Xmit/Recv */ > > + msp_write(lp, MSPETH_Rx_Ctl, msp_read(lp, MSPETH_Rx_Ctl) | > Rx_RxEn); > > + msp_write(lp, MSPETH_Tx_Ctl, msp_read(lp, MSPETH_Tx_Ctl) | Tx_En); > > +} > > + > > +static void > > +mspeth_dump_stats(struct net_device *dev) > > +{ > > + struct mspeth_priv *lp = netdev_priv(dev); > > + > > + printk(KERN_INFO "Interface stats:\n"); > > + printk(KERN_INFO "\ttx_ints: %d\n", lp->lstats.tx_ints); > > + printk(KERN_INFO "\trx_ints: %d\n", lp->lstats.rx_ints); > > + printk(KERN_INFO "\ttx_full: %d\n", lp->lstats.tx_full); > > + printk(KERN_INFO "\tfd_exha: %d\n", lp->lstats.fd_exha); > > +} > > +#else > > +#define mspeth_dump_stats(a) do {} while (0) > > +#define mspeth_dump_queues(a) do {} while (0) > > +#define catalog_rx_bdnum(a, b) do {} while (0) > > +#define dump_blist(a) do {} while (0) > > +#endif /* MSPETH_DUMP_QUEUES */ > > + > > +/* > > + * Actual functions used in the driver are defined here. They should > > + * all start with mspeth. > > + */ > > + > > > +/************************************************************************** > > > + * Check for an mspeth ethernet device and return 0 if there is one. > > + * Also a good time to fill out some of the device fields and do some > > + * preliminary initialization. The mspeth resources are statically > > + * allocated. > > + */ > > + > > +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) > > +int mspeth_probe(struct platform_device *pldev) > > +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) > > +int __init mspeth_probe(struct net_device *dev) > > +#endif > > +{ > > + int unit, hwunit; > > + int i, err; > > + u8 macaddr[8]; > > + struct mspeth_priv *lp; > > + char tmp_str[128]; > > + > > +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) > > + struct net_device *dev = NULL; > > + struct resource *res; > > + void *mapaddr; > > + unit = pldev->id; > > +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) > > + sscanf(dev->name, "eth%d", &unit); > > +#endif > > + > > + /* default return value -- no device here */ > > + err = -ENODEV; > > + > > + /* > > + * Scan the hardware list and associate a logical unit with a > > + * hardware unit it's important to keep these two straight. > > + * hwunit is used for accessing the prom and all hardware. > > + * unit is used when parsing the commandline and any other > > + * uses that might refer to *all* eth devices (not just mspeth > > + * devices) in the system. > > + */ > > + for (i = 0, hwunit = 0; hwunit < MSPETH_MAX_UNITS; hwunit++) { > > + if (identify_enet(hwunit) != FEATURE_NOEXIST) > > + if (i++ == unit) > > + break; > > + } > > + > > + /* Sanity checks on hardware parameters */ > > + if (unit < 0 || hwunit >= MSPETH_MAX_UNITS) > > + goto out_err; > > + > > + /* Retrieve the mac address from the PROM */ > > + snprintf(tmp_str, 128, "ethaddr%d", hwunit); > > + if (get_ethernet_addr(tmp_str, macaddr)) { > > + printk(KERN_WARNING "MSPETH(probe): " > > + "No Mac addr specified for eth%d, hwunit %d\n", > > + unit, hwunit); > > + goto out_err; > > + } > > + > > + if (macaddr[0] & 0x01) { > > + printk(KERN_WARNING "MSPETH(probe): " > > + "Bad Multicast Mac addr specified for eth%d, " > > + "hwunit %d %02x:%02x:%02x:%02x:%02x:%02x\n", > > + unit, hwunit, > > + macaddr[0], macaddr[1], macaddr[2], > > + macaddr[3], macaddr[4], macaddr[5]); > > + goto out_err; > > + } > > + > > +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) > > + dev = alloc_etherdev(sizeof(struct mspeth_priv)); > > + if (!dev) { > > + err = -ENOMEM; > > + goto out_err; > > + } > > + > > + SET_MODULE_OWNER(dev); > > + SET_NETDEV_DEV(dev, &pldev->dev); > > + dev_set_drvdata(&pldev->dev, dev); > > +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) > > + /* Create & initialize the local device structure */ > > + if (dev->priv == NULL) { > > + dev->priv = kmalloc(sizeof(struct mspeth_priv), > > + GFP_KERNEL); > > + if (dev->priv == NULL) > > + goto out_err; > > + } > > +#endif > > + > > + lp = netdev_priv(dev); > > + memset(lp, 0, sizeof(struct mspeth_priv)); > > redundant memset() > > > > +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) > > + lp->dev = &pldev->dev; > > + > > + res = platform_get_resource(pldev, IORESOURCE_MEM, 0); > > + if (!res) { > > + printk(KERN_ERR "MSPETH(probe) %s: " > > + "IOMEM resource not found for eth%d\n", > > + dev->name, unit); > > + goto out_netdev; > > + } > > + > > + /* reserve the memory region */ > > + if (!request_mem_region(res->start, res->end - res->start + 1, > > + cardname)) { > > + printk(KERN_ERR "MSPETH(probe) %s: unable to " > > + "get memory/io address region 0x08%lx\n", > > + dev->name, dev->base_addr); > > + goto out_netdev; > > + } > > + > > + /* remap the memory */ > > + mapaddr = ioremap_nocache(res->start, res->end - res->start + 1); > > + if (!mapaddr) { > > + printk(KERN_WARNING "MSPETH(probe) %s: " > > + "unable to ioremap address 0x%08x\n", > > + dev->name, res->start); > > + goto out_unreserve; > > + } > > + > > + lp->mapaddr = mapaddr; > > + dev->base_addr = res->start; > > + dev->irq = platform_get_irq(pldev, 0); > > +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) > > + /* > > + * Dig out the parameters from the defines and do other > > + * hwunit specific stuff > > + */ > > + switch (hwunit) { > > + case 0: > > + dev->base_addr = MSP_MAC0_BASE; > > + dev->irq = MSP_INT_MAC0; > > + break; > > + case 1: > > + dev->base_addr = MSP_MAC1_BASE; > > + dev->irq = MSP_INT_MAC1; > > + break; > > + case 2: > > + dev->base_addr = MSP_MAC2_BASE; > > + dev->irq = MSP_INT_MAC2; > > + break; > > + default: > > + printk(KERN_WARNING "MSPETH(probe): " > > + "Unsupported hardware unit %d\n", hwunit); > > + goto out_unmap; > > + } > > + > > + /* reserve the memory region */ > > + if (!request_mem_region(dev->base_addr, MSP_MAC_SIZE, cardname)) { > > + printk(KERN_ERR "MSPETH(probe) %s: unable to " > > + "get memory/io address region 0x08%lx\n", > > + dev->name, dev->base_addr); > > + goto out_err; > > + } > > + > > + /* remap the memory */ > > + lp->mapaddr = ioremap_nocache(dev->base_addr, MSP_MAC_SIZE); > > + if (!lp->mapaddr) { > > + printk(KERN_ERR "MSPETH(probe) %s: unable to " > > + "ioremap address 0x%08lx\n", > > + dev->name, dev->base_addr); > > + goto out_unreserve; > > + } > > +#endif > > + > > + /* remap the system reset registers */ > > + lp->rstaddr = ioremap_nocache(MSP_RST_BASE, MSP_RST_SIZE); > > + if (!lp->rstaddr) { > > + printk(KERN_ERR "MSPETH(probe) %s: unable to " > > + "ioremap address 0x%08x\n", > > + dev->name, MSP_RST_BASE); > > + goto out_unmap; > > + } > > + > > + /* set the logical and hardware units */ > > + lp->unit = unit; > > + lp->hwunit = hwunit; > > + > > + /* probe for PHYS attached to this MACs MDIO interface */ > > + if (mspeth_phyprobe(dev)) > > + goto out_unmap; > > + > > + /* parse the environment and command line */ > > + mspeth_init_cmdline(dev); > > + mspeth_init_phyaddr(dev); > > + > > + /* MAC address */ > > + dev->addr_len = ETH_ALEN; > > + for (i = 0; i < dev->addr_len; i++) > > + dev->dev_addr[i] = macaddr[i]; > > + > > + /* register the /proc entry */ > > + snprintf(tmp_str, 128, "pmcmspeth%d", unit); > > + create_proc_read_entry(tmp_str, 0644, proc_net, > > + mspeth_proc_info, dev); > > + > > +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)) && \ > > + (LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)) > > + ether_setup(dev); > > +#endif > > + /* set the various call back functions */ > > + dev->open = mspeth_open; > > + dev->stop = mspeth_close; > > + dev->tx_timeout = mspeth_tx_timeout; > > + dev->watchdog_timeo = TX_TIMEOUT * HZ; > > + dev->hard_start_xmit = mspeth_send_packet; > > + dev->get_stats = mspeth_get_stats; > > + dev->set_multicast_list = mspeth_set_multicast_list; > > +#ifdef CONFIG_MSPETH_NAPI > > + dev->poll = mspeth_poll; > > + dev->weight = NAPI_WEIGHT; > > +#endif > > + > > + /* debugging output */ > > + printk(KERN_INFO > > + "eth%d: found at physical address %lx, irq %d\n", > > + unit, dev->base_addr, dev->irq); > > + if (mspeth_debug > 1) { > > + printk(KERN_INFO "MSPETH(probe) eth%d: " > > + "associated with hardware unit %d\n", > > + unit, hwunit); > > + printk(KERN_INFO "MSPETH(probe) eth%d: assigned " > > + "MAC address %02x:%02x:%02x:%02x:%02x:%02x\n", > > + unit, macaddr[0], macaddr[1], macaddr[2], > > + macaddr[3], macaddr[4], macaddr[5]); > > + printk(KERN_INFO "MSPETH(probe) eth%d: " > > + "phytype %c, phyclk %c\n", > > + unit, identify_enet(hwunit), > > + identify_enetTxD(hwunit)); > > + } > > + > > +#ifdef CONFIG_MSPETH_SKB_RECYCLE > > + /* initialize the socket buffer recycle bin */ > > + init_skbuff_bin(); > > +#endif > > + > > +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) > > + err = register_netdev(dev); > > + if (err) { > > + printk(KERN_WARNING "MSPETH(probe) eth%d: " > > + "unable to register network device\n", unit); > > + goto out_unmap; > > + } > > +#endif > > + > > + return 0; > > + > > +out_unmap: > > + if (lp->rstaddr) > > + iounmap(lp->rstaddr); > > + iounmap(lp->mapaddr); > > + > > +out_unreserve: > > +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) > > + release_mem_region(res->start, res->end - res->start + 1); > > + > > +out_netdev: > > + free_netdev(dev); > > +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0) > > + release_mem_region(dev->base_addr, MSP_MAC_SIZE); > > +#endif > > + > > +out_err: > > + return err; > > +} > > I stopped reviewing here. Will await resend with changes, particularly > removal of all kernel back-compat code > From yoichi_yuasa@tripeaks.co.jp Thu May 10 12:01:01 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 10 May 2007 12:01:03 +0100 (BST) Received: from mo30.po.2iij.NET ([210.128.50.53]:61998 "EHLO mo30.po.2iij.net") by ftp.linux-mips.org with ESMTP id S20022785AbXEJLBB (ORCPT ); Thu, 10 May 2007 12:01:01 +0100 Received: by mo.po.2iij.net (mo30) id l4AB0vLj020623; Thu, 10 May 2007 20:00:57 +0900 (JST) Received: from localhost.localdomain (65.126.232.202.bf.2iij.net [202.232.126.65]) by mbox.po.2iij.net (mbox30) id l4AB0t2A018238 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 10 May 2007 20:00:55 +0900 (JST) Date: Thu, 10 May 2007 20:00:55 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: yoichi_yuasa@tripeaks.co.jp, linux-mips Subject: [PATCH][MIPS] add extern cobalt_board_id Message-Id: <20070510200055.4006b423.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15015 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has added extern cobalt_board_id. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X cobalt/Documentation/dontdiff cobalt-orig/arch/mips/pci/fixup-cobalt.c cobalt/arch/mips/pci/fixup-cobalt.c --- cobalt-orig/arch/mips/pci/fixup-cobalt.c 2007-04-05 17:27:48.585423250 +0900 +++ cobalt/arch/mips/pci/fixup-cobalt.c 2007-04-05 18:05:14.340009750 +0900 @@ -17,9 +17,7 @@ #include #include -#include - -extern int cobalt_board_id; +#include static void qube_raq_galileo_early_fixup(struct pci_dev *dev) { diff -pruN -X cobalt/Documentation/dontdiff cobalt-orig/include/asm-mips/mach-cobalt/cobalt.h cobalt/include/asm-mips/mach-cobalt/cobalt.h --- cobalt-orig/include/asm-mips/mach-cobalt/cobalt.h 2007-04-05 17:28:47.529107000 +0900 +++ cobalt/include/asm-mips/mach-cobalt/cobalt.h 2007-04-05 18:04:30.681281250 +0900 @@ -69,6 +69,8 @@ #define COBALT_BRD_ID_QUBE2 0x5 #define COBALT_BRD_ID_RAQ2 0x6 +extern int cobalt_board_id; + #define PCI_CFG_SET(devfn,where) \ GT_WRITE(GT_PCI0_CFGADDR_OFS, (0x80000000 | (PCI_SLOT (devfn) << 11) | \ (PCI_FUNC (devfn) << 8) | (where))) From yoichi_yuasa@tripeaks.co.jp Thu May 10 14:21:41 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 10 May 2007 14:21:44 +0100 (BST) Received: from mo30.po.2iij.NET ([210.128.50.53]:4429 "EHLO mo30.po.2iij.net") by ftp.linux-mips.org with ESMTP id S20022849AbXEJNVl (ORCPT ); Thu, 10 May 2007 14:21:41 +0100 Received: by mo.po.2iij.net (mo30) id l4ADLcU7078544; Thu, 10 May 2007 22:21:38 +0900 (JST) Received: from localhost.localdomain (70.27.30.125.dy.iij4u.or.jp [125.30.27.70]) by mbox.po.2iij.net (mbox33) id l4ADLaYf090244 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 10 May 2007 22:21:36 +0900 (JST) Date: Thu, 10 May 2007 22:21:35 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: yoichi_yuasa@tripeaks.co.jp, linux-mips Subject: [PATCH][MIPS] separate platform_device registration for VR41xx GPIO Message-Id: <20070510222135.56da1216.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.6 (GTK+ 1.2.10; i486-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15016 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has separated platform_device registration for VR41xx GPIO. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X giu/Documentation/dontdiff giu-orig/arch/mips/vr41xx/common/Makefile giu/arch/mips/vr41xx/common/Makefile --- giu-orig/arch/mips/vr41xx/common/Makefile 2007-05-09 10:41:46.547838750 +0900 +++ giu/arch/mips/vr41xx/common/Makefile 2007-05-09 10:42:15.205629750 +0900 @@ -2,4 +2,4 @@ # Makefile for common code of the NEC VR4100 series. # -obj-y += bcu.o cmu.o icu.o init.o irq.o pmu.o siu.o type.o +obj-y += bcu.o cmu.o giu.o icu.o init.o irq.o pmu.o siu.o type.o diff -pruN -X giu/Documentation/dontdiff giu-orig/arch/mips/vr41xx/common/giu.c giu/arch/mips/vr41xx/common/giu.c --- giu-orig/arch/mips/vr41xx/common/giu.c 1970-01-01 09:00:00.000000000 +0900 +++ giu/arch/mips/vr41xx/common/giu.c 2007-05-09 13:12:54.451129250 +0900 @@ -0,0 +1,122 @@ +/* + * NEC VR4100 series GIU platform device. + * + * Copyright (C) 2007 Yoichi Yuasa + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + */ +#include +#include +#include +#include + +#include +#include +#include + +static struct resource giu_50pins_pullupdown_resource[] __initdata = { + { + .start = 0x0b000100, + .end = 0x0b00011f, + .flags = IORESOURCE_MEM, + }, + { + .start = 0x0b0002e0, + .end = 0x0b0002e3, + .flags = IORESOURCE_MEM, + }, + { + .start = GIUINT_IRQ, + .end = GIUINT_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct resource giu_36pins_resource[] __initdata = { + { + .start = 0x0f000140, + .end = 0x0f00015f, + .flags = IORESOURCE_MEM, + }, + { + .start = GIUINT_IRQ, + .end = GIUINT_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct resource giu_48pins_resource[] __initdata = { + { + .start = 0x0f000140, + .end = 0x0f000167, + .flags = IORESOURCE_MEM, + }, + { + .start = GIUINT_IRQ, + .end = GIUINT_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static int __init vr41xx_giu_add(void) +{ + struct platform_device *pdev; + struct resource *res; + unsigned int num; + int retval; + + pdev = platform_device_alloc("GIU", -1); + if (!pdev) + return -ENOMEM; + + switch (current_cpu_data.cputype) { + case CPU_VR4111: + case CPU_VR4121: + pdev->id = GPIO_50PINS_PULLUPDOWN; + res = giu_50pins_pullupdown_resource; + num = ARRAY_SIZE(giu_50pins_pullupdown_resource); + break; + case CPU_VR4122: + case CPU_VR4131: + pdev->id = GPIO_36PINS; + res = giu_36pins_resource; + num = ARRAY_SIZE(giu_36pins_resource); + break; + case CPU_VR4133: + pdev->id = GPIO_48PINS_EDGE_SELECT; + res = giu_48pins_resource; + num = ARRAY_SIZE(giu_48pins_resource); + break; + default: + retval = -ENODEV; + goto err_free_device; + } + + retval = platform_device_add_resources(pdev, res, num); + if (retval) + goto err_free_device; + + retval = platform_device_add(pdev); + if (retval) + goto err_free_device; + + return 0; + +err_free_device: + platform_device_put(pdev); + + return retval; +} +device_initcall(vr41xx_giu_add); diff -pruN -X giu/Documentation/dontdiff giu-orig/drivers/char/vr41xx_giu.c giu/drivers/char/vr41xx_giu.c --- giu-orig/drivers/char/vr41xx_giu.c 2007-05-09 10:42:06.825106000 +0900 +++ giu/drivers/char/vr41xx_giu.c 2007-05-09 13:12:05.120046250 +0900 @@ -19,18 +19,17 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include #include #include #include -#include #include +#include #include #include +#include #include #include -#include #include #include #include @@ -44,18 +43,6 @@ static int major; /* default is dynamic module_param(major, int, 0); MODULE_PARM_DESC(major, "Major device number"); -#define GIU_TYPE1_START 0x0b000100UL -#define GIU_TYPE1_SIZE 0x20UL - -#define GIU_TYPE2_START 0x0f000140UL -#define GIU_TYPE2_SIZE 0x20UL - -#define GIU_TYPE3_START 0x0f000140UL -#define GIU_TYPE3_SIZE 0x28UL - -#define GIU_PULLUPDOWN_START 0x0b0002e0UL -#define GIU_PULLUPDOWN_SIZE 0x04UL - #define GIUIOSELL 0x00 #define GIUIOSELH 0x02 #define GIUPIODL 0x04 @@ -89,8 +76,6 @@ MODULE_PARM_DESC(major, "Major device nu #define GPIO_HAS_INTERRUPT_EDGE_SELECT 0x0100 static spinlock_t giu_lock; -static struct resource *giu_resource1; -static struct resource *giu_resource2; static unsigned long giu_flags; static unsigned int giu_nr_pins; @@ -234,7 +219,7 @@ void vr41xx_set_irq_trigger(unsigned int giu_set(GIUINTHTSELL, mask); else giu_clear(GIUINTHTSELL, mask); - if (current_cpu_data.cputype == CPU_VR4133) { + if (giu_flags & GPIO_HAS_INTERRUPT_EDGE_SELECT) { switch (trigger) { case IRQ_TRIGGER_EDGE_FALLING: giu_set(GIUFEDGEINHL, mask); @@ -269,7 +254,7 @@ void vr41xx_set_irq_trigger(unsigned int giu_set(GIUINTHTSELH, mask); else giu_clear(GIUINTHTSELH, mask); - if (current_cpu_data.cputype == CPU_VR4133) { + if (giu_flags & GPIO_HAS_INTERRUPT_EDGE_SELECT) { switch (trigger) { case IRQ_TRIGGER_EDGE_FALLING: giu_set(GIUFEDGEINHH, mask); @@ -298,7 +283,6 @@ void vr41xx_set_irq_trigger(unsigned int giu_write(GIUINTSTATH, mask); } } - EXPORT_SYMBOL_GPL(vr41xx_set_irq_trigger); void vr41xx_set_irq_level(unsigned int pin, irq_level_t level) @@ -321,7 +305,6 @@ void vr41xx_set_irq_level(unsigned int p giu_write(GIUINTSTATH, mask); } } - EXPORT_SYMBOL_GPL(vr41xx_set_irq_level); gpio_data_t vr41xx_gpio_get_pin(unsigned int pin) @@ -350,7 +333,6 @@ gpio_data_t vr41xx_gpio_get_pin(unsigned return GPIO_DATA_LOW; } - EXPORT_SYMBOL_GPL(vr41xx_gpio_get_pin); int vr41xx_gpio_set_pin(unsigned int pin, gpio_data_t data) @@ -388,7 +370,6 @@ int vr41xx_gpio_set_pin(unsigned int pin return 0; } - EXPORT_SYMBOL_GPL(vr41xx_gpio_set_pin); int vr41xx_gpio_set_direction(unsigned int pin, gpio_direction_t dir) @@ -438,7 +419,6 @@ int vr41xx_gpio_set_direction(unsigned i return 0; } - EXPORT_SYMBOL_GPL(vr41xx_gpio_set_direction); int vr41xx_gpio_pullupdown(unsigned int pin, gpio_pull_t pull) @@ -477,7 +457,6 @@ int vr41xx_gpio_pullupdown(unsigned int return 0; } - EXPORT_SYMBOL_GPL(vr41xx_gpio_pullupdown); static ssize_t gpio_read(struct file *file, char __user *buf, size_t len, @@ -596,61 +575,40 @@ static const struct file_operations gpio static int __devinit giu_probe(struct platform_device *dev) { - unsigned long start, size, flags = 0; - unsigned int nr_pins = 0, trigger, i, pin; - struct resource *res1, *res2 = NULL; - void *base; + struct resource *res; + unsigned int trigger, i, pin; struct irq_chip *chip; - int retval; + int irq, retval; - switch (current_cpu_data.cputype) { - case CPU_VR4111: - case CPU_VR4121: - start = GIU_TYPE1_START; - size = GIU_TYPE1_SIZE; - flags = GPIO_HAS_PULLUPDOWN_IO; - nr_pins = 50; + switch (dev->id) { + case GPIO_50PINS_PULLUPDOWN: + giu_flags = GPIO_HAS_PULLUPDOWN_IO; + giu_nr_pins = 50; break; - case CPU_VR4122: - case CPU_VR4131: - start = GIU_TYPE2_START; - size = GIU_TYPE2_SIZE; - nr_pins = 36; + case GPIO_36PINS: + giu_nr_pins = 36; break; - case CPU_VR4133: - start = GIU_TYPE3_START; - size = GIU_TYPE3_SIZE; - flags = GPIO_HAS_INTERRUPT_EDGE_SELECT; - nr_pins = 48; + case GPIO_48PINS_EDGE_SELECT: + giu_flags = GPIO_HAS_INTERRUPT_EDGE_SELECT; + giu_nr_pins = 48; break; default: + printk(KERN_ERR "GIU: unknown ID %d\n", dev->id); return -ENODEV; } - res1 = request_mem_region(start, size, "GIU"); - if (res1 == NULL) + res = platform_get_resource(dev, IORESOURCE_MEM, 0); + if (!res) return -EBUSY; - base = ioremap(start, size); - if (base == NULL) { - release_resource(res1); + giu_base = ioremap(res->start, res->end - res->start + 1); + if (!giu_base) return -ENOMEM; - } - - if (flags & GPIO_HAS_PULLUPDOWN_IO) { - res2 = request_mem_region(GIU_PULLUPDOWN_START, GIU_PULLUPDOWN_SIZE, "GIU"); - if (res2 == NULL) { - iounmap(base); - release_resource(res1); - return -EBUSY; - } - } retval = register_chrdev(major, "GIU", &gpio_fops); if (retval < 0) { - iounmap(base); - release_resource(res1); - release_resource(res2); + iounmap(giu_base); + giu_base = NULL; return retval; } @@ -660,11 +618,6 @@ static int __devinit giu_probe(struct pl } spin_lock_init(&giu_lock); - giu_base = base; - giu_resource1 = res1; - giu_resource2 = res2; - giu_flags = flags; - giu_nr_pins = nr_pins; giu_write(GIUINTENL, 0); giu_write(GIUINTENH, 0); @@ -685,22 +638,23 @@ static int __devinit giu_probe(struct pl } - return cascade_irq(GIUINT_IRQ, giu_get_irq); + irq = platform_get_irq(dev, 0); + if (irq < 0 || irq >= NR_IRQS) + return -EBUSY; + + return cascade_irq(irq, giu_get_irq); } static int __devexit giu_remove(struct platform_device *dev) { - iounmap(giu_base); - - release_resource(giu_resource1); - if (giu_flags & GPIO_HAS_PULLUPDOWN_IO) - release_resource(giu_resource2); + if (giu_base) { + iounmap(giu_base); + giu_base = NULL; + } return 0; } -static struct platform_device *giu_platform_device; - static struct platform_driver giu_device_driver = { .probe = giu_probe, .remove = __devexit_p(giu_remove), @@ -712,30 +666,12 @@ static struct platform_driver giu_device static int __init vr41xx_giu_init(void) { - int retval; - - giu_platform_device = platform_device_alloc("GIU", -1); - if (!giu_platform_device) - return -ENOMEM; - - retval = platform_device_add(giu_platform_device); - if (retval < 0) { - platform_device_put(giu_platform_device); - return retval; - } - - retval = platform_driver_register(&giu_device_driver); - if (retval < 0) - platform_device_unregister(giu_platform_device); - - return retval; + return platform_driver_register(&giu_device_driver); } static void __exit vr41xx_giu_exit(void) { platform_driver_unregister(&giu_device_driver); - - platform_device_unregister(giu_platform_device); } module_init(vr41xx_giu_init); diff -pruN -X giu/Documentation/dontdiff giu-orig/include/asm-mips/vr41xx/giu.h giu/include/asm-mips/vr41xx/giu.h --- giu-orig/include/asm-mips/vr41xx/giu.h 2007-05-09 10:43:07.396891500 +0900 +++ giu/include/asm-mips/vr41xx/giu.h 2007-05-09 10:41:52.292197750 +0900 @@ -20,6 +20,15 @@ #ifndef __NEC_VR41XX_GIU_H #define __NEC_VR41XX_GIU_H +/* + * NEC VR4100 series GIU platform device IDs. + */ +enum { + GPIO_50PINS_PULLUPDOWN, + GPIO_36PINS, + GPIO_48PINS_EDGE_SELECT, +}; + typedef enum { IRQ_TRIGGER_LEVEL, IRQ_TRIGGER_EDGE, From anemo@mba.ocn.ne.jp Thu May 10 15:47:38 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 10 May 2007 15:47:41 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:27388 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20022866AbXEJOri (ORCPT ); Thu, 10 May 2007 15:47:38 +0100 Received: from localhost (p2187-ipad03funabasi.chiba.ocn.ne.jp [219.160.82.187]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id D3DDAB6BC; Thu, 10 May 2007 23:47:33 +0900 (JST) Date: Thu, 10 May 2007 23:47:45 +0900 (JST) Message-Id: <20070510.234745.39152979.anemo@mba.ocn.ne.jp> To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: [PATCH] fix build error in atomic64_cmpxchg From: Atsushi Nemoto X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15017 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips Signed-off-by: Atsushi Nemoto --- diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h index 62daa74..1b60624 100644 --- a/include/asm-mips/atomic.h +++ b/include/asm-mips/atomic.h @@ -689,7 +689,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) } #define atomic64_cmpxchg(v, o, n) \ - (((__typeof__((v)->counter)))cmpxchg(&((v)->counter), (o), (n))) + ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n))) #define atomic64_xchg(v, new) (xchg(&((v)->counter), (new))) /** From anemo@mba.ocn.ne.jp Thu May 10 17:02:26 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 10 May 2007 17:02:31 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:54480 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20022873AbXEJQC0 (ORCPT ); Thu, 10 May 2007 17:02:26 +0100 Received: from localhost (p2187-ipad03funabasi.chiba.ocn.ne.jp [219.160.82.187]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id AF0CDB7E1; Fri, 11 May 2007 01:02:22 +0900 (JST) Date: Fri, 11 May 2007 01:02:34 +0900 (JST) Message-Id: <20070511.010234.74566169.anemo@mba.ocn.ne.jp> To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org, sam@ravnborg.org Subject: [PATCH] MIPS: Run checksyscalls for N32 and O32 ABI From: Atsushi Nemoto X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15018 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On 64-bit MIPS, only N64 ABI is checked by default. This patch adds some rules for other ABIs. This results in these warnings at the moment: CALL-N32 /home/git/linux-mips/scripts/checksyscalls.sh :148:2: warning: #warning syscall time not implemented :424:2: warning: #warning syscall select not implemented :440:2: warning: #warning syscall uselib not implemented :856:2: warning: #warning syscall vfork not implemented :868:2: warning: #warning syscall truncate64 not implemented :872:2: warning: #warning syscall ftruncate64 not implemented :876:2: warning: #warning syscall stat64 not implemented :880:2: warning: #warning syscall lstat64 not implemented :884:2: warning: #warning syscall fstat64 not implemented :980:2: warning: #warning syscall getdents64 not implemented :1176:2: warning: #warning syscall fadvise64_64 not implemented :1284:2: warning: #warning syscall fstatat64 not implemented :1364:2: warning: #warning syscall utimensat not implemented CALL-O32 /home/git/linux-mips/scripts/checksyscalls.sh :424:2: warning: #warning syscall select not implemented :856:2: warning: #warning syscall vfork not implemented :1176:2: warning: #warning syscall fadvise64_64 not implemented :1364:2: warning: #warning syscall utimensat not implemented CALL /home/git/linux-mips/scripts/checksyscalls.sh :148:2: warning: #warning syscall time not implemented :424:2: warning: #warning syscall select not implemented :440:2: warning: #warning syscall uselib not implemented :856:2: warning: #warning syscall vfork not implemented :980:2: warning: #warning syscall getdents64 not implemented :1364:2: warning: #warning syscall utimensat not implemented Signed-off-by: Atsushi Nemoto --- diff --git a/arch/mips/Makefile b/arch/mips/Makefile index a68d462..f450066 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -709,3 +709,25 @@ archclean: CLEAN_FILES += vmlinux.32 \ vmlinux.64 \ vmlinux.ecoff + +quiet_cmd_syscalls_n32 = CALL-N32 $< + cmd_syscalls_n32 = $(CONFIG_SHELL) $< $(CC) $(c_flags) -mabi=n32 + +quiet_cmd_syscalls_o32 = CALL-O32 $< + cmd_syscalls_o32 = $(CONFIG_SHELL) $< $(CC) $(c_flags) -mabi=32 + +PHONY += missing-syscalls-n32 missing-syscalls-o32 + +missing-syscalls-n32: scripts/checksyscalls.sh FORCE + $(call cmd,syscalls_n32) + +missing-syscalls-o32: scripts/checksyscalls.sh FORCE + $(call cmd,syscalls_o32) + +archprepare: +ifdef CONFIG_MIPS32_N32 + $(Q)$(MAKE) $(build)=arch/mips missing-syscalls-n32 +endif +ifdef CONFIG_MIPS32_O32 + $(Q)$(MAKE) $(build)=arch/mips missing-syscalls-o32 +endif From stjeanma@pmc-sierra.com Thu May 10 19:40:47 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 10 May 2007 19:40:51 +0100 (BST) Received: from father.pmc-sierra.com ([216.241.224.13]:57808 "HELO father.pmc-sierra.bc.ca") by ftp.linux-mips.org with SMTP id S20022905AbXEJSkr (ORCPT ); Thu, 10 May 2007 19:40:47 +0100 Received: (qmail 21367 invoked by uid 101); 10 May 2007 18:39:34 -0000 Received: from unknown (HELO pmxedge1.pmc-sierra.bc.ca) (216.241.226.183) by father.pmc-sierra.com with SMTP; 10 May 2007 18:39:34 -0000 Received: from pasqua.pmc-sierra.bc.ca (pasqua.pmc-sierra.bc.ca [134.87.183.161]) by pmxedge1.pmc-sierra.bc.ca (8.13.4/8.12.7) with ESMTP id l4AIdXvU014840; Thu, 10 May 2007 11:39:34 -0700 From: Marc St-Jean Received: (from stjeanma@localhost) by pasqua.pmc-sierra.bc.ca (8.13.4/8.12.11) id l4AIdHB9030885; Thu, 10 May 2007 12:39:17 -0600 Date: Thu, 10 May 2007 12:39:17 -0600 Message-Id: <200705101839.l4AIdHB9030885@pasqua.pmc-sierra.bc.ca> To: jeff@garzik.org Subject: [PATCH 10/12] drivers: PMC MSP71xx ethernet driver Cc: akpm@linux-foundation.org, linux-mips@linux-mips.org, netdev@vger.kernel.org Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15019 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: stjeanma@pmc-sierra.com Precedence: bulk X-list: linux-mips [PATCH 10/12] drivers: PMC MSP71xx ethernet driver Patch to add an ethernet driver for the PMC-Sierra MSP71xx devices. Patches 1 through 9 were posted to linux-mips@linux-mips.org as well as other sub-system lists/maintainers as appropriate. This patch has some dependencies on the first few patches in the set. If you would like to receive these or the entire set, please email me. Thanks, Marc Signed-off-by: Marc St-Jean --- Re-posting patch with recommended changes: -Added support for ethtool message levels. -Removed support for linux 2.4. -Changed 6 infinite loops so they now have timeouts. -Replaced some parameter error tests with BUG_ON(). -Removed some extra parentheses. -Removed redundant memset in mspeth_probe(). -Extended autonegotiate timeout by 1/2 second. -Fixed mspeth_init_cmdline() to only output messages for current unit. arch/mips/pmc-sierra/msp71xx/msp_eth.c | 122 + drivers/net/Kconfig | 20 drivers/net/Makefile | 1 drivers/net/pmcmspeth.c | 3014 +++++++++++++++++++++++++++++++++ drivers/net/pmcmspeth.h | 558 ++++++ 5 files changed, 3715 insertions(+) diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 88d924d..831485b 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -201,6 +201,26 @@ config MACB source "drivers/net/arm/Kconfig" +config MSPETH + bool "Ethernet for PMC-Sierra MSP" + depends on NET_ETHERNET && PMC_MSP + ---help--- + This adds support for the the MACs found on the PMC-Sierra MSP devices. + +config MSPETH_NAPI + bool "NAPI support" + depends on MSPETH + help + NAPI(New API) is a technique to improve network performance on Linux. + +config MSPETH_SKB_RECYCLE + bool "Socket Buffer recycling support" + depends on MSPETH + help + Reuse the socket buffers used during the transmission of packets for the receive + operation. This improves performance by reducing kmalloc/kfree operations. + + config MACE tristate "MACE (Power Mac ethernet) support" depends on NET_ETHERNET && PPC_PMAC && PPC32 diff --git a/drivers/net/Makefile b/drivers/net/Makefile index c26ba39..cc90aa0 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -68,6 +68,7 @@ obj-$(CONFIG_SKFP) += skfp/ obj-$(CONFIG_VIA_RHINE) += via-rhine.o obj-$(CONFIG_VIA_VELOCITY) += via-velocity.o obj-$(CONFIG_ADAPTEC_STARFIRE) += starfire.o +obj-$(CONFIG_MSPETH) += pmcmspeth.o obj-$(CONFIG_RIONET) += rionet.o # diff --git a/drivers/net/pmcmspeth.c b/drivers/net/pmcmspeth.c new file mode 100644 index 0000000..98dfafe --- /dev/null +++ b/drivers/net/pmcmspeth.c @@ -0,0 +1,3014 @@ +/* + * PMC-Sierra MSP EVM ethernet driver for linux + * + * Copyright 2005-2007 PMC-Sierra, Inc + * + * Originally based on mspeth.c driver which contains substantially the + * same hardware. + * Based on skelton.c by Donald Becker. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "pmcmspeth.h" + +/************************************************************************** + * The name of the card. Is used for messages and in the requests for + * io regions, irqs and dma channels, versions, etc. Also, various other + * identifying character constants. + */ +static const char cardname[] = "pmcmspeth"; + +/************************************************************************** + * List of PHYs. Each MAC will have a certain number (maybe zero) + * PHYs hanging off the MDIO interface. + */ +static struct mspeth_phy *root_phy_dev = NULL; + + +/************************************************************************** + * Debug flags and ethtool message level support. + */ +static int debug = -1; +#define DEBUG_DEFAULT (NETIF_MSG_DRV | \ + NETIF_MSG_RX_ERR | \ + NETIF_MSG_TX_ERR) +#define DEBUG ((debug >= 0) ? (1<mapaddr + offset); +} + +inline static void +msp_write(struct mspeth_priv *lp, unsigned int offset, u32 val) +{ + __raw_writel(val, lp->mapaddr + offset); +} + +/************************************************************************ + * Read/Write a MDIO register. + */ +static u32 +mspphy_read(struct mspeth_phy *phyptr, int phy_reg) +{ + unsigned long flags; + u32 data; + int i; + + BUG_ON(phyptr == NULL); + + /* protect access with spin lock */ + spin_lock_irqsave(&phyptr->lock, flags); + + for (i = 0; i < PHY_BUSY_CNT && + __raw_readl(phyptr->memaddr + MSPPHY_MII_CTRL) & + MD_CA_BUSY_BIT; i++) + ndelay(100); + + __raw_writel(MD_CA_BUSY_BIT | phyptr->phyaddr << 5 | phy_reg, + phyptr->memaddr + MSPPHY_MII_CTRL); + + for (i = 0; i < PHY_BUSY_CNT && + __raw_readl(phyptr->memaddr + MSPPHY_MII_CTRL) & + MD_CA_BUSY_BIT; i++) + ndelay(100); + + data = __raw_readl(phyptr->memaddr + MSPPHY_MII_DATA); + + /* unlock */ + spin_unlock_irqrestore(&phyptr->lock, flags); + + return data & 0xffff; +} + +static void +mspphy_write(struct mspeth_phy *phyptr, int phy_reg, u32 data) +{ + unsigned long flags; + int i; + + BUG_ON(phyptr == NULL); + + /* protect access with spin lock */ + spin_lock_irqsave(&phyptr->lock, flags); + + for (i = 0; i < PHY_BUSY_CNT && + __raw_readl(phyptr->memaddr + MSPPHY_MII_CTRL) & + MD_CA_BUSY_BIT; i++) + ndelay(100); + + __raw_writel(data, phyptr->memaddr + MSPPHY_MII_DATA); + __raw_writel(MD_CA_BUSY_BIT | MD_CA_Wr | + phyptr->phyaddr << 5 | phy_reg, + phyptr->memaddr + MSPPHY_MII_CTRL); + + for (i = 0; i < PHY_BUSY_CNT && + __raw_readl(phyptr->memaddr + MSPPHY_MII_CTRL) & + MD_CA_BUSY_BIT; i++) + ndelay(100); + + /* unlock */ + spin_unlock_irqrestore(&phyptr->lock, flags); +} + +#ifdef CONFIG_MSPETH_SKB_RECYCLE +/* initialise the recycle bin for skb */ +static void +init_skbuff_bin(void) +{ + spin_lock_init(&skb_bin.lock); + skb_bin.recycle_max = RX_BUF_NUM * 4; /* max size of bin */ + skb_bin.recycle_count = 0; + skb_bin.recycle_queue = NULL; + skb_bin.user_count = 0; +} + +/* free the skb's in recycle bin */ +static void +free_skbuff_bin(void) +{ + spin_lock_bh(&skb_bin.lock); + + /* check any skb's are present in the recycle bin */ + if (skb_bin.recycle_count > 0) { + struct sk_buff *skb; + while (skb_bin.recycle_queue != NULL ) { + skb = skb_bin.recycle_queue->next; + dev_kfree_skb_any(skb_bin.recycle_queue); + skb_bin.recycle_queue = skb; + } + } + + /* reset fields */ + skb_bin.recycle_queue = NULL; + skb_bin.recycle_count = 0; + + spin_unlock_bh(&skb_bin.lock); +} + +inline static void +mspeth_skb_headerinit(struct sk_buff *skb) +{ + /* these are essential before init */ + dst_release(skb->dst); +#ifdef CONFIG_XFRM + secpath_put(skb->sp); +#endif +#ifdef CONFIG_NETFILTER + nf_conntrack_put(skb->nfct); +#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) + nf_conntrack_put_reasm(skb->nfct_reasm); +#endif +#ifdef CONFIG_BRIDGE_NETFILTER + nf_bridge_put(skb->nf_bridge); +#endif +#endif /* CONFIG_NETFILTER */ + + /* + * Now initialise the skb... + * Clear the members till skb->truesize. + */ + memset(skb, 0, offsetof(struct sk_buff, truesize)); +} +#endif /* CONFIG_MSPETH_SKB_RECYCLE */ + +/************************************************************************** + * Allocate and align a max length socket buffer for this device + */ +inline static struct sk_buff * +mspeth_alloc_skb(struct net_device *dev) +{ + struct sk_buff *skb = NULL; + +#ifdef CONFIG_MSPETH_SKB_RECYCLE + /* try to get an skb from the recycle bin */ + spin_lock_bh(&skb_bin.lock); + + /* check if the bin si empty */ + if (skb_bin.recycle_queue) { + /* grab an skb from the bin */ + skb = skb_bin.recycle_queue; + skb_bin.recycle_queue = skb->next; + + /* we have taken one, so reduce the count */ + skb_bin.recycle_count--; + skb_bin.recycle_hits++; + spin_unlock_bh(&skb_bin.lock); + + skb->next = NULL; /* must be set to NULL */ + skb->truesize = (skb->end - skb->head) + + sizeof(struct sk_buff); + atomic_set(&skb->users, 1); + + /* reset the payload pointers */ + skb->data = skb->head; + skb->tail = skb->head; + + /* reset shared info fields */ + atomic_set(&skb_shinfo(skb)->dataref, 1); + skb_shinfo(skb)->nr_frags = 0; + skb_shinfo(skb)->gso_size = 0; + skb_shinfo(skb)->gso_segs = 0; + skb_shinfo(skb)->frag_list = NULL; + + /* compliance with __dev_alloc_skb */ + skb_reserve(skb, NET_SKB_PAD); + } else { + /* no skb in bin */ + spin_unlock_bh(&skb_bin.lock); + } +#endif /* CONFIG_MSPETH_SKB_RECYCLE */ + + if (skb == NULL) { + /* + * We need a bit more than an ethernet frame for the + * aligment stuff so preallocate two more. + */ + skb = dev_alloc_skb(MSP_END_BUFSIZE + 2); +#ifdef CONFIG_MSPETH_SKB_RECYCLE + skb_bin.recycle_misses++; +#endif + if (skb == NULL) { + printk(KERN_WARNING "MSPETH(alloc_skb) %s: " + "cannot allocate skb!\n", dev->name); + return NULL; + } + } + + /* + * Align and fill out fields specific to our device. Notice that + * our device is smart about FCS etc ...... + */ + skb_reserve(skb, 2); + skb->dev = dev; + skb->ip_summed = CHECKSUM_NONE; + + return skb; +} + +/************************************************************************** + * Add the used skb to recycle bin or free it + */ +inline static void +mspeth_free_skb(struct sk_buff *skb) +{ +#ifdef CONFIG_MSPETH_SKB_RECYCLE + /* + * First try to recycle the skb. + * Check if the skb can be recycled. + */ + if ((skb->end - skb->head) >= SKBUFF_RECYCLABLE_SIZE && + !skb->destructor && + !skb->cloned && + atomic_dec_and_test(&skb->users)) { + /* skb is recyclable */ + spin_lock_bh(&skb_bin.lock); + + /* check the bin has room to add our skb */ + if (likely(skb_bin.recycle_count < skb_bin.recycle_max)) { + /* everything ok; go recycle it */ + /* prerequisite before adding to recycle bin */ + mspeth_skb_headerinit(skb); + + /* now we can add the skb to bin */ + skb->next = skb_bin.recycle_queue; + skb_bin.recycle_queue = skb; + + /* we have one more skb in bin, increase the count */ + skb_bin.recycle_count++; + + spin_unlock_bh(&skb_bin.lock); + return; + } else { + /* bin has no room */ + spin_unlock_bh(&skb_bin.lock); + } + } +#endif /* CONFIG_MSPETH_SKB_RECYCLE */ + + /* Can't add skb to recycle bin, so free it in normal way. */ + dev_kfree_skb_any(skb); +} + +/************************************************************************** + * Error reporting functions -- used for debugging mostly + */ +static void +dump_qdesc(struct q_desc *fd) +{ + printk(KERN_INFO " q_desc(%p): %08x %08x %08x %08x\n", + fd, fd->fd.FDNext, fd->fd.FDSystem, + fd->fd.FDStat, fd->fd.FDCtl); + printk(KERN_INFO " BD: %08x %08x\n", + fd->bd.BuffData, fd->bd.BDCtl); +} + +static void +print_buf(char *add, int length) +{ + int i; + int len = length; + + printk(KERN_INFO "print_buf(%08x)(%x)\n", + (unsigned int)add, length); + + if (len > 100) + len = 100; + for (i = 0; i < len; i++) { + printk(KERN_INFO " %2.2X", (unsigned char)add[i]); + if (!(i % 16)) + printk(KERN_INFO "\n"); + } + printk(KERN_INFO "\n"); +} + +static void +print_eth(int rx, char *add, int len) +{ + int i; + int lentyp; + + if (rx) + printk(KERN_INFO "\n************************** RX packet " + "0x%08x ****************************\n", (u32)add); + else + printk(KERN_INFO "\n************************** TX packet " + "0x%08x ****************************\n", (u32)add); + + printk(KERN_INFO "---- ethernet ----\n"); + printk(KERN_INFO "==> dest: "); + for (i = 0; i < 6; i++) { + printk(KERN_INFO "%02x", (unsigned char)add[i]); + printk((i < 5) ? KERN_INFO ":" : KERN_INFO "\n"); + } + + printk(KERN_INFO "==> src: "); + for (i = 0; i < 6; i++) { + printk(KERN_INFO "%02x", (unsigned char)add[i + 6]); + printk((i < 5) ? KERN_INFO ":" : KERN_INFO "\n"); + } + lentyp = ((unsigned char)add[12] << 8) | (unsigned char)add[13]; + if (lentyp <= 1500) + printk(KERN_INFO "==> len: %d\n", lentyp); + else if (lentyp > 1535) + printk(KERN_INFO "==> type: 0x%04x\n", lentyp); + else + printk(KERN_INFO "==> ltyp: 0x%04x\n", lentyp); + + if (len > 0x100) + len = 0x100; + + for (i = 0; i < ((u32)add & 0x0000000F); i++) + printk(KERN_INFO " "); + for (i = 0; i < len; i++, add++) { + printk(KERN_INFO " %02x", *((unsigned char *)add)); + if (!(((u32)add + 1) % 16)) + printk(KERN_INFO "\n"); + } + printk(KERN_INFO "\n"); +} + +/* + * Used mainly for debugging unusual conditions signalled by a + * fatal error interrupt (eg, IntBLEx). This function stops the transmit + * and receive in an attempt to capture the true state of the queues + * at the time of the interrupt. + */ +#undef MSPETH_DUMP_QUEUES +#ifdef MSPETH_DUMP_QUEUES +static void +dump_blist(struct bl_desc *fd) +{ + int i; + + printk(KERN_INFO " bl_desc(%p): %08x %08x %08x %08x\n", + fd, fd->fd.FDNext, + fd->fd.FDSystem, fd->fd.FDStat, fd->fd.FDCtl); + for (i = 0; i < RX_BUF_NUM << 1; i++) + printk(KERN_INFO " BD #%d: %08x %08x\n", + i, fd->bd[i].BuffData, fd->bd[i].BDCtl); +} + +/* Catalog the received buffers numbers */ +static int rx_bdnums[2][RX_BUF_NUM << 2]; +static int rx_bdnums_ind[2] = {0, 0}; +static inline void +catalog_rx_bdnum(int hwnum, int bdnum) +{ + rx_bdnums_ind[hwnum] = (rx_bdnums_ind[hwnum] + 1) & + ((RX_BUF_NUM << 2) - 1); + rx_bdnums[hwnum][rx_bdnums_ind[hwnum]] = bdnum; +} + +static void +mspeth_dump_queues(struct net_device *dev) +{ + struct mspeth_priv *lp = netdev_priv(dev); + int unit = lp->unit; + int i; + + /* Halt Xmit and Recv to preserve the state of queues */ + msp_write(lp, MSPETH_Rx_Ctl, msp_read(lp, MSPETH_Rx_Ctl) & ~Rx_RxEn); + msp_write(lp, MSPETH_Tx_Ctl, msp_read(lp, MSPETH_Tx_Ctl) & ~Tx_En); + + /* Print receive queue */ + printk(KERN_INFO "Receive Queue\n"); + printk(KERN_INFO "=============\n\n"); + printk(KERN_INFO "rxfd_base = 0x%08x\n", + (unsigned int)lp->rxfd_base); + printk(KERN_INFO "rxfd_curr = 0x%08x\n", + (unsigned int)lp->rxfd_curr); + for (i = 0; i < RX_BUF_NUM; i++) { + printk(KERN_INFO "%d:", i); + dump_qdesc((struct q_desc *)&lp->rxfd_base[i]); + } + + /* Print transmit queue */ + printk(KERN_INFO "\nTransmit Queue\n"); + printk(KERN_INFO "==============\n"); + printk(KERN_INFO "txfd_base = 0x%08x\n", + (unsigned int)lp->txfd_base); + printk(KERN_INFO "tx_head = %d, tx_tail = %d\n", + lp->tx_head, lp->tx_tail); + for (i = 0; i < TX_BUF_NUM; i++) { + printk(KERN_INFO "%d:", i); + dump_qdesc((struct q_desc *)&lp->txfd_base[i]); + } + + /* Print the free buffer list */ + printk(KERN_INFO "\nFree Buffer List\n"); + printk(KERN_INFO "================\n"); + printk(KERN_INFO "blfd_ptr = 0x%08x\n", (unsigned int)lp->blfd_ptr); + dump_blist(lp->blfd_ptr); + + /* Print the bdnum history and current index as a reference */ + printk(KERN_INFO "\nbdnum history\n"); + printk(KERN_INFO "=============\n"); + for (i = 0; i < RX_BUF_NUM; i++) { + printk(KERN_INFO "\t%d\t%d\t%d\t%d\n", + rx_bdnums[unit][4 * i], + rx_bdnums[unit][4 * i + 1], + rx_bdnums[unit][4 * i + 2], + rx_bdnums[unit][4 * i + 3]); + } + printk(KERN_INFO "Current bdnum index: %d\n", rx_bdnums_ind[unit]); + + /* Re-enable Xmit/Recv */ + msp_write(lp, MSPETH_Rx_Ctl, msp_read(lp, MSPETH_Rx_Ctl) | Rx_RxEn); + msp_write(lp, MSPETH_Tx_Ctl, msp_read(lp, MSPETH_Tx_Ctl) | Tx_En); +} + +static void +mspeth_dump_stats(struct net_device *dev) +{ + struct mspeth_priv *lp = netdev_priv(dev); + + printk(KERN_INFO "Interface stats:\n"); + printk(KERN_INFO "\ttx_ints: %d\n", lp->lstats.tx_ints); + printk(KERN_INFO "\trx_ints: %d\n", lp->lstats.rx_ints); + printk(KERN_INFO "\ttx_full: %d\n", lp->lstats.tx_full); + printk(KERN_INFO "\tfd_exha: %d\n", lp->lstats.fd_exha); +} +#else +#define mspeth_dump_stats(a) do {} while (0) +#define mspeth_dump_queues(a) do {} while (0) +#define catalog_rx_bdnum(a, b) do {} while (0) +#define dump_blist(a) do {} while (0) +#endif /* MSPETH_DUMP_QUEUES */ + +/* + * Actual functions used in the driver are defined here. They should + * all start with mspeth. + */ + +/************************************************************************** + * Check for an mspeth ethernet device and return 0 if there is one. + * Also a good time to fill out some of the device fields and do some + * preliminary initialization. The mspeth resources are statically + * allocated. + */ + +int mspeth_probe(struct platform_device *pldev) +{ + int unit, hwunit; + int i, err; + u8 macaddr[8]; + struct mspeth_priv *lp; + char tmp_str[128]; + struct net_device *dev = NULL; + struct resource *res; + void *mapaddr; + + unit = pldev->id; + + /* default return value -- no device here */ + err = -ENODEV; + + /* + * Scan the hardware list and associate a logical unit with a + * hardware unit it's important to keep these two straight. + * hwunit is used for accessing the prom and all hardware. + * unit is used when parsing the commandline and any other + * uses that might refer to *all* eth devices (not just mspeth + * devices) in the system. + */ + for (i = 0, hwunit = 0; hwunit < MSPETH_MAX_UNITS; hwunit++) { + if (identify_enet(hwunit) != FEATURE_NOEXIST) + if (i++ == unit) + break; + } + + /* Sanity checks on hardware parameters */ + if (unit < 0 || hwunit >= MSPETH_MAX_UNITS) + goto out_err; + + /* Retrieve the mac address from the PROM */ + snprintf(tmp_str, 128, "ethaddr%d", hwunit); + if (get_ethernet_addr(tmp_str, macaddr)) { + printk(KERN_WARNING "MSPETH(probe): " + "No Mac addr specified for eth%d, hwunit %d\n", + unit, hwunit); + goto out_err; + } + + if (macaddr[0] & 0x01) { + printk(KERN_WARNING "MSPETH(probe): " + "Bad Multicast Mac addr specified for eth%d, " + "hwunit %d %02x:%02x:%02x:%02x:%02x:%02x\n", + unit, hwunit, + macaddr[0], macaddr[1], macaddr[2], + macaddr[3], macaddr[4], macaddr[5]); + goto out_err; + } + + dev = alloc_etherdev(sizeof(struct mspeth_priv)); + if (!dev) { + err = -ENOMEM; + goto out_err; + } + + SET_MODULE_OWNER(dev); + SET_NETDEV_DEV(dev, &pldev->dev); + dev_set_drvdata(&pldev->dev, dev); + + lp = netdev_priv(dev); + lp->dev = &pldev->dev; + + /* set the debug level */ + lp->msg_enable = DEBUG; + + res = platform_get_resource(pldev, IORESOURCE_MEM, 0); + if (!res) { + printk(KERN_ERR "MSPETH(probe) %s: " + "IOMEM resource not found for eth%d\n", + dev->name, unit); + goto out_netdev; + } + + /* reserve the memory region */ + if (!request_mem_region(res->start, res->end - res->start + 1, + cardname)) { + printk(KERN_ERR "MSPETH(probe) %s: unable to " + "get memory/io address region 0x08%lx\n", + dev->name, dev->base_addr); + goto out_netdev; + } + + /* remap the memory */ + mapaddr = ioremap_nocache(res->start, res->end - res->start + 1); + if (!mapaddr) { + printk(KERN_WARNING "MSPETH(probe) %s: " + "unable to ioremap address 0x%08x\n", + dev->name, res->start); + goto out_unreserve; + } + + lp->mapaddr = mapaddr; + dev->base_addr = res->start; + dev->irq = platform_get_irq(pldev, 0); + + /* remap the system reset registers */ + lp->rstaddr = ioremap_nocache(MSP_RST_BASE, MSP_RST_SIZE); + if (!lp->rstaddr) { + printk(KERN_ERR "MSPETH(probe) %s: unable to " + "ioremap address 0x%08x\n", + dev->name, MSP_RST_BASE); + goto out_unmap; + } + + /* set the logical and hardware units */ + lp->unit = unit; + lp->hwunit = hwunit; + + /* probe for PHYS attached to this MACs MDIO interface */ + if (mspeth_phyprobe(dev)) + goto out_unmap; + + /* parse the environment and command line */ + mspeth_init_cmdline(dev); + mspeth_init_phyaddr(dev); + + /* MAC address */ + dev->addr_len = ETH_ALEN; + for (i = 0; i < dev->addr_len; i++) + dev->dev_addr[i] = macaddr[i]; + + /* register the /proc entry */ + snprintf(tmp_str, 128, "pmcmspeth%d", unit); + create_proc_read_entry(tmp_str, 0644, proc_net, + mspeth_proc_info, dev); + + /* set the various call back functions */ + dev->open = mspeth_open; + dev->stop = mspeth_close; + dev->tx_timeout = mspeth_tx_timeout; + dev->watchdog_timeo = TX_TIMEOUT * HZ; + dev->hard_start_xmit = mspeth_send_packet; + dev->get_stats = mspeth_get_stats; + dev->set_multicast_list = mspeth_set_multicast_list; +#ifdef CONFIG_MSPETH_NAPI + dev->poll = mspeth_poll; + dev->weight = NAPI_WEIGHT; +#endif + SET_ETHTOOL_OPS(dev, &mspeth_ethtool_ops); + + /* debugging output */ + if (netif_msg_drv(lp)) + printk(KERN_INFO + "eth%d: found at physical address %lx, irq %d\n", + unit, dev->base_addr, dev->irq); + if (netif_msg_probe(lp)) { + printk(KERN_INFO "MSPETH(probe) eth%d: " + "associated with hardware unit %d\n", + unit, hwunit); + printk(KERN_INFO "MSPETH(probe) eth%d: assigned " + "MAC address %02x:%02x:%02x:%02x:%02x:%02x\n", + unit, macaddr[0], macaddr[1], macaddr[2], + macaddr[3], macaddr[4], macaddr[5]); + printk(KERN_INFO "MSPETH(probe) eth%d: " + "phytype %c, phyclk %c\n", + unit, identify_enet(hwunit), + identify_enetTxD(hwunit)); + } + +#ifdef CONFIG_MSPETH_SKB_RECYCLE + /* initialize the socket buffer recycle bin */ + init_skbuff_bin(); +#endif + + err = register_netdev(dev); + if (err) { + printk(KERN_WARNING "MSPETH(probe) eth%d: " + "unable to register network device\n", unit); + goto out_unmap; + } + + return 0; + +out_unmap: + if (lp->rstaddr) + iounmap(lp->rstaddr); + iounmap(lp->mapaddr); + +out_unreserve: + release_mem_region(res->start, res->end - res->start + 1); + +out_netdev: + free_netdev(dev); + +out_err: + return err; +} + +/************************************************************************** + * Release the mspeth ethernet device and return 0 if there is one. + */ +static int +mspeth_remove(struct platform_device *pldev) +{ + struct net_device *dev = dev_get_drvdata(&pldev->dev); + struct mspeth_priv *lp = netdev_priv(dev); + struct mspeth_phy **tail_pp; + +#ifdef CONFIG_MSPETH_SKB_RECYCLE + skb_bin.user_count--; + if (skb_bin.user_count == 0) { + /* free the recycle bin */ + free_skbuff_bin(); + } +#endif + + for (tail_pp = &root_phy_dev; *tail_pp != NULL; ) { + struct mspeth_phy **next_pp = &(*tail_pp)->next_phy; + kfree(*tail_pp); + tail_pp = next_pp; + } + + unregister_netdev(dev); + + iounmap(lp->rstaddr); + lp->rstaddr = NULL; + iounmap(lp->mapaddr); + lp->mapaddr = NULL; + release_mem_region(dev->base_addr, MSP_MAC_SIZE); + + free_netdev(dev); + + return 0; +} + +/************************************************************************** + * Probe the hardware and fill out the array of PHY control elements + */ +static int +mspeth_phyprobe(struct net_device *dev) +{ + struct mspeth_priv *lp = netdev_priv(dev); + u32 reg1; + int phyaddr; + struct mspeth_phy tmp_phy; + struct mspeth_phy **tail_pp; + + tmp_phy.next_phy = NULL; + tmp_phy.hwunit = lp->hwunit; + tmp_phy.phyaddr = 0; + tmp_phy.memaddr = lp->mapaddr + MSPETH_MD_DATA; + tmp_phy.assigned = false; + tmp_phy.linkup = false; + spin_lock_init(&tmp_phy.lock); + + /* find the tail of the phy list */ + for (tail_pp = &root_phy_dev; *tail_pp != NULL; + tail_pp = &(*tail_pp)->next_phy) {;} + + /* probe the phys and add to list */ + for (phyaddr = 0; phyaddr < MD_MAX_PHY; phyaddr++) { + tmp_phy.phyaddr = phyaddr; + reg1 = mspphy_read(&tmp_phy, MII_BMSR); + + if ((reg1 & BMSR_EXISTS) && + reg1 != 0xffff && reg1 != 0xc000) { + if (netif_msg_probe(lp)) + printk(KERN_INFO "MSPETH(phyprobe): " + "phyaddr = %d, hwindex = %d has " + "phy status 0x%04x\n", + phyaddr, lp->hwunit, reg1); + + *tail_pp = kmalloc(sizeof(struct mspeth_phy), + GFP_KERNEL); + if (!*tail_pp) { + printk(KERN_WARNING "MSPETH(phyprobe) " + "eth%d: unable to allocate phy\n", + lp->hwunit); + return -1; + } + + **tail_pp = tmp_phy; + spin_lock_init(&(*tail_pp)->lock); + tail_pp = &(*tail_pp)->next_phy; + } + } + + return 0; +} + +/************************************************************************** + * Scan the environment and fill the phyaddresses + */ +static void +mspeth_init_phyaddr(struct net_device *dev) +{ + struct mspeth_priv *lp = netdev_priv(dev); + int hwunit; + int phyaddr; + char *phystr; + char name[80]; + + /* defaults */ + lp->phyptr = NULL; + + /* new style enviroment scan to determine the phy addresses */ + sprintf(name, "phyaddr%d", lp->hwunit); + phystr = prom_getenv(name); + + if (netif_msg_probe(lp)) + printk(KERN_INFO "MSPETH(init_phyaddr): " + "hwunit = %d, phystr prom = \"%s\"\n", + lp->hwunit, phystr); + + if (phystr != NULL && + sscanf(phystr, "%d:%d", &hwunit, &phyaddr) == 2 && + hwunit < MSPETH_MAX_UNITS && + (phyaddr < MD_MAX_PHY || phyaddr == MD_DYNAMIC_PHY)) { + /* + * Look through the phylist and find a phy that matches + * the PROM settings + */ + for (lp->phyptr = root_phy_dev; lp->phyptr != NULL; + lp->phyptr = lp->phyptr->next_phy) { + if (lp->phyptr->phyaddr == phyaddr && + lp->phyptr->hwunit == hwunit) { + if (lp->phyptr->assigned) { + lp->phyptr = NULL; + printk(KERN_WARNING + "MSPETH(init_phyaddr) %s: " + "PROM phyaddress is already " + "in use!\ + phystr prom = \"%s\"\n", + dev->name, phystr); + } else + lp->phyptr->assigned = true; + + break; + } + } + } else { + /* + * No acceptable PROM settings so we have to make + * something up + */ + if (lp->option & MSP_OPT_SWITCH) { + /* + * Commandline set us to a switch so no phy + * settings required. Consider changing this later + * so that we can access the registers in the + * switch through MDIO etc. Could be autoprobed too. + */ + } else { + /* + * Search through the list of phys and use the + * first unassigned one. We need some way of + * determining which phy is connected to which + * MAC other than first come, first serve. + * + * stjeanma, 2006-02-13: + * We must keep all PHYs on a global list for + * boards which have all PHY MDIOs hooked to a + * single MAC. However for boards with PHYs hooked + * up to inidvidual MACs, we must first search the + * list for PHYs belonging to the MAC being + * initialized. + */ + for (lp->phyptr = root_phy_dev; lp->phyptr != NULL; + lp->phyptr = lp->phyptr->next_phy) { + if (!lp->phyptr->assigned && + lp->phyptr->hwunit == lp->hwunit) { + lp->phyptr->assigned = true; + break; + } + } + + if (lp->phyptr == NULL) { + for (lp->phyptr = root_phy_dev; + lp->phyptr != NULL; + lp->phyptr = lp->phyptr->next_phy) { + if (!lp->phyptr->assigned) { + lp->phyptr->assigned = true; + break; + } + } + } + } + + /* rudimentary error checking */ + if (phystr != NULL) + printk(KERN_WARNING "MSPETH(init_phyaddr) " + "eth%d: bad phyaddr value %s\n", + lp->unit, phystr); + } +} + +/************************************************************************** + * Scan the environment to get the kernel command line options + * for ethernet. + */ +static void +mspeth_init_cmdline(struct net_device *dev) +{ + struct mspeth_priv *lp = netdev_priv(dev); + int index; + int unit; + char c = ' '; + char command_line[COMMAND_LINE_SIZE]; + char *ptr = command_line; + char *ethptr = NULL; + + /* default options */ + lp->option = MSP_OPT_AUTO; + + /* scan the command line looking for static configurations */ + strcpy(command_line, prom_getcmdline()); + while (c != '\0') { + if (c != ' ' || memcmp(ptr, "ip=", 3) != 0) { + c = *ptr++; + continue; + } + + c = *ptr++; + index = 0; + unit = -1; + + while (index < 8) { + c = *ptr++; + + if (c == '\0' || c == ' ') { + if (index == 7) { + index++; + *--ptr = '\0'; + ptr++; + } + break; + } + + if (c == ':') { + index++; + if (index == 5) { + if (memcmp(ptr, "eth", 3) != 0) + break; + + ethptr = &ptr[3]; + ptr = ethptr; + } + + if (index == 6) { + *--ptr = '\0'; + ptr++; + unit = simple_strtol( + ethptr, NULL, 0); + } + + if (index == 7) { + ethptr = ptr; + } + + if (index == 8) { + *--ptr = '\0'; + ptr++; + } + } + } + + if (index < 8 || unit < 0 || unit > MSPETH_MAX_UNITS) + continue; + + /* check to see if this our option and parse them out */ + if (lp->unit == unit) { + if (memcmp(ethptr, "100fs", 5) == 0) + /* 100M full-duplex switch */ + lp->option = MSP_OPT_100M | MSP_OPT_FDUP | + MSP_OPT_SWITCH; + else if (memcmp(ethptr, "100hs", 5) == 0) + /* 100M half-duplex switch */ + lp->option = MSP_OPT_100M | MSP_OPT_HDUP | + MSP_OPT_SWITCH; + else if (memcmp(ethptr, "10fs", 4) == 0) + /* 10M full-duplex switch */ + lp->option = MSP_OPT_10M | MSP_OPT_FDUP | + MSP_OPT_SWITCH; + else if (memcmp(ethptr, "10hs", 4) == 0) + /* 10M half-duplex switch */ + lp->option = MSP_OPT_100M | MSP_OPT_HDUP | + MSP_OPT_SWITCH; + else if (memcmp(ethptr, "100f", 4) == 0) + /* 100M full-duplex */ + lp->option = MSP_OPT_100M | MSP_OPT_FDUP; + else if (memcmp(ethptr, "100h", 4) == 0) + /* 100M half-duplex */ + lp->option = MSP_OPT_100M | MSP_OPT_HDUP; + else if (memcmp(ethptr, "10f", 3) == 0) + /* 10M full-duplex */ + lp->option = MSP_OPT_10M | MSP_OPT_FDUP; + else if (memcmp(ethptr, "10h", 3) == 0) + /* 100M half-duplex */ + lp->option = MSP_OPT_10M | MSP_OPT_HDUP; + + if (netif_msg_probe(lp)) + printk(KERN_INFO "MSPETH(init_cmdline) eth%d: " + "boot = %s, option = %02x\n", + lp->unit, command_line, lp->option); + } + } +} + +/************************************************************************** + * Reset the phy + */ +static void +mspeth_phy_reset(struct net_device *dev) +{ + struct mspeth_priv *lp = netdev_priv(dev); + u32 id0, id1; + int i; + + if (lp->phyptr == NULL) + return; + + /* reset the phy */ + mspphy_write(lp->phyptr, MII_BMCR, BMCR_RESET); + for (i = 0; i < 10 && + (mspphy_read(lp->phyptr, MII_BMCR) & BMCR_RESET) != 0; i++) + udelay(100); + + if (netif_msg_hw(lp)) { + id0 = mspphy_read(lp->phyptr, MII_PHYSID1); + id1 = mspphy_read(lp->phyptr, MII_PHYSID2); + printk(KERN_INFO "MSPETH(phy_reset) eth%d: " + "PHY ID %04x %04x\n", lp->unit, id0, id1); + printk(KERN_INFO "MSPETH(phy_reset) eth%d: " + "speed = %d, duplex = %s\n", lp->unit, lp->speed, + lp->fullduplex ? "FULL" : "HALF"); + } +} + +/************************************************************************** + * Initialize the phy -- set the speed and duplex. Wait for + * autonegotiation to complete. If it doesn't then force the + * renegotiation. If *that* fails then reset the phy and try + * again. Finally just make some assumptions. If autonegotiation + * is disabled then just force values. + */ +static void +mspeth_phy_init(struct net_device *dev) +{ + struct mspeth_priv *lp = netdev_priv(dev); + u32 ctl, neg_result; + int i; + enum {AUTONEG, AUTONEG_FORCE, PHYRESET} auto_status; + char *link_type; + char *link_stat; + + /* check for defaults and autonegotiate */ + if (lp->option == MSP_OPT_AUTO) { + /* + * Make sure the autonegotiation is enabled and then wait + * for the autonegotion to complete. + */ + link_type = "Autoneg"; + for (auto_status = AUTONEG; auto_status <= PHYRESET; + auto_status++) { + /* + * Run through all the various autonegotion methods + * until we fail + */ + switch (auto_status) { + case AUTONEG: + mspphy_write(lp->phyptr, MII_BMCR, + BMCR_ANENABLE); + break; + case AUTONEG_FORCE: + printk(KERN_INFO "MSPETH(phy_init) " + "%s: Forcing autonegotiation\n", + dev->name); + mspphy_write(lp->phyptr, MII_BMCR, + BMCR_ANENABLE | BMCR_ANRESTART); + break; + case PHYRESET: + printk(KERN_INFO "MSPETH(phy_init) " + "%s: Resetting phy\n", dev->name); + mspphy_write(lp->phyptr, MII_BMCR, + BMCR_RESET); + for (i = 0; i < 10 && + (mspphy_read(lp->phyptr, MII_BMCR) & + BMCR_RESET) != 0; i++) + udelay(100); + mspphy_write(lp->phyptr, MII_BMCR, + BMCR_ANENABLE | BMCR_ANRESTART); + break; + default: + printk(KERN_WARNING "MSPETH(phy_init) " + "%s: Unknown autonegotation mode?\n", + dev->name); + return; + } + + /* + * Autoneg should be underway, so lets loop + * and wait for it to exit. + */ + if (netif_msg_link(lp)) + printk(KERN_INFO + "%s: Auto Negotiation...", dev->name); + + for (i = 0; i < 2000 && + !(mspphy_read(lp->phyptr, MII_BMSR) & + BMSR_ANEGCOMPLETE); i++) + mdelay(1); + if (i == 2500) { + /* + * Autonegotiation failed to complete so + * go to next level of negotiation. + */ + if (netif_msg_link(lp)) + printk(KERN_INFO " failed.\n"); + continue; + } + + /* must have succeeded so we can set the speed, etc */ + if (netif_msg_link(lp)) + printk(KERN_INFO " done.\n"); + neg_result = mspphy_read(lp->phyptr, MII_LPA); + if (neg_result & (LPA_100FULL | LPA_100HALF)) + lp->speed = 100; + else + lp->speed = 10; + + if (neg_result & (LPA_100FULL | LPA_10FULL)) + lp->fullduplex = true; + else + lp->fullduplex = false; + break; + } + + /* + * Check to see if *everything* failed and try to set + * some default values. + */ + if (auto_status > PHYRESET) { + printk(KERN_WARNING "Autonegotion failed. " + "Assuming 10Mbps, half-duplex.\n"); + link_type = "Autoneg (failed)"; + lp->speed = 10; + lp->fullduplex = false; + } + } else { + /* + * If speed and duplex are statically configured then + * set that here. + */ + link_type = "Static"; + ctl = 0; + if (lp->option & MSP_OPT_100M) { + lp->speed = 100; + ctl |= BMCR_SPEED100; + } else { + lp->speed = 10; + ctl &= ~BMCR_SPEED100; + } + + if (lp->option & MSP_OPT_FDUP) { + lp->fullduplex = true; + ctl |= BMCR_FULLDPLX; + } else { + lp->fullduplex = false; + ctl &= ~BMCR_FULLDPLX; + } + + /* stjeanma: Don't write to the PHY for a switch */ + if (!(lp->option & MSP_OPT_SWITCH)) + mspphy_write(lp->phyptr, MII_BMCR, ctl); + } + + if (!(lp->option & MSP_OPT_SWITCH)) { + /* + * Wait for a little bit to see if we've got a carrier + * -- don't go crazy though. + */ + if (netif_msg_link(lp)) + printk(KERN_INFO "%s: Waiting for carrier ...", + dev->name); + for (i = 0; i < 1000 && + !(mspphy_read(lp->phyptr, MII_BMSR) & + BMSR_LSTATUS); i++) + mdelay(1); + + if (i == 1000) { + if (netif_msg_link(lp)) + printk(KERN_INFO " no carrier.\n"); + lp->phyptr->linkup = false; + netif_carrier_off(dev); + link_stat = "Link down"; + } else { + if (netif_msg_link(lp)) + printk(KERN_INFO " carrier detected.\n"); + lp->phyptr->linkup = true; + netif_carrier_on(dev); + link_stat = "Link up"; + } + } else { + + /* + * Assume we're connected. If we're using a switch + * we always will be. + */ + if (netif_msg_link(lp)) + printk(KERN_INFO "%s: Using internal switch\n", + dev->name); + + /* stjeanma: PHY might not be allocated for a switch */ + if (lp->phyptr != NULL) + lp->phyptr->linkup = true; + + /* Turn on the carrier */ + netif_carrier_on(dev); + link_stat = "Link up"; + } + + /* + * Configure the MAC with the duplex setting + * -- it doesn't care about speed. + */ + if (lp->fullduplex) + msp_write(lp, MSPETH_MAC_Ctl, + msp_read(lp, MSPETH_MAC_Ctl) | MAC_FullDup); + else + msp_write(lp, MSPETH_MAC_Ctl, + msp_read(lp, MSPETH_MAC_Ctl) & ~MAC_FullDup); + + if (netif_msg_link(lp)) + printk(KERN_INFO + "%s: %s, %s, linkspeed %dMbps, %s Duplex\n", + dev->name, link_type, link_stat, lp->speed, + lp->fullduplex ? "Full" : "Half"); +} + +/************************************************************************** + * Check the link for a carrier when the link check timer expires. + * If the link is down and it has been down for a while (at least 1 + * timer delay) then change the upper layer link state to match. + * Do a soft-restart if we're bringing the link up. Reschedule the + * timer of course. + */ +static void +mspeth_link_check(unsigned long data) +{ + struct net_device *dev = (struct net_device *)data; + struct mspeth_priv *lp = netdev_priv(dev); + enum {LINKGOOD, LINKBAD, LINKUNKNOWN} linkstatus; + + /* check the current link status */ + linkstatus = LINKUNKNOWN; + if (mspphy_read(lp->phyptr, MII_BMSR) & BMSR_LSTATUS) { + if (lp->phyptr->linkup) + linkstatus = LINKGOOD; + lp->phyptr->linkup = true; + } else { + if (!lp->phyptr->linkup) + linkstatus = LINKBAD; + lp->phyptr->linkup = false; + } + + /* check the upper layer status */ + if (netif_carrier_ok(dev)) { + /* + * Upper layer thinks we're ok but the link is bad, so + * take the link down. + */ + if (linkstatus == LINKBAD) { + if (netif_msg_link(lp)) + printk(KERN_INFO "MSPETH(link_check) %s: " + "NO LINK DETECTED\n", dev->name); + netif_stop_queue(dev); + netif_carrier_off(dev); + } + } else { + /* + * Upper layer thinks we're broken but we've recovered so + * do a soft-restart and bring the link back up. + */ + if (linkstatus == LINKGOOD) { + if (netif_msg_link(lp)) + printk(KERN_INFO "MSPETH(link_check) %s: " + "LINK DETECTED\n", dev->name); + mspeth_soft_restart(dev); + netif_carrier_on(dev); + } + } + + /* reschedule the timer */ + lp->link_timer.expires = jiffies + HZ / LINK_DELAY_DIV; + add_timer(&lp->link_timer); +} + +/************************************************************************** + * Reset the hardware and restore defaults. Queues etc must be + * cleared afterwards, although we don't change the pointers so + * they don't need to be reallocated. + */ +static void +mspeth_mac_reset(struct net_device *dev) +{ + struct mspeth_priv *lp = netdev_priv(dev); + int i; + u32 rstpat; + + /* hardware reset */ + switch (lp->hwunit) { + case 0: + rstpat = MSP_EA_RST; + break; + case 1: + rstpat = MSP_EB_RST; + break; + case 2: + rstpat = MSP_EC_RST; + break; + default: + printk(KERN_WARNING + "MSPETH(mac_reset) %s: Unsupported hwunit %d\n", + dev->name, lp->hwunit); + return; + } + + __raw_writel(rstpat, lp->rstaddr + MSPRST_SET); + mdelay(100); + __raw_writel(rstpat, lp->rstaddr + MSPRST_CLR); + + /* Wait for the MAC to come out of reset */ + for (i = 0; i < 10; i++) { + if ((__raw_readl(lp->rstaddr + MSPRST_STS) & rstpat) == 0) + break; + ndelay(100); + } + + if (netif_msg_hw(lp)) + printk(KERN_INFO "MSPETH(mac_reset) eth%d", lp->unit); + + /* initialize registers to default value */ + msp_write(lp, MSPETH_MAC_Ctl, 0); + msp_write(lp, MSPETH_DMA_Ctl, 0); + msp_write(lp, MSPETH_TxThrsh, 0); + msp_write(lp, MSPETH_TxPollCtr, 0); + msp_write(lp, MSPETH_RxFragSize, 0); + msp_write(lp, MSPETH_Int_En, 0); + msp_write(lp, MSPETH_FDA_Bas, 0); + msp_write(lp, MSPETH_FDA_Lim, 0); + msp_write(lp, MSPETH_Int_Src, 0xffffffff); /* Write 1 to clear */ + msp_write(lp, MSPETH_ARC_Ctl, 0); + msp_write(lp, MSPETH_Tx_Ctl, 0); + msp_write(lp, MSPETH_Rx_Ctl, 0); + msp_write(lp, MSPETH_ARC_Ena, 0); + (void)msp_read(lp, MSPETH_Miss_Cnt); /* Read to clear */ +} + +/************************************************************************** + * Initialize the hardware and start the DMA/MAC RX/TX. The queues must + * be setup before this is called. + */ +static void +mspeth_mac_init(struct net_device *dev) +{ + struct mspeth_priv *lp = netdev_priv(dev); + int flags; + + /* do not interrupt me while I'm configuring the MAC */ + local_irq_save(flags); + + /* configure the BRCTL RMII registers if we're an RMII device */ + if (identify_enet(lp->hwunit) == ENET_RMII) { + u32 brctl = msp_read(lp, MSPETH_BCTRL_Reg) & ~RMII_Reset; + if (identify_enetTxD(lp->hwunit) == ENETTXD_RISING) + brctl |= RMII_ClkRising; + if (identify_enetTxD(lp->hwunit) == ENETTXD_FALLING) + brctl &= ~RMII_ClkRising; + if (lp->speed == 10) + brctl |= RMII_10MBIT; + else + brctl &= ~RMII_10MBIT; + msp_write(lp, MSPETH_BCTRL_Reg, brctl); + } + + /* set some device structure parameters */ + dev->tx_queue_len = TX_BUF_NUM; + + /* load station address to ARC */ + mspeth_set_arc_entry(dev, ARC_ENTRY_SOURCE, dev->dev_addr); + + /* Enable ARC (broadcast and unicast) */ + msp_write(lp, MSPETH_ARC_Ena, ARC_Ena_Bit(ARC_ENTRY_SOURCE)); + msp_write(lp, MSPETH_ARC_Ctl, ARC_CompEn | ARC_BroadAcc); + + /* configure DMA */ + msp_write(lp, MSPETH_DMA_Ctl, DMA_CTL_CMD); + + /* configure the RX/TX mac */ + msp_write(lp, MSPETH_RxFragSize, 0); + msp_write(lp, MSPETH_TxPollCtr, TX_POLL_CNT); + msp_write(lp, MSPETH_TxThrsh, TX_THRESHOLD); + + /* zero and enable the interrupts */ + lp->fatal_icnt = 0; + msp_write(lp, MSPETH_Int_En, INT_EN_CMD); + + /* + * Set queues + * + * hammtrev, 2005-11-25: + * Using the formula used in the old driver, which gives a + * little bit less than (RX_BUF_NUM - 1) << 5, allowing for more + * buffer descriptors attached to a frame descriptor. + */ + msp_write(lp, MSPETH_FDA_Bas, (u32)lp->rxfd_base); + msp_write(lp, MSPETH_FDA_Lim, (RX_BUF_NUM - 1) << 5); + + /* + * Activation method: + * First, enable the MAC Transmitter and the DMA Receive circuits. + * Then enable the DMA Transmitter and the MAC Receive circuits. + */ + /* start DMA receiver */ + msp_write(lp, MSPETH_BLFrmPtr, (u32)lp->blfd_ptr); + /* start MAC receiver */ + msp_write(lp, MSPETH_Rx_Ctl, RX_CTL_CMD); + + /* start the DMA transmitter */ + msp_write(lp, MSPETH_TxFrmPtr, (u32)lp->txfd_base); + +#ifdef CONFIG_MSPETH_NAPI + /* start the MAC transmitter */ + msp_write(lp, MSPETH_Tx_Ctl, TX_CTL_CMD & ~Tx_EnComp); +#else + msp_write(lp, MSPETH_Tx_Ctl, TX_CTL_CMD); +#endif /* CONFIG_MSPETH_NAPI */ + + /* turn the interrupts back on */ + local_irq_restore(flags); +} + +/************************************************************************** + * Start the Address Recognition circuit. It must be initialized with + * address of the device (which can be changed in the PROM). + */ +static void +mspeth_set_arc_entry(struct net_device *dev, int index, unsigned char *addr) +{ + int arc_index = index * 6; + unsigned long arc_data; + unsigned long saved_addr; + struct mspeth_priv *lp = netdev_priv(dev); + + saved_addr = msp_read(lp, MSPETH_ARC_Adr); + + if (netif_msg_hw(lp)) { + int i; + printk(KERN_INFO "MSPETH(set_arc_entry) %s: " + "arc %d:", dev->name, index); + for (i = 0; i < 6; i++) + printk(KERN_INFO " %02x", addr[i]); + printk(KERN_INFO "\n"); + } + + if (index & 1) { + /* read modify write */ + msp_write(lp, MSPETH_ARC_Adr, arc_index - 2); + arc_data = msp_read(lp, MSPETH_ARC_Data) & 0xffff0000; + arc_data |= addr[0] << 8 | addr[1]; + msp_write(lp, MSPETH_ARC_Data, arc_data); + + /* write whole word */ + msp_write(lp, MSPETH_ARC_Adr, arc_index + 2); + arc_data = (addr[2] << 24) | (addr[3] << 16) | + (addr[4] << 8) | addr[5]; + msp_write(lp, MSPETH_ARC_Data, arc_data); + } else { + /* write whole word */ + msp_write(lp, MSPETH_ARC_Adr, arc_index); + arc_data = (addr[0] << 24) | (addr[1] << 16) | + (addr[2] << 8) | addr[3]; + msp_write(lp, MSPETH_ARC_Data, arc_data); + + /* read modify write */ + msp_write(lp, MSPETH_ARC_Adr, arc_index + 4); + arc_data = msp_read(lp, MSPETH_ARC_Data) & 0x0000ffff; + arc_data |= addr[4] << 24 | (addr[5] << 16); + msp_write(lp, MSPETH_ARC_Data, arc_data); + } + + if (netif_msg_hw(lp)) { + int i; + for (i = arc_index / 4; i < arc_index / 4 + 2; i++) { + msp_write(lp, MSPETH_ARC_Adr, i * 4); + printk(KERN_INFO "arc 0x%x: %08x\n", + i * 4, msp_read(lp, MSPETH_ARC_Data)); + } + } + msp_write(lp, MSPETH_ARC_Adr, saved_addr); +} + +/************************************************************************** + * Initialize the RX/TX queues and the free buffer list. This routine + * allocates memory and care must be taken to free the memory when it + * is no longer required + */ +static bool +mspeth_init_queues(struct net_device *dev) +{ + struct mspeth_priv *lp = netdev_priv(dev); + int i, size; + u32 tmp_addr; + struct sk_buff *skb; + dma_addr_t dma_skb; + + /* + * The queue structure allocates individual buffers large enough + * to hold an entire packet. There is no packing so each FD + * requires a single BD. There is one q_desc (an FD and a BD, + * 16-byte aligned) for each packet recieved and the same for + * each packet to transmit. The list of free buffers has one + * FD and an arbitrary number of BDs following it (but even). + * There is one BD for each RX buffer. + */ + + /* + * TODO: Need to add some error checking here for reentry into + * this routine. + */ + /* descriptors for the rx/tx buffers and the buffer list */ + size = (RX_BUF_NUM + TX_BUF_NUM) * sizeof(struct q_desc) + + sizeof(struct bl_desc); + + /* test for allocation requirements */ + if (lp->fd_base == NULL) { + /* add enough margin to align to 16-byte boundary */ + lp->fd_base = kmalloc(size + (L1_CACHE_BYTES - 1), + GFP_KERNEL); + if (lp->fd_base == NULL) { + printk(KERN_ERR "MSPETH(init_queues) %s: " + "Cannot allocate space for descriptors!\n", + dev->name); + return false; + } + + /* + * Move frame descriptors to uncached addresses. This + * prevents spurious IntBLEx interrupts. + */ + lp->fd_base = (void*)KSEG1ADDR((u32)lp->fd_base); + memset(lp->fd_base, 0, size + (L1_CACHE_BYTES - 1)); + } + + /* + * stjeanma, 2006-01-26: + * Add instead of subtract and take into account the + * architecture's cache line size. + */ + tmp_addr = ((u32)lp->fd_base + (L1_CACHE_BYTES - 1)) & + ~(L1_CACHE_BYTES - 1); + + /* allocate the RX queue (aka free descriptor area) */ + lp->rxfd_base = (struct q_desc *)tmp_addr; + lp->rxfd_curr = lp->rxfd_base; + tmp_addr += RX_BUF_NUM * sizeof(struct q_desc); + + /* + * Initialize the RX queue (these values are mostly + * overwritten by the MAC). + */ + for (i = 0; i < RX_BUF_NUM; i++) { + lp->rxfd_base[i].fd0.FDNext = 0x00000000; + lp->rxfd_base[i].fd0.FDSystem = 0x00000000; + lp->rxfd_base[i].fd0.FDStat = 0x00000000; + lp->rxfd_base[i].fd0.FDCtl = FD_CownsFD; + lp->rxfd_base[i].fd1.FDNext = 0x00000000; + lp->rxfd_base[i].fd1.FDSystem = 0x00000000; + lp->rxfd_base[i].fd1.FDStat = 0x00000000; + lp->rxfd_base[i].fd1.FDCtl = FD_CownsFD; + } + + /* initialize the actual TX sk_buff pointers */ + if (lp->txfd_base != NULL) { + for (i = 0; i < TX_BUF_NUM; i++) { + skb = (struct sk_buff *)lp->txfd_base[i].fd.FDSystem; +#ifdef CONFIG_DMA_NONCOHERENT + dma_skb = lp->txfd_base[i].fd1.FDStat; + if (dma_skb != 0x00000000) { + lp->txfd_base[i].fd1.FDStat = 0x00000000; + /* unmap any dma pointers */ + dma_unmap_single(lp->dev, dma_skb, + skb->len, DMA_BIDIRECTIONAL); + } +#endif + if (skb != NULL) { + lp->txfd_base[i].fd.FDSystem = 0x00000000; + dev_kfree_skb_any(skb); + } + } + } + + /* allocate the TX queue */ + lp->txfd_base = (struct q_desc *)tmp_addr; + lp->tx_head = lp->tx_tail = 0; + tmp_addr += TX_BUF_NUM * sizeof(struct q_desc); + + /* initialize the TX queue */ + for (i = 0; i < TX_BUF_NUM; i++) { + lp->txfd_base[i].fd.FDNext = (u32)(&lp->txfd_base[i + 1]); + lp->txfd_base[i].fd.FDSystem = 0x00000000; + lp->txfd_base[i].fd.FDStat = 0x00000000; + lp->txfd_base[i].fd.FDCtl = 0x00000000; + } + lp->txfd_base[TX_BUF_NUM - 1].fd.FDNext = (u32)(&lp->txfd_base[0]); + + /* initialize the buffer list FD */ + lp->blfd_ptr = (struct bl_desc *)tmp_addr; + lp->blfd_ptr->fd.FDNext = (u32)lp->blfd_ptr; + lp->blfd_ptr->fd.FDCtl = (RX_BUF_NUM << 1) | FD_CownsFD; + + /* allocate the RX sk_buff array */ + if (lp->rx_skbp == NULL) { + lp->rx_skbp = (struct sk_buff **)kmalloc( + (RX_BUF_NUM << 1) * sizeof(struct sk_buff *), + GFP_KERNEL); + if (lp->rx_skbp == NULL) { + printk(KERN_ERR "MSPETH(init_queues) %s: " + "Cannot allocate the array of " + "sk_buff pointers!\n", dev->name); + return false; + } + + for (i = 0; i < RX_BUF_NUM << 1; i++) + lp->rx_skbp[i] = NULL; + } + + /* initialize the actual RX sk_buff pointers */ + for (i = 0; i < RX_BUF_NUM << 1; i++) { + /* free up old sk_buffs */ + skb = lp->rx_skbp[i]; + if (skb != NULL) { + lp->rx_skbp[i] = NULL; + dev_kfree_skb_any(skb); + } + + /* allocate and align the skb */ + skb = dev_alloc_skb(MSP_END_BUFSIZE + 2); + if (skb == NULL) { + printk(KERN_ERR "MSPETH(init_queues) %s: " + "Cannot allocate the sk_buffs!\n", dev->name); + return false; + } + lp->rx_skbp[i] = skb; + + /* + * Slign and fill out fields specific to our + * device. Notice that our device is smart about + * FCS etc. + */ + skb_reserve(skb, 2); + skb->dev = dev; + skb->ip_summed = CHECKSUM_NONE; + + /* + * Initialize the buffer list entries reserving 2 bytes + * in the skb results in a 16-byte aligned IP header, + * but also puts the skb->data at a 16-bit boundary. + * The hardware requires a 32-bit aligned buffer. So we + * round back two bytes and then instruct the hardware + * to skip forward 2 bytes into the buffer. + */ + lp->blfd_ptr->bd[i].BuffData = (u32)skb->data & + BD_DataAlign_MASK; + lp->blfd_ptr->bd[i].BDCtl = (BD_CownsBD | + (i << BD_RxBDID_SHIFT) | MSP_END_BUFSIZE); + } + + /* allocate the RX dma array */ + if (lp->rx_dma_skbp == NULL) { + lp->rx_dma_skbp = (dma_addr_t *)kmalloc( + (RX_BUF_NUM << 1) * sizeof(dma_addr_t), + GFP_KERNEL); + if (lp->rx_dma_skbp == NULL) { + printk(KERN_ERR "MSPETH(init_queues) %s: " + "Cannot allocate the array of " + "RX dma addresses!\n", dev->name); + return false; + } + + for (i = 0; i < RX_BUF_NUM << 1; i++) + lp->rx_dma_skbp[i] = 0x00000000; + } + + /* initialize the RX dma pointers */ + for (i = 0; i < RX_BUF_NUM << 1; i++) { +#ifdef CONFIG_DMA_NONCOHERENT + dma_skb = lp->rx_dma_skbp[i]; + /* unmap any dma pointers */ + if (dma_skb != 0x00000000) { + lp->rx_dma_skbp[i] = 0x00000000; + dma_unmap_single(lp->dev, dma_skb, + MSP_END_BUFSIZE, DMA_BIDIRECTIONAL); + } +#endif + } + + /* configure the queue length and return */ + atomic_set(&lp->tx_qspc, TX_BUF_NUM); + + return true; +} + +/************************************************************************** + * Converse of the mspeth_init_queues routine. This frees all the memory + * associated with the queues. It must be called when closing the device. + */ +static void +mspeth_free_queues(struct net_device *dev) +{ + struct mspeth_priv *lp = netdev_priv(dev); + struct sk_buff *skb; + dma_addr_t dma_skb; + int i; + + /* free up any TX buffers */ + if (lp->txfd_base != NULL) { + for (i = 0; i < TX_BUF_NUM; i++) { + skb = (struct sk_buff *)lp->txfd_base[i].fd.FDSystem; +#ifdef CONFIG_DMA_NONCOHERENT + dma_skb = lp->txfd_base[i].fd1.FDStat; + if (dma_skb != 0x00000000) { + lp->txfd_base[i].fd1.FDStat = 0x00000000; + /* unmap any dma pointers */ + dma_unmap_single(lp->dev, dma_skb, + skb->len, DMA_BIDIRECTIONAL); + } +#endif + if (skb != NULL) { + lp->txfd_base[i].fd.FDSystem = 0x00000000; + dev_kfree_skb_any(skb); + } + } + } + + /* free up the RX sk_buff buffer and array */ + if (lp->rx_skbp != NULL) { + for (i = 0; i < RX_BUF_NUM << 1; i++) { + skb = lp->rx_skbp[i]; + if (skb != NULL) { + dev_kfree_skb_any(skb); + } + } + kfree(lp->rx_skbp); + } + + /* unmap any RX dma pointers and free up the array */ + if (lp->rx_dma_skbp != NULL) { +#ifdef CONFIG_DMA_NONCOHERENT + for (i = 0; i < RX_BUF_NUM << 1; i++) { + dma_skb = lp->rx_dma_skbp[i]; + if (dma_skb != 0x00000000) + dma_unmap_single(lp->dev, dma_skb, + MSP_END_BUFSIZE, DMA_BIDIRECTIONAL); + } +#endif + kfree(lp->rx_dma_skbp); + } + + /* + * Free the descriptor area. Move fd_base back to KSEG0 before + * freeing it. + */ + if (lp->fd_base != NULL) + kfree((void*)KSEG0ADDR(lp->fd_base)); + + /* nullify all the pointers and zero out the queue space */ + lp->fd_base = NULL; + lp->rxfd_base = NULL; + lp->rxfd_curr = NULL; + lp->txfd_base = NULL; + lp->blfd_ptr = NULL; + lp->rx_skbp = NULL; + lp->rx_dma_skbp = NULL; + lp->tx_head = lp->tx_tail = 0; + + atomic_set(&lp->tx_qspc, 0); +} + +/************************************************************************** + * Do a safe soft restart of the device. This *will* cause packet loss, + * so it's only used as a recovery mechanism. + */ +static void +mspeth_soft_restart(struct net_device *dev) +{ + struct mspeth_priv *lp = netdev_priv(dev); + int flags; + + if (netif_msg_link(lp)) + printk(KERN_INFO "MSPETH(soft_restart) %s: " + "Soft device restart\n", dev->name); + + netif_stop_queue(dev); + + /* please don't interrupt me while I'm resetting everything */ + local_irq_save(flags); + + /* Try to restart the adaptor. */ + mspeth_mac_reset(dev); + mspeth_init_queues(dev); + mspeth_mac_init(dev); + mspeth_phy_init(dev); + + /* turn back on the interrupts */ + local_irq_restore(flags); + + /* and start up the queue! We should be fixed .... */ + dev->trans_start = jiffies; + netif_wake_queue(dev); +} + +/************************************************************************** + * Do a *hard* restart of the device. This *will* cause packet loss, so + * it's only used as a recovery mechanism + */ +static void +mspeth_hard_restart(struct net_device *dev) +{ + struct mspeth_priv *lp = netdev_priv(dev); + int flags; + + if (netif_msg_hw(lp)) + printk(KERN_INFO "MSPETH(hard_restart) %s: " + "Hard device restart\n", dev->name); + + netif_stop_queue(dev); + + /* please don't interrupt me while I'm resetting everything */ + local_irq_save(flags); + + /* Try to restart the adaptor. */ + mspeth_mac_reset(dev); + mspeth_phy_reset(dev); + mspeth_free_queues(dev); + mspeth_init_queues(dev); + mspeth_mac_init(dev); + mspeth_phy_init(dev); + + /* turn back on the interrupts */ + local_irq_restore(flags); + + /* and start up the queue! We should be fixed .... */ + dev->trans_start = jiffies; + netif_wake_queue(dev); +} + +/************************************************************************** + * Open/initialize the board. This is called (in the current kernel) + * sometime after booting when the 'ifconfig' program is run. + * + * This routine should set everything up anew at each open, even + * registers that "should" only need to be set once at boot, so that + * there is non-reboot way to recover if something goes wrong. + */ +static int +mspeth_open(struct net_device *dev) +{ + struct mspeth_priv *lp = netdev_priv(dev); + int err = -EBUSY; + + /* reset the hardware, disabling/clearing all interrupts */ + mspeth_mac_reset(dev); + mspeth_phy_reset(dev); + + /* determine preset speed and duplex settings */ + if (lp->option & MSP_OPT_10M) + lp->speed = 10; + else + lp->speed = 100; + + if (lp->option & MSP_OPT_FDUP) + lp->fullduplex = true; + else + lp->fullduplex = false; + + /* initialize the queues and the hardware */ + if (!mspeth_init_queues(dev)) { + printk(KERN_ERR "MSPETH(open) %s: " + "Unable to allocate queues\n", dev->name); + goto out_err; + } + + /* allocate and initialize the tasklets */ +#ifndef CONFIG_MSPETH_NAPI + tasklet_init(&lp->rx_tasklet, mspeth_rx, (u32)dev); + tasklet_init(&lp->tx_tasklet, mspeth_txdone, (u32)dev); +#endif + + /* + * hammtrev, 2005/12/08: + * Adding a new BH handler to reset the device in response to BLEx. + */ + tasklet_init(&lp->hard_restart_tasklet, mspeth_hard_restart_bh, + (u32)dev); + + mspeth_mac_init(dev); + mspeth_phy_init(dev); + + /* stjeanma: No need to poll the link status for a switch */ + if (!(lp->option & MSP_OPT_SWITCH)) { + /* initialize the link check timer */ + init_timer(&lp->link_timer); + lp->link_timer.expires = jiffies + HZ / LINK_DELAY_DIV; + lp->link_timer.data = (u32)dev; + lp->link_timer.function = mspeth_link_check; + add_timer(&lp->link_timer); + } + + /* Allocate the IRQ */ + if (request_irq(dev->irq, &mspeth_interrupt, 0, cardname, dev)) { + printk(KERN_ERR "MSPETH(open) %s: " + "unable to reserve IRQ %d\n", dev->name, dev->irq); + goto out_err; + } + +#ifdef CONFIG_MSPETH_SKB_RECYCLE + skb_bin.user_count++; +#endif + /* and start up the queue */ + netif_start_queue(dev); + + return 0; + +out_err: + return err; +} + +/************************************************************************** + * The inverse routine to mspeth_open(). Close the device and clean up + */ +static int +mspeth_close(struct net_device *dev) +{ + struct mspeth_priv *lp = netdev_priv(dev); + u32 flags; + + /* please don't interrupt me while I'm shutting down everything */ + local_irq_save(flags); + + /* stop the queue & let the world know about it */ + netif_stop_queue(dev); + netif_carrier_off(dev); + + /* kill the tasklets before resetting devices */ +#ifndef CONFIG_MSPETH_NAPI + tasklet_kill(&lp->rx_tasklet); + tasklet_kill(&lp->tx_tasklet); +#endif + tasklet_kill(&lp->hard_restart_tasklet); + + /* smite the link check timers */ + del_timer_sync(&lp->link_timer); + + /* Clean up the adaptor. */ + mspeth_mac_reset(dev); + mspeth_phy_reset(dev); + + /* free the the queue memeory */ + mspeth_free_queues(dev); + + /* free up the resources */ + free_irq(dev->irq, dev); + + /* + * Deassign the phy. + * stjeanma: PHY might not be allocated for a switch. + */ + if (lp->phyptr != NULL) + lp->phyptr->assigned = false; + + /* turn back on the interrupts */ + local_irq_restore(flags); + + return 0; +} + +/************************************************************************** + * The typical workload of the driver: + * Handle the network interface interrupts. + */ + +static irqreturn_t mspeth_interrupt(int irq, void *dev_id) +{ + struct net_device *dev = dev_id; + struct mspeth_priv *lp = netdev_priv(dev); + u32 status; + + BUG_ON(dev == NULL); + + /* + * stjeanma, 2006-02-08: + * This read flushes the dma queue in addition to obtaining + * status. + */ + status = msp_read(lp, MSPETH_Int_Src); + + /* acknowledge the interrupts and check for null entry */ + if (unlikely(status == 0)) + return IRQ_HANDLED; + else + msp_write(lp, MSPETH_Int_Src, status); + + /* collect debugging stats */ + if (likely(status & IntSrc_MacRx)) + lp->lstats.rx_ints++; + if (status & IntSrc_MacTx) + lp->lstats.tx_ints++; + +#ifdef CONFIG_MSPETH_NAPI + /* if NAPI is enabled schedule rx jobs */ + if (likely(status == IntSrc_MacRx)) { + if (netif_rx_schedule_prep(dev)) { + msp_write(lp, MSPETH_Rx_Ctl, + RX_CTL_CMD & ~Rx_EnGood); + msp_write(lp, MSPETH_Int_En, + INT_EN_CMD & ~IntEn_FDAEx); + __netif_rx_schedule(dev); + } + return IRQ_HANDLED; + } + + if (status & IntSrc_MacRx) { + /* if NAPI is enabled schedule rx jobs */ + if (netif_rx_schedule_prep(dev)) { + msp_write(lp, MSPETH_Rx_Ctl, + RX_CTL_CMD & ~Rx_EnGood); + msp_write(lp, MSPETH_Int_En, + INT_EN_CMD & ~IntEn_FDAEx); + __netif_rx_schedule(dev); + } + } + + /* + * Workaround for transmission timeouts due to transmit queue + * exhaust even if the queue has room. + */ + if (status & IntSrc_MacTx) { + msp_write(lp, MSPETH_Tx_Ctl, TX_CTL_CMD & ~Tx_EnComp); + netif_wake_queue(dev); + } +#else + /* + * At least for every TXDONE_MAX_PKT one IntSrc_MacTx will be + * generated. + */ + if (likely(status == IntSrc_MacRx)) { + /* disable interrupt and schedule tasklet */ + msp_write(lp, MSPETH_Rx_Ctl, RX_CTL_CMD & ~Rx_EnGood); + tasklet_schedule(&lp->rx_tasklet); + return IRQ_HANDLED; + } + + if (likely(status == IntSrc_MacTx)) { + /* disable interrupt and schedule tasklet */ + msp_write(lp, MSPETH_Tx_Ctl, TX_CTL_CMD & ~Tx_EnComp); + tasklet_schedule(&lp->tx_tasklet); + return IRQ_HANDLED; + } + + if (likely(status == (IntSrc_MacRx | IntSrc_MacTx))) { + /* disable interrupt and schedule tasklet */ + msp_write(lp, MSPETH_Rx_Ctl, RX_CTL_CMD & ~Rx_EnGood); + msp_write(lp, MSPETH_Tx_Ctl, TX_CTL_CMD & ~Tx_EnComp); + tasklet_schedule(&lp->tx_tasklet); + tasklet_schedule(&lp->rx_tasklet); + return IRQ_HANDLED; + } + + if (status & IntSrc_MacRx) { + /* disable interrupt and schedule tasklet */ + msp_write(lp, MSPETH_Rx_Ctl, RX_CTL_CMD & ~Rx_EnGood); + tasklet_schedule(&lp->rx_tasklet); + } + + /* all other combined cases */ + if (status & IntSrc_MacTx) { + /* disable interrupt and schedule tasklet */ + msp_write(lp, MSPETH_Tx_Ctl, TX_CTL_CMD & ~Tx_EnComp); + tasklet_schedule(&lp->tx_tasklet); + } +#endif /* CONFIG_MSPETH_NAPI */ + + /* recoverable errors */ + if (status & IntSrc_FDAEx) { + /* disable FDAEx int. (until we make room...) */ + msp_write(lp, MSPETH_Int_En, INT_EN_CMD & ~IntEn_FDAEx); + lp->lstats.fd_exha++; + lp->stats.rx_dropped++; + } + + /* + * hammtrev, 2005/08/30: + * Some boards generate a link state interrupt on power-up. + * ACK it and it will go away. + */ + if (status & IntSrc_Link_St) + msp_write(lp, MSPETH_MAC_Ctl, + msp_read(lp, MSPETH_MAC_Ctl) | MAC_LnkChg); + + /* + * And now all the unrecoverable fatal error conditions, this + * includes BLEx errors since we can *never* have one -- if we + * do, it indicates that there is some sort of queue corruption. + */ + if (status & FATAL_ERROR_INT) { + /* Disable further interrupts until device reset. */ + msp_write(lp, MSPETH_DMA_Ctl, + msp_read(lp, MSPETH_DMA_Ctl) | DMA_IntMask); + /* this one may be overkill... */ + msp_write(lp, MSPETH_MAC_Ctl, + msp_read(lp, MSPETH_MAC_Ctl) | MAC_HaltImm); + mspeth_fatal_error_interrupt(dev, status); + } + + return IRQ_HANDLED; +} + +/************************************************************************** + * Fatal error interrupts reset the entire device but they don't require + * reallocating the queues, just clearing them + */ +static void +mspeth_fatal_error_interrupt(struct net_device *dev, int status) +{ + struct mspeth_priv *lp = netdev_priv(dev); + + printk(KERN_WARNING + "MSPETH(fatal_error_interrupt) %s: " + "Fatal Error Interrupt (0x%08x):", dev->name, status); + + if (status & IntSrc_DmParErr) + printk(KERN_WARNING " DmParErr"); + if (status & IntSrc_NRAB) + printk(KERN_WARNING " IntNRAB"); + if (status & IntSrc_BLEx) + printk(KERN_WARNING " IntBLEx"); + printk(KERN_WARNING "\n"); + + /* panic if it gets too crazy */ + if (lp->fatal_icnt++ > 100) + panic("MSPETH(fatal_error_interrupt) %s: " + "too many fatal errors.\n", dev->name); + + /* Dump our descriptors, if desired */ + if (netif_msg_rx_status(lp) || netif_msg_tx_queued(lp)) { + mspeth_dump_queues(dev); + mspeth_dump_stats(dev); + } + + /* + * Try to restart the adaptor. + * + * hammtrev, 2005/12/08: + * This is too much work for a top-half interrupt handler, and + * may result in unexpected race conditions with other tasklets. + * Now deferring the device reset to a bottom-half tasklet, to + * allow any currently-running tasklet to complete without + * unexpected changes to frame/buffer descriptors, etc. + */ + tasklet_schedule(&lp->hard_restart_tasklet); +} + +/************************************************************************** + * Handle deferred processing of the IntBLEx interrupt. + */ +static void +mspeth_hard_restart_bh(unsigned long dev_addr) +{ + struct net_device *dev = (struct net_device *)dev_addr; + struct mspeth_priv *lp = netdev_priv(dev); + + if (netif_msg_link(lp)) + printk(KERN_WARNING "MSPETH(hard_restart_bh) %s: " + "restarting device\n", dev->name); + + mspeth_hard_restart(dev); +} + + +/************************************************************************** + * Process a single RX packet, including sending it up the stack and + * reallocating the buffer. Return the next buffer in the RX queue. + * This routine assumes that the current FD pointed to by rxfd_curr + * has been invalidated with the cache and is current with main memory. + */ +inline static struct q_desc * +mspeth_rx_onepkt(struct net_device *dev) { + struct mspeth_priv *lp = netdev_priv(dev); + u32 status; + struct q_desc *next_rxfd; + int bdnum, len; + struct sk_buff *skb; + dma_addr_t dma_skb; + + /* collect all the relevent information */ + status = lp->rxfd_curr->fd.FDStat; + /* Drop the FCS from the length */ + len = (lp->rxfd_curr->bd.BDCtl & BD_BuffLength_MASK) - 4; + bdnum = (lp->rxfd_curr->bd.BDCtl & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT; + + if (netif_msg_intr(lp)) + printk(KERN_INFO "MSPETH(rx_onepkt) %s: " + "RxFD.\n", dev->name); + if (netif_msg_rx_status(lp)) + dump_qdesc(lp->rxfd_curr); +#ifdef MSPETH_DUMP_QUEUES + if (netif_msg_rx_status(lp) && + (!bdnum && (rx_bdnums[lp->unit][rx_bdnums_ind[lp->unit]] + != (RX_BUF_NUM << 1) - 1))) + dump_qdesc(lp->rxfd_curr); + catalog_rx_bdnum(lp->unit, bdnum); +#endif /* MSPETH_DUMP_QUEUES */ + + /* + * The packet has been received correctly so prepare to send + * it up the stack + */ + if (likely(status & Rx_Good)) { + skb = lp->rx_skbp[bdnum]; + dma_skb = lp->rx_dma_skbp[bdnum]; + + /* + * If a replacement buffer can be allocated then send + * the skb up the stack otherwise we drop the packet + * and reuse the existing buffer + */ + lp->rx_skbp[bdnum] = mspeth_alloc_skb(dev); + if (likely(lp->rx_skbp[bdnum] != NULL)) { +#ifdef CONFIG_DMA_NONCOHERENT + /* Replacement buffer map and sync for dma */ + lp->rx_dma_skbp[bdnum] = dma_map_single( + lp->dev, lp->rx_skbp[bdnum]->data, + MSP_END_BUFSIZE, DMA_FROM_DEVICE); + + /* + * Replacement buffer has been allocated + * successfully, so sync and un-map original + * buffer. + */ + dma_sync_single_for_cpu(lp->dev, dma_skb, + len, DMA_FROM_DEVICE); + dma_unmap_single(lp->dev, dma_skb, + MSP_END_BUFSIZE, DMA_NONE); +#endif + + /* complete the skb and send it up the stack */ + skb_put(skb, len); + skb->protocol = eth_type_trans(skb, dev); + +#ifdef CONFIG_MSPETH_NAPI + netif_receive_skb(skb); +#else + netif_rx(skb); +#endif /* CONFIG_MSPETH_NAPI */ + dev->last_rx = jiffies; + + lp->stats.rx_packets++; + lp->stats.rx_bytes += len; + + if (netif_msg_rx_status(lp)) + print_eth(1, skb->data, len); + if (netif_msg_pktdata(lp)) + print_buf(skb->data, len); + } else { + if (netif_msg_rx_err(lp)) + printk(KERN_WARNING "MSPETH(rx_onepkt) %s: " + "Memory squeeze, dropping packet.\n", + dev->name); + lp->rx_skbp[bdnum] = skb; + lp->stats.rx_dropped++; + } + + /* Do the rounding for the 32-bit data alignment */ + lp->blfd_ptr->bd[bdnum].BuffData = + (u32)lp->rx_skbp[bdnum]->data & + BD_DataAlign_MASK; + } else { + lp->stats.rx_errors++; + /* WORKAROUND: LongErr and CRCErr means Overflow. */ + if ((status & Rx_LongErr) && (status & Rx_CRCErr)) { + status &= ~(Rx_LongErr | Rx_CRCErr); + status |= Rx_Over; + } + if (status & Rx_LongErr) + lp->stats.rx_length_errors++; + if (status & Rx_Over) + lp->stats.rx_fifo_errors++; + if (status & Rx_CRCErr) + lp->stats.rx_crc_errors++; + if (status & Rx_Align) + lp->stats.rx_frame_errors++; + } + + /* allocate buffer back to controller */ + lp->blfd_ptr->bd[bdnum].BDCtl = + (BD_CownsBD | (bdnum << BD_RxBDID_SHIFT) | MSP_END_BUFSIZE); + blocking_read_reg32(&lp->blfd_ptr->bd[bdnum].BDCtl); + + /* save next FD before allocating current one to controller */ + next_rxfd = (struct q_desc *)lp->rxfd_curr->fd.FDNext; + + /* + * Return q_desc to the controller. Setting fd0.FDCtl last prevents + * the controller from using this q_desc until we're done. + * + * Writeback the changes back to the RAM so that MAC can see the + * available buffers on a write-through cache this doesn't really + * do anything, but on a writeback cache this is quite important. + * + * stjeanma, 2006-02-08: + * Uncached writes need to be read back to ensure they reach RAM. + */ + lp->rxfd_curr->fd0.FDNext = 0; + lp->rxfd_curr->fd0.FDSystem = 0; + lp->rxfd_curr->fd0.FDStat = 0; + lp->rxfd_curr->fd1.FDNext = 0; + lp->rxfd_curr->fd1.FDSystem = 0; + lp->rxfd_curr->fd1.FDStat = 0; + lp->rxfd_curr->fd1.FDCtl = FD_CownsFD; + lp->rxfd_curr->fd0.FDCtl = FD_CownsFD; + blocking_read_reg32(&lp->rxfd_curr->fd0.FDCtl); + + return next_rxfd; +} + +#ifdef CONFIG_MSPETH_NAPI +/************************************************************************* + * mspeth polling method used by NAPI. + */ +static int +mspeth_poll(struct net_device *dev, int *budget) +{ + struct mspeth_priv *lp = netdev_priv(dev); + int work_limit = min(*budget, dev->quota); + int work_done; + int done = 1; + + flush_memqueue(); + + for (work_done = 0; work_done < work_limit && + !(lp->rxfd_curr->fd.FDCtl & FD_CownsFD); work_done++) + lp->rxfd_curr = mspeth_rx_onepkt(dev); + + if (likely(work_done > 0)) { + *budget -= work_done; + dev->quota -= work_done; + done = (work_done < work_limit); + } + + if (done) { + /* + * Reenable rx and FDAEXhaust interrupts since we + * handled all recieved packets. + */ + local_irq_disable(); + __netif_rx_complete(dev); + msp_write(lp, MSPETH_Rx_Ctl, RX_CTL_CMD | Rx_EnGood); + msp_write(lp, MSPETH_Int_En, INT_EN_CMD); + local_irq_enable(); + } + + return !done; +} +#else +/************************************************************************** + * A packet has been received so shove it up the network stack and + * allocate another buffer for reception. Called by the rx_tasklet which + * is scheduled by the interrupt handler. + */ +static void +mspeth_rx(unsigned long dev_addr) +{ + struct net_device *dev = (struct net_device *)dev_addr; + struct mspeth_priv *lp = netdev_priv(dev); + u32 status; + int rx_cnt; + + /* + * Make sure the memory queue is flushed and the cache is + * invalidated this is only really important in the case where + * we have a single packet to process otherwise the packet at + * the head of the queue will *certainly* be flushed from the + * memory queue. We don't need to flush the DMA queue since the + * ISR that scheduled this routine will have done it already. + */ + flush_memqueue(); + + /* + * Loop around processing the rx packet queue. + * This should be adjusted to process a maximum number of + * packets, or perhaps insert a call to "schedule" within it + * so that it doesn't monopolize the CPU. + */ + for (rx_cnt = 0; rx_cnt < RX_MAX_PKT && + !(lp->rxfd_curr->fd.FDCtl & FD_CownsFD); rx_cnt++) { + /* + * Process the current packet and move to the next + * frame descriptor. + */ + lp->rxfd_curr = mspeth_rx_onepkt(dev); + } + + /* re-enable FDA Exhausted interupts 'cause there's room now */ + if (rx_cnt > 0) + msp_write(lp, MSPETH_Int_En, INT_EN_CMD); + + /* + * Check to see if there is an unprocessed packet + * -- reschedule if so. + * + * hammtrev, 2005-12-16: + * Flush the memory queue and invalidate the cache + * lines before re-examining the current rxfd. + */ + flush_memqueue(); + + if (!(lp->rxfd_curr->fd.FDCtl & FD_CownsFD)) { + tasklet_schedule(&lp->rx_tasklet); + } else { + /* + * Re-enable the RX completion interrupt and check to see + * if there is an outstanding interrupt. + */ + msp_write(lp, MSPETH_Rx_Ctl, RX_CTL_CMD); + status = msp_read(lp, MSPETH_Int_Src); + + /* + * If there is an outstanding RX interrupt, then reschedule + * the routine + */ + if (status & IntSrc_MacRx) { + /* ack the interrupt, disable it and reschedule */ + msp_write(lp, MSPETH_Int_Src, IntSrc_MacRx); + msp_write(lp, MSPETH_Rx_Ctl, + RX_CTL_CMD & ~Rx_EnGood); + tasklet_schedule(&lp->rx_tasklet); + } + } +} +#endif /* CONFIG_MSPETH_NAPI */ + +/************************************************************************** + * Basic transmit function -- called from the upper network layers + */ +static int +mspeth_send_packet(struct sk_buff *skb, struct net_device *dev) +{ + struct mspeth_priv *lp = netdev_priv(dev); + struct q_desc *txfd_ptr; + + /* + * NOTE that if we cannot transmit then we must return 1 and + * *not touch* the skb since it doesn't belong to us. The + * networking layer above will take care of it. + */ + +#ifdef CONFIG_MSPETH_NAPI + /* + * We have no txdone interrupt on NAPI. + * Free transmitted buffers here. + */ + mspeth_txdone((unsigned long)dev); +#endif + + /* + * Don't take drastic action right away if the queue is stopped, + * but if its been that way for quite a while we'll attempt to + * restart the adatper. + */ + if (netif_queue_stopped(dev)) { + /* + * If we get here, some higher level has decided we are + * broken. There should really be a "kick me" function + * call instead. + */ + int tickssofar = jiffies - dev->trans_start; + if (tickssofar < 5) { + printk(KERN_WARNING "MSPETH(send_packet) %s: " + "queue stopped ...\n", dev->name); + return 1; + } + + if (netif_msg_tx_err(lp)) + printk(KERN_WARNING "MSPETH(send_packet) %s: " + "transmit timed out, restarting adaptor. " + "TX_Status = %08x\n", + dev->name, msp_read(lp, MSPETH_Tx_Stat)); + + /* do a hard restart and return */ + mspeth_hard_restart(dev); + return 1; + } + + /* + * Protect access to the transmit queue with the atomic queue + * space variable. + */ + if (atomic_read(&lp->tx_qspc) == 0) { + /* no room on queue for another packet */ + netif_stop_queue(dev); +#ifdef CONFIG_MSPETH_NAPI + /* workaround for waking the queue */ + msp_write(lp, MSPETH_Tx_Ctl, TX_CTL_CMD); +#endif + lp->lstats.tx_full++; + return 1; + } + + lp->stats.tx_bytes += skb->len; + + /* we have room, so get the next availabe tx FD */ + txfd_ptr = &lp->txfd_base[lp->tx_head]; + lp->tx_head = (lp->tx_head + 1) & TX_BUF_MASK; + +#ifdef CONFIG_DMA_NONCOHERENT + /* map and sync for dma */ + txfd_ptr->fd1.FDStat = dma_map_single(lp->dev, skb->data, + skb->len, DMA_TO_DEVICE); +#endif + + /* + * stjeanma, 2006-02-08: + * Uncached writes need to be read back to ensure they reach RAM. + */ + txfd_ptr->bd.BuffData = (u32)skb->data; + txfd_ptr->bd.BDCtl = skb->len; + txfd_ptr->fd.FDSystem = (u32)skb; + txfd_ptr->fd.FDCtl = FD_CownsFD_Set; + blocking_read_reg32(&txfd_ptr->fd.FDCtl); + + /* one more packet on the TX queue */ + atomic_dec(&lp->tx_qspc); + + if (netif_msg_tx_queued(lp)) + print_eth(0, (unsigned char *)skb->data, skb->len); + if (netif_msg_pktdata(lp)) + print_buf(skb->data, skb->len); + + /* wake up the transmitter */ + msp_write(lp, MSPETH_DMA_Ctl, DMA_CTL_CMD | DMA_TxWakeUp); + + dev->trans_start = jiffies; + + return 0; +} + +/************************************************************************** + * Free the buffers which have been transmitted from the transmit queue. + * Called from the tx_tasklet which is scheduled by the interrupt handler + */ +#ifdef CONFIG_MSPETH_NAPI +inline static void +#else +static void +#endif +mspeth_txdone(unsigned long dev_addr) +{ + struct net_device *dev = (struct net_device *)dev_addr; + struct mspeth_priv *lp = netdev_priv(dev); + struct q_desc *txfd_ptr; + int num_done = 0; + u32 status; + + /* + * Walk the queue until we come to the end or a buffer we don't + * control we don't worry much about leaving a buffer or two on + * the tx queue; we'll get to them later and if we're busy then + * we'll get to them RSN. + * + * stjeanma, 2006-02-08: + * Flush the memory queue to see the MAC queue updates. + */ + txfd_ptr = &lp->txfd_base[lp->tx_tail]; + flush_memqueue(); + + while (atomic_read(&lp->tx_qspc) < TXDONE_MAX_PKT && + !(txfd_ptr->fd.FDCtl & FD_CownsFD)) { + struct sk_buff *skb; + dma_addr_t dma_skb; + + status = txfd_ptr->fd.FDStat; + mspeth_check_tx_stat(dev, status); + + if (netif_msg_intr(lp)) + printk(KERN_INFO "MSPETH(txdone) %s: " + "TxFD done.\n", dev->name); + if (netif_msg_tx_done(lp)) + dump_qdesc(txfd_ptr); + + /* + * Free the current socket buffer and change ownership of + * the TX descriptor. + * + * Writeback the change to RAM so that the controller can + * see them. + * + * stjeanma, 2006-02-08: + * Uncached writes need to be read back to ensure they + * reach RAM. + */ + dma_skb = txfd_ptr->fd1.FDStat; + txfd_ptr->fd1.FDStat = 0x00000000; + + skb = (struct sk_buff *)(txfd_ptr->fd.FDSystem); + txfd_ptr->fd.FDSystem = 0x00000000; + txfd_ptr->fd.FDCtl = 0x00000000; + blocking_read_reg32(&txfd_ptr->fd.FDCtl); + +#ifdef CONFIG_DMA_NONCOHERENT + /* unmap dma sync */ + if (dma_skb != 0x00000000) + dma_unmap_single(lp->dev, dma_skb, + skb->len, DMA_NONE); +#endif + if (skb != NULL) + mspeth_free_skb(skb); + + /* advance to the next TX descriptor */ + atomic_inc(&lp->tx_qspc); + num_done++; + lp->tx_tail = (lp->tx_tail + 1) & TX_BUF_MASK; + + txfd_ptr = &lp->txfd_base[lp->tx_tail]; + flush_memqueue(); + } + +#ifndef CONFIG_MSPETH_NAPI + /* + * If we freed at least one buffer and the queue is stopped + * then restart it. + */ + if (num_done > 0 && netif_queue_stopped(dev)) + netif_wake_queue(dev); + + /* re-enable interrupts regardless */ + msp_write(lp, MSPETH_Tx_Ctl, TX_CTL_CMD); + + /* Check for outstanding packets */ + status = msp_read(lp, MSPETH_Int_Src); + + /* If we have an outstanding packet, reschedule the tasklet */ + if (status & IntSrc_MacTx) { + /* ack interrupt, disable it, and reschedule */ + msp_write(lp, MSPETH_Int_Src, IntSrc_MacTx); + msp_write(lp, MSPETH_Tx_Ctl, TX_CTL_CMD & ~Tx_EnComp); + tasklet_schedule(&lp->tx_tasklet); + } +#endif /* CONFIG_MSPETH_NAPI */ +} + +/************************************************************************** + * If there is a timeout we soft restart the entire device + */ +static void +mspeth_tx_timeout(struct net_device *dev) +{ + struct mspeth_priv *lp = netdev_priv(dev); + + if (netif_msg_tx_err(lp)) + printk(KERN_WARNING "MSPETH(tx_timeout) %s: " + "transmit timed out, status 0x%08x\n", + dev->name, msp_read(lp, MSPETH_Tx_Stat)); + + /* try to restart the adaptor */ + mspeth_soft_restart(dev); +} + +/************************************************************************** + * Debugging code to dump out the transmit status register + * + * hammtrev, 2005-11-25: + * The Tx_NCarr condition makes a lot of noise on the PMC RG, but + * doesn't seem to affect the success of transmissions. Removing for now. + */ +#define TX_STA_ERR \ + (Tx_ExColl | Tx_Under | Tx_Defer | Tx_LateColl | Tx_TxPar | Tx_SQErr) +static void +mspeth_check_tx_stat(struct net_device *dev, int status) +{ + struct mspeth_priv *lp = netdev_priv(dev); + const char *msg = NULL; + + /* count collisions */ + if (status & Tx_ExColl) + lp->stats.collisions += 16; + if (status & Tx_TxColl_MASK) + lp->stats.collisions += status & Tx_TxColl_MASK; + + /* WORKAROUND: ignore LostCrS when there is no carrier .... */ + if (!netif_carrier_ok(dev)) + status &= ~Tx_NCarr; + + if (likely(!(status & TX_STA_ERR))) { + /* no error. */ + lp->stats.tx_packets++; + return; + } + + lp->stats.tx_errors++; + if (status & Tx_ExColl) { + lp->stats.tx_aborted_errors++; + msg = "Excessive Collision."; + } + if (status & Tx_Under) { + lp->stats.tx_fifo_errors++; + msg = "Tx FIFO Underrun."; + } + if (status & Tx_Defer) { + lp->stats.tx_fifo_errors++; + msg = "Excessive Deferral."; + } +#if 0 + if (status & Tx_NCarr) { + lp->stats.tx_carrier_errors++; + msg = "Lost Carrier Sense."; + } +#endif + if (status & Tx_LateColl) { + lp->stats.tx_aborted_errors++; + msg = "Late Collision."; + } + if (status & Tx_TxPar) { + lp->stats.tx_fifo_errors++; + msg = "Transmit Parity Error."; + } + if (status & Tx_SQErr) { + lp->stats.tx_heartbeat_errors++; + msg = "Signal Quality Error."; + } + if (msg && netif_msg_tx_err(lp)) + printk(KERN_WARNING + "MSPETH(check_tx_stats) %s: %s (%#x)\n", + dev->name, msg, status); +} + +/* + * Get the current statistics. + * This may be called with the card open or closed. + */ +static struct net_device_stats * +mspeth_get_stats(struct net_device *dev) +{ + struct mspeth_priv *lp = netdev_priv(dev); + unsigned long flags; + + if (netif_running(dev)) { + local_irq_save(flags); + /* Update the statistics from the device registers. */ + lp->stats.rx_missed_errors = msp_read(lp, MSPETH_Miss_Cnt); + local_irq_restore(flags); + } + + return &lp->stats; +} + +/* + * Set or clear the multicast filter for this adaptor. + * num_addrs == -1 Promiscuous mode, receive all packets + * num_addrs == 0 Normal mode, clear multicast list + * num_addrs > 0 Multicast mode, receive normal and MC packets, + * and do best-effort filtering. + */ +static void +mspeth_set_multicast_list(struct net_device *dev) +{ + struct mspeth_priv *lp = netdev_priv(dev); + + if (dev->flags & IFF_PROMISC) { + /* Enable promiscuous mode */ + msp_write(lp, MSPETH_ARC_Ctl, + ARC_CompEn | ARC_BroadAcc | + ARC_GroupAcc | ARC_StationAcc); + } else if ((dev->flags & IFF_ALLMULTI) || + dev->mc_count > ARC_ENTRY_MAX - 3) { + /* ARC 0, 1, 20 are reserved. */ + /* Disable promiscuous mode, use normal mode. */ + msp_write(lp, MSPETH_ARC_Ctl, + ARC_CompEn | ARC_BroadAcc | ARC_GroupAcc); + } else if (dev->mc_count) { + struct dev_mc_list* cur_addr = dev->mc_list; + int i; + int ena_bits = ARC_Ena_Bit(ARC_ENTRY_SOURCE); + + msp_write(lp, MSPETH_ARC_Ctl, 0); + /* Walk the address list, and load the filter */ + for (i = 0; i < dev->mc_count; i++, + cur_addr = cur_addr->next) { + if (!cur_addr) + break; + + /* entry 0, 1 is reserved. */ + mspeth_set_arc_entry(dev, i + 2, cur_addr->dmi_addr); + ena_bits |= ARC_Ena_Bit(i + 2); + } + msp_write(lp, MSPETH_ARC_Ena, ena_bits); + msp_write(lp, MSPETH_ARC_Ctl, ARC_CompEn | ARC_BroadAcc); + } else { + msp_write(lp, MSPETH_ARC_Ena, ARC_Ena_Bit(ARC_ENTRY_SOURCE)); + msp_write(lp, MSPETH_ARC_Ctl, ARC_CompEn | ARC_BroadAcc); + } +} + +static int +mspeth_proc_info(char *buf, char **bloc, off_t off, + int length, int *eof, void *data) +{ + int len = 0; + int i, cnt; + struct net_device *dev = (struct net_device *)data; + struct mspeth_priv *lp = netdev_priv(dev); + + /* finished reading regardless of anything else */ + if (off > 0) + return 0; + + len += sprintf(buf, "MSPETH hwunit %d statistics:\n", lp->hwunit); + len += sprintf(buf + len, "%s: tx_ints %d, rx_ints %d, " + "max_tx_qlen %d, tx_full %d, fd_exha %d\n", + dev->name, + lp->lstats.tx_ints, + lp->lstats.rx_ints, + lp->lstats.max_tx_qlen, + lp->lstats.tx_full, + lp->lstats.fd_exha); + len += sprintf(buf + len, " fd_base = %p\n\n", lp->fd_base); + len += sprintf(buf + len, " rxfd_base = %p, rxfd_curr = %p\n", + lp->rxfd_base, lp->rxfd_curr); + + if (lp->rxfd_base != NULL) { + cnt = 0; + for (i = 0; i < RX_BUF_NUM; i++) { + if (lp->rxfd_base[i].fd.FDCtl & FD_CownsFD) + cnt++; + } + len += sprintf(buf + len, + " Controller FD count = %d\n\n", cnt); + } + len += sprintf(buf + len, " tx_base = %p, tx_head = %d, " + "tx_tail = %d, qspc = %d\n", + lp->txfd_base, lp->tx_head, lp->tx_tail, + atomic_read(&lp->tx_qspc)); + len += sprintf(buf + len, " blfd_ptr = %p, rx_skbp = %p\n\n", + lp->blfd_ptr, lp->rx_skbp); + if (lp->mapaddr != NULL) + len += sprintf(buf + len, + " pause sent: %d, pause recv: %d\n\n", + msp_read(lp, MSPETH_PauseCnt), + msp_read(lp, MSPETH_RemPauCnt)); +#ifdef CONFIG_MSPETH_NAPI + len += sprintf(buf + len, " NAPI is enabled\n\n"); +#endif +#ifdef CONFIG_MSPETH_SKB_RECYCLE + len += sprintf(buf + len, + " Socket Buffer Recycling is enabled\n"); + len += sprintf(buf + len, + " recycle hits = %lu, recycle misses = %lu\n", + skb_bin.recycle_hits, skb_bin.recycle_misses); + len += sprintf(buf + len, " recycle bin skb count = %lu\n\n", + skb_bin.recycle_count); +#endif + + return len; +} + +static u32 mspeth_get_msglevel(struct net_device *dev) +{ + struct mspeth_priv *lp = netdev_priv(dev); + + return lp->msg_enable; +} + +static void mspeth_set_msglevel(struct net_device *dev, u32 value) +{ + struct mspeth_priv *lp = netdev_priv(dev); + + lp->msg_enable = value; +} + +/* initial ethtool support */ +static const struct ethtool_ops mspeth_ethtool_ops = { + .get_msglevel = mspeth_get_msglevel, + .set_msglevel = mspeth_set_msglevel, +}; + +/* platform device stuff for linux 2.6 */ +static char mspeth_string[] = "mspeth"; + +static struct platform_driver mspeth_driver = { + .probe = mspeth_probe, + .remove = __devexit_p(mspeth_remove), + .driver { + .name = mspeth_string, + }, +}; + +/* + * Register the mspeth with the kernel + */ +static int __init mspeth_init_module(void) +{ + printk(KERN_INFO "PMC MSPETH 10/100 Ethernet Driver\n"); + + if (platform_driver_register(&mspeth_driver)) { + printk(KERN_ERR "Driver registration failed\n"); + return -ENOMEM; + } + + return 0; +} + +/* + * Unregister the mspeth from the kernel + */ +static void __exit mspeth_cleanup_module(void) +{ + platform_driver_unregister(&mspeth_driver); +} + +MODULE_DESCRIPTION("PMC MSPETH 10/100 Ethernet Driver"); +MODULE_LICENSE("GPL"); + +module_init(mspeth_init_module); +module_exit(mspeth_cleanup_module); diff --git a/drivers/net/pmcmspeth.h b/drivers/net/pmcmspeth.h new file mode 100644 index 0000000..5e1609c --- /dev/null +++ b/drivers/net/pmcmspeth.h @@ -0,0 +1,558 @@ +/* + * PMC-Sierra MSP EVM ethernet driver for linux + * + * Copyright 2005-2007 PMC-Sierra, Inc + * + * Originally based on mspeth.c driver which contains substantially the + * same hardware. + * Based on skelton.c by Donald Becker. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' A ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef _MSPETH_H_ +#define _MSPETH_H_ + +/************************************************************************** + * Cache size externs and defines + */ +extern int ic_lsize, dc_lsize; /* Primary cache linesize in bytes */ +extern int sc_lsize; /* Secondary cache linesize in bytes */ + /* must be included after the above */ + +/************************************************************************** + * Device constants for our various types of MSP chips + */ +#define MSPETH_MAX_UNITS 3 +#define STDETH_MAX_UNITS 8 + +/************************************************************************** + * Tuning parameters + */ +#define DMA_BURST_SIZE 32 /* maximum burst size for the DMA transfers */ +#define TX_TIMEOUT 1 /* time (in seconds) for the TX timeout */ + +#if defined(CONFIG_PMC_MSP7120_EVAL) || \ + defined(CONFIG_PMC_MSP7120_GW) || \ + defined(CONFIG_PMC_MSP7120_FPGA) +#define TX_THRESHOLD 100 /* MAC TX fifo depth before we start sending */ +#else +#define TX_THRESHOLD 1000 /* MAC TX fifo depth before we start sending */ +#endif +#define TX_POLL_CNT 0 /* interval for the TX poll mechanism + * -- not used, leave at zero */ +#define LINK_DELAY_DIV 4 /* delay for checking the link status */ +#define RX_MAX_PKT 16 /* maximum number of packet the RX handler */ + /* will process at one time */ +#define PHY_BUSY_CNT 1000 /* 100ns loops to delay for PHY */ + +/* + * Define the RX/TX buffer counts. Notice that they *must* be <= 256 and + * also a power of two. So much so that we test for it at compile time and + * set the order of the queue lengths instead of the numbers directly. + * + * cavanaug 2006-02-21: Changed buffer order from 5 to 6. This prevents + * corruption of the queues on eth1 that were preventing eth1 from working + * without the cable being unplugged and plugged back in. + */ +#define RX_BUF_ORDER 6 /* 64 buffers */ +#define TX_BUF_ORDER 6 /* 64 buffers */ + +/************************************************************************** + * Buffer sizes + */ +#define MAX_PKT_SIZE 1532 +#define MSP_END_PREPEND 224 +#define MAX_ETH_BUFFER_SIZE (MAX_PKT_SIZE + MSP_END_PREPEND) +#define MSP_END_BUFSIZE (MAX_ETH_BUFFER_SIZE + 24) + +/************************************************************************** + * Option defines + */ +#define MSP_OPT_AUTO 0x00 +#define MSP_OPT_10M 0x01 +#define MSP_OPT_100M 0x02 +#define MSP_OPT_FDUP 0x04 +#define MSP_OPT_HDUP 0x08 +#define MSP_OPT_SWITCH 0x10 + +/************************************************************************** + * Local error codes etc (mac errors start at 9000) + */ +#define MSP_SUCCESS 0 +#define MSP_FAIL -1 +#define MSP_MAC_MEM_ALLOC_ERROR 9002 +#define MSP_MAC_PHY_ERROR 9006 +#define MSP_MAC_PHY_NO_LINK 9012 + +/************************************************************************** + * Macros & inline functions + */ + +/* Select the correct cache flush/invalidate operations */ +#if CONFIG_MIPS_L1_CACHE_SHIFT == 4 +#define CACHE_UNROLL cache16_unroll32 +#define UNROLL_INCR 0x200 +#elif CONFIG_MIPS_L1_CACHE_SHIFT == 5 +#define CACHE_UNROLL cache32_unroll32 +#define UNROLL_INCR 0x400 +#elif CONFIG_MIPS_L1_CACHE_SHIFT == 6 +#define CACHE_UNROLL cache64_unroll32 +#define UNROLL_INCR 0x800 +#endif + +/************************************************************************** + * Register definitions + */ + +/* MAC */ +#define MSPETH_DMA_Ctl 0x00 +#define MSPETH_TxFrmPtr 0x04 +#define MSPETH_TxThrsh 0x08 +#define MSPETH_TxPollCtr 0x0c +#define MSPETH_BLFrmPtr 0x10 +#define MSPETH_RxFragSize 0x14 +#define MSPETH_Int_En 0x18 +#define MSPETH_FDA_Bas 0x1c +#define MSPETH_FDA_Lim 0x20 +#define MSPETH_Int_Src 0x24 +#define MSPETH_PauseCnt 0x30 +#define MSPETH_RemPauCnt 0x34 +#define MSPETH_TxCtlFrmStat 0x38 +#define MSPETH_MAC_Ctl 0x40 +#define MSPETH_ARC_Ctl 0x44 +#define MSPETH_Tx_Ctl 0x48 +#define MSPETH_Tx_Stat 0x4c +#define MSPETH_Rx_Ctl 0x50 +#define MSPETH_Rx_Stat 0x54 +#define MSPETH_MD_DATA 0x58 +#define MSPETH_MD_CA 0x5c +#define MSPETH_ARC_Adr 0x60 +#define MSPETH_ARC_Data 0x64 +#define MSPETH_ARC_Ena 0x68 +#define MSPETH_Miss_Cnt 0x7c +#define MSPETH_BSWE1_Add 0xc0 +#define MSPETH_BSWE2_Add 0xc4 +#define MSPETH_BMWE1_Add 0xc8 +#define MSPETH_BMWE2_Add 0xcc +#define MSPETH_INTBRW_Add 0xd0 +#define MSPETH_BCTRL_Reg 0xd4 + +/* PHY */ +#define MSPPHY_MII_DATA 0x00 +#define MSPPHY_MII_CTRL 0x04 + +/* Reset */ +#define MSPRST_STS 0x00 +#define MSPRST_SET 0x04 +#define MSPRST_CLR 0x08 + +/* + * Bit Assignments + */ + +/* DMA_Ctl (0x00) bit assign -------------------------------------------*/ +#define DMA_RxAlign3 0x00C00000 /* Receive Alignment (skip 3 bytes) */ +#define DMA_RxAlign2 0x00800000 /* Receive Alignment (skip 2 bytes) */ +#define DMA_RxAlign1 0x00400000 /* Receive Alignment (skip 1 byte) */ +/* RESERVED 0x00300000 Not used, must be zero */ +#define DMA_M66EnStat 0x00080000 /* 1:Station clock/30 */ +#define DMA_IntMask 0x00040000 /* 1:Interupt mask */ +#define DMA_SWIntReq 0x00020000 /* 1:Software Interrupt request */ +#define DMA_TxWakeUp 0x00010000 /* 1:Transmit Wake Up */ +#define DMA_RxBigE 0x00008000 /* 1:Receive Big Endian */ +#define DMA_TxBigE 0x00004000 /* 1:Transmit Big Endian */ +#define DMA_TestMode 0x00002000 /* 1:Test Mode */ +#define DMA_PowrMgmnt 0x00001000 /* 1:Power Management */ +#define DMA_BRST_Mask 0x000001fc /* DMA Burst size */ +#define DMA_BRST_Shift 2 + +/* RxFragSize (0x14) bit assign --------------------------------------- */ +#define RxFrag_EnPack 0x00008000 /* 1:Enable Packing */ +#define RxFrag_MinFragMask 0x00000ffc /* Minimum Fragment */ + +/* + * Int_En (0x18) bit assign ------------------------------------------- + * Since bit 6 of the Int_En register at 0x18 is reserved and even writing + * to this register bit causes random interrupts, take caution when writing + * to this register - always write 0 there. For this reason there are two + * definitions for Enable and Disable and couldn't use the ~ of the Enable + * for Disable, + */ +#define IntEn_NRAB 0x00000800 /* Non-recoverable abort enable */ +#define IntEn_TxCtlCmp 0x00000400 /* Transmit Ctl Complete enable */ +#define IntEn_DmParErr 0x00000200 /* DMA Parity Error enable */ +#define IntEn_DParD 0x00000100 /* Data Parity Detected enable */ +#define IntEn_EarNot 0x00000080 /* Early Rx Notify enable */ +/* RESERVED 0x00000040 Not used, must be zero */ +#define IntEn_SSysErr 0x00000020 /* Signalled System Error enable */ +#define IntEn_RMAB 0x00000010 /* Received Master Abort enable */ +#define IntEn_RTAB 0x00000008 /* Received Target Abort enable */ +#define IntEn_STAB 0x00000004 /* Signaled Target Abort enable */ +#define IntEn_BLEx 0x00000002 /* Buffer List Exhausted enable */ +#define IntEn_FDAEx 0x00000001 /* FDA Exhausted Enable */ + +/* Int_Src (0x24) bit assign ------------------------------------------ */ +#define IntSrc_ExtE 0x00040000 /* External Event int. */ +/* RESERVED 0x00020000 Not used, must be zero */ +#define IntSrc_ExDefer 0x00010000 /* Excessive Tx Deferrals int. */ +#define IntSrc_Link_St 0x00008000 /* Link State Change status */ +#define IntSrc_NRAB 0x00004000 /* Non-recoverable abort int.*/ +#define IntSrc_DmParErr 0x00002000 /* DMA Parity Error int. */ +#define IntSrc_BLEx 0x00001000 /* Buffer List Exhausted int */ +#define IntSrc_FDAEx 0x00000800 /* FDA Exhausted, int. */ +#define IntSrc_NRAB_St 0x00000400 /* Non-recoverable abort status */ +#define IntSrc_Cmp 0x00000200 /* MAC ctrl packet int. */ +#define IntSrc_ExBD 0x00000100 /* Excessive BD status */ +#define IntSrc_DmParErr_St 0x00000080 /* DMA Parity Error status */ +#define IntSrc_EarNot 0x00000040 /* Rx early notify int. */ +#define IntSrc_SWInt_St 0x00000020 /* Software Request status */ +#define IntSrc_BLEx_St 0x00000010 /* Buffer List Exhausted status */ +#define IntSrc_FDAEx_St 0x00000008 /* FDA Exhausted status */ +/* RESERVED 0x00000004 Not used, must be zero */ +#define IntSrc_MacRx 0x00000002 /* Rx packet int. */ +#define IntSrc_MacTx 0x00000001 /* Tx packet int. */ + +/* MAC_Ctl (0x40) bit assign ------------------------------------------ */ +#define MAC_Link10 0x00008000 /* 1:Link Status 10Mbits */ +/* RESERVED 0x00004000 Not used, must be zero */ +#define MAC_EnMissRoll 0x00002000 /* 1:Enable Missed Roll */ +#define MAC_MissRoll 0x00000400 /* 1:Missed Roll */ +#define MAC_LnkChg 0x00000100 /* write 1 to clear Int_Link */ +#define MAC_Loop10 0x00000080 /* 1:Loop 10 Mbps */ +#define MAC_Conn_Auto 0x00000000 /* 00:Connection mode (Automatic) */ +#define MAC_Conn_10M 0x00000020 /* 01:10Mbps endec) */ +#define MAC_Conn_Mll 0x00000040 /* 10:(Mll clock) */ +#define MAC_MacLoop 0x00000010 /* 1:MAC Loopback */ +#define MAC_FullDup 0x00000008 /* 1:Full Duplex 0:Half Duplex */ +#define MAC_Reset 0x00000004 /* 1:Software Reset */ +#define MAC_HaltImm 0x00000002 /* 1:Halt Immediate */ +#define MAC_HaltReq 0x00000001 /* 1:Halt request */ + + /* ARC_Ctl (0x44) (bit assign ---------------------------------------- */ +#define ARC_CompEn 0x00000010 /* 1:ARC Compare Enable */ +#define ARC_NegCAM 0x00000008 /* 1:Reject packets ARC */ + /* recognizes, accept other */ +#define ARC_BroadAcc 0x00000004 /* 1:Broadcast accept */ +#define ARC_GroupAcc 0x00000002 /* 1:Multicast accept */ +#define ARC_StationAcc 0x00000001 /* 1:unicast accept */ + +/* Tx_Ctl (0x48) bit assign ------------------------------------------- */ +#define Tx_EnComp 0x00004000 /* 1:Enable Completion */ +#define Tx_EnTxPar 0x00002000 /* 1:Enable Transmit Parity */ +#define Tx_EnLateColl 0x00001000 /* 1:Enable Late Collision */ +#define Tx_EnExColl 0x00000800 /* 1:Enable Excessive Collision */ +#define Tx_EnLCarr 0x00000400 /* 1:Enable Lost Carrier */ +#define Tx_EnExDefer 0x00000200 /* 1:Enable Excessive Deferral */ +#define Tx_EnUnder 0x00000100 /* 1:Enable Underrun */ +#define Tx_FBack 0x00000010 /* 1:Fast Back-off */ +#define Tx_NoCRC 0x00000008 /* 1:Suppress Padding */ +#define Tx_NoPad 0x00000004 /* 1:Suppress Padding */ +#define Tx_TxHalt 0x00000002 /* 1:Transmit Halt Request */ +#define Tx_En 0x00000001 /* 1:Transmit enable */ + +/* Tx_Stat (0x4C) bit assign ------------------------------------------ */ +#define Tx_SQErr 0x00010000 /* Signal Quality Error(SQE) */ +#define Tx_Halted 0x00008000 /* Tx Halted */ +#define Tx_Comp 0x00004000 /* Completion */ +#define Tx_TxPar 0x00002000 /* Tx Parity Error */ +#define Tx_LateColl 0x00001000 /* Late Collision */ +#define Tx_10Stat 0x00000800 /* 10Mbps Status */ +#define Tx_NCarr 0x00000400 /* No Carrier */ +#define Tx_Defer 0x00000200 /* Deferral */ +#define Tx_Under 0x00000100 /* Underrun */ +#define Tx_IntTx 0x00000080 /* Interrupt on Tx */ +#define Tx_Paused 0x00000040 /* Transmit Paused */ +#define Tx_TXDefer 0x00000020 /* Transmit Defered */ +#define Tx_ExColl 0x00000010 /* Excessive Collision */ +#define Tx_TxColl_MASK 0x0000000F /* Tx Collision Count */ + +/* + * Rx_Ctl (0x50) bit assign ------------------------------------------- + * EnLenErr is a bit that is NOT defined in the manual but was added + * It indicates the reception of a frame whose protocol id field value + * does not match a length. This interrupt allows us the process IP + * and other packets whose protocol id field is not treated as a length + */ +#define Rx_EnGood 0x00004000 /* 1:Enable Good */ +#define Rx_EnRxPar 0x00002000 /* 1:Enable Receive Parity */ +#define Rx_EnLenErr 0x00001000 /* 1:Enable Length Error */ +#define Rx_EnLongErr 0x00000800 /* 1:Enable Long Error */ +#define Rx_EnOver 0x00000400 /* 1:Enable OverFlow */ +#define Rx_EnCRCErr 0x00000200 /* 1:Enable CRC Error */ +#define Rx_EnAlign 0x00000100 /* 1:Enable Alignment */ +/* RESERVED 0x00000080 Not used, must be zero */ +#define Rx_IgnoreCRC 0x00000040 /* 1:Ignore CRC Value */ +#define Rx_StripCRC 0x00000010 /* 1:Strip CRC Value */ +#define Rx_ShortEn 0x00000008 /* 1:Short Enable */ +#define Rx_LongEn 0x00000004 /* 1:Long Enable */ +#define Rx_RxHalt 0x00000002 /* 1:Receive Halt Request */ +#define Rx_RxEn 0x00000001 /* 1:Receive Intrrupt Enable */ + +/* Rx_Stat (0x54) bit assign ------------------------------------------ */ +#define Rx_Halted 0x00008000 /* Rx Halted */ +#define Rx_Good 0x00004000 /* Rx Good */ +#define Rx_RxPar 0x00002000 /* Rx Parity Error */ +/* RESERVED 0x00001000 Not used, must be zero */ +#define Rx_LongErr 0x00000800 /* Rx Long Error */ +#define Rx_Over 0x00000400 /* Rx Overflow */ +#define Rx_CRCErr 0x00000200 /* Rx CRC Error */ +#define Rx_Align 0x00000100 /* Rx Alignment Error */ +#define Rx_10Stat 0x00000080 /* Rx 10Mbps Status */ +#define Rx_IntRx 0x00000040 /* Rx Interrupt */ +#define Rx_CtlRecd 0x00000020 /* Rx Control Receive */ +#define Rx_Stat_Mask 0x0000EFC0 /* Rx All Status Mask */ + +/* MD_CA (0x5C) bit assign -------------------------------------------- */ +#define MD_CA_PreSup 0x00001000 /* 1:Preamble Supress */ +#define MD_CA_BUSY_BIT 0x00000800 /* 1:Busy (Start Operation) */ +#define MD_CA_Wr 0x00000400 /* 1:Write 0:Read */ +#define MD_CA_PHYADD 0x000003E0 /* bits 9:5 */ +#define MD_CA_PHYREG 0x0000001F /* bits 4:0 */ +#define MD_CA_PhyShift 5 +#define MD_MAX_PHY 32 /* Maximum number of PHY per MII */ +#define MD_UNASSIGNED_PHY 0xFD /* PHY address has not been */ + /* determined yet */ +#define MD_SWITCH_PHY 0xFE /* No PHY exists */ +#define MD_DYNAMIC_PHY 0xFF /* Dynamically find phy */ + +/* ARC_Ena (0x68) bit assign ------------------------------------------ */ +#define ARC_ENTRY_MAX 21 /* ARC Data entry max count */ +#define ARC_Ena_Mask ((1 << ARC_ENTRY_MAX) - 1) + /* ARC Enable bits (Max 21) */ +#define ARC_Ena_Bit(index) (1 << (index)) +#define ARC_ENTRY_DESTINATION 0 +#define ARC_ENTRY_SOURCE 1 +#define ARC_ENTRY_MACCTL 20 + +/* BCTRL_Reg (0xd4) bit assign ---------------------------------------- */ +#define RMII_Reset 0x00000004 /* RMII Reset */ +#define RMII_10MBIT 0x00000002 /* 1 if 10 Mbs, 0 if 100 Mbs */ +#define RMII_ClkRising 0x00000001 /* 0 if TxD generated off */ + /* falling edge, */ + /* 1 if generated off */ + /* rising edge of Tx-CLK */ + +/********************************************************************** + * Data structures + */ + +/* Frame descripter */ +struct f_desc { + volatile u32 FDNext; + volatile u32 FDSystem; + volatile u32 FDStat; + volatile u32 FDCtl; +}; + +/* Buffer descripter */ +struct b_desc { + volatile u32 BuffData; + volatile u32 BDCtl; +}; + +#define FD_ALIGN 16 + +/* Frame Descripter bit assign ---------------------------------------- */ +#define FD_Next_EOL 0x00000001 /* FDNext EOL indicator */ +#define FD_Next_MASK 0xFFFFFFF0 /* FDNext valid pointer */ + +#define FD_FDLength_MASK 0x0000FFFF /* Length MASK */ +#define FD_BDCnt_MASK 0x001F0000 /* BD count MASK in FD */ +#define FD_FrmOpt_MASK 0x7C000000 /* Frame option MASK */ +#define FD_FrmOpt_BigEndian 0x40000000 /* Tx/Rx */ +#define FD_FrmOpt_IntTx 0x20000000 /* Tx only */ +#define FD_FrmOpt_NoCRC 0x10000000 /* Tx only */ +#define FD_FrmOpt_NoPadding 0x08000000 /* Tx only */ +#define FD_FrmOpt_Packing 0x04000000 /* Rx only */ +#define FD_CownsFD 0x80000000 /* FD Controller owner bit */ +#define FD_BDCnt_SHIFT 16 +#define FD_CownsFD_Set 0x80010000 /* (FD_CownsFD | */ + /* (1 << FD_BDCnt_SHIFT)) */ + +/* Buffer Descripter bit assign --------------------------------------- */ +#define BD_BuffLength_MASK 0x0000FFFF /* Recieve Data Size */ +#define BD_RxBDID_MASK 0x00FF0000 /* BD ID Number MASK */ +#define BD_RxBDSeqN_MASK 0x7F000000 /* Rx BD Sequence Number */ +#define BD_CownsBD 0x80000000 /* BD Controller owner bit */ +#define BD_DataAlign_MASK 0xFFFFFFF0 /* Buffer alignment mask */ +#define BD_RxBDID_SHIFT 16 +#define BD_RxBDSeqN_SHIFT 24 + +/* Operational constants */ +#define DMA_CTL_CMD (DMA_M66EnStat | DMA_RxBigE | DMA_TxBigE | \ + DMA_RxAlign2 | (DMA_BURST_SIZE << DMA_BRST_Shift)) + +#define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \ + Tx_EnExColl | Tx_EnLCarr | Tx_EnExDefer | \ + Tx_EnUnder | Tx_En) + +#define RX_CTL_CMD (Rx_EnGood | Rx_EnRxPar | Rx_EnLongErr | Rx_EnOver | \ + Rx_EnCRCErr | Rx_EnAlign | Rx_RxEn) + +#define INT_EN_CMD (IntEn_NRAB | IntEn_DmParErr | IntEn_SSysErr | \ + IntEn_BLEx | IntEn_FDAEx) + +#define FATAL_ERROR_INT (IntSrc_NRAB | IntSrc_DmParErr | IntSrc_BLEx) + +#define BMSR_EXISTS (BMSR_ANEGCAPABLE | BMSR_10HALF | BMSR_10FULL | \ + BMSR_100HALF | BMSR_100FULL) + +/* Error check and calculate constants & masks */ +#if RX_BUF_ORDER > 8 || RX_BUF_ORDER < 0 +#error "RX buffer order out of limits. 0 < ORDER < 9" +#endif + +#if TX_BUF_ORDER > 8 || TX_BUF_ORDER < 0 +#error "TX buffer order out of limits. 0 < ORDER < 9" +#endif + +#define RX_BUF_NUM (1 << RX_BUF_ORDER) +#define RX_BUF_MASK (RX_BUF_NUM - 1) +#define TX_BUF_NUM (1 << TX_BUF_ORDER) +#define TX_BUF_MASK (TX_BUF_NUM - 1) + +#ifdef CONFIG_MSPETH_NAPI +#define TXDONE_MAX_PKT 4 +#define NAPI_WEIGHT 64 /* Number of packets handled at one poll */ +#else +#define TXDONE_MAX_PKT TX_BUF_NUM +#endif /* CONFIG_MSPETH_NAPI */ + +#ifdef CONFIG_MSPETH_SKB_RECYCLE +#define SKBUFF_RECYCLABLE_SIZE (SKB_DATA_ALIGN(MSP_END_BUFSIZE + 2 + 16)) + +/* Handler for skb recycle bin */ +struct { + struct sk_buff *recycle_queue; /* recyclable skbs are queued here */ + unsigned long recycle_max; /* storage capacity in no.of skbs */ + unsigned long recycle_count; /* avilable skbs in bin */ + unsigned long user_count; /* bin usage count */ + unsigned long recycle_hits; /* number of hits */ + unsigned long recycle_misses; /* number of misses */ + spinlock_t lock; /* for mutual exclusion */ +} skb_bin; +#endif /* CONFIG_MSPETH_SKB_RECYCLE */ + +struct q_desc { + union { + struct f_desc fd; + struct f_desc fd0; + }; + union { + struct b_desc bd; + struct f_desc fd1; + }; +}; + +/* + * hammtrev, 2005-11-25: + * Apparently, the MSP Ethernet has a hardware issue which could hang the + * device if a BLEx interrupt comes before a FDAEx, so they should be + * avoided if at all possible. Changing to ensure there are twice as many + * buffer descriptors as frame descriptors. + */ +struct bl_desc { + struct f_desc fd; + struct b_desc bd[RX_BUF_NUM << 1]; +}; + + +/* Structure to define access to each phy (for control purposes) */ +struct mspeth_phy { + struct mspeth_phy *next_phy; + u8 hwunit; + u8 phyaddr; + void *memaddr; + bool assigned; + bool linkup; + spinlock_t lock; +}; + +/* Information that need to be kept for each board. */ +struct mspeth_priv { + /* device configuration & constants */ + u8 unit; /* logical unit number */ + u8 hwunit; /* hardware unit number */ + u8 option; /* option setting from PROM or bootline */ + int speed; /* actual speed, 10 or 100 */ + bool fullduplex; /* actual duplex */ + + /* device object pointer */ + struct device *dev; + + /* phy configuration & control index */ + struct mspeth_phy *phyptr; + + /* ioremapped register access cookie */ + void *mapaddr; + + /* ioremapped system reset registers */ + void *rstaddr; + + /* tasklet queues */ + struct tasklet_struct rx_tasklet; + struct tasklet_struct tx_tasklet; + struct tasklet_struct hard_restart_tasklet; + + /* link monitor timer */ + struct timer_list link_timer; + + /* statistics */ + struct net_device_stats stats; /* statistics */ + int fatal_icnt; + struct { + int max_tx_qlen; + int tx_ints; + int rx_ints; + int tx_full; + int fd_exha; + } lstats; + + /* debug message level */ + u32 msg_enable; + + /* + * Buffer structures + * + * Transmitting: Batch Mode. + * 1 BD in 1 TxFD + * circular list of FDs + * Receiving: Non-Packing mode + * 1 circular FD for Free Buffer List. + * RX_BUF_NUM BD in Free Buffer FD. + * One Free Buffer BD has preallocated skb data + */ + void *fd_base; + + struct q_desc *rxfd_base; /* RX FD region ptr */ + struct q_desc *rxfd_curr; /* RX FD current ptr */ + struct q_desc *txfd_base; /* TX FD region ptr */ + + u32 tx_head, tx_tail; /* insert/delete for TX queue */ + atomic_t tx_qspc; /* space available on the transmit queue */ + + struct bl_desc *blfd_ptr; /* Free list FD head */ + struct sk_buff **rx_skbp; /* RX skb ptr array */ + dma_addr_t *rx_dma_skbp; /* RX dma map array */ +}; + +#endif /* _MSPETH_H_ */ diff --git a/arch/mips/pmc-sierra/msp71xx/msp_eth.c b/arch/mips/pmc-sierra/msp71xx/msp_eth.c new file mode 100644 index 0000000..8799960 --- /dev/null +++ b/arch/mips/pmc-sierra/msp71xx/msp_eth.c @@ -0,0 +1,122 @@ +/* + * The setup file for ethernet related hardware on PMC-Sierra MSP processors. + * + * Copyright 2005-2006 PMC-Sierra, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include + +#include +#include + +#if defined(CONFIG_PMC_MSP4200_GW) +#include +#include +#define MSP_ETH_GPIO 9 +#define MSP_ETH_GPIO_MODE_REG GPIO_CFG3_REG +#define MSP_ETH_GPIO_DATA_REG GPIO_DATA3_REG +#elif defined(CONFIG_PMC_MSP7120_GW) +#include +#include +#define MSP_ETH_GPIO 14 +#define MSP_ETH_GPIO_MODE_REG GPIO_CFG4_REG +#define MSP_ETH_GPIO_DATA_REG GPIO_DATA4_REG +#endif + +#define MSP_ETH_ID "mspeth" + +static struct resource msp_eth0_resources[] = { + [0] = { + .start = MSP_MAC0_BASE, + .end = MSP_MAC0_BASE + MSP_MAC_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MSP_INT_MAC0, + .end = MSP_INT_MAC0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct resource msp_eth1_resources[] = { + [0] = { + .start = MSP_MAC1_BASE, + .end = MSP_MAC1_BASE + MSP_MAC_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MSP_INT_MAC1, + .end = MSP_INT_MAC1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device msp_eth_devs[] = { + [0] = { + .name = MSP_ETH_ID, + .id = 0, + .num_resources = ARRAY_SIZE(msp_eth0_resources), + .resource = msp_eth0_resources, + }, + [1] = { + .name = MSP_ETH_ID, + .id = 1, + .num_resources = ARRAY_SIZE(msp_eth1_resources), + .resource = msp_eth1_resources, + }, +}; + +static int __init msp_eth_setup(void) +{ + int i, ret = 0; + +#if defined(CONFIG_PMC_MSP4200_GW) || \ + defined(CONFIG_PMC_MSP7120_GW) + /* Configure the GPIO and take the ethernet PHY out of reset */ + set_value_reg32(MSP_ETH_GPIO_MODE_REG, + BASIC_MODE_MASK(MSP_ETH_GPIO), + BASIC_MODE(MSP_GPIO_OUTPUT, MSP_ETH_GPIO)); + set_reg32(MSP_ETH_GPIO_DATA_REG, + BASIC_DATA_MASK(MSP_ETH_GPIO)); +#endif + + /* Register the ethernet devices and bind the drivers */ + for (i = 0; i < ARRAY_SIZE(msp_eth_devs); i++) { + ret = platform_device_register(&msp_eth_devs[i]); + if (ret) { + while (--i >= 0) + platform_device_unregister(&msp_eth_devs[i]); + break; + } + } + + if (ret) + printk(KERN_WARNING + "Could not initialize MSPETH device structures.\n"); + + return ret; +} + +subsys_initcall(msp_eth_setup); From wilson@specifix.com Thu May 10 20:01:12 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 10 May 2007 20:01:14 +0100 (BST) Received: from w099.z064220152.sjc-ca.dsl.cnc.net ([64.220.152.99]:21165 "EHLO bluesmobile.specifix.com") by ftp.linux-mips.org with ESMTP id S20022919AbXEJTBM (ORCPT ); Thu, 10 May 2007 20:01:12 +0100 Received: from localhost.localdomain (bluesmobile.specifix.com [64.220.152.99]) by bluesmobile.specifix.com (Postfix) with ESMTP id 98F323B8F2; Thu, 10 May 2007 12:00:31 -0700 (PDT) Subject: Re: Building a cross kernel for the IP27/Origin System From: Jim Wilson To: Claus Herrmann Cc: linux-mips@linux-mips.org In-Reply-To: <4640911A.4080801@cybits.de> References: <4640911A.4080801@cybits.de> Content-Type: text/plain Date: Thu, 10 May 2007 12:00:35 -0700 Message-Id: <1178823635.2740.6.camel@localhost.localdomain> Mime-Version: 1.0 X-Mailer: Evolution 2.6.3 (2.6.3-2.fc5) Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15020 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wilson@specifix.com Precedence: bulk X-list: linux-mips On Tue, 2007-05-08 at 17:02 +0200, Claus Herrmann wrote: > mips-linux-ld: Dwarf Error: found dwarf version '0', this reader only handles version 2 information. When GNU ld prints an error message, it first looks to see if you compiled with debug info, and if you did, it tries to read and parse the debug info so it can pretty-print the error message with source file and source line number info. This makes it easier to figure out where the problem is. Unfortunately, this code sometimes fails. The linker must modify the debug info during the linking process by applying relocations. If we try to read the debug info at the wrong time, we may get an inconsistent view of it, and may fail to read it correctly. The code is fail soft, so this is harmless, except that you get annoying messages that make no sense to you. Newer GNU ld versions handle this much better than older GNU ld versions. I suspect this is what is happening in your case. Just edit out the annoying and useless dwarf error messages, and you get > arch/mips/mm/built-in.o: In function `mem_init': > : multiple definition of `mem_init' > arch/mips/sgi-ip27/built-in.o:: first defined here > arch/mips/mm/built-in.o: In function `paging_init': > : multiple definition of `paging_init' > arch/mips/sgi-ip27/built-in.o:: first defined here which is your real problem. Looks like a problem with your mips kernel configuration. -- Jim Wilson, GNU Tools Support, http://www.specifix.com From yoichi_yuasa@tripeaks.co.jp Fri May 11 04:59:35 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 04:59:36 +0100 (BST) Received: from mo32.po.2iij.NET ([210.128.50.17]:37178 "EHLO mo32.po.2iij.net") by ftp.linux-mips.org with ESMTP id S20021773AbXEKD7f (ORCPT ); Fri, 11 May 2007 04:59:35 +0100 Received: by mo.po.2iij.net (mo32) id l4B3xP4Z032929; Fri, 11 May 2007 12:59:25 +0900 (JST) Received: from localhost.localdomain (65.126.232.202.bf.2iij.net [202.232.126.65]) by mbox.po.2iij.net (mbox32) id l4B3xJbn089751 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 11 May 2007 12:59:20 +0900 (JST) Date: Fri, 11 May 2007 12:59:19 +0900 From: Yoichi Yuasa To: drzeus@drzeus.cx Cc: yoichi_yuasa@tripeaks.co.jp, linux-mips Subject: [PATCH] mmc: add include to au1xmmc.c Message-Id: <20070511125919.350c53a8.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15021 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi, This patch has fixed the following error about au1xmmc.c . drivers/mmc/host/au1xmmc.c: In function 'au1xmmc_send_command': drivers/mmc/host/au1xmmc.c:217: error: 'MMC_READ_SINGLE_BLOCK' undeclared (first use in this function) drivers/mmc/host/au1xmmc.c:217: error: (Each undeclared identifier is reported only once drivers/mmc/host/au1xmmc.c:217: error: for each function it appears in.) drivers/mmc/host/au1xmmc.c:218: error: 'SD_APP_SEND_SCR' undeclared (first use in this function) drivers/mmc/host/au1xmmc.c:221: error: 'MMC_READ_MULTIPLE_BLOCK' undeclared (first use in this function) drivers/mmc/host/au1xmmc.c:224: error: 'MMC_WRITE_BLOCK' undeclared (first use in this function) drivers/mmc/host/au1xmmc.c:228: error: 'MMC_WRITE_MULTIPLE_BLOCK' undeclared (first use in this function) drivers/mmc/host/au1xmmc.c:231: error: 'MMC_STOP_TRANSMISSION' undeclared (first use in this function) Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/drivers/mmc/host/au1xmmc.c mips/drivers/mmc/host/au1xmmc.c --- mips-orig/drivers/mmc/host/au1xmmc.c 2007-05-10 15:14:44.705610250 +0900 +++ mips/drivers/mmc/host/au1xmmc.c 2007-05-10 18:12:02.785248000 +0900 @@ -42,6 +42,7 @@ #include #include +#include #include #include #include From drzeus@drzeus.cx Fri May 11 05:48:41 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 05:48:42 +0100 (BST) Received: from 85.8.24.16.se.wasadata.net ([85.8.24.16]:27567 "EHLO smtp.drzeus.cx") by ftp.linux-mips.org with ESMTP id S20021850AbXEKEsl (ORCPT ); Fri, 11 May 2007 05:48:41 +0100 Received: from poseidon.drzeus.cx (wlan152.drzeus.cx [::ffff:10.8.2.152]) (AUTH: LOGIN drzeus) by smtp.drzeus.cx with esmtp; Fri, 11 May 2007 06:48:39 +0200 id 00062A6D.4643F5A7.000039B8 Message-ID: <4643F57C.5060409@drzeus.cx> Date: Fri, 11 May 2007 06:47:56 +0200 From: Pierre Ossman User-Agent: Thunderbird 2.0.0.0 (X11/20070419) Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="=_hera.drzeus.cx-14776-1178858919-0001-2" To: Yoichi Yuasa CC: linux-mips Subject: Re: [PATCH] mmc: add include to au1xmmc.c References: <20070511125919.350c53a8.yoichi_yuasa@tripeaks.co.jp> In-Reply-To: <20070511125919.350c53a8.yoichi_yuasa@tripeaks.co.jp> X-Enigmail-Version: 0.95.0 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15022 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: drzeus@drzeus.cx Precedence: bulk X-list: linux-mips This is a MIME-formatted message. If you see this text it means that your E-mail software does not support MIME-formatted messages. --=_hera.drzeus.cx-14776-1178858919-0001-2 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Yoichi Yuasa wrote: > Hi, >=20 > This patch has fixed the following error about au1xmmc.c . >=20 > drivers/mmc/host/au1xmmc.c: In function 'au1xmmc_send_command': > drivers/mmc/host/au1xmmc.c:217: error: 'MMC_READ_SINGLE_BLOCK' undeclar= ed (first use in this function) > drivers/mmc/host/au1xmmc.c:217: error: (Each undeclared identifier is r= eported only once > drivers/mmc/host/au1xmmc.c:217: error: for each function it appears in.= ) > drivers/mmc/host/au1xmmc.c:218: error: 'SD_APP_SEND_SCR' undeclared (fi= rst use in this function) > drivers/mmc/host/au1xmmc.c:221: error: 'MMC_READ_MULTIPLE_BLOCK' undecl= ared (first use in this function) > drivers/mmc/host/au1xmmc.c:224: error: 'MMC_WRITE_BLOCK' undeclared (fi= rst use in this function) > drivers/mmc/host/au1xmmc.c:228: error: 'MMC_WRITE_MULTIPLE_BLOCK' undec= lared (first use in this function) > drivers/mmc/host/au1xmmc.c:231: error: 'MMC_STOP_TRANSMISSION' undeclar= ed (first use in this function) >=20 > Yoichi >=20 > Signed-off-by: Yoichi Yuasa >=20 NAK for now. I want an explanation what those opcodes are doing in a host= driver. Rgds Pierre --=_hera.drzeus.cx-14776-1178858919-0001-2 Content-Type: application/pgp-signature; name="signature.asc" Content-Transfer-Encoding: 7bit Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.7 (GNU/Linux) Comment: Using GnuPG with Fedora - http://enigmail.mozdev.org iD8DBQFGQ/V87b8eESbyJLgRAvUfAKCIJG/eJxpsVPLJ19ZADHIOADoZygCg70PC 43u0h0c/z/k8FN8rAffCzlY= =oxCE -----END PGP SIGNATURE----- --=_hera.drzeus.cx-14776-1178858919-0001-2-- From yoichi_yuasa@tripeaks.co.jp Fri May 11 06:16:31 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 06:16:33 +0100 (BST) Received: from mo31.po.2iij.NET ([210.128.50.54]:50236 "EHLO mo31.po.2iij.net") by ftp.linux-mips.org with ESMTP id S20022119AbXEKFQb (ORCPT ); Fri, 11 May 2007 06:16:31 +0100 Received: by mo.po.2iij.net (mo31) id l4B5GOEa010802; Fri, 11 May 2007 14:16:24 +0900 (JST) Received: from localhost.localdomain (65.126.232.202.bf.2iij.net [202.232.126.65]) by mbox.po.2iij.net (mbox33) id l4B5GMQJ053603 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 11 May 2007 14:16:22 +0900 (JST) Message-Id: <200705110516.l4B5GMQJ053603@mbox33.po.2iij.net> Date: Fri, 11 May 2007 14:16:22 +0900 From: Yoichi Yuasa To: Pierre Ossman Cc: yoichi_yuasa@tripeaks.co.jp, linux-mips@linux-mips.org Subject: Re: [PATCH] mmc: add include to au1xmmc.c In-Reply-To: <4643F57C.5060409@drzeus.cx> References: <20070511125919.350c53a8.yoichi_yuasa@tripeaks.co.jp> <4643F57C.5060409@drzeus.cx> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15023 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi, On Fri, 11 May 2007 06:47:56 +0200 Pierre Ossman wrote: > Yoichi Yuasa wrote: > > Hi, > > > > This patch has fixed the following error about au1xmmc.c . > > > > drivers/mmc/host/au1xmmc.c: In function 'au1xmmc_send_command': > > drivers/mmc/host/au1xmmc.c:217: error: 'MMC_READ_SINGLE_BLOCK' undeclared (first use in this function) > > drivers/mmc/host/au1xmmc.c:217: error: (Each undeclared identifier is reported only once > > drivers/mmc/host/au1xmmc.c:217: error: for each function it appears in.) > > drivers/mmc/host/au1xmmc.c:218: error: 'SD_APP_SEND_SCR' undeclared (first use in this function) > > drivers/mmc/host/au1xmmc.c:221: error: 'MMC_READ_MULTIPLE_BLOCK' undeclared (first use in this function) > > drivers/mmc/host/au1xmmc.c:224: error: 'MMC_WRITE_BLOCK' undeclared (first use in this function) > > drivers/mmc/host/au1xmmc.c:228: error: 'MMC_WRITE_MULTIPLE_BLOCK' undeclared (first use in this function) > > drivers/mmc/host/au1xmmc.c:231: error: 'MMC_STOP_TRANSMISSION' undeclared (first use in this function) > > > > Yoichi > > > > Signed-off-by: Yoichi Yuasa > > > > NAK for now. I want an explanation what those opcodes are doing in a host driver. The commands of au1xmmc controller are different from standard commands. au1xmmc_send_command() convert standard commands to local commands for au1xmmc host controller, and send local commands to controller. Yoichi From drzeus@drzeus.cx Fri May 11 06:22:33 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 06:22:34 +0100 (BST) Received: from 85.8.24.16.se.wasadata.net ([85.8.24.16]:31161 "EHLO smtp.drzeus.cx") by ftp.linux-mips.org with ESMTP id S20022132AbXEKFWd (ORCPT ); Fri, 11 May 2007 06:22:33 +0100 Received: from poseidon.drzeus.cx (wlan152.drzeus.cx [::ffff:10.8.2.152]) (AUTH: LOGIN drzeus) by smtp.drzeus.cx with esmtp; Fri, 11 May 2007 07:21:32 +0200 id 00062A7A.4643FD5C.000039F7 Message-ID: <4643FD2B.8020103@drzeus.cx> Date: Fri, 11 May 2007 07:20:43 +0200 From: Pierre Ossman User-Agent: Thunderbird 2.0.0.0 (X11/20070419) Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="=_hera.drzeus.cx-14839-1178860892-0001-2" To: Yoichi Yuasa CC: linux-mips@linux-mips.org Subject: Re: [PATCH] mmc: add include to au1xmmc.c References: <20070511125919.350c53a8.yoichi_yuasa@tripeaks.co.jp> <4643F57C.5060409@drzeus.cx> <200705110516.l4B5GMQJ053603@mbox33.po.2iij.net> In-Reply-To: <200705110516.l4B5GMQJ053603@mbox33.po.2iij.net> X-Enigmail-Version: 0.95.0 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15024 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: drzeus@drzeus.cx Precedence: bulk X-list: linux-mips This is a MIME-formatted message. If you see this text it means that your E-mail software does not support MIME-formatted messages. --=_hera.drzeus.cx-14839-1178860892-0001-2 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Yoichi Yuasa wrote: >=20 > The commands of au1xmmc controller are different from standard commands= =2E=20 > au1xmmc_send_command() convert standard commands to local commands for = au1xmmc host controller, > and send local commands to controller. >=20 A quick glance at the code seems to suggest it's specifying the type of c= ommand. And it should be able to figure that out in a more generic way. Rgds Pierre --=_hera.drzeus.cx-14839-1178860892-0001-2 Content-Type: application/pgp-signature; name="signature.asc" Content-Transfer-Encoding: 7bit Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.7 (GNU/Linux) Comment: Using GnuPG with Fedora - http://enigmail.mozdev.org iD8DBQFGQ/0u7b8eESbyJLgRAkE4AKCo3ynl5bweMr4W+2EBNuw+UQ6U6QCfXYYC A6+7Fa7xFeuOE73LMO/rpcE= =1trZ -----END PGP SIGNATURE----- --=_hera.drzeus.cx-14839-1178860892-0001-2-- From che@cybits.de Fri May 11 08:19:21 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 08:19:26 +0100 (BST) Received: from mail.cybits.de ([213.139.144.204]:48142 "EHLO mail.cybits.de") by ftp.linux-mips.org with ESMTP id S20022240AbXEKHTV convert rfc822-to-8bit (ORCPT ); Fri, 11 May 2007 08:19:21 +0100 Received: from localhost (unknown [127.0.0.1]) by mail.cybits.de (Postfix) with ESMTP id 842542D6BB5; Fri, 11 May 2007 07:21:27 +0000 (UTC) X-Virus-Scanned: amavisd-new at cybits.de Received: from mail.cybits.de ([127.0.0.1]) by localhost (mail.cybits.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 3pn5QRPsWRkB; Fri, 11 May 2007 09:21:26 +0200 (CEST) Received: from CYBIEX01.mz.ads.cybits.de (unknown [192.168.1.213]) by mail.cybits.de (Postfix) with ESMTP id 46FAF2D6BB1; Fri, 11 May 2007 09:21:26 +0200 (CEST) X-MimeOLE: Produced By Microsoft Exchange V6.5 Content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 8BIT Subject: AW: Building a cross kernel for the IP27/Origin System Date: Fri, 11 May 2007 09:19:14 +0200 Message-ID: <3713978C68303748B17B273D85768CD208E68C@CYBIEX01.mz.ads.cybits.de> X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: Building a cross kernel for the IP27/Origin System Thread-Index: AceTNVCpeSWFNNVHTn+dBWOW8zxEogAZEynQ References: <4640911A.4080801@cybits.de> <1178823635.2740.6.camel@localhost.localdomain> From: "Claus Herrmann" To: "Jim Wilson" Cc: Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15025 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: che@cybits.de Precedence: bulk X-list: linux-mips Hi Jim, thanks for your response. To be honest, the Dwarf Error I ignored. I did nothing special in the configuration. I just selected the IP27 as Machine and off I went. And there the first Problems occured. When oyu select the IP27 many options in the ConfigMenu have tob e taken by hand (is this normal?). The Pci Module is not selected (brings linker errors of course (cant find PCI_Probe..), the option for Multi CPU is not selected (same linkererror with "cant find CPU_IRQ or something like this). I am at the point that I found every packet which the compilation needs and what he doesnt need. But the "multiple definitions"-Error I am at my end. For what it looks to me, it looks like there is a wrong architecture configurations file in the archive. First of all it doesnt make sense, when you select the arcitecture IP27, all required modules (Pci, MultiCpu...) have to be selected by hand. What it seems to me, the automated build scripts seem to compile the general "arch/mips" and the specific "arch/mips/ip27" thus creating the error. Brgds Claus -----Ursprüngliche Nachricht----- Von: Jim Wilson [mailto:wilson@specifix.com] Gesendet: Donnerstag, 10. Mai 2007 21:01 An: Claus Herrmann Cc: linux-mips@linux-mips.org Betreff: Re: Building a cross kernel for the IP27/Origin System On Tue, 2007-05-08 at 17:02 +0200, Claus Herrmann wrote: > mips-linux-ld: Dwarf Error: found dwarf version '0', this reader only handles version 2 information. When GNU ld prints an error message, it first looks to see if you compiled with debug info, and if you did, it tries to read and parse the debug info so it can pretty-print the error message with source file and source line number info. This makes it easier to figure out where the problem is. Unfortunately, this code sometimes fails. The linker must modify the debug info during the linking process by applying relocations. If we try to read the debug info at the wrong time, we may get an inconsistent view of it, and may fail to read it correctly. The code is fail soft, so this is harmless, except that you get annoying messages that make no sense to you. Newer GNU ld versions handle this much better than older GNU ld versions. I suspect this is what is happening in your case. Just edit out the annoying and useless dwarf error messages, and you get > arch/mips/mm/built-in.o: In function `mem_init': > : multiple definition of `mem_init' > arch/mips/sgi-ip27/built-in.o:: first defined here > arch/mips/mm/built-in.o: In function `paging_init': > : multiple definition of `paging_init' > arch/mips/sgi-ip27/built-in.o:: first defined here which is your real problem. Looks like a problem with your mips kernel configuration. -- Jim Wilson, GNU Tools Support, http://www.specifix.com From mano@roarinelk.homelinux.net Fri May 11 10:39:38 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 10:39:42 +0100 (BST) Received: from fnoeppeil48.netpark.at ([217.175.205.176]:45328 "EHLO roarinelk.homelinux.net") by ftp.linux-mips.org with ESMTP id S20022358AbXEKJji (ORCPT ); Fri, 11 May 2007 10:39:38 +0100 Received: (qmail 15974 invoked by uid 1000); 11 May 2007 11:38:37 +0200 Date: Fri, 11 May 2007 11:38:37 +0200 From: Manuel Lauss To: i2c@lm-sensors.org, linux-mips@linux-mips.org Subject: [PATCH] Convert Au1550 I2C adapter driver to platform_driver Message-ID: <20070511093837.GA15959@roarinelk.homelinux.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.11 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15026 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mano@roarinelk.homelinux.net Precedence: bulk X-list: linux-mips Hi everyone, I was chasing a bug which set the RTC minute register on my board to "2" every time the I2C layer probed for it, and while I was at it converted the driver to a platform_driver. Run-tested on Au1200, compile tested only db/pb1200/pb1550, patch is against 2.6.21 Thanks, Manuel Lauss --- Convert Au1550 I2C adapter driver to platform_driver - Convert the Au1550 I2C adapter driver to platform device - Fix bus corruption wrt. to the SMBUS_QUICK probe feature (driver would not send a I2C stop and subsequent probes overwrote the minute register in my board's RTC) - add a corresponding platform_device registration to arch/mips/au1000/common/platform.c - update the au1xxx_psc header file for the new driver arch/mips/au1000/common/platform.c | 22 + drivers/i2c/busses/i2c-au1550.c | 400 +++++++++++++----------------- drivers/i2c/busses/i2c-au1550.h | 32 -- include/asm-mips/mach-au1x00/au1xxx_psc.h | 18 - 4 files changed, 212 insertions(+), 260 deletions(-) Signed-off-by: Manuel Lauss diff -Naurp linux-2.6.21/arch/mips/au1000/common/platform.c linux-2.6.21-aui2c/arch/mips/au1000/common/platform.c --- linux-2.6.21/arch/mips/au1000/common/platform.c 2007-04-26 05:08:32.000000000 +0200 +++ linux-2.6.21-aui2c/arch/mips/au1000/common/platform.c 2007-05-11 11:53:10.247681000 +0200 @@ -14,6 +14,7 @@ #include #include +#include /* OHCI (USB full speed host controller) */ static struct resource au1xxx_usb_ohci_resources[] = { @@ -270,6 +271,24 @@ static struct platform_device smc91x_dev #endif +/* All Alchemy demoboards with I2C have this #define in their headers */ +#ifdef SMBUS_PSC_BASE +static struct resource pbdb_smbus_resources[] = { + { + .start = SMBUS_PSC_BASE, + .end = SMBUS_PSC_BASE + 0x24, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device pbdb_smbus_device = { + .name = "au1xpsc_smbus", + .id = 0, + .num_resources = ARRAY_SIZE(pbdb_smbus_resources), + .resource = pbdb_smbus_resources, +}; +#endif + static struct platform_device *au1xxx_platform_devices[] __initdata = { &au1xxx_usb_ohci_device, &au1x00_pcmcia_device, @@ -287,6 +306,9 @@ static struct platform_device *au1xxx_pl #ifdef CONFIG_MIPS_DB1200 &smc91x_device, #endif +#ifdef SMBUS_PSC_BASE + &pbdb_smbus_device, +#endif }; int au1xxx_platform_init(void) diff -Naurp linux-2.6.21/drivers/i2c/busses/i2c-au1550.c linux-2.6.21-aui2c/drivers/i2c/busses/i2c-au1550.c --- linux-2.6.21/drivers/i2c/busses/i2c-au1550.c 2007-05-11 07:30:42.629430000 +0200 +++ linux-2.6.21-aui2c/drivers/i2c/busses/i2c-au1550.c 2007-05-11 11:39:13.817681000 +0200 @@ -4,9 +4,9 @@ * * 2.6 port by Matt Porter * - * The documentation describes this as an SMBus controller, but it doesn't - * understand any of the SMBus protocol in hardware. It's really an I2C - * controller that could emulate most of the SMBus in software. + * The documentation describes this as an SMBus controller, but it + * doesn't understand any of the SMBus protocol in hardware. It's really + * an I2C controller that could emulate most of the SMBus in software. * * This is just a skeleton adapter to use with the Au1550 PSC * algorithm. It was developed for the Pb1550, but will work with @@ -33,29 +33,29 @@ #include #include #include +#include #include #include -#include "i2c-au1550.h" +struct i2c_au1550_data { + u32 psc_base; + int xfer_timeout; + int ack_timeout; + struct i2c_adapter adap; +}; -static int -wait_xfer_done(struct i2c_au1550_data *adap) +static int wait_xfer_done(struct i2c_au1550_data *adap) { - u32 stat; + u32 stat, base = adap->psc_base; int i; - volatile psc_smb_t *sp; - - sp = (volatile psc_smb_t *)(adap->psc_base); - /* Wait for Tx FIFO Underflow. - */ + /* Wait for Tx FIFO Underflow. */ for (i = 0; i < adap->xfer_timeout; i++) { - stat = sp->psc_smbevnt; - au_sync(); + stat = au_readl(base + PSC_SMBEVNT); if ((stat & PSC_SMBEVNT_TU) != 0) { /* Clear it. */ - sp->psc_smbevnt = PSC_SMBEVNT_TU; + au_writel(PSC_SMBEVNT_TU, base + PSC_SMBEVNT); au_sync(); return 0; } @@ -65,40 +65,28 @@ wait_xfer_done(struct i2c_au1550_data *a return -ETIMEDOUT; } -static int -wait_ack(struct i2c_au1550_data *adap) +static int wait_ack(struct i2c_au1550_data *adap) { - u32 stat; - volatile psc_smb_t *sp; + u32 stat, base = adap->psc_base; if (wait_xfer_done(adap)) return -ETIMEDOUT; - sp = (volatile psc_smb_t *)(adap->psc_base); - - stat = sp->psc_smbevnt; - au_sync(); - - if ((stat & (PSC_SMBEVNT_DN | PSC_SMBEVNT_AN | PSC_SMBEVNT_AL)) != 0) + stat = au_readl(base + PSC_SMBEVNT); + if (stat & (PSC_SMBEVNT_DN | PSC_SMBEVNT_AN | PSC_SMBEVNT_AL)) return -ETIMEDOUT; return 0; } -static int -wait_master_done(struct i2c_au1550_data *adap) +static int wait_master_done(struct i2c_au1550_data *adap) { - u32 stat; - int i; - volatile psc_smb_t *sp; - - sp = (volatile psc_smb_t *)(adap->psc_base); + u32 stat, base = adap->psc_base; + int i; - /* Wait for Master Done. - */ + /* Wait for Master Done. */ for (i = 0; i < adap->xfer_timeout; i++) { - stat = sp->psc_smbevnt; - au_sync(); + stat = au_readl(base + PSC_SMBEVNT); if ((stat & PSC_SMBEVNT_MD) != 0) return 0; udelay(1); @@ -107,86 +95,67 @@ wait_master_done(struct i2c_au1550_data return -ETIMEDOUT; } -static int -do_address(struct i2c_au1550_data *adap, unsigned int addr, int rd) +static int do_address(struct i2c_au1550_data *adap, unsigned int addr, + int rd) { - volatile psc_smb_t *sp; - u32 stat; - - sp = (volatile psc_smb_t *)(adap->psc_base); + u32 stat, base = adap->psc_base; - /* Reset the FIFOs, clear events. - */ - stat = sp->psc_smbstat; - sp->psc_smbevnt = PSC_SMBEVNT_ALLCLR; + /* Reset the FIFOs, clear events. */ + stat = au_readl(base + PSC_SMBSTAT); + au_writel(PSC_SMBEVNT_ALLCLR, base + PSC_SMBEVNT); au_sync(); - if (!(stat & PSC_SMBSTAT_TE) || !(stat & PSC_SMBSTAT_RE)) { - sp->psc_smbpcr = PSC_SMBPCR_DC; + au_writel(PSC_SMBPCR_DC, base + PSC_SMBPCR); au_sync(); - do { - stat = sp->psc_smbpcr; - au_sync(); - } while ((stat & PSC_SMBPCR_DC) != 0); + while (au_readl(base + PSC_SMBPCR) & PSC_SMBPCR_DC) + msleep(0); udelay(50); } - /* Write out the i2c chip address and specify operation - */ + /* Write out the i2c chip address and specify operation */ addr <<= 1; if (rd) addr |= 1; - /* Put byte into fifo, start up master. - */ - sp->psc_smbtxrx = addr; + /* Put byte into fifo, start up master. */ + au_writel(addr, base + PSC_SMBTXRX); au_sync(); - sp->psc_smbpcr = PSC_SMBPCR_MS; + au_writel(PSC_SMBPCR_MS, base + PSC_SMBPCR); au_sync(); - if (wait_ack(adap)) - return -EIO; - return 0; + + return wait_ack(adap) ? -EIO : 0; } -static u32 -wait_for_rx_byte(struct i2c_au1550_data *adap, u32 *ret_data) +static u32 wait_for_rx_byte(struct i2c_au1550_data *adap, u32 *ret_data) { - int j; - u32 data, stat; - volatile psc_smb_t *sp; + u32 stat, base = adap->psc_base; + int j; if (wait_xfer_done(adap)) return -EIO; - sp = (volatile psc_smb_t *)(adap->psc_base); - j = adap->xfer_timeout * 100; do { j--; if (j <= 0) return -EIO; - stat = sp->psc_smbstat; - au_sync(); + stat = au_readl(base + PSC_SMBSTAT); if ((stat & PSC_SMBSTAT_RE) == 0) j = 0; else udelay(1); } while (j > 0); - data = sp->psc_smbtxrx; - au_sync(); - *ret_data = data; + *ret_data = au_readl(base + PSC_SMBTXRX); return 0; } -static int -i2c_read(struct i2c_au1550_data *adap, unsigned char *buf, +static int i2c_read(struct i2c_au1550_data *adap, unsigned char *buf, unsigned int len) { - int i; - u32 data; - volatile psc_smb_t *sp; + u32 data, base = adap->psc_base; + int i; if (len == 0) return 0; @@ -196,11 +165,9 @@ i2c_read(struct i2c_au1550_data *adap, u * receive fifo, then reading the bytes. */ - sp = (volatile psc_smb_t *)(adap->psc_base); - i = 0; while (i < (len-1)) { - sp->psc_smbtxrx = 0; + au_writel(0, base + PSC_SMBTXRX); au_sync(); if (wait_for_rx_byte(adap, &data)) return -EIO; @@ -209,80 +176,72 @@ i2c_read(struct i2c_au1550_data *adap, u i++; } - /* The last byte has to indicate transfer done. - */ - sp->psc_smbtxrx = PSC_SMBTXRX_STP; + /* The last byte has to indicate transfer done. */ + au_writel(PSC_SMBTXRX_STP, base + PSC_SMBTXRX); au_sync(); if (wait_master_done(adap)) return -EIO; - data = sp->psc_smbtxrx; - au_sync(); - buf[i] = data; + buf[i] = au_readl(base + PSC_SMBTXRX); return 0; } -static int -i2c_write(struct i2c_au1550_data *adap, unsigned char *buf, +static int i2c_write(struct i2c_au1550_data *adap, unsigned char *buf, unsigned int len) { - int i; - u32 data; - volatile psc_smb_t *sp; + u32 base = adap->psc_base; + int i; if (len == 0) return 0; - sp = (volatile psc_smb_t *)(adap->psc_base); - i = 0; while (i < (len-1)) { - data = buf[i]; - sp->psc_smbtxrx = data; + au_writel(buf[i], base + PSC_SMBTXRX); au_sync(); if (wait_ack(adap)) return -EIO; i++; } - /* The last byte has to indicate transfer done. - */ - data = buf[i]; - data |= PSC_SMBTXRX_STP; - sp->psc_smbtxrx = data; - au_sync(); + /* The last byte has to indicate transfer done. */ + au_writel(buf[i] | PSC_SMBTXRX_STP, base + PSC_SMBTXRX); if (wait_master_done(adap)) return -EIO; return 0; } -static int -au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num) +static int au1550_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, + int num) { - struct i2c_au1550_data *adap = i2c_adap->algo_data; + struct i2c_au1550_data *priv = adap->algo_data; struct i2c_msg *p; - int i, err = 0; + int i, err; + err = 0; for (i = 0; !err && i < num; i++) { p = &msgs[i]; - err = do_address(adap, p->addr, p->flags & I2C_M_RD); - if (err || !p->len) - continue; + err = do_address(priv, p->addr, p->flags & I2C_M_RD); + if (err || !p->len) { + /* do a I2C stop so the probing stuff does not + * change the time in by boards' RTC! --mlau + */ + au_writel(PSC_SMBTXRX_STP, + priv->psc_base + PSC_SMBTXRX); + au_sync(); + wait_master_done(priv); + break; + } if (p->flags & I2C_M_RD) - err = i2c_read(adap, p->buf, p->len); + err = i2c_read(priv, p->buf, p->len); else - err = i2c_write(adap, p->buf, p->len); + err = i2c_write(priv, p->buf, p->len); } - /* Return the number of messages processed, or the error code. - */ - if (err == 0) - err = num; - return err; + return err ? err : num; } -static u32 -au1550_func(struct i2c_adapter *adap) +static u32 au1550_func(struct i2c_adapter *adap) { return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; } @@ -292,146 +251,153 @@ static const struct i2c_algorithm au1550 .functionality = au1550_func, }; -/* - * registering functions to load algorithms at runtime +/* registering functions to load algorithms at runtime * Prior to calling us, the 50MHz clock frequency and routing * must have been set up for the PSC indicated by the adapter. */ -int -i2c_au1550_add_bus(struct i2c_adapter *i2c_adap) +static int i2c_au1550_probe(struct platform_device *pdev) { - struct i2c_au1550_data *adap = i2c_adap->algo_data; - volatile psc_smb_t *sp; - u32 stat; - - i2c_adap->algo = &au1550_algo; - - /* Now, set up the PSC for SMBus PIO mode. - */ - sp = (volatile psc_smb_t *)(adap->psc_base); - sp->psc_ctrl = PSC_CTRL_DISABLE; + struct i2c_au1550_data *priv; + struct resource *r; + u32 base, cfg; + int ret; + + ret = -ENODEV; + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!r) + goto out; + base = r->start; + + priv = kzalloc(sizeof(struct i2c_au1550_data), GFP_KERNEL); + if (!priv) + goto out; + + priv->psc_base = base; + priv->xfer_timeout = 200; + priv->ack_timeout = 200; + + priv->adap.id = I2C_HW_AU1550_PSC, + priv->adap.algo = &au1550_algo; + priv->adap.algo_data = priv; + priv->adap.dev.parent = &pdev->dev; + strcpy(priv->adap.name, "Au1550 PSC I2C"); + + /* Now, set up the PSC for SMBus PIO mode. */ + au_writel(PSC_CTRL_DISABLE, base + PSC_CTRL_OFFSET); au_sync(); - sp->psc_sel = PSC_SEL_PS_SMBUSMODE; - sp->psc_smbcfg = 0; + au_writel(PSC_SEL_PS_SMBUSMODE, base + PSC_SEL_OFFSET); + au_writel(0, base + PSC_SMBCFG); au_sync(); - sp->psc_ctrl = PSC_CTRL_ENABLE; + au_writel(PSC_CTRL_ENABLE, base + PSC_CTRL_OFFSET); au_sync(); - do { - stat = sp->psc_smbstat; + while (!(au_readl(base + PSC_SMBSTAT) & PSC_SMBSTAT_SR)) au_sync(); - } while ((stat & PSC_SMBSTAT_SR) == 0); - sp->psc_smbcfg = (PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 | - PSC_SMBCFG_DD_DISABLE); + cfg = PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 | + PSC_SMBCFG_DD_DISABLE; + + au_writel(PSC_SMBMSK_ALLMASK, base + PSC_SMBMSK); - /* Divide by 8 to get a 6.25 MHz clock. The later protocol - * timings are based on this clock. + /* Divide by 8 to get a 6.25 MHz clock. The protocol timings + * below are based on this clock. (96MHz AUXPLL assumed!) */ - sp->psc_smbcfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV8); - sp->psc_smbmsk = PSC_SMBMSK_ALLMASK; + cfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV8); + au_writel(cfg, base + PSC_SMBCFG); au_sync(); /* Set the protocol timer values. See Table 71 in the * Au1550 Data Book for standard timing values. */ - sp->psc_smbtmr = PSC_SMBTMR_SET_TH(0) | PSC_SMBTMR_SET_PS(15) | \ - PSC_SMBTMR_SET_PU(15) | PSC_SMBTMR_SET_SH(15) | \ - PSC_SMBTMR_SET_SU(15) | PSC_SMBTMR_SET_CL(15) | \ - PSC_SMBTMR_SET_CH(15); + au_writel(PSC_SMBTMR_SET_TH(0) | PSC_SMBTMR_SET_PS(15) | \ + PSC_SMBTMR_SET_PU(15) | PSC_SMBTMR_SET_SH(15) | \ + PSC_SMBTMR_SET_SU(15) | PSC_SMBTMR_SET_CL(15) | \ + PSC_SMBTMR_SET_CH(15), base + PSC_SMBTMR); au_sync(); - sp->psc_smbcfg |= PSC_SMBCFG_DE_ENABLE; - do { - stat = sp->psc_smbstat; + cfg |= PSC_SMBCFG_DE_ENABLE; + au_writel(cfg, base + PSC_SMBCFG); + au_sync(); + + while (!(au_readl(base + PSC_SMBSTAT) & PSC_SMBSTAT_DR)) au_sync(); - } while ((stat & PSC_SMBSTAT_DR) == 0); - return i2c_add_adapter(i2c_adap); -} + ret = i2c_add_adapter(&priv->adap); + if (ret == 0) { + platform_set_drvdata(pdev, priv); + return 0; + } + au_writel(0, base + PSC_SMBCFG); + au_writel(PSC_CTRL_DISABLE, base + PSC_CTRL_OFFSET); + au_sync(); -int -i2c_au1550_del_bus(struct i2c_adapter *adap) -{ - return i2c_del_adapter(adap); + kfree(priv); +out: return ret; } -static int -pb1550_reg(struct i2c_client *client) +static int i2c_au1550_remove(struct platform_device *pdev) { - return 0; + struct i2c_au1550_data *priv = platform_get_drvdata(pdev); + u32 base; + + if (priv) { + platform_set_drvdata(pdev, NULL); + base = priv->psc_base; + i2c_del_adapter(&priv->adap); + au_writel(0, base + PSC_SMBCFG); + au_writel(PSC_CTRL_DISABLE, base + PSC_CTRL_OFFSET); + au_sync(); + kfree(priv); + } + return 0; } -static int -pb1550_unreg(struct i2c_client *client) +static int i2c_au1550_suspend(struct platform_device *pdev, + pm_message_t state) { + struct i2c_au1550_data *priv = platform_get_drvdata(pdev); + u32 base = priv->psc_base; + + au_writel(PSC_CTRL_SUSPEND, base + PSC_CTRL_OFFSET); + au_sync(); return 0; } -static struct i2c_au1550_data pb1550_i2c_info = { - SMBUS_PSC_BASE, 200, 200 -}; - -static struct i2c_adapter pb1550_board_adapter = { - name: "pb1550 adapter", - id: I2C_HW_AU1550_PSC, - algo: NULL, - algo_data: &pb1550_i2c_info, - client_register: pb1550_reg, - client_unregister: pb1550_unreg, -}; - -/* BIG hack to support the control interface on the Wolfson WM8731 - * audio codec on the Pb1550 board. We get an address and two data - * bytes to write, create an i2c message, and send it across the - * i2c transfer function. We do this here because we have access to - * the i2c adapter structure. - */ -static struct i2c_msg wm_i2c_msg; /* We don't want this stuff on the stack */ -static u8 i2cbuf[2]; - -int -pb1550_wm_codec_write(u8 addr, u8 reg, u8 val) +static int i2c_au1550_resume(struct platform_device *pdev) { - wm_i2c_msg.addr = addr; - wm_i2c_msg.flags = 0; - wm_i2c_msg.buf = i2cbuf; - wm_i2c_msg.len = 2; - i2cbuf[0] = reg; - i2cbuf[1] = val; + struct i2c_au1550_data *priv = platform_get_drvdata(pdev); + u32 base = priv->psc_base; - return pb1550_board_adapter.algo->master_xfer(&pb1550_board_adapter, &wm_i2c_msg, 1); + au_writel(PSC_CTRL_ENABLE, base + PSC_CTRL_OFFSET); + au_sync(); + while (!(au_readl(base + PSC_SMBSTAT) & PSC_SMBSTAT_SR)) + au_sync(); + return 0; } -static int __init -i2c_au1550_init(void) -{ - printk(KERN_INFO "Au1550 I2C: "); - - /* This is where we would set up a 50MHz clock source - * and routing. On the Pb1550, the SMBus is PSC2, which - * uses a shared clock with USB. This has been already - * configured by Yamon as a 48MHz clock, close enough - * for our work. - */ - if (i2c_au1550_add_bus(&pb1550_board_adapter) < 0) { - printk("failed to initialize.\n"); - return -ENODEV; - } +static struct platform_driver au1xpsc_smbus_driver = { + .driver = { + .name = "au1xpsc_smbus", + .owner = THIS_MODULE, + }, + .probe = i2c_au1550_probe, + .remove = __devexit_p(i2c_au1550_remove), + .suspend = i2c_au1550_suspend, + .resume = i2c_au1550_resume, +}; - printk("initialized.\n"); - return 0; +static int __init i2c_au1550_init(void) +{ + return platform_driver_register(&au1xpsc_smbus_driver); } -static void __exit -i2c_au1550_exit(void) +static void __exit i2c_au1550_exit(void) { - i2c_au1550_del_bus(&pb1550_board_adapter); + platform_driver_unregister(&au1xpsc_smbus_driver); } +module_init(i2c_au1550_init); +module_exit(i2c_au1550_exit); MODULE_AUTHOR("Dan Malek, Embedded Edge, LLC."); MODULE_DESCRIPTION("SMBus adapter Alchemy pb1550"); MODULE_LICENSE("GPL"); - -module_init (i2c_au1550_init); -module_exit (i2c_au1550_exit); diff -Naurp linux-2.6.21/drivers/i2c/busses/i2c-au1550.h linux-2.6.21-aui2c/drivers/i2c/busses/i2c-au1550.h --- linux-2.6.21/drivers/i2c/busses/i2c-au1550.h 2007-04-26 05:08:32.000000000 +0200 +++ linux-2.6.21-aui2c/drivers/i2c/busses/i2c-au1550.h 1970-01-01 01:00:00.000000000 +0100 @@ -1,32 +0,0 @@ -/* - * Copyright (C) 2004 Embedded Edge, LLC - * 2.6 port by Matt Porter - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef I2C_AU1550_H -#define I2C_AU1550_H - -struct i2c_au1550_data { - u32 psc_base; - int xfer_timeout; - int ack_timeout; -}; - -int i2c_au1550_add_bus(struct i2c_adapter *); -int i2c_au1550_del_bus(struct i2c_adapter *); - -#endif /* I2C_AU1550_H */ diff -Naurp linux-2.6.21/include/asm-mips/mach-au1x00/au1xxx_psc.h linux-2.6.21-aui2c/include/asm-mips/mach-au1x00/au1xxx_psc.h --- linux-2.6.21/include/asm-mips/mach-au1x00/au1xxx_psc.h 2007-04-26 05:08:32.000000000 +0200 +++ linux-2.6.21-aui2c/include/asm-mips/mach-au1x00/au1xxx_psc.h 2007-05-11 11:39:13.827681000 +0200 @@ -412,17 +412,13 @@ typedef struct psc_spi { /* PSC in SMBus (I2C) Mode. */ -typedef struct psc_smb { - u32 psc_sel; - u32 psc_ctrl; - u32 psc_smbcfg; - u32 psc_smbmsk; - u32 psc_smbpcr; - u32 psc_smbstat; - u32 psc_smbevnt; - u32 psc_smbtxrx; - u32 psc_smbtmr; -} psc_smb_t; +#define PSC_SMBCFG 0x08 +#define PSC_SMBMSK 0x0C +#define PSC_SMBPCR 0x10 +#define PSC_SMBSTAT 0x14 +#define PSC_SMBEVNT 0x18 +#define PSC_SMBTXRX 0x1C +#define PSC_SMBTMR 0x20 /* SMBus Config Register. */ From yoichi_yuasa@tripeaks.co.jp Fri May 11 11:29:58 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 11:30:02 +0100 (BST) Received: from mo30.po.2iij.NET ([210.128.50.53]:40492 "EHLO mo30.po.2iij.net") by ftp.linux-mips.org with ESMTP id S20022391AbXEKK36 (ORCPT ); Fri, 11 May 2007 11:29:58 +0100 Received: by mo.po.2iij.net (mo30) id l4BAToAo076028; Fri, 11 May 2007 19:29:50 +0900 (JST) Received: from localhost.localdomain (65.126.232.202.bf.2iij.net [202.232.126.65]) by mbox.po.2iij.net (mbox30) id l4BATmTg063898 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 11 May 2007 19:29:49 +0900 (JST) Date: Fri, 11 May 2007 19:29:48 +0900 From: Yoichi Yuasa To: Pierre Ossman Cc: yoichi_yuasa@tripeaks.co.jp, linux-mips@linux-mips.org Subject: [PATCH] mmc: au1xmmc command types check from data flags Message-Id: <20070511192948.38937fd0.yoichi_yuasa@tripeaks.co.jp> In-Reply-To: <4643FD2B.8020103@drzeus.cx> References: <20070511125919.350c53a8.yoichi_yuasa@tripeaks.co.jp> <4643F57C.5060409@drzeus.cx> <200705110516.l4B5GMQJ053603@mbox33.po.2iij.net> <4643FD2B.8020103@drzeus.cx> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15027 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips On Fri, 11 May 2007 07:20:43 +0200 Pierre Ossman wrote: > Yoichi Yuasa wrote: > > > > The commands of au1xmmc controller are different from standard commands. > > au1xmmc_send_command() convert standard commands to local commands for au1xmmc host controller, > > and send local commands to controller. > > > > A quick glance at the code seems to suggest it's specifying the type of command. > And it should be able to figure that out in a more generic way. Ok, I updated the patch for au1xmmc.c . This patch has changed command types check from data flags. MMC_STOP_TRANSMISSION is never passed to au1xmmc_send_command(). SEND_STOP() is used for MMC_STOP_TRANSMISSION. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/drivers/mmc/host/au1xmmc.c mips/drivers/mmc/host/au1xmmc.c --- mips-orig/drivers/mmc/host/au1xmmc.c 2007-05-11 10:27:01.068483750 +0900 +++ mips/drivers/mmc/host/au1xmmc.c 2007-05-11 19:13:11.426283750 +0900 @@ -189,7 +189,7 @@ static void au1xmmc_tasklet_finish(unsig static int au1xmmc_send_command(struct au1xmmc_host *host, int wait, struct mmc_command *cmd) { - + unsigned int flags; u32 mmccmd = (cmd->opcode << SD_CMD_CI_SHIFT); switch (mmc_resp_type(cmd)) { @@ -213,24 +213,17 @@ static int au1xmmc_send_command(struct a return MMC_ERR_INVALID; } - switch(cmd->opcode) { - case MMC_READ_SINGLE_BLOCK: - case SD_APP_SEND_SCR: - mmccmd |= SD_CMD_CT_2; - break; - case MMC_READ_MULTIPLE_BLOCK: - mmccmd |= SD_CMD_CT_4; - break; - case MMC_WRITE_BLOCK: - mmccmd |= SD_CMD_CT_1; - break; - - case MMC_WRITE_MULTIPLE_BLOCK: - mmccmd |= SD_CMD_CT_3; - break; - case MMC_STOP_TRANSMISSION: - mmccmd |= SD_CMD_CT_7; - break; + flags = cmd->data->flags; + if (flags & MMC_DATA_READ) { + if (flags & MMC_DATA_MULTI) + mmccmd |= SD_CMD_CT_4; + else + mmccmd |= SD_CMD_CT_2; + } else if (flags & MMC_DATA_WRITE) { + if (flags & MMC_DATA_MULTI) + mmccmd |= SD_CMD_CT_3; + else + mmccmd |= SD_CMD_CT_1; } au_writel(cmd->arg, HOST_CMDARG(host)); From ralf@linux-mips.org Fri May 11 11:49:10 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 11:49:12 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:42455 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022400AbXEKKtK (ORCPT ); Fri, 11 May 2007 11:49:10 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.13.8/8.13.8) with ESMTP id l4BAn5jh003208; Fri, 11 May 2007 11:49:05 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.13.8/8.13.8/Submit) id l4BAn4Vp003207; Fri, 11 May 2007 11:49:04 +0100 Date: Fri, 11 May 2007 11:49:04 +0100 From: Ralf Baechle To: Atsushi Nemoto Cc: linux-mips@linux-mips.org, sam@ravnborg.org Subject: Re: [PATCH] MIPS: Run checksyscalls for N32 and O32 ABI Message-ID: <20070511104904.GE2732@linux-mips.org> References: <20070511.010234.74566169.anemo@mba.ocn.ne.jp> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070511.010234.74566169.anemo@mba.ocn.ne.jp> User-Agent: Mutt/1.4.2.2i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15028 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Fri, May 11, 2007 at 01:02:34AM +0900, Atsushi Nemoto wrote: > On 64-bit MIPS, only N64 ABI is checked by default. This patch adds > some rules for other ABIs. This results in these warnings at the > moment: These warnings are definately valuable so I applied your patch. Some of the warnings are a little useless though, for example the ones about the uselib syscall. Ralf From ralf@linux-mips.org Fri May 11 11:49:53 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 11:49:55 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:36824 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022358AbXEKKtx (ORCPT ); Fri, 11 May 2007 11:49:53 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.13.8/8.13.8) with ESMTP id l4BAnnoe003271; Fri, 11 May 2007 11:49:49 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.13.8/8.13.8/Submit) id l4BAnnsp003270; Fri, 11 May 2007 11:49:49 +0100 Date: Fri, 11 May 2007 11:49:49 +0100 From: Ralf Baechle To: Atsushi Nemoto Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] fix build error in atomic64_cmpxchg Message-ID: <20070511104949.GF2732@linux-mips.org> References: <20070510.234745.39152979.anemo@mba.ocn.ne.jp> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070510.234745.39152979.anemo@mba.ocn.ne.jp> User-Agent: Mutt/1.4.2.2i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15029 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Thu, May 10, 2007 at 11:47:45PM +0900, Atsushi Nemoto wrote: Applied. Ralf From mano@roarinelk.homelinux.net Fri May 11 12:07:03 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 12:07:04 +0100 (BST) Received: from fnoeppeil48.netpark.at ([217.175.205.176]:45068 "EHLO roarinelk.homelinux.net") by ftp.linux-mips.org with ESMTP id S20022470AbXEKLHD (ORCPT ); Fri, 11 May 2007 12:07:03 +0100 Received: (qmail 16336 invoked by uid 1000); 11 May 2007 13:07:02 +0200 Date: Fri, 11 May 2007 13:07:02 +0200 From: Manuel Lauss To: Yoichi Yuasa Cc: Pierre Ossman , linux-mips@linux-mips.org Subject: Re: [PATCH] mmc: au1xmmc command types check from data flags Message-ID: <20070511110702.GA16041@roarinelk.homelinux.net> References: <20070511125919.350c53a8.yoichi_yuasa@tripeaks.co.jp> <4643F57C.5060409@drzeus.cx> <200705110516.l4B5GMQJ053603@mbox33.po.2iij.net> <4643FD2B.8020103@drzeus.cx> <20070511192948.38937fd0.yoichi_yuasa@tripeaks.co.jp> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070511192948.38937fd0.yoichi_yuasa@tripeaks.co.jp> User-Agent: Mutt/1.5.11 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15030 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mano@roarinelk.homelinux.net Precedence: bulk X-list: linux-mips Hi Yoichi, > --- mips-orig/drivers/mmc/host/au1xmmc.c 2007-05-11 10:27:01.068483750 +0900 > +++ mips/drivers/mmc/host/au1xmmc.c 2007-05-11 19:13:11.426283750 +0900 > @@ -189,7 +189,7 @@ static void au1xmmc_tasklet_finish(unsig > @@ -213,24 +213,17 @@ static int au1xmmc_send_command(struct a > return MMC_ERR_INVALID; > } > > - switch(cmd->opcode) { > - case MMC_READ_SINGLE_BLOCK: > - case SD_APP_SEND_SCR: > - mmccmd |= SD_CMD_CT_2; > - break; > - case MMC_READ_MULTIPLE_BLOCK: > - mmccmd |= SD_CMD_CT_4; > - break; > - case MMC_WRITE_BLOCK: > - mmccmd |= SD_CMD_CT_1; > - break; > - > - case MMC_WRITE_MULTIPLE_BLOCK: > - mmccmd |= SD_CMD_CT_3; > - break; > - case MMC_STOP_TRANSMISSION: > - mmccmd |= SD_CMD_CT_7; > - break; > + flags = cmd->data->flags; ^^^^^^^^ This line oopses the driver on my Au1200 ->data can be NULL > + if (flags & MMC_DATA_READ) { > + if (flags & MMC_DATA_MULTI) > + mmccmd |= SD_CMD_CT_4; > + else > + mmccmd |= SD_CMD_CT_2; > + } else if (flags & MMC_DATA_WRITE) { > + if (flags & MMC_DATA_MULTI) > + mmccmd |= SD_CMD_CT_3; > + else > + mmccmd |= SD_CMD_CT_1; > } what about SD_CMD_CT_7? Hows this: if (cmd->data) flags = cmd->data->flags; else if (cmd->opcode == 12) mmccmd |= CD_SMD_CT_7; else flags = 0; if (flags & MMC_DATA_READ) { [...] > au_writel(cmd->arg, HOST_CMDARG(host)); > Thanks, Manuel Lauss From yoichi_yuasa@tripeaks.co.jp Fri May 11 12:29:24 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 12:29:25 +0100 (BST) Received: from mo30.po.2iij.NET ([210.128.50.53]:35106 "EHLO mo30.po.2iij.net") by ftp.linux-mips.org with ESMTP id S20022470AbXEKL3Y (ORCPT ); Fri, 11 May 2007 12:29:24 +0100 Received: by mo.po.2iij.net (mo30) id l4BBS2LV011597; Fri, 11 May 2007 20:28:02 +0900 (JST) Received: from localhost.localdomain (65.126.232.202.bf.2iij.net [202.232.126.65]) by mbox.po.2iij.net (mbox32) id l4BBRwgn020395 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 11 May 2007 20:27:58 +0900 (JST) Message-Id: <200705111127.l4BBRwgn020395@mbox32.po.2iij.net> Date: Fri, 11 May 2007 20:27:58 +0900 From: Yoichi Yuasa To: Manuel Lauss Cc: yoichi_yuasa@tripeaks.co.jp, drzeus@drzeus.cx, linux-mips@linux-mips.org Subject: Re: [PATCH] mmc: au1xmmc command types check from data flags In-Reply-To: <20070511110702.GA16041@roarinelk.homelinux.net> References: <20070511125919.350c53a8.yoichi_yuasa@tripeaks.co.jp> <4643F57C.5060409@drzeus.cx> <200705110516.l4B5GMQJ053603@mbox33.po.2iij.net> <4643FD2B.8020103@drzeus.cx> <20070511192948.38937fd0.yoichi_yuasa@tripeaks.co.jp> <20070511110702.GA16041@roarinelk.homelinux.net> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15031 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi, On Fri, 11 May 2007 13:07:02 +0200 Manuel Lauss wrote: > Hi Yoichi, > > > --- mips-orig/drivers/mmc/host/au1xmmc.c 2007-05-11 10:27:01.068483750 +0900 > > +++ mips/drivers/mmc/host/au1xmmc.c 2007-05-11 19:13:11.426283750 +0900 > > @@ -189,7 +189,7 @@ static void au1xmmc_tasklet_finish(unsig > > @@ -213,24 +213,17 @@ static int au1xmmc_send_command(struct a > > return MMC_ERR_INVALID; > > } > > > > - switch(cmd->opcode) { > > - case MMC_READ_SINGLE_BLOCK: > > - case SD_APP_SEND_SCR: > > - mmccmd |= SD_CMD_CT_2; > > - break; > > - case MMC_READ_MULTIPLE_BLOCK: > > - mmccmd |= SD_CMD_CT_4; > > - break; > > - case MMC_WRITE_BLOCK: > > - mmccmd |= SD_CMD_CT_1; > > - break; > > - > > - case MMC_WRITE_MULTIPLE_BLOCK: > > - mmccmd |= SD_CMD_CT_3; > > - break; > > - case MMC_STOP_TRANSMISSION: > > - mmccmd |= SD_CMD_CT_7; > > - break; > > + flags = cmd->data->flags; > ^^^^^^^^ > This line oopses the driver on my Au1200 > ->data can be NULL Thank you testing the patch. I don't have a db1200. Please test new one. > > > + if (flags & MMC_DATA_READ) { > > + if (flags & MMC_DATA_MULTI) > > + mmccmd |= SD_CMD_CT_4; > > + else > > + mmccmd |= SD_CMD_CT_2; > > + } else if (flags & MMC_DATA_WRITE) { > > + if (flags & MMC_DATA_MULTI) > > + mmccmd |= SD_CMD_CT_3; > > + else > > + mmccmd |= SD_CMD_CT_1; > > } > > what about SD_CMD_CT_7? MMC_STOP_TRANSMISSION is never passed to au1xmmc_send_command(). We don't need to care SD_CMD_CT_7 here. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/drivers/mmc/host/au1xmmc.c mips/drivers/mmc/host/au1xmmc.c --- mips-orig/drivers/mmc/host/au1xmmc.c 2007-05-11 20:15:50.358847000 +0900 +++ mips/drivers/mmc/host/au1xmmc.c 2007-05-11 20:20:36.804748750 +0900 @@ -187,9 +187,8 @@ static void au1xmmc_tasklet_finish(unsig } static int au1xmmc_send_command(struct au1xmmc_host *host, int wait, - struct mmc_command *cmd) + struct mmc_command *cmd, unsigned int flags) { - u32 mmccmd = (cmd->opcode << SD_CMD_CI_SHIFT); switch (mmc_resp_type(cmd)) { @@ -213,24 +212,16 @@ static int au1xmmc_send_command(struct a return MMC_ERR_INVALID; } - switch(cmd->opcode) { - case MMC_READ_SINGLE_BLOCK: - case SD_APP_SEND_SCR: - mmccmd |= SD_CMD_CT_2; - break; - case MMC_READ_MULTIPLE_BLOCK: - mmccmd |= SD_CMD_CT_4; - break; - case MMC_WRITE_BLOCK: - mmccmd |= SD_CMD_CT_1; - break; - - case MMC_WRITE_MULTIPLE_BLOCK: - mmccmd |= SD_CMD_CT_3; - break; - case MMC_STOP_TRANSMISSION: - mmccmd |= SD_CMD_CT_7; - break; + if (flags & MMC_DATA_READ) { + if (flags & MMC_DATA_MULTI) + mmccmd |= SD_CMD_CT_4; + else + mmccmd |= SD_CMD_CT_2; + } else if (flags & MMC_DATA_WRITE) { + if (flags & MMC_DATA_MULTI) + mmccmd |= SD_CMD_CT_3; + else + mmccmd |= SD_CMD_CT_1; } au_writel(cmd->arg, HOST_CMDARG(host)); @@ -665,6 +656,7 @@ static void au1xmmc_request(struct mmc_h { struct au1xmmc_host *host = mmc_priv(mmc); + unsigned int flags = 0; int ret = MMC_ERR_NONE; WARN_ON(irqs_disabled()); @@ -677,11 +669,12 @@ static void au1xmmc_request(struct mmc_h if (mrq->data) { FLUSH_FIFO(host); + flags = mrq->data->flags; ret = au1xmmc_prepare_data(host, mrq->data); } if (ret == MMC_ERR_NONE) - ret = au1xmmc_send_command(host, 0, mrq->cmd); + ret = au1xmmc_send_command(host, 0, mrq->cmd, flags); if (ret != MMC_ERR_NONE) { mrq->cmd->error = ret; From ralf@linux-mips.org Fri May 11 12:36:19 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 12:36:20 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:9650 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022558AbXEKLgS (ORCPT ); Fri, 11 May 2007 12:36:18 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.13.8/8.13.8) with ESMTP id l4BBaDhP004294; Fri, 11 May 2007 12:36:14 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.13.8/8.13.8/Submit) id l4BBaD91004293; Fri, 11 May 2007 12:36:13 +0100 Date: Fri, 11 May 2007 12:36:13 +0100 From: Ralf Baechle To: Franck Bui-Huu Cc: linux-mips Subject: Re: [PATCH] Simplify pte_offset_{map,map_nested}() on 32 bits [try #2] Message-ID: <20070511113613.GG2732@linux-mips.org> References: <463B117F.1070009@innova-card.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <463B117F.1070009@innova-card.com> User-Agent: Mutt/1.4.2.2i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15032 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Fri, May 04, 2007 at 12:57:03PM +0200, Franck Bui-Huu wrote: > From: Franck Bui-Huu > > Since both kernel and process page tables are never allocated in > highmem these 2 macros were doing unnecessary extra works for getting > a pte from a pmd. > > This patch also clean up pte allocation functions by passing > __GFP_ZERO to alloc_pages() and by removing a useless local variable. > > With this patch the size of the kernel is slighly reduced. These hook allows general mapping of pagetables, not just highmem. On MIPS that's useful because fancy mapping stuff allows a faster implementation of TLB exception handlers. That was more or less the official strategy for the R2000. Then the R4000 came and broke this scheme with virtual aliases which was hard to fix back then so I had to switch to the current pagetable and TLB reload mechanism. If you care about the details, take a look at Linux/MIPS 2.1.1. The fact that getting this to work again would also allow putting pagetables into highmem at virtually no extra effort is a nice side effect, of course. Ralf From ralf@linux-mips.org Fri May 11 12:41:44 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 12:41:45 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:35200 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022566AbXEKLlo (ORCPT ); Fri, 11 May 2007 12:41:44 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.13.8/8.13.8) with ESMTP id l4BBfdZX004391; Fri, 11 May 2007 12:41:39 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.13.8/8.13.8/Submit) id l4BBfctM004390; Fri, 11 May 2007 12:41:38 +0100 Date: Fri, 11 May 2007 12:41:38 +0100 From: Ralf Baechle To: Atsushi Nemoto Cc: vagabon.xyz@gmail.com, linux-mips@linux-mips.org Subject: Re: [PATCH 2/3] time: replace board_time_init() by plat_clk_setup() Message-ID: <20070511114138.GH2732@linux-mips.org> References: <1178293006633-git-send-email-fbuihuu@gmail.com> <11782930063123-git-send-email-fbuihuu@gmail.com> <20070506.010313.41199101.anemo@mba.ocn.ne.jp> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070506.010313.41199101.anemo@mba.ocn.ne.jp> User-Agent: Mutt/1.4.2.2i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15033 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Sun, May 06, 2007 at 01:03:13AM +0900, Atsushi Nemoto wrote: > How about keeping board_time_init pointer as is and adding > plat_clk_setup only for simple platforms? The idea of having such function pointer is quite nice. In theory. In practice it seems alot of people who are bringing up Linux on a new platform miss those hooks. A new mandatory platform hook that if missing is resulting in a linker error is preferable, I think. Ralf From yoichi_yuasa@tripeaks.co.jp Fri May 11 12:44:34 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 12:44:38 +0100 (BST) Received: from mo31.po.2iij.NET ([210.128.50.54]:14651 "EHLO mo31.po.2iij.net") by ftp.linux-mips.org with ESMTP id S20022578AbXEKLoe (ORCPT ); Fri, 11 May 2007 12:44:34 +0100 Received: by mo.po.2iij.net (mo31) id l4BBiWCZ054972; Fri, 11 May 2007 20:44:32 +0900 (JST) Received: from localhost.localdomain (65.126.232.202.bf.2iij.net [202.232.126.65]) by mbox.po.2iij.net (mbox33) id l4BBiUZV027211 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 11 May 2007 20:44:31 +0900 (JST) Date: Fri, 11 May 2007 20:44:30 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: yoichi_yuasa@tripeaks.co.jp, linux-mips Subject: [PATCH][MIPS] separate Alchemy processor based boards config Message-Id: <20070511204430.2c23a537.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15034 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has separated Alchemy processor based boards config to arch/mips/au1000/Kconfig. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/Kconfig mips/arch/mips/Kconfig --- mips-orig/arch/mips/Kconfig 2007-05-11 10:25:49.171990500 +0900 +++ mips/arch/mips/Kconfig 2007-05-11 10:30:18.756838500 +0900 @@ -15,121 +15,8 @@ choice prompt "System type" default SGI_IP22 -config MIPS_MTX1 - bool "4G Systems MTX-1 board" - select DMA_NONCOHERENT - select HW_HAS_PCI - select RESOURCES_64BIT if PCI - select SOC_AU1500 - select SYS_HAS_CPU_MIPS32_R1 - select SYS_SUPPORTS_LITTLE_ENDIAN - -config MIPS_BOSPORUS - bool "AMD Alchemy Bosporus board" - select SOC_AU1500 - select DMA_NONCOHERENT - select SYS_HAS_CPU_MIPS32_R1 - select SYS_SUPPORTS_LITTLE_ENDIAN - -config MIPS_PB1000 - bool "AMD Alchemy PB1000 board" - select SOC_AU1000 - select DMA_NONCOHERENT - select HW_HAS_PCI - select RESOURCES_64BIT if PCI - select SWAP_IO_SPACE - select SYS_HAS_CPU_MIPS32_R1 - select SYS_SUPPORTS_LITTLE_ENDIAN - -config MIPS_PB1100 - bool "AMD Alchemy PB1100 board" - select SOC_AU1100 - select DMA_NONCOHERENT - select HW_HAS_PCI - select RESOURCES_64BIT if PCI - select SWAP_IO_SPACE - select SYS_HAS_CPU_MIPS32_R1 - select SYS_SUPPORTS_LITTLE_ENDIAN - -config MIPS_PB1500 - bool "AMD Alchemy PB1500 board" - select SOC_AU1500 - select DMA_NONCOHERENT - select HW_HAS_PCI - select RESOURCES_64BIT if PCI - select SYS_HAS_CPU_MIPS32_R1 - select SYS_SUPPORTS_LITTLE_ENDIAN - -config MIPS_PB1550 - bool "AMD Alchemy PB1550 board" - select SOC_AU1550 - select DMA_NONCOHERENT - select HW_HAS_PCI - select MIPS_DISABLE_OBSOLETE_IDE - select RESOURCES_64BIT if PCI - select SYS_HAS_CPU_MIPS32_R1 - select SYS_SUPPORTS_LITTLE_ENDIAN - -config MIPS_PB1200 - bool "AMD Alchemy PB1200 board" - select SOC_AU1200 - select DMA_NONCOHERENT - select MIPS_DISABLE_OBSOLETE_IDE - select RESOURCES_64BIT if PCI - select SYS_HAS_CPU_MIPS32_R1 - select SYS_SUPPORTS_LITTLE_ENDIAN - -config MIPS_DB1000 - bool "AMD Alchemy DB1000 board" - select SOC_AU1000 - select DMA_NONCOHERENT - select HW_HAS_PCI - select RESOURCES_64BIT if PCI - select SYS_HAS_CPU_MIPS32_R1 - select SYS_SUPPORTS_LITTLE_ENDIAN - -config MIPS_DB1100 - bool "AMD Alchemy DB1100 board" - select SOC_AU1100 - select DMA_NONCOHERENT - select SYS_HAS_CPU_MIPS32_R1 - select SYS_SUPPORTS_LITTLE_ENDIAN - -config MIPS_DB1500 - bool "AMD Alchemy DB1500 board" - select SOC_AU1500 - select DMA_NONCOHERENT - select HW_HAS_PCI - select MIPS_DISABLE_OBSOLETE_IDE - select RESOURCES_64BIT if PCI - select SYS_HAS_CPU_MIPS32_R1 - select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_LITTLE_ENDIAN - -config MIPS_DB1550 - bool "AMD Alchemy DB1550 board" - select SOC_AU1550 - select HW_HAS_PCI - select DMA_NONCOHERENT - select MIPS_DISABLE_OBSOLETE_IDE - select RESOURCES_64BIT if PCI - select SYS_HAS_CPU_MIPS32_R1 - select SYS_SUPPORTS_LITTLE_ENDIAN - -config MIPS_DB1200 - bool "AMD Alchemy DB1200 board" - select SOC_AU1200 - select DMA_COHERENT - select MIPS_DISABLE_OBSOLETE_IDE - select SYS_HAS_CPU_MIPS32_R1 - select SYS_SUPPORTS_LITTLE_ENDIAN - -config MIPS_MIRAGE - bool "AMD Alchemy Mirage board" - select DMA_NONCOHERENT - select SOC_AU1500 - select SYS_HAS_CPU_MIPS32_R1 - select SYS_SUPPORTS_LITTLE_ENDIAN +config MACH_ALCHEMY + bool "Alchemy processor based machines" config BASLER_EXCITE bool "Basler eXcite smart camera" @@ -424,12 +311,6 @@ config MOMENCO_OCELOT_C The Ocelot is a MIPS-based Single Board Computer (SBC) made by Momentum Computer . -config MIPS_XXS1500 - bool "MyCable XXS1500 board" - select DMA_NONCOHERENT - select SOC_AU1500 - select SYS_SUPPORTS_LITTLE_ENDIAN - config PNX8550_JBS bool "Philips PNX8550 based JBS board" select PNX8550 @@ -777,6 +658,7 @@ config TOSHIBA_RBTX4938 endchoice +source "arch/mips/au1000/Kconfig" source "arch/mips/ddb5xxx/Kconfig" source "arch/mips/gt64120/ev64120/Kconfig" source "arch/mips/jazz/Kconfig" @@ -965,33 +847,6 @@ config MIPS_RM9122 config PCI_MARVELL bool -config SOC_AU1000 - bool - select SOC_AU1X00 - -config SOC_AU1100 - bool - select SOC_AU1X00 - -config SOC_AU1500 - bool - select SOC_AU1X00 - -config SOC_AU1550 - bool - select SOC_AU1X00 - -config SOC_AU1200 - bool - select SOC_AU1X00 - -config SOC_AU1X00 - bool - select SYS_HAS_CPU_MIPS32_R1 - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_APM_EMULATION - select SYS_SUPPORTS_KGDB - config SERIAL_RM9000 bool diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/au1000/Kconfig mips/arch/mips/au1000/Kconfig --- mips-orig/arch/mips/au1000/Kconfig 1970-01-01 09:00:00.000000000 +0900 +++ mips/arch/mips/au1000/Kconfig 2007-05-11 10:30:18.784840250 +0900 @@ -0,0 +1,142 @@ +choice + prompt "Machine type" + depends on MACH_ALCHEMY + default MIPS_DB1000 + +config MIPS_MTX1 + bool "4G Systems MTX-1 board" + select DMA_NONCOHERENT + select HW_HAS_PCI + select RESOURCES_64BIT if PCI + select SOC_AU1500 + select SYS_SUPPORTS_LITTLE_ENDIAN + +config MIPS_BOSPORUS + bool "Alchemy Bosporus board" + select SOC_AU1500 + select DMA_NONCOHERENT + select SYS_SUPPORTS_LITTLE_ENDIAN + +config MIPS_DB1000 + bool "Alchemy DB1000 board" + select SOC_AU1000 + select DMA_NONCOHERENT + select HW_HAS_PCI + select RESOURCES_64BIT if PCI + select SYS_SUPPORTS_LITTLE_ENDIAN + +config MIPS_DB1100 + bool "Alchemy DB1100 board" + select SOC_AU1100 + select DMA_NONCOHERENT + select SYS_SUPPORTS_LITTLE_ENDIAN + +config MIPS_DB1200 + bool "Alchemy DB1200 board" + select SOC_AU1200 + select DMA_COHERENT + select MIPS_DISABLE_OBSOLETE_IDE + select SYS_SUPPORTS_LITTLE_ENDIAN + +config MIPS_DB1500 + bool "Alchemy DB1500 board" + select SOC_AU1500 + select DMA_NONCOHERENT + select HW_HAS_PCI + select MIPS_DISABLE_OBSOLETE_IDE + select RESOURCES_64BIT if PCI + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_LITTLE_ENDIAN + +config MIPS_DB1550 + bool "Alchemy DB1550 board" + select SOC_AU1550 + select HW_HAS_PCI + select DMA_NONCOHERENT + select MIPS_DISABLE_OBSOLETE_IDE + select RESOURCES_64BIT if PCI + select SYS_SUPPORTS_LITTLE_ENDIAN + +config MIPS_MIRAGE + bool "Alchemy Mirage board" + select DMA_NONCOHERENT + select SOC_AU1500 + select SYS_SUPPORTS_LITTLE_ENDIAN + +config MIPS_PB1000 + bool "Alchemy PB1000 board" + select SOC_AU1000 + select DMA_NONCOHERENT + select HW_HAS_PCI + select RESOURCES_64BIT if PCI + select SWAP_IO_SPACE + select SYS_SUPPORTS_LITTLE_ENDIAN + +config MIPS_PB1100 + bool "Alchemy PB1100 board" + select SOC_AU1100 + select DMA_NONCOHERENT + select HW_HAS_PCI + select RESOURCES_64BIT if PCI + select SWAP_IO_SPACE + select SYS_SUPPORTS_LITTLE_ENDIAN + +config MIPS_PB1200 + bool "Alchemy PB1200 board" + select SOC_AU1200 + select DMA_NONCOHERENT + select MIPS_DISABLE_OBSOLETE_IDE + select RESOURCES_64BIT if PCI + select SYS_SUPPORTS_LITTLE_ENDIAN + +config MIPS_PB1500 + bool "Alchemy PB1500 board" + select SOC_AU1500 + select DMA_NONCOHERENT + select HW_HAS_PCI + select RESOURCES_64BIT if PCI + select SYS_SUPPORTS_LITTLE_ENDIAN + +config MIPS_PB1550 + bool "Alchemy PB1550 board" + select SOC_AU1550 + select DMA_NONCOHERENT + select HW_HAS_PCI + select MIPS_DISABLE_OBSOLETE_IDE + select RESOURCES_64BIT if PCI + select SYS_SUPPORTS_LITTLE_ENDIAN + +config MIPS_XXS1500 + bool "MyCable XXS1500 board" + select DMA_NONCOHERENT + select SOC_AU1500 + select SYS_SUPPORTS_LITTLE_ENDIAN + +endchoice + +config SOC_AU1000 + bool + select SOC_AU1X00 + +config SOC_AU1100 + bool + select SOC_AU1X00 + +config SOC_AU1500 + bool + select SOC_AU1X00 + +config SOC_AU1550 + bool + select SOC_AU1X00 + +config SOC_AU1200 + bool + select SOC_AU1X00 + +config SOC_AU1X00 + bool + select SYS_HAS_CPU_MIPS32_R1 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_APM_EMULATION + select SYS_SUPPORTS_KGDB diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/configs/db1000_defconfig mips/arch/mips/configs/db1000_defconfig --- mips-orig/arch/mips/configs/db1000_defconfig 2007-05-11 10:25:50.292060500 +0900 +++ mips/arch/mips/configs/db1000_defconfig 2007-05-11 10:31:17.380502250 +0900 @@ -9,6 +9,7 @@ CONFIG_MIPS=y # Machine selection # CONFIG_ZONE_DMA=y +CONFIG_MACH_ALCHEMY=y # CONFIG_MIPS_MTX1 is not set # CONFIG_MIPS_BOSPORUS is not set # CONFIG_MIPS_PB1000 is not set diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/configs/db1100_defconfig mips/arch/mips/configs/db1100_defconfig --- mips-orig/arch/mips/configs/db1100_defconfig 2007-05-11 10:25:50.328062750 +0900 +++ mips/arch/mips/configs/db1100_defconfig 2007-05-11 10:31:36.193678000 +0900 @@ -9,6 +9,7 @@ CONFIG_MIPS=y # Machine selection # CONFIG_ZONE_DMA=y +CONFIG_MACH_ALCHEMY=y # CONFIG_MIPS_MTX1 is not set # CONFIG_MIPS_BOSPORUS is not set # CONFIG_MIPS_PB1000 is not set diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/configs/db1200_defconfig mips/arch/mips/configs/db1200_defconfig --- mips-orig/arch/mips/configs/db1200_defconfig 2007-05-11 10:25:50.336063250 +0900 +++ mips/arch/mips/configs/db1200_defconfig 2007-05-11 10:31:51.778652000 +0900 @@ -9,6 +9,7 @@ CONFIG_MIPS=y # Machine selection # CONFIG_ZONE_DMA=y +CONFIG_MACH_ALCHEMY=y # CONFIG_MIPS_MTX1 is not set # CONFIG_MIPS_BOSPORUS is not set # CONFIG_MIPS_PB1000 is not set diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/configs/db1500_defconfig mips/arch/mips/configs/db1500_defconfig --- mips-orig/arch/mips/configs/db1500_defconfig 2007-05-11 10:25:50.408067750 +0900 +++ mips/arch/mips/configs/db1500_defconfig 2007-05-11 10:32:08.383689750 +0900 @@ -9,6 +9,7 @@ CONFIG_MIPS=y # Machine selection # CONFIG_ZONE_DMA=y +CONFIG_MACH_ALCHEMY=y # CONFIG_MIPS_MTX1 is not set # CONFIG_MIPS_BOSPORUS is not set # CONFIG_MIPS_PB1000 is not set diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/configs/db1550_defconfig mips/arch/mips/configs/db1550_defconfig --- mips-orig/arch/mips/configs/db1550_defconfig 2007-05-11 10:25:50.408067750 +0900 +++ mips/arch/mips/configs/db1550_defconfig 2007-05-11 10:32:21.552512750 +0900 @@ -9,6 +9,7 @@ CONFIG_MIPS=y # Machine selection # CONFIG_ZONE_DMA=y +CONFIG_MACH_ALCHEMY=y # CONFIG_MIPS_MTX1 is not set # CONFIG_MIPS_BOSPORUS is not set # CONFIG_MIPS_PB1000 is not set diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/configs/pb1100_defconfig mips/arch/mips/configs/pb1100_defconfig --- mips-orig/arch/mips/configs/pb1100_defconfig 2007-05-11 10:25:50.516074500 +0900 +++ mips/arch/mips/configs/pb1100_defconfig 2007-05-11 10:32:48.718210500 +0900 @@ -9,6 +9,7 @@ CONFIG_MIPS=y # Machine selection # CONFIG_ZONE_DMA=y +CONFIG_MACH_ALCHEMY=y # CONFIG_MIPS_MTX1 is not set # CONFIG_MIPS_BOSPORUS is not set # CONFIG_MIPS_PB1000 is not set diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/configs/pb1500_defconfig mips/arch/mips/configs/pb1500_defconfig --- mips-orig/arch/mips/configs/pb1500_defconfig 2007-05-11 10:25:50.516074500 +0900 +++ mips/arch/mips/configs/pb1500_defconfig 2007-05-11 10:33:05.211241250 +0900 @@ -9,6 +9,7 @@ CONFIG_MIPS=y # Machine selection # CONFIG_ZONE_DMA=y +CONFIG_MACH_ALCHEMY=y # CONFIG_MIPS_MTX1 is not set # CONFIG_MIPS_BOSPORUS is not set # CONFIG_MIPS_PB1000 is not set diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/configs/pb1550_defconfig mips/arch/mips/configs/pb1550_defconfig --- mips-orig/arch/mips/configs/pb1550_defconfig 2007-05-11 10:25:50.656083250 +0900 +++ mips/arch/mips/configs/pb1550_defconfig 2007-05-11 10:33:21.948287250 +0900 @@ -9,6 +9,7 @@ CONFIG_MIPS=y # Machine selection # CONFIG_ZONE_DMA=y +CONFIG_MACH_ALCHEMY=y # CONFIG_MIPS_MTX1 is not set # CONFIG_MIPS_BOSPORUS is not set # CONFIG_MIPS_PB1000 is not set From vagabon.xyz@gmail.com Fri May 11 13:15:59 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 13:16:03 +0100 (BST) Received: from py-out-1112.google.com ([64.233.166.178]:36392 "EHLO py-out-1112.google.com") by ftp.linux-mips.org with ESMTP id S20022614AbXEKMP7 (ORCPT ); Fri, 11 May 2007 13:15:59 +0100 Received: by py-out-1112.google.com with SMTP id u52so765830pyb for ; Fri, 11 May 2007 05:14:47 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=kVMpbj/VyDQIJ8cv3R0x2+U+snz4/froWb+9iyJ3MeLmCc094k97WuR12wNPZyPGhO2ZW/ZftH3IHS3UB/yAmjm05nIhQ96BuIOs2y8Ey4/wi7q3nDHaN5ovDwbGKed4qD5MCdUa15885C+HGen8mlg8S+hoNmXjU/3f51HL580= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=pgwXf9sry0yqTF6iIfY75YPoPQCqNsqJy7OWJwpvyzzemXHa9bixvVb9MEmctWe9nvcCNmvowMRw82xaUMemyRJhNrTSmyqemtY1oo+h7zF99B7qefSrAA3WBktsvBqLpcPgEBQnyA5pc0EU/+UWV2pZJZFF1bqTL0ZnexOPIl4= Received: by 10.65.248.19 with SMTP id a19mr5103878qbs.1178885687094; Fri, 11 May 2007 05:14:47 -0700 (PDT) Received: by 10.65.241.19 with HTTP; Fri, 11 May 2007 05:14:47 -0700 (PDT) Message-ID: Date: Fri, 11 May 2007 14:14:47 +0200 From: "Franck Bui-Huu" To: "Atsushi Nemoto" Subject: Re: [PATCH] MIPS: Run checksyscalls for N32 and O32 ABI Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, sam@ravnborg.org In-Reply-To: <20070511.010234.74566169.anemo@mba.ocn.ne.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20070511.010234.74566169.anemo@mba.ocn.ne.jp> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15035 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips Hi Atsushi, On 5/10/07, Atsushi Nemoto wrote: > On 64-bit MIPS, only N64 ABI is checked by default. This patch adds > some rules for other ABIs. This results in these warnings at the > moment: > nice to see this second version which is nicer IMHO. > CALL-N32 /home/git/linux-mips/scripts/checksyscalls.sh > :148:2: warning: #warning syscall time not implemented > :424:2: warning: #warning syscall select not implemented > :440:2: warning: #warning syscall uselib not implemented > :856:2: warning: #warning syscall vfork not implemented > :868:2: warning: #warning syscall truncate64 not implemented > :872:2: warning: #warning syscall ftruncate64 not implemented > :876:2: warning: #warning syscall stat64 not implemented > :880:2: warning: #warning syscall lstat64 not implemented > :884:2: warning: #warning syscall fstat64 not implemented > :980:2: warning: #warning syscall getdents64 not implemented > :1176:2: warning: #warning syscall fadvise64_64 not implemented > :1284:2: warning: #warning syscall fstatat64 not implemented > :1364:2: warning: #warning syscall utimensat not implemented > CALL-O32 /home/git/linux-mips/scripts/checksyscalls.sh > :424:2: warning: #warning syscall select not implemented > :856:2: warning: #warning syscall vfork not implemented > :1176:2: warning: #warning syscall fadvise64_64 not implemented > :1364:2: warning: #warning syscall utimensat not implemented > CALL /home/git/linux-mips/scripts/checksyscalls.sh > :148:2: warning: #warning syscall time not implemented > :424:2: warning: #warning syscall select not implemented > :440:2: warning: #warning syscall uselib not implemented > :856:2: warning: #warning syscall vfork not implemented > :980:2: warning: #warning syscall getdents64 not implemented > :1364:2: warning: #warning syscall utimensat not implemented > woah, quite a lot of works are waiting for you ;) > Signed-off-by: Atsushi Nemoto > --- > diff --git a/arch/mips/Makefile b/arch/mips/Makefile > index a68d462..f450066 100644 > --- a/arch/mips/Makefile > +++ b/arch/mips/Makefile > @@ -709,3 +709,25 @@ archclean: > CLEAN_FILES += vmlinux.32 \ > vmlinux.64 \ > vmlinux.ecoff > + > +quiet_cmd_syscalls_n32 = CALL-N32 $< > + cmd_syscalls_n32 = $(CONFIG_SHELL) $< $(CC) $(c_flags) -mabi=n32 > + > +quiet_cmd_syscalls_o32 = CALL-O32 $< > + cmd_syscalls_o32 = $(CONFIG_SHELL) $< $(CC) $(c_flags) -mabi=32 > + > +PHONY += missing-syscalls-n32 missing-syscalls-o32 > + > +missing-syscalls-n32: scripts/checksyscalls.sh FORCE > + $(call cmd,syscalls_n32) > + > +missing-syscalls-o32: scripts/checksyscalls.sh FORCE > + $(call cmd,syscalls_o32) > + > +archprepare: I didn't know about that rule. However I'm not sure it's a good idea to add a set of commands to it since it's multiple rule... > +ifdef CONFIG_MIPS32_N32 > + $(Q)$(MAKE) $(build)=arch/mips missing-syscalls-n32 or can't we do instead: $(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=n32" and get rid of "missing-syscalls-n32" rule. Thus this avoids to duplicate "missing-syscalls" command. > +endif > +ifdef CONFIG_MIPS32_O32 > + $(Q)$(MAKE) $(build)=arch/mips missing-syscalls-o32 ditto: $(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=32" > +endif > > I'm wondering if this should stay at the end where cleaning rules live... Anyways thanks. -- Franck From yoichi_yuasa@tripeaks.co.jp Fri May 11 13:20:17 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 13:20:19 +0100 (BST) Received: from mo32.po.2iij.NET ([210.128.50.17]:49419 "EHLO mo32.po.2iij.net") by ftp.linux-mips.org with ESMTP id S20022612AbXEKMUR (ORCPT ); Fri, 11 May 2007 13:20:17 +0100 Received: by mo.po.2iij.net (mo32) id l4BCIofP032665; Fri, 11 May 2007 21:18:50 +0900 (JST) Received: from localhost.localdomain (65.126.232.202.bf.2iij.net [202.232.126.65]) by mbox.po.2iij.net (mbox32) id l4BCImYJ071813 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 11 May 2007 21:18:48 +0900 (JST) Date: Fri, 11 May 2007 21:18:48 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: yoichi_yuasa@tripeaks.co.jp, linux-mips , rtc-linux@googlegroups.com Subject: [PATCH][MIPS] separate platform_device registration for VR41xx RTC Message-Id: <20070511211848.40e921dd.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15036 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has separated platform_device registration for VR41xx RTC. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X rtc/Documentation/dontdiff rtc-orig/arch/mips/vr41xx/common/Makefile rtc/arch/mips/vr41xx/common/Makefile --- rtc-orig/arch/mips/vr41xx/common/Makefile 2007-05-11 10:13:28.557705000 +0900 +++ rtc/arch/mips/vr41xx/common/Makefile 2007-05-11 10:19:05.454759750 +0900 @@ -2,4 +2,4 @@ # Makefile for common code of the NEC VR4100 series. # -obj-y += bcu.o cmu.o giu.o icu.o init.o irq.o pmu.o siu.o type.o +obj-y += bcu.o cmu.o giu.o icu.o init.o irq.o pmu.o rtc.o siu.o type.o diff -pruN -X rtc/Documentation/dontdiff rtc-orig/arch/mips/vr41xx/common/rtc.c rtc/arch/mips/vr41xx/common/rtc.c --- rtc-orig/arch/mips/vr41xx/common/rtc.c 1970-01-01 09:00:00.000000000 +0900 +++ rtc/arch/mips/vr41xx/common/rtc.c 2007-05-11 10:19:05.458760000 +0900 @@ -0,0 +1,117 @@ +/* + * NEC VR4100 series RTC platform device. + * + * Copyright (C) 2007 Yoichi Yuasa + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + */ +#include +#include +#include +#include + +#include +#include + +static struct resource rtc_type1_resource[] __initdata = { + { + .start = 0x0b0000c0, + .end = 0x0b0000df, + .flags = IORESOURCE_MEM, + }, + { + .start = 0x0b0001c0, + .end = 0x0b0001df, + .flags = IORESOURCE_MEM, + }, + { + .start = ELAPSEDTIME_IRQ, + .end = ELAPSEDTIME_IRQ, + .flags = IORESOURCE_IRQ, + }, + { + .start = RTCLONG1_IRQ, + .end = RTCLONG1_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct resource rtc_type2_resource[] __initdata = { + { + .start = 0x0f000100, + .end = 0x0f00011f, + .flags = IORESOURCE_MEM, + }, + { + .start = 0x0f000120, + .end = 0x0f00013f, + .flags = IORESOURCE_MEM, + }, + { + .start = ELAPSEDTIME_IRQ, + .end = ELAPSEDTIME_IRQ, + .flags = IORESOURCE_IRQ, + }, + { + .start = RTCLONG1_IRQ, + .end = RTCLONG1_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static int __init vr41xx_rtc_add(void) +{ + struct platform_device *pdev; + struct resource *res; + unsigned int num; + int retval; + + pdev = platform_device_alloc("RTC", -1); + if (!pdev) + return -ENOMEM; + + switch (current_cpu_data.cputype) { + case CPU_VR4111: + case CPU_VR4121: + res = rtc_type1_resource; + num = ARRAY_SIZE(rtc_type1_resource); + break; + case CPU_VR4122: + case CPU_VR4131: + case CPU_VR4133: + res = rtc_type2_resource; + num = ARRAY_SIZE(rtc_type2_resource); + break; + default: + retval = -ENODEV; + goto err_free_device; + } + + retval = platform_device_add_resources(pdev, res, num); + if (retval) + goto err_free_device; + + retval = platform_device_add(pdev); + if (retval) + goto err_free_device; + + return 0; + +err_free_device: + platform_device_put(pdev); + + return retval; +} +device_initcall(vr41xx_rtc_add); diff -pruN -X rtc/Documentation/dontdiff rtc-orig/drivers/rtc/rtc-vr41xx.c rtc/drivers/rtc/rtc-vr41xx.c --- rtc-orig/drivers/rtc/rtc-vr41xx.c 2007-05-11 10:14:29.613520750 +0900 +++ rtc/drivers/rtc/rtc-vr41xx.c 2007-05-11 10:22:40.480198000 +0900 @@ -17,10 +17,11 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ +#include #include #include #include -#include +#include #include #include #include @@ -30,25 +31,11 @@ #include #include #include -#include MODULE_AUTHOR("Yoichi Yuasa "); MODULE_DESCRIPTION("NEC VR4100 series RTC driver"); MODULE_LICENSE("GPL"); -#define RTC1_TYPE1_START 0x0b0000c0UL -#define RTC1_TYPE1_END 0x0b0000dfUL -#define RTC2_TYPE1_START 0x0b0001c0UL -#define RTC2_TYPE1_END 0x0b0001dfUL - -#define RTC1_TYPE2_START 0x0f000100UL -#define RTC1_TYPE2_END 0x0f00011fUL -#define RTC2_TYPE2_START 0x0f000120UL -#define RTC2_TYPE2_END 0x0f00013fUL - -#define RTC1_SIZE 0x20 -#define RTC2_SIZE 0x20 - /* RTC 1 registers */ #define ETIMELREG 0x00 #define ETIMEMREG 0x02 @@ -98,13 +85,8 @@ static char rtc_name[] = "RTC"; static unsigned long periodic_frequency; static unsigned long periodic_count; static unsigned int alarm_enabled; - -struct resource rtc_resource[2] = { - { .name = rtc_name, - .flags = IORESOURCE_MEM, }, - { .name = rtc_name, - .flags = IORESOURCE_MEM, }, -}; +static int aie_irq = -1; +static int pie_irq = -1; static inline unsigned long read_elapsed_second(void) { @@ -150,8 +132,8 @@ static void vr41xx_rtc_release(struct de spin_unlock_irq(&rtc_lock); - disable_irq(ELAPSEDTIME_IRQ); - disable_irq(RTCLONG1_IRQ); + disable_irq(aie_irq); + disable_irq(pie_irq); } static int vr41xx_rtc_read_time(struct device *dev, struct rtc_time *time) @@ -209,14 +191,14 @@ static int vr41xx_rtc_set_alarm(struct d spin_lock_irq(&rtc_lock); if (alarm_enabled) - disable_irq(ELAPSEDTIME_IRQ); + disable_irq(aie_irq); rtc1_write(ECMPLREG, (uint16_t)(alarm_sec << 15)); rtc1_write(ECMPMREG, (uint16_t)(alarm_sec >> 1)); rtc1_write(ECMPHREG, (uint16_t)(alarm_sec >> 17)); if (wkalrm->enabled) - enable_irq(ELAPSEDTIME_IRQ); + enable_irq(aie_irq); alarm_enabled = wkalrm->enabled; @@ -234,7 +216,7 @@ static int vr41xx_rtc_ioctl(struct devic spin_lock_irq(&rtc_lock); if (!alarm_enabled) { - enable_irq(ELAPSEDTIME_IRQ); + enable_irq(aie_irq); alarm_enabled = 1; } @@ -244,17 +226,17 @@ static int vr41xx_rtc_ioctl(struct devic spin_lock_irq(&rtc_lock); if (alarm_enabled) { - disable_irq(ELAPSEDTIME_IRQ); + disable_irq(aie_irq); alarm_enabled = 0; } spin_unlock_irq(&rtc_lock); break; case RTC_PIE_ON: - enable_irq(RTCLONG1_IRQ); + enable_irq(pie_irq); break; case RTC_PIE_OFF: - disable_irq(RTCLONG1_IRQ); + disable_irq(pie_irq); break; case RTC_IRQP_READ: return put_user(periodic_frequency, (unsigned long __user *)arg); @@ -331,31 +313,37 @@ static const struct rtc_class_ops vr41xx static int __devinit rtc_probe(struct platform_device *pdev) { + struct resource *res; struct rtc_device *rtc; - unsigned int irq; int retval; - if (pdev->num_resources != 2) + if (pdev->num_resources != 4) return -EBUSY; - rtc1_base = ioremap(pdev->resource[0].start, RTC1_SIZE); - if (rtc1_base == NULL) + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) return -EBUSY; - rtc2_base = ioremap(pdev->resource[1].start, RTC2_SIZE); - if (rtc2_base == NULL) { - iounmap(rtc1_base); - rtc1_base = NULL; + rtc1_base = ioremap(res->start, res->end - res->start + 1); + if (!rtc1_base) return -EBUSY; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (!res) { + retval = -EBUSY; + goto err_rtc1_iounmap; + } + + rtc2_base = ioremap(res->start, res->end - res->start + 1); + if (!rtc2_base) { + retval = -EBUSY; + goto err_rtc1_iounmap; } rtc = rtc_device_register(rtc_name, &pdev->dev, &vr41xx_rtc_ops, THIS_MODULE); if (IS_ERR(rtc)) { - iounmap(rtc1_base); - iounmap(rtc2_base); - rtc1_base = NULL; - rtc2_base = NULL; - return PTR_ERR(rtc); + retval = PTR_ERR(rtc); + goto err_iounmap_all; } spin_lock_irq(&rtc_lock); @@ -368,35 +356,50 @@ static int __devinit rtc_probe(struct pl spin_unlock_irq(&rtc_lock); - irq = ELAPSEDTIME_IRQ; - retval = request_irq(irq, elapsedtime_interrupt, IRQF_DISABLED, - "elapsed_time", pdev); - if (retval == 0) { - irq = RTCLONG1_IRQ; - retval = request_irq(irq, rtclong1_interrupt, IRQF_DISABLED, - "rtclong1", pdev); + aie_irq = platform_get_irq(pdev, 0); + if (aie_irq < 0 || aie_irq >= NR_IRQS) { + retval = -EBUSY; + goto err_device_unregister; } - if (retval < 0) { - printk(KERN_ERR "rtc: IRQ%d is busy\n", irq); - rtc_device_unregister(rtc); - if (irq == RTCLONG1_IRQ) - free_irq(ELAPSEDTIME_IRQ, NULL); - iounmap(rtc1_base); - iounmap(rtc2_base); - rtc1_base = NULL; - rtc2_base = NULL; - return retval; - } + retval = request_irq(aie_irq, elapsedtime_interrupt, IRQF_DISABLED, + "elapsed_time", pdev); + if (retval < 0) + goto err_device_unregister; + + pie_irq = platform_get_irq(pdev, 1); + if (pie_irq < 0 || pie_irq >= NR_IRQS) + goto err_free_irq; + + retval = request_irq(pie_irq, rtclong1_interrupt, IRQF_DISABLED, + "rtclong1", pdev); + if (retval < 0) + goto err_free_irq; platform_set_drvdata(pdev, rtc); - disable_irq(ELAPSEDTIME_IRQ); - disable_irq(RTCLONG1_IRQ); + disable_irq(aie_irq); + disable_irq(pie_irq); printk(KERN_INFO "rtc: Real Time Clock of NEC VR4100 series\n"); return 0; + +err_free_irq: + free_irq(aie_irq, pdev); + +err_device_unregister: + rtc_device_unregister(rtc); + +err_iounmap_all: + iounmap(rtc2_base); + rtc2_base = NULL; + +err_rtc1_iounmap: + iounmap(rtc1_base); + rtc1_base = NULL; + + return retval; } static int __devexit rtc_remove(struct platform_device *pdev) @@ -404,23 +407,21 @@ static int __devexit rtc_remove(struct p struct rtc_device *rtc; rtc = platform_get_drvdata(pdev); - if (rtc != NULL) + if (rtc) rtc_device_unregister(rtc); platform_set_drvdata(pdev, NULL); - free_irq(ELAPSEDTIME_IRQ, NULL); - free_irq(RTCLONG1_IRQ, NULL); - if (rtc1_base != NULL) + free_irq(aie_irq, pdev); + free_irq(pie_irq, pdev); + if (rtc1_base) iounmap(rtc1_base); - if (rtc2_base != NULL) + if (rtc2_base) iounmap(rtc2_base); return 0; } -static struct platform_device *rtc_platform_device; - static struct platform_driver rtc_platform_driver = { .probe = rtc_probe, .remove = __devexit_p(rtc_remove), @@ -432,55 +433,12 @@ static struct platform_driver rtc_platfo static int __init vr41xx_rtc_init(void) { - int retval; - - switch (current_cpu_data.cputype) { - case CPU_VR4111: - case CPU_VR4121: - rtc_resource[0].start = RTC1_TYPE1_START; - rtc_resource[0].end = RTC1_TYPE1_END; - rtc_resource[1].start = RTC2_TYPE1_START; - rtc_resource[1].end = RTC2_TYPE1_END; - break; - case CPU_VR4122: - case CPU_VR4131: - case CPU_VR4133: - rtc_resource[0].start = RTC1_TYPE2_START; - rtc_resource[0].end = RTC1_TYPE2_END; - rtc_resource[1].start = RTC2_TYPE2_START; - rtc_resource[1].end = RTC2_TYPE2_END; - break; - default: - return -ENODEV; - break; - } - - rtc_platform_device = platform_device_alloc("RTC", -1); - if (rtc_platform_device == NULL) - return -ENOMEM; - - retval = platform_device_add_resources(rtc_platform_device, - rtc_resource, ARRAY_SIZE(rtc_resource)); - - if (retval == 0) - retval = platform_device_add(rtc_platform_device); - - if (retval < 0) { - platform_device_put(rtc_platform_device); - return retval; - } - - retval = platform_driver_register(&rtc_platform_driver); - if (retval < 0) - platform_device_unregister(rtc_platform_device); - - return retval; + return platform_driver_register(&rtc_platform_driver); } static void __exit vr41xx_rtc_exit(void) { platform_driver_unregister(&rtc_platform_driver); - platform_device_unregister(rtc_platform_device); } module_init(vr41xx_rtc_init); From vagabon.xyz@gmail.com Fri May 11 13:27:32 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 13:27:33 +0100 (BST) Received: from py-out-1112.google.com ([64.233.166.183]:32842 "EHLO py-out-1112.google.com") by ftp.linux-mips.org with ESMTP id S20022611AbXEKM1c (ORCPT ); Fri, 11 May 2007 13:27:32 +0100 Received: by py-out-1112.google.com with SMTP id u52so768435pyb for ; Fri, 11 May 2007 05:26:30 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=tOLfcHRi38+wOICMN0aReWKT7Z5o6Eqei67hf8tUyn/WkX11SIMr5AIrkMsG99Vn12nwfPl6PaUHX8SjKeIgh6MerIQgLseYzEuVVbiDYlHFOG1T5ESsAnbImTvdW2fb4OKnBbRNxqsIzEAeu7QUtIYPstf8zKQkym+m1WLINd8= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=aH0AtztGMkd2foF8pqXW5pmJsq4PXj57az4+oF2JZqRCBJTFIuwjOPkgpK5WmExLLJXsbV+u0dNwqYagqz/AGUnO4thLxoQ2hVkEfIaDCo7Cb8GLTwLwwqzajxDr8GPcc8HVkgItMm5op/X2WFVmoUBLE1vwxTrfPXKYbj2zmks= Received: by 10.65.251.17 with SMTP id d17mr2490332qbs.1178886390414; Fri, 11 May 2007 05:26:30 -0700 (PDT) Received: by 10.65.241.19 with HTTP; Fri, 11 May 2007 05:26:30 -0700 (PDT) Message-ID: Date: Fri, 11 May 2007 14:26:30 +0200 From: "Franck Bui-Huu" To: "Ralf Baechle" Subject: Re: [PATCH 2/3] time: replace board_time_init() by plat_clk_setup() Cc: "Atsushi Nemoto" , linux-mips@linux-mips.org In-Reply-To: <20070511114138.GH2732@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <1178293006633-git-send-email-fbuihuu@gmail.com> <11782930063123-git-send-email-fbuihuu@gmail.com> <20070506.010313.41199101.anemo@mba.ocn.ne.jp> <20070511114138.GH2732@linux-mips.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15037 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips Hi Ralf ! On 5/11/07, Ralf Baechle wrote: > On Sun, May 06, 2007 at 01:03:13AM +0900, Atsushi Nemoto wrote: > > > How about keeping board_time_init pointer as is and adding > > plat_clk_setup only for simple platforms? > > The idea of having such function pointer is quite nice. In theory. In what about using function with weak attribute instead ? There's no more need for a function pointer and no needs to initialise it too... > practice it seems alot of people who are bringing up Linux on a new > platform miss those hooks. A new mandatory platform hook that if missing > is resulting in a linker error is preferable, I think. > Ok, but do you agree that we now need to call this hook earlier during the boot process ? Thanks -- Franck From yoichi_yuasa@tripeaks.co.jp Fri May 11 13:44:19 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 13:44:21 +0100 (BST) Received: from mo30.po.2iij.NET ([210.128.50.53]:15371 "EHLO mo30.po.2iij.net") by ftp.linux-mips.org with ESMTP id S20022612AbXEKMoT (ORCPT ); Fri, 11 May 2007 13:44:19 +0100 Received: by mo.po.2iij.net (mo30) id l4BCiGaC040705; Fri, 11 May 2007 21:44:16 +0900 (JST) Received: from localhost.localdomain (65.126.232.202.bf.2iij.net [202.232.126.65]) by mbox.po.2iij.net (mbox33) id l4BCiF62077191 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 11 May 2007 21:44:15 +0900 (JST) Date: Fri, 11 May 2007 21:29:59 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: yoichi_yuasa@tripeaks.co.jp, linux-mips Subject: [PATCH][MIPS][1/3] use platform_device for Cobalt UART Message-Id: <20070511212959.6558d88e.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15038 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has changed using platform_device for Cobalt UART. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/cobalt/Makefile mips/arch/mips/cobalt/Makefile --- mips-orig/arch/mips/cobalt/Makefile 2007-05-10 23:57:43.326652250 +0900 +++ mips/arch/mips/cobalt/Makefile 2007-05-10 23:53:48.103951750 +0900 @@ -2,7 +2,7 @@ # Makefile for the Cobalt micro systems family specific parts of the kernel # -obj-y := irq.o reset.o setup.o buttons.o +obj-y := buttons.o irq.o reset.o serial.o setup.o obj-$(CONFIG_PCI) += pci.o obj-$(CONFIG_EARLY_PRINTK) += console.o diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/cobalt/serial.c mips/arch/mips/cobalt/serial.c --- mips-orig/arch/mips/cobalt/serial.c 1970-01-01 09:00:00.000000000 +0900 +++ mips/arch/mips/cobalt/serial.c 2007-05-10 23:54:24.650235750 +0900 @@ -0,0 +1,85 @@ +/* + * Registration of Cobalt UART platform device. + * + * Copyright (C) 2007 Yoichi Yuasa + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + */ +#include +#include +#include +#include +#include + +#include + +static struct resource cobalt_uart_resource[] __initdata = { + { + .start = 0x1c800000, + .end = 0x1c800007, + .flags = IORESOURCE_MEM, + }, + { + .start = COBALT_SERIAL_IRQ, + .end = COBALT_SERIAL_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct plat_serial8250_port cobalt_serial8250_port[] = { + { + .irq = COBALT_SERIAL_IRQ, + .uartclk = 18432000, + .iotype = UPIO_MEM, + .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + .mapbase = 0x1c800000, + }, + {}, +}; + +static __init int cobalt_uart_add(void) +{ + struct platform_device *pdev; + int retval; + + /* + * Cobalt Qube1 and RAQ1 have no UART. + */ + if (cobalt_board_id <= COBALT_BRD_ID_RAQ1) + return 0; + + pdev = platform_device_alloc("serial8250", -1); + if (!pdev) + return -ENOMEM; + + pdev->id = PLAT8250_DEV_PLATFORM; + pdev->dev.platform_data = cobalt_serial8250_port; + + retval = platform_device_add_resources(pdev, cobalt_uart_resource, ARRAY_SIZE(cobalt_uart_resource)); + if (retval) + goto err_free_device; + + retval = platform_device_add(pdev); + if (retval) + goto err_free_device; + + return 0; + +err_free_device: + platform_device_put(pdev); + + return retval; +} +device_initcall(cobalt_uart_add); diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/cobalt/setup.c mips/arch/mips/cobalt/setup.c --- mips-orig/arch/mips/cobalt/setup.c 2007-05-10 23:57:43.354654000 +0900 +++ mips/arch/mips/cobalt/setup.c 2007-05-10 23:53:48.175956250 +0900 @@ -13,8 +13,6 @@ #include #include #include -#include -#include #include #include @@ -27,7 +25,6 @@ extern void cobalt_machine_restart(char *command); extern void cobalt_machine_halt(void); extern void cobalt_machine_power_off(void); -extern void cobalt_early_console(void); int cobalt_board_id; @@ -95,7 +92,6 @@ static struct resource cobalt_reserved_r void __init plat_mem_setup(void) { - static struct uart_port uart; unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0); int i; @@ -119,21 +115,6 @@ void __init plat_mem_setup(void) cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id); printk("Cobalt board ID: %d\n", cobalt_board_id); - - if (cobalt_board_id > COBALT_BRD_ID_RAQ1) { -#ifdef CONFIG_SERIAL_8250 - uart.line = 0; - uart.type = PORT_UNKNOWN; - uart.uartclk = 18432000; - uart.irq = COBALT_SERIAL_IRQ; - uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | - UPF_SKIP_TEST; - uart.iotype = UPIO_MEM; - uart.mapbase = 0x1c800000; - - early_serial_setup(&uart); -#endif - } } /* From yoichi_yuasa@tripeaks.co.jp Fri May 11 13:45:34 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 13:45:36 +0100 (BST) Received: from mo30.po.2iij.NET ([210.128.50.53]:36915 "EHLO mo30.po.2iij.net") by ftp.linux-mips.org with ESMTP id S20022621AbXEKMpe (ORCPT ); Fri, 11 May 2007 13:45:34 +0100 Received: by mo.po.2iij.net (mo30) id l4BCiGbt040704; Fri, 11 May 2007 21:44:16 +0900 (JST) Received: from localhost.localdomain (65.126.232.202.bf.2iij.net [202.232.126.65]) by mbox.po.2iij.net (mbox32) id l4BCiFZf091423 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 11 May 2007 21:44:16 +0900 (JST) Message-Id: <200705111244.l4BCiFZf091423@mbox32.po.2iij.net> Date: Fri, 11 May 2007 21:33:30 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: yoichi_yuasa@tripeaks.co.jp, linux-mips@linux-mips.org Subject: [PATCH][MIPS][2/3] use RTC_CMOS for Cobalt In-Reply-To: <20070511212959.6558d88e.yoichi_yuasa@tripeaks.co.jp> References: <20070511212959.6558d88e.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15039 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has changed using new RTC_CMOS driver for Cobalt. It's tested on Cobalt Qube2. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/cobalt/Makefile mips/arch/mips/cobalt/Makefile --- mips-orig/arch/mips/cobalt/Makefile 2007-05-11 07:32:17.080779000 +0900 +++ mips/arch/mips/cobalt/Makefile 2007-05-11 07:45:08.628997750 +0900 @@ -2,7 +2,7 @@ # Makefile for the Cobalt micro systems family specific parts of the kernel # -obj-y := buttons.o irq.o reset.o serial.o setup.o +obj-y := buttons.o irq.o reset.o rtc.o serial.o setup.o obj-$(CONFIG_PCI) += pci.o obj-$(CONFIG_EARLY_PRINTK) += console.o diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/cobalt/rtc.c mips/arch/mips/cobalt/rtc.c --- mips-orig/arch/mips/cobalt/rtc.c 1970-01-01 09:00:00.000000000 +0900 +++ mips/arch/mips/cobalt/rtc.c 2007-05-11 09:59:38.689865250 +0900 @@ -0,0 +1,63 @@ +/* + * Registration of Cobalt RTC platform device. + * + * Copyright (C) 2007 Yoichi Yuasa + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + */ +#include +#include +#include +#include + +static struct resource cobalt_rtc_resource[] __initdata = { + { + .start = 0x70, + .end = 0x77, + .flags = IORESOURCE_IO, + }, + { + .start = 8, + .end = 8, + .flags = IORESOURCE_IRQ, + }, +}; + +static __init int cobalt_rtc_add(void) +{ + struct platform_device *pdev; + int retval; + + pdev = platform_device_alloc("rtc_cmos", -1); + if (!pdev) + return -ENOMEM; + + retval = platform_device_add_resources(pdev, cobalt_rtc_resource, + ARRAY_SIZE(cobalt_rtc_resource)); + if (retval) + goto err_free_device; + + retval = platform_device_add(pdev); + if (retval) + goto err_free_device; + + return 0; + +err_free_device: + platform_device_put(pdev); + + return retval; +} +device_initcall(cobalt_rtc_add); diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/configs/cobalt_defconfig mips/arch/mips/configs/cobalt_defconfig --- mips-orig/arch/mips/configs/cobalt_defconfig 2007-05-10 23:41:02.312092750 +0900 +++ mips/arch/mips/configs/cobalt_defconfig 2007-05-11 07:45:08.713003000 +0900 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.20 -# Tue Feb 20 21:47:24 2007 +# Linux kernel version: 2.6.21-rc7 +# Wed Apr 18 14:25:45 2007 # CONFIG_MIPS=y @@ -62,7 +62,6 @@ CONFIG_MIPS_COBALT=y # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set -CONFIG_EARLY_PRINTK=y CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_ARCH_HAS_ILOG2_U32 is not set # CONFIG_ARCH_HAS_ILOG2_U64 is not set @@ -74,12 +73,14 @@ CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NEED_PCI_MAP_STATE=y +CONFIG_EARLY_PRINTK=y +CONFIG_SYS_HAS_EARLY_PRINTK=y CONFIG_I8259=y # CONFIG_CPU_BIG_ENDIAN is not set CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y CONFIG_IRQ_CPU=y -CONFIG_MIPS_GT64111=y +CONFIG_PCI_GT64XXX_PCI0=y CONFIG_MIPS_L1_CACHE_SHIFT=5 # @@ -179,6 +180,7 @@ CONFIG_SYSVIPC_SYSCTL=y # CONFIG_IKCONFIG is not set CONFIG_SYSFS_DEPRECATED=y CONFIG_RELAY=y +# CONFIG_BLK_DEV_INITRD is not set # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_SYSCTL=y CONFIG_EMBEDDED=y @@ -477,7 +479,6 @@ CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set CONFIG_CDROM_PKTCDVD=y CONFIG_CDROM_PKTCDVD_BUFFERS=8 # CONFIG_CDROM_PKTCDVD_WCACHE is not set @@ -518,7 +519,7 @@ CONFIG_BLK_DEV_IDEPCI=y # CONFIG_BLK_DEV_OPTI621 is not set CONFIG_BLK_DEV_IDEDMA_PCI=y # CONFIG_BLK_DEV_IDEDMA_FORCED is not set -# CONFIG_IDEDMA_PCI_AUTO is not set +# CONFIG_IDEDMA_ONLYDISK is not set # CONFIG_BLK_DEV_AEC62XX is not set # CONFIG_BLK_DEV_ALI15X3 is not set # CONFIG_BLK_DEV_AMD74XX is not set @@ -546,7 +547,6 @@ CONFIG_BLK_DEV_TC86C001=y # CONFIG_IDE_ARM is not set CONFIG_BLK_DEV_IDEDMA=y # CONFIG_IDEDMA_IVB is not set -# CONFIG_IDEDMA_AUTO is not set # CONFIG_BLK_DEV_HD is not set # @@ -779,7 +779,8 @@ CONFIG_LEGACY_PTY_COUNT=256 # # CONFIG_WATCHDOG is not set # CONFIG_HW_RANDOM is not set -CONFIG_RTC=y +# CONFIG_RTC is not set +# CONFIG_GEN_RTC is not set CONFIG_COBALT_LCD=y # CONFIG_DTLK is not set # CONFIG_R3964 is not set @@ -815,6 +816,11 @@ CONFIG_COBALT_LCD=y # CONFIG_HWMON_VID is not set # +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set + +# # Multimedia devices # # CONFIG_VIDEO_DEV is not set @@ -827,7 +833,7 @@ CONFIG_COBALT_LCD=y # # Graphics support # -# CONFIG_FIRMWARE_EDID is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # CONFIG_FB is not set # @@ -835,7 +841,6 @@ CONFIG_COBALT_LCD=y # # CONFIG_VGA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # # Sound @@ -894,7 +899,29 @@ CONFIG_USB_ARCH_HAS_EHCI=y # # Real Time Clock # -# CONFIG_RTC_CLASS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set + +# +# RTC drivers +# +CONFIG_RTC_DRV_CMOS=y +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_TEST is not set +# CONFIG_RTC_DRV_V3020 is not set # # DMA Engine support diff -pruN -X mips/Documentation/dontdiff mips-orig/drivers/rtc/Kconfig mips/drivers/rtc/Kconfig --- mips-orig/drivers/rtc/Kconfig 2007-05-10 23:42:06.140081750 +0900 +++ mips/drivers/rtc/Kconfig 2007-05-11 07:45:08.713003000 +0900 @@ -245,7 +245,7 @@ comment "Platform RTC drivers" config RTC_DRV_CMOS tristate "PC-style 'CMOS'" depends on RTC_CLASS && (X86 || ALPHA || ARM26 || ARM \ - || M32R || ATARI || POWERPC) + || M32R || ATARI || POWERPC || MIPS) help Say "yes" here to get direct support for the real time clock found in every PC or ACPI-based system, and some other boards. From yoichi_yuasa@tripeaks.co.jp Fri May 11 13:45:56 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 13:45:58 +0100 (BST) Received: from mo31.po.2iij.NET ([210.128.50.54]:16927 "EHLO mo31.po.2iij.net") by ftp.linux-mips.org with ESMTP id S20022624AbXEKMpf (ORCPT ); Fri, 11 May 2007 13:45:35 +0100 Received: by mo.po.2iij.net (mo31) id l4BCiIDC074299; Fri, 11 May 2007 21:44:18 +0900 (JST) Received: from localhost.localdomain (65.126.232.202.bf.2iij.net [202.232.126.65]) by mbox.po.2iij.net (mbox31) id l4BCiGmk007793 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 11 May 2007 21:44:16 +0900 (JST) Message-Id: <200705111244.l4BCiGmk007793@mbox31.po.2iij.net> Date: Fri, 11 May 2007 21:43:09 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: yoichi_yuasa@tripeaks.co.jp, linux-mips@linux-mips.org Subject: [PATCH][MIPS][3/3] rework cobalt_board_id References: <20070511212959.6558d88e.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15040 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has reworked cobalt_board_id. The cobalt_board_id is read from PCI config register. It should be in PCI routine. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/cobalt/setup.c mips/arch/mips/cobalt/setup.c --- mips-orig/arch/mips/cobalt/setup.c 2007-04-18 12:46:20.844204000 +0900 +++ mips/arch/mips/cobalt/setup.c 2007-04-18 13:47:54.189191500 +0900 @@ -10,7 +10,6 @@ * */ #include -#include #include #include @@ -26,8 +25,6 @@ extern void cobalt_machine_restart(char extern void cobalt_machine_halt(void); extern void cobalt_machine_power_off(void); -int cobalt_board_id; - const char *get_system_type(void) { switch (cobalt_board_id) { @@ -92,7 +89,6 @@ static struct resource cobalt_reserved_r void __init plat_mem_setup(void) { - unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0); int i; _machine_restart = cobalt_machine_restart; @@ -107,14 +103,6 @@ void __init plat_mem_setup(void) /* These resources have been reserved by VIA SuperI/O chip. */ for (i = 0; i < ARRAY_SIZE(cobalt_reserved_resources); i++) request_resource(&ioport_resource, cobalt_reserved_resources + i); - - /* Read the cobalt id register out of the PCI config space */ - PCI_CFG_SET(devfn, (VIA_COBALT_BRD_ID_REG & ~0x3)); - cobalt_board_id = GT_READ(GT_PCI0_CFGDATA_OFS); - cobalt_board_id >>= ((VIA_COBALT_BRD_ID_REG & 3) * 8); - cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id); - - printk("Cobalt board ID: %d\n", cobalt_board_id); } /* diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/pci/fixup-cobalt.c mips/arch/mips/pci/fixup-cobalt.c --- mips-orig/arch/mips/pci/fixup-cobalt.c 2007-04-18 11:40:59.490806000 +0900 +++ mips/arch/mips/pci/fixup-cobalt.c 2007-04-18 13:44:48.017556500 +0900 @@ -113,6 +113,27 @@ static void qube_raq_galileo_fixup(struc DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_GT64111, qube_raq_galileo_fixup); +int cobalt_board_id; + +static void qube_raq_via_board_id_fixup(struct pci_dev *dev) +{ + u8 id; + int retval; + + retval = pci_read_config_byte(dev, VIA_COBALT_BRD_ID_REG, &id); + if (retval) { + panic("Cannot read board ID"); + return; + } + + cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(id); + + printk(KERN_INFO "Cobalt board ID: %d\n", cobalt_board_id); +} + +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_0, + qube_raq_via_board_id_fixup); + static char irq_tab_qube1[] __initdata = { [COBALT_PCICONF_CPU] = 0, [COBALT_PCICONF_ETH0] = COBALT_QUBE1_ETH0_IRQ, From ths@networkno.de Fri May 11 14:56:44 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 14:56:46 +0100 (BST) Received: from phoenix.bawue.net ([193.7.176.60]:7865 "EHLO mail.bawue.net") by ftp.linux-mips.org with ESMTP id S20022616AbXEKN4o (ORCPT ); Fri, 11 May 2007 14:56:44 +0100 Received: from lagash (intrt.mips-uk.com [194.74.144.130]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.bawue.net (Postfix) with ESMTP id 8D6158648B; Fri, 11 May 2007 15:50:15 +0200 (CEST) Received: from ths by lagash with local (Exim 4.67) (envelope-from ) id 1HmVWc-0004U6-8S; Fri, 11 May 2007 14:51:14 +0100 Date: Fri, 11 May 2007 14:51:14 +0100 To: Franck Bui-Huu Cc: Atsushi Nemoto , linux-mips@linux-mips.org, ralf@linux-mips.org, sam@ravnborg.org Subject: Re: [PATCH] MIPS: Run checksyscalls for N32 and O32 ABI Message-ID: <20070511135114.GA16014@networkno.de> References: <20070511.010234.74566169.anemo@mba.ocn.ne.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.13 (2006-08-11) From: Thiemo Seufer Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15041 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ths@networkno.de Precedence: bulk X-list: linux-mips Franck Bui-Huu wrote: > Hi Atsushi, > > On 5/10/07, Atsushi Nemoto wrote: > >On 64-bit MIPS, only N64 ABI is checked by default. This patch adds > >some rules for other ABIs. This results in these warnings at the > >moment: > > > > nice to see this second version which is nicer IMHO. > > > CALL-N32 /home/git/linux-mips/scripts/checksyscalls.sh > >:148:2: warning: #warning syscall time not implemented > >:424:2: warning: #warning syscall select not implemented > >:440:2: warning: #warning syscall uselib not implemented > >:856:2: warning: #warning syscall vfork not implemented > >:868:2: warning: #warning syscall truncate64 not implemented > >:872:2: warning: #warning syscall ftruncate64 not implemented > >:876:2: warning: #warning syscall stat64 not implemented > >:880:2: warning: #warning syscall lstat64 not implemented > >:884:2: warning: #warning syscall fstat64 not implemented > >:980:2: warning: #warning syscall getdents64 not implemented > >:1176:2: warning: #warning syscall fadvise64_64 not implemented > >:1284:2: warning: #warning syscall fstatat64 not implemented > >:1364:2: warning: #warning syscall utimensat not implemented > > CALL-O32 /home/git/linux-mips/scripts/checksyscalls.sh > >:424:2: warning: #warning syscall select not implemented > >:856:2: warning: #warning syscall vfork not implemented > >:1176:2: warning: #warning syscall fadvise64_64 not implemented > >:1364:2: warning: #warning syscall utimensat not implemented > > CALL /home/git/linux-mips/scripts/checksyscalls.sh > >:148:2: warning: #warning syscall time not implemented > >:424:2: warning: #warning syscall select not implemented > >:440:2: warning: #warning syscall uselib not implemented > >:856:2: warning: #warning syscall vfork not implemented > >:980:2: warning: #warning syscall getdents64 not implemented > >:1364:2: warning: #warning syscall utimensat not implemented > > > > woah, quite a lot of works are waiting for you ;) AFAICS everything except utimensat is a false positive. Thiemo From anemo@mba.ocn.ne.jp Fri May 11 15:42:43 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 15:42:44 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:36068 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20022635AbXEKOmn (ORCPT ); Fri, 11 May 2007 15:42:43 +0100 Received: from localhost (p6018-ipad206funabasi.chiba.ocn.ne.jp [222.145.80.18]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 64F49AF1E; Fri, 11 May 2007 23:41:22 +0900 (JST) Date: Fri, 11 May 2007 23:41:34 +0900 (JST) Message-Id: <20070511.234134.126573972.anemo@mba.ocn.ne.jp> To: ths@networkno.de Cc: vagabon.xyz@gmail.com, linux-mips@linux-mips.org, ralf@linux-mips.org, sam@ravnborg.org Subject: Re: [PATCH] MIPS: Run checksyscalls for N32 and O32 ABI From: Atsushi Nemoto In-Reply-To: <20070511135114.GA16014@networkno.de> References: <20070511.010234.74566169.anemo@mba.ocn.ne.jp> <20070511135114.GA16014@networkno.de> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15042 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Fri, 11 May 2007 14:51:14 +0100, Thiemo Seufer wrote: > > woah, quite a lot of works are waiting for you ;) > > AFAICS everything except utimensat is a false positive. Well, fadvise64_64 is not a false positive, isn't it? LFS version of posix_fadvise needs fadvise64_64, not fadvise64. And anyway fadvise64_64 needs some fix to adjust longlong argument as I said before. --- Atsushi Nemoto From drzeus@drzeus.cx Fri May 11 16:49:46 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 16:49:48 +0100 (BST) Received: from 85.8.24.16.se.wasadata.net ([85.8.24.16]:27271 "EHLO smtp.drzeus.cx") by ftp.linux-mips.org with ESMTP id S28573710AbXEKPtq (ORCPT ); Fri, 11 May 2007 16:49:46 +0100 Received: from poseidon.drzeus.cx (wlan152.drzeus.cx [::ffff:10.8.2.152]) (AUTH: LOGIN drzeus) by smtp.drzeus.cx with esmtp; Fri, 11 May 2007 17:49:40 +0200 id 00062A6C.46449095.00005936 Message-ID: <46449065.3050904@drzeus.cx> Date: Fri, 11 May 2007 17:48:53 +0200 From: Pierre Ossman User-Agent: Thunderbird 2.0.0.0 (X11/20070419) Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="=_hera.drzeus.cx-22838-1178898581-0001-2" To: Yoichi Yuasa CC: linux-mips@linux-mips.org Subject: Re: [PATCH] mmc: au1xmmc command types check from data flags References: <20070511125919.350c53a8.yoichi_yuasa@tripeaks.co.jp> <4643F57C.5060409@drzeus.cx> <200705110516.l4B5GMQJ053603@mbox33.po.2iij.net> <4643FD2B.8020103@drzeus.cx> <20070511192948.38937fd0.yoichi_yuasa@tripeaks.co.jp> In-Reply-To: <20070511192948.38937fd0.yoichi_yuasa@tripeaks.co.jp> X-Enigmail-Version: 0.95.0 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15043 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: drzeus@drzeus.cx Precedence: bulk X-list: linux-mips This is a MIME-formatted message. If you see this text it means that your E-mail software does not support MIME-formatted messages. --=_hera.drzeus.cx-22838-1178898581-0001-2 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Yoichi Yuasa wrote: >=20 > Ok, I updated the patch for au1xmmc.c . >=20 > This patch has changed command types check from data flags. >=20 Perfect. That's just the way things should be. > MMC_STOP_TRANSMISSION is never passed to au1xmmc_send_command(). > SEND_STOP() is used for MMC_STOP_TRANSMISSION. >=20 That SEND_STOP however is a long standing bug in this driver. Could I bot= her you with fixing the driver so that it respects mrq->data->stop? Rgds Pierre --=_hera.drzeus.cx-22838-1178898581-0001-2 Content-Type: application/pgp-signature; name="signature.asc" Content-Transfer-Encoding: 7bit Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.7 (GNU/Linux) Comment: Using GnuPG with Fedora - http://enigmail.mozdev.org iD8DBQFGRJBq7b8eESbyJLgRAmSNAJ98/CqDUmaa7wUjCm1fbqiSMM4NoACeMFCr edfHrMO6cPRKi85SKPUwWVA= =08FX -----END PGP SIGNATURE----- --=_hera.drzeus.cx-22838-1178898581-0001-2-- From anemo@mba.ocn.ne.jp Fri May 11 16:58:58 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 16:59:03 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:46557 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S28573712AbXEKP66 (ORCPT ); Fri, 11 May 2007 16:58:58 +0100 Received: from localhost (p6018-ipad206funabasi.chiba.ocn.ne.jp [222.145.80.18]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id A5214A9EC; Sat, 12 May 2007 00:58:52 +0900 (JST) Date: Sat, 12 May 2007 00:59:05 +0900 (JST) Message-Id: <20070512.005905.26096031.anemo@mba.ocn.ne.jp> To: vagabon.xyz@gmail.com Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, sam@ravnborg.org Subject: Re: [PATCH] MIPS: Run checksyscalls for N32 and O32 ABI From: Atsushi Nemoto In-Reply-To: References: <20070511.010234.74566169.anemo@mba.ocn.ne.jp> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15044 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Fri, 11 May 2007 14:14:47 +0200, "Franck Bui-Huu" wrote: > or can't we do instead: > > $(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=n32" > > and get rid of "missing-syscalls-n32" rule. Thus this avoids to > duplicate "missing-syscalls" command. Thank you for suggestion. How about this? Subject: [PATCH] MIPS: Simplify missing-syscalls for N32 and O32 Use standard missing-syscalls with EXTRA_CFLAGS instead of duplicating the command. Suggested by Franck Bui-Huu. Also add "echo" to show the target ABI. Signed-off-by: Atsushi Nemoto --- diff --git a/arch/mips/Makefile b/arch/mips/Makefile index f450066..25c7318 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -710,24 +710,12 @@ CLEAN_FILES += vmlinux.32 \ vmlinux.64 \ vmlinux.ecoff -quiet_cmd_syscalls_n32 = CALL-N32 $< - cmd_syscalls_n32 = $(CONFIG_SHELL) $< $(CC) $(c_flags) -mabi=n32 - -quiet_cmd_syscalls_o32 = CALL-O32 $< - cmd_syscalls_o32 = $(CONFIG_SHELL) $< $(CC) $(c_flags) -mabi=32 - -PHONY += missing-syscalls-n32 missing-syscalls-o32 - -missing-syscalls-n32: scripts/checksyscalls.sh FORCE - $(call cmd,syscalls_n32) - -missing-syscalls-o32: scripts/checksyscalls.sh FORCE - $(call cmd,syscalls_o32) - archprepare: ifdef CONFIG_MIPS32_N32 - $(Q)$(MAKE) $(build)=arch/mips missing-syscalls-n32 + @echo ' Checking missing-syscalls for N32' + $(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=n32" endif ifdef CONFIG_MIPS32_O32 - $(Q)$(MAKE) $(build)=arch/mips missing-syscalls-o32 + @echo ' Checking missing-syscalls for O32' + $(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=32" endif From hjl@lucon.org Fri May 11 17:53:38 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 17:53:42 +0100 (BST) Received: from smtp106.sbc.mail.mud.yahoo.com ([68.142.198.205]:21135 "HELO smtp106.sbc.mail.mud.yahoo.com") by ftp.linux-mips.org with SMTP id S20022646AbXEKQxi (ORCPT ); Fri, 11 May 2007 17:53:38 +0100 Received: (qmail 5808 invoked from network); 11 May 2007 16:53:30 -0000 Received: from unknown (HELO lucon.org) (hjjean@sbcglobal.net@76.202.77.69 with login) by smtp106.sbc.mail.mud.yahoo.com with SMTP; 11 May 2007 16:53:29 -0000 X-YMail-OSG: UQztiCUVM1nI3X4smAGuEkZ6vq0MjCuUq0lIdPdpfbYkfJF4Y0jiQE_AMiuNRPpVnXIxghWWkbN_70WZeTnIVC_4tCMxJuFz77dvWTvSSPH2uW07s7s- Received: by lucon.org (Postfix, from userid 500) id D57FE46EEEB; Fri, 11 May 2007 09:53:27 -0700 (PDT) Date: Fri, 11 May 2007 09:53:27 -0700 From: "H. J. Lu" To: linux-gcc@vger.kernel.org, gcc@gcc.gnu.org, GNU C Library Cc: Mat Hostetter , Warner Losh , linux-mips@linux-mips.org, Ralf Baechle , Linas Vepstas , linux-vax@pergamentum.com Subject: The Linux binutils 2.17.50.0.16 is released Message-ID: <20070511165327.GA22397@lucon.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.4.2.2i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15045 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hjl@lucon.org Precedence: bulk X-list: linux-mips This is the beta release of binutils 2.17.50.0.16 for Linux, which is based on binutils 2007 0511 in CVS on sourceware.org plus various changes. It is purely for Linux. All relevant patches in patches have been applied to the source tree. You can take a look at patches/README to see what have been applied and in what order they have been applied. Starting from the 2.17.50.0.4 release, the default output section LMA (load memory address) has changed for allocatable sections from being equal to VMA (virtual memory address), to keeping the difference between LMA and VMA the same as the previous output section in the same region. For .data.init_task : { *(.data.init_task) } LMA of .data.init_task section is equal to its VMA with the old linker. With the new linker, it depends on the previous output section. You can use .data.init_task : AT (ADDR(.data.init_task)) { *(.data.init_task) } to ensure that LMA of .data.init_task section is always equal to its VMA. The linker script in the older 2.6 x86-64 kernel depends on the old behavior. You can add AT (ADDR(section)) to force LMA of .data.init_task section equal to its VMA. It will work with both old and new linkers. The x86-64 kernel linker script in kernel 2.6.13 and above is OK. The new x86_64 assembler no longer accepts monitor %eax,%ecx,%edx You should use monitor %rax,%ecx,%edx or monitor which works with both old and new x86_64 assemblers. They should generate the same opcode. The new i386/x86_64 assemblers no longer accept instructions for moving between a segment register and a 32bit memory location, i.e., movl (%eax),%ds movl %ds,(%eax) To generate instructions for moving between a segment register and a 16bit memory location without the 16bit operand size prefix, 0x66, mov (%eax),%ds mov %ds,(%eax) should be used. It will work with both new and old assemblers. The assembler starting from 2.16.90.0.1 will also support movw (%eax),%ds movw %ds,(%eax) without the 0x66 prefix. Patches for 2.4 and 2.6 Linux kernels are available at http://www.kernel.org/pub/linux/devel/binutils/linux-2.4-seg-4.patch http://www.kernel.org/pub/linux/devel/binutils/linux-2.6-seg-5.patch The ia64 assembler is now defaulted to tune for Itanium 2 processors. To build a kernel for Itanium 1 processors, you will need to add ifeq ($(CONFIG_ITANIUM),y) CFLAGS += -Wa,-mtune=itanium1 AFLAGS += -Wa,-mtune=itanium1 endif to arch/ia64/Makefile in your kernel source tree. Please report any bugs related to binutils 2.17.50.0.16 to hjl@lucon.org and http://www.sourceware.org/bugzilla/ Changes from binutils 2.17.50.0.15: 1. Update from binutils 2007 0511. 2. Fix objcopy --only-keep-debug and linker multiple BSS sections handling. PR 4479. 3. Fix "readelf -s -D" for gnu hash. PR 4476. 4. Fix ia64 linker crash with --unresolved-symbols=ignore-all. PR 4409. 5. Improve crc32 support in x86 assembler/dissassembler. 6. Improve displacement handling in x86 dissassembler. PR 4430. 7. Correct PC relative displacement handling in x86-64 dissassembler for Intel mode. PR 4429. 8. Fix various PPC bugs. 9. Fix various SPU bugs. 10. Fix various ARM bugs. 11. Fix various m68k bugs. 12. Fix various xtensa bugs. Changes from binutils 2.17.50.0.14: 1. Update from binutils 2007 0418. 2. Support Intel SSE4 instructions. 3. Fix linker --fatal-warnings for --warn-shared-textrel. PR 4304. 4. Improve linker error message to identify linker script error location. PR 4090. 5. Fix objcopy to allow removing all sections. PR 4348. 6. Don't print addresses of 32-bit targets as 64-bit values on 64bit host. PR 4292. 7. Improve checking for corrupted input files. PR 4110. 8. Improve alpha linker performance. 9. Add a new linker option, -l:foo. 10. Fix a PPC linker bug. PR 4267. 11. Misc vxworks bug fixes. 12. Misc SH bug fixes. 13. Misc SPU bug fixes. 14. Misc ARM bug fixes. 15. Misc MIPS bug fixes. 16. Misc xtensa bug fixes. Changes from binutils 2.17.50.0.13: 1. Update from binutils 2007 0322. 2. Fix >16byte nop padding regression in x86 assembler. 3. Fix x86-64 disassembler for xchg. PR 4218. 4. Optimize opcode for x86-64 xchg. 5. Allow register operand with x86 nop. 6. Properly handle holes between sections for PE-COFF. PR 4210. 7. Print more PE-COFF info for objdump -p. 8. Report missing matching LO16 relocation for HI16 relocation in mips linker. 9. Use PC-relative relocation for Win64. 10. Fix strip for Solaris. PR 3535. 11. Fix a C++ demangler crash. 12. Some m32c update. 13. Fix misc ARM bugs. Changes from binutils 2.17.50.0.12: 1. Update from binutils 2007 0315. 2. Add EFI/x86-64 support. 3. Fix ELF linker for relocation against STN_UNDEF. PR 3958. 4. Fix ELF linker for SHT_NOBITS section whose VMA > page size. PR 4144. 5. Make assembler and disassembler consistent for "test %eax,%ebx". PR 4027. 6. Fix i386 32bit address wraparound. PR 3966. 7. Allow Linux/i386 linker to read FreeBSD/i386 object files. 8. Fix ELF linker crash upon use of .gnu.warning. sections. PR 3953. 9. Fix ELF linker to issue an error on bad section in segment. PR 4007. 10. Support enabling both x86_64-mingw32 and i386-mingw32. PR 3945. 11. Fix assembler to stabilize .gcc_except_table relaxation. PR 4029. 12. Fix a MIPS linker crash. PR 3852. 13. Fix readelf for h8300-elf. PR 3800. 14. Fix strip for Solaris. PR 3535. 15. Misc xtensa bug fixes. 16. Misc PPC bug fixes. 17. Misc SPU bug fixes. 18. Add support for Toshiba MeP. Changes from binutils 2.17.50.0.11: 1. Update from binutils 2007 0128. 2. Remove duplicate code in x86 assembler. 3. Fix 32bit and 64bit HPPA/ELF. Changes from binutils 2.17.50.0.10: 1. Update from binutils 2007 0125. 2. Support environment variables, LD_SYMBOLIC for -Bsymbolic and LD_SYMBOLIC_FUNCTIONS for -Bsymbolic-functions. 3. Build binutils rpm with LD_SYMBOLIC_FUNCTIONS=1 and reduce PLT relocations in libfd.so by 84%. 4. Enable sharable sections only for ia32, x86-64 and ia64. 5. Properly handle PT_GNU_RELRO segment for objcopy. Changes from binutils 2.17.50.0.9: 1. Update from binutils 2007 0122. 2. Implement sharable section proposal for ia32, x86-64 and ia64: http://groups-beta.google.com/group/generic-abi 3. Implement linker enhancement, -Bsymbolic-functions, --dynamic-list-cpp-new and --dynamic-list-data. PR 3831. 4. Implement new linker switch, --default-script=FILE/-dT FILE. 5. Check EI_OSABI when reading ELF files. PR 3826. 6. Fix x86 assembler error message. PR 3830. 7. Fix a bug in ld testsuite. PR 1283. 8. Don't include archive64.o for 32bit target. PR 3631. 9. Support -z max-page-size and -z common-page-size in user provided linker script. 10. Fix 32bit library support for GNU/kFreeBSD/x86-64. PR 3843. 11. Fix some bugs in Score assembler. PR 3871. 12. Fix various bugs in ARM assembler. PR 3707 and more. 13. Add Fido support. Changes from binutils 2.17.50.0.8: 1. Update from binutils 2007 0103. 2. Fix --wrap linker bug. 3. Improve handling ELF binaries generated by foreign ELF linkers. 4. Various ELF M68K bug fixes. 5. Score bug fixes. 6. Don't read past end of archive elements. PR 3704. 7. Improve .eh_frame_hdr section handling. 8. Fix symbol visibility with comdat/linkonce sections in ELF linker. PR 3666. 9. Fix 4 operand instruction handling in x86 assembler. 10. Properly check the 4th operand in x86 assembler. PR 3712. 11. Fix .cfi_endproc handling in assembler. PR 3607. 12. Various ARM bug fixes. 13. Various PE linker fixes. 14. Improve x86 dissassembler for cmpxchg16b. Changes from binutils 2.17.50.0.7: 1. Update from binutils 2006 1201. 2. Fix "objcopy --only-keep-debug" crash. PR 3609. 3. Fix various ARM ELF bugs. 4. Fix various xtensa bugs. 5. Update x86 disassembler. Changes from binutils 2.17.50.0.6: 1. Update from binutils 2006 1127. 2. Properly set ELF output segment address when the first section in input segment is removed. 3. Better merging of CIEs in linker .eh_frame optimizations. 4. Support .cfi_personality and .cfi_lsda assembler directives. 5. Fix an ARM linker crash. PR 3532. 6. Fix various PPC64 ELF bugs. 7. Mark discarded debug info more thoroughly in linker output. 8. Fix various MIPS ELF bugs. 9. Fix readelf to display program interpreter path > 64 chars. PR 3384. 10. Add support for PowerPC SPU. 11. Properly handle cloned symbols used in relocations in assembler. PR 3469. 12. Update opcode for POPCNT in amdfam10 architecture. Changes from binutils 2.17.50.0.5: 1. Update from binutils 2006 1020. 2. Don't make debug symbol dynamic. PR 3290. 3. Don't page align empty SHF_ALLOC sections, which leads to very large executables. PR 3314. 4. Use a different section index for section relative symbols against removed empty sections. 5. Fix a few ELF EH frame handling bugs. 6. Don't ignore relocation overflow on branches to undefweaks for x86-64. PR 3283. 7. Rename MNI to SSSE3. 8. Properly append symbol list for --dynamic-list. lists. 9. Various ARM ELF fixes. 10. Correct 64bit library search path for Linux/x86 linker with 64bit support. 11. Fix ELF linker to copy OS/PROC specific flags from input section to output section. 12. Fix DW_FORM_ref_addr handling in linker dwarf reader. PR 3191. 13. Fix ELF indirect symbol handling. PR 3351. 14. Fix PT_GNU_RELRO segment handling for SHF_TLS sections. Don't add PT_GNU_RELRO segment when there are no relro sections. PR 3281. 15. Various MIPS ELF fixes. 16. Various Sparc ELF fixes. 17. Various Xtensa ELF fixes. Changes from binutils 2.17.50.0.4: 1. Update from binutils 2006 0927. 2. Fix linker regressions of section address and section relative symbol with empty output section. PR 3223/3267. 3. Fix "strings -T". PR 3257. 4. Fix "objcopy --only-keep-debug". PR 3262. 5. Add Intell iwmmxt2 support. 6. Fix an x86 disassembler bug. PR 3100. Changes from binutils 2.17.50.0.3: 1. Update from binutils 2006 0924. 2. Speed up linker on .o files with debug info on linkonce sections. PR 3111. 3. Added x86-64 PE support. 4. Fix objcopy/strip on .o files with section groups. PR 3181. 5. Fix "ld --hash-style=gnu" crash with gcc 3.4.6. PR 3197. 6. Fix "strip --strip-debug" on .o files generated with "gcc -feliminate-dwarf2-dups". PR 3186. 7. Fix "ld -r" on .o files generated with "gcc -feliminate-dwarf2-dups". PR 3249. 8. Add --dynamic-list to linker to make global symbols dynamic. 9. Fix magic number for EFI ia64. PR 3171. 10. Remove PT_NULL segment for "ld -z relro". PR 3015. 11. Make objcopy to perserve the file formats in archive elements. PR 3110. 12. Optimize x86-64 assembler and fix disassembler for "add32 mov xx,$eax". PR 3235. 13. Improve linker diagnostics. PR 3107. 14. Fix "ld --sort-section name". PR 3009. 15. Updated an x86 disassembler bug. PR 3000. 16. Various updates for PPC, ARM, MIPS, SH, Xtensa. 17. Added Score support. Changes from binutils 2.17.50.0.2: 1. Update from binutils 2006 0715. 2. Add --hash-style to ELF linker with DT_GNU_HASH and SHT_GNU_HASH. 3. Fix a visibility bug in ELF linker (PR 2884). 4. Properly fix the i386 TLS linker bug (PR 2513). 5. Add assembler and dissassembler support for Pentium Pro nops. 6. Optimize x86 nops for Pentium Pro and above. 7. Add -march=/-mtune= to x86 assembler. 8. Fix an ELF linker with TLS common symbols. 9. Improve program header allocation in ELF linker. 10. Improve MIPS, M68K and ARM support. 11. Fix an ELF linker crash when reporting alignment change (PR 2735). 12. Remove unused ELF section symbols (PR 2723). 13. Add --localize-hidden to objcopy. 14. Add AMD SSE4a and ABM new instruction support. 15. Properly handle illegal x86 instructions in group 11 (PR 2829). 16. Add "-z max-page-size=" and "-z common-page-size=" to ELF linker. 17. Fix objcopy for .tbss sections. Changes from binutils 2.17.50.0.1: 1. Update from binutils 2006 0526. 2. Change the x86-64 maximum page size to 2MB. 3. Support --enable-targets=all for 64bit target and host (PR 1485). 4. Properly update CIE/FDE length and align section for .eh_frame section (PR 2655/2657). 5. Properly handle removed ELF section symbols. 6. Fix an ELF linker regression introduced on 2006-04-21. 7. Fix an segfault in PPC ELF linker (PR 2658). 8. Speed up the ELF linker by caching the result of kept section check. 9. Properly create stabs section for ELF. 10. Preserve ELF program header when copying ELF files. 11. Properly handle ELF SHN_LOPROC/SHN_HIOS when checking section index (PR 2607). 12. Misc mips updates. 13. Misc arm updates. 14. Misc xtensa updates. 15. Fix an alpha assembler warning (PR 2598). 16. Fix assembler buffer overflow. 17. Properly disassemble sgdt/sidt for x86-64. Changes from binutils 2.16.91.0.7: 1. Update from binutils 2006 0427. 2. Fix an objcopy regression (PR 2593). 3. Reduce ar memory usage (PR 2467). 4. Allow application specific ELF sections (PR 2537). 5. Fix an i386 TLS linker bug (PR 2513). 6. Speed up ia64 linker by 1300X in some cases (PR 2442). 7. Check illegal immediate register operand in i386 assembler (PR 2533). 8. Fix a strings bug (PR 2584). 9. Better handle corrupted ELF files (PR 2257). 10. Fix a MIPS linker bug (PR 2267). Changes from binutils 2.16.91.0.6: 1. Update from binutils 2006 0317. 2. Support Intel Merom New Instructions in assembler/disassembler. 3. Support Intel new instructions in Montecito. 4. Fix linker "--as-needed" (PR 2434). 5. Fix linker "-s" regression (PR 2462). 6. Fix REP prefix for string instructions in x86 disassembler (PR 2428). 7. Fix the weak undefined symbols in PIE (PR 2218). 8. Fix 2 DWARF reader bugs (PRs 2443, 2338). 9. Improve ELF linker error message (PR 2322). 10. Avoid abort with dynamic symbols in >64K sections (PR 2411). 11. Handle mismatched symbol types for executables (PR 2404). 12. Avoid a linker linkonce regression (PR 2342). Changes from binutils 2.16.91.0.5: 1. Update from binutils 2006 0212. 2. Correct Linux linker search order for DT_NEEDED entries (PR 2290). 3. Fix the x86-64 disassembler for control/debug register moves. 4. Properly handle ELF strip/objcopy with unmodified program header (PR 2258). 5. Improve ELF linker error handling when there are not enough room for program headers (PR 2322). 6. Properly handle weak undefined symbols in PIE (PR 2218). 7. Support new i386/x86-64 TLS relocations. 8. Fix addr2line for linux kernel (PR 2096). 9. Fix an assembler memory leak with --statistics. 10. Avoid an ia64 assembler regression (PR 2117). Changes from binutils 2.16.91.0.4: 1. Update from binutils 2005 1219. 2. Fix a MIPS linker regression (PR 1932). 3. Fix an objcopy bug for ia64 (PR 1991). 4. Fix a linker crash on bad input (PR 2008). 5. Fix 64bit monitor and mwait (PR 1874). Changes from binutils 2.16.91.0.3: 1. Update from binutils 2005 1111. 2. Fix ELF orphan section handling (PR 1467) 3. Fix ELF section attribute handleing (PR 1487). 4. Fix IA64 unwind info dump for relocatable files. (PR 1436). 5. Add DWARF info dump to objdump. 6. Fix SHF_LINK_ORDER handling (PR 1321). 7. Don't allow "ld --just-symbols" on DSO (PR 1263). 8. Fix a "ld -u" crash on TLS symbol (PR 1301). 9. Fix an IA64 linker crash (PR 1247). 10. Fix a MIPS linker bug (PR 1150). 11. Fix a M68K linker bug (PR 1775). 12. Fix an ELF symbol versioning linker bug (PR 1540). 13. Improve linker error handling (PR 1208). 14. Add new SPARC processors to SunOS for objcopy (PR 1472). 15. Add "@file" to read options from a file. 16. Add assembler weakref support. Changes from binutils 2.16.91.0.2: 1. Update from binutils 2005 0821. 2. Support x86-64 medium model. 3. Fix "objdump -S --adjust-vma=xxx" (PR 1179). 4. Reduce R_IA64_NONE relocations from R_IA64_LDXMOV relaxation. 5. Fix x86 linker regression for dosemu. 6. Add "readelf -t/--section-details" to display section details. 7. Fix "as -al=file" regression (PR 1118). Changes from binutils 2.16.91.0.1: 1. Update from binutils 2005 0720. 2. Add Intel VMX support. 3. Add AMD SVME support. 4. Add x86-64 new relocations for medium model. 5. Fix a PIE regression (PR 975). 6. Fix an x86_64 signed 32bit displacement regression. 7. Fix PPC PLT (PR 1004). 8. Improve empty section removal. Changes from binutils 2.16.90.0.3: 1. Update from binutils 2005 0622. 2. Fix a linker versioning bug exposed by gcc 4 (PR 1022/1023/1025). 3. Optimize ia64 br->brl relaxation (PR 834). 4. Improve linker empty section removal. 5. Fix DWARF 2 line number reporting (PR 990). 6. Fix DWARF 2 line number reporting regression on assembly file (PR 1000). Changes from binutils 2.16.90.0.2: 1. Update from binutils 2005 0510. 2. Update ia64 assembler to support comdat group section generated by gcc 4 (PR 940). 3. Fix a linker crash on bad input (PR 939). 4. Fix a sh64 assembler regression (PR 936). 5. Support linker script on executable (PR 882). 6. Fix the linker -pie regression (PR 878). 7. Fix an x86_64 disassembler bug (PR 843). 8. Fix a PPC linker regression. 9. Misc speed up. Changes from binutils 2.16.90.0.1: 1. Update from binutils 2005 0429. 2. Fix an ELF linker regression (PR 815). 3. Fix an empty section removal related bug. 4. Fix an ia64 linker regression (PR 855). 5. Don't allow local symbol to be equated common/undefined symbols (PR 857). 6. Fix the ia64 linker to handle local dynamic symbol error reporting. 7. Make non-debugging reference to discarded section an error (PR 858). 8. Support Sparc/TLS. 9. Support rpm build with newer rpm. 10. Fix an alpha linker regression. 11. Fix the non-gcc build regression. Changes from binutils 2.15.94.0.2.2: 1. Update from binutils 2005 0408. 2. The i386/x86_64 assemblers no longer accept instructions for moving between a segment register and a 32bit memory location. 3. The x86_64 assembler now allows movq between a segment register and a 64bit general purpose register. 4. 20x Speed up linker for input files with >64K sections. 5. Properly report ia64 linker relaxation failures. 6. Support tuning ia64 assembler for Itanium 2 processors. 7. Linker will remove empty unused output sections. 8. Add -N to readelf to display full section names. 9. Fix the ia64 linker to support linkonce text sections without unwind sections. 10. More unwind directive checkings in the ia64 assembler. 11. Speed up linker with wildcard handling. 12. Fix readelf to properly dump .debug_ranges and .debug_loc sections. Changes from binutils 2.15.94.0.2: 1. Fix greater than 64K section support in linker. 2. Properly handle i386 and x86_64 protected symbols in linker. 3. Fix readelf for LEB128 on 64bit hosts. 4. Speed up readelf for section group process. 5. Include ia64 texinfo pages. 6. Change ia64 assembler to check hint.b for Montecito. 7. Improve relaxation failure report in ia64 linker. 8. Fix ia64 linker to allow relax backward branch in the same section. Changes from binutils 2.15.94.0.1: 1. Update from binutils 2004 1220. 2. Fix strip for TLS symbol references. Changes from binutils 2.15.92.0.2: 1. Update from binutils 2004 1121. 2. Put ia64 .ctors/.dtors sections next to small data section for Intel ia64 compiler. 3. Fix -Bdynamic/-Bstatic handling for linker script. 4. Provide more information on relocation overflow. 5. Add --sort-section to linker. 6. Support icc 8.1 unwind info in readelf. 7. Fix the infinite loop bug on bad input in the ia64 assembler. 8. Fix ia64 SECREL relocation in linker. 9. Fix a section group memory leak in readelf. Changes from binutils 2.15.91.0.2: 1. Update from binutils 2004 0927. 2. Work around a section header bug in Intel ia64 compiler. 3. Fix an unwind directive bug in the ia64 assembler. 4. Fix various PPC bugs. 5. Update ARM support. 6. Fix an x86-64 linker warning while building Linux kernel. Changes from binutils 2.15.91.0.1: 1. Update from binutils 2004 0727. 2. Fix the x86_64 linker to prevent non-PIC code in shared library. 3. Fix the ia64 linker to warn the relotable files which can't be relaxed. 4. Fix the comdat group support. Allow mix single-member comdat group with linkonce section. 5. Added --add-needed/--no-add-needed options to linker. 6. Fix the SHF_LINK_ORDER support. 7. Fix the ia64 assembler for multiple sections with the same name and SHT_IA_64_UNWIND sections. 8. Fix the ia64 assembler for merge section and relaxation. Changes from binutils 2.15.90.0.3: 1. Update from binutils 2004 0527. 2. Fix -x auto option in the ia64 assembler. 3. Add the AR check in the ia64 assembler. 4. Fix the section group support. 5. Add a new -z relro linker option. 6. Fix an exception section placement bug in linker. 7. Add .serialize.data and .serialize.instruction to the ia64 assembler. Changes from binutils 2.15.90.0.2: 1. Update from binutils 2004 0415. 2. Fix the linker for weak undefined symbol handling. 3. Fix the ELF/Sparc and ELF/Sparc64 linker for statically linking PIC code. Changes from binutils 2.15.90.0.1.1: 1. Update from binutils 2004 0412. 2. Add --as-needed/--no-as-needed to linker. 3. Fix -z defs in linker. 4. Always reserve the memory for ia64 dynamic linker. 5. Fix a race condition in ia64 lazy binding. Changes from binutils 2.15.90.0.1: 1. Fixed an ia64 assembler bug. 2. Install the assembler man page. Changes from binutils 2.14.90.0.8: 1. Update from binutils 2004 0303. 2. Fixed linker for undefined symbols with non-default visibility. 3. Sped up linker weakdef symbol handling. 4. Fixed mixing ELF32 and ELF64 object files in archive. 5. Added ia64 linker brl optimization. 6. Fixed ia64 linker to disallow invalid dynamic relocations. 7. Fixed DT_TEXTREL handling in ia64 linker. 8. Fixed alignment handling in ia64 assembler. 9. Improved ia64 assembler unwind table handling. Changes from binutils 2.14.90.0.7: 1. Update from binutils 2004 0114. 2. Fixed an ia64 assembler unwind table bug. 3. Better handle IPF linker relaxation overflow. 4. Fixed misc PPC bugs. Changes from binutils 2.14.90.0.6: 1. Update from binutils 2003 1029. 2. Allow type changes for undefined symbols. 3. Fix EH frame optimization. 4. Fix the check for undefined versioned symbol with wildcard. 5. Support generating code for Itanium. 6. Detect and warn bad symbol index. 7. Update IPF assemebler DV check. Changes from binutils 2.14.90.0.5: 1. Update from binutils 2003 0820. 2. No longer use section names for ELF section types nor flags. 3. Fix some ELF/IA64 linker bugs. 4. Fix some ELF/ppc bugs. 5. Add archive support to readelf. Changes from binutils 2.14.90.0.4.1: 1. Update from binutils 2003 0722. 2. Fix an ELF/mips linker bug. 3. Fix an ELF/hpppa linker bug. 4. Fix an ELF/ia64 assembler bug. 5. Fix a linkonce support with C++ debug. 6. A new working C++ demangler. 7. Various alpha, mips, ia64, ... bug fixes. 8. Support for the current gcc and glibc. Changes from binutils 2.14.90.0.4: 1. Fix an ia64 assembler hint@pause bug. 2. Support Intel Prescott New Instructions. Changes from binutils 2.14.90.0.3: 1. Work around the brain dead libtool. Changes from binutils 2.14.90.0.2: 1. Update from binutils 2003 0523. 2. Fix 2 ELF visibility bugs. 3. Fix ELF/ppc linker bugs. Changes from binutils 2.14.90.0.1: 1. Update from binutils 2003 0515. 2. Fix various ELF visibility bugs. 3. Fix some ia64 linker bugs. 4. Add more IAS compatibilities to ia64 assembler. Changes from binutils 2.13.90.0.20: 1. Update from binutils 2003 0505. 2. Fix various ELF visibility bugs. 3. Fix some ia64 linker bugs. 4. Fix some ia64 assembler bugs. 5. Add some IAS compatibilities to ia64 assembler. 6. Fix ELF common symbol alignment. 7. Fix ELF weak symbol handling. Changes from binutils 2.13.90.0.18: 1. Update from binutils 2003 0319. 2. Fix an ia64 linker brl relaxation bug. 3. Fix some ELF/ppc linker bugs. Changes from binutils 2.13.90.0.16: 1. Update from binutils 2003 0121. 2. Fix an ia64 gas bug. 3. Fix some TLS bugs. 4. Fix some ELF/ppc bugs. 5. Fix an ELF/m68k bug. 2. Include /usr/bin/c++filt. Changes from binutils 2.13.90.0.14: 1. Update from binutils 2002 1126. 2. Include /usr/bin/c++filt. 3. Fix "ld -r" with execption handling. Changes from binutils 2.13.90.0.10: 1. Update from binutils 2002 1114. 2. Fix ELF/alpha bugs. 3. Fix an ELF/i386 assembler bug. Changes from binutils 2.13.90.0.4: 1. Update from binutils 2002 1010. 2. More ELF/PPC linker bug fixes. 3. Fix an ELF/alpha linker bug. 4. Fix an ELF/sparc linker bug to support Solaris. 5. More TLS updates. Changes from binutils 2.13.90.0.3: 1. Update from binutils 2002 0814. 2. Fix symbol versioning bugs for gcc 3.2. 3. Fix mips gas. Changes from binutils 2.13.90.0.2: 1. Update from binutils 2002 0809. 2. Fix a mips gas compatibility bug. 3. Fix an x86 TLS bfd bug. 4. Fix an x86 PIC gas bug. 5. Improve symbol versioning support. The file list: 1. binutils-2.17.50.0.16.tar.bz2. Source code. 2. binutils-2.17.50.0.15-2.17.50.0.16.diff.bz2. Patch against the previous beta source code. 3. binutils-2.17.50.0.16.i686.tar.bz2. IA-32 binary tar ball for RedHat EL 4. 4. binutils-2.17.50.0.16.ia64.tar.bz2. IA-64 binary tar ball for RedHat EL 4. 5. binutils-2.17.50.0.16.x86_64.tar.bz2. X64_64 binary tar ball for RedHat EL 4. The primary sites for the beta Linux binutils are: 1. http://www.kernel.org/pub/linux/devel/binutils/ Thanks. H.J. Lu hjl@lucon.org 05/11/2007 From wilson@specifix.com Fri May 11 19:45:58 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 19:46:00 +0100 (BST) Received: from w099.z064220152.sjc-ca.dsl.cnc.net ([64.220.152.99]:31926 "EHLO bluesmobile.specifix.com") by ftp.linux-mips.org with ESMTP id S20021831AbXEKSp6 (ORCPT ); Fri, 11 May 2007 19:45:58 +0100 Received: from localhost.localdomain (bluesmobile.specifix.com [64.220.152.99]) by bluesmobile.specifix.com (Postfix) with ESMTP id D5A513B796; Fri, 11 May 2007 11:45:17 -0700 (PDT) Subject: Re: AW: Building a cross kernel for the IP27/Origin System From: Jim Wilson To: Claus Herrmann Cc: linux-mips@linux-mips.org In-Reply-To: <3713978C68303748B17B273D85768CD208E68C@CYBIEX01.mz.ads.cybits.de> References: <4640911A.4080801@cybits.de> <1178823635.2740.6.camel@localhost.localdomain> <3713978C68303748B17B273D85768CD208E68C@CYBIEX01.mz.ads.cybits.de> Content-Type: text/plain Date: Fri, 11 May 2007 11:42:03 -0700 Message-Id: <1178908923.3587.10.camel@localhost.localdomain> Mime-Version: 1.0 X-Mailer: Evolution 2.6.3 (2.6.3-2.fc5) Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15046 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wilson@specifix.com Precedence: bulk X-list: linux-mips I'm not a linux kernel expert, I am a gcc/binutils expert. So the curious DWARF error stuff from the linker I can and did explain. The rest of it I can't explain. Hopefully someone else can help you with that. -- Jim Wilson, GNU Tools Support, http://www.specifix.com From vagabon.xyz@gmail.com Fri May 11 20:23:57 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 20:24:00 +0100 (BST) Received: from py-out-1112.google.com ([64.233.166.180]:37444 "EHLO py-out-1112.google.com") by ftp.linux-mips.org with ESMTP id S20021976AbXEKTX5 (ORCPT ); Fri, 11 May 2007 20:23:57 +0100 Received: by py-out-1112.google.com with SMTP id u52so886263pyb for ; Fri, 11 May 2007 12:23:56 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=k6TWZIHLpRWhIN4a6fiwA1KAaTZETH2S+VN3w1zC5rvL6rl9tfRSd4I56LLk2GWP8xgqCht81r1Qj/D1io2zR4b66VEIrmPsTQ857e6gfU6NY3W/kHC68z5EvWZfR4Z5D1WvO+s1VIDkqP3nHVdGmlb41GM/t7dKO5iW6qhvFK8= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=tUdbq27jCiVSdBol8mUSIUtdaaO47k8rodRk4o/bRTL7s/5ogyIqxDS+LmlziAId9C8CE05lWEigkEZCUfQyHyPvGar7hQKR8jLwxs9D3DFxBOEMe5MB5j1RtXmaQ/3ev3jE3ldzZw/sc4wJ8m/oJzBEJqwDK9bjEkoWaYRK5Jk= Received: by 10.65.159.3 with SMTP id l3mr5917563qbo.1178911436106; Fri, 11 May 2007 12:23:56 -0700 (PDT) Received: by 10.65.241.19 with HTTP; Fri, 11 May 2007 12:23:55 -0700 (PDT) Message-ID: Date: Fri, 11 May 2007 21:23:55 +0200 From: "Franck Bui-Huu" To: "Atsushi Nemoto" Subject: Re: [PATCH] MIPS: Run checksyscalls for N32 and O32 ABI Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, sam@ravnborg.org In-Reply-To: <20070512.005905.26096031.anemo@mba.ocn.ne.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20070511.010234.74566169.anemo@mba.ocn.ne.jp> <20070512.005905.26096031.anemo@mba.ocn.ne.jp> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15047 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips On 5/11/07, Atsushi Nemoto wrote: > archprepare: > ifdef CONFIG_MIPS32_N32 > - $(Q)$(MAKE) $(build)=arch/mips missing-syscalls-n32 > + @echo ' Checking missing-syscalls for N32' > + $(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=n32" > endif > ifdef CONFIG_MIPS32_O32 > - $(Q)$(MAKE) $(build)=arch/mips missing-syscalls-o32 > + @echo ' Checking missing-syscalls for O32' > + $(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=32" > endif > Well I'm not sure how revelant are the echos... But I still think that (a) you shouldn't put any command in 'archprepare' multiple rule (b) you should move this rule from the cleaning targets. Thanks -- Franck From simon@fire.lp0.eu Fri May 11 20:42:33 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 20:42:36 +0100 (BST) Received: from proxima.lp0.eu ([85.158.45.36]:6116 "EHLO proxima.lp0.eu") by ftp.linux-mips.org with ESMTP id S20021936AbXEKTmd (ORCPT ); Fri, 11 May 2007 20:42:33 +0100 Received: from redrum.lp0.eu ([2001:4b10:1005:0:202:44ff:fe50:91af]:47788 ident=byte) by proxima.lp0.eu with esmtps (TLSv1:AES256-SHA:256) id 1Hmb0W-0000Sj-HZ; Fri, 11 May 2007 20:42:29 +0100 Message-ID: <4644C721.501@simon.arlott.org.uk> Date: Fri, 11 May 2007 20:42:25 +0100 From: Simon Arlott User-Agent: Thunderbird 1.5.0.5 (X11/20060819) MIME-Version: 1.0 To: Linux Kernel Mailing List , linux-mips@linux-mips.org, trivial@kernel.org Subject: [PATCH] spelling fixes: arch/mips/ X-Enigmail-Version: 0.94.1.2 OpenPGP: id=89C93563 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15048 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: simon@fire.lp0.eu Precedence: bulk X-list: linux-mips Spelling fixes in arch/mips/. Signed-off-by: Simon Arlott --- arch/mips/arc/memory.c | 4 ++-- arch/mips/au1000/common/dbdma.c | 6 +++--- arch/mips/au1000/common/time.c | 2 +- arch/mips/au1000/db1x00/board_setup.c | 4 ++-- arch/mips/au1000/mtx-1/board_setup.c | 2 +- arch/mips/au1000/pb1200/board_setup.c | 2 +- arch/mips/au1000/pb1550/board_setup.c | 2 +- arch/mips/cobalt/setup.c | 4 ++-- arch/mips/ddb5xxx/common/prom.c | 4 ++-- arch/mips/ddb5xxx/ddb5477/lcd44780.c | 2 +- arch/mips/ddb5xxx/ddb5477/setup.c | 2 +- arch/mips/emma2rh/markeins/irq.c | 2 +- arch/mips/gt64120/momenco_ocelot/setup.c | 4 ++-- arch/mips/jazz/jazzdma.c | 2 +- arch/mips/jmr3927/rbhma3100/kgdb_io.c | 2 +- arch/mips/kernel/binfmt_elfn32.c | 2 +- arch/mips/kernel/cpu-bugs64.c | 2 +- arch/mips/kernel/gdb-stub.c | 2 +- arch/mips/kernel/irixelf.c | 2 +- arch/mips/kernel/kspd.c | 2 +- arch/mips/kernel/linux32.c | 2 +- arch/mips/kernel/module.c | 2 +- arch/mips/kernel/process.c | 4 ++-- arch/mips/kernel/semaphore.c | 2 +- arch/mips/kernel/setup.c | 4 ++-- arch/mips/kernel/smtc.c | 4 ++-- arch/mips/kernel/traps.c | 2 +- arch/mips/kernel/vpe.c | 2 +- arch/mips/math-emu/cp1emu.c | 2 +- arch/mips/math-emu/dp_mul.c | 2 +- arch/mips/math-emu/dsemul.c | 2 +- arch/mips/math-emu/sp_mul.c | 2 +- arch/mips/mips-boards/generic/time.c | 4 ++-- arch/mips/mips-boards/sim/sim_time.c | 4 ++-- arch/mips/mm/c-r4k.c | 4 ++-- arch/mips/mm/c-sb1.c | 2 +- arch/mips/mm/c-tx39.c | 2 +- arch/mips/mm/sc-ip22.c | 2 +- arch/mips/mm/tlbex.c | 6 +++--- arch/mips/oprofile/op_impl.h | 2 +- arch/mips/pci/fixup-emma2rh.c | 2 +- arch/mips/pci/ops-bridge.c | 2 +- arch/mips/pci/pci-bcm1480.c | 2 +- arch/mips/pci/pci-ddb5477.c | 2 +- arch/mips/pci/pci-excite.c | 2 +- arch/mips/pci/pci-ip27.c | 2 +- arch/mips/pci/pci-ocelot-g.c | 2 +- arch/mips/pmc-sierra/yosemite/i2c-yosemite.h | 2 +- arch/mips/pmc-sierra/yosemite/smp.c | 2 +- arch/mips/sgi-ip27/ip27-hubio.c | 2 +- arch/mips/sibyte/sb1250/irq.c | 2 +- arch/mips/sni/pcimt.c | 2 +- arch/mips/tx4927/common/tx4927_irq.c | 4 ++-- arch/mips/tx4938/common/prom.c | 2 +- arch/mips/vr41xx/common/cmu.c | 2 +- 55 files changed, 71 insertions(+), 71 deletions(-) diff --git a/arch/mips/arc/memory.c b/arch/mips/arc/memory.c index 83d1579..a12c356 100644 --- a/arch/mips/arc/memory.c +++ b/arch/mips/arc/memory.c @@ -9,7 +9,7 @@ * PROM library functions for acquiring/using memory descriptors given to us * from the ARCS firmware. This is only used when CONFIG_ARC_MEMORY is set * because on some machines like SGI IP27 the ARC memory configuration data - * completly bogus and alternate easier to use mechanisms are available. + * completely bogus and alternate easier to use mechanisms are available. */ #include #include @@ -27,7 +27,7 @@ #undef DEBUG /* - * For ARC firmware memory functions the unit of meassuring memory is always + * For ARC firmware memory functions the unit of measuring memory is always * a 4k page of memory */ #define ARC_PAGE_SHIFT 12 diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c index 626de44..9550981 100644 --- a/arch/mips/au1000/common/dbdma.c +++ b/arch/mips/au1000/common/dbdma.c @@ -240,7 +240,7 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid, chan_tab_t *ctp; au1x_dma_chan_t *cp; - /* We do the intialization on the first channel allocation. + /* We do the initialization on the first channel allocation. * We have to wait because of the interrupt handler initialization * which can't be done successfully during board set up. */ @@ -551,7 +551,7 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries) dp++; } - /* Make last descrptor point to the first. + /* Make last descriptor point to the first. */ dp--; dp->dscr_nxtptr = DSCR_NXTPTR(virt_to_phys(ctp->chan_desc_base)); @@ -976,7 +976,7 @@ au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr ) dp->dscr_source1 = dscr->dscr_source1; dp->dscr_cmd1 = dscr->dscr_cmd1; nbytes = dscr->dscr_cmd1; - /* Allow the caller to specifiy if an interrupt is generated */ + /* Allow the caller to specify if an interrupt is generated */ dp->dscr_cmd0 &= ~DSCR_CMD0_IE; dp->dscr_cmd0 |= dscr->dscr_cmd0 | DSCR_CMD0_V; ctp->chan_ptr->ddma_dbell = 0; diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c index fa1c62f..ff7e99e 100644 --- a/arch/mips/au1000/common/time.c +++ b/arch/mips/au1000/common/time.c @@ -215,7 +215,7 @@ wakeup_counter0_set(int ticks) * counter, if it exists. If we don't have an accurate processor * speed, all of the peripherals that derive their clocks based on * this advertised speed will introduce error and sometimes not work - * properly. This function is futher convoluted to still allow configurations + * properly. This function is further convoluted to still allow configurations * to do that in case they have really, really old silicon with a * write-only PLL register, that we need the 32KHz when power management * "wait" is enabled, and we need to detect if the 32KHz isn't present diff --git a/arch/mips/au1000/db1x00/board_setup.c b/arch/mips/au1000/db1x00/board_setup.c index 8b08edb..1d04a79 100644 --- a/arch/mips/au1000/db1x00/board_setup.c +++ b/arch/mips/au1000/db1x00/board_setup.c @@ -80,10 +80,10 @@ void __init board_setup(void) /* set GPIO[210:208] instead of SSI_0 */ pin_func = au_readl(SYS_PINFUNC) | (u32)(1); - /* set GPIO[215:211] for LED's */ + /* set GPIO[215:211] for LEDs */ pin_func |= (u32)((5<<2)); - /* set GPIO[214:213] for more LED's */ + /* set GPIO[214:213] for more LEDs */ pin_func |= (u32)((5<<12)); /* set GPIO[207:200] instead of PCMCIA/LCD */ diff --git a/arch/mips/au1000/mtx-1/board_setup.c b/arch/mips/au1000/mtx-1/board_setup.c index 7bc5af8..2e268e8 100644 --- a/arch/mips/au1000/mtx-1/board_setup.c +++ b/arch/mips/au1000/mtx-1/board_setup.c @@ -99,7 +99,7 @@ mtx1_pci_idsel(unsigned int devsel, int assert) #endif if (assert && devsel != 0) { - // supress signal to cardbus + // suppress signal to cardbus au_writel( 0x00000002, SYS_OUTPUTCLR ); // set EXT_IO3 OFF } else { diff --git a/arch/mips/au1000/pb1200/board_setup.c b/arch/mips/au1000/pb1200/board_setup.c index 043302b..ec94c4f 100644 --- a/arch/mips/au1000/pb1200/board_setup.c +++ b/arch/mips/au1000/pb1200/board_setup.c @@ -69,7 +69,7 @@ void __init board_setup(void) u32 pin_func; #if 0 - /* Enable PSC1 SYNC for AC97. Normaly done in audio driver, + /* Enable PSC1 SYNC for AC97. Normally done in audio driver, * but it is board specific code, so put it here. */ pin_func = au_readl(SYS_PINFUNC); diff --git a/arch/mips/au1000/pb1550/board_setup.c b/arch/mips/au1000/pb1550/board_setup.c index 05fd27d..77038f2 100644 --- a/arch/mips/au1000/pb1550/board_setup.c +++ b/arch/mips/au1000/pb1550/board_setup.c @@ -54,7 +54,7 @@ void __init board_setup(void) { u32 pin_func; - /* Enable PSC1 SYNC for AC97. Normaly done in audio driver, + /* Enable PSC1 SYNC for AC97. Normally done in audio driver, * but it is board specific code, so put it here. */ pin_func = au_readl(SYS_PINFUNC); diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c index d0dd817..338aa20 100644 --- a/arch/mips/cobalt/setup.c +++ b/arch/mips/cobalt/setup.c @@ -63,8 +63,8 @@ void __init plat_timer_setup(struct irqaction *irq) /* * Cobalt doesn't have PS/2 keyboard/mouse interfaces, - * keyboard conntroller is never used. - * Also PCI-ISA bridge DMA contoroller is never used. + * keyboard controller is never used. + * Also PCI-ISA bridge DMA controller is never used. */ static struct resource cobalt_reserved_resources[] = { { /* dma1 */ diff --git a/arch/mips/ddb5xxx/common/prom.c b/arch/mips/ddb5xxx/common/prom.c index 54a857b..05ab6b0 100644 --- a/arch/mips/ddb5xxx/common/prom.c +++ b/arch/mips/ddb5xxx/common/prom.c @@ -83,7 +83,7 @@ void ddb5477_runtime_detection(void) around just after that. */ - /* We can only use the PCI bus to distinquish between + /* We can only use the PCI bus to distinguish between the Rockhopper and RockhopperII backplanes and this must wait until ddb5477_board_init() in setup.c after the 5477 is initialized. So, until then handle @@ -105,7 +105,7 @@ void ddb5477_runtime_detection(void) *test_offset = TESTVAL2; if (*test_offset != TESTVAL2) { /* OK, we couldn't set this value either, so it must - definately be a BSB_VR0300 */ + definitely be a BSB_VR0300 */ mips_machtype = MACH_NEC_ROCKHOPPER; } else { /* We could change the value twice, so it must be diff --git a/arch/mips/ddb5xxx/ddb5477/lcd44780.c b/arch/mips/ddb5xxx/ddb5477/lcd44780.c index 9510b9a..6fd9e88 100644 --- a/arch/mips/ddb5xxx/ddb5477/lcd44780.c +++ b/arch/mips/ddb5xxx/ddb5477/lcd44780.c @@ -71,7 +71,7 @@ void lcd44780_puts(const char* s) } if (pos == 16) { /* We have filled all 16 character positions, so stop - outputing data */ + outputting data */ break; } } diff --git a/arch/mips/ddb5xxx/ddb5477/setup.c b/arch/mips/ddb5xxx/ddb5477/setup.c index f0cc0e8..23c730c 100644 --- a/arch/mips/ddb5xxx/ddb5477/setup.c +++ b/arch/mips/ddb5xxx/ddb5477/setup.c @@ -350,7 +350,7 @@ static void __init ddb5477_board_init(void) /* * positive decode (bit6 -0) - * enable IDE controler interrupt (bit 4 -1) + * enable IDE controller interrupt (bit 4 -1) * setup SIRQ to point to IRQ 14 (bit 3:0 - 1101) */ pci_write_config_byte(&dev_m1533, 0x44, 0x1d); diff --git a/arch/mips/emma2rh/markeins/irq.c b/arch/mips/emma2rh/markeins/irq.c index 6bcf6a0..dd50753 100644 --- a/arch/mips/emma2rh/markeins/irq.c +++ b/arch/mips/emma2rh/markeins/irq.c @@ -93,7 +93,7 @@ void __init arch_init_irq(void) /* disable interrupt */ reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg & ~GPIO_PCI); - /* level triggerd */ + /* level triggered */ reg = emma2rh_in32(EMMA2RH_GPIO_INT_MODE); emma2rh_out32(EMMA2RH_GPIO_INT_MODE, reg | GPIO_PCI); reg = emma2rh_in32(EMMA2RH_GPIO_INT_CND_A); diff --git a/arch/mips/gt64120/momenco_ocelot/setup.c b/arch/mips/gt64120/momenco_ocelot/setup.c index 98b6fb3..73528ee 100644 --- a/arch/mips/gt64120/momenco_ocelot/setup.c +++ b/arch/mips/gt64120/momenco_ocelot/setup.c @@ -187,7 +187,7 @@ void __init plat_mem_setup(void) GT_WRITE(GT_PCI0M1LD_OFS, 0x36000000 >> 21); /* For the initial programming, we assume 512MB configuration */ - /* Relocate the CPU's view of the RAM... */ + /* Relocate the CPUs view of the RAM... */ GT_WRITE(GT_SCS10LD_OFS, 0); GT_WRITE(GT_SCS10HD_OFS, 0x0fe00000 >> 21); GT_WRITE(GT_SCS32LD_OFS, 0x10000000 >> 21); @@ -239,7 +239,7 @@ void __init plat_mem_setup(void) switch(tmpword &3) { case 3: /* 512MiB */ - /* Decoders are allready set -- just add the + /* Decoders are already set -- just add the * appropriate region */ add_memory_region( 0x40<<20, 0xC0<<20, BOOT_MEM_RAM); add_memory_region(0x100<<20, 0x100<<20, BOOT_MEM_RAM); diff --git a/arch/mips/jazz/jazzdma.c b/arch/mips/jazz/jazzdma.c index e8e0ffb..a186963 100644 --- a/arch/mips/jazz/jazzdma.c +++ b/arch/mips/jazz/jazzdma.c @@ -177,7 +177,7 @@ EXPORT_SYMBOL(vdma_alloc); /* * Free previously allocated dma translation pages * Note that this does NOT change the translation table, - * it just marks the free'd pages as unused! + * it just marks the freed pages as unused! */ int vdma_free(unsigned long laddr) { diff --git a/arch/mips/jmr3927/rbhma3100/kgdb_io.c b/arch/mips/jmr3927/rbhma3100/kgdb_io.c index 2604f2c..264e99e 100644 --- a/arch/mips/jmr3927/rbhma3100/kgdb_io.c +++ b/arch/mips/jmr3927/rbhma3100/kgdb_io.c @@ -70,7 +70,7 @@ unsigned char getDebugChar(void) debugInit(38400); } - /* diable RX int. */ + /* disable RX int. */ dicr = tx3927_sioptr(0)->dicr; tx3927_sioptr(0)->dicr = 0; diff --git a/arch/mips/kernel/binfmt_elfn32.c b/arch/mips/kernel/binfmt_elfn32.c index 9b34238..77db347 100644 --- a/arch/mips/kernel/binfmt_elfn32.c +++ b/arch/mips/kernel/binfmt_elfn32.c @@ -98,7 +98,7 @@ static __inline__ void jiffies_to_compat_timeval(unsigned long jiffies, struct compat_timeval *value) { /* - * Convert jiffies to nanoseconds and seperate with + * Convert jiffies to nanoseconds and separate with * one divide. */ u64 nsec = (u64)jiffies * TICK_NSEC; diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c index c09337b..29435fe 100644 --- a/arch/mips/kernel/cpu-bugs64.c +++ b/arch/mips/kernel/cpu-bugs64.c @@ -64,7 +64,7 @@ static inline void mult_sh_align_mod(long *v1, long *v2, long *w, : "0" (5), "1" (8), "2" (5)); align_mod(align, mod); /* - * The trailing nop is needed to fullfill the two-instruction + * The trailing nop is needed to fulfill the two-instruction * requirement between reading hi/lo and staring a mult/div. * Leaving it out may cause gas insert a nop itself breaking * the desired alignment of the next chunk. diff --git a/arch/mips/kernel/gdb-stub.c b/arch/mips/kernel/gdb-stub.c index 7bc8820..c9d9c14 100644 --- a/arch/mips/kernel/gdb-stub.c +++ b/arch/mips/kernel/gdb-stub.c @@ -116,7 +116,7 @@ * (gdb) target remote /dev/ttyS1 * ...at this point you are connected to * the remote target and can use gdb - * in the normal fasion. Setting + * in the normal fashion. Setting * breakpoints, single stepping, * printing variables, etc. */ diff --git a/arch/mips/kernel/irixelf.c b/arch/mips/kernel/irixelf.c index 403d96f..03cc100 100644 --- a/arch/mips/kernel/irixelf.c +++ b/arch/mips/kernel/irixelf.c @@ -421,7 +421,7 @@ static int verify_binary(struct elfhdr *ehp, struct linux_binprm *bprm) /* XXX Don't support N32 or 64bit binaries yet because they can * XXX and do execute 64 bit instructions and expect all registers * XXX to be 64 bit as well. We need to make the kernel save - * XXX all registers as 64bits on cpu's capable of this at + * XXX all registers as 64bits on CPUs capable of this at * XXX exception time plus frob the XTLB exception vector. */ if ((ehp->e_flags & EF_MIPS_ABI2)) diff --git a/arch/mips/kernel/kspd.c b/arch/mips/kernel/kspd.c index c658001..953898c 100644 --- a/arch/mips/kernel/kspd.c +++ b/arch/mips/kernel/kspd.c @@ -222,7 +222,7 @@ void sp_work_handle_request(void) } } - /* Run the syscall at the priviledge of the user who loaded the + /* Run the syscall at the privilege of the user who loaded the SP program */ if (vpe_getuid(SP_VPE)) diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c index 37849ed..842ce03 100644 --- a/arch/mips/kernel/linux32.c +++ b/arch/mips/kernel/linux32.c @@ -383,7 +383,7 @@ sys32_ipc (u32 call, int first, int second, int third, u32 ptr, u32 fifth) #ifdef CONFIG_MIPS32_N32 asmlinkage long sysn32_semctl(int semid, int semnum, int cmd, u32 arg) { - /* compat_sys_semctl expects a pointer to union semun */ + /* compat_sys_semctl expects a pointer to union semnum */ u32 __user *uptr = compat_alloc_user_space(sizeof(u32)); if (put_user(arg, uptr)) return -EFAULT; diff --git a/arch/mips/kernel/module.c b/arch/mips/kernel/module.c index cb08014..e7ed0ac 100644 --- a/arch/mips/kernel/module.c +++ b/arch/mips/kernel/module.c @@ -381,7 +381,7 @@ const struct exception_table_entry *search_module_dbetables(unsigned long addr) return e; } -/* Put in dbe list if neccessary. */ +/* Put in dbe list if necessary. */ int module_finalize(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs, struct module *me) diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c index 6bdfb5a..07688de 100644 --- a/arch/mips/kernel/process.c +++ b/arch/mips/kernel/process.c @@ -311,7 +311,7 @@ static int get_frame_info(struct mips_frame_info *info) return 0; if (info->pc_offset < 0) /* leaf */ return 1; - /* prologue seems boggus... */ + /* prologue seems bogus... */ err: return -1; } @@ -397,7 +397,7 @@ unsigned long unwind_stack(struct task_struct *task, unsigned long *sp, if (!kallsyms_lookup_size_offset(pc, &size, &ofs)) return 0; /* - * Return ra if an exception occured at the first instruction + * Return ra if an exception occurred at the first instruction */ if (unlikely(ofs == 0)) { pc = *ra; diff --git a/arch/mips/kernel/semaphore.c b/arch/mips/kernel/semaphore.c index 1265358..b363604 100644 --- a/arch/mips/kernel/semaphore.c +++ b/arch/mips/kernel/semaphore.c @@ -33,7 +33,7 @@ * return old_count; * * On machines without lld/scd we need a spinlock to make the manipulation of - * sem->count and sem->waking atomic. Scalability isn't an issue because + * sem->count and sem->waking atomic. Scalibility isn't an issue because * this lock is used on UP only so it's just an empty variable. */ static inline int __sem_update_count(struct semaphore *sem, int incr) diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 4975da0..5bfbc01 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -395,13 +395,13 @@ static void __init bootmem_init(void) #endif /* CONFIG_SGI_IP27 */ /* - * arch_mem_init - initialize memory managment subsystem + * arch_mem_init - initialize memory management subsystem * * o plat_mem_setup() detects the memory configuration and will record detected * memory areas using add_memory_region. * * At this stage the memory configuration of the system is known to the - * kernel but generic memory managment system is still entirely uninitialized. + * kernel but generic memory management system is still entirely uninitialized. * * o bootmem_init() * o sparse_init() diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index b361edb..cca40e7 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c @@ -64,7 +64,7 @@ asiduse smtc_live_asid[MAX_SMTC_TLBS][MAX_SMTC_ASIDS]; unsigned int ipi_timer_latch[NR_CPUS]; /* - * Number of InterProcessor Interupt (IPI) message buffers to allocate + * Number of InterProcessor Interrupt (IPI) message buffers to allocate */ #define IPIBUF_PER_CPU 4 @@ -1284,7 +1284,7 @@ void smtc_flush_tlb_asid(unsigned long asid) if ((ehi & ASID_MASK) == asid) { /* * Invalidate only entries with specified ASID, - * makiing sure all entries differ. + * making sure all entries differ. */ write_c0_entryhi(CKSEG0 + (entry << (PAGE_SHIFT + 1))); write_c0_entrylo0(0); diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index ff45a4b..c29dbc7 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1433,7 +1433,7 @@ void __init trap_init(void) /* * Copy the generic exception handlers to their final destination. - * This will be overriden later as suitable for a particular + * This will be overridden later as suitable for a particular * configuration. */ set_handler(0x180, &except_vec3_generic, 0x80); diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c index c9ee9d2..affa2b7 100644 --- a/arch/mips/kernel/vpe.c +++ b/arch/mips/kernel/vpe.c @@ -19,7 +19,7 @@ * VPE support module * * Provides support for loading a MIPS SP program on VPE1. - * The SP enviroment is rather simple, no tlb's. It needs to be relocatable + * The SP environment is rather simple, no tlb's. It needs to be relocatable * (or partially linked). You should initialise your stack in the startup * code. This loader looks for the symbol __start and sets up * execution to resume from there. The MIPS SDE kit contains suitable examples. diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c index 80531b3..266020a 100644 --- a/arch/mips/math-emu/cp1emu.c +++ b/arch/mips/math-emu/cp1emu.c @@ -741,7 +741,7 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, if (MIPSInst_FUNC(ir) != pfetch_op) { return SIGILL; } - /* ignore prefx operation */ + /* ignore prefix operation */ break; default: diff --git a/arch/mips/math-emu/dp_mul.c b/arch/mips/math-emu/dp_mul.c index f237390..ba2f9d0 100644 --- a/arch/mips/math-emu/dp_mul.c +++ b/arch/mips/math-emu/dp_mul.c @@ -117,7 +117,7 @@ ieee754dp ieee754dp_mul(ieee754dp x, ieee754dp y) xm <<= 64 - (DP_MBITS + 1); ym <<= 64 - (DP_MBITS + 1); - /* multiply 32bits xm,ym to give high 32bits rm with stickness + /* multiply 32bits xm,ym to give high 32bits rm with stickiness */ /* 32 * 32 => 64 */ diff --git a/arch/mips/math-emu/dsemul.c b/arch/mips/math-emu/dsemul.c index ea6ba72..78f5609 100644 --- a/arch/mips/math-emu/dsemul.c +++ b/arch/mips/math-emu/dsemul.c @@ -35,7 +35,7 @@ * According to the spec: * 1) it shouldnt be a branch :-) * 2) it can be a COP instruction :-( - * 3) if we are tring to run a protected memory space we must take + * 3) if we are trying to run a protected memory space we must take * special care on memory access instructions :-( */ diff --git a/arch/mips/math-emu/sp_mul.c b/arch/mips/math-emu/sp_mul.c index 3f070f8..b610aad 100644 --- a/arch/mips/math-emu/sp_mul.c +++ b/arch/mips/math-emu/sp_mul.c @@ -118,7 +118,7 @@ ieee754sp ieee754sp_mul(ieee754sp x, ieee754sp y) xm <<= 32 - (SP_MBITS + 1); ym <<= 32 - (SP_MBITS + 1); - /* multiply 32bits xm,ym to give high 32bits rm with stickness + /* multiply 32bits xm,ym to give high 32bits rm with stickiness */ { unsigned short lxm = xm & 0xffff; diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c index df2a2bd..238c195 100644 --- a/arch/mips/mips-boards/generic/time.c +++ b/arch/mips/mips-boards/generic/time.c @@ -175,7 +175,7 @@ irqreturn_t mips_timer_interrupt(int irq, void *dev_id) /* * FIXME: need to cope with counter underflow. * More support needs to be added to kernel/time for - * counter/timer interrupts on multiple CPU's + * counter/timer interrupts on multiple CPUs */ write_c0_compare(read_c0_count() + (mips_hpt_frequency/HZ)); @@ -289,7 +289,7 @@ void __init plat_timer_setup(struct irqaction *irq) #ifdef CONFIG_SMP /* irq_desc(riptor) is a global resource, when the interrupt overlaps - on seperate cpu's the first one tries to handle the second interrupt. + on separate CPUs the first one tries to handle the second interrupt. The effect is that the int remains disabled on the second cpu. Mark the interrupt with IRQ_PER_CPU to avoid any confusion */ irq_desc[mips_cpu_timer_irq].status |= IRQ_PER_CPU; diff --git a/arch/mips/mips-boards/sim/sim_time.c b/arch/mips/mips-boards/sim/sim_time.c index d3a21c7..3f382b4 100644 --- a/arch/mips/mips-boards/sim/sim_time.c +++ b/arch/mips/mips-boards/sim/sim_time.c @@ -44,7 +44,7 @@ irqreturn_t sim_timer_interrupt(int irq, void *dev_id) /* * FIXME: need to cope with counter underflow. * More support needs to be added to kernel/time for - * counter/timer interrupts on multiple CPU's + * counter/timer interrupts on multiple CPUs */ write_c0_compare (read_c0_count() + ( mips_hpt_frequency/HZ)); } @@ -193,7 +193,7 @@ void __init plat_timer_setup(struct irqaction *irq) #ifdef CONFIG_SMP /* irq_desc(riptor) is a global resource, when the interrupt overlaps - on seperate cpu's the first one tries to handle the second interrupt. + on separate CPUs the first one tries to handle the second interrupt. The effect is that the int remains disabled on the second cpu. Mark the interrupt with IRQ_PER_CPU to avoid any confusion */ irq_desc[mips_cpu_timer_irq].flags |= IRQ_PER_CPU; diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index df04a31..4c1e4df 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -426,7 +426,7 @@ static inline void local_r4k_flush_cache_page(void *args) pte_t *ptep; /* - * If ownes no valid ASID yet, cannot possibly have gotten + * If we have no valid ASID yet, we cannot possibly have got * this page into the cache. */ if (cpu_context(smp_processor_id(), mm) == 0) @@ -1049,7 +1049,7 @@ static void __init setup_scache(void) /* * Do the probing thing on R4000SC and R4400SC processors. Other * processors don't have a S-cache that would be relevant to the - * Linux memory managment. + * Linux memory management. */ switch (c->cputype) { case CPU_R4000SC: diff --git a/arch/mips/mm/c-sb1.c b/arch/mips/mm/c-sb1.c index 9ea460b..1475c15 100644 --- a/arch/mips/mm/c-sb1.c +++ b/arch/mips/mm/c-sb1.c @@ -134,7 +134,7 @@ static inline void __sb1_writeback_inv_dcache_range(unsigned long start, /* * Writeback and invalidate a range of the dcache. With physical - * addresseses, we don't have to worry about possible bit 12 aliasing. + * addresses, we don't have to worry about possible bit 12 aliasing. * XXXKW is it worth turning on KX and using hit ops with xkphys? */ static inline void __sb1_writeback_inv_dcache_phys_range(unsigned long start, diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c index 560a6de..feeba1b 100644 --- a/arch/mips/mm/c-tx39.c +++ b/arch/mips/mm/c-tx39.c @@ -166,7 +166,7 @@ static void tx39_flush_cache_page(struct vm_area_struct *vma, unsigned long page pte_t *ptep; /* - * If ownes no valid ASID yet, cannot possibly have gotten + * If we have no valid ASID yet, we cannot possibly have got * this page into the cache. */ if (cpu_context(smp_processor_id(), mm) == 0) diff --git a/arch/mips/mm/sc-ip22.c b/arch/mips/mm/sc-ip22.c index d236cf8..59a46a0 100644 --- a/arch/mips/mm/sc-ip22.c +++ b/arch/mips/mm/sc-ip22.c @@ -159,7 +159,7 @@ static inline int __init indy_sc_probe(void) return 1; } -/* XXX Check with wje if the Indy caches can differenciate between +/* XXX Check with wje if the Indy caches can differentiate between writeback + invalidate and just invalidate. */ struct bcache_ops indy_sc_ops = { .bc_enable = indy_sc_enable, diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 492c518..db45f1c 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -10,7 +10,7 @@ * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org) * * ... and the days got worse and worse and now you see - * I've gone completly out of my mind. + * I've gone completely out of my mind. * * They're coming to take me a away haha * they're coming to take me a away hoho hihi haha @@ -783,7 +783,7 @@ static void __init build_r3000_tlb_refill_handler(void) * The R4000 TLB handler is much more complicated. We have two * consecutive handler areas with 32 instructions space each. * Since they aren't used at the same time, we can overflow in the - * other one.To keep things simple, we first assume linear space, + * other one. To keep things simple, we first assume linear space, * then we relocate it to the final handler layout as needed. */ static __initdata u32 final_handler[64]; @@ -830,7 +830,7 @@ static __init void __attribute__((unused)) build_tlb_probe_entry(u32 **p) /* * Write random or indexed TLB entry, and care about the hazards from - * the preceeding mtc0 and for the following eret. + * the preceding mtc0 and for the following eret. */ enum tlb_write_entry { tlb_random, tlb_indexed }; diff --git a/arch/mips/oprofile/op_impl.h b/arch/mips/oprofile/op_impl.h index fa6b4aa..82afd7c 100644 --- a/arch/mips/oprofile/op_impl.h +++ b/arch/mips/oprofile/op_impl.h @@ -25,7 +25,7 @@ struct op_counter_config { unsigned long unit_mask; }; -/* Per-architecture configury and hooks. */ +/* Per-architecture configuration and hooks. */ struct op_mips_model { void (*reg_setup) (struct op_counter_config *); void (*cpu_setup) (void * dummy); diff --git a/arch/mips/pci/fixup-emma2rh.c b/arch/mips/pci/fixup-emma2rh.c index 7abcfd1..fc01a48 100644 --- a/arch/mips/pci/fixup-emma2rh.c +++ b/arch/mips/pci/fixup-emma2rh.c @@ -1,6 +1,6 @@ /* * arch/mips/pci/fixup-emma2rh.c - * This file defines the PCI configration. + * This file defines the PCI configuration. * * Copyright (C) NEC Electronics Corporation 2004-2006 * diff --git a/arch/mips/pci/ops-bridge.c b/arch/mips/pci/ops-bridge.c index 1fa0992..4d8cd68 100644 --- a/arch/mips/pci/ops-bridge.c +++ b/arch/mips/pci/ops-bridge.c @@ -19,7 +19,7 @@ * Therefore we use type 0 accesses for now even though they won't work * correcly for PCI-to-PCI bridges. * - * The function is complicated by the ultimate brokeness of the IOC3 chip + * The function is complicated by the ultimate brokenness of the IOC3 chip * which is used in SGI systems. The IOC3 can only handle 32-bit PCI * accesses and does only decode parts of it's address space. */ diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c index d7b9e13..48b8e2e 100644 --- a/arch/mips/pci/pci-bcm1480.c +++ b/arch/mips/pci/pci-bcm1480.c @@ -207,7 +207,7 @@ static int __init bcm1480_pcibios_init(void) PCIBIOS_MIN_IO = 0x00008000UL; PCIBIOS_MIN_MEM = 0x01000000UL; - /* Set I/O resource limits. - unlimited for now to accomodate HT */ + /* Set I/O resource limits. - unlimited for now to accommodate HT */ ioport_resource.end = 0xffffffffUL; iomem_resource.end = 0xffffffffUL; diff --git a/arch/mips/pci/pci-ddb5477.c b/arch/mips/pci/pci-ddb5477.c index d071bc3..d4cab9c 100644 --- a/arch/mips/pci/pci-ddb5477.c +++ b/arch/mips/pci/pci-ddb5477.c @@ -159,7 +159,7 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); if (mips_machtype == MACH_NEC_ROCKHOPPERII) { - /* hack to distinquish overlapping slot 20s, one + /* hack to distinguish overlapping slot 20s, one * on bus 0 (ALI USB on the M1535 on the backplane), * and one on bus 2 (NEC USB controller on the CPU board) * Make the M1535 USB - ISA IRQ number 9. diff --git a/arch/mips/pci/pci-excite.c b/arch/mips/pci/pci-excite.c index 3c86c77..8a56876 100644 --- a/arch/mips/pci/pci-excite.c +++ b/arch/mips/pci/pci-excite.c @@ -131,7 +131,7 @@ static int __init basler_excite_pci_setup(void) ocd_writel(0x00000000, bar + 0x100); } - /* Finally, enable the PCI interupt */ + /* Finally, enable the PCI interrupt */ #if USB_IRQ > 7 set_c0_intcontrol(1 << USB_IRQ); #else diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c index 405ce01..d64ec12 100644 --- a/arch/mips/pci/pci-ip27.c +++ b/arch/mips/pci/pci-ip27.c @@ -96,7 +96,7 @@ int __init bridge_probe(nasid_t nasid, int widget_id, int masterwid) bridge->b_int_device = 0x0; /* - * swap pio's to pci mem and io space (big windows) + * swap PIOs to pci mem and io space (big windows) */ bridge->b_wid_control |= BRIDGE_CTRL_IO_SWAP | BRIDGE_CTRL_MEM_SWAP; diff --git a/arch/mips/pci/pci-ocelot-g.c b/arch/mips/pci/pci-ocelot-g.c index 1e34301..cffc684 100644 --- a/arch/mips/pci/pci-ocelot-g.c +++ b/arch/mips/pci/pci-ocelot-g.c @@ -16,7 +16,7 @@ /* * We assume these address ranges have been programmed into the GT-64240 by * the firmware. PMON in case of the Ocelot G does that. Note the size of - * the I/O range is completly stupid; I/O mappings are limited to at most + * the I/O range is completely stupid; I/O mappings are limited to at most * 256 bytes by the PCI spec and deprecated; and just to make things worse * apparently many devices don't decode more than 64k of I/O space. */ diff --git a/arch/mips/pmc-sierra/yosemite/i2c-yosemite.h b/arch/mips/pmc-sierra/yosemite/i2c-yosemite.h index 31c5523..66c3d37 100644 --- a/arch/mips/pmc-sierra/yosemite/i2c-yosemite.h +++ b/arch/mips/pmc-sierra/yosemite/i2c-yosemite.h @@ -38,7 +38,7 @@ #define TITAN_I2C_READ(offset) *(volatile unsigned long *)(TITAN_I2C_BASE + offset) -/* Local constansts*/ +/* Local constansts */ #define TITAN_I2C_MAX_FILTER 15 #define TITAN_I2C_MAX_CLK 1023 #define TITAN_I2C_MAX_ARBF 15 diff --git a/arch/mips/pmc-sierra/yosemite/smp.c b/arch/mips/pmc-sierra/yosemite/smp.c index 305491e..466bcbb 100644 --- a/arch/mips/pmc-sierra/yosemite/smp.c +++ b/arch/mips/pmc-sierra/yosemite/smp.c @@ -136,7 +136,7 @@ void core_send_ipi(int cpu, unsigned int action) * based on the action desired. An alternative strategy * is to write to the Interrupt Set register, read the * Interrupt Status register and clear the Interrupt - * Clear register. The latter is preffered. + * Clear register. The latter is preferred. */ switch (action) { case SMP_RESCHEDULE_YOURSELF: diff --git a/arch/mips/sgi-ip27/ip27-hubio.c b/arch/mips/sgi-ip27/ip27-hubio.c index 524b371..8a96a5e 100644 --- a/arch/mips/sgi-ip27/ip27-hubio.c +++ b/arch/mips/sgi-ip27/ip27-hubio.c @@ -132,7 +132,7 @@ static void hub_setup_prb(nasid_t nasid, int prbnum, int credits) * XXX - There is a bug in the crossbow that link reset PIOs do not * return write responses. The easiest solution to this problem is to * leave widget 0 (xbow) in fire-and-forget mode at all times. This - * only affects pio's to xbow registers, which should be rare. + * only affects PIOs to xbow registers, which should be rare. **/ static void hub_set_piomode(nasid_t nasid) { diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index 0e6a13c..729e61c 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c @@ -287,7 +287,7 @@ int sb1250_steal_irq(int irq) * On the second cpu, everything is set to IP5, which is * ignored, EXCEPT the mailbox interrupt. That one is * set to IP[2] so it is handled. This is needed so we - * can do cross-cpu function calls, as requred by SMP + * can do cross-cpu function calls, as required by SMP */ #define IMR_IP2_VAL K_INT_MAP_I0 diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c index 9ee208d..6279141 100644 --- a/arch/mips/sni/pcimt.c +++ b/arch/mips/sni/pcimt.c @@ -211,7 +211,7 @@ static void pcimt_hwint1(void) /* * Note: ASIC PCI's builtin interrupt achknowledge feature is * broken. Using it may result in loss of some or all i8259 - * interupts, so don't use PCIMT_INT_ACKNOWLEDGE ... + * interrupts, so don't use PCIMT_INT_ACKNOWLEDGE ... */ irq = i8259_irq(); if (unlikely(irq < 0)) diff --git a/arch/mips/tx4927/common/tx4927_irq.c b/arch/mips/tx4927/common/tx4927_irq.c index 3d25d01..435048b 100644 --- a/arch/mips/tx4927/common/tx4927_irq.c +++ b/arch/mips/tx4927/common/tx4927_irq.c @@ -105,7 +105,7 @@ static const u32 tx4927_irq_debug_flag = (TX4927_IRQ_NONE #endif /* - * Forwad definitions for all pic's + * Forward definitions for all PICs */ static void tx4927_irq_cp0_enable(unsigned int irq); @@ -115,7 +115,7 @@ static void tx4927_irq_pic_enable(unsigned int irq); static void tx4927_irq_pic_disable(unsigned int irq); /* - * Kernel structs for all pic's + * Kernel structs for all PICs */ #define TX4927_CP0_NAME "TX4927-CP0" diff --git a/arch/mips/tx4938/common/prom.c b/arch/mips/tx4938/common/prom.c index 3189a65..e3f9026 100644 --- a/arch/mips/tx4938/common/prom.c +++ b/arch/mips/tx4938/common/prom.c @@ -104,7 +104,7 @@ tx4938_process_sdccr(u64 * addr) msize = (((rs * cs * mw) / (1024 * 1024)) * (bc)); /* MVMCP -- bc hard coded to 4 from table 9.3.1 */ - /* boad supports bc=2 but no way to detect */ + /* board supports bc=2 but no way to detect */ return (msize); } diff --git a/arch/mips/vr41xx/common/cmu.c b/arch/mips/vr41xx/common/cmu.c index 657c513..7981ffc 100644 --- a/arch/mips/vr41xx/common/cmu.c +++ b/arch/mips/vr41xx/common/cmu.c @@ -3,7 +3,7 @@ * * Copyright (C) 2001-2002 MontaVista Software Inc. * Author: Yoichi Yuasa - * Copuright (C) 2003-2005 Yoichi Yuasa + * Copyright (C) 2003-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by -- 1.5.0.1 -- Simon Arlott From simon@fire.lp0.eu Fri May 11 20:59:29 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 11 May 2007 20:59:31 +0100 (BST) Received: from proxima.lp0.eu ([85.158.45.36]:26811 "EHLO proxima.lp0.eu") by ftp.linux-mips.org with ESMTP id S20021939AbXEKT73 (ORCPT ); Fri, 11 May 2007 20:59:29 +0100 Received: from redrum.lp0.eu ([2001:4b10:1005:0:202:44ff:fe50:91af]:54706 ident=byte) by proxima.lp0.eu with esmtps (TLSv1:AES256-SHA:256) id 1HmbDt-0000j5-OT; Fri, 11 May 2007 20:56:18 +0100 Message-ID: <4644CA60.8080809@simon.arlott.org.uk> Date: Fri, 11 May 2007 20:56:16 +0100 From: Simon Arlott User-Agent: Thunderbird 1.5.0.5 (X11/20060819) MIME-Version: 1.0 To: Simon Arlott CC: Linux Kernel Mailing List , linux-mips@linux-mips.org, trivial@kernel.org Subject: Re: [PATCH] spelling fixes: arch/mips/ References: <4644C721.501@simon.arlott.org.uk> In-Reply-To: <4644C721.501@simon.arlott.org.uk> X-Enigmail-Version: 0.94.1.2 OpenPGP: id=89C93563 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15049 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: simon@fire.lp0.eu Precedence: bulk X-list: linux-mips On 11/05/07 20:42, Simon Arlott wrote: > diff --git a/arch/mips/kernel/semaphore.c b/arch/mips/kernel/semaphore.c > index 1265358..b363604 100644 > --- a/arch/mips/kernel/semaphore.c > +++ b/arch/mips/kernel/semaphore.c > @@ -33,7 +33,7 @@ > * return old_count; > * > * On machines without lld/scd we need a spinlock to make the > manipulation of > - * sem->count and sem->waking atomic. Scalability isn't an issue because > + * sem->count and sem->waking atomic. Scalibility isn't an issue because > * this lock is used on UP only so it's just an empty variable. > */ > static inline int __sem_update_count(struct semaphore *sem, int incr) I thought I'd reverted that mistake... it was correct already, too many "capability" fixes confusing me :/ -- Simon Arlott From anemo@mba.ocn.ne.jp Sat May 12 17:47:07 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 12 May 2007 17:47:10 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:10994 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20022005AbXELQrH (ORCPT ); Sat, 12 May 2007 17:47:07 +0100 Received: from localhost (p2128-ipad02funabasi.chiba.ocn.ne.jp [61.214.22.128]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 9760A8637; Sun, 13 May 2007 01:47:00 +0900 (JST) Date: Sun, 13 May 2007 01:47:13 +0900 (JST) Message-Id: <20070513.014713.74753298.anemo@mba.ocn.ne.jp> To: vagabon.xyz@gmail.com Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, sam@ravnborg.org Subject: Re: [PATCH] MIPS: Run checksyscalls for N32 and O32 ABI From: Atsushi Nemoto In-Reply-To: References: <20070512.005905.26096031.anemo@mba.ocn.ne.jp> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15050 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Fri, 11 May 2007 21:23:55 +0200, "Franck Bui-Huu" wrote: > Well I'm not sure how revelant are the echos... Without the echos, you can get something like this and it seems unlear which ABI should be fixed. CALL /home/git/linux-mips/scripts/checksyscalls.sh ... CALL /home/git/linux-mips/scripts/checksyscalls.sh ... CALL /home/git/linux-mips/scripts/checksyscalls.sh ... > But I still think that (a) you shouldn't put any command in > 'archprepare' multiple rule (b) you should move this rule from the > cleaning targets. Oh, I missed those points. Revised again. Subject: [PATCH] MIPS: Simplify missing-syscalls for N32 and O32 Use standard missing-syscalls with EXTRA_CFLAGS instead of duplicating the command. Suggested by Franck Bui-Huu. Also add "echo" to show the target ABI. Signed-off-by: Atsushi Nemoto --- diff --git a/arch/mips/Makefile b/arch/mips/Makefile index f450066..5aa0f41 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -702,6 +702,19 @@ vmlinux.srec: $(vmlinux-32) CLEAN_FILES += vmlinux.ecoff \ vmlinux.srec +PHONY += arch-missing-syscalls +arch-missing-syscalls: prepare1 +ifdef CONFIG_MIPS32_N32 + @echo ' Checking missing-syscalls for N32' + $(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=n32" +endif +ifdef CONFIG_MIPS32_O32 + @echo ' Checking missing-syscalls for O32' + $(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=32" +endif + +archprepare: arch-missing-syscalls + archclean: @$(MAKE) $(clean)=arch/mips/boot @$(MAKE) $(clean)=arch/mips/lasat @@ -709,25 +722,3 @@ archclean: CLEAN_FILES += vmlinux.32 \ vmlinux.64 \ vmlinux.ecoff - -quiet_cmd_syscalls_n32 = CALL-N32 $< - cmd_syscalls_n32 = $(CONFIG_SHELL) $< $(CC) $(c_flags) -mabi=n32 - -quiet_cmd_syscalls_o32 = CALL-O32 $< - cmd_syscalls_o32 = $(CONFIG_SHELL) $< $(CC) $(c_flags) -mabi=32 - -PHONY += missing-syscalls-n32 missing-syscalls-o32 - -missing-syscalls-n32: scripts/checksyscalls.sh FORCE - $(call cmd,syscalls_n32) - -missing-syscalls-o32: scripts/checksyscalls.sh FORCE - $(call cmd,syscalls_o32) - -archprepare: -ifdef CONFIG_MIPS32_N32 - $(Q)$(MAKE) $(build)=arch/mips missing-syscalls-n32 -endif -ifdef CONFIG_MIPS32_O32 - $(Q)$(MAKE) $(build)=arch/mips missing-syscalls-o32 -endif From sam@ravnborg.org Sat May 12 19:58:32 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 12 May 2007 19:58:35 +0100 (BST) Received: from pasmtpa.tele.dk ([80.160.77.114]:42133 "EHLO pasmtpA.tele.dk") by ftp.linux-mips.org with ESMTP id S20022035AbXELS6c (ORCPT ); Sat, 12 May 2007 19:58:32 +0100 Received: from ravnborg.org (0x535d98d8.vgnxx8.adsl-dhcp.tele.dk [83.93.152.216]) by pasmtpA.tele.dk (Postfix) with ESMTP id 24D43184DF; Sat, 12 May 2007 20:57:58 +0200 (CEST) Received: by ravnborg.org (Postfix, from userid 1000) id E47C0580D2; Sat, 12 May 2007 20:58:54 +0200 (CEST) Date: Sat, 12 May 2007 20:58:54 +0200 From: Sam Ravnborg To: Atsushi Nemoto Cc: vagabon.xyz@gmail.com, linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] MIPS: Run checksyscalls for N32 and O32 ABI Message-ID: <20070512185854.GA8647@uranus.ravnborg.org> References: <20070512.005905.26096031.anemo@mba.ocn.ne.jp> <20070513.014713.74753298.anemo@mba.ocn.ne.jp> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070513.014713.74753298.anemo@mba.ocn.ne.jp> User-Agent: Mutt/1.4.2.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15051 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sam@ravnborg.org Precedence: bulk X-list: linux-mips On Sun, May 13, 2007 at 01:47:13AM +0900, Atsushi Nemoto wrote: > On Fri, 11 May 2007 21:23:55 +0200, "Franck Bui-Huu" wrote: > > Well I'm not sure how revelant are the echos... > > Without the echos, you can get something like this and it seems unlear > which ABI should be fixed. > > CALL /home/git/linux-mips/scripts/checksyscalls.sh > ... > CALL /home/git/linux-mips/scripts/checksyscalls.sh > ... > CALL /home/git/linux-mips/scripts/checksyscalls.sh > ... > > > But I still think that (a) you shouldn't put any command in > > 'archprepare' multiple rule (b) you should move this rule from the > > cleaning targets. > > Oh, I missed those points. Revised again. > > > Subject: [PATCH] MIPS: Simplify missing-syscalls for N32 and O32 This is overengineered. The only reason to make the syscall check for each and every build was that this was easy and the missing syscalls are easy to spot during a normal build. But checking all combinations is just not worth it. The arch responsible are assumed to build for the different architectures once in a while so a missing syscall are likely to be detected anyway. We cannot run each and every consistency check in all combinations for each build - that would end in only build noise. Sam From anemo@mba.ocn.ne.jp Sun May 13 14:51:45 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 13 May 2007 14:51:46 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:60876 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20022603AbXEMNvp (ORCPT ); Sun, 13 May 2007 14:51:45 +0100 Received: from localhost (p2070-ipad03funabasi.chiba.ocn.ne.jp [219.160.82.70]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 7B91EA522; Sun, 13 May 2007 22:51:40 +0900 (JST) Date: Sun, 13 May 2007 22:51:54 +0900 (JST) Message-Id: <20070513.225154.74753893.anemo@mba.ocn.ne.jp> To: sam@ravnborg.org Cc: vagabon.xyz@gmail.com, linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] MIPS: Run checksyscalls for N32 and O32 ABI From: Atsushi Nemoto In-Reply-To: <20070512185854.GA8647@uranus.ravnborg.org> References: <20070513.014713.74753298.anemo@mba.ocn.ne.jp> <20070512185854.GA8647@uranus.ravnborg.org> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15052 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Sat, 12 May 2007 20:58:54 +0200, Sam Ravnborg wrote: > > Subject: [PATCH] MIPS: Simplify missing-syscalls for N32 and O32 > > This is overengineered. The only reason to make the syscall check > for each and every build was that this was easy and the missing syscalls > are easy to spot during a normal build. > But checking all combinations is just not worth it. > The arch responsible are assumed to build for the different architectures > once in a while so a missing syscall are likely to be detected anyway. > > We cannot run each and every consistency check in all combinations > for each build - that would end in only build noise. Well, 64-bit MIPS has three ABIs and each ABI has complete set of syscalls. So a result of default "missing-syscalls" target (which is for N64 ABI) is not useful at all for other two ABIs. I think checking them is worth even if the S/N ratio was quite low. --- Atsushi Nemoto From vagabon.xyz@gmail.com Mon May 14 08:23:09 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 14 May 2007 08:23:11 +0100 (BST) Received: from py-out-1112.google.com ([64.233.166.183]:14709 "EHLO py-out-1112.google.com") by ftp.linux-mips.org with ESMTP id S20022524AbXENHXJ (ORCPT ); Mon, 14 May 2007 08:23:09 +0100 Received: by py-out-1112.google.com with SMTP id u52so1375083pyb for ; Mon, 14 May 2007 00:23:08 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=VCxzNDBGbI0dnB3tIUf5/FkYgdI6U3X40YgVahQzIFo9FnHKjk76eJfaStaO2c8tngYbyopIvSEmma8uBaBjfkN/SGJiwhKj8/yOGAIhFefoEv5k1LixsPZpjoxVTteZkl+B+84AUANCW+5EHk8+PPD5ESmWOOou3xiu8Rwdi10= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=HuHy6PQ03eHVHj1sjBYVPBe76Tc1cuKMb/E+R0W8nk7Uc8VJzlgq3E2iBnc1PtXAC5nszFywZ57JUdj0Elx32PN5xIweBA1aaTU/2F1hDWAEDkS+z27fSp9qMsqSM+pOI8Wa8T3FW/avBPST3S2hjmwUtCgRYop90EmAMWrG+Lc= Received: by 10.64.241.14 with SMTP id o14mr9768662qbh.1179127388425; Mon, 14 May 2007 00:23:08 -0700 (PDT) Received: by 10.65.241.19 with HTTP; Mon, 14 May 2007 00:23:08 -0700 (PDT) Message-ID: Date: Mon, 14 May 2007 09:23:08 +0200 From: "Franck Bui-Huu" To: "Atsushi Nemoto" Subject: Re: [PATCH] MIPS: Run checksyscalls for N32 and O32 ABI Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, sam@ravnborg.org In-Reply-To: <20070513.014713.74753298.anemo@mba.ocn.ne.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20070512.005905.26096031.anemo@mba.ocn.ne.jp> <20070513.014713.74753298.anemo@mba.ocn.ne.jp> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15053 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips Atsushi, On 5/12/07, Atsushi Nemoto wrote: > Signed-off-by: Atsushi Nemoto > --- > diff --git a/arch/mips/Makefile b/arch/mips/Makefile > index f450066..5aa0f41 100644 > --- a/arch/mips/Makefile > +++ b/arch/mips/Makefile > @@ -702,6 +702,19 @@ vmlinux.srec: $(vmlinux-32) > CLEAN_FILES += vmlinux.ecoff \ > vmlinux.srec > > +PHONY += arch-missing-syscalls > +arch-missing-syscalls: prepare1 Why did you add 'prepare1' dependency ? Thanks -- Franck From vagabon.xyz@gmail.com Mon May 14 08:27:33 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 14 May 2007 08:27:35 +0100 (BST) Received: from py-out-1112.google.com ([64.233.166.178]:39302 "EHLO py-out-1112.google.com") by ftp.linux-mips.org with ESMTP id S20022520AbXENH1d (ORCPT ); Mon, 14 May 2007 08:27:33 +0100 Received: by py-out-1112.google.com with SMTP id u52so1375772pyb for ; Mon, 14 May 2007 00:27:32 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=VmQjC06s3H8EtLsiex1Lu3rPeH+zJfx0mhCYfC1p+TqlVTjSXWDD1sHin8/e+5rCnb0XY9dTGvkchTw0XlWgifYV/AjmufaW+poF6DpwST+53UjtdYulrW1boiaIz3OAGR+IK7lTxJ+boo99Ia+p7himldcpyNgtTg6OGA9x5sA= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=ks7MNno5C5hpQ0fIFiPFhGU6EwCEN7w+G2G8mgpvryKRkMNwMzlsVV9CQTKZNC+csJgr86BCBgiGCiukIpoB1DOFynf3B9qT6tkXLVSZcffW5YvyOBuD1fsZNNBXJxS30W7kTqXgQy72n+y1mEf9vNGPneYN4RYOP9idOZg/KK4= Received: by 10.65.220.8 with SMTP id x8mr9734057qbq.1179127652241; Mon, 14 May 2007 00:27:32 -0700 (PDT) Received: by 10.65.241.19 with HTTP; Mon, 14 May 2007 00:27:32 -0700 (PDT) Message-ID: Date: Mon, 14 May 2007 09:27:32 +0200 From: "Franck Bui-Huu" To: "Sam Ravnborg" Subject: Re: [PATCH] MIPS: Run checksyscalls for N32 and O32 ABI Cc: "Atsushi Nemoto" , linux-mips@linux-mips.org, ralf@linux-mips.org In-Reply-To: <20070512185854.GA8647@uranus.ravnborg.org> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20070512.005905.26096031.anemo@mba.ocn.ne.jp> <20070513.014713.74753298.anemo@mba.ocn.ne.jp> <20070512185854.GA8647@uranus.ravnborg.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15054 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips On 5/12/07, Sam Ravnborg wrote: > On Sun, May 13, 2007 at 01:47:13AM +0900, Atsushi Nemoto wrote: > > Subject: [PATCH] MIPS: Simplify missing-syscalls for N32 and O32 > > This is overengineered. The only reason to make the syscall check > for each and every build was that this was easy and the missing syscalls > are easy to spot during a normal build. Well perhaps we shouldn't check for missing syscalls for a normal build. After all, it's going to be used by arch maintainers or kernel developpers once in a while (maybe every releases). So why not make it optional ? $ make CHECK_SYSCALL=1 or $ make check-syscalls > But checking all combinations is just not worth it. > The arch responsible are assumed to build for the different architectures > once in a while so a missing syscall are likely to be detected anyway. > > We cannot run each and every consistency check in all combinations > for each build - that would end in only build noise. > That's not exactly the case, see Atsushi's reply. -- Franck From anemo@mba.ocn.ne.jp Mon May 14 08:47:19 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 14 May 2007 08:47:21 +0100 (BST) Received: from topsns2.toshiba-tops.co.jp ([202.230.225.126]:12354 "EHLO topsns2.toshiba-tops.co.jp") by ftp.linux-mips.org with ESMTP id S20022632AbXENHrT (ORCPT ); Mon, 14 May 2007 08:47:19 +0100 Received: from topsms.toshiba-tops.co.jp by topsns2.toshiba-tops.co.jp via smtpd (for ftp.linux-mips.org [194.74.144.162]) with ESMTP; Mon, 14 May 2007 16:47:18 +0900 Received: from topsms.toshiba-tops.co.jp (localhost.localdomain [127.0.0.1]) by localhost.toshiba-tops.co.jp (Postfix) with ESMTP id 4D9A54209F; Mon, 14 May 2007 16:46:51 +0900 (JST) Received: from srd2sd.toshiba-tops.co.jp (srd2sd.toshiba-tops.co.jp [172.17.28.2]) by topsms.toshiba-tops.co.jp (Postfix) with ESMTP id 396B62170F; Mon, 14 May 2007 16:46:51 +0900 (JST) Received: from localhost (fragile [172.17.28.65]) by srd2sd.toshiba-tops.co.jp (8.12.10/8.12.10) with ESMTP id l4E7koW0098743; Mon, 14 May 2007 16:46:50 +0900 (JST) (envelope-from anemo@mba.ocn.ne.jp) Date: Mon, 14 May 2007 16:46:50 +0900 (JST) Message-Id: <20070514.164650.126759873.nemoto@toshiba-tops.co.jp> To: vagabon.xyz@gmail.com Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, sam@ravnborg.org Subject: Re: [PATCH] MIPS: Run checksyscalls for N32 and O32 ABI From: Atsushi Nemoto In-Reply-To: References: <20070513.014713.74753298.anemo@mba.ocn.ne.jp> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15055 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Mon, 14 May 2007 09:23:08 +0200, "Franck Bui-Huu" wrote: > > +arch-missing-syscalls: prepare1 > > Why did you add 'prepare1' dependency ? Without that, fresh build will fail because missing-syscalls target requires include/asm, etc. --- Atsushi Nemoto From vagabon.xyz@gmail.com Mon May 14 08:55:02 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 14 May 2007 08:55:04 +0100 (BST) Received: from py-out-1112.google.com ([64.233.166.176]:45783 "EHLO py-out-1112.google.com") by ftp.linux-mips.org with ESMTP id S20022639AbXENHzC (ORCPT ); Mon, 14 May 2007 08:55:02 +0100 Received: by py-out-1112.google.com with SMTP id u52so1380685pyb for ; Mon, 14 May 2007 00:55:01 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=b4HU3aiKXEhUWwEpowd5HfH49QsqDlKVW5qbw/4RciwkOfqeqTk1Lyn81E34GjeHiIzkDq9FaIPnSX36yv1mgTapTmuetiq9pMIhHq7a7pLEIzR2t2aHxrSCGkiOFBtnMD3UsqINOImK+Q148eg5VzsazmYCFguifEHQaKIkXgc= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=tPub4Tu6FBPb8y5jZRj7Xs7lmQCZ3LpsD7T+CHHjal34+bIFJPIw9M1T2rB/L2dLFpezDuLvfNF84w0dXcgrkHz1H3Rq5gC84BCgNlKfQfDXrN+xBqhDqFHEOZ/flWh5Z6VsPcf24jB/DnCUkLbzQFNXeAuxjoioRYm3bCxBhIk= Received: by 10.65.248.19 with SMTP id a19mr9768430qbs.1179129301373; Mon, 14 May 2007 00:55:01 -0700 (PDT) Received: by 10.65.241.19 with HTTP; Mon, 14 May 2007 00:55:01 -0700 (PDT) Message-ID: Date: Mon, 14 May 2007 09:55:01 +0200 From: "Franck Bui-Huu" To: "Atsushi Nemoto" Subject: Re: [PATCH] MIPS: Run checksyscalls for N32 and O32 ABI Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, sam@ravnborg.org In-Reply-To: <20070514.164650.126759873.nemoto@toshiba-tops.co.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20070513.014713.74753298.anemo@mba.ocn.ne.jp> <20070514.164650.126759873.nemoto@toshiba-tops.co.jp> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15056 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips On 5/14/07, Atsushi Nemoto wrote: > On Mon, 14 May 2007 09:23:08 +0200, "Franck Bui-Huu" wrote: > > > +arch-missing-syscalls: prepare1 > > > > Why did you add 'prepare1' dependency ? > > Without that, fresh build will fail because missing-syscalls target > requires include/asm, etc. > yes but from top makefile, we already have this depedency: $ grep archprepare: Makefile archprepare: prepare1 scripts_basic -- Franck From anemo@mba.ocn.ne.jp Mon May 14 09:07:22 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 14 May 2007 09:07:26 +0100 (BST) Received: from topsns2.toshiba-tops.co.jp ([202.230.225.126]:2701 "EHLO topsns2.toshiba-tops.co.jp") by ftp.linux-mips.org with ESMTP id S20022668AbXENIHW (ORCPT ); Mon, 14 May 2007 09:07:22 +0100 Received: from topsms.toshiba-tops.co.jp by topsns2.toshiba-tops.co.jp via smtpd (for ftp.linux-mips.org [194.74.144.162]) with ESMTP; Mon, 14 May 2007 17:07:21 +0900 Received: from topsms.toshiba-tops.co.jp (localhost.localdomain [127.0.0.1]) by localhost.toshiba-tops.co.jp (Postfix) with ESMTP id 5F35342170; Mon, 14 May 2007 17:07:19 +0900 (JST) Received: from srd2sd.toshiba-tops.co.jp (srd2sd.toshiba-tops.co.jp [172.17.28.2]) by topsms.toshiba-tops.co.jp (Postfix) with ESMTP id 52C69204C3; Mon, 14 May 2007 17:07:19 +0900 (JST) Received: from localhost (fragile [172.17.28.65]) by srd2sd.toshiba-tops.co.jp (8.12.10/8.12.10) with ESMTP id l4E87GW0098805; Mon, 14 May 2007 17:07:18 +0900 (JST) (envelope-from anemo@mba.ocn.ne.jp) Date: Mon, 14 May 2007 17:07:16 +0900 (JST) Message-Id: <20070514.170716.18313509.nemoto@toshiba-tops.co.jp> To: vagabon.xyz@gmail.com Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, sam@ravnborg.org Subject: Re: [PATCH] MIPS: Run checksyscalls for N32 and O32 ABI From: Atsushi Nemoto In-Reply-To: References: <20070514.164650.126759873.nemoto@toshiba-tops.co.jp> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15057 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Mon, 14 May 2007 09:55:01 +0200, "Franck Bui-Huu" wrote: > > Without that, fresh build will fail because missing-syscalls target > > requires include/asm, etc. > > yes but from top makefile, we already have this depedency: > > $ grep archprepare: Makefile > archprepare: prepare1 scripts_basic Yes, and arch Makefile is included _before_ the line. So "make" will try to build arch-missing-syscalls before prepare1. We must tell "make" to build prepare1 _before_ arch-missing-syscalls. --- Atsushi Nemoto From vagabon.xyz@gmail.com Mon May 14 11:33:56 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 14 May 2007 11:33:58 +0100 (BST) Received: from nz-out-0506.google.com ([64.233.162.234]:21637 "EHLO nz-out-0506.google.com") by ftp.linux-mips.org with ESMTP id S20022599AbXENKd4 (ORCPT ); Mon, 14 May 2007 11:33:56 +0100 Received: by nz-out-0506.google.com with SMTP id z3so955922nzf for ; Mon, 14 May 2007 03:32:52 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=IV7Hmdu+o9xVj2SNR037TLJ7ExLEIMb7qK//Gfd3ecqNmCNa8KCoFzJwCKgicrRquUg0F9sMkcQH4185adnda5parZuIF18oT/4cR7sMM6t1f4jyr+lK2gsKg1a28J8mwuMhdUEMdcOTp3fEmcQcj1RKEIrczXFxBBPuR+FV/IQ= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=ZqbHU/AKSK5/SbwlJ2o2y+Plh1TQFBeW0dVjsDOSOY1dzfUU7lnA/ic3SUpgw9+gpCdB5uu7g0KTnR272vUDcrGzVLOD76mhQWa+lWVGDKIm46AWIZu4IZ1/GXQwD7yC1d1rvLoY+/z+8s6bHeSvKTDki8ujOyQ0CkKbv13idfI= Received: by 10.65.97.18 with SMTP id z18mr20106qbl.1179138771963; Mon, 14 May 2007 03:32:51 -0700 (PDT) Received: by 10.65.241.19 with HTTP; Mon, 14 May 2007 03:32:51 -0700 (PDT) Message-ID: Date: Mon, 14 May 2007 12:32:51 +0200 From: "Franck Bui-Huu" To: "Atsushi Nemoto" Subject: Re: [PATCH] MIPS: Run checksyscalls for N32 and O32 ABI Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, sam@ravnborg.org In-Reply-To: <20070514.170716.18313509.nemoto@toshiba-tops.co.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20070514.164650.126759873.nemoto@toshiba-tops.co.jp> <20070514.170716.18313509.nemoto@toshiba-tops.co.jp> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15058 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips On 5/14/07, Atsushi Nemoto wrote: > On Mon, 14 May 2007 09:55:01 +0200, "Franck Bui-Huu" wrote: > > > Without that, fresh build will fail because missing-syscalls target > > > requires include/asm, etc. > > > > yes but from top makefile, we already have this depedency: > > > > $ grep archprepare: Makefile > > archprepare: prepare1 scripts_basic > > Yes, and arch Makefile is included _before_ the line. So "make" will > try to build arch-missing-syscalls before prepare1. > hmm okay. But this depedency is not really nice IMHO... Something weird is that if you do this on top of your patch, it seems to work: diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 5aa0f41..04a57f9 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -713,7 +713,7 @@ ifdef CONFIG_MIPS32_O32 $(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=32" endif -archprepare: arch-missing-syscalls +prepare0: arch-missing-syscalls archclean: @$(MAKE) $(clean)=arch/mips/boot It seems that we can't rely on the order of the execution of megerd prerequisites... -- Franck From vagabon.xyz@gmail.com Mon May 14 11:42:46 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 14 May 2007 11:42:50 +0100 (BST) Received: from py-out-1112.google.com ([64.233.166.182]:46845 "EHLO py-out-1112.google.com") by ftp.linux-mips.org with ESMTP id S20023020AbXENKmq (ORCPT ); Mon, 14 May 2007 11:42:46 +0100 Received: by py-out-1112.google.com with SMTP id u52so1413747pyb for ; Mon, 14 May 2007 03:42:45 -0700 (PDT) DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=QHIwxqj5KCzcwBEc3ZLnWEj4FhbnmXiwObCnCEkM7NrSpmTinVBeNKZMyt4zaqLz700BN4mnJr6qWWCLQcj17DWNnZAeHjt4BamlBgVAdvXqiR1lfgtauIbv/jDZRhPEsvSotjQwAdcOn8XB1iK4PibwsR2tUKUgbGim5pZhP24= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=pCfsmMc7lfGkw0tTXuCkw9ANB/+Jb4bKOYfDNdmavbBqKy7EUKBwqhWLh3vtnf+AHXCs/gup0y/6Y02wyFr1VlQRxx8daExGuIBuw2WTUvFrgI+hjjK8zsQwwXkLDyng4VhuCAeUcgYQmd+jIDjpTUBLH+rpOZBM4b70BroBN98= Received: by 10.64.184.16 with SMTP id h16mr10082825qbf.1179139364968; Mon, 14 May 2007 03:42:44 -0700 (PDT) Received: by 10.65.241.19 with HTTP; Mon, 14 May 2007 03:42:44 -0700 (PDT) Message-ID: Date: Mon, 14 May 2007 12:42:44 +0200 From: "Franck Bui-Huu" To: "Atsushi Nemoto" Subject: Re: [PATCH] MIPS: Run checksyscalls for N32 and O32 ABI Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, sam@ravnborg.org In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20070514.164650.126759873.nemoto@toshiba-tops.co.jp> <20070514.170716.18313509.nemoto@toshiba-tops.co.jp> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15059 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips On 5/14/07, Franck Bui-Huu wrote: > diff --git a/arch/mips/Makefile b/arch/mips/Makefile > index 5aa0f41..04a57f9 100644 > --- a/arch/mips/Makefile > +++ b/arch/mips/Makefile > @@ -713,7 +713,7 @@ ifdef CONFIG_MIPS32_O32 > $(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=32" > endif > > -archprepare: arch-missing-syscalls > +prepare0: arch-missing-syscalls > > archclean: > @$(MAKE) $(clean)=arch/mips/boot > of course with "prepare"1 prerequisite has been removed too: diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 5aa0f41..151a44c 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -703,7 +703,7 @@ CLEAN_FILES += vmlinux.ecoff \ vmlinux.srec PHONY += arch-missing-syscalls -arch-missing-syscalls: prepare1 +arch-missing-syscalls: ifdef CONFIG_MIPS32_N32 @echo ' Checking missing-syscalls for N32' $(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=n32" @@ -713,7 +713,7 @@ ifdef CONFIG_MIPS32_O32 $(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=32" endif -archprepare: arch-missing-syscalls +prepare0: arch-missing-syscalls archclean: @$(MAKE) $(clean)=arch/mips/boot -- Franck From anemo@mba.ocn.ne.jp Mon May 14 14:29:47 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 14 May 2007 14:29:50 +0100 (BST) Received: from mba.ocn.ne.jp ([122.1.175.29]:20711 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S20023032AbXENN3r (ORCPT ); Mon, 14 May 2007 14:29:47 +0100 Received: from localhost (p6091-ipad25funabasi.chiba.ocn.ne.jp [220.104.84.91]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id E1B09A549; Mon, 14 May 2007 22:29:39 +0900 (JST) Date: Mon, 14 May 2007 22:29:54 +0900 (JST) Message-Id: <20070514.222954.69026129.anemo@mba.ocn.ne.jp> To: vagabon.xyz@gmail.com Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, sam@ravnborg.org Subject: Re: [PATCH] MIPS: Run checksyscalls for N32 and O32 ABI From: Atsushi Nemoto In-Reply-To: References: <20070514.170716.18313509.nemoto@toshiba-tops.co.jp> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 5.2 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15060 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Mon, 14 May 2007 12:32:51 +0200, "Franck Bui-Huu" wrote: > It seems that we can't rely on the order of the execution of megerd > prerequisites... Hmm, alphabetical order or something? Anyway, adding the prerequisite for arch-missing-syscalls should work though it seems a bit ugly. --- Atsushi Nemoto From ralf@linux-mips.org Tue May 15 13:50:00 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 15 May 2007 13:50:04 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:35733 "EHLO dl5rb.ham-radio-op.net") by ftp.linux-mips.org with ESMTP id S20022307AbXEOMuA (ORCPT ); Tue, 15 May 2007 13:50:00 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by dl5rb.ham-radio-op.net (8.13.8/8.13.8) with ESMTP id l4FCnpvb022475 for ; Tue, 15 May 2007 13:49:52 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.13.8/8.13.8/Submit) id l4FCnpqL022474 for linux-mips@linux-mips.org; Tue, 15 May 2007 14:49:51 +0200 Date: Tue, 15 May 2007 14:49:51 +0200 From: Ralf Baechle To: linux-mips@linux-mips.org Subject: Alchemy MMC driver maintenance. Message-ID: <20070515124951.GB22404@linux-mips.org> Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit User-Agent: Mutt/1.4.2.2i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15061 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Any takers? ----- Forwarded message from Pierre Ossman ----- From: Pierre Ossman Date: Mon, 14 May 2007 21:38:49 +0200 To: LKML CC: Nicolas FERRE , Andrew Victor , Ralf Baechle , Manuel Lauss , Yoichi Yuasa , Pavel Pisa , Sascha Hauer , Russell King , Tony Lindgren , David Brownell , "Juha Yrjölä" , Carlos Aguiar , "Briglia >> \"Anderson F. Briglia\"" , Kyungmin Park , "Khasim, Syed" Subject: [RFC] Orphaning MMC host drivers Content-Type: multipart/mixed; boundary="=_hera.drzeus.cx-25460-1179171560-0001-2" I've reached the point where I've grown tired of trying to figure out who has hardware for what. I intend to commit the following in a few days so if you care about the quality of the drivers it's time to step up to the plate. There's a rather long list of cc here, but I've included everyone that has been involved in the drivers in one way or another in case one or two maintainers can actually be found. Even if you don't feel like maintaining this, feel free to suggest mailing lists that should be added to the entries. Rgds -- -- Pierre Ossman Linux kernel, MMC maintainer http://www.kernel.org PulseAudio, core developer http://pulseaudio.org rdesktop, core developer http://www.rdesktop.org commit 11c3d5e4b871fc69d72f67811d4eb6bfd7084c43 Author: Pierre Ossman Date: Mon May 14 21:25:26 2007 +0200 mmc: mark unmaintained drivers Most of the host controller drivers in the MMC layer lacks an official maintainer. Make sure this is mentioned in MAINTAINERS in case someone wants to pick up the ball. Signed-off-by: Pierre Ossman diff --git a/MAINTAINERS b/MAINTAINERS index 68a56ad..8f1b60c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -346,6 +346,9 @@ P: Ivan Kokshaysky M: ink@jurassic.park.msu.ru S: Maintained for 2.4; PCI support for 2.6. +AMD AU1XX0 MMC DRIVER +S: Orphan + AMD GEODE PROCESSOR/CHIPSET SUPPORT P: Jordan Crouse M: info-linux@geode.amd.com @@ -418,6 +421,9 @@ P: Ian Molton M: spyro@f2s.com S: Maintained +ARM PRIMECELL MMCI PL180/1 DRIVER +S: Orphan + ARM/ADI ROADRUNNER MACHINE SUPPORT P: Lennert Buytenhek M: kernel@wantstofly.org @@ -649,6 +655,9 @@ L: linux-atm-general@lists.sourceforge.net (subscribers-only) W: http://linux-atm.sourceforge.net S: Maintained +ATMEL AT91 MCI DRIVER +S: Orphan + ATMEL MACB ETHERNET DRIVER P: Haavard Skinnemoen M: hskinnemoen@atmel.com @@ -2382,6 +2391,9 @@ M: stelian@popies.net W: http://popies.net/meye/ S: Maintained +MOTOROLA I.MX MMCI DRIVER +S: Orphan + MOUSE AND MISC DEVICES [GENERAL] P: Alessandro Rubini M: rubini@ipvvis.unipv.it @@ -2902,6 +2914,9 @@ M: nico@cam.org L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) S: Maintained +PXA MMCI DRIVER +S: Orphan + QLOGIC QLA2XXX FC-SCSI DRIVER P: Andrew Vasquez M: linux-driver@qlogic.com @@ -3417,6 +3432,9 @@ P: Alex Dubov M: oakad@yahoo.com S: Maintained +TI OMAP MMC INTERFACE DRIVER +S: Orphan + TI OMAP RANDOM NUMBER GENERATOR SUPPORT P: Deepak Saxena M: dsaxena@plexity.net ----- End forwarded message ----- Ralf From khali@linux-fr.org Tue May 15 15:44:27 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 15 May 2007 15:44:30 +0100 (BST) Received: from smtp-102-tuesday.noc.nerim.net ([62.4.17.102]:38665 "EHLO mallaury.nerim.net") by ftp.linux-mips.org with ESMTP id S20022429AbXEOOo1 (ORCPT ); Tue, 15 May 2007 15:44:27 +0100 Received: from hyperion.delvare (jdelvare.pck.nerim.net [62.212.121.182]) by mallaury.nerim.net (Postfix) with ESMTP id 3D9CF4F3F7; Tue, 15 May 2007 16:43:46 +0200 (CEST) Date: Tue, 15 May 2007 16:44:49 +0200 From: Jean Delvare To: Manuel Lauss Cc: i2c@lm-sensors.org, linux-mips@linux-mips.org Subject: Re: [i2c] [PATCH] Convert Au1550 I2C adapter driver to platform_driver Message-ID: <20070515164449.690bb2e1@hyperion.delvare> In-Reply-To: <20070511093837.GA15959@roarinelk.homelinux.net> References: <20070511093837.GA15959@roarinelk.homelinux.net> X-Mailer: Sylpheed-Claws 2.5.5 (GTK+ 2.10.6; x86_64-suse-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15062 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: khali@linux-fr.org Precedence: bulk X-list: linux-mips Hi Manuel, On Fri, 11 May 2007 11:38:37 +0200, Manuel Lauss wrote: > Hi everyone, > > I was chasing a bug which set the RTC minute register on my > board to "2" every time the I2C layer probed for it, and > while I was at it converted the driver to a platform_driver. > > Run-tested on Au1200, compile tested only db/pb1200/pb1550, > patch is against 2.6.21 Thanks for working on this, this is very much appreciated. However, if you fixed a bug, I will ask you for two separate patches, one fixing the bug, which I could push upstream right now, and one converting the driver to a platform driver, which I would queue up for 2.6.23. > > Thanks, > Manuel Lauss > > --- > > Convert Au1550 I2C adapter driver to platform_driver > > - Convert the Au1550 I2C adapter driver to platform device > - Fix bus corruption wrt. to the SMBUS_QUICK probe > feature (driver would not send a I2C stop and subsequent > probes overwrote the minute register in my board's RTC) > - add a corresponding platform_device registration to > arch/mips/au1000/common/platform.c > - update the au1xxx_psc header file for the new driver > > > arch/mips/au1000/common/platform.c | 22 + > drivers/i2c/busses/i2c-au1550.c | 400 +++++++++++++----------------- > drivers/i2c/busses/i2c-au1550.h | 32 -- > include/asm-mips/mach-au1x00/au1xxx_psc.h | 18 - > 4 files changed, 212 insertions(+), 260 deletions(-) > > > Signed-off-by: Manuel Lauss > > > diff -Naurp linux-2.6.21/arch/mips/au1000/common/platform.c linux-2.6.21-aui2c/arch/mips/au1000/common/platform.c > --- linux-2.6.21/arch/mips/au1000/common/platform.c 2007-04-26 05:08:32.000000000 +0200 > +++ linux-2.6.21-aui2c/arch/mips/au1000/common/platform.c 2007-05-11 11:53:10.247681000 +0200 > @@ -14,6 +14,7 @@ > #include > > #include > +#include > > /* OHCI (USB full speed host controller) */ > static struct resource au1xxx_usb_ohci_resources[] = { > @@ -270,6 +271,24 @@ static struct platform_device smc91x_dev > > #endif > > +/* All Alchemy demoboards with I2C have this #define in their headers */ > +#ifdef SMBUS_PSC_BASE > +static struct resource pbdb_smbus_resources[] = { > + { > + .start = SMBUS_PSC_BASE, > + .end = SMBUS_PSC_BASE + 0x24, This looks wrong. Shouldn't it be "SMBUS_PSC_BASE + 0x24 - 1"? > + .flags = IORESOURCE_MEM, > + }, > +}; > + > +static struct platform_device pbdb_smbus_device = { > + .name = "au1xpsc_smbus", > + .id = 0, > + .num_resources = ARRAY_SIZE(pbdb_smbus_resources), > + .resource = pbdb_smbus_resources, > +}; > +#endif > + > static struct platform_device *au1xxx_platform_devices[] __initdata = { > &au1xxx_usb_ohci_device, > &au1x00_pcmcia_device, > @@ -287,6 +306,9 @@ static struct platform_device *au1xxx_pl > #ifdef CONFIG_MIPS_DB1200 > &smc91x_device, > #endif > +#ifdef SMBUS_PSC_BASE > + &pbdb_smbus_device, > +#endif > }; > > int au1xxx_platform_init(void) > diff -Naurp linux-2.6.21/drivers/i2c/busses/i2c-au1550.c linux-2.6.21-aui2c/drivers/i2c/busses/i2c-au1550.c > --- linux-2.6.21/drivers/i2c/busses/i2c-au1550.c 2007-05-11 07:30:42.629430000 +0200 > +++ linux-2.6.21-aui2c/drivers/i2c/busses/i2c-au1550.c 2007-05-11 11:39:13.817681000 +0200 > @@ -4,9 +4,9 @@ > * > * 2.6 port by Matt Porter > * > - * The documentation describes this as an SMBus controller, but it doesn't > - * understand any of the SMBus protocol in hardware. It's really an I2C > - * controller that could emulate most of the SMBus in software. > + * The documentation describes this as an SMBus controller, but it > + * doesn't understand any of the SMBus protocol in hardware. It's really > + * an I2C controller that could emulate most of the SMBus in software. This paragraph reformatting doesn't look particularly useful, please revert it. > * > * This is just a skeleton adapter to use with the Au1550 PSC > * algorithm. It was developed for the Pb1550, but will work with > @@ -33,29 +33,29 @@ > #include > #include > #include > +#include > > #include > #include > > -#include "i2c-au1550.h" > +struct i2c_au1550_data { > + u32 psc_base; > + int xfer_timeout; > + int ack_timeout; > + struct i2c_adapter adap; > +}; > > -static int > -wait_xfer_done(struct i2c_au1550_data *adap) > +static int wait_xfer_done(struct i2c_au1550_data *adap) Please don't change the function header style that way. Both styles are accepted, some prefer one and some prefer the other. Your patch should concentrate on actual changes. > { > - u32 stat; > + u32 stat, base = adap->psc_base; > int i; > - volatile psc_smb_t *sp; > - > - sp = (volatile psc_smb_t *)(adap->psc_base); > > - /* Wait for Tx FIFO Underflow. > - */ > + /* Wait for Tx FIFO Underflow. */ > for (i = 0; i < adap->xfer_timeout; i++) { > - stat = sp->psc_smbevnt; > - au_sync(); > + stat = au_readl(base + PSC_SMBEVNT); > if ((stat & PSC_SMBEVNT_TU) != 0) { > /* Clear it. */ > - sp->psc_smbevnt = PSC_SMBEVNT_TU; > + au_writel(PSC_SMBEVNT_TU, base + PSC_SMBEVNT); > au_sync(); > return 0; > } > @@ -65,40 +65,28 @@ wait_xfer_done(struct i2c_au1550_data *a > return -ETIMEDOUT; > } > > -static int > -wait_ack(struct i2c_au1550_data *adap) > +static int wait_ack(struct i2c_au1550_data *adap) > { > - u32 stat; > - volatile psc_smb_t *sp; > + u32 stat, base = adap->psc_base; > > if (wait_xfer_done(adap)) > return -ETIMEDOUT; > > - sp = (volatile psc_smb_t *)(adap->psc_base); > - > - stat = sp->psc_smbevnt; > - au_sync(); > - > - if ((stat & (PSC_SMBEVNT_DN | PSC_SMBEVNT_AN | PSC_SMBEVNT_AL)) != 0) > + stat = au_readl(base + PSC_SMBEVNT); > + if (stat & (PSC_SMBEVNT_DN | PSC_SMBEVNT_AN | PSC_SMBEVNT_AL)) > return -ETIMEDOUT; > > return 0; > } > > -static int > -wait_master_done(struct i2c_au1550_data *adap) > +static int wait_master_done(struct i2c_au1550_data *adap) > { > - u32 stat; > - int i; > - volatile psc_smb_t *sp; > - > - sp = (volatile psc_smb_t *)(adap->psc_base); > + u32 stat, base = adap->psc_base; > + int i; > > - /* Wait for Master Done. > - */ > + /* Wait for Master Done. */ > for (i = 0; i < adap->xfer_timeout; i++) { > - stat = sp->psc_smbevnt; > - au_sync(); > + stat = au_readl(base + PSC_SMBEVNT); > if ((stat & PSC_SMBEVNT_MD) != 0) > return 0; > udelay(1); > @@ -107,86 +95,67 @@ wait_master_done(struct i2c_au1550_data > return -ETIMEDOUT; > } > > -static int > -do_address(struct i2c_au1550_data *adap, unsigned int addr, int rd) > +static int do_address(struct i2c_au1550_data *adap, unsigned int addr, > + int rd) > { > - volatile psc_smb_t *sp; > - u32 stat; > - > - sp = (volatile psc_smb_t *)(adap->psc_base); > + u32 stat, base = adap->psc_base; > > - /* Reset the FIFOs, clear events. > - */ > - stat = sp->psc_smbstat; > - sp->psc_smbevnt = PSC_SMBEVNT_ALLCLR; > + /* Reset the FIFOs, clear events. */ > + stat = au_readl(base + PSC_SMBSTAT); > + au_writel(PSC_SMBEVNT_ALLCLR, base + PSC_SMBEVNT); > au_sync(); > - > if (!(stat & PSC_SMBSTAT_TE) || !(stat & PSC_SMBSTAT_RE)) { > - sp->psc_smbpcr = PSC_SMBPCR_DC; > + au_writel(PSC_SMBPCR_DC, base + PSC_SMBPCR); > au_sync(); > - do { > - stat = sp->psc_smbpcr; > - au_sync(); > - } while ((stat & PSC_SMBPCR_DC) != 0); > + while (au_readl(base + PSC_SMBPCR) & PSC_SMBPCR_DC) > + msleep(0); > udelay(50); > } > > - /* Write out the i2c chip address and specify operation > - */ > + /* Write out the i2c chip address and specify operation */ > addr <<= 1; > if (rd) > addr |= 1; > > - /* Put byte into fifo, start up master. > - */ > - sp->psc_smbtxrx = addr; > + /* Put byte into fifo, start up master. */ > + au_writel(addr, base + PSC_SMBTXRX); > au_sync(); > - sp->psc_smbpcr = PSC_SMBPCR_MS; > + au_writel(PSC_SMBPCR_MS, base + PSC_SMBPCR); > au_sync(); > - if (wait_ack(adap)) > - return -EIO; > - return 0; > + > + return wait_ack(adap) ? -EIO : 0; > } > > -static u32 > -wait_for_rx_byte(struct i2c_au1550_data *adap, u32 *ret_data) > +static u32 wait_for_rx_byte(struct i2c_au1550_data *adap, u32 *ret_data) > { > - int j; > - u32 data, stat; > - volatile psc_smb_t *sp; > + u32 stat, base = adap->psc_base; > + int j; > > if (wait_xfer_done(adap)) > return -EIO; > > - sp = (volatile psc_smb_t *)(adap->psc_base); > - > j = adap->xfer_timeout * 100; > do { > j--; > if (j <= 0) > return -EIO; > > - stat = sp->psc_smbstat; > - au_sync(); > + stat = au_readl(base + PSC_SMBSTAT); > if ((stat & PSC_SMBSTAT_RE) == 0) > j = 0; > else > udelay(1); > } while (j > 0); > - data = sp->psc_smbtxrx; > - au_sync(); > - *ret_data = data; > > + *ret_data = au_readl(base + PSC_SMBTXRX); > return 0; > } > > -static int > -i2c_read(struct i2c_au1550_data *adap, unsigned char *buf, > +static int i2c_read(struct i2c_au1550_data *adap, unsigned char *buf, > unsigned int len) > { > - int i; > - u32 data; > - volatile psc_smb_t *sp; > + u32 data, base = adap->psc_base; > + int i; > > if (len == 0) > return 0; > @@ -196,11 +165,9 @@ i2c_read(struct i2c_au1550_data *adap, u > * receive fifo, then reading the bytes. > */ > > - sp = (volatile psc_smb_t *)(adap->psc_base); > - > i = 0; > while (i < (len-1)) { > - sp->psc_smbtxrx = 0; > + au_writel(0, base + PSC_SMBTXRX); > au_sync(); > if (wait_for_rx_byte(adap, &data)) > return -EIO; > @@ -209,80 +176,72 @@ i2c_read(struct i2c_au1550_data *adap, u > i++; > } > > - /* The last byte has to indicate transfer done. > - */ > - sp->psc_smbtxrx = PSC_SMBTXRX_STP; > + /* The last byte has to indicate transfer done. */ > + au_writel(PSC_SMBTXRX_STP, base + PSC_SMBTXRX); > au_sync(); > if (wait_master_done(adap)) > return -EIO; > > - data = sp->psc_smbtxrx; > - au_sync(); > - buf[i] = data; > + buf[i] = au_readl(base + PSC_SMBTXRX); > return 0; > } > > -static int > -i2c_write(struct i2c_au1550_data *adap, unsigned char *buf, > +static int i2c_write(struct i2c_au1550_data *adap, unsigned char *buf, > unsigned int len) > { > - int i; > - u32 data; > - volatile psc_smb_t *sp; > + u32 base = adap->psc_base; > + int i; > > if (len == 0) > return 0; > > - sp = (volatile psc_smb_t *)(adap->psc_base); > - > i = 0; > while (i < (len-1)) { > - data = buf[i]; > - sp->psc_smbtxrx = data; > + au_writel(buf[i], base + PSC_SMBTXRX); > au_sync(); > if (wait_ack(adap)) > return -EIO; > i++; > } > > - /* The last byte has to indicate transfer done. > - */ > - data = buf[i]; > - data |= PSC_SMBTXRX_STP; > - sp->psc_smbtxrx = data; > - au_sync(); > + /* The last byte has to indicate transfer done. */ > + au_writel(buf[i] | PSC_SMBTXRX_STP, base + PSC_SMBTXRX); > if (wait_master_done(adap)) > return -EIO; > return 0; > } > > -static int > -au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num) > +static int au1550_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, > + int num) > { > - struct i2c_au1550_data *adap = i2c_adap->algo_data; > + struct i2c_au1550_data *priv = adap->algo_data; > struct i2c_msg *p; > - int i, err = 0; > + int i, err; > > + err = 0; > for (i = 0; !err && i < num; i++) { > p = &msgs[i]; > - err = do_address(adap, p->addr, p->flags & I2C_M_RD); > - if (err || !p->len) > - continue; > + err = do_address(priv, p->addr, p->flags & I2C_M_RD); > + if (err || !p->len) { > + /* do a I2C stop so the probing stuff does not > + * change the time in by boards' RTC! --mlau > + */ > + au_writel(PSC_SMBTXRX_STP, > + priv->psc_base + PSC_SMBTXRX); > + au_sync(); > + wait_master_done(priv); > + break; > + } > if (p->flags & I2C_M_RD) > - err = i2c_read(adap, p->buf, p->len); > + err = i2c_read(priv, p->buf, p->len); > else > - err = i2c_write(adap, p->buf, p->len); > + err = i2c_write(priv, p->buf, p->len); > } > > - /* Return the number of messages processed, or the error code. > - */ > - if (err == 0) > - err = num; > - return err; > + return err ? err : num; > } > > -static u32 > -au1550_func(struct i2c_adapter *adap) > +static u32 au1550_func(struct i2c_adapter *adap) > { > return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; > } > @@ -292,146 +251,153 @@ static const struct i2c_algorithm au1550 > .functionality = au1550_func, > }; > > -/* > - * registering functions to load algorithms at runtime > +/* registering functions to load algorithms at runtime > * Prior to calling us, the 50MHz clock frequency and routing > * must have been set up for the PSC indicated by the adapter. > */ > -int > -i2c_au1550_add_bus(struct i2c_adapter *i2c_adap) > +static int i2c_au1550_probe(struct platform_device *pdev) > { > - struct i2c_au1550_data *adap = i2c_adap->algo_data; > - volatile psc_smb_t *sp; > - u32 stat; > - > - i2c_adap->algo = &au1550_algo; > - > - /* Now, set up the PSC for SMBus PIO mode. > - */ > - sp = (volatile psc_smb_t *)(adap->psc_base); > - sp->psc_ctrl = PSC_CTRL_DISABLE; > + struct i2c_au1550_data *priv; > + struct resource *r; > + u32 base, cfg; > + int ret; > + > + ret = -ENODEV; > + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); > + if (!r) > + goto out; > + base = r->start; > + > + priv = kzalloc(sizeof(struct i2c_au1550_data), GFP_KERNEL); > + if (!priv) > + goto out; > + > + priv->psc_base = base; > + priv->xfer_timeout = 200; > + priv->ack_timeout = 200; > + > + priv->adap.id = I2C_HW_AU1550_PSC, > + priv->adap.algo = &au1550_algo; > + priv->adap.algo_data = priv; > + priv->adap.dev.parent = &pdev->dev; > + strcpy(priv->adap.name, "Au1550 PSC I2C"); > + > + /* Now, set up the PSC for SMBus PIO mode. */ > + au_writel(PSC_CTRL_DISABLE, base + PSC_CTRL_OFFSET); > au_sync(); > - sp->psc_sel = PSC_SEL_PS_SMBUSMODE; > - sp->psc_smbcfg = 0; > + au_writel(PSC_SEL_PS_SMBUSMODE, base + PSC_SEL_OFFSET); > + au_writel(0, base + PSC_SMBCFG); > au_sync(); > - sp->psc_ctrl = PSC_CTRL_ENABLE; > + au_writel(PSC_CTRL_ENABLE, base + PSC_CTRL_OFFSET); > au_sync(); > - do { > - stat = sp->psc_smbstat; > + while (!(au_readl(base + PSC_SMBSTAT) & PSC_SMBSTAT_SR)) > au_sync(); > - } while ((stat & PSC_SMBSTAT_SR) == 0); > > - sp->psc_smbcfg = (PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 | > - PSC_SMBCFG_DD_DISABLE); > + cfg = PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 | > + PSC_SMBCFG_DD_DISABLE; > + > + au_writel(PSC_SMBMSK_ALLMASK, base + PSC_SMBMSK); > > - /* Divide by 8 to get a 6.25 MHz clock. The later protocol > - * timings are based on this clock. > + /* Divide by 8 to get a 6.25 MHz clock. The protocol timings > + * below are based on this clock. (96MHz AUXPLL assumed!) > */ > - sp->psc_smbcfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV8); > - sp->psc_smbmsk = PSC_SMBMSK_ALLMASK; > + cfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV8); > + au_writel(cfg, base + PSC_SMBCFG); > au_sync(); > > /* Set the protocol timer values. See Table 71 in the > * Au1550 Data Book for standard timing values. > */ > - sp->psc_smbtmr = PSC_SMBTMR_SET_TH(0) | PSC_SMBTMR_SET_PS(15) | \ > - PSC_SMBTMR_SET_PU(15) | PSC_SMBTMR_SET_SH(15) | \ > - PSC_SMBTMR_SET_SU(15) | PSC_SMBTMR_SET_CL(15) | \ > - PSC_SMBTMR_SET_CH(15); > + au_writel(PSC_SMBTMR_SET_TH(0) | PSC_SMBTMR_SET_PS(15) | \ > + PSC_SMBTMR_SET_PU(15) | PSC_SMBTMR_SET_SH(15) | \ > + PSC_SMBTMR_SET_SU(15) | PSC_SMBTMR_SET_CL(15) | \ > + PSC_SMBTMR_SET_CH(15), base + PSC_SMBTMR); > au_sync(); > > - sp->psc_smbcfg |= PSC_SMBCFG_DE_ENABLE; > - do { > - stat = sp->psc_smbstat; > + cfg |= PSC_SMBCFG_DE_ENABLE; > + au_writel(cfg, base + PSC_SMBCFG); > + au_sync(); > + > + while (!(au_readl(base + PSC_SMBSTAT) & PSC_SMBSTAT_DR)) > au_sync(); > - } while ((stat & PSC_SMBSTAT_DR) == 0); > > - return i2c_add_adapter(i2c_adap); > -} > + ret = i2c_add_adapter(&priv->adap); > + if (ret == 0) { > + platform_set_drvdata(pdev, priv); > + return 0; > + } > > + au_writel(0, base + PSC_SMBCFG); > + au_writel(PSC_CTRL_DISABLE, base + PSC_CTRL_OFFSET); > + au_sync(); > > -int > -i2c_au1550_del_bus(struct i2c_adapter *adap) > -{ > - return i2c_del_adapter(adap); > + kfree(priv); > +out: return ret; > } > > -static int > -pb1550_reg(struct i2c_client *client) > +static int i2c_au1550_remove(struct platform_device *pdev) > { > - return 0; > + struct i2c_au1550_data *priv = platform_get_drvdata(pdev); > + u32 base; > + > + if (priv) { > + platform_set_drvdata(pdev, NULL); > + base = priv->psc_base; > + i2c_del_adapter(&priv->adap); > + au_writel(0, base + PSC_SMBCFG); > + au_writel(PSC_CTRL_DISABLE, base + PSC_CTRL_OFFSET); > + au_sync(); > + kfree(priv); > + } > + return 0; > } > > -static int > -pb1550_unreg(struct i2c_client *client) > +static int i2c_au1550_suspend(struct platform_device *pdev, > + pm_message_t state) > { > + struct i2c_au1550_data *priv = platform_get_drvdata(pdev); > + u32 base = priv->psc_base; > + > + au_writel(PSC_CTRL_SUSPEND, base + PSC_CTRL_OFFSET); > + au_sync(); > return 0; > } > > -static struct i2c_au1550_data pb1550_i2c_info = { > - SMBUS_PSC_BASE, 200, 200 > -}; > - > -static struct i2c_adapter pb1550_board_adapter = { > - name: "pb1550 adapter", > - id: I2C_HW_AU1550_PSC, > - algo: NULL, > - algo_data: &pb1550_i2c_info, > - client_register: pb1550_reg, > - client_unregister: pb1550_unreg, > -}; > - > -/* BIG hack to support the control interface on the Wolfson WM8731 > - * audio codec on the Pb1550 board. We get an address and two data > - * bytes to write, create an i2c message, and send it across the > - * i2c transfer function. We do this here because we have access to > - * the i2c adapter structure. > - */ > -static struct i2c_msg wm_i2c_msg; /* We don't want this stuff on the stack */ > -static u8 i2cbuf[2]; > - > -int > -pb1550_wm_codec_write(u8 addr, u8 reg, u8 val) > +static int i2c_au1550_resume(struct platform_device *pdev) > { > - wm_i2c_msg.addr = addr; > - wm_i2c_msg.flags = 0; > - wm_i2c_msg.buf = i2cbuf; > - wm_i2c_msg.len = 2; > - i2cbuf[0] = reg; > - i2cbuf[1] = val; > + struct i2c_au1550_data *priv = platform_get_drvdata(pdev); > + u32 base = priv->psc_base; > > - return pb1550_board_adapter.algo->master_xfer(&pb1550_board_adapter, &wm_i2c_msg, 1); > + au_writel(PSC_CTRL_ENABLE, base + PSC_CTRL_OFFSET); > + au_sync(); > + while (!(au_readl(base + PSC_SMBSTAT) & PSC_SMBSTAT_SR)) > + au_sync(); > + return 0; > } > > -static int __init > -i2c_au1550_init(void) > -{ > - printk(KERN_INFO "Au1550 I2C: "); > - > - /* This is where we would set up a 50MHz clock source > - * and routing. On the Pb1550, the SMBus is PSC2, which > - * uses a shared clock with USB. This has been already > - * configured by Yamon as a 48MHz clock, close enough > - * for our work. > - */ > - if (i2c_au1550_add_bus(&pb1550_board_adapter) < 0) { > - printk("failed to initialize.\n"); > - return -ENODEV; > - } > +static struct platform_driver au1xpsc_smbus_driver = { > + .driver = { > + .name = "au1xpsc_smbus", > + .owner = THIS_MODULE, > + }, > + .probe = i2c_au1550_probe, > + .remove = __devexit_p(i2c_au1550_remove), > + .suspend = i2c_au1550_suspend, > + .resume = i2c_au1550_resume, > +}; > > - printk("initialized.\n"); > - return 0; > +static int __init i2c_au1550_init(void) > +{ > + return platform_driver_register(&au1xpsc_smbus_driver); > } > > -static void __exit > -i2c_au1550_exit(void) > +static void __exit i2c_au1550_exit(void) > { > - i2c_au1550_del_bus(&pb1550_board_adapter); > + platform_driver_unregister(&au1xpsc_smbus_driver); > } > +module_init(i2c_au1550_init); > +module_exit(i2c_au1550_exit); > > MODULE_AUTHOR("Dan Malek, Embedded Edge, LLC."); > MODULE_DESCRIPTION("SMBus adapter Alchemy pb1550"); > MODULE_LICENSE("GPL"); > - > -module_init (i2c_au1550_init); > -module_exit (i2c_au1550_exit); Here again, moving these doesn't help and just makes the patch bigger. Please revert these style changes, and I'll give a deeper review to the updated patch. > diff -Naurp linux-2.6.21/drivers/i2c/busses/i2c-au1550.h linux-2.6.21-aui2c/drivers/i2c/busses/i2c-au1550.h > --- linux-2.6.21/drivers/i2c/busses/i2c-au1550.h 2007-04-26 05:08:32.000000000 +0200 > +++ linux-2.6.21-aui2c/drivers/i2c/busses/i2c-au1550.h 1970-01-01 01:00:00.000000000 +0100 > @@ -1,32 +0,0 @@ > -/* > - * Copyright (C) 2004 Embedded Edge, LLC > - * 2.6 port by Matt Porter > - * > - * This program is free software; you can redistribute it and/or modify > - * it under the terms of the GNU General Public License as published by > - * the Free Software Foundation; either version 2 of the License, or > - * (at your option) any later version. > - * > - * This program is distributed in the hope that it will be useful, > - * but WITHOUT ANY WARRANTY; without even the implied warranty of > - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > - * GNU General Public License for more details. > - * > - * You should have received a copy of the GNU General Public License > - * along with this program; if not, write to the Free Software > - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. > - */ > - > -#ifndef I2C_AU1550_H > -#define I2C_AU1550_H > - > -struct i2c_au1550_data { > - u32 psc_base; > - int xfer_timeout; > - int ack_timeout; > -}; > - > -int i2c_au1550_add_bus(struct i2c_adapter *); > -int i2c_au1550_del_bus(struct i2c_adapter *); > - > -#endif /* I2C_AU1550_H */ > diff -Naurp linux-2.6.21/include/asm-mips/mach-au1x00/au1xxx_psc.h linux-2.6.21-aui2c/include/asm-mips/mach-au1x00/au1xxx_psc.h > --- linux-2.6.21/include/asm-mips/mach-au1x00/au1xxx_psc.h 2007-04-26 05:08:32.000000000 +0200 > +++ linux-2.6.21-aui2c/include/asm-mips/mach-au1x00/au1xxx_psc.h 2007-05-11 11:39:13.827681000 +0200 > @@ -412,17 +412,13 @@ typedef struct psc_spi { > > /* PSC in SMBus (I2C) Mode. > */ > -typedef struct psc_smb { > - u32 psc_sel; > - u32 psc_ctrl; > - u32 psc_smbcfg; > - u32 psc_smbmsk; > - u32 psc_smbpcr; > - u32 psc_smbstat; > - u32 psc_smbevnt; > - u32 psc_smbtxrx; > - u32 psc_smbtmr; > -} psc_smb_t; > +#define PSC_SMBCFG 0x08 > +#define PSC_SMBMSK 0x0C > +#define PSC_SMBPCR 0x10 > +#define PSC_SMBSTAT 0x14 > +#define PSC_SMBEVNT 0x18 > +#define PSC_SMBTXRX 0x1C > +#define PSC_SMBTMR 0x20 > > /* SMBus Config Register. > */ Thanks, -- Jean Delvare From mano@roarinelk.homelinux.net Tue May 15 19:07:13 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 15 May 2007 19:07:15 +0100 (BST) Received: from fnoeppeil48.netpark.at ([217.175.205.176]:10515 "EHLO roarinelk.homelinux.net") by ftp.linux-mips.org with ESMTP id S20022467AbXEOSHN (ORCPT ); Tue, 15 May 2007 19:07:13 +0100 Received: (qmail 10027 invoked by uid 1000); 15 May 2007 20:07:12 +0200 Date: Tue, 15 May 2007 20:07:12 +0200 From: Manuel Lauss To: i2c@lm-sensors.org, linux-mips@linux-mips.org Cc: khali@linux-fr.org Subject: [PATCH 1/2] i2c-au1550: prevent unwanted writes Message-ID: <20070515180712.GA9506@roarinelk.homelinux.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.11 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15063 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mano@roarinelk.homelinux.net Precedence: bulk X-list: linux-mips When the au1550 i2c driver addresses a nonexistant slave or does smbus quick detection it returns to the upper layers without sending a proper i2c stop condition. This resulted in the minute register of the RTC on my board to be overwritten with a random value on a following transfer. Fix the driver to send a stop over the i2c bus after receiving a NACK and probing for slaves. Signed-off-by: Manuel Lauss --- a/drivers/i2c/busses/i2c-au1550.c 2007-04-26 05:08:32.000000000 +0200 +++ b/drivers/i2c/busses/i2c-au1550.c 2007-05-15 18:49:30.000000000 +0200 @@ -260,14 +260,18 @@ static int au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num) { struct i2c_au1550_data *adap = i2c_adap->algo_data; + volatile psc_smb_t *sp = (volatile psc_smb_t *)(adap->psc_base); struct i2c_msg *p; int i, err = 0; for (i = 0; !err && i < num; i++) { p = &msgs[i]; err = do_address(adap, p->addr, p->flags & I2C_M_RD); - if (err || !p->len) + if (err || !p->len) { + sp->psc_smbtxrx = PSC_SMBTXRX_STP; + wait_master_done(adap); continue; + } if (p->flags & I2C_M_RD) err = i2c_read(adap, p->buf, p->len); else From mano@roarinelk.homelinux.net Tue May 15 19:09:22 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 15 May 2007 19:09:24 +0100 (BST) Received: from fnoeppeil48.netpark.at ([217.175.205.176]:26379 "EHLO roarinelk.homelinux.net") by ftp.linux-mips.org with ESMTP id S20022473AbXEOSJW (ORCPT ); Tue, 15 May 2007 19:09:22 +0100 Received: (qmail 10041 invoked by uid 1000); 15 May 2007 20:09:20 +0200 Date: Tue, 15 May 2007 20:09:20 +0200 From: Manuel Lauss To: i2c@lm-sensors.org, linux-mips@linux-mips.org Cc: khali@linux-fr.org Subject: [PATCH 2/2] i2c-au1550: convert to platform driver Message-ID: <20070515180920.GB9506@roarinelk.homelinux.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.11 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15064 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mano@roarinelk.homelinux.net Precedence: bulk X-list: linux-mips Convert the i2c-au1550 driver to platform driver. * Convert the core i2c-au1550 driver to platform_driver. * register the platform device for boards which previously defined the i2c psc base address in their headers. * update au1x psc header for the new driver style. arch/mips/au1000/common/platform.c | 22 ++ drivers/i2c/busses/i2c-au1550.c | 319 ++++++++++++++---------------- drivers/i2c/busses/i2c-au1550.h | 32 --- include/asm-mips/mach-au1x00/au1xxx_psc.h | 18 - 4 files changed, 183 insertions(+), 208 deletions(-) Signed-off-by: Manuel Lauss diff --git a/arch/mips/au1000/common/platform.c b/arch/mips/au1000/common/platform.c index 8fd203d..852f3e3 100644 --- a/arch/mips/au1000/common/platform.c +++ b/arch/mips/au1000/common/platform.c @@ -14,6 +14,7 @@ #include #include +#include /* OHCI (USB full speed host controller) */ static struct resource au1xxx_usb_ohci_resources[] = { @@ -270,6 +271,24 @@ static struct platform_device smc91x_device = { #endif +/* All Alchemy demoboards with I2C have this #define in their headers */ +#ifdef SMBUS_PSC_BASE +static struct resource pbdb_smbus_resources[] = { + { + .start = SMBUS_PSC_BASE, + .end = SMBUS_PSC_BASE + 0x24 - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device pbdb_smbus_device = { + .name = "au1xpsc_smbus", + .id = 0, + .num_resources = ARRAY_SIZE(pbdb_smbus_resources), + .resource = pbdb_smbus_resources, +}; +#endif + static struct platform_device *au1xxx_platform_devices[] __initdata = { &au1xxx_usb_ohci_device, &au1x00_pcmcia_device, @@ -287,6 +306,9 @@ static struct platform_device *au1xxx_platform_devices[] __initdata = { #ifdef CONFIG_MIPS_DB1200 &smc91x_device, #endif +#ifdef SMBUS_PSC_BASE + &pbdb_smbus_device, +#endif }; int au1xxx_platform_init(void) diff --git a/drivers/i2c/busses/i2c-au1550.c b/drivers/i2c/busses/i2c-au1550.c index d7e7c35..2b3dcaf 100644 --- a/drivers/i2c/busses/i2c-au1550.c +++ b/drivers/i2c/busses/i2c-au1550.c @@ -33,29 +33,31 @@ #include #include #include +#include #include #include -#include "i2c-au1550.h" +struct i2c_au1550_data { + u32 psc_base; + int xfer_timeout; + int ack_timeout; + struct i2c_adapter adap; +}; static int wait_xfer_done(struct i2c_au1550_data *adap) { - u32 stat; + u32 stat, base = adap->psc_base; int i; - volatile psc_smb_t *sp; - - sp = (volatile psc_smb_t *)(adap->psc_base); /* Wait for Tx FIFO Underflow. */ for (i = 0; i < adap->xfer_timeout; i++) { - stat = sp->psc_smbevnt; - au_sync(); + stat = au_readl(base + PSC_SMBEVNT); if ((stat & PSC_SMBEVNT_TU) != 0) { /* Clear it. */ - sp->psc_smbevnt = PSC_SMBEVNT_TU; + au_writel(PSC_SMBEVNT_TU, base + PSC_SMBEVNT); au_sync(); return 0; } @@ -68,18 +70,13 @@ wait_xfer_done(struct i2c_au1550_data *adap) static int wait_ack(struct i2c_au1550_data *adap) { - u32 stat; - volatile psc_smb_t *sp; + u32 stat, base = adap->psc_base; if (wait_xfer_done(adap)) return -ETIMEDOUT; - sp = (volatile psc_smb_t *)(adap->psc_base); - - stat = sp->psc_smbevnt; - au_sync(); - - if ((stat & (PSC_SMBEVNT_DN | PSC_SMBEVNT_AN | PSC_SMBEVNT_AL)) != 0) + stat = au_readl(base + PSC_SMBEVNT); + if (stat & (PSC_SMBEVNT_DN | PSC_SMBEVNT_AN | PSC_SMBEVNT_AL)) return -ETIMEDOUT; return 0; @@ -88,17 +85,13 @@ wait_ack(struct i2c_au1550_data *adap) static int wait_master_done(struct i2c_au1550_data *adap) { - u32 stat; - int i; - volatile psc_smb_t *sp; - - sp = (volatile psc_smb_t *)(adap->psc_base); + u32 stat, base = adap->psc_base; + int i; /* Wait for Master Done. */ for (i = 0; i < adap->xfer_timeout; i++) { - stat = sp->psc_smbevnt; - au_sync(); + stat = au_readl(base + PSC_SMBEVNT); if ((stat & PSC_SMBEVNT_MD) != 0) return 0; udelay(1); @@ -110,24 +103,18 @@ wait_master_done(struct i2c_au1550_data *adap) static int do_address(struct i2c_au1550_data *adap, unsigned int addr, int rd) { - volatile psc_smb_t *sp; - u32 stat; - - sp = (volatile psc_smb_t *)(adap->psc_base); + u32 stat, base = adap->psc_base; /* Reset the FIFOs, clear events. */ - stat = sp->psc_smbstat; - sp->psc_smbevnt = PSC_SMBEVNT_ALLCLR; + stat = au_readl(base + PSC_SMBSTAT); + au_writel(PSC_SMBEVNT_ALLCLR, base + PSC_SMBEVNT); au_sync(); - if (!(stat & PSC_SMBSTAT_TE) || !(stat & PSC_SMBSTAT_RE)) { - sp->psc_smbpcr = PSC_SMBPCR_DC; + au_writel(PSC_SMBPCR_DC, base + PSC_SMBPCR); au_sync(); - do { - stat = sp->psc_smbpcr; - au_sync(); - } while ((stat & PSC_SMBPCR_DC) != 0); + while (au_readl(base + PSC_SMBPCR) & PSC_SMBPCR_DC) + msleep(0); udelay(50); } @@ -139,44 +126,37 @@ do_address(struct i2c_au1550_data *adap, unsigned int addr, int rd) /* Put byte into fifo, start up master. */ - sp->psc_smbtxrx = addr; + au_writel(addr, base + PSC_SMBTXRX); au_sync(); - sp->psc_smbpcr = PSC_SMBPCR_MS; + au_writel(PSC_SMBPCR_MS, base + PSC_SMBPCR); au_sync(); - if (wait_ack(adap)) - return -EIO; - return 0; + + return wait_ack(adap) ? -EIO : 0; } static u32 wait_for_rx_byte(struct i2c_au1550_data *adap, u32 *ret_data) { - int j; - u32 data, stat; - volatile psc_smb_t *sp; + u32 stat, base = adap->psc_base; + int j; if (wait_xfer_done(adap)) return -EIO; - sp = (volatile psc_smb_t *)(adap->psc_base); - j = adap->xfer_timeout * 100; do { j--; if (j <= 0) return -EIO; - stat = sp->psc_smbstat; - au_sync(); + stat = au_readl(base + PSC_SMBSTAT); if ((stat & PSC_SMBSTAT_RE) == 0) j = 0; else udelay(1); } while (j > 0); - data = sp->psc_smbtxrx; - au_sync(); - *ret_data = data; + *ret_data = au_readl(base + PSC_SMBTXRX); return 0; } @@ -184,9 +164,8 @@ static int i2c_read(struct i2c_au1550_data *adap, unsigned char *buf, unsigned int len) { - int i; - u32 data; - volatile psc_smb_t *sp; + u32 data, base = adap->psc_base; + int i; if (len == 0) return 0; @@ -196,11 +175,9 @@ i2c_read(struct i2c_au1550_data *adap, unsigned char *buf, * receive fifo, then reading the bytes. */ - sp = (volatile psc_smb_t *)(adap->psc_base); - i = 0; while (i < (len-1)) { - sp->psc_smbtxrx = 0; + au_writel(0, base + PSC_SMBTXRX); au_sync(); if (wait_for_rx_byte(adap, &data)) return -EIO; @@ -211,14 +188,12 @@ i2c_read(struct i2c_au1550_data *adap, unsigned char *buf, /* The last byte has to indicate transfer done. */ - sp->psc_smbtxrx = PSC_SMBTXRX_STP; + au_writel(PSC_SMBTXRX_STP, base + PSC_SMBTXRX); au_sync(); if (wait_master_done(adap)) return -EIO; - data = sp->psc_smbtxrx; - au_sync(); - buf[i] = data; + buf[i] = au_readl(base + PSC_SMBTXRX); return 0; } @@ -226,19 +201,15 @@ static int i2c_write(struct i2c_au1550_data *adap, unsigned char *buf, unsigned int len) { - int i; - u32 data; - volatile psc_smb_t *sp; + u32 base = adap->psc_base; + int i; if (len == 0) return 0; - sp = (volatile psc_smb_t *)(adap->psc_base); - i = 0; while (i < (len-1)) { - data = buf[i]; - sp->psc_smbtxrx = data; + au_writel(buf[i], base + PSC_SMBTXRX); au_sync(); if (wait_ack(adap)) return -EIO; @@ -247,10 +218,7 @@ i2c_write(struct i2c_au1550_data *adap, unsigned char *buf, /* The last byte has to indicate transfer done. */ - data = buf[i]; - data |= PSC_SMBTXRX_STP; - sp->psc_smbtxrx = data; - au_sync(); + au_writel(buf[i] | PSC_SMBTXRX_STP, base + PSC_SMBTXRX); if (wait_master_done(adap)) return -EIO; return 0; @@ -259,19 +227,25 @@ i2c_write(struct i2c_au1550_data *adap, unsigned char *buf, static int au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num) { - struct i2c_au1550_data *adap = i2c_adap->algo_data; + struct i2c_au1550_data *priv = i2c_adap->algo_data; struct i2c_msg *p; - int i, err = 0; + int i, err; + err = 0; for (i = 0; !err && i < num; i++) { p = &msgs[i]; - err = do_address(adap, p->addr, p->flags & I2C_M_RD); - if (err || !p->len) - continue; + err = do_address(priv, p->addr, p->flags & I2C_M_RD); + if (err || !p->len) { + au_writel(PSC_SMBTXRX_STP, + priv->psc_base + PSC_SMBTXRX); + au_sync(); + wait_master_done(priv); + break; + } if (p->flags & I2C_M_RD) - err = i2c_read(adap, p->buf, p->len); + err = i2c_read(priv, p->buf, p->len); else - err = i2c_write(adap, p->buf, p->len); + err = i2c_write(priv, p->buf, p->len); } /* Return the number of messages processed, or the error code. @@ -297,141 +271,156 @@ static const struct i2c_algorithm au1550_algo = { * Prior to calling us, the 50MHz clock frequency and routing * must have been set up for the PSC indicated by the adapter. */ -int -i2c_au1550_add_bus(struct i2c_adapter *i2c_adap) +static int +i2c_au1550_probe(struct platform_device *pdev) { - struct i2c_au1550_data *adap = i2c_adap->algo_data; - volatile psc_smb_t *sp; - u32 stat; - - i2c_adap->algo = &au1550_algo; + struct i2c_au1550_data *priv; + struct resource *r; + u32 base, cfg; + int ret; + + ret = -ENODEV; + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!r) + goto out; + base = r->start; + + priv = kzalloc(sizeof(struct i2c_au1550_data), GFP_KERNEL); + if (!priv) + goto out; + + priv->psc_base = base; + priv->xfer_timeout = 200; + priv->ack_timeout = 200; + + priv->adap.id = I2C_HW_AU1550_PSC, + priv->adap.algo = &au1550_algo; + priv->adap.algo_data = priv; + priv->adap.dev.parent = &pdev->dev; + strcpy(priv->adap.name, "Au1550 PSC I2C"); /* Now, set up the PSC for SMBus PIO mode. */ - sp = (volatile psc_smb_t *)(adap->psc_base); - sp->psc_ctrl = PSC_CTRL_DISABLE; + au_writel(PSC_CTRL_DISABLE, base + PSC_CTRL_OFFSET); au_sync(); - sp->psc_sel = PSC_SEL_PS_SMBUSMODE; - sp->psc_smbcfg = 0; + au_writel(PSC_SEL_PS_SMBUSMODE, base + PSC_SEL_OFFSET); + au_writel(0, base + PSC_SMBCFG); au_sync(); - sp->psc_ctrl = PSC_CTRL_ENABLE; + au_writel(PSC_CTRL_ENABLE, base + PSC_CTRL_OFFSET); au_sync(); - do { - stat = sp->psc_smbstat; + while (!(au_readl(base + PSC_SMBSTAT) & PSC_SMBSTAT_SR)) au_sync(); - } while ((stat & PSC_SMBSTAT_SR) == 0); - sp->psc_smbcfg = (PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 | - PSC_SMBCFG_DD_DISABLE); + cfg = PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 | + PSC_SMBCFG_DD_DISABLE; + + au_writel(PSC_SMBMSK_ALLMASK, base + PSC_SMBMSK); - /* Divide by 8 to get a 6.25 MHz clock. The later protocol - * timings are based on this clock. + /* Divide by 8 to get a 6.25 MHz clock. The protocol timings + * below are based on this clock. (96MHz AUXPLL assumed!) */ - sp->psc_smbcfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV8); - sp->psc_smbmsk = PSC_SMBMSK_ALLMASK; + cfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV8); + au_writel(cfg, base + PSC_SMBCFG); au_sync(); /* Set the protocol timer values. See Table 71 in the * Au1550 Data Book for standard timing values. */ - sp->psc_smbtmr = PSC_SMBTMR_SET_TH(0) | PSC_SMBTMR_SET_PS(15) | \ - PSC_SMBTMR_SET_PU(15) | PSC_SMBTMR_SET_SH(15) | \ - PSC_SMBTMR_SET_SU(15) | PSC_SMBTMR_SET_CL(15) | \ - PSC_SMBTMR_SET_CH(15); + au_writel(PSC_SMBTMR_SET_TH(0) | PSC_SMBTMR_SET_PS(15) | \ + PSC_SMBTMR_SET_PU(15) | PSC_SMBTMR_SET_SH(15) | \ + PSC_SMBTMR_SET_SU(15) | PSC_SMBTMR_SET_CL(15) | \ + PSC_SMBTMR_SET_CH(15), base + PSC_SMBTMR); au_sync(); - sp->psc_smbcfg |= PSC_SMBCFG_DE_ENABLE; - do { - stat = sp->psc_smbstat; + cfg |= PSC_SMBCFG_DE_ENABLE; + au_writel(cfg, base + PSC_SMBCFG); + au_sync(); + + while (!(au_readl(base + PSC_SMBSTAT) & PSC_SMBSTAT_DR)) au_sync(); - } while ((stat & PSC_SMBSTAT_DR) == 0); - return i2c_add_adapter(i2c_adap); -} + ret = i2c_add_adapter(&priv->adap); + if (ret == 0) { + platform_set_drvdata(pdev, priv); + return 0; + } + au_writel(0, base + PSC_SMBCFG); + au_writel(PSC_CTRL_DISABLE, base + PSC_CTRL_OFFSET); + au_sync(); -int -i2c_au1550_del_bus(struct i2c_adapter *adap) + kfree(priv); +out: return ret; +} + +static int +i2c_au1550_remove(struct platform_device *pdev) { - return i2c_del_adapter(adap); + struct i2c_au1550_data *priv = platform_get_drvdata(pdev); + u32 base; + + if (priv) { + platform_set_drvdata(pdev, NULL); + base = priv->psc_base; + i2c_del_adapter(&priv->adap); + au_writel(0, base + PSC_SMBCFG); + au_writel(PSC_CTRL_DISABLE, base + PSC_CTRL_OFFSET); + au_sync(); + kfree(priv); + } + return 0; } static int -pb1550_reg(struct i2c_client *client) +i2c_au1550_suspend(struct platform_device *pdev, pm_message_t state) { + struct i2c_au1550_data *priv = platform_get_drvdata(pdev); + u32 base = priv->psc_base; + + au_writel(PSC_CTRL_SUSPEND, base + PSC_CTRL_OFFSET); + au_sync(); return 0; } static int -pb1550_unreg(struct i2c_client *client) +i2c_au1550_resume(struct platform_device *pdev) { + struct i2c_au1550_data *priv = platform_get_drvdata(pdev); + u32 base = priv->psc_base; + + au_writel(PSC_CTRL_ENABLE, base + PSC_CTRL_OFFSET); + au_sync(); + while (!(au_readl(base + PSC_SMBSTAT) & PSC_SMBSTAT_SR)) + au_sync(); return 0; } -static struct i2c_au1550_data pb1550_i2c_info = { - SMBUS_PSC_BASE, 200, 200 -}; - -static struct i2c_adapter pb1550_board_adapter = { - name: "pb1550 adapter", - id: I2C_HW_AU1550_PSC, - algo: NULL, - algo_data: &pb1550_i2c_info, - client_register: pb1550_reg, - client_unregister: pb1550_unreg, +static struct platform_driver au1xpsc_smbus_driver = { + .driver = { + .name = "au1xpsc_smbus", + .owner = THIS_MODULE, + }, + .probe = i2c_au1550_probe, + .remove = __devexit_p(i2c_au1550_remove), + .suspend = i2c_au1550_suspend, + .resume = i2c_au1550_resume, }; -/* BIG hack to support the control interface on the Wolfson WM8731 - * audio codec on the Pb1550 board. We get an address and two data - * bytes to write, create an i2c message, and send it across the - * i2c transfer function. We do this here because we have access to - * the i2c adapter structure. - */ -static struct i2c_msg wm_i2c_msg; /* We don't want this stuff on the stack */ -static u8 i2cbuf[2]; - -int -pb1550_wm_codec_write(u8 addr, u8 reg, u8 val) -{ - wm_i2c_msg.addr = addr; - wm_i2c_msg.flags = 0; - wm_i2c_msg.buf = i2cbuf; - wm_i2c_msg.len = 2; - i2cbuf[0] = reg; - i2cbuf[1] = val; - - return pb1550_board_adapter.algo->master_xfer(&pb1550_board_adapter, &wm_i2c_msg, 1); -} - static int __init i2c_au1550_init(void) { - printk(KERN_INFO "Au1550 I2C: "); - - /* This is where we would set up a 50MHz clock source - * and routing. On the Pb1550, the SMBus is PSC2, which - * uses a shared clock with USB. This has been already - * configured by Yamon as a 48MHz clock, close enough - * for our work. - */ - if (i2c_au1550_add_bus(&pb1550_board_adapter) < 0) { - printk("failed to initialize.\n"); - return -ENODEV; - } - - printk("initialized.\n"); - return 0; + return platform_driver_register(&au1xpsc_smbus_driver); } static void __exit i2c_au1550_exit(void) { - i2c_au1550_del_bus(&pb1550_board_adapter); + platform_driver_unregister(&au1xpsc_smbus_driver); } MODULE_AUTHOR("Dan Malek, Embedded Edge, LLC."); MODULE_DESCRIPTION("SMBus adapter Alchemy pb1550"); MODULE_LICENSE("GPL"); -module_init (i2c_au1550_init); -module_exit (i2c_au1550_exit); +module_init(i2c_au1550_init); +module_exit(i2c_au1550_exit); diff --git a/drivers/i2c/busses/i2c-au1550.h b/drivers/i2c/busses/i2c-au1550.h deleted file mode 100644 index fce15d1..0000000 --- a/drivers/i2c/busses/i2c-au1550.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (C) 2004 Embedded Edge, LLC - * 2.6 port by Matt Porter - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef I2C_AU1550_H -#define I2C_AU1550_H - -struct i2c_au1550_data { - u32 psc_base; - int xfer_timeout; - int ack_timeout; -}; - -int i2c_au1550_add_bus(struct i2c_adapter *); -int i2c_au1550_del_bus(struct i2c_adapter *); - -#endif /* I2C_AU1550_H */ diff --git a/include/asm-mips/mach-au1x00/au1xxx_psc.h b/include/asm-mips/mach-au1x00/au1xxx_psc.h index 1bd4e27..d80aa25 100644 --- a/include/asm-mips/mach-au1x00/au1xxx_psc.h +++ b/include/asm-mips/mach-au1x00/au1xxx_psc.h @@ -412,17 +412,13 @@ typedef struct psc_spi { /* PSC in SMBus (I2C) Mode. */ -typedef struct psc_smb { - u32 psc_sel; - u32 psc_ctrl; - u32 psc_smbcfg; - u32 psc_smbmsk; - u32 psc_smbpcr; - u32 psc_smbstat; - u32 psc_smbevnt; - u32 psc_smbtxrx; - u32 psc_smbtmr; -} psc_smb_t; +#define PSC_SMBCFG 0x08 +#define PSC_SMBMSK 0x0C +#define PSC_SMBPCR 0x10 +#define PSC_SMBSTAT 0x14 +#define PSC_SMBEVNT 0x18 +#define PSC_SMBTXRX 0x1C +#define PSC_SMBTMR 0x20 /* SMBus Config Register. */ From mano@roarinelk.homelinux.net Tue May 15 19:28:14 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 15 May 2007 19:28:16 +0100 (BST) Received: from fnoeppeil48.netpark.at ([217.175.205.176]:44559 "EHLO roarinelk.homelinux.net") by ftp.linux-mips.org with ESMTP id S20022487AbXEOS2O (ORCPT ); Tue, 15 May 2007 19:28:14 +0100 Received: (qmail 10134 invoked by uid 1000); 15 May 2007 20:27:14 +0200 Date: Tue, 15 May 2007 20:27:13 +0200 From: Manuel Lauss To: i2c@lm-sensors.org, linux-mips@linux-mips.org Cc: khali@linux-fr.org Subject: Re: [PATCH 2/2] i2c-au1550: convert to platform driver Message-ID: <20070515182713.GC9506@roarinelk.homelinux.net> References: <20070515180920.GB9506@roarinelk.homelinux.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070515180920.GB9506@roarinelk.homelinux.net> User-Agent: Mutt/1.5.11 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15065 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mano@roarinelk.homelinux.net Precedence: bulk X-list: linux-mips Scrap those 2 patches, I just noticed I introduced a change in behaviour with multiple messages. Updates follow. Thanks, Manuel Lauss From mano@roarinelk.homelinux.net Wed May 16 06:32:16 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 16 May 2007 06:32:18 +0100 (BST) Received: from fnoeppeil48.netpark.at ([217.175.205.176]:60172 "EHLO roarinelk.homelinux.net") by ftp.linux-mips.org with ESMTP id S20022095AbXEPFcQ (ORCPT ); Wed, 16 May 2007 06:32:16 +0100 Received: (qmail 13028 invoked by uid 1000); 16 May 2007 07:31:13 +0200 Date: Wed, 16 May 2007 07:31:13 +0200 From: Manuel Lauss To: i2c@lm-sensors.org Cc: linux-mips@linux-mips.org, khali@linux-fr.org Subject: [PATCH 1/2] i2c-au1550: send i2c stop on error #2 Message-ID: <20070516053113.GA12986@roarinelk.homelinux.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.11 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15066 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mano@roarinelk.homelinux.net Precedence: bulk X-list: linux-mips When the au1550 i2c driver encounteres an error while addressing a slave or has no data to send to a slave in the last i2c message, it returns to the upper layers without issuing a i2c stop condition. This for example resulted in the minute register of the RTC on my board to be overwritten with a random value on a following transfer. Fix the driver to send a stop over the i2c bus if one of the following 2 conditions are met: * error when addressing a slave * no data to send in the last i2c message Signed-off-by: Manuel Lauss --- a/drivers/i2c/busses/i2c-au1550.c 2007-04-26 05:08:32.000000000 +0200 +++ b/drivers/i2c/busses/i2c-au1550.c 2007-05-15 20:19:56.000000000 +0200 @@ -260,13 +260,20 @@ static int au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num) { struct i2c_au1550_data *adap = i2c_adap->algo_data; + volatile psc_smb_t *sp = (volatile psc_smb_t *)(adap->psc_base); struct i2c_msg *p; int i, err = 0; for (i = 0; !err && i < num; i++) { p = &msgs[i]; err = do_address(adap, p->addr, p->flags & I2C_M_RD); - if (err || !p->len) + if (err || ((!p->len) && (i == (num - 1)))) { + sp->psc_smbtxrx = PSC_SMBTXRX_STP; + au_sync(); + wait_master_done(adap); + continue; + } + if (!p->len) continue; if (p->flags & I2C_M_RD) err = i2c_read(adap, p->buf, p->len); From mano@roarinelk.homelinux.net Wed May 16 06:34:41 2007 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 16 May 2007 06:34:43 +0100 (BST) Received: from fnoeppeil48.netpark.at ([217.175.205.176]:13328 "EHLO roarinelk.homelinux.net") by ftp.linux-mips.org with ESMTP id S20022108AbXEPFel (ORCPT ); Wed, 16 May 2007 06:34:41 +0100 Received: (qmail 13053 invoked by uid 1000); 16 May 2007 07:34:40 +0200 Date: Wed, 16 May 2007 07:34:40 +0200 From: Manuel Lauss To: i2c@lm-sensors.org Cc: linux-mips@linux-mips.org, khali@linux-fr.org Subject: [PATCH 2/2] i2c-au1550: convert to platform driver Message-ID: <20070516053439.GB12986@roarinelk.homelinux.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.11 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 15067 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mano@roarinelk.homelinux.net Precedence: bulk X-list: linux-mips Convert the i2c-au1550 driver to platform_driver. * Convert the core i2c-au1550 driver to platform_driver, get rid of the i2c-au1550.h file, and remove the unused pb1550_wm_codec_write(). * register the platform device for Alchemy boards which previously defined the i2c psc base address in their headers. * update au1x psc header for the new driver style. arch/mips/au1000/common/platform.c | 22 ++ drivers/i2c/busses/i2c-au1550.c | 311 ++++++++++++++---------------- drivers/i2c/busses/i2c-au1550.h | 32 --- include/asm-mips/mach-au1x00/au1xxx_psc.h | 18 - 4 files changed, 177 insertions(+), 206 deletions(-) Signed-off-by: Manuel Lauss diff -Naurp linux-2.6.21-a/arch/mips/au1000/common/platform.c linux-2.6.21-au/arch/mips/au1000/common/platform.c --- linux-2.6.21-a/arch/mips/au1000/common/platform.c 2007-05-15 20:31:58.000000000 +0200 +++ linux-2.6.21-au/arch/mips/au1000/common/platform.c 2007-05-15 20:21:15.000000000 +0200 @@ -14,6 +14,7 @@ #include #include +#include /* OHCI (USB full speed host controller) */ static struct resource au1xxx_usb_ohci_resources[] = { @@ -270,6 +271,24 @@ static struct platform_device smc91x_dev #endif +/* All Alchemy demoboards with I2C have this #define in their headers */ +#ifdef SMBUS_PSC_BASE +static struct resource pbdb_smbus_resources[] = { + { + .start = SMBUS_PSC_BASE, + .end = SMBUS_PSC_BASE + 0x24 - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device pbdb_smbus_device = { + .name = "au1xpsc_smbus", + .id = 0, + .num_resources = ARRAY_SIZE(pbdb_smbus_resources), + .resource = pbdb_smbus_resources, +}; +#endif + static struct platform_device *au1xxx_platform_devices[] __initdata = { &au1xxx_usb_ohci_device, &au1x00_pcmcia_device, @@ -287,6 +306,9 @@ static struct platform_device *au1xxx_pl #ifdef CONFIG_MIPS_DB1200 &smc91x_device, #endif +#ifdef SMBUS_PSC_BASE + &pbdb_smbus_device, +#endif }; int au1xxx_platform_init(void) diff -Naurp linux-2.6.21-a/drivers/i2c/busses/i2c-au1550.c linux-2.6.21-au/drivers/i2c/busses/i2c-au1550.c --- linux-2.6.21-a/drivers/i2c/busses/i2c-au1550.c 2007-05-15 20:32:44.000000000 +0200 +++ linux-2.6.21-au/drivers/i2c/busses/i2c-au1550.c 2007-05-15 21:39:34.000000000 +0200 @@ -33,29 +33,31 @@ #include #include #include +#include #include #include -#include "i2c-au1550.h" +struct i2c_au1550_data { + u32 psc_base; + int xfer_timeout; + int ack_timeout; + struct i2c_adapter adap; +}; static int wait_xfer_done(struct i2c_au1550_data *adap) { - u32 stat; + u32 stat, base = adap->psc_base; int i; - volatile psc_smb_t *sp; - - sp = (volatile psc_smb_t *)(adap->psc_base); /* Wait for Tx FIFO Underflow. */ for (i = 0; i < adap->xfer_timeout; i++) { - stat = sp->psc_smbevnt; - au_sync(); + stat = au_readl(base + PSC_SMBEVNT); if ((stat & PSC_SMBEVNT_TU) != 0) { /* Clear it. */ - sp->psc_smbevnt = PSC_SMBEVNT_TU; + au_writel(PSC_SMBEVNT_TU, base + PSC_SMBEVNT); au_sync(); return 0; } @@ -68,18 +70,13 @@ wait_xfer_done(struct i2c_au1550_data *a static int wait_ack(struct i2c_au1550_data *adap) { - u32 stat; - volatile psc_smb_t *sp; + u32 stat, base = adap->psc_base; if (wait_xfer_done(adap)) return -ETIMEDOUT; - sp = (volatile psc_smb_t *)(adap->psc_base); - - stat = sp->psc_smbevnt; - au_sync(); - - if ((stat & (PSC_SMBEVNT_DN | PSC_SMBEVNT_AN | PSC_SMBEVNT_AL)) != 0) + stat = au_readl(base + PSC_SMBEVNT); + if (stat & (PSC_SMBEVNT_DN | PSC_SMBEVNT_AN | PSC_SMBEVNT_AL)) return -ETIMEDOUT; return 0; @@ -88,17 +85,13 @@ wait_ack(struct i2c_au1550_data *adap) static int wait_master_done(struct i2c_au1550_data *adap) { - u32 stat; - int i; - volatile psc_smb_t *sp; - - sp = (volatile psc_smb_t *)(adap->psc_base); + u32 stat, base = adap->psc_base; + int i; /* Wait for Master Done. */ for (i = 0; i < adap->xfer_timeout; i++) { - stat = sp->psc_smbevnt; - au_sync(); + stat = au_readl(base + PSC_SMBEVNT); if ((stat & PSC_SMBEVNT_MD) != 0) return 0; udelay(1); @@ -110,24 +103,18 @@ wait_master_done(struct i2c_au1550_data static int do_address(struct i2c_au1550_data *adap, unsigned int addr, int rd) { - volatile psc_smb_t *sp; - u32 stat; - - sp = (volatile psc_smb_t *)(adap->psc_base); + u32 stat, base = adap->psc_base; /* Reset the FIFOs, clear events. */ - stat = sp->psc_smbstat; - sp->psc_smbevnt = PSC_SMBEVNT_ALLCLR; + stat = au_readl(base + PSC_SMBSTAT); + au_writel(PSC_SMBEVNT_ALLCLR, base + PSC_SMBEVNT); au_sync(); - if (!(stat & PSC_SMBSTAT_TE) || !(stat & PSC_SMBSTAT_RE)) { - sp->psc_smbpcr = PSC_SMBPCR_DC; + au_writel(PSC_SMBPCR_DC, base + PSC_SMBPCR); au_sync(); - do { - stat = sp->psc_smbpcr; - au_sync(); - } while ((stat & PSC_SMBPCR_DC) != 0); + while (au_readl(base + PSC_SMBPCR) & PSC_SMBPCR_DC) + msleep(0); udelay(50); } @@ -139,44 +126,37 @@ do_address(struct i2c_au1550_data *adap, /* Put byte into fifo, start up master. */ - sp->psc_smbtxrx = addr; + au_writel(addr, base + PSC_SMBTXRX); au_sync(); - sp->psc_smbpcr = PSC_SMBPCR_MS; + au_writel(PSC_SMBPCR_MS, base + PSC_SMBPCR); au_sync(); - if (wait_ack(adap)) - return -EIO; - return 0; + + return wait_ack(adap) ? -EIO : 0; } static u32 wait_for_rx_byte(struct i2c_au1550_data *adap, u32 *ret_data) { - int j; - u32 data, stat; - volatile psc_smb_t *sp; + u32 stat, base = adap->psc_base; + int j; if (wait_xfer_done(adap)) return -EIO; - sp = (volatile psc_smb_t *)(adap->psc_base); - j = adap->xfer_timeout * 100; do { j--; if (j <= 0) return -EIO; - stat = sp->psc_smbstat; - au_sync(); + stat = au_readl(base + PSC_SMBSTAT); if ((stat & PSC_SMBSTAT_RE) == 0) j = 0; else udelay(1); } while (j > 0); - data = sp->psc_smbtxrx; - au_sync(); - *ret_data = data; + *ret_data = au_readl(base + PSC_SMBTXRX); return 0; } @@ -184,9 +164,8 @@ static int i2c_read(struct i2c_au1550_data *adap, unsigned char *buf, unsigned int len) { - int i; - u32 data; - volatile psc_smb_t *sp; + u32 data, base = adap->psc_base; + int i; if (len == 0) return 0; @@ -196,11 +175,9 @@ i2c_read(struct i2c_au1550_data *adap, u * receive fifo, then reading the bytes. */ - sp = (volatile psc_smb_t *)(adap->psc_base); - i = 0; while (i < (len-1)) { - sp->psc_smbtxrx = 0; + au_writel(0, base + PSC_SMBTXRX); au_sync(); if (wait_for_rx_byte(adap, &data)) return -EIO; @@ -211,14 +188,12 @@ i2c_read(struct i2c_au1550_data *adap, u /* The last byte has to indicate transfer done. */ - sp->psc_smbtxrx = PSC_SMBTXRX_STP; + au_writel(PSC_SMBTXRX_STP, base + PSC_SMBTXRX); au_sync(); if (wait_master_done(adap)) return -EIO; - data = sp->psc_smbtxrx; - au_sync(); - buf[i] = data; + buf[i] = au_readl(base + PSC_SMBTXRX); return 0; } @@ -226,19 +201,15 @@ static int i2c_write(struct i2c_au1550_data *adap, unsigned char *buf, unsigned int len) { - int i; - u32 data; - volatile psc_smb_t *sp; + u32 base = adap->psc_base; + int i; if (len == 0) return 0; - sp = (volatile psc_smb_t *)(adap->psc_base); - i = 0; while (i < (len-1)) { - data = buf[i]; - sp->psc_smbtxrx = data; + au_writel(buf[i], base + PSC_SMBTXRX); au_sync(); if (wait_ack(adap)) return -EIO; @@ -247,9 +218,7 @@ i2c_write(struct i2c_au1550_data *adap, /* The last byte has to indicate transfer done. */ - data = buf[i]; - data |= PSC_SMBTXRX_STP; - sp->psc_smbtxrx = data; + au_writel(buf[i] | PSC_SMBTXRX_STP, base + PSC_SMBTXRX); au_sync(); if (wait_master_done(adap)) return -EIO; @@ -259,26 +228,27 @@ i2c_write(struct i2c_au1550_data *adap, static int au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num) { - struct i2c_au1550_data *adap = i2c_adap->algo_data; - volatile psc_smb_t *sp = (volatile psc_smb_t *)(adap->psc_base); + struct i2c_au1550_data *priv = i2c_adap->algo_data; struct i2c_msg *p; - int i, err = 0; + int i, err; + err = 0; for (i = 0; !err && i < num; i++) { p = &msgs[i]; - err = do_address(adap, p->addr, p->flags & I2C_M_RD); + err = do_address(priv, p->addr, p->flags & I2C_M_RD); if (err || ((!p->len) && (i == (num - 1)))) { - sp->psc_smbtxrx = PSC_SMBTXRX_STP; + au_writel(PSC_SMBTXRX_STP, + priv->psc_base + PSC_SMBTXRX); au_sync(); - wait_master_done(adap); + wait_master_done(priv); continue; } if (!p->len) continue; if (p->flags & I2C_M_RD) - err = i2c_read(adap, p->buf, p->len); + err = i2c_read(priv, p->buf, p->len); else - err = i2c_write(adap, p->buf, p->len); + err = i2c_write(priv, p->buf, p->len); } /* Return the number of messages processed, or the error code. @@ -304,136 +274,151 @@ static const struct i2c_algorithm au1550 * Prior to calling us, the 50MHz clock frequency and routing * must have been set up for the PSC indicated by the adapter. */ -int -i2c_au1550_add_bus(struct i2c_adapter *i2c_adap) +static int +i2c_au1550_probe(struct platform_device *pdev) { - struct i2c_au1550_data *adap = i2c_adap->algo_data; - volatile psc_smb_t *sp; - u32 stat; - - i2c_adap->algo = &au1550_algo; + struct i2c_au1550_data *priv; + struct resource *r; + u32 base, cfg; + int ret; + + ret = -ENODEV; + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!r) + goto out; + base = r->start; + + priv = kzalloc(sizeof(struct i2c_au1550_data), GFP_KERNEL); + if (!priv) + goto out; + + priv->psc_base = base; + priv->xfer_timeout = 200; + priv->ack_timeout = 200; + + priv->adap.id = I2C_HW_AU1550_PSC, + priv->adap.algo = &au1550_algo; + priv->adap.algo_data = priv; + priv->adap.dev.parent = &pdev->dev; + strcpy(priv->adap.name, "Au1550 PSC I2C"); /* Now, set up the PSC for SMBus PIO mode. */ - sp = (volatile psc_smb_t *)(adap->psc_base); - sp->psc_ctrl = PSC_CTRL_DISABLE; + au_writel(PSC_CTRL_DISABLE, base + PSC_CTRL_OFFSET); au_sync(); - sp->psc_sel = PSC_SEL_PS_SMBUSMODE; - sp->psc_smbcfg = 0; + au_writel(PSC_SEL_PS_SMBUSMODE, base + PSC_SEL_OFFSET); + au_writel(0, base + PSC_SMBCFG); au_sync(); - sp->psc_ctrl = PSC_CTRL_ENABLE; + au_writel(PSC_CTRL_ENABLE, base + PSC_CTRL_OFFSET); au_sync(); - do { - stat = sp->psc_smbstat; + while (!(au_readl(base + PSC_SMBSTAT) & PSC_SMBSTAT_SR)) au_sync(); - } while ((stat & PSC_SMBSTAT_SR) == 0); - sp->psc_smbcfg = (PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 | - PSC_SMBCFG_DD_DISABLE); + cfg = PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 | + PSC_SMBCFG_DD_DISABLE; - /* Divide by 8 to get a 6.25 MHz clock. The later protocol - * timings are based on this clock. + au_writel(PSC_SMBMSK_ALLMASK, base + PSC_SMBMSK); + + /* Divide by 8 to get a 6.25 MHz clock. The protocol timings + * below are based on this clock. (96MHz AUXPLL assumed!) */ - sp->psc_smbcfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV8); - sp->psc_smbmsk = PSC_SMBMSK_ALLMASK; + cfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV8); + au_writel(cfg, base + PSC_SMBCFG); au_sync(); /* Set the protocol timer values. See Table 71 in the * Au1550 Data Book for standard timing values. */ - sp->psc_smbtmr = PSC_SMBTMR_SET_TH(0) | PSC_SMBTMR_SET_PS(15) | \ - PSC_SMBTMR_SET_PU(15) | PSC_SMBTMR_SET_SH(15) | \ - PSC_SMBTMR_SET_SU(15) | PSC_SMBTMR_SET_CL(15) | \ - PSC_SMBTMR_SET_CH(15); + au_writel(PSC_SMBTMR_SET_TH(0) | PSC_SMBTMR_SET_PS(15) | \ + PSC_SMBTMR_SET_PU(15) | PSC_SMBTMR_SET_SH(15) | \ + PSC_SMBTMR_SET_SU(15) | PSC_SMBTMR_SET_CL(15) | \ + PSC_SMBTMR_SET_CH(15), base + PSC_SMBTMR); au_sync(); - sp->psc_smbcfg |= PSC_SMBCFG_DE_ENABLE; - do { - stat = sp->psc_smbstat; + cfg |= PSC_SMBCFG_DE_ENABLE; + au_writel(cfg, base + PSC_SMBCFG); + au_sync(); + + while (!(au_readl(base + PSC_SMBSTAT) & PSC_SMBSTAT_DR)) au_sync(); - } while ((stat & PSC_SMBSTAT_DR) == 0); - return i2c_add_adapter(i2c_adap); -} + ret = i2c_add_adapter(&priv->adap); + if (ret == 0) { + platform_set_drvdata(pdev, priv); + return 0; + } + au_writel(0, base + PSC_SMBCFG); + au_writel(PSC_CTRL_DISABLE, base + PSC_CTRL_OFFSET); + au_sync(); -int -i2c_au1550_del_bus(struct i2c_adapter *adap) -{ - return i2c_del_adapter(adap); + kfree(priv); +out: return ret; } static int -pb1550_reg(struct i2c_client *client) +i2c_au1550_remove(struct platform_device *pdev) { - return 0; + struct i2c_au1550_data *priv = platform_get_drvdata(pdev); + u32 base; + + if (priv) { + platform_set_drvdata(pdev, NULL); + base = priv->psc_base; + i2c_del_adapter(&priv->adap); + au_writel(0, base + PSC_SMBCFG); + au_writel(PSC_CTRL_DISABLE, base + PSC_CTRL_OFFSET); + au_sync(); + kfree(priv); + } + return 0; } static int -pb1550_unreg(struct i2c_client *client) +i2c_au1550_suspend(struct platform_device *pdev, pm_message_t state) { + struct i2c_au1550_data *priv = platform_get_drvdata(pdev); + u32 base = priv->psc_base; + + au_writel(PSC_CTRL_SUSPEND, base + PSC_CTRL_OFFSET); + au_sync(); return 0; } -static struct