From lhrkernelcoder@gmail.com Sat Jul 1 07:32:27 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 01 Jul 2006 07:32:35 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.170]:59498 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S8126580AbWGAGc1 (ORCPT ); Sat, 1 Jul 2006 07:32:27 +0100 Received: by ug-out-1314.google.com with SMTP id u2so987074uge for ; Fri, 30 Jun 2006 23:32:26 -0700 (PDT) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:mime-version:content-type:content-transfer-encoding:content-disposition; b=rERT6prcNcvq/PrKyEp27HNoqLP1OxqQ7EDVggeyYTgciQM+bBDEVhycbAMbhwX+fVlmbbmGuQZuUKixzPPv+jgnGrxWafd3hdFAeSiIiAToPWRLtFVSeulYz/WBc9LFE8yh46HkPKMQc4b/OoYhasK5pWw7cKgjawGBTdVAmsk= Received: by 10.78.179.12 with SMTP id b12mr299388huf; Fri, 30 Jun 2006 23:32:26 -0700 (PDT) Received: by 10.78.83.7 with HTTP; Fri, 30 Jun 2006 23:32:26 -0700 (PDT) Message-ID: Date: Sat, 1 Jul 2006 11:32:26 +0500 From: "kernel coder" To: gcc@gcc.gnu.org, gcc-help@gcc.gnu.org, linux-mips@linux-mips.org Subject: explaination of some gcc functions MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11894 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: lhrkernelcoder@gmail.com Precedence: bulk X-list: linux-mips hi, I'm trying to understand the backend code of gcc for MIPS architecture.I'm having some trouble while understanding following functions. 1: push_topmost_sequence(); 2: emit_insn_after(seq,get_insns()); 3: pop_topmost_sequence(); 4: emit_insn_before Would you please explain what's the role of each function. From trix@specifix.com Sat Jul 1 13:55:56 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 01 Jul 2006 13:56:05 +0100 (BST) Received: from w099.z064220152.sjc-ca.dsl.cnc.net ([64.220.152.99]:17539 "EHLO duck.specifix.com") by ftp.linux-mips.org with ESMTP id S3686984AbWGAMz4 (ORCPT ); Sat, 1 Jul 2006 13:55:56 +0100 Received: from localhost.localdomain (duck.corp.specifix.com [192.168.1.1]) by duck.specifix.com (Postfix) with ESMTP id 41892FC69; Sat, 1 Jul 2006 05:55:35 -0700 (PDT) Date: Sat, 01 Jul 2006 08:27:52 -0500 To: "Francois Romieu" Subject: Re: PATCH SB1250 NAPI support Cc: tbm@cyrius.com, jgarzik@pobox.com, netdev@vger.kernel.org, linux-mips@linux-mips.org, mark.e.mason@broadcom.com References: <20060524125512.GO12089@deprecation.cyrius.com> <20060525133505.GH8746@deprecation.cyrius.com> <20060629200107.GA8122@electric-eye.fr.zoreil.com> From: "Tom Rix" Organization: specifix Content-Type: multipart/mixed; boundary=----------ggVnrypSDYHvVVQ57UgIBu MIME-Version: 1.0 Message-ID: In-Reply-To: <20060629200107.GA8122@electric-eye.fr.zoreil.com> User-Agent: Opera M2/8.51 (Linux, build 1462) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11895 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: trix@specifix.com Precedence: bulk X-list: linux-mips ------------ggVnrypSDYHvVVQ57UgIBu Content-Type: text/plain; format=flowed; delsp=yes; charset=utf-8 Content-Transfer-Encoding: 8bit Here is a revised patch that does the interupt masking earlier. Since resetting the mask is done now in 3 places, I created a macro to handle it. This patch has been tested on the linux-mips kernel from 6/29/06 on a sb1250. Tom On Thu, 29 Jun 2006 15:01:07 -0500, Francois Romieu wrote: > Tom Rix : > [...] > diff -rup a/drivers/net/sb1250-mac.c b/drivers/net/sb1250-mac.c > --- a/drivers/net/sb1250-mac.c 2006-03-09 04:25:41.000000000 -0600 > +++ b/drivers/net/sb1250-mac.c 2006-03-09 05:30:52.000000000 -0600 > [...] > @@ -2079,13 +2095,31 @@ static irqreturn_t sbmac_intr(int irq,vo > * Transmits on channel 0 > */ > +#if defined(CONFIG_SBMAC_NAPI) > if (isr & (M_MAC_INT_CHANNEL << S_MAC_TX_CH0)) { > - sbdma_tx_process(sc,&(sc->sbm_txdma)); > + sbdma_tx_process(sc,&(sc->sbm_txdma), 0); > } > /* > * Receives on channel 0 > */ > + if (isr & (M_MAC_INT_CHANNEL << S_MAC_RX_CH0)) { > + if (netif_rx_schedule_prep(dev)) > + { > > An irq could appear here. I am skeptical that it is safe to write > the irq mask register so late. > > One should probably consider a break in the enclosing "for" loop too. > > > + __raw_writeq(0, sc->sbm_imr); > + __netif_rx_schedule(dev); > + } > + else > + { > > } else {, please. > -- Using Opera's revolutionary e-mail client: http://www.opera.com/mail/ ------------ggVnrypSDYHvVVQ57UgIBu Content-Disposition: attachment; filename=mips-sb1250-mac-NAPI-5.patch Content-Type: application/octet-stream; name=mips-sb1250-mac-NAPI-5.patch Content-Transfer-Encoding: Base64 LS0tIGEvZHJpdmVycy9uZXQvS2NvbmZpZwkyMDA2LTA3LTAxIDA2OjI5OjExLjAw MDAwMDAwMCAtMDUwMAorKysgYi9kcml2ZXJzL25ldC9LY29uZmlnCTIwMDYtMDct MDEgMDY6Mjg6NTguMDAwMDAwMDAwIC0wNTAwCkBAIC0yMDEzLDEwICsyMDEzLDYg QEAgY29uZmlnIFI4MTY5X05BUEkKIAogCSAgSWYgaW4gZG91YnQsIHNheSBOLgog Ci1jb25maWcgTkVUX1NCMTI1MF9NQUMKLQl0cmlzdGF0ZSAiU0IxMjUwIEV0aGVy bmV0IHN1cHBvcnQiCi0JZGVwZW5kcyBvbiBTSUJZVEVfU0IxeHh4X1NPQwotCiBj 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(10.0.0.251) by 192.168.5.1 with SMTP; 1 Jul 2006 23:45:38 +1000 Message-ID: <44A67C84.5050702@gentoo.org> Date: Sat, 01 Jul 2006 23:45:40 +1000 From: Stuart Longland Organization: Gentoo Foundation User-Agent: Thunderbird 1.5.0.4 (X11/20060623) MIME-Version: 1.0 To: linux-mips@linux-mips.org Subject: The puzzle that is IP32 audio X-Enigmail-Version: 0.94.0.0 OpenPGP: id=63264AB9; url=http://dev.gentoo.org/~redhatter/gpgkey.asc Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="------------enigF6C534AD88672EA71FEAE45A" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11896 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: redhatter@gentoo.org Precedence: bulk X-list: linux-mips This is an OpenPGP/MIME signed message (RFC 2440 and 3156) --------------enigF6C534AD88672EA71FEAE45A Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Hi All... I've just been tinkering with my O2's audio... and whilst looking around at OpenBSD... it seems I might have some pieces to the puzzle which may explain the rather poor audio quality one gets under Linux. The sound board is based around an Analogue Devices AD1843 codec (datasheet here[1]), which is a 16-bit device. The interesting note, was in the OpenBSD source code for their mavb[2] driver... The mabv.c file[3] contains this comment: > /* > * For some reason SGI has decided to standardize their sound hardware > * interfaces on 24-bit PCM even though the AD1843 codec used in the > * Moosehead A/V Board only supports 16-bit and 8-bit formats. > * Therefore we must convert everything to 24-bit samples only to have > * the MACE hardware convert them back into 16-bit samples again. To > * complicate matters further, the 24-bit samples are embedded 32-bit > * integers. The 8-bit and 16-bit samples are first converted into > * 24-bit samples by padding them to the right with zeroes. Then they > * are sign-extended into 32-bit integers. This conversion is > * conveniently done through the software encoding layer of the high > * level audio driver by using the functions below. Conversion of > * mu-law and A-law formats is done by the hardware. > */ I'm wondering... I don't see any logic that does this in the ALSA code... Could this be the reason we get such craptastic audio from this device? I'll have a tinker, and see if I can use my limited coding skills to fix up the current IP32 driver to the point the sound at least works... without sounding terrible. :-) Regards, --=20 Stuart Longland (aka Redhatter) .'''. Gentoo Linux/MIPS Cobalt and Docs Developer '.'` : =2E . . . . . . . . . . . . . . . . . . . . . .'.' http://dev.gentoo.org/~redhatter :.' International Asperger's Year (1906 ~ 2006) http://dev.gentoo.org/~redhatter/iay Footnotes: 1. http://www.analog.com/UploadedFiles/Data_Sheets/314303384ad1843.pdf 2. http://www.openbsd.org/cgi-bin/man.cgi?query=3Dmavb&sektion=3D4&arch=3D= sgi 3. http://www.openbsd.org/cgi-bin/cvsweb/~checkout~/src/sys/arch/sgi/dev/mav= b.c?rev=3D1.6&content-type=3Dtext/plain --------------enigF6C534AD88672EA71FEAE45A Content-Type: application/pgp-signature; name="signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.2.2-ecc0.1.6 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org iD8DBQFEpnyIuarJ1mMmSrkRAuycAJ4vHvrYBPHcPS9f3MRjmsfBrJsU4QCgi07C EDyQ6YMEHKL4vi2Gp+7SRR0= =OH1R -----END PGP SIGNATURE----- --------------enigF6C534AD88672EA71FEAE45A-- From yoichi_yuasa@tripeaks.co.jp Sun Jul 2 15:13:42 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 02 Jul 2006 15:13:52 +0100 (BST) Received: from mo32.po.2iij.net ([210.128.50.17]:55598 "EHLO mo32.po.2iij.net") by ftp.linux-mips.org with ESMTP id S8133544AbWGBONm (ORCPT ); Sun, 2 Jul 2006 15:13:42 +0100 Received: by mo.po.2iij.net (mo32) id k62EDcng085474; Sun, 2 Jul 2006 23:13:38 +0900 (JST) Received: from localhost.localdomain (225.29.30.125.dy.iij4u.or.jp [125.30.29.225]) by mbox.po.2iij.net (mbox31) id k62EDZfu061870 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Sun, 2 Jul 2006 23:13:35 +0900 (JST) Date: Sun, 2 Jul 2006 23:13:34 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: linux-mips@linux-mips.org Subject: [PATCH] vr41xx: removed unused definitions for NEC CMBVR4133 Message-Id: <20060702231334.082d5374.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11897 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has removed unused definitions for NEC CMBVR4133. Please apply. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/vr41xx/cmbvr4133.h mips/include/asm-mips/vr41xx/cmbvr4133.h --- mips-orig/include/asm-mips/vr41xx/cmbvr4133.h 2006-07-01 23:41:40.393059500 +0900 +++ mips/include/asm-mips/vr41xx/cmbvr4133.h 2006-07-01 23:45:11.882276750 +0900 @@ -55,7 +55,4 @@ #define IDE_SECONDARY_IRQ I8259_IRQ(15) #define I8259_IRQ_LAST IDE_SECONDARY_IRQ -#define RTC_PORT(x) (0xaf000100 + (x)) -#define RTC_IO_EXTENT 0x140 - #endif /* __NEC_CMBVR4133_H */ From yoichi_yuasa@tripeaks.co.jp Sun Jul 2 15:17:37 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 02 Jul 2006 15:17:53 +0100 (BST) Received: from mo31.po.2iij.net ([210.128.50.54]:24624 "EHLO mo31.po.2iij.net") by ftp.linux-mips.org with ESMTP id S8133546AbWGBORh (ORCPT ); Sun, 2 Jul 2006 15:17:37 +0100 Received: by mo.po.2iij.net (mo31) id k62EHYPL097629; Sun, 2 Jul 2006 23:17:34 +0900 (JST) Received: from localhost.localdomain (225.29.30.125.dy.iij4u.or.jp [125.30.29.225]) by mbox.po.2iij.net (mbox31) id k62EHSj4062791 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Sun, 2 Jul 2006 23:17:29 +0900 (JST) Date: Sun, 2 Jul 2006 23:17:27 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: linux-mips Subject: [PATCH] au1000: removed unused codes about au1000 Message-Id: <20060702231727.6e5e6f51.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11898 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has removed unused codes about au1000. Please apply. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/au1000/csb250/Makefile mips/arch/mips/au1000/csb250/Makefile --- mips-orig/arch/mips/au1000/csb250/Makefile 2006-06-28 13:34:58.611275750 +0900 +++ mips/arch/mips/au1000/csb250/Makefile 1970-01-01 09:00:00.000000000 +0900 @@ -1,8 +0,0 @@ -# -# Copyright 2002 Cogent Computer Systems -# dan@embeddededge.com -# -# Makefile for the Cogent CSB250 Au1500 board. Copied from Pb1500. -# - -obj-y := init.o board_setup.o irqmap.o diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/au1000/csb250/board_setup.c mips/arch/mips/au1000/csb250/board_setup.c --- mips-orig/arch/mips/au1000/csb250/board_setup.c 2006-06-28 13:34:58.611275750 +0900 +++ mips/arch/mips/au1000/csb250/board_setup.c 1970-01-01 09:00:00.000000000 +0900 @@ -1,239 +0,0 @@ -/* - * - * BRIEF MODULE DESCRIPTION - * Cogent CSB250 board setup. - * - * Copyright 2002 Cogent Computer Systems, Inc. - * dan@embeddededge.com - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -extern int (*board_pci_idsel)(unsigned int devsel, int assert); -int csb250_pci_idsel(unsigned int devsel, int assert); - -void __init board_setup(void) -{ - u32 pin_func, pin_val; - u32 sys_freqctrl, sys_clksrc; - - - // set AUX clock to 12MHz * 8 = 96 MHz - au_writel(8, SYS_AUXPLL); - au_writel(0, SYS_PINSTATERD); - udelay(100); - -#if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE) - - /* GPIO201 is input for PCMCIA card detect */ - /* GPIO203 is input for PCMCIA interrupt request */ - au_writel(au_readl(GPIO2_DIR) & (u32)(~((1<<1)|(1<<3))), GPIO2_DIR); - - /* zero and disable FREQ2 */ - sys_freqctrl = au_readl(SYS_FREQCTRL0); - sys_freqctrl &= ~0xFFF00000; - au_writel(sys_freqctrl, SYS_FREQCTRL0); - - /* zero and disable USBH/USBD clocks */ - sys_clksrc = au_readl(SYS_CLKSRC); - sys_clksrc &= ~0x00007FE0; - au_writel(sys_clksrc, SYS_CLKSRC); - - sys_freqctrl = au_readl(SYS_FREQCTRL0); - sys_freqctrl &= ~0xFFF00000; - - sys_clksrc = au_readl(SYS_CLKSRC); - sys_clksrc &= ~0x00007FE0; - - // FREQ2 = aux/2 = 48 MHz - sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20)); - au_writel(sys_freqctrl, SYS_FREQCTRL0); - - /* - * Route 48MHz FREQ2 into USB Host and/or Device - */ -#ifdef CONFIG_USB_OHCI - sys_clksrc |= ((4<<12) | (0<<11) | (0<<10)); -#endif -#ifdef CONFIG_AU1X00_USB_DEVICE - sys_clksrc |= ((4<<7) | (0<<6) | (0<<5)); -#endif - au_writel(sys_clksrc, SYS_CLKSRC); - - - pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000); -#ifndef CONFIG_AU1X00_USB_DEVICE - // 2nd USB port is USB host - pin_func |= 0x8000; -#endif - au_writel(pin_func, SYS_PINFUNC); -#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE) - - /* Configure GPIO2....it's used by PCI among other things. - */ - - /* Make everything but GP200 (PCI RST) an input until we get - * the pins set correctly. - */ - au_writel(0x00000001, GPIO2_DIR); - - /* Set the pins used for output. - * A zero bit will leave PCI reset, LEDs off, power up USB, - * IDSEL disabled. - */ - pin_val = ((3 << 30) | (7 << 19) | (1 << 17) | (1 << 16)); - au_writel(pin_val, GPIO2_OUTPUT); - - /* Set the output direction. - */ - pin_val = ((3 << 14) | (7 << 3) | (1 << 1) | (1 << 0)); - au_writel(pin_val, GPIO2_DIR); - -#ifdef CONFIG_PCI - /* Use FREQ1 for the PCI output clock. We use the - * CPU clock of 384 MHz divided by 12 to get 32 MHz PCI. - * If Michael changes the CPU speed, we need to adjust - * that here as well :-). - */ - - /* zero and disable FREQ1 - */ - sys_freqctrl = au_readl(SYS_FREQCTRL0); - sys_freqctrl &= ~0x000ffc00; - au_writel(sys_freqctrl, SYS_FREQCTRL0); - - /* zero and disable PCI clock - */ - sys_clksrc = au_readl(SYS_CLKSRC); - sys_clksrc &= ~0x000f8000; - au_writel(sys_clksrc, SYS_CLKSRC); - - /* Get current values (which really should match above). - */ - sys_freqctrl = au_readl(SYS_FREQCTRL0); - sys_freqctrl &= ~0x000ffc00; - - sys_clksrc = au_readl(SYS_CLKSRC); - sys_clksrc &= ~0x000f8000; - - /* FREQ1 = cpu/12 = 32 MHz - */ - sys_freqctrl |= ((5<<12) | (1<<11) | (0<<10)); - au_writel(sys_freqctrl, SYS_FREQCTRL0); - - /* Just connect the clock without further dividing. - */ - sys_clksrc |= ((3<<17) | (0<<16) | (0<<15)); - au_writel(sys_clksrc, SYS_CLKSRC); - - udelay(1); - - /* Now that clocks should be running, take PCI out of reset. - */ - pin_val = au_readl(GPIO2_OUTPUT); - pin_val |= ((1 << 16) | 1); - au_writel(pin_val, GPIO2_OUTPUT); - - // Setup PCI bus controller - au_writel(0, Au1500_PCI_CMEM); - au_writel(0x00003fff, Au1500_CFG_BASE); - - /* We run big endian without any of the software byte swapping, - * so configure the PCI bridge to help us out. - */ - au_writel(0xf | (2<<6) | (1<<5) | (1<<4), Au1500_PCI_CFG); - - au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV); - au_writel(0, Au1500_PCI_MWBASE_REV_CCL); - au_writel(0x02a00356, Au1500_PCI_STATCMD); - au_writel(0x00003c04, Au1500_PCI_HDRTYPE); - au_writel(0x00000008, Au1500_PCI_MBAR); - au_sync(); - - board_pci_idsel = csb250_pci_idsel; -#endif - - /* Enable sys bus clock divider when IDLE state or no bus activity. */ - au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); - -#ifdef CONFIG_RTC - // Enable the RTC if not already enabled - if (!(au_readl(0xac000028) & 0x20)) { - printk("enabling clock ...\n"); - au_writel((au_readl(0xac000028) | 0x20), 0xac000028); - } - // Put the clock in BCD mode - if (readl(0xac00002C) & 0x4) { /* reg B */ - au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c); - au_sync(); - } -#endif -} - -/* The IDSEL is selected in the GPIO2 register. We will make device - * 12 appear in slot 0 and device 13 appear in slot 1. - */ -int -csb250_pci_idsel(unsigned int devsel, int assert) -{ - int retval; - unsigned int gpio2_pins; - - retval = 1; - - /* First, disable both selects, then assert the one requested. - */ - au_writel(0xc000c000, GPIO2_OUTPUT); - au_sync(); - - if (assert) { - if (devsel == 12) - gpio2_pins = 0x40000000; - else if (devsel == 13) - gpio2_pins = 0x80000000; - else { - gpio2_pins = 0xc000c000; - retval = 0; - } - au_writel(gpio2_pins, GPIO2_OUTPUT); - } - au_sync(); - - return retval; -} diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/au1000/csb250/init.c mips/arch/mips/au1000/csb250/init.c --- mips-orig/arch/mips/au1000/csb250/init.c 2006-06-28 13:34:58.611275750 +0900 +++ mips/arch/mips/au1000/csb250/init.c 1970-01-01 09:00:00.000000000 +0900 @@ -1,94 +0,0 @@ -/* - * - * BRIEF MODULE DESCRIPTION - * Cogent CSB250 board setup - * - * Copyright 2002 Cogent Computer Systems, Inc. - * dan@embeddededge.com - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -int prom_argc; -char **prom_argv, **prom_envp; -extern void __init prom_init_cmdline(void); -extern char *prom_getenv(char *envname); - -/* When we get initrd working someday......... -*/ -int my_initrd_start, my_initrd_size; - -/* Start arguments and environment. -*/ -static char *csb_env[2]; -static char *csb_arg[4]; -static char *arg1 = "console=ttyS3,38400"; -static char *arg2 = "root=/dev/nfs rw ip=any"; -static char *env1 = "ethaddr=00:30:23:50:00:00"; - -const char *get_system_type(void) -{ - return "Cogent CSB250"; -} - -int __init prom_init(int argc, char **argv, char **envp, int *prom_vec) -{ - unsigned char *memsize_str; - unsigned long memsize; - - /* We use a0 and a1 to pass initrd start and size. - */ - if (((uint) argc > 0) && ((uint)argv > 0)) { - my_initrd_start = (uint)argc; - my_initrd_size = (uint)argv; - } - - /* First argv is ignored. - */ - prom_argc = 3; - prom_argv = csb_arg; - prom_envp = csb_env; - csb_arg[1] = arg1; - csb_arg[2] = arg2; - csb_env[0] = env1; - - mips_machgroup = MACH_GROUP_ALCHEMY; - mips_machtype = MACH_CSB250; - - prom_init_cmdline(); - memsize_str = prom_getenv("memsize"); - if (!memsize_str) { - memsize = 0x02000000; - } else { - memsize = simple_strtol(memsize_str, NULL, 0); - } - add_memory_region(0, memsize, BOOT_MEM_RAM); - return 0; -} diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/au1000/csb250/irqmap.c mips/arch/mips/au1000/csb250/irqmap.c --- mips-orig/arch/mips/au1000/csb250/irqmap.c 2006-06-28 13:34:58.611275750 +0900 +++ mips/arch/mips/au1000/csb250/irqmap.c 1970-01-01 09:00:00.000000000 +0900 @@ -1,60 +0,0 @@ -/* - * BRIEF MODULE DESCRIPTION - * Au1xxx irq map table - * - * Copyright 2003 Embedded Edge, LLC - * dan@embeddededge.com - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -au1xxx_irq_map_t __initdata au1xxx_irq_map[] = { - - { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0}, - { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 }, - { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 }, - { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 }, - { AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 }, - { AU1500_GPIO_207, INTC_INT_LOW_LEVEL, 0 }, -}; - -int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map); diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/au1000/hydrogen3/Makefile mips/arch/mips/au1000/hydrogen3/Makefile --- mips-orig/arch/mips/au1000/hydrogen3/Makefile 2006-06-28 13:34:58.611275750 +0900 +++ mips/arch/mips/au1000/hydrogen3/Makefile 1970-01-01 09:00:00.000000000 +0900 @@ -1,9 +0,0 @@ -# -# Copyright 2000 MontaVista Software Inc. -# Author: MontaVista Software, Inc. -# ppopov@mvista.com or source@mvista.com -# -# Makefile for the Alchemy Semiconductor PB1000 board. -# - -obj-y := init.o board_setup.o irqmap.o diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/au1000/hydrogen3/board_setup.c mips/arch/mips/au1000/hydrogen3/board_setup.c --- mips-orig/arch/mips/au1000/hydrogen3/board_setup.c 2006-06-28 13:34:58.611275750 +0900 +++ mips/arch/mips/au1000/hydrogen3/board_setup.c 1970-01-01 09:00:00.000000000 +0900 @@ -1,70 +0,0 @@ -/* - * - * BRIEF MODULE DESCRIPTION - * Alchemy Db1x00 board setup. - * - * Copyright 2000 MontaVista Software Inc. - * Author: MontaVista Software, Inc. - * ppopov@mvista.com or source@mvista.com - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -void board_reset (void) -{ -} - -void __init board_setup(void) -{ - u32 pin_func; - -#ifdef CONFIG_AU1X00_USB_DEVICE - // 2nd USB port is USB device - pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000); - au_writel(pin_func, SYS_PINFUNC); -#endif - -#if defined(CONFIG_IRDA) && (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100)) - /* set IRFIRSEL instead of GPIO15 */ - pin_func = au_readl(SYS_PINFUNC) | (u32)((1<<8)); - au_writel(pin_func, SYS_PINFUNC); - au_sync(); -#endif - - printk("AMD Alchemy Hydrogen3 Board\n"); -} diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/au1000/hydrogen3/init.c mips/arch/mips/au1000/hydrogen3/init.c --- mips-orig/arch/mips/au1000/hydrogen3/init.c 2006-06-28 13:34:58.611275750 +0900 +++ mips/arch/mips/au1000/hydrogen3/init.c 1970-01-01 09:00:00.000000000 +0900 @@ -1,76 +0,0 @@ -/* - * - * BRIEF MODULE DESCRIPTION - * PB1000 board setup - * - * Copyright 2001 MontaVista Software Inc. - * Author: MontaVista Software, Inc. - * ppopov@mvista.com or source@mvista.com - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -int prom_argc; -char **prom_argv, **prom_envp; -extern void __init prom_init_cmdline(void); -extern char *prom_getenv(char *envname); - -const char *get_system_type(void) -{ -#ifdef CONFIG_MIPS_BOSPORUS - return "Alchemy Bosporus Gateway Reference"; -#else - return "Alchemy Db1x00"; -#endif -} - -int __init prom_init(int argc, char **argv, char **envp, int *prom_vec) -{ - unsigned char *memsize_str; - unsigned long memsize; - - prom_argc = argc; - prom_argv = argv; - prom_envp = envp; - - mips_machgroup = MACH_GROUP_ALCHEMY; - mips_machtype = MACH_DB1000; /* set the platform # */ - prom_init_cmdline(); - - memsize_str = prom_getenv("memsize"); - if (!memsize_str) { - memsize = 0x04000000; - } else { - memsize = simple_strtol(memsize_str, NULL, 0); - } - add_memory_region(0, memsize, BOOT_MEM_RAM); - return 0; -} diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/au1000/hydrogen3/irqmap.c mips/arch/mips/au1000/hydrogen3/irqmap.c --- mips-orig/arch/mips/au1000/hydrogen3/irqmap.c 2006-06-28 13:34:58.611275750 +0900 +++ mips/arch/mips/au1000/hydrogen3/irqmap.c 1970-01-01 09:00:00.000000000 +0900 @@ -1,56 +0,0 @@ -/* - * BRIEF MODULE DESCRIPTION - * Au1xxx irq map table - * - * Copyright 2003 Embedded Edge, LLC - * dan@embeddededge.com - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -au1xxx_irq_map_t __initdata au1xxx_irq_map[] = { - - /* { AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 }, */ - { AU1000_GPIO_21, INTC_INT_LOW_LEVEL, 0 }, -}; - -int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map); From anemo@mba.ocn.ne.jp Sun Jul 2 16:08:41 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 02 Jul 2006 16:08:50 +0100 (BST) Received: from mba.ocn.ne.jp ([210.190.142.172]:14836 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S8133546AbWGBPIl (ORCPT ); Sun, 2 Jul 2006 16:08:41 +0100 Received: from localhost (p6162-ipad210funabasi.chiba.ocn.ne.jp [58.88.125.162]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 439C2B49A; Mon, 3 Jul 2006 00:08:35 +0900 (JST) Date: Mon, 03 Jul 2006 00:09:47 +0900 (JST) Message-Id: <20060703.000947.74752434.anemo@mba.ocn.ne.jp> To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: [PATCH] make SPARSEMEM selectable on QEMU From: Atsushi Nemoto X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11899 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips This might be helpfull to debug sparsemem on mips. Signed-off-by: Atsushi Nemoto diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 58e68ce..f151a7e 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -554,6 +554,7 @@ config QEMU select SYS_HAS_CPU_MIPS32_R1 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN + select ARCH_SPARSEMEM_ENABLE help Qemu is a software emulator which among other architectures also can simulate a MIPS32 4Kc system. This patch adds support for the @@ -1687,6 +1688,9 @@ config ARCH_DISCONTIGMEM_ENABLE or have huge holes in the physical address space for other reasons. See for more. +config ARCH_SPARSEMEM_ENABLE + bool + config NUMA bool "NUMA Support" depends on SYS_SUPPORTS_NUMA From sshtylyov@ru.mvista.com Sun Jul 2 20:23:56 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 02 Jul 2006 20:24:11 +0100 (BST) Received: from h155.mvista.com ([63.81.120.155]:33948 "EHLO imap.sh.mvista.com") by ftp.linux-mips.org with ESMTP id S8133577AbWGBTXz (ORCPT ); Sun, 2 Jul 2006 20:23:55 +0100 Received: from [192.168.1.248] (unknown [10.150.0.9]) by imap.sh.mvista.com (Postfix) with ESMTP id 253B33EC9; Sun, 2 Jul 2006 12:23:29 -0700 (PDT) Message-ID: <44A81CEF.3010907@ru.mvista.com> Date: Sun, 02 Jul 2006 23:22:23 +0400 From: Sergei Shtylyov Organization: MontaVista Software Inc. User-Agent: Mozilla/5.0 (X11; U; Linux i686; rv:1.7.2) Gecko/20040803 X-Accept-Language: ru, en-us, en-gb MIME-Version: 1.0 To: Rodolfo Giometti Cc: linux-mips@linux-mips.org Subject: Re: au1000_lowlevel_probe on au1000_eth.c References: <20060626221441.GA10595@enneenne.com> <20060627155914.GD10595@enneenne.com> <44A3EBD7.8090408@ru.mvista.com> <20060629151130.GM7471@enneenne.com> In-Reply-To: <20060629151130.GM7471@enneenne.com> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11900 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sshtylyov@ru.mvista.com Precedence: bulk X-list: linux-mips Hello. Rodolfo Giometti wrote: >> Hrm, wouldn't it be better to put this stuff into a separate function >> then? > Maybe, but I considered that these stuff are dignificative only during > boot time so I decided to do not consider them during wake up. Is that > wrong? No. And exactly because of this, the __init time stuff should better be separated (if possible)... > Ciao, > Rodolfo From domen.puncer@ultra.si Mon Jul 3 07:17:17 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 03 Jul 2006 07:17:27 +0100 (BST) Received: from deliver-2.mx.triera.net ([213.161.0.32]:14749 "EHLO deliver-2.mx.triera.net") by ftp.linux-mips.org with ESMTP id S8133446AbWGCGRR (ORCPT ); Mon, 3 Jul 2006 07:17:17 +0100 Received: from localhost (in-1.mx.triera.net [213.161.0.25]) by deliver-2.mx.triera.net (Postfix) with ESMTP id 63C9F1B5; Mon, 3 Jul 2006 08:17:07 +0200 (CEST) Received: from smtp.triera.net (smtp.triera.net [213.161.0.30]) by in-1.mx.triera.net (Postfix) with SMTP id 014141BC081; Mon, 3 Jul 2006 08:17:07 +0200 (CEST) Received: from localhost (unknown [213.161.20.162]) by smtp.triera.net (Postfix) with ESMTP id 0E3031A18AB; Mon, 3 Jul 2006 08:17:07 +0200 (CEST) Date: Mon, 3 Jul 2006 08:17:09 +0200 From: Domen Puncer To: Ralf Baechle Cc: linux-mips@linux-mips.org Subject: [patch] au1xxx: support YAMON and U-Boot Message-ID: <20060703061709.GL31105@domen.ultra.si> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.11+cvs20060126 X-Virus-Scanned: Triera AV Service Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11901 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: domen.puncer@ultra.si Precedence: bulk X-list: linux-mips After (too) many emails with Sergei Shtylyov, we came up with this patch to support YAMON and U-Boot style environments. Signed-off-by: Domen Puncer Index: linux-mailed/arch/mips/au1000/common/prom.c =================================================================== --- linux-mailed.orig/arch/mips/au1000/common/prom.c +++ linux-mailed/arch/mips/au1000/common/prom.c @@ -1,7 +1,7 @@ /* * * BRIEF MODULE DESCRIPTION - * PROM library initialisation code, assuming YAMON is the boot loader. + * PROM library initialisation code, supports YAMON and U-Boot. * * Copyright 2000, 2001, 2006 MontaVista Software Inc. * Author: MontaVista Software, Inc. @@ -46,12 +46,6 @@ extern int prom_argc; extern char **prom_argv, **prom_envp; -typedef struct -{ - char *name; - char *val; -} t_env_var; - char * prom_getcmdline(void) { @@ -84,13 +78,21 @@ char *prom_getenv(char *envname) { /* * Return a pointer to the given environment variable. + * YAMON uses "name", "value" pairs, while U-Boot uses "name=value". */ - t_env_var *env = (t_env_var *)prom_envp; - - while (env->name) { - if (strcmp(envname, env->name) == 0) - return env->val; + char **env = prom_envp; + int i = strlen(envname); + int yamon = (*env && strchr(*env, '=') == NULL); + + while (*env) { + if (yamon) { + if (strcmp(envname, *env++) == 0) + return *env; + } else { + if (strncmp(envname, *env, i) == 0 && (*env)[i] == '=') + return *env + i + 1; + } env++; } return NULL; From ths@networkno.de Mon Jul 3 13:30:15 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 03 Jul 2006 13:30:25 +0100 (BST) Received: from bender.bawue.de ([193.7.176.20]:49795 "EHLO bender.bawue.de") by ftp.linux-mips.org with ESMTP id S8133621AbWGCMaP (ORCPT ); Mon, 3 Jul 2006 13:30:15 +0100 Received: from lagash (mipsfw.mips-uk.com [194.74.144.146]) (using TLSv1 with cipher DES-CBC3-SHA (168/168 bits)) (No client certificate requested) by bender.bawue.de (Postfix) with ESMTP id A8C1F46220; Mon, 3 Jul 2006 14:30:10 +0200 (MEST) Received: from ths by lagash with local (Exim 4.62) (envelope-from ) id 1FxNYv-00035Y-Nb; Mon, 03 Jul 2006 13:30:01 +0100 Date: Mon, 3 Jul 2006 13:30:01 +0100 To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org Subject: [PATCH] Save 2k text size in cpu-probe Message-ID: <20060703123001.GA6625@networkno.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.11+cvs20060403 From: Thiemo Seufer Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11902 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ths@networkno.de Precedence: bulk X-list: linux-mips The appended patch drops the inline for decode_configs, this saves about 2k of text size. It also uses MIPS_CONF_AR instead of magic constants. Thiemo Signed-off-by: Thiemo Seufer --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -467,7 +467,7 @@ static inline unsigned int decode_config isa = (config0 & MIPS_CONF_AT) >> 13; switch (isa) { case 0: - switch ((config0 >> 10) & 7) { + switch ((config0 & MIPS_CONF_AR) >> 10) { case 0: c->isa_level = MIPS_CPU_ISA_M32R1; break; @@ -479,7 +479,7 @@ static inline unsigned int decode_config } break; case 2: - switch ((config0 >> 10) & 7) { + switch ((config0 & MIPS_CONF_AR) >> 10) { case 0: c->isa_level = MIPS_CPU_ISA_M64R1; break; @@ -556,7 +556,7 @@ static inline unsigned int decode_config return config3 & MIPS_CONF_M; } -static inline void decode_configs(struct cpuinfo_mips *c) +__init static void decode_configs(struct cpuinfo_mips *c) { /* MIPS32 or MIPS64 compliant CPU. */ c->options = MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE | MIPS_CPU_COUNTER | From yoichi_yuasa@tripeaks.co.jp Tue Jul 4 14:16:37 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 Jul 2006 14:16:48 +0100 (BST) Received: from mo31.po.2iij.net ([210.128.50.54]:3080 "EHLO mo31.po.2iij.net") by ftp.linux-mips.org with ESMTP id S8133491AbWGDNQh (ORCPT ); Tue, 4 Jul 2006 14:16:37 +0100 Received: by mo.po.2iij.net (mo31) id k64DGWYa027537; Tue, 4 Jul 2006 22:16:33 +0900 (JST) Received: from localhost.localdomain (225.29.30.125.dy.iij4u.or.jp [125.30.29.225]) by mbox.po.2iij.net (mbox31) id k64DGTr4012212 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 4 Jul 2006 22:16:30 +0900 (JST) Date: Tue, 4 Jul 2006 22:16:28 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: linux-mips Subject: [PATCH] fixed build error about mips-mt.c Message-Id: <20060704221628.4b878943.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11903 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has fixed a build error about mips-mt.c . Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/kernel/mips-mt.c mips/arch/mips/kernel/mips-mt.c --- mips-orig/arch/mips/kernel/mips-mt.c 2006-07-04 11:54:18.241298000 +0900 +++ mips/arch/mips/kernel/mips-mt.c 2006-07-04 11:28:57.834278500 +0900 @@ -7,6 +7,7 @@ #include #include #include +#include #include #include From yoichi_yuasa@tripeaks.co.jp Tue Jul 4 14:59:48 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 Jul 2006 14:59:57 +0100 (BST) Received: from mo30.po.2iij.net ([210.128.50.53]:55330 "EHLO mo30.po.2iij.net") by ftp.linux-mips.org with ESMTP id S8133491AbWGDN7s (ORCPT ); Tue, 4 Jul 2006 14:59:48 +0100 Received: by mo.po.2iij.net (mo30) id k64DxjHw073687; Tue, 4 Jul 2006 22:59:46 +0900 (JST) Received: from localhost.localdomain (225.29.30.125.dy.iij4u.or.jp [125.30.29.225]) by mbox.po.2iij.net (mbox32) id k64DxgZH070618 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 4 Jul 2006 22:59:43 +0900 (JST) Date: Tue, 4 Jul 2006 22:59:41 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: linux-mips Subject: [PATCH] vr41xx: added CONF_BP for VR41xx Message-Id: <20060704225941.14db0533.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11904 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has added CONF_BP for VR41xx. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/mipsregs.h mips/include/asm-mips/mipsregs.h --- mips-orig/include/asm-mips/mipsregs.h 2006-07-03 00:51:00.895809500 +0900 +++ mips/include/asm-mips/mipsregs.h 2006-07-03 00:50:23.001441250 +0900 @@ -470,6 +470,7 @@ /* Bits specific to the VR41xx. */ #define VR41_CONF_CS (_ULCAST_(1) << 12) +#define VR41_CONF_BP (_ULCAST_(1) << 16) #define VR41_CONF_M16 (_ULCAST_(1) << 20) #define VR41_CONF_AD (_ULCAST_(1) << 23) From yoichi_yuasa@tripeaks.co.jp Tue Jul 4 15:04:40 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 Jul 2006 15:04:48 +0100 (BST) Received: from mo30.po.2iij.net ([210.128.50.53]:8460 "EHLO mo30.po.2iij.net") by ftp.linux-mips.org with ESMTP id S8133491AbWGDOEk (ORCPT ); Tue, 4 Jul 2006 15:04:40 +0100 Received: by mo.po.2iij.net (mo30) id k64E4chY074389; Tue, 4 Jul 2006 23:04:38 +0900 (JST) Received: from localhost.localdomain (225.29.30.125.dy.iij4u.or.jp [125.30.29.225]) by mbox.po.2iij.net (mbox32) id k64E4WdD072675 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 4 Jul 2006 23:04:32 +0900 (JST) Date: Tue, 4 Jul 2006 23:04:31 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: linux-mips Subject: [PATCH] vr41xx: VR41_CONF_BP is necessary only for processor ID 0xc80 Message-Id: <20060704230431.74fbe12b.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11905 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, VR41_CONF_BP is necessary only for processor ID 0xc80. Please apply. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/mm/c-r4k.c mips/arch/mips/mm/c-r4k.c --- mips-orig/arch/mips/mm/c-r4k.c 2006-07-04 11:54:18.405308250 +0900 +++ mips/arch/mips/mm/c-r4k.c 2006-07-04 22:45:11.862517750 +0900 @@ -848,7 +848,9 @@ static void __init probe_pcache(void) if (c->processor_id == 0x0c80U || c->processor_id == 0x0c81U || c->processor_id == 0x0c82U) { config &= ~0x00000030U; - config |= 0x00410000U; + config |= 0x00400000U; + if (c->processor_id == 0x0c80U) + config |= VR41_CONF_BP; write_c0_config(config); } icache_size = 1 << (10 + ((config & CONF_IC) >> 9)); From anemo@mba.ocn.ne.jp Tue Jul 4 17:21:37 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 Jul 2006 17:21:46 +0100 (BST) Received: from mba.ocn.ne.jp ([210.190.142.172]:39417 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S3466304AbWGDQVh (ORCPT ); Tue, 4 Jul 2006 17:21:37 +0100 Received: from localhost (p3208-ipad34funabasi.chiba.ocn.ne.jp [124.85.60.208]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 8EF30B45E; Wed, 5 Jul 2006 01:21:30 +0900 (JST) Date: Wed, 05 Jul 2006 01:22:44 +0900 (JST) Message-Id: <20060705.012244.96686002.anemo@mba.ocn.ne.jp> To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: [PATCH] sparsemem fix From: Atsushi Nemoto X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11906 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips 1. MIPS should select SPARSEMEM_STATIC since allocating bootmem in memory_present() will corrupt bootmap area. 2. pfn_valid() for SPARSEMEM is defined in linux/mmzone.h Signed-off-by: Atsushi Nemoto diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index f151a7e..879a19c 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1690,6 +1690,7 @@ config ARCH_DISCONTIGMEM_ENABLE config ARCH_SPARSEMEM_ENABLE bool + select SPARSEMEM_STATIC config NUMA bool "NUMA Support" diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h index 6b97744..6ed1151 100644 --- a/include/asm-mips/page.h +++ b/include/asm-mips/page.h @@ -138,16 +138,14 @@ #define __va(x) ((void *)((unsigned lo #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) -#ifndef CONFIG_SPARSEMEM -#ifndef CONFIG_NEED_MULTIPLE_NODES -#define pfn_valid(pfn) ((pfn) < max_mapnr) -#endif -#endif - #ifdef CONFIG_FLATMEM #define pfn_valid(pfn) ((pfn) < max_mapnr) +#elif defined(CONFIG_SPARSEMEM) + +/* pfn_valid is defined in linux/mmzone.h */ + #elif defined(CONFIG_NEED_MULTIPLE_NODES) #define pfn_valid(pfn) \ @@ -159,8 +157,6 @@ ({ \ : 0); \ }) -#else -#error Provide a definition of pfn_valid #endif #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) From Kenneth.Reese@caviumnetworks.com Tue Jul 4 18:03:44 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 04 Jul 2006 18:03:59 +0100 (BST) Received: from smtp2.caviumnetworks.com ([209.113.159.134]:22584 "EHLO smtp2.caviumnetworks.com") by ftp.linux-mips.org with ESMTP id S8133770AbWGDRDo (ORCPT ); Tue, 4 Jul 2006 18:03:44 +0100 Received: from exch4.caveonetworks.com (Not Verified[192.168.16.23]) by smtp2.caviumnetworks.com with NetIQ MailMarshal (v6,0,3,8) id ; Tue, 04 Jul 2006 13:03:47 -0400 Received: from [192.168.111.13] ([71.202.53.57]) by exch4.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.1830); Tue, 4 Jul 2006 10:03:36 -0700 Message-ID: <44AA9F67.3090309@caviumnetworks.com> Date: Tue, 04 Jul 2006 10:03:35 -0700 From: Chad Reese User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.7.13) Gecko/20060620 Debian/1.7.13-0.2 X-Accept-Language: en MIME-Version: 1.0 To: Atsushi Nemoto CC: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] sparsemem fix References: <20060705.012244.96686002.anemo@mba.ocn.ne.jp> In-Reply-To: <20060705.012244.96686002.anemo@mba.ocn.ne.jp> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 04 Jul 2006 17:03:37.0133 (UTC) FILETIME=[CA6205D0:01C69F8B] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11907 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kreese@caviumnetworks.com Precedence: bulk X-list: linux-mips I believe Ralf committed a cleaned up version of the patch I created 5/23/2006. It called memory_present() after the first bootmap memory was created. I've been using this and dynamic sparsemem on Mips64 for a while now. Hope this helps, Chad Atsushi Nemoto wrote: >1. MIPS should select SPARSEMEM_STATIC since allocating bootmem in > memory_present() will corrupt bootmap area. >2. pfn_valid() for SPARSEMEM is defined in linux/mmzone.h > >Signed-off-by: Atsushi Nemoto > >diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig >index f151a7e..879a19c 100644 >--- a/arch/mips/Kconfig >+++ b/arch/mips/Kconfig >@@ -1690,6 +1690,7 @@ config ARCH_DISCONTIGMEM_ENABLE > > config ARCH_SPARSEMEM_ENABLE > bool >+ select SPARSEMEM_STATIC > > config NUMA > bool "NUMA Support" >diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h >index 6b97744..6ed1151 100644 >--- a/include/asm-mips/page.h >+++ b/include/asm-mips/page.h >@@ -138,16 +138,14 @@ #define __va(x) ((void *)((unsigned lo > > #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) > >-#ifndef CONFIG_SPARSEMEM >-#ifndef CONFIG_NEED_MULTIPLE_NODES >-#define pfn_valid(pfn) ((pfn) < max_mapnr) >-#endif >-#endif >- > #ifdef CONFIG_FLATMEM > > #define pfn_valid(pfn) ((pfn) < max_mapnr) > >+#elif defined(CONFIG_SPARSEMEM) >+ >+/* pfn_valid is defined in linux/mmzone.h */ >+ > #elif defined(CONFIG_NEED_MULTIPLE_NODES) > > #define pfn_valid(pfn) \ >@@ -159,8 +157,6 @@ ({ \ > : 0); \ > }) > >-#else >-#error Provide a definition of pfn_valid > #endif > > #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) > > > From anemo@mba.ocn.ne.jp Wed Jul 5 02:30:22 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 Jul 2006 02:30:31 +0100 (BST) Received: from topsns2.toshiba-tops.co.jp ([202.230.225.126]:29333 "EHLO topsns2.toshiba-tops.co.jp") by ftp.linux-mips.org with ESMTP id S3686520AbWGEBaW (ORCPT ); Wed, 5 Jul 2006 02:30:22 +0100 Received: from topsms.toshiba-tops.co.jp by topsns2.toshiba-tops.co.jp via smtpd (for ftp.linux-mips.org [194.74.144.162]) with ESMTP; Wed, 5 Jul 2006 10:30:21 +0900 Received: from topsms.toshiba-tops.co.jp (localhost.localdomain [127.0.0.1]) by localhost.toshiba-tops.co.jp (Postfix) with ESMTP id A9673203FB; Wed, 5 Jul 2006 10:30:14 +0900 (JST) Received: from srd2sd.toshiba-tops.co.jp (srd2sd.toshiba-tops.co.jp [172.17.28.2]) by topsms.toshiba-tops.co.jp (Postfix) with ESMTP id 9C68220310; Wed, 5 Jul 2006 10:30:14 +0900 (JST) Received: from localhost (fragile [172.17.28.65]) by srd2sd.toshiba-tops.co.jp (8.12.10/8.12.10) with ESMTP id k651UDW0094787; Wed, 5 Jul 2006 10:30:14 +0900 (JST) (envelope-from anemo@mba.ocn.ne.jp) Date: Wed, 05 Jul 2006 10:30:13 +0900 (JST) Message-Id: <20060705.103013.41196866.nemoto@toshiba-tops.co.jp> To: kreese@caviumnetworks.com Cc: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] sparsemem fix From: Atsushi Nemoto In-Reply-To: <44AA9F67.3090309@caviumnetworks.com> References: <20060705.012244.96686002.anemo@mba.ocn.ne.jp> <44AA9F67.3090309@caviumnetworks.com> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.3 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11908 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Tue, 04 Jul 2006 10:03:35 -0700, Chad Reese wrote: > I believe Ralf committed a cleaned up version of the patch I created > 5/23/2006. It called memory_present() after the first bootmap memory was > created. I've been using this and dynamic sparsemem on Mips64 for a > while now. It is not enough. If you want to use SPARSEMEM_EXTREME, do not call memory_present() _before_ reserve_bootmem(). For SPARSEMEM_EXTREME, memory_present() try to allocate bootmem, but first area of bootmem must be reserved for bootmap before any allocation. The alloc_bootmem_node try to allocate upper (>16MB) page first, then try lower page. So if the first memory area was smaller then 16MB SPARSEMEM_EXTREME would not work. Also, SPARSEMEM_STATIC will be a bit faster then SPARSEMEM_EXTREME. The mm/Kconfig warns about mem_section[] size, but static mem_section[] size is just 1KB for MIPS. No problem. :-) --- Atsushi Nemoto From olivier.charra@pacemicro.com Wed Jul 5 09:25:39 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 Jul 2006 09:25:48 +0100 (BST) Received: from smtp-out3.pace.co.uk ([213.244.3.219]:34978 "EHLO smtp-out3.pace.co.uk") by ftp.linux-mips.org with ESMTP id S8126624AbWGEIZj (ORCPT ); Wed, 5 Jul 2006 09:25:39 +0100 Received: from meylan-exch.meylan.pace.co.uk (meylan-exch.meylan.pace.co.uk [136.170.216.4]) by smtp-out3.pace.co.uk (Postfix) with ESMTP id C21131BD65 for ; Wed, 5 Jul 2006 10:25:38 +0200 (CEST) Received: by meylan-exch.meylan.pace.co.uk with Internet Mail Service (5.5.2653.19) id ; Wed, 5 Jul 2006 10:28:17 +0200 Message-ID: <4BE62CC10497D511B6CF0002A5873E9702C8A9FC@meylan-exch.meylan.pace.co.uk> From: Olivier CHARRA To: "'linux-mips@linux-mips.org'" Subject: Hardware watchpoint support Date: Wed, 5 Jul 2006 10:28:14 +0200 MIME-Version: 1.0 X-Mailer: Internet Mail Service (5.5.2653.19) Content-Type: text/plain; charset="iso-8859-1" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11909 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: olivier.charra@pacemicro.com Precedence: bulk X-list: linux-mips Hi all, I would like to use hardware watchpoint on one of our mips 5Kc platform. Before trying to implement it myself from scratch, I would like to know if there was any open-source attempt from which I can start to work. I quickly looked at the mailing list archives and it seems that some of you were trying to do the same thing some week ago. Thanks all, Olivier Charra. From vagabon.xyz@gmail.com Wed Jul 5 09:30:44 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 Jul 2006 09:30:57 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.173]:54767 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S8133374AbWGEIao (ORCPT ); Wed, 5 Jul 2006 09:30:44 +0100 Received: by ug-out-1314.google.com with SMTP id u2so2078044uge for ; Wed, 05 Jul 2006 01:30:43 -0700 (PDT) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:reply-to:user-agent:mime-version:to:cc:subject:references:in-reply-to:content-type:content-transfer-encoding:from; b=lUwJRy4pwVDF/ZfwbLc/rRsccudIePGwy9q7xIJQat+LUxNIDOQRLPrTWY0gUnIJpBI2UC/YFLpAzTjj6+gypIf/wxJvNe3H+hludbjEaNW5FZVZM4nLd4fbQw37kWR7noYA59TbNvPIFw+2aqZcpvHQPjw3KQVlAv8g8BuYSRw= Received: by 10.78.165.16 with SMTP id n16mr1882713hue; Wed, 05 Jul 2006 01:30:42 -0700 (PDT) Received: from ?192.168.0.24? ( [194.3.162.233]) by mx.gmail.com with ESMTP id 4sm1955406hud.2006.07.05.01.30.41; Wed, 05 Jul 2006 01:30:42 -0700 (PDT) Message-ID: <44AB79D0.90002@innova-card.com> Date: Wed, 05 Jul 2006 10:35:28 +0200 Reply-To: Franck User-Agent: Thunderbird 1.5.0.2 (X11/20060501) MIME-Version: 1.0 To: Atsushi Nemoto CC: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] sparsemem fix References: <20060705.012244.96686002.anemo@mba.ocn.ne.jp> In-Reply-To: <20060705.012244.96686002.anemo@mba.ocn.ne.jp> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11910 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips Atsushi Nemoto wrote: > 1. MIPS should select SPARSEMEM_STATIC since allocating bootmem in > memory_present() will corrupt bootmap area. > 2. pfn_valid() for SPARSEMEM is defined in linux/mmzone.h > > Signed-off-by: Atsushi Nemoto > > diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig > index f151a7e..879a19c 100644 > --- a/arch/mips/Kconfig > +++ b/arch/mips/Kconfig > @@ -1690,6 +1690,7 @@ config ARCH_DISCONTIGMEM_ENABLE > > config ARCH_SPARSEMEM_ENABLE > bool > + select SPARSEMEM_STATIC > > config NUMA > bool "NUMA Support" > diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h > index 6b97744..6ed1151 100644 > --- a/include/asm-mips/page.h > +++ b/include/asm-mips/page.h > @@ -138,16 +138,14 @@ #define __va(x) ((void *)((unsigned lo > > #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) > > -#ifndef CONFIG_SPARSEMEM > -#ifndef CONFIG_NEED_MULTIPLE_NODES > -#define pfn_valid(pfn) ((pfn) < max_mapnr) > -#endif > -#endif > - > #ifdef CONFIG_FLATMEM > > #define pfn_valid(pfn) ((pfn) < max_mapnr) > In flatmem case, I would define pfn_valid like: #define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) < max_mapnr) > +#elif defined(CONFIG_SPARSEMEM) > + > +/* pfn_valid is defined in linux/mmzone.h */ > + > #elif defined(CONFIG_NEED_MULTIPLE_NODES) why not using: #elif defined(CONFIG_DISCONTIGMEM) || defined(CONFIG_NUMA) hence, we would have all memory model cases. For now it seems to be implemented only in sgi-ip27 machine. Maybe we should make things clear by adding: #ifdef CONFIG_SGI_IP27 #define pfn_valid [...] #else #error discontigmem model is only supported by sgi-ip27 platforms. #error Please try to implement a generic solution if you plan to #error use this memory model. Good luck ;) #endif /* CONFIG_SGI_IP27 */ > > #define pfn_valid(pfn) \ > @@ -159,8 +157,6 @@ ({ \ > : 0); \ > }) > > -#else > -#error Provide a definition of pfn_valid > #endif maybe this would be better too ? #else #error Unknow memory model, provide a definition of pfn_valid #endif > > #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) > > From anemo@mba.ocn.ne.jp Wed Jul 5 11:21:02 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 Jul 2006 11:21:11 +0100 (BST) Received: from topsns2.toshiba-tops.co.jp ([202.230.225.126]:14303 "EHLO topsns2.toshiba-tops.co.jp") by ftp.linux-mips.org with ESMTP id S8133407AbWGEKVC (ORCPT ); Wed, 5 Jul 2006 11:21:02 +0100 Received: from topsms.toshiba-tops.co.jp by topsns2.toshiba-tops.co.jp via smtpd (for ftp.linux-mips.org [194.74.144.162]) with ESMTP; Wed, 5 Jul 2006 19:20:59 +0900 Received: from topsms.toshiba-tops.co.jp (localhost.localdomain [127.0.0.1]) by localhost.toshiba-tops.co.jp (Postfix) with ESMTP id ACCDA20453; Wed, 5 Jul 2006 19:20:55 +0900 (JST) Received: from srd2sd.toshiba-tops.co.jp (srd2sd.toshiba-tops.co.jp [172.17.28.2]) by topsms.toshiba-tops.co.jp (Postfix) with ESMTP id 85C562030D; Wed, 5 Jul 2006 19:20:55 +0900 (JST) Received: from localhost (fragile [172.17.28.65]) by srd2sd.toshiba-tops.co.jp (8.12.10/8.12.10) with ESMTP id k65AKsW0096669; Wed, 5 Jul 2006 19:20:55 +0900 (JST) (envelope-from anemo@mba.ocn.ne.jp) Date: Wed, 05 Jul 2006 19:20:54 +0900 (JST) Message-Id: <20060705.192054.128618288.nemoto@toshiba-tops.co.jp> To: vagabon.xyz@gmail.com Cc: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] sparsemem fix From: Atsushi Nemoto In-Reply-To: <44AB79D0.90002@innova-card.com> References: <20060705.012244.96686002.anemo@mba.ocn.ne.jp> <44AB79D0.90002@innova-card.com> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.3 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11911 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Wed, 05 Jul 2006 10:35:28 +0200, Franck Bui-Huu wrote: > > #elif defined(CONFIG_NEED_MULTIPLE_NODES) > > why not using: > > #elif defined(CONFIG_DISCONTIGMEM) || defined(CONFIG_NUMA) > > hence, we would have all memory model cases. While NEED_MULTIPLE_NODES is defined if DISCONTIGMEM || NUMA, it seems no difference. > For now it seems to be implemented only in sgi-ip27 machine. Maybe we should > make things clear by adding: > > #ifdef CONFIG_SGI_IP27 > #define pfn_valid [...] > #else > #error discontigmem model is only supported by sgi-ip27 platforms. > #error Please try to implement a generic solution if you plan to > #error use this memory model. Good luck ;) > #endif /* CONFIG_SGI_IP27 */ Though the pfn_valid() is only used by ip27 for now, I suppose it could be used other NUMA systems (not sure). --- Atsushi Nemoto From vagabon.xyz@gmail.com Wed Jul 5 11:46:54 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 Jul 2006 11:47:06 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.169]:28477 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S8133420AbWGEKqy (ORCPT ); Wed, 5 Jul 2006 11:46:54 +0100 Received: by ug-out-1314.google.com with SMTP id u2so2130466uge for ; Wed, 05 Jul 2006 03:46:48 -0700 (PDT) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:reply-to:user-agent:mime-version:to:cc:subject:references:in-reply-to:content-type:content-transfer-encoding:from; b=pAsQO6hMToatk4RsuTtY79w9YGYOJ1KFuZbr7YGIecGE1zn4GanhM9hSg3wxuz7xiqEZ9d8hiJnYN1aGD9S3ILFYCdH4bpjeMbkIa+nzFodaQ2dpVayO9OXYaBKU2BVsiXWGiO4E2QBfSVJr3Agnb4Qr8plrQw+t1l8vtlHz4y8= Received: by 10.78.166.7 with SMTP id o7mr1965413hue; Wed, 05 Jul 2006 03:46:48 -0700 (PDT) Received: from ?192.168.0.24? ( [194.3.162.233]) by mx.gmail.com with ESMTP id 28sm1992590hua.2006.07.05.03.46.44; Wed, 05 Jul 2006 03:46:48 -0700 (PDT) Message-ID: <44AB99AD.8000403@innova-card.com> Date: Wed, 05 Jul 2006 12:51:25 +0200 Reply-To: Franck User-Agent: Thunderbird 1.5.0.2 (X11/20060501) MIME-Version: 1.0 To: Atsushi Nemoto CC: vagabon.xyz@gmail.com, linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] sparsemem fix References: <20060705.012244.96686002.anemo@mba.ocn.ne.jp> <44AB79D0.90002@innova-card.com> <20060705.192054.128618288.nemoto@toshiba-tops.co.jp> In-Reply-To: <20060705.192054.128618288.nemoto@toshiba-tops.co.jp> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11912 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips Atsushi Nemoto wrote: > On Wed, 05 Jul 2006 10:35:28 +0200, Franck Bui-Huu wrote: >>> #elif defined(CONFIG_NEED_MULTIPLE_NODES) >> why not using: >> >> #elif defined(CONFIG_DISCONTIGMEM) || defined(CONFIG_NUMA) >> >> hence, we would have all memory model cases. > > While NEED_MULTIPLE_NODES is defined if DISCONTIGMEM || NUMA, it seems > no difference. > well, in the previous case the reader sees a case for _all_ memory models. In your case the reader needs to know that NEED_MULTIPLE_NODES is defined as (DISCONTIGMEM || NUMA). >> For now it seems to be implemented only in sgi-ip27 machine. Maybe we should >> make things clear by adding: >> >> #ifdef CONFIG_SGI_IP27 >> #define pfn_valid [...] >> #else >> #error discontigmem model is only supported by sgi-ip27 platforms. >> #error Please try to implement a generic solution if you plan to >> #error use this memory model. Good luck ;) >> #endif /* CONFIG_SGI_IP27 */ > > Though the pfn_valid() is only used by ip27 for now, I suppose it > could be used other NUMA systems (not sure). > no the code related to NUMA is embedded in ip27 directory. So if someone has another NUMA system, she should (a) copy all the stuff in its platform directory or (b) make a generic solution maybe based on ip27 one for all others NUMA platforms. But in the second case, the NUMA implementation is going to be modified heavily (a guess) and probably same for pfn_valid definition. The previous change makes things clear: for now, you can't use pfn_valid when NUMA or DISCONTIGMEM configs without some reworks. Franck From anemo@mba.ocn.ne.jp Wed Jul 5 14:12:45 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 Jul 2006 14:12:57 +0100 (BST) Received: from mba.ocn.ne.jp ([210.190.142.172]:5876 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S3466314AbWGENMp (ORCPT ); Wed, 5 Jul 2006 14:12:45 +0100 Received: from localhost (p8107-ipad212funabasi.chiba.ocn.ne.jp [58.91.172.107]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 976DCB7B5; Wed, 5 Jul 2006 22:12:39 +0900 (JST) Date: Wed, 05 Jul 2006 22:13:54 +0900 (JST) Message-Id: <20060705.221354.74751389.anemo@mba.ocn.ne.jp> To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: [PATCH] do not count pages in holes with sparsemem From: Atsushi Nemoto X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11913 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips With SPARSEMEM, the single node can contains some holes so there might be many invalid pages. For example, with two 256M memory and one 256M hole, some variables (num_physpage, totalpages, nr_kernel_pages, nr_all_pages, etc.) will indicate that there are 768MB on this system. This is not desired because, for example, alloc_large_system_hash() allocates too many entries. Use free_area_init_node() with counted zholes_size[] instead of free_area_init(). For num_physpages, use number of ram pages instead of max_low_pfn. Signed-off-by: Atsushi Nemoto diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 802bdd3..d41dee5 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c @@ -139,10 +139,36 @@ #endif /* CONFIG_HIGHMEM */ #ifndef CONFIG_NEED_MULTIPLE_NODES extern void pagetable_init(void); +static int __init page_is_ram(unsigned long pagenr) +{ + int i; + + for (i = 0; i < boot_mem_map.nr_map; i++) { + unsigned long addr, end; + + if (boot_mem_map.map[i].type != BOOT_MEM_RAM) + /* not usable memory */ + continue; + + addr = PFN_UP(boot_mem_map.map[i].addr); + end = PFN_DOWN(boot_mem_map.map[i].addr + + boot_mem_map.map[i].size); + + if (pagenr >= addr && pagenr < end) + return 1; + } + + return 0; +} + void __init paging_init(void) { - unsigned long zones_size[MAX_NR_ZONES] = {0, 0, 0}; + unsigned long zones_size[] = { [0 ... MAX_NR_ZONES - 1] = 0 }; unsigned long max_dma, high, low; +#ifdef CONFIG_SPARSEMEM + unsigned long zholes_size[] = { [0 ... MAX_NR_ZONES - 1] = 0 }; + unsigned long i, j, pfn; +#endif pagetable_init(); @@ -174,29 +200,17 @@ #ifdef CONFIG_HIGHMEM zones_size[ZONE_HIGHMEM] = high - low; #endif +#ifdef CONFIG_SPARSEMEM + pfn = 0; + for (i = 0; i < MAX_NR_ZONES; i++) + for (j = 0; j < zones_size[i]; j++, pfn++) + if (!page_is_ram(pfn)) + zholes_size[i]++; + free_area_init_node(0, NODE_DATA(0), zones_size, + __pa(PAGE_OFFSET), zholes_size); +#else free_area_init(zones_size); -} - -static inline int page_is_ram(unsigned long pagenr) -{ - int i; - - for (i = 0; i < boot_mem_map.nr_map; i++) { - unsigned long addr, end; - - if (boot_mem_map.map[i].type != BOOT_MEM_RAM) - /* not usable memory */ - continue; - - addr = PFN_UP(boot_mem_map.map[i].addr); - end = PFN_DOWN(boot_mem_map.map[i].addr + - boot_mem_map.map[i].size); - - if (pagenr >= addr && pagenr < end) - return 1; - } - - return 0; +#endif } static struct kcore_list kcore_mem, kcore_vmalloc; @@ -213,9 +227,9 @@ #ifdef CONFIG_HIGHMEM #ifdef CONFIG_DISCONTIGMEM #error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet" #endif - max_mapnr = num_physpages = highend_pfn; + max_mapnr = highend_pfn; #else - max_mapnr = num_physpages = max_low_pfn; + max_mapnr = max_low_pfn; #endif high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT); @@ -229,6 +243,7 @@ #endif if (PageReserved(pfn_to_page(tmp))) reservedpages++; } + num_physpages = ram; #ifdef CONFIG_HIGHMEM for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) { @@ -247,6 +262,7 @@ #endif totalhigh_pages++; } totalram_pages += totalhigh_pages; + num_physpages += totalhigh_pages; #endif codesize = (unsigned long) &_etext - (unsigned long) &_text; From ths@networkno.de Wed Jul 5 14:26:50 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 Jul 2006 14:26:59 +0100 (BST) Received: from bender.bawue.de ([193.7.176.20]:16861 "EHLO bender.bawue.de") by ftp.linux-mips.org with ESMTP id S8133380AbWGEN0u (ORCPT ); Wed, 5 Jul 2006 14:26:50 +0100 Received: from lagash (mipsfw.mips-uk.com [194.74.144.146]) (using TLSv1 with cipher DES-CBC3-SHA (168/168 bits)) (No client certificate requested) by bender.bawue.de (Postfix) with ESMTP id CB4504413B; Wed, 5 Jul 2006 15:26:49 +0200 (MEST) Received: from ths by lagash with local (Exim 4.62) (envelope-from ) id 1Fy7Oo-0008Fe-Fu; Wed, 05 Jul 2006 14:26:38 +0100 Date: Wed, 5 Jul 2006 14:26:38 +0100 To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: [PATCH] Improve interrupt latency again for sb1250/bcm1480 Message-ID: <20060705132638.GC29112@networkno.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.11+cvs20060403 From: Thiemo Seufer Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11914 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ths@networkno.de Precedence: bulk X-list: linux-mips Hello All, this patch restores the behaviour of the old (assembly-written) interrupt handler, the handler is left as soon as a single interrupt cause is handled. Thiemo diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index 0eb0b10..ed325f0 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c @@ -502,22 +502,23 @@ #endif #ifdef CONFIG_SIBYTE_BCM1480_PROF if (pending & CAUSEF_IP7) /* Cpu performance counter interrupt */ sbprof_cpu_intr(exception_epc(regs)); + else #endif if (pending & CAUSEF_IP4) bcm1480_timer_interrupt(regs); #ifdef CONFIG_SMP - if (pending & CAUSEF_IP3) + else if (pending & CAUSEF_IP3) bcm1480_mailbox_interrupt(regs); #endif #ifdef CONFIG_KGDB - if (pending & CAUSEF_IP6) + else if (pending & CAUSEF_IP6) bcm1480_kgdb_interrupt(regs); /* KGDB (uart 1) */ #endif - if (pending & CAUSEF_IP2) { + else if (pending & CAUSEF_IP2) { unsigned long long mask_h, mask_l; unsigned long base; diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index 8d49cb5..1de71ad 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c @@ -460,25 +460,25 @@ #endif pending = read_c0_cause(); #ifdef CONFIG_SIBYTE_SB1250_PROF - if (pending & CAUSEF_IP7) { /* Cpu performance counter interrupt */ + if (pending & CAUSEF_IP7) /* Cpu performance counter interrupt */ sbprof_cpu_intr(exception_epc(regs)); - } + else #endif if (pending & CAUSEF_IP4) sb1250_timer_interrupt(regs); #ifdef CONFIG_SMP - if (pending & CAUSEF_IP3) + else if (pending & CAUSEF_IP3) sb1250_mailbox_interrupt(regs); #endif #ifdef CONFIG_KGDB - if (pending & CAUSEF_IP6) /* KGDB (uart 1) */ + else if (pending & CAUSEF_IP6) /* KGDB (uart 1) */ sb1250_kgdb_interrupt(regs); #endif - if (pending & CAUSEF_IP2) { + else if (pending & CAUSEF_IP2) { unsigned long long mask; /* From ths@networkno.de Wed Jul 5 14:33:07 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 Jul 2006 14:33:16 +0100 (BST) Received: from bender.bawue.de ([193.7.176.20]:3806 "EHLO bender.bawue.de") by ftp.linux-mips.org with ESMTP id S8133380AbWGENdH (ORCPT ); Wed, 5 Jul 2006 14:33:07 +0100 Received: from lagash (mipsfw.mips-uk.com [194.74.144.146]) (using TLSv1 with cipher DES-CBC3-SHA (168/168 bits)) (No client certificate requested) by bender.bawue.de (Postfix) with ESMTP id 1B17A44672; Wed, 5 Jul 2006 15:33:02 +0200 (MEST) Received: from ths by lagash with local (Exim 4.62) (envelope-from ) id 1Fy7Up-0008Gu-Na; Wed, 05 Jul 2006 14:32:51 +0100 Date: Wed, 5 Jul 2006 14:32:51 +0100 To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: [PATCH] Fix fatal typo for bcm1480 Message-ID: <20060705133251.GD29112@networkno.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.11+cvs20060403 From: Thiemo Seufer Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11915 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ths@networkno.de Precedence: bulk X-list: linux-mips Hello All, this fixes a fatal typo which crept in the rewritten interrupt handler. Thiemo Signed-off-by: Thiemo Seufer --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c @@ -533,7 +533,7 @@ #endif mask_l = __raw_readq( IOADDR(base + R_BCM1480_IMR_INTERRUPT_STATUS_BASE_L)); - if (!mask_h) { + if (mask_h) { if (mask_h ^ 1) do_IRQ(63 - dclz(mask_h), regs); else From ths@networkno.de Wed Jul 5 14:34:19 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 Jul 2006 14:34:30 +0100 (BST) Received: from bender.bawue.de ([193.7.176.20]:9950 "EHLO bender.bawue.de") by ftp.linux-mips.org with ESMTP id S8133380AbWGENeT (ORCPT ); Wed, 5 Jul 2006 14:34:19 +0100 Received: from lagash (mipsfw.mips-uk.com [194.74.144.146]) (using TLSv1 with cipher DES-CBC3-SHA (168/168 bits)) (No client certificate requested) by bender.bawue.de (Postfix) with ESMTP id 3E6234455E; Wed, 5 Jul 2006 15:34:18 +0200 (MEST) Received: from ths by lagash with local (Exim 4.62) (envelope-from ) id 1Fy7W3-0008Hb-Qo; Wed, 05 Jul 2006 14:34:07 +0100 Date: Wed, 5 Jul 2006 14:34:07 +0100 To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: [PATCH] Fix build failure in sb1250_duart.c Message-ID: <20060705133407.GE29112@networkno.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.11+cvs20060403 From: Thiemo Seufer Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11916 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ths@networkno.de Precedence: bulk X-list: linux-mips Hello All, this fixes a build failure caused by the devfs removal. Thiemo Signed-off-by: Thiemo Seufer --- a/drivers/char/sb1250_duart.c +++ b/drivers/char/sb1250_duart.c @@ -763,7 +763,6 @@ static int __init sb1250_duart_init(void sb1250_duart_driver->owner = THIS_MODULE; sb1250_duart_driver->name = "duart"; - sb1250_duart_driver->devfs_name = "duart/"; sb1250_duart_driver->major = TTY_MAJOR; sb1250_duart_driver->minor_start = SB1250_DUART_MINOR_BASE; sb1250_duart_driver->type = TTY_DRIVER_TYPE_SERIAL; From vagabon.xyz@gmail.com Wed Jul 5 14:54:15 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 Jul 2006 14:54:25 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.173]:30699 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S8133454AbWGENyP (ORCPT ); Wed, 5 Jul 2006 14:54:15 +0100 Received: by ug-out-1314.google.com with SMTP id u2so2203928uge for ; Wed, 05 Jul 2006 06:54:15 -0700 (PDT) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:reply-to:user-agent:mime-version:to:cc:subject:references:in-reply-to:content-type:content-transfer-encoding:from; b=ujjyJfL9zq1ltiAzXmAnRRQ4b7F9tDmyHyJ5QFSN5z3t0+7iMx6620Qnaa0SOiFJU9+Z3cYSmLReI4RqDLqkXDwzM3eMgnDtq40tOqjpn1FCuVNb/0a0ulyCkpzELByng+E8r5yLDIo2KEgxFmiMshVC8RpAiE7pVUlYBk4EsqQ= Received: by 10.78.167.12 with SMTP id p12mr3513568hue; Wed, 05 Jul 2006 06:54:14 -0700 (PDT) Received: from ?192.168.0.24? ( [194.3.162.233]) by mx.gmail.com with ESMTP id 33sm2343758hue.2006.07.05.06.54.11; Wed, 05 Jul 2006 06:54:14 -0700 (PDT) Message-ID: <44ABC59C.6070607@innova-card.com> Date: Wed, 05 Jul 2006 15:58:52 +0200 Reply-To: Franck User-Agent: Thunderbird 1.5.0.2 (X11/20060501) MIME-Version: 1.0 To: Atsushi Nemoto CC: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] do not count pages in holes with sparsemem References: <20060705.221354.74751389.anemo@mba.ocn.ne.jp> In-Reply-To: <20060705.221354.74751389.anemo@mba.ocn.ne.jp> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11917 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips Atsushi Nemoto wrote: > With SPARSEMEM, the single node can contains some holes so there might > be many invalid pages. For example, with two 256M memory and one 256M Does SPARSEMEM is the only memory model where we can have memory holes ? > hole, some variables (num_physpage, totalpages, nr_kernel_pages, > nr_all_pages, etc.) will indicate that there are 768MB on this system. > This is not desired because, for example, alloc_large_system_hash() > allocates too many entries. > > Use free_area_init_node() with counted zholes_size[] instead of > free_area_init(). > > For num_physpages, use number of ram pages instead of max_low_pfn. > > Signed-off-by: Atsushi Nemoto > > diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c > index 802bdd3..d41dee5 100644 > --- a/arch/mips/mm/init.c > +++ b/arch/mips/mm/init.c [snip] > > @@ -174,29 +200,17 @@ #ifdef CONFIG_HIGHMEM > zones_size[ZONE_HIGHMEM] = high - low; > #endif > > +#ifdef CONFIG_SPARSEMEM > + pfn = 0; > + for (i = 0; i < MAX_NR_ZONES; i++) > + for (j = 0; j < zones_size[i]; j++, pfn++) > + if (!page_is_ram(pfn)) > + zholes_size[i]++; > + free_area_init_node(0, NODE_DATA(0), zones_size, > + __pa(PAGE_OFFSET), zholes_size); Does this code really need the ifdef CONFIG_SPARSEMEM ? Can't we make it generic instead. Only zholes_size[] initialisation really depends on the memory model. Of course FLATMEM will let zholes_size as is... If I remember correctly free_area_init_node() takes a pfn number as fourth parameter: __pa(PAGE_OFFSET) results in a physical address... BTW why using __pa(OFFSET) ? isn't it going to yield always into 0 ? At least on MIPS, it's defined as #define __pa(x) ((unsigned long) (x) - PAGE_OFFSET) why not using ARCH_PFN_OFFSET instead ? thanks Franck From anemo@mba.ocn.ne.jp Wed Jul 5 15:16:31 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 Jul 2006 15:16:40 +0100 (BST) Received: from mba.ocn.ne.jp ([210.190.142.172]:27336 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S8133536AbWGEOQb (ORCPT ); Wed, 5 Jul 2006 15:16:31 +0100 Received: from localhost (p8107-ipad212funabasi.chiba.ocn.ne.jp [58.91.172.107]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id AA691B7B6; Wed, 5 Jul 2006 23:16:22 +0900 (JST) Date: Wed, 05 Jul 2006 23:17:37 +0900 (JST) Message-Id: <20060705.231737.59032119.anemo@mba.ocn.ne.jp> To: vagabon.xyz@gmail.com Cc: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] do not count pages in holes with sparsemem From: Atsushi Nemoto In-Reply-To: <44ABC59C.6070607@innova-card.com> References: <20060705.221354.74751389.anemo@mba.ocn.ne.jp> <44ABC59C.6070607@innova-card.com> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11918 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Wed, 05 Jul 2006 15:58:52 +0200, Franck Bui-Huu wrote: > Does SPARSEMEM is the only memory model where we can have memory holes ? ... > Does this code really need the ifdef CONFIG_SPARSEMEM ? Can't we make > it generic instead. Only zholes_size[] initialisation really depends > on the memory model. Of course FLATMEM will let zholes_size as is... Indeed. Others can have holes, but might be a bit ineffective. > If I remember correctly free_area_init_node() takes a pfn number as > fourth parameter: __pa(PAGE_OFFSET) results in a physical address... You are right. > BTW why using __pa(OFFSET) ? isn't it going to yield always into 0 ? > At least on MIPS, it's defined as > > #define __pa(x) ((unsigned long) (x) - PAGE_OFFSET) > > why not using ARCH_PFN_OFFSET instead ? Indeed. I copied the code from free_area_init(). I think 0 is enough for MIPS. Patch revised. Thank you for comments. With some memory model other than FLATMEM, the single node can contains some holes so there might be many invalid pages. For example, with two 256M memory and one 256M hole, some variables (num_physpage, totalpages, nr_kernel_pages, nr_all_pages, etc.) will indicate that there are 768MB on this system. This is not desired because, for example, alloc_large_system_hash() allocates too many entries. Use free_area_init_node() with counted zholes_size[] instead of free_area_init(). For num_physpages, use number of ram pages instead of max_low_pfn. Signed-off-by: Atsushi Nemoto diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 802bdd3..6c68b2a 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c @@ -139,10 +139,36 @@ #endif /* CONFIG_HIGHMEM */ #ifndef CONFIG_NEED_MULTIPLE_NODES extern void pagetable_init(void); +static int __init page_is_ram(unsigned long pagenr) +{ + int i; + + for (i = 0; i < boot_mem_map.nr_map; i++) { + unsigned long addr, end; + + if (boot_mem_map.map[i].type != BOOT_MEM_RAM) + /* not usable memory */ + continue; + + addr = PFN_UP(boot_mem_map.map[i].addr); + end = PFN_DOWN(boot_mem_map.map[i].addr + + boot_mem_map.map[i].size); + + if (pagenr >= addr && pagenr < end) + return 1; + } + + return 0; +} + void __init paging_init(void) { - unsigned long zones_size[MAX_NR_ZONES] = {0, 0, 0}; + unsigned long zones_size[] = { [0 ... MAX_NR_ZONES - 1] = 0 }; unsigned long max_dma, high, low; + unsigned long zholes_size[] = { [0 ... MAX_NR_ZONES - 1] = 0 }; +#ifndef CONFIG_FLATMEM + unsigned long i, j, pfn; +#endif pagetable_init(); @@ -174,29 +200,14 @@ #ifdef CONFIG_HIGHMEM zones_size[ZONE_HIGHMEM] = high - low; #endif - free_area_init(zones_size); -} - -static inline int page_is_ram(unsigned long pagenr) -{ - int i; - - for (i = 0; i < boot_mem_map.nr_map; i++) { - unsigned long addr, end; - - if (boot_mem_map.map[i].type != BOOT_MEM_RAM) - /* not usable memory */ - continue; - - addr = PFN_UP(boot_mem_map.map[i].addr); - end = PFN_DOWN(boot_mem_map.map[i].addr + - boot_mem_map.map[i].size); - - if (pagenr >= addr && pagenr < end) - return 1; - } - - return 0; +#ifndef CONFIG_FLATMEM + pfn = 0; + for (i = 0; i < MAX_NR_ZONES; i++) + for (j = 0; j < zones_size[i]; j++, pfn++) + if (!page_is_ram(pfn)) + zholes_size[i]++; +#endif + free_area_init_node(0, NODE_DATA(0), zones_size, 0, zholes_size); } static struct kcore_list kcore_mem, kcore_vmalloc; @@ -213,9 +224,9 @@ #ifdef CONFIG_HIGHMEM #ifdef CONFIG_DISCONTIGMEM #error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet" #endif - max_mapnr = num_physpages = highend_pfn; + max_mapnr = highend_pfn; #else - max_mapnr = num_physpages = max_low_pfn; + max_mapnr = max_low_pfn; #endif high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT); @@ -229,6 +240,7 @@ #endif if (PageReserved(pfn_to_page(tmp))) reservedpages++; } + num_physpages = ram; #ifdef CONFIG_HIGHMEM for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) { @@ -247,6 +259,7 @@ #endif totalhigh_pages++; } totalram_pages += totalhigh_pages; + num_physpages += totalhigh_pages; #endif codesize = (unsigned long) &_etext - (unsigned long) &_text; From ths@networkno.de Wed Jul 5 18:43:44 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 05 Jul 2006 18:43:55 +0100 (BST) Received: from bender.bawue.de ([193.7.176.20]:48546 "EHLO bender.bawue.de") by ftp.linux-mips.org with ESMTP id S8133778AbWGERno (ORCPT ); Wed, 5 Jul 2006 18:43:44 +0100 Received: from lagash (mipsfw.mips-uk.com [194.74.144.146]) (using TLSv1 with cipher DES-CBC3-SHA (168/168 bits)) (No client certificate requested) by bender.bawue.de (Postfix) with ESMTP id 45C88443C9; Wed, 5 Jul 2006 19:43:41 +0200 (MEST) Received: from ths by lagash with local (Exim 4.62) (envelope-from ) id 1FyBPN-0005Ar-7O; Wed, 05 Jul 2006 18:43:29 +0100 Date: Wed, 5 Jul 2006 18:43:29 +0100 To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: [PATCH] Search+replace gone wrong... Message-ID: <20060705174329.GA15138@networkno.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.11+cvs20060403 From: Thiemo Seufer Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11919 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ths@networkno.de Precedence: bulk X-list: linux-mips Hello All, some random hit by search+replace, it seems. Thiemo Signed-off-by: Thiemo Seufer diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c index ac658c4..c64a820 100644 --- a/arch/mips/sgi-ip32/ip32-irq.c +++ b/arch/mips/sgi-ip32/ip32-irq.c @@ -316,9 +316,9 @@ #define MACEISA_MISC_INT (MACEISA_RTC_IN MACEISA_KEYB_POLL_INT | \ MACEISA_MOUSE_INT | \ MACEISA_MOUSE_POLL_INT | \ - MACEIIRQF_TIMER0_INT | \ - MACEIIRQF_TIMER1_INT | \ - MACEIIRQF_TIMER2_INT) + MACEISA_TIMER0_INT | \ + MACEISA_TIMER1_INT | \ + MACEISA_TIMER2_INT) #define MACEISA_SUPERIO_INT (MACEISA_PARALLEL_INT | \ MACEISA_PAR_CTXA_INT | \ MACEISA_PAR_CTXB_INT | \ @@ -349,7 +349,7 @@ static void enable_maceisa_irq (unsigned case MACEISA_AUDIO_SW_IRQ ... MACEISA_AUDIO3_MERR_IRQ: crime_int = MACE_AUDIO_INT; break; - case MACEISA_RTC_IRQ ... MACEIIRQF_TIMER2_IRQ: + case MACEISA_RTC_IRQ ... MACEISA_TIMER2_IRQ: crime_int = MACE_MISC_INT; break; case MACEISA_PARALLEL_IRQ ... MACEISA_SERIAL2_RDMAOR_IRQ: From vagabon.xyz@gmail.com Thu Jul 6 14:07:24 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 Jul 2006 14:07:34 +0100 (BST) Received: from nf-out-0910.google.com ([64.233.182.184]:32010 "EHLO nf-out-0910.google.com") by ftp.linux-mips.org with ESMTP id S3466326AbWGFNHY (ORCPT ); Thu, 6 Jul 2006 14:07:24 +0100 Received: by nf-out-0910.google.com with SMTP id a27so79996nfc for ; Thu, 06 Jul 2006 06:07:24 -0700 (PDT) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:reply-to:user-agent:mime-version:to:cc:subject:references:in-reply-to:content-type:content-transfer-encoding:from; b=CLDP9vO0jhrpmySENUWO5UK5vUuT/MlvQRje0LeI5IgzYGvK5Qeiv8KuLyFhgfNe1S6CKYM95N/YqTeop2ww5V+Wr4+XKdjwDUJ+UcsN86SBtHAtYHaSPehBFr4Ng1C0EFYq4aRtuDWGkFaiyb7V2lkZlWSKyBRM8U2gAxTRz5c= Received: by 10.48.80.3 with SMTP id d3mr449227nfb; Thu, 06 Jul 2006 06:07:23 -0700 (PDT) Received: from ?192.168.0.24? ( [194.3.162.233]) by mx.gmail.com with ESMTP id l22sm6713706nfc.2006.07.06.06.07.22; Thu, 06 Jul 2006 06:07:23 -0700 (PDT) Message-ID: <44AD0C2B.7060204@innova-card.com> Date: Thu, 06 Jul 2006 15:12:11 +0200 Reply-To: Franck User-Agent: Thunderbird 1.5.0.2 (X11/20060501) MIME-Version: 1.0 To: Atsushi Nemoto CC: vagabon.xyz@gmail.com, linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] do not count pages in holes with sparsemem References: <20060705.221354.74751389.anemo@mba.ocn.ne.jp> <44ABC59C.6070607@innova-card.com> <20060705.231737.59032119.anemo@mba.ocn.ne.jp> In-Reply-To: <20060705.231737.59032119.anemo@mba.ocn.ne.jp> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11920 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips Atsushi Nemoto wrote: > On Wed, 05 Jul 2006 15:58:52 +0200, Franck Bui-Huu wrote: >> BTW why using __pa(OFFSET) ? isn't it going to yield always into 0 ? >> At least on MIPS, it's defined as >> >> #define __pa(x) ((unsigned long) (x) - PAGE_OFFSET) >> >> why not using ARCH_PFN_OFFSET instead ? > > Indeed. I copied the code from free_area_init(). I think 0 is enough > for MIPS. Patch revised. Thank you for comments. > > Ok thinking more about it, some platforms may have physical memory that doesn't start at 0. MIPS doesn't support such platform though it should be fairly easy. In that case __pa should be defined as: #define __pa(x) ((unsigned long) (x) - PAGE_OFFSET + PFN_PHYS(ARCH_PFN_OFFSET)) and use in your patch: free_area_init_node(0, NODE_DATA(0), zones_size, ARCH_PFN_OFFSET, zholes_size); So I would recommend to use ARCH_PFN_OFFSET. Franck From anemo@mba.ocn.ne.jp Thu Jul 6 15:35:25 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 Jul 2006 15:35:36 +0100 (BST) Received: from mba.ocn.ne.jp ([210.190.142.172]:59886 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S3466333AbWGFOfZ (ORCPT ); Thu, 6 Jul 2006 15:35:25 +0100 Received: from localhost (p4085-ipad209funabasi.chiba.ocn.ne.jp [58.88.115.85]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 211ABB6DB; Thu, 6 Jul 2006 23:35:19 +0900 (JST) Date: Thu, 06 Jul 2006 23:36:34 +0900 (JST) Message-Id: <20060706.233634.59465089.anemo@mba.ocn.ne.jp> To: vagabon.xyz@gmail.com Cc: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] do not count pages in holes with sparsemem From: Atsushi Nemoto In-Reply-To: <44AD0C2B.7060204@innova-card.com> References: <44ABC59C.6070607@innova-card.com> <20060705.231737.59032119.anemo@mba.ocn.ne.jp> <44AD0C2B.7060204@innova-card.com> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11921 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Thu, 06 Jul 2006 15:12:11 +0200, Franck Bui-Huu wrote: > Ok thinking more about it, some platforms may have physical memory > that doesn't start at 0. MIPS doesn't support such platform though it > should be fairly easy. In that case __pa should be defined as: > > #define __pa(x) ((unsigned long) (x) - PAGE_OFFSET + PFN_PHYS(ARCH_PFN_OFFSET)) > > and use in your patch: > > free_area_init_node(0, NODE_DATA(0), zones_size, ARCH_PFN_OFFSET, zholes_size); > > So I would recommend to use ARCH_PFN_OFFSET. Well, currently ARCH_PFN_OFFSET is defined in asm-generic/memory_model.h only for FLATMEM case. I think other memory models do not need it because it is just a case that a first hole begins at pfn 0. --- Atsushi Nemoto From vagabon.xyz@gmail.com Thu Jul 6 15:54:14 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 Jul 2006 15:54:24 +0100 (BST) Received: from nf-out-0910.google.com ([64.233.182.187]:3492 "EHLO nf-out-0910.google.com") by ftp.linux-mips.org with ESMTP id S3466417AbWGFOyO (ORCPT ); Thu, 6 Jul 2006 15:54:14 +0100 Received: by nf-out-0910.google.com with SMTP id x30so154687nfb for ; Thu, 06 Jul 2006 07:54:14 -0700 (PDT) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:reply-to:user-agent:mime-version:to:cc:subject:references:in-reply-to:content-type:content-transfer-encoding:from; b=ayGo4llO081s8g9x84xS8lYYFx0M9A0eVHn32F30/5Gu0Drj5OBGyTIUg89cz4ylTuXNCBekcgrvUBBvzrnRhedy/LErROrR6o5oHUr6PmT9aNGZ70B3V1U2w4MxHl6WLiiYm03meduRol/ILvT0dteTYGPORXY/mX4OTeM+KqE= Received: by 10.48.231.6 with SMTP id d6mr523703nfh; Thu, 06 Jul 2006 07:54:14 -0700 (PDT) Received: from ?192.168.0.24? ( [194.3.162.233]) by mx.gmail.com with ESMTP id r33sm8288584nfc.2006.07.06.07.54.13; Thu, 06 Jul 2006 07:54:13 -0700 (PDT) Message-ID: <44AD2537.1030509@innova-card.com> Date: Thu, 06 Jul 2006 16:59:03 +0200 Reply-To: Franck User-Agent: Thunderbird 1.5.0.2 (X11/20060501) MIME-Version: 1.0 To: Atsushi Nemoto CC: vagabon.xyz@gmail.com, linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] do not count pages in holes with sparsemem References: <44ABC59C.6070607@innova-card.com> <20060705.231737.59032119.anemo@mba.ocn.ne.jp> <44AD0C2B.7060204@innova-card.com> <20060706.233634.59465089.anemo@mba.ocn.ne.jp> In-Reply-To: <20060706.233634.59465089.anemo@mba.ocn.ne.jp> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11922 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips Atsushi Nemoto wrote: > On Thu, 06 Jul 2006 15:12:11 +0200, Franck Bui-Huu wrote: >> Ok thinking more about it, some platforms may have physical memory >> that doesn't start at 0. MIPS doesn't support such platform though it >> should be fairly easy. In that case __pa should be defined as: >> >> #define __pa(x) ((unsigned long) (x) - PAGE_OFFSET + PFN_PHYS(ARCH_PFN_OFFSET)) >> >> and use in your patch: >> >> free_area_init_node(0, NODE_DATA(0), zones_size, ARCH_PFN_OFFSET, zholes_size); >> >> So I would recommend to use ARCH_PFN_OFFSET. > > Well, currently ARCH_PFN_OFFSET is defined in > asm-generic/memory_model.h only for FLATMEM case. I think other > memory models do not need it because it is just a case that a first > hole begins at pfn 0. > That's true, I thought it was defined whatever the mem models... what about this, on top of your patch ? -- >8 -- diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index c6e684d..eb1b3fc 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c @@ -166,8 +166,8 @@ void __init paging_init(void) { unsigned long zones_size[] = { [0 ... MAX_NR_ZONES - 1] = 0 }; unsigned long max_dma, high, low; - unsigned long zholes_size[] = { [0 ... MAX_NR_ZONES - 1] = 0 }; #ifndef CONFIG_FLATMEM + unsigned long zholes_size[] = { [0 ... MAX_NR_ZONES - 1] = 0 }; unsigned long i, j, pfn; #endif @@ -207,8 +207,10 @@ #ifndef CONFIG_FLATMEM for (j = 0; j < zones_size[i]; j++, pfn++) if (!page_is_ram(pfn)) zholes_size[i]++; -#endif free_area_init_node(0, NODE_DATA(0), zones_size, 0, zholes_size); +#else + free_area_init_node(0, NODE_DATA(0), zones_size, ARCH_PFN_OFFSET, NULL); +#endif } static struct kcore_list kcore_mem, kcore_vmalloc; From vagabon.xyz@gmail.com Thu Jul 6 16:05:36 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 Jul 2006 16:05:46 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.174]:29019 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S3466417AbWGFPFg (ORCPT ); Thu, 6 Jul 2006 16:05:36 +0100 Received: by ug-out-1314.google.com with SMTP id k3so2155542ugf for ; Thu, 06 Jul 2006 08:05:36 -0700 (PDT) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=KjATFb+4IkDMblfk2E/xlQIIqIgnf54EL6Ocx+D2nK83XiI05qIyf/Bm0AVvvQYTaxo0nbznSYKgqtKSCXh/WNOzr9QHaY/6jklk4LTbM26Vkt1glLOtWrkdOOzYJI20Dzk8e/MODsXuOKiwKCVYQ1WUtoDNFHJFy+L0XNN7A0Q= Received: by 10.67.100.17 with SMTP id c17mr825964ugm; Thu, 06 Jul 2006 08:05:35 -0700 (PDT) Received: by 10.67.100.10 with HTTP; Thu, 6 Jul 2006 08:05:35 -0700 (PDT) Message-ID: Date: Thu, 6 Jul 2006 17:05:35 +0200 From: "Franck Bui-Huu" To: "Atsushi Nemoto" Subject: Re: [PATCH] do not count pages in holes with sparsemem Cc: vagabon.xyz@gmail.com, linux-mips@linux-mips.org, ralf@linux-mips.org In-Reply-To: <44AD2537.1030509@innova-card.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <44ABC59C.6070607@innova-card.com> <20060705.231737.59032119.anemo@mba.ocn.ne.jp> <44AD0C2B.7060204@innova-card.com> <20060706.233634.59465089.anemo@mba.ocn.ne.jp> <44AD2537.1030509@innova-card.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11923 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips 2006/7/6, Franck Bui-Huu : > @@ -207,8 +207,10 @@ #ifndef CONFIG_FLATMEM > for (j = 0; j < zones_size[i]; j++, pfn++) > if (!page_is_ram(pfn)) > zholes_size[i]++; > -#endif > free_area_init_node(0, NODE_DATA(0), zones_size, 0, zholes_size); > +#else > + free_area_init_node(0, NODE_DATA(0), zones_size, ARCH_PFN_OFFSET, NULL); which is equivalent to: free_area_init(zones_size); -- Franck From anemo@mba.ocn.ne.jp Thu Jul 6 16:24:56 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 Jul 2006 16:25:11 +0100 (BST) Received: from mba.ocn.ne.jp ([210.190.142.172]:42480 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S3466417AbWGFPY4 (ORCPT ); Thu, 6 Jul 2006 16:24:56 +0100 Received: from localhost (p4085-ipad209funabasi.chiba.ocn.ne.jp [58.88.115.85]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 2B3FDAE85; Fri, 7 Jul 2006 00:24:52 +0900 (JST) Date: Fri, 07 Jul 2006 00:26:02 +0900 (JST) Message-Id: <20060707.002602.75184460.anemo@mba.ocn.ne.jp> To: vagabon.xyz@gmail.com Cc: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] do not count pages in holes with sparsemem From: Atsushi Nemoto In-Reply-To: References: <20060706.233634.59465089.anemo@mba.ocn.ne.jp> <44AD2537.1030509@innova-card.com> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11924 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Thu, 6 Jul 2006 17:05:35 +0200, "Franck Bui-Huu" wrote: > > free_area_init_node(0, NODE_DATA(0), zones_size, 0, zholes_size); > > +#else > > + free_area_init_node(0, NODE_DATA(0), zones_size, ARCH_PFN_OFFSET, NULL); > > which is equivalent to: > > free_area_init(zones_size); Sure. Then this can be a final proposal? With some memory model other than FLATMEM, the single node can contains some holes so there might be many invalid pages. For example, with two 256M memory and one 256M hole, some variables (num_physpage, totalpages, nr_kernel_pages, nr_all_pages, etc.) will indicate that there are 768MB on this system. This is not desired because, for example, alloc_large_system_hash() allocates too many entries. Use free_area_init_node() with counted zholes_size[] instead of free_area_init(). For num_physpages, use number of ram pages instead of max_low_pfn. Signed-off-by: Atsushi Nemoto diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 802bdd3..c52497b 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c @@ -139,10 +139,36 @@ #endif /* CONFIG_HIGHMEM */ #ifndef CONFIG_NEED_MULTIPLE_NODES extern void pagetable_init(void); +static int __init page_is_ram(unsigned long pagenr) +{ + int i; + + for (i = 0; i < boot_mem_map.nr_map; i++) { + unsigned long addr, end; + + if (boot_mem_map.map[i].type != BOOT_MEM_RAM) + /* not usable memory */ + continue; + + addr = PFN_UP(boot_mem_map.map[i].addr); + end = PFN_DOWN(boot_mem_map.map[i].addr + + boot_mem_map.map[i].size); + + if (pagenr >= addr && pagenr < end) + return 1; + } + + return 0; +} + void __init paging_init(void) { - unsigned long zones_size[MAX_NR_ZONES] = {0, 0, 0}; + unsigned long zones_size[] = { [0 ... MAX_NR_ZONES - 1] = 0 }; unsigned long max_dma, high, low; +#ifndef CONFIG_FLATMEM + unsigned long zholes_size[] = { [0 ... MAX_NR_ZONES - 1] = 0 }; + unsigned long i, j, pfn; +#endif pagetable_init(); @@ -174,29 +200,16 @@ #ifdef CONFIG_HIGHMEM zones_size[ZONE_HIGHMEM] = high - low; #endif +#ifdef CONFIG_FLATMEM free_area_init(zones_size); -} - -static inline int page_is_ram(unsigned long pagenr) -{ - int i; - - for (i = 0; i < boot_mem_map.nr_map; i++) { - unsigned long addr, end; - - if (boot_mem_map.map[i].type != BOOT_MEM_RAM) - /* not usable memory */ - continue; - - addr = PFN_UP(boot_mem_map.map[i].addr); - end = PFN_DOWN(boot_mem_map.map[i].addr + - boot_mem_map.map[i].size); - - if (pagenr >= addr && pagenr < end) - return 1; - } - - return 0; +#else + pfn = 0; + for (i = 0; i < MAX_NR_ZONES; i++) + for (j = 0; j < zones_size[i]; j++, pfn++) + if (!page_is_ram(pfn)) + zholes_size[i]++; + free_area_init_node(0, NODE_DATA(0), zones_size, 0, zholes_size); +#endif } static struct kcore_list kcore_mem, kcore_vmalloc; @@ -213,9 +226,9 @@ #ifdef CONFIG_HIGHMEM #ifdef CONFIG_DISCONTIGMEM #error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet" #endif - max_mapnr = num_physpages = highend_pfn; + max_mapnr = highend_pfn; #else - max_mapnr = num_physpages = max_low_pfn; + max_mapnr = max_low_pfn; #endif high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT); @@ -229,6 +242,7 @@ #endif if (PageReserved(pfn_to_page(tmp))) reservedpages++; } + num_physpages = ram; #ifdef CONFIG_HIGHMEM for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) { @@ -247,6 +261,7 @@ #endif totalhigh_pages++; } totalram_pages += totalhigh_pages; + num_physpages += totalhigh_pages; #endif codesize = (unsigned long) &_etext - (unsigned long) &_text; From ralf@linux-mips.org Thu Jul 6 18:33:03 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 Jul 2006 18:33:11 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:53180 "EHLO bacchus.dhis.org") by ftp.linux-mips.org with ESMTP id S3489795AbWGFRdD (ORCPT ); Thu, 6 Jul 2006 18:33:03 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by bacchus.dhis.org (8.13.6/8.13.4) with ESMTP id k66HWrex005057; Thu, 6 Jul 2006 18:32:53 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.13.6/8.13.6/Submit) id k66HWaHi005056; Thu, 6 Jul 2006 18:32:36 +0100 Date: Thu, 6 Jul 2006 18:32:36 +0100 From: Ralf Baechle To: Atsushi Nemoto Cc: vagabon.xyz@gmail.com, linux-mips@linux-mips.org Subject: Re: [PATCH] sparsemem fix Message-ID: <20060706173235.GA4739@linux-mips.org> References: <20060705.012244.96686002.anemo@mba.ocn.ne.jp> <44AB79D0.90002@innova-card.com> <20060705.192054.128618288.nemoto@toshiba-tops.co.jp> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20060705.192054.128618288.nemoto@toshiba-tops.co.jp> User-Agent: Mutt/1.4.2.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11925 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Wed, Jul 05, 2006 at 07:20:54PM +0900, Atsushi Nemoto wrote: > > For now it seems to be implemented only in sgi-ip27 machine. Maybe we should > > make things clear by adding: > > > > #ifdef CONFIG_SGI_IP27 > > #define pfn_valid [...] > > #else The fact that the code is only used on IP27 doesn't mean it is IP27-specific. > > #error discontigmem model is only supported by sgi-ip27 platforms. > > #error Please try to implement a generic solution if you plan to > > #error use this memory model. Good luck ;) > > #endif /* CONFIG_SGI_IP27 */ > > Though the pfn_valid() is only used by ip27 for now, I suppose it > could be used other NUMA systems (not sure). Yes, and there will be one or two more NUMA systems. Ralf From ralf@linux-mips.org Thu Jul 6 18:37:30 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 Jul 2006 18:37:38 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:41900 "EHLO bacchus.dhis.org") by ftp.linux-mips.org with ESMTP id S3489809AbWGFRh3 (ORCPT ); Thu, 6 Jul 2006 18:37:29 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by bacchus.dhis.org (8.13.6/8.13.4) with ESMTP id k66HbTBE005088; Thu, 6 Jul 2006 18:37:29 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.13.6/8.13.6/Submit) id k66HbTZh005087; Thu, 6 Jul 2006 18:37:29 +0100 Date: Thu, 6 Jul 2006 18:37:29 +0100 From: Ralf Baechle To: Franck Bui-Huu Cc: Atsushi Nemoto , linux-mips@linux-mips.org Subject: Re: [PATCH] sparsemem fix Message-ID: <20060706173729.GB4739@linux-mips.org> References: <20060705.012244.96686002.anemo@mba.ocn.ne.jp> <44AB79D0.90002@innova-card.com> <20060705.192054.128618288.nemoto@toshiba-tops.co.jp> <44AB99AD.8000403@innova-card.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <44AB99AD.8000403@innova-card.com> User-Agent: Mutt/1.4.2.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11926 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Wed, Jul 05, 2006 at 12:51:25PM +0200, Franck Bui-Huu wrote: > no the code related to NUMA is embedded in ip27 directory. So if > someone has another NUMA system, she should (a) copy all the stuff > in its platform directory or (b) make a generic solution maybe based > on ip27 one for all others NUMA platforms. But in the second case, > the NUMA implementation is going to be modified heavily (a guess) > and probably same for pfn_valid definition. > > The previous change makes things clear: for now, you can't use > pfn_valid when NUMA or DISCONTIGMEM configs without some reworks. Most of the related IP27 code bits are for initialization. Ralf From sshtylyov@ru.mvista.com Thu Jul 6 22:26:43 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 Jul 2006 22:26:52 +0100 (BST) Received: from h155.mvista.com ([63.81.120.155]:52713 "EHLO imap.sh.mvista.com") by ftp.linux-mips.org with ESMTP id S3489828AbWGFV0n (ORCPT ); Thu, 6 Jul 2006 22:26:43 +0100 Received: from [192.168.1.248] (unknown [10.150.0.9]) by imap.sh.mvista.com (Postfix) with ESMTP id 604B63EC9; Thu, 6 Jul 2006 14:26:21 -0700 (PDT) Message-ID: <44AD7FBA.8000203@ru.mvista.com> Date: Fri, 07 Jul 2006 01:25:14 +0400 From: Sergei Shtylyov Organization: MontaVista Software Inc. User-Agent: Mozilla/5.0 (X11; U; Linux i686; rv:1.7.2) Gecko/20040803 X-Accept-Language: ru, en-us, en-gb MIME-Version: 1.0 To: ralf@linux-mips.org, Linux-MIPS Cc: a.voropay@equant.ru Subject: [PATCH] Fix process crash in 2.4 on attempt to use FPU on MIPS32 Content-Type: multipart/mixed; boundary="------------080003060807040507050809" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11927 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sshtylyov@ru.mvista.com Precedence: bulk X-list: linux-mips This is a multi-part message in MIME format. --------------080003060807040507050809 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit If there's built-in FPU in a MIPS32 CPU the first time the process tries to use it, the kernel should crash with "reserved instruction" -- CPU will try to execute 'dmtc1' which is a MIPS64 only insn. _init_fpu() was apprently blindly copied form arch/mips64/... :-) Since this occured with GXemul recently resending this 1.5 year old patch. Signed-off-by: Sergei Shtylyov --------------080003060807040507050809 Content-Type: text/plain; name="MIPS32-FPU-init-2.4.patch" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="MIPS32-FPU-init-2.4.patch" diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S index 1999483..30b67c8 100644 --- a/arch/mips/kernel/r4k_switch.S +++ b/arch/mips/kernel/r4k_switch.S @@ -134,7 +134,6 @@ LEAF(_restore_fp) #define FPU_DEFAULT 0x00000000 LEAF(_init_fpu) - .set mips3 mfc0 t0, CP0_STATUS li t1, ST0_CU1 or t0, t1 @@ -146,24 +145,40 @@ LEAF(_init_fpu) li t0, -1 - dmtc1 t0, $f0 - dmtc1 t0, $f2 - dmtc1 t0, $f4 - dmtc1 t0, $f6 - dmtc1 t0, $f8 - dmtc1 t0, $f10 - dmtc1 t0, $f12 - dmtc1 t0, $f14 - dmtc1 t0, $f16 - dmtc1 t0, $f18 - dmtc1 t0, $f20 - dmtc1 t0, $f22 - dmtc1 t0, $f24 - dmtc1 t0, $f26 - dmtc1 t0, $f28 + mtc1 t0, $f0 + mtc1 t0, $f1 + mtc1 t0, $f2 + mtc1 t0, $f3 + mtc1 t0, $f4 + mtc1 t0, $f5 + mtc1 t0, $f6 + mtc1 t0, $f7 + mtc1 t0, $f8 + mtc1 t0, $f9 + mtc1 t0, $f10 + mtc1 t0, $f11 + mtc1 t0, $f12 + mtc1 t0, $f13 + mtc1 t0, $f14 + mtc1 t0, $f15 + mtc1 t0, $f16 + mtc1 t0, $f17 + mtc1 t0, $f18 + mtc1 t0, $f19 + mtc1 t0, $f20 + mtc1 t0, $f21 + mtc1 t0, $f22 + mtc1 t0, $f23 + mtc1 t0, $f24 + mtc1 t0, $f25 + mtc1 t0, $f26 + mtc1 t0, $f27 + mtc1 t0, $f28 + mtc1 t0, $f29 + mtc1 t0, $f30 .set noreorder jr ra - dmtc1 t0, $f30 .set reorder + mtc1 t0, $f31 END(_init_fpu) --------------080003060807040507050809-- From ralf@linux-mips.org Thu Jul 6 23:57:26 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 06 Jul 2006 23:57:36 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:61893 "EHLO bacchus.dhis.org") by ftp.linux-mips.org with ESMTP id S3489839AbWGFW50 (ORCPT ); Thu, 6 Jul 2006 23:57:26 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by bacchus.dhis.org (8.13.6/8.13.4) with ESMTP id k66MvMSx018434; Thu, 6 Jul 2006 23:57:22 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.13.6/8.13.6/Submit) id k66MvIG9018433; Thu, 6 Jul 2006 23:57:18 +0100 Date: Thu, 6 Jul 2006 23:57:18 +0100 From: Ralf Baechle To: Sergei Shtylyov Cc: Linux-MIPS , a.voropay@equant.ru Subject: Re: [PATCH] Fix process crash in 2.4 on attempt to use FPU on MIPS32 Message-ID: <20060706225718.GA18284@linux-mips.org> References: <44AD7FBA.8000203@ru.mvista.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <44AD7FBA.8000203@ru.mvista.com> User-Agent: Mutt/1.4.2.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11928 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Fri, Jul 07, 2006 at 01:25:14AM +0400, Sergei Shtylyov wrote: > If there's built-in FPU in a MIPS32 CPU the first time the process tries > to use it, the kernel should crash with "reserved instruction" -- CPU will > try > to execute 'dmtc1' which is a MIPS64 only insn. _init_fpu() was apprently > blindly copied form arch/mips64/... :-) > > Since this occured with GXemul recently resending this 1.5 year old patch. I didn't like the patch back then because it drops the optimizations for 64-bit processors. So I just took the 2.6 variant of the code and bolted it into 2.4. Ralf From zzh.hust@gmail.com Fri Jul 7 06:12:24 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 07 Jul 2006 06:12:33 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.173]:34154 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S8127208AbWGGFMY (ORCPT ); Fri, 7 Jul 2006 06:12:24 +0100 Received: by ug-out-1314.google.com with SMTP id k3so2416516ugf for ; Thu, 06 Jul 2006 22:12:23 -0700 (PDT) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:mime-version:content-type:content-transfer-encoding:content-disposition; b=B9CkXO+oIzVK5npAJRsm8Ofz46Rh1YLOuGPHOixYobLSAnkQtSP/BI6JbplMEhpTvhJuzgluo/k6E3dZGvPArEXCBJ1A8CtO8wkdTWoCJfOVAb13IYimQY82T2MQfbyxo8rtrTM78Bba9wBbgEm9zlz5DBzQ39Um36x9yE8I5vQ= Received: by 10.67.29.12 with SMTP id g12mr1549838ugj; Thu, 06 Jul 2006 22:12:23 -0700 (PDT) Received: by 10.66.242.15 with HTTP; Thu, 6 Jul 2006 22:12:23 -0700 (PDT) Message-ID: <50c9a2250607062212w70de956ax7aefd4f131ae9396@mail.gmail.com> Date: Fri, 7 Jul 2006 13:12:23 +0800 From: zhuzhenhua To: linux-mips Subject: "Error -3 while decompressing!" while use cramfs as rootfs MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11929 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zzh.hust@gmail.com Precedence: bulk X-list: linux-mips i have write a rootfs.cramfs to mtdblock2, and if i use nfsroot, and can mount /dev/mtdblock2 correctly.but if i use /dev/mtdblock2 as rootfs with bootargs "root/dev/mtdblock2 rootfstype=cramfs" the kernel output next messages .... VFS: Mounted root (cramfs filesystem) readonly. Freeing unused kernel memory: 144k freed Error -3 while decompressing! 805bf6a8(-2046512)->81218000(4096) Error -3 while decompressing! 803cc4fc(26)->8121e000(4096) Error -3 while decompressing! 803cc516(26)->8121f000(4096) Error -3 while decompressing! 803cc530(26)->803a0000(4096) .... my kernel version is 2.6.14, flash is SST39VF3201, nor flash, 4M Byte does anyone have idea about this situation? thanks for any hints Best Regards zhuzhenhua From anemo@mba.ocn.ne.jp Fri Jul 7 06:26:50 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 07 Jul 2006 06:26:59 +0100 (BST) Received: from topsns2.toshiba-tops.co.jp ([202.230.225.126]:53713 "EHLO topsns2.toshiba-tops.co.jp") by ftp.linux-mips.org with ESMTP id S3466138AbWGGF0u (ORCPT ); Fri, 7 Jul 2006 06:26:50 +0100 Received: from topsms.toshiba-tops.co.jp by topsns2.toshiba-tops.co.jp via smtpd (for ftp.linux-mips.org [194.74.144.162]) with ESMTP; Fri, 7 Jul 2006 14:26:48 +0900 Received: from topsms.toshiba-tops.co.jp (localhost.localdomain [127.0.0.1]) by localhost.toshiba-tops.co.jp (Postfix) with ESMTP id B40A9202F9; Fri, 7 Jul 2006 14:26:42 +0900 (JST) Received: from srd2sd.toshiba-tops.co.jp (srd2sd.toshiba-tops.co.jp [172.17.28.2]) by topsms.toshiba-tops.co.jp (Postfix) with ESMTP id A01A41F5D9; Fri, 7 Jul 2006 14:26:42 +0900 (JST) Received: from localhost (fragile [172.17.28.65]) by srd2sd.toshiba-tops.co.jp (8.12.10/8.12.10) with ESMTP id k675QfW0005409; Fri, 7 Jul 2006 14:26:41 +0900 (JST) (envelope-from anemo@mba.ocn.ne.jp) Date: Fri, 07 Jul 2006 14:26:41 +0900 (JST) Message-Id: <20060707.142641.122254596.nemoto@toshiba-tops.co.jp> To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org, ths@networkno.de Subject: [PATCH] fix rdhwr_op definition From: Atsushi Nemoto X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.3 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11930 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips Signed-off-by: Atsushi Nemoto diff --git a/include/asm-mips/inst.h b/include/asm-mips/inst.h index 1ed8d0f..6489f00 100644 --- a/include/asm-mips/inst.h +++ b/include/asm-mips/inst.h @@ -74,7 +74,7 @@ enum spec3_op { ins_op, dinsm_op, dinsu_op, dins_op, bshfl_op = 0x20, dbshfl_op = 0x24, - rdhwr_op = 0x3f + rdhwr_op = 0x3b }; /* From ths@networkno.de Fri Jul 7 08:43:11 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 07 Jul 2006 08:43:21 +0100 (BST) Received: from bender.bawue.de ([193.7.176.20]:59371 "EHLO bender.bawue.de") by ftp.linux-mips.org with ESMTP id S8133361AbWGGHnL (ORCPT ); Fri, 7 Jul 2006 08:43:11 +0100 Received: from lagash (88-106-172-167.dynamic.dsl.as9105.com [88.106.172.167]) (using TLSv1 with cipher DES-CBC3-SHA (168/168 bits)) (No client certificate requested) by bender.bawue.de (Postfix) with ESMTP id D73A44542A; Fri, 7 Jul 2006 09:43:10 +0200 (MEST) Received: from ths by lagash with local (Exim 4.62) (envelope-from ) id 1Fyk6Y-00045e-Jx; Fri, 07 Jul 2006 07:46:22 +0100 Date: Fri, 7 Jul 2006 07:46:22 +0100 From: Thiemo Seufer To: Atsushi Nemoto Cc: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] fix rdhwr_op definition Message-ID: <20060707064622.GB4274@networkno.de> References: <20060707.142641.122254596.nemoto@toshiba-tops.co.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20060707.142641.122254596.nemoto@toshiba-tops.co.jp> User-Agent: Mutt/1.5.11+cvs20060403 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11931 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ths@networkno.de Precedence: bulk X-list: linux-mips Atsushi Nemoto wrote: > Signed-off-by: Atsushi Nemoto > > diff --git a/include/asm-mips/inst.h b/include/asm-mips/inst.h > index 1ed8d0f..6489f00 100644 > --- a/include/asm-mips/inst.h > +++ b/include/asm-mips/inst.h > @@ -74,7 +74,7 @@ enum spec3_op { > ins_op, dinsm_op, dinsu_op, dins_op, > bshfl_op = 0x20, > dbshfl_op = 0x24, > - rdhwr_op = 0x3f > + rdhwr_op = 0x3b Correct, thanks for catching this. Thiemo From ths@networkno.de Fri Jul 7 10:38:55 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 07 Jul 2006 10:39:04 +0100 (BST) Received: from bender.bawue.de ([193.7.176.20]:12699 "EHLO bender.bawue.de") by ftp.linux-mips.org with ESMTP id S8133435AbWGGJiz (ORCPT ); Fri, 7 Jul 2006 10:38:55 +0100 Received: from lagash (88-106-172-167.dynamic.dsl.as9105.com [88.106.172.167]) (using TLSv1 with cipher DES-CBC3-SHA (168/168 bits)) (No client certificate requested) by bender.bawue.de (Postfix) with ESMTP id BDC2845769; Fri, 7 Jul 2006 11:38:54 +0200 (MEST) Received: from ths by lagash with local (Exim 4.62) (envelope-from ) id 1FymnU-0005CR-0x; Fri, 07 Jul 2006 10:38:52 +0100 Date: Fri, 7 Jul 2006 10:38:51 +0100 To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: [PATCH] Fix build failure in op_model_mipsxx.c Message-ID: <20060707093851.GC4274@networkno.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.11+cvs20060403 From: Thiemo Seufer Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11932 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ths@networkno.de Precedence: bulk X-list: linux-mips Hello All, this fixes a build warning which gets handled as -Werror. Thiemo Signed-off-by: Thiemo Seufer diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c index a09c5f9..a175d67 100644 --- a/arch/mips/oprofile/op_model_mipsxx.c +++ b/arch/mips/oprofile/op_model_mipsxx.c @@ -49,6 +49,7 @@ static inline unsigned int r_c0_ ## r ## default: \ BUG(); \ } \ + return 0; \ } \ \ static inline void w_c0_ ## r ## n(unsigned int value) \ @@ -65,6 +66,7 @@ static inline void w_c0_ ## r ## n(unsig default: \ BUG(); \ } \ + return; \ } \ __define_perf_accessors(perfcntr, 0, 2) From anemo@mba.ocn.ne.jp Fri Jul 7 15:59:23 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 07 Jul 2006 15:59:33 +0100 (BST) Received: from mba.ocn.ne.jp ([210.190.142.172]:50892 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S8133487AbWGGO7X (ORCPT ); Fri, 7 Jul 2006 15:59:23 +0100 Received: from localhost (p1163-ipad206funabasi.chiba.ocn.ne.jp [222.146.104.163]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 6E794951A; Fri, 7 Jul 2006 23:59:16 +0900 (JST) Date: Sat, 08 Jul 2006 00:00:32 +0900 (JST) Message-Id: <20060708.000032.88471510.anemo@mba.ocn.ne.jp> To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: [PATCH] fast path for rdhwr emulation for TLS From: Atsushi Nemoto X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11933 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips Adding special short path for emulationg RDHWR which is used to support TLS. Signed-off-by: Atsushi Nemoto diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index b563811..545bcb1 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S @@ -357,7 +357,7 @@ #endif BUILD_HANDLER ibe be cli silent /* #6 */ BUILD_HANDLER dbe be cli silent /* #7 */ BUILD_HANDLER bp bp sti silent /* #9 */ - BUILD_HANDLER ri ri sti silent /* #10 */ + BUILD_HANDLER ri_slow ri sti silent /* #10 */ BUILD_HANDLER cpu cpu sti silent /* #11 */ BUILD_HANDLER ov ov sti silent /* #12 */ BUILD_HANDLER tr tr sti silent /* #13 */ @@ -369,6 +369,39 @@ #endif BUILD_HANDLER dsp dsp sti silent /* #26 */ BUILD_HANDLER reserved reserved sti verbose /* others */ + .align 5 + LEAF(handle_ri) + .set push + .set noat + mfc0 k0, CP0_CAUSE + MFC0 k1, CP0_EPC + bltz k0, handle_ri_slow /* if delay slot */ + lw k0, (k1) + li k1, 0x7c03e83b /* rdhwr v1,$29 */ + bne k0, k1, handle_ri_slow /* if not ours */ + get_saved_sp /* k1 := current_thread_info */ + MFC0 k0, CP0_EPC + LONG_ADDIU k0, 4 + .set noreorder +#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) + ori k1, _THREAD_MASK + xori k1, _THREAD_MASK + LONG_L v1, TI_TP_VALUE(k1) + jr k0 + rfe +#else + /* I hope three instructions between MTC0 and ERET are enough... */ + MTC0 k0, CP0_EPC + ori k1, _THREAD_MASK + xori k1, _THREAD_MASK + LONG_L v1, TI_TP_VALUE(k1) + .set mips3 + eret + .set mips0 +#endif + .set pop + END(handle_ri) + #ifdef CONFIG_64BIT /* A temporary overflow handler used by check_daddi(). */ From macro@linux-mips.org Fri Jul 7 16:22:49 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 07 Jul 2006 16:22:58 +0100 (BST) Received: from pollux.ds.pg.gda.pl ([153.19.208.7]:40714 "EHLO pollux.ds.pg.gda.pl") by ftp.linux-mips.org with ESMTP id S8133492AbWGGPWt (ORCPT ); Fri, 7 Jul 2006 16:22:49 +0100 Received: from localhost (localhost [127.0.0.1]) by pollux.ds.pg.gda.pl (Postfix) with ESMTP id 80FC6F65E4; Fri, 7 Jul 2006 17:22:42 +0200 (CEST) Received: from pollux.ds.pg.gda.pl ([127.0.0.1]) by localhost (pollux.ds.pg.gda.pl [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 10458-06; Fri, 7 Jul 2006 17:22:42 +0200 (CEST) Received: from piorun.ds.pg.gda.pl (piorun.ds.pg.gda.pl [153.19.208.8]) by pollux.ds.pg.gda.pl (Postfix) with ESMTP id 25BDCF65D9; Fri, 7 Jul 2006 17:22:42 +0200 (CEST) Received: from blysk.ds.pg.gda.pl (macro@blysk.ds.pg.gda.pl [153.19.208.6]) by piorun.ds.pg.gda.pl (8.13.7/8.13.1) with ESMTP id k67FMp59004760; Fri, 7 Jul 2006 17:22:51 +0200 Date: Fri, 7 Jul 2006 16:22:46 +0100 (BST) From: "Maciej W. Rozycki" To: Atsushi Nemoto cc: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] fast path for rdhwr emulation for TLS In-Reply-To: <20060708.000032.88471510.anemo@mba.ocn.ne.jp> Message-ID: References: <20060708.000032.88471510.anemo@mba.ocn.ne.jp> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Virus-Scanned: ClamAV 0.88.2/1588/Fri Jul 7 15:54:23 2006 on piorun.ds.pg.gda.pl X-Virus-Status: Clean X-Virus-Scanned: by amavisd-new at pollux.ds.pg.gda.pl Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11934 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@linux-mips.org Precedence: bulk X-list: linux-mips On Sat, 8 Jul 2006, Atsushi Nemoto wrote: > Adding special short path for emulationg RDHWR which is used to > support TLS. You need to take care of VIVT I-caches. > @@ -369,6 +369,39 @@ #endif > BUILD_HANDLER dsp dsp sti silent /* #26 */ > BUILD_HANDLER reserved reserved sti verbose /* others */ > > + .align 5 > + LEAF(handle_ri) > + .set push > + .set noat > + mfc0 k0, CP0_CAUSE > + MFC0 k1, CP0_EPC > + bltz k0, handle_ri_slow /* if delay slot */ > + lw k0, (k1) For a VIVT I-cache this can result in a TLB exception. TLB handlers are not currently prepared for being called at the exception level. Also I am fairly sure gas won't fill the branch delay slot above -- a trivial rearrangement of code would save a cycle here (and this is a fast path, so we do not want wasting time). > + li k1, 0x7c03e83b /* rdhwr v1,$29 */ > + bne k0, k1, handle_ri_slow /* if not ours */ > + get_saved_sp /* k1 := current_thread_info */ > + MFC0 k0, CP0_EPC > + LONG_ADDIU k0, 4 I suggest moving MFC0 ahead of get_saved_sp to avoid a stall. I would fit in the branch delay slot nicely. Maciej From yoichi_yuasa@tripeaks.co.jp Fri Jul 7 16:42:09 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 07 Jul 2006 16:42:18 +0100 (BST) Received: from mo30.po.2iij.net ([210.128.50.53]:29764 "EHLO mo30.po.2iij.net") by ftp.linux-mips.org with ESMTP id S8133495AbWGGPmJ (ORCPT ); Fri, 7 Jul 2006 16:42:09 +0100 Received: by mo.po.2iij.net (mo30) id k67Fg64p018143; Sat, 8 Jul 2006 00:42:06 +0900 (JST) Received: from localhost.localdomain (225.29.30.125.dy.iij4u.or.jp [125.30.29.225]) by mbox.po.2iij.net (mbox32) id k67Fg234030353 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Sat, 8 Jul 2006 00:42:03 +0900 (JST) Date: Sat, 8 Jul 2006 00:42:01 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: linux-mips Subject: [PATCH 1/2] vr41xx: changed the workaround to recommended method Message-Id: <20060708004201.3a677b9c.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11935 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has changed the workaround to recommended method. Please apply. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/mm/c-r4k.c mips/arch/mips/mm/c-r4k.c --- mips-orig/arch/mips/mm/c-r4k.c 2006-07-06 17:54:34.149940250 +0900 +++ mips/arch/mips/mm/c-r4k.c 2006-07-06 18:00:15.249128000 +0900 @@ -867,12 +867,13 @@ static void __init probe_pcache(void) /* Workaround for cache instruction bug of VR4131 */ if (c->processor_id == 0x0c80U || c->processor_id == 0x0c81U || c->processor_id == 0x0c82U) { - config &= ~0x00000030U; config |= 0x00400000U; if (c->processor_id == 0x0c80U) config |= VR41_CONF_BP; write_c0_config(config); - } + } else + c->options |= MIPS_CPU_CACHE_CDEX_P; + icache_size = 1 << (10 + ((config & CONF_IC) >> 9)); c->icache.linesz = 16 << ((config & CONF_IB) >> 5); c->icache.ways = 2; @@ -882,8 +883,6 @@ static void __init probe_pcache(void) c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); c->dcache.ways = 2; c->dcache.waybit = __ffs(dcache_size/2); - - c->options |= MIPS_CPU_CACHE_CDEX_P; break; case CPU_VR41XX: From yoichi_yuasa@tripeaks.co.jp Fri Jul 7 16:42:47 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 07 Jul 2006 16:43:01 +0100 (BST) Received: from mo31.po.2iij.net ([210.128.50.54]:33869 "EHLO mo31.po.2iij.net") by ftp.linux-mips.org with ESMTP id S8133502AbWGGPmV (ORCPT ); Fri, 7 Jul 2006 16:42:21 +0100 Received: by mo.po.2iij.net (mo31) id k67FgIp1083828; Sat, 8 Jul 2006 00:42:18 +0900 (JST) Received: from localhost.localdomain (225.29.30.125.dy.iij4u.or.jp [125.30.29.225]) by mbox.po.2iij.net (mbox32) id k67FgD5t030391 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Sat, 8 Jul 2006 00:42:14 +0900 (JST) Date: Sat, 8 Jul 2006 00:42:12 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: linux-mips Subject: [PATCH 2/2] vr41xx: define P4K bit for VR41xx Message-Id: <20060708004212.52cbf512.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11936 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has defined P4K bit for VR41xx. Please apply. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/mm/c-r4k.c mips/arch/mips/mm/c-r4k.c --- mips-orig/arch/mips/mm/c-r4k.c 2006-07-06 18:03:06.162320750 +0900 +++ mips/arch/mips/mm/c-r4k.c 2006-07-06 18:03:13.127272250 +0900 @@ -862,7 +862,7 @@ static void __init probe_pcache(void) break; case CPU_VR4133: - write_c0_config(config & ~CONF_EB); + write_c0_config(config & ~VR41_CONF_P4K); case CPU_VR4131: /* Workaround for cache instruction bug of VR4131 */ if (c->processor_id == 0x0c80U || c->processor_id == 0x0c81U || diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/mipsregs.h mips/include/asm-mips/mipsregs.h --- mips-orig/include/asm-mips/mipsregs.h 2006-07-06 17:49:45.931927750 +0900 +++ mips/include/asm-mips/mipsregs.h 2006-07-06 18:09:30.443242500 +0900 @@ -470,6 +470,7 @@ /* Bits specific to the VR41xx. */ #define VR41_CONF_CS (_ULCAST_(1) << 12) +#define VR41_CONF_P4K (_ULCAST_(1) << 13) #define VR41_CONF_BP (_ULCAST_(1) << 16) #define VR41_CONF_M16 (_ULCAST_(1) << 20) #define VR41_CONF_AD (_ULCAST_(1) << 23) From yoichi_yuasa@tripeaks.co.jp Fri Jul 7 16:51:20 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 07 Jul 2006 16:51:29 +0100 (BST) Received: from mo32.po.2iij.net ([210.128.50.17]:56842 "EHLO mo32.po.2iij.net") by ftp.linux-mips.org with ESMTP id S8133498AbWGGPvU (ORCPT ); Fri, 7 Jul 2006 16:51:20 +0100 Received: by mo.po.2iij.net (mo32) id k67FpHfY065727; Sat, 8 Jul 2006 00:51:17 +0900 (JST) Received: from localhost.localdomain (225.29.30.125.dy.iij4u.or.jp [125.30.29.225]) by mbox.po.2iij.net (mbox32) id k67FpCrB032453 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Sat, 8 Jul 2006 00:51:13 +0900 (JST) Date: Sat, 8 Jul 2006 00:51:11 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: linux-mips Subject: [PATCH] removed vmlinux.rm200 Message-Id: <20060708005111.12a066a4.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11937 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has removed vmlinux.rm200 from Makefile. We can use vmlinux.ecoff instead. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/Makefile mips/arch/mips/Makefile --- mips-orig/arch/mips/Makefile 2006-07-07 12:28:54.055411000 +0900 +++ mips/arch/mips/Makefile 2006-07-07 16:08:50.208627750 +0900 @@ -712,16 +712,14 @@ endif vmlinux.bin: $(vmlinux-32) +@$(call makeboot,$@) -vmlinux.ecoff vmlinux.rm200: $(vmlinux-32) +vmlinux.ecoff: $(vmlinux-32) +@$(call makeboot,$@) vmlinux.srec: $(vmlinux-32) +@$(call makeboot,$@) CLEAN_FILES += vmlinux.ecoff \ - vmlinux.srec \ - vmlinux.rm200.tmp \ - vmlinux.rm200 + vmlinux.srec archclean: @$(MAKE) $(clean)=arch/mips/boot From anemo@mba.ocn.ne.jp Fri Jul 7 17:11:33 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 07 Jul 2006 17:11:43 +0100 (BST) Received: from mba.ocn.ne.jp ([210.190.142.172]:65221 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S8133498AbWGGQLd (ORCPT ); Fri, 7 Jul 2006 17:11:33 +0100 Received: from localhost (p1163-ipad206funabasi.chiba.ocn.ne.jp [222.146.104.163]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 040B4A14F; Sat, 8 Jul 2006 01:11:29 +0900 (JST) Date: Sat, 08 Jul 2006 01:12:45 +0900 (JST) Message-Id: <20060708.011245.82794581.anemo@mba.ocn.ne.jp> To: macro@linux-mips.org Cc: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] fast path for rdhwr emulation for TLS From: Atsushi Nemoto In-Reply-To: References: <20060708.000032.88471510.anemo@mba.ocn.ne.jp> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11938 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Fri, 7 Jul 2006 16:22:46 +0100 (BST), "Maciej W. Rozycki" wrote: > > + .align 5 > > + LEAF(handle_ri) > > + .set push > > + .set noat > > + mfc0 k0, CP0_CAUSE > > + MFC0 k1, CP0_EPC > > + bltz k0, handle_ri_slow /* if delay slot */ > > + lw k0, (k1) > > For a VIVT I-cache this can result in a TLB exception. TLB handlers are > not currently prepared for being called at the exception level. Thanks, now I understand the problem. Are there any good solutions? Only I can think now is using handle_ri_slow for such CPUs. > Also I am fairly sure gas won't fill the branch delay slot above -- a > trivial rearrangement of code would save a cycle here (and this is a fast > path, so we do not want wasting time). Well, here is a code compiled by binutils 2.17. This version of gas can put MFC0 on the delay slot. But it might be better to use noreorder by myself. 80012a80 : 80012a80: 401a6800 mfc0 k0,c0_cause 80012a84: 0740fd2e bltz k0,80011f40 80012a88: 401b7000 mfc0 k1,c0_epc 80012a8c: 8f7a0000 lw k0,0(k1) 80012a90: 3c1b7c03 lui k1,0x7c03 80012a94: 377be83b ori k1,k1,0xe83b 80012a98: 175bfd29 bne k0,k1,80011f40 80012a9c: 00000000 nop 80012aa0: 3c1b801b lui k1,0x801b 80012aa4: 8f7b4008 lw k1,16392(k1) 80012aa8: 401a7000 mfc0 k0,c0_epc 80012aac: 275a0004 addiu k0,k0,4 80012ab0: 409a7000 mtc0 k0,c0_epc 80012ab4: 377b1fff ori k1,k1,0x1fff 80012ab8: 3b7b1fff xori k1,k1,0x1fff 80012abc: 8f63000c lw v1,12(k1) 80012ac0: 42000018 eret > > + li k1, 0x7c03e83b /* rdhwr v1,$29 */ > > + bne k0, k1, handle_ri_slow /* if not ours */ > > + get_saved_sp /* k1 := current_thread_info */ > > + MFC0 k0, CP0_EPC > > + LONG_ADDIU k0, 4 > > I suggest moving MFC0 ahead of get_saved_sp to avoid a stall. I would > fit in the branch delay slot nicely. The MFC0 can not be moved. SMP version of get_saved_sp uses k0 and k1. But of course I can use #ifdef CONFIG_SMP, but these assumption makes the code a bit fragile. Another performance vs. maintainance cost issue... --- Atsushi Nemoto From anemo@mba.ocn.ne.jp Fri Jul 7 17:42:27 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 07 Jul 2006 17:42:36 +0100 (BST) Received: from mba.ocn.ne.jp ([210.190.142.172]:43463 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S8133512AbWGGQm1 (ORCPT ); Fri, 7 Jul 2006 17:42:27 +0100 Received: from localhost (p1163-ipad206funabasi.chiba.ocn.ne.jp [222.146.104.163]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 25B2D8CFE; Sat, 8 Jul 2006 01:42:23 +0900 (JST) Date: Sat, 08 Jul 2006 01:43:39 +0900 (JST) Message-Id: <20060708.014339.89274844.anemo@mba.ocn.ne.jp> To: macro@linux-mips.org Cc: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] fast path for rdhwr emulation for TLS From: Atsushi Nemoto In-Reply-To: <20060708.011245.82794581.anemo@mba.ocn.ne.jp> References: <20060708.000032.88471510.anemo@mba.ocn.ne.jp> <20060708.011245.82794581.anemo@mba.ocn.ne.jp> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11939 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Sat, 08 Jul 2006 01:12:45 +0900 (JST), Atsushi Nemoto wrote: > > For a VIVT I-cache this can result in a TLB exception. TLB handlers are > > not currently prepared for being called at the exception level. > > Thanks, now I understand the problem. Are there any good solutions? > Only I can think now is using handle_ri_slow for such CPUs. Can we use Index_Load_Data_I to load the instruction code from icache? Just an idea... --- Atsushi Nemoto From macro@linux-mips.org Fri Jul 7 17:58:45 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 07 Jul 2006 17:58:55 +0100 (BST) Received: from pollux.ds.pg.gda.pl ([153.19.208.7]:11013 "EHLO pollux.ds.pg.gda.pl") by ftp.linux-mips.org with ESMTP id S8133510AbWGGQ6p (ORCPT ); Fri, 7 Jul 2006 17:58:45 +0100 Received: from localhost (localhost [127.0.0.1]) by pollux.ds.pg.gda.pl (Postfix) with ESMTP id C912CF5CF3; Fri, 7 Jul 2006 18:58:39 +0200 (CEST) Received: from pollux.ds.pg.gda.pl ([127.0.0.1]) by localhost (pollux.ds.pg.gda.pl [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 03788-09; Fri, 7 Jul 2006 18:58:39 +0200 (CEST) Received: from piorun.ds.pg.gda.pl (piorun.ds.pg.gda.pl [153.19.208.8]) by pollux.ds.pg.gda.pl (Postfix) with ESMTP id 6BF26F5CE8; Fri, 7 Jul 2006 18:58:39 +0200 (CEST) Received: from blysk.ds.pg.gda.pl (macro@blysk.ds.pg.gda.pl [153.19.208.6]) by piorun.ds.pg.gda.pl (8.13.7/8.13.1) with ESMTP id k67GwouK018230; Fri, 7 Jul 2006 18:58:50 +0200 Date: Fri, 7 Jul 2006 17:58:44 +0100 (BST) From: "Maciej W. Rozycki" To: Atsushi Nemoto cc: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] fast path for rdhwr emulation for TLS In-Reply-To: <20060708.011245.82794581.anemo@mba.ocn.ne.jp> Message-ID: References: <20060708.000032.88471510.anemo@mba.ocn.ne.jp> <20060708.011245.82794581.anemo@mba.ocn.ne.jp> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Virus-Scanned: ClamAV 0.88.2/1588/Fri Jul 7 15:54:23 2006 on piorun.ds.pg.gda.pl X-Virus-Status: Clean X-Virus-Scanned: by amavisd-new at pollux.ds.pg.gda.pl Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11940 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@linux-mips.org Precedence: bulk X-list: linux-mips On Sat, 8 Jul 2006, Atsushi Nemoto wrote: > > For a VIVT I-cache this can result in a TLB exception. TLB handlers are > > not currently prepared for being called at the exception level. > > Thanks, now I understand the problem. Are there any good solutions? > Only I can think now is using handle_ri_slow for such CPUs. I have implemented an appropriate update to the TLB handlers (or actually it's enough to care for this case for the TLBL exception), but it predates the current synthesized ones. There is a small impact resulting from this change and the synthesized handlers have the advantage of making it only necessary for these chips that do need such handling. There are two possible ways of handling TLB exceptions from the exception level, both requiring checking cp0.index.p (which we do not do at the moment under the assumption a TLB refill exception has already been taken and handled) and if a failure is indicated either: 1. jumping to the TLB refill handler, or: 2. executing "tlbwr" rather than "tlbwi". Both are good, but I have not benchmarked them -- note that a failure is expected to be an extremely rare event, so it's the performance for the probe success that matters. > > Also I am fairly sure gas won't fill the branch delay slot above -- a > > trivial rearrangement of code would save a cycle here (and this is a fast > > path, so we do not want wasting time). > > Well, here is a code compiled by binutils 2.17. This version of gas > can put MFC0 on the delay slot. But it might be better to use > noreorder by myself. > > 80012a80 : > 80012a80: 401a6800 mfc0 k0,c0_cause > 80012a84: 0740fd2e bltz k0,80011f40 > 80012a88: 401b7000 mfc0 k1,c0_epc > 80012a8c: 8f7a0000 lw k0,0(k1) Still bad -- you have a stall on $k1 here. And on $k0 two instructions earlier. > 80012a90: 3c1b7c03 lui k1,0x7c03 > 80012a94: 377be83b ori k1,k1,0xe83b > 80012a98: 175bfd29 bne k0,k1,80011f40 > 80012a9c: 00000000 nop And this "nop" is a waste of time. > 80012aa0: 3c1b801b lui k1,0x801b > 80012aa4: 8f7b4008 lw k1,16392(k1) > 80012aa8: 401a7000 mfc0 k0,c0_epc > 80012aac: 275a0004 addiu k0,k0,4 > 80012ab0: 409a7000 mtc0 k0,c0_epc > 80012ab4: 377b1fff ori k1,k1,0x1fff > 80012ab8: 3b7b1fff xori k1,k1,0x1fff > 80012abc: 8f63000c lw v1,12(k1) > 80012ac0: 42000018 eret I'd restructure the code more or less like this, taking care for (almost) all stalls resulting from interlocks on coprocessor moves and memory loads and likewise avoiding the need for "nop" fillers there for MIPS I processors: .set push .set noat .set noreorder mfc0 k0, CP0_CAUSE MFC0 k1, CP0_EPC bltz k0, handle_ri_slow /* if delay slot */ lui k0, 0x7c03 lw k1, (k1) ori k0, 0xe83b /* k0 := rdhwr v1,$29 */ bne k0, k1, handle_ri_slow /* if not ours */ get_saved_sp /* k1 := current_thread_info */ MFC0 k0, CP0_EPC #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) ori k1, _THREAD_MASK xori k1, _THREAD_MASK LONG_L v1, TI_FLAGS(k1) PTR_ADDIU k0, 4 jr k0 rfe #else PTR_ADDIU k0, 4 /* stall on $k0 */ MTC0 k0, CP0_EPC ori k1, _THREAD_MASK xori k1, _THREAD_MASK LONG_L v1, TI_FLAGS(k1) eret #endif .set pop I hope I got this right. ;-) Maciej From macro@linux-mips.org Fri Jul 7 18:04:09 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 07 Jul 2006 18:04:19 +0100 (BST) Received: from pollux.ds.pg.gda.pl ([153.19.208.7]:2565 "EHLO pollux.ds.pg.gda.pl") by ftp.linux-mips.org with ESMTP id S8133521AbWGGREJ (ORCPT ); Fri, 7 Jul 2006 18:04:09 +0100 Received: from localhost (localhost [127.0.0.1]) by pollux.ds.pg.gda.pl (Postfix) with ESMTP id 4F723F6181; Fri, 7 Jul 2006 19:04:03 +0200 (CEST) Received: from pollux.ds.pg.gda.pl ([127.0.0.1]) by localhost (pollux.ds.pg.gda.pl [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 30145-05; Fri, 7 Jul 2006 19:04:03 +0200 (CEST) Received: from piorun.ds.pg.gda.pl (piorun.ds.pg.gda.pl [153.19.208.8]) by pollux.ds.pg.gda.pl (Postfix) with ESMTP id E8A58F59C3; Fri, 7 Jul 2006 19:04:02 +0200 (CEST) Received: from blysk.ds.pg.gda.pl (macro@blysk.ds.pg.gda.pl [153.19.208.6]) by piorun.ds.pg.gda.pl (8.13.7/8.13.1) with ESMTP id k67H4DkP018919; Fri, 7 Jul 2006 19:04:13 +0200 Date: Fri, 7 Jul 2006 18:04:08 +0100 (BST) From: "Maciej W. Rozycki" To: Atsushi Nemoto cc: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] fast path for rdhwr emulation for TLS In-Reply-To: <20060708.014339.89274844.anemo@mba.ocn.ne.jp> Message-ID: References: <20060708.000032.88471510.anemo@mba.ocn.ne.jp> <20060708.011245.82794581.anemo@mba.ocn.ne.jp> <20060708.014339.89274844.anemo@mba.ocn.ne.jp> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Virus-Scanned: ClamAV 0.88.2/1588/Fri Jul 7 15:54:23 2006 on piorun.ds.pg.gda.pl X-Virus-Status: Clean X-Virus-Scanned: by amavisd-new at pollux.ds.pg.gda.pl Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11941 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@linux-mips.org Precedence: bulk X-list: linux-mips On Sat, 8 Jul 2006, Atsushi Nemoto wrote: > Can we use Index_Load_Data_I to load the instruction code from icache? No need to go through such a hassle when we have a proper architectural way of handling it. Remember MIPS TLB-based MMUs (the two variations I know well, anyway) were designed to support a paged kernel. Maciej From ralf@linux-mips.org Fri Jul 7 19:58:50 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 07 Jul 2006 19:58:59 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:60076 "EHLO bacchus.dhis.org") by ftp.linux-mips.org with ESMTP id S3466458AbWGGS6u (ORCPT ); Fri, 7 Jul 2006 19:58:50 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by bacchus.dhis.org (8.13.6/8.13.4) with ESMTP id k67IMjek028773; Fri, 7 Jul 2006 19:22:45 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.13.6/8.13.6/Submit) id k67IMiQe028772; Fri, 7 Jul 2006 19:22:44 +0100 Date: Fri, 7 Jul 2006 19:22:44 +0100 From: Ralf Baechle To: Atsushi Nemoto Cc: macro@linux-mips.org, linux-mips@linux-mips.org Subject: Re: [PATCH] fast path for rdhwr emulation for TLS Message-ID: <20060707182244.GA28118@linux-mips.org> References: <20060708.000032.88471510.anemo@mba.ocn.ne.jp> <20060708.011245.82794581.anemo@mba.ocn.ne.jp> <20060708.014339.89274844.anemo@mba.ocn.ne.jp> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20060708.014339.89274844.anemo@mba.ocn.ne.jp> User-Agent: Mutt/1.4.2.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11942 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Sat, Jul 08, 2006 at 01:43:39AM +0900, Atsushi Nemoto wrote: > > > For a VIVT I-cache this can result in a TLB exception. TLB handlers are > > > not currently prepared for being called at the exception level. > > > > Thanks, now I understand the problem. Are there any good solutions? > > Only I can think now is using handle_ri_slow for such CPUs. > > Can we use Index_Load_Data_I to load the instruction code from icache? > Just an idea... In addition to what Maciej said - the format of instructions in the I-cache is not necessarily the same as in memory. Many processor store pre-decoded instructions in the I-cache. Ralf From vagabon.xyz@gmail.com Sat Jul 8 15:39:46 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 08 Jul 2006 15:39:56 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.172]:47353 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S8133530AbWGHOjp (ORCPT ); Sat, 8 Jul 2006 15:39:45 +0100 Received: by ug-out-1314.google.com with SMTP id k3so2904329ugf for ; Sat, 08 Jul 2006 07:39:45 -0700 (PDT) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=loFzxgB9Tc14mskH5WnUvVq7D7YQH+670us6Ggw9Iz/tIb4itS9i+kPTx8sOaHa+SU8pzfow5ctB8NKxAPFKj0kAZjRASuC3Q5ItWyIIsngLKYLoetBDPIQ2+AoUDuOwW9X6NqrY1ZgoIdvhAcjdG25/2LZEJnXFF3Pwb0BRFLY= Received: by 10.66.219.11 with SMTP id r11mr3096539ugg; Sat, 08 Jul 2006 07:39:44 -0700 (PDT) Received: by 10.67.100.10 with HTTP; Sat, 8 Jul 2006 07:39:44 -0700 (PDT) Message-ID: Date: Sat, 8 Jul 2006 16:39:44 +0200 From: "Franck Bui-Huu" To: "Atsushi Nemoto" Subject: Re: [PATCH] do not count pages in holes with sparsemem Cc: linux-mips@linux-mips.org, ralf@linux-mips.org In-Reply-To: <20060707.002602.75184460.anemo@mba.ocn.ne.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20060706.233634.59465089.anemo@mba.ocn.ne.jp> <44AD2537.1030509@innova-card.com> <20060707.002602.75184460.anemo@mba.ocn.ne.jp> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11943 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips 2006/7/6, Atsushi Nemoto : > On Thu, 6 Jul 2006 17:05:35 +0200, "Franck Bui-Huu" wrote: > > > free_area_init_node(0, NODE_DATA(0), zones_size, 0, zholes_size); > > > +#else > > > + free_area_init_node(0, NODE_DATA(0), zones_size, ARCH_PFN_OFFSET, NULL); > > > > which is equivalent to: > > > > free_area_init(zones_size); > > Sure. Then this can be a final proposal? > Sorry for the late answer. Did you check that show_mem() still works ? I'm not sure about that point. Thanks -- Franck From vagabon.xyz@gmail.com Sat Jul 8 15:47:39 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 08 Jul 2006 15:47:49 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.173]:45071 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S8133530AbWGHOrj (ORCPT ); Sat, 8 Jul 2006 15:47:39 +0100 Received: by ug-out-1314.google.com with SMTP id k3so2905928ugf for ; Sat, 08 Jul 2006 07:47:39 -0700 (PDT) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=gLqG7ppaQwyRZS1DHuyjaSSktwrHFOus3yEhxoROAX+H0/w/IyXLmtq6610GrMtC87uRUuV9VpabfqMycTW8bRnX8wAWkLk8o5O85syJf59r7odzWz1ZDJ1FlQtNcBs8popxQAyxyJTa2m+yQrl37SDeB5KmABbLHuZi167ZHDs= Received: by 10.67.29.12 with SMTP id g12mr3098367ugj; Sat, 08 Jul 2006 07:47:39 -0700 (PDT) Received: by 10.67.100.10 with HTTP; Sat, 8 Jul 2006 07:47:39 -0700 (PDT) Message-ID: Date: Sat, 8 Jul 2006 16:47:39 +0200 From: "Franck Bui-Huu" To: "Ralf Baechle" Subject: Re: [PATCH] sparsemem fix Cc: "Atsushi Nemoto" , linux-mips@linux-mips.org In-Reply-To: <20060706173235.GA4739@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20060705.012244.96686002.anemo@mba.ocn.ne.jp> <44AB79D0.90002@innova-card.com> <20060705.192054.128618288.nemoto@toshiba-tops.co.jp> <20060706173235.GA4739@linux-mips.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11944 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips 2006/7/6, Ralf Baechle : > On Wed, Jul 05, 2006 at 07:20:54PM +0900, Atsushi Nemoto wrote: > > > > For now it seems to be implemented only in sgi-ip27 machine. Maybe we should > > > make things clear by adding: > > > > > > #ifdef CONFIG_SGI_IP27 > > > #define pfn_valid [...] > > > #else > > The fact that the code is only used on IP27 doesn't mean it is IP27-specific. > but the code seems to be in arch/mips/sgi-ip27, no ? BTW, Ralf, are there any needs for MIPS to support platforms whose memory start is not 0 ? I have made a patch for that, and wondering if it's worth to post it on the list... -- Franck From anemo@mba.ocn.ne.jp Sat Jul 8 17:02:04 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 08 Jul 2006 17:02:13 +0100 (BST) Received: from mba.ocn.ne.jp ([210.190.142.172]:11731 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S8133540AbWGHQCE (ORCPT ); Sat, 8 Jul 2006 17:02:04 +0100 Received: from localhost (p5177-ipad202funabasi.chiba.ocn.ne.jp [222.146.76.177]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 3425CB258; Sun, 9 Jul 2006 01:01:59 +0900 (JST) Date: Sun, 09 Jul 2006 01:03:16 +0900 (JST) Message-Id: <20060709.010316.126574153.anemo@mba.ocn.ne.jp> To: vagabon.xyz@gmail.com Cc: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] do not count pages in holes with sparsemem From: Atsushi Nemoto In-Reply-To: References: <20060707.002602.75184460.anemo@mba.ocn.ne.jp> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11945 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Sat, 8 Jul 2006 16:39:44 +0200, "Franck Bui-Huu" wrote: > Did you check that show_mem() still works ? I'm not sure about that point. It should work, but this patch would make the output a bit better. Signed-off-by: Atsushi Nemoto diff --git a/arch/mips/mm/pgtable.c b/arch/mips/mm/pgtable.c index 792c6eb..c93aa6c 100644 --- a/arch/mips/mm/pgtable.c +++ b/arch/mips/mm/pgtable.c @@ -15,6 +15,8 @@ #ifndef CONFIG_NEED_MULTIPLE_NODES /* X printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); pfn = max_mapnr; while (pfn-- > 0) { + if (!pfn_valid(pfn)) + continue; page = pfn_to_page(pfn); total++; if (PageHighMem(page)) From anemo@mba.ocn.ne.jp Sat Jul 8 17:11:46 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 08 Jul 2006 17:11:56 +0100 (BST) Received: from mba.ocn.ne.jp ([210.190.142.172]:49871 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S8133540AbWGHQLq (ORCPT ); Sat, 8 Jul 2006 17:11:46 +0100 Received: from localhost (p5177-ipad202funabasi.chiba.ocn.ne.jp [222.146.76.177]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 783C09B55; Sun, 9 Jul 2006 01:11:42 +0900 (JST) Date: Sun, 09 Jul 2006 01:12:59 +0900 (JST) Message-Id: <20060709.011259.92587435.anemo@mba.ocn.ne.jp> To: macro@linux-mips.org Cc: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] fast path for rdhwr emulation for TLS From: Atsushi Nemoto In-Reply-To: References: <20060708.011245.82794581.anemo@mba.ocn.ne.jp> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11946 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Fri, 7 Jul 2006 17:58:44 +0100 (BST), "Maciej W. Rozycki" wrote: > > Thanks, now I understand the problem. Are there any good solutions? > > Only I can think now is using handle_ri_slow for such CPUs. > > I have implemented an appropriate update to the TLB handlers (or actually > it's enough to care for this case for the TLBL exception), but it predates > the current synthesized ones. There is a small impact resulting from > this change and the synthesized handlers have the advantage of making it > only necessary for these chips that do need such handling. Do you still have the code? Could you post it for reference? > I'd restructure the code more or less like this, taking care for (almost) > all stalls resulting from interlocks on coprocessor moves and memory loads > and likewise avoiding the need for "nop" fillers there for MIPS I > processors: Thanks. I'll look it deeply. > bne k0, k1, handle_ri_slow /* if not ours */ > get_saved_sp /* k1 := current_thread_info */ Unfortunately, get_saved_sp is not a single instruction... --- Atsushi Nemoto From vagabon.xyz@gmail.com Sat Jul 8 17:15:53 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 08 Jul 2006 17:16:05 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.170]:25482 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S8133553AbWGHQPx (ORCPT ); Sat, 8 Jul 2006 17:15:53 +0100 Received: by ug-out-1314.google.com with SMTP id k3so2926443ugf for ; Sat, 08 Jul 2006 09:15:52 -0700 (PDT) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=ATGvwD8yCwQCsxfJhUohckISBKuYuD+QkLZCGBDuduxphHE5FkQIkLiR2vlAerPSFeuGKGIe16cZfkwYR62U7iprL4c9lFoScfGY4jwHs3H1nZsuMBV6f2Ezoq/q4HgbE7NijUjfwsy26WDTB20GaZxhr5ivaSArb8M98mnlGag= Received: by 10.66.243.2 with SMTP id q2mr3168053ugh; Sat, 08 Jul 2006 09:15:52 -0700 (PDT) Received: by 10.67.100.10 with HTTP; Sat, 8 Jul 2006 09:15:52 -0700 (PDT) Message-ID: Date: Sat, 8 Jul 2006 18:15:52 +0200 From: "Franck Bui-Huu" To: "Atsushi Nemoto" Subject: Re: [PATCH] do not count pages in holes with sparsemem Cc: linux-mips@linux-mips.org, ralf@linux-mips.org In-Reply-To: <20060709.010316.126574153.anemo@mba.ocn.ne.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20060707.002602.75184460.anemo@mba.ocn.ne.jp> <20060709.010316.126574153.anemo@mba.ocn.ne.jp> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11947 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips 2006/7/8, Atsushi Nemoto : > On Sat, 8 Jul 2006 16:39:44 +0200, "Franck Bui-Huu" wrote: > > Did you check that show_mem() still works ? I'm not sure about that point. > > It should work, but this patch would make the output a bit better. > well I would say without this patch it should break. 'pfn' takes values between 0 and max_mapnr. This range includes memory holes, doens't it ? In that case what does pfn_to_page(pfn_inside_a_hole) ? -- Franck From daniel@caiaq.de Sat Jul 8 18:35:23 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 08 Jul 2006 18:35:33 +0100 (BST) Received: from buzzloop.caiaq.de ([212.112.241.133]:46600 "EHLO buzzloop.caiaq.de") by ftp.linux-mips.org with ESMTP id S8133557AbWGHRfX (ORCPT ); Sat, 8 Jul 2006 18:35:23 +0100 Received: from localhost (localhost [127.0.0.1]) by buzzloop.caiaq.de (Postfix) with ESMTP id 5EE067F4028 for ; Sat, 8 Jul 2006 19:35:17 +0200 (CEST) Received: from buzzloop.caiaq.de ([127.0.0.1]) by localhost (buzzloop [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 09040-07 for ; Sat, 8 Jul 2006 19:35:17 +0200 (CEST) Received: from [192.168.4.4] (port-212-202-198-187.dynamic.qsc.de [212.202.198.187]) (using TLSv1 with cipher RC4-SHA (128/128 bits)) (No client certificate requested) by buzzloop.caiaq.de (Postfix) with ESMTP id F2C587F4024 for ; Sat, 8 Jul 2006 19:35:16 +0200 (CEST) Mime-Version: 1.0 (Apple Message framework v752.2) Content-Transfer-Encoding: 7bit Message-Id: Content-Type: text/plain; charset=US-ASCII; delsp=yes; format=flowed To: linux-mips@linux-mips.org From: Daniel Mack Subject: [PATCH] remove double entry of FB_AU1200 in drivers/video/Kconfig Date: Sat, 8 Jul 2006 19:35:12 +0200 X-Mailer: Apple Mail (2.752.2) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11948 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: daniel@caiaq.de Precedence: bulk X-list: linux-mips Signed-off-by: Daniel Mack diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 335d37a..a810581 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -1353,17 +1353,6 @@ config FB_AU1200 various panels and CRTs by passing in kernel cmd line option au1200fb:panel=. -config FB_AU1200 - bool "Au1200 LCD Driver" - depends on FB && MIPS && SOC_AU1200 - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT - help - This is the framebuffer driver for the AMD Au1200 SOC. It can drive - various panels and CRTs by passing in kernel cmd line option - au1200fb:panel=. - source "drivers/video/geode/Kconfig" config FB_FFB From jblache@debian.org Sat Jul 8 23:02:11 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 08 Jul 2006 23:02:19 +0100 (BST) Received: from frigate.technologeek.org ([62.4.21.148]:14041 "EHLO frigate.technologeek.org") by ftp.linux-mips.org with ESMTP id S8133575AbWGHWCK (ORCPT ); Sat, 8 Jul 2006 23:02:10 +0100 Received: by frigate.technologeek.org (Postfix, from userid 1000) id 5B874147834A; Sun, 9 Jul 2006 00:02:12 +0200 (CEST) From: Julien BLACHE To: debian-mips@lists.debian.org Cc: linux-mips@linux-mips.org Subject: IP22 RTC bug on 64bit 2.6 kernels ? Date: Sun, 09 Jul 2006 00:02:12 +0200 Message-ID: <87fyhbhi1n.fsf@frigate.technologeek.org> User-Agent: Gnus/5.110006 (No Gnus v0.6) XEmacs/21.4.19 (linux) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11949 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jblache@debian.org Precedence: bulk X-list: linux-mips Hi, For some time now, my IP22 was booting in a "back to the future" mode, somewhere between 1983 and 1987 (usually, 1985). Interestingly enough, only the year comes out wrong, everything else is perfectly OK. This is not the RTC chip at fault, as everything else stored in the NVRAM is OK too. I was prepared to order a new RTC chip, until... Until I remembered that it all started with the new 64bit 2.6 kernels built by Martin Michlmayr in Debian. Indeed, rebooting into a 32bit 2.4.27 the problem goes away. Using the 2.6 kernel (2.6.17), hwclock -w/hwclock -r will not give the same year twice in a row, which is quite fun and unexpected. I couldn't find a logic of some kind in the values read from the RTC; the year went as far as 1972 and as close as 2007 :) So, it looks like there is a bug in this area with (at least) 64bit 2.6 kernels. Is there any known bug ? Anything I can do to help track the problem down ? Thanks, JB. -- Julien BLACHE - Debian & GNU/Linux Developer - Public key available on - KeyID: F5D6 5169 GPG Fingerprint : 935A 79F1 C8B3 3521 FD62 7CC7 CD61 4FD7 F5D6 5169 From jblache@debian.org Sat Jul 8 23:21:22 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 08 Jul 2006 23:21:36 +0100 (BST) Received: from frigate.technologeek.org ([62.4.21.148]:35306 "EHLO frigate.technologeek.org") by ftp.linux-mips.org with ESMTP id S8133575AbWGHWVW (ORCPT ); Sat, 8 Jul 2006 23:21:22 +0100 Received: by frigate.technologeek.org (Postfix, from userid 1000) id 506A2147834A; Sun, 9 Jul 2006 00:21:24 +0200 (CEST) From: Julien BLACHE To: debian-mips@lists.debian.org Cc: linux-mips@linux-mips.org Subject: Re: IP22 RTC bug on 64bit 2.6 kernels ? References: <87fyhbhi1n.fsf@frigate.technologeek.org> Date: Sun, 09 Jul 2006 00:21:24 +0200 In-Reply-To: <87fyhbhi1n.fsf@frigate.technologeek.org> (Julien BLACHE's message of "Sun, 09 Jul 2006 00:02:12 +0200") Message-ID: <87ac7jhh5n.fsf@frigate.technologeek.org> User-Agent: Gnus/5.110006 (No Gnus v0.6) XEmacs/21.4.19 (linux) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="=-=-=" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11950 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jblache@debian.org Precedence: bulk X-list: linux-mips --=-=-= Julien BLACHE wrote: Hi, > So, it looks like there is a bug in this area with (at least) 64bit > 2.6 kernels. Is there any known bug ? Anything I can do to help track > the problem down ? Ok, it's brown paper bag time for someone :-) This patch fixes a typo in arch/mips/sgi-ip22/ip22-time.c, leading to the incorrect year being set into the RTC chip. Signed-off-by: Julien BLACHE --=-=-= Content-Type: text/x-patch Content-Disposition: inline; filename=ip22-rtc-year-typo-fix.patch Content-Description: Typo fix in arch/mips/sgi-ip22/ip22-time.c --- arch/mips/sgi-ip22/ip22-time.c.orig 2006-07-08 22:17:02.000000000 +0000 +++ arch/mips/sgi-ip22/ip22-time.c 2006-07-08 22:17:29.000000000 +0000 @@ -76,7 +76,7 @@ save_control = hpc3c0->rtcregs[RTC_CMD] & 0xff; hpc3c0->rtcregs[RTC_CMD] = save_control | RTC_TE; - hpc3c0->rtcregs[RTC_YEAR] = BIN2BCD(tm.tm_sec); + hpc3c0->rtcregs[RTC_YEAR] = BIN2BCD(tm.tm_year); hpc3c0->rtcregs[RTC_MONTH] = BIN2BCD(tm.tm_mon); hpc3c0->rtcregs[RTC_DATE] = BIN2BCD(tm.tm_mday); hpc3c0->rtcregs[RTC_HOURS] = BIN2BCD(tm.tm_hour); --=-=-= Thanks, JB. -- Julien BLACHE - Debian & GNU/Linux Developer - Public key available on - KeyID: F5D6 5169 GPG Fingerprint : 935A 79F1 C8B3 3521 FD62 7CC7 CD61 4FD7 F5D6 5169 --=-=-=-- From ths@networkno.de Sun Jul 9 01:22:31 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 09 Jul 2006 01:22:43 +0100 (BST) Received: from bender.bawue.de ([193.7.176.20]:17900 "EHLO bender.bawue.de") by ftp.linux-mips.org with ESMTP id S8133619AbWGIAWa (ORCPT ); Sun, 9 Jul 2006 01:22:30 +0100 Received: from lagash (88-106-172-167.dynamic.dsl.as9105.com [88.106.172.167]) (using TLSv1 with cipher DES-CBC3-SHA (168/168 bits)) (No client certificate requested) by bender.bawue.de (Postfix) with ESMTP id 1794D45C95; Sun, 9 Jul 2006 02:22:29 +0200 (MEST) Received: from ths by lagash with local (Exim 4.62) (envelope-from ) id 1FzN40-0004NZ-F8; Sun, 09 Jul 2006 01:22:20 +0100 Date: Sun, 9 Jul 2006 01:22:20 +0100 To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: [PATCH] Print out TLB handler assembly Message-ID: <20060709002220.GB4375@networkno.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.11+cvs20060403 From: Thiemo Seufer Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11951 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ths@networkno.de Precedence: bulk X-list: linux-mips Hello All, this changes tlbex to print out the (.word) assembler code of the synthesized handlers. Thiemo Signed-off-by: Thiemo Seufer diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index e1a8139..709280e 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -5,7 +5,7 @@ * * Synthesize TLB refill handlers at runtime. * - * Copyright (C) 2004,2005 by Thiemo Seufer + * Copyright (C) 2004,2005,2006 by Thiemo Seufer * Copyright (C) 2005 Maciej W. Rozycki * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org) * @@ -35,8 +35,6 @@ #include #include #include -/* #define DEBUG_TLB */ - static __init int __attribute__((unused)) r45k_bvahwbug(void) { /* XXX: We should probe for the presence of this bug, but we don't. */ @@ -728,6 +726,7 @@ static void __init build_r3000_tlb_refil { long pgdc = (long)pgd_current; u32 *p; + int i; memset(tlb_handler, 0, sizeof(tlb_handler)); p = tlb_handler; @@ -753,16 +752,15 @@ static void __init build_r3000_tlb_refil if (p > tlb_handler + 32) panic("TLB refill handler space exceeded"); - printk("Synthesized TLB refill handler (%u instructions).\n", + printk(KERN_INFO + "Synthesized TLB refill handler (%u instructions).\n", (unsigned int)(p - tlb_handler)); -#ifdef DEBUG_TLB - { - int i; - for (i = 0; i < (p - tlb_handler); i++) - printk("%08x\n", tlb_handler[i]); - } -#endif + printk(KERN_DEBUG "\t.set push\n"); + printk(KERN_DEBUG "\t.set noreorder\n"); + for (i = 0; i < (p - tlb_handler); i++) + printk(KERN_DEBUG "\t.word 0x%08x\n", tlb_handler[i]); + printk(KERN_DEBUG "\t.set pop\n"); memcpy((void *)ebase, tlb_handler, 0x80); } @@ -1175,6 +1173,7 @@ static void __init build_r4000_tlb_refil struct reloc *r = relocs; u32 *f; unsigned int final_len; + int i; memset(tlb_handler, 0, sizeof(tlb_handler)); memset(labels, 0, sizeof(labels)); @@ -1272,24 +1271,22 @@ #else /* CONFIG_64BIT */ #endif /* CONFIG_64BIT */ resolve_relocs(relocs, labels); - printk("Synthesized TLB refill handler (%u instructions).\n", + printk(KERN_INFO + "Synthesized TLB refill handler (%u instructions).\n", final_len); -#ifdef DEBUG_TLB - { - int i; - - f = final_handler; + f = final_handler; #ifdef CONFIG_64BIT - if (final_len > 32) - final_len = 64; - else - f = final_handler + 32; + if (final_len > 32) + final_len = 64; + else + f = final_handler + 32; #endif /* CONFIG_64BIT */ - for (i = 0; i < final_len; i++) - printk("%08x\n", f[i]); - } -#endif + printk(KERN_DEBUG "\t.set push\n"); + printk(KERN_DEBUG "\t.set noreorder\n"); + for (i = 0; i < final_len; i++) + printk(KERN_DEBUG "\t.word 0x%08x\n", f[i]); + printk(KERN_DEBUG "\t.set pop\n"); memcpy((void *)ebase, final_handler, 0x100); } @@ -1522,6 +1519,7 @@ static void __init build_r3000_tlb_load_ u32 *p = handle_tlbl; struct label *l = labels; struct reloc *r = relocs; + int i; memset(handle_tlbl, 0, sizeof(handle_tlbl)); memset(labels, 0, sizeof(labels)); @@ -1541,17 +1539,15 @@ static void __init build_r3000_tlb_load_ panic("TLB load handler fastpath space exceeded"); resolve_relocs(relocs, labels); - printk("Synthesized TLB load handler fastpath (%u instructions).\n", + printk(KERN_INFO + "Synthesized TLB load handler fastpath (%u instructions).\n", (unsigned int)(p - handle_tlbl)); -#ifdef DEBUG_TLB - { - int i; - - for (i = 0; i < (p - handle_tlbl); i++) - printk("%08x\n", handle_tlbl[i]); - } -#endif + printk(KERN_DEBUG "\t.set push\n"); + printk(KERN_DEBUG "\t.set noreorder\n"); + for (i = 0; i < (p - handle_tlbl); i++) + printk(KERN_DEBUG "\t.word 0x%08x\n", handle_tlbl[i]); + printk(KERN_DEBUG "\t.set pop\n"); } static void __init build_r3000_tlb_store_handler(void) @@ -1559,6 +1555,7 @@ static void __init build_r3000_tlb_store u32 *p = handle_tlbs; struct label *l = labels; struct reloc *r = relocs; + int i; memset(handle_tlbs, 0, sizeof(handle_tlbs)); memset(labels, 0, sizeof(labels)); @@ -1578,17 +1575,15 @@ static void __init build_r3000_tlb_store panic("TLB store handler fastpath space exceeded"); resolve_relocs(relocs, labels); - printk("Synthesized TLB store handler fastpath (%u instructions).\n", + printk(KERN_INFO + "Synthesized TLB store handler fastpath (%u instructions).\n", (unsigned int)(p - handle_tlbs)); -#ifdef DEBUG_TLB - { - int i; - - for (i = 0; i < (p - handle_tlbs); i++) - printk("%08x\n", handle_tlbs[i]); - } -#endif + printk(KERN_DEBUG "\t.set push\n"); + printk(KERN_DEBUG "\t.set noreorder\n"); + for (i = 0; i < (p - handle_tlbs); i++) + printk(KERN_DEBUG "\t.word 0x%08x\n", handle_tlbs[i]); + printk(KERN_DEBUG "\t.set pop\n"); } static void __init build_r3000_tlb_modify_handler(void) @@ -1596,6 +1591,7 @@ static void __init build_r3000_tlb_modif u32 *p = handle_tlbm; struct label *l = labels; struct reloc *r = relocs; + int i; memset(handle_tlbm, 0, sizeof(handle_tlbm)); memset(labels, 0, sizeof(labels)); @@ -1615,17 +1611,15 @@ static void __init build_r3000_tlb_modif panic("TLB modify handler fastpath space exceeded"); resolve_relocs(relocs, labels); - printk("Synthesized TLB modify handler fastpath (%u instructions).\n", + printk(KERN_INFO + "Synthesized TLB modify handler fastpath (%u instructions).\n", (unsigned int)(p - handle_tlbm)); -#ifdef DEBUG_TLB - { - int i; - - for (i = 0; i < (p - handle_tlbm); i++) - printk("%08x\n", handle_tlbm[i]); - } -#endif + printk(KERN_DEBUG "\t.set push\n"); + printk(KERN_DEBUG "\t.set noreorder\n"); + for (i = 0; i < (p - handle_tlbm); i++) + printk(KERN_DEBUG "\t.word 0x%08x\n", handle_tlbm[i]); + printk(KERN_DEBUG "\t.set pop\n"); } /* @@ -1677,6 +1671,7 @@ static void __init build_r4000_tlb_load_ u32 *p = handle_tlbl; struct label *l = labels; struct reloc *r = relocs; + int i; memset(handle_tlbl, 0, sizeof(handle_tlbl)); memset(labels, 0, sizeof(labels)); @@ -1704,17 +1699,15 @@ static void __init build_r4000_tlb_load_ panic("TLB load handler fastpath space exceeded"); resolve_relocs(relocs, labels); - printk("Synthesized TLB load handler fastpath (%u instructions).\n", + printk(KERN_INFO + "Synthesized TLB load handler fastpath (%u instructions).\n", (unsigned int)(p - handle_tlbl)); -#ifdef DEBUG_TLB - { - int i; - - for (i = 0; i < (p - handle_tlbl); i++) - printk("%08x\n", handle_tlbl[i]); - } -#endif + printk(KERN_DEBUG "\t.set push\n"); + printk(KERN_DEBUG "\t.set noreorder\n"); + for (i = 0; i < (p - handle_tlbl); i++) + printk(KERN_DEBUG "\t.word 0x%08x\n", handle_tlbl[i]); + printk(KERN_DEBUG "\t.set pop\n"); } static void __init build_r4000_tlb_store_handler(void) @@ -1722,6 +1715,7 @@ static void __init build_r4000_tlb_store u32 *p = handle_tlbs; struct label *l = labels; struct reloc *r = relocs; + int i; memset(handle_tlbs, 0, sizeof(handle_tlbs)); memset(labels, 0, sizeof(labels)); @@ -1740,17 +1734,15 @@ static void __init build_r4000_tlb_store panic("TLB store handler fastpath space exceeded"); resolve_relocs(relocs, labels); - printk("Synthesized TLB store handler fastpath (%u instructions).\n", + printk(KERN_INFO + "Synthesized TLB store handler fastpath (%u instructions).\n", (unsigned int)(p - handle_tlbs)); -#ifdef DEBUG_TLB - { - int i; - - for (i = 0; i < (p - handle_tlbs); i++) - printk("%08x\n", handle_tlbs[i]); - } -#endif + printk(KERN_DEBUG "\t.set push\n"); + printk(KERN_DEBUG "\t.set noreorder\n"); + for (i = 0; i < (p - handle_tlbs); i++) + printk(KERN_DEBUG "\t.word 0x%08x\n", handle_tlbs[i]); + printk(KERN_DEBUG "\t.set pop\n"); } static void __init build_r4000_tlb_modify_handler(void) @@ -1758,6 +1750,7 @@ static void __init build_r4000_tlb_modif u32 *p = handle_tlbm; struct label *l = labels; struct reloc *r = relocs; + int i; memset(handle_tlbm, 0, sizeof(handle_tlbm)); memset(labels, 0, sizeof(labels)); @@ -1777,17 +1770,15 @@ static void __init build_r4000_tlb_modif panic("TLB modify handler fastpath space exceeded"); resolve_relocs(relocs, labels); - printk("Synthesized TLB modify handler fastpath (%u instructions).\n", + printk(KERN_INFO + "Synthesized TLB modify handler fastpath (%u instructions).\n", (unsigned int)(p - handle_tlbm)); -#ifdef DEBUG_TLB - { - int i; - - for (i = 0; i < (p - handle_tlbm); i++) - printk("%08x\n", handle_tlbm[i]); - } -#endif + printk(KERN_DEBUG "\t.set push\n"); + printk(KERN_DEBUG "\t.set noreorder\n"); + for (i = 0; i < (p - handle_tlbm); i++) + printk(KERN_DEBUG "\t.word 0x%08x\n", handle_tlbm[i]); + printk(KERN_DEBUG "\t.set pop\n"); } void __init build_tlb_refill_handler(void) From ths@networkno.de Sun Jul 9 01:47:16 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 09 Jul 2006 01:47:27 +0100 (BST) Received: from bender.bawue.de ([193.7.176.20]:58500 "EHLO bender.bawue.de") by ftp.linux-mips.org with ESMTP id S8133624AbWGIArQ (ORCPT ); Sun, 9 Jul 2006 01:47:16 +0100 Received: from lagash (88-106-172-167.dynamic.dsl.as9105.com [88.106.172.167]) (using TLSv1 with cipher DES-CBC3-SHA (168/168 bits)) (No client certificate requested) by bender.bawue.de (Postfix) with ESMTP id 4C3D145CCF; Sun, 9 Jul 2006 02:47:15 +0200 (MEST) Received: from ths by lagash with local (Exim 4.62) (envelope-from ) id 1FzNRy-0004QV-6d; Sun, 09 Jul 2006 01:47:06 +0100 Date: Sun, 9 Jul 2006 01:47:06 +0100 From: Thiemo Seufer To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org Subject: Re: [PATCH] Print out TLB handler assembly Message-ID: <20060709004706.GC4375@networkno.de> References: <20060709002220.GB4375@networkno.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20060709002220.GB4375@networkno.de> User-Agent: Mutt/1.5.11+cvs20060403 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11952 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ths@networkno.de Precedence: bulk X-list: linux-mips Thiemo Seufer wrote: > Hello All, > > this changes tlbex to print out the (.word) assembler code of > the synthesized handlers. Small update, using pr_debug and pr_info. Thiemo Signed-off-by: Thiemo Seufer diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index e1a8139..375e099 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -5,7 +5,7 @@ * * Synthesize TLB refill handlers at runtime. * - * Copyright (C) 2004,2005 by Thiemo Seufer + * Copyright (C) 2004,2005,2006 by Thiemo Seufer * Copyright (C) 2005 Maciej W. Rozycki * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org) * @@ -35,8 +35,6 @@ #include #include #include -/* #define DEBUG_TLB */ - static __init int __attribute__((unused)) r45k_bvahwbug(void) { /* XXX: We should probe for the presence of this bug, but we don't. */ @@ -728,6 +726,7 @@ static void __init build_r3000_tlb_refil { long pgdc = (long)pgd_current; u32 *p; + int i; memset(tlb_handler, 0, sizeof(tlb_handler)); p = tlb_handler; @@ -753,16 +752,14 @@ static void __init build_r3000_tlb_refil if (p > tlb_handler + 32) panic("TLB refill handler space exceeded"); - printk("Synthesized TLB refill handler (%u instructions).\n", - (unsigned int)(p - tlb_handler)); -#ifdef DEBUG_TLB - { - int i; + pr_info("Synthesized TLB refill handler (%u instructions).\n", + (unsigned int)(p - tlb_handler)); - for (i = 0; i < (p - tlb_handler); i++) - printk("%08x\n", tlb_handler[i]); - } -#endif + pr_debug("\t.set push\n"); + pr_debug("\t.set noreorder\n"); + for (i = 0; i < (p - tlb_handler); i++) + pr_debug("\t.word 0x%08x\n", tlb_handler[i]); + pr_debug("\t.set pop\n"); memcpy((void *)ebase, tlb_handler, 0x80); } @@ -1175,6 +1172,7 @@ static void __init build_r4000_tlb_refil struct reloc *r = relocs; u32 *f; unsigned int final_len; + int i; memset(tlb_handler, 0, sizeof(tlb_handler)); memset(labels, 0, sizeof(labels)); @@ -1272,24 +1270,21 @@ #else /* CONFIG_64BIT */ #endif /* CONFIG_64BIT */ resolve_relocs(relocs, labels); - printk("Synthesized TLB refill handler (%u instructions).\n", - final_len); - -#ifdef DEBUG_TLB - { - int i; + pr_info("Synthesized TLB refill handler (%u instructions).\n", + final_len); - f = final_handler; + f = final_handler; #ifdef CONFIG_64BIT - if (final_len > 32) - final_len = 64; - else - f = final_handler + 32; + if (final_len > 32) + final_len = 64; + else + f = final_handler + 32; #endif /* CONFIG_64BIT */ - for (i = 0; i < final_len; i++) - printk("%08x\n", f[i]); - } -#endif + pr_debug("\t.set push\n"); + pr_debug("\t.set noreorder\n"); + for (i = 0; i < final_len; i++) + pr_debug("\t.word 0x%08x\n", f[i]); + pr_debug("\t.set pop\n"); memcpy((void *)ebase, final_handler, 0x100); } @@ -1522,6 +1517,7 @@ static void __init build_r3000_tlb_load_ u32 *p = handle_tlbl; struct label *l = labels; struct reloc *r = relocs; + int i; memset(handle_tlbl, 0, sizeof(handle_tlbl)); memset(labels, 0, sizeof(labels)); @@ -1541,17 +1537,14 @@ static void __init build_r3000_tlb_load_ panic("TLB load handler fastpath space exceeded"); resolve_relocs(relocs, labels); - printk("Synthesized TLB load handler fastpath (%u instructions).\n", - (unsigned int)(p - handle_tlbl)); - -#ifdef DEBUG_TLB - { - int i; + pr_info("Synthesized TLB load handler fastpath (%u instructions).\n", + (unsigned int)(p - handle_tlbl)); - for (i = 0; i < (p - handle_tlbl); i++) - printk("%08x\n", handle_tlbl[i]); - } -#endif + pr_debug("\t.set push\n"); + pr_debug("\t.set noreorder\n"); + for (i = 0; i < (p - handle_tlbl); i++) + pr_debug("\t.word 0x%08x\n", handle_tlbl[i]); + pr_debug("\t.set pop\n"); } static void __init build_r3000_tlb_store_handler(void) @@ -1559,6 +1552,7 @@ static void __init build_r3000_tlb_store u32 *p = handle_tlbs; struct label *l = labels; struct reloc *r = relocs; + int i; memset(handle_tlbs, 0, sizeof(handle_tlbs)); memset(labels, 0, sizeof(labels)); @@ -1578,17 +1572,14 @@ static void __init build_r3000_tlb_store panic("TLB store handler fastpath space exceeded"); resolve_relocs(relocs, labels); - printk("Synthesized TLB store handler fastpath (%u instructions).\n", - (unsigned int)(p - handle_tlbs)); + pr_info("Synthesized TLB store handler fastpath (%u instructions).\n", + (unsigned int)(p - handle_tlbs)); -#ifdef DEBUG_TLB - { - int i; - - for (i = 0; i < (p - handle_tlbs); i++) - printk("%08x\n", handle_tlbs[i]); - } -#endif + pr_debug("\t.set push\n"); + pr_debug("\t.set noreorder\n"); + for (i = 0; i < (p - handle_tlbs); i++) + pr_debug("\t.word 0x%08x\n", handle_tlbs[i]); + pr_debug("\t.set pop\n"); } static void __init build_r3000_tlb_modify_handler(void) @@ -1596,6 +1587,7 @@ static void __init build_r3000_tlb_modif u32 *p = handle_tlbm; struct label *l = labels; struct reloc *r = relocs; + int i; memset(handle_tlbm, 0, sizeof(handle_tlbm)); memset(labels, 0, sizeof(labels)); @@ -1615,17 +1607,14 @@ static void __init build_r3000_tlb_modif panic("TLB modify handler fastpath space exceeded"); resolve_relocs(relocs, labels); - printk("Synthesized TLB modify handler fastpath (%u instructions).\n", - (unsigned int)(p - handle_tlbm)); + pr_info("Synthesized TLB modify handler fastpath (%u instructions).\n", + (unsigned int)(p - handle_tlbm)); -#ifdef DEBUG_TLB - { - int i; - - for (i = 0; i < (p - handle_tlbm); i++) - printk("%08x\n", handle_tlbm[i]); - } -#endif + pr_debug("\t.set push\n"); + pr_debug("\t.set noreorder\n"); + for (i = 0; i < (p - handle_tlbm); i++) + pr_debug("\t.word 0x%08x\n", handle_tlbm[i]); + pr_debug("\t.set pop\n"); } /* @@ -1677,6 +1666,7 @@ static void __init build_r4000_tlb_load_ u32 *p = handle_tlbl; struct label *l = labels; struct reloc *r = relocs; + int i; memset(handle_tlbl, 0, sizeof(handle_tlbl)); memset(labels, 0, sizeof(labels)); @@ -1704,17 +1694,14 @@ static void __init build_r4000_tlb_load_ panic("TLB load handler fastpath space exceeded"); resolve_relocs(relocs, labels); - printk("Synthesized TLB load handler fastpath (%u instructions).\n", - (unsigned int)(p - handle_tlbl)); - -#ifdef DEBUG_TLB - { - int i; + pr_info("Synthesized TLB load handler fastpath (%u instructions).\n", + (unsigned int)(p - handle_tlbl)); - for (i = 0; i < (p - handle_tlbl); i++) - printk("%08x\n", handle_tlbl[i]); - } -#endif + pr_debug("\t.set push\n"); + pr_debug("\t.set noreorder\n"); + for (i = 0; i < (p - handle_tlbl); i++) + pr_debug("\t.word 0x%08x\n", handle_tlbl[i]); + pr_debug("\t.set pop\n"); } static void __init build_r4000_tlb_store_handler(void) @@ -1722,6 +1709,7 @@ static void __init build_r4000_tlb_store u32 *p = handle_tlbs; struct label *l = labels; struct reloc *r = relocs; + int i; memset(handle_tlbs, 0, sizeof(handle_tlbs)); memset(labels, 0, sizeof(labels)); @@ -1740,17 +1728,14 @@ static void __init build_r4000_tlb_store panic("TLB store handler fastpath space exceeded"); resolve_relocs(relocs, labels); - printk("Synthesized TLB store handler fastpath (%u instructions).\n", - (unsigned int)(p - handle_tlbs)); - -#ifdef DEBUG_TLB - { - int i; + pr_info("Synthesized TLB store handler fastpath (%u instructions).\n", + (unsigned int)(p - handle_tlbs)); - for (i = 0; i < (p - handle_tlbs); i++) - printk("%08x\n", handle_tlbs[i]); - } -#endif + pr_debug("\t.set push\n"); + pr_debug("\t.set noreorder\n"); + for (i = 0; i < (p - handle_tlbs); i++) + pr_debug("\t.word 0x%08x\n", handle_tlbs[i]); + pr_debug("\t.set pop\n"); } static void __init build_r4000_tlb_modify_handler(void) @@ -1758,6 +1743,7 @@ static void __init build_r4000_tlb_modif u32 *p = handle_tlbm; struct label *l = labels; struct reloc *r = relocs; + int i; memset(handle_tlbm, 0, sizeof(handle_tlbm)); memset(labels, 0, sizeof(labels)); @@ -1777,17 +1763,14 @@ static void __init build_r4000_tlb_modif panic("TLB modify handler fastpath space exceeded"); resolve_relocs(relocs, labels); - printk("Synthesized TLB modify handler fastpath (%u instructions).\n", - (unsigned int)(p - handle_tlbm)); - -#ifdef DEBUG_TLB - { - int i; - - for (i = 0; i < (p - handle_tlbm); i++) - printk("%08x\n", handle_tlbm[i]); - } -#endif + pr_info("Synthesized TLB modify handler fastpath (%u instructions).\n", + (unsigned int)(p - handle_tlbm)); + + pr_debug("\t.set push\n"); + pr_debug("\t.set noreorder\n"); + for (i = 0; i < (p - handle_tlbm); i++) + pr_debug("\t.word 0x%08x\n", handle_tlbm[i]); + pr_debug("\t.set pop\n"); } void __init build_tlb_refill_handler(void) From anemo@mba.ocn.ne.jp Sun Jul 9 13:55:38 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 09 Jul 2006 13:55:47 +0100 (BST) Received: from mba.ocn.ne.jp ([210.190.142.172]:6386 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S8133790AbWGIMzi (ORCPT ); Sun, 9 Jul 2006 13:55:38 +0100 Received: from localhost (p7197-ipad202funabasi.chiba.ocn.ne.jp [222.146.78.197]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 905E7A741; Sun, 9 Jul 2006 21:55:33 +0900 (JST) Date: Sun, 09 Jul 2006 21:56:51 +0900 (JST) Message-Id: <20060709.215651.126573568.anemo@mba.ocn.ne.jp> To: vagabon.xyz@gmail.com Cc: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] do not count pages in holes with sparsemem From: Atsushi Nemoto In-Reply-To: References: <20060709.010316.126574153.anemo@mba.ocn.ne.jp> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11953 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Sat, 8 Jul 2006 18:15:52 +0200, "Franck Bui-Huu" wrote: > well I would say without this patch it should break. > > 'pfn' takes values between 0 and max_mapnr. This range includes memory > holes, doens't it ? In that case what does > pfn_to_page(pfn_inside_a_hole) ? Oh, you are right. The show_mem() must be fixed indeed. --- Atsushi Nemoto From jblache@debian.org Sun Jul 9 14:51:25 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 09 Jul 2006 14:51:35 +0100 (BST) Received: from frigate.technologeek.org ([62.4.21.148]:15500 "EHLO frigate.technologeek.org") by ftp.linux-mips.org with ESMTP id S8133513AbWGINvZ (ORCPT ); Sun, 9 Jul 2006 14:51:25 +0100 Received: by frigate.technologeek.org (Postfix, from userid 1000) id ECF271465D70; Sun, 9 Jul 2006 15:51:26 +0200 (CEST) From: Julien BLACHE To: linux-mips@linux-mips.org Cc: debian-mips@lists.debian.org Subject: [PATCH] IP22: fix serial console hangs Date: Sun, 09 Jul 2006 15:51:26 +0200 Message-ID: <87irm6naxt.fsf@frigate.technologeek.org> User-Agent: Gnus/5.110006 (No Gnus v0.6) XEmacs/21.4.19 (linux) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="=-=-=" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11954 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jblache@debian.org Precedence: bulk X-list: linux-mips --=-=-= Hi, The patch below fixes serial console hangs as seen on IP22 machines. Typically, while booting, the machine hangs for ~1 minute displaying "INIT: ", then the same thing happens again when init enters in the designated runlevel and finally the getty process on ttyS0 hangs indefinitely (though strace'ing it helps). strace (-e raw=ioctl, otherwise the ioctl() translation is utterly bogus) reveals that getty hangs on ioctl() 0x540f which happens to be TCSETSW (I saw it hang on another console ioctl() but couldn't reproduce that one). A diff between ip22zilog and sunzilog revealed the following differences: 1. the channel A flag being set on up.port.flags instead of up.flags 2. the channel A flag being set on what is marked as being channel B 3. sunzilog has a call to uart_update_timeout(port, termios->c_cflag, baud); at the end of sunzilog_set_termios(), which ip22zilog lacks (on purpose ?) The patch below addresses point 1 and fixes the serial console hangs just fine. However point 2 should be investigated by someone familiar with the IP22 Zilog; it's probably OK as is but even if it is, a comment in ip22zilog.c is badly needed. Point 3 is left as an exercise for whoever feels like digging into ip22zilog :) These are the main obvious differences between ip22zilog and sunzilog. Newer versions of sunzilog (Linus's git tree as of today) are more close to ip22zilog as the sbus_{write,read}b have been changed into simple {write,read}b, which shrinks the diff by a fair amount. Resyncing both drivers should be doable in a few hours time now for someone familiar with the IP22 Zilog hardware. Additional point: the IP22 thinks it's using the console on the framebuffer when booting, when it's really using the serial console (console=ttyS passed at boot, console=d, consoleOut=serial(0)) Please apply, along with the RTC typo fix from yesterday. Thanks, JB. --- IP22: fix serial console hang due to a typo in ip22zilog.c Signed-off-by: Julien BLACHE --=-=-= Content-Type: text/x-patch Content-Disposition: inline; filename=ip22zilog-channel-A-flag.patch Content-Description: fix serial console hangs on IP22 --- source-mips-none/drivers/serial/ip22zilog.c 2006-06-18 03:49:35.000000000 +0200 +++ source/drivers/serial/ip22zilog.c 2006-07-09 14:25:11.847260358 +0200 @@ -1145,9 +1145,8 @@ up[(chip * 2) + 1].port.fifosize = 1; up[(chip * 2) + 1].port.ops = &ip22zilog_pops; up[(chip * 2) + 1].port.type = PORT_IP22ZILOG; - up[(chip * 2) + 1].port.flags |= IP22ZILOG_FLAG_IS_CHANNEL_A; up[(chip * 2) + 1].port.line = (chip * 2) + 1; - up[(chip * 2) + 1].flags = 0; + up[(chip * 2) + 1].flags |= IP22ZILOG_FLAG_IS_CHANNEL_A; } } --=-=-= -- Julien BLACHE | Debian, because code matters more Debian & GNU/Linux Developer | Public key available on - KeyID: F5D6 5169 GPG Fingerprint : 935A 79F1 C8B3 3521 FD62 7CC7 CD61 4FD7 F5D6 5169 --=-=-=-- From kumba@gentoo.org Sun Jul 9 18:39:12 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 09 Jul 2006 18:39:22 +0100 (BST) Received: from p549F5FD7.dip.t-dialin.net ([84.159.95.215]:9675 "EHLO p549F5FD7.dip.t-dialin.net") by ftp.linux-mips.org with ESMTP id S8133858AbWGIRjL (ORCPT ); Sun, 9 Jul 2006 18:39:11 +0100 Received: from rwcrmhc11.comcast.net ([216.148.227.151]:62143 "EHLO rwcrmhc11.comcast.net") by lappi.linux-mips.net with ESMTP id S1097688AbWGIRjN (ORCPT ); Sun, 9 Jul 2006 19:39:13 +0200 Received: from [127.0.0.1] (unknown[69.140.185.142]) by comcast.net (rwcrmhc11) with ESMTP id <20060709173824m1100i3fnse>; Sun, 9 Jul 2006 17:38:25 +0000 Message-ID: <44B13F02.5020002@gentoo.org> Date: Sun, 09 Jul 2006 13:38:10 -0400 From: Kumba User-Agent: Thunderbird 1.5.0.4 (Windows/20060516) MIME-Version: 1.0 To: linux-mips@linux-mips.org CC: Julien BLACHE Subject: Re: [PATCH] IP22: fix serial console hangs References: <87irm6naxt.fsf@frigate.technologeek.org> In-Reply-To: <87irm6naxt.fsf@frigate.technologeek.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11955 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kumba@gentoo.org Precedence: bulk X-list: linux-mips Julien BLACHE wrote: > Hi, > > The patch below fixes serial console hangs as seen on IP22 > machines. Typically, while booting, the machine hangs for ~1 minute > displaying "INIT: ", then the same thing happens again when init > enters in the designated runlevel and finally the getty process on > ttyS0 hangs indefinitely (though strace'ing it helps). > Out of curiosity, don't suppose you've seen the oops on IP22 that can sometimes be triggered by closing the serial client on another box? Haven't investigated it too much, but I've seen the odd case on Indy and IP28 (which also uses the zilog driver) where shutting down my serial client or sometimes rebooting the system running the client oopses the driver. I suspect some rogue data gets passed that zilog doesn't know how to handle properly. --Kumba -- Gentoo/MIPS Team Lead Gentoo Foundation Board of Trustees "Such is oft the course of deeds that move the wheels of the world: small hands do them because they must, while the eyes of the great are elsewhere." --Elrond From tbm@cyrius.com Sun Jul 9 18:58:47 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 09 Jul 2006 18:58:58 +0100 (BST) Received: from sorrow.cyrius.com ([65.19.161.204]:37905 "EHLO sorrow.cyrius.com") by ftp.linux-mips.org with ESMTP id S8133862AbWGIR6r (ORCPT ); Sun, 9 Jul 2006 18:58:47 +0100 Received: by sorrow.cyrius.com (Postfix, from userid 10) id E347664D55; Sun, 9 Jul 2006 17:58:39 +0000 (UTC) Received: by deprecation.cyrius.com (Postfix, from userid 1000) id 5A30666E52; Sun, 9 Jul 2006 19:58:41 +0200 (CEST) Date: Sun, 9 Jul 2006 19:58:41 +0200 From: Martin Michlmayr To: Julien BLACHE Cc: linux-mips@linux-mips.org, debian-mips@lists.debian.org Subject: Re: [PATCH] IP22: fix serial console hangs Message-ID: <20060709175841.GB24958@deprecation.cyrius.com> References: <87irm6naxt.fsf@frigate.technologeek.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <87irm6naxt.fsf@frigate.technologeek.org> User-Agent: Mutt/1.5.11+cvs20060403 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11956 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tbm@cyrius.com Precedence: bulk X-list: linux-mips * Julien BLACHE [2006-07-09 15:51]: > The patch below fixes serial console hangs as seen on IP22 > machines. Typically, while booting, the machine hangs for ~1 minute Thanks for tracking this down. You've to send the patch to rmk+serial@arm.linux.org.uk and linux-serial@vger.kernel.org though. -- Martin Michlmayr http://www.cyrius.com/ From jblache@debian.org Sun Jul 9 19:37:20 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 09 Jul 2006 19:37:29 +0100 (BST) Received: from frigate.technologeek.org ([62.4.21.148]:18633 "EHLO frigate.technologeek.org") by ftp.linux-mips.org with ESMTP id S8133348AbWGIShU (ORCPT ); Sun, 9 Jul 2006 19:37:20 +0100 Received: by frigate.technologeek.org (Postfix, from userid 1000) id 8F7461465D70; Sun, 9 Jul 2006 20:37:22 +0200 (CEST) From: Julien BLACHE To: Kumba Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] IP22: fix serial console hangs References: <87irm6naxt.fsf@frigate.technologeek.org> <44B13F02.5020002@gentoo.org> Date: Sun, 09 Jul 2006 20:37:21 +0200 In-Reply-To: <44B13F02.5020002@gentoo.org> (kumba@gentoo.org's message of "Sun, 09 Jul 2006 13:38:10 -0400") Message-ID: <877j2mmxpa.fsf@frigate.technologeek.org> User-Agent: Gnus/5.110006 (No Gnus v0.6) XEmacs/21.4.19 (linux) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11957 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jblache@debian.org Precedence: bulk X-list: linux-mips Kumba wrote: Hi, > Out of curiosity, don't suppose you've seen the oops on IP22 that can > sometimes be triggered by closing the serial client on another box? Haven't seen this one, no. I'm using a hardware console on the serial line most of the time (though I still haven't found the proper configuration and it's hardly usable for anything advanced making use of terminal features). > Haven't investigated it too much, but I've seen the odd case on Indy > and IP28 (which also uses the zilog driver) where shutting down my > serial client or sometimes rebooting the system running the client > oopses the driver. I suspect some rogue data gets passed that zilog > doesn't know how to handle properly. It looks a bit like the serial driver crash on reboot which Martin Michlmayr fixed a couple of months back by backporting fixes from the sunzilog driver. But I think this one made its way into the kernel, so it must be something else. JB. -- Julien BLACHE | Debian, because code matters more Debian & GNU/Linux Developer | Public key available on - KeyID: F5D6 5169 GPG Fingerprint : 935A 79F1 C8B3 3521 FD62 7CC7 CD61 4FD7 F5D6 5169 From jblache@debian.org Sun Jul 9 19:40:41 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 09 Jul 2006 19:40:50 +0100 (BST) Received: from frigate.technologeek.org ([62.4.21.148]:19913 "EHLO frigate.technologeek.org") by ftp.linux-mips.org with ESMTP id S8133350AbWGISkl (ORCPT ); Sun, 9 Jul 2006 19:40:41 +0100 Received: by frigate.technologeek.org (Postfix, from userid 1000) id 1D5DA1465D70; Sun, 9 Jul 2006 20:40:44 +0200 (CEST) From: Julien BLACHE To: linux-mips@linux-mips.org Cc: debian-mips@lists.debian.org Subject: Re: [PATCH] IP22: fix serial console hangs References: <87irm6naxt.fsf@frigate.technologeek.org> <20060709175841.GB24958@deprecation.cyrius.com> Date: Sun, 09 Jul 2006 20:40:44 +0200 In-Reply-To: <20060709175841.GB24958@deprecation.cyrius.com> (Martin Michlmayr's message of "Sun, 9 Jul 2006 19:58:41 +0200") Message-ID: <87y7v2liz7.fsf@frigate.technologeek.org> User-Agent: Gnus/5.110006 (No Gnus v0.6) XEmacs/21.4.19 (linux) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11958 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jblache@debian.org Precedence: bulk X-list: linux-mips Martin Michlmayr wrote: > * Julien BLACHE [2006-07-09 15:51]: >> The patch below fixes serial console hangs as seen on IP22 >> machines. Typically, while booting, the machine hangs for ~1 minute > > Thanks for tracking this down. You've to send the patch to > rmk+serial@arm.linux.org.uk and linux-serial@vger.kernel.org > though. Done. JB. -- Julien BLACHE | Debian, because code matters more Debian & GNU/Linux Developer | Public key available on - KeyID: F5D6 5169 GPG Fingerprint : 935A 79F1 C8B3 3521 FD62 7CC7 CD61 4FD7 F5D6 5169 From ralf@linux-mips.org Sun Jul 9 23:46:52 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 09 Jul 2006 23:47:00 +0100 (BST) Received: from localhost.localdomain ([127.0.0.1]:26319 "EHLO bacchus.dhis.org") by ftp.linux-mips.org with ESMTP id S8133495AbWGIWqw (ORCPT ); Sun, 9 Jul 2006 23:46:52 +0100 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by bacchus.dhis.org (8.13.6/8.13.4) with ESMTP id k69MkvgW020630; Sun, 9 Jul 2006 23:46:57 +0100 Received: (from ralf@localhost) by denk.linux-mips.net (8.13.6/8.13.6/Submit) id k69MksxT020625; Sun, 9 Jul 2006 23:46:54 +0100 Date: Sun, 9 Jul 2006 23:46:53 +0100 From: Ralf Baechle To: Franck Bui-Huu Cc: Atsushi Nemoto , linux-mips@linux-mips.org Subject: Re: [PATCH] sparsemem fix Message-ID: <20060709224653.GA20598@linux-mips.org> References: <20060705.012244.96686002.anemo@mba.ocn.ne.jp> <44AB79D0.90002@innova-card.com> <20060705.192054.128618288.nemoto@toshiba-tops.co.jp> <20060706173235.GA4739@linux-mips.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11959 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Sat, Jul 08, 2006 at 04:47:39PM +0200, Franck Bui-Huu wrote: > but the code seems to be in arch/mips/sgi-ip27, no ? > > BTW, Ralf, are there any needs for MIPS to support platforms whose > memory start is not 0 ? I have made a patch for that, and wondering if > it's worth to post it on the list... Yes, while it's relativly rare such platforms do exist and they currently pay the price of wasting some memory for the allocation of unused entries in mem_map[]. Ralf From vagabon.xyz@gmail.com Mon Jul 10 08:47:10 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 10 Jul 2006 08:47:22 +0100 (BST) Received: from nf-out-0910.google.com ([64.233.182.184]:46428 "EHLO nf-out-0910.google.com") by ftp.linux-mips.org with ESMTP id S8133398AbWGJHrK (ORCPT ); Mon, 10 Jul 2006 08:47:10 +0100 Received: by nf-out-0910.google.com with SMTP id x4so605431nfb for ; Mon, 10 Jul 2006 00:47:09 -0700 (PDT) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:reply-to:user-agent:mime-version:to:cc:subject:references:in-reply-to:content-type:content-transfer-encoding:from; b=aaahY14kVIG/EC77uQ/Zv8QC8kqZK+t5CtaPi+nPtgrFg1c9TR0jpN8ldY+190P8wggtATymo+H9GksY7Y3RrdXsAf7zBmgfsAVP6GWSZ1koKrNQ6z3KMZq9aTtPn0rI7lG/uWOVvzF89MXqq3pJf/Aijk9rjUOLsdePGufKYRs= Received: by 10.48.1.4 with SMTP id 4mr3500015nfa; Mon, 10 Jul 2006 00:47:08 -0700 (PDT) Received: from ?192.168.0.24? ( [194.3.162.233]) by mx.gmail.com with ESMTP id x27sm3397448nfb.2006.07.10.00.47.07; Mon, 10 Jul 2006 00:47:08 -0700 (PDT) Message-ID: <44B20723.3070409@innova-card.com> Date: Mon, 10 Jul 2006 09:52:03 +0200 Reply-To: Franck User-Agent: Thunderbird 1.5.0.2 (X11/20060501) MIME-Version: 1.0 To: Ralf Baechle CC: Franck Bui-Huu , Atsushi Nemoto , linux-mips@linux-mips.org Subject: Re: [PATCH] sparsemem fix References: <20060705.012244.96686002.anemo@mba.ocn.ne.jp> <44AB79D0.90002@innova-card.com> <20060705.192054.128618288.nemoto@toshiba-tops.co.jp> <20060706173235.GA4739@linux-mips.org> <20060709224653.GA20598@linux-mips.org> In-Reply-To: <20060709224653.GA20598@linux-mips.org> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11960 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips Ralf Baechle wrote: > On Sat, Jul 08, 2006 at 04:47:39PM +0200, Franck Bui-Huu wrote: > >> but the code seems to be in arch/mips/sgi-ip27, no ? >> >> BTW, Ralf, are there any needs for MIPS to support platforms whose >> memory start is not 0 ? I have made a patch for that, and wondering if >> it's worth to post it on the list... > > Yes, while it's relativly rare such platforms do exist and they currently > pay the price of wasting some memory for the allocation of unused entries > in mem_map[]. > Ok I'll send that this week. I remember to have to replace CPHYSADDR() macro with __pa() in boot init code still I don't if it's correct. Can you tell me why we can't always use __pa() ? Thanks Franck From tglx@linutronix.de Mon Jul 10 10:53:15 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 10 Jul 2006 10:53:24 +0100 (BST) Received: from www.osadl.org ([213.239.205.134]:54979 "EHLO mail.tglx.de") by ftp.linux-mips.org with ESMTP id S8133425AbWGJJxP (ORCPT ); Mon, 10 Jul 2006 10:53:15 +0100 Received: from localhost (debian [213.239.205.147]) by mail.tglx.de (Postfix) with ESMTP id D320465C003; Mon, 10 Jul 2006 11:53:13 +0200 (CEST) Subject: Re: [PATCH] PNX8550 NAND flash driver From: Thomas Gleixner To: "Vladimir A. Barinov" Cc: Todd Poynor , linux-mtd@lists.infradead.org, linux-mips@linux-mips.org In-Reply-To: <43F1D439.60205@ru.mvista.com> References: <43A2F819.1040106@ru.mvista.com> <43C69EC2.2070601@mvista.com> <43F1D439.60205@ru.mvista.com> Content-Type: text/plain Organization: linutronix Date: Mon, 10 Jul 2006 11:53:16 +0200 Message-Id: <1152525196.30929.11.camel@localhost> Mime-Version: 1.0 X-Mailer: Evolution 2.6.1 Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11961 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tglx@linutronix.de Precedence: bulk X-list: linux-mips On Tue, 2006-02-14 at 15:59 +0300, Vladimir A. Barinov wrote: > >> + } > >> + > >> + if (((bytes & 3) || (bytes < 16)) || ((u32) to & 3) || ((u32) > >> from & 3)) { > >> + if (((bytes & 1) == 0) && > >> + (((u32) to & 1) == 0) && (((u32) from & 1) == 0)) { > >> + int words = bytes / 2; > >> + > >> + local_irq_disable(); > >> + for (i = 0; i < words; i++) { > >> + to16[i] = from16[i]; > >> + } > >> + local_irq_enable(); > > > > > > Really necessary to disable all irqs around this transfer? How long > > can interrupts be off during that time? > > That is needed since the NAND device is binded to the external XIO bus > that could be used by another devices. Err, you have to protect the whole access sequence then. What protects the chip against access between the command write and data read ? If this really is a bus conflict problem, then you need some more protection than this. Can you please describe in detail why you think this is necessary. tglx From vagabon.xyz@gmail.com Mon Jul 10 12:34:07 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 10 Jul 2006 12:34:17 +0100 (BST) Received: from ug-out-1314.google.com ([66.249.92.171]:47543 "EHLO ug-out-1314.google.com") by ftp.linux-mips.org with ESMTP id S8133442AbWGJLeH (ORCPT ); Mon, 10 Jul 2006 12:34:07 +0100 Received: by ug-out-1314.google.com with SMTP id k3so3370314ugf for ; Mon, 10 Jul 2006 04:34:06 -0700 (PDT) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=FT+YLWVgz7JWnmJZO7gSkMPQLi8ZZ9lRyKrTDc0BxFa99fb8lqAHQ32hox0clYAcN/Bj7H1hUiC/2ourau3PnPeFvFnnISsS9dqZj+oXeMgPWce28sNeGownSonPErD7i2KFR/ixhxNaMnHY5v/f3hQ2InSNfK8aR2WSUqrvj2I= Received: by 10.67.26.7 with SMTP id d7mr4937629ugj; Mon, 10 Jul 2006 04:34:06 -0700 (PDT) Received: by 10.67.100.10 with HTTP; Mon, 10 Jul 2006 04:34:06 -0700 (PDT) Message-ID: Date: Mon, 10 Jul 2006 13:34:06 +0200 From: "Franck Bui-Huu" To: "Atsushi Nemoto" Subject: Re: [PATCH] do not count pages in holes with sparsemem Cc: linux-mips@linux-mips.org, ralf@linux-mips.org In-Reply-To: <20060707.002602.75184460.anemo@mba.ocn.ne.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20060706.233634.59465089.anemo@mba.ocn.ne.jp> <44AD2537.1030509@innova-card.com> <20060707.002602.75184460.anemo@mba.ocn.ne.jp> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11962 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips 2006/7/6, Atsushi Nemoto : > > Sure. Then this can be a final proposal? > could you put the diffstat next time ? > > With some memory model other than FLATMEM, the single node can > contains some holes so there might be many invalid pages. For > example, with two 256M memory and one 256M hole, some variables > (num_physpage, totalpages, nr_kernel_pages, nr_all_pages, etc.) will > indicate that there are 768MB on this system. This is not desired > because, for example, alloc_large_system_hash() allocates too many > entries. > > Use free_area_init_node() with counted zholes_size[] instead of > free_area_init(). > > For num_physpages, use number of ram pages instead of max_low_pfn. > > Signed-off-by: Atsushi Nemoto > > diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c > index 802bdd3..c52497b 100644 > --- a/arch/mips/mm/init.c > +++ b/arch/mips/mm/init.c > @@ -139,10 +139,36 @@ #endif /* CONFIG_HIGHMEM */ > #ifndef CONFIG_NEED_MULTIPLE_NODES > extern void pagetable_init(void); > > +static int __init page_is_ram(unsigned long pagenr) > +{ > + int i; > + > + for (i = 0; i < boot_mem_map.nr_map; i++) { > + unsigned long addr, end; > + > + if (boot_mem_map.map[i].type != BOOT_MEM_RAM) > + /* not usable memory */ > + continue; > + > + addr = PFN_UP(boot_mem_map.map[i].addr); > + end = PFN_DOWN(boot_mem_map.map[i].addr + > + boot_mem_map.map[i].size); > + > + if (pagenr >= addr && pagenr < end) > + return 1; > + } > + > + return 0; > +} > + > void __init paging_init(void) > { > - unsigned long zones_size[MAX_NR_ZONES] = {0, 0, 0}; > + unsigned long zones_size[] = { [0 ... MAX_NR_ZONES - 1] = 0 }; > unsigned long max_dma, high, low; > +#ifndef CONFIG_FLATMEM > + unsigned long zholes_size[] = { [0 ... MAX_NR_ZONES - 1] = 0 }; > + unsigned long i, j, pfn; > +#endif > > pagetable_init(); > > @@ -174,29 +200,16 @@ #ifdef CONFIG_HIGHMEM > zones_size[ZONE_HIGHMEM] = high - low; > #endif > > +#ifdef CONFIG_FLATMEM > free_area_init(zones_size); > -} > - > -static inline int page_is_ram(unsigned long pagenr) > -{ > - int i; > - > - for (i = 0; i < boot_mem_map.nr_map; i++) { > - unsigned long addr, end; > - > - if (boot_mem_map.map[i].type != BOOT_MEM_RAM) > - /* not usable memory */ > - continue; > - > - addr = PFN_UP(boot_mem_map.map[i].addr); > - end = PFN_DOWN(boot_mem_map.map[i].addr + > - boot_mem_map.map[i].size); > - > - if (pagenr >= addr && pagenr < end) > - return 1; > - } > - > - return 0; > +#else > + pfn = 0; > + for (i = 0; i < MAX_NR_ZONES; i++) > + for (j = 0; j < zones_size[i]; j++, pfn++) > + if (!page_is_ram(pfn)) can we use pfn_valid() instead of page_is_ram() ? bootmem_init() and sparse_init() have already been called so pfn_valid() should be safe here.... > + zholes_size[i]++; > + free_area_init_node(0, NODE_DATA(0), zones_size, 0, zholes_size); > +#endif > } > > static struct kcore_list kcore_mem, kcore_vmalloc; > @@ -213,9 +226,9 @@ #ifdef CONFIG_HIGHMEM > #ifdef CONFIG_DISCONTIGMEM > #error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet" > #endif > - max_mapnr = num_physpages = highend_pfn; > + max_mapnr = highend_pfn; > #else > - max_mapnr = num_physpages = max_low_pfn; > + max_mapnr = max_low_pfn; this is not always true, specially if FLATMEM set and your physical mem do not start at 0. > #endif > high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT); > > @@ -229,6 +242,7 @@ #endif in this loop can we use pfn_valid() instead of page_is_ram() ? Therefore we could get rid of the latter macro ? > if (PageReserved(pfn_to_page(tmp))) > reservedpages++; > } > + num_physpages = ram; > > #ifdef CONFIG_HIGHMEM > for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) { > @@ -247,6 +261,7 @@ #endif > totalhigh_pages++; > } > totalram_pages += totalhigh_pages; > + num_physpages += totalhigh_pages; > #endif > > codesize = (unsigned long) &_etext - (unsigned long) &_text; > -- Franck From anemo@mba.ocn.ne.jp Mon Jul 10 15:33:41 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 10 Jul 2006 15:33:50 +0100 (BST) Received: from mba.ocn.ne.jp ([210.190.142.172]:48872 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S8133454AbWGJOdl (ORCPT ); Mon, 10 Jul 2006 15:33:41 +0100 Received: from localhost (p8142-ipad212funabasi.chiba.ocn.ne.jp [58.91.172.142]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 6B9F1A8B5; Mon, 10 Jul 2006 23:33:36 +0900 (JST) Date: Mon, 10 Jul 2006 23:34:54 +0900 (JST) Message-Id: <20060710.233454.39153668.anemo@mba.ocn.ne.jp> To: vagabon.xyz@gmail.com Cc: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] do not count pages in holes with sparsemem From: Atsushi Nemoto In-Reply-To: References: <20060707.002602.75184460.anemo@mba.ocn.ne.jp> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11963 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Mon, 10 Jul 2006 13:34:06 +0200, "Franck Bui-Huu" wrote: > could you put the diffstat next time ? Sure. I'll do it. > can we use pfn_valid() instead of page_is_ram() ? bootmem_init() and > sparse_init() have already been called so pfn_valid() should be safe > here.... We can, but we can get more precise value using page_is_ram(). The pfn_valid() returns true for _all_ pages on present section, and currently the section size is 256MB. > > - max_mapnr = num_physpages = highend_pfn; > > + max_mapnr = highend_pfn; > > #else > > - max_mapnr = num_physpages = max_low_pfn; > > + max_mapnr = max_low_pfn; > > this is not always true, specially if FLATMEM set and your physical mem > do not start at 0. Yes, and I think you are preparing a patch for these systems ;-) --- Atsushi Nemoto From anemo@mba.ocn.ne.jp Mon Jul 10 15:38:57 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 10 Jul 2006 15:39:09 +0100 (BST) Received: from mba.ocn.ne.jp ([210.190.142.172]:34514 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S8133864AbWGJOi5 (ORCPT ); Mon, 10 Jul 2006 15:38:57 +0100 Received: from localhost (p8142-ipad212funabasi.chiba.ocn.ne.jp [58.91.172.142]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 19722B49A; Mon, 10 Jul 2006 23:38:52 +0900 (JST) Date: Mon, 10 Jul 2006 23:40:10 +0900 (JST) Message-Id: <20060710.234010.07457279.anemo@mba.ocn.ne.jp> To: linux-mips@linux-mips.org Cc: ralf@linux-mips.org, macro@linux-mips.org Subject: Re: [PATCH] fast path for rdhwr emulation for TLS From: Atsushi Nemoto In-Reply-To: <20060709.011259.92587435.anemo@mba.ocn.ne.jp> References: <20060708.011245.82794581.anemo@mba.ocn.ne.jp> <20060709.011259.92587435.anemo@mba.ocn.ne.jp> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11964 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips Take 2. Comments (especially from pipeline wizards) are welcome. Add special short path for emulationg RDHWR which is used to support TLS. The handle_tlbl synthesizer takes a care for cpu_has_vtag_icache. Signed-off-by: Atsushi Nemoto diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index 37fda3d..dfceea9 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S @@ -375,6 +375,43 @@ #endif BUILD_HANDLER dsp dsp sti silent /* #26 */ BUILD_HANDLER reserved reserved sti verbose /* others */ + .align 5 + LEAF(handle_ri_rdhwr) + .set push + .set noat + .set noreorder + /* 0x7c03e83b: rdhwr v1,$29 */ + MFC0 k1, CP0_EPC + lui k0, 0x7c03 + lw k1, (k1) + ori k0, 0xe83b + .set reorder + bne k0, k1, handle_ri /* if not ours */ + /* The insn is rdhwr. No need to check CAUSE.BD here. */ + get_saved_sp /* k1 := current_thread_info */ + .set noreorder + MFC0 k0, CP0_EPC +#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) + ori k1, _THREAD_MASK + xori k1, _THREAD_MASK + LONG_L v1, TI_TP_VALUE(k1) + LONG_ADDIU k0, 4 + jr k0 + rfe +#else + LONG_ADDIU k0, 4 /* stall on $k0 */ + MTC0 k0, CP0_EPC + /* I hope three instructions between MTC0 and ERET are enough... */ + ori k1, _THREAD_MASK + xori k1, _THREAD_MASK + LONG_L v1, TI_TP_VALUE(k1) + .set mips3 + eret + .set mips0 +#endif + .set pop + END(handle_ri_rdhwr) + #ifdef CONFIG_64BIT /* A temporary overflow handler used by check_daddi(). */ diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 954a198..46eba9f 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -52,6 +52,7 @@ extern asmlinkage void handle_dbe(void); extern asmlinkage void handle_sys(void); extern asmlinkage void handle_bp(void); extern asmlinkage void handle_ri(void); +extern asmlinkage void handle_ri_rdhwr(void); extern asmlinkage void handle_cpu(void); extern asmlinkage void handle_ov(void); extern asmlinkage void handle_tr(void); @@ -1381,6 +1382,15 @@ #endif memcpy((void *)(uncached_ebase + offset), addr, size); } +int __initdata rdhwr_noopt; +static int __init set_rdhwr_noopt(char *str) +{ + rdhwr_noopt = 1; + return 1; +} + +__setup("rdhwr_noopt", set_rdhwr_noopt); + void __init trap_init(void) { extern char except_vec3_generic, except_vec3_r4000; @@ -1460,7 +1470,7 @@ void __init trap_init(void) set_except_vector(8, handle_sys); set_except_vector(9, handle_bp); - set_except_vector(10, handle_ri); + set_except_vector(10, rdhwr_noopt ? handle_ri : handle_ri_rdhwr); set_except_vector(11, handle_cpu); set_except_vector(12, handle_ov); set_except_vector(13, handle_tr); diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 375e099..3f53fa7 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -817,9 +817,10 @@ static __init void __attribute__((unused * Write random or indexed TLB entry, and care about the hazards from * the preceeding mtc0 and for the following eret. */ -enum tlb_write_entry { tlb_random, tlb_indexed }; +enum tlb_write_entry { tlb_random, tlb_indexed, tlb_arbitrary }; -static __init void build_tlb_write_entry(u32 **p, struct label **l, +static __init void build_tlb_write_entry(u32 **p, unsigned int tmp, + struct label **l, struct reloc **r, enum tlb_write_entry wmode) { @@ -828,6 +829,11 @@ static __init void build_tlb_write_entry switch (wmode) { case tlb_random: tlbw = i_tlbwr; break; case tlb_indexed: tlbw = i_tlbwi; break; + case tlb_arbitrary: + /* tmp contains CP0_INDEX. see build_update_entries(). */ + /* if tmp <= 0, use tlbwr instead of tlbwi */ + tlbw = i_tlbwr; + break; } switch (current_cpu_data.cputype) { @@ -841,6 +847,10 @@ static __init void build_tlb_write_entry * This branch uses up a mtc0 hazard nop slot and saves * two nops after the tlbw instruction. */ + if (wmode == tlb_arbitrary) { + il_bgezl(p, r, tmp, label_tlbw_hazard); + i_tlbwi(p); + } il_bgezl(p, r, 0, label_tlbw_hazard); tlbw(p); l_tlbw_hazard(l, *p); @@ -851,8 +861,13 @@ static __init void build_tlb_write_entry case CPU_R4700: case CPU_R5000: case CPU_R5000A: - i_nop(p); + if (wmode == tlb_arbitrary) { + il_bgezl(p, r, tmp, label_tlbw_hazard); + i_tlbwi(p); + } else + i_nop(p); tlbw(p); + l_tlbw_hazard(l, *p); i_nop(p); break; @@ -865,8 +880,13 @@ static __init void build_tlb_write_entry case CPU_AU1550: case CPU_AU1200: case CPU_PR4450: - i_nop(p); + if (wmode == tlb_arbitrary) { + il_bgezl(p, r, tmp, label_tlbw_hazard); + i_tlbwi(p); + } else + i_nop(p); tlbw(p); + l_tlbw_hazard(l, *p); break; case CPU_R10000: @@ -878,15 +898,24 @@ static __init void build_tlb_write_entry case CPU_4KSC: case CPU_20KC: case CPU_25KF: + if (wmode == tlb_arbitrary) { + il_bgezl(p, r, tmp, label_tlbw_hazard); + i_tlbwi(p); + } tlbw(p); + l_tlbw_hazard(l, *p); break; case CPU_NEVADA: - i_nop(p); /* QED specifies 2 nops hazard */ /* * This branch uses up a mtc0 hazard nop slot and saves * a nop after the tlbw instruction. */ + if (wmode == tlb_arbitrary) { + il_bgezl(p, r, tmp, label_tlbw_hazard); + i_tlbwi(p); + } else + i_nop(p); /* QED specifies 2 nops hazard */ il_bgezl(p, r, 0, label_tlbw_hazard); tlbw(p); l_tlbw_hazard(l, *p); @@ -896,8 +925,13 @@ static __init void build_tlb_write_entry i_nop(p); i_nop(p); i_nop(p); - i_nop(p); + if (wmode == tlb_arbitrary) { + il_bgezl(p, r, tmp, label_tlbw_hazard); + i_tlbwi(p); + } else + i_nop(p); tlbw(p); + l_tlbw_hazard(l, *p); break; case CPU_4KEC: @@ -905,7 +939,12 @@ static __init void build_tlb_write_entry case CPU_34K: case CPU_74K: i_ehb(p); + if (wmode == tlb_arbitrary) { + il_bgezl(p, r, tmp, label_tlbw_hazard); + i_tlbwi(p); + } tlbw(p); + l_tlbw_hazard(l, *p); break; case CPU_RM9000: @@ -918,8 +957,13 @@ static __init void build_tlb_write_entry i_ssnop(p); i_ssnop(p); i_ssnop(p); - i_ssnop(p); + if (wmode == tlb_arbitrary) { + il_bgezl(p, r, tmp, label_tlbw_hazard); + i_tlbwi(p); + } else + i_ssnop(p); tlbw(p); + l_tlbw_hazard(l, *p); i_ssnop(p); i_ssnop(p); i_ssnop(p); @@ -932,8 +976,13 @@ static __init void build_tlb_write_entry case CPU_VR4181: case CPU_VR4181A: i_nop(p); - i_nop(p); + if (wmode == tlb_arbitrary) { + il_bgezl(p, r, tmp, label_tlbw_hazard); + i_tlbwi(p); + } else + i_nop(p); tlbw(p); + l_tlbw_hazard(l, *p); i_nop(p); i_nop(p); break; @@ -942,8 +991,13 @@ static __init void build_tlb_write_entry case CPU_VR4133: case CPU_R5432: i_nop(p); - i_nop(p); + if (wmode == tlb_arbitrary) { + il_bgezl(p, r, tmp, label_tlbw_hazard); + i_tlbwi(p); + } else + i_nop(p); tlbw(p); + l_tlbw_hazard(l, *p); break; default: @@ -1123,7 +1177,7 @@ static __init void build_get_ptep(u32 ** } static __init void build_update_entries(u32 **p, unsigned int tmp, - unsigned int ptep) + unsigned int ptep, int loadindex) { /* * 64bit address support (36bit on a 32bit CPU) in a 32bit @@ -1136,6 +1190,8 @@ #ifdef CONFIG_64BIT_PHYS_ADDR i_dsrl(p, tmp, tmp, 6); /* convert to entrylo0 */ i_mtc0(p, tmp, C0_ENTRYLO0); /* load it */ i_dsrl(p, ptep, ptep, 6); /* convert to entrylo1 */ + if (loadindex) + i_mfc0(p, tmp, C0_INDEX); /* used by tlb_arbitrary */ i_mtc0(p, ptep, C0_ENTRYLO1); /* load it */ } else { int pte_off_even = sizeof(pte_t) / 2; @@ -1145,6 +1201,8 @@ #ifdef CONFIG_64BIT_PHYS_ADDR i_lw(p, tmp, pte_off_even, ptep); /* get even pte */ i_mtc0(p, tmp, C0_ENTRYLO0); /* load it */ i_lw(p, ptep, pte_off_odd, ptep); /* get odd pte */ + if (loadindex) + i_mfc0(p, tmp, C0_INDEX); /* used by tlb_arbitrary */ i_mtc0(p, ptep, C0_ENTRYLO1); /* load it */ } #else @@ -1157,8 +1215,8 @@ #else i_mtc0(p, 0, C0_ENTRYLO0); i_mtc0(p, tmp, C0_ENTRYLO0); /* load it */ i_SRL(p, ptep, ptep, 6); /* convert to entrylo1 */ - if (r45k_bvahwbug()) - i_mfc0(p, tmp, C0_INDEX); + if (r45k_bvahwbug() || loadindex) + i_mfc0(p, tmp, C0_INDEX); /* used by tlb_arbitrary */ if (r4k_250MHZhwbug()) i_mtc0(p, 0, C0_ENTRYLO1); i_mtc0(p, ptep, C0_ENTRYLO1); /* load it */ @@ -1198,8 +1256,8 @@ #else #endif build_get_ptep(&p, K0, K1); - build_update_entries(&p, K0, K1); - build_tlb_write_entry(&p, &l, &r, tlb_random); + build_update_entries(&p, K0, K1, 0); + build_tlb_write_entry(&p, K0, &l, &r, tlb_random); l_leave(&l, p); i_eret(&p); /* return from trap */ @@ -1647,12 +1705,13 @@ # endif static void __init build_r4000_tlbchange_handler_tail(u32 **p, struct label **l, struct reloc **r, unsigned int tmp, - unsigned int ptr) + unsigned int ptr, + enum tlb_write_entry wmode) { i_ori(p, ptr, ptr, sizeof(pte_t)); i_xori(p, ptr, ptr, sizeof(pte_t)); - build_update_entries(p, tmp, ptr); - build_tlb_write_entry(p, l, r, tlb_indexed); + build_update_entries(p, tmp, ptr, wmode == tlb_arbitrary); + build_tlb_write_entry(p, tmp, l, r, wmode); l_leave(l, *p); i_eret(p); /* return from trap */ @@ -1667,6 +1726,9 @@ static void __init build_r4000_tlb_load_ struct label *l = labels; struct reloc *r = relocs; int i; + extern int rdhwr_noopt; + enum tlb_write_entry wmode = (!rdhwr_noopt && cpu_has_vtag_icache) ? + tlb_arbitrary : tlb_indexed; memset(handle_tlbl, 0, sizeof(handle_tlbl)); memset(labels, 0, sizeof(labels)); @@ -1684,7 +1746,7 @@ static void __init build_r4000_tlb_load_ build_r4000_tlbchange_handler_head(&p, &l, &r, K0, K1); build_pte_present(&p, &l, &r, K0, K1, label_nopage_tlbl); build_make_valid(&p, &r, K0, K1); - build_r4000_tlbchange_handler_tail(&p, &l, &r, K0, K1); + build_r4000_tlbchange_handler_tail(&p, &l, &r, K0, K1, wmode); l_nopage_tlbl(&l, p); i_j(&p, (unsigned long)tlb_do_page_fault_0 & 0x0fffffff); @@ -1718,7 +1780,7 @@ static void __init build_r4000_tlb_store build_r4000_tlbchange_handler_head(&p, &l, &r, K0, K1); build_pte_writable(&p, &l, &r, K0, K1, label_nopage_tlbs); build_make_write(&p, &r, K0, K1); - build_r4000_tlbchange_handler_tail(&p, &l, &r, K0, K1); + build_r4000_tlbchange_handler_tail(&p, &l, &r, K0, K1, tlb_indexed); l_nopage_tlbs(&l, p); i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff); @@ -1753,7 +1815,7 @@ static void __init build_r4000_tlb_modif build_pte_modifiable(&p, &l, &r, K0, K1, label_nopage_tlbm); /* Present and writable bits set, set accessed and dirty bits. */ build_make_write(&p, &r, K0, K1); - build_r4000_tlbchange_handler_tail(&p, &l, &r, K0, K1); + build_r4000_tlbchange_handler_tail(&p, &l, &r, K0, K1, tlb_indexed); l_nopage_tlbm(&l, p); i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff); From anemo@mba.ocn.ne.jp Mon Jul 10 15:54:39 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 10 Jul 2006 15:54:50 +0100 (BST) Received: from mba.ocn.ne.jp ([210.190.142.172]:43714 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S8133454AbWGJOyj (ORCPT ); Mon, 10 Jul 2006 15:54:39 +0100 Received: from localhost (p8142-ipad212funabasi.chiba.ocn.ne.jp [58.91.172.142]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 45664A725; Mon, 10 Jul 2006 23:54:35 +0900 (JST) Date: Mon, 10 Jul 2006 23:55:53 +0900 (JST) Message-Id: <20060710.235553.48797818.anemo@mba.ocn.ne.jp> To: macro@linux-mips.org Cc: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] fast path for rdhwr emulation for TLS From: Atsushi Nemoto In-Reply-To: References: <20060708.011245.82794581.anemo@mba.ocn.ne.jp> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11965 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Fri, 7 Jul 2006 17:58:44 +0100 (BST), "Maciej W. Rozycki" wrote: > mfc0 k0, CP0_CAUSE > MFC0 k1, CP0_EPC > bltz k0, handle_ri_slow /* if delay slot */ > lui k0, 0x7c03 I noticed that checking for CP0_CAUSE.BD is unneeded, since we are checking the instruction code anyway and "rdhwr" does not have a delay slot. I removed the checking on the "take 2" patch I just sent. --- Atsushi Nemoto From craigslist@willmert.com Mon Jul 10 18:45:54 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 10 Jul 2006 18:46:03 +0100 (BST) Received: from imf22aec.mail.bellsouth.net ([205.152.59.70]:12494 "EHLO imf22aec.mail.bellsouth.net") by ftp.linux-mips.org with ESMTP id S8133875AbWGJRpy (ORCPT ); Mon, 10 Jul 2006 18:45:54 +0100 Received: from ibm67aec.bellsouth.net ([74.236.202.48]) by imf22aec.mail.bellsouth.net with ESMTP id <20060710174548.SFPI13979.imf22aec.mail.bellsouth.net@ibm67aec.bellsouth.net> for ; Mon, 10 Jul 2006 13:45:48 -0400 Received: from [192.168.1.96] (really [74.236.202.48]) by ibm67aec.bellsouth.net with ESMTP id <20060710174548.RVBY16552.ibm67aec.bellsouth.net@[192.168.1.96]> for ; Mon, 10 Jul 2006 13:45:48 -0400 Mime-Version: 1.0 (Apple Message framework v750) Content-Transfer-Encoding: 7bit Message-Id: <4E35E8AD-C3ED-47AE-A738-97B7F08D946C@willmert.com> Content-Type: text/plain; charset=US-ASCII; delsp=yes; format=flowed To: linux-mips@linux-mips.org From: craigslist Subject: PCMCIA Help - AU1000 Alchemy Dev Board Date: Mon, 10 Jul 2006 13:45:24 -0400 X-Mailer: Apple Mail (2.750) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11966 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: craigslist@willmert.com Precedence: bulk X-list: linux-mips Hi all, I'm working on a project with linux 2.6.10 on the AMD au1000 alchemy board. I'm attempting to get the pcmcia socket working with a wireless network card using the madwifi drivers. I have the 2.6.10 kernel built for the au1000 dev board and the filesystem, etc. However, I'm having difficulties getting the PCMCIA socket to work correctly. At this point, i'm just working with the au1x00_ss module trying to get it to recognize a card insert into socket 0 of the au1000 dev board. Through debugging, I've noticed that the board_status register at 0XAE000004, bit 4, is not changing whether a card is inserted or not. It's my understanding that the first step to getting this working is detecting the presence of a card, however, I am apparently missing some detail as that register value never changes. Does anyone have experience with this? Has anyone gotten the pcmcia sockets working on the au1000 in 2.6? Any suggestions would be greatly appreciated. Thanks Stefan Willmert From manoje@broadcom.com Tue Jul 11 00:00:35 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 Jul 2006 00:00:45 +0100 (BST) Received: from mms3.broadcom.com ([216.31.210.19]:51470 "EHLO MMS3.broadcom.com") by ftp.linux-mips.org with ESMTP id S8133816AbWGJXAf (ORCPT ); Tue, 11 Jul 2006 00:00:35 +0100 Received: from 10.10.64.154 by MMS3.broadcom.com with ESMTP (Broadcom SMTP Relay (Email Firewall v6.2.0)); Mon, 10 Jul 2006 16:00:16 -0700 X-Server-Uuid: B238DE4C-2139-4D32-96A8-DD564EF2313E Received: by mail-irva-10.broadcom.com (Postfix, from userid 47) id 9224D2B0; Mon, 10 Jul 2006 16:00:16 -0700 (PDT) Received: from mail-irva-8.broadcom.com (mail-irva-8 [10.10.64.221]) by mail-irva-10.broadcom.com (Postfix) with ESMTP id 6DA1B2AF; Mon, 10 Jul 2006 16:00:16 -0700 (PDT) Received: from mail-sj1-12.sj.broadcom.com (mail-sj1-12.sj.broadcom.com [10.16.128.215]) by mail-irva-8.broadcom.com (MOS 3.7.5a-GA) with ESMTP id DYL90946; Mon, 10 Jul 2006 16:00:15 -0700 (PDT) Received: from NT-SJCA-0751.brcm.ad.broadcom.com (nt-sjca-0751 [10.16.192.221]) by mail-sj1-12.sj.broadcom.com (Postfix) with ESMTP id 6B95420502; Mon, 10 Jul 2006 16:00:15 -0700 (PDT) Received: from NT-SJCA-0752.brcm.ad.broadcom.com ([10.16.192.222]) by NT-SJCA-0751.brcm.ad.broadcom.com with Microsoft SMTPSVC(6.0.3790.1830); Mon, 10 Jul 2006 16:00:15 -0700 X-MimeOLE: Produced By Microsoft Exchange V6.5 Content-class: urn:content-classes:message MIME-Version: 1.0 Subject: [PATCH] update sb1250-swarm-defconfig Date: Mon, 10 Jul 2006 16:00:12 -0700 Message-ID: <710F16C36810444CA2F5821E5EAB7F230675D0@NT-SJCA-0752.brcm.ad.broadcom.com> Thread-Topic: [PATCH] update sb1250-swarm-defconfig Thread-Index: AcakdJmLnbao0lI4QU641ETr8/MmgQ== From: "Manoj Ekbote" To: linux-mips@linux-mips.org cc: ralf@linux-mips.org X-OriginalArrivalTime: 10 Jul 2006 23:00:15.0346 (UTC) FILETIME=[9B30B520:01C6A474] X-TMWD-Spam-Summary: SEV=1.1; DFV=A2006071013; IFV=2.0.6,4.0-7; RPD=4.00.0004; RPDID=303030312E30413039303230362E34344232443942452E303032442D412D; ENG=IBF; TS=20060710230018; CAT=NONE; CON=NONE; X-MMS-Spam-Filter-ID: A2006071013_4.00.0004_2.0.6,4.0-7 X-WSS-ID: 68AC038A1OO4149131-01-01 Content-Type: multipart/alternative; boundary="----_=_NextPart_001_01C6A474.9B081E80" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11967 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: manoje@broadcom.com Precedence: bulk X-list: linux-mips This is a multi-part message in MIME format. ------_=_NextPart_001_01C6A474.9B081E80 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: quoted-printable Hi, This patch updates sb1250-swarm-defconfig file to default to Sibyte Bn silicon as the PASS_1 processors are very old. =20 --- a/arch/mips/configs/sb1250-swarm_defconfig=20 +++ b/arch/mips/configs/sb1250-swarm_defconfig=20 @@ -66,9 +66,9 @@ # CONFIG_TOSHIBA_RBTX4938 is not set CONFIG_SIBYTE_SB1250=3Dy CONFIG_SIBYTE_SB1xxx_SOC=3Dy -CONFIG_CPU_SB1_PASS_1=3Dy +# CONFIG_CPU_SB1_PASS_1 is not set # CONFIG_CPU_SB1_PASS_2_1250 is not set -# CONFIG_CPU_SB1_PASS_2_2 is not set +CONFIG_CPU_SB1_PASS_2_2=3Dy # CONFIG_CPU_SB1_PASS_4 is not set # CONFIG_CPU_SB1_PASS_2_112x is not set # CONFIG_CPU_SB1_PASS_3 is not set =20 =20 -manoj =20 ------_=_NextPart_001_01C6A474.9B081E80 Content-Type: text/html; charset=us-ascii Content-Transfer-Encoding: quoted-printable

Hi,

 This patch updates sb1250-swarm-defconfig file to default to Sibyte Bn silicon=20 as the PASS_1 processors are very old.

 
---=20 a/arch/mips/configs/sb1250-swarm_defconfig 
+++=20 b/arch/mips/configs/sb1250-swarm_defconfig 
@@ -66,9 +66,9 @@
 #=20 CONFIG_TOSHIBA_RBTX4938 is not=20 set
 CONFIG_SIBYTE_SB1250=3Dy
 CONFIG_SIBYTE_SB1xxx_SOC=3D= y
-CONFIG_CPU_SB1_PASS_1=3Dy
+#=20 CONFIG_CPU_SB1_PASS_1 is not set
 # CONFIG_CPU_SB1_PASS_2_1250 = is not=20 set
-# CONFIG_CPU_SB1_PASS_2_2 is not=20 set
+CONFIG_CPU_SB1_PASS_2_2=3Dy
 # CONFIG_CPU_SB1_PASS_4 is = not=20 set
 # CONFIG_CPU_SB1_PASS_2_112x is not set
 #=20 CONFIG_CPU_SB1_PASS_3 is not set
 
 
-manoj
 
------_=_NextPart_001_01C6A474.9B081E80-- From mrv@corecom.co.kr Tue Jul 11 02:22:10 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 Jul 2006 02:22:18 +0100 (BST) Received: from [220.76.242.187] ([220.76.242.187]:16269 "EHLO localhost.localdomain") by ftp.linux-mips.org with ESMTP id S8133892AbWGKBWK (ORCPT ); Tue, 11 Jul 2006 02:22:10 +0100 Received: from mrv ([192.168.11.157]) by localhost.localdomain (8.12.8/8.12.8) with SMTP id k6B1NhiU020256 for ; Tue, 11 Jul 2006 10:23:46 +0900 Message-ID: <000901c6a488$6f7e1800$9d0ba8c0@mrv> From: "Roman Mashak" To: Subject: SHT_REL bad size Date: Tue, 11 Jul 2006 10:22:11 +0900 MIME-Version: 1.0 Content-Type: text/plain; format=flowed; charset="windows-1251"; reply-type=original Content-Transfer-Encoding: 7bit X-Priority: 3 X-MSMail-Priority: Normal X-Mailer: Microsoft Outlook Express 6.00.2900.2869 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2900.2869 FL-Build: Fidolook 2002 (SL) 6.0.2800.86 - 14/6/2003 22:16:25 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11968 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mrv@corecom.co.kr Precedence: bulk X-list: linux-mips Hello, I'm trying to compile application for MIPS 4km (designed by "Cavium"). Here is the command line: Compiling main.cpp mips-g++ -c -Wall -D_GNU_SOURCE -mips32 -mtune=4kc main.cpp -o main.o Compiling cmd.cpp mips-g++ -c -Wall -D_GNU_SOURCE -mips32 -mtune=4kc cmdProc.cpp -o cmdProc.o Linking binkd mips-g++ main.o cmd.o ../lnkep.c ../lib/libapi.a -o binkd Compilation is fine, but on target I ran into error launching the program: #./binkd SHT_REL bad size=0 ./binkd cannot execute Seems like the problem with linker? Appreciate any hints, thank you. With best regards, Roman Mashak. E-mail: mrv@corecom.co.kr From drow@nevyn.them.org Tue Jul 11 03:53:45 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 Jul 2006 03:53:54 +0100 (BST) Received: from nevyn.them.org ([66.93.172.17]:50092 "EHLO nevyn.them.org") by ftp.linux-mips.org with ESMTP id S8133905AbWGKCxp (ORCPT ); Tue, 11 Jul 2006 03:53:45 +0100 Received: from drow by nevyn.them.org with local (Exim 4.54) id 1G08Na-0001nx-Hr; Mon, 10 Jul 2006 22:53:42 -0400 Date: Mon, 10 Jul 2006 22:53:42 -0400 From: Daniel Jacobowitz To: Atsushi Nemoto Cc: macro@linux-mips.org, linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] fast path for rdhwr emulation for TLS Message-ID: <20060711025342.GA6898@nevyn.them.org> References: <20060708.011245.82794581.anemo@mba.ocn.ne.jp> <20060710.235553.48797818.anemo@mba.ocn.ne.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20060710.235553.48797818.anemo@mba.ocn.ne.jp> User-Agent: Mutt/1.5.11+cvs20060403 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11969 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dan@debian.org Precedence: bulk X-list: linux-mips On Mon, Jul 10, 2006 at 11:55:53PM +0900, Atsushi Nemoto wrote: > On Fri, 7 Jul 2006 17:58:44 +0100 (BST), "Maciej W. Rozycki" wrote: > > mfc0 k0, CP0_CAUSE > > MFC0 k1, CP0_EPC > > bltz k0, handle_ri_slow /* if delay slot */ > > lui k0, 0x7c03 > > I noticed that checking for CP0_CAUSE.BD is unneeded, since we are > checking the instruction code anyway and "rdhwr" does not have a delay > slot. I removed the checking on the "take 2" patch I just sent. Isn't BD "this instruction is in a delay slot", not "this instruction has a delay slot"? It affects where we go when we return. BTW, if the fast emulation can't handle rdhwr in a delay slot, please report a bug on GCC asking it not to put rdhwr in delay slots by default. It's probably worthwhile. -- Daniel Jacobowitz CodeSourcery From anemo@mba.ocn.ne.jp Tue Jul 11 04:20:28 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 Jul 2006 04:20:37 +0100 (BST) Received: from topsns2.toshiba-tops.co.jp ([202.230.225.126]:28841 "EHLO topsns2.toshiba-tops.co.jp") by ftp.linux-mips.org with ESMTP id S8126484AbWGKDU2 (ORCPT ); Tue, 11 Jul 2006 04:20:28 +0100 Received: from topsms.toshiba-tops.co.jp by topsns2.toshiba-tops.co.jp via smtpd (for ftp.linux-mips.org [194.74.144.162]) with ESMTP; Tue, 11 Jul 2006 12:20:25 +0900 Received: from topsms.toshiba-tops.co.jp (localhost.localdomain [127.0.0.1]) by localhost.toshiba-tops.co.jp (Postfix) with ESMTP id 608FC203F1; Tue, 11 Jul 2006 12:20:15 +0900 (JST) Received: from srd2sd.toshiba-tops.co.jp (srd2sd.toshiba-tops.co.jp [172.17.28.2]) by topsms.toshiba-tops.co.jp (Postfix) with ESMTP id 53E7D203E9; Tue, 11 Jul 2006 12:20:15 +0900 (JST) Received: from localhost (fragile [172.17.28.65]) by srd2sd.toshiba-tops.co.jp (8.12.10/8.12.10) with ESMTP id k6B3KEW0022064; Tue, 11 Jul 2006 12:20:14 +0900 (JST) (envelope-from anemo@mba.ocn.ne.jp) Date: Tue, 11 Jul 2006 12:20:14 +0900 (JST) Message-Id: <20060711.122014.52129937.nemoto@toshiba-tops.co.jp> To: dan@debian.org Cc: macro@linux-mips.org, linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] fast path for rdhwr emulation for TLS From: Atsushi Nemoto In-Reply-To: <20060711025342.GA6898@nevyn.them.org> References: <20060710.235553.48797818.anemo@mba.ocn.ne.jp> <20060711025342.GA6898@nevyn.them.org> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.3 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11970 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Mon, 10 Jul 2006 22:53:42 -0400, Daniel Jacobowitz wrote: > > I noticed that checking for CP0_CAUSE.BD is unneeded, since we are > > checking the instruction code anyway and "rdhwr" does not have a delay > > slot. I removed the checking on the "take 2" patch I just sent. > > Isn't BD "this instruction is in a delay slot", not "this instruction > has a delay slot"? It affects where we go when we return. Well, the BD means "the exception occurred on a delay slot of this (which EPC points) instruction". If rdhwr was in a delay slot, EPC points the preceding jump/branch instruction. This fast path is reading a instruction at the EPC (regardless BD), so it must not be "rdhwr" and fall back to slow path. > BTW, if the fast emulation can't handle rdhwr in a delay slot, please > report a bug on GCC asking it not to put rdhwr in delay slots by > default. It's probably worthwhile. If rdhwr was on a delay slot, the slow emulation will be more slower. So I think rdhwr should not be put on delay slot anyway regardless fast emulation. I asked on GCC bugzilla a few days ago but can not got feedback yet. http://gcc.gnu.org/bugzilla/show_bug.cgi?id=28126 --- Atsushi Nemoto From Eckhardt@satorlaser.com Tue Jul 11 09:14:29 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 Jul 2006 09:14:39 +0100 (BST) Received: from mail.domino-uk.com ([193.131.116.193]:35847 "EHLO vMimePS1.domino-printing.com") by ftp.linux-mips.org with ESMTP id S8133396AbWGKIO3 (ORCPT ); Tue, 11 Jul 2006 09:14:29 +0100 Received: from emea-exchange3.emea.dps.local (EMEA-EXCHANGE3) by vMimePS1.domino-printing.com (Clearswift SMTPRS 5.2.3) with ESMTP id for ; Tue, 11 Jul 2006 08:13:02 +0100 Received: from tuxator2.emea.dps.local ([192.168.55.75]) by emea-exchange3.emea.dps.local with Microsoft SMTPSVC(6.0.3790.1830); Tue, 11 Jul 2006 10:14:22 +0200 From: Ulrich Eckhardt Organization: Sator Laser GmbH To: linux-mips@linux-mips.org Subject: Re: PCMCIA Help - AU1000 Alchemy Dev Board Date: Tue, 11 Jul 2006 10:14:21 +0200 User-Agent: KMail/1.9.1 References: <4E35E8AD-C3ED-47AE-A738-97B7F08D946C@willmert.com> In-Reply-To: <4E35E8AD-C3ED-47AE-A738-97B7F08D946C@willmert.com> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200607111014.21617.eckhardt@satorlaser.com> X-OriginalArrivalTime: 11 Jul 2006 08:14:22.0163 (UTC) FILETIME=[03D66230:01C6A4C2] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11971 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: eckhardt@satorlaser.com Precedence: bulk X-list: linux-mips On Monday 10 July 2006 19:45, craigslist wrote: > I'm working on a project with linux 2.6.10 on the AMD au1000 alchemy > board. I think there are two boards, called Db1000 and Pb1000. It is the processor that is called Au1000. You first need to make sure which one you have. > I'm attempting to get the pcmcia socket working with a > wireless network card using the madwifi drivers. I have the 2.6.10 > kernel built for the au1000 dev board and the filesystem, etc. > However, I'm having difficulties getting the PCMCIA socket to work > correctly. > > At this point, i'm just working with the au1x00_ss module trying to > get it to recognize a card insert into socket 0 of the au1000 dev > board. Through debugging, I've noticed that the board_status register > at 0XAE000004, bit 4, is not changing whether a card is inserted or > not. It's my understanding that the first step to getting this > working is detecting the presence of a card, however, I am apparently > missing some detail as that register value never changes. > > Does anyone have experience with this? Has anyone gotten the pcmcia > sockets working on the au1000 in 2.6? I haven't worked with the Au1000 but the Au1100 on a custom board, and from there I have the following steps in mind: 1. The system-busses are used for multiple purposes, so the first thing to do is to configure the right bus for PCMCIA access (processor-specific). 2. You need to switch on power to the PCMCIA slot. There is no standard way to do that, as it depends on the board. On my board I had to read the layout to find the transistors used to switch the voltage, it was via some GPIO pins. These then also have to be properly configured (use a voltmeter to check power is present). Also mind that these are sometimes low-active or inverted along the lines - this caused confusion for me quite some times. You should then also be able to detect that the card is present and such things. I don't remember, but I think some of those did not go through GPIO so these should have fixed connections valid for all boards. 3. You need to map the PCMCIA memory ranges into virtual memory. This is again only processor-specific, see the documentation. Note that only the processor-specific part should be done by the au1x00_ss driver, though I wouldn't be surprised to find some board-specific parts there, too. It's not always easy to cleanly separate things. Good luck! Uli **************************************************** Visit our website at **************************************************** This Email and any files transmitted with it are intended only for the person or entity to which it is addressed and may contain confidential and/or privileged material. Any reading, redistribution, disclosure or other use of, or taking of any action in reliance upon, this information by persons or entities other than the intended recipient is prohibited. If you are not the intended recipient please contact the sender immediately and delete the material from your computer. E-mail may be susceptible to data corruption, interception, viruses and unauthorised amendment and Domino UK Limited does not accept liability for any such corruption, interception, viruses or amendment or their consequences. **************************************************** From vagabon.xyz@gmail.com Tue Jul 11 09:28:37 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 Jul 2006 09:28:48 +0100 (BST) Received: from nf-out-0910.google.com ([64.233.182.187]:18631 "EHLO nf-out-0910.google.com") by ftp.linux-mips.org with ESMTP id S8133396AbWGKI2h (ORCPT ); Tue, 11 Jul 2006 09:28:37 +0100 Received: by nf-out-0910.google.com with SMTP id k27so141131nfc for ; Tue, 11 Jul 2006 01:28:35 -0700 (PDT) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:reply-to:user-agent:mime-version:to:cc:subject:references:in-reply-to:content-type:content-transfer-encoding:from; b=oWante4wEqW7XS6sFVOCCWpcwEDO6peQLed5/y20uk9+qZ2u9KEvSQgZlU7IrX2KNez10uwmE2+fSpWff4DTb+eoBotyDmAowAQuXNC0jOk5ixAL64gH+VgF/a+cM7N7yIdKnO6PjHyUBX2dCh1FjG84Vrzo0G2N4SIKDP26kc0= Received: by 10.48.1.4 with SMTP id 4mr280349nfa; Tue, 11 Jul 2006 01:28:34 -0700 (PDT) Received: from ?192.168.0.24? ( [194.3.162.233]) by mx.gmail.com with ESMTP id k24sm13420090nfc.2006.07.11.01.28.33; Tue, 11 Jul 2006 01:28:34 -0700 (PDT) Message-ID: <44B3625B.7000700@innova-card.com> Date: Tue, 11 Jul 2006 10:33:31 +0200 Reply-To: Franck User-Agent: Thunderbird 1.5.0.4 (X11/20060614) MIME-Version: 1.0 To: Atsushi Nemoto CC: vagabon.xyz@gmail.com, linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] do not count pages in holes with sparsemem References: <20060707.002602.75184460.anemo@mba.ocn.ne.jp> <20060710.233454.39153668.anemo@mba.ocn.ne.jp> In-Reply-To: <20060710.233454.39153668.anemo@mba.ocn.ne.jp> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit From: Franck Bui-Huu Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11972 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vagabon.xyz@gmail.com Precedence: bulk X-list: linux-mips Atsushi Nemoto wrote: > On Mon, 10 Jul 2006 13:34:06 +0200, "Franck Bui-Huu" wrote: > >> can we use pfn_valid() instead of page_is_ram() ? bootmem_init() and >> sparse_init() have already been called so pfn_valid() should be safe >> here.... > > We can, but we can get more precise value using page_is_ram(). The > pfn_valid() returns true for _all_ pages on present section, and > currently the section size is 256MB. so your total pages of RAM in show_mem() is incorrect... if (!pfn_valid(pfn)) continue; page = pfn_to_page(pfn); total++; I don't know SPARSEMEM a lot but is it allowed to have holes inside a section ? Shouldn't we tune the section size to avoid holes inside section ? > >>> - max_mapnr = num_physpages = highend_pfn; >>> + max_mapnr = highend_pfn; >>> #else >>> - max_mapnr = num_physpages = max_low_pfn; >>> + max_mapnr = max_low_pfn; >> this is not always true, specially if FLATMEM set and your physical mem >> do not start at 0. > > Yes, and I think you are preparing a patch for these systems ;-) > good point :) Franck From anemo@mba.ocn.ne.jp Tue Jul 11 14:23:44 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 11 Jul 2006 14:23:53 +0100 (BST) Received: from mba.ocn.ne.jp ([210.190.142.172]:49101 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S3558331AbWGKNXo (ORCPT ); Tue, 11 Jul 2006 14:23:44 +0100 Received: from localhost (p6234-ipad28funabasi.chiba.ocn.ne.jp [220.107.205.234]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 0AF9AAF65; Tue, 11 Jul 2006 22:23:39 +0900 (JST) Date: Tue, 11 Jul 2006 22:24:58 +0900 (JST) Message-Id: <20060711.222458.74752678.anemo@mba.ocn.ne.jp> To: vagabon.xyz@gmail.com Cc: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] do not count pages in holes with sparsemem From: Atsushi Nemoto In-Reply-To: <44B3625B.7000700@innova-card.com> References: <20060710.233454.39153668.anemo@mba.ocn.ne.jp> <44B3625B.7000700@innova-card.com> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11973 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips On Tue, 11 Jul 2006 10:33:31 +0200, Franck Bui-Huu wrote: > > We can, but we can get more precise value using page_is_ram(). The > > pfn_valid() returns true for _all_ pages on present section, and > > currently the section size is 256MB. > > so your total pages of RAM in show_mem() is incorrect... > > if (!pfn_valid(pfn)) > continue; > page = pfn_to_page(pfn); > total++; > > > I don't know SPARSEMEM a lot but is it allowed to have holes inside > a section ? Shouldn't we tune the section size to avoid holes inside > section ? If holes exist in a section, show_mem() will count these pages as "reserved". You can count real pages by "total - reserved". Talking about nr_kernel_pages (calculated by zones_size[] and zones_holes[]) and num_physpages, these values are used to determine sizes of some kernel data structures, it would be better to set more precise value for them. While large holes in a section wastes some memory, make the section size customizable might be a good idea. Anyone? ;-) --- Atsushi Nemoto From giometti@enneenne.com Wed Jul 12 13:34:14 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 12 Jul 2006 13:34:23 +0100 (BST) Received: from 81-174-11-161.f5.ngi.it ([81.174.11.161]:28899 "EHLO gundam.enneenne.com") by ftp.linux-mips.org with ESMTP id S3561325AbWGLMeO (ORCPT ); Wed, 12 Jul 2006 13:34:14 +0100 Received: from giometti by gundam.enneenne.com with local (Exim 3.36 #1 (Debian)) id 1G0Xxf-0004di-00; Wed, 12 Jul 2006 08:12:39 +0200 Date: Wed, 12 Jul 2006 08:12:39 +0200 From: Rodolfo Giometti To: linux-mips@linux-mips.org Cc: linux-fbdev-devel@lists.sourceforge.net Subject: [PATCH] au1100fb.c info->var.rotate fix Message-ID: <20060712061239.GF5994@gundam.enneenne.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="KJY2Ze80yH5MUxol" Content-Disposition: inline Organization: GNU/Linux Device Drivers, Embedded Systems and Courses X-PGP-Key: gpg --keyserver keyserver.linux.it --recv-keys D25A5633 User-Agent: Mutt/1.5.5.1+cvs20040105i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11974 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: giometti@linux.it Precedence: bulk X-list: linux-mips --KJY2Ze80yH5MUxol Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hello, here a little patch to fix "info->var.rotate" data settings. This info should be deduced directly from "fbdev->panel->control_base" defined into au1100fb.h. Ciao, Rodolfo Signed-off-by: Rodolfo Giometti -- GNU/Linux Solutions e-mail: giometti@enneenne.com Linux Device Driver giometti@gnudd.com Embedded Systems giometti@linux.it UNIX programming phone: +39 349 2432127 --KJY2Ze80yH5MUxol Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename=patch-au1100fb-rotate diff --git a/drivers/video/au1100fb.c b/drivers/video/au1100fb.c index f492fe8..dc5a673 100644 --- a/drivers/video/au1100fb.c +++ b/drivers/video/au1100fb.c @@ -177,10 +177,11 @@ int au1100fb_setmode(struct au1100fb_dev } info->screen_size = info->fix.line_length * info->var.yres_virtual; + info->var.rotate = ((fbdev->panel->control_base&LCD_CONTROL_SM_MASK) \ + >> LCD_CONTROL_SM_BIT) * 90; /* Determine BPP mode and format */ - fbdev->regs->lcd_control = fbdev->panel->control_base | - ((info->var.rotate/90) << LCD_CONTROL_SM_BIT); + fbdev->regs->lcd_control = fbdev->panel->control_base; fbdev->regs->lcd_intenable = 0; fbdev->regs->lcd_intstatus = 0; --KJY2Ze80yH5MUxol-- From giometti@enneenne.com Wed Jul 12 14:10:18 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 12 Jul 2006 14:10:28 +0100 (BST) Received: from 81-174-11-161.f5.ngi.it ([81.174.11.161]:56209 "EHLO gundam.enneenne.com") by ftp.linux-mips.org with ESMTP id S3561327AbWGLNKS (ORCPT ); Wed, 12 Jul 2006 14:10:18 +0100 Received: from giometti by gundam.enneenne.com with local (Exim 3.36 #1 (Debian)) id 1G0YTH-0005gZ-00; Wed, 12 Jul 2006 08:45:19 +0200 Date: Wed, 12 Jul 2006 08:45:19 +0200 From: Rodolfo Giometti To: linux-mips@linux-mips.org Cc: linux-fbdev-devel@lists.sourceforge.net Subject: [PATCH] au1100fb.c cursor enable/disable Message-ID: <20060712064519.GA17240@gundam.enneenne.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="FL5UXtIhxfXey3p5" Content-Disposition: inline Organization: GNU/Linux Device Drivers, Embedded Systems and Courses X-PGP-Key: gpg --keyserver keyserver.linux.it --recv-keys D25A5633 User-Agent: Mutt/1.5.5.1+cvs20040105i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11975 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: giometti@linux.it Precedence: bulk X-list: linux-mips --FL5UXtIhxfXey3p5 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hello, here a patch to add cursor enable/disable, very useful if you wish a full screen boot logo. Cursor can be disabled from kernel command line: video=au1100fb:nocursor,panel:Toppoly_TD035STED4 or from sysfs interface: echo 1 > /sys/module/au1100fb/parameters/nocursor The patch also fixes up some wrong indentation issues. Ciao, Rodolfo Signed-off-by: Rodolfo Giometti -- GNU/Linux Solutions e-mail: giometti@enneenne.com Linux Device Driver giometti@gnudd.com Embedded Systems giometti@linux.it UNIX programming phone: +39 349 2432127 --FL5UXtIhxfXey3p5 Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename=patch-au1100fb-nocursor diff --git a/drivers/video/au1100fb.c b/drivers/video/au1100fb.c index e0b71fe..1b9ad17 100644 --- a/drivers/video/au1100fb.c +++ b/drivers/video/au1100fb.c @@ -8,6 +8,7 @@ * * * PM support added by Rodolfo Giometti + * Cursor enable/disable by Rodolfo Giometti * * Copyright 2002 MontaVista Software * Author: MontaVista Software, Inc. @@ -114,6 +115,10 @@ static struct fb_var_screeninfo au1100fb static struct au1100fb_drv_info drv_info; +static int nocursor = 0; +module_param(nocursor, int, 0644); +MODULE_PARM_DESC(nocursor, "cursor enable/disable"); + int au1100fb_fb_blank(int blank_mode, struct fb_info *fbi); /* @@ -440,6 +445,17 @@ int au1100fb_fb_mmap(struct fb_info *fbi return 0; } +/* fb_cursor + * Used to disable cursor drawing... + */ +int au1100fb_fb_cursor(struct fb_info *info, struct fb_cursor *cursor) +{ + if (nocursor) + return 0; + else + return -EINVAL; /* just to force soft_cursor() call */ +} + static struct fb_ops au1100fb_ops = { .owner = THIS_MODULE, @@ -451,6 +467,7 @@ static struct fb_ops au1100fb_ops = .fb_imageblit = cfb_imageblit, .fb_rotate = au1100fb_fb_rotate, .fb_mmap = au1100fb_fb_mmap, + .fb_cursor = au1100fb_fb_cursor, }; @@ -705,7 +722,7 @@ int au1100fb_setup(char *options) if (options) { while ((this_opt = strsep(&options,",")) != NULL) { /* Panel option */ - if (!strncmp(this_opt, "panel:", 6)) { + if (!strncmp(this_opt, "panel:", 6)) { int i; this_opt += 6; for (i = 0; i < num_panels; i++) { @@ -713,13 +730,18 @@ int au1100fb_setup(char *options) known_lcd_panels[i].name, strlen(this_opt))) { panel_idx = i; - break; + break; + } } - } if (i >= num_panels) { print_warn("Panel %s not supported!", this_opt); } } + if (!strncmp(this_opt, "nocursor", 8)) { + this_opt += 8; + nocursor = 1; + print_info("Cursor disabled"); + } /* Mode option (only option that start with digit) */ else if (isdigit(this_opt[0])) { mode = kmalloc(strlen(this_opt) + 1, GFP_KERNEL); @@ -728,7 +750,7 @@ int au1100fb_setup(char *options) /* Unsupported option */ else { print_warn("Unsupported option \"%s\"", this_opt); - } + } } } --FL5UXtIhxfXey3p5-- From giometti@enneenne.com Wed Jul 12 14:28:33 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 12 Jul 2006 14:28:42 +0100 (BST) Received: from 81-174-11-161.f5.ngi.it ([81.174.11.161]:45535 "EHLO gundam.enneenne.com") by ftp.linux-mips.org with ESMTP id S3561335AbWGLN2d (ORCPT ); Wed, 12 Jul 2006 14:28:33 +0100 Received: from giometti by gundam.enneenne.com with local (Exim 3.36 #1 (Debian)) id 1G0Yjl-000690-00; Wed, 12 Jul 2006 09:02:21 +0200 Date: Wed, 12 Jul 2006 09:02:21 +0200 From: Rodolfo Giometti To: linux-mips@linux-mips.org Cc: linux-fbdev-devel@lists.sourceforge.net Subject: [PATCH] au1100fb.c startup sequence Message-ID: <20060712070221.GI5994@gundam.enneenne.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="WHz+neNWvhIGAO8A" Content-Disposition: inline Organization: GNU/Linux Device Drivers, Embedded Systems and Courses X-PGP-Key: gpg --keyserver keyserver.linux.it --recv-keys D25A5633 User-Agent: Mutt/1.5.5.1+cvs20040105i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11976 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: giometti@linux.it Precedence: bulk X-list: linux-mips --WHz+neNWvhIGAO8A Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hello, here a patch to fix up the start up sequence. This new sequence allow you to correctly enable the LCD controller even if the bootloader has already did it. The patch also fixes up a wrong indentation issue. Ciao, Rodolfo Signed-off-by: Rodolfo Giometti -- GNU/Linux Solutions e-mail: giometti@enneenne.com Linux Device Driver giometti@gnudd.com Embedded Systems giometti@linux.it UNIX programming phone: +39 349 2432127 --WHz+neNWvhIGAO8A Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename=patch-au1100fb-startup-fix diff --git a/drivers/video/au1100fb.c b/drivers/video/au1100fb.c index 1b9ad17..f9fcc65 100644 --- a/drivers/video/au1100fb.c +++ b/drivers/video/au1100fb.c @@ -167,7 +167,7 @@ int au1100fb_setmode(struct au1100fb_dev info->fix.visual = FB_VISUAL_TRUECOLOR; info->fix.line_length = info->var.xres_virtual << 1; /* depth=16 */ - } + } } else { /* mono */ info->fix.visual = FB_VISUAL_MONO10; @@ -180,16 +180,11 @@ int au1100fb_setmode(struct au1100fb_dev /* Determine BPP mode and format */ fbdev->regs->lcd_control = fbdev->panel->control_base; - - fbdev->regs->lcd_intenable = 0; - fbdev->regs->lcd_intstatus = 0; - fbdev->regs->lcd_horztiming = fbdev->panel->horztiming; - fbdev->regs->lcd_verttiming = fbdev->panel->verttiming; - fbdev->regs->lcd_clkcontrol = fbdev->panel->clkcontrol_base; - + fbdev->regs->lcd_intenable = 0; + fbdev->regs->lcd_intstatus = 0; fbdev->regs->lcd_dmaaddr0 = LCD_DMA_SA_N(fbdev->fb_phys); if (panel_is_dual(fbdev->panel)) { @@ -217,7 +212,8 @@ int au1100fb_setmode(struct au1100fb_dev fbdev->regs->lcd_pwmhi = 0; /* Resume controller */ - au1100fb_fb_blank(VESA_NO_BLANKING, &fbdev->info); + mdelay(10); + au1100fb_fb_blank(VESA_NO_BLANKING, info); return 0; } --WHz+neNWvhIGAO8A-- From david.goodenough@btconnect.com Wed Jul 12 17:37:26 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 12 Jul 2006 17:37:35 +0100 (BST) Received: from s2.ukfsn.org ([217.158.120.143]:34265 "EHLO mail.ukfsn.org") by ftp.linux-mips.org with ESMTP id S3561366AbWGLQh0 (ORCPT ); Wed, 12 Jul 2006 17:37:26 +0100 Received: from [10.0.1.63] (84-45-236-142.no-dns-yet.enta.net [84.45.236.142]) by mail.ukfsn.org (Postfix) with ESMTP id C963CE6DC9 for ; Wed, 12 Jul 2006 17:34:46 +0100 (BST) From: David Goodenough To: linux-mips@linux-mips.org Subject: RouterBoard 532 NAND support Date: Wed, 12 Jul 2006 17:37:18 +0100 User-Agent: KMail/1.9.1 MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200607121737.18866.david.goodenough@btconnect.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11977 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: david.goodenough@btconnect.com Precedence: bulk X-list: linux-mips Does anyone have a patch for 2.6.17 to add NAND support for a Routerboard 532? I have the bits that add Yaffs, and I have some code that was a patch to 2.6.17-rc5 but I can not get it to work on 2.6.17 (it compiles but it seems to be looking in the wrong place for the NAND as it gets back 0xff as the manufacturer and device id file in drivers/mtd/nand/nand_base.c in the routine nand_scan. Any help gratefully received David From yoichi_yuasa@tripeaks.co.jp Thu Jul 13 09:33:09 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 13 Jul 2006 09:33:21 +0100 (BST) Received: from mo31.po.2iij.net ([210.128.50.54]:22582 "EHLO mo31.po.2iij.net") by ftp.linux-mips.org with ESMTP id S8133565AbWGMIdJ (ORCPT ); Thu, 13 Jul 2006 09:33:09 +0100 Received: by mo.po.2iij.net (mo31) id k6D8X4GO077110; Thu, 13 Jul 2006 17:33:04 +0900 (JST) Received: from localhost.localdomain (65.126.232.202.bf.2iij.net [202.232.126.65]) by mbox.po.2iij.net (mbox32) id k6D8X3Ag039372 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 13 Jul 2006 17:33:04 +0900 (JST) Date: Thu, 13 Jul 2006 17:33:03 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: linux-mips Subject: [PATCH] vr41xx: moved the IRQ numbers to asm-mips/vr41xx/irq.h Message-Id: <20060713173303.23f34127.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11978 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has moved the IRQ numbers to asm-mips/vr41xx/irq.h Please apply. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/pci/fixup-mpc30x.c mips/arch/mips/pci/fixup-mpc30x.c --- mips-orig/arch/mips/pci/fixup-mpc30x.c 2006-07-12 12:13:07.238092750 +0900 +++ mips/arch/mips/pci/fixup-mpc30x.c 2006-07-12 13:12:01.510971000 +0900 @@ -21,7 +21,6 @@ #include #include -#include static const int internal_func_irqs[] __initdata = { VRC4173_CASCADE_IRQ, diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/vr41xx/common/icu.c mips/arch/mips/vr41xx/common/icu.c --- mips-orig/arch/mips/vr41xx/common/icu.c 2006-07-12 12:13:07.318097750 +0900 +++ mips/arch/mips/vr41xx/common/icu.c 2006-07-12 13:00:49.252957500 +0900 @@ -38,6 +38,7 @@ #include #include +#include #include static void __iomem *icu1_base; diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/vr41xx/common/init.c mips/arch/mips/vr41xx/common/init.c --- mips-orig/arch/mips/vr41xx/common/init.c 2006-07-12 12:13:07.318097750 +0900 +++ mips/arch/mips/vr41xx/common/init.c 2006-07-12 13:01:04.617917750 +0900 @@ -24,6 +24,7 @@ #include #include +#include #include #define IO_MEM_RESOURCE_START 0UL diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/vr41xx/common/irq.c mips/arch/mips/vr41xx/common/irq.c --- mips-orig/arch/mips/vr41xx/common/irq.c 2006-07-12 12:13:07.318097750 +0900 +++ mips/arch/mips/vr41xx/common/irq.c 2006-07-12 13:01:44.724424250 +0900 @@ -22,7 +22,7 @@ #include #include -#include +#include typedef struct irq_cascade { int (*get_irq)(unsigned int, struct pt_regs *); diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/vr41xx/common/vrc4173.c mips/arch/mips/vr41xx/common/vrc4173.c --- mips-orig/arch/mips/vr41xx/common/vrc4173.c 2006-07-12 12:13:07.318097750 +0900 +++ mips/arch/mips/vr41xx/common/vrc4173.c 2006-07-12 13:17:44.408400750 +0900 @@ -28,6 +28,7 @@ #include #include +#include #include #include diff -pruN -X mips/Documentation/dontdiff mips-orig/drivers/char/vr41xx_giu.c mips/drivers/char/vr41xx_giu.c --- mips-orig/drivers/char/vr41xx_giu.c 2006-07-12 12:13:08.998202750 +0900 +++ mips/drivers/char/vr41xx_giu.c 2006-07-12 13:04:59.980627000 +0900 @@ -33,6 +33,7 @@ #include #include #include +#include #include MODULE_AUTHOR("Yoichi Yuasa "); diff -pruN -X mips/Documentation/dontdiff mips-orig/drivers/rtc/rtc-vr41xx.c mips/drivers/rtc/rtc-vr41xx.c --- mips-orig/drivers/rtc/rtc-vr41xx.c 2006-07-12 12:13:10.158275250 +0900 +++ mips/drivers/rtc/rtc-vr41xx.c 2006-07-12 13:05:30.870557500 +0900 @@ -30,7 +30,7 @@ #include #include #include -#include +#include MODULE_AUTHOR("Yoichi Yuasa "); MODULE_DESCRIPTION("NEC VR4100 series RTC driver"); diff -pruN -X mips/Documentation/dontdiff mips-orig/drivers/serial/vr41xx_siu.c mips/drivers/serial/vr41xx_siu.c --- mips-orig/drivers/serial/vr41xx_siu.c 2006-07-12 12:13:10.534298750 +0900 +++ mips/drivers/serial/vr41xx_siu.c 2006-07-12 13:07:48.327148000 +0900 @@ -38,6 +38,7 @@ #include #include +#include #include #include diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/vr41xx/capcella.h mips/include/asm-mips/vr41xx/capcella.h --- mips-orig/include/asm-mips/vr41xx/capcella.h 2006-07-12 12:13:12.654431250 +0900 +++ mips/include/asm-mips/vr41xx/capcella.h 2006-07-12 13:02:54.692797000 +0900 @@ -20,7 +20,7 @@ #ifndef __ZAO_CAPCELLA_H #define __ZAO_CAPCELLA_H -#include +#include /* * General-Purpose I/O Pin Number diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/vr41xx/cmbvr4133.h mips/include/asm-mips/vr41xx/cmbvr4133.h --- mips-orig/include/asm-mips/vr41xx/cmbvr4133.h 2006-07-12 12:13:12.654431250 +0900 +++ mips/include/asm-mips/vr41xx/cmbvr4133.h 2006-07-12 13:10:11.764112250 +0900 @@ -15,8 +15,7 @@ #ifndef __NEC_CMBVR4133_H #define __NEC_CMBVR4133_H -#include -#include +#include /* * General-Purpose I/O Pin Number diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/vr41xx/irq.h mips/include/asm-mips/vr41xx/irq.h --- mips-orig/include/asm-mips/vr41xx/irq.h 1970-01-01 09:00:00.000000000 +0900 +++ mips/include/asm-mips/vr41xx/irq.h 2006-07-12 13:22:25.161946750 +0900 @@ -0,0 +1,101 @@ +/* + * include/asm-mips/vr41xx/irq.h + * + * Interrupt numbers for NEC VR4100 series. + * + * Copyright (C) 1999 Michael Klar + * Copyright (C) 2001, 2002 Paul Mundt + * Copyright (C) 2002 MontaVista Software, Inc. + * Copyright (C) 2002 TimeSys Corp. + * Copyright (C) 2003-2006 Yoichi Yuasa + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#ifndef __NEC_VR41XX_IRQ_H +#define __NEC_VR41XX_IRQ_H + +/* + * CPU core Interrupt Numbers + */ +#define MIPS_CPU_IRQ_BASE 0 +#define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x)) +#define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0) +#define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1) +#define INT0_IRQ MIPS_CPU_IRQ(2) +#define INT1_IRQ MIPS_CPU_IRQ(3) +#define INT2_IRQ MIPS_CPU_IRQ(4) +#define INT3_IRQ MIPS_CPU_IRQ(5) +#define INT4_IRQ MIPS_CPU_IRQ(6) +#define TIMER_IRQ MIPS_CPU_IRQ(7) + +/* + * SYINT1 Interrupt Numbers + */ +#define SYSINT1_IRQ_BASE 8 +#define SYSINT1_IRQ(x) (SYSINT1_IRQ_BASE + (x)) +#define BATTRY_IRQ SYSINT1_IRQ(0) +#define POWER_IRQ SYSINT1_IRQ(1) +#define RTCLONG1_IRQ SYSINT1_IRQ(2) +#define ELAPSEDTIME_IRQ SYSINT1_IRQ(3) +/* RFU */ +#define PIU_IRQ SYSINT1_IRQ(5) +#define AIU_IRQ SYSINT1_IRQ(6) +#define KIU_IRQ SYSINT1_IRQ(7) +#define GIUINT_IRQ SYSINT1_IRQ(8) +#define SIU_IRQ SYSINT1_IRQ(9) +#define BUSERR_IRQ SYSINT1_IRQ(10) +#define SOFTINT_IRQ SYSINT1_IRQ(11) +#define CLKRUN_IRQ SYSINT1_IRQ(12) +#define DOZEPIU_IRQ SYSINT1_IRQ(13) +#define SYSINT1_IRQ_LAST DOZEPIU_IRQ + +/* + * SYSINT2 Interrupt Numbers + */ +#define SYSINT2_IRQ_BASE 24 +#define SYSINT2_IRQ(x) (SYSINT2_IRQ_BASE + (x)) +#define RTCLONG2_IRQ SYSINT2_IRQ(0) +#define LED_IRQ SYSINT2_IRQ(1) +#define HSP_IRQ SYSINT2_IRQ(2) +#define TCLOCK_IRQ SYSINT2_IRQ(3) +#define FIR_IRQ SYSINT2_IRQ(4) +#define CEU_IRQ SYSINT2_IRQ(4) /* same number as FIR_IRQ */ +#define DSIU_IRQ SYSINT2_IRQ(5) +#define PCI_IRQ SYSINT2_IRQ(6) +#define SCU_IRQ SYSINT2_IRQ(7) +#define CSI_IRQ SYSINT2_IRQ(8) +#define BCU_IRQ SYSINT2_IRQ(9) +#define ETHERNET_IRQ SYSINT2_IRQ(10) +#define SYSINT2_IRQ_LAST ETHERNET_IRQ + +/* + * GIU Interrupt Numbers + */ +#define GIU_IRQ_BASE 40 +#define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) /* IRQ 40-71 */ +#define GIU_IRQ_LAST GIU_IRQ(31) + +/* + * VRC4173 Interrupt Numbers + */ +#define VRC4173_IRQ_BASE 72 +#define VRC4173_IRQ(x) (VRC4173_IRQ_BASE + (x)) +#define VRC4173_USB_IRQ VRC4173_IRQ(0) +#define VRC4173_PCMCIA2_IRQ VRC4173_IRQ(1) +#define VRC4173_PCMCIA1_IRQ VRC4173_IRQ(2) +#define VRC4173_PS2CH2_IRQ VRC4173_IRQ(3) +#define VRC4173_PS2CH1_IRQ VRC4173_IRQ(4) +#define VRC4173_PIU_IRQ VRC4173_IRQ(5) +#define VRC4173_AIU_IRQ VRC4173_IRQ(6) +#define VRC4173_KIU_IRQ VRC4173_IRQ(7) +#define VRC4173_GIU_IRQ VRC4173_IRQ(8) +#define VRC4173_AC97_IRQ VRC4173_IRQ(9) +#define VRC4173_AC97INT1_IRQ VRC4173_IRQ(10) +/* RFU */ +#define VRC4173_DOZEPIU_IRQ VRC4173_IRQ(13) +#define VRC4173_IRQ_LAST VRC4173_DOZEPIU_IRQ + +#endif /* __NEC_VR41XX_IRQ_H */ diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/vr41xx/mpc30x.h mips/include/asm-mips/vr41xx/mpc30x.h --- mips-orig/include/asm-mips/vr41xx/mpc30x.h 2006-07-12 12:13:12.654431250 +0900 +++ mips/include/asm-mips/vr41xx/mpc30x.h 2006-07-12 13:10:46.838304250 +0900 @@ -20,7 +20,7 @@ #ifndef __VICTOR_MPC30X_H #define __VICTOR_MPC30X_H -#include +#include /* * General-Purpose I/O Pin Number diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/vr41xx/tb0219.h mips/include/asm-mips/vr41xx/tb0219.h --- mips-orig/include/asm-mips/vr41xx/tb0219.h 2006-07-12 12:13:12.654431250 +0900 +++ mips/include/asm-mips/vr41xx/tb0219.h 2006-07-12 13:10:58.647042250 +0900 @@ -23,7 +23,7 @@ #ifndef __TANBAC_TB0219_H #define __TANBAC_TB0219_H -#include +#include /* * General-Purpose I/O Pin Number diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/vr41xx/tb0226.h mips/include/asm-mips/vr41xx/tb0226.h --- mips-orig/include/asm-mips/vr41xx/tb0226.h 2006-07-12 12:13:12.654431250 +0900 +++ mips/include/asm-mips/vr41xx/tb0226.h 2006-07-12 13:11:11.571850000 +0900 @@ -20,7 +20,7 @@ #ifndef __TANBAC_TB0226_H #define __TANBAC_TB0226_H -#include +#include /* * General-Purpose I/O Pin Number diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/vr41xx/tb0287.h mips/include/asm-mips/vr41xx/tb0287.h --- mips-orig/include/asm-mips/vr41xx/tb0287.h 2006-07-12 12:13:12.654431250 +0900 +++ mips/include/asm-mips/vr41xx/tb0287.h 2006-07-12 13:11:25.972750000 +0900 @@ -22,7 +22,7 @@ #ifndef __TANBAC_TB0287_H #define __TANBAC_TB0287_H -#include +#include /* * General-Purpose I/O Pin Number diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/vr41xx/vr41xx.h mips/include/asm-mips/vr41xx/vr41xx.h --- mips-orig/include/asm-mips/vr41xx/vr41xx.h 2006-07-12 12:13:12.654431250 +0900 +++ mips/include/asm-mips/vr41xx/vr41xx.h 2006-07-12 12:56:30.872809750 +0900 @@ -74,59 +74,6 @@ extern void vr41xx_mask_clock(vr41xx_clo /* * Interrupt Control Unit */ -/* CPU core Interrupt Numbers */ -#define MIPS_CPU_IRQ_BASE 0 -#define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x)) -#define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0) -#define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1) -#define INT0_IRQ MIPS_CPU_IRQ(2) -#define INT1_IRQ MIPS_CPU_IRQ(3) -#define INT2_IRQ MIPS_CPU_IRQ(4) -#define INT3_IRQ MIPS_CPU_IRQ(5) -#define INT4_IRQ MIPS_CPU_IRQ(6) -#define TIMER_IRQ MIPS_CPU_IRQ(7) - -/* SYINT1 Interrupt Numbers */ -#define SYSINT1_IRQ_BASE 8 -#define SYSINT1_IRQ(x) (SYSINT1_IRQ_BASE + (x)) -#define BATTRY_IRQ SYSINT1_IRQ(0) -#define POWER_IRQ SYSINT1_IRQ(1) -#define RTCLONG1_IRQ SYSINT1_IRQ(2) -#define ELAPSEDTIME_IRQ SYSINT1_IRQ(3) -/* RFU */ -#define PIU_IRQ SYSINT1_IRQ(5) -#define AIU_IRQ SYSINT1_IRQ(6) -#define KIU_IRQ SYSINT1_IRQ(7) -#define GIUINT_IRQ SYSINT1_IRQ(8) -#define SIU_IRQ SYSINT1_IRQ(9) -#define BUSERR_IRQ SYSINT1_IRQ(10) -#define SOFTINT_IRQ SYSINT1_IRQ(11) -#define CLKRUN_IRQ SYSINT1_IRQ(12) -#define DOZEPIU_IRQ SYSINT1_IRQ(13) -#define SYSINT1_IRQ_LAST DOZEPIU_IRQ - -/* SYSINT2 Interrupt Numbers */ -#define SYSINT2_IRQ_BASE 24 -#define SYSINT2_IRQ(x) (SYSINT2_IRQ_BASE + (x)) -#define RTCLONG2_IRQ SYSINT2_IRQ(0) -#define LED_IRQ SYSINT2_IRQ(1) -#define HSP_IRQ SYSINT2_IRQ(2) -#define TCLOCK_IRQ SYSINT2_IRQ(3) -#define FIR_IRQ SYSINT2_IRQ(4) -#define CEU_IRQ SYSINT2_IRQ(4) /* same number as FIR_IRQ */ -#define DSIU_IRQ SYSINT2_IRQ(5) -#define PCI_IRQ SYSINT2_IRQ(6) -#define SCU_IRQ SYSINT2_IRQ(7) -#define CSI_IRQ SYSINT2_IRQ(8) -#define BCU_IRQ SYSINT2_IRQ(9) -#define ETHERNET_IRQ SYSINT2_IRQ(10) -#define SYSINT2_IRQ_LAST ETHERNET_IRQ - -/* GIU Interrupt Numbers */ -#define GIU_IRQ_BASE 40 -#define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) /* IRQ 40-71 */ -#define GIU_IRQ_LAST GIU_IRQ(31) - extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign); extern int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int, struct pt_regs *)); diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/vr41xx/vrc4173.h mips/include/asm-mips/vr41xx/vrc4173.h --- mips-orig/include/asm-mips/vr41xx/vrc4173.h 2006-07-12 12:13:12.654431250 +0900 +++ mips/include/asm-mips/vr41xx/vrc4173.h 2006-07-12 12:56:09.215456250 +0900 @@ -27,26 +27,6 @@ #include /* - * Interrupt Number - */ -#define VRC4173_IRQ_BASE 72 -#define VRC4173_IRQ(x) (VRC4173_IRQ_BASE + (x)) -#define VRC4173_USB_IRQ VRC4173_IRQ(0) -#define VRC4173_PCMCIA2_IRQ VRC4173_IRQ(1) -#define VRC4173_PCMCIA1_IRQ VRC4173_IRQ(2) -#define VRC4173_PS2CH2_IRQ VRC4173_IRQ(3) -#define VRC4173_PS2CH1_IRQ VRC4173_IRQ(4) -#define VRC4173_PIU_IRQ VRC4173_IRQ(5) -#define VRC4173_AIU_IRQ VRC4173_IRQ(6) -#define VRC4173_KIU_IRQ VRC4173_IRQ(7) -#define VRC4173_GIU_IRQ VRC4173_IRQ(8) -#define VRC4173_AC97_IRQ VRC4173_IRQ(9) -#define VRC4173_AC97INT1_IRQ VRC4173_IRQ(10) -/* RFU */ -#define VRC4173_DOZEPIU_IRQ VRC4173_IRQ(13) -#define VRC4173_IRQ_LAST VRC4173_DOZEPIU_IRQ - -/* * PCI I/O accesses */ #ifdef CONFIG_VRC4173 From yoichi_yuasa@tripeaks.co.jp Thu Jul 13 09:33:50 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 13 Jul 2006 09:34:21 +0100 (BST) Received: from mo32.po.2iij.net ([210.128.50.17]:38406 "EHLO mo32.po.2iij.net") by ftp.linux-mips.org with ESMTP id S8133563AbWGMIdU (ORCPT ); Thu, 13 Jul 2006 09:33:20 +0100 Received: by mo.po.2iij.net (mo32) id k6D8XHlC049262; Thu, 13 Jul 2006 17:33:17 +0900 (JST) Received: from localhost.localdomain (65.126.232.202.bf.2iij.net [202.232.126.65]) by mbox.po.2iij.net (mbox31) id k6D8XFh3006980 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 13 Jul 2006 17:33:15 +0900 (JST) Date: Thu, 13 Jul 2006 17:33:14 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: linux-mips Subject: [PATCH] vr41xx: removed old v2.4 VRC4173 driver Message-Id: <20060713173314.05685c76.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11979 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has removed the old v2.4 VRC4173 driver. Please apply. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/vr41xx/Kconfig mips/arch/mips/vr41xx/Kconfig --- mips-orig/arch/mips/vr41xx/Kconfig 2006-07-12 12:13:07.314097500 +0900 +++ mips/arch/mips/vr41xx/Kconfig 2006-07-12 13:52:20.030119000 +0900 @@ -86,9 +86,3 @@ config PCI_VR41XX depends on MACH_VR41XX && HW_HAS_PCI default y select PCI - -config VRC4173 - tristate "Add NEC VRC4173 companion chip support" - depends on MACH_VR41XX && PCI_VR41XX - help - The NEC VRC4173 is a companion chip for NEC VR4122/VR4131. diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/vr41xx/common/Makefile mips/arch/mips/vr41xx/common/Makefile --- mips-orig/arch/mips/vr41xx/common/Makefile 2006-07-12 12:13:07.314097500 +0900 +++ mips/arch/mips/vr41xx/common/Makefile 2006-07-12 13:52:52.340138250 +0900 @@ -2,7 +2,6 @@ # Makefile for common code of the NEC VR4100 series. # -obj-y += bcu.o cmu.o icu.o init.o irq.o pmu.o type.o -obj-$(CONFIG_VRC4173) += vrc4173.o +obj-y += bcu.o cmu.o icu.o init.o irq.o pmu.o type.o EXTRA_AFLAGS := $(CFLAGS) diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/vr41xx/common/vrc4173.c mips/arch/mips/vr41xx/common/vrc4173.c --- mips-orig/arch/mips/vr41xx/common/vrc4173.c 2006-07-12 13:51:13.817981000 +0900 +++ mips/arch/mips/vr41xx/common/vrc4173.c 1970-01-01 09:00:00.000000000 +0900 @@ -1,582 +0,0 @@ -/* - * vrc4173.c, NEC VRC4173 base driver for NEC VR4122/VR4131. - * - * Copyright (C) 2001-2003 MontaVista Software Inc. - * Author: Yoichi Yuasa - * Copyright (C) 2004 Yoichi Yuasa - * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -MODULE_DESCRIPTION("NEC VRC4173 base driver for NEC VR4122/4131"); -MODULE_AUTHOR("Yoichi Yuasa "); -MODULE_LICENSE("GPL"); - -#define VRC4173_CMUCLKMSK 0x040 - #define MSKPIU 0x0001 - #define MSKKIU 0x0002 - #define MSKAIU 0x0004 - #define MSKPS2CH1 0x0008 - #define MSKPS2CH2 0x0010 - #define MSKUSB 0x0020 - #define MSKCARD1 0x0040 - #define MSKCARD2 0x0080 - #define MSKAC97 0x0100 - #define MSK48MUSB 0x0400 - #define MSK48MPIN 0x0800 - #define MSK48MOSC 0x1000 -#define VRC4173_CMUSRST 0x042 - #define USBRST 0x0001 - #define CARD1RST 0x0002 - #define CARD2RST 0x0004 - #define AC97RST 0x0008 - -#define VRC4173_SYSINT1REG 0x060 -#define VRC4173_MSYSINT1REG 0x06c -#define VRC4173_MPIUINTREG 0x06e -#define VRC4173_MAIUINTREG 0x070 -#define VRC4173_MKIUINTREG 0x072 - -#define VRC4173_SELECTREG 0x09e - #define SEL3 0x0008 - #define SEL2 0x0004 - #define SEL1 0x0002 - #define SEL0 0x0001 - -static struct pci_device_id vrc4173_id_table[] __devinitdata = { - { .vendor = PCI_VENDOR_ID_NEC, - .device = PCI_DEVICE_ID_NEC_VRC4173, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, }, - { .vendor = 0, }, -}; - -unsigned long vrc4173_io_offset = 0; - -EXPORT_SYMBOL(vrc4173_io_offset); - -static int vrc4173_initialized; -static uint16_t vrc4173_cmuclkmsk; -static uint16_t vrc4173_selectreg; -static DEFINE_SPINLOCK(vrc4173_cmu_lock); -static DEFINE_SPINLOCK(vrc4173_giu_lock); - -static inline void set_cmusrst(uint16_t val) -{ - uint16_t cmusrst; - - cmusrst = vrc4173_inw(VRC4173_CMUSRST); - cmusrst |= val; - vrc4173_outw(cmusrst, VRC4173_CMUSRST); -} - -static inline void clear_cmusrst(uint16_t val) -{ - uint16_t cmusrst; - - cmusrst = vrc4173_inw(VRC4173_CMUSRST); - cmusrst &= ~val; - vrc4173_outw(cmusrst, VRC4173_CMUSRST); -} - -void vrc4173_supply_clock(vrc4173_clock_t clock) -{ - if (vrc4173_initialized) { - spin_lock_irq(&vrc4173_cmu_lock); - - switch (clock) { - case VRC4173_PIU_CLOCK: - vrc4173_cmuclkmsk |= MSKPIU; - break; - case VRC4173_KIU_CLOCK: - vrc4173_cmuclkmsk |= MSKKIU; - break; - case VRC4173_AIU_CLOCK: - vrc4173_cmuclkmsk |= MSKAIU; - break; - case VRC4173_PS2_CH1_CLOCK: - vrc4173_cmuclkmsk |= MSKPS2CH1; - break; - case VRC4173_PS2_CH2_CLOCK: - vrc4173_cmuclkmsk |= MSKPS2CH2; - break; - case VRC4173_USBU_PCI_CLOCK: - set_cmusrst(USBRST); - vrc4173_cmuclkmsk |= MSKUSB; - break; - case VRC4173_CARDU1_PCI_CLOCK: - set_cmusrst(CARD1RST); - vrc4173_cmuclkmsk |= MSKCARD1; - break; - case VRC4173_CARDU2_PCI_CLOCK: - set_cmusrst(CARD2RST); - vrc4173_cmuclkmsk |= MSKCARD2; - break; - case VRC4173_AC97U_PCI_CLOCK: - set_cmusrst(AC97RST); - vrc4173_cmuclkmsk |= MSKAC97; - break; - case VRC4173_USBU_48MHz_CLOCK: - set_cmusrst(USBRST); - vrc4173_cmuclkmsk |= MSK48MUSB; - break; - case VRC4173_EXT_48MHz_CLOCK: - if (vrc4173_cmuclkmsk & MSK48MOSC) - vrc4173_cmuclkmsk |= MSK48MPIN; - else - printk(KERN_WARNING - "vrc4173_supply_clock: " - "Please supply VRC4173_48MHz_CLOCK first " - "rather than VRC4173_EXT_48MHz_CLOCK.\n"); - break; - case VRC4173_48MHz_CLOCK: - vrc4173_cmuclkmsk |= MSK48MOSC; - break; - default: - printk(KERN_WARNING - "vrc4173_supply_clock: Invalid CLOCK value %u\n", clock); - break; - } - - vrc4173_outw(vrc4173_cmuclkmsk, VRC4173_CMUCLKMSK); - - switch (clock) { - case VRC4173_USBU_PCI_CLOCK: - case VRC4173_USBU_48MHz_CLOCK: - clear_cmusrst(USBRST); - break; - case VRC4173_CARDU1_PCI_CLOCK: - clear_cmusrst(CARD1RST); - break; - case VRC4173_CARDU2_PCI_CLOCK: - clear_cmusrst(CARD2RST); - break; - case VRC4173_AC97U_PCI_CLOCK: - clear_cmusrst(AC97RST); - break; - default: - break; - } - - spin_unlock_irq(&vrc4173_cmu_lock); - } -} - -EXPORT_SYMBOL(vrc4173_supply_clock); - -void vrc4173_mask_clock(vrc4173_clock_t clock) -{ - if (vrc4173_initialized) { - spin_lock_irq(&vrc4173_cmu_lock); - - switch (clock) { - case VRC4173_PIU_CLOCK: - vrc4173_cmuclkmsk &= ~MSKPIU; - break; - case VRC4173_KIU_CLOCK: - vrc4173_cmuclkmsk &= ~MSKKIU; - break; - case VRC4173_AIU_CLOCK: - vrc4173_cmuclkmsk &= ~MSKAIU; - break; - case VRC4173_PS2_CH1_CLOCK: - vrc4173_cmuclkmsk &= ~MSKPS2CH1; - break; - case VRC4173_PS2_CH2_CLOCK: - vrc4173_cmuclkmsk &= ~MSKPS2CH2; - break; - case VRC4173_USBU_PCI_CLOCK: - set_cmusrst(USBRST); - vrc4173_cmuclkmsk &= ~MSKUSB; - break; - case VRC4173_CARDU1_PCI_CLOCK: - set_cmusrst(CARD1RST); - vrc4173_cmuclkmsk &= ~MSKCARD1; - break; - case VRC4173_CARDU2_PCI_CLOCK: - set_cmusrst(CARD2RST); - vrc4173_cmuclkmsk &= ~MSKCARD2; - break; - case VRC4173_AC97U_PCI_CLOCK: - set_cmusrst(AC97RST); - vrc4173_cmuclkmsk &= ~MSKAC97; - break; - case VRC4173_USBU_48MHz_CLOCK: - set_cmusrst(USBRST); - vrc4173_cmuclkmsk &= ~MSK48MUSB; - break; - case VRC4173_EXT_48MHz_CLOCK: - vrc4173_cmuclkmsk &= ~MSK48MPIN; - break; - case VRC4173_48MHz_CLOCK: - vrc4173_cmuclkmsk &= ~MSK48MOSC; - break; - default: - printk(KERN_WARNING "vrc4173_mask_clock: Invalid CLOCK value %u\n", clock); - break; - } - - vrc4173_outw(vrc4173_cmuclkmsk, VRC4173_CMUCLKMSK); - - switch (clock) { - case VRC4173_USBU_PCI_CLOCK: - case VRC4173_USBU_48MHz_CLOCK: - clear_cmusrst(USBRST); - break; - case VRC4173_CARDU1_PCI_CLOCK: - clear_cmusrst(CARD1RST); - break; - case VRC4173_CARDU2_PCI_CLOCK: - clear_cmusrst(CARD2RST); - break; - case VRC4173_AC97U_PCI_CLOCK: - clear_cmusrst(AC97RST); - break; - default: - break; - } - - spin_unlock_irq(&vrc4173_cmu_lock); - } -} - -EXPORT_SYMBOL(vrc4173_mask_clock); - -static inline void vrc4173_cmu_init(void) -{ - vrc4173_cmuclkmsk = vrc4173_inw(VRC4173_CMUCLKMSK); - - spin_lock_init(&vrc4173_cmu_lock); -} - -void vrc4173_select_function(vrc4173_function_t function) -{ - if (vrc4173_initialized) { - spin_lock_irq(&vrc4173_giu_lock); - - switch(function) { - case PS2_CHANNEL1: - vrc4173_selectreg |= SEL2; - break; - case PS2_CHANNEL2: - vrc4173_selectreg |= SEL1; - break; - case TOUCHPANEL: - vrc4173_selectreg &= SEL2 | SEL1 | SEL0; - break; - case KEYBOARD_8SCANLINES: - vrc4173_selectreg &= SEL3 | SEL2 | SEL1; - break; - case KEYBOARD_10SCANLINES: - vrc4173_selectreg &= SEL3 | SEL2; - break; - case KEYBOARD_12SCANLINES: - vrc4173_selectreg &= SEL3; - break; - case GPIO_0_15PINS: - vrc4173_selectreg |= SEL0; - break; - case GPIO_16_20PINS: - vrc4173_selectreg |= SEL3; - break; - } - - vrc4173_outw(vrc4173_selectreg, VRC4173_SELECTREG); - - spin_unlock_irq(&vrc4173_giu_lock); - } -} - -EXPORT_SYMBOL(vrc4173_select_function); - -static inline void vrc4173_giu_init(void) -{ - vrc4173_selectreg = vrc4173_inw(VRC4173_SELECTREG); - - spin_lock_init(&vrc4173_giu_lock); -} - -void vrc4173_enable_piuint(uint16_t mask) -{ - struct irq_desc *desc = irq_desc + VRC4173_PIU_IRQ; - unsigned long flags; - uint16_t val; - - spin_lock_irqsave(&desc->lock, flags); - val = vrc4173_inw(VRC4173_MPIUINTREG); - val |= mask; - vrc4173_outw(val, VRC4173_MPIUINTREG); - spin_unlock_irqrestore(&desc->lock, flags); -} - -EXPORT_SYMBOL(vrc4173_enable_piuint); - -void vrc4173_disable_piuint(uint16_t mask) -{ - struct irq_desc *desc = irq_desc + VRC4173_PIU_IRQ; - unsigned long flags; - uint16_t val; - - spin_lock_irqsave(&desc->lock, flags); - val = vrc4173_inw(VRC4173_MPIUINTREG); - val &= ~mask; - vrc4173_outw(val, VRC4173_MPIUINTREG); - spin_unlock_irqrestore(&desc->lock, flags); -} - -EXPORT_SYMBOL(vrc4173_disable_piuint); - -void vrc4173_enable_aiuint(uint16_t mask) -{ - struct irq_desc *desc = irq_desc + VRC4173_AIU_IRQ; - unsigned long flags; - uint16_t val; - - spin_lock_irqsave(&desc->lock, flags); - val = vrc4173_inw(VRC4173_MAIUINTREG); - val |= mask; - vrc4173_outw(val, VRC4173_MAIUINTREG); - spin_unlock_irqrestore(&desc->lock, flags); -} - -EXPORT_SYMBOL(vrc4173_enable_aiuint); - -void vrc4173_disable_aiuint(uint16_t mask) -{ - struct irq_desc *desc = irq_desc + VRC4173_AIU_IRQ; - unsigned long flags; - uint16_t val; - - spin_lock_irqsave(&desc->lock, flags); - val = vrc4173_inw(VRC4173_MAIUINTREG); - val &= ~mask; - vrc4173_outw(val, VRC4173_MAIUINTREG); - spin_unlock_irqrestore(&desc->lock, flags); -} - -EXPORT_SYMBOL(vrc4173_disable_aiuint); - -void vrc4173_enable_kiuint(uint16_t mask) -{ - struct irq_desc *desc = irq_desc + VRC4173_KIU_IRQ; - unsigned long flags; - uint16_t val; - - spin_lock_irqsave(&desc->lock, flags); - val = vrc4173_inw(VRC4173_MKIUINTREG); - val |= mask; - vrc4173_outw(val, VRC4173_MKIUINTREG); - spin_unlock_irqrestore(&desc->lock, flags); -} - -EXPORT_SYMBOL(vrc4173_enable_kiuint); - -void vrc4173_disable_kiuint(uint16_t mask) -{ - struct irq_desc *desc = irq_desc + VRC4173_KIU_IRQ; - unsigned long flags; - uint16_t val; - - spin_lock_irqsave(&desc->lock, flags); - val = vrc4173_inw(VRC4173_MKIUINTREG); - val &= ~mask; - vrc4173_outw(val, VRC4173_MKIUINTREG); - spin_unlock_irqrestore(&desc->lock, flags); -} - -EXPORT_SYMBOL(vrc4173_disable_kiuint); - -static void enable_vrc4173_irq(unsigned int irq) -{ - uint16_t val; - - val = vrc4173_inw(VRC4173_MSYSINT1REG); - val |= (uint16_t)1 << (irq - VRC4173_IRQ_BASE); - vrc4173_outw(val, VRC4173_MSYSINT1REG); -} - -static void disable_vrc4173_irq(unsigned int irq) -{ - uint16_t val; - - val = vrc4173_inw(VRC4173_MSYSINT1REG); - val &= ~((uint16_t)1 << (irq - VRC4173_IRQ_BASE)); - vrc4173_outw(val, VRC4173_MSYSINT1REG); -} - -static unsigned int startup_vrc4173_irq(unsigned int irq) -{ - enable_vrc4173_irq(irq); - return 0; /* never anything pending */ -} - -#define shutdown_vrc4173_irq disable_vrc4173_irq -#define ack_vrc4173_irq disable_vrc4173_irq - -static void end_vrc4173_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) - enable_vrc4173_irq(irq); -} - -static struct irq_chip vrc4173_irq_type = { - .typename = "VRC4173", - .startup = startup_vrc4173_irq, - .shutdown = shutdown_vrc4173_irq, - .enable = enable_vrc4173_irq, - .disable = disable_vrc4173_irq, - .ack = ack_vrc4173_irq, - .end = end_vrc4173_irq, -}; - -static int vrc4173_get_irq_number(int irq) -{ - uint16_t status, mask; - int i; - - status = vrc4173_inw(VRC4173_SYSINT1REG); - mask = vrc4173_inw(VRC4173_MSYSINT1REG); - - status &= mask; - if (status) { - for (i = 0; i < 16; i++) - if (status & (0x0001 << i)) - return VRC4173_IRQ(i); - } - - return -EINVAL; -} - -static inline int vrc4173_icu_init(int cascade_irq) -{ - int i; - - if (cascade_irq < GIU_IRQ(0) || cascade_irq > GIU_IRQ(15)) - return -EINVAL; - - vrc4173_outw(0, VRC4173_MSYSINT1REG); - - vr41xx_set_irq_trigger(GIU_IRQ_TO_PIN(cascade_irq), TRIGGER_LEVEL, SIGNAL_THROUGH); - vr41xx_set_irq_level(GIU_IRQ_TO_PIN(cascade_irq), LEVEL_LOW); - - for (i = VRC4173_IRQ_BASE; i <= VRC4173_IRQ_LAST; i++) - irq_desc[i].chip = &vrc4173_irq_type; - - return 0; -} - -static int __devinit vrc4173_probe(struct pci_dev *dev, - const struct pci_device_id *id) -{ - unsigned long start, flags; - int err; - - err = pci_enable_device(dev); - if (err < 0) { - printk(KERN_ERR "vrc4173: Failed to enable PCI device, aborting\n"); - return err; - } - - pci_set_master(dev); - - start = pci_resource_start(dev, 0); - if (start == 0) { - printk(KERN_ERR "vrc4173:No such PCI I/O resource, aborting\n"); - return -ENXIO; - } - - flags = pci_resource_flags(dev, 0); - if ((flags & IORESOURCE_IO) == 0) { - printk(KERN_ERR "vrc4173: No such PCI I/O resource, aborting\n"); - return -ENXIO; - } - - err = pci_request_regions(dev, "NEC VRC4173"); - if (err < 0) { - printk(KERN_ERR "vrc4173: PCI resources are busy, aborting\n"); - return err; - } - - set_vrc4173_io_offset(start); - - vrc4173_cmu_init(); - vrc4173_giu_init(); - - err = vrc4173_icu_init(dev->irq); - if (err < 0) { - printk(KERN_ERR "vrc4173: Invalid IRQ %d, aborting\n", dev->irq); - return err; - } - - err = vr41xx_cascade_irq(dev->irq, vrc4173_get_irq_number); - if (err < 0) { - printk(KERN_ERR "vrc4173: IRQ resource %d is busy, aborting\n", dev->irq); - return err; - } - - printk(KERN_INFO - "NEC VRC4173 at 0x%#08lx, IRQ is cascaded to %d\n", start, dev->irq); - - return 0; -} - -static void vrc4173_remove(struct pci_dev *dev) -{ - free_irq(dev->irq, NULL); - - pci_release_regions(dev); -} - -static struct pci_driver vrc4173_driver = { - .name = "NEC VRC4173", - .probe = vrc4173_probe, - .remove = vrc4173_remove, - .id_table = vrc4173_id_table, -}; - -static int __devinit vrc4173_init(void) -{ - int err; - - err = pci_register_driver(&vrc4173_driver); - if (err < 0) - return err; - - vrc4173_initialized = 1; - - return 0; -} - -static void __devexit vrc4173_exit(void) -{ - vrc4173_initialized = 0; - - pci_unregister_driver(&vrc4173_driver); -} - -module_init(vrc4173_init); -module_exit(vrc4173_exit); diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/vr41xx/vrc4173.h mips/include/asm-mips/vr41xx/vrc4173.h --- mips-orig/include/asm-mips/vr41xx/vrc4173.h 2006-07-12 13:51:13.825981500 +0900 +++ mips/include/asm-mips/vr41xx/vrc4173.h 1970-01-01 09:00:00.000000000 +0900 @@ -1,201 +0,0 @@ -/* - * vrc4173.h, Include file for NEC VRC4173. - * - * Copyright (C) 2000 Michael R. McDonald - * Copyright (C) 2001-2003 Montavista Software Inc. - * Author: Yoichi Yuasa - * Copyright (C) 2004 Yoichi Yuasa - * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __NEC_VRC4173_H -#define __NEC_VRC4173_H - -#include - -/* - * PCI I/O accesses - */ -#ifdef CONFIG_VRC4173 - -extern unsigned long vrc4173_io_offset; - -#define set_vrc4173_io_offset(offset) do { vrc4173_io_offset = (offset); } while (0) - -#define vrc4173_outb(val,port) outb((val), vrc4173_io_offset+(port)) -#define vrc4173_outw(val,port) outw((val), vrc4173_io_offset+(port)) -#define vrc4173_outl(val,port) outl((val), vrc4173_io_offset+(port)) -#define vrc4173_outb_p(val,port) outb_p((val), vrc4173_io_offset+(port)) -#define vrc4173_outw_p(val,port) outw_p((val), vrc4173_io_offset+(port)) -#define vrc4173_outl_p(val,port) outl_p((val), vrc4173_io_offset+(port)) - -#define vrc4173_inb(port) inb(vrc4173_io_offset+(port)) -#define vrc4173_inw(port) inw(vrc4173_io_offset+(port)) -#define vrc4173_inl(port) inl(vrc4173_io_offset+(port)) -#define vrc4173_inb_p(port) inb_p(vrc4173_io_offset+(port)) -#define vrc4173_inw_p(port) inw_p(vrc4173_io_offset+(port)) -#define vrc4173_inl_p(port) inl_p(vrc4173_io_offset+(port)) - -#define vrc4173_outsb(port,addr,count) outsb(vrc4173_io_offset+(port),(addr),(count)) -#define vrc4173_outsw(port,addr,count) outsw(vrc4173_io_offset+(port),(addr),(count)) -#define vrc4173_outsl(port,addr,count) outsl(vrc4173_io_offset+(port),(addr),(count)) - -#define vrc4173_insb(port,addr,count) insb(vrc4173_io_offset+(port),(addr),(count)) -#define vrc4173_insw(port,addr,count) insw(vrc4173_io_offset+(port),(addr),(count)) -#define vrc4173_insl(port,addr,count) insl(vrc4173_io_offset+(port),(addr),(count)) - -#else - -#define set_vrc4173_io_offset(offset) do {} while (0) - -#define vrc4173_outb(val,port) do {} while (0) -#define vrc4173_outw(val,port) do {} while (0) -#define vrc4173_outl(val,port) do {} while (0) -#define vrc4173_outb_p(val,port) do {} while (0) -#define vrc4173_outw_p(val,port) do {} while (0) -#define vrc4173_outl_p(val,port) do {} while (0) - -#define vrc4173_inb(port) 0 -#define vrc4173_inw(port) 0 -#define vrc4173_inl(port) 0 -#define vrc4173_inb_p(port) 0 -#define vrc4173_inw_p(port) 0 -#define vrc4173_inl_p(port) 0 - -#define vrc4173_outsb(port,addr,count) do {} while (0) -#define vrc4173_outsw(port,addr,count) do {} while (0) -#define vrc4173_outsl(port,addr,count) do {} while (0) - -#define vrc4173_insb(port,addr,count) do {} while (0) -#define vrc4173_insw(port,addr,count) do {} while (0) -#define vrc4173_insl(port,addr,count) do {} while (0) - -#endif - -/* - * Clock Mask Unit - */ -typedef enum vrc4173_clock { - VRC4173_PIU_CLOCK, - VRC4173_KIU_CLOCK, - VRC4173_AIU_CLOCK, - VRC4173_PS2_CH1_CLOCK, - VRC4173_PS2_CH2_CLOCK, - VRC4173_USBU_PCI_CLOCK, - VRC4173_CARDU1_PCI_CLOCK, - VRC4173_CARDU2_PCI_CLOCK, - VRC4173_AC97U_PCI_CLOCK, - VRC4173_USBU_48MHz_CLOCK, - VRC4173_EXT_48MHz_CLOCK, - VRC4173_48MHz_CLOCK, -} vrc4173_clock_t; - -#ifdef CONFIG_VRC4173 - -extern void vrc4173_supply_clock(vrc4173_clock_t clock); -extern void vrc4173_mask_clock(vrc4173_clock_t clock); - -#else - -static inline void vrc4173_supply_clock(vrc4173_clock_t clock) {} -static inline void vrc4173_mask_clock(vrc4173_clock_t clock) {} - -#endif - -/* - * Interupt Control Unit - */ - -#define VRC4173_PIUINT_COMMAND 0x0040 -#define VRC4173_PIUINT_DATA 0x0020 -#define VRC4173_PIUINT_PAGE1 0x0010 -#define VRC4173_PIUINT_PAGE0 0x0008 -#define VRC4173_PIUINT_DATALOST 0x0004 -#define VRC4173_PIUINT_STATUSCHANGE 0x0001 - -#ifdef CONFIG_VRC4173 - -extern void vrc4173_enable_piuint(uint16_t mask); -extern void vrc4173_disable_piuint(uint16_t mask); - -#else - -static inline void vrc4173_enable_piuint(uint16_t mask) {} -static inline void vrc4173_disable_piuint(uint16_t mask) {} - -#endif - -#define VRC4173_AIUINT_INPUT_DMAEND 0x0800 -#define VRC4173_AIUINT_INPUT_DMAHALT 0x0400 -#define VRC4173_AIUINT_INPUT_DATALOST 0x0200 -#define VRC4173_AIUINT_INPUT_DATA 0x0100 -#define VRC4173_AIUINT_OUTPUT_DMAEND 0x0008 -#define VRC4173_AIUINT_OUTPUT_DMAHALT 0x0004 -#define VRC4173_AIUINT_OUTPUT_NODATA 0x0002 - -#ifdef CONFIG_VRC4173 - -extern void vrc4173_enable_aiuint(uint16_t mask); -extern void vrc4173_disable_aiuint(uint16_t mask); - -#else - -static inline void vrc4173_enable_aiuint(uint16_t mask) {} -static inline void vrc4173_disable_aiuint(uint16_t mask) {} - -#endif - -#define VRC4173_KIUINT_DATALOST 0x0004 -#define VRC4173_KIUINT_DATAREADY 0x0002 -#define VRC4173_KIUINT_SCAN 0x0001 - -#ifdef CONFIG_VRC4173 - -extern void vrc4173_enable_kiuint(uint16_t mask); -extern void vrc4173_disable_kiuint(uint16_t mask); - -#else - -static inline void vrc4173_enable_kiuint(uint16_t mask) {} -static inline void vrc4173_disable_kiuint(uint16_t mask) {} - -#endif - -/* - * General-Purpose I/O Unit - */ -typedef enum vrc4173_function { - PS2_CHANNEL1, - PS2_CHANNEL2, - TOUCHPANEL, - KEYBOARD_8SCANLINES, - KEYBOARD_10SCANLINES, - KEYBOARD_12SCANLINES, - GPIO_0_15PINS, - GPIO_16_20PINS, -} vrc4173_function_t; - -#ifdef CONFIG_VRC4173 - -extern void vrc4173_select_function(vrc4173_function_t function); - -#else - -static inline void vrc4173_select_function(vrc4173_function_t function) {} - -#endif - -#endif /* __NEC_VRC4173_H */ From yoichi_yuasa@tripeaks.co.jp Thu Jul 13 09:34:50 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 13 Jul 2006 09:35:05 +0100 (BST) Received: from mo30.po.2iij.net ([210.128.50.53]:22596 "EHLO mo30.po.2iij.net") by ftp.linux-mips.org with ESMTP id S8133571AbWGMId2 (ORCPT ); Thu, 13 Jul 2006 09:33:28 +0100 Received: by mo.po.2iij.net (mo30) id k6D8XQSc013158; Thu, 13 Jul 2006 17:33:26 +0900 (JST) Received: from localhost.localdomain (65.126.232.202.bf.2iij.net [202.232.126.65]) by mbox.po.2iij.net (mbox30) id k6D8XOTQ055077 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 13 Jul 2006 17:33:24 +0900 (JST) Date: Thu, 13 Jul 2006 17:33:24 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: linux-mips Subject: [PATCH] vr41xx: updated e55 setup function Message-Id: <20060713173324.5499df36.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11980 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has updated the CASIO E55 setup function. Please apply. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/vr41xx/casio-e55/setup.c mips/arch/mips/vr41xx/casio-e55/setup.c --- mips-orig/arch/mips/vr41xx/casio-e55/setup.c 2006-07-12 12:13:07.314097500 +0900 +++ mips/arch/mips/vr41xx/casio-e55/setup.c 2006-07-12 15:31:40.894635500 +0900 @@ -1,7 +1,7 @@ /* * setup.c, Setup for the CASIO CASSIOPEIA E-11/15/55/65. * - * Copyright (C) 2002-2005 Yoichi Yuasa + * Copyright (C) 2002-2006 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -21,13 +21,18 @@ #include #include -#include + +#define E55_ISA_IO_BASE 0x1400c000 +#define E55_ISA_IO_SIZE 0x03ff4000 +#define E55_ISA_IO_START 0 +#define E55_ISA_IO_END (E55_ISA_IO_SIZE - 1) +#define E55_IO_PORT_BASE KSEG1ADDR(E55_ISA_IO_BASE) static int __init casio_e55_setup(void) { - set_io_port_base(IO_PORT_BASE); - ioport_resource.start = IO_PORT_RESOURCE_START; - ioport_resource.end = IO_PORT_RESOURCE_END; + set_io_port_base(E55_IO_PORT_BASE); + ioport_resource.start = E55_ISA_IO_START; + ioport_resource.end = E55_ISA_IO_END; return 0; } diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/vr41xx/e55.h mips/include/asm-mips/vr41xx/e55.h --- mips-orig/include/asm-mips/vr41xx/e55.h 2006-07-12 12:13:12.654431250 +0900 +++ mips/include/asm-mips/vr41xx/e55.h 1970-01-01 09:00:00.000000000 +0900 @@ -1,43 +0,0 @@ -/* - * e55.h, Include file for CASIO CASSIOPEIA E-10/15/55/65. - * - * Copyright (C) 2002-2004 Yoichi Yuasa - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __CASIO_E55_H -#define __CASIO_E55_H - -#include -#include - -/* - * Board specific address mapping - */ -#define VR41XX_ISA_MEM_BASE 0x10000000 -#define VR41XX_ISA_MEM_SIZE 0x04000000 - -/* VR41XX_ISA_IO_BASE includes offset from real base. */ -#define VR41XX_ISA_IO_BASE 0x1400c000 -#define VR41XX_ISA_IO_SIZE 0x03ff4000 - -#define ISA_BUS_IO_BASE 0 -#define ISA_BUS_IO_SIZE VR41XX_ISA_IO_SIZE - -#define IO_PORT_BASE KSEG1ADDR(VR41XX_ISA_IO_BASE) -#define IO_PORT_RESOURCE_START ISA_BUS_IO_BASE -#define IO_PORT_RESOURCE_END (ISA_BUS_IO_BASE + ISA_BUS_IO_SIZE - 1) - -#endif /* __CASIO_E55_H */ From yoichi_yuasa@tripeaks.co.jp Thu Jul 13 09:35:38 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 13 Jul 2006 09:35:58 +0100 (BST) Received: from mo31.po.2iij.net ([210.128.50.54]:18955 "EHLO mo31.po.2iij.net") by ftp.linux-mips.org with ESMTP id S8133572AbWGMIdh (ORCPT ); Thu, 13 Jul 2006 09:33:37 +0100 Received: by mo.po.2iij.net (mo31) id k6D8XZT4077358; Thu, 13 Jul 2006 17:33:35 +0900 (JST) Received: from localhost.localdomain (65.126.232.202.bf.2iij.net [202.232.126.65]) by mbox.po.2iij.net (mbox33) id k6D8XX3l062971 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 13 Jul 2006 17:33:33 +0900 (JST) Date: Thu, 13 Jul 2006 17:33:33 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: linux-mips Subject: [PATCH] vr41xx: updated workpad setup function Message-Id: <20060713173333.2eddfd7d.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11981 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has updated the IBM WorkPad setup function. Please apply. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/vr41xx/ibm-workpad/setup.c mips/arch/mips/vr41xx/ibm-workpad/setup.c --- mips-orig/arch/mips/vr41xx/ibm-workpad/setup.c 2006-07-12 12:13:07.318097750 +0900 +++ mips/arch/mips/vr41xx/ibm-workpad/setup.c 2006-07-12 15:40:51.761062500 +0900 @@ -1,7 +1,7 @@ /* * setup.c, Setup for the IBM WorkPad z50. * - * Copyright (C) 2002-2005 Yoichi Yuasa + * Copyright (C) 2002-2006 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -21,13 +21,18 @@ #include #include -#include + +#define WORKPAD_ISA_IO_BASE 0x15000000 +#define WORKPAD_ISA_IO_SIZE 0x03000000 +#define WORKPAD_ISA_IO_START 0 +#define WORKPAD_ISA_IO_END (WORKPAD_ISA_IO_SIZE - 1) +#define WORKPAD_IO_PORT_BASE KSEG1ADDR(WORKPAD_ISA_IO_BASE) static int __init ibm_workpad_setup(void) { - set_io_port_base(IO_PORT_BASE); - ioport_resource.start = IO_PORT_RESOURCE_START; - ioport_resource.end = IO_PORT_RESOURCE_END; + set_io_port_base(WORKPAD_IO_PORT_BASE); + ioport_resource.start = WORKPAD_ISA_IO_START; + ioport_resource.end = WORKPAD_ISA_IO_END; return 0; } diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/vr41xx/workpad.h mips/include/asm-mips/vr41xx/workpad.h --- mips-orig/include/asm-mips/vr41xx/workpad.h 2006-07-12 12:13:12.654431250 +0900 +++ mips/include/asm-mips/vr41xx/workpad.h 1970-01-01 09:00:00.000000000 +0900 @@ -1,43 +0,0 @@ -/* - * workpad.h, Include file for IBM WorkPad z50. - * - * Copyright (C) 2002-2004 Yoichi Yuasa - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __IBM_WORKPAD_H -#define __IBM_WORKPAD_H - -#include -#include - -/* - * Board specific address mapping - */ -#define VR41XX_ISA_MEM_BASE 0x10000000 -#define VR41XX_ISA_MEM_SIZE 0x04000000 - -/* VR41XX_ISA_IO_BASE includes offset from real base. */ -#define VR41XX_ISA_IO_BASE 0x15000000 -#define VR41XX_ISA_IO_SIZE 0x03000000 - -#define ISA_BUS_IO_BASE 0 -#define ISA_BUS_IO_SIZE VR41XX_ISA_IO_SIZE - -#define IO_PORT_BASE KSEG1ADDR(VR41XX_ISA_IO_BASE) -#define IO_PORT_RESOURCE_START ISA_BUS_IO_BASE -#define IO_PORT_RESOURCE_END (ISA_BUS_IO_BASE + ISA_BUS_IO_SIZE - 1) - -#endif /* __IBM_WORKPAD_H */ From yoichi_yuasa@tripeaks.co.jp Thu Jul 13 09:36:27 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 13 Jul 2006 09:36:44 +0100 (BST) Received: from mo32.po.2iij.net ([210.128.50.17]:58437 "EHLO mo32.po.2iij.net") by ftp.linux-mips.org with ESMTP id S8133565AbWGMIeB (ORCPT ); Thu, 13 Jul 2006 09:34:01 +0100 Received: by mo.po.2iij.net (mo32) id k6D8XvPU049591; Thu, 13 Jul 2006 17:33:57 +0900 (JST) Received: from localhost.localdomain (65.126.232.202.bf.2iij.net [202.232.126.65]) by mbox.po.2iij.net (mbox31) id k6D8Xuu0008549 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 13 Jul 2006 17:33:57 +0900 (JST) Date: Thu, 13 Jul 2006 17:33:56 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: linux-mips Subject: [PATCH] vr41xx: added #indef __KERNEL__/#endif to vr41xx header files Message-Id: <20060713173356.72ab52f1.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11982 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has added #ifdef __KERNEL__/#endif to vr41xx header files. Please apply. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/vr41xx/giu.h mips/include/asm-mips/vr41xx/giu.h --- mips-orig/include/asm-mips/vr41xx/giu.h 2006-07-12 12:13:12.654431250 +0900 +++ mips/include/asm-mips/vr41xx/giu.h 2006-07-12 15:59:14.834000250 +0900 @@ -20,6 +20,8 @@ #ifndef __NEC_VR41XX_GIU_H #define __NEC_VR41XX_GIU_H +#ifdef __KERNEL__ + typedef enum { IRQ_TRIGGER_LEVEL, IRQ_TRIGGER_EDGE, @@ -66,4 +68,6 @@ typedef enum { extern int vr41xx_gpio_pullupdown(unsigned int pin, gpio_pull_t pull); +#endif /* __KERNEL__ */ + #endif /* __NEC_VR41XX_GIU_H */ diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/vr41xx/pci.h mips/include/asm-mips/vr41xx/pci.h --- mips-orig/include/asm-mips/vr41xx/pci.h 2006-07-12 12:13:12.654431250 +0900 +++ mips/include/asm-mips/vr41xx/pci.h 2006-07-12 15:59:14.834000250 +0900 @@ -20,6 +20,8 @@ #ifndef __NEC_VR41XX_PCI_H #define __NEC_VR41XX_PCI_H +#ifdef __KERNEL__ + #define PCI_MASTER_ADDRESS_MASK 0x7fffffffU struct pci_master_address_conversion { @@ -87,4 +89,6 @@ struct pci_controller_unit_setup { extern void vr41xx_pciu_setup(struct pci_controller_unit_setup *setup); +#endif /* __KERNEL__ */ + #endif /* __NEC_VR41XX_PCI_H */ diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/vr41xx/siu.h mips/include/asm-mips/vr41xx/siu.h --- mips-orig/include/asm-mips/vr41xx/siu.h 2006-07-12 12:13:12.654431250 +0900 +++ mips/include/asm-mips/vr41xx/siu.h 2006-07-12 15:59:14.838000500 +0900 @@ -20,6 +20,8 @@ #ifndef __NEC_VR41XX_SIU_H #define __NEC_VR41XX_SIU_H +#ifdef __KERNEL__ + typedef enum { SIU_INTERFACE_RS232C, SIU_INTERFACE_IRDA, @@ -47,4 +49,6 @@ typedef enum { extern void vr41xx_select_irda_module(irda_module_t module, irda_speed_t speed); +#endif /* __KERNEL__ */ + #endif /* __NEC_VR41XX_SIU_H */ diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/vr41xx/vr41xx.h mips/include/asm-mips/vr41xx/vr41xx.h --- mips-orig/include/asm-mips/vr41xx/vr41xx.h 2006-07-12 13:51:13.821981250 +0900 +++ mips/include/asm-mips/vr41xx/vr41xx.h 2006-07-12 15:59:14.838000500 +0900 @@ -42,6 +42,8 @@ /* VR4133 0x00000c84- */ #define PRID_VR4133 0x00000c84 +#ifdef __KERNEL__ + /* * Bus Control Uint */ @@ -143,4 +145,6 @@ extern void vr41xx_disable_csiint(uint16 extern void vr41xx_enable_bcuint(void); extern void vr41xx_disable_bcuint(void); +#endif /* __KERNEL__ */ + #endif /* __NEC_VR41XX_H */ From yoichi_yuasa@tripeaks.co.jp Thu Jul 13 09:37:15 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 13 Jul 2006 09:37:30 +0100 (BST) Received: from mo30.po.2iij.net ([210.128.50.53]:40986 "EHLO mo30.po.2iij.net") by ftp.linux-mips.org with ESMTP id S8133577AbWGMIeW (ORCPT ); Thu, 13 Jul 2006 09:34:22 +0100 Received: by mo.po.2iij.net (mo30) id k6D8YHMq013604; Thu, 13 Jul 2006 17:34:17 +0900 (JST) Received: from localhost.localdomain (65.126.232.202.bf.2iij.net [202.232.126.65]) by mbox.po.2iij.net (mbox30) id k6D8YDIT057026 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 13 Jul 2006 17:34:13 +0900 (JST) Date: Thu, 13 Jul 2006 17:34:13 +0900 From: Yoichi Yuasa To: Ralf Baechle Cc: linux-mips Subject: [PATCH] fixed screen_info build error about Qemu Message-Id: <20060713173413.1e26694d.yoichi_yuasa@tripeaks.co.jp> Organization: TriPeaks Corporation X-Mailer: Sylpheed version 1.0.4 (GTK+ 1.2.10; i386-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 11983 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yoichi_yuasa@tripeaks.co.jp Precedence: bulk X-list: linux-mips Hi Ralf, This patch has fixed screen_info build error about Qemu. Please apply. Yoichi Signed-off-by: Yoichi Yuasa diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/qemu/q-vga.c mips/arch/mips/qemu/q-vga.c --- mips-orig/arch/mips/qemu/q-vga.c 2006-07-11 23:20:17.050899000 +0900 +++ mips/arch/mips/qemu/q-vga.c 2006-07-12 07:10:50.285183000 +0900 @@ -8,6 +8,7 @@ * This will eventually go into the qemu firmware. */ #include +#include #include #include #include