From mrv@corecom.co.kr Thu Jun  1 03:42:09 2006
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From:	"Roman Mashak" <mrv@corecom.co.kr>
To:	"Raj Palani" <Rajesh_Palani@pmc-sierra.com>
Cc:	<linux-mips@linux-mips.org>
References: <478F19F21671F04298A2116393EEC3D5273E4F@sjc1exm08.pmc_nt.nt.pmc-sierra.bc.ca>
Subject: Re: compiling BCM5700 driver
Date:	Thu, 1 Jun 2006 10:41:45 +0900
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Hello, Raj!
You wrote to "Roman Mashak" <mrv@corecom.co.kr>; "Ralf Baechle" 
<ralf@linux-mips.org> on Wed, 31 May 2006 09:06:44 -0700:

 RP> Yes.  We are currently maintaining the Titan GE driver on "Sequoia"
 RP> only in 2.6.x.  The GE driver in Sequoia has been renamed to
 RP> msp85xx_ge.c.  We are in the process of generating a patchset to add
 RP> support for Sequoia (MSP8510/MSP8520) in the Linux/MIPS 2.6 tree.

 RP> Our most recent Linux 2.6 tree for Sequoia is available on our ftp site
 RP> (ftp.pmc-sierra.com) under
 RP> /pub/linux/2.6.12/linux-2.6.12-rc3_L002.tar.gz.

There are msp85x0_ge.[ch] in this tarball. And seems old code from 
titan_ge.[ch] is still in used. Nevertheless kernel gets panic:

Linux version 2.6.12-rc3 (root@ecb-test32.corecom.local) (gcc version 
3.3-mips64linux-031001) #1 Thu Jun 1 10:33:22 KST 2006
PMON reports memory size 256MB
cpu_clock set to 900000000
CPU revision is: 000034c1
FPU revision is: 00003420
PMC-Sierra Sequoia Board Setup
32-bit support
Determined physical RAM map:
 memory: 20000000 @ 00000000 (usable)
Built 1 zonelists
Kernel command line: tftp://192.168.11.43/vmlinux root=/dev/nfs 
nfsroot=192.168.11.43:/export/linux/mips-fs-be 
ip=192.168.11.42:192.168.11.1::255.255.255.0::eth0
Unknown boot option `tftp://192.168.11.43/vmlinux': ignoring
Primary instruction cache 16kB, physically tagged, 4-way, linesize 32 bytes.
Primary data cache 16kB, 4-way, linesize 32 bytes.
Secondary cache size 256K, linesize 32 bytes.
Synthesized TLB refill handler (27 instructions).
Synthesized TLB load handler fastpath (39 instructions).
Synthesized TLB store handler fastpath (39 instructions).
Synthesized TLB modify handler fastpath (38 instructions).
PID hash table entries: 4096 (order: 12, 65536 bytes)
Using 450.000 MHz high precision timer.
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Memory: 515712k/524288k available (1623k kernel code, 8440k reserved, 372k 
data, 356k init, 0k highmem)
CompactFlash ATA Support for PMC-Sierra Sequoia
 <6>Internal UART Support for PMC-Sierra Sequoia
 <7>Calibrating delay loop... 897.02 BogoMIPS (lpj=448512)
Mount-cache hash table entries: 512
Checking for 'wait' instruction...  available.
NET: Registered protocol family 16
PCI: Failed to allocate mem resource #2:20000000@e0000000 for 0000:00:01.0
PCI: Failed to allocate mem resource #2:20000000@e8000000 for 0000:01:01.0
Generic RTC Driver v1.07
Serial: 8250/16550 driver $Revision: 1.1.1.1 $ 4 ports, IRQ sharing disabled
ttyS0 at MMIO 0x0 (irq = 0) is a 16550A
io scheduler noop registered
io scheduler anticipatory registered
io scheduler deadline registered
io scheduler cfq registered
loop: loaded (max 8 devices)
PMC-Sierra MSP85x0 10/100/1000 Ethernet Driver
Device Id : 206014,  Version : 0
: port 0 with MAC address 00:e0:04:00:02:4e
Rx NAPI supported, Tx Coalescing ON
: port 1 with MAC address 00:e0:04:00:02:4f
Rx NAPI supported, Tx Coalescing ON
NET: Registered protocol family 2
IP: routing cache hash table of 4096 buckets, 32Kbytes
TCP established hash table entries: 131072 (order: 8, 1048576 bytes)
TCP bind hash table entries: 65536 (order: 6, 262144 bytes)
TCP: Hash tables configured (established 131072 bind 65536)
NET: Registered protocol family 1
NET: Registered protocol family 17
Data bus error, epc == 802214d8, ra == 802214ac
Oops in arch/mips/kernel/traps.c::do_be, line 338[#1]:
Cpu 0
$ 0   : 00000000 90008000 9fc00840 9fc00840
$ 4   : 00000001 00000000 00000000 8036b97c
$ 8   : 00000000 801d8150 814df0f0 ffffffff
$12   : 00200200 00100100 0000ffff 8036b974
$16   : 9fc00000 816b5920 00000840 81690220
$20   : 0000003c 00000008 ffffffc0 00200000
$24   : 8036b97c 00000001
$28   : 80380000 80381df8 81690000 802214ac
Hi    : 0006d7ff
Lo    : f8164000
epc   : 802214d8 alloc_skb+0x98/0xec     Not tainted
ra    : 802214ac alloc_skb+0x6c/0xec
Status: 90008002    KERNEL EXL
Cause : 0000801c
PrId  : 000034c1
Modules linked in:
Process swapper (pid: 1, threadinfo=80380000, task=8037ab78)
Stack : 8010d6b0 8026e7e4 814e4e80 80369420 8169030c c01043b0 816b59c0 
8021a044
        0000001c 00180c01 00000000 00000000 c0000000 00000000 81690220 
81690000
        8034bc14 00000000 00000000 00000000 00000000 8021a608 803eb9c0 
00000000
        00000001 80381e68 18230458 80232598 81690000 00000000 00000000 
81690220
        8021a684 00100000 8021a16c 00000000 8021aaf8 8023743c 00000000 
fb004000
        ...
Call Trace:
 [<8010d6b0>] dma_map_single+0x5c/0x7c
 [<8026e7e4>] fib_magic+0x114/0x144
 [<8021a044>] msp85x0_ge_rx_task+0x74/0x174
 [<8021a608>] xdma_config+0x1cc/0x22c
 [<80232598>] rtnetlink_fill_ifinfo+0x474/0x57c
 [<8021a684>] msp85x0_ge_port_start+0x1c/0x74
 [<8021a16c>] msp85x0_port_init+0x28/0x80
 [<8021aaf8>] msp85x0_eth_setup_tx_ring+0x80/0xc8
 [<8023743c>] netlink_broadcast+0x29c/0x478
 [<8021adf0>] msp85x0_ge_eth_open+0x114/0x250
 [<8021af18>] msp85x0_ge_eth_open+0x23c/0x250
 [<80219f14>] msp85x0_ge_open+0x30/0xec
 [<80232b84>] rtmsg_ifinfo+0x80/0xf8
 [<80232b58>] rtmsg_ifinfo+0x54/0xf8
 [<80227d2c>] dev_open+0x64/0xd8
 [<80227d98>] dev_open+0xd0/0xd8
 [<8022d108>] dev_mc_upload+0x18/0x24
 [<80229f28>] dev_change_flags+0x70/0x158
 [<8019a84c>] proc_create+0x9c/0x100
 [<80311fb8>] ic_open_devs+0x20c/0x3a4
 [<8012a874>] msleep+0x48/0x5c
 [<80313524>] ip_auto_config+0x64/0x30c
 [<8030a7f8>] seqgen_init+0x10/0x20
 [<8030a7f8>] seqgen_init+0x10/0x20
 [<802f4828>] do_initcalls+0x50/0x100
 [<802f4828>] do_initcalls+0x50/0x100
 [<802f4908>] do_basic_setup+0x30/0x3c
 [<801004ac>] init+0x3c/0x120
 [<801035d0>] kernel_thread_helper+0x10/0x18
 [<801035c0>] kernel_thread_helper+0x0/0x18


Code: ae30008c  ac640000  8e220094 <ac400004> 8e230094  a4600008  8e220094 
a440000a  8e230094
Kernel panic - not syncing: Attempted to kill init!


With best regards, Roman Mashak.  E-mail: mrv@corecom.co.kr 



From zzh.hust@gmail.com Thu Jun  1 08:19:35 2006
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Date:	Thu, 1 Jun 2006 14:19:29 +0800
From:	zhuzhenhua <zzh.hust@gmail.com>
To:	linux-mips <linux-mips@linux-mips.org>
Subject: BFD: Warning: Writing section `.text' to huge (ie negative) file offset 0xa1ffff10
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i have write a code to link at 0xa2000000(uncached address)
but when link i get the error as
"BFD: Warning: Writing section `.text' to huge (ie negative) file
offset 0xa1ffff10.
BFD: Warning: Writing section `.data' to huge (ie negative) file
offset 0xa200b050.
BFD: Warning: Writing section `.reginfo' to huge (ie negative) file
offset 0xa200c980.
mipsel-linux-objcopy: /root/project/brec_flash/release/brec_flash.bin:
File truncated
make: *** [brec_flash] Error 1"

my link.xn as follow:

OUTPUT_ARCH(mips)
ENTRY(brec_flash_entry)
SECTIONS
{
.text 0xa2000000 :
	{
     release/entry.o (.text)
	
	            release/*(.text)
	}
	
.data :
	{
	            release/*(.data)
	}
	
.sbss :
  	{
  	            release/*(.sbss)
 	            release/*(.scommon)
 	}

.bss :
 	{
 	            release/*(.bss)
  	            release/*(COMMON)
 	 }

 }



thanks for any hints

Best Regards

zhuzhenhua

From hvr@gnu.org Thu Jun  1 09:54:36 2006
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From:	Herbert Valerio Riedel <hvr@gnu.org>
Date:	Thu, 1 Jun 2006 09:41:04 +0200
To:	netdev@vger.kernel.org
Cc:	linux-mips@linux-mips.org, jgarzik@pobox.com,
	ppopov@embeddedalley.com, sshtylyov@ru.mvista.com,
	ralf@linux-mips.org
Subject: [PATCH netdev-2.6#upstream] net: au1000_eth: PHY framework conversion
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convert au1000_eth driver to use PHY framework and garbage collected
functions and identifiers that became unused/obsolete in the process

Signed-off-by: Herbert Valerio Riedel <hvr@gnu.org>

---

this is a resend of
http://marc.theaimsgroup.com/?l=linux-netdev&m=114746547301867&w=2
rebased&handmerged to netdev-2.6#upstream (i.e. on top of sergei's
probe code cleanup patch)

 drivers/net/Kconfig      |    1 
 drivers/net/au1000_eth.c | 1602 +++++++++++-----------------------------------
 drivers/net/au1000_eth.h |  134 ----
 3 files changed, 378 insertions(+), 1359 deletions(-)

616e5a012a927d401befcbed37b77c3ea42da5a5
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index f499a3b..520765d 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -447,6 +447,7 @@ config MIPS_GT96100ETH
 config MIPS_AU1X00_ENET
 	bool "MIPS AU1000 Ethernet support"
 	depends on NET_ETHERNET && SOC_AU1X00
+	select PHYLIB
 	select CRC32
 	help
 	  If you have an Alchemy Semi AU1X00 based system
diff --git a/drivers/net/au1000_eth.c b/drivers/net/au1000_eth.c
index e1fe960..038d5fc 100644
--- a/drivers/net/au1000_eth.c
+++ b/drivers/net/au1000_eth.c
@@ -9,6 +9,9 @@
  * Update: 2004 Bjoern Riemer, riemer@fokus.fraunhofer.de 
  * or riemer@riemer-nt.de: fixed the link beat detection with 
  * ioctls (SIOCGMIIPHY)
+ * Copyright 2006 Herbert Valerio Riedel <hvr@gnu.org>
+ *  converted to use linux-2.6.x's PHY framework
+ *
  * Author: MontaVista Software, Inc.
  *         	ppopov@mvista.com or source@mvista.com
  *
@@ -53,6 +56,7 @@ #include <linux/mii.h>
 #include <linux/skbuff.h>
 #include <linux/delay.h>
 #include <linux/crc32.h>
+#include <linux/phy.h>
 #include <asm/mipsregs.h>
 #include <asm/irq.h>
 #include <asm/io.h>
@@ -88,17 +92,15 @@ static int au1000_tx(struct sk_buff *, s
 static int au1000_rx(struct net_device *);
 static irqreturn_t au1000_interrupt(int, void *, struct pt_regs *);
 static void au1000_tx_timeout(struct net_device *);
-static int au1000_set_config(struct net_device *dev, struct ifmap *map);
 static void set_rx_mode(struct net_device *);
 static struct net_device_stats *au1000_get_stats(struct net_device *);
-static void au1000_timer(unsigned long);
 static int au1000_ioctl(struct net_device *, struct ifreq *, int);
 static int mdio_read(struct net_device *, int, int);
 static void mdio_write(struct net_device *, int, int, u16);
-static void dump_mii(struct net_device *dev, int phy_id);
+static void au1000_adjust_link(struct net_device *);
+static void enable_mac(struct net_device *, int);
 
 // externs
-extern  void ack_rise_edge_irq(unsigned int);
 extern int get_ethernet_addr(char *ethernet_addr);
 extern void str2eaddr(unsigned char *ea, unsigned char *str);
 extern char * __init prom_getcmdline(void);
@@ -126,705 +128,83 @@ static unsigned char au1000_mac_addr[6] 
 	0x00, 0x50, 0xc2, 0x0c, 0x30, 0x00
 };
 
-#define nibswap(x) ((((x) >> 4) & 0x0f) | (((x) << 4) & 0xf0))
-#define RUN_AT(x) (jiffies + (x))
-
-// For reading/writing 32-bit words from/to DMA memory
-#define cpu_to_dma32 cpu_to_be32
-#define dma32_to_cpu be32_to_cpu
-
 struct au1000_private *au_macs[NUM_ETH_INTERFACES];
 
-/* FIXME 
- * All of the PHY code really should be detached from the MAC 
- * code.
+/*
+ * board-specific configurations
+ *
+ * PHY detection algorithm
+ *
+ * If AU1XXX_PHY_STATIC_CONFIG is undefined, the PHY setup is
+ * autodetected:
+ *
+ * mii_probe() first searches the current MAC's MII bus for a PHY,
+ * selecting the first (or last, if AU1XXX_PHY_SEARCH_HIGHEST_ADDR is
+ * defined) PHY address not already claimed by another netdev.
+ *
+ * If nothing was found that way when searching for the 2nd ethernet
+ * controller's PHY and AU1XXX_PHY1_SEARCH_ON_MAC0 is defined, then
+ * the first MII bus is searched as well for an unclaimed PHY; this is
+ * needed in case of a dual-PHY accessible only through the MAC0's MII
+ * bus.
+ *
+ * Finally, if no PHY is found, then the corresponding ethernet
+ * controller is not registered to the network subsystem.
  */
 
-/* Default advertise */
-#define GENMII_DEFAULT_ADVERTISE \
-	ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full | \
-	ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full | \
-	ADVERTISED_Autoneg
-
-#define GENMII_DEFAULT_FEATURES \
-	SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | \
-	SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | \
-	SUPPORTED_Autoneg
-
-int bcm_5201_init(struct net_device *dev, int phy_addr)
-{
-	s16 data;
-	
-	/* Stop auto-negotiation */
-	data = mdio_read(dev, phy_addr, MII_CONTROL);
-	mdio_write(dev, phy_addr, MII_CONTROL, data & ~MII_CNTL_AUTO);
-
-	/* Set advertisement to 10/100 and Half/Full duplex
-	 * (full capabilities) */
-	data = mdio_read(dev, phy_addr, MII_ANADV);
-	data |= MII_NWAY_TX | MII_NWAY_TX_FDX | MII_NWAY_T_FDX | MII_NWAY_T;
-	mdio_write(dev, phy_addr, MII_ANADV, data);
-	
-	/* Restart auto-negotiation */
-	data = mdio_read(dev, phy_addr, MII_CONTROL);
-	data |= MII_CNTL_RST_AUTO | MII_CNTL_AUTO;
-	mdio_write(dev, phy_addr, MII_CONTROL, data);
-
-	if (au1000_debug > 4) 
-		dump_mii(dev, phy_addr);
-	return 0;
-}
-
-int bcm_5201_reset(struct net_device *dev, int phy_addr)
-{
-	s16 mii_control, timeout;
-	
-	mii_control = mdio_read(dev, phy_addr, MII_CONTROL);
-	mdio_write(dev, phy_addr, MII_CONTROL, mii_control | MII_CNTL_RESET);
-	mdelay(1);
-	for (timeout = 100; timeout > 0; --timeout) {
-		mii_control = mdio_read(dev, phy_addr, MII_CONTROL);
-		if ((mii_control & MII_CNTL_RESET) == 0)
-			break;
-		mdelay(1);
-	}
-	if (mii_control & MII_CNTL_RESET) {
-		printk(KERN_ERR "%s PHY reset timeout !\n", dev->name);
-		return -1;
-	}
-	return 0;
-}
-
-int 
-bcm_5201_status(struct net_device *dev, int phy_addr, u16 *link, u16 *speed)
-{
-	u16 mii_data;
-	struct au1000_private *aup;
-
-	if (!dev) {
-		printk(KERN_ERR "bcm_5201_status error: NULL dev\n");
-		return -1;
-	}
-	aup = (struct au1000_private *) dev->priv;
-
-	mii_data = mdio_read(dev, aup->phy_addr, MII_STATUS);
-	if (mii_data & MII_STAT_LINK) {
-		*link = 1;
-		mii_data = mdio_read(dev, aup->phy_addr, MII_AUX_CNTRL);
-		if (mii_data & MII_AUX_100) {
-			if (mii_data & MII_AUX_FDX) {
-				*speed = IF_PORT_100BASEFX;
-				dev->if_port = IF_PORT_100BASEFX;
-			}
-			else {
-				*speed = IF_PORT_100BASETX;
-				dev->if_port = IF_PORT_100BASETX;
-			}
-		}
-		else  {
-			*speed = IF_PORT_10BASET;
-			dev->if_port = IF_PORT_10BASET;
-		}
-
-	}
-	else {
-		*link = 0;
-		*speed = 0;
-		dev->if_port = IF_PORT_UNKNOWN;
-	}
-	return 0;
-}
-
-int lsi_80227_init(struct net_device *dev, int phy_addr)
-{
-	if (au1000_debug > 4)
-		printk("lsi_80227_init\n");
-
-	/* restart auto-negotiation */
-	mdio_write(dev, phy_addr, MII_CONTROL,
-		   MII_CNTL_F100 | MII_CNTL_AUTO | MII_CNTL_RST_AUTO); // | MII_CNTL_FDX);
-	mdelay(1);
-
-	/* set up LEDs to correct display */
-#ifdef CONFIG_MIPS_MTX1
-	mdio_write(dev, phy_addr, 17, 0xff80);
-#else
-	mdio_write(dev, phy_addr, 17, 0xffc0);
-#endif
-
-	if (au1000_debug > 4)
-		dump_mii(dev, phy_addr);
-	return 0;
-}
-
-int lsi_80227_reset(struct net_device *dev, int phy_addr)
-{
-	s16 mii_control, timeout;
-	
-	if (au1000_debug > 4) {
-		printk("lsi_80227_reset\n");
-		dump_mii(dev, phy_addr);
-	}
-
-	mii_control = mdio_read(dev, phy_addr, MII_CONTROL);
-	mdio_write(dev, phy_addr, MII_CONTROL, mii_control | MII_CNTL_RESET);
-	mdelay(1);
-	for (timeout = 100; timeout > 0; --timeout) {
-		mii_control = mdio_read(dev, phy_addr, MII_CONTROL);
-		if ((mii_control & MII_CNTL_RESET) == 0)
-			break;
-		mdelay(1);
-	}
-	if (mii_control & MII_CNTL_RESET) {
-		printk(KERN_ERR "%s PHY reset timeout !\n", dev->name);
-		return -1;
-	}
-	return 0;
-}
-
-int
-lsi_80227_status(struct net_device *dev, int phy_addr, u16 *link, u16 *speed)
-{
-	u16 mii_data;
-	struct au1000_private *aup;
-
-	if (!dev) {
-		printk(KERN_ERR "lsi_80227_status error: NULL dev\n");
-		return -1;
-	}
-	aup = (struct au1000_private *) dev->priv;
-
-	mii_data = mdio_read(dev, aup->phy_addr, MII_STATUS);
-	if (mii_data & MII_STAT_LINK) {
-		*link = 1;
-		mii_data = mdio_read(dev, aup->phy_addr, MII_LSI_PHY_STAT);
-		if (mii_data & MII_LSI_PHY_STAT_SPD) {
-			if (mii_data & MII_LSI_PHY_STAT_FDX) {
-				*speed = IF_PORT_100BASEFX;
-				dev->if_port = IF_PORT_100BASEFX;
-			}
-			else {
-				*speed = IF_PORT_100BASETX;
-				dev->if_port = IF_PORT_100BASETX;
-			}
-		}
-		else  {
-			*speed = IF_PORT_10BASET;
-			dev->if_port = IF_PORT_10BASET;
-		}
-
-	}
-	else {
-		*link = 0;
-		*speed = 0;
-		dev->if_port = IF_PORT_UNKNOWN;
-	}
-	return 0;
-}
-
-int am79c901_init(struct net_device *dev, int phy_addr)
-{
-	printk("am79c901_init\n");
-	return 0;
-}
-
-int am79c901_reset(struct net_device *dev, int phy_addr)
-{
-	printk("am79c901_reset\n");
-	return 0;
-}
-
-int 
-am79c901_status(struct net_device *dev, int phy_addr, u16 *link, u16 *speed)
-{
-	return 0;
-}
-
-int am79c874_init(struct net_device *dev, int phy_addr)
-{
-	s16 data;
-
-	/* 79c874 has quit resembled bit assignments to BCM5201 */
-	if (au1000_debug > 4)
-		printk("am79c847_init\n");
-
-	/* Stop auto-negotiation */
-	data = mdio_read(dev, phy_addr, MII_CONTROL);
-	mdio_write(dev, phy_addr, MII_CONTROL, data & ~MII_CNTL_AUTO);
-
-	/* Set advertisement to 10/100 and Half/Full duplex
-	 * (full capabilities) */
-	data = mdio_read(dev, phy_addr, MII_ANADV);
-	data |= MII_NWAY_TX | MII_NWAY_TX_FDX | MII_NWAY_T_FDX | MII_NWAY_T;
-	mdio_write(dev, phy_addr, MII_ANADV, data);
-	
-	/* Restart auto-negotiation */
-	data = mdio_read(dev, phy_addr, MII_CONTROL);
-	data |= MII_CNTL_RST_AUTO | MII_CNTL_AUTO;
-
-	mdio_write(dev, phy_addr, MII_CONTROL, data);
-
-	if (au1000_debug > 4) dump_mii(dev, phy_addr);
-	return 0;
-}
-
-int am79c874_reset(struct net_device *dev, int phy_addr)
-{
-	s16 mii_control, timeout;
-	
-	if (au1000_debug > 4)
-		printk("am79c874_reset\n");
-
-	mii_control = mdio_read(dev, phy_addr, MII_CONTROL);
-	mdio_write(dev, phy_addr, MII_CONTROL, mii_control | MII_CNTL_RESET);
-	mdelay(1);
-	for (timeout = 100; timeout > 0; --timeout) {
-		mii_control = mdio_read(dev, phy_addr, MII_CONTROL);
-		if ((mii_control & MII_CNTL_RESET) == 0)
-			break;
-		mdelay(1);
-	}
-	if (mii_control & MII_CNTL_RESET) {
-		printk(KERN_ERR "%s PHY reset timeout !\n", dev->name);
-		return -1;
-	}
-	return 0;
-}
-
-int 
-am79c874_status(struct net_device *dev, int phy_addr, u16 *link, u16 *speed)
-{
-	u16 mii_data;
-	struct au1000_private *aup;
-
-	// printk("am79c874_status\n");
-	if (!dev) {
-		printk(KERN_ERR "am79c874_status error: NULL dev\n");
-		return -1;
-	}
-
-	aup = (struct au1000_private *) dev->priv;
-	mii_data = mdio_read(dev, aup->phy_addr, MII_STATUS);
+/* autodetection defaults */
+#undef  AU1XXX_PHY_SEARCH_HIGHEST_ADDR
+#define AU1XXX_PHY1_SEARCH_ON_MAC0
 
-	if (mii_data & MII_STAT_LINK) {
-		*link = 1;
-		mii_data = mdio_read(dev, aup->phy_addr, MII_AMD_PHY_STAT);
-		if (mii_data & MII_AMD_PHY_STAT_SPD) {
-			if (mii_data & MII_AMD_PHY_STAT_FDX) {
-				*speed = IF_PORT_100BASEFX;
-				dev->if_port = IF_PORT_100BASEFX;
-			}
-			else {
-				*speed = IF_PORT_100BASETX;
-				dev->if_port = IF_PORT_100BASETX;
-			}
-		}
-		else {
-			*speed = IF_PORT_10BASET;
-			dev->if_port = IF_PORT_10BASET;
-		}
-
-	}
-	else {
-		*link = 0;
-		*speed = 0;
-		dev->if_port = IF_PORT_UNKNOWN;
-	}
-	return 0;
-}
-
-int lxt971a_init(struct net_device *dev, int phy_addr)
-{
-	if (au1000_debug > 4)
-		printk("lxt971a_init\n");
-
-	/* restart auto-negotiation */
-	mdio_write(dev, phy_addr, MII_CONTROL,
-		   MII_CNTL_F100 | MII_CNTL_AUTO | MII_CNTL_RST_AUTO | MII_CNTL_FDX);
-
-	/* set up LEDs to correct display */
-	mdio_write(dev, phy_addr, 20, 0x0422);
-
-	if (au1000_debug > 4)
-		dump_mii(dev, phy_addr);
-	return 0;
-}
-
-int lxt971a_reset(struct net_device *dev, int phy_addr)
-{
-	s16 mii_control, timeout;
-	
-	if (au1000_debug > 4) {
-		printk("lxt971a_reset\n");
-		dump_mii(dev, phy_addr);
-	}
-
-	mii_control = mdio_read(dev, phy_addr, MII_CONTROL);
-	mdio_write(dev, phy_addr, MII_CONTROL, mii_control | MII_CNTL_RESET);
-	mdelay(1);
-	for (timeout = 100; timeout > 0; --timeout) {
-		mii_control = mdio_read(dev, phy_addr, MII_CONTROL);
-		if ((mii_control & MII_CNTL_RESET) == 0)
-			break;
-		mdelay(1);
-	}
-	if (mii_control & MII_CNTL_RESET) {
-		printk(KERN_ERR "%s PHY reset timeout !\n", dev->name);
-		return -1;
-	}
-	return 0;
-}
-
-int
-lxt971a_status(struct net_device *dev, int phy_addr, u16 *link, u16 *speed)
-{
-	u16 mii_data;
-	struct au1000_private *aup;
-
-	if (!dev) {
-		printk(KERN_ERR "lxt971a_status error: NULL dev\n");
-		return -1;
-	}
-	aup = (struct au1000_private *) dev->priv;
-
-	mii_data = mdio_read(dev, aup->phy_addr, MII_STATUS);
-	if (mii_data & MII_STAT_LINK) {
-		*link = 1;
-		mii_data = mdio_read(dev, aup->phy_addr, MII_INTEL_PHY_STAT);
-		if (mii_data & MII_INTEL_PHY_STAT_SPD) {
-			if (mii_data & MII_INTEL_PHY_STAT_FDX) {
-				*speed = IF_PORT_100BASEFX;
-				dev->if_port = IF_PORT_100BASEFX;
-			}
-			else {
-				*speed = IF_PORT_100BASETX;
-				dev->if_port = IF_PORT_100BASETX;
-			}
-		}
-		else  {
-			*speed = IF_PORT_10BASET;
-			dev->if_port = IF_PORT_10BASET;
-		}
-
-	}
-	else {
-		*link = 0;
-		*speed = 0;
-		dev->if_port = IF_PORT_UNKNOWN;
-	}
-	return 0;
-}
-
-int ks8995m_init(struct net_device *dev, int phy_addr)
-{
-	s16 data;
-	
-//	printk("ks8995m_init\n");
-	/* Stop auto-negotiation */
-	data = mdio_read(dev, phy_addr, MII_CONTROL);
-	mdio_write(dev, phy_addr, MII_CONTROL, data & ~MII_CNTL_AUTO);
-
-	/* Set advertisement to 10/100 and Half/Full duplex
-	 * (full capabilities) */
-	data = mdio_read(dev, phy_addr, MII_ANADV);
-	data |= MII_NWAY_TX | MII_NWAY_TX_FDX | MII_NWAY_T_FDX | MII_NWAY_T;
-	mdio_write(dev, phy_addr, MII_ANADV, data);
-	
-	/* Restart auto-negotiation */
-	data = mdio_read(dev, phy_addr, MII_CONTROL);
-	data |= MII_CNTL_RST_AUTO | MII_CNTL_AUTO;
-	mdio_write(dev, phy_addr, MII_CONTROL, data);
-
-	if (au1000_debug > 4) dump_mii(dev, phy_addr);
-
-	return 0;
-}
-
-int ks8995m_reset(struct net_device *dev, int phy_addr)
-{
-	s16 mii_control, timeout;
-	
-//	printk("ks8995m_reset\n");
-	mii_control = mdio_read(dev, phy_addr, MII_CONTROL);
-	mdio_write(dev, phy_addr, MII_CONTROL, mii_control | MII_CNTL_RESET);
-	mdelay(1);
-	for (timeout = 100; timeout > 0; --timeout) {
-		mii_control = mdio_read(dev, phy_addr, MII_CONTROL);
-		if ((mii_control & MII_CNTL_RESET) == 0)
-			break;
-		mdelay(1);
-	}
-	if (mii_control & MII_CNTL_RESET) {
-		printk(KERN_ERR "%s PHY reset timeout !\n", dev->name);
-		return -1;
-	}
-	return 0;
-}
-
-int ks8995m_status(struct net_device *dev, int phy_addr, u16 *link, u16 *speed)
-{
-	u16 mii_data;
-	struct au1000_private *aup;
-
-	if (!dev) {
-		printk(KERN_ERR "ks8995m_status error: NULL dev\n");
-		return -1;
-	}
-	aup = (struct au1000_private *) dev->priv;
-
-	mii_data = mdio_read(dev, aup->phy_addr, MII_STATUS);
-	if (mii_data & MII_STAT_LINK) {
-		*link = 1;
-		mii_data = mdio_read(dev, aup->phy_addr, MII_AUX_CNTRL);
-		if (mii_data & MII_AUX_100) {
-			if (mii_data & MII_AUX_FDX) {
-				*speed = IF_PORT_100BASEFX;
-				dev->if_port = IF_PORT_100BASEFX;
-			}
-			else {
-				*speed = IF_PORT_100BASETX;
-				dev->if_port = IF_PORT_100BASETX;
-			}
-		}
-		else  {											
-			*speed = IF_PORT_10BASET;
-			dev->if_port = IF_PORT_10BASET;
-		}
-
-	}
-	else {
-		*link = 0;
-		*speed = 0;
-		dev->if_port = IF_PORT_UNKNOWN;
-	}
-	return 0;
-}
-
-int
-smsc_83C185_init (struct net_device *dev, int phy_addr)
-{
-	s16 data;
-
-	if (au1000_debug > 4)
-		printk("smsc_83C185_init\n");
-
-	/* Stop auto-negotiation */
-	data = mdio_read(dev, phy_addr, MII_CONTROL);
-	mdio_write(dev, phy_addr, MII_CONTROL, data & ~MII_CNTL_AUTO);
-
-	/* Set advertisement to 10/100 and Half/Full duplex
-	 * (full capabilities) */
-	data = mdio_read(dev, phy_addr, MII_ANADV);
-	data |= MII_NWAY_TX | MII_NWAY_TX_FDX | MII_NWAY_T_FDX | MII_NWAY_T;
-	mdio_write(dev, phy_addr, MII_ANADV, data);
-	
-	/* Restart auto-negotiation */
-	data = mdio_read(dev, phy_addr, MII_CONTROL);
-	data |= MII_CNTL_RST_AUTO | MII_CNTL_AUTO;
-
-	mdio_write(dev, phy_addr, MII_CONTROL, data);
-
-	if (au1000_debug > 4) dump_mii(dev, phy_addr);
-	return 0;
-}
-
-int
-smsc_83C185_reset (struct net_device *dev, int phy_addr)
-{
-	s16 mii_control, timeout;
-	
-	if (au1000_debug > 4)
-		printk("smsc_83C185_reset\n");
-
-	mii_control = mdio_read(dev, phy_addr, MII_CONTROL);
-	mdio_write(dev, phy_addr, MII_CONTROL, mii_control | MII_CNTL_RESET);
-	mdelay(1);
-	for (timeout = 100; timeout > 0; --timeout) {
-		mii_control = mdio_read(dev, phy_addr, MII_CONTROL);
-		if ((mii_control & MII_CNTL_RESET) == 0)
-			break;
-		mdelay(1);
-	}
-	if (mii_control & MII_CNTL_RESET) {
-		printk(KERN_ERR "%s PHY reset timeout !\n", dev->name);
-		return -1;
-	}
-	return 0;
-}
-
-int 
-smsc_83C185_status (struct net_device *dev, int phy_addr, u16 *link, u16 *speed)
-{
-	u16 mii_data;
-	struct au1000_private *aup;
-
-	if (!dev) {
-		printk(KERN_ERR "smsc_83C185_status error: NULL dev\n");
-		return -1;
-	}
-
-	aup = (struct au1000_private *) dev->priv;
-	mii_data = mdio_read(dev, aup->phy_addr, MII_STATUS);
-
-	if (mii_data & MII_STAT_LINK) {
-		*link = 1;
-		mii_data = mdio_read(dev, aup->phy_addr, 0x1f);
-		if (mii_data & (1<<3)) {
-			if (mii_data & (1<<4)) {
-				*speed = IF_PORT_100BASEFX;
-				dev->if_port = IF_PORT_100BASEFX;
-			}
-			else {
-				*speed = IF_PORT_100BASETX;
-				dev->if_port = IF_PORT_100BASETX;
-			}
-		}
-		else {
-			*speed = IF_PORT_10BASET;
-			dev->if_port = IF_PORT_10BASET;
-		}
-	}
-	else {
-		*link = 0;
-		*speed = 0;
-		dev->if_port = IF_PORT_UNKNOWN;
-	}
-	return 0;
-}
-
-
-#ifdef CONFIG_MIPS_BOSPORUS
-int stub_init(struct net_device *dev, int phy_addr)
-{
-	//printk("PHY stub_init\n");
-	return 0;
-}
-
-int stub_reset(struct net_device *dev, int phy_addr)
-{
-	//printk("PHY stub_reset\n");
-	return 0;
-}
-
-int 
-stub_status(struct net_device *dev, int phy_addr, u16 *link, u16 *speed)
-{
-	//printk("PHY stub_status\n");
-	*link = 1;
-	/* hmmm, revisit */
-	*speed = IF_PORT_100BASEFX;
-	dev->if_port = IF_PORT_100BASEFX;
-	return 0;
-}
-#endif
-
-struct phy_ops bcm_5201_ops = {
-	bcm_5201_init,
-	bcm_5201_reset,
-	bcm_5201_status,
-};
-
-struct phy_ops am79c874_ops = {
-	am79c874_init,
-	am79c874_reset,
-	am79c874_status,
-};
-
-struct phy_ops am79c901_ops = {
-	am79c901_init,
-	am79c901_reset,
-	am79c901_status,
-};
-
-struct phy_ops lsi_80227_ops = { 
-	lsi_80227_init,
-	lsi_80227_reset,
-	lsi_80227_status,
-};
-
-struct phy_ops lxt971a_ops = { 
-	lxt971a_init,
-	lxt971a_reset,
-	lxt971a_status,
-};
+/* static PHY setup
+ *
+ * most boards PHY setup should be detectable properly with the
+ * autodetection algorithm in mii_probe(), but in some cases (e.g. if
+ * you have a switch attached, or want to use the PHY's interrupt
+ * notification capabilities) you can provide a static PHY
+ * configuration here
+ *
+ * IRQs may only be set, if a PHY address was configured
+ * If a PHY address is given, also a bus id is required to be set
+ *
+ * ps: make sure the used irqs are configured properly in the board
+ * specific irq-map
+ */
 
-struct phy_ops ks8995m_ops = {
-	ks8995m_init,
-	ks8995m_reset,
-	ks8995m_status,
-};
+#if defined(CONFIG_MIPS_BOSPORUS)
+/*
+ * Micrel/Kendin 5 port switch attached to MAC0,
+ * MAC0 is associated with PHY address 5 (== WAN port)
+ * MAC1 is not associated with any PHY, since it's connected directly
+ * to the switch.
+ * no interrupts are used
+ */
+# define AU1XXX_PHY_STATIC_CONFIG
 
-struct phy_ops smsc_83C185_ops = {
-	smsc_83C185_init,
-	smsc_83C185_reset,
-	smsc_83C185_status,
-};
+# define AU1XXX_PHY0_ADDR  5
+# define AU1XXX_PHY0_BUSID 0
+#  undef AU1XXX_PHY0_IRQ
 
-#ifdef CONFIG_MIPS_BOSPORUS
-struct phy_ops stub_ops = {
-	stub_init,
-	stub_reset,
-	stub_status,
-};
+#  undef AU1XXX_PHY1_ADDR
+#  undef AU1XXX_PHY1_BUSID
+#  undef AU1XXX_PHY1_IRQ
 #endif
 
-static struct mii_chip_info {
-	const char * name;
-	u16 phy_id0;
-	u16 phy_id1;
-	struct phy_ops *phy_ops;	
-	int dual_phy;
-} mii_chip_table[] = {
-	{"Broadcom BCM5201 10/100 BaseT PHY",0x0040,0x6212, &bcm_5201_ops,0},
-	{"Broadcom BCM5221 10/100 BaseT PHY",0x0040,0x61e4, &bcm_5201_ops,0},
-	{"Broadcom BCM5222 10/100 BaseT PHY",0x0040,0x6322, &bcm_5201_ops,1},
-	{"NS DP83847 PHY", 0x2000, 0x5c30, &bcm_5201_ops ,0},
-	{"AMD 79C901 HomePNA PHY",0x0000,0x35c8, &am79c901_ops,0},
-	{"AMD 79C874 10/100 BaseT PHY",0x0022,0x561b, &am79c874_ops,0},
-	{"LSI 80227 10/100 BaseT PHY",0x0016,0xf840, &lsi_80227_ops,0},
-	{"Intel LXT971A Dual Speed PHY",0x0013,0x78e2, &lxt971a_ops,0},
-	{"Kendin KS8995M 10/100 BaseT PHY",0x0022,0x1450, &ks8995m_ops,0},
-	{"SMSC LAN83C185 10/100 BaseT PHY",0x0007,0xc0a3, &smsc_83C185_ops,0},
-#ifdef CONFIG_MIPS_BOSPORUS
-	{"Stub", 0x1234, 0x5678, &stub_ops },
+#if defined(AU1XXX_PHY0_BUSID) && (AU1XXX_PHY0_BUSID > 0)
+# error MAC0-associated PHY attached 2nd MACs MII bus not supported yet
 #endif
-	{0,},
-};
 
-static int mdio_read(struct net_device *dev, int phy_id, int reg)
+/*
+ * MII operations
+ */
+static int mdio_read(struct net_device *dev, int phy_addr, int reg)
 {
 	struct au1000_private *aup = (struct au1000_private *) dev->priv;
-	volatile u32 *mii_control_reg;
-	volatile u32 *mii_data_reg;
+	volatile u32 *const mii_control_reg = &aup->mac->mii_control;
+	volatile u32 *const mii_data_reg = &aup->mac->mii_data;
 	u32 timedout = 20;
 	u32 mii_control;
 
-	#ifdef CONFIG_BCM5222_DUAL_PHY
-	/* First time we probe, it's for the mac0 phy.
-	 * Since we haven't determined yet that we have a dual phy,
-	 * aup->mii->mii_control_reg won't be setup and we'll
-	 * default to the else statement.
-	 * By the time we probe for the mac1 phy, the mii_control_reg
-	 * will be setup to be the address of the mac0 phy control since
-	 * both phys are controlled through mac0.
-	 */
-	if (aup->mii && aup->mii->mii_control_reg) {
-		mii_control_reg = aup->mii->mii_control_reg;
-		mii_data_reg = aup->mii->mii_data_reg;
-	}
-	else if (au_macs[0]->mii && au_macs[0]->mii->mii_control_reg) {
-		/* assume both phys are controlled through mac0 */
-		mii_control_reg = au_macs[0]->mii->mii_control_reg;
-		mii_data_reg = au_macs[0]->mii->mii_data_reg;
-	}
-	else 
-	#endif
-	{
-		/* default control and data reg addresses */
-		mii_control_reg = &aup->mac->mii_control;
-		mii_data_reg = &aup->mac->mii_data;
-	}
-
 	while (*mii_control_reg & MAC_MII_BUSY) {
 		mdelay(1);
 		if (--timedout == 0) {
@@ -835,7 +215,7 @@ static int mdio_read(struct net_device *
 	}
 
 	mii_control = MAC_SET_MII_SELECT_REG(reg) | 
-		MAC_SET_MII_SELECT_PHY(phy_id) | MAC_MII_READ;
+		MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_READ;
 
 	*mii_control_reg = mii_control;
 
@@ -851,32 +231,14 @@ static int mdio_read(struct net_device *
 	return (int)*mii_data_reg;
 }
 
-static void mdio_write(struct net_device *dev, int phy_id, int reg, u16 value)
+static void mdio_write(struct net_device *dev, int phy_addr, int reg, u16 value)
 {
 	struct au1000_private *aup = (struct au1000_private *) dev->priv;
-	volatile u32 *mii_control_reg;
-	volatile u32 *mii_data_reg;
+	volatile u32 *const mii_control_reg = &aup->mac->mii_control;
+	volatile u32 *const mii_data_reg = &aup->mac->mii_data;
 	u32 timedout = 20;
 	u32 mii_control;
 
-	#ifdef CONFIG_BCM5222_DUAL_PHY
-	if (aup->mii && aup->mii->mii_control_reg) {
-		mii_control_reg = aup->mii->mii_control_reg;
-		mii_data_reg = aup->mii->mii_data_reg;
-	}
-	else if (au_macs[0]->mii && au_macs[0]->mii->mii_control_reg) {
-		/* assume both phys are controlled through mac0 */
-		mii_control_reg = au_macs[0]->mii->mii_control_reg;
-		mii_data_reg = au_macs[0]->mii->mii_data_reg;
-	}
-	else 
-	#endif
-	{
-		/* default control and data reg addresses */
-		mii_control_reg = &aup->mac->mii_control;
-		mii_data_reg = &aup->mac->mii_data;
-	}
-
 	while (*mii_control_reg & MAC_MII_BUSY) {
 		mdelay(1);
 		if (--timedout == 0) {
@@ -887,165 +249,145 @@ static void mdio_write(struct net_device
 	}
 
 	mii_control = MAC_SET_MII_SELECT_REG(reg) | 
-		MAC_SET_MII_SELECT_PHY(phy_id) | MAC_MII_WRITE;
+		MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_WRITE;
 
 	*mii_data_reg = value;
 	*mii_control_reg = mii_control;
 }
 
+static int mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
+{
+	/* WARNING: bus->phy_map[phy_addr].attached_dev == dev does
+	 * _NOT_ hold (e.g. when PHY is accessed through other MAC's MII bus) */
+	struct net_device *const dev = bus->priv;
+
+	enable_mac(dev, 0); /* make sure the MAC associated with this
+			     * mii_bus is enabled */
+	return mdio_read(dev, phy_addr, regnum);
+}
 
-static void dump_mii(struct net_device *dev, int phy_id)
+static int mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
+			 u16 value)
 {
-	int i, val;
+	struct net_device *const dev = bus->priv;
 
-	for (i = 0; i < 7; i++) {
-		if ((val = mdio_read(dev, phy_id, i)) >= 0)
-			printk("%s: MII Reg %d=%x\n", dev->name, i, val);
-	}
-	for (i = 16; i < 25; i++) {
-		if ((val = mdio_read(dev, phy_id, i)) >= 0)
-			printk("%s: MII Reg %d=%x\n", dev->name, i, val);
-	}
+	enable_mac(dev, 0); /* make sure the MAC associated with this
+			     * mii_bus is enabled */
+	mdio_write(dev, phy_addr, regnum, value);
+	return 0;
 }
 
-static int mii_probe (struct net_device * dev)
+static int mdiobus_reset(struct mii_bus *bus)
 {
-	struct au1000_private *aup = (struct au1000_private *) dev->priv;
-	int phy_addr;
-#ifdef CONFIG_MIPS_BOSPORUS
-	int phy_found=0;
-#endif
+	struct net_device *const dev = bus->priv;
 
-	/* search for total of 32 possible mii phy addresses */
-	for (phy_addr = 0; phy_addr < 32; phy_addr++) {
-		u16 mii_status;
-		u16 phy_id0, phy_id1;
-		int i;
+	enable_mac(dev, 0); /* make sure the MAC associated with this
+			     * mii_bus is enabled */
+	return 0;
+}
 
-		#ifdef CONFIG_BCM5222_DUAL_PHY
-		/* Mask the already found phy, try next one */
-		if (au_macs[0]->mii && au_macs[0]->mii->mii_control_reg) {
-			if (au_macs[0]->phy_addr == phy_addr)
-				continue;
-		}
-		#endif
-
-		mii_status = mdio_read(dev, phy_addr, MII_STATUS);
-		if (mii_status == 0xffff || mii_status == 0x0000)
-			/* the mii is not accessable, try next one */
-			continue;
-
-		phy_id0 = mdio_read(dev, phy_addr, MII_PHY_ID0);
-		phy_id1 = mdio_read(dev, phy_addr, MII_PHY_ID1);
-
-		/* search our mii table for the current mii */ 
-		for (i = 0; mii_chip_table[i].phy_id1; i++) {
-			if (phy_id0 == mii_chip_table[i].phy_id0 &&
-			    phy_id1 == mii_chip_table[i].phy_id1) {
-				struct mii_phy * mii_phy = aup->mii;
-
-				printk(KERN_INFO "%s: %s at phy address %d\n",
-				       dev->name, mii_chip_table[i].name, 
-				       phy_addr);
-#ifdef CONFIG_MIPS_BOSPORUS
-				phy_found = 1;
-#endif
-				mii_phy->chip_info = mii_chip_table+i;
-				aup->phy_addr = phy_addr;
-				aup->want_autoneg = 1;
-				aup->phy_ops = mii_chip_table[i].phy_ops;
-				aup->phy_ops->phy_init(dev,phy_addr);
-
-				// Check for dual-phy and then store required 
-				// values and set indicators. We need to do 
-				// this now since mdio_{read,write} need the 
-				// control and data register addresses.
-				#ifdef CONFIG_BCM5222_DUAL_PHY
-				if ( mii_chip_table[i].dual_phy) {
-
-					/* assume both phys are controlled 
-					 * through MAC0. Board specific? */
-					
-					/* sanity check */
-					if (!au_macs[0] || !au_macs[0]->mii)
-						return -1;
-					aup->mii->mii_control_reg = (u32 *)
-						&au_macs[0]->mac->mii_control;
-					aup->mii->mii_data_reg = (u32 *)
-						&au_macs[0]->mac->mii_data;
-				}
-				#endif
-				goto found;
-			}
+static int mii_probe (struct net_device *dev)
+{
+	struct au1000_private *const aup = (struct au1000_private *) dev->priv;
+	struct phy_device *phydev = NULL;
+
+#if defined(AU1XXX_PHY_STATIC_CONFIG)
+	BUG_ON(aup->mac_id < 0 || aup->mac_id > 1);
+
+	if(aup->mac_id == 0) { /* get PHY0 */
+# if defined(AU1XXX_PHY0_ADDR)
+		phydev = au_macs[AU1XXX_PHY0_BUSID]->mii_bus.phy_map[AU1XXX_PHY0_ADDR];
+# else
+		printk (KERN_INFO DRV_NAME ":%s: using PHY-less setup\n",
+			dev->name);
+		return 0;
+# endif /* defined(AU1XXX_PHY0_ADDR) */
+	} else if (aup->mac_id == 1) { /* get PHY1 */
+# if defined(AU1XXX_PHY1_ADDR)
+		phydev = au_macs[AU1XXX_PHY1_BUSID]->mii_bus.phy_map[AU1XXX_PHY1_ADDR];
+# else
+		printk (KERN_INFO DRV_NAME ":%s: using PHY-less setup\n",
+			dev->name);
+		return 0;
+# endif /* defined(AU1XXX_PHY1_ADDR) */
+	}
+
+#else /* defined(AU1XXX_PHY_STATIC_CONFIG) */
+	int phy_addr;
+
+	/* find the first (lowest address) PHY on the current MAC's MII bus */
+	for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++)
+		if (aup->mii_bus.phy_map[phy_addr]) {
+			phydev = aup->mii_bus.phy_map[phy_addr];
+# if !defined(AU1XXX_PHY_SEARCH_HIGHEST_ADDR)
+			break; /* break out with first one found */
+# endif
 		}
-	}
-found:
-
-#ifdef CONFIG_MIPS_BOSPORUS
-	/* This is a workaround for the Micrel/Kendin 5 port switch
-	   The second MAC doesn't see a PHY connected... so we need to
-	   trick it into thinking we have one.
-		
-	   If this kernel is run on another Au1500 development board
-	   the stub will be found as well as the actual PHY. However,
-	   the last found PHY will be used... usually at Addr 31 (Db1500).	
-	*/
-	if ( (!phy_found) )
-	{
-		u16 phy_id0, phy_id1;
-		int i;
 
-		phy_id0 = 0x1234;
-		phy_id1 = 0x5678;
-
-		/* search our mii table for the current mii */ 
-		for (i = 0; mii_chip_table[i].phy_id1; i++) {
-			if (phy_id0 == mii_chip_table[i].phy_id0 &&
-			    phy_id1 == mii_chip_table[i].phy_id1) {
-				struct mii_phy * mii_phy;
-
-				printk(KERN_INFO "%s: %s at phy address %d\n",
-				       dev->name, mii_chip_table[i].name, 
-				       phy_addr);
-				mii_phy = kmalloc(sizeof(struct mii_phy), 
-						GFP_KERNEL);
-				if (mii_phy) {
-					mii_phy->chip_info = mii_chip_table+i;
-					aup->phy_addr = phy_addr;
-					mii_phy->next = aup->mii;
-					aup->phy_ops = 
-						mii_chip_table[i].phy_ops;
-					aup->mii = mii_phy;
-					aup->phy_ops->phy_init(dev,phy_addr);
-				} else {
-					printk(KERN_ERR "%s: out of memory\n", 
-							dev->name);
-					return -1;
-				}
-				mii_phy->chip_info = mii_chip_table+i;
-				aup->phy_addr = phy_addr;
-				aup->phy_ops = mii_chip_table[i].phy_ops;
-				aup->phy_ops->phy_init(dev,phy_addr);
-				break;
-			}
+# if defined(AU1XXX_PHY1_SEARCH_ON_MAC0)
+	/* try harder to find a PHY */
+	if (!phydev && (aup->mac_id == 1)) {
+		/* no PHY found, maybe we have a dual PHY? */
+		printk (KERN_INFO DRV_NAME ": no PHY found on MAC1, "
+			"let's see if it's attached to MAC0...\n");
+
+		BUG_ON(!au_macs[0]);
+
+		/* find the first (lowest address) non-attached PHY on
+		 * the MAC0 MII bus */
+		for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
+			struct phy_device *const tmp_phydev =
+				au_macs[0]->mii_bus.phy_map[phy_addr];
+
+			if (!tmp_phydev)
+				continue; /* no PHY here... */
+
+			if (tmp_phydev->attached_dev)
+				continue; /* already claimed by MAC0 */
+
+			phydev = tmp_phydev;
+			break; /* found it */
 		}
 	}
-	if (aup->mac_id == 0) {
-		/* the Bosporus phy responds to addresses 0-5 but 
-		 * 5 is the correct one.
-		 */
-		aup->phy_addr = 5;
-	}
-#endif
+# endif /* defined(AU1XXX_PHY1_SEARCH_OTHER_BUS) */
 
-	if (aup->mii->chip_info == NULL) {
-		printk(KERN_ERR "%s: Au1x No known MII transceivers found!\n",
-				dev->name);
+#endif /* defined(AU1XXX_PHY_STATIC_CONFIG) */
+	if (!phydev) {
+		printk (KERN_ERR DRV_NAME ":%s: no PHY found\n", dev->name);
 		return -1;
 	}
 
-	printk(KERN_INFO "%s: Using %s as default\n", 
-			dev->name, aup->mii->chip_info->name);
+	/* now we are supposed to have a proper phydev, to attach to... */
+	BUG_ON(!phydev);
+	BUG_ON(phydev->attached_dev);
+
+	phydev = phy_connect(dev, phydev->dev.bus_id, &au1000_adjust_link, 0);
+
+	if (IS_ERR(phydev)) {
+		printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
+		return PTR_ERR(phydev);
+	}
+
+	/* mask with MAC supported features */
+	phydev->supported &= (SUPPORTED_10baseT_Half
+			      | SUPPORTED_10baseT_Full
+			      | SUPPORTED_100baseT_Half
+			      | SUPPORTED_100baseT_Full
+			      | SUPPORTED_Autoneg
+			      /* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */
+			      | SUPPORTED_MII
+			      | SUPPORTED_TP);
+
+	phydev->advertising = phydev->supported;
+
+	aup->old_link = 0;
+	aup->old_speed = 0;
+	aup->old_duplex = -1;
+	aup->phy_dev = phydev;
+
+	printk(KERN_INFO "%s: attached PHY driver [%s] "
+	       "(mii_bus:phy_addr=%s, irq=%d)\n",
+	       dev->name, phydev->drv->name, phydev->dev.bus_id, phydev->irq);
 
 	return 0;
 }
@@ -1097,35 +439,38 @@ static void hard_stop(struct net_device 
 	au_sync_delay(10);
 }
 
-
-static void reset_mac(struct net_device *dev)
+static void enable_mac(struct net_device *dev, int force_reset)
 {
-	int i;
-	u32 flags;
+	unsigned long flags;
 	struct au1000_private *aup = (struct au1000_private *) dev->priv;
 
-	if (au1000_debug > 4) 
-		printk(KERN_INFO "%s: reset mac, aup %x\n", 
-				dev->name, (unsigned)aup);
-
 	spin_lock_irqsave(&aup->lock, flags);
-	if (aup->timer.function == &au1000_timer) {/* check if timer initted */
-		del_timer(&aup->timer);
-	}
 
-	hard_stop(dev);
-	#ifdef CONFIG_BCM5222_DUAL_PHY
-	if (aup->mac_id != 0) {
-	#endif
-		/* If BCM5222, we can't leave MAC0 in reset because then 
-		 * we can't access the dual phy for ETH1 */
+	if(force_reset || (!aup->mac_enabled)) {
 		*aup->enable = MAC_EN_CLOCK_ENABLE;
 		au_sync_delay(2);
-		*aup->enable = 0;
+		*aup->enable = (MAC_EN_RESET0 | MAC_EN_RESET1 | MAC_EN_RESET2
+				| MAC_EN_CLOCK_ENABLE);
 		au_sync_delay(2);
-	#ifdef CONFIG_BCM5222_DUAL_PHY
+
+		aup->mac_enabled = 1;
 	}
-	#endif
+
+	spin_unlock_irqrestore(&aup->lock, flags);
+}
+
+static void reset_mac_unlocked(struct net_device *dev)
+{
+	struct au1000_private *const aup = (struct au1000_private *) dev->priv;
+	int i;
+
+	hard_stop(dev);
+
+	*aup->enable = MAC_EN_CLOCK_ENABLE;
+	au_sync_delay(2);
+	*aup->enable = 0;
+	au_sync_delay(2);
+
 	aup->tx_full = 0;
 	for (i = 0; i < NUM_RX_DMA; i++) {
 		/* reset control bits */
@@ -1135,9 +480,26 @@ static void reset_mac(struct net_device 
 		/* reset control bits */
 		aup->tx_dma_ring[i]->buff_stat &= ~0xf;
 	}
-	spin_unlock_irqrestore(&aup->lock, flags);
+
+	aup->mac_enabled = 0;
+
 }
 
+static void reset_mac(struct net_device *dev)
+{
+	struct au1000_private *const aup = (struct au1000_private *) dev->priv;
+	unsigned long flags;
+
+	if (au1000_debug > 4)
+		printk(KERN_INFO "%s: reset mac, aup %x\n",
+		       dev->name, (unsigned)aup);
+
+	spin_lock_irqsave(&aup->lock, flags);
+
+	reset_mac_unlocked (dev);
+
+	spin_unlock_irqrestore(&aup->lock, flags);
+}
 
 /* 
  * Setup the receive and transmit "rings".  These pointers are the addresses
@@ -1208,178 +570,31 @@ static int __init au1000_init_module(voi
 	return 0;
 }
 
-static int au1000_setup_aneg(struct net_device *dev, u32 advertise)
-{
-	struct au1000_private *aup = (struct au1000_private *)dev->priv;
-	u16 ctl, adv;
-
-	/* Setup standard advertise */
-	adv = mdio_read(dev, aup->phy_addr, MII_ADVERTISE);
-	adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4);
-	if (advertise & ADVERTISED_10baseT_Half)
-		adv |= ADVERTISE_10HALF;
-	if (advertise & ADVERTISED_10baseT_Full)
-		adv |= ADVERTISE_10FULL;
-	if (advertise & ADVERTISED_100baseT_Half)
-		adv |= ADVERTISE_100HALF;
-	if (advertise & ADVERTISED_100baseT_Full)
-		adv |= ADVERTISE_100FULL;
-	mdio_write(dev, aup->phy_addr, MII_ADVERTISE, adv);
-
-	/* Start/Restart aneg */
-	ctl = mdio_read(dev, aup->phy_addr, MII_BMCR);
-	ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
-	mdio_write(dev, aup->phy_addr, MII_BMCR, ctl);
-
-	return 0;
-}
+/*
+ * ethtool operations
+ */
 
-static int au1000_setup_forced(struct net_device *dev, int speed, int fd)
+static int au1000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 {
 	struct au1000_private *aup = (struct au1000_private *)dev->priv;
-	u16 ctl;
-
-	ctl = mdio_read(dev, aup->phy_addr, MII_BMCR);
-	ctl &= ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_ANENABLE);
-
-	/* First reset the PHY */
-	mdio_write(dev, aup->phy_addr, MII_BMCR, ctl | BMCR_RESET);
-
-	/* Select speed & duplex */
-	switch (speed) {
-		case SPEED_10:
-			break;
-		case SPEED_100:
-			ctl |= BMCR_SPEED100;
-			break;
-		case SPEED_1000:
-		default:
-			return -EINVAL;
-	}
-	if (fd == DUPLEX_FULL)
-		ctl |= BMCR_FULLDPLX;
-	mdio_write(dev, aup->phy_addr, MII_BMCR, ctl);
-
-	return 0;
-}
-
 
-static void
-au1000_start_link(struct net_device *dev, struct ethtool_cmd *cmd)
-{
-	struct au1000_private *aup = (struct au1000_private *)dev->priv;
-	u32 advertise;
-	int autoneg;
-	int forced_speed;
-	int forced_duplex;
-
-	/* Default advertise */
-	advertise = GENMII_DEFAULT_ADVERTISE;
-	autoneg = aup->want_autoneg;
-	forced_speed = SPEED_100;
-	forced_duplex = DUPLEX_FULL;
-
-	/* Setup link parameters */
-	if (cmd) {
-		if (cmd->autoneg == AUTONEG_ENABLE) {
-			advertise = cmd->advertising;
-			autoneg = 1;
-		} else {
-			autoneg = 0;
-
-			forced_speed = cmd->speed;
-			forced_duplex = cmd->duplex;
-		}
-	}
+	if (aup->phy_dev)
+		return phy_ethtool_gset(aup->phy_dev, cmd);
 
-	/* Configure PHY & start aneg */
-	aup->want_autoneg = autoneg;
-	if (autoneg)
-		au1000_setup_aneg(dev, advertise);
-	else
-		au1000_setup_forced(dev, forced_speed, forced_duplex);
-	mod_timer(&aup->timer, jiffies + HZ);
+	return -EINVAL;
 }
 
-static int au1000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
+static int au1000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 {
 	struct au1000_private *aup = (struct au1000_private *)dev->priv;
-	u16 link, speed;
-
-	cmd->supported = GENMII_DEFAULT_FEATURES;
-	cmd->advertising = GENMII_DEFAULT_ADVERTISE;
-	cmd->port = PORT_MII;
-	cmd->transceiver = XCVR_EXTERNAL;
-	cmd->phy_address = aup->phy_addr;
-	spin_lock_irq(&aup->lock);
-	cmd->autoneg = aup->want_autoneg;
-	aup->phy_ops->phy_status(dev, aup->phy_addr, &link, &speed);
-	if ((speed == IF_PORT_100BASETX) || (speed == IF_PORT_100BASEFX))
-		cmd->speed = SPEED_100;
-	else if (speed == IF_PORT_10BASET)
-		cmd->speed = SPEED_10;
-	if (link && (dev->if_port == IF_PORT_100BASEFX))
-		cmd->duplex = DUPLEX_FULL;
-	else
-		cmd->duplex = DUPLEX_HALF;
-	spin_unlock_irq(&aup->lock);
-	return 0;
-}
 
-static int au1000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
-{
-	 struct au1000_private *aup = (struct au1000_private *)dev->priv;
-	  unsigned long features = GENMII_DEFAULT_FEATURES;
-
-	 if (!capable(CAP_NET_ADMIN))
-		 return -EPERM;
-
-	 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
-		 return -EINVAL;
-	 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
-		 return -EINVAL;
-	 if (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL)
-		 return -EINVAL;
-	 if (cmd->autoneg == AUTONEG_DISABLE)
-		 switch (cmd->speed) {
-		 case SPEED_10:
-			 if (cmd->duplex == DUPLEX_HALF &&
-				 (features & SUPPORTED_10baseT_Half) == 0)
-				 return -EINVAL;
-			 if (cmd->duplex == DUPLEX_FULL &&
-				 (features & SUPPORTED_10baseT_Full) == 0)
-				 return -EINVAL;
-			 break;
-		 case SPEED_100:
-			 if (cmd->duplex == DUPLEX_HALF &&
-				 (features & SUPPORTED_100baseT_Half) == 0)
-				 return -EINVAL;
-			 if (cmd->duplex == DUPLEX_FULL &&
-				 (features & SUPPORTED_100baseT_Full) == 0)
-				 return -EINVAL;
-			 break;
-		 default:
-			 return -EINVAL;
-		 }
-	 else if ((features & SUPPORTED_Autoneg) == 0)
-		 return -EINVAL;
-
-	 spin_lock_irq(&aup->lock);
-	 au1000_start_link(dev, cmd);
-	 spin_unlock_irq(&aup->lock);
-	 return 0;
-}
+	if (!capable(CAP_NET_ADMIN))
+		return -EPERM;
 
-static int au1000_nway_reset(struct net_device *dev)
-{
-	struct au1000_private *aup = (struct au1000_private *)dev->priv;
+	if (aup->phy_dev)
+		return phy_ethtool_sset(aup->phy_dev, cmd);
 
-	if (!aup->want_autoneg)
-		return -EINVAL;
-	spin_lock_irq(&aup->lock);
-	au1000_start_link(dev, NULL);
-	spin_unlock_irq(&aup->lock);
-	return 0;
+	return -EINVAL;
 }
 
 static void
@@ -1394,17 +609,11 @@ au1000_get_drvinfo(struct net_device *de
 	info->regdump_len = 0;
 }
 
-static u32 au1000_get_link(struct net_device *dev)
-{
-	return netif_carrier_ok(dev);
-}
-
 static struct ethtool_ops au1000_ethtool_ops = {
 	.get_settings = au1000_get_settings,
 	.set_settings = au1000_set_settings,
 	.get_drvinfo = au1000_get_drvinfo,
-	.nway_reset = au1000_nway_reset,
-	.get_link = au1000_get_link
+	.get_link = ethtool_op_get_link,
 };
 
 static struct net_device * au1000_probe(int port_num)
@@ -1499,23 +708,31 @@ static struct net_device * au1000_probe(
 	memcpy(dev->dev_addr, au1000_mac_addr, sizeof(au1000_mac_addr));
 	dev->dev_addr[5] += port_num;
 
-	/* Bring the device out of reset, otherwise probing the MII will hang */
-	*aup->enable = MAC_EN_CLOCK_ENABLE;
-	au_sync_delay(2);
-	*aup->enable = MAC_EN_RESET0 | MAC_EN_RESET1 | MAC_EN_RESET2 |
-		       MAC_EN_CLOCK_ENABLE;
-	au_sync_delay(2);
-
-	aup->mii = kmalloc(sizeof(struct mii_phy), GFP_KERNEL);
-	if (!aup->mii) {
-		printk(KERN_ERR "%s: out of memory\n", dev->name);
-		goto err_out;
-	}
-	aup->mii->next = NULL;
-	aup->mii->chip_info = NULL;
-	aup->mii->status = 0;
-	aup->mii->mii_control_reg = 0;
-	aup->mii->mii_data_reg = 0;
+	*aup->enable = 0;
+	aup->mac_enabled = 0;
+
+	aup->mii_bus.priv = dev;
+	aup->mii_bus.read = mdiobus_read;
+	aup->mii_bus.write = mdiobus_write;
+	aup->mii_bus.reset = mdiobus_reset;
+	aup->mii_bus.name = "au1000_eth_mii";
+	aup->mii_bus.id = aup->mac_id;
+	aup->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
+	for(i = 0; i < PHY_MAX_ADDR; ++i)
+		aup->mii_bus.irq[i] = PHY_POLL;
+
+	/* if known, set corresponding PHY IRQs */
+#if defined(AU1XXX_PHY_STATIC_CONFIG)
+# if defined(AU1XXX_PHY0_IRQ)
+	if (AU1XXX_PHY0_BUSID == aup->mii_bus.id)
+		aup->mii_bus.irq[AU1XXX_PHY0_ADDR] = AU1XXX_PHY0_IRQ;
+# endif
+# if defined(AU1XXX_PHY1_IRQ)
+	if (AU1XXX_PHY1_BUSID == aup->mii_bus.id)
+		aup->mii_bus.irq[AU1XXX_PHY1_ADDR] = AU1XXX_PHY1_IRQ;
+# endif
+#endif
+	mdiobus_register(&aup->mii_bus);
 
 	if (mii_probe(dev) != 0) {
 		goto err_out;
@@ -1561,7 +778,6 @@ static struct net_device * au1000_probe(
 	dev->set_multicast_list = &set_rx_mode;
 	dev->do_ioctl = &au1000_ioctl;
 	SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops);
-	dev->set_config = &au1000_set_config;
 	dev->tx_timeout = au1000_tx_timeout;
 	dev->watchdog_timeo = ETH_TX_TIMEOUT;
 
@@ -1577,7 +793,7 @@ err_out:
 	/* here we should have a valid dev plus aup-> register addresses
 	 * so we can reset the mac properly.*/
 	reset_mac(dev);
-	kfree(aup->mii);
+
 	for (i = 0; i < NUM_RX_DMA; i++) {
 		if (aup->rx_db_inuse[i])
 			ReleaseDB(aup, aup->rx_db_inuse[i]);
@@ -1610,19 +826,14 @@ static int au1000_init(struct net_device
 	u32 flags;
 	int i;
 	u32 control;
-	u16 link, speed;
 
 	if (au1000_debug > 4) 
 		printk("%s: au1000_init\n", dev->name);
 
-	spin_lock_irqsave(&aup->lock, flags);
-
 	/* bring the device out of reset */
-	*aup->enable = MAC_EN_CLOCK_ENABLE;
-        au_sync_delay(2);
-	*aup->enable = MAC_EN_RESET0 | MAC_EN_RESET1 | 
-		MAC_EN_RESET2 | MAC_EN_CLOCK_ENABLE;
-	au_sync_delay(20);
+	enable_mac(dev, 1);
+
+	spin_lock_irqsave(&aup->lock, flags);
 
 	aup->mac->control = 0;
 	aup->tx_head = (aup->tx_dma_ring[0]->buff_stat & 0xC) >> 2;
@@ -1638,12 +849,16 @@ static int au1000_init(struct net_device
 	}
 	au_sync();
 
-	aup->phy_ops->phy_status(dev, aup->phy_addr, &link, &speed);
-	control = MAC_DISABLE_RX_OWN | MAC_RX_ENABLE | MAC_TX_ENABLE;
+	control = MAC_RX_ENABLE | MAC_TX_ENABLE;
 #ifndef CONFIG_CPU_LITTLE_ENDIAN
 	control |= MAC_BIG_ENDIAN;
 #endif
-	if (link && (dev->if_port == IF_PORT_100BASEFX)) {
+	if (aup->phy_dev) {
+		if (aup->phy_dev->link && (DUPLEX_FULL == aup->phy_dev->duplex))
+			control |= MAC_FULL_DUPLEX;
+		else
+			control |= MAC_DISABLE_RX_OWN;
+	} else { /* PHY-less op, assume full-duplex */
 		control |= MAC_FULL_DUPLEX;
 	}
 
@@ -1655,57 +870,84 @@ #endif
 	return 0;
 }
 
-static void au1000_timer(unsigned long data)
+static void
+au1000_adjust_link(struct net_device *dev)
 {
-	struct net_device *dev = (struct net_device *)data;
 	struct au1000_private *aup = (struct au1000_private *) dev->priv;
-	unsigned char if_port;
-	u16 link, speed;
+	struct phy_device *phydev = aup->phy_dev;
+	unsigned long flags;
 
-	if (!dev) {
-		/* fatal error, don't restart the timer */
-		printk(KERN_ERR "au1000_timer error: NULL dev\n");
-		return;
-	}
+	int status_change = 0;
 
-	if_port = dev->if_port;
-	if (aup->phy_ops->phy_status(dev, aup->phy_addr, &link, &speed) == 0) {
-		if (link) {
-			if (!netif_carrier_ok(dev)) {
-				netif_carrier_on(dev);
-				printk(KERN_INFO "%s: link up\n", dev->name);
-			}
-		}
-		else {
-			if (netif_carrier_ok(dev)) {
-				netif_carrier_off(dev);
-				dev->if_port = 0;
-				printk(KERN_INFO "%s: link down\n", dev->name);
-			}
+	BUG_ON(!aup->phy_dev);
+
+	spin_lock_irqsave(&aup->lock, flags);
+
+	if (phydev->link && (aup->old_speed != phydev->speed)) {
+		// speed changed
+
+		switch(phydev->speed) {
+		case SPEED_10:
+		case SPEED_100:
+			break;
+		default:
+			printk(KERN_WARNING
+			       "%s: Speed (%d) is not 10/100 ???\n",
+			       dev->name, phydev->speed);
+			break;
 		}
+
+		aup->old_speed = phydev->speed;
+
+		status_change = 1;
 	}
 
-	if (link && (dev->if_port != if_port) && 
-			(dev->if_port != IF_PORT_UNKNOWN)) {
+	if (phydev->link && (aup->old_duplex != phydev->duplex)) {
+		// duplex mode changed
+
+		/* switching duplex mode requires to disable rx and tx! */
 		hard_stop(dev);
-		if (dev->if_port == IF_PORT_100BASEFX) {
-			printk(KERN_INFO "%s: going to full duplex\n", 
-					dev->name);
-			aup->mac->control |= MAC_FULL_DUPLEX;
-			au_sync_delay(1);
-		}
-		else {
-			aup->mac->control &= ~MAC_FULL_DUPLEX;
-			au_sync_delay(1);
-		}
+
+		if (DUPLEX_FULL == phydev->duplex)
+			aup->mac->control = ((aup->mac->control
+					     | MAC_FULL_DUPLEX)
+					     & ~MAC_DISABLE_RX_OWN);
+		else
+			aup->mac->control = ((aup->mac->control
+					      & ~MAC_FULL_DUPLEX)
+					     | MAC_DISABLE_RX_OWN);
+		au_sync_delay(1);
+
 		enable_rx_tx(dev);
+		aup->old_duplex = phydev->duplex;
+
+		status_change = 1;
+	}
+
+	if(phydev->link != aup->old_link) {
+		// link state changed
+
+		if (phydev->link) // link went up
+			netif_schedule(dev);
+		else { // link went down
+			aup->old_speed = 0;
+			aup->old_duplex = -1;
+		}
+
+		aup->old_link = phydev->link;
+		status_change = 1;
 	}
 
-	aup->timer.expires = RUN_AT((1*HZ)); 
-	aup->timer.data = (unsigned long)dev;
-	aup->timer.function = &au1000_timer; /* timer handler */
-	add_timer(&aup->timer);
+	spin_unlock_irqrestore(&aup->lock, flags);
 
+	if (status_change) {
+		if (phydev->link)
+			printk(KERN_INFO "%s: link up (%d/%s)\n",
+			       dev->name, phydev->speed,
+			       DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
+		else
+			printk(KERN_INFO "%s: link down\n", dev->name);
+	}
 }
 
 static int au1000_open(struct net_device *dev)
@@ -1716,25 +958,26 @@ static int au1000_open(struct net_device
 	if (au1000_debug > 4)
 		printk("%s: open: dev=%p\n", dev->name, dev);
 
+	if ((retval = request_irq(dev->irq, &au1000_interrupt, 0,
+					dev->name, dev))) {
+		printk(KERN_ERR "%s: unable to get IRQ %d\n",
+				dev->name, dev->irq);
+		return retval;
+	}
+
 	if ((retval = au1000_init(dev))) {
 		printk(KERN_ERR "%s: error in au1000_init\n", dev->name);
 		free_irq(dev->irq, dev);
 		return retval;
 	}
-	netif_start_queue(dev);
 
-	if ((retval = request_irq(dev->irq, &au1000_interrupt, 0, 
-					dev->name, dev))) {
-		printk(KERN_ERR "%s: unable to get IRQ %d\n", 
-				dev->name, dev->irq);
-		return retval;
+	if (aup->phy_dev) {
+		/* cause the PHY state machine to schedule a link state check */
+		aup->phy_dev->state = PHY_CHANGELINK;
+		phy_start(aup->phy_dev);
 	}
 
-	init_timer(&aup->timer); /* used in ioctl() */
-	aup->timer.expires = RUN_AT((3*HZ)); 
-	aup->timer.data = (unsigned long)dev;
-	aup->timer.function = &au1000_timer; /* timer handler */
-	add_timer(&aup->timer);
+	netif_start_queue(dev);
 
 	if (au1000_debug > 4)
 		printk("%s: open: Initialization done.\n", dev->name);
@@ -1744,16 +987,19 @@ static int au1000_open(struct net_device
 
 static int au1000_close(struct net_device *dev)
 {
-	u32 flags;
-	struct au1000_private *aup = (struct au1000_private *) dev->priv;
+	unsigned long flags;
+	struct au1000_private *const aup = (struct au1000_private *) dev->priv;
 
 	if (au1000_debug > 4)
 		printk("%s: close: dev=%p\n", dev->name, dev);
 
-	reset_mac(dev);
+	if (aup->phy_dev)
+		phy_stop(aup->phy_dev);
 
 	spin_lock_irqsave(&aup->lock, flags);
-	
+
+	reset_mac_unlocked (dev);
+
 	/* stop the device */
 	netif_stop_queue(dev);
 
@@ -1775,7 +1021,6 @@ static void __exit au1000_cleanup_module
 		if (dev) {
 			aup = (struct au1000_private *) dev->priv;
 			unregister_netdev(dev);
-			kfree(aup->mii);
 			for (j = 0; j < NUM_RX_DMA; j++)
 				if (aup->rx_db_inuse[j])
 					ReleaseDB(aup, aup->rx_db_inuse[j]);
@@ -1798,7 +1043,7 @@ static void update_tx_stats(struct net_d
 	struct net_device_stats *ps = &aup->stats;
 
 	if (status & TX_FRAME_ABORTED) {
-		if (dev->if_port == IF_PORT_100BASEFX) {
+		if (!aup->phy_dev || (DUPLEX_FULL == aup->phy_dev->duplex)) {
 			if (status & (TX_JAB_TIMEOUT | TX_UNDERRUN)) {
 				/* any other tx errors are only valid
 				 * in half duplex mode */
@@ -2072,126 +1317,15 @@ static void set_rx_mode(struct net_devic
 	}
 }
 
-
 static int au1000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 {
 	struct au1000_private *aup = (struct au1000_private *)dev->priv;
-	u16 *data = (u16 *)&rq->ifr_ifru;
-
-	switch(cmd) { 
-		case SIOCDEVPRIVATE:	/* Get the address of the PHY in use. */
-		case SIOCGMIIPHY:
-		        if (!netif_running(dev)) return -EINVAL;
-			data[0] = aup->phy_addr;
-		case SIOCDEVPRIVATE+1:	/* Read the specified MII register. */
-		case SIOCGMIIREG:
-			data[3] =  mdio_read(dev, data[0], data[1]); 
-			return 0;
-		case SIOCDEVPRIVATE+2:	/* Write the specified MII register */
-		case SIOCSMIIREG: 
-			if (!capable(CAP_NET_ADMIN))
-				return -EPERM;
-			mdio_write(dev, data[0], data[1],data[2]);
-			return 0;
-		default:
-			return -EOPNOTSUPP;
-	}
-
-}
-
-
-static int au1000_set_config(struct net_device *dev, struct ifmap *map)
-{
-	struct au1000_private *aup = (struct au1000_private *) dev->priv;
-	u16 control;
 
-	if (au1000_debug > 4)  {
-		printk("%s: set_config called: dev->if_port %d map->port %x\n", 
-				dev->name, dev->if_port, map->port);
-	}
+	if (!netif_running(dev)) return -EINVAL;
 
-	switch(map->port){
-		case IF_PORT_UNKNOWN: /* use auto here */   
-			printk(KERN_INFO "%s: config phy for aneg\n", 
-					dev->name);
-			dev->if_port = map->port;
-			/* Link Down: the timer will bring it up */
-			netif_carrier_off(dev);
-	
-			/* read current control */
-			control = mdio_read(dev, aup->phy_addr, MII_CONTROL);
-			control &= ~(MII_CNTL_FDX | MII_CNTL_F100);
-
-			/* enable auto negotiation and reset the negotiation */
-			mdio_write(dev, aup->phy_addr, MII_CONTROL, 
-					control | MII_CNTL_AUTO | 
-					MII_CNTL_RST_AUTO);
+	if (!aup->phy_dev) return -EINVAL; // PHY not controllable
 
-			break;
-    
-		case IF_PORT_10BASET: /* 10BaseT */         
-			printk(KERN_INFO "%s: config phy for 10BaseT\n", 
-					dev->name);
-			dev->if_port = map->port;
-	
-			/* Link Down: the timer will bring it up */
-			netif_carrier_off(dev);
-
-			/* set Speed to 10Mbps, Half Duplex */
-			control = mdio_read(dev, aup->phy_addr, MII_CONTROL);
-			control &= ~(MII_CNTL_F100 | MII_CNTL_AUTO | 
-					MII_CNTL_FDX);
-	
-			/* disable auto negotiation and force 10M/HD mode*/
-			mdio_write(dev, aup->phy_addr, MII_CONTROL, control);
-			break;
-    
-		case IF_PORT_100BASET: /* 100BaseT */
-		case IF_PORT_100BASETX: /* 100BaseTx */ 
-			printk(KERN_INFO "%s: config phy for 100BaseTX\n", 
-					dev->name);
-			dev->if_port = map->port;
-	
-			/* Link Down: the timer will bring it up */
-			netif_carrier_off(dev);
-	
-			/* set Speed to 100Mbps, Half Duplex */
-			/* disable auto negotiation and enable 100MBit Mode */
-			control = mdio_read(dev, aup->phy_addr, MII_CONTROL);
-			control &= ~(MII_CNTL_AUTO | MII_CNTL_FDX);
-			control |= MII_CNTL_F100;
-			mdio_write(dev, aup->phy_addr, MII_CONTROL, control);
-			break;
-    
-		case IF_PORT_100BASEFX: /* 100BaseFx */
-			printk(KERN_INFO "%s: config phy for 100BaseFX\n", 
-					dev->name);
-			dev->if_port = map->port;
-	
-			/* Link Down: the timer will bring it up */
-			netif_carrier_off(dev);
-	
-			/* set Speed to 100Mbps, Full Duplex */
-			/* disable auto negotiation and enable 100MBit Mode */
-			control = mdio_read(dev, aup->phy_addr, MII_CONTROL);
-			control &= ~MII_CNTL_AUTO;
-			control |=  MII_CNTL_F100 | MII_CNTL_FDX;
-			mdio_write(dev, aup->phy_addr, MII_CONTROL, control);
-			break;
-		case IF_PORT_10BASE2: /* 10Base2 */
-		case IF_PORT_AUI: /* AUI */
-		/* These Modes are not supported (are they?)*/
-			printk(KERN_ERR "%s: 10Base2/AUI not supported", 
-					dev->name);
-			return -EOPNOTSUPP;
-			break;
-    
-		default:
-			printk(KERN_ERR "%s: Invalid media selected", 
-					dev->name);
-			return -EINVAL;
-	}
-	return 0;
+	return phy_mii_ioctl(aup->phy_dev, if_mii(rq), cmd);
 }
 
 static struct net_device_stats *au1000_get_stats(struct net_device *dev)
diff --git a/drivers/net/au1000_eth.h b/drivers/net/au1000_eth.h
index 7f9326e..41c2f84 100644
--- a/drivers/net/au1000_eth.h
+++ b/drivers/net/au1000_eth.h
@@ -40,120 +40,6 @@ #define MAC_MIN_PKT_SIZE 64
 
 #define MULTICAST_FILTER_LIMIT 64
 
-/* FIXME 
- * The PHY defines should be in a separate file.
- */
-
-/* MII register offsets */
-#define	MII_CONTROL 0x0000
-#define MII_STATUS  0x0001
-#define MII_PHY_ID0 0x0002
-#define	MII_PHY_ID1 0x0003
-#define MII_ANADV   0x0004
-#define MII_ANLPAR  0x0005
-#define MII_AEXP    0x0006
-#define MII_ANEXT   0x0007
-#define MII_LSI_PHY_CONFIG 0x0011
-/* Status register */
-#define MII_LSI_PHY_STAT   0x0012
-#define MII_AMD_PHY_STAT   MII_LSI_PHY_STAT
-#define MII_INTEL_PHY_STAT 0x0011
-
-#define MII_AUX_CNTRL  0x0018
-/* mii registers specific to AMD 79C901 */
-#define	MII_STATUS_SUMMARY = 0x0018
-
-/* MII Control register bit definitions. */
-#define	MII_CNTL_FDX      0x0100
-#define MII_CNTL_RST_AUTO 0x0200
-#define	MII_CNTL_ISOLATE  0x0400
-#define MII_CNTL_PWRDWN   0x0800
-#define	MII_CNTL_AUTO     0x1000
-#define MII_CNTL_F100     0x2000
-#define	MII_CNTL_LPBK     0x4000
-#define MII_CNTL_RESET    0x8000
-
-/* MII Status register bit  */
-#define	MII_STAT_EXT        0x0001 
-#define MII_STAT_JAB        0x0002
-#define	MII_STAT_LINK       0x0004
-#define MII_STAT_CAN_AUTO   0x0008
-#define	MII_STAT_FAULT      0x0010 
-#define MII_STAT_AUTO_DONE  0x0020
-#define	MII_STAT_CAN_T      0x0800
-#define MII_STAT_CAN_T_FDX  0x1000
-#define	MII_STAT_CAN_TX     0x2000 
-#define MII_STAT_CAN_TX_FDX 0x4000
-#define	MII_STAT_CAN_T4     0x8000
-
-
-#define		MII_ID1_OUI_LO		0xFC00	/* low bits of OUI mask */
-#define		MII_ID1_MODEL		0x03F0	/* model number */
-#define		MII_ID1_REV		0x000F	/* model number */
-
-/* MII NWAY Register Bits ...
-   valid for the ANAR (Auto-Negotiation Advertisement) and
-   ANLPAR (Auto-Negotiation Link Partner) registers */
-#define	MII_NWAY_NODE_SEL 0x001f
-#define MII_NWAY_CSMA_CD  0x0001
-#define	MII_NWAY_T	  0x0020
-#define MII_NWAY_T_FDX    0x0040
-#define	MII_NWAY_TX       0x0080
-#define MII_NWAY_TX_FDX   0x0100
-#define	MII_NWAY_T4       0x0200 
-#define MII_NWAY_PAUSE    0x0400 
-#define	MII_NWAY_RF       0x2000 /* Remote Fault */
-#define MII_NWAY_ACK      0x4000 /* Remote Acknowledge */
-#define	MII_NWAY_NP       0x8000 /* Next Page (Enable) */
-
-/* mii stsout register bits */
-#define	MII_STSOUT_LINK_FAIL 0x4000
-#define	MII_STSOUT_SPD       0x0080
-#define MII_STSOUT_DPLX      0x0040
-
-/* mii stsics register bits */
-#define	MII_STSICS_SPD       0x8000
-#define MII_STSICS_DPLX      0x4000
-#define	MII_STSICS_LINKSTS   0x0001
-
-/* mii stssum register bits */
-#define	MII_STSSUM_LINK  0x0008
-#define MII_STSSUM_DPLX  0x0004
-#define	MII_STSSUM_AUTO  0x0002
-#define MII_STSSUM_SPD   0x0001
-
-/* lsi phy status register */
-#define MII_LSI_PHY_STAT_FDX	0x0040
-#define MII_LSI_PHY_STAT_SPD	0x0080
-
-/* amd phy status register */
-#define MII_AMD_PHY_STAT_FDX	0x0800
-#define MII_AMD_PHY_STAT_SPD	0x0400
-
-/* intel phy status register */
-#define MII_INTEL_PHY_STAT_FDX	0x0200
-#define MII_INTEL_PHY_STAT_SPD	0x4000
-
-/* Auxilliary Control/Status Register */
-#define MII_AUX_FDX      0x0001
-#define MII_AUX_100      0x0002
-#define MII_AUX_F100     0x0004
-#define MII_AUX_ANEG     0x0008
-
-typedef struct mii_phy {
-	struct mii_phy * next;
-	struct mii_chip_info * chip_info;
-	u16 status;
-	u32 *mii_control_reg;
-	u32 *mii_data_reg;
-} mii_phy_t;
-
-struct phy_ops {
-	int (*phy_init) (struct net_device *, int);
-	int (*phy_reset) (struct net_device *, int);
-	int (*phy_status) (struct net_device *, int, u16 *, u16 *);
-};
-
 /* 
  * Data Buffer Descriptor. Data buffers must be aligned on 32 byte 
  * boundary for both, receive and transmit.
@@ -200,7 +86,6 @@ typedef struct mac_reg {
 
 
 struct au1000_private {
-	
 	db_dest_t *pDBfree;
 	db_dest_t db[NUM_RX_BUFFS+NUM_TX_BUFFS];
 	volatile rx_dma_t *rx_dma_ring[NUM_RX_DMA];
@@ -213,8 +98,15 @@ struct au1000_private {
 	u32 tx_full;
 
 	int mac_id;
-	mii_phy_t *mii;
-	struct phy_ops *phy_ops;
+
+	int mac_enabled;       /* whether MAC is currently enabled and running (req. for mdio) */
+
+	int old_link;          /* used by au1000_adjust_link */
+	int old_speed;
+	int old_duplex;
+
+	struct phy_device *phy_dev;
+	struct mii_bus mii_bus;
 	
 	/* These variables are just for quick access to certain regs addresses. */
 	volatile mac_reg_t *mac;  /* mac registers                      */   
@@ -223,14 +115,6 @@ struct au1000_private {
 	u32 vaddr;                /* virtual address of rx/tx buffers   */
 	dma_addr_t dma_addr;      /* dma address of rx/tx buffers       */
 
-	u8 *hash_table;
-	u32 hash_mode;
-	u32 intr_work_done; /* number of Rx and Tx pkts processed in the isr */
-	int phy_addr;          /* phy address */
-	u32 options;           /* User-settable misc. driver options. */
-	u32 drv_flags;
-	int want_autoneg;
 	struct net_device_stats stats;
-	struct timer_list timer;
 	spinlock_t lock;       /* Serialise access to device */
 };
-- 
1.3.2


From ths@networkno.de Thu Jun  1 11:24:55 2006
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To:	zhuzhenhua <zzh.hust@gmail.com>
Cc:	linux-mips <linux-mips@linux-mips.org>
Subject: Re: BFD: Warning: Writing section `.text' to huge (ie negative) file offset 0xa1ffff10
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zhuzhenhua wrote:
> i have write a code to link at 0xa2000000(uncached address)
> but when link i get the error as
> "BFD: Warning: Writing section `.text' to huge (ie negative) file
> offset 0xa1ffff10.
> BFD: Warning: Writing section `.data' to huge (ie negative) file
> offset 0xa200b050.
> BFD: Warning: Writing section `.reginfo' to huge (ie negative) file
> offset 0xa200c980.
> mipsel-linux-objcopy: /root/project/brec_flash/release/brec_flash.bin:
> File truncated
> make: *** [brec_flash] Error 1"
> 
> my link.xn as follow:
> 
> OUTPUT_ARCH(mips)
> ENTRY(brec_flash_entry)
> SECTIONS
> {
> .text 0xa2000000 :

Use

 . = 0xa2000000;
 .text :

instead. "info ld" explains the subtle difference.


Thiemo

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From:	zhuzhenhua <zzh.hust@gmail.com>
To:	"Thiemo Seufer" <ths@networkno.de>
Subject: Re: BFD: Warning: Writing section `.text' to huge (ie negative) file offset 0xa1ffff10
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On 6/1/06, Thiemo Seufer <ths@networkno.de> wrote:
> zhuzhenhua wrote:
> > i have write a code to link at 0xa2000000(uncached address)
> > but when link i get the error as
> > "BFD: Warning: Writing section `.text' to huge (ie negative) file
> > offset 0xa1ffff10.
> > BFD: Warning: Writing section `.data' to huge (ie negative) file
> > offset 0xa200b050.
> > BFD: Warning: Writing section `.reginfo' to huge (ie negative) file
> > offset 0xa200c980.
> > mipsel-linux-objcopy: /root/project/brec_flash/release/brec_flash.bin:
> > File truncated
> > make: *** [brec_flash] Error 1"
> >
> > my link.xn as follow:
> >
> > OUTPUT_ARCH(mips)
> > ENTRY(brec_flash_entry)
> > SECTIONS
> > {
> > .text 0xa2000000 :
>
> Use
>
>  . = 0xa2000000;
>  .text :
>
> instead. "info ld" explains the subtle difference.
>
>
> Thiemo
>

do you mean use
 . = 0xa2000000;
 .text :
to replace
 .text 0xa2000000 :
?
i modify as that, and it still get the same message

thanks

zhuzhenhua

From nigel@mips.com Thu Jun  1 14:50:18 2006
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 offset 0xa1ffff10
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zhuzhenhua wrote:
> On 6/1/06, Thiemo Seufer <ths@networkno.de> wrote:
>> zhuzhenhua wrote:
>> > i have write a code to link at 0xa2000000(uncached address)
>> > but when link i get the error as
>> > "BFD: Warning: Writing section `.text' to huge (ie negative) file
>> > offset 0xa1ffff10.
>> > BFD: Warning: Writing section `.data' to huge (ie negative) file
>> > offset 0xa200b050.
>> > BFD: Warning: Writing section `.reginfo' to huge (ie negative) file
>> > offset 0xa200c980.
>> > mipsel-linux-objcopy: /root/project/brec_flash/release/brec_flash.bin:
>> > File truncated
>> > make: *** [brec_flash] Error 1"
>> >
>> > my link.xn as follow:
>> >
>> > OUTPUT_ARCH(mips)
>> > ENTRY(brec_flash_entry)
>> > SECTIONS
>> > {
>> > .text 0xa2000000 :
>>
>> Use
>>
>>  . = 0xa2000000;
>>  .text :
>>
>> instead. "info ld" explains the subtle difference.
>>
>>
>> Thiemo
>>
>
> do you mean use
> . = 0xa2000000;
> .text :
> to replace
> .text 0xa2000000 :
> ?
> i modify as that, and it still get the same message
>

I think the problem is not with the linker, but in your use of objcopy
to convert your ELF file to a raw binary file.

1) What arguments are you giving to mipsel-linux-objcopy?

2) What is the output from mipsel-linux-objdump -h run on your
intermediate ELF object file?


Nigel

-- 
Nigel Stephens            e. nigel@mips.com
MIPS Technologies         p. +44 1223 203110
Building 7200             f. +44 1223 203181
Cambridge Research Park   m. +44 7976 686470
Beach Road, Waterbeach    w. http://www.mips.com
Cambridge CB5 9TL, UK


From anemo@mba.ocn.ne.jp Thu Jun  1 18:53:15 2006
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To:	geert@linux-m68k.org
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Subject: Re: [PATCH] fix some compiler warnings (field width, unused
 variable)
From:	Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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On Wed, 31 May 2006 18:47:54 +0200 (CEST), Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> >  			printk("initrd extends beyond end of memory "
> >  			       "(0x%0*Lx > 0x%0*Lx)\ndisabling initrd\n",
> 
> `%L' is obsolete for long long, use `%ll' instead.
> 
> > -			       sizeof(long) * 2,
> > +			       (int)(sizeof(long) * 2),
> >  			       (unsigned long long)CPHYSADDR(initrd_end),
> 
> As CPHYSADDR() returns a ptrdiff_t, what about using `%t' instead?
> Ah, that one doesn't print hex (hmm, C99 doesn't seem to tell).
> 
> You can cast to `void *' and use `%p' to get hex, and the field width will
> automagically be `2*sizeof(void *)', according to lib/vsprintf.c.

Thanks.  Though Ralf already committed it with slight changes, this
patch will make kernel just a bit smaller.


[MIPS] simplify printk format string (use %p instead of %0*Lx)

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>

diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 397a70e..4ab4bd5 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -420,18 +420,15 @@ static inline void bootmem_init(void)
 	if (initrd_start) {
 		unsigned long initrd_size = ((unsigned char *)initrd_end) -
 			((unsigned char *)initrd_start);
-		const int width = sizeof(long) * 2;
 
 		printk("Initial ramdisk at: 0x%p (%lu bytes)\n",
 		       (void *)initrd_start, initrd_size);
 
 		if (CPHYSADDR(initrd_end) > PFN_PHYS(max_low_pfn)) {
 			printk("initrd extends beyond end of memory "
-			       "(0x%0*Lx > 0x%0*Lx)\ndisabling initrd\n",
-			       width,
-			       (unsigned long long) CPHYSADDR(initrd_end),
-			       width,
-			       (unsigned long long) PFN_PHYS(max_low_pfn));
+			       "(0x%p > 0x%p)\ndisabling initrd\n",
+			       (void *)CPHYSADDR(initrd_end),
+			       (void *)PFN_PHYS(max_low_pfn));
 			initrd_start = initrd_end = 0;
 			initrd_reserve_bootmem = 0;
 		}

From dpervushin@ru.mvista.com Thu Jun  1 21:07:09 2006
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Subject: [RFC] [PATCH] sys_shmat for 64-bits in 32-bit compat mode
From:	dmitry pervushin <dpervushin@ru.mvista.com>
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Hello all,

I would like you to comment the following patch. At the some moment, I
was faced to problem with syscall sys_shmat in 32-bit mode on 64-bit
platforms. I have fixed the function in the same manner as native
sys_shmat had been: sys_shmat expects pointer to memory as the return
value rather than put_user'ed to the memory pointed by 3rd parameter.

Signed-off-by: dmitry pervushin <dpervushin@ru.mvista.com>
 arch/mips/kernel/linux32.c |    4 +++-
 1 files changed, 3 insertions(+), 1 deletion(-)

Index: linux-mips/arch/mips/kernel/linux32.c
===================================================================
--- linux-mips.orig/arch/mips/kernel/linux32.c
+++ linux-mips/arch/mips/kernel/linux32.c
@@ -36,6 +36,7 @@
 #include <linux/security.h>
 #include <linux/compat.h>
 #include <linux/vfs.h>
+#include <linux/ptrace.h>
 
 #include <net/sock.h>
 #include <net/scm.h>
@@ -978,7 +979,8 @@ asmlinkage long sys32_shmat(int shmid, c
 	if (err)
 		return err;
 
-	return put_user(raddr, addr);
+	force_successful_syscall_return();
+	return raddr;
 }
 
 struct sysctl_args32



From thomas.koeller@baslerweb.com Thu Jun  1 22:46:46 2006
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From:	Thomas Koeller <thomas.koeller@baslerweb.com>
To:	linux-mips@linux-mips.org
Subject: Location of PCI setup code
Date:	Thu, 1 Jun 2006 22:46:17 +0200
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Hi,

the PCI setup code for a platform is conventionally located in arch/mips/pci. 
I fail to see the benefits of separating this particular part of a platform's 
setup from the rest. The PCI setup code will in general contain references to 
platform-specific information, such as the overall address space layout, of 
which the PCI memory and I/O pages are a part. If the PCI setup code were in 
the platform subdirectory, sharing this information by means of a 
platform-local header file would be easy. But with the PCI code in 
arch/mips/pci, this becomes more difficult. The platform header could be 
located somewhere outside the platform's directory, maybe under 
'include' (where?), or referenced via an ugly relative path like 
'../../vendor/platform/platform.h'. All this seems rather clumsy to me. No 
other part of a platform's initialization is separated from the rest in a 
similar way, so what is so special about PCI setup that it cannot be in the 
platform directory, thereby avoiding all these annoyances? 

tk

-- 
Thomas Koeller, Software Development

Basler Vision Technologies
An der Strusbek 60-62
22926 Ahrensburg
Germany

Tel +49 (4102) 463-390
Fax +49 (4102) 463-46390

mailto:thomas.koeller@baslerweb.com
http://www.baslerweb.com

From Rajesh_Palani@pmc-sierra.com Fri Jun  2 01:23:07 2006
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From:	Raj Palani <Rajesh_Palani@pmc-sierra.com>
To:	Roman Mashak <mrv@corecom.co.kr>
Cc:	linux-mips@linux-mips.org
Subject: RE: compiling BCM5700 driver
Date:	Thu, 1 Jun 2006 16:22:39 -0700 
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Hi Roman,

   The titan_ge.c and titan_ge.h file are still in the kernel, for the Titan chip (Yosemite).

   Regarding the crash you mention below, kindly use mem=256M in the boot line.  The default value of the RAM size is setup to be 512MB and the Sequoia board that you are having may contain only 256MB of RAM.

-Raj

> -----Original Message-----
> From: Roman Mashak [mailto:mrv@corecom.co.kr] 
> Sent: Wednesday, May 31, 2006 6:42 PM
> To: Raj Palani
> Cc: linux-mips@linux-mips.org
> Subject: Re: compiling BCM5700 driver
> 
> Hello, Raj!
> You wrote to "Roman Mashak" <mrv@corecom.co.kr>; "Ralf Baechle" 
> <ralf@linux-mips.org> on Wed, 31 May 2006 09:06:44 -0700:
> 
>  RP> Yes.  We are currently maintaining the Titan GE driver 
> on "Sequoia"
>  RP> only in 2.6.x.  The GE driver in Sequoia has been 
> renamed to  RP> msp85xx_ge.c.  We are in the process of 
> generating a patchset to add  RP> support for Sequoia 
> (MSP8510/MSP8520) in the Linux/MIPS 2.6 tree.
> 
>  RP> Our most recent Linux 2.6 tree for Sequoia is available 
> on our ftp site  RP> (ftp.pmc-sierra.com) under  RP> 
> /pub/linux/2.6.12/linux-2.6.12-rc3_L002.tar.gz.
> 
> There are msp85x0_ge.[ch] in this tarball. And seems old code 
> from titan_ge.[ch] is still in used. Nevertheless kernel gets panic:
> 
> Linux version 2.6.12-rc3 (root@ecb-test32.corecom.local) (gcc version
> 3.3-mips64linux-031001) #1 Thu Jun 1 10:33:22 KST 2006 PMON 
> reports memory size 256MB cpu_clock set to 900000000 CPU 
> revision is: 000034c1 FPU revision is: 00003420 PMC-Sierra 
> Sequoia Board Setup 32-bit support Determined physical RAM map:
>  memory: 20000000 @ 00000000 (usable)
> Built 1 zonelists
> Kernel command line: tftp://192.168.11.43/vmlinux 
> root=/dev/nfs nfsroot=192.168.11.43:/export/linux/mips-fs-be
> ip=192.168.11.42:192.168.11.1::255.255.255.0::eth0
> Unknown boot option `tftp://192.168.11.43/vmlinux': ignoring 
> Primary instruction cache 16kB, physically tagged, 4-way, 
> linesize 32 bytes.
> Primary data cache 16kB, 4-way, linesize 32 bytes.
> Secondary cache size 256K, linesize 32 bytes.
> Synthesized TLB refill handler (27 instructions).
> Synthesized TLB load handler fastpath (39 instructions).
> Synthesized TLB store handler fastpath (39 instructions).
> Synthesized TLB modify handler fastpath (38 instructions).
> PID hash table entries: 4096 (order: 12, 65536 bytes) Using 
> 450.000 MHz high precision timer.
> Dentry cache hash table entries: 131072 (order: 7, 524288 
> bytes) Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
> Memory: 515712k/524288k available (1623k kernel code, 8440k 
> reserved, 372k data, 356k init, 0k highmem) CompactFlash ATA 
> Support for PMC-Sierra Sequoia  <6>Internal UART Support for 
> PMC-Sierra Sequoia  <7>Calibrating delay loop... 897.02 
> BogoMIPS (lpj=448512) Mount-cache hash table entries: 512 
> Checking for 'wait' instruction...  available.
> NET: Registered protocol family 16
> PCI: Failed to allocate mem resource #2:20000000@e0000000 for 
> 0000:00:01.0
> PCI: Failed to allocate mem resource #2:20000000@e8000000 for 
> 0000:01:01.0 Generic RTC Driver v1.07
> Serial: 8250/16550 driver $Revision: 1.1.1.1 $ 4 ports, IRQ 
> sharing disabled ttyS0 at MMIO 0x0 (irq = 0) is a 16550A io 
> scheduler noop registered io scheduler anticipatory 
> registered io scheduler deadline registered io scheduler cfq 
> registered
> loop: loaded (max 8 devices)
> PMC-Sierra MSP85x0 10/100/1000 Ethernet Driver Device Id : 
> 206014,  Version : 0
> : port 0 with MAC address 00:e0:04:00:02:4e Rx NAPI 
> supported, Tx Coalescing ON
> : port 1 with MAC address 00:e0:04:00:02:4f Rx NAPI 
> supported, Tx Coalescing ON
> NET: Registered protocol family 2
> IP: routing cache hash table of 4096 buckets, 32Kbytes TCP 
> established hash table entries: 131072 (order: 8, 1048576 
> bytes) TCP bind hash table entries: 65536 (order: 6, 262144 bytes)
> TCP: Hash tables configured (established 131072 bind 65536)
> NET: Registered protocol family 1
> NET: Registered protocol family 17
> Data bus error, epc == 802214d8, ra == 802214ac Oops in 
> arch/mips/kernel/traps.c::do_be, line 338[#1]:
> Cpu 0
> $ 0   : 00000000 90008000 9fc00840 9fc00840
> $ 4   : 00000001 00000000 00000000 8036b97c
> $ 8   : 00000000 801d8150 814df0f0 ffffffff
> $12   : 00200200 00100100 0000ffff 8036b974
> $16   : 9fc00000 816b5920 00000840 81690220
> $20   : 0000003c 00000008 ffffffc0 00200000
> $24   : 8036b97c 00000001
> $28   : 80380000 80381df8 81690000 802214ac
> Hi    : 0006d7ff
> Lo    : f8164000
> epc   : 802214d8 alloc_skb+0x98/0xec     Not tainted
> ra    : 802214ac alloc_skb+0x6c/0xec
> Status: 90008002    KERNEL EXL
> Cause : 0000801c
> PrId  : 000034c1
> Modules linked in:
> Process swapper (pid: 1, threadinfo=80380000, task=8037ab78) 
> Stack : 8010d6b0 8026e7e4 814e4e80 80369420 8169030c c01043b0 816b59c0
> 8021a044
>         0000001c 00180c01 00000000 00000000 c0000000 00000000 
> 81690220 81690000
>         8034bc14 00000000 00000000 00000000 00000000 8021a608 
> 803eb9c0 00000000
>         00000001 80381e68 18230458 80232598 81690000 00000000 
> 00000000 81690220
>         8021a684 00100000 8021a16c 00000000 8021aaf8 8023743c 
> 00000000 fb004000
>         ...
> Call Trace:
>  [<8010d6b0>] dma_map_single+0x5c/0x7c
>  [<8026e7e4>] fib_magic+0x114/0x144
>  [<8021a044>] msp85x0_ge_rx_task+0x74/0x174  [<8021a608>] 
> xdma_config+0x1cc/0x22c  [<80232598>] 
> rtnetlink_fill_ifinfo+0x474/0x57c  [<8021a684>] 
> msp85x0_ge_port_start+0x1c/0x74  [<8021a16c>] 
> msp85x0_port_init+0x28/0x80  [<8021aaf8>] 
> msp85x0_eth_setup_tx_ring+0x80/0xc8
>  [<8023743c>] netlink_broadcast+0x29c/0x478  [<8021adf0>] 
> msp85x0_ge_eth_open+0x114/0x250  [<8021af18>] 
> msp85x0_ge_eth_open+0x23c/0x250  [<80219f14>] 
> msp85x0_ge_open+0x30/0xec  [<80232b84>] 
> rtmsg_ifinfo+0x80/0xf8  [<80232b58>] rtmsg_ifinfo+0x54/0xf8  
> [<80227d2c>] dev_open+0x64/0xd8  [<80227d98>] 
> dev_open+0xd0/0xd8  [<8022d108>] dev_mc_upload+0x18/0x24  
> [<80229f28>] dev_change_flags+0x70/0x158  [<8019a84c>] 
> proc_create+0x9c/0x100  [<80311fb8>] ic_open_devs+0x20c/0x3a4 
>  [<8012a874>] msleep+0x48/0x5c  [<80313524>] 
> ip_auto_config+0x64/0x30c  [<8030a7f8>] seqgen_init+0x10/0x20 
>  [<8030a7f8>] seqgen_init+0x10/0x20  [<802f4828>] 
> do_initcalls+0x50/0x100  [<802f4828>] do_initcalls+0x50/0x100 
>  [<802f4908>] do_basic_setup+0x30/0x3c  [<801004ac>] 
> init+0x3c/0x120  [<801035d0>] kernel_thread_helper+0x10/0x18  
> [<801035c0>] kernel_thread_helper+0x0/0x18
> 
> 
> Code: ae30008c  ac640000  8e220094 <ac400004> 8e230094  
> a4600008  8e220094 a440000a  8e230094 Kernel panic - not 
> syncing: Attempted to kill init!
> 
> 
> With best regards, Roman Mashak.  E-mail: mrv@corecom.co.kr 
> 
> 

From ralf@linux-mips.org Fri Jun  2 01:44:37 2006
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From:	Ralf Baechle <ralf@linux-mips.org>
To:	Thomas Koeller <thomas.koeller@baslerweb.com>
Cc:	linux-mips@linux-mips.org
Subject: Re: Location of PCI setup code
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On Thu, Jun 01, 2006 at 10:46:17PM +0200, Thomas Koeller wrote:

> the PCI setup code for a platform is conventionally located in arch/mips/pci. 
> I fail to see the benefits of separating this particular part of a platform's 
> setup from the rest. The PCI setup code will in general contain references to 
> platform-specific information, such as the overall address space layout, of 
> which the PCI memory and I/O pages are a part. If the PCI setup code were in 
> the platform subdirectory, sharing this information by means of a 
> platform-local header file would be easy. But with the PCI code in 
> arch/mips/pci, this becomes more difficult. The platform header could be 
> located somewhere outside the platform's directory, maybe under 
> 'include' (where?), or referenced via an ugly relative path like 
> '../../vendor/platform/platform.h'. All this seems rather clumsy to me. No 
> other part of a platform's initialization is separated from the rest in a 
> similar way, so what is so special about PCI setup that it cannot be in the 
> platform directory, thereby avoiding all these annoyances? 

The per-platform PCI code used to live in the per-platform directories.
It turned into a giant mess, very little code was being shared, it was
hard to uniformly perform any kind of modification or fixes - and more
of that kind of changes will be needed before the PCI codes really
shines.

  Ralf

From zzh.hust@gmail.com Fri Jun  2 02:49:44 2006
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From:	zhuzhenhua <zzh.hust@gmail.com>
To:	"Nigel Stephens" <nigel@mips.com>
Subject: Re: BFD: Warning: Writing section `.text' to huge (ie negative) file offset 0xa1ffff10
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On 6/1/06, Nigel Stephens <nigel@mips.com> wrote:
>
>
> zhuzhenhua wrote:
> > On 6/1/06, Thiemo Seufer <ths@networkno.de> wrote:
> >> zhuzhenhua wrote:
> >> > i have write a code to link at 0xa2000000(uncached address)
> >> > but when link i get the error as
> >> > "BFD: Warning: Writing section `.text' to huge (ie negative) file
> >> > offset 0xa1ffff10.
> >> > BFD: Warning: Writing section `.data' to huge (ie negative) file
> >> > offset 0xa200b050.
> >> > BFD: Warning: Writing section `.reginfo' to huge (ie negative) file
> >> > offset 0xa200c980.
> >> > mipsel-linux-objcopy: /root/project/brec_flash/release/brec_flash.bin:
> >> > File truncated
> >> > make: *** [brec_flash] Error 1"
> >> >
> >> > my link.xn as follow:
> >> >
> >> > OUTPUT_ARCH(mips)
> >> > ENTRY(brec_flash_entry)
> >> > SECTIONS
> >> > {
> >> > .text 0xa2000000 :
> >>
> >> Use
> >>
> >>  . = 0xa2000000;
> >>  .text :
> >>
> >> instead. "info ld" explains the subtle difference.
> >>
> >>
> >> Thiemo
> >>
> >
> > do you mean use
> > . = 0xa2000000;
> > .text :
> > to replace
> > .text 0xa2000000 :
> > ?
> > i modify as that, and it still get the same message
> >
>
> I think the problem is not with the linker, but in your use of objcopy
> to convert your ELF file to a raw binary file.
>
> 1) What arguments are you giving to mipsel-linux-objcopy?
i use objcopy as follow(the brec_flash is elf file)
	mipsel-linux-objcopy -O binary brec_flash brec_flash.bin
>
> 2) What is the output from mipsel-linux-objdump -h run on your
> intermediate ELF object file?
i use mipsel-linux-objdump -h brec_flash and get messages as follow


brec_flash:     file format elf32-tradlittlemips

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .text         0000b140  72000000  72000000  00010000  2**4
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  1 .data         00001080  7200b140  7200b140  0001b140  2**4
                  CONTENTS, ALLOC, LOAD, DATA
  2 .sbss         00000010  7200c1c0  7200c1c0  0001c1c0  2**2
                  ALLOC
  3 .bss          000008a0  7200c1d0  7200c1d0  0001c1c0  2**4
                  ALLOC
  4 .reginfo      00000018  7200ca70  7200ca70  0001ca70  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA, LINK_ONCE_SAME_SIZE
  5 .pdr          000011a0  00000000  00000000  0001ca88  2**2
                  CONTENTS, READONLY
  6 .mdebug.abi32 00000000  00000000  00000000  0001dc28  2**0
                  CONTENTS, READONLY
  7 .comment      000000ea  00000000  00000000  0001dc28  2**0
                  CONTENTS, READONLY
  8 .rodata       00000190  000000f0  000000f0  000000f0  2**4
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  9 .rodata.str1.4 000005fe  00000280  00000280  00000280  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA

>
>
> Nigel
>
> --
> Nigel Stephens            e. nigel@mips.com
> MIPS Technologies         p. +44 1223 203110
> Building 7200             f. +44 1223 203181
> Cambridge Research Park   m. +44 7976 686470
> Beach Road, Waterbeach    w. http://www.mips.com
> Cambridge CB5 9TL, UK
>
>

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From:	zhuzhenhua <zzh.hust@gmail.com>
To:	"Nigel Stephens" <nigel@mips.com>
Subject: Re: BFD: Warning: Writing section `.text' to huge (ie negative) file offset 0xa1ffff10
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On 6/2/06, zhuzhenhua <zzh.hust@gmail.com> wrote:
> On 6/1/06, Nigel Stephens <nigel@mips.com> wrote:
> >
> >
> > zhuzhenhua wrote:
> > > On 6/1/06, Thiemo Seufer <ths@networkno.de> wrote:
> > >> zhuzhenhua wrote:
> > >> > i have write a code to link at 0xa2000000(uncached address)
> > >> > but when link i get the error as
> > >> > "BFD: Warning: Writing section `.text' to huge (ie negative) file
> > >> > offset 0xa1ffff10.
> > >> > BFD: Warning: Writing section `.data' to huge (ie negative) file
> > >> > offset 0xa200b050.
> > >> > BFD: Warning: Writing section `.reginfo' to huge (ie negative) file
> > >> > offset 0xa200c980.
> > >> > mipsel-linux-objcopy: /root/project/brec_flash/release/brec_flash.bin:
> > >> > File truncated
> > >> > make: *** [brec_flash] Error 1"
> > >> >
> > >> > my link.xn as follow:
> > >> >
> > >> > OUTPUT_ARCH(mips)
> > >> > ENTRY(brec_flash_entry)
> > >> > SECTIONS
> > >> > {
> > >> > .text 0xa2000000 :
> > >>
> > >> Use
> > >>
> > >>  . = 0xa2000000;
> > >>  .text :
> > >>
> > >> instead. "info ld" explains the subtle difference.
> > >>
> > >>
> > >> Thiemo
> > >>
> > >
> > > do you mean use
> > > . = 0xa2000000;
> > > .text :
> > > to replace
> > > .text 0xa2000000 :
> > > ?
> > > i modify as that, and it still get the same message
> > >
> >
> > I think the problem is not with the linker, but in your use of objcopy
> > to convert your ELF file to a raw binary file.
> >
> > 1) What arguments are you giving to mipsel-linux-objcopy?
> i use objcopy as follow(the brec_flash is elf file)
>         mipsel-linux-objcopy -O binary brec_flash brec_flash.bin
> >
> > 2) What is the output from mipsel-linux-objdump -h run on your
> > intermediate ELF object file?
> i use mipsel-linux-objdump -h brec_flash and get messages as follow
>
>
> brec_flash:     file format elf32-tradlittlemips
>
> Sections:
> Idx Name          Size      VMA       LMA       File off  Algn
>   0 .text         0000b140  72000000  72000000  00010000  2**4
>                   CONTENTS, ALLOC, LOAD, READONLY, CODE
>   1 .data         00001080  7200b140  7200b140  0001b140  2**4
>                   CONTENTS, ALLOC, LOAD, DATA
>   2 .sbss         00000010  7200c1c0  7200c1c0  0001c1c0  2**2
>                   ALLOC
>   3 .bss          000008a0  7200c1d0  7200c1d0  0001c1c0  2**4
>                   ALLOC
>   4 .reginfo      00000018  7200ca70  7200ca70  0001ca70  2**2
>                   CONTENTS, ALLOC, LOAD, READONLY, DATA, LINK_ONCE_SAME_SIZE
>   5 .pdr          000011a0  00000000  00000000  0001ca88  2**2
>                   CONTENTS, READONLY
>   6 .mdebug.abi32 00000000  00000000  00000000  0001dc28  2**0
>                   CONTENTS, READONLY
>   7 .comment      000000ea  00000000  00000000  0001dc28  2**0
>                   CONTENTS, READONLY
>   8 .rodata       00000190  000000f0  000000f0  000000f0  2**4
>                   CONTENTS, ALLOC, LOAD, READONLY, DATA
>   9 .rodata.str1.4 000005fe  00000280  00000280  00000280  2**2
>                   CONTENTS, ALLOC, LOAD, READONLY, DATA

the 0x72xxxxxx should be 0xa2xxxxxx, because i can't pass by set
0xa2000000,so i change the .text to 0x72000000, and it can get the
.bin correctly.
>
> >
> >
> > Nigel
> >
> > --
> > Nigel Stephens            e. nigel@mips.com
> > MIPS Technologies         p. +44 1223 203110
> > Building 7200             f. +44 1223 203181
> > Cambridge Research Park   m. +44 7976 686470
> > Beach Road, Waterbeach    w. http://www.mips.com
> > Cambridge CB5 9TL, UK
> >
> >
>

From mrv@corecom.co.kr Fri Jun  2 08:35:16 2006
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From:	"Roman Mashak" <mrv@corecom.co.kr>
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	<Kiran_Thota@pmc-sierra.com>
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Hello,

I succesfully compiled 2.6.12-rc3 (patched by PMC-sierra), but failed to 
boot it on Sequoia evaluation board. Firmware version is: PMON2000 1.9 
(SEQUOIA-EB).

What I understood is PMON can't deal with 64-bit images, that's why kernel 
image should be "objcopy'd" into ELF32 (so, result is two images: 64bit 
'vmlinux' and 32bit 'vmlinux.32'). So upon booting 'vmlinux.32' - board gets 
hang up:

Loading file: tftp://192.168.11.43/vmlinux.32 (elf)
0x80100000/2088944 + 0x80300000/774278 + 0x803bd086/139162(z) + 4044 syms-


With best regards, Roman Mashak.  E-mail: mrv@corecom.co.kr 



From yczhao@hhcn.com Fri Jun  2 09:16:26 2006
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Hi all,

I want to compile linux-2.6.15 on BCM1255 board, I download crosscompilers(sb1-elf-,mips-linux-) from broadcom website, but error occurs when compiling
Do the compilers work for linux compiling? or I should download other versions of compiler for the kernel? And where?
Thanks.


From Thomas.Koeller@baslerweb.com Fri Jun  2 11:16:30 2006
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> From: Ralf Baechle [mailto:ralf@linux-mips.org] 
> 
> On Thu, Jun 01, 2006 at 10:46:17PM +0200, Thomas Koeller wrote:
> 
> > the PCI setup code for a platform is conventionally located 
> in arch/mips/pci. 
> > I fail to see the benefits of separating this particular 
> part of a platform's 
> > setup from the rest. The PCI setup code will in general 
> contain references to 
> > platform-specific information, such as the overall address 
> space layout, of 
> > which the PCI memory and I/O pages are a part. If the PCI 
> setup code were in 
> > the platform subdirectory, sharing this information by means of a 
> > platform-local header file would be easy. But with the PCI code in 
> > arch/mips/pci, this becomes more difficult. The platform 
> header could be 
> > located somewhere outside the platform's directory, maybe under 
> > 'include' (where?), or referenced via an ugly relative path like 
> > '../../vendor/platform/platform.h'. All this seems rather 
> clumsy to me. No 
> > other part of a platform's initialization is separated from 
> the rest in a 
> > similar way, so what is so special about PCI setup that it 
> cannot be in the 
> > platform directory, thereby avoiding all these annoyances? 
> 
> The per-platform PCI code used to live in the per-platform 
> directories.
> It turned into a giant mess, very little code was being shared, it was
> hard to uniformly perform any kind of modification or fixes - and more
> of that kind of changes will be needed before the PCI codes really
> shines.
> 
>   Ralf
> 

So how am I supposed to deal with the issues mentioned?
Should I duplicate the PCI-related platform definitions into
arch/mips/pci? Scattering related information across several places is
generally regarded as poor design, as it will make maintenance more
difficult.
Or should I resort to one of the methods I mentioned, or is there any
other
preferred/recommended way of dealing with this?

tk
----------------------------------------------- 
Thomas Koeller, Software Development 

Basler Vision Technologies 
An der Strusbek 60-62 
22926 Ahrensburg 
Germany 

Tel +49 (4102) 463-390 
Fax +49 (4102) 463-46390

mailto:Thomas.Koeller@baslerweb.com 
http://www.baslerweb.com 


From ths@networkno.de Fri Jun  2 11:49:15 2006
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Subject: Re: BFD: Warning: Writing section `.text' to huge (ie negative) file offset 0xa1ffff10
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zhuzhenhua wrote:
[snip]
> >Idx Name          Size      VMA       LMA       File off  Algn
> >  0 .text         0000b140  72000000  72000000  00010000  2**4
> >                  CONTENTS, ALLOC, LOAD, READONLY, CODE
> >  1 .data         00001080  7200b140  7200b140  0001b140  2**4
> >                  CONTENTS, ALLOC, LOAD, DATA
> >  2 .sbss         00000010  7200c1c0  7200c1c0  0001c1c0  2**2
> >                  ALLOC
> >  3 .bss          000008a0  7200c1d0  7200c1d0  0001c1c0  2**4
> >                  ALLOC
> >  4 .reginfo      00000018  7200ca70  7200ca70  0001ca70  2**2
> >                  CONTENTS, ALLOC, LOAD, READONLY, DATA, 
> >                  LINK_ONCE_SAME_SIZE
> >  5 .pdr          000011a0  00000000  00000000  0001ca88  2**2
> >                  CONTENTS, READONLY
> >  6 .mdebug.abi32 00000000  00000000  00000000  0001dc28  2**0
> >                  CONTENTS, READONLY
> >  7 .comment      000000ea  00000000  00000000  0001dc28  2**0
> >                  CONTENTS, READONLY
> >  8 .rodata       00000190  000000f0  000000f0  000000f0  2**4
> >                  CONTENTS, ALLOC, LOAD, READONLY, DATA
> >  9 .rodata.str1.4 000005fe  00000280  00000280  00000280  2**2
> >                  CONTENTS, ALLOC, LOAD, READONLY, DATA
> 
> the 0x72xxxxxx should be 0xa2xxxxxx, because i can't pass by set
> 0xa2000000,so i change the .text to 0x72000000, and it can get the
> .bin correctly.

At some version the check for sign extensions was broken for MIPS
binutils, in that case the workaround was to specify the full sign
extension for 64 bit, that is 0xffffffffa0000000.


Thiemo

From nigel@mips.com Fri Jun  2 13:00:56 2006
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zhuzhenhua wrote:
>
>>
>> I think the problem is not with the linker, but in your use of objcopy
>> to convert your ELF file to a raw binary file.
>>
>> 1) What arguments are you giving to mipsel-linux-objcopy?
> i use objcopy as follow(the brec_flash is elf file)
>     mipsel-linux-objcopy -O binary brec_flash brec_flash.bin
>>
>> 2) What is the output from mipsel-linux-objdump -h run on your
>> intermediate ELF object file?
> i use mipsel-linux-objdump -h brec_flash and get messages as follow
>
>
> brec_flash:     file format elf32-tradlittlemips
>
> Sections:
> Idx Name          Size      VMA       LMA       File off  Algn
>  0 .text         0000b140  72000000  72000000  00010000  2**4
>                  CONTENTS, ALLOC, LOAD, READONLY, CODE
>  1 .data         00001080  7200b140  7200b140  0001b140  2**4
>                  CONTENTS, ALLOC, LOAD, DATA
>  2 .sbss         00000010  7200c1c0  7200c1c0  0001c1c0  2**2
>                  ALLOC
>  3 .bss          000008a0  7200c1d0  7200c1d0  0001c1c0  2**4
>                  ALLOC
>  4 .reginfo      00000018  7200ca70  7200ca70  0001ca70  2**2
>                  CONTENTS, ALLOC, LOAD, READONLY, DATA, 
> LINK_ONCE_SAME_SIZE
>  5 .pdr          000011a0  00000000  00000000  0001ca88  2**2
>                  CONTENTS, READONLY
>  6 .mdebug.abi32 00000000  00000000  00000000  0001dc28  2**0
>                  CONTENTS, READONLY
>  7 .comment      000000ea  00000000  00000000  0001dc28  2**0
>                  CONTENTS, READONLY
>  8 .rodata       00000190  000000f0  000000f0  000000f0  2**4
>                  CONTENTS, ALLOC, LOAD, READONLY, DATA
>  9 .rodata.str1.4 000005fe  00000280  00000280  00000280  2**2
>                  CONTENTS, ALLOC, LOAD, READONLY, DATA

OK. I think that the final .rodata.str1.4 section is causing your 
problem because the offset between its load address and the other 
section is huge, causing "objcopy -O binary" to generate a huge file. 
This is a new section generated by gcc 3.x and above to hold mergeable 
constant data. Try changing the line in your linker script which (I'm 
guessing here) probably looks like this:

    *(.rodata)

to:

     *(.rodata) *(.rodata.*)

Nigel


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Date:	Fri, 02 Jun 2006 12:11:59 +0100
From:	Nigel Stephens <nigel@mips.com>
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To:	zhuzhenhua <zzh.hust@gmail.com>
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	linux-mips <linux-mips@linux-mips.org>
Subject: Re: BFD: Warning: Writing section `.text' to huge (ie negative) file
 offset 0xa1ffff10
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Nigel Stephens wrote:
>
>>    
>>  8 .rodata       00000190  000000f0  000000f0  000000f0  2**4
>>                  CONTENTS, ALLOC, LOAD, READONLY, DATA
>>  9 .rodata.str1.4 000005fe  00000280  00000280  00000280  2**2
>>                  CONTENTS, ALLOC, LOAD, READONLY, DATA
>
> OK. I think that the final .rodata.str1.4 section is causing your 
> problem because the offset between its load address and the other 
> section is huge, causing "objcopy -O binary" to generate a huge file. 
> This is a new section generated by gcc 3.x and above to hold mergeable 
> constant data. Try changing the line in your linker script which (I'm 
> guessing here) probably looks like this:
>
>    *(.rodata)
>
> to:
>
>     *(.rodata) *(.rodata.*)
>

I failed to spot that .rodata also has a "bad" load address. So it looks 
like .rodata also isn't correctly handled in your linker script.

Nigel



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