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Gowri Satish Adimulam wrote:
> Hi all ,
> Below iam trying to run ftp server daemon , 
> it gave below message , 
> 
> # ./ftpd
> 421 Cannot getsockname( STDIN ), errno=95
> May  6 05:55:54 in.ftpd[48]: Cannot getsockname( STDIN ): Socket
> operation on nt#
> 
> any idea about this error .

Yes... two suggestions:
(1) You'll get _much_ better support if you ask the right people -- try
reading the documentation for that FTP daemon -- it should mention who
to contact regarding bugs there.
(2) It looks like it's expecting to be run from inetd/xinetd -- perhaps
that's worth a try?

This list has nothing to do with FTP daemons -- unless you're having
problems getting to ftp.linux-mips.org -- then we might have something
to do with it.  But otherwise, it's really not our issue.
-- 
Stuart Longland (aka Redhatter)              .'''.
Gentoo Linux/MIPS Cobalt and Docs Developer  '.'` :
. . . . . . . . . . . . . . . . . . . . . .   .'.'
http://dev.gentoo.org/~redhatter             :.'

International Asperger's Year (1906 ~ 2006)
http://dev.gentoo.org/~redhatter/iay

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From scott.ashcroft@talk21.com Sat Apr  1 19:39:11 2006
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Subject: [PATCH] Typo in arch/mips/Makefile breaks build on Cobalt
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There appears to be a couple of typos in the clean up
of the Makefile.

The cflags lines for NEVADA and R5432 have
'cc-options' rather than 'cc-option'.
Attached patch fixes it up.

Signed-Off-by: scott.ashcroft@talk21.com
--0-6929233-1143917403=:33506
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diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 7bb0296..c254f4f 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -114,9 +114,9 @@ cflags-$(CONFIG_CPU_MIPS64_R1)	+= $(call
 cflags-$(CONFIG_CPU_MIPS64_R2)	+= $(call cc-option,-march=mips64r2,-mips2 -mtune=r4600 ) \
 			-Wa,-mips64r2 -Wa,--trap
 cflags-$(CONFIG_CPU_R5000)	+= -march=r5000 -Wa,--trap
-cflags-$(CONFIG_CPU_R5432)	+= $(call cc-options,-march=r5400,-march=r5000) \
+cflags-$(CONFIG_CPU_R5432)	+= $(call cc-option,-march=r5400,-march=r5000) \
 			-Wa,--trap
-cflags-$(CONFIG_CPU_NEVADA)	+= $(call cc-options,-march=rm5200,-march=r5000) \
+cflags-$(CONFIG_CPU_NEVADA)	+= $(call cc-option,-march=rm5200,-march=r5000) \
 			-Wa,--trap
 cflags-$(CONFIG_CPU_RM7000)	+= $(call cc-option,-march=rm7000,-march=r5000) \
 			-Wa,--trap

--0-6929233-1143917403=:33506--

From niklaus@gmail.com Sat Apr  1 20:57:52 2006
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Subject: elocation truncated relocation truncated to fit: R_MIPS_GOT16
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 Hi,

 I setup cross compilation environment for mips and did a make . Why do
 i get the last following error relocation truncated to fit errors.

 http://www.toppers.jp/download.cgi/jsp-1.4.1.tar.gz is the place where
 i got the file.
 The first steps are
 tar xvzf jsp-1.4.1.tar.gz
 cd jsp
 ./configure -C mips3 -S vr4131
 cd cfg
 make
 cd ..
 make depend
 make


 pro@deb:~/jsp$ make
 mips-deb-linux-gcc -c  -msoft-float -mgp32 -g -O2 -mips3 -G 0
 -DGDB_STUB -I. -I./include  -I./config/mips3/vr4131 -I./config/mips3
 -I./kernel ./config/mips3/exception_vector.S
 mips-deb-linux-gcc -c  -msoft-float -mgp32 -g -O2 -mips3 -G 0
 -DGDB_STUB -I. -I./include  -I./config/mips3/vr4131 -I./config/mips3
 sample1.c
 sample1.c: In function `task':
 sample1.c:160: warning: division by zero
 sample1.c:165: warning: division by zero
 mips-deb-linux-gcc -c  -msoft-float -mgp32 -g -O2 -mips3 -G 0
 -DGDB_STUB -I. -I./include  -I./config/mips3/vr4131 -I./config/mips3
 -I./systask ./systask/timer.c
 mips-deb-linux-gcc -c  -msoft-float -mgp32 -g -O2 -mips3 -G 0
 -DGDB_STUB -I. -I./include  -I./config/mips3/vr4131 -I./config/mips3
 -I./systask ./systask/serial.c
 In file included from ./systask/serial.c:45:
 ./config/mips3/vr4131/hw_serial.h: In function `sio_cls_por':
 ./config/mips3/vr4131/hw_serial.h:115: warning: the address of
 `vr4131_dsiu_openflag', will always evaluate as `true'
 mips-deb-linux-gcc -c  -msoft-float -mgp32 -g -O2 -mips3 -G 0
 -DGDB_STUB -I. -I./include  -I./config/mips3/vr4131 -I./config/mips3
 -I./systask ./systask/logtask.c
 mips-deb-linux-gcc -c  -msoft-float -mgp32 -g -O2 -mips3 -G 0
 -DGDB_STUB -I. -I./include  -I./config/mips3/vr4131 -I./config/mips3
 -I./systask ./library/log_output.c
 mips-deb-linux-gcc -c  -msoft-float -mgp32 -g -O2 -mips3 -G 0
 -DGDB_STUB -I. -I./include  -I./config/mips3/vr4131 -I./config/mips3
 -I./systask ./library/vasyslog.c
 mips-deb-linux-gcc -c  -msoft-float -mgp32 -g -O2 -mips3 -G 0
 -DGDB_STUB -I. -I./include  -I./config/mips3/vr4131 -I./config/mips3
 -I./systask ./library/t_perror.c
 mips-deb-linux-gcc -c  -msoft-float -mgp32 -g -O2 -mips3 -G 0
 -DGDB_STUB -I. -I./include  -I./config/mips3/vr4131 -I./config/mips3
 -I./systask ./library/strerror.c
 mips-deb-linux-gcc -c  -msoft-float -mgp32 -g -O2 -mips3 -G 0
 -DGDB_STUB -I. -I./include  -I./config/mips3/vr4131 -I./config/mips3
 kernel_cfg.c
 In file included from kernel_cfg.c:27:
 ./config/mips3/vr4131/hw_serial.h: In function `sio_cls_por':
 ./config/mips3/vr4131/hw_serial.h:115: warning: the address of
 `vr4131_dsiu_openflag', will always evaluate as `true'
 mips-deb-linux-gcc -S  -msoft-float -mgp32 -g -O2 -mips3 -G 0
 -DGDB_STUB -I. -I./include  -I./config/mips3/vr4131 -I./config/mips3
 -I./kernel ./config/mips3/makeoffset.c
 ./utils/genoffset makeoffset.s > tmpfile3
 mv tmpfile3 offset.h
 mips-deb-linux-gcc -c  -msoft-float -mgp32 -g -O2 -mips3 -G 0
 -DGDB_STUB -I. -I./include  -I./config/mips3/vr4131 -I./config/mips3
 -I./kernel ./config/mips3/vr4131/sys_support.S
 mips-deb-linux-gcc -c  -msoft-float -mgp32 -g -O2 -mips3 -G 0
 -DGDB_STUB -I. -I./include  -I./config/mips3/vr4131 -I./config/mips3
 -I./kernel ./config/mips3/cpu_support.S
 ./config/mips3/cpu_support.S: Assembler messages:
 ./config/mips3/cpu_support.S:133: Warning: No .cprestore pseudo-op
 used in PIC code
 ./config/mips3/cpu_support.S:148: Warning: No .cprestore pseudo-op
 used in PIC code
 ./config/mips3/cpu_support.S:378: Warning: No .cprestore pseudo-op
 used in PIC code
 ./config/mips3/cpu_support.S:238: Warning: Pretending global symbol
 used as branch target is local.
 ./config/mips3/cpu_support.S:267: Warning: Pretending global symbol
 used as branch target is local.
 ./config/mips3/cpu_support.S:561: Error: Cannot branch to undefined symbol.
 make: *** [cpu_support.o] Error 1


 the file cpu_support.S :561
 i have  the instruction
 j       call_texrtn

 I commented it. I was not sure what i was doing.

 Then i got some error saying "elf32-littlemips" , i changed it to
 elf32-tradlittlemips because that was what ld supported as a target.
 I got the following error . Can anyone help me why this occurs and how
 to resolve this .



 mips-deb-linux-gcc  -msoft-float -mgp32 -g -O2 -mips3 -G 0  -DGDB_STUB
 -I. -I./include  -I./config/mips3/vr4131 -I./config/mips3 -nostdlib
 -T ./config/mips3/vr4131/vr4131_elf_gdb.ld -o jsp \
                         exception_vector.o  sample1.o     timer.o
 serial.o logtask.o log_output.o vasyslog.o t_perror.o strerror.o
 kernel_cfg.o   libkernel.a   -lgcc
 /home/pro/crossenv/bin/../lib/gcc/mips-deb-linux/3.4.6/../../../../mips-deb-linux/bin/ld:
 region ROM0 is full (jsp section .rodata.str1.4)
 /home/pro/crossenv/bin/../lib/gcc/mips-deb-linux/3.4.6/../../../../mips-deb-linux/bin/ld:
 section .rodata.str1.4 [00000000a00004dc -> 00000000a0001046] overlaps
 section .text [00000000a0000700 -> 00000000a0007faf]
 /home/pro/crossenv/bin/../lib/gcc/mips-deb-linux/3.4.6/../../../../mips-deb-linux/bin/ld:
 jsp: section .text lma 0xa0000700 overlaps previous sections
 /home/pro/crossenv/bin/../lib/gcc/mips-deb-linux/3.4.6/../../../../mips-deb-linux/bin/ld:
 jsp: section .rodata lma 0xa0007fb0 overlaps previous sections
 exception_vector.o:./config/mips3/exception_vector.S:74: relocation
 truncated to fit: R_MIPS_GOT16 against `reset'
 exception_vector.o:./config/mips3/exception_vector.S:80: relocation
 truncated to fit: R_MIPS_GOT16 against `reset'
 exception_vector.o:./config/mips3/exception_vector.S:96: relocation
 truncated to fit: R_MIPS_GOT16 against `_kernel_cpu_experr'
 exception_vector.o:./config/mips3/exception_vector.S:112: relocation
 truncated to fit: R_MIPS_GOT16 against `_kernel_cpu_experr'
 exception_vector.o:./config/mips3/exception_vector.S:128: relocation
 truncated to fit: R_MIPS_GOT16 against `_kernel_cpu_experr'
 exception_vector.o:./config/mips3/exception_vector.S:144: relocation
 truncated to fit: R_MIPS_GOT16 against `_kernel_general_exception'
 libkernel.a(start.o):./config/mips3/start.S:69: relocation truncated
 to fit: R_MIPS_GOT16 against `_stack_top'
 libkernel.a(start.o):./config/mips3/start.S:73: relocation truncated
 to fit: R_MIPS_GOT16 against `_gp'
 libkernel.a(start.o):./config/mips3/start.S:114: relocation truncated
 to fit: R_MIPS_GOT16 against `hardware_init_hook'
 libkernel.a(start.o):./config/mips3/start.S:124: relocation truncated
 to fit: R_MIPS_GOT16 against `__bss_start'
 libkernel.a(start.o):./config/mips3/start.S:125: additional relocation
 overflows omitted from the output
 collect2: ld returned 1 exit status
 make: *** [jsp] Error 1

Please note i used the -Wa,-xgot options to compile still it failed.
Can someone suggest me a work around. Is there anyway i can increase
the size. If yes where in gcc . Any help would be greatly appreciated.

 Regards
 Nik

From ralf@linux-mips.org Sat Apr  1 22:14:05 2006
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Subject: Re: [PATCH] Typo in arch/mips/Makefile breaks build on Cobalt
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On Sat, Apr 01, 2006 at 07:50:03PM +0100, Scott Ashcroft wrote:

> There appears to be a couple of typos in the clean up
> of the Makefile.
> 
> The cflags lines for NEVADA and R5432 have
> 'cc-options' rather than 'cc-option'.
> Attached patch fixes it up.

I ran into this an hour ago during builds across all platforms, so there
already is a fix in the tree.

Thanks anyway,

  Ralf

From fxzhang@ict.ac.cn Sun Apr  2 15:27:35 2006
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hi Ralf,

    The dwarf unwinding code is too complex and I have no time to port
it. And I doubt it will be important enough to deserve the space costs,
the -gdwarf-2 kernel is more than 20MB.

    Instead for my need I just hack up a simple version of way 1, with
frame pointer kept on: CONFIG_FRAME_POINTER.

BTW:It seems nobody use this option for MIPS? Is it dangerous? The size
and performance overhead should be barable at most time for debugging?

here is the code patch(just for reference), it depends on
CONFIG_KALLSYMS too.


--- traps.c.orig	2006-04-02 21:39:01.000000000 +0800
+++ traps.c	2006-04-02 22:38:03.000000000 +0800
@@ -116,8 +116,129 @@
 	printk("\n");
 }

-void show_trace(struct task_struct *task, unsigned long *stack)
+#include <asm/inst.h>
+
+static struct mips_frame_info {
+	void *func;
+	int omit_fp;	/* compiled without fno-omit-frame-pointer */
+	int frame_offset;
+	int pc_offset;
+} tmp_frame;
+
+static int get_frame_info(void *func,struct mips_frame_info *info)
+{
+	int i;
+	union mips_instruction *ip = (union mips_instruction *)func;
+	info->pc_offset = -1;
+	info->frame_offset = -1;
+	for (i = 0; i < 128; i++, ip++) {
+		/* if jal, jalr, jr, stop. */
+		if (ip->j_format.opcode == jal_op ||
+		    (ip->r_format.opcode == spec_op &&
+		     (ip->r_format.func == jalr_op ||
+		      ip->r_format.func == jr_op)))
+			break;
+
+		if (
+#ifdef CONFIG_32BIT
+		    ip->i_format.opcode == sw_op &&
+#endif
+#ifdef CONFIG_64BIT
+		    ip->i_format.opcode == sd_op &&
+#endif
+		    ip->i_format.rs == 29)
+		{
+			/* sw / sd $ra, offset($sp) */
+			if (ip->i_format.rt == 31) {
+				if (info->pc_offset != -1)
+					continue;
+				info->pc_offset =
+					ip->i_format.simmediate / sizeof(long);
+			}
+			/* sw / sd $s8, offset($sp) */
+			if (ip->i_format.rt == 30) {
+//#if 0	/* gcc 3.4 does aggressive optimization... */
+				if (info->frame_offset != -1)
+					continue;
+//#endif
+				info->frame_offset =
+					ip->i_format.simmediate / sizeof(long);
+			}
+		}
+	}
+	if (info->pc_offset == -1 || info->frame_offset == -1) {
+		printk("Can't analyze prologue code at %p\n", func);
+		info->pc_offset = -1;
+		info->frame_offset = -1;
+		return -1;
+	}
+
+	return 0;
+}
+
+static void show_trace(struct task_struct *task, void *regs_in)
 {
+	unsigned long prev_sp,stack_top;
+	unsigned long count = 0;
+	unsigned long frame, pc;
+	char namebuf[KSYM_NAME_LEN+1];
+	const char *name;
+	char *modname;
+	unsigned long size,offset;
+	struct pt_regs *regs;
+	int in_exception = 0;
+
+	if (regs_in) /* called from show_registers */
+	  regs = (struct pt_regs*) regs_in;
+	else
+	  regs = (struct pt_regs *) ((unsigned long) task->thread_info +
+	      THREAD_SIZE - 32 - sizeof(struct pt_regs));
+
+	printk("Call Trace:\n");
+
+	prev_sp = (unsigned long) (task->thread_info + 1);
+	stack_top = (unsigned long) task->thread_info + THREAD_SIZE;
+
+	pc = (unsigned long)show_trace;
+
+	if (get_frame_info((void*)pc,&tmp_frame))
+	  return;
+
+	__asm__ volatile ("addu %0,$0,$30" : "=r" (frame));
+
+	do {
+		pc = ((unsigned long *)frame)[tmp_frame.pc_offset];
+		frame = ((unsigned long *)frame)[tmp_frame.frame_offset];
+		if (frame < prev_sp || frame > stack_top) {
+		  printk("out of range sp %08lx,give up!\n",frame);
+		  break;
+		}
+
+	    retry_pc:
+		if (!__kernel_text_address(pc)) {
+		  printk("out of text addr %08lx,give up!\n",pc);
+		  break;
+		}
+
+		name = kallsyms_lookup(pc, &size, &offset, &modname, namebuf);
+		if (!name) {
+		  printk("no function found at %08lx\n",pc);
+		  return;
+		}
+		printk("%s at %08lx,frame=%08lx",name,pc,frame);
+
+		pc = pc - offset;
+		if (get_frame_info((void*)pc,&tmp_frame) && !in_exception) {
+		  printk("get frame information failed, assume exceptions\n");
+		  in_exception = 1;
+		  pc = regs->cp0_epc;
+		  frame = regs->regs[30];
+		  printk("epc = %08lx,frame=%08lx\n",pc,frame);
+		  goto retry_pc;
+		}
+	} while (count++ < 16);
+
+#if 0
 	const int field = 2 * sizeof(unsigned long);
 	unsigned long addr;

@@ -140,6 +261,7 @@
 		}
 	}
 	printk("\n");
+#endif
 }

 /*
@@ -147,9 +269,10 @@
  */
 void dump_stack(void)
 {
-	unsigned long stack;
+	//unsigned long stack;

-	show_trace(current, &stack);
+	//show_trace(current, &stack);
+	show_trace(current, NULL);
 }

 EXPORT_SYMBOL(dump_stack);
@@ -269,7 +392,8 @@
 	printk("Process %s (pid: %d, threadinfo=%p, task=%p)\n",
 	        current->comm, current->pid, current_thread_info(), current);
 	show_stack(current, (long *) regs->regs[29]);
-	show_trace(current, (long *) regs->regs[29]);
+	//show_trace(current, (long *) regs->regs[29]);
+	show_trace(current,(void*) regs);
 	show_code((unsigned int *) regs->cp0_epc);
 	printk("\n");
 }



--- process.c.orig	2006-04-02 21:38:51.000000000 +0800
+++ process.c	2006-03-23 22:56:46.000000000 +0800
@@ -314,6 +314,9 @@
 	int i;
 	void *func = info->func;
 	union mips_instruction *ip = (union mips_instruction *)func;
+#ifdef CONFIG_FRAME_POINTER
+	info->omit_fp = 0;
+#endif
 	info->pc_offset = -1;
 	info->frame_offset = info->omit_fp ? 0 : -1;
 	for (i = 0; i < 128; i++, ip++) {



From fxzhang@ict.ac.cn Sun Apr  2 15:47:06 2006
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hi,

  We have been puzzled by the strange problems with our new board with
marvell 64420 for nearly one month.

The board is unstable in linux. Using a 2.6.14 kernel it dies very
easily with file system operations;with a 2.4.22 kernel it can survive
a "cp -a /usr /usr1", but diffing two identical files with sizes > 50M
often mistakely reports difference.The diff result is often 32 bytes,but
the first byte is not cache line aligned(in fact,almost always
%cachelinesize == 1).

The results remain true even with ramdisk only and any other pci device
removed from the board. The same mips CPU works well on other boards,
the same kernel with different platform chosen is very stable too. So I
tend to doubt the bridge or its DDR controller.( Is there any possiblity
of platform related code that lead to such problem? )


If anyone has experiences on this chip, could you point us some way out?
It seems we cannot easily reach the marvell's core developers.

Thanks a lot.



From fxzhang@ict.ac.cn Sun Apr  2 15:52:33 2006
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I forget to mention that in boot loader things look like quite stable:
memory test is ok(we ported memtest86), loading big files over the
network is ok, gzip/unzip/diff a 40MB file is ok too.

And if we turn on memory debug for slab allocator on 2.6, we often meet
random slab corruptions. It looks like some memory area will be
mysteriously changed.

Fuxin Zhang Ð´µÀ:
> hi,
> 
>   We have been puzzled by the strange problems with our new board with
> marvell 64420 for nearly one month.
> 
> The board is unstable in linux. Using a 2.6.14 kernel it dies very
> easily with file system operations;with a 2.4.22 kernel it can survive
> a "cp -a /usr /usr1", but diffing two identical files with sizes > 50M
> often mistakely reports difference.The diff result is often 32 bytes,but
> the first byte is not cache line aligned(in fact,almost always
> %cachelinesize == 1).
> 
> The results remain true even with ramdisk only and any other pci device
> removed from the board. The same mips CPU works well on other boards,
> the same kernel with different platform chosen is very stable too. So I
> tend to doubt the bridge or its DDR controller.( Is there any possiblity
> of platform related code that lead to such problem? )
> 
> 
> If anyone has experiences on this chip, could you point us some way out?
> It seems we cannot easily reach the marvell's core developers.
> 
> Thanks a lot.
> 
> 
> 
> 
> 

From anemo@mba.ocn.ne.jp Sun Apr  2 17:06:08 2006
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Subject: Re: stack backtrace
From:	Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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>>>>> On Sun, 02 Apr 2006 22:38:02 +0800, Fuxin Zhang <fxzhang@ict.ac.cn> said:

>     Instead for my need I just hack up a simple version of way 1, with
> frame pointer kept on: CONFIG_FRAME_POINTER.

> BTW:It seems nobody use this option for MIPS? Is it dangerous? The size
> and performance overhead should be barable at most time for debugging?

> here is the code patch(just for reference), it depends on
> CONFIG_KALLSYMS too.

The get_frame_info() in process.c in kernel 2.6.16 no longer depends
on a frame pointer.  It would fit your needs better.  I think you can
use it with slight modifications.

BTW, Is there any point using -fno-omit-frame-pointer on MIPS now?
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y is better for MIPS, isn't it?

---
Atsushi Nemoto

From sshtylyov@ru.mvista.com Sun Apr  2 17:16:22 2006
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Subject: [PATCH] Au1550: make OSS drivers look pretty on loading
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This is a multi-part message in MIME format.
--------------000109080604040901020208
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Hello.

    Calls to pr_info() without newlines caused the OSS drivers' load time 
messages to be printed w/o any spacing...

WBR, Sergei

PS: Forgot the signoff line again when posting the patch on Friday:

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>

--------------000109080604040901020208
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diff --git a/sound/oss/au1550_ac97.c b/sound/oss/au1550_ac97.c
index f38e082..0ca90a0 100644
--- a/sound/oss/au1550_ac97.c
+++ b/sound/oss/au1550_ac97.c
@@ -1950,7 +1950,7 @@ au1550_probe(void)
 		goto err_dma2;
 	}
 
-	pr_info("DAC: DMA%d, ADC: DMA%d", DBDMA_AC97_TX_CHAN, DBDMA_AC97_RX_CHAN);
+	pr_info("DAC: DMA%d, ADC: DMA%d\n", DBDMA_AC97_TX_CHAN, DBDMA_AC97_RX_CHAN);
 
 	/* register devices */
 
@@ -2031,7 +2031,7 @@ au1550_probe(void)
 
 	s->codec_base_caps = rdcodec(s->codec, AC97_RESET);
 	s->codec_ext_caps = rdcodec(s->codec, AC97_EXTENDED_ID);
-	pr_info("AC'97 Base/Extended ID = %04x/%04x",
+	pr_info("AC'97 Base/Extended ID = %04x/%04x\n",
 	     s->codec_base_caps, s->codec_ext_caps);
 
 	if (!(s->codec_ext_caps & AC97_EXTID_VRA)) {
@@ -2047,7 +2047,7 @@ au1550_probe(void)
 		s->no_vra = 1;
 	}
 	if (s->no_vra)
-		pr_info("no VRA, interpolating and decimating");
+		pr_info("no VRA, interpolating and decimating\n");
 
 	/* set mic to be the recording source */
 	val = SOUND_MASK_MIC;
diff --git a/sound/oss/au1550_i2s.c b/sound/oss/au1550_i2s.c
index 529b625..9907ac0 100644
--- a/sound/oss/au1550_i2s.c
+++ b/sound/oss/au1550_i2s.c
@@ -1897,7 +1897,7 @@ au1550_probe(void)
 		goto err_dma2;
 	}
 
-	pr_info("DAC: DMA%d, ADC: DMA%d", DBDMA_I2S_TX_CHAN, DBDMA_I2S_RX_CHAN);
+	pr_info("DAC: DMA%d, ADC: DMA%d\n", DBDMA_I2S_TX_CHAN, DBDMA_I2S_RX_CHAN);
 
 	/* register devices */
 

--------------000109080604040901020208--

From ralf@linux-mips.org Sun Apr  2 20:37:35 2006
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From:	Ralf Baechle <ralf@linux-mips.org>
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 o DDB5074 and DDB5476 eval boards don't compile anymore since around
   2.6.0, I've mentioned that before, and two people mentioned their
   interest in continued support for the board but no pathches yet.
 o EV96100 doesn't build anymore since at least November 15, 2003.  No
   bug reports.
 o Jaguar ATX didn't build.  High on my lists of things to be removed
   because of it's awkard architecture that requires old features in the
   generic memory managment code to be left around.
 o None of the other MV-64340 based boards, that is Ocelot C and Ocelot 3
   does build since over a year yet again indicating there is nobody
   left that has any interest in these boards.
 o Altas and SEAD don't build and nobody has complained; MIPS Technologies
   does no longer sell these boards since years.
 o The serial driver for the two IT8172-based boards does not build for
   quite some time yet again (at least since 2.6.0, that's over two year)
   indicating nobody has enough interest to fix the thing.  Same applies
   for the Globespan IVR (CONFIG_MIPS_IVR) board.  A while ago I already
   mentioned the IT8172 board as a candidate for removal; somebody
   (Fuxin?) objected but no fixes ...

So that's my current list of candidates for removal and there are probably
a few more good candidates.  Objections?  Or even better *PATCHES* [1] to
fix things?

  Ralf

[1] Sorry for mentioning the p-word ;-)

From fxzhang@ict.ac.cn Mon Apr  3 01:42:55 2006
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Subject: Re: stack backtrace
References: <442FE1CA.4030905@ict.ac.cn> <20060403.011711.74751665.anemo@mba.ocn.ne.jp>
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> The get_frame_info() in process.c in kernel 2.6.16 no longer depends
> on a frame pointer.  It would fit your needs better.  I think you can
> use it with slight modifications.
good news
> 
> BTW, Is there any point using -fno-omit-frame-pointer on MIPS now?
> CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y is better for MIPS, isn't it?
> 
> ---
> Atsushi Nemoto
> 
> 
> 

From chuckmeade@mindspring.com Mon Apr  3 05:00:28 2006
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From:	"Chuck Meade" <chuckmeade@mindspring.com>
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Subject: corruption of load instruction offset
Date:	Mon, 3 Apr 2006 00:12:46 -0400
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Hello,

I am seeing a very interesting/worrisome bug on an RM7965 cpu, which has
an E9000 core.  I am running 2.6.14-rc1.  Please take a look at the
behavior I describe and send me your thoughts.  Thanks.

The error message is immediately below.  Notice that the epc is 8021e28c,
and the BadVA is 87e39681, and register 4 (a0) is 87e38660.

Now scan down below the error message, to the disassembly of move_32bytes.
If you look at the instruction at 8021e28c, it appears harmless enough.  
Nothing to cause an unaligned access or invalid instruction.  But look
about 6 lines above that, and we are loading at offsets from a0.  The
offsets from a0 in those 4 load instructions are 16, 20, 24, and 28.  If
you look at the opcodes in the column to the left, those offsets appear in
the least significant 16 bits of the opcode.

Now look again at the value of a0 in the register dump:  87e38660.  And
at the BadVA value:  87e39681.  The BadVA is offset exactly 0x1021 from
a0.  This indicates that we somehow tried to access memory at offset 
0x1021 from a0.  However, we never should have done that according to
the disassembly.  *But* there are many instructions in the vicinity which
have a least significant 16 bits of 0x1021.  None of them are loads from a0,
but I believe that this is the root of the problem.  Something is happening
here, possibly an interrupt, or a cpu bug(?) that is causing the load from
a0 to use an offset of 0x1021 (the least significant 16-bits of many of
the nearby instructions) rather than the correct offset for the load
instruction, which is found in the least significant 16-bits of the actual
load instructions.

This is not "quickly" reproducible.  I run a TCP blaster/blastee test between
this machine and Linux PC, and at some point during the run (sometimes much
later) this error appears.

Thanks for your ideas,
Chuck

Error message:

Unhandled kernel unaligned access or invalid instruction in arch/mips/kernel/unaligned.c::emulate_load_store_insn, line 487[#1]:
Cpu 0
$ 0   : 00000000 10004ce8 00000000 00000000
$ 4   : 87e38660 000005a8 00000000 00000000
$ 8   : 00000000 00000000 00000020 00000000
$12   : 00000000 80402000 00000001 00000000
$16   : 00000000 87e171a0 000005a8 87c1f060
$20   : 87e380e0 004009e0 10004740 00002ad8
$24   : 00000008 803171c0
$28   : 8120a000 8120bd48 00000000 802deb30
Hi    : 0000000c
Lo    : 000d4bf8
epc   : 8021e28c move_32bytes+0x64/0x88     Not tainted
ra    : 802deb30 tcp_sendmsg+0x460/0xd80
Status: 90018403    KERNEL EXL IE
Cause : 00000010
BadVA : 87e39681
PrId  : 00003422
Modules linked in:
Process blaster (pid: 162, threadinfo=8120a000, task=8050b3f8)
Stack : 8120bdd0 00000000 812fd4a0 8120bdf0 8120bd70 87e18520 00000001 00000000
        8120be40 7fffffff 00000000 8120bf18 8120be14 00000000 000005a8 000005a8
        000032e8 00000001 00000000 90018400 8120be40 00005dc0 10001458 8120bf18
        00000005 004009e0 10011044 10010000 10010fd4 8028e7a8 00000020 ffffffff
        00000001 00000000 00005dc0 10001458 87e18520 00005dc0 812fd4a0 004009e0
        ...
Call Trace:
 [<8028e7a8>] sock_aio_write+0x10c/0x12c
 [<8016bef8>] do_sync_write+0xd0/0x128
 [<801037d4>] do_IRQ+0x24/0x34
 [<804203cc>] init+0xd8/0xe4
 [<8013cf78>] autoremove_wake_function+0x0/0x44
 [<8016c020>] vfs_write+0xd0/0x144
 [<8016c020>] vfs_write+0xd0/0x144
 [<8016c074>] vfs_write+0x124/0x144
 [<8016c150>] sys_write+0x24/0x98
 [<8016c180>] sys_write+0x54/0x98
 [<8016c154>] sys_write+0x28/0x98
 [<801037d4>] do_IRQ+0x24/0x34
 [<8010b260>] stack_done+0x20/0x3c



Disassembly of relevant portion of move_32bytes:

8021e228 <move_32bytes>:
8021e228:       8c880000        lw      t0,0(a0)
8021e22c:       8c890004        lw      t1,4(a0)
8021e230:       8c8b0008        lw      t3,8(a0)
8021e234:       8c8c000c        lw      t4,12(a0)
8021e238:       00481021        addu    v0,v0,t0
8021e23c:       0048182b        sltu    v1,v0,t0
8021e240:       00431021        addu    v0,v0,v1
8021e244:       00491021        addu    v0,v0,t1
8021e248:       0049182b        sltu    v1,v0,t1
8021e24c:       00431021        addu    v0,v0,v1
8021e250:       004b1021        addu    v0,v0,t3
8021e254:       004b182b        sltu    v1,v0,t3
8021e258:       00431021        addu    v0,v0,v1
8021e25c:       004c1021        addu    v0,v0,t4
8021e260:       004c182b        sltu    v1,v0,t4
8021e264:       00431021        addu    v0,v0,v1
8021e268:       8c880010        lw      t0,16(a0)
8021e26c:       8c890014        lw      t1,20(a0)
8021e270:       8c8b0018        lw      t3,24(a0)
8021e274:       8c8c001c        lw      t4,28(a0)
8021e278:       00481021        addu    v0,v0,t0
8021e27c:       0048182b        sltu    v1,v0,t0
8021e280:       00431021        addu    v0,v0,v1
8021e284:       00491021        addu    v0,v0,t1
8021e288:       0049182b        sltu    v1,v0,t1
8021e28c:       00431021        addu    v0,v0,v1
8021e290:       004b1021        addu    v0,v0,t3
8021e294:       004b182b        sltu    v1,v0,t3
8021e298:       00431021        addu    v0,v0,v1
8021e29c:       004c1021        addu    v0,v0,t4
8021e2a0:       004c182b        sltu    v1,v0,t4
8021e2a4:       00431021        addu    v0,v0,v1
8021e2a8:       30b8001c        andi    t8,a1,0x1c
8021e2ac:       24840020        addiu   a0,a0,32




From kevink@mips.com Mon Apr  3 08:11:44 2006
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From:	"Kevin D. Kissell" <kevink@mips.com>
To:	"Chuck Meade" <chuckmeade@mindspring.com>,
	<linux-mips@linux-mips.org>
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Subject: Re: corruption of load instruction offset
Date:	Mon, 3 Apr 2006 09:25:42 +0200
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That's pretty twisted - one could almost believe that the fetch from
0x8021e28c got corrupted to pick up the most significant 16 bits
of the instruction at 0x8021e22c or 0x8021e26c - but given that
instructions are fetched and issued word-by-word, it's hard to see
where that could happen, in either CPU hardware or software. 
What is the I-cache line size? If it  were me, I'd check my clocks, 
voltages, and above all my RAM timing, and I'd re-seat my CPU 
and RAM in their sockets...

            Regards,

            Kevin K.

----- Original Message ----- 
From: "Chuck Meade" <chuckmeade@mindspring.com>
To: <linux-mips@linux-mips.org>
Cc: "Chuck Meade (mindspring)" <chuckmeade@mindspring.com>
Sent: Monday, April 03, 2006 6:12 AM
Subject: corruption of load instruction offset


> Hello,
> 
> I am seeing a very interesting/worrisome bug on an RM7965 cpu, which has
> an E9000 core.  I am running 2.6.14-rc1.  Please take a look at the
> behavior I describe and send me your thoughts.  Thanks.
> 
> The error message is immediately below.  Notice that the epc is 8021e28c,
> and the BadVA is 87e39681, and register 4 (a0) is 87e38660.
> 
> Now scan down below the error message, to the disassembly of move_32bytes.
> If you look at the instruction at 8021e28c, it appears harmless enough.  
> Nothing to cause an unaligned access or invalid instruction.  But look
> about 6 lines above that, and we are loading at offsets from a0.  The
> offsets from a0 in those 4 load instructions are 16, 20, 24, and 28.  If
> you look at the opcodes in the column to the left, those offsets appear in
> the least significant 16 bits of the opcode.
> 
> Now look again at the value of a0 in the register dump:  87e38660.  And
> at the BadVA value:  87e39681.  The BadVA is offset exactly 0x1021 from
> a0.  This indicates that we somehow tried to access memory at offset 
> 0x1021 from a0.  However, we never should have done that according to
> the disassembly.  *But* there are many instructions in the vicinity which
> have a least significant 16 bits of 0x1021.  None of them are loads from a0,
> but I believe that this is the root of the problem.  Something is happening
> here, possibly an interrupt, or a cpu bug(?) that is causing the load from
> a0 to use an offset of 0x1021 (the least significant 16-bits of many of
> the nearby instructions) rather than the correct offset for the load
> instruction, which is found in the least significant 16-bits of the actual
> load instructions.
> 
> This is not "quickly" reproducible.  I run a TCP blaster/blastee test between
> this machine and Linux PC, and at some point during the run (sometimes much
> later) this error appears.
> 
> Thanks for your ideas,
> Chuck
> 
> Error message:
> 
> Unhandled kernel unaligned access or invalid instruction in arch/mips/kernel/unaligned.c::emulate_load_store_insn, line 487[#1]:
> Cpu 0
> $ 0   : 00000000 10004ce8 00000000 00000000
> $ 4   : 87e38660 000005a8 00000000 00000000
> $ 8   : 00000000 00000000 00000020 00000000
> $12   : 00000000 80402000 00000001 00000000
> $16   : 00000000 87e171a0 000005a8 87c1f060
> $20   : 87e380e0 004009e0 10004740 00002ad8
> $24   : 00000008 803171c0
> $28   : 8120a000 8120bd48 00000000 802deb30
> Hi    : 0000000c
> Lo    : 000d4bf8
> epc   : 8021e28c move_32bytes+0x64/0x88     Not tainted
> ra    : 802deb30 tcp_sendmsg+0x460/0xd80
> Status: 90018403    KERNEL EXL IE
> Cause : 00000010
> BadVA : 87e39681
> PrId  : 00003422
> Modules linked in:
> Process blaster (pid: 162, threadinfo=8120a000, task=8050b3f8)
> Stack : 8120bdd0 00000000 812fd4a0 8120bdf0 8120bd70 87e18520 00000001 00000000
>         8120be40 7fffffff 00000000 8120bf18 8120be14 00000000 000005a8 000005a8
>         000032e8 00000001 00000000 90018400 8120be40 00005dc0 10001458 8120bf18
>         00000005 004009e0 10011044 10010000 10010fd4 8028e7a8 00000020 ffffffff
>         00000001 00000000 00005dc0 10001458 87e18520 00005dc0 812fd4a0 004009e0
>         ...
> Call Trace:
>  [<8028e7a8>] sock_aio_write+0x10c/0x12c
>  [<8016bef8>] do_sync_write+0xd0/0x128
>  [<801037d4>] do_IRQ+0x24/0x34
>  [<804203cc>] init+0xd8/0xe4
>  [<8013cf78>] autoremove_wake_function+0x0/0x44
>  [<8016c020>] vfs_write+0xd0/0x144
>  [<8016c020>] vfs_write+0xd0/0x144
>  [<8016c074>] vfs_write+0x124/0x144
>  [<8016c150>] sys_write+0x24/0x98
>  [<8016c180>] sys_write+0x54/0x98
>  [<8016c154>] sys_write+0x28/0x98
>  [<801037d4>] do_IRQ+0x24/0x34
>  [<8010b260>] stack_done+0x20/0x3c
> 
> 
> 
> Disassembly of relevant portion of move_32bytes:
> 
> 8021e228 <move_32bytes>:
> 8021e228:       8c880000        lw      t0,0(a0)
> 8021e22c:       8c890004        lw      t1,4(a0)
> 8021e230:       8c8b0008        lw      t3,8(a0)
> 8021e234:       8c8c000c        lw      t4,12(a0)
> 8021e238:       00481021        addu    v0,v0,t0
> 8021e23c:       0048182b        sltu    v1,v0,t0
> 8021e240:       00431021        addu    v0,v0,v1
> 8021e244:       00491021        addu    v0,v0,t1
> 8021e248:       0049182b        sltu    v1,v0,t1
> 8021e24c:       00431021        addu    v0,v0,v1
> 8021e250:       004b1021        addu    v0,v0,t3
> 8021e254:       004b182b        sltu    v1,v0,t3
> 8021e258:       00431021        addu    v0,v0,v1
> 8021e25c:       004c1021        addu    v0,v0,t4
> 8021e260:       004c182b        sltu    v1,v0,t4
> 8021e264:       00431021        addu    v0,v0,v1
> 8021e268:       8c880010        lw      t0,16(a0)
> 8021e26c:       8c890014        lw      t1,20(a0)
> 8021e270:       8c8b0018        lw      t3,24(a0)
> 8021e274:       8c8c001c        lw      t4,28(a0)
> 8021e278:       00481021        addu    v0,v0,t0
> 8021e27c:       0048182b        sltu    v1,v0,t0
> 8021e280:       00431021        addu    v0,v0,v1
> 8021e284:       00491021        addu    v0,v0,t1
> 8021e288:       0049182b        sltu    v1,v0,t1
> 8021e28c:       00431021        addu    v0,v0,v1
> 8021e290:       004b1021        addu    v0,v0,t3
> 8021e294:       004b182b        sltu    v1,v0,t3
> 8021e298:       00431021        addu    v0,v0,v1
> 8021e29c:       004c1021        addu    v0,v0,t4
> 8021e2a0:       004c182b        sltu    v1,v0,t4
> 8021e2a4:       00431021        addu    v0,v0,v1
> 8021e2a8:       30b8001c        andi    t8,a1,0x1c
> 8021e2ac:       24840020        addiu   a0,a0,32
> 
> 
> 
> 
> 

From ralf@linux-mips.org Mon Apr  3 11:31:16 2006
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From:	Ralf Baechle <ralf@linux-mips.org>
To:	Chuck Meade <chuckmeade@mindspring.com>
Cc:	linux-mips@linux-mips.org
Subject: Re: corruption of load instruction offset
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On Mon, Apr 03, 2006 at 12:12:46AM -0400, Chuck Meade wrote:

> I am seeing a very interesting/worrisome bug on an RM7965 cpu, which has
> an E9000 core.  I am running 2.6.14-rc1.  Please take a look at the
> behavior I describe and send me your thoughts.  Thanks.

Well, 2.6.14-rc1.  The -rc1 part says it already.  While the rc may stand
for release candidate, they -rc1 kernels are definatly far from ready for
a release.  All the new features for the 2.6.14 but hardly any of the fixes.
I really suggest you go either for 2.6.13 or upgrade to 2.6.14.

Talking about upgrading, 2.6.16.1 is a good vintage for MIPS so far.

Aside of this more general warning about -rc but especially -rc1 kernels
I think the remainder of your analysis is correct ...

  Ralf

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--bJ3jXuwtxrXxD2iT
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Hello,

here a patch against Linuxmips-2.6.15 to fix the sleeping functions
for CPUs au1xxx.

Currently the sleep mode works but a lot of internal peripherals'
drivers miss the power management functions so is possibile that the
kernel hangs at wake up if some internal peripherals other than the
first serial line is enabled (expecially for the ethernet)!

However I'm working for a full support of sleep mode and I hope to be
able to send a patch to fix this in the near future...

Ciao,

Rodolfo

-- 

GNU/Linux Solutions                  e-mail:    giometti@enneenne.com
Linux Device Driver                             giometti@gnudd.com
Embedded Systems                     		giometti@linux.it
UNIX programming                     phone:     +39 349 2432127

--bJ3jXuwtxrXxD2iT
Content-Type: text/plain; charset=us-ascii
Content-Disposition: attachment; filename="patch-sleeper.S"

--- /home/develop/embedded/mips/linux/linux-mips.git/arch/mips/au1000/common/sleeper.S	2006-03-31 16:57:26.000000000 +0200
+++ arch/mips/au1000/common/sleeper.S	2006-03-31 16:26:35.000000000 +0200
@@ -9,22 +9,54 @@
  * Free Software Foundation;  either version 2 of the  License, or (at your
  * option) any later version.
  */
+#include <linux/config.h>
 #include <asm/asm.h>
 #include <asm/mipsregs.h>
 #include <asm/addrspace.h>
 #include <asm/regdef.h>
 #include <asm/stackframe.h>
+#include <asm/mach-au1x00/au1000.h>
+
+/*
+ * Note: This file is *not* conditional on CONFIG_PM since Alchemy sleep 
+ * need not be tied to any particular power management scheme.
+ */
+
+	.extern __flush_cache_all
 
 	.text
-	.set	macro
-	.set	noat
 	.align	5
 
-/* Save all of the processor general registers and go to sleep.
- * A wakeup condition will get us back here to restore the registers.
+/*
+ * Save the processor general registers and go to sleep. A wakeup
+ * condition will get us back here to restore the registers.
  */
-LEAF(save_and_sleep)
 
+/* still need to fix alignment issues here */
+save_and_sleep_frmsz = 48
+NESTED(save_and_sleep, save_and_sleep_frmsz, ra)
+	.set noreorder
+	.set nomacro
+	.set noat
+	subu sp, save_and_sleep_frmsz
+	sw ra, save_and_sleep_frmsz-4(sp)
+	sw s0, save_and_sleep_frmsz-8(sp)
+	sw s1, save_and_sleep_frmsz-12(sp)
+	sw s2, save_and_sleep_frmsz-16(sp)
+	sw s3, save_and_sleep_frmsz-20(sp)
+	sw s4, save_and_sleep_frmsz-24(sp)
+	sw s5, save_and_sleep_frmsz-28(sp)
+	sw s6, save_and_sleep_frmsz-32(sp)
+	sw s7, save_and_sleep_frmsz-36(sp)
+	sw s8, save_and_sleep_frmsz-40(sp)
+	sw gp, save_and_sleep_frmsz-44(sp)
+
+	/* We only need to save the registers that the calling function 
+	 * hasn't saved for us.  0 is always zero.  8 - 15, 24 and 25 are 
+	 * temporaries and can be used without saving. 26 and 27 are reserved 
+	 * for interrupt/trap handling and expected to change.  29 is the 
+	 * stack pointer which is handled as a special case here.
+	 */
 	subu	sp, PT_SIZE
 	sw	$1, PT_R1(sp)
 	sw	$2, PT_R2(sp)
@@ -33,14 +65,6 @@
 	sw	$5, PT_R5(sp)
 	sw	$6, PT_R6(sp)
 	sw	$7, PT_R7(sp)
-	sw	$8, PT_R8(sp)
-	sw	$9, PT_R9(sp)
-	sw	$10, PT_R10(sp)
-	sw	$11, PT_R11(sp)
-	sw	$12, PT_R12(sp)
-	sw	$13, PT_R13(sp)
-	sw	$14, PT_R14(sp)
-	sw	$15, PT_R15(sp)
 	sw	$16, PT_R16(sp)
 	sw	$17, PT_R17(sp)
 	sw	$18, PT_R18(sp)
@@ -49,32 +73,54 @@
 	sw	$21, PT_R21(sp)
 	sw	$22, PT_R22(sp)
 	sw	$23, PT_R23(sp)
-	sw	$24, PT_R24(sp)
-	sw	$25, PT_R25(sp)
-	sw	$26, PT_R26(sp)
-	sw	$27, PT_R27(sp)
 	sw	$28, PT_R28(sp)
-	sw	$29, PT_R29(sp)
 	sw	$30, PT_R30(sp)
 	sw	$31, PT_R31(sp)
+#define PT_C0STATUS PT_LO
+#define PT_CONTEXT PT_HI
+#define PT_PAGEMASK PT_EPC
+#define PT_CONFIG PT_BVADDR
 	mfc0	k0, CP0_STATUS
-	sw	k0, 0x20(sp)
+	sw	k0, PT_C0STATUS(sp) // 0x20
 	mfc0	k0, CP0_CONTEXT
-	sw	k0, 0x1c(sp)
+	sw	k0, PT_CONTEXT(sp) // 0x1c
 	mfc0	k0, CP0_PAGEMASK
-	sw	k0, 0x18(sp)
+	sw	k0, PT_PAGEMASK(sp) // 0x18
 	mfc0	k0, CP0_CONFIG
-	sw	k0, 0x14(sp)
+	sw	k0, PT_CONFIG(sp) // 0x14
+
+#if 0
+        /* Infinite loop to allow JTAG attach before sleep mode (debug only)
+         */
+2:      li      t1, 0
+        beq     t1, zero, 2b
+        nop
+#endif
+
+	.set macro
+	.set at
+
+	li	t0, SYS_SLPPWR
+	sw	zero, 0(t0)	/* Get the processor ready to sleep */
+	sync
 
 	/* Now set up the scratch registers so the boot rom will
 	 * return to this point upon wakeup.
+	 * sys_scratch0 : SP
+	 * sys_scratch1 : RA
 	 */
-	la	k0, 1f
-	lui	k1, 0xb190
-	ori	k1, 0x18
-	sw	sp, 0(k1)
-	ori 	k1, 0x1c
-	sw	k0, 0(k1)
+	li	t0, SYS_SCRATCH0
+	li	t1, SYS_SCRATCH1
+	sw	sp, 0(t0)
+	la	k0, resume_from_sleep
+	sw	k0, 0(t1)
+
+/* Flush DCACHE to make sure context is in memory
+*/
+	la 	t1, __flush_cache_all   /* _flush_cache_all is a function ptr */
+	lw 	t0,0(t1)
+	jal	t0
+	nop
 
 /* Put SDRAM into self refresh.  Preload instructions into cache,
  * issue a precharge, then auto refresh, then sleep commands to it.
@@ -87,30 +133,74 @@
  	cache	0x14, 96(t0)
 	.set	mips0
 
+	/* Put SDRAM to sleep */
 sdsleep:
-	lui 	k0, 0xb400
-	sw	zero, 0x001c(k0)	/* Precharge */
-	sw	zero, 0x0020(k0)	/* Auto refresh */
-	sw	zero, 0x0030(k0)	/* SDRAM sleep */
+	li 	a0, MEM_PHYS_ADDR
+	or 	a0, a0, 0xA0000000
+#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100) || defined(CONFIG_SOC_AU1500)
+	lw 	k0, MEM_SDMODE0(a0)
+	sw	zero, MEM_SDPRECMD(a0) 	/* Precharge */
+	sw	zero, MEM_SDAUTOREF(a0)	/* Auto Refresh */
+	sw	zero, MEM_SDSLEEP(a0)  	/* Sleep */
 	sync
-
-	lui 	k1, 0xb190
-	sw	zero, 0x0078(k1)	/* get ready  to sleep */
+#endif
+#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
+	sw	zero, MEM_SDPRECMD(a0) 	/* Precharge */
+	sw 	zero, MEM_SDSREF(a0)
+	
+	#lw 	t0, MEM_SDSTAT(a0)
+	#and	t0, t0, 0x01000000
+	li 	t0, 0x01000000
+refresh_not_set:
+	lw 	t1, MEM_SDSTAT(a0)
+	and	t2, t1, t0
+	beq	zero, t2, refresh_not_set
+	nop
+
+	li	t0, ~0x30000000
+	lw 	t1, MEM_SDCONFIGA(a0)
+	and	t1, t0, t1
+	sw 	t1, MEM_SDCONFIGA(a0)
 	sync
-	sw	zero, 0x007c(k1)	/* Put processor to sleep */
+#endif
+
+	li	t0, SYS_SLEEP
+	sw	zero, 0(t0)	/* Put processor to sleep */
 	sync
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
 
 	/* This is where we return upon wakeup.
 	 * Reload all of the registers and return.
 	 */
-1:	nop
-	lw	k0, 0x20(sp)
+resume_from_sleep:
+	nop
+	.set nomacro
+	.set noat
+
+#if 0
+        /* Infinite loop to allow JTAG attach before sleep mode (debug only)
+         */
+2:      li      t1, 0
+        beq     t1, zero, 2b
+        nop
+#endif
+
+	/* Restore CPU registers
+	 */
+	lw	k0, PT_C0STATUS(sp) // 0x20
 	mtc0	k0, CP0_STATUS
-	lw	k0, 0x1c(sp)
+	lw	k0, PT_CONTEXT(sp) // 0x1c
 	mtc0	k0, CP0_CONTEXT
-	lw	k0, 0x18(sp)
+	lw	k0, PT_PAGEMASK(sp) // 0x18
 	mtc0	k0, CP0_PAGEMASK
-	lw	k0, 0x14(sp)
+	lw	k0, PT_CONFIG(sp) // 0x14
 	mtc0	k0, CP0_CONFIG
 	lw	$1, PT_R1(sp)
 	lw	$2, PT_R2(sp)
@@ -119,14 +209,6 @@
 	lw	$5, PT_R5(sp)
 	lw	$6, PT_R6(sp)
 	lw	$7, PT_R7(sp)
-	lw	$8, PT_R8(sp)
-	lw	$9, PT_R9(sp)
-	lw	$10, PT_R10(sp)
-	lw	$11, PT_R11(sp)
-	lw	$12, PT_R12(sp)
-	lw	$13, PT_R13(sp)
-	lw	$14, PT_R14(sp)
-	lw	$15, PT_R15(sp)
 	lw	$16, PT_R16(sp)
 	lw	$17, PT_R17(sp)
 	lw	$18, PT_R18(sp)
@@ -135,15 +217,37 @@
 	lw	$21, PT_R21(sp)
 	lw	$22, PT_R22(sp)
 	lw	$23, PT_R23(sp)
-	lw	$24, PT_R24(sp)
-	lw	$25, PT_R25(sp)
-	lw	$26, PT_R26(sp)
-	lw	$27, PT_R27(sp)
 	lw	$28, PT_R28(sp)
-	lw	$29, PT_R29(sp)
 	lw	$30, PT_R30(sp)
 	lw	$31, PT_R31(sp)
+
+	.set macro
+	.set at
+
+	/* Clear the wake source, but save it as the return value of the
+           function */
+	li	t0, SYS_WAKESRC
+	lw	v0, 0(t0)
+	sw	v0, PT_R2(sp)
+	sw	zero, 0(t0)
+
 	addiu	sp, PT_SIZE
 
+	lw gp, save_and_sleep_frmsz-44(sp)
+	lw s8, save_and_sleep_frmsz-40(sp)
+	lw s7, save_and_sleep_frmsz-36(sp)
+	lw s6, save_and_sleep_frmsz-32(sp)
+	lw s5, save_and_sleep_frmsz-28(sp)
+	lw s4, save_and_sleep_frmsz-24(sp)
+	lw s3, save_and_sleep_frmsz-20(sp)
+	lw s2, save_and_sleep_frmsz-16(sp)
+	lw s1, save_and_sleep_frmsz-12(sp)
+	lw s0, save_and_sleep_frmsz-8(sp)
+	lw ra, save_and_sleep_frmsz-4(sp)
+
+	addu sp, save_and_sleep_frmsz
 	jr	ra
+	nop
+	.set reorder
 END(save_and_sleep)
+

--bJ3jXuwtxrXxD2iT--

From chuckmeade@mindspring.com Mon Apr  3 15:25:09 2006
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From:	"Chuck Meade" <chuckmeade@mindspring.com>
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Cc:	"Chuck Meade \(mindspring\)" <chuckmeade@mindspring.com>
Subject: RE: corruption of load instruction offset
Date:	Mon, 3 Apr 2006 10:37:40 -0400
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Hi,

> That's pretty twisted - one could almost believe that the fetch from
> 0x8021e28c got corrupted to pick up the most significant 16 bits
> of the instruction at 0x8021e22c or 0x8021e26c - but given that
> instructions are fetched and issued word-by-word, it's hard to see
> where that could happen, in either CPU hardware or software. 
> What is the I-cache line size? If it  were me, I'd check my clocks, 
> voltages, and above all my RAM timing, and I'd re-seat my CPU 
> and RAM in their sockets...

I agree that it is twisted.  The I-cache line size is 32 bytes by the way.

I left it running overnight and got a different error.  Slightly harder to
pinpoint the exact instruction that caused the actual bad load, because the
failing instruction is loading indirect thru a register that is set to 0000fac4.
So the bad load was done previously, and resulted in this register (a1) being
set to 0000fac4.

The common theme here seems to be that I am getting a bad 16-bits of RAM when
loading...  First error that I mentioned last night was an instruction load,
and this new error looks more to me like a data load, since a1 was previously
loaded with a bogus value 0000fac4.  Another bad 16-bit load in the most
significant 16-bits.

So if my analysis is correct, the most significant 16 bits is loading flaky,
both for instructions and for data loads.  This points to some of the lower
level issues you mention -- physical RAM interface, clocking, voltages, and
RAM timing setup.  If anyone can think of something else I should check, let
me know.

Thanks again for the feedback.

Also Ralf, I got your message about the 2.6.14-rc1 version loud and clear.
Thanks to you too for the feedback.

Chuck



From yoichi_yuasa@tripeaks.co.jp Tue Apr  4 02:11:21 2006
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Date:	Tue, 4 Apr 2006 10:22:21 +0900
From:	Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
To:	linux-mips@linux-mips.org
Subject: build error about current git
Message-Id: <20060404102221.5280f199.yoichi_yuasa@tripeaks.co.jp>
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Hi,

I got the following error, when I built the kernel using current git.

Yoichi

$ make tb0287_defconfig
.
.
.
gcc: 0: No such file or directory
gcc: unrecognized option `-G'
gcc: unrecognized option `-EL'
cc1: error: invalid option `no-abicalls'

$ make
gcc: 0: No such file or directory
gcc: unrecognized option `-G'
gcc: unrecognized option `-EL'
cc1: error: invalid option `no-abicalls'
  CHK     include/linux/version.h
  HOSTCC  scripts/basic/fixdep
  HOSTCC  scripts/basic/split-include
  HOSTCC  scripts/basic/docproc
  HOSTCC  scripts/kconfig/conf.o
  HOSTCC  scripts/kconfig/kxgettext.o
  HOSTCC  scripts/kconfig/mconf.o
  HOSTCC  scripts/kconfig/zconf.tab.o
  HOSTLD  scripts/kconfig/conf
scripts/kconfig/conf -s arch/mips/Kconfig
#
# using defaults found in .config
#
gcc: 0: No such file or directory
gcc: unrecognized option `-G'
gcc: unrecognized option `-EL'
cc1: error: invalid option `no-abicalls'
  SPLIT   include/linux/autoconf.h -> include/config/*
  CC      arch/mips/kernel/asm-offsets.s
gcc: cannot specify -o with -c or -S and multiple compilations
make[1]: *** [arch/mips/kernel/asm-offsets.s] Error 1
make: *** [prepare0] Error 2

$ gcc -v
Reading specs from /usr/lib/gcc-lib/i486-linux/3.3.5/specs
Configured with: ../src/configure -v --enable-languages=c,c++,java,f77,pascal,objc,ada,treelang --prefix=/usr --mandir=/usr/share/man --infodir=/usr/share/info --with-gxx-include-dir=/usr/include/c++/3.3 --enable-shared --enable-__cxa_atexit --with-system-zlib --enable-nls --without-included-gettext --enable-clocale=gnu --enable-debug --enable-java-gc=boehm --enable-java-awt=xlib --enable-objc-gc i486-linux
Thread model: posix
gcc version 3.3.5 (Debian 1:3.3.5-13)


From geoman@gentoo.org Tue Apr  4 02:53:09 2006
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Yoichi Yuasa wrote:
> Hi,
> 
> I got the following error, when I built the kernel using current git.
> 
> Yoichi

Why don't you take a closer look at the output of "gcc -v" which you
pasted below, and then you tell us why your x86 toolchain can't build a
mips kernel.

-Steve

> $ gcc -v
> Reading specs from /usr/lib/gcc-lib/i486-linux/3.3.5/specs
> Configured with: ../src/configure -v --enable-languages=c,c++,java,f77,pascal,objc,ada,treelang --prefix=/usr --mandir=/usr/share/man --infodir=/usr/share/info --with-gxx-include-dir=/usr/include/c++/3.3 --enable-shared --enable-__cxa_atexit --with-system-zlib --enable-nls --without-included-gettext --enable-clocale=gnu --enable-debug --enable-java-gc=boehm --enable-java-awt=xlib --enable-objc-gc i486-linux
> Thread model: posix
> gcc version 3.3.5 (Debian 1:3.3.5-13)
> 
> 
> 


From yoichi_yuasa@tripeaks.co.jp Tue Apr  4 04:41:42 2006
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Date:	Tue, 4 Apr 2006 12:52:42 +0900
From:	Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
To:	"Stephen P. Becker" <geoman@gentoo.org>
Cc:	yoichi_yuasa@tripeaks.co.jp, linux-mips@linux-mips.org
Subject: Re: build error about current git
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Hi,

On Mon, 03 Apr 2006 22:04:03 -0400
"Stephen P. Becker" <geoman@gentoo.org> wrote:

> Yoichi Yuasa wrote:
> > Hi,
> > 
> > I got the following error, when I built the kernel using current git.
> > 
> > Yoichi
> 
> Why don't you take a closer look at the output of "gcc -v" which you
> pasted below, and then you tell us why your x86 toolchain can't build a
> mips kernel.

Because, the first error occurs in using HOSTCC. 

mips toolchain is

$ mipsel-linux-gcc -v
Reading specs from /usr/local/cross/lib/gcc-lib/mipsel-linux/3.3.2/specs
Configured with: ../gcc-3.3.2/configure --target=mipsel-linux --prefix=/usr/local/cross --enable-languages=c --without-headers --disable-shared --disable-threads : (reconfigured) ../gcc-3.3.2/configure --target=mipsel-linux --prefix=/usr/local/cross --enable-languages=c --without-headers --disable-shared --disable-threads : (reconfigured) ../gcc-3.3.2/configure --target=mipsel-linux --prefix=/usr/local/cross --enable-languages=c --without-headers --disable-shared --disable-threads : (reconfigured) ../gcc-3.3.2/configure --target=mipsel-linux --prefix=/usr/local/cross --enable-languages=c --disable-shared
Thread model: posix
gcc version 3.3.2

Yoichi

From anemo@mba.ocn.ne.jp Tue Apr  4 05:00:44 2006
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Message-Id: <20060404.131145.130849545.nemoto@toshiba-tops.co.jp>
To:	linux-mips@linux-mips.org
Cc:	ralf@linux-mips.org
Subject: [PATCH] Enable SCHED_NO_NO_OMIT_FRAME_POINTER for MIPS.
From:	Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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MIPS get_wchan() no longer requires -fno-omit-frame-pointer.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>

 Kconfig                         |    4 ++++
 configs/atlas_defconfig         |    1 +
 configs/bigsur_defconfig        |    1 +
 configs/capcella_defconfig      |    1 +
 configs/cobalt_defconfig        |    1 +
 configs/db1000_defconfig        |    1 +
 configs/db1100_defconfig        |    1 +
 configs/db1200_defconfig        |    1 +
 configs/db1500_defconfig        |    1 +
 configs/db1550_defconfig        |    1 +
 configs/ddb5476_defconfig       |    1 +
 configs/ddb5477_defconfig       |    1 +
 configs/decstation_defconfig    |    1 +
 configs/e55_defconfig           |    1 +
 configs/ev64120_defconfig       |    1 +
 configs/ev96100_defconfig       |    1 +
 configs/ip22_defconfig          |    1 +
 configs/ip27_defconfig          |    1 +
 configs/ip32_defconfig          |    1 +
 configs/it8172_defconfig        |    1 +
 configs/ivr_defconfig           |    1 +
 configs/jaguar-atx_defconfig    |    1 +
 configs/jmr3927_defconfig       |    1 +
 configs/lasat200_defconfig      |    1 +
 configs/malta_defconfig         |    1 +
 configs/mipssim_defconfig       |    1 +
 configs/mpc30x_defconfig        |    1 +
 configs/ocelot_3_defconfig      |    1 +
 configs/ocelot_c_defconfig      |    1 +
 configs/ocelot_defconfig        |    1 +
 configs/ocelot_g_defconfig      |    1 +
 configs/pb1100_defconfig        |    1 +
 configs/pb1500_defconfig        |    1 +
 configs/pb1550_defconfig        |    1 +
 configs/pnx8550-jbs_defconfig   |    1 +
 configs/pnx8550-v2pci_defconfig |    1 +
 configs/qemu_defconfig          |    1 +
 configs/rbhma4500_defconfig     |    1 +
 configs/rm200_defconfig         |    1 +
 configs/sb1250-swarm_defconfig  |    1 +
 configs/sead_defconfig          |    1 +
 configs/tb0226_defconfig        |    1 +
 configs/tb0229_defconfig        |    1 +
 configs/tb0287_defconfig        |    1 +
 configs/workpad_defconfig       |    1 +
 configs/yosemite_defconfig      |    1 +
 defconfig                       |    1 +
 47 files changed, 50 insertions(+)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index ed52af7..c4d66ba 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -813,6 +813,10 @@ config GENERIC_CALIBRATE_DELAY
 	bool
 	default y
 
+config SCHED_NO_NO_OMIT_FRAME_POINTER
+	bool
+	default y
+
 #
 # Select some configuration options automatically based on user selections.
 #
diff --git a/arch/mips/configs/atlas_defconfig b/arch/mips/configs/atlas_defconfig
index 9e1ae95..80da9c8 100644
--- a/arch/mips/configs/atlas_defconfig
+++ b/arch/mips/configs/atlas_defconfig
@@ -65,6 +65,7 @@ CONFIG_MIPS_ATLAS=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 CONFIG_MIPS_BONITO64=y
diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig
index 3298410..05566a2 100644
--- a/arch/mips/configs/bigsur_defconfig
+++ b/arch/mips/configs/bigsur_defconfig
@@ -81,6 +81,7 @@ CONFIG_SIBYTE_CFE=y
 # CONFIG_SIBYTE_TBPROF is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_COHERENT=y
 CONFIG_CPU_BIG_ENDIAN=y
 # CONFIG_CPU_LITTLE_ENDIAN is not set
diff --git a/arch/mips/configs/capcella_defconfig b/arch/mips/configs/capcella_defconfig
index 6c2961a..a69dafb 100644
--- a/arch/mips/configs/capcella_defconfig
+++ b/arch/mips/configs/capcella_defconfig
@@ -73,6 +73,7 @@ CONFIG_PCI_VR41XX=y
 # CONFIG_VRC4173 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 # CONFIG_CPU_BIG_ENDIAN is not set
diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig
index 8336b21..6a4940b 100644
--- a/arch/mips/configs/cobalt_defconfig
+++ b/arch/mips/configs/cobalt_defconfig
@@ -65,6 +65,7 @@ CONFIG_MIPS_COBALT=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 CONFIG_I8259=y
diff --git a/arch/mips/configs/db1000_defconfig b/arch/mips/configs/db1000_defconfig
index 7f07140..6d7bcc0 100644
--- a/arch/mips/configs/db1000_defconfig
+++ b/arch/mips/configs/db1000_defconfig
@@ -65,6 +65,7 @@ CONFIG_MIPS_DB1000=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 # CONFIG_CPU_BIG_ENDIAN is not set
diff --git a/arch/mips/configs/db1100_defconfig b/arch/mips/configs/db1100_defconfig
index 98590ca..acd2ffe 100644
--- a/arch/mips/configs/db1100_defconfig
+++ b/arch/mips/configs/db1100_defconfig
@@ -65,6 +65,7 @@ CONFIG_MIPS_DB1100=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 # CONFIG_CPU_BIG_ENDIAN is not set
diff --git a/arch/mips/configs/db1200_defconfig b/arch/mips/configs/db1200_defconfig
index 9288847..d918754 100644
--- a/arch/mips/configs/db1200_defconfig
+++ b/arch/mips/configs/db1200_defconfig
@@ -65,6 +65,7 @@ CONFIG_MIPS_DB1200=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_COHERENT=y
 CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y
 # CONFIG_CPU_BIG_ENDIAN is not set
diff --git a/arch/mips/configs/db1500_defconfig b/arch/mips/configs/db1500_defconfig
index 5a415b1..5491a51 100644
--- a/arch/mips/configs/db1500_defconfig
+++ b/arch/mips/configs/db1500_defconfig
@@ -65,6 +65,7 @@ CONFIG_MIPS_DB1500=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y
diff --git a/arch/mips/configs/db1550_defconfig b/arch/mips/configs/db1550_defconfig
index 8dc1f18..425d939 100644
--- a/arch/mips/configs/db1550_defconfig
+++ b/arch/mips/configs/db1550_defconfig
@@ -65,6 +65,7 @@ CONFIG_MIPS_DB1550=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y
diff --git a/arch/mips/configs/ddb5476_defconfig b/arch/mips/configs/ddb5476_defconfig
index 8fae63e..4837b3c 100644
--- a/arch/mips/configs/ddb5476_defconfig
+++ b/arch/mips/configs/ddb5476_defconfig
@@ -65,6 +65,7 @@ CONFIG_DDB5476=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 CONFIG_I8259=y
diff --git a/arch/mips/configs/ddb5477_defconfig b/arch/mips/configs/ddb5477_defconfig
index a0fcd44..e3a3786 100644
--- a/arch/mips/configs/ddb5477_defconfig
+++ b/arch/mips/configs/ddb5477_defconfig
@@ -66,6 +66,7 @@ CONFIG_DDB5477=y
 CONFIG_DDB5477_BUS_FREQUENCY=0
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 CONFIG_I8259=y
diff --git a/arch/mips/configs/decstation_defconfig b/arch/mips/configs/decstation_defconfig
index 5a181ea..b5b44a8 100644
--- a/arch/mips/configs/decstation_defconfig
+++ b/arch/mips/configs/decstation_defconfig
@@ -65,6 +65,7 @@ CONFIG_MACH_DECSTATION=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 CONFIG_EARLY_PRINTK=y
diff --git a/arch/mips/configs/e55_defconfig b/arch/mips/configs/e55_defconfig
index 8fbfc06..263cc38 100644
--- a/arch/mips/configs/e55_defconfig
+++ b/arch/mips/configs/e55_defconfig
@@ -71,6 +71,7 @@ CONFIG_CASIO_E55=y
 # CONFIG_ZAO_CAPCELLA is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 # CONFIG_CPU_BIG_ENDIAN is not set
diff --git a/arch/mips/configs/ev64120_defconfig b/arch/mips/configs/ev64120_defconfig
index f2d43be..e0d7e07 100644
--- a/arch/mips/configs/ev64120_defconfig
+++ b/arch/mips/configs/ev64120_defconfig
@@ -66,6 +66,7 @@ CONFIG_MIPS_EV64120=y
 # CONFIG_EVB_PCI1 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 CONFIG_CPU_BIG_ENDIAN=y
diff --git a/arch/mips/configs/ev96100_defconfig b/arch/mips/configs/ev96100_defconfig
index ac5841c..095bfe3 100644
--- a/arch/mips/configs/ev96100_defconfig
+++ b/arch/mips/configs/ev96100_defconfig
@@ -65,6 +65,7 @@ CONFIG_MIPS_EV96100=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 CONFIG_CPU_BIG_ENDIAN=y
diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig
index 42d5cd7..f66ba91 100644
--- a/arch/mips/configs/ip22_defconfig
+++ b/arch/mips/configs/ip22_defconfig
@@ -65,6 +65,7 @@ CONFIG_SGI_IP22=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_ARC=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig
index 8c40590..33f18c6 100644
--- a/arch/mips/configs/ip27_defconfig
+++ b/arch/mips/configs/ip27_defconfig
@@ -71,6 +71,7 @@ CONFIG_NUMA=y
 # CONFIG_REPLICATE_EXHANDLERS is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_ARC=y
 CONFIG_DMA_IP27=y
 CONFIG_CPU_BIG_ENDIAN=y
diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig
index 7fdcaf5..2b8f223 100644
--- a/arch/mips/configs/ip32_defconfig
+++ b/arch/mips/configs/ip32_defconfig
@@ -65,6 +65,7 @@ CONFIG_SGI_IP32=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_ARC=y
 CONFIG_DMA_IP32=y
 CONFIG_DMA_NONCOHERENT=y
diff --git a/arch/mips/configs/it8172_defconfig b/arch/mips/configs/it8172_defconfig
index c716996..a5ac713 100644
--- a/arch/mips/configs/it8172_defconfig
+++ b/arch/mips/configs/it8172_defconfig
@@ -66,6 +66,7 @@ CONFIG_MIPS_ITE8172=y
 # CONFIG_IT8172_REVC is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 # CONFIG_CPU_BIG_ENDIAN is not set
diff --git a/arch/mips/configs/ivr_defconfig b/arch/mips/configs/ivr_defconfig
index a8376d1..3cf9750 100644
--- a/arch/mips/configs/ivr_defconfig
+++ b/arch/mips/configs/ivr_defconfig
@@ -65,6 +65,7 @@ CONFIG_MIPS_IVR=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 # CONFIG_CPU_BIG_ENDIAN is not set
diff --git a/arch/mips/configs/jaguar-atx_defconfig b/arch/mips/configs/jaguar-atx_defconfig
index 3160153..9f6303d 100644
--- a/arch/mips/configs/jaguar-atx_defconfig
+++ b/arch/mips/configs/jaguar-atx_defconfig
@@ -66,6 +66,7 @@ CONFIG_MOMENCO_JAGUAR_ATX=y
 CONFIG_JAGUAR_DMALOW=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 CONFIG_LIMITED_DMA=y
diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig
index 53fbef1..a2ce2e1 100644
--- a/arch/mips/configs/jmr3927_defconfig
+++ b/arch/mips/configs/jmr3927_defconfig
@@ -65,6 +65,7 @@ CONFIG_TOSHIBA_JMR3927=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 CONFIG_CPU_BIG_ENDIAN=y
diff --git a/arch/mips/configs/lasat200_defconfig b/arch/mips/configs/lasat200_defconfig
index ef0fa9f..d742529 100644
--- a/arch/mips/configs/lasat200_defconfig
+++ b/arch/mips/configs/lasat200_defconfig
@@ -69,6 +69,7 @@ CONFIG_DS1603=y
 CONFIG_LASAT_SYSCTL=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 CONFIG_MIPS_NILE4=y
diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig
index 367d279..50c8679 100644
--- a/arch/mips/configs/malta_defconfig
+++ b/arch/mips/configs/malta_defconfig
@@ -65,6 +65,7 @@ CONFIG_MIPS_MALTA=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_ARCH_MAY_HAVE_PC_FDC=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
diff --git a/arch/mips/configs/mipssim_defconfig b/arch/mips/configs/mipssim_defconfig
index fe78961..4b3342c 100644
--- a/arch/mips/configs/mipssim_defconfig
+++ b/arch/mips/configs/mipssim_defconfig
@@ -65,6 +65,7 @@ CONFIG_MIPS_SIM=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 # CONFIG_CPU_BIG_ENDIAN is not set
diff --git a/arch/mips/configs/mpc30x_defconfig b/arch/mips/configs/mpc30x_defconfig
index e4620e7..3e75368 100644
--- a/arch/mips/configs/mpc30x_defconfig
+++ b/arch/mips/configs/mpc30x_defconfig
@@ -73,6 +73,7 @@ CONFIG_PCI_VR41XX=y
 CONFIG_VRC4173=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 # CONFIG_CPU_BIG_ENDIAN is not set
diff --git a/arch/mips/configs/ocelot_3_defconfig b/arch/mips/configs/ocelot_3_defconfig
index 925d8ad..4197ac3 100644
--- a/arch/mips/configs/ocelot_3_defconfig
+++ b/arch/mips/configs/ocelot_3_defconfig
@@ -65,6 +65,7 @@ CONFIG_MOMENCO_OCELOT_3=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 CONFIG_CPU_BIG_ENDIAN=y
diff --git a/arch/mips/configs/ocelot_c_defconfig b/arch/mips/configs/ocelot_c_defconfig
index ee1cf9b..da777cb 100644
--- a/arch/mips/configs/ocelot_c_defconfig
+++ b/arch/mips/configs/ocelot_c_defconfig
@@ -65,6 +65,7 @@ CONFIG_MOMENCO_OCELOT_C=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 CONFIG_CPU_BIG_ENDIAN=y
diff --git a/arch/mips/configs/ocelot_defconfig b/arch/mips/configs/ocelot_defconfig
index d80ff27..9ff6ab5 100644
--- a/arch/mips/configs/ocelot_defconfig
+++ b/arch/mips/configs/ocelot_defconfig
@@ -65,6 +65,7 @@ CONFIG_MOMENCO_OCELOT=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 CONFIG_CPU_BIG_ENDIAN=y
diff --git a/arch/mips/configs/ocelot_g_defconfig b/arch/mips/configs/ocelot_g_defconfig
index c0f508d..7df9ce9 100644
--- a/arch/mips/configs/ocelot_g_defconfig
+++ b/arch/mips/configs/ocelot_g_defconfig
@@ -65,6 +65,7 @@ CONFIG_MOMENCO_OCELOT_G=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 CONFIG_CPU_BIG_ENDIAN=y
diff --git a/arch/mips/configs/pb1100_defconfig b/arch/mips/configs/pb1100_defconfig
index 194b3c7..fc28746 100644
--- a/arch/mips/configs/pb1100_defconfig
+++ b/arch/mips/configs/pb1100_defconfig
@@ -65,6 +65,7 @@ CONFIG_MIPS_PB1100=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 # CONFIG_CPU_BIG_ENDIAN is not set
diff --git a/arch/mips/configs/pb1500_defconfig b/arch/mips/configs/pb1500_defconfig
index 8985725..a09be54 100644
--- a/arch/mips/configs/pb1500_defconfig
+++ b/arch/mips/configs/pb1500_defconfig
@@ -65,6 +65,7 @@ CONFIG_MIPS_PB1500=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 # CONFIG_CPU_BIG_ENDIAN is not set
diff --git a/arch/mips/configs/pb1550_defconfig b/arch/mips/configs/pb1550_defconfig
index adbf997..b8bcbc2 100644
--- a/arch/mips/configs/pb1550_defconfig
+++ b/arch/mips/configs/pb1550_defconfig
@@ -65,6 +65,7 @@ CONFIG_MIPS_PB1550=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y
diff --git a/arch/mips/configs/pnx8550-jbs_defconfig b/arch/mips/configs/pnx8550-jbs_defconfig
index b5db700..91ff3ba 100644
--- a/arch/mips/configs/pnx8550-jbs_defconfig
+++ b/arch/mips/configs/pnx8550-jbs_defconfig
@@ -65,6 +65,7 @@ CONFIG_PNX8550_JBS=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 # CONFIG_CPU_BIG_ENDIAN is not set
diff --git a/arch/mips/configs/pnx8550-v2pci_defconfig b/arch/mips/configs/pnx8550-v2pci_defconfig
index 4187287..932c803 100644
--- a/arch/mips/configs/pnx8550-v2pci_defconfig
+++ b/arch/mips/configs/pnx8550-v2pci_defconfig
@@ -65,6 +65,7 @@ CONFIG_PNX8550_V2PCI=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 # CONFIG_CPU_BIG_ENDIAN is not set
diff --git a/arch/mips/configs/qemu_defconfig b/arch/mips/configs/qemu_defconfig
index 31f5afa..0d3ce64 100644
--- a/arch/mips/configs/qemu_defconfig
+++ b/arch/mips/configs/qemu_defconfig
@@ -65,6 +65,7 @@ CONFIG_QEMU=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_COHERENT=y
 CONFIG_GENERIC_ISA_DMA=y
 CONFIG_I8259=y
diff --git a/arch/mips/configs/rbhma4500_defconfig b/arch/mips/configs/rbhma4500_defconfig
index b126f76..0ad74a5 100644
--- a/arch/mips/configs/rbhma4500_defconfig
+++ b/arch/mips/configs/rbhma4500_defconfig
@@ -72,6 +72,7 @@ CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61=y
 # CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 CONFIG_GENERIC_ISA_DMA=y
diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig
index 463ed3d..fab27fe 100644
--- a/arch/mips/configs/rm200_defconfig
+++ b/arch/mips/configs/rm200_defconfig
@@ -65,6 +65,7 @@ CONFIG_SNI_RM200_PCI=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_ARC=y
 CONFIG_ARCH_MAY_HAVE_PC_FDC=y
 CONFIG_DMA_NONCOHERENT=y
diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig
index da68c3f..9060622 100644
--- a/arch/mips/configs/sb1250-swarm_defconfig
+++ b/arch/mips/configs/sb1250-swarm_defconfig
@@ -82,6 +82,7 @@ CONFIG_SIBYTE_CFE=y
 # CONFIG_SIBYTE_TBPROF is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_COHERENT=y
 CONFIG_CPU_BIG_ENDIAN=y
 # CONFIG_CPU_LITTLE_ENDIAN is not set
diff --git a/arch/mips/configs/sead_defconfig b/arch/mips/configs/sead_defconfig
index 9a936d7..de02881 100644
--- a/arch/mips/configs/sead_defconfig
+++ b/arch/mips/configs/sead_defconfig
@@ -65,6 +65,7 @@ CONFIG_MIPS_SEAD=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 # CONFIG_CPU_BIG_ENDIAN is not set
diff --git a/arch/mips/configs/tb0226_defconfig b/arch/mips/configs/tb0226_defconfig
index c2dee0d..8f4f06c 100644
--- a/arch/mips/configs/tb0226_defconfig
+++ b/arch/mips/configs/tb0226_defconfig
@@ -75,6 +75,7 @@ CONFIG_PCI_VR41XX=y
 # CONFIG_VRC4173 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 # CONFIG_CPU_BIG_ENDIAN is not set
diff --git a/arch/mips/configs/tb0229_defconfig b/arch/mips/configs/tb0229_defconfig
index be99261..5f54e27 100644
--- a/arch/mips/configs/tb0229_defconfig
+++ b/arch/mips/configs/tb0229_defconfig
@@ -75,6 +75,7 @@ CONFIG_PCI_VR41XX=y
 # CONFIG_VRC4173 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 # CONFIG_CPU_BIG_ENDIAN is not set
diff --git a/arch/mips/configs/tb0287_defconfig b/arch/mips/configs/tb0287_defconfig
index 8a1e3ac..fe3ba4f 100644
--- a/arch/mips/configs/tb0287_defconfig
+++ b/arch/mips/configs/tb0287_defconfig
@@ -75,6 +75,7 @@ CONFIG_PCI_VR41XX=y
 # CONFIG_VRC4173 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 # CONFIG_CPU_BIG_ENDIAN is not set
diff --git a/arch/mips/configs/workpad_defconfig b/arch/mips/configs/workpad_defconfig
index 7132e29..bd5bd46 100644
--- a/arch/mips/configs/workpad_defconfig
+++ b/arch/mips/configs/workpad_defconfig
@@ -71,6 +71,7 @@ CONFIG_IBM_WORKPAD=y
 # CONFIG_ZAO_CAPCELLA is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 # CONFIG_CPU_BIG_ENDIAN is not set
diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig
index 6745785..2c0c25e 100644
--- a/arch/mips/configs/yosemite_defconfig
+++ b/arch/mips/configs/yosemite_defconfig
@@ -66,6 +66,7 @@ CONFIG_PMC_YOSEMITE=y
 # CONFIG_HYPERTRANSPORT is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_DMA_COHERENT=y
 CONFIG_CPU_BIG_ENDIAN=y
 # CONFIG_CPU_LITTLE_ENDIAN is not set
diff --git a/arch/mips/defconfig b/arch/mips/defconfig
index 42d5cd7..f66ba91 100644
--- a/arch/mips/defconfig
+++ b/arch/mips/defconfig
@@ -65,6 +65,7 @@ CONFIG_SGI_IP22=y
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
 CONFIG_ARC=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y

From anemo@mba.ocn.ne.jp Tue Apr  4 09:23:12 2006
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To:	linux-mips@linux-mips.org
Cc:	ralf@linux-mips.org
Subject: [PATCH] tx49_blast_icache32_page_indexed fix
From:	Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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Fix an index value in tx49_blast_icache32_page_indexed().
This is a damage by 13acfa3fdef15edaa4f5444c68e28e05978afa08 commit.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>

diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 32b7f6a..c4c2084 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -154,7 +154,8 @@ static inline void blast_icache32_r4600_
 
 static inline void tx49_blast_icache32_page_indexed(unsigned long page)
 {
-	unsigned long start = page;
+	unsigned long indexmask = current_cpu_data.icache.waysize - 1;
+	unsigned long start = INDEX_BASE + (page & indexmask);
 	unsigned long end = start + PAGE_SIZE;
 	unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
 	unsigned long ws_end = current_cpu_data.icache.ways <<

From ydgoo9@gmail.com Tue Apr  4 09:40:31 2006
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Date:	Tue, 4 Apr 2006 17:51:38 +0900
From:	"Youngduk Goo" <ydgoo9@gmail.com>
To:	linux-mips@linux-mips.org
Subject: JFFS2 error.(SMP8634)
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Hello,  all

I am porting the linux 2.6.15 to the SMP8634(SOC based on the MIPS 4
Kec , Sigma Design).
The booting and mount the rootfilesystem is fine with JFFS2.
But When I try to write the file more than 4KB,It makes error like
"Data CRC a81daeb5 != calculated CRC 349cadd9 for node at 0093bc64"
But the file smaller tha 4KB, it is OK.
My Flash is S29GL512N or S29GL256N from spansion.

If you have a experience about the SMP8634, please share the
information with me.
or any other advice about the Flash, JFFS2 are welcome.

Thanks,
youngduk

From ralf@linux-mips.org Tue Apr  4 11:32:32 2006
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Date:	Tue, 4 Apr 2006 11:43:36 +0100
From:	Ralf Baechle <ralf@linux-mips.org>
To:	Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Cc:	linux-mips@linux-mips.org
Subject: Re: build error about current git
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On Tue, Apr 04, 2006 at 10:22:21AM +0900, Yoichi Yuasa wrote:

> I got the following error, when I built the kernel using current git.
> 
> Yoichi
> 
> $ make tb0287_defconfig
> .
> .
> .
> gcc: 0: No such file or directory
> gcc: unrecognized option `-G'
> gcc: unrecognized option `-EL'
> cc1: error: invalid option `no-abicalls'

It seems to happen because no SYS_HAS_CPU_xxx is set for this config,
so no CONFIG_CPU_VR41XX option will be choosen either, similar for a
bunch of other settings.  Below patch fixes  make tb0287_defconfig but
you may want to add some further settings such 

select SYS_SUPPORTS_32BIT_KERNEL if EXPERIMENTAL

Just let me know,

  Ralf

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/vr41xx/Kconfig b/arch/mips/vr41xx/Kconfig
index a7add16..ea21094 100644
--- a/arch/mips/vr41xx/Kconfig
+++ b/arch/mips/vr41xx/Kconfig
@@ -4,6 +4,8 @@ config CASIO_E55
 	select DMA_NONCOHERENT
 	select IRQ_CPU
 	select ISA
+	select SYS_HAS_CPU_VR41XX
+	select SYS_SUPPORTS_32BIT_KERNEL
 	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config IBM_WORKPAD
@@ -12,6 +14,8 @@ config IBM_WORKPAD
 	select DMA_NONCOHERENT
 	select IRQ_CPU
 	select ISA
+	select SYS_HAS_CPU_VR41XX
+	select SYS_SUPPORTS_32BIT_KERNEL
 	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config NEC_CMBVR4133
@@ -21,12 +25,18 @@ config NEC_CMBVR4133
 	select DMA_NONCOHERENT
 	select IRQ_CPU
 	select HW_HAS_PCI
+	select SYS_HAS_CPU_VR41XX
+	select SYS_SUPPORTS_32BIT_KERNEL
+	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config ROCKHOPPER
 	bool "Support for Rockhopper baseboard"
 	depends on NEC_CMBVR4133
 	select I8259
 	select HAVE_STD_PC_SERIAL_PORT
+	select SYS_HAS_CPU_VR41XX
+	select SYS_SUPPORTS_32BIT_KERNEL
+	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config TANBAC_TB022X
 	bool "Support for TANBAC VR4131 multichip module and TANBAC VR4131DIMM"
@@ -34,6 +44,8 @@ config TANBAC_TB022X
 	select DMA_NONCOHERENT
 	select HW_HAS_PCI
 	select IRQ_CPU
+	select SYS_HAS_CPU_VR41XX
+	select SYS_SUPPORTS_32BIT_KERNEL
 	select SYS_SUPPORTS_LITTLE_ENDIAN
 	help
 	  The TANBAC VR4131 multichip module(TB0225) and
@@ -46,6 +58,9 @@ config TANBAC_TB0226
 	bool "Support for TANBAC Mbase(TB0226)"
 	depends on TANBAC_TB022X
 	select GPIO_VR41XX
+	select SYS_HAS_CPU_VR41XX
+	select SYS_SUPPORTS_32BIT_KERNEL
+	select SYS_SUPPORTS_LITTLE_ENDIAN
 	help
 	  The TANBAC Mbase(TB0226) is a MIPS-based platform
 	  manufactured by TANBAC.
@@ -54,6 +69,9 @@ config TANBAC_TB0226
 config TANBAC_TB0287
 	bool "Support for TANBAC Mini-ITX DIMM base(TB0287)"
 	depends on TANBAC_TB022X
+	select SYS_HAS_CPU_VR41XX
+	select SYS_SUPPORTS_32BIT_KERNEL
+	select SYS_SUPPORTS_LITTLE_ENDIAN
 	help
 	  The TANBAC Mini-ITX DIMM base(TB0287) is a MIPS-based platform
 	  manufactured by TANBAC.
@@ -65,6 +83,8 @@ config VICTOR_MPC30X
 	select DMA_NONCOHERENT
 	select HW_HAS_PCI
 	select IRQ_CPU
+	select SYS_HAS_CPU_VR41XX
+	select SYS_SUPPORTS_32BIT_KERNEL
 	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config ZAO_CAPCELLA
@@ -73,6 +93,8 @@ config ZAO_CAPCELLA
 	select DMA_NONCOHERENT
 	select HW_HAS_PCI
 	select IRQ_CPU
+	select SYS_HAS_CPU_VR41XX
+	select SYS_SUPPORTS_32BIT_KERNEL
 	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config PCI_VR41XX

From ralf@linux-mips.org Tue Apr  4 11:46:53 2006
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On Tue, Apr 04, 2006 at 01:11:45PM +0900, Atsushi Nemoto wrote:

> MIPS get_wchan() no longer requires -fno-omit-frame-pointer.

I don't think we have have relied on the existence of a frame pointer.

Patch applied,

  Ralf

From yoichi_yuasa@tripeaks.co.jp Tue Apr  4 12:37:43 2006
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Hello Ralf,

On Tue, 4 Apr 2006 11:43:36 +0100
Ralf Baechle <ralf@linux-mips.org> wrote:

> On Tue, Apr 04, 2006 at 10:22:21AM +0900, Yoichi Yuasa wrote:
> 
> > I got the following error, when I built the kernel using current git.
> > 
> > Yoichi
> > 
> > $ make tb0287_defconfig
> > .
> > .
> > .
> > gcc: 0: No such file or directory
> > gcc: unrecognized option `-G'
> > gcc: unrecognized option `-EL'
> > cc1: error: invalid option `no-abicalls'
> 
> It seems to happen because no SYS_HAS_CPU_xxx is set for this config,
> so no CONFIG_CPU_VR41XX option will be choosen either, similar for a
> bunch of other settings.  Below patch fixes  make tb0287_defconfig but
> you may want to add some further settings such 
> 
> select SYS_SUPPORTS_32BIT_KERNEL if EXPERIMENTAL
> 
> Just let me know,

ROCKHOPPER, TB0226 and TB0287 are only base board(CPU is not included in these boards).
These configs don't need "select SYS_HAS_CPU_VR41XX" and "select SYS_SUPPORTS_32BIT_KERNEL".

Thanks,

Yoichi

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>

diff -pruN -X dontdiff mips-orig/arch/mips/vr41xx/Kconfig mips/arch/mips/vr41xx/Kconfig
--- mips-orig/arch/mips/vr41xx/Kconfig	2006-04-04 20:27:53.335428500 +0900
+++ mips/arch/mips/vr41xx/Kconfig	2006-04-04 20:37:51.396805000 +0900
@@ -4,6 +4,8 @@ config CASIO_E55
 	select DMA_NONCOHERENT
 	select IRQ_CPU
 	select ISA
+	select SYS_HAS_CPU_VR41XX
+	select SYS_SUPPORTS_32BIT_KERNEL
 	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config IBM_WORKPAD
@@ -12,6 +14,8 @@ config IBM_WORKPAD
 	select DMA_NONCOHERENT
 	select IRQ_CPU
 	select ISA
+	select SYS_HAS_CPU_VR41XX
+	select SYS_SUPPORTS_32BIT_KERNEL
 	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config NEC_CMBVR4133
@@ -21,6 +25,9 @@ config NEC_CMBVR4133
 	select DMA_NONCOHERENT
 	select IRQ_CPU
 	select HW_HAS_PCI
+	select SYS_HAS_CPU_VR41XX
+	select SYS_SUPPORTS_32BIT_KERNEL
+	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config ROCKHOPPER
 	bool "Support for Rockhopper baseboard"
@@ -34,6 +41,8 @@ config TANBAC_TB022X
 	select DMA_NONCOHERENT
 	select HW_HAS_PCI
 	select IRQ_CPU
+	select SYS_HAS_CPU_VR41XX
+	select SYS_SUPPORTS_32BIT_KERNEL
 	select SYS_SUPPORTS_LITTLE_ENDIAN
 	help
 	  The TANBAC VR4131 multichip module(TB0225) and
@@ -65,6 +74,8 @@ config VICTOR_MPC30X
 	select DMA_NONCOHERENT
 	select HW_HAS_PCI
 	select IRQ_CPU
+	select SYS_HAS_CPU_VR41XX
+	select SYS_SUPPORTS_32BIT_KERNEL
 	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config ZAO_CAPCELLA
@@ -73,6 +84,8 @@ config ZAO_CAPCELLA
 	select DMA_NONCOHERENT
 	select HW_HAS_PCI
 	select IRQ_CPU
+	select SYS_HAS_CPU_VR41XX
+	select SYS_SUPPORTS_32BIT_KERNEL
 	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config PCI_VR41XX

From ralf@linux-mips.org Tue Apr  4 13:11:01 2006
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On Tue, Apr 04, 2006 at 08:48:47PM +0900, Yoichi Yuasa wrote:

> ROCKHOPPER, TB0226 and TB0287 are only base board(CPU is not included in these boards).
> These configs don't need "select SYS_HAS_CPU_VR41XX" and "select SYS_SUPPORTS_32BIT_KERNEL".

All right, applied.

  Ralf

From ralf@linux-mips.org Tue Apr  4 13:11:46 2006
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On Tue, Apr 04, 2006 at 05:34:14PM +0900, Atsushi Nemoto wrote:

> Fix an index value in tx49_blast_icache32_page_indexed().
> This is a damage by 13acfa3fdef15edaa4f5444c68e28e05978afa08 commit.

Applied on master and linux-2.6.16-stable.

  Ralf

From ralf.roesch@rw-gmbh.de Tue Apr  4 16:04:16 2006
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patch below makes genrtc.c compilable again

Signed-off-by: Ralf Roesch <ralf.roesch@rw-gmbh.de>

diff -Nur -X diff-exclude-files-2.6 linux-2.6/include/asm-mips/rtc.h 
work-2.6/include/asm-mips/rtc.h
--- linux-2.6/include/asm-mips/rtc.h	2006-03-08 14:43:43.000000000 +0100
+++ work-2.6/include/asm-mips/rtc.h	2006-04-04 15:56:38.000000000 +0200
@@ -32,7 +32,7 @@
  {
  	unsigned long nowtime;

-	nowtime = rtc_get_time();
+	nowtime = rtc_mips_get_time();
  	to_tm(nowtime, time);
  	time->tm_year -= 1900;

@@ -47,7 +47,7 @@
  	nowtime = mktime(time->tm_year+1900, time->tm_mon+1,
  			time->tm_mday, time->tm_hour, time->tm_min,
  			time->tm_sec);
-	ret = rtc_set_time(nowtime);
+	ret = rtc_mips_set_time(nowtime);

  	return ret;
  }


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From:	Ralf Baechle <ralf@linux-mips.org>
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Subject: Re: [PATCH] rtc.h fix
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On Tue, Apr 04, 2006 at 05:15:14PM +0200, Ralf Rösch wrote:

> patch below makes genrtc.c compilable again
> 
> Signed-off-by: Ralf Roesch <ralf.roesch@rw-gmbh.de>

Hand-applied, your mailer did something bad to this patch ...

  Ralf

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