From anemo@mba.ocn.ne.jp Mon Jan 2 12:58:10 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 02 Jan 2006 12:58:30 +0000 (GMT) Received: from mba.ocn.ne.jp ([210.190.142.172]:51429 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S8133394AbWABM6K (ORCPT ); Mon, 2 Jan 2006 12:58:10 +0000 Received: from localhost (p6207-ipad27funabasi.chiba.ocn.ne.jp [220.107.197.207]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id AD3303953; Mon, 2 Jan 2006 22:00:23 +0900 (JST) Date: Mon, 02 Jan 2006 21:59:49 +0900 (JST) Message-Id: <20060102.215949.41198615.anemo@mba.ocn.ne.jp> To: ralf@linux-mips.org Cc: dom@mips.com, macro@linux-mips.org, linux-mips@linux-mips.org Subject: Re: ieee754[sd]p_neg workaround From: Atsushi Nemoto In-Reply-To: <20050421.161945.79301612.nemoto@toshiba-tops.co.jp> References: <16998.20933.14301.397793@arsenal.mips.com> <20050420131304.GF5212@linux-mips.org> <20050421.161945.79301612.nemoto@toshiba-tops.co.jp> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9763 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips >>>>> On Thu, 21 Apr 2005 16:19:45 +0900 (JST), Atsushi Nemoto said: >>> So file a bug against glibc, but we should fix the emulator so it >>> correctly imitates the MIPS instruction set... ralf> As a matter of defensive design I think we should try to follow ralf> the establish behaviour if nothing more specific is defined ralf> anywhere. anemo> OK, I sent a bug reoport to glibc bugzilla. (Bug# 864) The bug was resolved ... marked as WONTFIX. glibc developers said math-emu should be fixed. Please look at: http://sourceware.org/bugzilla/show_bug.cgi?id=864 for their comments. So I send a patch for math-emu again. Description: It looks glibc's pow() assume an unary '-' operation for any number (including NaNs) always invert its sign bit (though IEEE754 does not specify the sign bit for NaNs). This patch make the kernel math-emu emulates real MIPS neg.[ds] instruction. Signed-off-by: Atsushi Nemoto diff --git a/arch/mips/math-emu/dp_simple.c b/arch/mips/math-emu/dp_simple.c index 495c1ac..1c555e6 100644 --- a/arch/mips/math-emu/dp_simple.c +++ b/arch/mips/math-emu/dp_simple.c @@ -48,16 +48,22 @@ ieee754dp ieee754dp_neg(ieee754dp x) CLEARCX; FLUSHXDP; + /* + * Invert the sign ALWAYS to prevent an endless recursion on + * pow() in libc. + */ + /* quick fix up */ + DPSIGN(x) ^= 1; + if (xc == IEEE754_CLASS_SNAN) { + ieee754dp y = ieee754dp_indef(); SETCX(IEEE754_INVALID_OPERATION); - return ieee754dp_nanxcpt(ieee754dp_indef(), "neg"); + DPSIGN(y) = DPSIGN(x); + return ieee754dp_nanxcpt(y, "neg"); } if (ieee754dp_isnan(x)) /* but not infinity */ return ieee754dp_nanxcpt(x, "neg", x); - - /* quick fix up */ - DPSIGN(x) ^= 1; return x; } diff --git a/arch/mips/math-emu/sp_simple.c b/arch/mips/math-emu/sp_simple.c index c809830..770f0f4 100644 --- a/arch/mips/math-emu/sp_simple.c +++ b/arch/mips/math-emu/sp_simple.c @@ -48,16 +48,22 @@ ieee754sp ieee754sp_neg(ieee754sp x) CLEARCX; FLUSHXSP; + /* + * Invert the sign ALWAYS to prevent an endless recursion on + * pow() in libc. + */ + /* quick fix up */ + SPSIGN(x) ^= 1; + if (xc == IEEE754_CLASS_SNAN) { + ieee754sp y = ieee754sp_indef(); SETCX(IEEE754_INVALID_OPERATION); - return ieee754sp_nanxcpt(ieee754sp_indef(), "neg"); + SPSIGN(y) = SPSIGN(x); + return ieee754sp_nanxcpt(y, "neg"); } if (ieee754sp_isnan(x)) /* but not infinity */ return ieee754sp_nanxcpt(x, "neg", x); - - /* quick fix up */ - SPSIGN(x) ^= 1; return x; } From matej.kupljen@ultra.si Tue Jan 3 14:23:10 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 03 Jan 2006 14:23:30 +0000 (GMT) Received: from deliver-1.mx.triera.net ([213.161.0.31]:37331 "HELO deliver-1.mx.triera.net") by ftp.linux-mips.org with SMTP id S8133761AbWACOXI (ORCPT ); Tue, 3 Jan 2006 14:23:08 +0000 Received: from localhost (in-1.mx.triera.net [213.161.0.25]) by deliver-1.mx.triera.net (Postfix) with ESMTP id 7A7EAC008; Tue, 3 Jan 2006 15:25:25 +0100 (CET) Received: from smtp.triera.net (smtp.triera.net [213.161.0.30]) by in-1.mx.triera.net (Postfix) with SMTP id 309651BC084; Tue, 3 Jan 2006 15:25:28 +0100 (CET) Received: from [172.18.1.53] (unknown [213.161.20.162]) by smtp.triera.net (Postfix) with ESMTP id 9BFBD1A18B6; Tue, 3 Jan 2006 15:25:27 +0100 (CET) Subject: Re: ALCHEMY: AU1200 USB Host Controller (OHCI/EHCI) From: Matej Kupljen To: Jordan Crouse Cc: linux-mips@linux-mips.org, linux-usb-devel@lists.sourceforge.net, matthias.lenk@amd.com In-Reply-To: <20051208210042.GB17458@cosmic.amd.com> References: <20051208210042.GB17458@cosmic.amd.com> Content-Type: text/plain Date: Tue, 03 Jan 2006 15:25:29 +0100 Message-Id: <1136298329.6765.22.camel@localhost.localdomain> Mime-Version: 1.0 X-Mailer: Evolution 2.2.3 Content-Transfer-Encoding: 7bit X-Virus-Scanned: Triera AV Service Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9764 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: matej.kupljen@ultra.si Precedence: bulk X-list: linux-mips Hi > Ok, here we go. I give you the OHCI/EHCI host controller support for > the Alchemy AU1200 processor. I'm sending this up, partly because I have > it ready to go, but also because it seems that enough folks are getting their > hands on AU1200 parts to make this a hot topic. I tried you patch, and this is what I get on 2.6.16-rc5: [4294668.576000] Creating 3 MTD partitions on "Db1200 Flash": [4294668.581000] 0x00000000-0x03c00000 : "User FS" [4294668.587000] 0x03c00000-0x03d00000 : "YAMON" [4294668.593000] 0x03d00000-0x03fc0000 : "raw kernel" [4294668.602000] CPU 0 Unable to handle kernel paging request at virtual address 00000008, epc == 80350764, ra == 80350760 [4294668.613000] Oops[#1]: [4294668.613000] Cpu 0 [4294668.613000] $ 0 : 00000000 1000fc00 8054a000 00000000 [4294668.613000] $ 4 : 8054b000 00000000 00000000 8107d530 [4294668.613000] $ 8 : 00000000 802a4030 8107d520 8053d57c [4294668.613000] $12 : ffffffff ffffffff 00100100 00200200 [4294668.613000] $16 : 8053c0d0 8053c000 00001000 80460000 [4294668.613000] $20 : 8041dcb0 00000000 00000000 00000000 [4294668.613000] $24 : 00000008 00000000 [4294668.613000] $28 : 804f2000 804f3e58 00000000 80350760 [4294668.613000] Hi : 00000000 [4294668.613000] Lo : 00000000 [4294668.613000] epc : 80350764 ehci_init+0x190/0x2c0 Not tainted [4294668.613000] ra : 80350760 ehci_init+0x18c/0x2c0 [4294668.613000] Status: 1000fc03 KERNEL EXL IE [4294668.613000] Cause : 00800008 [4294668.613000] BadVA : 00000008 [4294668.613000] PrId : 04030201 [4294668.613000] Modules linked in: [4294668.613000] Process swapper (pid: 1, threadinfo=804f2000, task=804eec00) [4294668.613000] Stack : 8013044c 8033e100 804f2000 804f3e88 00001000 80352018 1000fc03 000301ff [4294668.613000] 8053c000 fffffff4 8045e138 803520bc 804f3e78 804689e0 804f3ef8 811bb5c0 [4294668.613000] 00000010 00000000 8045e138 8045e140 80471cfc 8045e204 00000000 803521e0 [4294668.613000] 804f3e88 810756a0 00000000 00000000 00000000 00000000 00000000 802e3cd0 [4294668.613000] 8045e18c 804f3f30 8045e18c 8040d780 8045e140 804c0000 80471cfc 802e40a0 [4294668.613000] ... [4294668.613000] Call Trace: [4294668.613000] [<8013044c>] __request_region+0x38/0xb4 [4294668.613000] [<8033e100>] usb_create_hcd+0x4c/0xc8 [4294668.613000] [<80352018>] usb_ehci_au1xxx_probe+0xc0/0x1f8 [4294668.613000] [<803520bc>] usb_ehci_au1xxx_probe+0x164/0x1f8 [4294668.613000] [<803521e0>] ehci_hcd_au1xxx_drv_probe+0x38/0x50 [4294668.613000] [<802e3cd0>] driver_probe_device+0x4c/0xe8 [4294668.613000] [<8040d780>] klist_next+0x40/0x70 [4294668.613000] [<802e40a0>] __driver_attach+0x178/0x1a0 [4294668.613000] [<802e3f28>] __driver_attach+0x0/0x1a0 [4294668.613000] [<802e3024>] next_device+0x10/0x28 [4294668.613000] [<802e3f28>] __driver_attach+0x0/0x1a0 [4294668.613000] [<802e3090>] bus_for_each_dev+0x54/0x90 [4294668.613000] [<8029e468>] kobject_register+0x4c/0x8c [4294668.613000] [<802e374c>] bus_add_driver+0xa8/0x18c [4294668.613000] [<8027bb80>] debugfs_create_dir+0x1c/0x28 [4294668.613000] [<802e47a4>] driver_register+0x40/0x50 [4294668.613000] [<80100510>] init+0xac/0x2dc [4294668.613000] [<80105ee0>] kernel_thread_helper+0x10/0x18 [4294668.613000] [<80105ed0>] kernel_thread_helper+0x0/0x18 [4294668.613000] [4294668.613000] [4294668.613000] Code: 0c0a8fd0 00063080 8e030000 <8c660008> 7000003f 10400046 00061102 24020008 ae020028 [4294668.866000] Kernel panic - not syncing: Attempted to kill init! Any ideas? BR, Matej From jcrouse@cosmic.amd.com Tue Jan 3 15:47:53 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 03 Jan 2006 15:48:14 +0000 (GMT) Received: from amdext3.amd.com ([139.95.251.6]:24726 "EHLO amdext3.amd.com") by ftp.linux-mips.org with ESMTP id S8133767AbWACPrx (ORCPT ); Tue, 3 Jan 2006 15:47:53 +0000 Received: from SSVLGW02.amd.com (ssvlgw02.amd.com [139.95.250.170]) by amdext3.amd.com (8.12.11/8.12.11/AMD) with ESMTP id k03FoAiA015439; Tue, 3 Jan 2006 07:50:13 -0800 Received: from 139.95.250.1 by SSVLGW01.amd.com with ESMTP (AMD SMTP Relay (Email Firewall v6.1.0)); Tue, 03 Jan 2006 07:47:47 -0800 X-Server-Uuid: 89466532-923C-4A88-82C1-66ACAA0041DF Received: from ldcmail.amd.com (ldcmail.amd.com [147.5.200.40]) by amdint.amd.com (8.12.8/8.12.8/AMD) with ESMTP id k03FlkVP007317; Tue, 3 Jan 2006 07:47:46 -0800 (PST) Received: from cosmic.amd.com (cosmic.amd.com [147.5.201.206]) by ldcmail.amd.com (Postfix) with ESMTP id 7C9192028; Tue, 3 Jan 2006 08:47:46 -0700 (MST) Received: from cosmic.amd.com (localhost [127.0.0.1]) by cosmic.amd.com (8.13.4/8.13.4) with ESMTP id k03FslWV031984; Tue, 3 Jan 2006 08:54:47 -0700 Received: (from jcrouse@localhost) by cosmic.amd.com ( 8.13.4/8.13.4/Submit) id k03FslCm031983; Tue, 3 Jan 2006 08:54:47 -0700 Date: Tue, 3 Jan 2006 08:54:47 -0700 From: "Jordan Crouse" To: "Matej Kupljen" cc: linux-mips@linux-mips.org, linux-usb-devel@lists.sourceforge.net, matthias.lenk@amd.com Subject: Re: ALCHEMY: AU1200 USB Host Controller (OHCI/EHCI) Message-ID: <20060103155447.GI15770@cosmic.amd.com> References: <20051208210042.GB17458@cosmic.amd.com> <1136298329.6765.22.camel@localhost.localdomain> MIME-Version: 1.0 In-Reply-To: <1136298329.6765.22.camel@localhost.localdomain> User-Agent: Mutt/1.5.11 X-WSS-ID: 6FA443292BK1531058-01-01 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9765 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jordan.crouse@amd.com Precedence: bulk X-list: linux-mips > I tried you patch, and this is what I get on 2.6.16-rc5: Well, thats a fun one. I'm assuming you tried to boot with a device plugged in. I'm a bit confused by the __reqest_region coming from usb_create_hcd - I quickly glanced at the function, and I don't see anything that would have called request_region / request_mem_region. However, there *is* a request_mem_region call immediately after the usb_create_hcd call in usb_ehci_au1xxx_probe, and I wonder that might be the guilty party. Matthias, any thoughts? Jordan -- Jordan Crouse Senior Linux Engineer AMD - Personal Connectivity Solutions Group From matej.kupljen@ultra.si Tue Jan 3 20:39:20 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 03 Jan 2006 20:39:38 +0000 (GMT) Received: from deliver-1.mx.triera.net ([213.161.0.31]:39556 "HELO deliver-1.mx.triera.net") by ftp.linux-mips.org with SMTP id S8133788AbWACUjU (ORCPT ); Tue, 3 Jan 2006 20:39:20 +0000 Received: from localhost (in-3.mx.triera.net [213.161.0.27]) by deliver-1.mx.triera.net (Postfix) with ESMTP id 4C95FC002; Tue, 3 Jan 2006 21:41:35 +0100 (CET) Received: from smtp.triera.net (smtp.triera.net [213.161.0.30]) by in-3.mx.triera.net (Postfix) with SMTP id BC9C71BC08C; Tue, 3 Jan 2006 21:41:37 +0100 (CET) Received: from orionlinux.starfleet.com (cmb58-52.dial-up.arnes.si [153.5.49.52]) by smtp.triera.net (Postfix) with ESMTP id 2EA541A18B9; Tue, 3 Jan 2006 21:41:36 +0100 (CET) Subject: Re: ALCHEMY: AU1200 USB Host Controller (OHCI/EHCI) From: Matej Kupljen To: Jordan Crouse Cc: linux-mips@linux-mips.org, linux-usb-devel@lists.sourceforge.net, matthias.lenk@amd.com In-Reply-To: <20060103155447.GI15770@cosmic.amd.com> References: <20051208210042.GB17458@cosmic.amd.com> <1136298329.6765.22.camel@localhost.localdomain> <20060103155447.GI15770@cosmic.amd.com> Content-Type: text/plain Organization: Ultra d.o.o. Date: Tue, 03 Jan 2006 22:45:22 +0100 Message-Id: <1136324722.12175.20.camel@orionlinux.starfleet.com> Mime-Version: 1.0 X-Mailer: Evolution 2.2.3 Content-Transfer-Encoding: 7bit X-Virus-Scanned: Triera AV Service Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9766 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: matej.kupljen@ultra.si Precedence: bulk X-list: linux-mips Hi > > I tried you patch, and this is what I get on 2.6.16-rc5: I meant, 2.5.15-rc5 of course, and NOT 2.6.15-rc5. Sorry. > Well, thats a fun one. I'm assuming you tried to boot with a device > plugged in. I'm a bit confused by the __reqest_region coming from > usb_create_hcd - I quickly glanced at the function, and I don't see anything > that would have called request_region / request_mem_region. However, > there *is* a request_mem_region call immediately after the usb_create_hcd > call in usb_ehci_au1xxx_probe, and I wonder that might be the guilty party. I set up my BDI and tried to debug this. This is what I can tell you, and maybe you can then be able to help me: I get past the request_mem_region and ioremap in ehci-au1xxx.c. I get to line 144: if ((retval = driver->reset (hcd)) < 0) { now, driver->reset points to the (gdb) p driver->reset $6 = (int (*)(struct usb_hcd *)) 0x803505d4 I step into the call and I get to ehci_init in drivers/usb/host/ehci-hcd.c. If I continue, i get to the ehci_mem_init in the drivers/usb/host/ehci-mem.c On line: 228 memset (ehci->pshadow, 0, ehci->periodic_size * sizeof (void *)); If I do next in gdb, I end up in include/asm-mips/io.h, line 425 BUILDIO_MEM(l, u32) (Well, I am lost here now) Now if I disassemble at $pc: (gdb) x/20i $pc 0x80350760 : lw v1,0(s0) 0x80350764 : lw a2,8(v1) 0x80350768 : andi v0,a2,0x80 0x8035076c : beqz v0,0x80350888 0x80350770 : srl v0,a2,0x4 0x80350774 : li v0,8 0x80350778 : sw v0,40(s0) 0x8035077c : lw v0,24(s0) 0x80350780 : lw a1,16(s0) 0x80350784 : li v1,-2 0x80350788 : and v0,v0,v1 0x8035078c : li v1,-1 0x80350790 : sw v1,48(s0) 0x80350794 : sw v0,24(s0) 0x80350798 : sw zero,20(s0) 0x8035079c : sw zero,72(a1) 0x803507a0 : lw a0,16(s0) 0x803507a4 : li v1,-32 0x803507a8 : li a1,1 0x803507ac : lw v0,68(a0) (gdb) p $s0 $9 = 0x8053c0d0 (gdb) x/x $s0 0x8053c0d0: 0x00000000 So I guess, that the instruction at 0x80350764 is loading from location 0 and offset 8, which can be seen also in the original post: [4294668.602000] CPU 0 Unable to handle kernel paging request at virtual address 00000008, epc == 80350764, ra == 80350760 What is going on here? Is this some stack corruption, because of all this strange jumps over the source code (I know optimisation is turned on, but still). I hope this can help someone, I still have a lot of learning to do to figure this out. BR, Matej -- Matej Kupljen Ultra d.o.o. From matej.kupljen@ultra.si Wed Jan 4 07:16:04 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 04 Jan 2006 07:16:21 +0000 (GMT) Received: from deliver-1.mx.triera.net ([213.161.0.31]:6557 "HELO deliver-1.mx.triera.net") by ftp.linux-mips.org with SMTP id S8133443AbWADHQE (ORCPT ); Wed, 4 Jan 2006 07:16:04 +0000 Received: from localhost (in-1.mx.triera.net [213.161.0.25]) by deliver-1.mx.triera.net (Postfix) with ESMTP id 43256C074; Wed, 4 Jan 2006 08:18:28 +0100 (CET) Received: from smtp.triera.net (smtp.triera.net [213.161.0.30]) by in-1.mx.triera.net (Postfix) with SMTP id A26C71BC084; Wed, 4 Jan 2006 08:18:29 +0100 (CET) Received: from [172.18.1.53] (unknown [213.161.20.162]) by smtp.triera.net (Postfix) with ESMTP id 28FF11A18AD; Wed, 4 Jan 2006 08:18:28 +0100 (CET) Subject: Re: ALCHEMY: AU1200 USB Host Controller (OHCI/EHCI) From: Matej Kupljen To: Jordan Crouse Cc: linux-mips@linux-mips.org, linux-usb-devel@lists.sourceforge.net, matthias.lenk@amd.com In-Reply-To: <1136324722.12175.20.camel@orionlinux.starfleet.com> References: <20051208210042.GB17458@cosmic.amd.com> <1136298329.6765.22.camel@localhost.localdomain> <20060103155447.GI15770@cosmic.amd.com> <1136324722.12175.20.camel@orionlinux.starfleet.com> Content-Type: text/plain Date: Wed, 04 Jan 2006 08:18:25 +0100 Message-Id: <1136359105.27748.2.camel@localhost.localdomain> Mime-Version: 1.0 X-Mailer: Evolution 2.2.3 Content-Transfer-Encoding: 7bit X-Virus-Scanned: Triera AV Service Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9767 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: matej.kupljen@ultra.si Precedence: bulk X-list: linux-mips Hi > > > I tried you patch, and this is what I get on 2.6.16-rc5: > > I meant, 2.5.15-rc5 of course, and NOT 2.6.15-rc5. Sorry. Wov, I did it again :( Now I said 2.5.15-rc5 :( :( The version I am testing this on is: 2.6.15-rc5. Sorry for all this. BR, Matej From matej.kupljen@ultra.si Wed Jan 4 12:09:44 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 04 Jan 2006 12:10:02 +0000 (GMT) Received: from deliver-1.mx.triera.net ([213.161.0.31]:19656 "HELO deliver-1.mx.triera.net") by ftp.linux-mips.org with SMTP id S8133488AbWADMJo (ORCPT ); Wed, 4 Jan 2006 12:09:44 +0000 Received: from localhost (in-1.mx.triera.net [213.161.0.25]) by deliver-1.mx.triera.net (Postfix) with ESMTP id 6E894C091; Wed, 4 Jan 2006 13:12:07 +0100 (CET) Received: from smtp.triera.net (smtp.triera.net [213.161.0.30]) by in-1.mx.triera.net (Postfix) with SMTP id 14E0E1BC085; Wed, 4 Jan 2006 13:12:10 +0100 (CET) Received: from [172.18.1.53] (unknown [213.161.20.162]) by smtp.triera.net (Postfix) with ESMTP id 743181A18B0; Wed, 4 Jan 2006 13:12:09 +0100 (CET) Subject: Re: ALCHEMY: AU1200 USB Host Controller (OHCI/EHCI) From: Matej Kupljen To: Jordan Crouse Cc: linux-mips@linux-mips.org, linux-usb-devel@lists.sourceforge.net, matthias.lenk@amd.com In-Reply-To: <20060103155447.GI15770@cosmic.amd.com> References: <20051208210042.GB17458@cosmic.amd.com> <1136298329.6765.22.camel@localhost.localdomain> <20060103155447.GI15770@cosmic.amd.com> Content-Type: text/plain Date: Wed, 04 Jan 2006 13:12:06 +0100 Message-Id: <1136376726.27748.32.camel@localhost.localdomain> Mime-Version: 1.0 X-Mailer: Evolution 2.2.3 Content-Transfer-Encoding: 7bit X-Virus-Scanned: Triera AV Service Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9768 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: matej.kupljen@ultra.si Precedence: bulk X-list: linux-mips Hi (After some confusion about kernel version, I think I found the problem, sorry about that). I used binutils 2.15 and 2.16.1, but did not work. The code in the ehci-hcd.c looks like this: ---------------------------------------------------------------------------- ehci->periodic_size = DEFAULT_I_TDPS; if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0) return retval; /* controllers may cache some of the periodic schedule ... */ hcc_params = readl(&ehci->caps->hcc_params); if (HCC_ISOC_CACHE(hcc_params)) // full frame cache ehci->i_thresh = 8; else // N microframes cached ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params); ---------------------------------------------------------------------------- The problem is *AFTER* the call to ehci_mem_init, where a read from ehci->caps->hcc_params is attempted, but caps is NULL. This can be seen by this assembly code form Insight: ---------------------------------------------------------------------------- 0x80350758 jal 0x802a3f40 0x8035075c sll a2,a2,0x2 0x80350760 lw v1,0(s0) 0x80350764 lw a2,8(v1) s0 points to ehci at offset 0 from ehci is caps and at offset 8 from caps is hcc_params ---------------------------------------------------------------------------- Where should the caps be initialized? The only place, where it is set in drivers/usb/ is in drivers/usb/host/ehci-pci.c: ---------------------------------------------------------------------------- /* called during probe() after chip reset completes */ static int ehci_pci_setup(struct usb_hcd *hcd) { struct ehci_hcd *ehci = hcd_to_ehci(hcd); struct pci_dev *pdev = to_pci_dev(hcd->self.controller); u32 temp; int retval; ehci->caps = hcd->regs; ---------------------------------------------------------------------------- But the ehci-pci.c is not included in the compilation, because at the end of ehci-hcd.c we find: ---------------------------------------------------------------------------- #if defined(CONFIG_SOC_AU1X00) #include "ehci-au1xxx.c" #elif defined(CONFIG_PCI) #include "ehci-pci.c" #else #error "missing bus glue for ehci-hcd" #endif ---------------------------------------------------------------------------- What should be done? I hope this helps. BR, Matej From matthias.lenk@amd.com Wed Jan 4 12:32:06 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 04 Jan 2006 12:32:24 +0000 (GMT) Received: from amdext3.amd.com ([139.95.251.6]:11444 "EHLO amdext3.amd.com") by ftp.linux-mips.org with ESMTP id S8133488AbWADMcG (ORCPT ); Wed, 4 Jan 2006 12:32:06 +0000 Received: from SSVLGW01.amd.com (ssvlgw01.amd.com [139.95.250.169]) by amdext3.amd.com (8.12.11/8.12.11/AMD) with ESMTP id k04CYVc7017371; Wed, 4 Jan 2006 04:34:31 -0800 Received: from 163.181.250.1 by SSVLGW01.amd.com with ESMTP (AMD SMTP Relay (Email Firewall v6.1.0)); Wed, 04 Jan 2006 04:32:21 -0800 X-Server-Uuid: 89466532-923C-4A88-82C1-66ACAA0041DF Received: from elbe.amd.com (elbe.amd.com [172.20.31.2]) by amdint2.amd.com (8.12.8/8.12.8/AMD) with ESMTP id k04CWHh5023833; Wed, 4 Jan 2006 06:32:18 -0600 (CST) Received: from bobritzsch.amd.com by elbe.amd.com (8.8.8+Sun/AMD-S-2.0) id NAA29633; Wed, 4 Jan 2006 13:32:17 +0100 (MET) From: "Matthias Lenk" Reply-to: matthias.lenk@amd.com Organization: AMD To: "Matej Kupljen" Subject: Re: ALCHEMY: AU1200 USB Host Controller (OHCI/EHCI) Date: Wed, 4 Jan 2006 13:32:15 +0100 User-Agent: KMail/1.8.2 cc: "Jordan Crouse" , linux-mips@linux-mips.org, linux-usb-devel@lists.sourceforge.net References: <20051208210042.GB17458@cosmic.amd.com> <20060103155447.GI15770@cosmic.amd.com> <1136376726.27748.32.camel@localhost.localdomain> In-Reply-To: <1136376726.27748.32.camel@localhost.localdomain> MIME-Version: 1.0 Message-ID: <200601041332.16043.matthias.lenk@amd.com> X-WSS-ID: 6FA51FDE2BK1886933-01-01 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9769 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: matthias.lenk@amd.com Precedence: bulk X-list: linux-mips Hi Matej , I looked into the issue and came to the same conclusions as you. Something significant has changed from 2.6.15rc2 (what the patch was made for) to 2.6.15rc5. I added the initialization of the caps and regs fields of the ehci structure to the probe function in ehci-au1xxx.c. The driver doesn't crash anymore but does not work either. I also tried the Au1xxx OHCI and it hangs while loading the module with rc7. So it'll probably take some time to port the Au1200 EHCI and OHCI drivers to 2.6.15rc7 (again!). Any hints on what has changed are appreciated. Thanks, Matthias On Wednesday 04 January 2006 13:12, Matej Kupljen wrote: > Hi > > (After some confusion about kernel version, I think I found the > problem, sorry about that). > > I used binutils 2.15 and 2.16.1, but did not work. > > The code in the ehci-hcd.c looks like this: > --------------------------------------------------------------------------- >- ehci->periodic_size = DEFAULT_I_TDPS; > if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0) > return retval; > > /* controllers may cache some of the periodic schedule ... */ > hcc_params = readl(&ehci->caps->hcc_params); > if (HCC_ISOC_CACHE(hcc_params)) // full frame cache > ehci->i_thresh = 8; > else // N microframes cached > ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params); > --------------------------------------------------------------------------- >- > > The problem is *AFTER* the call to ehci_mem_init, where a read from > ehci->caps->hcc_params is attempted, but caps is NULL. > > This can be seen by this assembly code form Insight: > --------------------------------------------------------------------------- >- 0x80350758 jal 0x802a3f40 > 0x8035075c sll a2,a2,0x2 > 0x80350760 lw v1,0(s0) > 0x80350764 lw a2,8(v1) > > s0 points to ehci > at offset 0 from ehci is caps > and at offset 8 from caps is hcc_params > --------------------------------------------------------------------------- >- > > Where should the caps be initialized? > The only place, where it is set in drivers/usb/ is in > drivers/usb/host/ehci-pci.c: > --------------------------------------------------------------------------- >- /* called during probe() after chip reset completes */ > static int ehci_pci_setup(struct usb_hcd *hcd) > { > struct ehci_hcd *ehci = hcd_to_ehci(hcd); > struct pci_dev *pdev = > to_pci_dev(hcd->self.controller); > u32 temp; > int retval; > > ehci->caps = hcd->regs; > --------------------------------------------------------------------------- >- But the ehci-pci.c is not included in the compilation, because at the end > of ehci-hcd.c we find: > --------------------------------------------------------------------------- >- #if defined(CONFIG_SOC_AU1X00) > #include "ehci-au1xxx.c" > #elif defined(CONFIG_PCI) > #include "ehci-pci.c" > #else > #error "missing bus glue for ehci-hcd" > #endif > --------------------------------------------------------------------------- >- > > What should be done? > I hope this helps. > > BR, > Matej From satheshbabu.edara@analog.com Wed Jan 4 12:48:23 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 04 Jan 2006 12:48:41 +0000 (GMT) Received: from nwd2mail3.analog.com ([137.71.25.52]:39598 "EHLO nwd2mail3.analog.com") by ftp.linux-mips.org with ESMTP id S8133488AbWADMsX (ORCPT ); Wed, 4 Jan 2006 12:48:23 +0000 Received: from nwd2mhb2.analog.com (nwd2mhb2.analog.com [137.71.6.12]) by nwd2mail3.analog.com (8.12.10/8.12.10) with ESMTP id k04CoxHU017592; Wed, 4 Jan 2006 07:50:59 -0500 Received: from lilac.hdcindia.analog.com ([10.121.13.31]) by nwd2mhb2.analog.com (8.9.3 (PHNE_28810+JAGae91741)/8.9.3) with ESMTP id HAA15593; Wed, 4 Jan 2006 07:50:51 -0500 (EST) Received: from SEdaraL01 ([10.121.13.96]) by lilac.hdcindia.analog.com (8.12.10+Sun/8.12.10) with ESMTP id k04CoGaZ025481; Wed, 4 Jan 2006 18:20:17 +0530 (IST) Message-Id: <200601041250.k04CoGaZ025481@lilac.hdcindia.analog.com> From: "Sathesh Babu Edara" To: , Subject: Date: Wed, 4 Jan 2006 18:20:45 +0530 MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit X-Mailer: Microsoft Office Outlook, Build 11.0.6353 In-Reply-To: <1136324722.12175.20.camel@orionlinux.starfleet.com> X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2900.2180 Thread-Index: AcYQpiusjPo1a8yfR1inJpoGQLVGMgAgcRZA X-Scanned-By: MIMEDefang 2.49 on 137.71.25.52 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9770 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: satheshbabu.edara@analog.com Precedence: bulk X-list: linux-mips Hi, We have ported linux-2.6.12 kernel onto MIPS processor (LX4189) and the processor speed is 200Mhz. By default Linux-2.6.12 kernel comes with HZ value 1000.Will this HZ value cause an overhead on the 200MHZ CPU.Can someone advise me on whether going back to HZ vaule of 100 like Linux-2.4 will reduce the overhead on this CPU.What are the side effects this change can cause?. Regards, Sathesh From kevink@mips.com Wed Jan 4 13:02:38 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 04 Jan 2006 13:02:55 +0000 (GMT) Received: from 209-232-97-206.ded.pacbell.net ([209.232.97.206]:3292 "EHLO dns0.mips.com") by ftp.linux-mips.org with ESMTP id S8133500AbWADNCi (ORCPT ); Wed, 4 Jan 2006 13:02:38 +0000 Received: from mercury.mips.com (sbcns-dmz [209.232.97.193]) by dns0.mips.com (8.12.11/8.12.11) with ESMTP id k04D4kml013356; Wed, 4 Jan 2006 05:04:47 -0800 (PST) Received: from [192.168.236.16] (grendel [192.168.236.16]) by mercury.mips.com (8.12.9/8.12.11) with ESMTP id k04D4iJq010899; Wed, 4 Jan 2006 05:04:45 -0800 (PST) Message-ID: <43BBC85C.4040405@mips.com> Date: Wed, 04 Jan 2006 14:06:36 +0100 From: "Kevin D. Kissell" User-Agent: Thunderbird 1.5 (X11/20051025) MIME-Version: 1.0 To: Sathesh Babu Edara CC: linux-mips-bounce@linux-mips.org, linux-mips@linux-mips.org Subject: Re: References: <200601041250.k04CoGaZ025481@lilac.hdcindia.analog.com> In-Reply-To: <200601041250.k04CoGaZ025481@lilac.hdcindia.analog.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.39 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9771 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kevink@mips.com Precedence: bulk X-list: linux-mips Sathesh Babu Edara wrote: > > > Hi, > We have ported linux-2.6.12 kernel onto MIPS processor (LX4189) and the > processor speed is 200Mhz. > By default Linux-2.6.12 kernel comes with HZ value 1000.Will this HZ value > cause an overhead on the 200MHZ CPU.Can someone advise me on whether going > back to HZ vaule of 100 like Linux-2.4 will reduce the overhead on this > CPU.What are the side effects this change can cause?. The 1000Hz clock should not actually cause any problems with a 200MHz CPU, but it will suck up an annoyingly high percentage of available cycles. Backing off to 100Hz may cause some degradation of some real-time/interactive response times, but the improved overall performance will probably more than make up for it. I never build with a HZ value greater than 100 these days, but then again, I'm mostly running on FPGAs and other hardware emulators where the CPU clock frequencies may be less than 1MHz, and are never more than 33MHz. Note that a HZ value of less than 100 may cause some kernel macros to generate divide-by-zero operations/exceptions. Regards, Kevin K. From matej.kupljen@ultra.si Wed Jan 4 13:05:28 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 04 Jan 2006 13:05:46 +0000 (GMT) Received: from deliver-1.mx.triera.net ([213.161.0.31]:36817 "HELO deliver-1.mx.triera.net") by ftp.linux-mips.org with SMTP id S8133500AbWADNF2 (ORCPT ); Wed, 4 Jan 2006 13:05:28 +0000 Received: from localhost (in-3.mx.triera.net [213.161.0.27]) by deliver-1.mx.triera.net (Postfix) with ESMTP id E3C8EC089; Wed, 4 Jan 2006 14:07:51 +0100 (CET) Received: from smtp.triera.net (smtp.triera.net [213.161.0.30]) by in-3.mx.triera.net (Postfix) with SMTP id 739561BC08D; Wed, 4 Jan 2006 14:07:54 +0100 (CET) Received: from [172.18.1.53] (unknown [213.161.20.162]) by smtp.triera.net (Postfix) with ESMTP id 10C351A18B3; Wed, 4 Jan 2006 14:07:55 +0100 (CET) Subject: Re: ALCHEMY: AU1200 USB Host Controller (OHCI/EHCI) From: Matej Kupljen To: matthias.lenk@amd.com Cc: Jordan Crouse , linux-mips@linux-mips.org, linux-usb-devel@lists.sourceforge.net In-Reply-To: <200601041332.16043.matthias.lenk@amd.com> References: <20051208210042.GB17458@cosmic.amd.com> <20060103155447.GI15770@cosmic.amd.com> <1136376726.27748.32.camel@localhost.localdomain> <200601041332.16043.matthias.lenk@amd.com> Content-Type: text/plain Date: Wed, 04 Jan 2006 14:07:51 +0100 Message-Id: <1136380071.27748.49.camel@localhost.localdomain> Mime-Version: 1.0 X-Mailer: Evolution 2.2.3 Content-Transfer-Encoding: 7bit X-Virus-Scanned: Triera AV Service Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9772 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: matej.kupljen@ultra.si Precedence: bulk X-list: linux-mips Hi > I looked into the issue and came to the same conclusions as you. Something > significant has changed from 2.6.15rc2 (what the patch was made for) to > 2.6.15rc5. I added the initialization of the caps and regs fields of the ehci > structure to the probe function in ehci-au1xxx.c. The driver doesn't crash > anymore but does not work either. Where did you put it? I don't know much about USB, but by looking into the ehci-pci.c I added this to the ehci-au1xxx.c, after ioremap of hcd->regs: ehci = hcd_to_ehci(hcd); ehci->caps = hcd->regs; ehci->regs = hcd->regs + HC_LENGTH(readl(&ehci->caps->hc_capbase)); Is this O.K.? Now, with this I get: [4294668.620000] au1xxx-ehci au1xxx-ehci.0: Au1xxx EHCI [4294668.626000] au1xxx-ehci au1xxx-ehci.0: new USB bus registered, assigned bus number 1 [4294668.634000] au1xxx-ehci au1xxx-ehci.0: irq 29, io mem 0x14020200 [4294668.640000] au1xxx-ehci au1xxx-ehci.0: USB 0.0 started, EHCI 1.00, driver 10 Dec 2004 [4294668.649000] hub 1-0:1.0: USB hub found [4294668.653000] hub 1-0:1.0: 0 ports detected [4294668.762000] au1xxx-ohci au1xxx-ohci.0: Au1xxx OHCI [4294668.767000] au1xxx-ohci au1xxx-ohci.0: new USB bus registered, assigned bus number 2 [4294668.775000] au1xxx-ohci au1xxx-ohci.0: irq 29, io mem 0x14020100 [4294678.361000] BUG: soft lockup detected on CPU#0! [4294678.361000] Cpu 0 [4294678.361000] $ 0 : 00000000 1000fc01 807c856c 807c856c [4294678.361000] $ 4 : 807c8570 80721710 00000000 b4020100 [4294678.361000] $ 8 : 80000000 802a4030 00000000 8045a000 [4294678.361000] $12 : 80721108 fffffffb ffffffff 0000000a [4294678.361000] $16 : 807214d0 80721400 80721400 80470000 [4294678.361000] $20 : 00000002 804c0000 24000000 0000001d [4294678.361000] $24 : 00000018 81281d51 [4294678.361000] $28 : 81280000 81281e28 00000000 80355484 [4294678.361000] Hi : 000301ff [4294678.361000] Lo : fc85b000 [4294678.361000] epc : 80139c78 notifier_chain_register+0x18/0x54 Not tainted [4294678.361000] ra : 80355484 ohci_au1xxx_start+0x644/0x678 [4294678.361000] Status: 1000fc03 KERNEL EXL IE [4294678.361000] Cause : 00808000 [4294678.361000] PrId : 04030201 Well, a little further :( > I also tried the Au1xxx OHCI and it hangs while loading the module with rc7. > So it'll probably take some time to port the Au1200 EHCI and OHCI drivers to > 2.6.15rc7 (again!). I think Bora Sahin said he used OHCI successfully on 2.5.15-rc4. Bora, can you confirm this? > Any hints on what has changed are appreciated. I disabled EHCI in .config and tried again. This is what I got: [4294668.621000] au1xxx-ohci au1xxx-ohci.0: Au1xxx OHCI [4294668.626000] au1xxx-ohci au1xxx-ohci.0: new USB bus registered, assigned bus number 1 [4294668.635000] au1xxx-ohci au1xxx-ohci.0: irq 29, io mem 0x14020100 [4294668.725000] hub 1-0:1.0: USB hub found [4294668.729000] hub 1-0:1.0: 2 ports detected When I plug in USB 2.0 Flash key (with the vfat module lodaed): /root # [4294868.810000] usb 1-1: new full speed USB device using au1xxx-ohci and address 2 [4294877.045000] kobject_register failed for usbcore (-17) [4294877.050000] Call Trace: [4294877.053000] [<8029e490>] kobject_register+0x74/0x8c [4294877.058000] [<8029e440>] kobject_register+0x24/0x8c [4294877.063000] [<8014c070>] load_module+0xec4/0x1810 [4294877.068000] [<8014c04c>] load_module+0xea0/0x1810 [4294877.073000] [<80206ed4>] do_setlk+0x1cc/0x40c [4294877.078000] [<801640f8>] vma_prio_tree_insert+0x28/0x5c [4294877.084000] [<8016ae64>] __vma_link+0x34/0x80 [4294877.089000] [<801533d8>] generic_file_mmap+0x68/0x70 [4294877.094000] [<8016af40>] vma_link+0x90/0x160 [4294877.099000] [<8016aef0>] vma_link+0x40/0x160 [4294877.103000] [<8014cab4>] sys_init_module+0xd0/0x890 [4294877.108000] [<8010daac>] stack_done+0x20/0x40 [4294877.113000] [4294878.449000] Initializing USB Mass Storage driver... [4294878.508000] scsi0 : SCSI emulation for USB Mass Storage devices [4294878.606000] usbcore: registered new driver usb-storage [4294878.612000] USB Mass Storage support registered. [4294883.623000] Vendor: Generic Model: STORAGE DEVICE Rev: 1.04 [4294883.630000] Type: Direct-Access ANSI SCSI revision: 00 [4294883.913000] SCSI device sda: 256000 512-byte hdwr sectors (131 MB) [4294883.928000] sda: Write Protect is on [4294883.932000] sda: assuming drive cache: write through [4294883.965000] SCSI device sda: 256000 512-byte hdwr sectors (131 MB) [4294883.980000] sda: Write Protect is on [4294883.984000] sda: assuming drive cache: write through [4294883.989000] sda: sda1 [4294884.005000] sd 0:0:0:0: Attached scsi removable disk sda [4294884.028000] sd 0:0:0:0: Attached scsi generic sg0 type 0 And I can mount /dev/sda1. I'll try with only EHCI now, then I'll look into this kobject_register. BR, Matej From bora.sahin@ttnet.net.tr Wed Jan 4 13:51:57 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 04 Jan 2006 13:52:16 +0000 (GMT) Received: from neptune.nocserver.net ([209.59.140.34]:43173 "EHLO neptune.nocserver.net") by ftp.linux-mips.org with ESMTP id S8133503AbWADNv5 (ORCPT ); Wed, 4 Jan 2006 13:51:57 +0000 Received: from [81.214.210.213] (port=32805 helo=boras) by neptune.nocserver.net with esmtpsa (TLSv1:RC4-MD5:128) (Exim 4.52) id 1Eu95V-0002jU-M9; Wed, 04 Jan 2006 08:54:02 -0500 From: bora.sahin@ttnet.net.tr To: Matej Kupljen Subject: Re: ALCHEMY: AU1200 USB Host Controller (OHCI/EHCI) Date: Wed, 4 Jan 2006 15:54:29 +0200 User-Agent: KMail/1.7.2 Cc: matthias.lenk@amd.com, Jordan Crouse , linux-mips@linux-mips.org, linux-usb-devel@lists.sourceforge.net References: <20051208210042.GB17458@cosmic.amd.com> <200601041332.16043.matthias.lenk@amd.com> <1136380071.27748.49.camel@localhost.localdomain> In-Reply-To: <1136380071.27748.49.camel@localhost.localdomain> MIME-Version: 1.0 Content-Type: text/plain; charset="Iso-8859-9" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200601041554.29497.bora.sahin@ttnet.net.tr> X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - neptune.nocserver.net X-AntiAbuse: Original Domain - linux-mips.org X-AntiAbuse: Originator/Caller UID/GID - [0 0] / [47 12] X-AntiAbuse: Sender Address Domain - ttnet.net.tr X-Source: X-Source-Args: X-Source-Dir: Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9773 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: bora.sahin@ttnet.net.tr Precedence: bulk X-list: linux-mips Hi, > I think Bora Sahin said he used OHCI successfully on 2.5.15-rc4. > Bora, can you confirm this? Yes, it works both in my version of patch and Jordan's... But my kernel version is #define UTS_RELEASE "2.6.15-rc4-g2b269cc6" not 2.5.15-rc4 -- Bora SAHIN From matej.kupljen@ultra.si Wed Jan 4 14:15:18 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 04 Jan 2006 14:15:36 +0000 (GMT) Received: from deliver-1.mx.triera.net ([213.161.0.31]:52954 "HELO deliver-1.mx.triera.net") by ftp.linux-mips.org with SMTP id S8133500AbWADOPS (ORCPT ); Wed, 4 Jan 2006 14:15:18 +0000 Received: from localhost (in-1.mx.triera.net [213.161.0.25]) by deliver-1.mx.triera.net (Postfix) with ESMTP id E0F3BC090; Wed, 4 Jan 2006 15:17:41 +0100 (CET) Received: from smtp.triera.net (smtp.triera.net [213.161.0.30]) by in-1.mx.triera.net (Postfix) with SMTP id 82BC51BC07F; Wed, 4 Jan 2006 15:17:45 +0100 (CET) Received: from [172.18.1.53] (unknown [213.161.20.162]) by smtp.triera.net (Postfix) with ESMTP id 366331A18B1; Wed, 4 Jan 2006 15:17:45 +0100 (CET) Subject: Re: ALCHEMY: AU1200 USB Host Controller (OHCI/EHCI) From: Matej Kupljen To: bora.sahin@ttnet.net.tr Cc: matthias.lenk@amd.com, Jordan Crouse , linux-mips@linux-mips.org, linux-usb-devel@lists.sourceforge.net In-Reply-To: <200601041554.29497.bora.sahin@ttnet.net.tr> References: <20051208210042.GB17458@cosmic.amd.com> <200601041332.16043.matthias.lenk@amd.com> <1136380071.27748.49.camel@localhost.localdomain> <200601041554.29497.bora.sahin@ttnet.net.tr> Content-Type: text/plain Date: Wed, 04 Jan 2006 15:17:42 +0100 Message-Id: <1136384262.27748.52.camel@localhost.localdomain> Mime-Version: 1.0 X-Mailer: Evolution 2.2.3 Content-Transfer-Encoding: 7bit X-Virus-Scanned: Triera AV Service Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9774 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: matej.kupljen@ultra.si Precedence: bulk X-list: linux-mips Hi > > I think Bora Sahin said he used OHCI successfully on 2.5.15-rc4. > > Bora, can you confirm this? > > Yes, it works both in my version of patch and Jordan's... > > But my kernel version is > #define UTS_RELEASE "2.6.15-rc4-g2b269cc6" > not 2.5.15-rc4 Yes, I meant the right one: 2.6.15-rc4 (I don't know what is wrong with me and those kernel versions). So, there was some change between rc4 and rc5, that broke USB on Alchemey? BR, Matej From matej.kupljen@ultra.si Wed Jan 4 21:21:27 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 04 Jan 2006 21:21:47 +0000 (GMT) Received: from deliver-1.mx.triera.net ([213.161.0.31]:31900 "HELO deliver-1.mx.triera.net") by ftp.linux-mips.org with SMTP id S8133540AbWADVV1 (ORCPT ); Wed, 4 Jan 2006 21:21:27 +0000 Received: from localhost (in-1.mx.triera.net [213.161.0.25]) by deliver-1.mx.triera.net (Postfix) with ESMTP id 6D740C0B5; Wed, 4 Jan 2006 22:23:44 +0100 (CET) Received: from smtp.triera.net (smtp.triera.net [213.161.0.30]) by in-1.mx.triera.net (Postfix) with SMTP id 09C1C1BC07F; Wed, 4 Jan 2006 22:23:50 +0100 (CET) Received: from orionlinux.starfleet.com (cmb58-52.dial-up.arnes.si [153.5.49.52]) by smtp.triera.net (Postfix) with ESMTP id 9E92E1A18B6; Wed, 4 Jan 2006 22:23:49 +0100 (CET) Subject: Re: smc91x support From: Matej Kupljen To: ppopov@embeddedalley.com Cc: "'linux-mips@linux-mips.org'" In-Reply-To: <1131636585.4890.14.camel@localhost.localdomain> References: <1131634331.18165.30.camel@localhost.localdomain> <1131636585.4890.14.camel@localhost.localdomain> Content-Type: text/plain Organization: Ultra d.o.o. Date: Wed, 04 Jan 2006 22:23:52 +0100 Message-Id: <1136409832.11317.54.camel@orionlinux.starfleet.com> Mime-Version: 1.0 X-Mailer: Evolution 2.2.3 Content-Transfer-Encoding: 7bit X-Virus-Scanned: Triera AV Service Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9776 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: matej.kupljen@ultra.si Precedence: bulk X-list: linux-mips Content-Length: 386 Lines: 18 Hi > > smc91x platform support; requires patch to smc91x.h which was sent > > upstream. > > > > Any news about this? > > What is the patch required for smc91x.h? > > I have to check with Nicolas Pitre. Pete, did you see this: http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2006-January/033064.html Will it work for MIPS and especially for DBAU12100? BR, Matej From ppopov@embeddedalley.com Thu Jan 5 02:40:06 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 05 Jan 2006 02:40:26 +0000 (GMT) Received: from smtp101.biz.mail.mud.yahoo.com ([68.142.200.236]:35205 "HELO smtp101.biz.mail.mud.yahoo.com") by ftp.linux-mips.org with SMTP id S3465743AbWAECkF (ORCPT ); Thu, 5 Jan 2006 02:40:05 +0000 Received: (qmail 61472 invoked from network); 5 Jan 2006 02:42:29 -0000 Received: from unknown (HELO ?192.168.1.102?) (ppopov@embeddedalley.com@63.194.214.47 with plain) by smtp101.biz.mail.mud.yahoo.com with SMTP; 5 Jan 2006 02:42:29 -0000 Subject: Re: smc91x support From: Pete Popov Reply-To: ppopov@embeddedalley.com To: Matej Kupljen Cc: "'linux-mips@linux-mips.org'" In-Reply-To: <1136409832.11317.54.camel@orionlinux.starfleet.com> References: <1131634331.18165.30.camel@localhost.localdomain> <1131636585.4890.14.camel@localhost.localdomain> <1136409832.11317.54.camel@orionlinux.starfleet.com> Content-Type: text/plain Organization: Embedded Alley Solutions, Inc Date: Wed, 04 Jan 2006 18:42:28 -0800 Message-Id: <1136428948.8379.2.camel@localhost.localdomain> Mime-Version: 1.0 X-Mailer: Evolution 2.4.1 Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9777 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ppopov@embeddedalley.com Precedence: bulk X-list: linux-mips Content-Length: 643 Lines: 22 On Wed, 2006-01-04 at 22:23 +0100, Matej Kupljen wrote: > Hi > > > > smc91x platform support; requires patch to smc91x.h which was sent > > > upstream. > > > > > > Any news about this? > > > What is the patch required for smc91x.h? > > > > I have to check with Nicolas Pitre. > > Pete, did you see this: > http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2006-January/033064.html > > Will it work for MIPS and especially for DBAU12100? Someone has to try it and send Nicolas an incremental patch if it doesn't work for the dbau1200. I have a dbau1200 so I'll try it at some point but Jordan might beat me to it. Pete From matej.kupljen@ultra.si Thu Jan 5 13:24:28 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 05 Jan 2006 13:24:46 +0000 (GMT) Received: from deliver-1.mx.triera.net ([213.161.0.31]:52106 "HELO deliver-1.mx.triera.net") by ftp.linux-mips.org with SMTP id S8133529AbWAENY2 (ORCPT ); Thu, 5 Jan 2006 13:24:28 +0000 Received: from localhost (in-2.mx.triera.net [213.161.0.26]) by deliver-1.mx.triera.net (Postfix) with ESMTP id 5D37FC0EF; Thu, 5 Jan 2006 14:26:58 +0100 (CET) Received: from smtp.triera.net (smtp.triera.net [213.161.0.30]) by in-2.mx.triera.net (Postfix) with SMTP id D8C301BC08E; Thu, 5 Jan 2006 14:26:59 +0100 (CET) Received: from [172.18.1.53] (unknown [213.161.20.162]) by smtp.triera.net (Postfix) with ESMTP id C7F191A18B4; Thu, 5 Jan 2006 14:26:59 +0100 (CET) Subject: ALCHEMY: AU1200 USB Host Controller (OHCI/EHCI) PROGRESS From: Matej Kupljen To: Jordan Crouse Cc: linux-usb-devel@lists.sourceforge.net, matthias.lenk@amd.com, linux-mips@linux-mips.org Content-Type: text/plain Date: Thu, 05 Jan 2006 14:26:52 +0100 Message-Id: <1136467612.6378.15.camel@localhost.localdomain> Mime-Version: 1.0 X-Mailer: Evolution 2.2.3 Content-Transfer-Encoding: 7bit X-Virus-Scanned: Triera AV Service Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9778 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: matej.kupljen@ultra.si Precedence: bulk X-list: linux-mips Content-Length: 4655 Lines: 98 Hi Made some progress in the AU1200 USB OHCI/EHCI. Previously, if both were selected we got: ------------------------------------------------------------------------ [4294669.339000] au1xxx-ehci au1xxx-ehci.0: Au1xxx EHCI [4294669.347000] au1xxx-ehci au1xxx-ehci.0: new USB bus registered, assigned bus number 1 [4294669.355000] au1xxx-ehci au1xxx-ehci.0: irq 29, io mem 0x14020200 [4294669.361000] au1xxx-ehci au1xxx-ehci.0: USB 0.0 started, EHCI 1.00, driver 10 Dec 2004 [4294669.374000] hub 1-0:1.0: USB hub found [4294669.378000] hub 1-0:1.0: 0 ports detected [4294669.488000] au1xxx-ohci au1xxx-ohci.0: Au1xxx OHCI [4294669.495000] au1xxx-ohci au1xxx-ohci.0: new USB bus registered, assigned bus number 2 [4294669.504000] au1xxx-ohci au1xxx-ohci.0: irq 29, io mem 0x14020100 [4294679.372000] BUG: soft lockup detected on CPU#0! [4294679.372000] Cpu 0 [4294679.372000] $ 0 : 00000000 1000fc01 8f6278bc 8f6278bc [4294679.372000] $ 4 : 00000000 804471d0 00030200 80000000 [4294679.372000] $ 8 : 00000000 802b1df0 00000000 8046e000 [4294679.372000] $12 : 8f63b610 fffffffb ffffffff 0000000a [4294679.372000] $16 : 8f6278c0 8f63bbe4 80470000 8f63b8c4 [4294679.372000] $20 : 00000002 804e0000 0000001d 24000000 [4294679.372000] $24 : 00000018 00000000 [4294679.372000] $28 : 80524000 80525df0 00000000 8013aa48 [4294679.372000] Hi : 000301ff [4294679.372000] Lo : fc85b000 [4294679.372000] epc : 8013aa68 notifier_chain_register+0x48/0xb8 Not tainted [4294679.372000] ra : 8013aa48 notifier_chain_register+0x28/0xb8 [4294679.372000] Status: 1000fc03 KERNEL EXL IE [4294679.372000] Cause : 00808000 [4294679.372000] PrId : 04030201 ------------------------------------------------------------------------ The problem was in the ehci-au1xxx.c in usb_ehci_au1xxx_probe before the call to usb_add_hcd the driver called driver->reset (hcd). Reset points to ehci_init which at the end of function calls: register_reboot_notifier(&ehci->reboot_notifier); After that the usb_ehci_au1xxx_probe calls usb_add_hcd which *AGAIN* calls ehci_init *AND* register_reboot_notifer and thus creating reboot_notifier_list->next pointing to reboot_notifier_list! ------------------------------------------------------------------------ If I remove a call to reset, I get: [4294669.337000] au1xxx-ehci au1xxx-ehci.0: Au1xxx EHCI [4294669.344000] au1xxx-ehci au1xxx-ehci.0: new USB bus registered, assigned bus number 1 [4294669.352000] au1xxx-ehci au1xxx-ehci.0: irq 29, io mem 0x14020200 [4294669.359000] au1xxx-ehci au1xxx-ehci.0: USB 0.0 started, EHCI 1.00, driver 10 Dec 2004 [4294669.371000] hub 1-0:1.0: USB hub found [4294669.375000] hub 1-0:1.0: 0 ports detected [4294669.486000] au1xxx-ohci au1xxx-ohci.0: Au1xxx OHCI [4294669.493000] au1xxx-ohci au1xxx-ohci.0: new USB bus registered, assigned bus number 2 [4294669.502000] au1xxx-ohci au1xxx-ohci.0: irq 29, io mem 0x14020100 [4294669.595000] hub 2-0:1.0: USB hub found [4294669.599000] hub 2-0:1.0: 2 ports detected ------------------------------------------------------------------------ But it still does not work right. If I plug in USB 2.0 memory stick, I get: ------------------------------------------------------------------------ /root # [4294699.429000] usb 2-1: new full speed USB device using au1xxx-ohci and address 2 [4294699.438000] au1xxx-ehci au1xxx-ehci.0: fatal error [4294699.438000] au1xxx-ehci au1xxx-ehci.0: HC died; cleaning up [4294699.579000] usb 2-1: not running at top speed; connect to a high speed hub [4294709.001000] Initializing USB Mass Storage driver... [4294709.077000] scsi0 : SCSI emulation for USB Mass Storage devices [4294709.251000] usbcore: registered new driver usb-storage [4294709.257000] USB Mass Storage support registered. [4294714.269000] Vendor: Generic Model: STORAGE DEVICE Rev: 1.04 [4294714.276000] Type: Direct-Access ANSI SCSI revision: 00 [4294714.562000] SCSI device sda: 256000 512-byte hdwr sectors (131 MB) [4294714.577000] sda: Write Protect is on [4294714.581000] sda: assuming drive cache: write through [4294714.619000] SCSI device sda: 256000 512-byte hdwr sectors (131 MB) [4294714.635000] sda: Write Protect is on [4294714.639000] sda: assuming drive cache: write through [4294714.644000] sda: sda1 [4294714.663000] sd 0:0:0:0: Attached scsi removable disk sda [4294714.708000] sd 0:0:0:0: Attached scsi generic sg0 type 0 ------------------------------------------------------------------------ Well, back to work. I just wanted to keep you posted, because I know somebody else is also working on it and I wouldn't like to duplicate the effort. BR, Matej From anemo@mba.ocn.ne.jp Thu Jan 5 15:12:13 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 05 Jan 2006 15:12:31 +0000 (GMT) Received: from mba.ocn.ne.jp ([210.190.142.172]:35271 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S8133546AbWAEPMN (ORCPT ); Thu, 5 Jan 2006 15:12:13 +0000 Received: from localhost (p4083-ipad30funabasi.chiba.ocn.ne.jp [221.184.79.83]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 70B0AA538; Fri, 6 Jan 2006 00:14:45 +0900 (JST) Date: Fri, 06 Jan 2006 00:14:12 +0900 (JST) Message-Id: <20060106.001412.93019293.anemo@mba.ocn.ne.jp> To: rmk@arm.linux.org.uk Cc: sshtylyov@ru.mvista.com, linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH] serial_txx9: forcibly init the spinlock for PCI UART used as a console From: Atsushi Nemoto In-Reply-To: <20051227184152.GA4474@flint.arm.linux.org.uk> References: <43B143EE.6070700@ru.mvista.com> <20051228.003457.74752441.anemo@mba.ocn.ne.jp> <20051227184152.GA4474@flint.arm.linux.org.uk> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9779 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips Content-Length: 1183 Lines: 32 >>>>> On Tue, 27 Dec 2005 18:41:52 +0000, Russell King said: >> Yes, you are right. I missed the register_console call in >> uart_add_one_port(). So your patch will fix the problem. But I >> suppose the spinlock should be initialized in serial_core. How >> about this? rmk> I think you're layering work-around on top of work-around on top rmk> of work-around here. Russell, could you tell me where is the right place to initialize port's spinlock ? Currently, serial_core do initialize the spinlock in uart_set_options (for console) and uart_add_one_port (for other ports). And some low level drivers also initialize it in some place. (serial8250_isa_init_ports, etc.) A. The initialization in serial_core is just for failsafe and low level drivers should initialize the spinlock. B. Those initializations in low level drivers are there just by historical (or any other) reason and now redundant. They can be omitted because serial_core is responsible to initialize the spinlock. Which is right ? (if both are wrong, could you correct me ?) I will update and send patch(es) based on your answer. Thank you. --- Atsushi Nemoto From christi.garvin@lantronix.com Thu Jan 5 16:12:45 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 05 Jan 2006 16:13:02 +0000 (GMT) Received: from ltrxmail.lantronix.com ([67.134.254.86]:10821 "EHLO double-bogey.int.lantronix.com") by ftp.linux-mips.org with ESMTP id S8133546AbWAEQMo convert rfc822-to-8bit (ORCPT ); Thu, 5 Jan 2006 16:12:44 +0000 X-MessageTextProcessor: DisclaimIt (2.00.201) on double-bogey.int.lantronix.com Received: from 3putt.int.lantronix.com ([172.16.1.16]) by double-bogey.int.lantronix.com with Microsoft SMTPSVC(6.0.3790.211); Thu, 5 Jan 2006 08:15:15 -0800 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.3790.326 Content-Class: urn:content-classes:message MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 8BIT Subject: iptables/vmalloc issues on alchemy (revisited) Date: Thu, 5 Jan 2006 08:15:13 -0800 Message-ID: <2F0FC2A92C0B154BB406D5E74CB3E693010849F5@3putt.int.lantronix.com> X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: iptables/vmalloc issues on alchemy (revisited) thread-index: AcYSEzU4znvuLfZaQv6+6AVntEqEWg== Importance: normal From: "Christi Garvin" Priority: normal To: Cc: X-OriginalArrivalTime: 05 Jan 2006 16:15:15.0408 (UTC) FILETIME=[3676ED00:01C61213] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9780 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: christi.garvin@lantronix.com Precedence: bulk X-list: linux-mips Content-Length: 2320 Lines: 43 This issue was reported on this mailing list back in April '05.... On Tue, 2005-04-26 at 10:43 +0200, Herbert Valerio Riedel wrote: > ... > The problem seems to be so far, that when modifying the iptables > structures by adding/flushing the rules, a state can be reached sooner > or later (indeterministic! smells like race) where the data structure > becomes invalid (although there are checks in the kernel which would > prevent that); the result is either ip_tables.c:ipt_do_tables() causing > an oops due to bad pointer dereferencing (or the kernel freezing w/o > further notice at all), or the iptables tool being unable to > retrieve/modify the rules from the kernel (and getting ENOMEM/EINVAL) or > simply segfaulting due to other inconsistencies with the data... it appears the problem was found... On Wed, 2005-04-27 at 15:06 -0400, Dan Malek wrote: > Oh wait .... I found a bug a while ago from someone trying to load > large modules. There is a problem if the kernel grows to need > additional PTE tables, the top level pointers don't get propagated > correctly and subsequent access by a thread that didn't actually > do the allocation would fail. I'm looking into this, including your > past message about 64-bit PTEs. and possibly fixed: > From: Dan Malek [mailto:dan@embeddededge.com] > Sent: Thursday, April 28, 2005 3:57 PM > Subject: Re: iptables/vmalloc issues on alchemy > > I've just been talking about 2.6, so "long time ago" can't be > that long :-) I have the updates to the exception handler so > the PTEs get loaded correctly, that's on the way. I think 2.4 > should be OK if anyone is using that. I am encountering this same problem with 2.6.11 and iptables 1.2.11, and I've searched for an appropriate patch/fix, and cannot find one.... Can you tell me if this has been fixed, and if so, point me in the direction of the patch? regards, christi garvin ********************************************************************** This e-mail is the property of Lantronix. It is intended only for the person or entity to which it is addressed and may contain information that is privileged, confidential, or otherwise protected from disclosure. Distribution or copying of this e-mail, or the information contained herein, to anyone other than the intended recipient is prohibited. From bunk@stusta.de Thu Jan 5 17:34:26 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 05 Jan 2006 17:34:47 +0000 (GMT) Received: from mailout.stusta.mhn.de ([141.84.69.5]:27410 "HELO mailout.stusta.mhn.de") by ftp.linux-mips.org with SMTP id S8133560AbWAERe0 (ORCPT ); Thu, 5 Jan 2006 17:34:26 +0000 Received: (qmail 10042 invoked from network); 5 Jan 2006 17:36:57 -0000 Received: from r063144.stusta.swh.mhn.de (10.150.63.144) by mailout.stusta.mhn.de with SMTP; 5 Jan 2006 17:36:57 -0000 Received: by r063144.stusta.swh.mhn.de (Postfix, from userid 1000) id 315FE197670; Thu, 5 Jan 2006 18:36:58 +0100 (CET) Date: Thu, 5 Jan 2006 18:36:57 +0100 From: Adrian Bunk To: Andrew Morton Cc: Ralf Baechle , Domen Puncer , linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, davem@davemloft.net Subject: [2.6 patch] Remove arch/mips/arc/salone.c Message-ID: <20060105173657.GA12313@stusta.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.11 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9781 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: bunk@stusta.de Precedence: bulk X-list: linux-mips Content-Length: 1746 Lines: 58 From: Domen Puncer ArcLoad(), ArcInvoke(), ArcExecute() aren't used. Signed-off-by: Domen Puncer Signed-off-by: Alexey Dobriyan Signed-off-by: Adrian Bunk --- This patch was sent by Alexey Dobriyan on: - 8 Nov 2005 arch/mips/arc/Makefile | 2 +- arch/mips/arc/salone.c | 25 ------------------------- 2 files changed, 1 insertion(+), 26 deletions(-) --- linux-kj.orig/arch/mips/arc/Makefile 2005-11-08 20:46:24.000000000 +0300 +++ linux-kj/arch/mips/arc/Makefile 2005-11-08 20:47:36.000000000 +0300 @@ -3,7 +3,7 @@ # lib-y += cmdline.o env.o file.o identify.o init.o \ - misc.o salone.o time.o tree.o + misc.o time.o tree.o lib-$(CONFIG_ARC_MEMORY) += memory.o lib-$(CONFIG_ARC_CONSOLE) += arc_con.o Index: linux-kj/arch/mips/arc/salone.c =================================================================== --- linux-kj.orig/arch/mips/arc/salone.c 2005-11-08 20:46:24.000000000 +0300 +++ /dev/null 1970-01-01 00:00:00.000000000 +0000 @@ -1,24 +0,0 @@ -/* - * Routines to load into memory and execute stand-along program images using - * ARCS PROM firmware. - * - * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) - */ -#include -#include - -LONG __init ArcLoad(CHAR *Path, ULONG TopAddr, ULONG *ExecAddr, ULONG *LowAddr) -{ - return ARC_CALL4(load, Path, TopAddr, ExecAddr, LowAddr); -} - -LONG __init ArcInvoke(ULONG ExecAddr, ULONG StackAddr, ULONG Argc, CHAR *Argv[], - CHAR *Envp[]) -{ - return ARC_CALL5(invoke, ExecAddr, StackAddr, Argc, Argv, Envp); -} - -LONG __init ArcExecute(CHAR *Path, LONG Argc, CHAR *Argv[], CHAR *Envp[]) -{ - return ARC_CALL4(exec, Path, Argc, Argv, Envp); -} From robert@linuxdevelopment.de Thu Jan 5 22:22:39 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 05 Jan 2006 22:22:58 +0000 (GMT) Received: from moutng.kundenserver.de ([212.227.126.171]:9414 "EHLO moutng.kundenserver.de") by ftp.linux-mips.org with ESMTP id S8133495AbWAEWWj (ORCPT ); Thu, 5 Jan 2006 22:22:39 +0000 Received: from [85.212.191.62] (helo=[10.0.0.4]) by mrelayeu.kundenserver.de (node=mrelayeu6) with ESMTP (Nemesis), id 0ML29c-1EudXp2Loy-0001QF; Thu, 05 Jan 2006 23:25:18 +0100 Message-ID: <43BD9D93.40005@linuxdevelopment.de> Date: Thu, 05 Jan 2006 23:28:35 +0100 From: Robert Woerle User-Agent: Mozilla/5.0 (X11; U; Linux i686; de-AT; rv:1.7.12) Gecko/20050921 X-Accept-Language: de, en MIME-Version: 1.0 To: linux-mips@linux-mips.org Subject: diet-X11 fails /include/bits/types.h X-Enigmail-Version: 0.90.1.0 X-Enigmail-Supports: pgp-inline, pgp-mime Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-Provags-ID: kundenserver.de abuse@kundenserver.de login:3a738c603c23670681f156cc7e748d26 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9782 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: robert@linuxdevelopment.de Precedence: bulk X-list: linux-mips Content-Length: 2868 Lines: 65 Hi i am new to mips and i am compiling a familiar gpe image for mips based systems . Now diet-X11 and X11 are breaking to compile on the below error. I googled and found various occasions of this /include/bits/types.h causing problems i guess that has something todo with combination on compiler and glibc seems also glibc-2.3.5 fails on that i am using for that build glibc-2.3.3 gcc-cross-3.3.4 make[2]: Entering directory `/home/bob/Handhelds/oe/stuff/mips-build/tmp/work/diet-x11-6.2.1cvs20050226-r5/X11/src/util' | if gcc -DHAVE_CONFIG_H -I. -I/home/bob/Handhelds/oe/stuff/mips-build/tmp/work/diet-x11-6.2.1cvs20050226-r5/X11/src/util -I../../src -I/home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include -Wall -Wpointer-arith -Wstrict-prototypes -Wmissing-prototypes -Wmissing-declarations -Wnested-externs -fno-strict-aliasing -I/home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include -I/home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include/X11/Xtrans -D_XOPEN_SOURCE=500 -I/home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include -I/home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include -fexpensive-optimizations -fomit-frame-pointer -frename-registers -O2 -MT makekeys-makekeys.o -MD -MP -MF ".deps/makekeys-makekeys.Tpo" -c -o makekeys-makekeys.o `test -f 'makekeys.c' || echo '/home/bob/Handhelds/oe/stuff/mips-build/tmp/work/diet-x11-6.2.1cvs20050226-r5/X11/src/util/'`makekeys.c; \ | then mv -f ".deps/makekeys-makekeys.Tpo" ".deps/makekeys-makekeys.Po"; else rm -f ".deps/makekeys-makekeys.Tpo"; exit 1; fi | In file included from /home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include/sys/types.h:31, | from /home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include/X11/Xos.h:59, | from makekeys.c:34: | /home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include/bits/types.h:127:3: #error | In file included from /home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include/sys/types.h:31, | from /home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include/X11/Xos.h:59, | from makekeys.c:34: | /home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include/bits/types.h:136: error: syntax error before "__dev_t" | /home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include/bits/types.h:136: warning: type defaults to `int' in declaration of `__dev_t' | /home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include/bits/types.h:136: warning: data definition has no type or storage class | /home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include/bits/types.h:140: error: syntax error before "__ino64_t" any hint is greatly appriciated regards rob_w From zzh.hust@gmail.com Fri Jan 6 06:38:19 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 06 Jan 2006 06:38:39 +0000 (GMT) Received: from wproxy.gmail.com ([64.233.184.202]:1116 "EHLO wproxy.gmail.com") by ftp.linux-mips.org with ESMTP id S8133383AbWAFGiT convert rfc822-to-8bit (ORCPT ); Fri, 6 Jan 2006 06:38:19 +0000 Received: by wproxy.gmail.com with SMTP id 36so2791421wra for ; Thu, 05 Jan 2006 22:40:59 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:mime-version:content-type:content-transfer-encoding:content-disposition; b=VSeGgt4S2M4PxIGqPsI+fIZSkBdqnlmfNAmpCFTItSHin11lDhZVDw2hqyTPIw1Z1mbnlq1cvYzqCAn9cLVRZkVPMANFUovk7rnnNdfQ3ltwfAHOqxljD5GXAw9Qd6LSwbsn4Cs1VR4GUJEWxILtLOsnEwV90NJkuwQ0L9gS3ZY= Received: by 10.54.149.8 with SMTP id w8mr4557050wrd; Thu, 05 Jan 2006 22:40:58 -0800 (PST) Received: by 10.54.156.1 with HTTP; Thu, 5 Jan 2006 22:40:58 -0800 (PST) Message-ID: <50c9a2250601052240n5696e353teb2b798ecbf802f0@mail.gmail.com> Date: Fri, 6 Jan 2006 14:40:58 +0800 From: zhuzhenhua To: "linux-mips@linux-mips.org" Subject: sometimes get "crc error" while uncompressed ramdisk MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9783 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zzh.hust@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 225 Lines: 9 i make a ramdisk by myself, and sometimes the kernel boot the ramdisk correctly but sometimes it printk "crc error" while uncompressed ramdisk, did someone meet this situation? thanks for any hints Best regards zhuzhenhua From jaypee@hotpop.com Fri Jan 6 08:53:34 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 06 Jan 2006 08:54:03 +0000 (GMT) Received: from smtp-out.hotpop.com ([38.113.3.61]:61839 "EHLO smtp-out.hotpop.com") by ftp.linux-mips.org with ESMTP id S8133528AbWAFIxe (ORCPT ); Fri, 6 Jan 2006 08:53:34 +0000 Received: from hotpop.com (kubrick.hotpop.com [38.113.3.105]) by smtp-out.hotpop.com (Postfix) with SMTP id 91A062222269 for ; Fri, 6 Jan 2006 08:56:02 +0000 (UTC) Received: from [10.8.64.42] (unknown [62.253.252.7]) by smtp-2.hotpop.com (Postfix) with ESMTP id 48AF622221A0; Fri, 6 Jan 2006 08:56:00 +0000 (UTC) Subject: Re: sometimes get "crc error" while uncompressed ramdisk From: jp To: zhuzhenhua , linux-mips In-Reply-To: <50c9a2250601052240n5696e353teb2b798ecbf802f0@mail.gmail.com> References: <50c9a2250601052240n5696e353teb2b798ecbf802f0@mail.gmail.com> Content-Type: text/plain Date: Fri, 06 Jan 2006 08:56:53 +0000 Message-Id: <1136537813.5239.23.camel@localhost.localdomain> Mime-Version: 1.0 X-Mailer: Evolution 2.5.3 Content-Transfer-Encoding: 7bit X-HotPOP: ----------------------------------------------- Sent By HotPOP.com FREE Email Get your FREE POP email at www.HotPOP.com ----------------------------------------------- Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9784 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jaypee@hotpop.com Precedence: bulk X-list: linux-mips Content-Length: 825 Lines: 25 On Fri, 2006-01-06 at 14:40 +0800, zhuzhenhua wrote: > i make a ramdisk by myself, and sometimes the kernel boot the ramdisk > correctly but sometimes it printk "crc error" while uncompressed > ramdisk, did someone meet this situation? > thanks for any hints > Assuming your build and everything else is as it should be it may be a RAM fault. Are you using a custom board? I had some prototype boards here with some really long tracks to RAM. (and some really short ones too!) Memory tests such walking ones worked fine but the decompress of the ramdisk works RAM pretty hard and it showed up intermittent faults like you describe. Tended to be worse when the board was warm. I'd spray some Freezit on and it would go back to working OK. You could also try running the RAM slower and see if the fault disappears. JP From langabe@gmail.com Fri Jan 6 10:38:49 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 06 Jan 2006 10:39:07 +0000 (GMT) Received: from nproxy.gmail.com ([64.233.182.194]:5982 "EHLO nproxy.gmail.com") by ftp.linux-mips.org with ESMTP id S8133370AbWAFKit convert rfc822-to-8bit (ORCPT ); Fri, 6 Jan 2006 10:38:49 +0000 Received: by nproxy.gmail.com with SMTP id k27so7427nfc for ; Fri, 06 Jan 2006 02:41:31 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:mime-version:content-type:content-transfer-encoding:content-disposition; b=H+zeV1IM68ru1z0EnFJ1P574MPc/WNHRLz+aqvXZHWat1Hi7BaoRTFtRUQE6XMPgLRS60eb89FTbBU/8Wh41mAZee83c2PVcrouBjpERjvfdpGAULdpAZTUDSv5dfTWaLJQS59qUc6E2XfvTxX970j9ogVfTgC1/gvTBuDpznbw= Received: by 10.48.249.2 with SMTP id w2mr651197nfh; Fri, 06 Jan 2006 02:41:30 -0800 (PST) Received: by 10.48.225.20 with HTTP; Fri, 6 Jan 2006 02:41:30 -0800 (PST) Message-ID: Date: Fri, 6 Jan 2006 10:41:30 +0000 From: Alex Gonzalez To: linux-mips@linux-mips.org Subject: Jump/branch to external symbol MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9785 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: langabe@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 1377 Lines: 36 Hi, I am having GNU gas related problems when compiling assembler files which contain jumps to external symbols, for example when jumping from an assembler to a C function. Using binutils-2.15 GAS will produce a "Cannot branch to undefined symbol" error. Applying the patch at http://sources.redhat.com/ml/binutils/2004-04/msg00476.html, which creates an "allow_branch_to_undefined" option I am able to succesfully compile an executable. I am happy with this as I only need to apply the option to the problematic files and it does not change the behaviour of gas in general. Now, my crosscompiler toolchain is based on binutils-2.13. When I try to apply the same patch to it, I get a different error, "Can not represent BFD_RELOC_16_PCREL_S2 relocation in this object file format". There are various posts around referring to this problems. As a consequence I have read different opinions, solutions that apply to specific version or binutils, solutions more or less accepted by everyone, and as usual I am very confused. If I compile with "-mno-abicalls -fno-pic" gas reports no errors (which I believe is what the Linux kernel does), but I need to link with some pic libraries which use glibc, so this is not a valid solution for me. I am happy with the patch for binutils-2.15, and I would need a solution for binutils-2.13. Can anybody offer any help? Thanks, Alex From macro@linux-mips.org Fri Jan 6 11:49:15 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 06 Jan 2006 11:49:32 +0000 (GMT) Received: from pollux.ds.pg.gda.pl ([153.19.208.7]:30995 "EHLO pollux.ds.pg.gda.pl") by ftp.linux-mips.org with ESMTP id S8133571AbWAFLtP (ORCPT ); Fri, 6 Jan 2006 11:49:15 +0000 Received: from localhost (localhost [127.0.0.1]) by pollux.ds.pg.gda.pl (Postfix) with ESMTP id 6A3B0E1C9B; Fri, 6 Jan 2006 12:51:54 +0100 (CET) Received: from pollux.ds.pg.gda.pl ([127.0.0.1]) by localhost (pollux [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 04961-05; Fri, 6 Jan 2006 12:51:54 +0100 (CET) Received: from piorun.ds.pg.gda.pl (piorun.ds.pg.gda.pl [153.19.208.8]) by pollux.ds.pg.gda.pl (Postfix) with ESMTP id 27997E1C81; Fri, 6 Jan 2006 12:51:54 +0100 (CET) Received: from blysk.ds.pg.gda.pl (macro@blysk.ds.pg.gda.pl [153.19.208.6]) by piorun.ds.pg.gda.pl (8.13.3/8.13.1) with ESMTP id k06Bplme002297; Fri, 6 Jan 2006 12:51:47 +0100 Date: Fri, 6 Jan 2006 11:51:56 +0000 (GMT) From: "Maciej W. Rozycki" To: Alex Gonzalez Cc: linux-mips@linux-mips.org Subject: Re: Jump/branch to external symbol In-Reply-To: Message-ID: References: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Virus-Scanned: ClamAV 0.87.1/1231/Thu Jan 5 23:51:25 2006 on piorun.ds.pg.gda.pl X-Virus-Status: Clean X-Virus-Scanned: by amavisd-new at pollux.ds.pg.gda.pl Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9786 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@linux-mips.org Precedence: bulk X-list: linux-mips Content-Length: 368 Lines: 12 On Fri, 6 Jan 2006, Alex Gonzalez wrote: > I am happy with the patch for binutils-2.15, and I would need a > solution for binutils-2.13. > > Can anybody offer any help? Well, the most obvious solution is upgrading to the current release, which is 2.16.1 now. Otherwise you are probably on your own -- 2.15 is already somewhat old and 2.13 is ancient. Maciej From drow@nevyn.them.org Fri Jan 6 14:49:36 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 06 Jan 2006 14:49:53 +0000 (GMT) Received: from nevyn.them.org ([66.93.172.17]:16515 "EHLO nevyn.them.org") by ftp.linux-mips.org with ESMTP id S8133576AbWAFOtg (ORCPT ); Fri, 6 Jan 2006 14:49:36 +0000 Received: from drow by nevyn.them.org with local (Exim 4.54) id 1Euswy-0001mv-K9; Fri, 06 Jan 2006 09:52:16 -0500 Date: Fri, 6 Jan 2006 09:52:16 -0500 From: Daniel Jacobowitz To: "Maciej W. Rozycki" Cc: Alex Gonzalez , linux-mips@linux-mips.org Subject: Re: Jump/branch to external symbol Message-ID: <20060106145216.GA6849@nevyn.them.org> References: Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.8i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9787 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dan@debian.org Precedence: bulk X-list: linux-mips Content-Length: 546 Lines: 17 On Fri, Jan 06, 2006 at 11:51:56AM +0000, Maciej W. Rozycki wrote: > On Fri, 6 Jan 2006, Alex Gonzalez wrote: > > > I am happy with the patch for binutils-2.15, and I would need a > > solution for binutils-2.13. > > > > Can anybody offer any help? > > Well, the most obvious solution is upgrading to the current release, > which is 2.16.1 now. Otherwise you are probably on your own -- 2.15 is > already somewhat old and 2.13 is ancient. Or better yet to trunk and you won't need any patches for this. -- Daniel Jacobowitz CodeSourcery From robert@linuxdevelopment.de Fri Jan 6 15:00:54 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 06 Jan 2006 15:01:12 +0000 (GMT) Received: from moutng.kundenserver.de ([212.227.126.187]:26075 "EHLO moutng.kundenserver.de") by ftp.linux-mips.org with ESMTP id S8133576AbWAFPAy (ORCPT ); Fri, 6 Jan 2006 15:00:54 +0000 Received: from [85.212.192.127] (helo=[10.0.0.4]) by mrelayeu.kundenserver.de (node=mrelayeu5) with ESMTP (Nemesis), id 0ML25U-1Eut7t1QiI-0008Br; Fri, 06 Jan 2006 16:03:33 +0100 Message-ID: <43BE878D.6080105@linuxdevelopment.de> Date: Fri, 06 Jan 2006 16:06:53 +0100 From: Robert Woerle User-Agent: Mozilla/5.0 (X11; U; Linux i686; de-AT; rv:1.7.12) Gecko/20050921 X-Accept-Language: de, en MIME-Version: 1.0 To: linux-mips@linux-mips.org Subject: Re: diet-X11 fails /include/bits/types.h References: <43BD9D93.40005@linuxdevelopment.de> In-Reply-To: <43BD9D93.40005@linuxdevelopment.de> X-Enigmail-Version: 0.90.1.0 X-Enigmail-Supports: pgp-inline, pgp-mime Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Provags-ID: kundenserver.de abuse@kundenserver.de login:3a738c603c23670681f156cc7e748d26 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9788 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: robert@linuxdevelopment.de Precedence: bulk X-list: linux-mips Content-Length: 3153 Lines: 75 Ok check that types.h and to me it looks that nothing in my toolchain provides WORDSIZE so i used the WORDSIZE=32 values and filled them in the 3rd else statement . now all compiles fine Robert Woerle schrieb: >Hi > >i am new to mips and i am compiling a familiar gpe image for mips based >systems . >Now diet-X11 and X11 are breaking to compile on the below error. >I googled and found various occasions of this /include/bits/types.h >causing problems > >i guess that has something todo with combination on compiler and glibc >seems also glibc-2.3.5 fails on that > >i am using for that build >glibc-2.3.3 >gcc-cross-3.3.4 > >make[2]: Entering directory >`/home/bob/Handhelds/oe/stuff/mips-build/tmp/work/diet-x11-6.2.1cvs20050226-r5/X11/src/util' >| if gcc -DHAVE_CONFIG_H -I. >-I/home/bob/Handhelds/oe/stuff/mips-build/tmp/work/diet-x11-6.2.1cvs20050226-r5/X11/src/util >-I../../src >-I/home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include >-Wall -Wpointer-arith -Wstrict-prototypes -Wmissing-prototypes >-Wmissing-declarations -Wnested-externs -fno-strict-aliasing >-I/home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include >-I/home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include/X11/Xtrans >-D_XOPEN_SOURCE=500 >-I/home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include >-I/home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include >-fexpensive-optimizations -fomit-frame-pointer -frename-registers -O2 >-MT makekeys-makekeys.o -MD -MP -MF ".deps/makekeys-makekeys.Tpo" -c -o >makekeys-makekeys.o `test -f 'makekeys.c' || echo >'/home/bob/Handhelds/oe/stuff/mips-build/tmp/work/diet-x11-6.2.1cvs20050226-r5/X11/src/util/'`makekeys.c; >\ >| then mv -f ".deps/makekeys-makekeys.Tpo" ".deps/makekeys-makekeys.Po"; >else rm -f ".deps/makekeys-makekeys.Tpo"; exit 1; fi >| In file included from >/home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include/sys/types.h:31, >| from >/home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include/X11/Xos.h:59, >| from makekeys.c:34: >| >/home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include/bits/types.h:127:3: >#error >| In file included from >/home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include/sys/types.h:31, >| from >/home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include/X11/Xos.h:59, >| from makekeys.c:34: >| >/home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include/bits/types.h:136: >error: syntax error before "__dev_t" >| >/home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include/bits/types.h:136: >warning: type defaults to `int' in declaration of `__dev_t' >| >/home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include/bits/types.h:136: >warning: data definition has no type or storage class >| >/home/bob/Handhelds/oe/stuff/mips-build/tmp/staging/mipsel-linux/include/bits/types.h:140: >error: syntax error before "__ino64_t" > >any hint is greatly appriciated >regards > >rob_w > > > From sshtylyov@ru.mvista.com Fri Jan 6 16:29:42 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 06 Jan 2006 16:30:00 +0000 (GMT) Received: from rtsoft2.corbina.net ([85.21.88.2]:25520 "HELO mail.dev.rtsoft.ru") by ftp.linux-mips.org with SMTP id S8133585AbWAFQ3m (ORCPT ); Fri, 6 Jan 2006 16:29:42 +0000 Received: (qmail 5312 invoked from network); 6 Jan 2006 16:32:17 -0000 Received: from wasted.dev.rtsoft.ru (HELO ?192.168.1.248?) (192.168.1.248) by mail.dev.rtsoft.ru with SMTP; 6 Jan 2006 16:32:17 -0000 Message-ID: <43BE9C20.2040805@ru.mvista.com> Date: Fri, 06 Jan 2006 19:34:40 +0300 From: Sergei Shtylylov Organization: MostaVista Software Inc. User-Agent: Mozilla/5.0 (X11; U; Linux i686; rv:1.7.2) Gecko/20040803 X-Accept-Language: ru, en-us, en-gb MIME-Version: 1.0 To: linux-mips@linux-mips.org CC: Manish Lachwani , Jordan Crouse , ralf@linux-mips.org Subject: [PATCH] Make KGDB compile for AMD Au1200 Content-Type: multipart/mixed; boundary="------------040105000905030801070202" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9789 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sshtylyov@ru.mvista.com Precedence: bulk X-list: linux-mips Content-Length: 1179 Lines: 41 This is a multi-part message in MIME format. --------------040105000905030801070202 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Hello. AMD Au1200 SOC just doesn't have UART3, so KGDB won't even compile for it as is, here's the fix to make KGDB use UART1. Note that I haven't really tested KGDB itself... WBR, Sergei --------------040105000905030801070202 Content-Type: text/plain; name="DBAu1200-fix-KGDB-UART.patch" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="DBAu1200-fix-KGDB-UART.patch" diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h index 8e1d7ed..4686e17 100644 --- a/include/asm-mips/mach-au1x00/au1000.h +++ b/include/asm-mips/mach-au1x00/au1000.h @@ -1198,7 +1198,11 @@ extern au1xxx_irq_map_t au1xxx_irq_map[] /* UARTS 0-3 */ #define UART_BASE UART0_ADDR +#ifdef CONFIG_SOC_AU1200 +#define UART_DEBUG_BASE UART1_ADDR +#else #define UART_DEBUG_BASE UART3_ADDR +#endif #define UART_RX 0 /* Receive buffer */ #define UART_TX 4 /* Transmit buffer */ --------------040105000905030801070202-- From sshtylyov@ru.mvista.com Fri Jan 6 16:33:05 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 06 Jan 2006 16:33:23 +0000 (GMT) Received: from rtsoft2.corbina.net ([85.21.88.2]:46768 "HELO mail.dev.rtsoft.ru") by ftp.linux-mips.org with SMTP id S8133585AbWAFQdF (ORCPT ); Fri, 6 Jan 2006 16:33:05 +0000 Received: (qmail 5346 invoked from network); 6 Jan 2006 16:35:42 -0000 Received: from wasted.dev.rtsoft.ru (HELO ?192.168.1.248?) (192.168.1.248) by mail.dev.rtsoft.ru with SMTP; 6 Jan 2006 16:35:42 -0000 Message-ID: <43BE9CED.3080207@ru.mvista.com> Date: Fri, 06 Jan 2006 19:38:05 +0300 From: Sergei Shtylylov Organization: MostaVista Software Inc. User-Agent: Mozilla/5.0 (X11; U; Linux i686; rv:1.7.2) Gecko/20040803 X-Accept-Language: ru, en-us, en-gb MIME-Version: 1.0 To: Linux MIPS CC: Manish Lachwani , ralf@linux-mips.org Subject: [PATCH] Make KGDB compile again Content-Type: multipart/mixed; boundary="------------030207070504090609040403" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9790 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sshtylyov@ru.mvista.com Precedence: bulk X-list: linux-mips Content-Length: 976 Lines: 38 This is a multi-part message in MIME format. --------------030207070504090609040403 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Hello. The last commit to arch/mips/kernel/gdb-stub.c introduced a stupid typo into the spinlock initializer, here's the fix... WBR, Sergei --------------030207070504090609040403 Content-Type: text/plain; name="KGDB-fix-spinlock-init.patch" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="KGDB-fix-spinlock-init.patch" diff --git a/arch/mips/kernel/gdb-stub.c b/arch/mips/kernel/gdb-stub.c index 96d18c4..0b2c44f 100644 --- a/arch/mips/kernel/gdb-stub.c +++ b/arch/mips/kernel/gdb-stub.c @@ -178,7 +178,7 @@ int kgdb_enabled; */ static DEFINE_SPINLOCK(kgdb_lock); static raw_spinlock_t kgdb_cpulock[NR_CPUS] = { - [0 ... NR_CPUS-1] = __RAW_SPIN_LOCK_UNLOCKED; + [0 ... NR_CPUS-1] = __RAW_SPIN_LOCK_UNLOCKED }; /* --------------030207070504090609040403-- From jcrouse@cosmic.amd.com Fri Jan 6 16:34:47 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 06 Jan 2006 16:35:09 +0000 (GMT) Received: from amdext3.amd.com ([139.95.251.6]:9654 "EHLO amdext3.amd.com") by ftp.linux-mips.org with ESMTP id S8133585AbWAFQer (ORCPT ); Fri, 6 Jan 2006 16:34:47 +0000 Received: from SSVLGW02.amd.com (ssvlgw02.amd.com [139.95.250.170]) by amdext3.amd.com (8.12.11/8.12.11/AMD) with ESMTP id k06GY0Ar000480; Fri, 6 Jan 2006 08:36:31 -0800 Received: from 139.95.250.1 by SSVLGW02.amd.com with ESMTP (AMD SMTP Relay (Email Firewall v6.1.0)); Fri, 06 Jan 2006 08:36:21 -0800 X-Server-Uuid: 519AC16A-9632-469E-B354-112C592D09E8 Received: from ldcmail.amd.com (ldcmail.amd.com [147.5.200.40]) by amdint.amd.com (8.12.8/8.12.8/AMD) with ESMTP id k06GaLVP007358; Fri, 6 Jan 2006 08:36:21 -0800 (PST) Received: from cosmic.amd.com (cosmic.amd.com [147.5.201.206]) by ldcmail.amd.com (Postfix) with ESMTP id C5CD9202D; Fri, 6 Jan 2006 09:36:20 -0700 (MST) Received: from cosmic.amd.com (localhost [127.0.0.1]) by cosmic.amd.com (8.13.4/8.13.4) with ESMTP id k06Gi9Yc016061; Fri, 6 Jan 2006 09:44:09 -0700 Received: (from jcrouse@localhost) by cosmic.amd.com ( 8.13.4/8.13.4/Submit) id k06Gi6Wn016060; Fri, 6 Jan 2006 09:44:06 -0700 Date: Fri, 6 Jan 2006 09:44:06 -0700 From: "Jordan Crouse" To: linux-mips@linux-mips.org, rmk+lkml@arm.linux.org.uk, drzeus@drzeus.cx Subject: [PATCH] Force MMC/SD to 512 byte block sizes Message-ID: <20060106164406.GA15617@cosmic.amd.com> MIME-Version: 1.0 User-Agent: Mutt/1.5.11 X-WSS-ID: 6FA0430F2C42669973-01-01 Content-Type: multipart/mixed; boundary=45Z9DzgjV8m4Oswq Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9791 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jordan.crouse@amd.com Precedence: bulk X-list: linux-mips Content-Length: 3279 Lines: 103 --45Z9DzgjV8m4Oswq Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: 7bit This patch is not specific to the AU1200 SD driver, but thats what we used to debug and verify this, so thats why it is applied against the linux-mips tree. Pierre, I'm sending this to you too, because I thought you may be interested. Large SD cards (>=2GB) report a physical block size greater then 512 bytes (2GB reports 1024, and 4GB reports 2048). However, a sample of different brands of USB attached SD readers have shown that the logical block size is still forced to 512 bytes. The original mmc_block code was setting the block size to whatever the card was reporting, thereby causing much pain and suffering when using a card initialized elsewhere (bad partition tables, invalid FAT tables, etc). This patch forces the block size to be 512 bytes, and adjusts the capacity accordingly. With this you should be able to happily use very large cards interchangeably between platforms. At least, it has worked for us. Comments welcome, Jordan -- Jordan Crouse Senior Linux Engineer AMD - Personal Connectivity Solutions Group --45Z9DzgjV8m4Oswq Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename=mmc_fix.patch Content-Transfer-Encoding: 7bit PATCH: Force MMC/SD to 512 byte block sizes. Angry customers and investigation into USB attached MMC/SD readers have lead us to believe that the SD device block size should be fixed at 512 bytes regardless of the block size reported by the card. This comes into play with >2G cards. After applying this fix, filesystems written with a USB card reader can be read by the MMC subsystem and vice-versa. Signed-off-by: Jordan Crouse --- drivers/mmc/mmc_block.c | 16 +++++++++++++--- 1 files changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/mmc_block.c b/drivers/mmc/mmc_block.c index d91fcf7..96fa121 100644 --- a/drivers/mmc/mmc_block.c +++ b/drivers/mmc/mmc_block.c @@ -303,6 +303,7 @@ static struct mmc_blk_data *mmc_blk_allo { struct mmc_blk_data *md; int devidx, ret; + unsigned long cap; devidx = find_first_zero_bit(dev_use, MMC_NUM_MINORS); if (devidx >= MMC_NUM_MINORS) @@ -356,10 +357,19 @@ static struct mmc_blk_data *mmc_blk_allo sprintf(md->disk->disk_name, "mmcblk%d", devidx); sprintf(md->disk->devfs_name, "mmc/blk%d", devidx); - md->block_bits = card->csd.read_blkbits; + if (card->csd.read_blkbits > 9) { + md->block_bits = 9; + + cap = card->csd.capacity << + (card->csd.read_blkbits - 9); + } + else { + md->block_bits = card->csd.read_blkbits; + cap = card->csd.capacity; + } blk_queue_hardsect_size(md->queue.queue, 1 << md->block_bits); - set_capacity(md->disk, card->csd.capacity); + set_capacity(md->disk, cap); } out: return md; @@ -373,7 +383,7 @@ mmc_blk_set_blksize(struct mmc_blk_data mmc_card_claim_host(card); cmd.opcode = MMC_SET_BLOCKLEN; - cmd.arg = 1 << card->csd.read_blkbits; + cmd.arg = 1 << ((card->csd.read_blkbits > 9) ? 9 : card->csd.read_blkbits); cmd.flags = MMC_RSP_R1; err = mmc_wait_for_cmd(card->host, &cmd, 5); mmc_card_release_host(card); --45Z9DzgjV8m4Oswq-- From rmk+linux-mips=linux-mips.org@arm.linux.org.uk Fri Jan 6 16:56:53 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 06 Jan 2006 16:57:11 +0000 (GMT) Received: from caramon.arm.linux.org.uk ([212.18.232.186]:22285 "EHLO caramon.arm.linux.org.uk") by ftp.linux-mips.org with ESMTP id S8133583AbWAFQ4x (ORCPT ); Fri, 6 Jan 2006 16:56:53 +0000 Received: from flint.arm.linux.org.uk ([2002:d412:e8ba:1:201:2ff:fe14:8fad]) by caramon.arm.linux.org.uk with esmtpsa (TLSv1:DES-CBC3-SHA:168) (Exim 4.52) id 1Euuw8-0001Qt-UD; Fri, 06 Jan 2006 16:59:33 +0000 Received: from rmk by flint.arm.linux.org.uk with local (Exim 4.52) id 1Euuw6-0007xQ-Me; Fri, 06 Jan 2006 16:59:31 +0000 Date: Fri, 6 Jan 2006 16:59:30 +0000 From: Russell King To: Jordan Crouse Cc: linux-mips@linux-mips.org, drzeus@drzeus.cx Subject: Re: [PATCH] Force MMC/SD to 512 byte block sizes Message-ID: <20060106165930.GC16093@flint.arm.linux.org.uk> References: <20060106164406.GA15617@cosmic.amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20060106164406.GA15617@cosmic.amd.com> User-Agent: Mutt/1.4.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9792 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: rmk@arm.linux.org.uk Precedence: bulk X-list: linux-mips Content-Length: 687 Lines: 17 On Fri, Jan 06, 2006 at 09:44:06AM -0700, Jordan Crouse wrote: > This patch is not specific to the AU1200 SD driver, but thats what > we used to debug and verify this, so thats why it is applied against > the linux-mips tree. Pierre, I'm sending this to you too, because I thought > you may be interested. NACK. Please wait until the next round of patches get merged and then revalidate this. It's obviously wrong in the case of cards which do not support partial block writes, and it does nothing to detect this (apart from violating their advertised capabilities.) -- Russell King Linux kernel 2.6 ARM Linux - http://www.arm.linux.org.uk/ maintainer of: 2.6 Serial core From drzeus@drzeus.cx Fri Jan 6 17:01:44 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 06 Jan 2006 17:02:01 +0000 (GMT) Received: from [85.8.13.51] ([85.8.13.51]:31681 "EHLO smtp.drzeus.cx") by ftp.linux-mips.org with ESMTP id S8133583AbWAFRBo (ORCPT ); Fri, 6 Jan 2006 17:01:44 +0000 Received: from [10.8.0.5] (apollo.drzeus.cx [::ffff:10.8.0.5]) (AUTH: PLAIN drzeus, TLS: TLSv1/SSLv3,256bits,AES256-SHA) by smtp.drzeus.cx with esmtp; Fri, 06 Jan 2006 18:04:24 +0100 id 00062716.43BEA318.00007826 Message-ID: <43BEA317.8010203@drzeus.cx> Date: Fri, 06 Jan 2006 18:04:23 +0100 From: Pierre Ossman User-Agent: Mozilla Thunderbird 1.0.7-2.1.fc4.nr (X11/20051011) X-Accept-Language: en-us, en MIME-Version: 1.0 To: Jordan Crouse CC: linux-mips@linux-mips.org, rmk+lkml@arm.linux.org.uk Subject: Re: [PATCH] Force MMC/SD to 512 byte block sizes References: <20060106164406.GA15617@cosmic.amd.com> In-Reply-To: <20060106164406.GA15617@cosmic.amd.com> X-Enigmail-Version: 0.90.1.0 X-Enigmail-Supports: pgp-inline, pgp-mime Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9793 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: drzeus@drzeus.cx Precedence: bulk X-list: linux-mips Content-Length: 1933 Lines: 49 Jordan Crouse wrote: > This patch is not specific to the AU1200 SD driver, but thats what > we used to debug and verify this, so thats why it is applied against > the linux-mips tree. Pierre, I'm sending this to you too, because I thought > you may be interested. Much appreciated. :) > > Large SD cards (>=2GB) report a physical block size greater then 512 bytes > (2GB reports 1024, and 4GB reports 2048). However, a sample of different > brands of USB attached SD readers have shown that the logical block size > is still forced to 512 bytes. > > The original mmc_block code was setting the block size to whatever the > card was reporting, thereby causing much pain and suffering when using > a card initialized elsewhere (bad partition tables, invalid FAT tables, etc). > > This patch forces the block size to be 512 bytes, and adjusts the > capacity accordingly. With this you should be able to happily use very > large cards interchangeably between platforms. At least, it has worked for > us. > > > @@ -373,7 +383,7 @@ mmc_blk_set_blksize(struct mmc_blk_data > > mmc_card_claim_host(card); > cmd.opcode = MMC_SET_BLOCKLEN; > - cmd.arg = 1 << card->csd.read_blkbits; > + cmd.arg = 1 << ((card->csd.read_blkbits > 9) ? 9 : card->csd.read_blkbits); > cmd.flags = MMC_RSP_R1; > err = mmc_wait_for_cmd(card->host, &cmd, 5); > mmc_card_release_host(card); This will not work. Some cards do not accept block sizes larger than the one they've specified. This issue has been discussed on the arm kernel ml and Russell has begun producing patches to resolve the issue. To solve the issue you're seeing we should lie to the block layer, not the card. Which will cause problems when the block layer issues request that cannot be mapped to a integer number of card blocks. The issue is more complex than your patch suggests and I do not know enough about the block layer to propose a way out. Rgds Pierre From jcrouse@cosmic.amd.com Fri Jan 6 17:32:23 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 06 Jan 2006 17:32:46 +0000 (GMT) Received: from amdext4.amd.com ([163.181.251.6]:21978 "EHLO amdext4.amd.com") by ftp.linux-mips.org with ESMTP id S8133821AbWAFRcX (ORCPT ); Fri, 6 Jan 2006 17:32:23 +0000 Received: from SAUSGW02.amd.com (sausgw02.amd.com [163.181.250.22]) by amdext4.amd.com (8.12.11/8.12.11/AMD) with ESMTP id k06HYWIK013993; Fri, 6 Jan 2006 11:34:42 -0600 Received: from 163.181.250.1 by SAUSGW02.amd.com with ESMTP (AMD SMTP Relay (Email Firewall v6.1.0)); Fri, 06 Jan 2006 11:34:35 -0600 X-Server-Uuid: 5FC0E2DF-CD44-48CD-883A-0ED95B391E89 Received: from ldcmail.amd.com (ldcmail.amd.com [147.5.200.40]) by amdint2.amd.com (8.12.8/8.12.8/AMD) with ESMTP id k06HYZh5002156; Fri, 6 Jan 2006 11:34:35 -0600 (CST) Received: from cosmic.amd.com (cosmic.amd.com [147.5.201.206]) by ldcmail.amd.com (Postfix) with ESMTP id EBF1B2028; Fri, 6 Jan 2006 10:34:34 -0700 (MST) Received: from cosmic.amd.com (localhost [127.0.0.1]) by cosmic.amd.com (8.13.4/8.13.4) with ESMTP id k06HgO0T016686; Fri, 6 Jan 2006 10:42:24 -0700 Received: (from jcrouse@localhost) by cosmic.amd.com ( 8.13.4/8.13.4/Submit) id k06HgNS2016685; Fri, 6 Jan 2006 10:42:23 -0700 Date: Fri, 6 Jan 2006 10:42:23 -0700 From: "Jordan Crouse" To: "Russell King" cc: linux-mips@linux-mips.org, drzeus@drzeus.cx Subject: Re: Force MMC/SD to 512 byte block sizes Message-ID: <20060106174223.GB15617@cosmic.amd.com> References: <20060106164406.GA15617@cosmic.amd.com> <20060106165930.GC16093@flint.arm.linux.org.uk> MIME-Version: 1.0 In-Reply-To: <20060106165930.GC16093@flint.arm.linux.org.uk> User-Agent: Mutt/1.5.11 X-WSS-ID: 6FA075A10T02055239-01-01 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9794 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jordan.crouse@amd.com Precedence: bulk X-list: linux-mips Content-Length: 1181 Lines: 32 On 06/01/06 16:59 +0000, Russell King wrote: > On Fri, Jan 06, 2006 at 09:44:06AM -0700, Jordan Crouse wrote: > > This patch is not specific to the AU1200 SD driver, but thats what > > we used to debug and verify this, so thats why it is applied against > > the linux-mips tree. Pierre, I'm sending this to you too, because I thought > > you may be interested. > > NACK. Please wait until the next round of patches get merged and then > revalidate this. Fair enough - I am only getting what Ralf and Linus put in their git tree - I probably should have checked your tree before assuming the code was current. > It's obviously wrong in the case of cards which do not support partial > block writes, and it does nothing to detect this (apart from violating > their advertised capabilities.) Ok - I can understand that - its unlikely that such cards would have a physical block size > 512 bytes, but its always better to be safe then sorry. Thats a fairly straight forward fix, and I'll do it while waiting for your code to bubble through. Regards, Jordan -- Jordan Crouse Senior Linux Engineer AMD - Personal Connectivity Solutions Group From jcrouse@cosmic.amd.com Fri Jan 6 17:40:07 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 06 Jan 2006 17:40:29 +0000 (GMT) Received: from amdext4.amd.com ([163.181.251.6]:7387 "EHLO amdext4.amd.com") by ftp.linux-mips.org with ESMTP id S8133835AbWAFRkH (ORCPT ); Fri, 6 Jan 2006 17:40:07 +0000 Received: from SAUSGW01.amd.com (sausgw01.amd.com [163.181.250.21]) by amdext4.amd.com (8.12.11/8.12.11/AMD) with ESMTP id k06HgGth015227; Fri, 6 Jan 2006 11:42:31 -0600 Received: from 163.181.250.1 by SAUSGW02.amd.com with ESMTP (AMD SMTP Relay (Email Firewall v6.1.0)); Fri, 06 Jan 2006 11:42:20 -0600 X-Server-Uuid: 5FC0E2DF-CD44-48CD-883A-0ED95B391E89 Received: from ldcmail.amd.com (ldcmail.amd.com [147.5.200.40]) by amdint2.amd.com (8.12.8/8.12.8/AMD) with ESMTP id k06HgKh5002423; Fri, 6 Jan 2006 11:42:20 -0600 (CST) Received: from cosmic.amd.com (cosmic.amd.com [147.5.201.206]) by ldcmail.amd.com (Postfix) with ESMTP id D70262028; Fri, 6 Jan 2006 10:42:19 -0700 (MST) Received: from cosmic.amd.com (localhost [127.0.0.1]) by cosmic.amd.com (8.13.4/8.13.4) with ESMTP id k06Ho9cp016715; Fri, 6 Jan 2006 10:50:09 -0700 Received: (from jcrouse@localhost) by cosmic.amd.com ( 8.13.4/8.13.4/Submit) id k06Ho8Zs016714; Fri, 6 Jan 2006 10:50:08 -0700 Date: Fri, 6 Jan 2006 10:50:08 -0700 From: "Jordan Crouse" To: "Pierre Ossman" cc: linux-mips@linux-mips.org, rmk+lkml@arm.linux.org.uk Subject: Re: Force MMC/SD to 512 byte block sizes Message-ID: <20060106175008.GC15617@cosmic.amd.com> References: <20060106164406.GA15617@cosmic.amd.com> <43BEA317.8010203@drzeus.cx> MIME-Version: 1.0 In-Reply-To: <43BEA317.8010203@drzeus.cx> User-Agent: Mutt/1.5.11 X-WSS-ID: 6FA074760T02056895-01-01 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9795 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jordan.crouse@amd.com Precedence: bulk X-list: linux-mips Content-Length: 717 Lines: 22 On 06/01/06 18:04 +0100, Pierre Ossman wrote: > This will not work. Some cards do not accept block sizes larger than the > one they've specified. > > This issue has been discussed on the arm kernel ml and Russell has begun > producing patches to resolve the issue. Which just goes to prove that if I'm going to do SD development, I need to start watching the right mailing lists. I'll defer to the previous work on this - I do know that this has worked for pretty much every 2G and 4G card we could get our hands on, so that was enough for me to throw it at you guys and see what sticks. Jordan -- Jordan Crouse Senior Linux Engineer AMD - Personal Connectivity Solutions Group From linux-mips@packetvision.com Fri Jan 6 17:48:34 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 06 Jan 2006 17:48:51 +0000 (GMT) Received: from mra02.ch.as12513.net ([82.153.252.24]:13224 "EHLO mra02.ch.as12513.net") by ftp.linux-mips.org with ESMTP id S8133842AbWAFRse (ORCPT ); Fri, 6 Jan 2006 17:48:34 +0000 Received: from localhost (localhost [127.0.0.1]) by mra02.ch.as12513.net (Postfix) with ESMTP id 936F8D4504; Fri, 6 Jan 2006 17:51:10 +0000 (GMT) Received: from mra02.ch.as12513.net ([127.0.0.1]) by localhost (mra02.ch.as12513.net [127.0.0.1]) (amavisd-new, port 10024) with LMTP id 29495-01-21; Fri, 6 Jan 2006 17:51:10 +0000 (GMT) Received: from [192.168.1.212] (unknown [82.152.104.245]) by mra02.ch.as12513.net (Postfix) with ESMTP id 8F099D45B3; Fri, 6 Jan 2006 17:51:09 +0000 (GMT) Subject: Re: Jump/branch to external symbol From: Alex Gonzalez Reply-To: linux-mips@alexgg.plus.com To: Daniel Jacobowitz Cc: "Maciej W. Rozycki" , Alex Gonzalez , linux-mips@linux-mips.org In-Reply-To: <20060106145216.GA6849@nevyn.them.org> References: <20060106145216.GA6849@nevyn.them.org> Content-Type: text/plain Date: Fri, 06 Jan 2006 17:50:20 +0000 Message-Id: <1136569820.9887.24.camel@localhost.localdomain> Mime-Version: 1.0 X-Mailer: Evolution 2.4.1 Content-Transfer-Encoding: 7bit X-Virus-Scanned: by Eclipse VIRUSshield at eclipse.net.uk Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9796 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: linux-mips@packetvision.com Precedence: bulk X-list: linux-mips Content-Length: 671 Lines: 19 Thanks, that works. Somehow it didn't occurred to me to try it. Alex On Fri, 2006-01-06 at 09:52 -0500, Daniel Jacobowitz wrote: > On Fri, Jan 06, 2006 at 11:51:56AM +0000, Maciej W. Rozycki wrote: > > On Fri, 6 Jan 2006, Alex Gonzalez wrote: > > > > > I am happy with the patch for binutils-2.15, and I would need a > > > solution for binutils-2.13. > > > > > > Can anybody offer any help? > > > > Well, the most obvious solution is upgrading to the current release, > > which is 2.16.1 now. Otherwise you are probably on your own -- 2.15 is > > already somewhat old and 2.13 is ancient. > > Or better yet to trunk and you won't need any patches for this. > From zzh.hust@gmail.com Sat Jan 7 03:36:48 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 07 Jan 2006 03:37:05 +0000 (GMT) Received: from wproxy.gmail.com ([64.233.184.206]:19296 "EHLO wproxy.gmail.com") by ftp.linux-mips.org with ESMTP id S8133835AbWAGDgs convert rfc822-to-8bit (ORCPT ); Sat, 7 Jan 2006 03:36:48 +0000 Received: by wproxy.gmail.com with SMTP id 36so2988747wra for ; Fri, 06 Jan 2006 19:39:33 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=I1kW2CCPDtkoxj+NvQlmBT8FTYN8gBBu+hcqO4jrpkgO6DlfvRGnnrvBSPx0OUt4yj+o2CiSXcHHf/YqfFTmm6so8e34lzzCU/4OryKPJZbdEBHU5SFhM5B3qWDncIHXXqq6wt6qKJSSXD5fHLpDXT2Wo6lsooeOtkKttmZz8e0= Received: by 10.54.158.2 with SMTP id g2mr1596625wre; Fri, 06 Jan 2006 19:38:46 -0800 (PST) Received: by 10.54.156.1 with HTTP; Fri, 6 Jan 2006 19:39:32 -0800 (PST) Message-ID: <50c9a2250601061939j42c4cc85n1c0246d9f8068938@mail.gmail.com> Date: Sat, 7 Jan 2006 11:39:32 +0800 From: zhuzhenhua To: jp Subject: Re: sometimes get "crc error" while uncompressed ramdisk Cc: linux-mips In-Reply-To: <1136537813.5239.23.camel@localhost.localdomain> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline References: <50c9a2250601052240n5696e353teb2b798ecbf802f0@mail.gmail.com> <1136537813.5239.23.camel@localhost.localdomain> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9797 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zzh.hust@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 1112 Lines: 36 On 1/6/06, jp wrote: > On Fri, 2006-01-06 at 14:40 +0800, zhuzhenhua wrote: > > i make a ramdisk by myself, and sometimes the kernel boot the ramdisk > > correctly but sometimes it printk "crc error" while uncompressed > > ramdisk, did someone meet this situation? > > thanks for any hints > > > > Assuming your build and everything else is as it should be it may be a > RAM fault. Are you using a custom board? > > I had some prototype boards here with some really long tracks to RAM. > (and some really short ones too!) > > Memory tests such walking ones worked fine but the decompress of the > ramdisk works RAM pretty hard and it showed up intermittent faults like > you describe. Tended to be worse when the board was warm. I'd spray some > Freezit on and it would go back to working OK. > > You could also try running the RAM slower and see if the fault > disappears. > > > JP > > > maybe you are right, because i work on our FPGA board, and the situation is similiar as your description. i will try to slow down the sdram and to see what will happen thanks! Best regards zhuzhenhua From lhrkernelcoder@gmail.com Sat Jan 7 06:59:51 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 07 Jan 2006 07:00:09 +0000 (GMT) Received: from wproxy.gmail.com ([64.233.184.207]:42318 "EHLO wproxy.gmail.com") by ftp.linux-mips.org with ESMTP id S8126484AbWAGG7v convert rfc822-to-8bit (ORCPT ); Sat, 7 Jan 2006 06:59:51 +0000 Received: by wproxy.gmail.com with SMTP id 36so3005044wra for ; Fri, 06 Jan 2006 23:02:37 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:mime-version:content-type:content-transfer-encoding:content-disposition; b=YxkG56eHgDUukODYCBCprgk+yrQAsIJBInd2m0rabMIsK0c/+vqNtizBmfDzRLcK3tYbdJ0p/Yt9vJen9H/ujuWADjjFIXGvnTg8Arf+FVJ32qqtbuZMs2+g3Ccmv13YWIZZEWQ8Bsr9mykYJOmb9xp8fSFFVZ37CTiOOUfqXwE= Received: by 10.54.139.2 with SMTP id m2mr5774314wrd; Fri, 06 Jan 2006 23:02:37 -0800 (PST) Received: by 10.54.147.20 with HTTP; Fri, 6 Jan 2006 23:02:37 -0800 (PST) Message-ID: Date: Fri, 6 Jan 2006 23:02:37 -0800 From: kernel coder To: linux-mips@linux-mips.org Subject: Almost 80% of UDP packets dropped MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9798 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: lhrkernelcoder@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 1314 Lines: 30 hi, I was trying to measure the UDP reception speed on my borad which has MIPS 4kc processor with 133 MHZ speed.I was transfering 10mb file from intel pentium 4 machine to MIPS board,but the recieved file was only 900kB. When i further investigated the problem ,i came to know that the user application was not getting enough opportunities to get data from socket queue which caused almost 80% of packets to be dropped as socket queue had no free space. When i increased the socket recieve buffer size,it resulted in increase in no. of packets recieved .When i slow slowed down the transmitter , it also caused more packets to be recieved. But the above mentioned mechanism only decreased no. of lost packets.But there was no way that i could increase UDP reception speed because the user application was not getting enough opportunities to read packets in burst of UDP packets. I noticed that user application started recieveing packets after Kernel had recieved all the UDP packets. Please tell me how can i make sure that user application or udp client running MIPS 4kc processor gets enough opportunities to dequeue packets from socket buffer so that lost of packets could be reduced to minimal and also the size of UDP recieved file in a specific interval of time could be increased. lhrkernelcoder From fosterb@uoguelph.ca Sat Jan 7 07:35:29 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 07 Jan 2006 07:35:49 +0000 (GMT) Received: from dragonboat.cs.uoguelph.ca ([131.104.96.108]:39624 "EHLO dragonboat.cs.uoguelph.ca") by ftp.linux-mips.org with ESMTP id S8126484AbWAGHf2 (ORCPT ); Sat, 7 Jan 2006 07:35:28 +0000 Received: from beddie.cis.uoguelph.ca (marvin.cis.uoguelph.ca [131.104.48.131]) by dragonboat.cs.uoguelph.ca (8.13.1/8.13.1) with ESMTP id k077cDWd021183; Sat, 7 Jan 2006 02:38:13 -0500 Received: from localhost (localhost.localdomain [127.0.0.1]) by beddie.cis.uoguelph.ca (Postfix) with ESMTP id 53BA17E8F; Sat, 7 Jan 2006 02:36:17 -0500 (EST) Received: from beddie.cis.uoguelph.ca ([127.0.0.1]) by localhost (beddie [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 21768-06; Sat, 7 Jan 2006 02:36:16 -0500 (EST) Received: from [192.168.0.104] (CPE001217cc2ab6-CM001371143eca.cpe.net.cable.rogers.com [70.30.137.118]) by beddie.cis.uoguelph.ca (Postfix) with ESMTP id 685557D0D; Sat, 7 Jan 2006 02:36:16 -0500 (EST) Message-ID: <43BF6FE3.7030600@uoguelph.ca> Date: Sat, 07 Jan 2006 02:38:11 -0500 From: Brett Foster User-Agent: Mozilla Thunderbird 1.0 (Windows/20041206) X-Accept-Language: en-us, en MIME-Version: 1.0 To: kernel coder CC: linux-mips@linux-mips.org Subject: Re: Almost 80% of UDP packets dropped References: In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-Virus-Scanned: by amavisd-new-20030616-p10 (Debian) at cs-club.org X-Scanned-By: MIMEDefang 2.52 on 131.104.96.108 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9799 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: fosterb@uoguelph.ca Precedence: bulk X-list: linux-mips Content-Length: 875 Lines: 25 kernel coder wrote: >hi, > I was trying to measure the UDP reception speed on my borad which >has MIPS 4kc processor with 133 MHZ speed.I was transfering 10mb file >from intel pentium 4 machine to MIPS board,but the recieved file was >only 900kB. > > UDP was not designed with reliability in mind -- it really isn't meant for sending a 10 meg file without a packet loss. >When i further investigated the problem ,i came to know that the user >application was not getting enough opportunities to get data from >socket queue which caused almost 80% of packets to be dropped as >socket queue had no free space. > > (Among other sources) I'm pretty sure this behaviour was discussed in: Unix Network Programming, Vol. 1: The Sockets Networking API, Third Edition (Something like page 257.) I don't know if there is anything else going on with the kernel but... Brett From KevinK@mips.com Sat Jan 7 09:22:08 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 07 Jan 2006 09:22:25 +0000 (GMT) Received: from 209-232-97-206.ded.pacbell.net ([209.232.97.206]:37098 "EHLO dns0.mips.com") by ftp.linux-mips.org with ESMTP id S8133363AbWAGJWI (ORCPT ); Sat, 7 Jan 2006 09:22:08 +0000 Received: from mercury.mips.com (sbcns-dmz [209.232.97.193]) by dns0.mips.com (8.12.11/8.12.11) with ESMTP id k079Oipt001546; Sat, 7 Jan 2006 01:24:44 -0800 (PST) Received: from Ulysses (laptop-ying-ho.mips.com [192.168.2.2] (may be forged)) by mercury.mips.com (8.12.9/8.12.11) with SMTP id k079OdYr004772; Sat, 7 Jan 2006 01:24:40 -0800 (PST) Message-ID: <001d01c6136c$2a77ae40$0202a8c0@Ulysses> From: "Kevin D. Kissell" To: "kernel coder" , References: Subject: Re: Almost 80% of UDP packets dropped Date: Sat, 7 Jan 2006 10:24:29 +0100 MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit X-Priority: 3 X-MSMail-Priority: Normal X-Mailer: Microsoft Outlook Express 6.00.2800.1506 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2800.1506 X-Scanned-By: MIMEDefang 2.39 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9800 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: KevinK@mips.com Precedence: bulk X-list: linux-mips Content-Length: 1706 Lines: 42 What value of HZ are you using? If you're still at the 2.6 default of 1000, try reducing it to 100 and see if things improve... ----- Original Message ----- From: "kernel coder" To: Sent: Saturday, January 07, 2006 8:02 AM Subject: Almost 80% of UDP packets dropped > hi, > I was trying to measure the UDP reception speed on my borad which > has MIPS 4kc processor with 133 MHZ speed.I was transfering 10mb file > from intel pentium 4 machine to MIPS board,but the recieved file was > only 900kB. > > When i further investigated the problem ,i came to know that the user > application was not getting enough opportunities to get data from > socket queue which caused almost 80% of packets to be dropped as > socket queue had no free space. > > When i increased the socket recieve buffer size,it resulted in > increase in no. of packets recieved .When i slow slowed down the > transmitter , it also caused more packets to be recieved. > > But the above mentioned mechanism only decreased no. of lost > packets.But there was no way that i could increase UDP reception speed > because the user application was not getting enough opportunities to > read packets in burst of UDP packets. > > I noticed that user application started recieveing packets after > Kernel had recieved all the UDP packets. > > Please tell me how can i make sure that user application or udp client > running MIPS 4kc processor gets enough opportunities to dequeue > packets from socket buffer so that lost of packets could be reduced to > minimal and also the size of UDP recieved file in a specific interval > of time could be increased. > > lhrkernelcoder > > From alan@lxorguk.ukuu.org.uk Sat Jan 7 09:42:57 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 07 Jan 2006 09:43:14 +0000 (GMT) Received: from [81.2.110.250] ([81.2.110.250]:22931 "EHLO lxorguk.ukuu.org.uk") by ftp.linux-mips.org with ESMTP id S8133363AbWAGJm5 (ORCPT ); Sat, 7 Jan 2006 09:42:57 +0000 Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by lxorguk.ukuu.org.uk (8.13.4/8.13.4) with ESMTP id k079meLo010775; Sat, 7 Jan 2006 09:48:41 GMT Received: (from alan@localhost) by localhost.localdomain (8.13.4/8.13.4/Submit) id k079md6L010774; Sat, 7 Jan 2006 09:48:39 GMT X-Authentication-Warning: localhost.localdomain: alan set sender to alan@lxorguk.ukuu.org.uk using -f Subject: Re: Almost 80% of UDP packets dropped From: Alan Cox To: kernel coder Cc: linux-mips@linux-mips.org In-Reply-To: References: Content-Type: text/plain Content-Transfer-Encoding: 7bit Date: Sat, 07 Jan 2006 09:48:35 +0000 Message-Id: <1136627315.3748.30.camel@localhost.localdomain> Mime-Version: 1.0 X-Mailer: Evolution 2.2.3 (2.2.3-2.fc4) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9801 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: alan@lxorguk.ukuu.org.uk Precedence: bulk X-list: linux-mips Content-Length: 613 Lines: 14 On Gwe, 2006-01-06 at 23:02 -0800, kernel coder wrote: > I noticed that user application started recieveing packets after > Kernel had recieved all the UDP packets. If your network chip/ram/processor combination is not fast enough to run user space applications and handle a full speed network packet stream then you either need to send more slowly, make the kernel network driver more efficient or add some kind of interrupt/polling code to reduce system load to avoid this. The NAPI layer in the networking code is designed to make this possible. Probably worth discussing further on netdev@oss.sgi.com Alan From ralf@linux-mips.org Sat Jan 7 11:13:07 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 07 Jan 2006 11:13:32 +0000 (GMT) Received: from p549F5FA9.dip.t-dialin.net ([84.159.95.169]:10085 "EHLO mail.linux-mips.net") by ftp.linux-mips.org with ESMTP id S8133382AbWAGLNH (ORCPT ); Sat, 7 Jan 2006 11:13:07 +0000 Received: from fluff.linux-mips.net (localhost.localdomain [127.0.0.1]) by mail.linux-mips.net (8.13.4/8.13.1) with ESMTP id k07BFkOm032650; Sat, 7 Jan 2006 12:15:46 +0100 Received: (from ralf@localhost) by fluff.linux-mips.net (8.13.4/8.13.4/Submit) id k07BFewS032649; Sat, 7 Jan 2006 12:15:40 +0100 Date: Sat, 7 Jan 2006 12:15:40 +0100 From: Ralf Baechle To: "Maciej W. Rozycki" Cc: Alex Gonzalez , linux-mips@linux-mips.org Subject: Re: Jump/branch to external symbol Message-ID: <20060107111540.GA30498@linux-mips.org> References: Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9802 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Content-Length: 463 Lines: 14 On Fri, Jan 06, 2006 at 11:51:56AM +0000, Maciej W. Rozycki wrote: > > solution for binutils-2.13. > > > > Can anybody offer any help? > > Well, the most obvious solution is upgrading to the current release, > which is 2.16.1 now. Otherwise you are probably on your own -- 2.15 is > already somewhat old and 2.13 is ancient. Binutils 2.15 may crash when building particular configurations, so 2.15 is no longer acceptable for building the kernel. Ralf From bunk@stusta.de Sun Jan 8 15:29:22 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 08 Jan 2006 15:29:40 +0000 (GMT) Received: from emailhub.stusta.mhn.de ([141.84.69.5]:55563 "HELO mailout.stusta.mhn.de") by ftp.linux-mips.org with SMTP id S8133634AbWAHP3W (ORCPT ); Sun, 8 Jan 2006 15:29:22 +0000 Received: (qmail 8984 invoked from network); 8 Jan 2006 15:32:09 -0000 Received: from r063144.stusta.swh.mhn.de (10.150.63.144) by mailout.stusta.mhn.de with SMTP; 8 Jan 2006 15:32:09 -0000 Received: by r063144.stusta.swh.mhn.de (Postfix, from userid 1000) id EF7981479CF; Sun, 8 Jan 2006 16:32:09 +0100 (CET) Date: Sun, 8 Jan 2006 16:32:09 +0100 From: Adrian Bunk To: ralf@linux-mips.org, schwidefsky@de.ibm.com, linux390@de.ibm.com Cc: linux-390@vm.marist.edu, linux-mips@linux-mips.org, linux-kernel@vger.kernel.org Subject: [2.6 patch] mips/s390: remove -finline-limit=10000{,0} Message-ID: <20060108153209.GM3774@stusta.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.11 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9803 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: bunk@stusta.de Precedence: bulk X-list: linux-mips Content-Length: 1042 Lines: 33 -finline-limit might have been required for older compilers, but nowadays it does no longer make sense. Signed-off-by: Adrian Bunk --- arch/mips/Makefile | 1 - arch/s390/Makefile | 1 - 2 files changed, 2 deletions(-) --- linux-2.6.15-mm2-full/arch/mips/Makefile.old 2006-01-08 16:25:35.000000000 +0100 +++ linux-2.6.15-mm2-full/arch/mips/Makefile 2006-01-08 16:25:46.000000000 +0100 @@ -93,7 +93,6 @@ # cflags-y += -I $(TOPDIR)/include/asm/gcc cflags-y += -G 0 -mno-abicalls -fno-pic -pipe -cflags-y += $(call cc-option, -finline-limit=100000) LDFLAGS_vmlinux += -G 0 -static -n -nostdlib MODFLAGS += -mlong-calls --- linux-2.6.15-mm2-full/arch/s390/Makefile.old 2006-01-08 16:25:53.000000000 +0100 +++ linux-2.6.15-mm2-full/arch/s390/Makefile 2006-01-08 16:25:59.000000000 +0100 @@ -67,7 +67,6 @@ endif CFLAGS += -mbackchain -msoft-float $(cflags-y) -CFLAGS += $(call cc-option,-finline-limit=10000) CFLAGS += -pipe -fno-strength-reduce -Wno-sign-compare AFLAGS += $(aflags-y) From zzh.hust@gmail.com Mon Jan 9 01:44:51 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 01:45:09 +0000 (GMT) Received: from wproxy.gmail.com ([64.233.184.203]:60679 "EHLO wproxy.gmail.com") by ftp.linux-mips.org with ESMTP id S8133656AbWAIBov convert rfc822-to-8bit (ORCPT ); Mon, 9 Jan 2006 01:44:51 +0000 Received: by wproxy.gmail.com with SMTP id 36so3202370wra for ; Sun, 08 Jan 2006 17:47:47 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=rDwoPTCDVsMQMxA15EIOhSGBTNf9jU/jF1tvm/EP9gduGxN18bmTwQo2KXLAzGUZFq5Bfmr6B7hlaH86IGVw4T20+i2HZGvg1x5pvd2+9jNHYv1vuZv/z1oB4hK6fcgZXrGNJeUti6Aoiu4ui4l2jDqjTi8kZsNEMREgL5XD/D8= Received: by 10.54.60.10 with SMTP id i10mr5897478wra; Sun, 08 Jan 2006 17:47:46 -0800 (PST) Received: by 10.54.156.1 with HTTP; Sun, 8 Jan 2006 17:47:46 -0800 (PST) Message-ID: <50c9a2250601081747l55c5b03p1601329141047c3d@mail.gmail.com> Date: Mon, 9 Jan 2006 09:47:46 +0800 From: zhuzhenhua To: linux-mips Subject: Re: sometimes get "crc error" while uncompressed ramdisk In-Reply-To: <50c9a2250601061939j42c4cc85n1c0246d9f8068938@mail.gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline References: <50c9a2250601052240n5696e353teb2b798ecbf802f0@mail.gmail.com> <1136537813.5239.23.camel@localhost.localdomain> <50c9a2250601061939j42c4cc85n1c0246d9f8068938@mail.gmail.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9804 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zzh.hust@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 2003 Lines: 75 and i find the ramdisk sometimes uncompressed correctly, sometimes not. if if uncorrect, if often stop at generic_file_write_nolock -> __grab_cache_page ->add_to_page_cache_unique ->__add_to_page_cache->add_page_to_hash_queue static void add_page_to_hash_queue(struct page * page, struct page **p) { struct page *next = *p; *p = page; page->next_hash = next; page->pprev_hash = p; if (next) next->pprev_hash = &page->next_hash; if (page->buffers) PAGE_BUG(page); ~~~~~~~~~~~~~~~~~~~~~~~~~~ atomic_inc(&page_cache_size); } it occur oops at if (page->buffers) PAGE_BUG(page); i am not sure it may caused by hardware or uncorrect initialized of sdram? or maybe uncorrect-maked ramdisk can cause this? thanks for any hints! Best regards! Zhuzhenhua On 1/7/06, zhuzhenhua wrote: > On 1/6/06, jp wrote: > > On Fri, 2006-01-06 at 14:40 +0800, zhuzhenhua wrote: > > > i make a ramdisk by myself, and sometimes the kernel boot the ramdisk > > > correctly but sometimes it printk "crc error" while uncompressed > > > ramdisk, did someone meet this situation? > > > thanks for any hints > > > > > > > Assuming your build and everything else is as it should be it may be a > > RAM fault. Are you using a custom board? > > > > I had some prototype boards here with some really long tracks to RAM. > > (and some really short ones too!) > > > > Memory tests such walking ones worked fine but the decompress of the > > ramdisk works RAM pretty hard and it showed up intermittent faults like > > you describe. Tended to be worse when the board was warm. I'd spray some > > Freezit on and it would go back to working OK. > > > > You could also try running the RAM slower and see if the fault > > disappears. > > > > > > JP > > > > > > > maybe you are right, because i work on our FPGA board, and the > situation is similiar as your description. i will try to slow down the > sdram and to see what will happen > > thanks! > > Best regards > > zhuzhenhua > From satheshbabu.edara@analog.com Mon Jan 9 04:51:23 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 04:51:43 +0000 (GMT) Received: from nwd2mail1.analog.com ([137.71.25.50]:5781 "EHLO nwd2mail1.analog.com") by ftp.linux-mips.org with ESMTP id S8133437AbWAIEvX (ORCPT ); Mon, 9 Jan 2006 04:51:23 +0000 Received: from nwd2mhb1.analog.com (nwd2mhb1.analog.com [137.71.5.12]) by nwd2mail1.analog.com (8.12.10/8.12.10) with ESMTP id k094sSQN008663; Sun, 8 Jan 2006 23:54:28 -0500 Received: from lilac.hdcindia.analog.com ([10.121.13.31]) by nwd2mhb1.analog.com (8.9.3 (PHNE_28810+JAGae91741)/8.9.3) with ESMTP id XAA15620; Sun, 8 Jan 2006 23:54:17 -0500 (EST) Received: from SEdaraL01 ([10.121.13.96]) by lilac.hdcindia.analog.com (8.12.10+Sun/8.12.10) with ESMTP id k094rfaZ028956; Mon, 9 Jan 2006 10:23:42 +0530 (IST) Message-Id: <200601090453.k094rfaZ028956@lilac.hdcindia.analog.com> From: "Sathesh Babu Edara" To: , Subject: LL and SC instruction simulation Date: Mon, 9 Jan 2006 10:24:14 +0530 MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Mailer: Microsoft Office Outlook, Build 11.0.6353 In-Reply-To: <43BBC85C.4040405@mips.com> Thread-Index: AcYRL2wEZATk27YPQauJfmdzF9yApgDpTFIA X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2900.2180 X-Scanned-By: MIMEDefang 2.49 on 137.71.25.50 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9805 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: satheshbabu.edara@analog.com Precedence: bulk X-list: linux-mips Content-Length: 645 Lines: 25 Hi, We have ported linux-2.4.18 and linux-2-6.12 kernel (mips.org)onto MIPS processor (CPU type lx4189). We observed that on 2.4 kernel,ll and sc instruction exception handlers hitting very often. Where as on linux-2.6.12 this is not happening. Can anybody have idea why this instructions are hitting on 2.4.18 kernel and not on 2-6.12 kernel. What is the significance of these instructions?. Note : For linux-2.4.18 : We use GCC version -3.3.4 binutils version -2.15 and uClibc version -0.9.26 For linux-2.6.12 : We use GCC version -3.4.3 binutils version -2.15 and uClibc version -0.9.28. Thanks in advance. Regards, Sathesh From satheshbabu.edara@analog.com Mon Jan 9 05:16:52 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 05:17:10 +0000 (GMT) Received: from nwd2mail2.analog.com ([137.71.25.51]:57228 "EHLO nwd2mail2.analog.com") by ftp.linux-mips.org with ESMTP id S8134493AbWAIFQw (ORCPT ); Mon, 9 Jan 2006 05:16:52 +0000 Received: from nwd2mhb1.analog.com (nwd2mhb1.analog.com [137.71.5.12]) by nwd2mail2.analog.com (8.12.10/8.12.10) with ESMTP id k095Jtai002350; Mon, 9 Jan 2006 00:19:55 -0500 Received: from lilac.hdcindia.analog.com ([10.121.13.31]) by nwd2mhb1.analog.com (8.9.3 (PHNE_28810+JAGae91741)/8.9.3) with ESMTP id AAA20923; Mon, 9 Jan 2006 00:19:46 -0500 (EST) Received: from SEdaraL01 ([10.121.13.96]) by lilac.hdcindia.analog.com (8.12.10+Sun/8.12.10) with ESMTP id k095JAaZ000965; Mon, 9 Jan 2006 10:49:10 +0530 (IST) Message-Id: <200601090519.k095JAaZ000965@lilac.hdcindia.analog.com> From: "Sathesh Babu Edara" To: , Subject: LL and SC instruction simulation Date: Mon, 9 Jan 2006 10:49:44 +0530 MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Mailer: Microsoft Office Outlook, Build 11.0.6353 In-Reply-To: Thread-Index: AcYRL2wEZATk27YPQauJfmdzF9yApgDpTFIAAAHm3mA= X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2900.2180 X-Scanned-By: MIMEDefang 2.49 on 137.71.25.51 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9806 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: satheshbabu.edara@analog.com Precedence: bulk X-list: linux-mips Content-Length: 648 Lines: 26 Hi, We have ported linux-2.4.18 and linux-2-6.12 kernel (mips.org)onto MIPS processor (CPU type lx4189). We observed that on 2.4 kernel,ll and sc instruction exception handlers hitting very often. Where as on linux-2.6.12 this is not happening. Can anybody have idea why this instructions are hitting on 2.4.18 kernel and not on 2-6.12 kernel. What is the significance of these instructions?. Note : For linux-2.4.18 : We use GCC version -3.3.4 binutils version -2.15 and uClibc version -0.9.26 For linux-2.6.12 : We use GCC version -3.4.3 binutils version -2.15 and uClibc version -0.9.28. Thanks in advance. Regards, Sathesh From zzh.hust@gmail.com Mon Jan 9 05:56:38 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 05:56:58 +0000 (GMT) Received: from wproxy.gmail.com ([64.233.184.200]:64780 "EHLO wproxy.gmail.com") by ftp.linux-mips.org with ESMTP id S8133698AbWAIF4i convert rfc822-to-8bit (ORCPT ); Mon, 9 Jan 2006 05:56:38 +0000 Received: by wproxy.gmail.com with SMTP id 36so3227774wra for ; Sun, 08 Jan 2006 21:59:35 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:mime-version:content-type:content-transfer-encoding:content-disposition; b=ggurlyqscqXQNsCt0Cn2BH6NDH4/sX92fNmjp1pbOt3OSdpirlIKNgNtLTu/T6GKkoBu+vPC/uxd2l1hzIuTUvU04SIeB3yCw+2Jmxjf2bn4R6BR+1oHlMsLkfulDRpFf8yoBjw3bU10x/D3lpaxZZUxRM9Oxsvj7UbCWQf8GDU= Received: by 10.54.136.13 with SMTP id j13mr4808306wrd; Sun, 08 Jan 2006 21:59:35 -0800 (PST) Received: by 10.54.156.1 with HTTP; Sun, 8 Jan 2006 21:59:34 -0800 (PST) Message-ID: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> Date: Mon, 9 Jan 2006 13:59:34 +0800 From: zhuzhenhua To: linux-mips Subject: why the early_initcall(au1x00_setup) do not work? MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9807 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zzh.hust@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 396 Lines: 11 i download a standard 2.6.14 kernel, and compile it for dbau1100, and i find the early_initcall(au1x00_setup) was not compiled into the vmlinux. and i find at the linux-mips cvs, it used plat_setup instead of early_initcall. does it means my toolchain is not correct to compile the early_initcall, or in the standard 2.6.14 kernel, the early_initcall do not work well? Best regards! zhuzhenhua From satheshbabu.edara@analog.com Mon Jan 9 07:40:31 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 07:40:50 +0000 (GMT) Received: from nwd2mail3.analog.com ([137.71.25.52]:63464 "EHLO nwd2mail3.analog.com") by ftp.linux-mips.org with ESMTP id S8133646AbWAIHkb (ORCPT ); Mon, 9 Jan 2006 07:40:31 +0000 Received: from nwd2mhb1.analog.com (nwd2mhb1.analog.com [137.71.5.12]) by nwd2mail3.analog.com (8.12.10/8.12.10) with ESMTP id k097hXGY026063; Mon, 9 Jan 2006 02:43:33 -0500 Received: from lilac.hdcindia.analog.com ([10.121.13.31]) by nwd2mhb1.analog.com (8.9.3 (PHNE_28810+JAGae91741)/8.9.3) with ESMTP id CAA07620; Mon, 9 Jan 2006 02:43:19 -0500 (EST) Received: from SEdaraL01 ([10.121.13.96]) by lilac.hdcindia.analog.com (8.12.10+Sun/8.12.10) with ESMTP id k097gYaZ017304; Mon, 9 Jan 2006 13:12:40 +0530 (IST) Message-Id: <200601090742.k097gYaZ017304@lilac.hdcindia.analog.com> From: "Sathesh Babu Edara" To: "'Kevin D. Kissell'" , , Subject: RE: Date: Mon, 9 Jan 2006 13:13:06 +0530 MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit X-Mailer: Microsoft Office Outlook, Build 11.0.6353 Thread-Index: AcYRL2wEZATk27YPQauJfmdzF9yApgDvyQ4g X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2900.2180 In-Reply-To: <43BBC85C.4040405@mips.com> X-Scanned-By: MIMEDefang 2.49 on 137.71.25.52 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9808 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: satheshbabu.edara@analog.com Precedence: bulk X-list: linux-mips Content-Length: 1452 Lines: 42 Hi, Appreciate your response . What is the ideal HZ value if the processor speed is 200Mhz?. Regards, Sathesh -----Original Message----- From: Kevin D. Kissell [mailto:kevink@mips.com] Sent: Wednesday, January 04, 2006 6:37 PM To: Sathesh Babu Edara Cc: linux-mips-bounce@linux-mips.org; linux-mips@linux-mips.org Subject: Re: Sathesh Babu Edara wrote: > > > Hi, > We have ported linux-2.6.12 kernel onto MIPS processor (LX4189) and > the processor speed is 200Mhz. > By default Linux-2.6.12 kernel comes with HZ value 1000.Will this HZ > value cause an overhead on the 200MHZ CPU.Can someone advise me on > whether going back to HZ vaule of 100 like Linux-2.4 will reduce the > overhead on this CPU.What are the side effects this change can cause?. The 1000Hz clock should not actually cause any problems with a 200MHz CPU, but it will suck up an annoyingly high percentage of available cycles. Backing off to 100Hz may cause some degradation of some real-time/interactive response times, but the improved overall performance will probably more than make up for it. I never build with a HZ value greater than 100 these days, but then again, I'm mostly running on FPGAs and other hardware emulators where the CPU clock frequencies may be less than 1MHz, and are never more than 33MHz. Note that a HZ value of less than 100 may cause some kernel macros to generate divide-by-zero operations/exceptions. Regards, Kevin K. From satheshbabu.edara@analog.com Mon Jan 9 07:46:59 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 07:47:16 +0000 (GMT) Received: from nwd2mail2.analog.com ([137.71.25.51]:21405 "EHLO nwd2mail2.analog.com") by ftp.linux-mips.org with ESMTP id S8133612AbWAIHq7 (ORCPT ); Mon, 9 Jan 2006 07:46:59 +0000 Received: from nwd2mhb1.analog.com (nwd2mhb1.analog.com [137.71.5.12]) by nwd2mail2.analog.com (8.12.10/8.12.10) with ESMTP id k097o3ai018631; Mon, 9 Jan 2006 02:50:03 -0500 Received: from lilac.hdcindia.analog.com ([10.121.13.31]) by nwd2mhb1.analog.com (8.9.3 (PHNE_28810+JAGae91741)/8.9.3) with ESMTP id CAA08995; Mon, 9 Jan 2006 02:49:51 -0500 (EST) Received: from SEdaraL01 ([10.121.13.96]) by lilac.hdcindia.analog.com (8.12.10+Sun/8.12.10) with ESMTP id k097nFaZ017891; Mon, 9 Jan 2006 13:19:15 +0530 (IST) Message-Id: <200601090749.k097nFaZ017891@lilac.hdcindia.analog.com> From: "Sathesh Babu Edara" To: , Subject: LL and SC instruction simulation Date: Mon, 9 Jan 2006 13:19:46 +0530 MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit X-Mailer: Microsoft Office Outlook, Build 11.0.6353 Thread-Index: AcYRL2wEZATk27YPQauJfmdzF9yApgDvyQ4gAACXUrA= X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2900.2180 In-Reply-To: <200601090742.k097gYaZ017304@lilac.hdcindia.analog.com> X-Scanned-By: MIMEDefang 2.49 on 137.71.25.51 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9809 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: satheshbabu.edara@analog.com Precedence: bulk X-list: linux-mips Content-Length: 646 Lines: 25 Hi, We have ported linux-2.4.18 and linux-2-6.12 kernel (mips.org)onto MIPS processor (CPU type lx4189). We observed that on 2.4 kernel,ll and sc instruction exception handlers hitting very often. Where as on linux-2.6.12 this is not happening. Can anybody have idea why this instructions are hitting on 2.4.18 kernel and not on 2-6.12 kernel. What is the significance of these instructions?. Note : For linux-2.4.18 : We use GCC version -3.3.4 binutils version -2.15 and uClibc version -0.9.26 For linux-2.6.12 : We use GCC version -3.4.3 binutils version -2.15 and uClibc version -0.9.28. Thanks in advance. Regards, Sathesh From kevink@mips.com Mon Jan 9 08:56:23 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 08:56:43 +0000 (GMT) Received: from 209-232-97-206.ded.pacbell.net ([209.232.97.206]:23021 "EHLO dns0.mips.com") by ftp.linux-mips.org with ESMTP id S8133706AbWAII4X (ORCPT ); Mon, 9 Jan 2006 08:56:23 +0000 Received: from mercury.mips.com (sbcns-dmz [209.232.97.193]) by dns0.mips.com (8.12.11/8.12.11) with ESMTP id k098wuDR010905; Mon, 9 Jan 2006 00:58:57 -0800 (PST) Received: from grendel (grendel [192.168.236.16]) by mercury.mips.com (8.12.9/8.12.11) with SMTP id k098wtYr002864; Mon, 9 Jan 2006 00:58:56 -0800 (PST) Message-ID: <005a01c614fb$2fe76b00$10eca8c0@grendel> From: "Kevin D. Kissell" To: "Sathesh Babu Edara" , , References: <200601090742.k097gYaZ017304@lilac.hdcindia.analog.com> Subject: Re: Date: Mon, 9 Jan 2006 10:00:48 +0100 MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit X-Priority: 3 X-MSMail-Priority: Normal X-Mailer: Microsoft Outlook Express 6.00.2800.1506 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2800.1506 X-Scanned-By: MIMEDefang 2.39 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9810 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kevink@mips.com Precedence: bulk X-list: linux-mips Content-Length: 2355 Lines: 64 There is no "ideal" value for a given processor frequency. The lower the value, the less interrupt processing overhead, but the slower the response time to events that are detected or serviced during clock interrupts. 1000 HZ *may* be a sensible value (I have my doubts, personally) for 2+ GHz PC processors, but it's excessive (IMHO) for a 200MHz processor and unworkable for a 20MHz CPU. I think that 100HZ is still a reasonable value for an embedded RISC CPU, but the "ideal" value is going to be a function of the application. Regards, Kevin K. ----- Original Message ----- From: "Sathesh Babu Edara" To: "'Kevin D. Kissell'" ; ; Sent: Monday, January 09, 2006 8:43 AM Subject: RE: > > Hi, > Appreciate your response . > > What is the ideal HZ value if the processor speed is 200Mhz?. > > Regards, > Sathesh > -----Original Message----- > From: Kevin D. Kissell [mailto:kevink@mips.com] > Sent: Wednesday, January 04, 2006 6:37 PM > To: Sathesh Babu Edara > Cc: linux-mips-bounce@linux-mips.org; linux-mips@linux-mips.org > Subject: Re: > > Sathesh Babu Edara wrote: > > > > > > Hi, > > We have ported linux-2.6.12 kernel onto MIPS processor (LX4189) and > > the processor speed is 200Mhz. > > By default Linux-2.6.12 kernel comes with HZ value 1000.Will this HZ > > value cause an overhead on the 200MHZ CPU.Can someone advise me on > > whether going back to HZ vaule of 100 like Linux-2.4 will reduce the > > overhead on this CPU.What are the side effects this change can cause?. > > The 1000Hz clock should not actually cause any problems with a 200MHz CPU, > but it will suck up an annoyingly high percentage of available cycles. > Backing off to 100Hz may cause some degradation of some > real-time/interactive response times, but the improved overall performance > will probably more than make up for it. I never build with a HZ value > greater than 100 these days, but then again, I'm mostly running on FPGAs and > other hardware emulators where the CPU clock frequencies may be less than > 1MHz, and are never more than 33MHz. > Note that a HZ value of less than 100 may cause some kernel macros to > generate divide-by-zero operations/exceptions. > > Regards, > > Kevin K. > > > From ralf@linux-mips.org Mon Jan 9 14:51:36 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 14:51:53 +0000 (GMT) Received: from extgw-uk.mips.com ([62.254.210.129]:12059 "EHLO bacchus.net.dhis.org") by ftp.linux-mips.org with ESMTP id S8134414AbWAIOvf (ORCPT ); Mon, 9 Jan 2006 14:51:35 +0000 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by bacchus.net.dhis.org (8.13.4/8.13.4) with ESMTP id k09EsPre005527; Mon, 9 Jan 2006 14:54:26 GMT Received: (from ralf@localhost) by denk.linux-mips.net (8.13.4/8.13.4/Submit) id k09EsP66005526; Mon, 9 Jan 2006 14:54:25 GMT Date: Mon, 9 Jan 2006 14:54:25 +0000 From: Ralf Baechle To: Sathesh Babu Edara Cc: linux-mips-bounce@linux-mips.org, linux-mips@linux-mips.org Subject: Re: LL and SC instruction simulation Message-ID: <20060109145425.GA4286@linux-mips.org> References: <200601090742.k097gYaZ017304@lilac.hdcindia.analog.com> <200601090749.k097nFaZ017891@lilac.hdcindia.analog.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <200601090749.k097nFaZ017891@lilac.hdcindia.analog.com> User-Agent: Mutt/1.4.2.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9811 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Content-Length: 766 Lines: 21 On Mon, Jan 09, 2006 at 01:19:46PM +0530, Sathesh Babu Edara wrote: > We have ported linux-2.4.18 and linux-2-6.12 kernel (mips.org)onto MIPS > processor (CPU type lx4189). > > We observed that on 2.4 kernel,ll and sc instruction exception handlers > hitting very often. > Where as on linux-2.6.12 this is not happening. > Can anybody have idea why this instructions are hitting on 2.4.18 kernel and > not on 2-6.12 kernel. Only ll/sc instructions in application software can be emulated, so it would seem your application is behaving different on 2.4 and 2.6 kernels. > What is the significance of these instructions?. All sorts of atomic operations. I suggest you read up on them in See MIPS Run or short of that in the MIPS32/64 specification. Ralf From ralf@linux-mips.org Mon Jan 9 14:53:18 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 14:53:35 +0000 (GMT) Received: from extgw-uk.mips.com ([62.254.210.129]:35359 "EHLO bacchus.net.dhis.org") by ftp.linux-mips.org with ESMTP id S8134414AbWAIOxS (ORCPT ); Mon, 9 Jan 2006 14:53:18 +0000 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by bacchus.net.dhis.org (8.13.4/8.13.4) with ESMTP id k09EuB7g005590; Mon, 9 Jan 2006 14:56:11 GMT Received: (from ralf@localhost) by denk.linux-mips.net (8.13.4/8.13.4/Submit) id k09EuAwv005589; Mon, 9 Jan 2006 14:56:10 GMT Date: Mon, 9 Jan 2006 14:56:10 +0000 From: Ralf Baechle To: zhuzhenhua Cc: linux-mips Subject: Re: why the early_initcall(au1x00_setup) do not work? Message-ID: <20060109145610.GB4286@linux-mips.org> References: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> User-Agent: Mutt/1.4.2.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9812 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Content-Length: 621 Lines: 16 On Mon, Jan 09, 2006 at 01:59:34PM +0800, zhuzhenhua wrote: > i download a standard 2.6.14 kernel, and compile it for dbau1100, and > i find the early_initcall(au1x00_setup) was not compiled into the > vmlinux. > and i find at the linux-mips cvs, it used plat_setup instead of early_initcall. > does it means my toolchain is not correct to compile the > early_initcall, or in the standard 2.6.14 kernel, the early_initcall > do not work well? You've downloaded a kernel.org kernel it would seem - doesn't fly for MIPS. Instead get a kernel from linux-mips.org. The early_initcall() construct has been removed. Ralf From kevink@mips.com Mon Jan 9 15:13:16 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 15:13:33 +0000 (GMT) Received: from 209-232-97-206.ded.pacbell.net ([209.232.97.206]:50925 "EHLO dns0.mips.com") by ftp.linux-mips.org with ESMTP id S8134420AbWAIPNQ (ORCPT ); Mon, 9 Jan 2006 15:13:16 +0000 Received: from mercury.mips.com (sbcns-dmz [209.232.97.193]) by dns0.mips.com (8.12.11/8.12.11) with ESMTP id k09FFxrM011933; Mon, 9 Jan 2006 07:16:00 -0800 (PST) Received: from grendel (grendel [192.168.236.16]) by mercury.mips.com (8.12.9/8.12.11) with SMTP id k09FFvYr007330; Mon, 9 Jan 2006 07:15:57 -0800 (PST) Message-ID: <00af01c6152f$dc1863f0$10eca8c0@grendel> From: "Kevin D. Kissell" To: "Ralf Baechle" , "Sathesh Babu Edara" Cc: , References: <200601090742.k097gYaZ017304@lilac.hdcindia.analog.com> <200601090749.k097nFaZ017891@lilac.hdcindia.analog.com> <20060109145425.GA4286@linux-mips.org> Subject: Re: LL and SC instruction simulation Date: Mon, 9 Jan 2006 16:17:50 +0100 MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit X-Priority: 3 X-MSMail-Priority: Normal X-Mailer: Microsoft Outlook Express 6.00.2800.1506 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2800.1506 X-Scanned-By: MIMEDefang 2.39 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9813 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kevink@mips.com Precedence: bulk X-list: linux-mips Content-Length: 789 Lines: 22 Ralf writes: > On Mon, Jan 09, 2006 at 01:19:46PM +0530, Sathesh Babu Edara wrote: > > > We have ported linux-2.4.18 and linux-2-6.12 kernel (mips.org)onto MIPS > > processor (CPU type lx4189). > > > > We observed that on 2.4 kernel,ll and sc instruction exception handlers > > hitting very often. > > Where as on linux-2.6.12 this is not happening. > > > Can anybody have idea why this instructions are hitting on 2.4.18 kernel and > > not on 2-6.12 kernel. > > Only ll/sc instructions in application software can be emulated, so it > would seem your application is behaving different on 2.4 and 2.6 kernels. Is there an interface where 2.6 might be telling library code to use system calls instead LL/SC, where the 2.4 kernel didn't? Regards, Kevin K. From p_christ@hol.gr Mon Jan 9 15:17:33 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 15:17:51 +0000 (GMT) Received: from [62.38.114.37] ([62.38.114.37]:35229 "EHLO pfn3.pefnos") by ftp.linux-mips.org with ESMTP id S8134416AbWAIPRd (ORCPT ); Mon, 9 Jan 2006 15:17:33 +0000 Received: from xorhgos2.pefnos (xorhgos2.pefnos [192.168.0.3]) by pfn3.pefnos (Postfix) with ESMTP id 7338D1F101; Mon, 9 Jan 2006 17:20:08 +0200 (EET) From: "P. Christeas" To: Ralf Baechle Subject: Re: why the early_initcall(au1x00_setup) do not work? Date: Mon, 9 Jan 2006 17:20:01 +0200 User-Agent: KMail/1.9 Cc: linux-mips@linux-mips.org, zhuzhenhua References: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> <20060109145610.GB4286@linux-mips.org> In-Reply-To: <20060109145610.GB4286@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200601091720.03822.p_christ@hol.gr> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9814 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: p_christ@hol.gr Precedence: bulk X-list: linux-mips Content-Length: 347 Lines: 12 On Monday 09 January 2006 4:56 pm, Ralf Baechle wrote: > You've downloaded a kernel.org kernel it would seem - doesn't fly for MIPS. > Instead get a kernel from linux-mips.org. > > The early_initcall() construct has been removed. > > Ralf What's the difference between the trees? Aren't the MIPS patches supposed to be merged to Linus' tree? From ralf@linux-mips.org Mon Jan 9 15:19:00 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 15:19:18 +0000 (GMT) Received: from extgw-uk.mips.com ([62.254.210.129]:53019 "EHLO bacchus.net.dhis.org") by ftp.linux-mips.org with ESMTP id S8134416AbWAIPTA (ORCPT ); Mon, 9 Jan 2006 15:19:00 +0000 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by bacchus.net.dhis.org (8.13.4/8.13.4) with ESMTP id k09FLpvh006413; Mon, 9 Jan 2006 15:21:51 GMT Received: (from ralf@localhost) by denk.linux-mips.net (8.13.4/8.13.4/Submit) id k09FLmvR006411; Mon, 9 Jan 2006 15:21:48 GMT Date: Mon, 9 Jan 2006 15:21:48 +0000 From: Ralf Baechle To: "Kevin D. Kissell" Cc: Sathesh Babu Edara , linux-mips-bounce@linux-mips.org, linux-mips@linux-mips.org Subject: Re: LL and SC instruction simulation Message-ID: <20060109152148.GD4286@linux-mips.org> References: <200601090742.k097gYaZ017304@lilac.hdcindia.analog.com> <200601090749.k097nFaZ017891@lilac.hdcindia.analog.com> <20060109145425.GA4286@linux-mips.org> <00af01c6152f$dc1863f0$10eca8c0@grendel> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <00af01c6152f$dc1863f0$10eca8c0@grendel> User-Agent: Mutt/1.4.2.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9815 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Content-Length: 366 Lines: 11 On Mon, Jan 09, 2006 at 04:17:50PM +0100, Kevin D. Kissell wrote: > > Only ll/sc instructions in application software can be emulated, so it > > would seem your application is behaving different on 2.4 and 2.6 kernels. > > Is there an interface where 2.6 might be telling library code to use system calls > instead LL/SC, where the 2.4 kernel didn't? No. Ralf From ralf@linux-mips.org Mon Jan 9 15:21:49 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 15:22:06 +0000 (GMT) Received: from extgw-uk.mips.com ([62.254.210.129]:16670 "EHLO bacchus.net.dhis.org") by ftp.linux-mips.org with ESMTP id S8134425AbWAIPVt (ORCPT ); Mon, 9 Jan 2006 15:21:49 +0000 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by bacchus.net.dhis.org (8.13.4/8.13.4) with ESMTP id k09FOUNj006512; Mon, 9 Jan 2006 15:24:30 GMT Received: (from ralf@localhost) by denk.linux-mips.net (8.13.4/8.13.4/Submit) id k09FOTb0006511; Mon, 9 Jan 2006 15:24:29 GMT Date: Mon, 9 Jan 2006 15:24:29 +0000 From: Ralf Baechle To: "P. Christeas" Cc: linux-mips@linux-mips.org, zhuzhenhua Subject: Re: why the early_initcall(au1x00_setup) do not work? Message-ID: <20060109152429.GE4286@linux-mips.org> References: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> <20060109145610.GB4286@linux-mips.org> <200601091720.03822.p_christ@hol.gr> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <200601091720.03822.p_christ@hol.gr> User-Agent: Mutt/1.4.2.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9816 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Content-Length: 582 Lines: 19 On Mon, Jan 09, 2006 at 05:20:01PM +0200, P. Christeas wrote: > > You've downloaded a kernel.org kernel it would seem - doesn't fly for MIPS. > > Instead get a kernel from linux-mips.org. > > > > The early_initcall() construct has been removed. > > > > Ralf > > What's the difference between the trees? All the MIPS work is happening in the linux-mips.org tree. > Aren't the MIPS patches supposed to be merged to Linus' tree? In 2.6.15 things were alomst fully merged but several megabytes of patches are between the linux-mips.org and kernel.org versions of 2.6.14. Ralf From ralf@linux-mips.org Mon Jan 9 15:27:37 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 15:27:55 +0000 (GMT) Received: from extgw-uk.mips.com ([62.254.210.129]:3867 "EHLO bacchus.net.dhis.org") by ftp.linux-mips.org with ESMTP id S8134428AbWAIP1h (ORCPT ); Mon, 9 Jan 2006 15:27:37 +0000 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by bacchus.net.dhis.org (8.13.4/8.13.4) with ESMTP id k09FUS1L006702; Mon, 9 Jan 2006 15:30:28 GMT Received: (from ralf@localhost) by denk.linux-mips.net (8.13.4/8.13.4/Submit) id k09FUSP4006701; Mon, 9 Jan 2006 15:30:28 GMT Date: Mon, 9 Jan 2006 15:30:28 +0000 From: Ralf Baechle To: "Kevin D. Kissell" Cc: Sathesh Babu Edara , linux-mips-bounce@linux-mips.org, linux-mips@linux-mips.org Subject: Re: LL and SC instruction simulation Message-ID: <20060109153028.GA6542@linux-mips.org> References: <200601090742.k097gYaZ017304@lilac.hdcindia.analog.com> <200601090749.k097nFaZ017891@lilac.hdcindia.analog.com> <20060109145425.GA4286@linux-mips.org> <00af01c6152f$dc1863f0$10eca8c0@grendel> <20060109152148.GD4286@linux-mips.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20060109152148.GD4286@linux-mips.org> User-Agent: Mutt/1.4.2.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9817 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Content-Length: 732 Lines: 17 On Mon, Jan 09, 2006 at 03:21:48PM +0000, Ralf Baechle wrote: > > > Only ll/sc instructions in application software can be emulated, so it > > > would seem your application is behaving different on 2.4 and 2.6 kernels. > > > > Is there an interface where 2.6 might be telling library code to use system calls > > instead LL/SC, where the 2.4 kernel didn't? > > No. And I think it's not really worth it. MIPS II did introduce ll/sc in 1991 and it was becoming widely available with MIPS III and some pseudo- MIPS II R3000 variants also in the embedded markets and MIPS32/MIPS64 were based on that. So ll/sc-less processors are a very small part of the market of Linux/MIPS these days, not really worth to optimize for. Ralf From kevink@mips.com Mon Jan 9 15:42:24 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 15:42:41 +0000 (GMT) Received: from 209-232-97-206.ded.pacbell.net ([209.232.97.206]:55277 "EHLO dns0.mips.com") by ftp.linux-mips.org with ESMTP id S8134425AbWAIPmX (ORCPT ); Mon, 9 Jan 2006 15:42:23 +0000 Received: from mercury.mips.com (sbcns-dmz [209.232.97.193]) by dns0.mips.com (8.12.11/8.12.11) with ESMTP id k09Fj9Iq012017; Mon, 9 Jan 2006 07:45:10 -0800 (PST) Received: from grendel (grendel [192.168.236.16]) by mercury.mips.com (8.12.9/8.12.11) with SMTP id k09Fj7Yr007778; Mon, 9 Jan 2006 07:45:08 -0800 (PST) Message-ID: <00fd01c61533$ef797e30$10eca8c0@grendel> From: "Kevin D. Kissell" To: "Ralf Baechle" Cc: "Sathesh Babu Edara" , , References: <200601090742.k097gYaZ017304@lilac.hdcindia.analog.com> <200601090749.k097nFaZ017891@lilac.hdcindia.analog.com> <20060109145425.GA4286@linux-mips.org> <00af01c6152f$dc1863f0$10eca8c0@grendel> <20060109152148.GD4286@linux-mips.org> <20060109153028.GA6542@linux-mips.org> Subject: Re: LL and SC instruction simulation Date: Mon, 9 Jan 2006 16:47:01 +0100 MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit X-Priority: 3 X-MSMail-Priority: Normal X-Mailer: Microsoft Outlook Express 6.00.2800.1506 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2800.1506 X-Scanned-By: MIMEDefang 2.39 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9818 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kevink@mips.com Precedence: bulk X-list: linux-mips Content-Length: 759 Lines: 18 > > > Is there an interface where 2.6 might be telling library code to use system calls > > > instead LL/SC, where the 2.4 kernel didn't? > > > > No. > > And I think it's not really worth it. MIPS II did introduce ll/sc in > 1991 and it was becoming widely available with MIPS III and some pseudo- > MIPS II R3000 variants also in the embedded markets and MIPS32/MIPS64 > were based on that. So ll/sc-less processors are a very small part of > the market of Linux/MIPS these days, not really worth to optimize for. Hmm. I can think of at least one *very* high volume MIPS Linux platform still manufactured by a very large Japanese electronics company where LL/SC either isn't implemented or doesn't work... Regards, Kevin K. From ralf@linux-mips.org Mon Jan 9 15:48:59 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 15:49:18 +0000 (GMT) Received: from extgw-uk.mips.com ([62.254.210.129]:10268 "EHLO bacchus.net.dhis.org") by ftp.linux-mips.org with ESMTP id S8134423AbWAIPs7 (ORCPT ); Mon, 9 Jan 2006 15:48:59 +0000 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by bacchus.net.dhis.org (8.13.4/8.13.4) with ESMTP id k09Fpqqf012712; Mon, 9 Jan 2006 15:51:52 GMT Received: (from ralf@localhost) by denk.linux-mips.net (8.13.4/8.13.4/Submit) id k09FpqnB012711; Mon, 9 Jan 2006 15:51:52 GMT Date: Mon, 9 Jan 2006 15:51:52 +0000 From: Ralf Baechle To: "Kevin D. Kissell" Cc: Sathesh Babu Edara , linux-mips@linux-mips.org Subject: Re: LL and SC instruction simulation Message-ID: <20060109155152.GF4286@linux-mips.org> References: <200601090742.k097gYaZ017304@lilac.hdcindia.analog.com> <200601090749.k097nFaZ017891@lilac.hdcindia.analog.com> <20060109145425.GA4286@linux-mips.org> <00af01c6152f$dc1863f0$10eca8c0@grendel> <20060109152148.GD4286@linux-mips.org> <20060109153028.GA6542@linux-mips.org> <00fd01c61533$ef797e30$10eca8c0@grendel> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <00fd01c61533$ef797e30$10eca8c0@grendel> User-Agent: Mutt/1.4.2.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9819 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Content-Length: 478 Lines: 11 On Mon, Jan 09, 2006 at 04:47:01PM +0100, Kevin D. Kissell wrote: > Hmm. I can think of at least one *very* high volume MIPS Linux platform still > manufactured by a very large Japanese electronics company where LL/SC > either isn't implemented or doesn't work... The user community of that platform of that four letter vendor still hasn't managed to upgrade their kernels to something that would even be remotely contemporary, so any 2.6 questions don't apply ... Ralf From jcrouse@cosmic.amd.com Mon Jan 9 17:40:24 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 17:40:46 +0000 (GMT) Received: from p549F4907.dip.t-dialin.net ([84.159.73.7]:60594 "EHLO p549F4907.dip.t-dialin.net") by ftp.linux-mips.org with ESMTP id S8133636AbWAIRkY (ORCPT ); Mon, 9 Jan 2006 17:40:24 +0000 Received: from amdext3.amd.com ([IPv6:::ffff:139.95.251.6]:16104 "EHLO amdext3.amd.com") by linux-mips.net with ESMTP id ; Mon, 9 Jan 2006 18:42:59 +0100 Received: from SSVLGW02.amd.com (ssvlgw02.amd.com [139.95.250.170]) by amdext3.amd.com (8.12.11/8.12.11/AMD) with ESMTP id k09HdbeW031656; Mon, 9 Jan 2006 09:41:13 -0800 Received: from 139.95.250.1 by SSVLGW01.amd.com with ESMTP (AMD SMTP Relay (Email Firewall v6.1.0)); Mon, 09 Jan 2006 09:41:01 -0800 X-Server-Uuid: 89466532-923C-4A88-82C1-66ACAA0041DF Received: from ldcmail.amd.com (ldcmail.amd.com [147.5.200.40]) by amdint.amd.com (8.12.8/8.12.8/AMD) with ESMTP id k09Hf1VP019320; Mon, 9 Jan 2006 09:41:01 -0800 (PST) Received: from cosmic.amd.com (cosmic.amd.com [147.5.201.206]) by ldcmail.amd.com (Postfix) with ESMTP id E40DB2028; Mon, 9 Jan 2006 10:41:00 -0700 (MST) Received: from cosmic.amd.com (localhost [127.0.0.1]) by cosmic.amd.com (8.13.4/8.13.4) with ESMTP id k09Hnb4V008738; Mon, 9 Jan 2006 10:49:37 -0700 Received: (from jcrouse@localhost) by cosmic.amd.com ( 8.13.4/8.13.4/Submit) id k09HnasZ008737; Mon, 9 Jan 2006 10:49:36 -0700 Date: Mon, 9 Jan 2006 10:49:36 -0700 From: "Jordan Crouse" To: "Russell King" cc: linux-mips@linux-mips.org, drzeus@drzeus.cx Subject: Re: Force MMC/SD to 512 byte block sizes Message-ID: <20060109174936.GJ17575@cosmic.amd.com> References: <20060106164406.GA15617@cosmic.amd.com> <20060106165930.GC16093@flint.arm.linux.org.uk> MIME-Version: 1.0 In-Reply-To: <20060106165930.GC16093@flint.arm.linux.org.uk> User-Agent: Mutt/1.5.11 X-WSS-ID: 6FDC7FA72BK3549672-01-01 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9820 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jordan.crouse@amd.com Precedence: bulk X-list: linux-mips Content-Length: 1079 Lines: 28 On 06/01/06 16:59 +0000, Russell King wrote: > On Fri, Jan 06, 2006 at 09:44:06AM -0700, Jordan Crouse wrote: > > This patch is not specific to the AU1200 SD driver, but thats what > > we used to debug and verify this, so thats why it is applied against > > the linux-mips tree. Pierre, I'm sending this to you too, because I thought > > you may be interested. > > NACK. Please wait until the next round of patches get merged and then > revalidate this. Ok - I saw your fixes. Looks good to me. I'm still sticking to the (assumption|hypothesis|foolish fantasy) that even cards that do not support partial block writes will still support 512 byte writes - mainly because I just don't see those ASICs in the el-Cheapo card readers being capable of doing the advanced buffering to convert 512 <-> 1024 or 2048, and hopefully one of these days I'll find a card to prove that. Until then, I don't have a leg to stand on, so I'll quietly hang back. Jordan -- Jordan Crouse Senior Linux Engineer AMD - Personal Connectivity Solutions Group From giometti@enneenne.com Mon Jan 9 17:43:52 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 17:44:10 +0000 (GMT) Received: from 81-174-11-161.f5.ngi.it ([81.174.11.161]:27809 "EHLO gundam.enneenne.com") by ftp.linux-mips.org with ESMTP id S8133636AbWAIRnw (ORCPT ); Mon, 9 Jan 2006 17:43:52 +0000 Received: from giometti by gundam.enneenne.com with local (Exim 3.36 #1 (Debian)) id 1Ew14r-0007vB-00; Mon, 09 Jan 2006 18:45:05 +0100 Date: Mon, 9 Jan 2006 18:45:05 +0100 From: Rodolfo Giometti To: Jordan Crouse Cc: linux-mips@linux-mips.org Subject: Re: ALCHEMY: Add SD support to AU1200 MMC/SD driver Message-ID: <20060109174505.GD1373@gundam.enneenne.com> References: <20051202190108.GF28227@cosmic.amd.com> <20051214134139.GN22061@hulk.enneenne.com> <20051214155324.GC9734@cosmic.amd.com> Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="VUDLurXRWRKrGuMn" Content-Disposition: inline In-Reply-To: <20051214155324.GC9734@cosmic.amd.com> Organization: Programmi e soluzioni GNU/Linux X-PGP-Key: gpg --keyserver keyserver.penguin.de --recv-keys D25A5633 User-Agent: Mutt/1.5.5.1+cvs20040105i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9821 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: giometti@linux.it Precedence: bulk X-list: linux-mips Content-Length: 7683 Lines: 134 --VUDLurXRWRKrGuMn Content-Type: multipart/mixed; boundary="GpGaEY17fSl8rd50" Content-Disposition: inline --GpGaEY17fSl8rd50 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Dec 14, 2005 at 08:53:25AM -0700, Jordan Crouse wrote: > Well, hopefully everything will Just Work (TM), but you'll want to make > sure that all the various definitions are enabled for the AU1100. I'll > have to give you my standard disclaimer that I haven't compiled this > for anything but a DB1200 and PB1200, so I can't promise that it will wor= k, > but there is nothing in the code that says it won't. I'm just trying to run your driver on a Au1100 based board and I got some problems... First of all I needed to disable the DMA support (dma =3D 0) and using the FIFO mode, since Au1100 dma support seems not well implemented (or not implemented at all) and my board freeze. After that, when I insert a 256MB MMC card I get the attached messages and the system refuses to power up the card (please, see the last message who reports the power status). Have you any suggestions? :) Thanks in advance, Rodolfo --=20 GNU/Linux Solutions e-mail: giometti@enneenne.com Linux Device Driver giometti@gnudd.com Embedded Systems giometti@linux.it UNIX programming phone: +39 349 2432127 --GpGaEY17fSl8rd50 Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename=mmc_output Jan 1 00:01:17 hostname kernel: set_ios (id=0, power=1, clock=0Hz, vdd=23, mode=1) Jan 1 00:01:17 hostname kernel: set_ios (id=0, power=2, clock=450000Hz, vdd=23, mode=1) Jan 1 00:01:17 hostname kernel: WWPC: power 1 Jan 1 00:01:17 hostname kernel: set_ios (id=0, power=2, clock=450000Hz, vdd=23, mode=1) Jan 1 00:01:17 hostname kernel: WWPC: power 1 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 00 arg 00000000 flags 00000000 Jan 1 00:01:17 hostname kernel: MMC: req done (00): 0: 00000000 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: set_ios (id=0, power=2, clock=450000Hz, vdd=23, mode=1) Jan 1 00:01:17 hostname kernel: WWPC: power 1 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 37 arg 00000000 flags 00000009 Jan 1 00:01:17 hostname kernel: MMC: req done (37): 2: 3fffffff 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 37 arg 00000000 flags 00000009 Jan 1 00:01:17 hostname kernel: MMC: req done (37): 0: 00000120 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 29 arg 00000000 flags 00000001 Jan 1 00:01:17 hostname kernel: MMC: req done (29): 0: 00ff8000 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: set_ios (id=0, power=2, clock=450000Hz, vdd=15, mode=1) Jan 1 00:01:17 hostname kernel: WWPC: power 1 Jan 1 00:01:17 hostname kernel: set_ios (id=0, power=2, clock=450000Hz, vdd=15, mode=1) Jan 1 00:01:17 hostname kernel: WWPC: power 1 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 00 arg 00000000 flags 00000000 Jan 1 00:01:17 hostname kernel: MMC: req done (00): 0: 00000000 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: set_ios (id=0, power=2, clock=450000Hz, vdd=15, mode=1) Jan 1 00:01:17 hostname kernel: WWPC: power 1 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 37 arg 00000000 flags 00000009 Jan 1 00:01:17 hostname kernel: MMC: req done (37): 0: 00000120 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 29 arg 00018000 flags 00000001 Jan 1 00:01:17 hostname kernel: MMC: req done (29): 0: 00ff8000 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 37 arg 00000000 flags 00000009 Jan 1 00:01:17 hostname kernel: MMC: req done (37): 0: 00000120 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 29 arg 00018000 flags 00000001 Jan 1 00:01:17 hostname kernel: MMC: req done (29): 0: 00ff8000 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 37 arg 00000000 flags 00000009 Jan 1 00:01:17 hostname kernel: MMC: req done (37): 0: 00000120 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 29 arg 00018000 flags 00000001 Jan 1 00:01:17 hostname kernel: MMC: req done (29): 0: 00ff8000 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 37 arg 00000000 flags 00000009 Jan 1 00:01:17 hostname kernel: MMC: req done (37): 1: 00000000 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 37 arg 00000000 flags 00000009 Jan 1 00:01:17 hostname kernel: MMC: req done (37): 1: 00000000 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 37 arg 00000000 flags 00000009 Jan 1 00:01:17 hostname kernel: MMC: req done (37): 0: 00000120 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 29 arg 00018000 flags 00000001 Jan 1 00:01:17 hostname kernel: MMC: req done (29): 0: 00ff8000 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 37 arg 00000000 flags 00000009 Jan 1 00:01:17 hostname kernel: MMC: req done (37): 0: 00000120 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 29 arg 00018000 flags 00000001 Jan 1 00:01:17 hostname kernel: MMC: req done (29): 0: 00ff8000 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 37 arg 00000000 flags 00000009 Jan 1 00:01:17 hostname kernel: MMC: req done (37): 0: 00000120 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 29 arg 00018000 flags 00000001 Jan 1 00:01:17 hostname kernel: MMC: req done (29): 0: 00ff8000 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 37 arg 00000000 flags 00000009 Jan 1 00:01:17 hostname kernel: MMC: req done (37): 0: 00000120 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 29 arg 00018000 flags 00000001 Jan 1 00:01:17 hostname kernel: MMC: req done (29): 0: 00ff8000 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 37 arg 00000000 flags 00000009 Jan 1 00:01:17 hostname kernel: MMC: req done (37): 1: 00000000 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 37 arg 00000000 flags 00000009 Jan 1 00:01:17 hostname kernel: MMC: req done (37): 1: 00000000 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 37 arg 00000000 flags 00000009 Jan 1 00:01:17 hostname kernel: MMC: req done (37): 1: 00000000 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 37 arg 00000000 flags 00000009 Jan 1 00:01:17 hostname kernel: MMC: req done (37): 1: 00000000 00000000 00000000 00000000 Jan 1 00:01:17 hostname kernel: MMC: starting cmd 02 arg 00000000 flags 0000000a Jan 1 00:01:17 hostname kernel: MMC: req done (02): 1: 00000000 00000000 00000000 00000000 Jan 1 00:01:17 hostname last message repeated 3 times Jan 1 00:01:17 hostname kernel: set_ios (id=0, power=2, clock=450000Hz, vdd=15, mode=2) Jan 1 00:01:17 hostname kernel: WWPC: power 1 Jan 1 00:01:17 hostname kernel: set_ios (id=0, power=0, clock=0Hz, vdd=0, mode=1) Jan 1 00:01:17 hostname kernel: WWPC: power 0 --GpGaEY17fSl8rd50-- --VUDLurXRWRKrGuMn Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature Content-Disposition: inline -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.2.4 (GNU/Linux) iD8DBQFDwqEhQaTCYNJaVjMRArOqAJsFwn3pQfPW2I8+W/IGf4GU8Ad+uwCg1k7P 3j4X9JyhxEXVrTzJydIKS5Q= =S5Ke -----END PGP SIGNATURE----- --VUDLurXRWRKrGuMn-- From jcrouse@cosmic.amd.com Mon Jan 9 17:54:49 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 17:56:16 +0000 (GMT) Received: from amdext4.amd.com ([163.181.251.6]:12673 "EHLO amdext4.amd.com") by ftp.linux-mips.org with ESMTP id S8134429AbWAIRyt (ORCPT ); Mon, 9 Jan 2006 17:54:49 +0000 Received: from SAUSGW01.amd.com (sausgw01.amd.com [163.181.250.21]) by amdext4.amd.com (8.12.11/8.12.11/AMD) with ESMTP id k09HsquB029478; Mon, 9 Jan 2006 11:55:33 -0600 Received: from 163.181.250.1 by SAUSGW01.amd.com with ESMTP (AMD SMTP Relay (Email Firewall v6.1.0)); Mon, 09 Jan 2006 11:55:22 -0600 X-Server-Uuid: 8C3DB987-180B-4465-9446-45C15473FD3E Received: from ldcmail.amd.com (ldcmail.amd.com [147.5.200.40]) by amdint2.amd.com (8.12.8/8.12.8/AMD) with ESMTP id k09HtLh5024379; Mon, 9 Jan 2006 11:55:21 -0600 (CST) Received: from cosmic.amd.com (cosmic.amd.com [147.5.201.206]) by ldcmail.amd.com (Postfix) with ESMTP id D33852028; Mon, 9 Jan 2006 10:55:20 -0700 (MST) Received: from cosmic.amd.com (localhost [127.0.0.1]) by cosmic.amd.com (8.13.4/8.13.4) with ESMTP id k09I3vb9009795; Mon, 9 Jan 2006 11:03:57 -0700 Received: (from jcrouse@localhost) by cosmic.amd.com ( 8.13.4/8.13.4/Submit) id k09I3uMN009794; Mon, 9 Jan 2006 11:03:56 -0700 Date: Mon, 9 Jan 2006 11:03:56 -0700 From: "Jordan Crouse" To: linux-usb-devel@lists.sourceforge.net cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, info-linux@ldcmail.amd.com, thomas.dahlmann@amd.com Subject: [PATCH] UDC support for MIPS/AU1200 and Geode/CS5536 Message-ID: <20060109180356.GA8855@cosmic.amd.com> MIME-Version: 1.0 User-Agent: Mutt/1.5.11 X-WSS-ID: 6FDC7C003982713031-01-01 Content-Type: multipart/mixed; boundary=3MwIy2ne0vdjdPXF Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9822 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jordan.crouse@amd.com Precedence: bulk X-list: linux-mips Content-Length: 333301 Lines: 9959 --3MwIy2ne0vdjdPXF Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: 7bit From the "two-birds-one-stone" department, I am pleased to present USB UDC support for both the MIPS Au1200 SoC and the Geode CS5535 south bridge. Also, coming soon (in the next few days), OTG, which has been removed from the usb_host patch, and put into its own patch (as per David's comments). This patch is against current linux-mips git, but it should apply for Linus's tree as well. Regards, Jordan --3MwIy2ne0vdjdPXF Content-Type: text/plain; charset=us-ascii Content-Disposition: inline; filename=udc.patch Content-Transfer-Encoding: 7bit PATCH: Add UDC support for MIPS/AU1200 and Geode/CS5536 This patch adds UDC support for the AU1200 processor and the Geode CS5536 southbridge. Signed-off-by: Jordan Crouse --- Documentation/usb/au1200udc.txt | 185 + drivers/usb/gadget/Kconfig | 86 + drivers/usb/gadget/Makefile | 9 drivers/usb/gadget/au1200otg.h | 147 + drivers/usb/gadget/au1200udc.c | 4880 +++++++++++++++++++++++++++++++++++++ drivers/usb/gadget/au1200udc.h | 936 +++++++ drivers/usb/gadget/au1200uoc.c | 2015 +++++++++++++++ drivers/usb/gadget/au1200uoc.h | 1338 ++++++++++ drivers/usb/gadget/ether.c | 65 drivers/usb/gadget/file_storage.c | 8 drivers/usb/gadget/gadget_chips.h | 8 drivers/usb/gadget/zero.c | 10 12 files changed, 9684 insertions(+), 3 deletions(-) diff --git a/Documentation/usb/au1200udc.txt b/Documentation/usb/au1200udc.txt new file mode 100644 index 0000000..20f4d58 --- /dev/null +++ b/Documentation/usb/au1200udc.txt @@ -0,0 +1,185 @@ +------------------------------------------------------------------------------- +Howto for Linux device driver for the AU1200 USB Device Controller (UDC) +for gadget driver stack +------------------------------------------------------------------------------- + +Author: Thomas Dahlmann + +INTRODUCTION: + +The AU1200 UDC is part of AMD MIPS CPU Au1200 and AMD5536 chip (south- +bridge of AMD Geode LX Processor). +It is a DMA capable usb device controller. The usb port is shared +between host and UDC. The Au1200 on-chip OTG controller is used to switch the +usb port between host, UDC and neutral. So au1200otg driver is needed +to get the UDC operating. + +Current gadget support: file_storage, ether, zero + +------------------------------------------------------------------------------- +WHAT YOU NEED: +------------------------------------------------------------------------------- + +copy/replace following files to /usr/src/linux/drivers/usb/gadget + au1200udc.c + au1200udc.h + au1200otg.h + au1200uoc.c + au1200uoc.h + ether.c + file_storage.c + zero.c + gadget_chips.h + Makefile + Kconfig + +------------------------------------------------------------------------------- +HOW TO INSTALL IT: +------------------------------------------------------------------------------- + +change to directory /usr/src/linux + +configure gadget as module: + "make menuconfig" + under "Code maturity level options" choose "Prompt for development ..." + goto "Device Drivers" + goto "USB support" -> "USB Gadget support" + choose "Support for USB Gadgets" as module + under choice "USB Peripheral Controller" choose "AU1200UDC" + under "USB Gadget Drivers" + choose "Gadget Zero" as module or + choose "Ethernet Gagdet" as module or + choose "File-backed Storage Gadget" as module + choose "AU1200 USB portmux control (On-The-Go support)" + under choice "OTG port functionality" choose "Gadget only" + exit and save config + +compile and install modules: + "make modules modules_install" + +------------------------------------------------------------------------------- +HOW TO USE IT: +------------------------------------------------------------------------------- + +*** How to load FILE-BACKED STORAGE gadget driver - mass storage *** +enable USB mass storage support for linux host: + change to directory /usr/src/linux + "make menuconfig" + under "File systems" choose "DOS/FAT/NT filesystems" + choose "MSDOS fs support" + under "Device Drivers" under "SCSI device support" + choose "SCSI device support" + choose "SCSI generic support" + under "Device Drivers" under "USB support" in section + "USB Device Class drivers" choose + "USB Mass Storage support" + compile new kernel +create disk file: + "dd bs=1M count=128 if=/dev/zero of=/tmp/disk" + => creates a 128Mbyte image file /tmp/disk +load modules: + "modprobe au1200udc" + "modprobe g_file_storage file=/tmp/disk" + "modprobe au1200otg" +create a primary FAT16 disk partition via linux host site: + "fdisk /dev/sda", make FAT16 prim. partition + => "n", "p", "1", "", "", "t", "6", "w", + "mkdosfs /dev/sda1" + "sync" +create primary disk partition via Windows XP host site: + right click on "My Computer" + choose "Manage" => "Disk Management" + choose usb disk and follow instructions of partition menu +mount usb mass storage device on linux host: + make directory "/mnt/gadget/" + "mount -t msdos /dev/sda1 /mnt/gadget" + +*** How to access files of disk image on UDC side *** +When files were copied from host to UDC mass storage device then files +are inside the monolitic disk image (see above) on UDC side. This +disk image can be mounted via the loopback device driver to a +directory on UDC side to access these files. +Steps on UDC side: + enable kernel support for loopback device + change to directory /usr/src/linux + "make menuconfig" + under "Block devices" choose "Loopback device support" + and recompile the kernel + determine offset inside disk image: + "fdisk -l -u disk_image", output is like: +>> You must set cylinders. +>> You can do this from the extra functions menu. +>> +>> Disk /tmp/disk128: 5 heads, 52 sectors, 0 cylinders +>> Units = sectors of 1 * 512 bytes +>> +>> Device Boot Start End Blocks Id System +>> /tmp/disk128p1 52 262079 131014 6 FAT16 + + get offset my multiplying start value by sector size: + 52 * 512 = 26624 + mount disk image: + "mount -o loop,offset=26624 -t msdos disk_image /mnt" + + +*** How to load ZERO gadget driver - simple BULK loop back *** +load modules: +UDC driver: + (a) Slave/Fifo mode: "modprobe au1200udc use_dma=0" + (b) DMA Buffer Fill mode: "modprobe au1200udc use_dma=1" + default: + (c) DMA PPBNDU mode: "modprobe au1200udc" + (d) DMA PPBDU mode: "modprobe au1200udc use_dma=1 use_dma_ppb=1 use_dma_ppb_du=1" + (e) fullspeed mode: "modprobe au1200udc use_fullspeed=1", can be combined + with all dma modes + (f) special higspeed + tx buffer size: "modprobe au1200udc hs_tx_buf=" + example: "modprobe au1200udc use_dma=1 hs_tx_buf=128" + => buffer size = 512 bytes (=bulk max packet) +Gadget Zero driver: + (a) Bulk loop: "modprobe g_zero" + (b) Int loop: "modprobe g_zero use_interrupt_traffic=1" + (c) Source/Sink "modprobe g_zero loopdefault=0" + OUT data must all be zero's + (d) Source/Sink count "modprobe g_zero loopdefault=0 pattern=1" + each OUT packet must count modulo63 (0,1,..,62,0,1,..) +OTG driver: "modprobe au1200otg" +example: + "modprobe au1200udc" + "modprobe g_zero" + "modprobe au1200otg" + => loads driver for DMA PPBNDU mode and Bulk loop + + +*** How to use ETHERNET gadget driver (CDC protocol) *** + with Linux Host +UDC side bringup: + load gadget modules + "modprobe au1200udc" + "modprobe g_ether" + "modprobe au1200otg" + "ifconfig usb0 192.168.0.2" +Host side bringup: + install support for CDC Ethernet: + change to directory /usr/src/linux + "make menuconfig" + under "Device Drivers" under "USB support" under + "USB Network adapters" choose + "Multi-purpose USB Networking Framework" + choose "CDC Ethernet support" + compile mew kernel + "modprobe CDCEther" + "ifconfig eth1 192.168.0.1" + note: assuming there is one network card assigned to eth0, + otherwise kernel messages of CDC Ethernet module show + which interface (ethX) is used +Use network connection: + after bringup of host and UDC side it behaves like a normal + ethernet connection between host and UDC + test the connection: + host side: "ping -I eth1 192.168.0.2" + UDC side : "ping -I usb0 192.168.0.1" + note: the "-I" option assures that the USB cable is used, the + option can be omitted when the routing table is setup to avoid + using other network interfaces as eth0 + diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index ff075a5..2a3b652 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -89,7 +89,27 @@ config USB_NET2280 depends on USB_GADGET_NET2280 default USB_GADGET select USB_GADGET_SELECTED +config USB_GADGET_AU1200UDC + boolean "AU1200UDC" + depends on PCI || SOC_AU1200 + select USB_GADGET_DUALSPEED + help + AU1200 UDC is a PCI based USB peripheral controller which + supports both full and high speed USB 2.0 data transfers. + + It has four configurable endpoints, as well as endpoint zero + (for control transfers). + + Say "y" to link the driver statically, or "m" to build a + dynamically linked module called "au1200udc" and force all + gadget drivers to also be dynamically linked. +config USB_AU1200UDC + tristate + depends on USB_GADGET_AU1200UDC + default USB_GADGET + select USB_GADGET_SELECTED + select USB_PORT_AU1200OTG config USB_GADGET_PXA2XX boolean "PXA 25x or IXP 4xx" depends on (ARCH_PXA && PXA25x) || ARCH_IXP4XX @@ -322,7 +342,7 @@ config USB_ETH config USB_ETH_RNDIS bool "RNDIS support (EXPERIMENTAL)" - depends on USB_ETH && EXPERIMENTAL + depends on USB_ETH && EXPERIMENTAL && !(USB_GADGET_AU1200UDC) default y help Microsoft Windows XP bundles the "Remote NDIS" (RNDIS) protocol, @@ -395,4 +415,68 @@ config USB_G_SERIAL endchoice +# +# AU1200 USB OTG options +# +config USB_PORT_AU1200OTG + boolean "AU1200 USB portmux control (On-The-Go support)" + depends on USB_GADGET_AU1200UDC || USB_EHCI_HCD || USB_OHCI_HCD + default n + help + The AU1200 and Au1200 USB device port can be used as + either a host port or a device port. + Say "y" here if you want to use both or if you want to + setup this port to fit into your board configuration. + + If the AU1200UDC driver is configured to be statically + linked this module will be linked into the kernel image + as well otherwise an additional module called + "au1200otg" will be built. + +config USB_AU1200OTG + tristate + depends on USB_PORT_AU1200OTG + default USB_AU1200UDC + +choice + prompt "OTG port functionality" + depends on USB_PORT_AU1200OTG + default USB_OTGMUX_GADGET + +config USB_OTGMUX_HOST + boolean "Host only" + depends on !USB_GADGET_AU1200UDC && (USB_EHCI_HCD || USB_OHCI_HCD) + help + Select this if your device port is connected to a + Standard-A or a Mini-A connector. + It is possible to choose this with a Mini-AB connector + if the device controller is not to be used. + +config USB_OTGMUX_GADGET + boolean "Gadget only" + depends on USB_GADGET_AU1200UDC + help + Select this if your device port is connected to a + Standard-B or a Mini-B connector. + It is possible to choose this with a Mini-AB connector + if the host controller is not to be used at this port. + +config USB_OTGMUX_IDPIN + boolean "Cable select" + depends on USB_GADGET_AU1200UDC && (USB_EHCI_HCD || USB_OHCI_HCD) + help + Choose this if you want to use both host and device at + this port. The port multiplexer is controlled by the + connectors ID pin. If an A-plug is connected the port + it is routed to the host otherwise it's routed to the + device controller. + + This is useful for validation platforms which use AB + receptacle in order to share one port between host and device. + It is not a USB compliant option. + + Select this only if your device port is connected to + a Mini-AB connector. + +endchoice endmenu diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index d5fd04d..0298250 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -3,6 +3,7 @@ # obj-$(CONFIG_USB_DUMMY_HCD) += dummy_hcd.o obj-$(CONFIG_USB_NET2280) += net2280.o +obj-$(CONFIG_USB_AU1200UDC) += au1200udc.o obj-$(CONFIG_USB_PXA2XX) += pxa2xx_udc.o obj-$(CONFIG_USB_GOKU) += goku_udc.o obj-$(CONFIG_USB_OMAP) += omap_udc.o @@ -28,3 +29,11 @@ obj-$(CONFIG_USB_GADGETFS) += gadgetfs.o obj-$(CONFIG_USB_FILE_STORAGE) += g_file_storage.o obj-$(CONFIG_USB_G_SERIAL) += g_serial.o +# +# AU1200 USB OTG options +# +ifeq ($(CONFIG_USB_PORT_AU1200OTG),y) +obj-$(CONFIG_USB_AU1200OTG) += au1200otg.o + +au1200otg-objs := au1200uoc.o +endif diff --git a/drivers/usb/gadget/au1200otg.h b/drivers/usb/gadget/au1200otg.h new file mode 100644 index 0000000..2b05703 --- /dev/null +++ b/drivers/usb/gadget/au1200otg.h @@ -0,0 +1,147 @@ +/* + * AMD Au1200 USB OTG driver + */ + +/* + * Copyright (C) 2005 AMD (http://www.amd.com) + * Author: Karsten Boge + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef AU1200OTG_H +#define AU1200OTG_H + +/* log Bug 5395 */ +#define OTG_HNP_ERR_LOG + +/***************************************************************************** +* Constants +*****************************************************************************/ + + +/********************************** + * OTG sub-state definitions +***********************************/ + +#define OTG_STATE_MASK 0x0F + +#define OTG_STATE_B_HOST_WT (0x10 | OTG_STATE_B_HOST) +#define OTG_STATE_B_PERIPHERAL_WT (0x10 | OTG_STATE_B_PERIPHERAL) +#define OTG_STATE_B_PERIPHERAL_DC (0x20 | OTG_STATE_B_PERIPHERAL) +#define OTG_STATE_B_SRP_WAIT_SE0 (0x10 | OTG_STATE_B_SRP_INIT) +#define OTG_STATE_B_SRP_D_PULSE (0x20 | OTG_STATE_B_SRP_INIT) +#define OTG_STATE_B_SRP_V_PULSE (0x30 | OTG_STATE_B_SRP_INIT) +#define OTG_STATE_B_SRP_V_DCHRG (0x40 | OTG_STATE_B_SRP_INIT) +#define OTG_STATE_B_SRP_WAIT_VBUS (0x50 | OTG_STATE_B_SRP_INIT) + +#define OTG_STATE_A_IDLE_WAIT_DP (0x10 | OTG_STATE_A_IDLE) +#define OTG_STATE_A_IDLE_WAIT_VP (0x20 | OTG_STATE_A_IDLE) +#define OTG_STATE_A_IDLE_WAIT_MP (0x30 | OTG_STATE_A_IDLE) +#define OTG_STATE_A_IDLE_WAIT_DV (0x40 | OTG_STATE_A_IDLE) +#define OTG_STATE_A_WAIT_BCON_VB (0x10 | OTG_STATE_A_WAIT_BCON) +#define OTG_STATE_A_WAIT_VFALL_DN (0x10 | OTG_STATE_A_WAIT_VFALL) + + +/********************************** +* typical timer values +**********************************/ + +#define OTG_TMR_WAIT_VFALL 10 /* ( ) A waits for VBus */ +#define OTG_TMR_A_WAIT_VRISE 100 /* ( ) A waits for VBus */ +#define OTG_TMR_A_WAIT_BCON 200 /* ( ) A waits for B-connect (1.. s) */ +#define OTG_TMR_A_IDLE_BDIS 250 /* (ms) A waits for B-disc (200.. ms) */ +#define OTG_TMR_B_WAIT_ADISCON 600 /* (us) B waits for A to disconnect <1ms */ +#define OTG_TMR_B_ACON_BRST 200 /* (us) B waits before starting reset */ +#define OTG_TMR_B_ASE0_BRST 5 /* (ms) B waits for A-conn (3.125.. ms) */ +#define OTG_TMR_B_AIDL_BDIS 50 /* (ms) B waits before dc (5..150ms) */ +#define OTG_TMR_SRP_WAIT_SE0 2 /* ( ) B SRP idle wait */ +#define OTG_TMR_SRP_WAIT_DP 7 /* (ms) B SRP D_PULSE (5..10ms) */ +#define OTG_TMR_SRP_WAIT_VP 80 /* (ms) B SRP V_PULSE (5..100ms) */ +#define OTG_TMR_SRP_DCHRG_V 30 /* ( ) B SRP VBus discharge */ +#define OTG_TMR_SRP_WAIT_VRS 5800 /* (ms) B SRP waits for VBus (5..6s) */ +#define OTG_TMR_ASRP_WAIT_MP 4 /* ( ) A SRP min. pulse */ +#define OTG_TMR_ASRP_WAIT_DP 10 /* (ms) A SRP D_PULSE TO */ +#define OTG_TMR_ASRP_WAIT_VP 200 /* (ms) A SRP V_PULSE TO */ +#define OTG_TMR_ASRP_WAIT_DV 200 /* ( ) A SRP waits for V_PULSE */ +#define OTG_TMR_A_BCON_VB 50 /* ( ) A waits for VBus after connect */ + +#define OTG_TMR_IDSNS_WAIT 10 /* (ms) ID sense wait */ + +/*********************************/ + +#define TIMER_PERIOD 1000 /* 10 ms, if longer than 10ms */ + +/********************************** + * OTG state parameters + **********************************/ + +#define OTG_HOST_READY (1<<20) /* indicates a USB host driver is */ + /* running */ +#define OTG_GADGET_READY (1<<21) /* indicates a USB gadget driver is */ + /* running */ +#define OTG_A_BUS_REQ (1<<22) /* used by appl-SW to request a */ + /* VBus rise, auto-reset by driver */ +#define OTG_A_BUS_DROP (1<<23) /* used by appl-SW to request a */ + /* VBus drop, auto-reset by driver */ +#define OTG_A_CLR_ERR (1<<24) /* used by appl-SW to request VBerr */ + /* clean-up, auto-reset by driver */ +#define OTG_AB_HNP_REQ (1<<25) /* used by appl-SW to initiate */ + /* HNP, auto-reset by driver */ +#define OTG_B_BUS_REQ (1<<26) /* used by appl-SW to request */ + /* B-device functionality, ... */ +#define OTG_B_BUS_DIS (1<<27) /* used by appl-SW to request */ + /* disable B-device functionality */ +#define OTG_B_aSSN_REQ (1<<28) /* used by appl-SW to initiate SRP, */ + /* auto-reset by the driver */ +#define OTG_B_SRP_ERROR (1<<29) /* indicates invalid HW conditions */ + /* during SRP, reset by writing "1" */ +#define OTG_A_VBUS_FAILED (1<<30) /* indicates a VBus error, reset by */ + /* writing "1", when setting */ + /* CLR_ERR or when leaving A-states */ +#define OTG_UDC_RWK_REQ (1<<31) /* call UDC function to force a */ + /* remote wake-up */ + +#define SW_REQUEST_MASK (OTG_A_BUS_REQ | OTG_A_BUS_DROP | \ + OTG_A_CLR_ERR | OTG_B_aSSN_REQ | \ + OTG_B_BUS_REQ | OTG_B_BUS_DIS | \ + OTG_UDC_RWK_REQ) + +/*********************************************************************/ + +/* + * gadget events for notify function + */ +#define OTG_GADGET_EVT_SVDROP (1<<0) /* Session valid drop */ +#define OTG_GADGET_EVT_SVALID (1<<1) /* Session valid */ +#define OTG_GADGET_REQ_WAKE (1<<2) /* Request remote wake-up */ + +/*** HS-A0 WA: gadget phy suspend issue ***/ +#define OTG_FLAGS_UDC_SUSP (1<<17) /* gadget phy suspended */ + +#ifdef OTG_HNP_ERR_LOG +#define OTG_FLAGS_HNP_ERR (1<<18) /* HNP error bug 5395 occured */ +#endif + +/***************************************************************************** +* Data +*****************************************************************************/ + +struct usb_otg_gadget_extension { + int (*request) (u32); /* function call for state change requests */ + u32 (*query) (int); /* function call to query state */ + void (*notify) (u32); /* filled in by gadget for notification */ +}; + +#endif /* AU1200OTG_H */ diff --git a/drivers/usb/gadget/au1200udc.c b/drivers/usb/gadget/au1200udc.c new file mode 100644 index 0000000..7153902 --- /dev/null +++ b/drivers/usb/gadget/au1200udc.c @@ -0,0 +1,4880 @@ +/* + * AMD Au1200 UDC high/full speed USB device controller driver. + * + * Note: Driver also works with AMD Geode LX southbridge AMD5536 + */ + +/* + * Copyright (C) 2005 AMD (http://www.amd.com) + * Author: Thomas Dahlmann + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/***************************************************************************** + * Defines + *****************************************************************************/ + +/* debug control */ +#undef UDC_DEBUG +/* #define UDC_DEBUG 1 */ +#undef UDC_VERBOSE +/* #define UDC_VERBOSE */ +/* #define UDC_REGISTER_DUMP */ + +/* Driver strings */ +#define UDC_MOD_DESCRIPTION "AMD Au1200 UDC - USB Device Controller" +#define UDC_DRIVER_VERSION_STRING "01.00.0204 - $Revision: #4 $" + +/***************************************************************************** + * Includes + *****************************************************************************/ + +/* system */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* MIPS config */ +#ifdef CONFIG_SOC_AU1200 +#include +#include +#endif + +/* gadget stack */ +#include +#include +#include + +/* udc/uoc specific */ +#include "au1200udc.h" +#include "au1200uoc.h" + + +/* use RDE timer for new kernel only */ +#define UDC_USE_TIMER +/***************************************************************************** + * Static Function Declarations + *****************************************************************************/ + +void udc_tasklet_disconnect(unsigned long); +#ifdef UDC_USE_TIMER +void udc_timer_function(unsigned long v); +void udc_pollstall_timer_function(unsigned long v); +#endif +static int udc_rxfifo_read_dwords(struct udc* dev, u32* buf, int dwords); +static void empty_req_queue (struct udc_ep *); +static int udc_probe (struct udc* dev); +static void udc_basic_init (struct udc *dev); +static void udc_setup_endpoints (struct udc *dev); +static void udc_soft_reset(struct udc* dev); +#ifdef UDC_DEBUG +static void dump_buffer(u8* buf, u32 bytes); +static int udc_ioctl (struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg); +static int udc_open (struct inode *inode, struct file *file); +static int udc_release (struct inode *inode, struct file *file); +#endif +static struct udc_data_dma* udc_get_last_dma_desc(struct udc_request* req); +static u32 udc_get_ppbdu_rxbytes(struct udc_request* req); +static int udc_free_dma_chain(struct udc* dev, struct udc_request* req); +static int udc_create_dma_chain(struct udc_ep* ep, struct udc_request* req, unsigned long buf_len, int gfp_flags); +static inline int startup_registers(struct udc* dev); +#ifdef CONFIG_SOC_AU1200 +void au1200_sync(void); +#endif +static int udc_remote_wakeup(struct udc* dev); +#if defined(CONFIG_SOC_AU1200) +static int udc_suspend(struct udc* dev); +static int udc_resume(struct udc* dev); +#else +static int udc_pci_probe (struct pci_dev *pdev, const struct pci_device_id *id); +static void udc_pci_remove (struct pci_dev *pdev); +#endif + +/***************************************************************************** + * Data + *****************************************************************************/ + +/* description */ +static const char mod_desc [] = UDC_MOD_DESCRIPTION; +static const char name [] = DRIVER_NAME_FOR_PRINT; + +/* structure to hold endpoint function pointers */ +static struct usb_ep_ops udc_ep_ops; + +/* received setup data */ +static union udc_setup_data setup_data; + +/* pointer to device object */ +static struct udc *udc; + +/* irq spin lock for soft reset */ +spinlock_t udc_irq_spinlock; +/* stall spin lock */ +spinlock_t udc_stall_spinlock; + +/* this is used for dma chaining */ +static int udc_gfp_flags = 0; + +/* slave mode: pending bytes in rx fifo after nyet, +used if EPIN irq came but no req was available */ +static unsigned int udc_rxfifo_pending = 0; + +/* count soft resets after suspend to avoid loop */ +static int soft_reset_occured = 0; +#ifdef UDC_IPBUG_3958_WORKAROUND +static int soft_reset_after_usbreset_occured = 0; +#endif + +#ifdef UDC_USE_TIMER +/* timer */ +static struct timer_list udc_timer; +static int stop_timer = 0; +int set_rde = -1; +DECLARE_COMPLETION(on_exit); +static struct timer_list udc_pollstall_timer; +static int stop_pollstall_timer = 0; +DECLARE_COMPLETION(on_pollstall_exit); +#endif + +/* tasklet for usb disconnect */ +DECLARE_TASKLET(disconnect_tasklet, udc_tasklet_disconnect, (unsigned long) &udc); + +#ifdef USE_AU1200_PCI_DUMMY +static struct pci_dev pdev_dummy; +static struct pci_dev* pdev = &pdev_dummy; +#endif + +#ifdef UDC_IPBUG_3958_WORKAROUND +/* CNAK pending field: bit0 = ep0in, bit16 = ep0out */ +static u32 cnak_pending = 0; +#define UDC_QUEUE_CNAK(ep, num) \ + if (readl(&((ep)->regs->ctl)) & AMD_BIT(UDC_EPCTL_NAK)) { \ + DBG("NAK could not be cleared for ep%d\n", num); \ + cnak_pending |= 1 << (num); \ + (ep)->naking = 1; \ + } \ + else \ + cnak_pending = cnak_pending & (~(1<<(num))); +#else +#define UDC_QUEUE_CNAK(ep, num) {} +#endif + +#ifdef UDC_IPBUG_3943_WORKAROUND +/* otg registering count */ +static u32 otg_reg_count = 0; +#endif +/* gadget registering count */ +static u32 gadget_bind_count = 0; + +/* endpoint names used for print */ +static const char ep0_string[] = "ep0in"; +static const char *ep_string[] = { + ep0_string, + "ep1in-int", "ep2in-bulk", "ep3in-bulk", "ep4in-bulk", "ep5in-bulk", "ep6in-bulk", "ep7in-bulk", "ep8in-bulk", + "ep9in-bulk", "ep10in-bulk", "ep11in-bulk", "ep12in-bulk", "ep13in-bulk", "ep14in-bulk", "ep15in-bulk", "ep0out", + "ep1out-bulk", "ep2out-bulk", "ep3out-bulk", "ep4out-bulk", "ep5out-bulk", "ep6out-bulk", "ep7out-bulk", "ep8out-bulk", + "ep9out-bulk", "ep10out-bulk", "ep11out-bulk", "ep12out-bulk", "ep13out-bulk", "ep14out-bulk", "ep15out-bulk" +}; + +#ifdef UDC_DEBUG +/* driver callback functions */ +static struct file_operations udc_fops = { + owner: THIS_MODULE, + + read: NULL, + write: NULL, + ioctl: udc_ioctl, + open: udc_open, + release: udc_release, +}; +#endif + +/* PCI device parameters */ +static struct pci_device_id pci_id[] = {{ + .vendor = UDC_PCI_VENID, + .device = UDC_PCI_DEVID, + .class = UDC_PCI_CLASS, + .class_mask = UDC_PCI_CLASS_MASK, + .subvendor = PCI_ANY_ID, + .subdevice = PCI_ANY_ID, +}, +{} +}; + +#if !defined(CONFIG_SOC_AU1200) +/* PCI functions */ +static struct pci_driver udc_pci_driver = { + .name = (char *) name, + .id_table = pci_id, + .probe = udc_pci_probe, + .remove = udc_pci_remove, +}; +#endif + +#ifdef UDC_DEBUG +/* data for debuging only */ +static unsigned long no_pref_req = 0; +static unsigned long no_req = 0; +static u32 same_cfg = 0; +static u32 num_enums = 0; +#endif + +/****** following flags can be set by module parameters */ +/* DMA usage flag */ +static int use_dma = 1; +/* packet per buffer dma */ +static int use_dma_ppb = 1; +/* with per descr. update */ +static int use_dma_ppb_du = 0; +/* buffer fill mode */ +static int use_dma_bufferfill_mode = 0; +/* full speed only mode */ +static int use_fullspeed = 0; +/* tx buffer size for high speed */ +static unsigned long hs_tx_buf = UDC_EPIN_BUFF_SIZE; + +/* module parameters */ +MODULE_PARM (use_dma, "i"); +MODULE_PARM_DESC (use_dma, "true for DMA"); +MODULE_PARM (use_dma_ppb, "i"); +MODULE_PARM_DESC (use_dma_ppb, "true for DMA in packet per buffer mode"); +MODULE_PARM (use_dma_ppb_du, "i"); +MODULE_PARM_DESC (use_dma_ppb_du, "true for DMA in packet per buffer mode with descriptor update"); +MODULE_PARM (use_fullspeed, "i"); +MODULE_PARM_DESC (use_fullspeed, "true for fullspeed only"); +MODULE_PARM (hs_tx_buf, "l"); +MODULE_PARM_DESC (hs_tx_buf, "high speed tx buffer size for data endpoints in dwords"); + +MODULE_DESCRIPTION (UDC_MOD_DESCRIPTION); +MODULE_AUTHOR ("Thomas Dahlmann"); +MODULE_LICENSE("GPL"); + +#ifndef USE_AU1200_PCI_DUMMY +MODULE_DEVICE_TABLE (pci, pci_id); +#endif + +/***************************************************************************** + * Function Definitions + *****************************************************************************/ + +/* AU specific */ +#ifdef CONFIG_SOC_AU1200 +void au1200_sync(void) +{ + au1200_sync_delay(); +} +#endif + +#ifdef UDC_DEBUG +/** + * Dumps byte read access + * + * \param a address pointer + * \return read byte + */ +static void print_td(struct udc_data_dma *p) +{ + INFO("td = %08lx: status=%08lx bufptr=%08lx next=%08lx\n", + (unsigned long) p, + (unsigned long) p->status, + (unsigned long) p->bufptr, + (unsigned long) p->next); +} +#endif + +/* printing registers --------------------------------------------------------*/ +/** + * Prints UDC device registers and endpoint irq registers + * + * \param dev pointer to device struct + */ +static void print_regs(struct udc* dev) +{ +#ifndef UDC_IPBUG_3943_WORKAROUND + DBG( "------- Device registers -------\n"); + DBG( "dev config = %08lx\n", (unsigned long) dev->regs->cfg); + DBG( "dev control = %08lx\n", (unsigned long) dev->regs->ctl); + DBG( "dev status = %08lx\n", (unsigned long) dev->regs->sts); + DBG( "\n"); + DBG( "dev int's = %08lx\n", (unsigned long) dev->regs->irqsts); + DBG( "dev intmask = %08lx\n", (unsigned long) dev->regs->irqmsk); + DBG( "\n"); + DBG( "dev ep int's = %08lx\n", (unsigned long) dev->regs->ep_irqsts); + DBG( "dev ep intmask = %08lx\n", (unsigned long) dev->regs->ep_irqmsk); + DBG( "\n"); +#endif + DBG( "USE DMA = %d\n", use_dma); + if (use_dma && use_dma_ppb && !use_dma_ppb_du) { + DBG( "DMA mode = PPBNDU (packet per buffer WITHOUT desc. update)\n"); +#ifndef UDC_DEBUG + INFO( "DMA mode (PPBNDU)\n"); +#endif + } + else if (use_dma && use_dma_ppb_du && use_dma_ppb_du) { + DBG( "DMA mode = PPBDU (packet per buffer WITH desc. update)\n"); +#ifndef UDC_DEBUG + INFO( "DMA mode (PPBDU)\n"); +#endif + } + if (use_dma && use_dma_bufferfill_mode) { + DBG( "DMA mode = BF (buffer fill mode)\n"); +#ifndef UDC_DEBUG + INFO( "DMA mode (BF)\n"); +#endif + } +#ifndef UDC_DEBUG + if (!use_dma) { + INFO( "FIFO mode\n"); + } +#endif +#ifdef UDC_USE_TIMER + INFO("RDE timer is used\n"); +#endif + DBG("-------------------------------------------------------\n"); +} + +/** + * Prints snapshot of ep registers + * + * \param dev pointer to device struct + */ +#ifdef UDC_DEBUG +static void print_ep_regs(struct udc* dev, struct udc_ep_regs* ep_regs) +{ + INFO( "ep control = %08lx\n", (unsigned long) ep_regs->ctl); + INFO( "ep status = %08lx\n", (unsigned long) ep_regs->sts); + INFO( "--------------------------------\n"); +} + +/** + * Prints misc information, to be removed + * + * \param dev pointer to device struct + */ +static void print_misc(struct udc* dev) +{ + print_regs(dev); + + if (use_dma) { + + INFO("no_req=%ld no_pref_req=%ld\n", no_req, no_pref_req); + } +} +#endif + +/* driver functions ----------------------------------------------------------*/ +/** + * Called by OS for insmod + * + * \param inode file node + * \param file struct + * \return read byte + */ +#ifdef UDC_DEBUG +static int udc_open (struct inode *inode, struct file *file) +{ + int retval = 0; + return retval; +} + +/** + * Called by OS for rmmod + * + * \param inode file node + * \param file file struct + * \return read byte + */ +static int udc_release (struct inode *inode, struct file *file) +{ + int retval = 0; + return retval; +} + +/** + * Called by OS for ioctl() from user space + * + * \param inode file node + * \param file file struct + * \param command ioctl command code + * \param argument ioctl argument + * \return 0 if success + */ +static int udc_ioctl (struct inode *inode, + struct file *file, + unsigned int command, + unsigned long argument) +{ + struct udc* dev = udc; + + if (!dev) + return -EINVAL; + + /* for testing PM */ + switch (command) + { + case 1: + udc_remote_wakeup(udc); + break; + case 5: + udc_suspend(udc); + break; + case 6: + udc_resume(udc); + break; + } + + INFO( "ioctl called\n"); + + return 0; +} + +/** + * Prints a buffers contents + * \param buf pointer to buffer + * \param bytes number bytes to print + */ +static void dump_buffer(u8* buf, u32 bytes) +{ + int i; + + printk("\nbuffer %lx = %d bytes:\n", (unsigned long) buf, bytes); + for (i = 0; i < bytes; i++) { + printk("%02x", *(buf + i)); + if ((i+1)%16 == 0) + printk("\n"); + } + printk("\n"); +} +#endif + +/** + * Masks unused interrupts + * + * \param dev pointer to device struct + * \return 0 if success + */ +static int udc_mask_unused_interrupts(struct udc* dev) +{ + u32 tmp; + + /* mask all dev interrupts */ + tmp = AMD_BIT(UDC_DEVINT_SVC) | + AMD_BIT(UDC_DEVINT_ENUM) | + AMD_BIT(UDC_DEVINT_US) | + AMD_BIT(UDC_DEVINT_UR) | + AMD_BIT(UDC_DEVINT_ES) | + AMD_BIT(UDC_DEVINT_SI) | + AMD_BIT(UDC_DEVINT_SOF)| + AMD_BIT(UDC_DEVINT_SC); + writel(tmp, &dev->regs->irqmsk); + + /* mask all ep interrupts */ + writel(UDC_EPINT_MSK_DISABLE_ALL, &dev->regs->ep_irqmsk); + + return 0; +} + +/** + * Enables endpoint 0 interrupts + * + * \param dev pointer to device struct + * \return 0 if success + */ +static int udc_enable_ep0_interrupts(struct udc* dev) +{ + u32 tmp; + + DBG("udc_enable_ep0_interrupts()\n"); + + /* read irq mask */ + tmp = readl(&dev->regs->ep_irqmsk); + /* enable ep0 irq's */ + tmp &= AMD_UNMASK_BIT(UDC_EPINT_IN_EP0) + & AMD_UNMASK_BIT(UDC_EPINT_OUT_EP0); + writel(tmp, &dev->regs->ep_irqmsk); + + return 0; +} + +/** + * Enables device interrupts for SET_INTF and SET_CONFIG + * + * \param dev pointer to device struct + * \return 0 if success + */ +static int udc_enable_dev_setup_interrupts(struct udc* dev) +{ + u32 tmp; + + DBG("enable device interrupts for setup data\n"); + + /* read irq mask */ + tmp = readl(&dev->regs->irqmsk); + + /* enable SET_INTERFACE, SET_CONFIG and other needed irq's */ + tmp &= AMD_UNMASK_BIT(UDC_DEVINT_SI) + & AMD_UNMASK_BIT(UDC_DEVINT_SC) + & AMD_UNMASK_BIT(UDC_DEVINT_UR) +#ifndef UDC_IPBUG_3943_WORKAROUND + & AMD_UNMASK_BIT(UDC_DEVINT_US) +#endif +#ifndef UDC_IPBUG_3950_WORKAROUND + & AMD_UNMASK_BIT(UDC_DEVINT_SVC) +#endif + & AMD_UNMASK_BIT(UDC_DEVINT_ENUM); + writel(tmp, &dev->regs->irqmsk); + + return 0; +} + +/** + * Calculates fifo start of endpoint based on preceeding endpoints + * + * \param ep pointer to ep struct + * \return 0 if success + */ +static int udc_set_txfifo_addr(struct udc_ep *ep) +{ + struct udc *dev; + u32 tmp; + int i; + + if (!ep || !(ep->in)) + return -EINVAL; + + dev = ep->dev; + ep->txfifo = dev->txfifo; + + /* traverse ep's */ + for (i = 0; i < ep->num; i++) { + if (dev->ep[i].regs) { + /* read fifo size */ + tmp = readl(&dev->ep[i].regs->bufin_framenum); + tmp = AMD_GETBITS(tmp, UDC_EPIN_BUFF_SIZE); + ep->txfifo+= tmp; + } + } + return 0; +} + +/** + * Enables endpoint, is called by gadget driver + * + * \param usbep pointer to ep struct + * \param desc pointer to endpoint descriptor + * \return 0 if success + */ +static int +udc_enable (struct usb_ep *usbep, const struct usb_endpoint_descriptor *desc) +{ + struct udc_ep *ep; + struct udc *dev; + u32 tmp; + unsigned long iflags; + u8 udc_csr_epix; + + VDBG("udc_enable()\n"); + + ep = container_of (usbep, struct udc_ep, ep); + if (!usbep + || usbep->name == ep0_string + || !desc + || desc->bDescriptorType != USB_DT_ENDPOINT) { + ERR("udc_enable: !usbep=%d !desc=%d ep->desc!=NULL=%d usbep->name==ep0_string=%d desc->bDescriptorType!=USB_DT_ENDPOINT=%d\n", + !usbep, !desc, ep->desc != NULL, usbep->name == ep0_string, desc->bDescriptorType != USB_DT_ENDPOINT); + return -EINVAL; + } + + DBG("udc_enable() ep %d\n", ep->num); + + dev = ep->dev; + + /* exit on suspend */ + if (dev->sys_suspended) + return -ESHUTDOWN; + + if (!dev->driver + || dev->gadget.speed == USB_SPEED_UNKNOWN) + return -ESHUTDOWN; + + spin_lock_irqsave (&dev->lock, iflags); + ep->desc = desc; + + ep->halted = 0; + + /* set traffic type */ + tmp = readl(&dev->ep[ep->num].regs->ctl); + tmp = AMD_ADDBITS(tmp, desc->bmAttributes, UDC_EPCTL_ET); + writel(tmp, &dev->ep[ep->num].regs->ctl); + + /* set max packet size */ + tmp = readl(&dev->ep[ep->num].regs->bufout_maxpkt); + tmp = AMD_ADDBITS(tmp, desc->wMaxPacketSize, UDC_EP_MAX_PKT_SIZE); + ep->ep.maxpacket = desc->wMaxPacketSize; + writel(tmp, &dev->ep[ep->num].regs->bufout_maxpkt); + + /* IN ep */ + if (ep->in) { + + /* ep ix in UDC CSR register space */ + udc_csr_epix = ep->num; + + /* set buffer size (tx fifo entries) */ + tmp = readl(&dev->ep[ep->num].regs->bufin_framenum); + /* double buffering: fifo size = 2 x max packet size */ + tmp = AMD_ADDBITS( + tmp, + desc->wMaxPacketSize * UDC_EPIN_BUFF_SIZE_MULT / + UDC_DWORD_BYTES, + UDC_EPIN_BUFF_SIZE); + writel(tmp, &dev->ep[ep->num].regs->bufin_framenum); + + /* calc. tx fifo base addr */ + udc_set_txfifo_addr(ep); + + /* flush fifo */ + tmp = readl(&ep->regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_F); + writel(tmp, &ep->regs->ctl); + + } /* OUT ep */ + else { + /* ep ix in UDC CSR register space */ + udc_csr_epix = ep->num - UDC_CSR_EP_OUT_IX_OFS; + + /* set max packet size UDC CSR */ + tmp = readl(&dev->csr->ne[ep->num - UDC_CSR_EP_OUT_IX_OFS]); + tmp = AMD_ADDBITS(tmp, desc->wMaxPacketSize, UDC_CSR_NE_MAX_PKT); + writel(tmp, &dev->csr->ne[ep->num - UDC_CSR_EP_OUT_IX_OFS]); + + if (ep->num != UDC_EP0OUT_IX) + dev->data_ep_enabled = 1; + } + + /***** UDC CSR reg ****************************/ + /* set ep values */ + tmp = readl(&dev->csr->ne[udc_csr_epix]); + /* max packet */ + tmp = AMD_ADDBITS(tmp, desc->wMaxPacketSize, UDC_CSR_NE_MAX_PKT); + /* ep number */ + tmp = AMD_ADDBITS(tmp, desc->bEndpointAddress, UDC_CSR_NE_NUM); + /* ep direction */ + tmp = AMD_ADDBITS(tmp, ep->in, UDC_CSR_NE_DIR); + /* ep type */ + tmp = AMD_ADDBITS(tmp, desc->bmAttributes, UDC_CSR_NE_TYPE); + /* ep config */ + tmp = AMD_ADDBITS(tmp, ep->dev->cur_config, UDC_CSR_NE_CFG); + /* ep interface */ + tmp = AMD_ADDBITS(tmp, ep->dev->cur_intf, UDC_CSR_NE_INTF); + /* ep alt */ + tmp = AMD_ADDBITS(tmp, ep->dev->cur_alt, UDC_CSR_NE_ALT); + /* write reg */ + writel(tmp, &dev->csr->ne[udc_csr_epix]); + + /* enable ep irq */ + tmp = readl(&dev->regs->ep_irqmsk); + tmp &= AMD_UNMASK_BIT(ep->num); + writel(tmp, &dev->regs->ep_irqmsk); + + /* clear NAK by writing CNAK */ + /* avoid BNA for DMA, dont clear NAK until DMA desc. written */ + if (!use_dma) { + tmp = readl(&ep->regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_CNAK); + writel(tmp, &ep->regs->ctl); + ep->naking = 0; + UDC_QUEUE_CNAK(ep, ep->num); + } + tmp = desc->bEndpointAddress; + DBG( "%s enabled\n", + usbep->name); + + spin_unlock_irqrestore (&dev->lock, iflags); + return 0; +} +/** + * Resets endpoint + * + * \param regs pointer to device register struct + * \param ep pointer to endpoint + */ +static void ep_init (struct udc_regs *regs, struct udc_ep *ep) +{ + u32 tmp; + + VDBG("ep-%d reset\n", ep->num); + ep->desc = 0; + ep->ep.ops = &udc_ep_ops; + INIT_LIST_HEAD (&ep->queue); + + ep->ep.maxpacket = (u16) ~0; + if (!(ep->dev->sys_suspended)) { + /* set NAK */ + tmp = readl(&ep->regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_SNAK); + writel(tmp, &ep->regs->ctl); + ep->naking = 1; + + /* disable interrupt */ + tmp = readl(®s->ep_irqmsk); + tmp |= AMD_BIT(ep->num); + writel(tmp, ®s->ep_irqmsk); + + if (ep->in) { + /* unset P and IN bit of potential former DMA */ + tmp = readl(&ep->regs->ctl); + tmp &= AMD_UNMASK_BIT(UDC_EPCTL_P); + writel(tmp, &ep->regs->ctl); + + tmp = readl(&ep->regs->sts); + tmp |= AMD_BIT(UDC_EPSTS_IN); + writel(tmp, &ep->regs->sts); + + /* flush the fifo */ + tmp = readl(&ep->regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_F); + writel(tmp, &ep->regs->ctl); + + } + /* reset desc pointer */ + writel(0, &ep->regs->desptr); + } + + +} + +/** + * Disables endpoint, is called by gadget driver + * + * \param usbep pointer to ep struct + * \return 0 if success + */ +static int udc_disable (struct usb_ep *usbep) +{ + struct udc_ep *ep = NULL; + unsigned long iflags; + + if (!usbep) + return -EINVAL; + + ep = container_of (usbep, struct udc_ep, ep); + if (usbep->name == ep0_string + || !ep->desc) + return -EINVAL; + + DBG("Disable ep-%d\n", ep->num); + + spin_lock_irqsave(&ep->dev->lock, iflags); + empty_req_queue(ep); + ep_init(ep->dev->regs, ep); + spin_unlock_irqrestore(&ep->dev->lock, iflags); + + return 0; +} + +/** + * Allocates request packet, called by gadget driver + * + * \param _ep pointer to usb ep struct + * \param gfp_flags flags for kmalloc + * \return allocated request packet, 0 if error + */ +static struct usb_request * +udc_alloc_request (struct usb_ep *usbep, gfp_t gfp) +{ + struct udc_request *req; + struct udc_data_dma *dma_desc; + struct udc_ep *ep; + + VDBG("udc_alloc_req()\n"); + if (!usbep) + return 0; + + ep = container_of (usbep, struct udc_ep, ep); + udc_gfp_flags = gfp; + + VDBG("udc_alloc_req(): ep%d\n", ep->num); + req = kmalloc (sizeof (struct udc_request), gfp); + if (!req) + return 0; + + memset (req, 0, sizeof *req); + req->req.dma = DMA_DONT_USE; + INIT_LIST_HEAD (&req->queue); + + if (ep->dma) { + +#if defined(CONFIG_SOC_AU1200) + gfp = GFP_ATOMIC | GFP_DMA; +#endif + /* ep0 in requests are allocated from data pool here */ + dma_desc = dma_pool_alloc (ep->dev->data_requests, gfp, + &req->td_phys); + if (!dma_desc) { + kfree (req); + return 0; + } + + VDBG("udc_alloc_req: req = %lx dma_desc = %lx, req->td_phys = %lx\n", + (unsigned long) req, (unsigned long) dma_desc, (unsigned long)req->td_phys); + /* prevent from using desc. - set HOST BUSY */ + dma_desc->status = AMD_ADDBITS(dma_desc->status, + UDC_DMA_STP_STS_BS_HOST_BUSY, + UDC_DMA_STP_STS_BS); + dma_desc->bufptr = __constant_cpu_to_le32 (DMA_DONT_USE); + req->td_data = dma_desc; + req->td_data_last = NULL; + req->chain_len = 1; + } + + return &req->req; +} + +/** + * Frees request packet, called by gadget driver + * + * \param usbep pointer to usb ep struct + * \param usbreq pointer to request packet to be freed + */ +static void +udc_free_request (struct usb_ep *usbep, struct usb_request *usbreq) +{ + struct udc_ep *ep; + struct udc_request *req; + + if (!usbep || !usbreq) + return; + + ep = container_of (usbep, struct udc_ep, ep); + req = container_of (usbreq, struct udc_request, req); + VDBG("free_req req=%lx\n", (unsigned long) req); + WARN_ON(!list_empty (&req->queue)); + if (req->td_data) { + VDBG("req->td_data=%lx\n", (unsigned long) req->td_data); + +#ifdef UDC_IPDEFECT_9000004946_WORKAROUND + /* re-link broken chain */ + if (req->td_data_last) { + req->td_data_last->next = req->td_data_last_next; + } +#endif + /* free dma chain if created */ + if (req->chain_len > 1) { + udc_free_dma_chain(ep->dev, req); + } + + dma_pool_free (ep->dev->data_requests, req->td_data, req->td_phys); + } + kfree (req); +} + +/* choose dma buffer allocation method */ +#undef USE_KMALLOC +#if defined(CONFIG_X86) +#define USE_KMALLOC +#elif defined(CONFIG_SOC_AU1200) +#ifdef CONFIG_DMA_COHERENT +#define USE_KMALLOC +#endif /* CONFIG_DMA_COHERENT */ +#endif + +/** + * Allocates data buffer for request packet, called by gadget driver + * + * \param usbep pointer to usb ep struct + * \param bytes number bytes to allocate + * \param dma pointer to dma struct + * \param gfp_flags flags for allocate + * \return pointer to allocated buffer, 0 if error + */ +static void * +udc_alloc_buffer ( + struct usb_ep *usbep, + unsigned len, + dma_addr_t *dma, + gfp_t gfp +) +{ + void *ptr; + struct udc_ep *ep; + VDBG("alloc_buffer(): %s\n", usbep->name); + + ep = container_of (usbep, struct udc_ep, ep); + *dma = DMA_DONT_USE; + + if (!usbep) + return 0; + + if (ep->dma) { +#if defined(USE_KMALLOC) + +#if defined(CONFIG_SOC_AU1200) + gfp = GFP_ATOMIC | GFP_DMA; +#endif + ptr = kmalloc(len, gfp); + + if (ptr) + *dma = virt_to_phys(ptr); + +#else + ptr = dma_alloc_coherent (&ep->dev->pdev->dev, len, dma, gfp); +#endif + } else + ptr = kmalloc(len, gfp); + + VDBG("alloc_buffer() ptr = %lx dma=%lx\n", (unsigned long) ptr, (unsigned long) *dma); + return ptr; +} + + +/** + * Free data buffer for request packet, called by gadget driver + * + * \param usbep pointer to usb ep struct + * \param buf pointer to buffer to be freed + * \param dma pointer to dma struct + * \param len number bytes to be freed + * \return pointer to allocated buffer, 0 if error + */ +static void +udc_free_buffer ( + struct usb_ep *usbep, + void *buf, + dma_addr_t dma, + unsigned len +) { + struct udc_ep *ep; + + VDBG ("ep %s - free buffer %lx\n", usbep->name, (unsigned long) buf); + + /* null pointer ? */ + if (!buf) { + return; + } + + ep = container_of(usbep, struct udc_ep, ep); + if (!ep) + return; + +#ifndef USE_KMALLOC + if (dma != DMA_DONT_USE) { + dma_free_coherent (&ep->dev->pdev->dev, len, buf, dma); + } else +#endif + { + if (!(ep->dma)) + kfree (buf); + } + +} + +/** + * Write data to TX fifo for IN packets + * + * \param ep pointer to ep struct + * \param req pointer to request packet + * \return allocated request packet, 0 if error + */ +static void +udc_txfifo_write (struct udc_ep *ep, struct usb_request *req) +{ + u8 *req_buf; + u32 *buf; + int i,j; + unsigned bytes = 0; + unsigned remaining = 0; + + VDBG("udc_txfifo_write()\n"); + + if (!req || !ep) + return; + + req_buf = req->buf + req->actual; + prefetch (req_buf); + remaining = req->length - req->actual; + + buf = (u32*) req_buf; + + bytes = ep->ep.maxpacket; + if (bytes > remaining) + bytes = remaining; + + /* dwords first */ + for (i = 0; i < bytes / UDC_DWORD_BYTES; i++) { + writel(*(buf + i), ep->txfifo); + } + + /* remaining bytes must be written by byte access */ + for (j = 0; j < bytes % UDC_DWORD_BYTES; j++) { + writeb((u8) (*(buf + i) >> (j << UDC_BITS_PER_BYTE_SHIFT)), + ep->txfifo); + } + +#ifdef UDC_IPBUG_2253_WORKAROUND + { + u32 tmp; + + /* NAK if small packet until write confirm completed */ + if (bytes < UDC_SMALL_PACKET) { + /* set NAK */ + tmp = readl(&ep->regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_SNAK); + writel(tmp, &ep->regs->ctl); + ep->naking = 1; + wb_flush(); + } + + /* dummy write confirm */ + writel(0, &ep->regs->confirm); + + /* stop NAKing after small packet DMA */ + if (ep->naking) { + /* clear NAK by writing CNAK */ + tmp = readl(&ep->regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_CNAK); + writel(tmp, &ep->regs->ctl); + ep->naking = 0; + UDC_QUEUE_CNAK(ep, ep->num); + } + } +#else + /* dummy write confirm */ + writel(0, &ep->regs->confirm); +#endif +} + +/** + * Read dwords from RX fifo for OUT transfers + * + * \param dev pointer to device struct + * \param buf pointer to buffer to be filled + * \param dwords number of dwords to be read + * \return allocated request packet, 0 if error + */ +static int udc_rxfifo_read_dwords(struct udc* dev, u32* buf, int dwords) +{ + int i; + + VDBG("udc_read_dwords(): %d dwords\n", dwords); + + for (i = 0; i < dwords; i++) + { + *(buf + i) = readl(dev->rxfifo); + } + return 0; +} + +/** + * Read bytes from RX fifo for OUT transfers + * + * \param dev pointer to device struct + * \param buf pointer to buffer to be filled + * \param bytes number of bytes to be read + * \return allocated request packet, 0 if error + */ +static int udc_rxfifo_read_bytes(struct udc* dev, u8* buf, int bytes) +{ + int i,j; + u32 tmp; + + VDBG("udc_read_bytes(): %d bytes\n", bytes); + + /* dwords first */ + for (i = 0; i < bytes / UDC_DWORD_BYTES; i++) { + *((u32*) (buf + (i<<2))) = readl(dev->rxfifo); + } + + /* remaining bytes must be read by byte access */ + if (bytes % UDC_DWORD_BYTES) { + tmp = readl(dev->rxfifo); + for (j = 0; j < bytes % UDC_DWORD_BYTES; j++) { + *(buf + (i<<2) + j) = (u8) (tmp & UDC_BYTE_MASK); + tmp = tmp >> UDC_BITS_PER_BYTE; + } + } + + return 0; +} + +/** + * Read data from RX fifo for OUT transfers + * + * \param ep pointer to ep struct + * \param req pointer to request packet + * \return true if request completes for short or max packet, false otherwise + */ +static int +udc_rxfifo_read(struct udc_ep *ep, struct udc_request *req) +{ + u8 *buf; + unsigned buf_space; + unsigned bytes = 0; + unsigned finished = 0; + + /* received number bytes */ + bytes = readl(&ep->regs->sts); + bytes = AMD_GETBITS(bytes, UDC_EPSTS_RX_PKT_SIZE); + + buf_space = req->req.length - req->req.actual; + buf = req->req.buf + req->req.actual; + if (bytes > buf_space) { + if ((buf_space % ep->ep.maxpacket) != 0) { + ERR( "%s: received %d bytes, rx-buffer space = %d bytes => buffer overrun\n", + ep->ep.name, bytes, buf_space); + req->req.status = -EOVERFLOW; + } + bytes = buf_space; + } + req->req.actual += bytes; + + /* last packet ? */ + if (((bytes % ep->ep.maxpacket) != 0) + || (!bytes) + || ((req->req.actual == req->req.length) && !req->req.zero)) + finished = 1; + + /* read rx fifo bytes */ + VDBG("ep %s: rxfifo read %d bytes\n", ep->ep.name, bytes); + udc_rxfifo_read_bytes(ep->dev, buf, bytes); + + return finished; +} + +/** + * create/re-init a DMA descriptor or a DMA descriptor chain + * + * \param ep pointer to endpoint struct + * \param req pointer to request packet + */ +static int prep_dma (struct udc_ep *ep, struct udc_request *req) +{ + int retval = 0; + u32 tmp; + VDBG("prep_dma\n"); + VDBG("prep_dma ep%d req->td_data=%lx\n", + ep->num, (unsigned long) req->td_data); + + /* set buffer pointer */ + req->td_data->bufptr = req->req.dma; + + /* set last bit */ + req->td_data->status |= AMD_BIT(UDC_DMA_IN_STS_L); + + /* build/re-init dma chain if maxpkt scatter mode, not for EP0 */ + if (use_dma_ppb && ep->num != UDC_EP0OUT_IX && ep->num != UDC_EP0IN_IX) { + + retval = udc_create_dma_chain(ep, req, ep->ep.maxpacket, udc_gfp_flags); + if (retval != 0) + { + if (retval == -ENOMEM) + INFO("Out of DMA memory (allocation failed)\n"); + return retval; + } + if (ep->in) { + if (req->req.length == ep->ep.maxpacket) { + /* write tx bytes */ + req->td_data->status = AMD_ADDBITS(req->td_data->status, + ep->ep.maxpacket, + UDC_DMA_IN_STS_TXBYTES); + + } + } + + } +#ifdef UDC_IPDEFECT_9000004946_WORKAROUND + else { /* EP0 */ + /* point to itself */ + req->td_data->next = req->td_phys; + } +#endif + + if (ep->in) { + VDBG("IN: use_dma_ppb=%d req->req.length=%d ep->ep.maxpacket=%d ep%d\n", + use_dma_ppb, req->req.length, ep->ep.maxpacket, ep->num); + /* if bytes < max packet then tx bytes must */ + /* be written in packet per buffer mode */ + if (!use_dma_ppb || req->req.length < ep->ep.maxpacket + || ep->num == UDC_EP0OUT_IX || ep->num == UDC_EP0IN_IX) { + /* write tx bytes */ + req->td_data->status = AMD_ADDBITS(req->td_data->status, + req->req.length, + UDC_DMA_IN_STS_TXBYTES); + /* reset frame num */ + req->td_data->status = AMD_ADDBITS(req->td_data->status, + 0, + UDC_DMA_IN_STS_FRAMENUM); + } + /* set HOST BUSY */ + req->td_data->status + = AMD_ADDBITS(req->td_data->status, + UDC_DMA_STP_STS_BS_HOST_BUSY, + UDC_DMA_STP_STS_BS); + } + else { + VDBG("OUT set host ready\n"); + /* set HOST READY */ + req->td_data->status + = AMD_ADDBITS(req->td_data->status, + UDC_DMA_STP_STS_BS_HOST_READY, + UDC_DMA_STP_STS_BS); + + + /* clear NAK by writing CNAK */ + if (ep->naking) { + tmp = readl(&ep->regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_CNAK); + writel(tmp, &ep->regs->ctl); + ep->naking = 0; + UDC_QUEUE_CNAK(ep, ep->num); + } + + } + + return retval; +} + +/** + * Completes request packet + * + * \param ep pointer to ep struct + * \param req pointer to request packet + * \param sts status of request + */ +static void +complete_req(struct udc_ep *ep, struct udc_request *req, int sts) +{ + struct udc *dev; + unsigned halted; + + VDBG("complete_req(): ep%d\n", ep->num); + + dev = ep->dev; + /* unmap DMA */ + if (req->dma_mapping) { +#if defined(CONFIG_SOC_AU1200) + if (ep->in) + dma_unmap_single(0, + req->req.dma, + req->req.length, + PCI_DMA_TODEVICE); + else + dma_unmap_single(0, + req->req.dma, + req->req.length, + PCI_DMA_FROMDEVICE); +#else + if (ep->in) + pci_unmap_single(dev->pdev, + req->req.dma, + req->req.length, + PCI_DMA_TODEVICE); + else + pci_unmap_single(dev->pdev, + req->req.dma, + req->req.length, + PCI_DMA_FROMDEVICE); +#endif + req->dma_mapping = 0; + req->req.dma = DMA_DONT_USE; + } + + halted = ep->halted; + ep->halted = 1; + + /* set new status if pending */ + if (req->req.status == -EINPROGRESS) + req->req.status = sts; + + /* remove from ep queue */ + list_del_init (&req->queue); + + VDBG( "req %p => complete %d bytes at %s with sts %d\n", + &req->req, req->req.length, ep->ep.name, sts); + if (spin_is_locked(&dev->lock)) { + spin_unlock (&dev->lock); + req->req.complete (&ep->ep, &req->req); + spin_lock (&dev->lock); + } + else { + req->req.complete (&ep->ep, &req->req); + } + ep->halted = halted; +} + +/** + * frees pci pool descriptors of a DMA chain + * + * \param dev pointer to device struct + * \param req pointer to request packet + * \return 0 if success + */ +static int udc_free_dma_chain(struct udc* dev, struct udc_request* req) +{ + + int ret_val = 0; + struct udc_data_dma *td; + struct udc_data_dma *td_last = NULL; + unsigned int i; + + DBG("free chain req = %lx\n", (unsigned long) req); + +#ifdef UDC_IPDEFECT_9000004946_WORKAROUND + /* re-link broken chain */ + if (req->td_data_last) { + req->td_data_last->next = req->td_data_last_next; + } +#endif + /* do not free first desc., will be done by free for request */ + td_last = req->td_data; +#if defined (CONFIG_SOC_AU1200) && !defined(CONFIG_DMA_COHERENT) + td = UNCAC_ADDR(phys_to_virt(td_last->next)); +#else + td = phys_to_virt(td_last->next); +#endif + + for (i = 1; i < req->chain_len; i++) { + + dma_pool_free (dev->data_requests, td, + (dma_addr_t) td_last->next); + td_last = td; +#if defined (CONFIG_SOC_AU1200) && !defined(CONFIG_DMA_COHERENT) + td = UNCAC_ADDR(phys_to_virt(td_last->next)); +#else + td = phys_to_virt(td_last->next); +#endif + } + +#ifdef UDC_IPDEFECT_9000004946_WORKAROUND + req->td_data_last = NULL; +#endif + return ret_val; +} + +/** + * Iterates to the end of a DMA chain and returns last descriptor + * + * \param req pointer to request packet + * \return pointer to last descriptori of chain + */ +static struct udc_data_dma* udc_get_last_dma_desc(struct udc_request* req) +{ + struct udc_data_dma *td; + + td = req->td_data; + while (td && !(td->status & AMD_BIT(UDC_DMA_IN_STS_L))) { +#if defined (CONFIG_SOC_AU1200) && !defined(CONFIG_DMA_COHERENT) + td = UNCAC_ADDR(phys_to_virt(td->next)); +#else + td = phys_to_virt(td->next); +#endif + } + + return td; + +} + +/** + * Iterates to the end of a DMA chain and counts bytes received + * + * \param req pointer to request packet + * \return number of received bytes + */ +static u32 udc_get_ppbdu_rxbytes(struct udc_request* req) +{ + struct udc_data_dma *td; + u32 count; + + td = req->td_data; + /* received number bytes */ + count = AMD_GETBITS(td->status, UDC_DMA_OUT_STS_RXBYTES); + + while (td && !(td->status & AMD_BIT(UDC_DMA_IN_STS_L))) { +#if defined (CONFIG_SOC_AU1200) && !defined(CONFIG_DMA_COHERENT) + td = UNCAC_ADDR(phys_to_virt(td->next)); +#else + td = phys_to_virt(td->next); +#endif + /* received number bytes */ + if (td) { + count += AMD_GETBITS(td->status, UDC_DMA_OUT_STS_RXBYTES); + } + } + + return count; + +} + +/** + * Creates or re-inits a DMA chain + * + * \param ep pointer to endpoint struct + * \param req pointer to request packet + * \param buf_len number of buffer bytes per descriptor (except last short) + */ +static int udc_create_dma_chain(struct udc_ep* ep, struct udc_request* req, unsigned long buf_len, int gfp_flags) +{ + unsigned long bytes = req->req.length; + unsigned int i; + dma_addr_t dma_addr; + struct udc_data_dma *td = NULL; + struct udc_data_dma *last = NULL; + unsigned long txbytes; + unsigned create_new_chain = 0; + unsigned len; +#ifdef UDC_IPDEFECT_9000004946_WORKAROUND + dma_addr_t last_next = DMA_DONT_USE; +#endif + + VDBG("udc_create_dma_chain: bytes=%ld buf_len=%ld\n", bytes, buf_len); + dma_addr = DMA_DONT_USE; + + /* unset L bit in first desc for OUT */ + if (!ep->in) { + req->td_data->status &= AMD_CLEAR_BIT(UDC_DMA_IN_STS_L); + } + + /* alloc only new desc's if not already available */ + len = req->req.length / ep->ep.maxpacket; + if (req->req.length % ep->ep.maxpacket) { + len++; + } + + if (len > req->chain_len) { + /* shorter chain already allocated before */ + if (req->chain_len > 1) { + udc_free_dma_chain(ep->dev, req); + } + req->chain_len = len; + create_new_chain = 1; + } + +#ifdef UDC_IPDEFECT_9000004946_WORKAROUND + /* re-link broken chain */ + if (req->td_data_last) { + req->td_data_last->next = req->td_data_last_next; + } + /* if only one td then last_next is root td */ + last_next = req->td_phys; +#endif + + td = req->td_data; + /* gen. required number of descriptors and buffers */ + for (i = buf_len; i < bytes; i += buf_len) + { + /* create or determine next desc. */ + if (create_new_chain) { + +#if defined(CONFIG_SOC_AU1200) + gfp_flags = GFP_ATOMIC | GFP_DMA; +#endif + td = dma_pool_alloc (ep->dev->data_requests, gfp_flags, + &dma_addr); + if (!td) + return -ENOMEM; + + td->status = 0; + } + else if (i == buf_len) + { + /* first td */ +#if defined (CONFIG_SOC_AU1200) && !defined(CONFIG_DMA_COHERENT) + td = (struct udc_data_dma*) UNCAC_ADDR(phys_to_virt(req->td_data->next)); +#else + td = (struct udc_data_dma*) phys_to_virt(req->td_data->next); +#endif + td->status = 0; + } + else { +#if defined (CONFIG_SOC_AU1200) && !defined(CONFIG_DMA_COHERENT) + td = (struct udc_data_dma*) UNCAC_ADDR(phys_to_virt(last->next)); +#else + td = (struct udc_data_dma*) phys_to_virt(last->next); +#endif + td->status = 0; + } + + + if (td) { + /* assign buffer */ + td->bufptr = req->req.dma + i; + } + else { + break; + } + + /* short packet ? */ + if ((bytes - i) >= buf_len) { + txbytes = buf_len; + } + else { + /* short packet */ + txbytes = bytes - i; + } + + /* link td and assign tx bytes */ + if (i == buf_len) { + if (create_new_chain) { + req->td_data->next = dma_addr; + } + else { + /* req->td_data->next = virt_to_phys(td); */ + } + /* write tx bytes */ + if (ep->in) { + /* first desc */ + req->td_data->status = AMD_ADDBITS(req->td_data->status, + ep->ep.maxpacket, + UDC_DMA_IN_STS_TXBYTES); + /* second desc */ + td->status = AMD_ADDBITS(td->status, + txbytes, + UDC_DMA_IN_STS_TXBYTES); + } + +#ifdef UDC_IPDEFECT_9000004946_WORKAROUND + last_next = req->td_data->next; +#endif + } + else { + if (create_new_chain) { + last->next = dma_addr; + } + else { + /* last->next = virt_to_phys(td); */ + } + if (ep->in) { + /* write tx bytes */ + td->status = AMD_ADDBITS(td->status, + txbytes, + UDC_DMA_IN_STS_TXBYTES); + } +#ifdef UDC_IPDEFECT_9000004946_WORKAROUND + last_next = last->next; +#endif + } + last = td; + } + /* set last bit */ + if (td) { + td->status |= AMD_BIT(UDC_DMA_IN_STS_L); + /* last desc. points to itself */ +#ifdef UDC_IPDEFECT_9000004946_WORKAROUND + /* remember broken chain next pointer */ + req->td_data_last_next = td->next; + /* point to itself */ + td->next = last_next; +#endif + req->td_data_last = td; + } + + return 0; +} + +/** + * Enabling RX DMA + * + * \param dev pointer to UDC device object + */ +static inline void udc_set_rde(struct udc* dev) +{ + u32 tmp; + + VDBG("udc_set_rde()\n"); +#ifdef UDC_USE_TIMER + /* stop RDE timer */ + if (timer_pending(&udc_timer)) { + set_rde = 0; + mod_timer(&udc_timer, jiffies - 1); + } +#endif + /* set RDE */ + tmp = readl(&dev->regs->ctl); + tmp |= AMD_BIT(UDC_DEVCTL_RDE); + writel(tmp, &dev->regs->ctl); +} + +/** + * Queues a request packet, called by gadget driver + * + * \param usbep pointer to usb ep struct + * \param usbreq pointer to request packet to be freed + * \param gfp flags for alloc + * \return 0 if success + */ +static int +udc_queue (struct usb_ep *usbep, struct usb_request *usbreq, gfp_t gfp) +{ + int retval = 0; + unsigned long iflags; + struct udc_ep *ep; + struct udc_request *req; + struct udc *dev; + u32 tmp; + + VDBG ("udc_queue()\n"); + + /* check the inputs */ + req = container_of (usbreq, struct udc_request, req); + VDBG("!usbep=%d !req=%d !buf=%d !compl=%d !empty_list=%d \n", + !usbep, !usbreq, !usbreq->buf, !usbreq->complete, + !list_empty(&req->queue)); + + if (!usbep || !usbreq || !usbreq->complete || !usbreq->buf + || !list_empty (&req->queue)) + return -EINVAL; + + ep = container_of (usbep, struct udc_ep, ep); + if (!ep->desc && (ep->num != 0 && ep->num != UDC_EP0OUT_IX)) + return -EINVAL; + + VDBG("udc_queue(): ep%d-in=%d\n", ep->num, ep->in); + dev = ep->dev; + + /* exit on suspend */ + if (dev->sys_suspended) + return -ESHUTDOWN; + + if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) + return -ESHUTDOWN; + + /* map dma (usally done before) */ + if (ep->dma && usbreq->length != 0 && usbreq->dma == DMA_DONT_USE) { + VDBG("DMA map req %lx\n", (unsigned long) req); +#if defined(CONFIG_SOC_AU1200) + if (ep->in) + usbreq->dma = dma_map_single(dev->pdev, + usbreq->buf, + usbreq->length, + PCI_DMA_TODEVICE); + else + usbreq->dma = dma_map_single(dev->pdev, + usbreq->buf, + usbreq->length, + PCI_DMA_FROMDEVICE); +#else + if (ep->in) + usbreq->dma = pci_map_single(dev->pdev, + usbreq->buf, + usbreq->length, + PCI_DMA_TODEVICE); + else + usbreq->dma = pci_map_single(dev->pdev, + usbreq->buf, + usbreq->length, + PCI_DMA_FROMDEVICE); +#endif + req->dma_mapping = 1; + } + + VDBG( "%s queue req %p, len %d req->td_data=%lx buf %p\n", + usbep->name, usbreq, usbreq->length, (unsigned long) req->td_data, usbreq->buf); + + spin_lock_irqsave (&dev->lock, iflags); + usbreq->actual = 0; + usbreq->status = -EINPROGRESS; + req->dma_done = 0; + + /* on empty queue just do first transfer */ + if (list_empty (&ep->queue)) { + /* zlp */ + if (ep->in && usbreq->length == 0) { + /* IN zlp's are handled by hardware */ + complete_req(ep, req, 0); + VDBG( "%s: zlp\n", ep->ep.name); + /* if set_config or set_intf is waiting for ack by zlp + then set CSR_DONE */ + if (dev->set_cfg_not_acked) { + tmp = readl(&dev->regs->ctl); + tmp |= AMD_BIT(UDC_DEVCTL_CSR_DONE); + writel(tmp, &dev->regs->ctl); + dev->set_cfg_not_acked = 0; + } + /* setup command is ACK'ed now by zlp */ + if (dev->waiting_zlp_ack_ep0in) { + /* clear NAK by writing CNAK in EP0_IN */ + tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_CNAK); + writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl); + dev->ep[UDC_EP0IN_IX].naking = 0; + UDC_QUEUE_CNAK(&dev->ep[UDC_EP0IN_IX], UDC_EP0IN_IX); + dev->waiting_zlp_ack_ep0in = 0; + } + goto finished; + } + if (ep->dma) { + retval = prep_dma(ep, req); + if (retval != 0) + goto finished; + /* write desc pointer to enable DMA */ + if (ep->in) { + /* set HOST READY */ + req->td_data->status + = AMD_ADDBITS(req->td_data->status, + UDC_DMA_IN_STS_BS_HOST_READY, + UDC_DMA_IN_STS_BS); + } + + /* write desc pointer */ + writel(req->td_phys, &ep->regs->desptr); + /* clear NAK by writing CNAK */ + if (ep->naking) { + tmp = readl(&ep->regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_CNAK); + writel(tmp, &ep->regs->ctl); + ep->naking = 0; + UDC_QUEUE_CNAK(ep, ep->num); + } + + if (!ep->in) { + /* enable DMA */ + udc_set_rde(dev); + if (ep->num != UDC_EP0OUT_IX) + dev->data_ep_queued = 1; + } +#ifdef UDC_DISABLE_IRQ_IF_EMPTY_IN_QUEUE + else { + /* enable ep irq */ + tmp = readl(&dev->regs->ep_irqmsk); + tmp &= AMD_UNMASK_BIT(ep->num); + writel(tmp, &dev->regs->ep_irqmsk); + } +#endif + } + + } else if (ep->dma) { + + /* prep_dma not used for OUT ep's, this is not possible + for PPB modes, because of chain creation reasons */ + if (ep->in) { + retval = prep_dma(ep, req); + if (retval != 0) + goto finished; + } + + } + VDBG("list_add\n"); + /* add request to ep queue */ + if (req) { + + list_add_tail (&req->queue, &ep->queue); + + /* stop OUT naking */ + if (!ep->in) { + if (!use_dma && udc_rxfifo_pending) { + DBG("udc_queue(): pending bytes in rxfifo after nyet\n"); + /* read pending bytes afer nyet: referring to isr */ + if (udc_rxfifo_read(ep, req)) { + /* finish */ + complete_req(ep, req, 0); + } + udc_rxfifo_pending = 0; + + } + } + + } + +finished: + spin_unlock_irqrestore (&dev->lock, iflags); + return retval; +} + +/** + * Empty request queue of an endpoint + * + * \param ep pointer to ep struct + */ +static void empty_req_queue(struct udc_ep *ep) +{ + struct udc_request *req; + + ep->halted = 1; + while (!list_empty (&ep->queue)) { + req = list_entry(ep->queue.next, + struct udc_request, + queue); + complete_req(ep, req, -ESHUTDOWN); + } +} + +/** + * Dequeues a request packet, called by gadget driver + * + * \param usbep pointer to usb ep struct + * \param usbreq pointer to request packet to be freed + * \return 0 if success + */ +static int udc_dequeue (struct usb_ep *usbep, struct usb_request *usbreq) +{ + struct udc_ep *ep; + struct udc_request *req; + unsigned req_may_used = 0; + unsigned halted; + unsigned long iflags; + + ep = container_of (usbep, struct udc_ep, ep); + if (!usbep + || !usbreq + || (!ep->desc && (ep->num != 0 && ep->num != UDC_EP0OUT_IX))) + return -EINVAL; + + req = container_of (usbreq, struct udc_request, req); + + spin_lock_irqsave (&ep->dev->lock, iflags); + halted = ep->halted; + ep->halted = 1; + /* request in processing or next one */ + if (ep->queue.next == &req->queue) { + req_may_used = 1; + } + complete_req(ep, req, -ECONNRESET); + ep->halted = halted; + + spin_unlock_irqrestore (&ep->dev->lock, iflags); + if (req_may_used) + return -EOPNOTSUPP; + else + return 0; +} + +/** + * Halt or clear halt of endpoint + * + * \param usbe pointer to ep struct + * \param halt 1 - halt, 0 - clear halt + * \return 0 if success + */ +static int +udc_set_halt (struct usb_ep *usbep, int halt) +{ + struct udc_ep *ep; + u32 tmp; + unsigned long iflags; + int retval = 0; + + if (!usbep) + return -EINVAL; + + DBG("set_halt %s: halt=%d\n", usbep->name, halt); + + ep = container_of (usbep, struct udc_ep, ep); + if (!ep->desc && (ep->num != 0 && ep->num != UDC_EP0OUT_IX)) + return -EINVAL; + if (!ep->dev->driver + || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) + return -ESHUTDOWN; + + /* exit on suspend */ + if (ep->dev->sys_suspended) + return -ESHUTDOWN; + + spin_lock_irqsave (&udc_stall_spinlock, iflags); + /* halt or clear halt */ + if (halt) { + if (ep->num == 0) + ep->dev->stall_ep0in = 1; + else { + /* set STALL */ + /* rxfifo empty not taken into acount */ + tmp = readl(&ep->regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_S); + writel(tmp, &ep->regs->ctl); + ep->halted = 1; + +#ifdef UDC_USE_TIMER + /* setup poll timer */ + if (!timer_pending(&udc_pollstall_timer)) { + udc_pollstall_timer.expires = jiffies + HZ + * UDC_POLLSTALL_TIMER_USECONDS + / (1000 * 1000); + if (!stop_pollstall_timer) { + DBG("start polltimer\n"); + add_timer(&udc_pollstall_timer); + } + } +#endif + } + } else { + /* ep is halted by set_halt() before */ + if (ep->halted) { + tmp = readl(&ep->regs->ctl); + /* clear stall bit */ + tmp = tmp & AMD_CLEAR_BIT(UDC_EPCTL_S); + /* clear NAK by writing CNAK */ + tmp |= AMD_BIT(UDC_EPCTL_CNAK); + writel(tmp, &ep->regs->ctl); + ep->halted = 0; + UDC_QUEUE_CNAK(ep, ep->num); + } + } + spin_unlock_irqrestore (&udc_stall_spinlock, iflags); + return retval; +} + +/** + * Return fifo fill state (not used, not implemented) + * + * \param usbep pointer to usb ep struct + * \return available bytes in fifo + */ +static int +udc_fifo_status (struct usb_ep *usbep) +{ + return 0; +} + +/** + * Flush the endpoint fifo (not implemented) + * + * \param usbep pointer to usb ep struct + */ +static void +udc_fifo_flush (struct usb_ep *usbep) +{ + return; +} + +/* gadget interface */ +static struct usb_ep_ops udc_ep_ops = { + .enable = udc_enable, + .disable = udc_disable, + + .queue = udc_queue, + .dequeue = udc_dequeue, + + .alloc_request = udc_alloc_request, + .free_request = udc_free_request, + + .alloc_buffer = udc_alloc_buffer, + .free_buffer = udc_free_buffer, + + .set_halt = udc_set_halt, + .fifo_status = udc_fifo_status, + .fifo_flush = udc_fifo_flush, +}; + +/*-------------------------------------------------------------------------*/ + +/** + * Get frame count fifo (not implemented) + * + * \param gadget pointer to gadget struct + * \return frame count + */ +static int udc_get_frame (struct usb_gadget *gadget) +{ + return 0; +} + +/** + * Remote wakeup gadget interface + * + * \param gadget pointer to gadget struct + * \return 0 if success + */ +static int udc_wakeup (struct usb_gadget *gadget) +{ + struct udc *dev; + + if (!gadget) + return -EINVAL; + dev = container_of (gadget, struct udc, gadget); + udc_remote_wakeup(dev); + + return 0; +} + +/** + * gadget ioctl, used for OTG support notification + * + * \param gadget pointer to gadget struct + * \param cmd command + * \param par parmater + * \return 1 if OTG supported, else 0 + */ +static int udc_gadget_ioctl (struct usb_gadget *gadget, unsigned cmd, unsigned long par) +{ + struct udc *dev; + int retval = 0; + unsigned long iflags; + u32 tmp; + + if (!gadget) + return -ENODEV; + dev = container_of (gadget, struct udc, gadget); + spin_lock_irqsave (&dev->lock, iflags); + tmp = readl(&dev->regs->cfg); + + if (tmp & AMD_BIT(UDC_DEVCFG_HNPSFEN)) + retval = 1; + else + retval = 0; + spin_unlock_irqrestore (&dev->lock, iflags); + return retval; +} + +/* gadget operations */ +static const struct usb_gadget_ops udc_ops = { + .wakeup = udc_wakeup, + .get_frame = udc_get_frame, + .ioctl = udc_gadget_ioctl, +}; + +/** + * Setups endpoint parameters, adds endpoints to linked list + * + * \param dev pointer to dev struct + */ +static void make_ep_lists(struct udc *dev) +{ + /* make gadget ep lists */ + INIT_LIST_HEAD (&dev->gadget.ep_list); + list_add_tail (&dev->ep [UDC_EPIN_STATUS_IX].ep.ep_list, &dev->gadget.ep_list); + list_add_tail (&dev->ep [UDC_EPIN_IX].ep.ep_list, &dev->gadget.ep_list); + list_add_tail (&dev->ep [UDC_EPOUT_IX].ep.ep_list, &dev->gadget.ep_list); + + /* fifo config */ + dev->ep [UDC_EPIN_STATUS_IX].fifo_depth = UDC_EPIN_SMALLINT_BUFF_SIZE; + if (dev->gadget.speed == USB_SPEED_FULL) + dev->ep [UDC_EPIN_IX].fifo_depth = UDC_FS_EPIN_BUFF_SIZE; + else if (dev->gadget.speed == USB_SPEED_HIGH) + dev->ep [UDC_EPIN_IX].fifo_depth = hs_tx_buf; + dev->ep [UDC_EPOUT_IX].fifo_depth = UDC_RXFIFO_SIZE; +} + +/** + * Sets fifo mode, called by gadget driver + * + * \param gadget pointer to gadget struct + * \param md not used + * \return 0 if success + */ +int au1200udc_set_fifo_mode (struct usb_gadget *gadget, int md) +{ + struct udc *dev; + unsigned long iflags; + + if (!gadget) + return -ENODEV; + + dev = container_of (gadget, struct udc, gadget); + + spin_lock_irqsave (&dev->lock, iflags); + make_ep_lists(dev); + spin_unlock_irqrestore (&dev->lock, iflags); + + return 0; +} +EXPORT_SYMBOL (au1200udc_set_fifo_mode); + +/** + * \brief + * init registers at driver load time + * + * \param dev pointer to device struc + * \return 0 if success + */ +static int startup_registers(struct udc* dev) +{ + u32 tmp; + + /* init controller by soft reset */ + udc_soft_reset(dev); + + /* mask not needed interrupts */ + udc_mask_unused_interrupts(dev); + + /* put into initial config */ + udc_basic_init (dev); + /* link up all endpoints */ + udc_setup_endpoints (dev); + + /* program speed */ + tmp = readl(&dev->regs->cfg); + if (use_fullspeed) { + tmp = AMD_ADDBITS(tmp, UDC_DEVCFG_SPD_FS, UDC_DEVCFG_SPD); + } + else { + tmp = AMD_ADDBITS(tmp, UDC_DEVCFG_SPD_HS, UDC_DEVCFG_SPD); + } + writel(tmp, &dev->regs->cfg); + + return 0; +} + +/** + * Inits UDC context + * + * \param dev pointer to device struct + */ +static void udc_basic_init (struct udc *dev) +{ + u32 tmp; + + DBG("udc_basic_init()\n"); + + dev->gadget.speed = USB_SPEED_UNKNOWN; + +#ifdef UDC_USE_TIMER + /* stop RDE timer */ + if (timer_pending(&udc_timer)) { + set_rde = 0; + mod_timer(&udc_timer, jiffies - 1); + } + /* stop poll stall timer */ + if (timer_pending(&udc_pollstall_timer)) { + mod_timer(&udc_pollstall_timer, jiffies - 1); + } +#endif + /* disable DMA */ + tmp = readl(&dev->regs->ctl); + tmp &= AMD_UNMASK_BIT(UDC_DEVCTL_RDE); + tmp &= AMD_UNMASK_BIT(UDC_DEVCTL_TDE); + writel(tmp, &dev->regs->ctl); + + /* enable dynamic CSR programming */ + tmp = readl(&dev->regs->cfg); + tmp |= AMD_BIT(UDC_DEVCFG_CSR_PRG); + /* set self powered */ + tmp |= AMD_BIT(UDC_DEVCFG_SP); + /* set remote wakeupable */ + tmp |= AMD_BIT(UDC_DEVCFG_RWKP); + writel(tmp, &dev->regs->cfg); + + make_ep_lists(dev); + + dev->data_ep_enabled = 0; + dev->data_ep_queued = 0; +} + +/** + * Sets initial endpoint parameters + * + * \param dev pointer to device struct + */ +static void udc_setup_endpoints(struct udc *dev) +{ + struct udc_ep *ep; + u32 tmp; + u32 reg; + + DBG("udc_setup_endpoints()\n"); + + /* read enum speed */ + tmp = readl(&dev->regs->sts); + tmp = AMD_GETBITS(tmp, UDC_DEVSTS_ENUM_SPEED); + if (tmp == UDC_DEVSTS_ENUM_SPEED_HIGH) { + dev->gadget.speed = USB_SPEED_HIGH; + } + else if (tmp == UDC_DEVSTS_ENUM_SPEED_FULL) { + dev->gadget.speed = USB_SPEED_FULL; + } + + /* set basic ep parameters */ + for (tmp = 0; tmp < UDC_EP_NUM; tmp++) { + ep = &dev->ep[tmp]; + ep->dev = dev; + ep->ep.name = ep_string [tmp]; + ep->num = tmp; + /* txfifo size is calculated at enable time */ + ep->txfifo = dev->txfifo; + + /* fifo size */ + if (tmp < UDC_EPIN_NUM) { + ep->fifo_depth = UDC_TXFIFO_SIZE; + ep->in = 1; + } + else { + ep->fifo_depth = UDC_RXFIFO_SIZE; + ep->in = 0; + + } + ep->regs = &dev->ep_regs[tmp]; + /* ep will be reset only if ep was not enabled before to avoid + disabling ep interrupts when ENUM interrupt occurs but ep is + not enabled by gadget driver */ + if (!ep->desc) { + ep_init (dev->regs, ep); + } + + if (use_dma) { + /* ep->dma is not really used, just to indicate that */ + /* DMA is active: remove this */ + /* dma regs = dev control regs */ + ep->dma = (u32*) &dev->regs->ctl; + + /* nak OUT endpoints until enable - not for ep0*/ + if (tmp != UDC_EP0IN_IX + && tmp != UDC_EP0OUT_IX + && tmp > UDC_EPIN_NUM) { + /* set NAK */ + reg = readl(&dev->ep[tmp].regs->ctl); + reg |= AMD_BIT(UDC_EPCTL_SNAK); + writel(reg, &dev->ep[tmp].regs->ctl); + dev->ep[tmp].naking = 1; + + } + } + } + /* EP0 max packet */ + if (dev->gadget.speed == USB_SPEED_FULL) { + dev->ep [UDC_EP0IN_IX].ep.maxpacket = UDC_FS_EP0IN_MAX_PKT_SIZE; + dev->ep [UDC_EP0OUT_IX].ep.maxpacket = UDC_FS_EP0OUT_MAX_PKT_SIZE; + } + else if (dev->gadget.speed == USB_SPEED_HIGH) { + dev->ep [UDC_EP0IN_IX].ep.maxpacket = UDC_EP0IN_MAX_PKT_SIZE; + dev->ep [UDC_EP0OUT_IX].ep.maxpacket = UDC_EP0OUT_MAX_PKT_SIZE; + } + + /* with suspend bug workaround, ep0 params for gadget driver + are set at gadget driver bind() call */ + dev->gadget.ep0 = &dev->ep [UDC_EP0IN_IX].ep; + dev->ep [UDC_EP0IN_IX].halted = 0; + INIT_LIST_HEAD (&dev->gadget.ep0->ep_list); + + /* init cfg/alt/int */ + dev->cur_config = 0; + dev->cur_intf = 0; + dev->cur_alt = 0; +} + +/** + * Bringup after Connect event, + * initial bringup to be ready for ep0 events + * + * \param dev pointer to device struct + */ +static void usb_connect (struct udc *dev) { + + INFO("USB Connect\n"); + + dev->connected = 1; + + /* put into initial config */ + udc_basic_init (dev); + + /* enable device setup interrupts */ + udc_enable_dev_setup_interrupts(dev); +} + +/** + * Calls gadget with disconnect event and resets the UDC and makes + * initial bringup to be ready for ep0 events + * + * \param dev pointer to device struct + */ +static void usb_disconnect (struct udc *dev) { + + INFO("USB Disconnect\n"); + + dev->connected = 0; + + /* mask interrupts */ + udc_mask_unused_interrupts(dev); + + tasklet_schedule(&disconnect_tasklet); +} + +/** + * Tasklet for disconnect to be outside of interrupt + * context + * + * \param par pointer to device struct pointer + */ +void udc_tasklet_disconnect(unsigned long par) +{ + struct udc* dev = (struct udc*) (*((struct udc**) par)); + u32 tmp; + + DBG("Tasklet disconnect\n"); + + if (dev->driver) { + /* call gadget to reset configs etc. */ + if (spin_is_locked(&dev->lock)) { + spin_unlock(&dev->lock); + dev->driver->disconnect (&dev->gadget); + spin_lock(&dev->lock); + } + else + dev->driver->disconnect (&dev->gadget); + + /* empty queues */ + for (tmp = 0; tmp < UDC_EP_NUM; tmp++) { + empty_req_queue (&dev->ep [tmp]); + } + } + + /* disable ep0 */ + ep_init (dev->regs, + &dev->ep [UDC_EP0IN_IX]); + + + if (!soft_reset_occured) { + /* init controller by soft reset */ +#ifdef UDC_IPCASE_8000018724_WORKAROUND + udc_soft_reset(dev); +#endif + soft_reset_occured++; + } +#ifndef UDC_IPBUG_3950_WORKAROUND + /* re-enable dev interrupts */ + udc_enable_dev_setup_interrupts(dev); +#endif + /* back to full speed ? */ + if (use_fullspeed) { + tmp = readl(&dev->regs->cfg); + tmp = AMD_ADDBITS(tmp, UDC_DEVCFG_SPD_FS, UDC_DEVCFG_SPD); + writel(tmp, &dev->regs->cfg); + } +} + +/** + * Reset the UDC core + * + * \param dev pointer to device struct + */ +static void udc_soft_reset(struct udc* dev) +{ + DBG("Soft reset\n"); + /* reset possible waiting interrupts, because int. + status is lost after soft reset */ + /* ep int. status reset */ + writel(UDC_EPINT_MSK_DISABLE_ALL, &dev->regs->ep_irqsts); + /* device int. status reset */ + writel(UDC_DEV_MSK_DISABLE, &dev->regs->irqsts); + + spin_lock_irq(&udc_irq_spinlock); + writel(AMD_BIT(UDC_DEVCFG_SOFTRESET), &dev->regs->cfg); + readl(&dev->regs->cfg); + spin_unlock_irq(&udc_irq_spinlock); + +} + +#ifdef UDC_USE_TIMER +/** + * RDE timer callback to set RDE bit + * + * \param v timer callback argument + */ +void udc_timer_function(unsigned long v) +{ + u32 tmp; + unsigned int i; + unsigned int bulk_data_arrived; + spin_lock_irq(&udc_irq_spinlock); + if (set_rde) { + /* open the fifo if fifo was filled on last timer call */ + if (set_rde > 1) { + bulk_data_arrived = 0; + /* check wether OUT bulk data is arrived */ + for (i = UDC_EPIN_NUM + 1; i < UDC_EP_NUM; i++) { + tmp = readl(&udc->ep [i].regs->sts); + if (AMD_GETBITS(tmp, UDC_EPSTS_OUT) + == UDC_EPSTS_OUT_DATA) { + bulk_data_arrived = 1; + break; + } + } + /* if OUT bulk data in fifo wait for queueing which + sets RDE, if not open fifo for setup packet */ + if (!bulk_data_arrived) { + /* set RDE */ + tmp = readl(&udc->regs->ctl); + tmp |= AMD_BIT(UDC_DEVCTL_RDE); + writel(tmp, &udc->regs->ctl); + } + else + INFO("ep%d - queueing delay longer than %d second(s)\n", + i, UDC_RDE_TIMER_SECONDS); + set_rde = -1; + } + else if (readl(&udc->regs->sts) & + AMD_BIT(UDC_DEVSTS_RXFIFO_EMPTY)) { + /* if fifo empty setup polling, do not just + open the fifo */ + udc_timer.expires = jiffies + HZ/UDC_RDE_TIMER_DIV; + if (!stop_timer) { + add_timer(&udc_timer); + } + } + else { + /* fifo contains data now, setup timer for opening + the fifo when timer expires to be able to receive + setup packets, when data packets gets queued by + gadget layer then timer will forced to expire with + set_rde=0 (RDE is set in udc_queue()) */ + set_rde++; + /* debug: lhadmot_timer_start = 221070 */ + udc_timer.expires = jiffies + HZ*UDC_RDE_TIMER_SECONDS; + if (!stop_timer) { + add_timer(&udc_timer); + } + } + + } + else + set_rde = -1; /* RDE was set by udc_queue() */ + spin_unlock_irq(&udc_irq_spinlock); + if (stop_timer) + complete(&on_exit); + +} + +/** + * Handle halt state, used in stall poll timer + * + * \param ep pointer to endpoint struct + */ +static inline void udc_handle_halt_state(struct udc_ep* ep) +{ + u32 tmp; + /* set stall as long not halted */ + if (ep->halted == 1) { + tmp = readl(&ep->regs->ctl); + /* STALL cleared ? */ + if (!(tmp & AMD_BIT(UDC_EPCTL_S))) { + DBG("ep %d: set STALL again\n", ep->num); + /* set STALL again */ + tmp |= AMD_BIT(UDC_EPCTL_S); + writel(tmp, &ep->regs->ctl); + } + } +} + +/** + * Stall timer callback to poll S bit and set it again after + * CLEAR_FEATURE + * + * \param v timer callback argument + */ +void udc_pollstall_timer_function(unsigned long v) +{ + struct udc_ep *ep; + int halted = 0; + unsigned long iflags; + + spin_lock_irqsave (&udc_stall_spinlock, iflags); + /* only one IN and OUT endpoints are handled */ + /* IN poll stall */ + ep = &udc->ep [UDC_EPIN_IX]; + udc_handle_halt_state(ep); + if (ep->halted) + halted = 1; + /* OUT poll stall */ + ep = &udc->ep [UDC_EPOUT_IX]; + udc_handle_halt_state(ep); + if (ep->halted) + halted = 1; + + /* setup timer again when still halted */ + if (!stop_pollstall_timer && halted) { + udc_pollstall_timer.expires = jiffies + HZ + * UDC_POLLSTALL_TIMER_USECONDS + / (1000 * 1000); + add_timer(&udc_pollstall_timer); + } + spin_unlock_irqrestore (&udc_stall_spinlock, iflags); + + if (stop_pollstall_timer) + complete(&on_pollstall_exit); +} +#endif + +#if defined(UDC_IPBUG_3950_WORKAROUND) \ + || defined(UDC_IPCASE_8000018724_WORKAROUND) \ + && !defined(UDC_HSB1) +/** + * Called by OTG driver to notify us regarding an OTG event + * + * \param code notify code + */ +void otg_notify(unsigned int code) { + VDBG("OTG notify code=%d\n", code); + switch (code) { + case OTG_GADGET_EVT_SVDROP: + /* disconnect event */ + usb_disconnect(udc); + break; + case OTG_GADGET_EVT_SVALID: + /* connect event */ + usb_connect(udc); + break; + case OTG_GADGET_REQ_WAKE: + /* remote wakeup event */ + udc_remote_wakeup(udc); + break; + } +} +#endif + +/** + * Inits endpoint 0 so that SETUP packets are processed + * + * \param dev pointer to device struct + */ +static void activate_control_endpoints (struct udc *dev) +{ + u32 tmp; + + DBG("activate_control_endpoints\n"); + + /* flush fifo */ + tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_F); + writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl); + + /* set ep0 directions */ + dev->ep[UDC_EP0IN_IX].in = 1; + dev->ep[UDC_EP0OUT_IX].in = 0; + + /* set buffer size (tx fifo entries) of EP0_IN */ + tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->bufin_framenum); + if (dev->gadget.speed == USB_SPEED_FULL) + tmp = AMD_ADDBITS(tmp, UDC_FS_EPIN0_BUFF_SIZE, UDC_EPIN_BUFF_SIZE); + else if (dev->gadget.speed == USB_SPEED_HIGH) + tmp = AMD_ADDBITS(tmp, UDC_EPIN0_BUFF_SIZE, UDC_EPIN_BUFF_SIZE); + writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->bufin_framenum); + + /* set max packet size of EP0_IN */ + tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->bufout_maxpkt); + if (dev->gadget.speed == USB_SPEED_FULL) + tmp = AMD_ADDBITS(tmp, UDC_FS_EP0IN_MAX_PKT_SIZE, UDC_EP_MAX_PKT_SIZE); + else if (dev->gadget.speed == USB_SPEED_HIGH) + tmp = AMD_ADDBITS(tmp, UDC_EP0IN_MAX_PKT_SIZE, UDC_EP_MAX_PKT_SIZE); + writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->bufout_maxpkt); + + /* set max packet size of EP0_OUT */ + tmp = readl(&dev->ep[UDC_EP0OUT_IX].regs->bufout_maxpkt); + if (dev->gadget.speed == USB_SPEED_FULL) + tmp = AMD_ADDBITS(tmp, UDC_FS_EP0OUT_MAX_PKT_SIZE, UDC_EP_MAX_PKT_SIZE); + else if (dev->gadget.speed == USB_SPEED_HIGH) + tmp = AMD_ADDBITS(tmp, UDC_EP0OUT_MAX_PKT_SIZE, UDC_EP_MAX_PKT_SIZE); + writel(tmp, &dev->ep[UDC_EP0OUT_IX].regs->bufout_maxpkt); + + /* set max packet size of EP0 in UDC CSR */ + tmp = readl(&dev->csr->ne[0]); + if (dev->gadget.speed == USB_SPEED_FULL) + tmp = AMD_ADDBITS(tmp, UDC_FS_EP0OUT_MAX_PKT_SIZE, UDC_CSR_NE_MAX_PKT); + else if (dev->gadget.speed == USB_SPEED_HIGH) + tmp = AMD_ADDBITS(tmp, UDC_EP0OUT_MAX_PKT_SIZE, UDC_CSR_NE_MAX_PKT); + writel(tmp, &dev->csr->ne[0]); + + if (use_dma) { + dev->ep [UDC_EP0OUT_IX].td->status |= AMD_BIT(UDC_DMA_OUT_STS_L); + /* write dma desc address */ + writel(dev->ep [UDC_EP0OUT_IX].td_stp_dma, &dev->ep[UDC_EP0OUT_IX].regs->subptr); + writel(dev->ep [UDC_EP0OUT_IX].td_phys, &dev->ep[UDC_EP0OUT_IX].regs->desptr); +#ifdef UDC_USE_TIMER + /* stop RDE timer */ + if (timer_pending(&udc_timer)) { + set_rde = 0; + mod_timer(&udc_timer, jiffies - 1); + } + /* stop pollstall timer */ + if (timer_pending(&udc_pollstall_timer)) { + mod_timer(&udc_pollstall_timer, jiffies - 1); + } +#endif + /* enable DMA */ + tmp = readl(&dev->regs->ctl); + tmp |= AMD_BIT(UDC_DEVCTL_MODE) + | AMD_BIT(UDC_DEVCTL_RDE) + | AMD_BIT(UDC_DEVCTL_TDE); + if (use_dma_bufferfill_mode) { + tmp |= AMD_BIT(UDC_DEVCTL_BF); + } + else if (use_dma_ppb_du) { + tmp |= AMD_BIT(UDC_DEVCTL_DU); + } + writel(tmp, &dev->regs->ctl); + } + + /* clear NAK by writing CNAK for EP0IN */ + tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_CNAK); + writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl); + dev->ep[UDC_EP0IN_IX].naking = 0; + UDC_QUEUE_CNAK(&dev->ep[UDC_EP0IN_IX], UDC_EP0IN_IX); + + /* clear NAK by writing CNAK for EP0OUT */ + tmp = readl(&dev->ep[UDC_EP0OUT_IX].regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_CNAK); + writel(tmp, &dev->ep[UDC_EP0OUT_IX].regs->ctl); + dev->ep[UDC_EP0OUT_IX].naking = 0; + UDC_QUEUE_CNAK(&dev->ep[UDC_EP0OUT_IX], UDC_EP0OUT_IX); +} + +/** + * \brief + * Make endpoint 0 ready for control traffic + * + * \param dev pointer to device struc + * \return 0 if success + */ +static int setup_ep0(struct udc *dev) +{ + activate_control_endpoints (dev); + /* enable ep0 interrupts */ + udc_enable_ep0_interrupts(dev); + /* enable device setup interrupts */ + udc_enable_dev_setup_interrupts(dev); + + return 0; +} + +/** + * \brief + * Called by gadget driver to register itself + * + * \param driver pointer to gadget driver struct + * \return 0 if success + */ +int usb_gadget_register_driver (struct usb_gadget_driver *driver) +{ + struct udc *dev = udc; + int retval; + u32 tmp; + + if (!driver || !driver->bind + || !driver->unbind + || !driver->setup + || driver->speed != USB_SPEED_HIGH) + return -EINVAL; + if (!dev) + return -ENODEV; + if (dev->driver) + return -EBUSY; + + driver->driver.bus = 0; + dev->driver = driver; + dev->gadget.dev.driver = &driver->driver; + +#ifndef CONFIG_SOC_AU1200 + /*device_create_file (&dev->pdev->dev, &dev_attr_function); + device_create_file (&dev->pdev->dev, &dev_attr_queues);*/ +#endif + +#ifdef CONFIG_USB_OTG + dev->gadget.is_otg = 1; +#endif + retval = driver->bind (&dev->gadget); + /* e.g. ether gadget needs driver_data on both ep0 endpoints */ + dev->ep[UDC_EP0OUT_IX].ep.driver_data = + dev->ep [UDC_EP0IN_IX].ep.driver_data; + + gadget_bind_count++; + if (retval) { + DBG( "binding to %s returning %d\n", + driver->driver.name, retval); + dev->driver = 0; + dev->gadget.dev.driver = 0; + return retval; + } + + /* if otg driver already registered */ + /* call otg bind() to mux udc to phy */ + if (dev->otg_transceiver) { + dev->otg_transceiver->set_peripheral( + dev->otg_transceiver, &dev->gadget); + /* clear SD */ + tmp = readl(&dev->regs->ctl); + tmp = tmp & AMD_CLEAR_BIT(UDC_DEVCTL_SD); + writel(tmp, &dev->regs->ctl); + } +#ifndef UDC_IPBUG_3950_WORKAROUND + usb_connect(dev); +#endif + + return 0; +} +EXPORT_SYMBOL (usb_gadget_register_driver); + +/** + * Called by OTG driver to register itself + * + * + * \param get_transceiver function pointer to get OTG info + * \return 0 if success + */ +int usb_gadget_register_otg (struct otg_transceiver * (*get_transceiver)(void)) +{ + struct udc *dev = udc; + int retval; + u32 tmp; + + if (!get_transceiver) + return -EINVAL; + if (!dev) + return -ENODEV; + if (dev->otg_transceiver) + return -EBUSY; + + dev->otg_transceiver = get_transceiver (); + +#if !defined(UDC_HSB1) + if (!(transceiver_to_otg(dev->otg_transceiver)->otg_priv)) + return -EINVAL; + dev->otg_driver = (struct usb_otg_gadget_extension *) + transceiver_to_otg(dev->otg_transceiver)->otg_priv; +#endif + +#ifdef UDC_IPBUG_3943_WORKAROUND + /* init registers here first with suspend bug */ + if (!otg_reg_count) { + startup_registers(dev); + otg_reg_count++; + } +#endif + +#ifdef UDC_IPBUG_3950_WORKAROUND + /* set notify function */ + dev->otg_driver->notify = otg_notify; +#endif + /* if gadget driver already registered */ + /* call gadget bind() to switch to mux udc to phy */ + if (dev->driver) { + + /* otg driver bind() */ + retval = dev->otg_transceiver->set_peripheral( + dev->otg_transceiver, &dev->gadget); + if (retval) { + DBG( "error bind to uoc driver\n"); +#if !defined(UDC_HSB1) + dev->otg_driver = NULL; +#endif + dev->otg_transceiver = NULL; + return retval; + } + /* get ready for ep0 traffic */ + setup_ep0(dev); + + /* clear SD */ + tmp = readl(&dev->regs->ctl); + tmp = tmp & AMD_CLEAR_BIT(UDC_DEVCTL_SD); + writel(tmp, &dev->regs->ctl); + } + + INFO( "registered uoc driver\n"); + + return 0; +} +EXPORT_SYMBOL (usb_gadget_register_otg); + +/** + * Called by OTG driver to unregister itself + * + * + * \return 0 if success + */ +int usb_gadget_unregister_otg (void) +{ + struct udc *dev = udc; + unsigned long flags; + u32 tmp; + + if (!dev) + return -ENODEV; + + spin_lock_irqsave (&dev->lock, flags); + + /* mask not needed interrupts */ + udc_mask_unused_interrupts(dev); + + spin_unlock_irqrestore (&dev->lock, flags); + + dev->otg_supported = 0; + if (dev->otg_transceiver) { + dev->otg_transceiver->set_peripheral(dev->otg_transceiver, NULL); + dev->otg_transceiver = NULL; + } +#if !defined(UDC_HSB1) + if (dev->otg_driver) { +#ifdef UDC_IPBUG_3950_WORKAROUND + dev->otg_driver->notify = NULL; +#endif + dev->otg_driver = NULL; + } +#endif + + /* set SD */ + tmp = readl(&dev->regs->ctl); + tmp |= AMD_BIT(UDC_DEVCTL_SD); + writel(tmp, &dev->regs->ctl); + + DBG( "unregistered uoc driver\n"); + return 0; +} +EXPORT_SYMBOL (usb_gadget_unregister_otg); + +/** + * shutdown requests and disconnect from gadget + */ +static void +shutdown(struct udc *dev, struct usb_gadget_driver *driver) +{ + int tmp; + + /* empty queues and init hardware */ + udc_basic_init(dev); + for (tmp = 0; tmp < UDC_EP_NUM; tmp++) { + empty_req_queue (&dev->ep [tmp]); + } + + if (dev->gadget.speed != USB_SPEED_UNKNOWN) { + spin_unlock (&dev->lock); + driver->disconnect (&dev->gadget); + spin_lock (&dev->lock); + } + /* init */ + udc_setup_endpoints (dev); +} + +/** + * Called by gadget driver to unregister itself + * + * \param driver pointer to gadget driver struct + * \return 0 if success + */ +int usb_gadget_unregister_driver (struct usb_gadget_driver *driver) +{ + struct udc *dev = udc; + unsigned long iflags; + u32 tmp; + + if (!dev) + return -ENODEV; + if (!driver || driver != dev->driver) + return -EINVAL; + if (gadget_bind_count) { + spin_lock_irqsave (&dev->lock, iflags); + shutdown(dev, driver); + spin_unlock_irqrestore (&dev->lock, iflags); + } + + /* unbind from otg driver first */ + if (dev->otg_transceiver) { + dev->otg_transceiver->set_peripheral( + dev->otg_transceiver, NULL); + } + + if (gadget_bind_count) { + driver->unbind (&dev->gadget); + } + gadget_bind_count = 0; + dev->driver = 0; + + /* set SD */ + tmp = readl(&dev->regs->ctl); + tmp |= AMD_BIT(UDC_DEVCTL_SD); + writel(tmp, &dev->regs->ctl); + + + DBG( "%s: unregistered\n", driver->driver.name); + + return 0; +} +EXPORT_SYMBOL (usb_gadget_unregister_driver); + + +#ifdef UDC_IPBUG_3958_WORKAROUND +/** + * Clear pending NAK bits + * + * \param dev pointer to UDC device object + * \return 0 if success + */ +static void udc_process_cnak_queue(struct udc* dev) +{ + u32 tmp; + u32 reg; + /* check epin's */ + DBG("CNAK pending queue processing\n"); + for (tmp = 0; tmp < UDC_EPIN_NUM_USED; tmp++) { + if (cnak_pending & (1 << tmp)) { + DBG("CNAK pending for ep%d\n", tmp); + /* clear NAK by writing CNAK */ + reg = readl(&dev->ep[tmp].regs->ctl); + reg |= AMD_BIT(UDC_EPCTL_CNAK); + writel(reg, &dev->ep[tmp].regs->ctl); + dev->ep[tmp].naking = 0; + UDC_QUEUE_CNAK(&dev->ep[tmp], dev->ep[tmp].num); + } + } + /* ... and ep0out */ + if (cnak_pending & (1 << UDC_EP0OUT_IX)) { + DBG("CNAK pending for ep%d\n", UDC_EP0OUT_IX); + /* clear NAK by writing CNAK */ + reg = readl(&dev->ep[UDC_EP0OUT_IX].regs->ctl); + reg |= AMD_BIT(UDC_EPCTL_CNAK); + writel(reg, &dev->ep[UDC_EP0OUT_IX].regs->ctl); + dev->ep[UDC_EP0OUT_IX].naking = 0; + UDC_QUEUE_CNAK(&dev->ep[UDC_EP0OUT_IX], + dev->ep[UDC_EP0OUT_IX].num); + } +} +#endif + +/** + * Enabling RX DMA after setup packet + * + * \param dev pointer to UDC device object + */ +static inline void udc_ep0_set_rde(struct udc* dev) +{ + if (use_dma) { +#ifndef UDC_USE_TIMER + udc_set_rde(dev); +#else + /* only enable RXDMA when no data endpoint enabled + or data is queued */ + if (!dev->data_ep_enabled || dev->data_ep_queued) { + udc_set_rde(dev); + } + else { + /* setup timer for enabling RDE (to not enable + RXFIFO DMA for data endpoints to early) */ + if (set_rde != 0 && !timer_pending(&udc_timer)) { + udc_timer.expires = jiffies + HZ/UDC_RDE_TIMER_DIV; + set_rde = 1; + if (!stop_timer) { + add_timer(&udc_timer); + } + } + } +#endif + } +} + + +/** + * Interrupt handler for data OUT traffic + * + * \param dev pointer to UDC device object + * \param ep_ix endpoint index + * \return 0 if success + */ +static inline int udc_data_out_isr(struct udc* dev, int ep_ix) +{ + int ret_val = 0; + u32 tmp; + struct udc_ep *ep; + struct udc_request *req; + unsigned int count; + struct udc_data_dma *td = NULL; + unsigned dma_done; + + VDBG("ep%d irq\n", ep_ix); + ep = &dev->ep [ep_ix]; + + tmp = readl(&ep->regs->sts); + if (use_dma) { + /* BNA event ? */ + if (tmp & AMD_BIT(UDC_EPSTS_BNA)) { + ERR("BNA ep%dout occured - DESPTR = %lx \n", ep->num, (unsigned long) readl(&ep->regs->desptr)); + + /* clear BNA */ + writel(tmp | AMD_BIT(UDC_EPSTS_BNA), &ep->regs->sts); + return 1; + } + } + /* HE event ? */ + if (tmp & AMD_BIT(UDC_EPSTS_HE)) { + ERR("HE ep%dout occured\n", ep->num); + + /* clear HE */ + writel(tmp | AMD_BIT(UDC_EPSTS_HE), &ep->regs->sts); + return 1; + } + + if (!list_empty (&ep->queue)) { + + /* next request */ + req = list_entry (ep->queue.next, + struct udc_request, queue); + } + else + { + req = 0; +#ifdef UDC_DEBUG + no_req++; +#endif + udc_rxfifo_pending = 1; + } + VDBG("req = %lx\n", (unsigned long) req); + /* fifo mode ****************/ + if (!use_dma) { + + /* read fifo */ + if (req && udc_rxfifo_read(ep, req)) { + /* finish */ + complete_req (ep, req, 0); + /* next request */ + if (!list_empty (&ep->queue) && !ep->halted) { + req = list_entry (ep->queue.next, + struct udc_request, queue); + } + else + req = 0; + } + + } /* DMA ********************/ + else if (req) { + + /* check for DMA done */ + if (!use_dma_ppb) { + dma_done = AMD_GETBITS(req->td_data->status, UDC_DMA_OUT_STS_BS); + } /* packet per buffer mode - rx bytes */ + else { + td = udc_get_last_dma_desc(req); + dma_done = AMD_GETBITS(td->status, UDC_DMA_OUT_STS_BS); + } + if (dma_done == UDC_DMA_OUT_STS_BS_DMA_DONE) { + /* buffer fill mode - rx bytes */ + if (!use_dma_ppb) { + /* received number bytes */ + count = AMD_GETBITS(req->td_data->status, UDC_DMA_OUT_STS_RXBYTES); + VDBG("rx bytes=%lx\n", (unsigned long) count); + } /* packet per buffer mode - rx bytes */ + else { + VDBG("req->td_data=%lx\n", (unsigned long) req->td_data); + VDBG("last desc = %lx\n", (unsigned long) td); + /* received number bytes */ + if (use_dma_ppb_du) { + /* every desc. counts bytes */ + count = udc_get_ppbdu_rxbytes(req); + } + else { + /* last desc. counts bytes */ + count = AMD_GETBITS(td->status, UDC_DMA_OUT_STS_RXBYTES); + if (!count) { + /* on 64k packets the RXBYTES field is zero */ + if (req->req.length == UDC_DMA_MAXPACKET) + count = UDC_DMA_MAXPACKET; + } + } + VDBG("last desc rx bytes=%lx\n", (unsigned long) count); + } + + tmp = req->req.length - req->req.actual; + if (count > tmp) { + if ((tmp % ep->ep.maxpacket) != 0) { + ERR( "%s: received %d bytes, rx-buffer space = %d bytes => buffer overrun\n", + ep->ep.name, count, tmp); + req->req.status = -EOVERFLOW; + } + count = tmp; + } + req->req.actual += count; + + /* complete request */ + complete_req(ep, req, 0); + + /* next request */ + if (!list_empty (&ep->queue) && !ep->halted) { + req = list_entry(ep->queue.next, + struct udc_request, + queue); + + /* next dma */ + ret_val = prep_dma(ep, req); + if (ret_val != 0) + goto finished; + /* write desc pointer */ + writel(req->td_phys, &ep->regs->desptr); + + /* enable DMA */ + udc_set_rde(dev); + } + else { +#ifdef UDC_DEBUG + no_pref_req++; + VDBG("OUT queue empty\n"); +#endif + /* schedule timer for setting RDE if queue remains empty + * to allow ep0 packets pass through */ +#ifdef UDC_USE_TIMER + if (set_rde != 0 && !timer_pending(&udc_timer)) { + udc_timer.expires = jiffies + HZ*UDC_RDE_TIMER_SECONDS; + set_rde = 1; + if (!stop_timer) { + add_timer(&udc_timer); + } + } +#endif + if (ep->num != UDC_EP0OUT_IX) + dev->data_ep_queued = 0; + } + + } + else { + /* RX DMA must be reenabled for each desc in PPBDU mode */ + if (use_dma_ppb_du) { + udc_set_rde(dev); + } + } + + } + +#ifdef UDC_IPBUG_3958_WORKAROUND + /* check pending CNAKS */ + if (cnak_pending) { + /* CNAk processing when rxfifo empty only */ + if (readl(&dev->regs->sts) & AMD_BIT(UDC_DEVSTS_RXFIFO_EMPTY)) { + udc_process_cnak_queue(dev); + } + } +#endif + + /* clear OUT bits in ep status */ + writel(UDC_EPSTS_OUT_DATA_CLEAR, &ep->regs->sts); +finished: + return ret_val; +} + +/** + * Interrupt handler for data IN traffic + * + * \param dev pointer to UDC device object + * \param ep_ix endpoint index + * \return 0 if success + */ +static inline int udc_data_in_isr(struct udc* dev, int ep_ix) +{ + int ret_val = 0; + u32 tmp; + u32 epsts; + struct udc_ep *ep; + struct udc_request *req; + struct udc_data_dma *td; + unsigned dma_done; + unsigned len; + + ep = &dev->ep[ep_ix]; + + epsts = readl(&ep->regs->sts); + if (use_dma) { + /* BNA ? */ + if (epsts & AMD_BIT(UDC_EPSTS_BNA)) { + ERR("BNA ep%din occured - DESPTR = %08lx \n", + ep->num, (unsigned long) readl(&ep->regs->desptr)); + + /* clear BNA */ + writel(epsts, &ep->regs->sts); + + return 1; + } + } + /* HE event ? */ + if (epsts & AMD_BIT(UDC_EPSTS_HE)) { + ERR("HE ep%dn occured - DESPTR = %08lx \n", + ep->num, (unsigned long) readl(&ep->regs->desptr)); + + /* clear HE */ + writel(epsts | AMD_BIT(UDC_EPSTS_HE), &ep->regs->sts); + return 1; + } + + /* DMA completion */ + if (epsts & AMD_BIT(UDC_EPSTS_TDC)) { + VDBG("TDC set- completion\n"); + if (!list_empty (&ep->queue)) { + req = list_entry (ep->queue.next, + struct udc_request, queue); + if (req) { + /* lengh bytes transfered */ + /* check dma done of last desc. in PPBDU mode */ + if (use_dma_ppb_du) { + td = udc_get_last_dma_desc(req); + if (td) { + dma_done = + AMD_GETBITS(td->status, UDC_DMA_IN_STS_BS); + /* don't care DMA done */ + /* if (dma_done == UDC_DMA_IN_STS_BS_DMA_DONE) */ + req->req.actual = req->req.length; + } + } + else { + /* assume all bytes transferred */ + /* TODO check error status */ + req->req.actual = req->req.length; + } + + if (req->req.actual == req->req.length) { +#ifdef UDC_IPBUG_2253_WORKAROUND + /* stop NAKing after small packet DMA */ + if (ep->naking) { + /* clear NAK by writing CNAK */ + tmp = readl(&ep->regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_CNAK); + writel(tmp, &ep->regs->ctl); + ep->naking = 0; + UDC_QUEUE_CNAK(ep, ep->num); + } +#endif + /* complete req */ + complete_req(ep, req, 0); + req->dma_going = 0; +#ifdef UDC_DISABLE_IRQ_IF_EMPTY_IN_QUEUE + /* further request available ? */ + if (list_empty (&ep->queue)) { + /* disable interrupt */ + tmp = readl(&dev->regs->ep_irqmsk); + tmp |= AMD_BIT(ep->num); + writel(tmp, &dev->regs->ep_irqmsk); + } +#endif + + } + } + } + + } /* status reg has IN bit set and TDC not set (if TDC was handled, + IN must not be handled (UDC defect) ? */ + if ((epsts & AMD_BIT(UDC_EPSTS_IN)) && !(epsts & AMD_BIT(UDC_EPSTS_TDC))) { + if (!list_empty (&ep->queue)) + { + /* next request */ + req = list_entry (ep->queue.next, + struct udc_request, queue); + /* FIFO mode ********/ + if (!use_dma) { + /* write fifo */ + udc_txfifo_write(ep, &(req->req)); + len = req->req.length - req->req.actual; + if (len > ep->ep.maxpacket) + len = ep->ep.maxpacket; + req->req.actual += len; + if (req->req.actual == req->req.length + || (len != ep->ep.maxpacket)) { + /* && (!req->req.zero || len != ep->ep.maxpacket)) { */ + /* complete req */ + complete_req (ep, req, 0); + } + } /* DMA *****************/ + else if (req && !req->dma_going) { + VDBG("IN DMA : req=%lx req->td_data=%lx\n", + (unsigned long) req, (unsigned long) req->td_data); + if (req->td_data) { + + req->dma_going = 1; + + /* unset L bit of first desc. for chain */ + if (use_dma_ppb && req->req.length > ep->ep.maxpacket) { + req->td_data->status &= AMD_CLEAR_BIT(UDC_DMA_IN_STS_L); + } + + /* write desc pointer */ + writel(req->td_phys, &ep->regs->desptr); + + wb_flush(); + /* set HOST READY */ + req->td_data->status + = AMD_ADDBITS(req->td_data->status, + UDC_DMA_IN_STS_BS_HOST_READY, + UDC_DMA_IN_STS_BS); + + wb_flush(); + +#ifdef UDC_IPBUG_2253_WORKAROUND + /* NAK if small packet until TDC interrupt */ + if (req->req.length < UDC_SMALL_PACKET) { + /* set NAK */ + tmp = readl(&ep->regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_SNAK); + writel(tmp, &ep->regs->ctl); + ep->naking = 1; + wb_flush(); + } +#endif + /* set poll demand bit */ + tmp = readl(&ep->regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_P); + writel(tmp, &ep->regs->ctl); + } + } + + } + } + /* clear status bits */ + writel(epsts, &ep->regs->sts); + + return ret_val; + +} + +/** + * Interrupt handler for Control OUT traffic + * + * \param dev pointer to UDC device object + * \return 0 if success + */ +static inline int udc_control_out_isr(struct udc* dev) +{ + int ret_val = 0; + u32 tmp; + int setup_supported; + u32 count; + int set = 0; + struct udc_ep *ep; + struct udc_ep *ep_tmp; + + ep = &dev->ep[UDC_EP0OUT_IX]; + + /* clear irq */ + writel(AMD_BIT(UDC_EPINT_OUT_EP0), &dev->regs->ep_irqsts); + + tmp = readl(&dev->ep[UDC_EP0OUT_IX].regs->sts); + /* check BNA and clear if set */ + if (tmp & AMD_BIT(UDC_EPSTS_BNA)) { + VDBG("BNA set\n"); + writel(AMD_BIT(UDC_EPSTS_BNA), &dev->ep[UDC_EP0OUT_IX].regs->sts); + } + + /* type of data: SETUP or DATA 0 bytes */ + tmp = AMD_GETBITS(tmp, UDC_EPSTS_OUT); + VDBG( "data_typ = %lx\n", (unsigned long) tmp); + /* setup data */ + if (tmp == UDC_EPSTS_OUT_SETUP) { + + ep->dev->stall_ep0in = 0; + dev->waiting_zlp_ack_ep0in = 0; + + /* set NAK for EP0_IN */ + tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_SNAK); + writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl); + dev->ep[UDC_EP0IN_IX].naking = 1; + /* get setup data */ + if (use_dma) { + + /* clear OUT bits in ep status */ + writel(UDC_EPSTS_OUT_SETUP_CLEAR, &dev->ep[UDC_EP0OUT_IX].regs->sts); + + setup_data.data[0] = dev->ep[UDC_EP0OUT_IX].td_stp->data12; + setup_data.data[1] = dev->ep[UDC_EP0OUT_IX].td_stp->data34; + /* set HOST READY */ + writel(UDC_DMA_STP_STS_BS_HOST_READY, + &dev->ep[UDC_EP0OUT_IX].td_stp->status); + } + else { + /* read fifo */ + udc_rxfifo_read_dwords(dev, setup_data.data, 2); + } + + /* determine direction of control data */ + if ((setup_data.request.bRequestType & USB_DIR_IN) != 0) { + dev->gadget.ep0 = &dev->ep [UDC_EP0IN_IX].ep; + /* enable RDE */ + udc_ep0_set_rde(dev); + set = 0; + } + else { + dev->gadget.ep0 = &dev->ep [UDC_EP0OUT_IX].ep; +#ifdef UDC_USE_TIMER + set = 1; + dev->ep[UDC_EP0OUT_IX].naking = 1; + /* setup timer for enabling RDE (to not enable + RXFIFO DMA for data to early) */ + set_rde = 1; + if (!timer_pending(&udc_timer)) { + udc_timer.expires = jiffies + HZ/UDC_RDE_TIMER_DIV; + if (!stop_timer) { + add_timer(&udc_timer); + } + } +#endif + } + /* mass storage reset must be processed here because + next packet may be a CLEAR_FEATURE HALT which would not + clear the stall bit when no STALL handshale was received before + (autostall can cause this) */ + if (setup_data.data[0] == UDC_MSCRES_DWORD0 && + setup_data.data[1] == UDC_MSCRES_DWORD1) { + DBG("MSC Reset\n"); + /* clear stall bits */ + /* only one IN and OUT endpoints are handled */ + ep_tmp = &udc->ep [UDC_EPIN_IX]; + udc_set_halt (&ep_tmp->ep, 0); + ep_tmp = &udc->ep [UDC_EPOUT_IX]; + udc_set_halt (&ep_tmp->ep, 0); + } + + /* call gadget with setup data received */ + spin_unlock (&dev->lock); + setup_supported = dev->driver->setup (&dev->gadget, + &setup_data.request); + spin_lock (&dev->lock); + + tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->ctl); + /* ep0 in returns data (not zlp) on IN phase */ + if (setup_supported >= 0 && setup_supported < UDC_EP0IN_MAXPACKET) { + /* clear NAK by writing CNAK in EP0_IN */ + tmp |= AMD_BIT(UDC_EPCTL_CNAK); + writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl); + dev->ep[UDC_EP0IN_IX].naking = 0; + UDC_QUEUE_CNAK(&dev->ep[UDC_EP0IN_IX], UDC_EP0IN_IX); + } + else if (setup_supported < 0) { + /* if unsupported request then stall */ + tmp |= AMD_BIT(UDC_EPCTL_S); + writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl); + } + else + dev->waiting_zlp_ack_ep0in = 1; + + + /* clear NAK by writing CNAK in EP0_OUT */ + if (!set) { + tmp = readl(&dev->ep[UDC_EP0OUT_IX].regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_CNAK); + writel(tmp, &dev->ep[UDC_EP0OUT_IX].regs->ctl); + dev->ep[UDC_EP0OUT_IX].naking = 0; + UDC_QUEUE_CNAK(&dev->ep[UDC_EP0OUT_IX], UDC_EP0OUT_IX); + } + + if (!use_dma) { + /* clear OUT bits in ep status */ + writel(UDC_EPSTS_OUT_SETUP_CLEAR, &dev->ep[UDC_EP0OUT_IX].regs->sts); + } + + } /* data packet 0 bytes */ + else if (tmp == UDC_EPSTS_OUT_DATA) { + /* clear OUT bits in ep status */ + writel(UDC_EPSTS_OUT_DATA_CLEAR, &dev->ep[UDC_EP0OUT_IX].regs->sts); + + /* get setup data: only 0 packet */ + if (use_dma) { + /* no req if 0 packet, just reactivate */ + if (list_empty (&dev->ep[UDC_EP0OUT_IX].queue)) { + VDBG("ZLP\n"); + + /* set HOST READY */ + dev->ep[UDC_EP0OUT_IX].td->status = + AMD_ADDBITS(dev->ep[UDC_EP0OUT_IX].td->status, + UDC_DMA_OUT_STS_BS_HOST_READY, + UDC_DMA_OUT_STS_BS); + /* enable RDE */ + udc_ep0_set_rde(dev); + } + else { + /* control write */ + udc_data_out_isr(dev, UDC_EP0OUT_IX); + /* re-program desc. pointer for possible ZLPs */ + writel(dev->ep [UDC_EP0OUT_IX].td_phys, + &dev->ep[UDC_EP0OUT_IX].regs->desptr); + /* enable RDE */ + udc_ep0_set_rde(dev); + } + } + else { + + /* received number bytes */ + count = readl(&dev->ep[UDC_EP0OUT_IX].regs->sts); + count = AMD_GETBITS(count, UDC_EPSTS_RX_PKT_SIZE); + /* out data for fifo mode not working */ + count = 0; + + /* 0 packet or real data ? */ + if (count != 0) { + udc_data_out_isr(dev, UDC_EP0OUT_IX); + } + else { + /* dummy read confirm */ + readl(&dev->ep[UDC_EP0OUT_IX].regs->confirm); + } + } + } + +#ifdef UDC_IPBUG_3958_WORKAROUND + /* check pending CNAKS */ + if (cnak_pending) { + /* CNAk processing when rxfifo empty only */ + if (readl(&dev->regs->sts) & AMD_BIT(UDC_DEVSTS_RXFIFO_EMPTY)) { + udc_process_cnak_queue(dev); + } + } +#endif + + return ret_val; +} + +/** + * Interrupt handler for Control IN traffic + * + * \param dev pointer to UDC device object + * \return 0 if success + */ +static inline int udc_control_in_isr(struct udc* dev) +{ + int ret_val = 0; + u32 tmp; + struct udc_ep *ep; + struct udc_request *req; + unsigned len; + + ep = &dev->ep [UDC_EP0IN_IX]; + + /* clear irq */ + writel(AMD_BIT(UDC_EPINT_IN_EP0), &dev->regs->ep_irqsts); + + tmp= readl(&dev->ep[UDC_EP0IN_IX].regs->sts); + /* DMA completion */ + if (tmp & AMD_BIT(UDC_EPSTS_TDC)) { + VDBG("isr: TDC clear \n"); +#ifdef UDC_IPBUG_2253_WORKAROUND + /* stop NAKing after small packet DMA */ + if (ep->naking) { + /* clear NAK by writing CNAK */ + tmp = readl(&ep->regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_CNAK); + writel(tmp, &ep->regs->ctl); + ep->naking = 0; + UDC_QUEUE_CNAK(ep, ep->num); + } +#endif + /* clear TDC bit */ + writel(AMD_BIT(UDC_EPSTS_TDC),&dev->ep[UDC_EP0IN_IX].regs->sts); + } /* status reg has IN bit set ? */ + else if (tmp & AMD_BIT(UDC_EPSTS_IN)) { + if (ep->dma) { + /* clear IN bit */ + writel(AMD_BIT(UDC_EPSTS_IN),&dev->ep[UDC_EP0IN_IX].regs->sts); + } + if (dev->stall_ep0in) { + DBG("stall ep0in\n"); + /* halt ep0in */ + tmp = readl(&ep->regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_S); + writel(tmp, &ep->regs->ctl); + } + else { + if (!list_empty (&ep->queue)) + { + /* next request */ + req = list_entry (ep->queue.next, + struct udc_request, queue); + + if (ep->dma) { + /* write desc pointer */ + writel(req->td_phys, &ep->regs->desptr); + /* set HOST READY */ + req->td_data->status + = AMD_ADDBITS(req->td_data->status, + UDC_DMA_STP_STS_BS_HOST_READY, + UDC_DMA_STP_STS_BS); + wb_flush(); + +#ifdef UDC_IPBUG_2253_WORKAROUND + /* NAK if small packet until TDC interrupt */ + if (req->req.length < UDC_SMALL_PACKET) { + /* set NAK */ + tmp = readl(&ep->regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_SNAK); + writel(tmp, &ep->regs->ctl); + ep->naking = 1; + wb_flush(); + } +#endif + /* set poll demand bit */ + tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->ctl); + tmp |= AMD_BIT(UDC_EPCTL_P); + writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl); + + /* all bytes will be transferred */ + req->req.actual = req->req.length; + + /* complete req */ + complete_req(ep, req, 0); + + } + else { + /* write fifo */ + udc_txfifo_write(ep, &(req->req)); + + /* lengh bytes transfered */ + len = req->req.length - req->req.actual; + if (len > ep->ep.maxpacket) + len = ep->ep.maxpacket; + + req->req.actual += len; + if (req->req.actual == req->req.length + || (len != ep->ep.maxpacket)) { + /* && (!req->req.zero || len != ep->ep.maxpacket)) { */ + /* complete req */ + complete_req(ep, req, 0); + } + } + + } + } + ep->halted = 0; + dev->stall_ep0in = 0; + if (!ep->dma) { + /* clear IN bit */ + writel(AMD_BIT(UDC_EPSTS_IN),&dev->ep[UDC_EP0IN_IX].regs->sts); + } + } + + return ret_val; +} + + +/** + * Interrupt handler for global device events + * + * \param dev pointer to UDC device object + * \param dev_irq device interrupt bit of DEVINT register + * \return 0 if success + */ +static inline int udc_dev_isr(struct udc* dev, u32 dev_irq) +{ + int ret_val = 0; + u32 tmp; + u32 cfg; + struct udc_ep *ep; + u16 i; + u8 udc_csr_epix; + + /* SET_CONFIG irq ? */ + if (dev_irq & AMD_BIT(UDC_DEVINT_SC)) { + + /* read config value */ + tmp = readl(&dev->regs->sts); + cfg = AMD_GETBITS(tmp, UDC_DEVSTS_CFG); +#ifdef UDC_DEBUG + /* this is needed for debug only */ + if (cfg == dev->cur_config) { + same_cfg = 1; + } + else { + same_cfg = 0; + } + VDBG("same_cfg=%d\n", same_cfg); +#endif + DBG("SET_CONFIG interrupt: config=%d\n", cfg); + dev->cur_config = cfg; + dev->set_cfg_not_acked = 1; + + /* make usb request for gadget driver */ + memset(&setup_data, 0 , sizeof(union udc_setup_data)); + setup_data.request.bRequest = USB_REQ_SET_CONFIGURATION; + setup_data.request.wValue = dev->cur_config; + + /* programm the NE registers */ + /* TODO - put this to extra function or use udc_setup_endpoints() or udc_enable() */ + for (i = 0; i < UDC_EP_NUM; i++) { + ep = &dev->ep[i]; + if (ep->in) { + + /* ep ix in UDC CSR register space */ + udc_csr_epix = ep->num; + + + } /* OUT ep */ + else { + /* ep ix in UDC CSR register space */ + udc_csr_epix = ep->num - UDC_CSR_EP_OUT_IX_OFS; + } + + tmp = readl(&dev->csr->ne[udc_csr_epix]); + /* ep cfg */ + tmp = AMD_ADDBITS(tmp, ep->dev->cur_config, UDC_CSR_NE_CFG); + /* write reg */ + writel(tmp, &dev->csr->ne[udc_csr_epix]); + + /* clear stall bits */ + ep->halted = 0; + tmp = readl(&ep->regs->ctl); + tmp = tmp & AMD_CLEAR_BIT(UDC_EPCTL_S); + writel(tmp, &ep->regs->ctl); + } + /* call gadget zero with setup data received */ + spin_unlock (&dev->lock); + tmp = dev->driver->setup (&dev->gadget, &setup_data.request); + spin_lock (&dev->lock); + + } /* SET_INTERFACE ? */ + if (dev_irq & AMD_BIT(UDC_DEVINT_SI)) { + dev->set_cfg_not_acked = 1; + /* read interface and alt setting values */ + tmp = readl(&dev->regs->sts); + dev->cur_alt = AMD_GETBITS(tmp, UDC_DEVSTS_ALT); + dev->cur_intf = AMD_GETBITS(tmp, UDC_DEVSTS_INTF); + + /* make usb request for gadget driver */ + memset(&setup_data, 0 , sizeof(union udc_setup_data)); + setup_data.request.bRequest = USB_REQ_SET_INTERFACE; + setup_data.request.bRequestType = USB_RECIP_INTERFACE; + setup_data.request.wValue = dev->cur_alt; + setup_data.request.wIndex = dev->cur_intf; + + DBG("SET_INTERFACE interrupt: alt=%d intf=%d\n", dev->cur_alt, dev->cur_intf); + + /* programm the NE registers */ + /* TODO - put this to extra function or use udc_setup_endpoints() or udc_enable() */ + for (i = 0; i < UDC_EP_NUM; i++) { + ep = &dev->ep[i]; + if (ep->in) { + + /* ep ix in UDC CSR register space */ + udc_csr_epix = ep->num; + + + } /* OUT ep */ + else { + /* ep ix in UDC CSR register space */ + udc_csr_epix = ep->num - UDC_CSR_EP_OUT_IX_OFS; + } + + /***** UDC CSR reg ****************************/ + /* set ep values */ + tmp = readl(&dev->csr->ne[udc_csr_epix]); + /* ep interface */ + tmp = AMD_ADDBITS(tmp, ep->dev->cur_intf, UDC_CSR_NE_INTF); + /* tmp = AMD_ADDBITS(tmp, 2, UDC_CSR_NE_INTF); */ + /* ep alt */ + tmp = AMD_ADDBITS(tmp, ep->dev->cur_alt, UDC_CSR_NE_ALT); + /* tmp = AMD_ADDBITS(tmp, 1, UDC_CSR_NE_ALT); */ + /* write reg */ + writel(tmp, &dev->csr->ne[udc_csr_epix]); + + /* clear stall bits */ + ep->halted = 0; + tmp = readl(&ep->regs->ctl); + tmp = tmp & AMD_CLEAR_BIT(UDC_EPCTL_S); + writel(tmp, &ep->regs->ctl); + } + + /* call gadget zero with setup data received */ + spin_unlock (&dev->lock); + tmp = dev->driver->setup (&dev->gadget, &setup_data.request); + spin_lock (&dev->lock); + + } /* USB reset */ + if (dev_irq & AMD_BIT(UDC_DEVINT_UR)) { + DBG("USB Reset interrupt\n"); + + /* allow soft reset when suspend occurs */ + soft_reset_occured = 0; + + dev->waiting_zlp_ack_ep0in = 0; + dev->set_cfg_not_acked = 0; + + /* mask not needed interrupts */ + udc_mask_unused_interrupts(dev); + + /* call gadget to reset configs etc. */ + spin_unlock(&dev->lock); + dev->driver->disconnect(&dev->gadget); + spin_lock(&dev->lock); + + /* disable ep0 to empty req queue */ + empty_req_queue (&dev->ep [UDC_EP0IN_IX]); + ep_init(dev->regs, + &dev->ep [UDC_EP0IN_IX]); + +#ifdef UDC_IPBUG_3958_WORKAROUND_SOFT_RESET_ON_USBRESET + /* soft reset when rxfifo not empty */ + tmp = readl(&dev->regs->sts); + if (!(tmp & AMD_BIT(UDC_DEVSTS_RXFIFO_EMPTY)) && + !soft_reset_after_usbreset_occured) { + udc_soft_reset(dev); + soft_reset_after_usbreset_occured++; + } +#endif + + /* DMA reset to kill potential old DMA hw hang, */ + /* POLL bit is already reset by ep_init() through */ + /* disconnect() */ + UDC_DMARST(tmp,dev); + + /* put into initial config */ + udc_basic_init (dev); + + /* enable device setup interrupts */ + udc_enable_dev_setup_interrupts(dev); + + } /* USB suspend */ +#ifndef UDC_IPBUG_3943_WORKAROUND + if (dev_irq & AMD_BIT(UDC_DEVINT_US)) { + DBG("USB Suspend interrupt\n"); + + } /* new speed ? */ +#endif + if (dev_irq & AMD_BIT(UDC_DEVINT_ENUM)) { + DBG("ENUM interrupt\n"); +#ifdef UDC_DEBUG + num_enums++; + DBG("%d enumerations !\n", num_enums); +#endif + soft_reset_after_usbreset_occured = 0; + + /* disable ep0 to empty req queue */ + empty_req_queue (&dev->ep [UDC_EP0IN_IX]); + ep_init (dev->regs, + &dev->ep [UDC_EP0IN_IX]); + + /* link up all endpoints */ + udc_setup_endpoints (dev); + if (dev->gadget.speed == USB_SPEED_HIGH) { + INFO("Connect: Speed = HIGH_SPEED\n"); + } + else if (dev->gadget.speed == USB_SPEED_FULL) { + INFO("Connect: Speed = FULL_SPEED\n"); + } + + /* init ep 0 */ + activate_control_endpoints(dev); + + /* enable ep0 interrupts */ + udc_enable_ep0_interrupts(dev); + } +#ifndef UDC_IPBUG_3950_WORKAROUND + /* session valid change interrupt */ + if (dev_irq & AMD_BIT(UDC_DEVINT_SVC)) { + DBG("USB SVC interrupt\n"); + + /* check that session is not valid to detect disconnect */ + tmp = readl(&dev->regs->sts); + if (!(tmp & AMD_BIT(UDC_DEVSTS_SESSVLD))) { + DBG("USB Disconnect (session valid low)\n"); + /* cleanup on disconnect */ + usb_disconnect(udc); + } + + } +#endif + + return ret_val; +} + +/** + * Interrupt Service Routine, see Linux Kernel Doc for parameters + * + * \param irq irq number + * \param pdev pointer to device object + * \param ptregs don't used + */ +static irqreturn_t udc_irq (int irq, void *pdev, struct pt_regs * ptregs) +{ + struct udc *dev = pdev; + u32 reg; + u16 i; + u32 ep_irq; + + +#ifdef UDC_IPBUG_3943_WORKAROUND + /* If UDC is suspended, then don't touch any register, otherwise + system hangs in endless retry => possibly hang !!! */ + if (dev->otg_driver && dev->otg_driver->query) { + if (dev->otg_driver->query(0) & OTG_FLAGS_UDC_SUSP) { + return IRQ_HANDLED; + } + } + else + return IRQ_HANDLED; +#endif + + if (dev->sys_suspended) + return IRQ_HANDLED; + + spin_lock (&dev->lock); + + + /* check for ep irq */ + reg = readl(&dev->regs->ep_irqsts); + if (reg) + { + /* EP0 OUT */ + if (reg & AMD_BIT(UDC_EPINT_OUT_EP0)) + { + udc_control_out_isr(dev); + } /* EP0 IN */ + if (reg & AMD_BIT(UDC_EPINT_IN_EP0)) { + udc_control_in_isr(dev); + + } + + /* data endpoint */ + /* iterate ep's */ + for (i = 1; i < UDC_EP_NUM; i++) { + ep_irq = 1 << i; + /* irq for out ep ? */ + if ((reg & ep_irq) && i > UDC_EPIN_NUM) { + /* clear irq */ + writel(ep_irq, &dev->regs->ep_irqsts); + udc_data_out_isr(dev,i); + } /* irq for in ep ? */ + if ((reg & ep_irq) && i < UDC_EPIN_NUM && i > 0) { + /* clear irq */ + writel(ep_irq, &dev->regs->ep_irqsts); + udc_data_in_isr(dev,i); + } + + } + + } + + + /* check for dev irq */ + reg = readl(&dev->regs->irqsts); + if (reg) { + /* clear irq */ + writel(reg, &dev->regs->irqsts); + udc_dev_isr(dev, reg); + } + + + spin_unlock (&dev->lock); + return IRQ_HANDLED; +} + +/** + * Tears down device + * + * \param pdev pointer to device struct + */ +static void gadget_release (struct device *pdev) +{ + struct au1200udc *dev = dev_get_drvdata(pdev); + kfree (dev); +} + +/** + * Cleanup on device remove + * + * \param dev pointer to udc struct + */ +static void udc_remove(struct udc* dev) +{ +#ifdef CONFIG_SOC_AU1200 + { + u32 tmp; + /* disable UDC memory, DMA and clock */ + tmp = readl((u32*) (USB_MSR_BASE + USB_MSR_MCFG)); + tmp &= AMD_CLEAR_BIT(USBMSRMCFG_DMEMEN) + & AMD_CLEAR_BIT(USBMSRMCFG_DBMEN) + & AMD_CLEAR_BIT(USBMSRMCFG_UDCCLKEN); + writel(tmp, USB_MSR_BASE + USB_MSR_MCFG); + } +#endif + +#if defined(CONFIG_SOC_AU1200) + /* done by gadget.dev.release() in kernel 2.6.x + * TMP26: device registration currently disabled for Au1200 */ + kfree (dev); +#endif +#ifdef UDC_USE_TIMER + /* remove timer */ + stop_timer++; + if (timer_pending(&udc_timer)) + wait_for_completion(&on_exit); + if (udc_timer.data) + del_timer_sync(&udc_timer); + /* remove pollstall timer */ + stop_pollstall_timer++; + if (timer_pending(&udc_pollstall_timer)) + wait_for_completion(&on_pollstall_exit); + if (udc_pollstall_timer.data) + del_timer_sync(&udc_pollstall_timer); +#endif + udc = 0; +} + +#if defined(CONFIG_SOC_AU1200) +/** + * Reset all context + * + * \param pdev pointer to device struct + */ +static void udc_drv_remove (struct device *_dev) +{ + struct platform_device *pdev = to_platform_device(_dev); + struct udc *dev = dev_get_drvdata (_dev); + +#ifdef UDC_DEBUG + /* debug */ + print_misc(dev); +#endif + /* gadget driver registered ? */ + if (dev->driver) { + WARN( "unregistering %s on driver remove\n", dev->driver->driver.name); + usb_gadget_unregister_driver (dev->driver); + } + /* otg driver registered ? */ + if (dev->otg_transceiver) { + /* should have been done already by driver model core */ + WARN( "uoc driver is still registered\n"); + } + /* dma pool cleanup */ + if (dev->data_requests) { + dma_pool_destroy (dev->data_requests); + } + if (dev->stp_requests) { + /* cleanup DMA desc's for ep0in */ + dma_pool_free (dev->stp_requests, + dev->ep [UDC_EP0OUT_IX].td_stp, + dev->ep [UDC_EP0OUT_IX].td_stp_dma); + dma_pool_free (dev->stp_requests, + dev->ep [UDC_EP0OUT_IX].td, + dev->ep [UDC_EP0OUT_IX].td_phys); + + dma_pool_destroy (dev->stp_requests); + } + + /* init controller by soft reset */ + writel(AMD_BIT(UDC_DEVCFG_SOFTRESET), &dev->regs->cfg); + + if (dev->irq_registered) + free_irq (pdev->resource[1].start, dev); + if (dev->regs) + iounmap (dev->regs); + if (dev->mem_region) + release_mem_region (pdev->resource[0].start, + pdev->resource[0].end + 1 + - pdev->resource[0].start); + + device_unregister (&dev->gadget.dev); + /* device_remove_file (&pdev->dev, &dev_attr_registers); */ + dev_set_drvdata (_dev, 0); + + udc_remove(dev); +} +#endif + +#if !defined(CONFIG_SOC_AU1200) +/** + * Reset all pci context + * + * \param pdev pointer to pci device struct + */ +static void udc_pci_remove (struct pci_dev *pdev) +{ + struct udc *dev; + + dev = pci_get_drvdata(pdev); +#ifdef UDC_DEBUG + /* debug */ + print_misc(dev); +#endif + /* gadget driver registered ? */ + if (dev->driver) { + WARN( "unregistering %s on pci remove\n", dev->driver->driver.name); + usb_gadget_unregister_driver (dev->driver); + } + /* otg driver registered ? */ + if (dev->otg_transceiver) { + /* should have been done already by driver model core */ + WARN( "uoc driver is still registered\n"); + } + /* dma pool cleanup */ + if (dev->data_requests) { + dma_pool_destroy (dev->data_requests); + } + if (dev->stp_requests) { + /* cleanup DMA desc's for ep0in */ + dma_pool_free (dev->stp_requests, + dev->ep [UDC_EP0OUT_IX].td_stp, + dev->ep [UDC_EP0OUT_IX].td_stp_dma); + dma_pool_free (dev->stp_requests, + dev->ep [UDC_EP0OUT_IX].td, + dev->ep [UDC_EP0OUT_IX].td_phys); + + dma_pool_destroy (dev->stp_requests); + } + + /* init controller by soft reset */ + writel(AMD_BIT(UDC_DEVCFG_SOFTRESET), &dev->regs->cfg); + if (dev->irq_registered) + free_irq (pdev->irq, dev); + if (dev->regs) + iounmap (dev->regs); + if (dev->mem_region) + release_mem_region (pci_resource_start (pdev, 0), + pci_resource_len (pdev, 0)); +#ifndef USE_AU1200_PCI_DUMMY + if (dev->active) + pci_disable_device (pdev); +#endif + + /* device file system not working for Au1200 */ + device_unregister (&dev->gadget.dev); + /* device_remove_file (&pdev->dev, &dev_attr_registers); */ + pci_set_drvdata (pdev,0); + + udc_remove(dev); +} +#endif + +/** + * create dma pools on init + * + * \param dev pointer to udc device struct + * \return 0 if success + */ +__init static int init_dma_pools(struct udc* dev) +{ + struct udc_stp_dma *td_stp; + struct udc_data_dma *td_data; + int retval; + + /* consistent DMA mode setting ? */ + if (use_dma_ppb) { + use_dma_bufferfill_mode = 0; + } + else { + use_dma_ppb_du = 0; + use_dma_bufferfill_mode = 1; + } + + /* DMA setup */ + dev->data_requests = dma_pool_create ("data_requests", NULL, + sizeof (struct udc_data_dma), + UDC_PCIPOOL_ALIGN, + UDC_PCIPOOL_CROSS); + if (!dev->data_requests) { + DBG( "can't get request data pool\n"); + retval = -ENOMEM; + goto finished; + } + + /* EP0 in dma regs = dev control regs */ + dev->ep[UDC_EP0IN_IX].dma = &dev->regs->ctl; + + /* dma desc for setup data */ + dev->stp_requests = dma_pool_create ("setup requests", NULL, + sizeof (struct udc_stp_dma), + UDC_PCIPOOL_ALIGN, + UDC_PCIPOOL_CROSS); + if (!dev->stp_requests) { + DBG( "can't get stp request pool\n"); + retval = -ENOMEM; + goto finished; + } + /* setup */ + td_stp = dma_pool_alloc (dev->stp_requests, UDC_PCIPOOL_GFP_STP, + &dev->ep [UDC_EP0OUT_IX].td_stp_dma); + if (td_stp == NULL){ + retval = -ENOMEM; + goto finished; + } + dev->ep [UDC_EP0OUT_IX].td_stp = td_stp; + /* data: 0 packets !? */ + td_data = dma_pool_alloc (dev->stp_requests, UDC_PCIPOOL_GFP_STP, + &dev->ep [UDC_EP0OUT_IX].td_phys); + if (td_data == NULL){ + retval = -ENOMEM; + goto finished; + } + dev->ep [UDC_EP0OUT_IX].td = td_data; +#ifdef UDC_IPDEFECT_9000004946_WORKAROUND + /* point to itself */ + dev->ep [UDC_EP0OUT_IX].td->next = dev->ep [UDC_EP0OUT_IX].td_phys; +#endif + return 0; + +finished: + return retval; +} + +#if defined(CONFIG_SOC_AU1200) +/** + * Called by kernel init device context + * + * \param dev pointer to device struct + * \return 0 if success + */ +static int udc_drv_probe (struct device* _dev) +{ + char tmp[8]; + struct udc *dev; + struct platform_device *pdev = to_platform_device(_dev); + u32 resource; + u32 len; + u32 irq; + int retval = 0; +#ifdef CONFIG_SOC_AU1200 + u32 reg; + + /* basic init */ + reg = readl((u32*) (USB_MSR_BASE + USB_MSR_MCFG)); + if (reg == 0) { + /* default value */ + reg = USBMSRMCFG_DEFAULT; + writel(reg, USB_MSR_BASE + USB_MSR_MCFG); + readl((u32*) USB_MSR_BASE + USB_MSR_MCFG); + udelay(1000); + } + /* enable UDC memory, DMA, clock, cacheable memory, + * read combining and prefetch enable */ + reg |= AMD_BIT(USBMSRMCFG_DMEMEN) | AMD_BIT(USBMSRMCFG_DBMEN) + | AMD_BIT(USBMSRMCFG_UDCCLKEN) + | AMD_BIT(USBMSRMCFG_PHYPLLEN) +#ifdef CONFIG_DMA_COHERENT + | AMD_BIT(USBMSRMCFG_UCAM) +#endif + | AMD_BIT(USBMSRMCFG_RDCOMB) + | AMD_BIT(USBMSRMCFG_PFEN); + writel(reg, USB_MSR_BASE + USB_MSR_MCFG); +#endif + + /* one udc only */ + if (udc) { + WARN("already probed: %04x/%04x\n", UDC_PCI_VENID, UDC_PCI_DEVID); + return -EBUSY; + } + + /* init */ + dev = kmalloc (sizeof (struct udc), SLAB_KERNEL); + if (!dev) { + retval = -ENOMEM; + goto finished; + } + memset (dev, 0, sizeof(struct udc)); + + dev->pdev = _dev; + + /* check platform resources */ + if (pdev->resource[0].flags != IORESOURCE_MEM) { + ERR ("resource[0] must be IORESOURCE_MEM\n"); + retval = -ENOMEM; + goto finished; + } + resource = pdev->resource[0].start; + len = pdev->resource[0].end + 1 - pdev->resource[0].start; + if (pdev->resource[1].flags != IORESOURCE_IRQ) { + ERR ("resource[1] must be IORESOURCE_IRQ\n"); + retval = -ENOMEM; + goto finished; + } + irq = pdev->resource[1].start; + + /* platform device resource allocation */ + /* mem */ + if (!request_mem_region (resource, len, name)) { + ERR ("controller already in use\n"); + retval = -EBUSY; + goto finished; + } + dev->mem_region = 1; + + dev->virt_addr = ioremap_nocache(resource, len); + if (dev->virt_addr == NULL) { + DBG( "start address cannot be mapped\n"); + retval = -EFAULT; + goto finished; + } + + /* irq */ + if (!irq) { + ERR( "irq not set\n"); + retval = -ENODEV; + goto finished; + } + snprintf (tmp, sizeof tmp, "%d", irq); + if (request_irq (irq, udc_irq, SA_SHIRQ, name, dev) != 0) { + ERR( "error on request_irq() with %s\n", tmp); + retval = -EBUSY; + goto finished; + } + dev->irq_registered = 1; + + dev_set_drvdata (_dev, dev); + + /* chip revision */ + dev->chiprev = 0; + + /* chip rev for Au1200 */ + dev->chiprev = (u16) read_c0_prid() & 0xff; + + /* init dma pools */ + if (use_dma) { + retval = init_dma_pools(dev); + if (retval != 0) + goto finished; + } + + dev->phys_addr = resource; + dev->irq = irq; + dev->gadget.dev.parent = _dev; + dev->gadget.dev.dma_mask = _dev->dma_mask; + /* general probing */ + if (udc_probe(dev) != 0) + goto finished; + return retval; + +finished: + if (dev) + udc_drv_remove (_dev); + return retval; +} +#endif + +#if !defined(CONFIG_SOC_AU1200) +/** + * Called by pci bus driver to init pci context + * + * \param pdev pointer to pci device struct + * \param id pointer to pci device id + * \return 0 if success + */ +static int udc_pci_probe (struct pci_dev *pdev, const struct pci_device_id *id) +{ + char tmp[8]; + struct udc *dev; + unsigned long resource; + unsigned long len; + int retval = 0;; + + VDBG("udc_pci_probe()\n"); + +#ifdef CONFIG_SOC_AU1200 + { + u32 tmp; + /* + * Fill in the dummy pci_dev + */ + memset(pdev, 0, sizeof(struct pci_dev)); + pdev->resource[0].name = "UDC Registers"; + pdev->resource[0].start = USB_UDC_BASE; + pdev->resource[0].end = USB_UDC_BASE + USB_UDC_LEN - 1; + pdev->resource[0].flags = 0; + pdev->irq = AU1200_USB_INT; + + tmp = readl((u32*) (USB_MSR_BASE + USB_MSR_MCFG)); + if (tmp == 0) { + /* default value */ + tmp = USBMSRMCFG_DEFAULT; + writel(tmp, USB_MSR_BASE + USB_MSR_MCFG); + readl((u32*) USB_MSR_BASE + USB_MSR_MCFG); + udelay(1000); + } + /* enable UDC memory, DMA, clock, cacheable memory, + * read combining and prefetch enable */ + tmp |= AMD_BIT(USBMSRMCFG_DMEMEN) | AMD_BIT(USBMSRMCFG_DBMEN) + | AMD_BIT(USBMSRMCFG_UDCCLKEN) + | AMD_BIT(USBMSRMCFG_PHYPLLEN) +#ifdef CONFIG_DMA_COHERENT + | AMD_BIT(USBMSRMCFG_UCAM) +#endif + | AMD_BIT(USBMSRMCFG_RDCOMB) + | AMD_BIT(USBMSRMCFG_PFEN); + writel(tmp, USB_MSR_BASE + USB_MSR_MCFG); + } +#endif + /* one udc only */ + if (udc) { + WARN("already probed: %04x/%04x\n", UDC_PCI_VENID, UDC_PCI_DEVID); + return -EBUSY; + } + + /* init */ + dev = kmalloc (sizeof (struct udc), SLAB_KERNEL); + if (!dev) { + retval = -ENOMEM; + goto finished; + } + memset (dev, 0, sizeof(struct udc)); + + /* pci setup */ +#ifndef USE_AU1200_PCI_DUMMY + if (pci_enable_device (pdev) < 0) { + retval = -ENODEV; + goto finished; + } +#endif + dev->active = 1; + + /* PCI resource allocation */ + resource = pci_resource_start(pdev, 0); + len = pci_resource_len (pdev, 0); + + if (!request_mem_region (resource, len, name)) { + DBG( "pci device used already\n"); + retval = -EBUSY; + goto finished; + } + dev->mem_region = 1; + + dev->virt_addr = ioremap_nocache(resource, len); + if (dev->virt_addr == NULL) { + DBG( "start address cannot be mapped\n"); + retval = -EFAULT; + goto finished; + } + + if (!pdev->irq) { + ERR( "pdev->irq not set\n"); + retval = -ENODEV; + goto finished; + } + + snprintf (tmp, sizeof tmp, "%d", pdev->irq); + + if (request_irq (pdev->irq, udc_irq, SA_SHIRQ, name, dev) != 0) { + ERR( "error on request_irq() with %s\n", tmp); + retval = -EBUSY; + goto finished; + } + dev->irq_registered = 1; + + pci_set_drvdata (pdev, dev); + + /* chip revision */ + dev->chiprev = 0; + +#ifndef CONFIG_SOC_AU1200 + pci_set_master (pdev); +#ifdef HAVE_PCI_SET_MWI + pci_set_mwi (pdev); +#endif + /* chip rev for Hs AU1200 */ + pci_read_config_byte(pdev, PCI_REVISION_ID, (u8*) &dev->chiprev); +#else + /* chip rev for Au1200 */ + dev->chiprev = (u16) read_c0_prid() & 0xff; +#endif + /* init dma pools */ + if (use_dma) { + retval = init_dma_pools(dev); + if (retval != 0) + goto finished; + } + + dev->phys_addr = resource; + dev->irq = pdev->irq; + dev->pdev = pdev; + dev->gadget.dev.parent = &pdev->dev; + dev->gadget.dev.dma_mask = pdev->dev.dma_mask; + + /* general probing */ + if (udc_probe(dev) != 0) + goto finished; + return retval; + +finished: + if (dev) + udc_pci_remove (pdev); + return retval; +} +#endif + +/** + * general probe + * + * \param dev pointer to udc device struct + * \return 0 if success + */ +__init int udc_probe(struct udc* dev) +{ + char tmp[128]; + u32 reg; + int retval; + + /* mark timer as not initialized */ + udc_timer.data = 0; + udc_pollstall_timer.data = 0; + + /* device struct setup */ + spin_lock_init(&dev->lock); + spin_lock_init(&udc_irq_spinlock); + spin_lock_init(&udc_stall_spinlock); + dev->gadget.ops = &udc_ops; + + strcpy(dev->gadget.dev.bus_id, "gadget"); + dev->gadget.dev.release = gadget_release; + dev->gadget.name = name; + dev->gadget.is_dualspeed = 1; + + /* udc csr registers base */ + dev->csr = (struct udc_csrs*) (dev->virt_addr + UDC_CSR_ADDR); + /* dev registers base */ + dev->regs = (struct udc_regs *) (dev->virt_addr + UDC_DEVCFG_ADDR); + /* ep registers base */ + dev->ep_regs = (struct udc_ep_regs *) (dev->virt_addr + UDC_EPREGS_ADDR); + /* fifo's base */ + dev->rxfifo = (u32*) (dev->virt_addr + UDC_RXFIFO_ADDR); + dev->txfifo = (u32*) (dev->virt_addr + UDC_TXFIFO_ADDR); + + /* init registers, interrupts, ... */ +#ifndef UDC_IPBUG_3943_WORKAROUND + startup_registers(dev); +#else + { + u32 tmp; + + /* TODO put this to extra function, + * this all is extracted from usb_init() and + * udc_basic_init() but without register access */ + dev->gadget.ep0 = &dev->ep [UDC_EP0IN_IX].ep; + dev->ep [UDC_EP0IN_IX].halted = 0; + INIT_LIST_HEAD (&dev->gadget.ep0->ep_list); + dev->gadget.speed = USB_SPEED_HIGH; + make_ep_lists(dev); + /* basic endpoint init */ + for (tmp = 0; tmp < UDC_EP_NUM; tmp++) { + struct udc_ep *ep = &dev->ep[tmp]; + + ep->ep.name = ep_string[tmp]; + ep->dev = dev; + ep->num = tmp; + /* txfifo size is calculated at enable time */ + ep->txfifo = dev->txfifo; + + /* fifo size */ + if (tmp < UDC_EPIN_NUM) { + ep->fifo_depth = UDC_TXFIFO_SIZE; + ep->in = 1; + } + else { + ep->fifo_depth = UDC_RXFIFO_SIZE; + ep->in = 0; + + } + + ep->regs = &dev->ep_regs [tmp]; + if (!ep->desc) { + ep->desc = 0; + INIT_LIST_HEAD (&ep->queue); + + ep->ep.maxpacket = ~0; + ep->ep.ops = &udc_ep_ops; + } + if (use_dma) { + /* ep->dma is not really used, just to indicate that */ + /* DMA is active */ + /* dma regs = dev control regs */ + ep->dma = (u32*) &dev->regs->ctl; + } + } + dev->ep [UDC_EP0IN_IX].ep.maxpacket = UDC_EP0IN_MAX_PKT_SIZE; + dev->ep [UDC_EP0OUT_IX].ep.maxpacket = UDC_EP0OUT_MAX_PKT_SIZE; + } +#endif + + + INFO( "%s\n", mod_desc); + + snprintf (tmp, sizeof tmp, "%d", dev->irq); +#ifdef CONFIG_SOC_AU1200 + INFO( "irq %s, mem %08lx, chip rev %02x (Au1200 %s)\n", + tmp, dev->phys_addr, dev->chiprev, (dev->chiprev == 0) ? "AB" : "AC"); + strcpy(tmp, UDC_DRIVER_VERSION_STRING); +#ifdef CONFIG_DMA_COHERENT + /* coherent DMA not possible with AB silicon */ + if (dev->chiprev == UDC_AUAB_REV) { + ERR("Your chip revision is %s, it must be at least %s to use coherent DMA. \nPlease change DMA_COHERENT to DMA_NONCOHERENT in arch/mips/Kconfig and re-compile .\n", + "AB", "AC"); + retval = -ENODEV; + goto finished; + } +#endif + +#ifdef UDC_AUA1 + if (dev->chiprev < UDC_AUA1) { + ERR("Your chip revision is %s, it must be at least %s\n", + "AB", "AC"); + retval = -ENODEV; + goto finished; + } + INFO("driver version: %s (for Au1200 AC)\n", tmp); +#else + INFO("driver version: %s (for Au1200 AB)\n", tmp); +#endif +#ifdef CONFIG_DMA_COHERENT + INFO("Compiled for coherent memory.\n"); +#endif +#ifdef CONFIG_DMA_NONCOHERENT + INFO("Compiled for non-coherent memory.\n"); +#endif +#else + INFO("irq %s, pci mem %08lx, chip rev %02x (Geode5536 %s)\n", + tmp, dev->phys_addr, dev->chiprev, (dev->chiprev == UDC_HSA0_REV) ? "A0" : "B1"); + strcpy(tmp, UDC_DRIVER_VERSION_STRING); +#ifdef UDC_HSB1 + if (dev->chiprev == UDC_HSA0_REV) { + ERR("Your chip revision is %s, it must be at least %s\n", + "A0", "B1"); + retval = -ENODEV; + goto finished; + } + INFO("driver version: %s (for Geode5536 B1)\n", tmp); +#else + INFO("driver version: %s (for Geode5536 A0)\n", tmp); +#endif +#endif + udc = dev; + + device_register (&dev->gadget.dev); + /* device_create_file (&pdev->dev, &dev_attr_registers); */ + +#ifdef UDC_USE_TIMER + /* timer init */ + init_timer(&udc_timer); + udc_timer.function = udc_timer_function; + udc_timer.data = 1; + /* timer pollstall init */ + init_timer(&udc_pollstall_timer); + udc_pollstall_timer.function = udc_pollstall_timer_function; + udc_pollstall_timer.data = 1; +#endif + + /* set SD */ + reg = readl(&dev->regs->ctl); + reg |= AMD_BIT(UDC_DEVCTL_SD); + writel(reg, &dev->regs->ctl); + + /* print dev register info */ + print_regs(dev); + + return 0; + +finished: + return retval; +} + + +/** + * Initiates a remote wakeup + * + * \return 0 if success + */ +/* initiate remote wakeup */ +static int udc_remote_wakeup(struct udc* dev) +{ + u32 tmp; + + INFO("UDC initiates remote wakeup\n"); + + tmp = readl(&dev->regs->ctl); + tmp |= AMD_BIT(UDC_DEVCTL_RES); + writel(tmp, &dev->regs->ctl); + /* wait 1ms before clear resume bit */ + /* udelay(1000); */ + tmp &= AMD_CLEAR_BIT(UDC_DEVCTL_RES); + writel(tmp, &dev->regs->ctl); + + return 0; +} + +#if defined(CONFIG_SOC_AU1200) +/** + * Suspends UDC + * + * \return 0 if success + */ +static int udc_suspend(struct udc* dev) +{ + int retval = 0; + + INFO("UDC suspend\n"); +#ifdef CONFIG_SOC_AU1200 + u32 tmp; + /* mask interrupts */ + udc_mask_unused_interrupts(dev); + + if (dev->driver && dev->driver->disconnect) { + /* call gadget to reset context */ + if (spin_is_locked(&dev->lock)) { + spin_unlock(&dev->lock); + dev->driver->disconnect (&dev->gadget); + spin_lock(&dev->lock); + } + else + dev->driver->disconnect (&dev->gadget); + + /* disable ep0 to empty req queue */ + empty_req_queue (&dev->ep [UDC_EP0IN_IX]); + ep_init (dev->regs, + &dev->ep [UDC_EP0IN_IX]); + + /* init controller by soft reset */ + udc_soft_reset(dev); + + } + if (dev->otg_driver && dev->otg_transceiver + && dev->otg_transceiver->set_peripheral) { + /* if UDC is supended by Host or already disconnected then + don't force disconnect by unbind() */ + if (dev->otg_driver->query) { + if (!(dev->otg_driver->query(0) & OTG_FLAGS_UDC_SUSP)) { + /* unbind from otg driver -> host disconnect */ + dev->otg_transceiver->set_peripheral(dev->otg_transceiver, NULL); + dev->connected = 0; + } + } + else + { + /* unbind from otg driver -> host disconnect */ + dev->otg_transceiver->set_peripheral (dev->otg_transceiver, NULL); + dev->connected = 0; + } + } + + dev->sys_suspended = 1; + + /* switch off UDC clock */ + tmp = readl((u32*) (USB_MSR_BASE + USB_MSR_MCFG)); + tmp &= AMD_CLEAR_BIT(USBMSRMCFG_UDCCLKEN); + writel(tmp, USB_MSR_BASE + USB_MSR_MCFG); + +#endif + + return retval; +} + +/** + * Resumes UDC + * + * \return 0 if success + */ +static int udc_resume(struct udc* dev) +{ + int retval = 0; + + INFO("UDC resume\n"); +#ifdef CONFIG_SOC_AU1200 + u32 tmp; + /* switch on UDC clock */ + tmp = readl((u32*) (USB_MSR_BASE + USB_MSR_MCFG)); + tmp |= AMD_BIT(USBMSRMCFG_UDCCLKEN); + writel(tmp, USB_MSR_BASE + USB_MSR_MCFG); + + dev->sys_suspended = 0; + + usb_connect(dev); + if (dev->otg_transceiver && dev->otg_transceiver->set_peripheral) { + /* bind to otg driver */ + dev->otg_transceiver->set_peripheral(dev->otg_transceiver, &dev->gadget); + } + +#endif + + return retval; +} + +static int udc_au1xxx_drv_probe(struct device *dev) +{ + int retval; + + DBG("udc_au1xxx_drv_probe()\n"); + retval = udc_drv_probe(dev); + return retval; +} + +static int udc_au1xxx_drv_remove(struct device *dev) +{ + DBG("udc_au1xxx_drv_remove()\n"); + udc_drv_remove(dev); + return 0; +} + +static int udc_au1xxx_drv_suspend(struct device *dev, pm_message_t state) +{ + struct udc *udc_dev = dev_get_drvdata(dev); + return udc_suspend(udc_dev); +} + +static int udc_au1xxx_drv_resume(struct device *dev) +{ + struct udc *udc_dev = dev_get_drvdata(dev); + return udc_resume(udc_dev); +} + +static struct device_driver udc_au1xxx_driver = { + .name = "au1xxx-udc", + .bus = &platform_bus_type, + .probe = udc_au1xxx_drv_probe, + .remove = udc_au1xxx_drv_remove, + .suspend = udc_au1xxx_drv_suspend, + .resume = udc_au1xxx_drv_resume, +}; +#endif + + +/** + * Inits driver + * + * \return 0 if success + */ +static int __init init(void) +{ + int rc; + +#ifdef UDC_DEBUG + /* register char device */ + rc = register_chrdev(UDC_MAJOR_NUM, UDC_DEVICE_NAME, &udc_fops); + if (rc < 0) + { + printk("Error registering udc char device"); + } +#endif + +#ifdef CONFIG_SOC_AU1200 + /* probe by device system */ + rc = driver_register(&udc_au1xxx_driver); +#else + /* probe by PCI bus driver */ + rc = pci_module_init (&udc_pci_driver); +#endif + + return rc; +} +module_init (init); + +/** + * Cleans driver + */ +static void __exit cleanup(void) +{ +#ifdef UDC_DEBUG + /* unregister char device */ + unregister_chrdev(UDC_MAJOR_NUM, UDC_DEVICE_NAME); +#endif + +#ifdef CONFIG_SOC_AU1200 + /* unregister at device system */ + driver_unregister(&udc_au1xxx_driver); +#else + /* unregister at PCI bus driver */ + pci_unregister_driver (&udc_pci_driver); +#endif + +} +module_exit (cleanup); + diff --git a/drivers/usb/gadget/au1200udc.h b/drivers/usb/gadget/au1200udc.h new file mode 100644 index 0000000..d7d8491 --- /dev/null +++ b/drivers/usb/gadget/au1200udc.h @@ -0,0 +1,936 @@ +/* + * Header for driver for AMD Au1200 UDC high/full speed USB device controller + */ + +/* + * Copyright (C) 2005 AMD (http://www.amd.com) + * Author: Thomas Dahlmann + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef AU1200UDC_H +#define AU1200UDC_H + +/***************************************************************************** +* Constants +*****************************************************************************/ + +/* Driver constants -------------------------------------------------------*/ +#define DRIVER_NAME_FOR_PRINT "au1200udc" + +/* PCI constants -----------------------------------------------------------*/ +#define UDC_PCI_VENID 0x1022 +#define UDC_PCI_DEVID 0x2096 +#define UDC_PCI_CLASS ((PCI_CLASS_SERIAL_USB << 8) | 0xfe) +#define UDC_PCI_CLASS_MASK 0xffffffff + +/* Platform specific -------------------------------------------------------*/ +#if defined(CONFIG_SOC_AU1200) +#define UDC_PCIPOOL_ALIGN 32 +#define UDC_PCIPOOL_CROSS 4096 +#define UDC_PCIPOOL_GFP_STP (GFP_ATOMIC | GFP_DMA) +#else +#define UDC_PCIPOOL_ALIGN 0 +#define UDC_PCIPOOL_CROSS 0 +#define UDC_PCIPOOL_GFP_STP (GFP_KERNEL) +#endif + +/* temp define for AU1200, will live in au1000.h normally */ +#ifndef USB_UDC_BASE +#define USB_UDC_BASE 0x14022000 +#define USB_UDC_LEN 0x2000 +#define USB_MSR_BASE 0xB4020000 +#define USB_MSR_MCFG 4 +#define USBMSRMCFG_DMEMEN 4 +#define USBMSRMCFG_DBMEN 5 +#define USBMSRMCFG_UDCCLKEN 18 +#define USBMSRMCFG_PHYPLLEN 19 +#define USBMSRMCFG_RDCOMB 30 +#define USBMSRMCFG_PFEN 31 +#define AU1200_USB_INT 29 +#endif +#ifndef USBMSRMCFG_UCAM +#define USBMSRMCFG_UCAM 7 +#endif +#define USBMSRMCFG_DEFAULT 0x00d02000 + +/* other constants */ +#define UDC_RDE_TIMER_SECONDS 1 +#define UDC_RDE_TIMER_DIV 10 +#define UDC_POLLSTALL_TIMER_USECONDS 500 + +/* Special optimization for certain gadgets ------------------------------- */ +/* use hardware NAK if IN queue empty, this can be used to +* avoid interrupt flood as for the ethernet gadget where host side +* sends IN tokens permamently */ +#define UDC_DISABLE_IRQ_IF_EMPTY_IN_QUEUE +/*#undef UDC_DISABLE_IRQ_IF_EMPTY_IN_QUEUE*/ + +/* IP core defect/bug/case workarounds ---------------------------------------- */ +/* Hs AU1200 A0 workarounds */ +/* Description: "Last descriptor loop */ +#define UDC_IPDEFECT_9000004946_WORKAROUND +/* Description: "DMA machine not restartable" */ +#define UDC_IPCASE_8000018724_WORKAROUND +/* Description: "UDC not accessible when phy is suspended */ +#define UDC_IPBUG_3943_WORKAROUND +/* Description: "USB device needs session-valid status information */ +#define UDC_IPBUG_3950_WORKAROUND +/* Description: "Clearing endpoint NAK bits not possible if RxFIFO + not empty (PCS#1503) */ +#define UDC_IPBUG_3958_WORKAROUND +/* UDC data errors during loop test (DMA) + - found only with Au1200 but used for Hs too, bug entry + is in Au1200 bugzilla + - the workaround applies only for small packets */ +#define UDC_IPBUG_2253_WORKAROUND +#define UDC_SMALL_PACKET 32 + +/* Disable workarounds which don't apply to Hs AU1200 B1/ Au1200 A1 */ +/* And enable new features */ + +/* Hs AU1200 A0 flag */ +/* #define UDC_HSA0 */ +/* Hs AU1200 B1 flag */ +#define UDC_HSB1 + +/* Hs AU1200 chip rev. */ +#define UDC_HSA0_REV 1 +#define UDC_HSB1_REV 2 + +/* consistency */ +#ifdef UDC_HSB1 +#undef UDC_HSA0 +#endif + +/* Au1200 rev. */ +#if defined(CONFIG_SOC_AU1200) +#undef UDC_HSB1 +#undef UDC_HSA0 +/* revision value */ +#define UDC_AUAB_REV 0 +#define UDC_AUAC_REV 1 +#define UDC_AUA0 0 +/* Au1200 AC flag */ +/* #define UDC_AUA1 1 */ +#endif + +/* disable workarounds for newer chip revisions */ +#ifdef UDC_HSB1 +#undef UDC_IPBUG_3943_WORKAROUND +#undef UDC_IPBUG_3950_WORKAROUND +#define UDC_DMARST_AVAIL +#endif +#ifdef UDC_AUA1 +#undef UDC_IPBUG_3943_WORKAROUND +#endif + +/* SETUP usb commands +* needed, because some SETUP's are handled in hw, but must be passed to +* gadget driver above -----------------------------------------------------*/ +/* SET_CONFIG */ +#define UDC_SETCONFIG_DWORD0 0x00000900 +#define UDC_SETCONFIG_DWORD0_VALUE_MASK 0xffff0000 +#define UDC_SETCONFIG_DWORD0_VALUE_OFS 16 + +#define UDC_SETCONFIG_DWORD1 0x00000000 + +/* SET_INTERFACE */ +#define UDC_SETINTF_DWORD0 0x00000b00 +#define UDC_SETINTF_DWORD0_ALT_MASK 0xffff0000 +#define UDC_SETINTF_DWORD0_ALT_OFS 16 + +#define UDC_SETINTF_DWORD1 0x00000000 +#define UDC_SETINTF_DWORD1_INTF_MASK 0x0000ffff +#define UDC_SETINTF_DWORD1_INTF_OFS 0 + +/* Mass storage reset */ +#define UDC_MSCRES_DWORD0 0x0000ff21 +#define UDC_MSCRES_DWORD1 0x00000000 + +/* Global CSR's -------------------------------------------------------------*/ +/* UDC CSR's */ +#define UDC_CSR_ADDR 0x500 + +/* EP NE bits */ +/* EP number */ +#define UDC_CSR_NE_NUM_MASK 0x0000000f +#define UDC_CSR_NE_NUM_OFS 0 +/* EP direction */ +#define UDC_CSR_NE_DIR_MASK 0x00000010 +#define UDC_CSR_NE_DIR_OFS 4 +/* EP type */ +#define UDC_CSR_NE_TYPE_MASK 0x00000060 +#define UDC_CSR_NE_TYPE_OFS 5 +/* EP config number */ +#define UDC_CSR_NE_CFG_MASK 0x00000780 +#define UDC_CSR_NE_CFG_OFS 7 +/* EP interface number */ +#define UDC_CSR_NE_INTF_MASK 0x00007800 +#define UDC_CSR_NE_INTF_OFS 11 +/* EP alt setting */ +#define UDC_CSR_NE_ALT_MASK 0x00078000 +#define UDC_CSR_NE_ALT_OFS 15 + +/* max pkt */ +#define UDC_CSR_NE_MAX_PKT_MASK 0x3ff80000 +#define UDC_CSR_NE_MAX_PKT_OFS 19 + +/* Device Config Register ---------------------------------------------------*/ +#define UDC_DEVCFG_ADDR 0x400 + +#define UDC_DEVCFG_SOFTRESET 31 +#define UDC_DEVCFG_HNPSFEN 30 +#define UDC_DEVCFG_DMARST 29 +#define UDC_DEVCFG_SET_DESC 18 +#define UDC_DEVCFG_CSR_PRG 17 +#define UDC_DEVCFG_STATUS 7 +#define UDC_DEVCFG_DIR 6 +#define UDC_DEVCFG_PI 5 +#define UDC_DEVCFG_SS 4 +#define UDC_DEVCFG_SP 3 +#define UDC_DEVCFG_RWKP 2 + +#define UDC_DEVCFG_SPD_MASK 0x3 +#define UDC_DEVCFG_SPD_OFS 0 +#define UDC_DEVCFG_SPD_HS 0x0 +#define UDC_DEVCFG_SPD_FS 0x1 +#define UDC_DEVCFG_SPD_LS 0x2 +/*#define UDC_DEVCFG_SPD_FS 0x3*/ + + +/* Device Control Register --------------------------------------------------*/ +#define UDC_DEVCTL_ADDR 0x404 + +#define UDC_DEVCTL_THLEN_MASK 0xff000000 +#define UDC_DEVCTL_THLEN_OFS 24 + +#define UDC_DEVCTL_BRLEN_MASK 0x00ff0000 +#define UDC_DEVCTL_BRLEN_OFS 16 + +#define UDC_DEVCTL_CSR_DONE 13 +#define UDC_DEVCTL_DEVNAK 12 +#define UDC_DEVCTL_SD 10 +#define UDC_DEVCTL_MODE 9 +#define UDC_DEVCTL_BREN 8 +#define UDC_DEVCTL_THE 7 +#define UDC_DEVCTL_BF 6 +#define UDC_DEVCTL_BE 5 +#define UDC_DEVCTL_DU 4 +#define UDC_DEVCTL_TDE 3 +#define UDC_DEVCTL_RDE 2 +#define UDC_DEVCTL_RES 0 + + +/* Device Status Register ---------------------------------------------------*/ +#define UDC_DEVSTS_ADDR 0x408 + +#define UDC_DEVSTS_TS_MASK 0xfffc0000 +#define UDC_DEVSTS_TS_OFS 18 + +#define UDC_DEVSTS_SESSVLD 17 +#define UDC_DEVSTS_PHY_ERROR 16 +#define UDC_DEVSTS_RXFIFO_EMPTY 15 + +#define UDC_DEVSTS_ENUM_SPEED_MASK 0x00006000 +#define UDC_DEVSTS_ENUM_SPEED_OFS 13 +#define UDC_DEVSTS_ENUM_SPEED_FULL 1 +#define UDC_DEVSTS_ENUM_SPEED_HIGH 0 + +#define UDC_DEVSTS_SUSP 12 + +#define UDC_DEVSTS_ALT_MASK 0x00000f00 +#define UDC_DEVSTS_ALT_OFS 8 + +#define UDC_DEVSTS_INTF_MASK 0x000000f0 +#define UDC_DEVSTS_INTF_OFS 4 + +#define UDC_DEVSTS_CFG_MASK 0x0000000f +#define UDC_DEVSTS_CFG_OFS 0 + + +/* Device Interrupt Register ------------------------------------------------*/ +#define UDC_DEVINT_ADDR 0x40c + +#define UDC_DEVINT_SVC 7 +#define UDC_DEVINT_ENUM 6 +#define UDC_DEVINT_SOF 5 +#define UDC_DEVINT_US 4 +#define UDC_DEVINT_UR 3 +#define UDC_DEVINT_ES 2 +#define UDC_DEVINT_SI 1 +#define UDC_DEVINT_SC 0 + +/* Device Interrupt Mask Register -------------------------------------------*/ +#define UDC_DEVINT_MSK_ADDR 0x410 + +#define UDC_DEVINT_MSK 0x7f + +/* Endpoint Interrupt Register ----------------------------------------------*/ +#define UDC_EPINT_ADDR 0x414 + +#define UDC_EPINT_OUT_MASK 0xffff0000 +#define UDC_EPINT_OUT_OFS 16 +#define UDC_EPINT_IN_MASK 0x0000ffff +#define UDC_EPINT_IN_OFS 0 + +#define UDC_EPINT_IN_EP0 0 +#define UDC_EPINT_IN_EP1 1 +#define UDC_EPINT_IN_EP2 2 +#define UDC_EPINT_IN_EP3 3 +#define UDC_EPINT_OUT_EP0 16 +#define UDC_EPINT_OUT_EP1 17 +#define UDC_EPINT_OUT_EP2 18 +#define UDC_EPINT_OUT_EP3 19 + +#define UDC_EPINT_EP0_ENABLE_MSK 0x001e001e + +/* Endpoint Interrupt Mask Register -----------------------------------------*/ +#define UDC_EPINT_MSK_ADDR 0x418 + +#define UDC_EPINT_OUT_MSK_MASK 0xffff0000 +#define UDC_EPINT_OUT_MSK_OFS 16 +#define UDC_EPINT_IN_MSK_MASK 0x0000ffff +#define UDC_EPINT_IN_MSK_OFS 0 + +#define UDC_EPINT_MSK_DISABLE_ALL 0xffffffff +/* mask non-EP0 endpoints */ +#define UDC_EPDATAINT_MSK_DISABLE 0xfffefffe +/* mask all dev interrupts */ +#define UDC_DEV_MSK_DISABLE 0x7f + +/* Endpoint-specific CSR's --------------------------------------------------*/ +/* Endpoint Control Registers -----------------------------------------------*/ +#define UDC_EPREGS_ADDR 0x0 +#define UDC_EPIN_REGS_ADDR 0x0 +#define UDC_EPOUT_REGS_ADDR 0x200 + +#define UDC_EPCTL_ADDR 0x0 + +#define UDC_EPCTL_RRDY 9 +#define UDC_EPCTL_CNAK 8 +#define UDC_EPCTL_SNAK 7 +#define UDC_EPCTL_NAK 6 + +#define UDC_EPCTL_ET_MASK 0x00000030 +#define UDC_EPCTL_ET_OFS 4 +#define UDC_EPCTL_ET_CONTROL 0 +#define UDC_EPCTL_ET_ISO 1 +#define UDC_EPCTL_ET_BULK 2 +#define UDC_EPCTL_ET_INTERRUPT 3 + +#define UDC_EPCTL_P 3 +#define UDC_EPCTL_SN 2 +#define UDC_EPCTL_F 1 +#define UDC_EPCTL_S 0 + +/* Endpoint Status Registers ------------------------------------------------*/ +#define UDC_EPSTS_ADDR 0x4 + +#define UDC_EPSTS_RX_PKT_SIZE_MASK 0x007ff800 +#define UDC_EPSTS_RX_PKT_SIZE_OFS 11 + +#define UDC_EPSTS_TDC 10 +#define UDC_EPSTS_HE 9 +#define UDC_EPSTS_BNA 7 +#define UDC_EPSTS_IN 6 + +#define UDC_EPSTS_OUT_MASK 0x00000030 +#define UDC_EPSTS_OUT_OFS 4 +#define UDC_EPSTS_OUT_DATA 1 +#define UDC_EPSTS_OUT_DATA_CLEAR 0x10 +#define UDC_EPSTS_OUT_SETUP 2 +#define UDC_EPSTS_OUT_SETUP_CLEAR 0x20 + +/* Endpoint Buffer Size IN/ Receive Packet Frame Number OUT Registers ------*/ +#define UDC_EPIN_BUFF_SIZE_ADDR 0x8 +#define UDC_EPOUT_FRAME_NUMBER_ADDR 0x8 + +#define UDC_EPIN_BUFF_SIZE_MASK 0x0000ffff +#define UDC_EPIN_BUFF_SIZE_OFS 0 +/* EP0in txfifo = 128 bytes*/ +#define UDC_EPIN0_BUFF_SIZE 32 +/* EP0in fullspeed txfifo = 128 bytes*/ +#define UDC_FS_EPIN0_BUFF_SIZE 32 + +/* fifo size mult = fifo size / max packet */ +#define UDC_EPIN_BUFF_SIZE_MULT 2 + +/* EPin data fifo size = 1024 bytes DOUBLE BUFFERING */ +#define UDC_EPIN_BUFF_SIZE 256 +/* EPin small INT data fifo size = 128 bytes */ +#define UDC_EPIN_SMALLINT_BUFF_SIZE 32 + +/* EPin fullspeed data fifo size = 128 bytes DOUBLE BUFFERING */ +#define UDC_FS_EPIN_BUFF_SIZE 32 + +#define UDC_EPOUT_FRAME_NUMBER_MASK 0x0000ffff +#define UDC_EPOUT_FRAME_NUMBER_OFS 0 + +/* Endpoint Buffer Size OUT/Max Packet Size Registers -----------------------*/ +#define UDC_EPOUT_BUFF_SIZE_ADDR 0x0c +#define UDC_EP_MAX_PKT_SIZE_ADDR 0x0c + +#define UDC_EPOUT_BUFF_SIZE_MASK 0xffff0000 +#define UDC_EPOUT_BUFF_SIZE_OFS 16 +#define UDC_EP_MAX_PKT_SIZE_MASK 0x0000ffff +#define UDC_EP_MAX_PKT_SIZE_OFS 0 +/* EP0in max packet size = 64 bytes */ +#define UDC_EP0IN_MAX_PKT_SIZE 64 +/* EP0out max packet size = 64 bytes */ +#define UDC_EP0OUT_MAX_PKT_SIZE 64 +/* EP0in fullspeed max packet size = 64 bytes */ +#define UDC_FS_EP0IN_MAX_PKT_SIZE 64 +/* EP0out fullspeed max packet size = 64 bytes */ +#define UDC_FS_EP0OUT_MAX_PKT_SIZE 64 + +/* Endpoint dma descriptors ------------------------------------------------*/ +/* Setup data */ +/* Status dword */ +#define UDC_DMA_STP_STS_CFG_MASK 0x0fff0000 +#define UDC_DMA_STP_STS_CFG_OFS 16 +#define UDC_DMA_STP_STS_CFG_ALT_MASK 0x000f0000 +#define UDC_DMA_STP_STS_CFG_ALT_OFS 16 +#define UDC_DMA_STP_STS_CFG_INTF_MASK 0x00f00000 +#define UDC_DMA_STP_STS_CFG_INTF_OFS 20 +#define UDC_DMA_STP_STS_CFG_NUM_MASK 0x0f000000 +#define UDC_DMA_STP_STS_CFG_NUM_OFS 24 +#define UDC_DMA_STP_STS_RX_MASK 0x30000000 +#define UDC_DMA_STP_STS_RX_OFS 28 +#define UDC_DMA_STP_STS_BS_MASK 0xc0000000 +#define UDC_DMA_STP_STS_BS_OFS 30 +#define UDC_DMA_STP_STS_BS_HOST_READY 0 +#define UDC_DMA_STP_STS_BS_DMA_BUSY 1 +#define UDC_DMA_STP_STS_BS_DMA_DONE 2 +#define UDC_DMA_STP_STS_BS_HOST_BUSY 3 +/* IN data */ +/* Status dword */ +#define UDC_DMA_IN_STS_TXBYTES_MASK 0x0000ffff +#define UDC_DMA_IN_STS_TXBYTES_OFS 0 +#define UDC_DMA_IN_STS_FRAMENUM_MASK 0x07ff0000 +#define UDC_DMA_IN_STS_FRAMENUM_OFS 0 +#define UDC_DMA_IN_STS_L 27 +#define UDC_DMA_IN_STS_TX_MASK 0x30000000 +#define UDC_DMA_IN_STS_TX_OFS 28 +#define UDC_DMA_IN_STS_BS_MASK 0xc0000000 +#define UDC_DMA_IN_STS_BS_OFS 30 +#define UDC_DMA_IN_STS_BS_HOST_READY 0 +#define UDC_DMA_IN_STS_BS_DMA_BUSY 1 +#define UDC_DMA_IN_STS_BS_DMA_DONE 2 +#define UDC_DMA_IN_STS_BS_HOST_BUSY 3 +/* OUT data */ +/* Status dword */ +#define UDC_DMA_OUT_STS_RXBYTES_MASK 0x0000ffff +#define UDC_DMA_OUT_STS_RXBYTES_OFS 0 +#define UDC_DMA_OUT_STS_FRAMENUM_MASK 0x07ff0000 +#define UDC_DMA_OUT_STS_FRAMENUM_OFS 0 +#define UDC_DMA_OUT_STS_L 27 +#define UDC_DMA_OUT_STS_RX_MASK 0x30000000 +#define UDC_DMA_OUT_STS_RX_OFS 28 +#define UDC_DMA_OUT_STS_BS_MASK 0xc0000000 +#define UDC_DMA_OUT_STS_BS_OFS 30 +#define UDC_DMA_OUT_STS_BS_HOST_READY 0 +#define UDC_DMA_OUT_STS_BS_DMA_BUSY 1 +#define UDC_DMA_OUT_STS_BS_DMA_DONE 2 +#define UDC_DMA_OUT_STS_BS_HOST_BUSY 3 +/* other constants */ +/* max ep0in packet */ +#define UDC_EP0IN_MAXPACKET 1000 +/* max dma packet */ +#define UDC_DMA_MAXPACKET 65536 +/* DMA buffer len for temp request, should be the same as the upper +layer gadget is using */ +#define UDC_DMA_TEMP_BUFFER_LEN 4096 +/* un-usable DMA address */ +#define DMA_DONT_USE (~(dma_addr_t) 0 ) + +/* other Endpoint register addresses and values-----------------------------*/ +#define UDC_EP_SUBPTR_ADDR 0x10 +#define UDC_EP_DESPTR_ADDR 0x14 +#define UDC_EP_WRITE_CONFIRM_ADDR 0x1c + +/* EP number as layouted in AHB space */ +#define UDC_EP_NUM 32 +#define UDC_EPIN_NUM 16 +#define UDC_EPIN_NUM_USED 5 +#define UDC_EPOUT_NUM 16 +/* EP number of EP's really used = EP0 + 8 data EP's */ +#define UDC_USED_EP_NUM 9 +/* UDC CSR regs are aligned but AHB regs not - offset for OUT EP's */ +#define UDC_CSR_EP_OUT_IX_OFS 12 + +#define UDC_EP0OUT_IX 16 +#define UDC_EP0IN_IX 0 + +/* max packet */ +#define UDC_HS_BULK_MAXPKT 512 + +/* Rx fifo address and size = 1k -------------------------------------------*/ +#define UDC_RXFIFO_ADDR 0x800 +#define UDC_RXFIFO_SIZE 0x400 + +/* Tx fifo address and size = 1.5k -----------------------------------------*/ +#define UDC_TXFIFO_ADDR 0xc00 +#define UDC_TXFIFO_SIZE 0x600 + +/* default data endpoints --------------------------------------------------*/ +#define UDC_EPIN_STATUS_IX 1 +#define UDC_EPIN_IX 2 +#define UDC_EPOUT_IX 18 + +/* general constants -------------------------------------------------------*/ +#define UDC_DWORD_BYTES 4 +#define UDC_BITS_PER_BYTE_SHIFT 3 +#define UDC_BYTE_MASK 0xff +#define UDC_BITS_PER_BYTE 8 + +/* char device constants ---------------------------------------------------*/ +/* names */ +#ifdef UDC_DEBUG +#ifdef UDC_DRIVER_NAME +#define UDC_DEVICE_NAME UDC_DRIVER_NAME +#else +#define UDC_DEVICE_NAME "au1200udc" +#endif +#define UDC_DEVICE_FILE_NAME "au1200udc_dev" +#define UDC_DEVICE_FILE_INODE "/dev/au1200udc_dev" +/* major number */ +#define UDC_MAJOR_NUM 240 +#endif + +#ifdef __KERNEL__ +/* kernel wrappers */ +#define device_create_file(x,y) do {} while (0) +#define device_remove_file device_create_file + +#ifndef WARN_ON +#define WARN_ON(a) do {} while (0) +#endif + +#ifndef BUG_ON +#define BUG_ON(cond)do {if (unlikely((cond) != 0)) BUG();} while(0) +#endif + +#ifndef likely +#define likely(a) (a) +#define unlikely(a) (a) +#endif + +#ifndef container_of +#define container_of list_entry +#endif + +#ifndef IRQ_NONE +typedef void irqreturn_t; +#define IRQ_HANDLED +#define IRQ_NONE +#define IRQ_RETVAL(a) +#endif +#endif + +/* MIPS specific -----------------------------------------------------------*/ +#if defined(CONFIG_SOC_AU1200) +/* sync does it without refilling the pipe, + so read after write can bypass write */ +#define au1200_sync_delay() {\ + asm(".set noreorder"); \ + asm("b l1");\ + asm("l1:");\ + asm("sync");\ + asm("nop");\ + asm("nop");\ + asm("nop");\ + asm("nop");\ + asm("b l2");\ + asm("l2:");\ + asm("nop");\ + asm("nop");\ + asm(".set reorder");\ +} + +/* #define wb_flush() au1200_sync() */ +#define wb_flush() __asm__ volatile ("sync") + +/* special write functions for MIPS (with write buffer flush) */ +#undef writel +#undef writeb +#define writel(d,a) {((*(volatile unsigned int *)(a))=(d));wb_flush();} +#define writeb(d,a) {((*(volatile unsigned char *)(a))=(d));wb_flush();} +#else +#define wb_flush() {} +#endif + +/***************************************************************************** +* Includes +*****************************************************************************/ + +#if !defined(UDC_HSB1) +#include "au1200otg.h" +#endif + +/***************************************************************************** +* Types +*****************************************************************************/ + +/* UDC CSR's */ +struct udc_csrs { + + /* sca - setup command address */ + u32 sca; + + /* ep ne's */ + u32 ne[UDC_USED_EP_NUM]; +} __attribute__ ((packed)); + +/* AHB subsystem CSR registers */ +struct udc_regs { + + /* device configuration */ + u32 cfg; + + /* device control */ + u32 ctl; + + /* device status */ + u32 sts; + + /* device interrupt */ + u32 irqsts; + + /* device interrupt mask */ + u32 irqmsk; + + /* endpoint interrupt */ + u32 ep_irqsts; + + /* endpoint interrupt mask */ + u32 ep_irqmsk; +} __attribute__ ((packed)); + +/* endpoint specific registers */ +struct udc_ep_regs { + + /* endpoint control */ + u32 ctl; + + /* endpoint status */ + u32 sts; + + /* endpoint buffer size in/ receive packet frame number out */ + u32 bufin_framenum; + + /* endpoint buffer size out/max packet size */ + u32 bufout_maxpkt; + + /* endpoint setup buffer pointer */ + u32 subptr; + + /* endpoint data descriptor pointer */ + u32 desptr; + + /* reserverd */ + u32 reserved; + + /* write/read confirmation */ + u32 confirm; + +} __attribute__ ((packed)); + +#ifdef __KERNEL__ +/* control data DMA desc */ +struct udc_stp_dma { + /* status quadlet */ + u32 status; + /* reserved */ + u32 _reserved; + /* first setup word */ + u32 data12; + /* second setup word */ + u32 data34; +} __attribute__ ((aligned (16))); + +/* normal data DMA desc */ +struct udc_data_dma { + /* status quadlet */ + u32 status; + /* reserved */ + u32 _reserved; + /* buffer pointer */ + u32 bufptr; + /* next descriptor pointer */ + u32 next; +} __attribute__ ((aligned (16))); + +/* request packet */ +struct udc_request { + /* embedded gadget ep */ + struct usb_request req; + + /* flags */ + unsigned dma_going : 1, + dma_mapping : 1, + dma_done : 1; + /* phys. address */ + dma_addr_t td_phys; + /* first dma desc. of chain */ + struct udc_data_dma *td_data; + /* last dma desc. of chain */ + struct udc_data_dma *td_data_last; +#ifdef UDC_IPDEFECT_9000004946_WORKAROUND + /* next pointer of broken chain */ + dma_addr_t td_data_last_next; +#endif + + struct list_head queue; + + /* chain length */ + unsigned chain_len; + +}; + +/* UDC specific endpoint parameters */ +struct udc_ep { + struct usb_ep ep; + struct udc_ep_regs *regs; + u32 *txfifo; + u32* dma; + dma_addr_t td_phys; + dma_addr_t td_stp_dma; + struct udc_stp_dma *td_stp; + struct udc_data_dma *td; + /* temp request */ + struct udc_request *req; + unsigned req_used; + unsigned req_completed; + /* NAK state */ + unsigned naking; + + struct udc *dev; + + /* queue for requests */ + struct list_head queue; + const struct usb_endpoint_descriptor *desc; + unsigned halted; + unsigned num : 5, + fifo_depth : 14, + in : 1; +}; + +/* device struct */ +struct udc { + struct usb_gadget gadget; + spinlock_t lock; + /* all endpoints */ + struct udc_ep ep[UDC_EP_NUM]; + struct usb_gadget_driver *driver; + struct otg_transceiver *otg_transceiver; +#if !defined(UDC_HSB1) + struct usb_otg_gadget_extension *otg_driver; +#endif + /* operational flags */ + unsigned active : 1, + stall_ep0in : 1, + waiting_zlp_ack_ep0in : 1, + set_cfg_not_acked : 1, + irq_registered : 1, + otg_supported : 1, + data_ep_enabled : 1, + data_ep_queued : 1, + mem_region : 1, + selfpowered : 1, + sys_suspended : 1, + connected; + + u16 chiprev; + + /* registers */ +#if defined(CONFIG_SOC_AU1200) && !defined(USE_AU1200_PCI_DUMMY) + struct device *pdev; +#else + struct pci_dev *pdev; +#endif + struct udc_csrs *csr; + struct udc_regs *regs; + struct udc_ep_regs *ep_regs; + u32* rxfifo; + u32* txfifo; + + /* DMA desc pools */ +#if defined(CONFIG_SOC_AU1200) + struct dma_pool *data_requests; + struct dma_pool *stp_requests; +#else + struct pci_pool *data_requests; + struct pci_pool *stp_requests; +#endif + + /* device data */ + unsigned long phys_addr; + void* virt_addr; + unsigned irq; + + /* states */ + u16 cur_config; + u16 cur_intf; + u16 cur_alt; +}; + +/* setup request data */ +union udc_setup_data { + u32 data[2]; + struct usb_ctrlrequest request; +}; +#endif /*__KERNEL__*/ + +/***************************************************************************** +* Macros +*****************************************************************************/ + +/*************************************** +* SET and GET bitfields in u32 values +* via constants for mask/offset: +* is the text between +* UDC_ and _MASK|_OFS of appropiate +* constant +****************************************/ +/* set bitfield value in u32 u32Val */ +#define AMD_ADDBITS(u32Val, bitfield_val, bitfield_stub_name)\ + (((u32Val) & (((u32) ~((u32) bitfield_stub_name##_MASK))))\ + |(((bitfield_val) << ((u32) bitfield_stub_name##_OFS))\ + & ((u32) bitfield_stub_name##_MASK))) + +/* set bitfield value in zero-initialized u32 u32Val */ +/* => bitfield bits in u32Val are all zero */ +#define AMD_INIT_SETBITS(u32Val, bitfield_val, bitfield_stub_name)\ + ((u32Val)\ + |(((bitfield_val) << ((u32) bitfield_stub_name##_OFS))\ + &((u32) bitfield_stub_name##_MASK))) + +/* get bitfield value from u32 u32Val */ +#define AMD_GETBITS(u32Val, bitfield_stub_name)\ + ((u32Val & ((u32) bitfield_stub_name##_MASK))\ + >> ((u32) bitfield_stub_name##_OFS)) + +/* SET and GET bits in u32 values ------------------------------------------*/ +#define AMD_BIT(bit_stub_name) (1 << bit_stub_name) +#define AMD_UNMASK_BIT(bit_stub_name) (~AMD_BIT(bit_stub_name)) +#define AMD_CLEAR_BIT(bit_stub_name) (~AMD_BIT(bit_stub_name)) + +/* misc --------------------------------------------------------------------*/ +#define DIR_STRING(bAddress) (((bAddress) & USB_DIR_IN) ? "in" : "out") + +/* UDC specific macros -----------------------------------------------------*/ +#ifdef UDC_DMARST_AVAIL +#define UDC_DMARST(tmp, dev) \ + DBG("DMA machine reset\n"); \ + tmp = readl(&dev->regs->cfg); \ + writel(tmp | AMD_BIT(UDC_DEVCFG_DMARST), &dev->regs->cfg); \ + writel(tmp, &dev->regs->cfg); +#else +#define UDC_DMARST(tmp, dev) {} +#endif + +/* print macros ------------------------------------------------------------*/ + +#ifdef UDC_VERBOSE +#ifndef UDC_DEBUG +#define UDC_DEBUG +#endif +#endif + +/** + * \brief + * Macro for printing information in drivers + * + * This macro is used for printing kernel messages in driver source code. + * It should be used for printing useful information about states and called + * functions for normal operation (not for errors and warnings). + * + * \param fmt is format string for printk + * \param args... are arguments given to printk (number depends on ) + * \return code from printk + */ +#define INFO(args...) \ + printk(KERN_INFO DRIVER_NAME_FOR_PRINT ": " args) + +/** + * \brief + * Macro for printing warnings in drivers + * + * This macro is used for printing kernel messages in driver source code. + * It should be used for printing warnings. + * + * \param fmt is format string for printk + * \param args... are arguments given to printk (number depends on ) + * \return code from printk + */ +#define WARN(args...) \ + printk(KERN_WARNING DRIVER_NAME_FOR_PRINT " warning: " args) + +/** + * \brief + * Macro for printing errors in drivers + * + * This macro is used for printing kernel messages in driver source code. + * It should be used for printing errors. + * + * \param fmt is format string for printk + * \param args... are arguments given to printk (number depends on ) + * \return code from printk + */ +#define ERR(args...) \ + printk(KERN_ERR DRIVER_NAME_FOR_PRINT " error: " args) + +/** + * \brief + * Macro for printing debug messages in drivers + * + * This macro is used for printing kernel messages in driver source code + * when UDC_DEBUG is defined + * It should be used for printing debug messages. + * + * \param fmt is format string for printk + * \param args... are arguments given to printk (number depends on ) + * \return code from printk + */ +#ifdef UDC_DEBUG +#define DBG(args...) \ + printk(KERN_DEBUG DRIVER_NAME_FOR_PRINT " debug: " args) +#else + +#define DBG(args...) \ + do {} while (0) +#endif + +/** + * \brief + * Macro for printing verbose debug messages in drivers + * + * This macro is used for printing kernel messages in driver source code + * when UDC_DEBUG and UDC_VERBOSE is defined + * It should be used for printing debug messages. + * + * \param fmt is format string for printk + * \param args... are arguments given to printk (number depends on ) + * \return code from printk + */ +#ifdef UDC_VERBOSE +#define VDBG DBG +#else +#define VDBG(args...) \ + do {} while (0) +#endif +#endif /* #ifdef AU1200UDC_H */ diff --git a/drivers/usb/gadget/au1200uoc.c b/drivers/usb/gadget/au1200uoc.c new file mode 100644 index 0000000..5297eee --- /dev/null +++ b/drivers/usb/gadget/au1200uoc.c @@ -0,0 +1,2015 @@ +/* + * AMD Au1200 USB OTG controller driver + */ + +/* + * Copyright (C) 2005 AMD (http://www.amd.com) + * Author: Karsten Boge + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + + +/***************************************************************************** + * Includes + *****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#ifdef CONFIG_USB_OTG_TEST_INTERFACE +#ifndef CONFIG_USB_OTG +#define CONFIG_USB_OTG +#endif +#endif + +/* #define DEBUG */ +/* #define VERBOSE */ + +#ifdef CONFIG_SOC_AU1200 +#include +#include +#include +#endif + +#include +#include +#include + +#define DRIVER_DESC "AMD Au1200 USB OTG Controller" +#define DRIVER_VERSION "01.00.0201 - $Revision: #3 $" +#define DRIVER_NAME_FOR_PRINT OTG_DRIVER_NAME + +#include "au1200otg.h" +#include "au1200uoc.h" + + +/***************************************************************************** + * Function Declarations + *****************************************************************************/ + +#ifdef CONFIG_USB_OTG_TEST_INTERFACE +static int otg_test_bind(struct otg **); +static int otg_test_unbind(struct otg **); +#endif +#ifdef CONFIG_USB_OTG +static int otg_app_request(u32); +static int otg1200_set_host (struct otg_transceiver *, struct usb_bus *); +static int otg1200_set_power (struct otg_transceiver *, unsigned); +static int otg1200_start_srp (struct otg_transceiver *); +static int otg1200_start_hnp (struct otg_transceiver *); +#endif +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) +static u32 otg_app_query(int); +static int otg1200_set_peripheral (struct otg_transceiver *, + struct usb_gadget *); +#endif + + +/***************************************************************************** + * Data + *****************************************************************************/ + +static const char driver_name [] = OTG_DRIVER_NAME; +static const char driver_desc [] = DRIVER_DESC; + +static struct otg *the_controller; +static const char *transceiver_label = "au1200_otg"; + +static u32 init_state = 0; +#ifdef OTG_HNP_ERR_LOG +int hnp_err = 0; +#endif + +#ifdef CONFIG_USB_OTG_TEST_INTERFACE +static struct usb_otg_test_extension otg_test_extension = { + .bind = otg_test_bind, + .unbind = otg_test_unbind, + .request = otg_app_request, + .query = otg_app_query +}; +#endif +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + +struct usb_otg_gadget_extension otg_gadget_extension = { +#ifdef CONFIG_USB_OTG + .request = otg_app_request, +#else + .request = NULL, +#endif + .query = otg_app_query, + .notify = NULL +}; + +static u32 state_mask; +u32 otg_tmr_high_count = 0; +#endif + +#ifdef CONFIG_SOC_AU1200 +#ifdef USE_AU1200_PCI_DUMMY +static struct pci_dev pdev_dummy; +#endif +#endif + + +/***************************************************************************** + * Function Definitions + *****************************************************************************/ + +/** + * \brief + * fill OTG transceiver struct + * + * \param transceiver OTG transceiver + * + * \return void + */ +static inline void otg_init_transceiver (struct otg_transceiver *transceiver) +{ + transceiver_to_otg(transceiver)->prv_state = OTG_STATE_UNDEFINED; + transceiver_to_otg(transceiver)->params = 0; + transceiver_to_otg(transceiver)->hostcount = 0; + transceiver_to_otg(transceiver)->otg_priv = (void *) &otg_gadget_extension; + + transceiver->dev = NULL; + transceiver->label = transceiver_label; + transceiver->default_a = 0; + transceiver->state = OTG_STATE_UNDEFINED; + transceiver->host = NULL; +#ifdef CONFIG_USB_OTG_HIGHSPEED + transceiver->companion = NULL; +#endif + transceiver->gadget = NULL; + transceiver->port_status = 0; + transceiver->port_change = 0; +#ifdef CONFIG_USB_OTG + transceiver->set_host = otg1200_set_host; + transceiver->set_peripheral = otg1200_set_peripheral; + transceiver->set_power = otg1200_set_power; + transceiver->start_srp = otg1200_start_srp; + transceiver->start_hnp = otg1200_start_hnp; +#else + transceiver->set_host = NULL; + transceiver->set_peripheral = otg1200_set_peripheral; + transceiver->set_power = NULL; + transceiver->start_srp = NULL; + transceiver->start_hnp = NULL; +#endif +} + +#ifdef CONFIG_USB_OTGMUX_GADGET +/** + * \brief + * OTG state change + * + * subset of OTG states to support the gadget only or + * ID pin configuration + * + * \param otg OTG controller info + * \param event_code event that requested a state change + * \param pEvt_mask + * + * \return events that were not handled here + */ +u32 otg_change_state (struct otg *otg, u32 _event, u32 *pEvt_mask) +{ + u32 event_code = _event; + u32 uoc_status = get_status (otg); + + if (GOT_EVENT (OTG_GADGET_READY, event_code) + +#ifdef CONFIG_USB_OTGMUX_IDPIN + + || GOT_EVENT (OTG_HOST_READY, event_code) +#endif + ) { + + if (((IS_FLAG_RES (otg, OTG_GADGET_READY)) + +#ifdef CONFIG_USB_OTGMUX_IDPIN + + || (IS_FLAG_RES (otg, OTG_HOST_READY)) +#endif + ) + + && ((otg->transceiver.state & OTG_STATE_MASK) != + OTG_STATE_UNDEFINED)) { + + /* driver unload, back to "not ready" state */ + + CHANGE_STATE (otg, OTG_STATE_UNDEFINED, pEvt_mask); + RES_EVENT ((OTG_GADGET_READY | OTG_HOST_READY), + event_code); + } + } + if ((OTG_INT_TMX & event_code) && otg_tmr_high_count) { + + /* a long timer is running : decrement the high part */ + + restart_timer (otg); + otg_tmr_high_count--; + RES_EVENT (OTG_INT_TMX, event_code); + } + + do switch (otg->transceiver.state & OTG_STATE_MASK) { + + /* NOT_ASSIGNED (yet): init state, 1st time after loading */ + /* ====================================================== */ + + case OTG_STATE_UNDEFINED : + + CHECK_STATE (otg, OTG_STATE_UNDEFINED, pEvt_mask); + + if (IS_FLAG_RES (otg, OTG_FLAGS_ACTIV)) { + + /* seems to be the first time: let it run ! */ + + SET_FLAG (otg, OTG_FLAGS_ACTIV); + } + + /* muxer is still neutral */ + + RES_EVENT ((OTG_GADGET_READY | OTG_HOST_READY | + OTG_INT_IDC | OTG_INT_TMX), event_code); + + if ((IS_FLAG_SET (otg, OTG_GADGET_READY)) + +#ifdef CONFIG_USB_OTGMUX_IDPIN + + || (IS_FLAG_SET (otg, OTG_HOST_READY)) +#endif + ) { + + /* NOT_READY (substate): drivers now ready */ + /* ======================================= */ + +#ifdef CONFIG_USB_OTGMUX_IDPIN + + if (IS_BIT_RES (OTG_STS_ID, uoc_status)) { + + /* ID pin connected: A-device (host) */ + + CHANGE_STATE (otg, OTG_STATE_A_HOST, + pEvt_mask); + } + else { + /* ID pin not connected: disable (neutral) */ +#endif + CHANGE_STATE (otg, OTG_STATE_B_IDLE, + pEvt_mask); + +#ifdef CONFIG_USB_OTGMUX_IDPIN + } +#endif + } + break; + +#ifdef CONFIG_USB_OTGMUX_IDPIN + + /* A: ID pin is connected, A-device drives VBus */ + /* ============================================ */ + + case OTG_STATE_A_HOST : + + CHECK_STATE (otg, OTG_STATE_A_HOST, pEvt_mask); + + if (IS_BIT_SET (OTG_STS_ID, uoc_status)) { + + /* ID change => B_IDLE */ + + RES_EVENT ((OTG_INT_IDC | OTG_INT_PCC), event_code); + CHANGE_STATE (otg, OTG_STATE_B_IDLE, pEvt_mask); + } + break; + + /* B: ID pin is not connected */ + /* ========================== */ +#endif + + case OTG_STATE_B_IDLE : + + /* B_IDLE: init state for B-devices */ + /* monitor VBus, no connection, no activity */ + + CHECK_STATE (otg, OTG_STATE_B_IDLE, pEvt_mask); + +#ifdef CONFIG_USB_OTGMUX_IDPIN + + if (IS_BIT_RES (OTG_STS_ID, uoc_status)) { + + /* ID pin changed => A_HOST */ + + RES_EVENT (OTG_INT_IDC, event_code); + CHANGE_STATE (otg, OTG_STATE_A_HOST, pEvt_mask); + } + else if (IS_BIT_SET (OTG_STS_SESSVLD, uoc_status)) +#else + if (IS_BIT_SET (OTG_STS_SESSVLD, uoc_status)) +#endif + { + /* Session valid => B_PERIPHERAL */ + + RES_EVENT (OTG_INT_SVC, event_code); + CHANGE_STATE (otg, OTG_STATE_B_PERIPHERAL, pEvt_mask); +#ifndef CONFIG_TEST_MODE_ONLY + if (otg_gadget_extension.notify) { + otg_gadget_extension.notify ( + OTG_GADGET_EVT_SVALID); + } +#endif + } + break; + + case OTG_STATE_B_PERIPHERAL : + + /* B_PERIPHERAL: connected to A-host, responding */ + /* VBus driven by A, remote activity */ + + CHECK_STATE (otg, OTG_STATE_B_PERIPHERAL, pEvt_mask); + +#ifdef CONFIG_USB_OTGMUX_IDPIN + + if (IS_BIT_RES (OTG_STS_ID, uoc_status) || + IS_BIT_RES (OTG_STS_SESSVLD, uoc_status)) +#else + if (IS_BIT_RES (OTG_STS_SESSVLD, uoc_status)) +#endif + { + /* ID pin changed | ~Session valid => B_IDLE */ + + RES_EVENT ((OTG_INT_IDC | OTG_INT_SVC), event_code); + CHANGE_STATE (otg, OTG_STATE_B_IDLE, pEvt_mask); +#ifndef CONFIG_TEST_MODE_ONLY + if (otg_gadget_extension.notify) { + otg_gadget_extension.notify ( + OTG_GADGET_EVT_SVDROP); + } +#endif + } + break; + + /* unlikely */ default : + + /* something went wrong */ + + BUG (); + break; + } + while ((otg->transceiver.state ^ otg->prv_state) & + OTG_STATE_MASK); + + DBG ("OTG-state change done\n"); + + return event_code; +} +#endif /* CONFIG_USB_OTGMUX_GADGET */ +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + +/** + * \brief + * OTG state change request + * + * \param dev OTG device info + * \param params + * + * \return void + */ +static inline void otg_req_state_chg (struct otg *otg, u32 params) +{ + u32 temp, tmp2, flags; + + local_irq_save (flags); + + /* disable global OTG interrupt, clear int status: */ + temp = ~((u32) OTG_INT_GLOBAL) & readl (&otg->regs->inten); + writel (temp, &otg->regs->inten); + tmp2 = readl (&otg->regs->intr); + writel (tmp2, &otg->regs->intr); + temp &= tmp2; + + /* update OTG state: */ + otg_change_state (otg, (params | temp), &temp); + + /* enable global OTG interrupt: */ +/*** HS-A0 WA: BUG-3885: VB_SESS_VLD value too high ***/ +/*** HS-A0 WA: BUG-3950: gadget needs disconnect notification ***/ +#ifdef UDC_HSA0_WORKAROUNDS + state_mask = ~temp & OTG_INT_ADDS; + writel ((OTG_INT_ADDS | temp | OTG_INT_GLOBAL), &otg->regs->inten); +#else + writel ((temp | OTG_INT_GLOBAL), &otg->regs->inten); +#endif + local_irq_restore (flags); +} +#endif /* CONFIG_USB_OTG || CONFIG_USB_OTGMUX_GADGET */ + +#ifdef CONFIG_USB_OTG_TEST_INTERFACE + +/** + * \brief + * Bind the OTG controller to the test driver + * + * \param dev otg controller info + * + * \return error code + */ +static int otg_test_bind (struct otg **otg) +{ + *otg = the_controller; + if (!*otg) + return -EINVAL; +#ifdef CONFIG_TEST_MODE_ONLY + INFO ("bind OTG driver to the test driver, enable device\n"); + SET_FLAG (*otg, OTG_HOST_READY | OTG_GADGET_READY); + if (IS_FLAG_SET (*otg, OTG_FLAGS_ACTIV)) { + otg_req_state_chg (*otg, OTG_HOST_READY | OTG_GADGET_READY); + } + (*otg)->transceiver.gadget = (struct usb_gadget *) 1; +#else + INFO ("bind OTG driver to the test interface\n"); +#endif + return 0; +} + +/** + * \brief + * Unbind the OTG controller from the test driver + * + * \param dev otg controller info + * + * \return error code + */ +static int otg_test_unbind (struct otg **otg) +{ +#ifdef CONFIG_TEST_MODE_ONLY + INFO ("unbind OTG driver from the test driver, disable device\n"); + (*otg)->transceiver.gadget = NULL; + RES_FLAG (*otg, OTG_HOST_READY | OTG_GADGET_READY); + if (IS_FLAG_SET (*otg, OTG_FLAGS_ACTIV)) { + otg_req_state_chg (*otg, OTG_HOST_READY | OTG_GADGET_READY); + } + *otg = NULL; + return otg_unbind_gadget (); +#else + INFO ("unbind OTG driver from the test interface\n"); + *otg = NULL; + return 0; +#endif +} +#endif /* CONFIG_USB_OTG_TEST_INTERFACE */ + +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + +/** + * \brief + * OTG set transceiver: + * + * \param pointer to transceiver struct + * + * \return void + */ +int otg_set_transceiver (struct otg_transceiver *transceiver) +{ + struct otg *otg = the_controller; + + if (unlikely (transceiver != otg_to_transceiver (otg))) { + ERR ("USB OTG: unknown transceiver\n"); + return -EINVAL; + } + else { + return 0; + } +} + +/** + * \brief + * OTG get transceiver: provide info to others + * + * \param void + * + * \return pointer to transceiver struct + */ +struct otg_transceiver * otg_get_transceiver (void) +{ + return otg_to_transceiver (the_controller); +} +#endif + +#ifdef CONFIG_USB_OTG + +/** + * \brief + * Bind/unbind the OTG controller to/from usbcore + * + * \param transceiver this transceiver + * \param bus usb bus the host is assigned to + * + * \return error code + */ +static int otg1200_set_host (struct otg_transceiver *transceiver, + struct usb_bus *bus) +{ + struct otg *otg = the_controller; + int flag, count = 0; + + if (unlikely (transceiver != otg_to_transceiver (otg))) { + ERR ("USB OTG: unknown transceiver\n"); + return -EINVAL; + } + if (bus) { + + /* This bus supports OTG */ + + if (transceiver->host) { + count++; + } +#ifdef CONFIG_USB_OTG_HIGHSPEED + if (transceiver->companion) { + count++; + } + /* Now checking consistence ... */ + /* Depending on the driver loading sequence is possible */ + /* that the "Load state defaults" function was already */ + /* called so the state could be inconsistent. */ + if (transceiver->host && transceiver->companion) { + flag = (transceiver->host->is_b_host | + transceiver->companion->is_b_host); + if (transceiver->gadget && + !transceiver->gadget->is_a_peripheral) { + flag |= 1; + } + transceiver->host->is_b_host = flag; + transceiver->companion->is_b_host = flag; + } +#endif + DBG ("USB OTG: bind host: bus %d, port %d (OTG host #%d)\n", + bus->busnum, bus->otg_port, count); + if (IS_FLAG_RES (otg, OTG_HOST_READY)) { + RES_FLAG (otg, OTG_A_BUS_DROP); + SET_FLAG (otg, OTG_HOST_READY | OTG_A_BUS_REQ); + if (IS_FLAG_SET (otg, OTG_FLAGS_ACTIV)) { + otg_req_state_chg (otg, OTG_HOST_READY); + } + } + } + else { +#ifdef CONFIG_USB_OTG_HIGHSPEED + if (transceiver->companion) { + count++; + } +#endif + if (transceiver->host) { + count++; + } + DBG ("USB OTG: unbind host (actual OTG hosts: %d)\n", count); + if (!count) { + RES_FLAG (otg, OTG_HOST_READY | OTG_A_BUS_REQ); + SET_FLAG (otg, OTG_A_BUS_DROP); + if (IS_FLAG_SET (otg, OTG_FLAGS_ACTIV)) { + otg_req_state_chg (otg, OTG_HOST_READY); + } + } + } + return 0; +} +#endif /* CONFIG_USB_OTG */ + +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + +/** + * \brief + * Bind/unbind the OTG controller to/from usb gadget + * + * \param transceiver this transceiver + * \param gadget usb gadget info + * + * \return error code + */ +static int otg1200_set_peripheral (struct otg_transceiver *transceiver, + struct usb_gadget *gadget) +{ + struct otg *otg = the_controller; + int flag = 0; + + if (unlikely (transceiver != otg_to_transceiver (otg))) { + ERR ("USB OTG: unknown transceiver\n"); + return -EINVAL; + } + if (gadget) { + if (transceiver->gadget) { + ERR ("USB gadget: OTG driver already registered\n"); + return -EBUSY; + } + DBG ("bind OTG driver to USB gadget\n"); + transceiver->gadget = gadget; + SET_FLAG (otg, OTG_GADGET_READY | OTG_B_BUS_REQ); + + /* Now checking consistence ... */ + /* Depending on the driver loading sequence is possible */ + /* that the "Load state defaults" function was already */ + /* called so the state could be inconsistent. */ +#ifdef CONFIG_USB_OTG_HIGHSPEED + if (transceiver->companion && + !transceiver->companion->is_b_host) { + flag |= 1; + } +#endif + if (transceiver->host && !transceiver->host->is_b_host) { + flag |= 1; + } + transceiver->gadget->is_a_peripheral = flag; + + if (IS_FLAG_SET (otg, OTG_FLAGS_ACTIV)) { + otg_req_state_chg (otg, OTG_GADGET_READY); + } + if (IS_BIT_SET (OTG_STS_SESSVLD, readl (&otg->regs->sts)) && + (otg->transceiver.state & OTG_STATE_MASK) + == OTG_STATE_B_PERIPHERAL) { + VDBG ("calling gadget: connect\n"); + if (otg_gadget_extension.notify) { + otg_gadget_extension.notify ( + OTG_GADGET_EVT_SVALID); + } + } + return 0; + } + else { + DBG ("unbind OTG driver from USB gadget\n"); + RES_FLAG (otg, OTG_GADGET_READY | OTG_B_BUS_REQ); + if (IS_FLAG_SET (otg, OTG_FLAGS_ACTIV)) { + otg_req_state_chg (otg, OTG_GADGET_READY); + } + transceiver->gadget = NULL; + return 0; + } +} +#endif /* CONFIG_USB_OTGMUX || CONFIG_USB_OTGMUX_GADGET */ + +#ifdef CONFIG_USB_OTG + +/** + * \brief + * Set host controllers power budget + * + * \param transceiver this transceiver + * \param mA value to fill in + * + * \return error code + */ +static int otg1200_set_power (struct otg_transceiver *transceiver, + unsigned mA) +{ + struct otg *otg = the_controller; + + if (unlikely (transceiver != otg_to_transceiver (otg))) { + ERR ("USB OTG: unknown transceiver\n"); + return -EINVAL; + } + /* TODO kboge: do we need to support this ? */ + + DBG ("USB OTG: power budget change not supported\n"); + return 0; +} + +/** + * \brief + * Start a HNP request + * + * \param transceiver this transceiver + * + * \return error code + */ +static int otg1200_start_hnp (struct otg_transceiver *transceiver) +{ + struct otg *otg = the_controller; + + if (unlikely (transceiver != otg_to_transceiver (otg))) { + ERR ("USB OTG: unknown transceiver\n"); + return -ENODEV; + } + if (transceiver->default_a + && (!transceiver->host || !transceiver->host->b_hnp_enable) +#ifdef CONFIG_USB_OTG_HIGHSPEED + && (!transceiver->companion || !transceiver->companion->b_hnp_enable) +#endif + ) + return -ENOTCONN; + if (!transceiver->default_a && + (!transceiver->gadget || !transceiver->gadget->b_hnp_enable)) + return -ENOTCONN; + + switch (transceiver->state & OTG_STATE_MASK) { + case OTG_STATE_B_HOST: + case OTG_STATE_A_HOST: + case OTG_STATE_A_PERIPHERAL: + break; + default: + ERR ("USB OTG: wrong OTG state for role swap\n"); + return -EILSEQ; + } + return 0; +} + +/** + * \brief + * Start a SRP request + * + * \param transceiver this transceiver + * + * \return error code + */ +static int otg1200_start_srp (struct otg_transceiver *transceiver) +{ + struct otg *otg = the_controller; + + if (unlikely (transceiver != otg_to_transceiver (otg))) { + ERR ("USB OTG: unknown transceiver\n"); + return -EINVAL; + } + if ((transceiver->state & OTG_STATE_MASK) != OTG_STATE_B_IDLE) { + RES_FLAG (otg, OTG_B_aSSN_REQ); + ERR ("USB OTG: wrong OTG state for SRP\n"); + return -EBUSY; + } + SET_FLAG (otg, OTG_B_aSSN_REQ); + otg_req_state_chg (otg, OTG_B_aSSN_REQ); + return 0; +} + +/** + * \brief + * Start a USB host enumeration + * + * \param transceiver this transceiver + * + * \return error code + */ +int otg_hnp_start_enum (struct otg_transceiver *transceiver) +{ + struct otg *otg = the_controller; + struct usb_bus *bus; + int status = 0; + + if (unlikely (transceiver != otg_to_transceiver (otg))) { + ERR ("USB OTG: unknown transceiver\n"); + return -EINVAL; + } + if (otg->transceiver.state == OTG_STATE_B_HOST) { + + bus = otg->transceiver.host; + +#ifdef CONFIG_USB_OTG_HIGHSPEED + + if (!bus || !bus->is_b_host) { + bus = otg->transceiver.companion; + } +#endif + if (bus && bus->is_b_host) { + DBG ("USB OTG: in HNP, start enumeration ...\n"); + status = usb_bus_start_enum (bus, bus->otg_port); + } + else { + DBG ("USB OTG: no device to enumerate\n"); + } + } + else { + DBG ("USB OTG: in HNP: wrong state %02x\n", + otg->transceiver.state); + } + return status; +} + +/** + * \brief + * OTG application request + * + * \param params + * + * \return OTG_APP_REQ_ACK + */ +static int otg_app_request (u32 params) +{ + struct otg *otg = the_controller; + u32 flags = params; + struct usb_bus *bus; + + if (OTG_UDC_RWK_REQ & flags) { + + if (otg_gadget_extension.notify) { + otg_gadget_extension.notify (OTG_GADGET_REQ_WAKE); + } + flags &= ~((u32) OTG_UDC_RWK_REQ); + } + + if (OTG_AB_HNP_REQ & flags) { + + /* request HNP */ + + bus = otg->transceiver.host; + if (!bus->b_hnp_enable) { + +#ifdef CONFIG_USB_OTG_HIGHSPEED + bus = otg->transceiver.companion; + } + if (!bus->b_hnp_enable) { +#endif + INFO ("HNP not enabled, ignoring request\n"); + } + else { + if (!otg1200_start_hnp (&otg->transceiver) && + bus->root_hub->children [bus->otg_port - 1]) { + usb_suspend_device (bus->root_hub->children [bus->otg_port - 1], + PM_SUSPEND_MEM); + } + else { + ERR ("no device found for HNP\n"); + } + } + flags &= ~((u32) OTG_AB_HNP_REQ); + } + + if (OTG_A_CLR_ERR & flags) { + + /* request to clear error flags */ + + flags |= OTG_A_VBUS_FAILED; + } + + /* create mask of flags to clear */ + + flags &= (OTG_B_SRP_ERROR | OTG_A_VBUS_FAILED); + + if (flags) { + + /* reset error flags if requested */ + + RES_FLAG (otg, (flags)); + } + + /* prepare for pending requests (no more actions on OTG_A_bHNP_EN) */ + + flags = params & SW_REQUEST_MASK; + SET_FLAG (otg, (flags)); + + if (OTG_A_BUS_DROP & flags) { + + /* request to drop A-VBus: reset "rise" request if pending */ + + flags &= ~OTG_A_BUS_REQ; + RES_FLAG (otg, OTG_A_BUS_REQ); + } + if (OTG_A_BUS_REQ & flags) { + + /* request to rise A-VBus: reset "drop" request if pending */ + + RES_FLAG (otg, OTG_A_BUS_DROP); + } + if (OTG_B_BUS_DIS & flags) { + + /* request to disable B-dev: reset "ena" request if pending */ + + flags &= ~OTG_B_BUS_REQ; + RES_FLAG (otg, OTG_B_BUS_REQ); + } + if (OTG_B_BUS_REQ & flags) { + + /* request to enable B-dev: reset "disa" request if pending */ + + RES_FLAG (otg, OTG_B_BUS_DIS); + } + if (flags) { + + /* request still pending may force a state change */ + + otg_req_state_chg (otg, flags); + } + return OTG_APP_REQ_ACK; +} +#endif /* CONFIG_USB_OTG */ + +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + +/** + * \brief + * OTG application query + * + * \param index select status info data + * + * \return status + */ +static u32 otg_app_query (int index) +{ + struct otg *otg = the_controller; + u32 temp = 0; + + if (index == 0) { + temp = otg->params | + readl (&otg->regs->sts); + +/*** HS-A0 WA: BUG-3943: gadget phy suspend issue ***/ +#ifdef UDC_HSA0_WORKAROUNDS + if (((readl (&otg->regs->ctl) & OTG_CTL_MUX_MASK) == + OTG_CTL_ENABLE_UDC) && + ((temp & OTG_STS_PSUS) || (~temp & OTG_STS_VBUSVLD))) { + temp |= OTG_FLAGS_UDC_SUSP; + } +#endif + } + else if (index == 1) { + temp = otg->transceiver.state; + } +#ifdef OTG_HNP_ERR_LOG + if (hnp_err) { + temp |= OTG_FLAGS_HNP_ERR; + } +#endif + return temp; +} + +/** + * \brief + * OTG ISR calling the main state machine + * + * \param irq IRQ number + * \param _dev + * \param r + * + * \return IRQ_HANDLED (system code) + */ +static irqreturn_t otg_isr (int irq, void *dev, struct pt_regs *r) +{ + struct otg *otg = (struct otg *) dev; + u32 interrupts, int_mask, temp; + + int_mask = readl (&otg->regs->inten); + if ((OTG_INT_GLOBAL & int_mask) && + (int_mask &= ~((u32) OTG_INT_GLOBAL)) && + (interrupts = int_mask & + (temp = readl (&otg->regs->intr)))) { + + writel (int_mask, &otg->regs->inten); + /* clear interrupt status */ + writel (temp, &otg->regs->intr); +/* +#ifdef CONFIG_USB_OTG + + if (GOT_EVENT (OTG_INT_PCC, interrupts) && + IS_BIT_SET (OTG_STS_PCON, readl (&otg->regs->sts))) { + otg_hnp_start_enum (&otg->transceiver); + } +#endif */ + /* filter out additional WA interrupts, they're done */ + /* don't want to see them in the state machine */ + + if (interrupts & ~state_mask) { + + /* events pending for the state machine */ + + otg_change_state (otg, (interrupts & ~state_mask), + &int_mask); + } + + /* enable interrupts and keep information about WA ints: */ + + state_mask = OTG_INT_ADDS & ~int_mask; + writel ((OTG_INT_ADDS | int_mask | OTG_INT_GLOBAL), + &otg->regs->inten); + } + return IRQ_HANDLED; +} +#endif /* CONFIG_USB_OTG || CONFIG_USB_OTGMUX_GADGET */ + +/** + * \brief + * OTG probe: init hardware, register the driver + * + * \param otg otg controller info + * + * \return success + */ +static inline int __init otg_probe (struct otg *otg) +{ + int retval; +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + u32 temp; + int i; +#endif + + /* initialize the OTG controller */ + + VDBG ("OTG init ...\n"); + +#ifdef VERBOSE + /* print regs */ + print_regs (otg); +#endif + /* Make sure we'll remember the initial state */ + init_state = readl (&otg->regs->ctl); + VDBG (" OTG init state was %08x\n", init_state); + +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + + /* turn on the OTG controller */ + + writel ((init_state | OTG_CTL_PADEN), &otg->regs->ctl); + +/*** HS-A0 WA: BUG-3885: VB_SESS_VLD value too high ***/ +/*** HS-A0 WA: BUG-3943: gadget suspend issue ***/ +#ifndef UDC_HSA0_WORKAROUNDS + + /* Enable OTG hardware (incl. auto pull-up enable) */ + + writel ((readl (&dev->regs->cap) | OTG_CAP_APU), &otg->regs->cap); +#endif + + /* initialize flags */ + otg->params = 0; +#endif + +/*** HS-A0 WA: BUG-3885: VB_SESS_VLD value too high ***/ +/*** HS-A0 WA: BUG-3943: gadget suspend issue ***/ +/*** HS-A0 WA: BUG-3950: gadget disconnect notification ***/ +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + + /* make sure all interrupts are disabled */ + + writel (OTG_INT_DISALL, &otg->regs->inten); + writel (OTG_INT_ENALL, &otg->regs->intr); + + /* Set multiplexer to neutral, get power control, drop VBus */ + + if (((init_state & OTG_CTL_MUX_MASK) == OTG_CTL_ENABLE_UHC) && + ((((init_state & OTG_CTL_PPO) && (init_state & OTG_CTL_PPWR))) || + ((~init_state & OTG_CTL_PPO) && + (readl (&otg->regs->sts) & OTG_STS_SESSVLD)))) { + + /* VBus still powered try to discharge VBus and set timer */ + + DBG ("Setting init state, trying to discharge VBus ...\n"); + + for (i = 0; i < 4; i++) { + writel (TIMER_PERIOD, &otg->regs->tmr); + writel ((OTG_CTL_PADEN | OTG_CTL_IDSNSEN | + OTG_CTL_PPO | OTG_CTL_DISCHRG | + OTG_CTL_TMR_UNCOND), &otg->regs->ctl); + do { } + while (!(readl (&otg->regs->sts) & OTG_STS_TMH)); + } + writel ((OTG_CTL_PADEN | OTG_CTL_IDSNSEN | OTG_CTL_PPO), + &otg->regs->ctl); + writel (OTG_INT_ENALL, &otg->regs->intr); +#ifdef DEBUG + if (readl (&otg->regs->sts) & OTG_STS_SESSVLD) { + + DBG (" VBus still high, external host connected\n"); + } + else { + + DBG (" VBus discharged\n"); + } +#endif + } + else { + DBG ("Setting init state\n"); + + writel ((OTG_CTL_PADEN | OTG_CTL_IDSNSEN | OTG_CTL_PPO), + &otg->regs->ctl); + } +#endif /* CONFIG_USB_OTG || CONFIG_USB_OTGMUX_GADGET */ + +#ifdef CONFIG_USB_OTGMUX_HOST + + /* Set multiplexer to host */ + writel ((readl (&otg->regs->cap) & ~((u32) OTG_CAP_APU)), + &otg->regs->cap); + +#ifdef CONFIG_SOC_AU1200 + + writel ((OTG_CTL_ENABLE_UHC | OTG_CTL_PPO | OTG_CTL_PPWR), + &otg->regs->ctl); + + /* Turn on VBus */ + AU1000GPIO_CLR_BIT (USB_VBUS_GPIO); +#else + writel (OTG_CTL_ENABLE_UHC, &otg->regs->ctl); +#endif + + INFO ("OTG functionality is disabled, port is assigned to host\n"); +#endif + VDBG ("OTG init done\n"); + +#ifdef CONFIG_USB_OTG_TEST_INTERFACE + + /* registering to the test driver */ + usb_otg_test_register_driver (&otg_test_extension); +#endif +#ifndef CONFIG_TEST_MODE_ONLY +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + + /* registering to the device driver */ + if (usb_gadget_register_otg (otg_get_transceiver)) { + ERR ("gadget driver registration failed\n"); + retval = -ENODEV; + goto err1; + } +#endif +#ifdef CONFIG_USB_OTG + + /* registering to the usbcore */ + if (usb_host_register_otg (otg_get_transceiver)) { + ERR ("usbcore registration failed\n"); + retval = -ENODEV; + goto err2; + } +#endif +#endif +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + + /* finally activate OTG functionality */ + /* Enable timer interrupt, start timer, set state */ + + SET_OTG_TIMER (otg, IDSNS_WAIT); + CHANGE_STATE (otg, OTG_STATE_UNDEFINED, &temp); + CHECK_STATE (otg, OTG_STATE_UNDEFINED, &temp); + +/*** HS-A0 WA: BUG-3885: VB_SESS_VLD value too high ***/ +/*** HS-A0 WA: BUG-3943: gadget suspend issue ***/ +/*** HS-A0 WA: BUG-3950: gadget needs disconnect notification ***/ + + /* clear all interrupts before enable */ + writel (readl (&otg->regs->intr), &otg->regs->intr); + + state_mask = ~temp & OTG_INT_ADDS; + writel ((OTG_INT_ADDS | temp | OTG_INT_GLOBAL), &otg->regs->inten); + + DBG ("OTG-HW initialized, now checking ID ...\n"); +#endif + + return 0; + +#ifndef CONFIG_TEST_MODE_ONLY +#ifdef CONFIG_USB_OTG + +err2: + +#endif +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + + usb_gadget_unregister_otg (); +err1: + +#endif +#endif +#ifdef CONFIG_USB_OTG_TEST_INTERFACE + + usb_otg_test_unregister_driver (); +#endif + return retval; +} + +/** + * \brief + * OTG remove: deregister the driver, clean-up hardware + * + * \param otg otg controller info + * + * \return void + */ +static inline void __exit otg_remove (struct otg *otg) +{ + int muxer; + +#ifndef CONFIG_TEST_MODE_ONLY +#ifdef CONFIG_USB_OTG + + /* unregistering from the usb core */ + usb_host_deregister_otg (); +#endif +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + + /* unregistering from the usb gadget */ + usb_gadget_unregister_otg (); + +#endif +#endif +#ifdef CONFIG_USB_OTG_TEST_INTERFACE + + /* unregistering from the test driver */ + usb_otg_test_unregister_driver (); +#endif + + /* clean up the OTG controller */ + +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + + /* Disable all interrupts */ + writel (OTG_INT_DISALL, &otg->regs->inten); + writel (OTG_INT_ENALL, &otg->regs->intr); + + /* reset state, terminate all connections */ + CHANGE_STATE (otg, OTG_STATE_UNDEFINED, &state_mask); + CHECK_STATE (otg, OTG_STATE_UNDEFINED, &state_mask); + otg->params = 0; +#endif + + muxer = init_state & (OTG_CTL_ENABLE_UHC | OTG_CTL_ENABLE_UDC); + +/*** HS-A0 WA: BUG-3885: VB_SESS_VLD value too high ***/ +/*** HS-A0 WA: BUG-3943: gadget suspend issue ***/ +#ifdef UDC_HSA0_WORKAROUNDS + + /* Don't assign the port to the device controller */ + + if (!(muxer ^ OTG_CTL_ENABLE_UDC)) { + + init_state &= ~((u32) (OTG_CTL_MUX_MASK | OTG_CTL_PUEN)); + muxer = OTG_CTL_DISABLE_ALL; + } + VDBG ("OTG writing back corrected init state: %08x\n", init_state); +#else + /* Reset APU */ + + writel ((readl (&otg->regs->cap) & ~((u32) OTG_CAP_APU)), + &otg->regs->cap); + + VDBG ("OTG writing back init state: %08x\n", init_state); +#endif + /* Now, that's the moment to remember */ + /* Set dev muxer and pull up bits, turn off the OTG controller */ + +#ifdef CONFIG_SOC_AU1200 + + /* Turn off VBus */ + AU1000GPIO_SET_BIT (USB_VBUS_GPIO); +#endif + writel (init_state, &otg->regs->ctl); + + if (!(muxer ^ OTG_CTL_ENABLE_UHC)) { + INFO ("disabling OTG-HW, port is assigned to host\n"); + } + else if (!(muxer ^ OTG_CTL_ENABLE_UDC)) { + INFO ("disabling OTG-HW, port is assigned to device\n"); + } + else { + INFO ("disabling OTG-HW, port is not assigned\n"); + } + + VDBG ("OTG exit: OTG-HW disabled\n"); + + if (!muxer) { + INFO ("OTG HW disabled, port is not assigned\n"); + } +} + +#ifdef CONFIG_SOC_AU1200 +#ifdef USE_AU1200_PCI_DUMMY + +/** + * \brief + * OTG dev probe: enable, init controller hardware + * + * \param pdev dummy pci device pointer + * + * \return success + */ +static int __init otg_pci_probe (struct pci_dev *pdev) +{ + struct otg *otg; + void *base; + int retval; + char buf [8] = {0,0,0,0,0,0,0,0}, *bufp; + + /* alloc, and start init */ + otg = (struct otg *) kmalloc (sizeof(struct otg), SLAB_KERNEL); + if (!otg) { + ERR ("couldn't allocate memory for OTG driver\n"); + retval = -ENOMEM; + goto err1; + } + DBG ( "kmalloc: OTG driver: %p\n", otg); + + /* hold global device pointer */ + the_controller = otg; + + memset (otg, 0, sizeof(struct otg)); + spin_lock_init (&otg->lock); + + /* + * Fill in the dummy pci_dev. Only those members actually + * dereferenced in this driver are initialized. + */ + memset(pdev, 0, sizeof(struct pci_dev)); + pdev->resource[0].name = "UOC Registers"; + pdev->resource[0].start = USB_UOC_BASE; + pdev->resource[0].end = USB_UOC_BASE + USB_UOC_LEN - 1; + pdev->resource[0].flags = 0; + pdev->irq = AU1200_USB_INT; + + otg->pdev = pdev; + + au_writel ((au_readl (USB_MSR_BASE + USB_MSR_MCFG) | + (1 << USBMSRMCFG_GMEMEN)), (USB_MSR_BASE + USB_MSR_MCFG)); + au_readl (USB_MSR_BASE + USB_MSR_MCFG); + /* au_sync (); */ + udelay (1000); + if (AU1000GPIO_INIT_BIT (USB_VBUS_GPIO)) + WARN ("Couldn't initialize power switch GPIO\n"); + otg->enabled = 1; + + if (!request_mem_region (pdev->resource[0].start, + pdev->resource[0].end + 1 + - pdev->resource[0].start, + driver_name)) { + ERR ("controller already in use\n"); + retval = -EBUSY; + goto err3; + } + otg->region = 1; + + base = ioremap_nocache (pdev->resource[0].start, + pdev->resource[0].end + 1 + - pdev->resource[0].start); + if (!base) { + ERR ("couldn't map memory\n"); + retval = -EFAULT; + goto err4; + } + otg->regs = (struct otg_regs *) base; + bufp = buf; + + otg->chiprev = (u16) read_c0_prid() & 0xff; + +/*** HS-A0 WA: BUG-3885: VB_SESS_VLD value too high ***/ +/*** HS-A0 WA: BUG-3943: gadget suspend issue ***/ +/*** HS-A0 WA: BUG-3950: gadget disconnect notification ***/ +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + + /* OTG transceiver info */ + otg->transceiver.dev = &pdev->dev; + otg_init_transceiver (otg_to_transceiver (otg)); + + /* make sure all interrupts are disabled */ + writel (OTG_INT_DISALL, &otg->regs->inten); + writel (OTG_INT_ENALL, &otg->regs->intr); + readl (&otg->regs->inten); + + /* irq setup after old hardware is cleaned up */ + if (!pdev->irq) { + ERR ("No IRQ. Check system setup!\n"); + retval = -ENODEV; + goto err5; + } + snprintf (buf, sizeof buf, "%d", pdev->irq); + bufp = buf; + if (request_irq (pdev->irq, otg_isr, SA_INTERRUPT | SA_SHIRQ, + driver_name, otg) != 0) { + ERR ("request interrupt %s failed\n", bufp); + retval = -EBUSY; + goto err5; + } + otg->got_irq = 1; + + /* done */ + INFO ("%s\n", driver_desc); + INFO ("irq %s, mem %08lx, chip rev %02x (Au1200 %s)\n", + bufp, pdev->resource[0].start, otg->chiprev, + (otg->chiprev ? "AC" : "AB")); + +#else /* CONFIG_USB_OTG || CONFIG_USB_OTGMUX_GADGET */ + + INFO ("%s\n", driver_desc); + INFO ("mem %08lx, chip rev %02x (Au1200 %s)\n", + pdev->resource[0].start, otg->chiprev, + (otg->chiprev ? "AC" : "AB")); +#endif +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_IDPIN) || defined(CONFIG_USB_OTGMUX_HOST) + + INFO ("using GPIO_%d for VBus control\n", USB_VBUS_GPIO); +#endif + bufp = DRIVER_VERSION; + INFO ("driver version: %s\n", bufp); + + if ((retval = otg_probe (otg)) == 0) { + pci_set_drvdata (pdev, otg); + return 0; + } + + /* something went wrong */ + +/*** HS-A0 WA: BUG-3885: VB_SESS_VLD value too high ***/ +/*** HS-A0 WA: BUG-3943: gadget suspend issue ***/ +/*** HS-A0 WA: BUG-3950: gadget disconnect notification ***/ +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + + otg->got_irq = 0; + free_irq (pdev->irq, otg); +err5: + +#endif + otg->regs = NULL; + iounmap (base); +err4: + otg->region = 0; + release_mem_region (pdev->resource[0].start, + pdev->resource[0].end + 1 + - pdev->resource[0].start); +err3: + otg->enabled = 0; + AU1000GPIO_TERM_BIT (USB_VBUS_GPIO); + au_writel ((au_readl (USB_MSR_BASE + USB_MSR_MCFG) & + ~((u32) (1 << USBMSRMCFG_GMEMEN))), + (USB_MSR_BASE + USB_MSR_MCFG)); + au_readl (USB_MSR_BASE + USB_MSR_MCFG); + /* au_sync (); */ + udelay (1000); + + otg->pdev = NULL; + the_controller = NULL; + DBG ( "kfree: OTG driver: %p\n", otg); + kfree (otg); +err1: + otg = NULL; + return retval; +} + +/** + * \brief + * OTG dev remove: clean-up, disable controller hardware + * + * \param pdev dummy pci device info + * + * \return void + */ +static void __exit otg_pci_remove (struct pci_dev *pdev) +{ + struct otg *otg = pci_get_drvdata (pdev); + + otg_remove (otg); + +/*** HS-A0 WA: BUG-3885: VB_SESS_VLD value too high ***/ +/*** HS-A0 WA: BUG-3943: gadget suspend issue ***/ +/*** HS-A0 WA: BUG-3950: gadget disconnect notification ***/ +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + + otg->got_irq = 0; + free_irq (pdev->irq, otg); +#endif + iounmap (otg->regs); + otg->regs = NULL; + otg->region = 0; + release_mem_region (pdev->resource[0].start, + pdev->resource[0].end + 1 + - pdev->resource[0].start); + otg->enabled = 0; + AU1000GPIO_TERM_BIT (USB_VBUS_GPIO); +/* au_writel ((au_readl (USB_MSR_BASE + USB_MSR_MCFG) & + ~((u32) (1 << USBMSRMCFG_GMEMEN))), + (USB_MSR_BASE + USB_MSR_MCFG)); */ + au_readl (USB_MSR_BASE + USB_MSR_MCFG); + /* au_sync (); */ + udelay (1000); + otg->pdev = NULL; + the_controller = NULL; + DBG ( "kfree: OTG driver: %p\n", otg); + kfree (otg); + otg = NULL; + pci_set_drvdata(pdev, NULL); +} +#else + +/** + * \brief + * OTG dev probe: enable, init controller hardware + * + * \param dev platform device info + * + * \return success + */ +static int __init otg_drv_probe (struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct otg *otg; + u32 resource, len, irq; + void *base; + int retval; + char buf [8] = {0,0,0,0,0,0,0,0}, *bufp; + + /* alloc, and start init */ + otg = (struct otg *) kmalloc (sizeof(struct otg), SLAB_KERNEL); + if (!otg) { + ERR ("couldn't allocate memory for OTG driver\n"); + retval = -ENOMEM; + goto err1; + } + DBG ( "kmalloc: OTG driver: %p\n", otg); + + /* hold global device pointer */ + the_controller = otg; + + memset (otg, 0, sizeof(struct otg)); + spin_lock_init (&otg->lock); + + if (pdev->resource[0].flags != IORESOURCE_MEM) { + ERR ("resource is not IORESOURCE_MEM\n"); + retval = -ENOMEM; + goto err2; + } + resource = pdev->resource[0].start; + len = pdev->resource[0].end + 1 - pdev->resource[0].start; + if (pdev->resource[1].flags != IORESOURCE_IRQ) { + ERR ("resource is not IORESOURCE_IRQ\n"); + retval = -ENOMEM; + goto err2; + } + irq = pdev->resource[1].start; + + otg->pdev = pdev; + + au_writel ((au_readl (USB_MSR_BASE + USB_MSR_MCFG) | + (1 << USBMSRMCFG_GMEMEN)), (USB_MSR_BASE + USB_MSR_MCFG)); + au_readl (USB_MSR_BASE + USB_MSR_MCFG); + /* au_sync (); */ + udelay (1000); + if (AU1000GPIO_INIT_BIT (USB_VBUS_GPIO)) + WARN ("Couldn't initialize power switch GPIO\n"); + otg->enabled = 1; + + if (!request_mem_region (resource, len, driver_name)) { + ERR ("controller already in use\n"); + retval = -EBUSY; + goto err3; + } + otg->region = 1; + + base = ioremap_nocache (resource, len); + if (!base) { + ERR ("couldn't map memory\n"); + retval = -EFAULT; + goto err4; + } + otg->regs = (struct otg_regs *) base; + bufp = buf; + + otg->chiprev = (u16) read_c0_prid() & 0xff; + +/*** HS-A0 WA: BUG-3885: VB_SESS_VLD value too high ***/ +/*** HS-A0 WA: BUG-3943: gadget suspend issue ***/ +/*** HS-A0 WA: BUG-3950: gadget disconnect notification ***/ +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + + /* OTG transceiver info */ + otg->transceiver.dev = dev; + otg_init_transceiver (otg_to_transceiver (otg)); + + /* make sure all interrupts are disabled */ + writel (OTG_INT_DISALL, &otg->regs->inten); + writel (OTG_INT_ENALL, &otg->regs->intr); + readl (&otg->regs->inten); + + /* irq setup after old hardware is cleaned up */ + if (!irq) { + ERR ("No IRQ. Check system setup!\n"); + retval = -ENODEV; + goto err5; + } + snprintf (buf, sizeof buf, "%d", irq); + bufp = buf; + if (request_irq (irq, otg_isr, SA_INTERRUPT | SA_SHIRQ, + driver_name, otg) != 0) { + ERR ("request interrupt %s failed\n", bufp); + retval = -EBUSY; + goto err5; + } + otg->got_irq = 1; + + /* done */ + INFO ("%s\n", driver_desc); + INFO ("irq %s, mem %08x, chip rev %02x (Au1200 %s)\n", + bufp, resource, otg->chiprev, (otg->chiprev ? "AC" : "AB")); + +#else /* CONFIG_USB_OTG || CONFIG_USB_OTGMUX_GADGET */ + + INFO ("%s\n", driver_desc); + INFO ("mem %08x, chip rev %02x (Au1200 %s)\n", + resource, otg->chiprev, (otg->chiprev ? "AC" : "AB")); +#endif +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_IDPIN) || defined(CONFIG_USB_OTGMUX_HOST) + + INFO ("using GPIO_%d for VBus control\n", USB_VBUS_GPIO); +#endif + bufp = DRIVER_VERSION; + INFO ("driver version: %s\n", bufp); + + if ((retval = otg_probe (otg)) == 0) { + dev_set_drvdata (dev, otg); + return 0; + } + + /* something went wrong */ + +/*** HS-A0 WA: BUG-3885: VB_SESS_VLD value too high ***/ +/*** HS-A0 WA: BUG-3943: gadget suspend issue ***/ +/*** HS-A0 WA: BUG-3950: gadget disconnect notification ***/ +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + + otg->got_irq = 0; + free_irq (irq, otg); +err5: + +#endif + otg->regs = NULL; + iounmap (base); +err4: + otg->region = 0; + release_mem_region (resource, len); +err3: + otg->enabled = 0; + AU1000GPIO_TERM_BIT (USB_VBUS_GPIO); + au_writel ((au_readl (USB_MSR_BASE + USB_MSR_MCFG) & + ~((u32) (1 << USBMSRMCFG_GMEMEN))), + (USB_MSR_BASE + USB_MSR_MCFG)); + au_readl (USB_MSR_BASE + USB_MSR_MCFG); + /* au_sync (); */ + udelay (1000); +err2: + otg->pdev = NULL; + the_controller = NULL; + DBG ( "kfree: OTG driver: %p\n", otg); + kfree (otg); +err1: + otg = NULL; + + return retval; +} + +/** + * \brief + * OTG dev remove: clean-up, disable controller hardware + * + * \param dev platform device info + * + * \return void + */ +static int __exit otg_drv_remove (struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct otg *otg = dev_get_drvdata (dev); + + otg_remove (otg); + +/*** HS-A0 WA: BUG-3885: VB_SESS_VLD value too high ***/ +/*** HS-A0 WA: BUG-3943: gadget suspend issue ***/ +/*** HS-A0 WA: BUG-3950: gadget disconnect notification ***/ +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + + otg->got_irq = 0; + free_irq (pdev->resource[1].start, otg); +#endif + iounmap (otg->regs); + otg->regs = NULL; + otg->region = 0; + release_mem_region (pdev->resource[0].start, + pdev->resource[0].end + 1 + - pdev->resource[0].start); + otg->enabled = 0; + AU1000GPIO_TERM_BIT (USB_VBUS_GPIO); +/* au_writel ((au_readl (USB_MSR_BASE + USB_MSR_MCFG) & + ~((u32) (1 << USBMSRMCFG_GMEMEN))), + (USB_MSR_BASE + USB_MSR_MCFG)); */ + au_readl (USB_MSR_BASE + USB_MSR_MCFG); + /* au_sync (); */ + udelay (1000); + otg->pdev = NULL; + the_controller = NULL; + DBG ( "kfree: OTG driver: %p\n", otg); + kfree (otg); + otg = NULL; + dev_set_drvdata(dev, NULL); + return 0; +} +#endif +#else +#ifdef CONFIG_PCI + +/** + * \brief + * OTG PCI probe: enable, init controller hardware + * + * \param pdev pci device info + * \param id pci ids + * + * \return success + */ +static int __init otg_pci_probe (struct pci_dev *pdev, + const struct pci_device_id *id) +{ + struct otg *otg; + u32 resource, len; + void *base; + int retval; + char buf [8] = {0,0,0,0,0,0,0,0}, *bufp; + + /* alloc, and start init */ + otg = (struct otg *) kmalloc (sizeof(struct otg), SLAB_KERNEL); + if (!otg) { + ERR ("couldn't allocate memory for OTG driver\n"); + retval = -ENOMEM; + goto err1; + } + DBG ( "kmalloc: OTG driver: %p\n", otg); + + /* hold global device pointer */ + the_controller = otg; + + memset (otg, 0, sizeof(struct otg)); + spin_lock_init (&otg->lock); + + otg->pdev = pdev; + + /* now all the pci goodies ... */ + if (pci_enable_device (pdev) < 0) { + ERR ("couldn't enable PCI device\n"); + retval = -ENODEV; + goto err2; + } + otg->enabled = 1; + + resource = pci_resource_start (pdev, 0); + len = pci_resource_len (pdev, 0); + + if (!request_mem_region (resource, len, driver_name)) { + ERR ("controller already in use\n"); + retval = -EBUSY; + goto err3; + } + otg->region = 1; + + base = ioremap_nocache (resource, len); + if (!base) { + ERR ("couldn't map memory\n"); + retval = -EFAULT; + goto err4; + } + otg->regs = (struct otg_regs *) base; + bufp = buf; + + pci_read_config_byte (pdev, PCI_REVISION_ID, (u8*) &otg->chiprev); + +/*** HS-A0 WA: BUG-3885: VB_SESS_VLD value too high ***/ +/*** HS-A0 WA: BUG-3943: gadget suspend issue ***/ +/*** HS-A0 WA: BUG-3950: gadget disconnect notification ***/ +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + + /* OTG transceiver info */ + + otg->transceiver.dev = &pdev->dev; + otg_init_transceiver (otg_to_transceiver (otg)); + + /* make sure all interrupts are disabled */ + writel (OTG_INT_DISALL, &otg->regs->inten); + writel (OTG_INT_ENALL, &otg->regs->intr); + readl (&otg->regs->inten); + + /* irq setup after old hardware is cleaned up */ + if (!pdev->irq) { + ERR ("No IRQ. Check PCI setup!\n"); + retval = -ENODEV; + goto err5; + } +#ifndef __sparc__ + snprintf (buf, sizeof buf, "%d", pdev->irq); + bufp = buf; +#else + bufp = __irq_itoa(pdev->irq); +#endif + if (request_irq (pdev->irq, otg_isr, SA_INTERRUPT | SA_SHIRQ, + driver_name, otg) != 0) { + ERR ("request interrupt %s failed\n", bufp); + retval = -EBUSY; + goto err5; + } + otg->got_irq = 1; + + /* done */ + INFO ("%s\n", driver_desc); + INFO ("irq %s, pci mem %08x, chip rev %02x (Geode5536 %s)\n", + bufp, resource, otg->chiprev, (otg->chiprev - 1 ? "B1" : "A0")); + +#else /* CONFIG_USB_OTG || CONFIG_USB_OTGMUX_GADGET */ + + INFO ("%s\n", driver_desc); + INFO ("pci mem %08x, chip rev %02x (Geode5536 %s)\n", + resource, otg->chiprev, (otg->chiprev - 1 ? "B1" : "A0")); +#endif + bufp = DRIVER_VERSION; + INFO ("driver version: %s\n", bufp); + + if ((retval = otg_probe (otg)) == 0) { + pci_set_drvdata (pdev, otg); + return 0; + } + + /* something went wrong */ + +/*** HS-A0 WA: BUG-3885: VB_SESS_VLD value too high ***/ +/*** HS-A0 WA: BUG-3943: gadget suspend issue ***/ +/*** HS-A0 WA: BUG-3950: gadget disconnect notification ***/ +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + + otg->got_irq = 0; + free_irq (pdev->irq, otg); +err5: + +#endif + otg->regs = NULL; + iounmap (base); +err4: + otg->region = 0; + release_mem_region (resource, len); +err3: + otg->enabled = 0; + pci_disable_device (pdev); +err2: + otg->pdev = NULL; + the_controller = NULL; + DBG ( "kfree: OTG driver: %p\n", otg); + kfree (otg); +err1: + otg = NULL; + return retval; +} + +/** + * \brief + * OTG PCI remove: clean-up, disable controller hardware + * + * \param pdev pci device info + * + * \return void + */ +static void __exit otg_pci_remove (struct pci_dev *pdev) +{ + struct otg *otg = pci_get_drvdata (pdev); + + otg_remove (otg); + +/*** HS-A0 WA: BUG-3885: VB_SESS_VLD value too high ***/ +/*** HS-A0 WA: BUG-3943: gadget suspend issue ***/ +/*** HS-A0 WA: BUG-3950: gadget disconnect notification ***/ +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + + otg->got_irq = 0; + free_irq (pdev->irq, otg); +#endif + iounmap (otg->regs); + otg->regs = NULL; + otg->region = 0; + release_mem_region (pci_resource_start(pdev, 0), + pci_resource_len(pdev, 0)); + otg->enabled = 0; + pci_disable_device (pdev); + otg->pdev = NULL; + the_controller = NULL; + DBG ( "kfree: OTG driver: %p\n", otg); + kfree (otg); + otg = NULL; + pci_set_drvdata(pdev, NULL); +} +#endif +#endif + + +/***************************************************************************** + * More data + *****************************************************************************/ + +#ifdef CONFIG_SOC_AU1200 +#ifndef USE_AU1200_PCI_DUMMY +/** + * \brief + * driver struct to be used for driver registration + * + */ +static struct device_driver otg_device_driver = { + .name = "au1xxx-uoc", + .bus = &platform_bus_type, + .probe = otg_drv_probe, + .remove = otg_drv_remove, +/* .suspend = otg_drv_suspend, */ +/* .resume = otg_drv_resume, */ +}; +#endif +#else +#ifdef CONFIG_PCI +/** + * \brief + * PCI ID table + * + */ +static struct pci_device_id pci_ids [] = { { + .vendor = PCI_VENDOR_ID_AMD, + .device = PCI_DEVICE_ID_AMD_CS5536_UOC, + .subvendor = PCI_ANY_ID, + .subdevice = PCI_ANY_ID, + .class = 0, + .class_mask = 0, + +}, { /* end: all zeroes */ } +}; + +/** + * \brief + * PCI driver struct to be used for driver registration + * ( this is a "new style" PCI driver module ) + * + */ +static struct pci_driver otg_pci_driver = { + .name = (char *) driver_name, + .id_table = pci_ids, + .probe = otg_pci_probe, + .remove = otg_pci_remove, +/* .suspend = otg_pci_suspend, */ +/* .resume = otg_pci_resume, */ +}; +MODULE_DEVICE_TABLE (pci, pci_ids); +#endif +#endif + +/* This comment closes the module definition from above. There can be multiple + definitions of this kind in a file. See the doxygen documentation for more + information. */ +/** \}*/ + +MODULE_DESCRIPTION (DRIVER_DESC); +MODULE_AUTHOR ("Karsten Boge"); +MODULE_LICENSE ("GPL"); + +#ifdef CONFIG_SOC_AU1200 +#ifdef USE_AU1200_PCI_DUMMY + +static int __init init (void) +{ + return otg_pci_probe (&pdev_dummy); +} +static void __exit cleanup (void) +{ + otg_pci_remove (&pdev_dummy); +} +#else + +static int __init init (void) +{ + return driver_register (&otg_device_driver); +} +static void __exit cleanup (void) +{ + driver_unregister (&otg_device_driver); +} +#endif +#else +#ifdef CONFIG_PCI + +static int __init init (void) +{ + return pci_module_init (&otg_pci_driver); +} +static void __exit cleanup (void) +{ + pci_unregister_driver (&otg_pci_driver); +} +#endif +#endif + +module_init (init); +module_exit (cleanup); diff --git a/drivers/usb/gadget/au1200uoc.h b/drivers/usb/gadget/au1200uoc.h new file mode 100644 index 0000000..9b4503e --- /dev/null +++ b/drivers/usb/gadget/au1200uoc.h @@ -0,0 +1,1338 @@ +/* + * AMD Au1200 USB OTG controller driver + */ + +/* + * Copyright (C) 2005 AMD (http://www.amd.com) + * Author: Karsten Boge + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef AU1200UOC_H +#define AU1200UOC_H + + +/***************************************************************************** +* Config options +*****************************************************************************/ + +#ifndef UDC_HSA0_WORKAROUNDS +#define UDC_HSA0_WORKAROUNDS +#endif + +/* #define USE_AU1200_PCI_DUMMY */ +#undef USE_AU1200_PCI_DUMMY + +#ifdef CONFIG_USB_OTG +#undef CONFIG_USB_OTGMUX_HOST +#undef CONFIG_USB_OTGMUX_GADGET +#undef CONFIG_USB_OTGMUX_IDPIN +#endif + +#ifdef CONFIG_USB_OTGMUX_IDPIN +#undef CONFIG_USB_OTGMUX_HOST +#ifndef CONFIG_USB_OTGMUX_GADGET +#define CONFIG_USB_OTGMUX_GADGET +#endif +#endif + +#ifndef OTG_HSA0_HNP_WA +#define OTG_HSA0_HNP_WA +#endif + +#ifdef VERBOSE +#ifndef DEBUG +#define DEBUG +#endif +#endif + + +/***************************************************************************** +* Constants +*****************************************************************************/ + +#define OTG_DRIVER_NAME "au1200otg" + +#define OTG_CHIPREV 0 + +#define OTG_FLAGS_ACTIV (1<<19) /* full OTG functionality is activ */ + +#ifndef CONFIG_SOC_AU1200 +#ifdef CONFIG_PCI +#ifndef PCI_VENDOR_ID_AMD +#define PCI_VENDOR_ID_AMD 0x1022 +#endif +#ifndef PCI_DEVICE_ID_AMD_CS5536_UOC +#define PCI_DEVICE_ID_AMD_CS5536_UOC 0x2097 +#endif +#else +#error "!!! UNKNOWN SYSTEM BUS TYPE !!!" +#endif +#endif + +#ifdef CONFIG_SOC_AU1200 +#define GPIO_2_BASE 200 +#define GPIO_215 215 +#define SYS_PINFUNC_P0A_GPIO (2<<17) +#ifdef CONFIG_MIPS_PB1200 +#define USB_VBUS_GPIO 3 /* AU1000_GPIO_3 */ +#endif +#ifdef CONFIG_MIPS_DB1200 +#define USB_VBUS_GPIO GPIO_215 +#endif +#if !(defined(CONFIG_MIPS_PB1200) || defined(CONFIG_MIPS_DB1200)) +#error "!!! UNKNOWN AU1200 BOARD !!!" +#endif +#endif + + +/********************************** +* UOC Register definitions +**********************************/ + +/* capabilities */ +#define OTG_CAP_APU (1<<15) /* automatic pull-up enable */ + +/* multiplexer */ +#define OTG_MUX_DISABLE_ALL 0 /* not assigned */ +#define OTG_MUX_ENABLE_UHC (2<<0) /* assigned to host */ +#define OTG_MUX_ENABLE_UDC (3<<0) /* assigned to device */ +#define OTG_MUX_PUEN (1<<2) /* pull-up enable */ +#define OTG_MUX_VBUSVLD (1<<8) /* VBus valid */ + +/* status */ +#define OTG_STS_ID (1<<0) /* ID pin status */ +#define OTG_STS_VBUSVLD (1<<1) /* VBus valid */ +#define OTG_STS_SESSVLD (1<<2) /* Session valid */ +#define OTG_STS_SESSEND (1<<3) /* Session end */ +#define OTG_STS_LST (3<<4) /* Line state */ +#define OTG_STS_LST_J (1<<4) /* Line state */ +#define OTG_STS_LST_K (2<<4) /* Line state */ +#define OTG_STS_PSPD (3<<6) /* Port speed */ +#define OTG_STS_PSPD_LS (2<<6) /* Port speed */ +#define OTG_STS_PSPD_FS (1<<6) /* Port speed */ +#define OTG_STS_FSOE (1<<8) /* FS output enable (OHC) */ +#define OTG_STS_PCON (1<<9) /* Port connected */ +#define OTG_STS_PSUS (1<<10) /* Port suspended */ +#define OTG_STS_TMH (1<<11) /* Timer halted */ +#define OTG_STS_HNP_EN (1<<12) /* HNP enabled for B-dev */ +#define OTG_STS_HNP_SUPP (1<<13) /* A-host supports HNP */ +#define OTG_STS_HNP_ALTSUPP (1<<14) /* A-host supports alt. HNP */ +#define OTG_STS_HNPSTS (OTG_STS_HNP_EN | OTG_STS_HNP_SUPP | \ + OTG_STS_HNP_ALTSUPP) +#define OTG_STS_OC (1<<15) /* over-current */ +#define OTG_STS_DPR (1<<16) /* Downstream port reset */ + +/* control */ +#define OTG_CTL_DISABLE_ALL 0 /* not assigned */ +#define OTG_CTL_ENABLE_UHC (2<<0) /* assigned to host */ +#define OTG_CTL_ENABLE_UDC (3<<0) /* assigned to device */ +#define OTG_CTL_MUX_MASK (3<<0) /* port mux mask */ +#define OTG_CTL_PPWR (1<<2) /* port power switch */ +#define OTG_CTL_PPO (1<<3) /* port power override */ +#define OTG_CTL_CHRG (1<<4) /* charge VBus */ +#define OTG_CTL_DISCHRG (1<<5) /* discharge VBus */ +#define OTG_CTL_IDSNSEN (1<<6) /* ID sense enable, ID-PU */ +#define OTG_CTL_PADEN (1<<7) +#define OTG_CTL_PUEN (1<<8) /* pull-up enable */ +#define OTG_CTL_DMPDEN (1<<9) /* pull-down enable */ +#define OTG_CTL_HNPSFEN (1<<10) /* HNP SET_FEATURE enable */ +#define OTG_CTL_WPCS_DEAS (2<<16) /* deassert port connect */ +#define OTG_CTL_WPCS_ASRT (3<<16) /* assert port connect */ +#define OTG_CTL_WPSS_DEAS (2<<18) /* deassert port suspend */ +#define OTG_CTL_WPSS_ASRT (3<<18) /* assert port suspend */ +/* timer conditions */ +#define OTG_CTL_TMR_RLP (1<<28) /* timer reload policy */ +#define OTG_CTL_TMR_ALL (0xf<<24) /* stop timer */ +#define OTG_CTL_TMR_STOP 0 /* timer disabled */ +#define OTG_CTL_TMR_UNCOND (1<<24) /* count unconditionally */ +#define OTG_CTL_TMR_SE0 (2<<24) /* count if LSt = FS-SE0 */ +#define OTG_CTL_TMR_FSJ (3<<24) /* count if LSt = FS-J */ +#define OTG_CTL_TMR_FSK (4<<24) /* count if LSt = FS-K */ +#define OTG_CTL_TMR_NOSE0 (5<<24) /* count if LSt <> FS-SE0 */ +#define OTG_CTL_TMR_NORX (6<<24) /* count if Rx inactiv */ +#define OTG_CTL_TMR_ID (7<<24) /* count if ID = 0 */ + +/* interrupts */ +#define OTG_INT_GLOBAL (1<<31) /* global interrupt enable */ +#define OTG_INT_ENALL 0x7fff /* enable all */ +#define OTG_INT_DISALL 0 /* disable all */ +#define OTG_INT_IDC (1<<0) /* ID pin change */ +#define OTG_INT_VBVC (1<<1) /* VBUS valid change */ +#define OTG_INT_SVC (1<<2) /* Session valid change */ +#define OTG_INT_SEC (1<<3) /* Session end change */ +#define OTG_INT_LSTC (1<<4) /* Line state change */ +#define OTG_INT_PSPDC (1<<5) /* Port speed change */ +#define OTG_INT_FSOEC (1<<6) /* FS/LS OE change */ +#define OTG_INT_HSDD (1<<7) /* HS disconnect detected */ +#define OTG_INT_RXACT (1<<8) /* Rx activity detected */ +#define OTG_INT_PCC (1<<9) /* Port connect change */ +#define OTG_INT_PSC (1<<10) /* Port suspend change */ +#define OTG_INT_TMX (1<<11) /* Timer expired */ +#define OTG_INT_HNPFC (1<<12) /* HNP feature change */ +#define OTG_INT_OCD (1<<13) /* over current detected */ +#define OTG_INT_DPRC (1<<14) /* Downstream port reset change */ + +/*** HS-A0 WA: BUG-3885: VB_SESS_VLD value too high ***/ +/*** HS-A0 WA: BUG-3950: gadget SV notification ***/ +#ifdef UDC_HSA0_WORKAROUNDS +#define OTG_INT_ADDS OTG_INT_SVC +#endif + + +/********************************** +* OTG state dependend data +**********************************/ + +/* + * generic + */ +#define OTG_CTL_DEFAULT (OTG_CTL_PADEN | \ + OTG_CTL_IDSNSEN) +#define OTG_CTL_HOST_DEFAULT (OTG_CTL_DEFAULT | \ + OTG_CTL_ENABLE_UHC) +#ifdef UDC_HSA0_WORKAROUNDS +/*** HS-A0 WA: BUG-3885: VB_SESS_VLD value too high ***/ +/*** HS-A0 WA: BUG-3943: gadget suspend issue ***/ +#ifdef CONFIG_USB_OTG +#define OTG_CTL_PERIPHERAL_DEFAULT (OTG_CTL_DEFAULT | \ + OTG_CTL_HNPSFEN | \ + OTG_CTL_ENABLE_UDC | \ + OTG_CTL_PPO | OTG_CTL_PUEN) +#else +#define OTG_CTL_PERIPHERAL_DEFAULT (OTG_CTL_DEFAULT | \ + OTG_CTL_ENABLE_UDC | \ + OTG_CTL_PPO | OTG_CTL_PUEN) +#endif +#else +#ifdef CONFIG_USB_OTG +#define OTG_CTL_PERIPHERAL_DEFAULT (OTG_CTL_DEFAULT | \ + OTG_CTL_HNPSFEN | \ + OTG_CTL_ENABLE_UDC | OTG_CTL_PPO) +#else +#define OTG_CTL_PERIPHERAL_DEFAULT (OTG_CTL_DEFAULT | \ + OTG_CTL_ENABLE_UDC | OTG_CTL_PPO) +#endif +#endif + +#define OTG_INT_DEFAULT OTG_INT_IDC + +/* + * OTG_STATE_UNDEFINED + */ +#define OTG_STATE_UNDEFINED_CONTROL (OTG_CTL_DEFAULT | OTG_CTL_PPO | \ + OTG_CTL_TMR_UNCOND) +#define OTG_STATE_UNDEFINED_STATUS 0 +#define OTG_STATE_UNDEFINED_STATUS_MASK 0 +#define OTG_STATE_UNDEFINED_INTERRUPTS OTG_INT_TMX + +/* + * OTG_STATE_A_IDLE + */ +#define OTG_STATE_A_IDLE_CONTROL (OTG_CTL_DEFAULT | OTG_CTL_PPO) +#define OTG_STATE_A_IDLE_STATUS 0 +#define OTG_STATE_A_IDLE_STATUS_MASK 0 +#define OTG_STATE_A_IDLE_INTERRUPTS (OTG_INT_DEFAULT | OTG_INT_SVC | \ + OTG_INT_LSTC) + +/* + * OTG_STATE_A_IDLE_WAIT_DP + */ +#define OTG_STATE_A_IDLE_WAIT_DP_CONTROL (OTG_STATE_A_IDLE_CONTROL | \ + OTG_CTL_TMR_UNCOND) +#define OTG_STATE_A_IDLE_WAIT_DP_STATUS 0 +#define OTG_STATE_A_IDLE_WAIT_DP_STATUS_MASK 0 +#define OTG_STATE_A_IDLE_WAIT_DP_INTERRUPTS (OTG_STATE_A_IDLE_INTERRUPTS | \ + OTG_INT_TMX) + +/* + * OTG_STATE_A_IDLE_WAIT_VP + */ +#define OTG_STATE_A_IDLE_WAIT_VP_CONTROL (OTG_STATE_A_IDLE_CONTROL | \ + OTG_CTL_TMR_UNCOND) +#define OTG_STATE_A_IDLE_WAIT_VP_STATUS 0 +#define OTG_STATE_A_IDLE_WAIT_VP_STATUS_MASK 0 +#define OTG_STATE_A_IDLE_WAIT_VP_INTERRUPTS (OTG_STATE_A_IDLE_INTERRUPTS | \ + OTG_INT_TMX) + +/* + * OTG_STATE_A_IDLE_WAIT_MP + */ +#define OTG_STATE_A_IDLE_WAIT_MP_CONTROL (OTG_STATE_A_IDLE_CONTROL | \ + OTG_CTL_TMR_UNCOND) +#define OTG_STATE_A_IDLE_WAIT_MP_STATUS 0 +#define OTG_STATE_A_IDLE_WAIT_MP_STATUS_MASK 0 +#define OTG_STATE_A_IDLE_WAIT_MP_INTERRUPTS (OTG_STATE_A_IDLE_INTERRUPTS | \ + OTG_INT_TMX) + +/* + * OTG_STATE_A_IDLE_WAIT_DV + */ +#define OTG_STATE_A_IDLE_WAIT_DV_CONTROL (OTG_STATE_A_IDLE_CONTROL | \ + OTG_CTL_TMR_UNCOND) +#define OTG_STATE_A_IDLE_WAIT_DV_STATUS 0 +#define OTG_STATE_A_IDLE_WAIT_DV_STATUS_MASK 0 +#define OTG_STATE_A_IDLE_WAIT_DV_INTERRUPTS (OTG_STATE_A_IDLE_INTERRUPTS | \ + OTG_INT_TMX) + +/* + * OTG_STATE_A_WAIT_VRISE + */ +#define OTG_STATE_A_WAIT_VRISE_CONTROL (OTG_CTL_HOST_DEFAULT | \ + OTG_CTL_TMR_UNCOND) +#define OTG_STATE_A_WAIT_VRISE_STATUS 0 +#define OTG_STATE_A_WAIT_VRISE_STATUS_MASK 0 +#define OTG_STATE_A_WAIT_VRISE_INTERRUPTS (OTG_INT_DEFAULT | OTG_INT_TMX | \ + OTG_INT_VBVC) + +/* + * OTG_STATE_A_WAIT_BCON + */ +#define OTG_STATE_A_WAIT_BCON_CONTROL OTG_CTL_HOST_DEFAULT +#define OTG_STATE_A_WAIT_BCON_STATUS 0 +#define OTG_STATE_A_WAIT_BCON_STATUS_MASK 0 +#define OTG_STATE_A_WAIT_BCON_INTERRUPTS (OTG_INT_DEFAULT | OTG_INT_TMX | \ + OTG_INT_VBVC | OTG_INT_PCC) + +/* + * OTG_STATE_A_WAIT_BCON_VB + */ +#define OTG_STATE_A_WAIT_BCON_VB_CONTROL (OTG_STATE_A_WAIT_BCON_CONTROL | \ + OTG_CTL_TMR_UNCOND) +#define OTG_STATE_A_WAIT_BCON_VB_STATUS 0 +#define OTG_STATE_A_WAIT_BCON_VB_STATUS_MASK 0 +#define OTG_STATE_A_WAIT_BCON_VB_INTERRUPTS OTG_STATE_A_WAIT_BCON_INTERRUPTS + +/* + * OTG_STATE_A_HOST + */ +#define OTG_STATE_A_HOST_CONTROL OTG_CTL_HOST_DEFAULT +#define OTG_STATE_A_HOST_STATUS 0 +#define OTG_STATE_A_HOST_STATUS_MASK 0 +#ifdef CONFIG_USB_OTG +#ifndef VERBOSE +#define OTG_STATE_A_HOST_INTERRUPTS (OTG_INT_DEFAULT | \ + OTG_INT_VBVC | OTG_INT_DPRC | \ + OTG_INT_PCC | OTG_INT_PSC) +#else +#define OTG_STATE_A_HOST_INTERRUPTS (OTG_INT_DEFAULT | \ + OTG_INT_VBVC | OTG_INT_DPRC | \ + OTG_INT_PCC | OTG_INT_PSC | \ + OTG_INT_PSPDC) + /* OTG_INT_LSTC */ +#endif +#else + /* IDPIN mode only */ +#define OTG_STATE_A_HOST_INTERRUPTS OTG_INT_IDC +#endif + +/* + * OTG_STATE_A_SUSPEND + */ +#define OTG_STATE_A_SUSPEND_CONTROL (OTG_CTL_HOST_DEFAULT | \ + OTG_CTL_TMR_UNCOND) +#define OTG_STATE_A_SUSPEND_STATUS 0 +#define OTG_STATE_A_SUSPEND_STATUS_MASK 0 +#define OTG_STATE_A_SUSPEND_INTERRUPTS (OTG_INT_DEFAULT | OTG_INT_TMX | \ + OTG_INT_VBVC | OTG_INT_DPRC | \ + OTG_INT_PCC | OTG_INT_PSC) + +/* + * OTG_STATE_A_PERIPHERAL + */ +#define OTG_STATE_A_PERIPHERAL_CONTROL (OTG_CTL_PERIPHERAL_DEFAULT | \ + OTG_CTL_PPWR | OTG_CTL_DMPDEN) +#define OTG_STATE_A_PERIPHERAL_STATUS 0 +#define OTG_STATE_A_PERIPHERAL_STATUS_MASK 0 +#ifndef VERBOSE +#define OTG_STATE_A_PERIPHERAL_INTERRUPTS (OTG_INT_DEFAULT | \ + OTG_INT_VBVC | OTG_INT_OCD | \ + OTG_INT_PCC | OTG_INT_PSC) +#else +#define OTG_STATE_A_PERIPHERAL_INTERRUPTS (OTG_INT_DEFAULT | \ + OTG_INT_VBVC | OTG_INT_OCD | \ + OTG_INT_PCC | OTG_INT_PSC | \ + OTG_INT_PSPDC) + /* OTG_INT_LSTC */ +#endif + +/* + * OTG_STATE_A_VBUS_ERR + */ +#define OTG_STATE_A_VBUS_ERR_CONTROL (OTG_CTL_HOST_DEFAULT | \ + OTG_CTL_PPO | OTG_CTL_DISCHRG) +#define OTG_STATE_A_VBUS_ERR_STATUS 0 +#define OTG_STATE_A_VBUS_ERR_STATUS_MASK 0 +#define OTG_STATE_A_VBUS_ERR_INTERRUPTS OTG_INT_DEFAULT + +/* + * OTG_STATE_A_WAIT_VFALL + */ +#define OTG_STATE_A_WAIT_VFALL_CONTROL (OTG_CTL_HOST_DEFAULT | \ + OTG_CTL_PPO) +#define OTG_STATE_A_WAIT_VFALL_STATUS 0 +#define OTG_STATE_A_WAIT_VFALL_STATUS_MASK 0 +#define OTG_STATE_A_WAIT_VFALL_INTERRUPTS (OTG_INT_DEFAULT | OTG_INT_SEC) + +/* + * OTG_STATE_A_WAIT_VFALL_DN + */ +#define OTG_STATE_A_WAIT_VFALL_DN_CONTROL (OTG_STATE_A_WAIT_VFALL_CONTROL | \ + OTG_CTL_DISCHRG) +#define OTG_STATE_A_WAIT_VFALL_DN_STATUS 0 +#define OTG_STATE_A_WAIT_VFALL_DN_STATUS_MASK 0 +#define OTG_STATE_A_WAIT_VFALL_DN_INTERRUPTS OTG_STATE_A_WAIT_VFALL_INTERRUPTS + +/* + * OTG_STATE_A_WAIT_BDISCON + */ +#define OTG_STATE_A_WAIT_BDISCON_CONTROL (OTG_CTL_DEFAULT | \ + OTG_CTL_PPO | OTG_CTL_PPWR | \ + OTG_CTL_TMR_UNCOND) +#define OTG_STATE_A_WAIT_BDISCON_STATUS 0 +#define OTG_STATE_A_WAIT_BDISCON_STATUS_MASK 0 +#define OTG_STATE_A_WAIT_BDISCON_INTERRUPTS (OTG_INT_DEFAULT | OTG_INT_TMX | \ + OTG_INT_VBVC | OTG_INT_OCD | \ + OTG_INT_PSPDC | OTG_INT_LSTC) + +/* + * OTG_STATE_B_IDLE + */ +/*** HS-A0 WA: BUG-3885: VB_SESS_VLD value too high ***/ +/*** HS-A0 WA: BUG-3943: gadget suspend issue ***/ +#ifdef UDC_HSA0_WORKAROUNDS +#define OTG_STATE_B_IDLE_CONTROL (OTG_CTL_PERIPHERAL_DEFAULT & \ + ~((u32) (OTG_CTL_PUEN | \ + OTG_CTL_ENABLE_UDC))) +#else +#define OTG_STATE_B_IDLE_CONTROL OTG_CTL_PERIPHERAL_DEFAULT +#endif +#define OTG_STATE_B_IDLE_STATUS 0 +#define OTG_STATE_B_IDLE_STATUS_MASK 0 +#ifdef CONFIG_USB_OTG +#define OTG_STATE_B_IDLE_INTERRUPTS (OTG_INT_DEFAULT | OTG_INT_SVC) +#else +#ifdef CONFIG_USB_OTGMUX_IDPIN + /* IDPIN mode */ +#define OTG_STATE_B_IDLE_INTERRUPTS (OTG_INT_IDC | OTG_INT_SVC) +#else + /* gadget mode */ +#define OTG_STATE_B_IDLE_INTERRUPTS OTG_INT_SVC +#endif +#endif + +/* + * OTG_STATE_B_PERIPHERAL + */ +#define OTG_STATE_B_PERIPHERAL_CONTROL (OTG_CTL_PERIPHERAL_DEFAULT | \ + OTG_CTL_DMPDEN) +#define OTG_STATE_B_PERIPHERAL_STATUS 0 +#define OTG_STATE_B_PERIPHERAL_STATUS_MASK 0 +#ifdef CONFIG_USB_OTG +#ifndef VERBOSE +#define OTG_STATE_B_PERIPHERAL_INTERRUPTS (OTG_INT_DEFAULT | OTG_INT_SVC | \ + OTG_INT_PCC | OTG_INT_PSC | \ + OTG_INT_HNPFC) +#else +#define OTG_STATE_B_PERIPHERAL_INTERRUPTS (OTG_INT_DEFAULT | OTG_INT_SVC | \ + OTG_INT_PCC | OTG_INT_PSC | \ + OTG_INT_HNPFC | OTG_INT_PSPDC) + /* OTG_INT_LSTC */ +#endif +#else +#ifdef CONFIG_USB_OTGMUX_IDPIN + /* IDPIN mode */ +#define OTG_STATE_B_PERIPHERAL_INTERRUPTS (OTG_INT_IDC | OTG_INT_SVC) +#else + /* gadget mode */ +#define OTG_STATE_B_PERIPHERAL_INTERRUPTS OTG_INT_SVC +#endif +#endif + +/* + * OTG_STATE_B_PERIPHERAL_WT + */ +#define OTG_STATE_B_PERIPHERAL_WT_CONTROL (OTG_STATE_B_PERIPHERAL_CONTROL | \ + OTG_CTL_PPO | OTG_CTL_TMR_UNCOND) +#define OTG_STATE_B_PERIPHERAL_WT_STATUS 0 +#define OTG_STATE_B_PERIPHERAL_WT_STATUS_MASK 0 +#define OTG_STATE_B_PERIPHERAL_WT_INTERRUPTS (OTG_STATE_B_PERIPHERAL_INTERRUPTS \ + | OTG_INT_TMX) + +/* + * OTG_STATE_B_PERIPHERAL_DC + */ +#define OTG_STATE_B_PERIPHERAL_DC_CONTROL (OTG_CTL_HOST_DEFAULT | \ + OTG_CTL_PPO | OTG_CTL_DMPDEN | \ + OTG_CTL_TMR_UNCOND) +#define OTG_STATE_B_PERIPHERAL_DC_STATUS 0 +#define OTG_STATE_B_PERIPHERAL_DC_STATUS_MASK 0 +#define OTG_STATE_B_PERIPHERAL_DC_INTERRUPTS (OTG_STATE_B_PERIPHERAL_INTERRUPTS \ + | OTG_INT_TMX | OTG_INT_LSTC) + +/* + * OTG_STATE_B_WAIT_ACON + */ +#define OTG_STATE_B_WAIT_ACON_CONTROL (OTG_CTL_HOST_DEFAULT | \ + OTG_CTL_PPO | OTG_CTL_TMR_UNCOND) +#define OTG_STATE_B_WAIT_ACON_STATUS 0 +#define OTG_STATE_B_WAIT_ACON_STATUS_MASK 0 +#define OTG_STATE_B_WAIT_ACON_INTERRUPTS (OTG_INT_DEFAULT | OTG_INT_SVC | \ + OTG_INT_PCC | OTG_INT_PSC | \ + OTG_INT_HNPFC | OTG_INT_TMX) + +/* + * OTG_STATE_B_HOST + */ +#define OTG_STATE_B_HOST_CONTROL (OTG_CTL_HOST_DEFAULT | \ + OTG_CTL_PPO) +#define OTG_STATE_B_HOST_STATUS 0 +#define OTG_STATE_B_HOST_STATUS_MASK 0 +#ifndef VERBOSE +#define OTG_STATE_B_HOST_INTERRUPTS (OTG_INT_DEFAULT | OTG_INT_SVC | \ + OTG_INT_PCC) +#else +#define OTG_STATE_B_HOST_INTERRUPTS (OTG_INT_DEFAULT | OTG_INT_SVC | \ + OTG_INT_PCC | OTG_INT_SVC | \ + OTG_INT_PSPDC) + /* OTG_INT_LSTC */ +#endif + +/* + * OTG_STATE_B_HOST_WT + */ +#define OTG_STATE_B_HOST_WT_CONTROL (OTG_STATE_B_HOST_CONTROL | \ + OTG_CTL_TMR_UNCOND) +#define OTG_STATE_B_HOST_WT_STATUS 0 +#define OTG_STATE_B_HOST_WT_STATUS_MASK 0 +#ifndef VERBOSE +#define OTG_STATE_B_HOST_WT_INTERRUPTS (OTG_INT_DEFAULT | OTG_INT_SVC | \ + OTG_INT_PCC | OTG_INT_TMX) +#else +#define OTG_STATE_B_HOST_WT_INTERRUPTS (OTG_STATE_B_HOST_INTERRUPTS | \ + OTG_INT_TMX) +/* +#define OTG_STATE_B_HOST_WT_INTERRUPTS (OTG_INT_DEFAULT | OTG_INT_SVC | \ + OTG_INT_PCC | OTG_INT_DPRC | \ + OTG_INT_TMX | OTG_INT_PSPDC) */ + /* OTG_INT_LSTC */ +#endif + +/* + * OTG_STATE_B_SRP_INIT + */ +#define OTG_STATE_B_SRP_INIT_CONTROL OTG_STATE_B_IDLE_CONTROL +#define OTG_STATE_B_SRP_INIT_STATUS 0 +#define OTG_STATE_B_SRP_INIT_STATUS_MASK 0 +#define OTG_STATE_B_SRP_INIT_INTERRUPTS OTG_INT_DEFAULT + +/* + * OTG_STATE_B_SRP_WTSE0 + */ +#define OTG_STATE_B_SRP_WAIT_SE0_CONTROL (OTG_STATE_B_SRP_INIT_CONTROL | \ + OTG_CTL_TMR_UNCOND) +#define OTG_STATE_B_SRP_WAIT_SE0_STATUS 0 +#define OTG_STATE_B_SRP_WAIT_SE0_STATUS_MASK 0 +#define OTG_STATE_B_SRP_WAIT_SE0_INTERRUPTS (OTG_STATE_B_SRP_INIT_INTERRUPTS \ + | OTG_INT_TMX | OTG_INT_LSTC) + +/* + * OTG_STATE_B_SRP_D_PLS + * + * note: changing to this state requires an additional call: + * set_srp_conditions (dev); + * reset_srp_conditions (dev) is required for the next state + */ +/*** HS-A0 WA: BUG-3885: VB_SESS_VLD value too high ***/ +/*** HS-A0 WA: BUG-3943: gadget suspend issue ***/ +/* note: set_/reset_srp_conditions is not needed if HS-A0 WAs are active + */ +#ifdef UDC_HSA0_WORKAROUNDS +#define OTG_STATE_B_SRP_D_PULSE_CONTROL (OTG_CTL_PERIPHERAL_DEFAULT | \ + OTG_CTL_PUEN | \ + OTG_CTL_TMR_UNCOND) +#else +#define OTG_STATE_B_SRP_D_PULSE_CONTROL (OTG_STATE_B_SRP_INIT_CONTROL | \ + OTG_CTL_PUEN | \ + OTG_CTL_TMR_UNCOND) +#endif +#define OTG_STATE_B_SRP_D_PULSE_STATUS 0 +#define OTG_STATE_B_SRP_D_PULSE_STATUS_MASK 0 +#define OTG_STATE_B_SRP_D_PULSE_INTERRUPTS (OTG_STATE_B_SRP_INIT_INTERRUPTS \ + | OTG_INT_SEC | OTG_INT_TMX) + +/* + * OTG_STATE_B_SRP_V_PLS + */ +#define OTG_STATE_B_SRP_V_PULSE_CONTROL (OTG_STATE_B_SRP_INIT_CONTROL | \ + OTG_CTL_CHRG | \ + OTG_CTL_TMR_UNCOND) +#define OTG_STATE_B_SRP_V_PULSE_STATUS 0 +#define OTG_STATE_B_SRP_V_PULSE_STATUS_MASK 0 +#define OTG_STATE_B_SRP_V_PULSE_INTERRUPTS (OTG_STATE_B_SRP_INIT_INTERRUPTS \ + | OTG_INT_TMX) + +/* + * OTG_STATE_B_SRP_V_DCG + */ +#define OTG_STATE_B_SRP_V_DCHRG_CONTROL (OTG_STATE_B_SRP_INIT_CONTROL | \ + OTG_CTL_DISCHRG | \ + OTG_CTL_TMR_UNCOND) +#define OTG_STATE_B_SRP_V_DCHRG_STATUS 0 +#define OTG_STATE_B_SRP_V_DCHRG_STATUS_MASK 0 +#define OTG_STATE_B_SRP_V_DCHRG_INTERRUPTS (OTG_STATE_B_SRP_INIT_INTERRUPTS \ + | OTG_INT_TMX) + +/* + * OTG_STATE_B_SRP_WTVB + */ +#define OTG_STATE_B_SRP_WAIT_VBUS_CONTROL (OTG_STATE_B_SRP_INIT_CONTROL | \ + OTG_CTL_TMR_UNCOND) +#define OTG_STATE_B_SRP_WAIT_VBUS_STATUS 0 +#define OTG_STATE_B_SRP_WAIT_VBUS_STATUS_MASK 0 +#define OTG_STATE_B_SRP_WAIT_VBUS_INTERRUPTS (OTG_STATE_B_SRP_INIT_INTERRUPTS \ + | OTG_INT_SVC | OTG_INT_TMX) + +/*********************************/ + +/* other */ + +#define OTG_APP_REQ_ACK 0 + + +/***************************************************************************** +* Types +*****************************************************************************/ + + +/***************************************************************************** +* Macros +*****************************************************************************/ + +/* printing messages */ +#ifndef INFO +#define INFO(args...) \ + printk(KERN_INFO DRIVER_NAME_FOR_PRINT ": " args) +#endif + +#ifndef WARN +#define WARN(args...) \ + printk(KERN_WARNING DRIVER_NAME_FOR_PRINT " warning: " args) +#endif + +#ifndef ERR +#define ERR(args...) \ + printk(KERN_ERR DRIVER_NAME_FOR_PRINT " error: " args) +#endif + +#ifndef DBG +#ifdef DEBUG +#define DBG(args...) \ + printk(KERN_DEBUG DRIVER_NAME_FOR_PRINT " debug: " args) +#else +#define DBG(args...) \ + do {} while (0) +#endif +#endif + +#ifndef VDBG +#ifdef VERBOSE +#define VDBG DBG +#else +#define VDBG(args...) \ + do { } while (0) +#endif +#endif + +/****************************************************************************/ + +/* this should always return "1" and print something in verbose mode */ +#ifdef VERBOSE +#define VDBG_SPC(fmt,args...) \ + (VDBG (fmt, args) ? 1 : 1) +#else +#define VDBG_SPC(fmt,args...) 1 +#endif + +/* query bit(s) (long: 32-bit access) */ +#define IS_BIT_RES(data, code) \ + (!((data) & (code)) ? \ + (VDBG_SPC (" OTG HW status: %s is reset\n", #data)) : 0) + +#define IS_BIT_SET(data, code) \ + (((data) & (code)) ? \ + (VDBG_SPC (" OTG HW status: %s is set\n", #data)) : 0) + +/* query SW flag(s) */ +#define IS_FLAG_RES(dev, data) \ + (!((data) & (dev)->params) ? \ + (VDBG_SPC (" OTG SW status: %s is reset\n", #data)) : 0) + +#define IS_FLAG_SET(dev, data) \ + (((data) & (dev)->params) ? \ + (VDBG_SPC (" OTG SW status: %s is set\n", #data)) : 0) + +/* query event bit(s) */ +#define GOT_EVENT(data, code) \ + (((data) & (code)) ? \ + (VDBG_SPC (" OTG event: %s\n", #data)) : 0) + +/* set SW flag */ +#ifdef VERBOSE +#define SET_FLAG(dev, data) \ + if (!((data) & (dev)->params)) \ + DBG (" OTG SW status change: set flag %s\n", #data); \ + (dev)->params |= (data) +#else +#define SET_FLAG(dev, data) \ + (dev)->params |= (data) +#endif + +/* reset SW flag */ +#ifdef VERBOSE +#define RES_FLAG(dev, data) \ + if ((data) & (dev)->params) \ + DBG (" OTG SW status change: reset flag %s\n", #data); \ + (dev)->params &= ~((u32) (data)) +#else +#define RES_FLAG(dev, data) \ + (dev)->params &= ~((u32) (data)) +#endif + +/* reset event bit */ +#define RES_EVENT(data, code) \ + (code) &= ~((u32) (data)) +/* NOTE: this is not really needed so far, might be replaced with */ +/* #define RES_EVENT(data, code) \ */ +/* do {} while (0) */ + +/* change OTG state */ +#ifdef CONFIG_USB_OTG +#define PREPARE_STATE_CHANGE_1ST(dev, new_state) \ + switch ((new_state) & OTG_STATE_MASK) { \ + case OTG_STATE_UNDEFINED: \ + set_undef_state_defaults((dev)); \ + break; \ + case OTG_STATE_A_IDLE: \ + set_a_state_defaults((dev)); \ + break; \ + case OTG_STATE_B_IDLE: \ + set_b_state_defaults((dev)); \ + break; \ + default: \ + break; \ + } \ + do {} while (0) +#else +#define PREPARE_STATE_CHANGE_1ST(dev, new_state) \ + do {} while (0) +#endif + +#ifdef CONFIG_SOC_AU1200 + +#if (USB_VBUS_GPIO < GPIO_2_BASE) +#define AU1000GPIO_SET_BIT(data) \ + au1000gpio_bit_set (data) +#define AU1000GPIO_CLR_BIT(data) \ + au1000gpio_bit_clear (data) +#define AU1000GPIO_INIT_BIT(data) \ + au1000gpio_bit_init (data) +#define AU1000GPIO_TERM_BIT(data) \ + au1000gpio_bit_term (data) +#else +#define AU1000GPIO_SET_BIT(data) \ + au1000gpio2_bit_set (data) +#define AU1000GPIO_CLR_BIT(data) \ + au1000gpio2_bit_clear (data) +#define AU1000GPIO_INIT_BIT(data) \ + au1000gpio2_bit_init (data) +#define AU1000GPIO_TERM_BIT(data) \ + au1000gpio2_bit_term (data) +#endif + +#define PREPARE_STATE_CHANGE_2ND(new_state_control) \ + if (((new_state_control) & OTG_CTL_PPO) && \ + (~(new_state_control) & OTG_CTL_PPWR)) \ + AU1000GPIO_SET_BIT(USB_VBUS_GPIO); \ + else \ + AU1000GPIO_CLR_BIT(USB_VBUS_GPIO) +#else +#define PREPARE_STATE_CHANGE_2ND(new_state_control) \ + do {} while (0) +#endif + +#define CHANGE_STATE(dev, new_state, pMask) \ + PREPARE_STATE_CHANGE_1ST(dev, new_state); \ + PREPARE_STATE_CHANGE_2ND(new_state##_CONTROL); \ + writel ((new_state##_CONTROL), &(dev)->regs->ctl); \ + *(pMask) = (new_state##_INTERRUPTS); \ + (dev)->transceiver.state = (new_state); \ + DBG ("OTG new state: %s\n", #new_state) + +/* verify OTG state */ +#ifndef CONFIG_OTG_TEST_MODE + +#define CHECK_STATE(dev, act_state, pMask) \ + *(pMask) = (act_state##_INTERRUPTS); \ + (dev)->prv_state = (act_state); \ + VDBG ("OTG state: %s\n", #act_state) +#else +#define CHECK_STATE(dev, act_state, pMask) \ + *(pMask) = (act_state##_INTERRUPTS); \ + (dev)->prv_state = (act_state); \ + if (((readl (&(dev)->regs->sts) ^ (act_state##_STATUS))) & \ + act_state##_STATUS_MASK) \ + WARN ("OTG warning: incorrect status\n"); \ + VDBG ("OTG state: %s\n", #act_state) +#endif + +/* set timer */ +#define SET_OTG_TIMER(dev, val) \ + set_timer ((dev), ((OTG_TMR_##val) * 100)) + +/* set timer ( <1ms ) */ +#define SET_OTG_TIMER_SHORT(dev, val) \ + set_timer ((dev), ((OTG_TMR_##val) / 10)) + +/* set timer ( >10ms ) */ +#define SET_OTG_TIMER_LONG(dev, val) \ + set_timer_long ((dev), ((OTG_TMR_##val) / 10)) + +#ifdef VERBOSE +#define HS_DISCON_WARNING() \ + if (!(OTG_CTL_ENABLE_UHC ^ \ + (OTG_CTL_MUX_MASK & readl (&dev->regs->ctl))) && \ + !(OTG_STS_PSPD & readl (&dev->regs->sts))) \ + DBG (" OTG warning: disable UHC from HS-mode\n") +#else +#define HS_DISCON_WARNING() \ + do { } while (0) +#endif + + +/***************************************************************************** +* Data +*****************************************************************************/ +struct otg_regs { + u32 cap; /* capabilities */ + u32 mux; /* mux */ + u32 sts; /* status */ + u32 ctl; /* control */ + u32 tmr; /* timer */ + u32 intr; /* interrupt request */ + u32 inten; /* interrupt enable */ +} __attribute__ ((packed)); + +struct otg { + spinlock_t lock; + unsigned enabled : 1, + got_irq : 1, + region : 1; + u16 chiprev; + + /* state variables */ + u8 prv_state; + u32 params; + void *otg_priv; + u8 hostcount; + +#ifdef CONFIG_SOC_AU1200 +#ifdef USE_AU1200_PCI_DUMMY + + struct pci_dev *pdev; +#else + struct platform_device *pdev; +#endif +#else + struct pci_dev *pdev; +#endif + struct otg_regs *regs; + struct otg_transceiver transceiver; +}; +#define transceiver_to_otg(pTransceiver) \ + container_of (pTransceiver, struct otg, transceiver) +#define otg_to_transceiver(pOtg) \ + &pOtg->transceiver + +#ifdef CONFIG_USB_OTG_TEST_INTERFACE +struct usb_otg_test_extension { + int (*bind) (struct otg **); + int (*unbind) (struct otg **); + int (*request) (u32); /* function call for state change requests */ + u32 (*query) (int); /* function call to query state */ +}; +#endif + +#ifdef __KERNEL__ + +/* 2.5 and 2.4.older portability changes ... */ + +#ifndef container_of +#define container_of list_entry +#endif + +#ifndef likely +#define likely(x) (x) +#define unlikely(x) (x) +#endif + +#ifndef BUG_ON +#define BUG_ON(condition) do { if (unlikely((condition)!=0)) BUG(); } while(0) +#endif + +#ifndef WARN_ON +#define WARN_ON(x) do { } while (0) +#endif + +#endif /* __KERNEL__ */ + +/***************************************************************************** +* Functions +*****************************************************************************/ +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) +extern int usb_gadget_register_otg (struct otg_transceiver * ( + *get_transceiver)(void)); +extern int usb_gadget_unregister_otg (void); + +#endif +#ifdef CONFIG_USB_OTG +u32 otg_change_state (struct otg *, u32, u32 *); +int otg_hnp_start_enum (struct otg_transceiver *); +#endif + +void otg_init_state (struct otg *); +int otg_exit_state (struct otg *); + +#ifdef DEBUG +static void print_regs (struct otg *); +#endif /* DEBUG */ + +#ifdef CONFIG_USB_OTG_TEST_INTERFACE +int usb_otg_test_register_driver (struct usb_otg_test_extension *); +int usb_otg_test_unregister_driver (void); +#endif + +/***************************************************************************** +* Inline Functions +*****************************************************************************/ + +extern u32 otg_tmr_high_count; +extern struct otg_ctl *otg_ctl; + +#ifdef CONFIG_USB_OTG +/** + * \brief + * set neutral state information + * + * \param dev OTG controller info + * + * \return void + */ +static inline void set_undef_state_defaults (struct otg *dev) +{ + dev->transceiver.default_a = 0; + if (dev->transceiver.host) { + dev->transceiver.host->is_b_host = 0; + } +#ifdef CONFIG_USB_OTG_HIGHSPEED + if (dev->transceiver.companion) { + dev->transceiver.companion->is_b_host = 0; + } +#endif + if (dev->transceiver.gadget) { + dev->transceiver.gadget->is_a_peripheral = 0; + } +} + +/** + * \brief + * set A state information + * + * \param dev OTG controller info + * + * \return void + */ +static inline void set_a_state_defaults (struct otg *dev) +{ + dev->transceiver.default_a = 1; + if (dev->transceiver.host) { + dev->transceiver.host->is_b_host = 0; + } +#ifdef CONFIG_USB_OTG_HIGHSPEED + if (dev->transceiver.companion) { + dev->transceiver.companion->is_b_host = 0; + } +#endif + if (dev->transceiver.gadget) { + dev->transceiver.gadget->is_a_peripheral = 1; + } +} + +/** + * \brief + * set B state information + * + * \param dev OTG controller info + * + * \return void + */ +static inline void set_b_state_defaults (struct otg *dev) +{ + dev->transceiver.default_a = 0; + if (dev->transceiver.host) { + dev->transceiver.host->is_b_host = 1; + } +#ifdef CONFIG_USB_OTG_HIGHSPEED + if (dev->transceiver.companion) { + dev->transceiver.companion->is_b_host = 1; + } +#endif + if (dev->transceiver.gadget) { + dev->transceiver.gadget->is_a_peripheral = 0; + } +} + +/** + * \brief + * set B state information + * + * \param dev OTG controller info + * + * \return void + */ +static inline void reset_b_hnp_enable (struct otg *dev) +{ + if (dev->transceiver.host) { + dev->transceiver.host->b_hnp_enable = 0; + } +#ifdef CONFIG_USB_OTG_HIGHSPEED + if (dev->transceiver.companion) { + dev->transceiver.companion->b_hnp_enable = 0; + } +#endif + VDBG (" OTG action: HNP disabled in B-device\n"); +} + +/** + * \brief + * set B state information + * + * \param dev OTG controller info + * + * \return void + */ +static inline int is_b_hnp_enabled (struct otg *dev) +{ + int retVal = 0; + + if (dev->transceiver.host && + dev->transceiver.host->b_hnp_enable) { + VDBG (" OTG status: HNP is enabled in HS-B-device\n"); + retVal = 1; + } +#ifdef CONFIG_USB_OTG_HIGHSPEED + else if (dev->transceiver.companion && + dev->transceiver.companion->b_hnp_enable) { + VDBG (" OTG status: HNP is enabled in FS-B-device\n"); + retVal = 1; + } +#endif +#ifdef VERBOSE + else { + DBG (" OTG status: HNP is disabled in B-device\n"); + } +#endif + return retVal; +} +#endif + +#if defined(CONFIG_USB_OTG) || defined(CONFIG_USB_OTGMUX_GADGET) + +/** + * \brief + * Read the status register + * + * \param dev OTG controller info + * + * \return status + */ +static inline u32 get_status (struct otg *dev) +{ + return (readl (&dev->regs->sts)); +} + +/** + * \brief + * Load and start the timer for an unconditional run + * + * \param dev OTG controller info + * \param val Value to load + * + * \return void + */ +static inline void set_timer (struct otg *dev, u32 val) +{ + otg_tmr_high_count = 0; + + writel ((val), &dev->regs->tmr); + VDBG (" OTG action: start timer: %d0 us\n", val); +} + +/** + * \brief + * Load and start the timer for an unconditional run + * + * \param dev OTG controller info + * \param val Value to load + * + * \return void + */ +static inline void set_timer_long (struct otg *dev, u32 val) +{ + otg_tmr_high_count = val - 1; + + writel (TIMER_PERIOD, &dev->regs->tmr); + VDBG (" OTG action: start timer: %d0 ms\n", val); +} + +/** + * \brief + * Re-start the timer (value already loaded) + * + * \param dev OTG controller info + * + * \return void + */ +static inline void restart_timer (struct otg *dev) +{ + writel ((readl (&dev->regs->ctl) | OTG_CTL_TMR_UNCOND), + &dev->regs->ctl); +} + +/** + * \brief + * Reset the timer while running (value already loaded) + * + * \param dev OTG controller info + * + * \return void + */ +static inline void reset_timer (struct otg *dev) +{ + u32 temp; + + temp = readl (&dev->regs->ctl); + writel ((temp & ~((u32) OTG_CTL_TMR_ALL)), &dev->regs->ctl); + writel (temp, &dev->regs->ctl); + VDBG (" OTG action: re-start timer\n"); +} + +/** + * \brief + * Prepare the D-pulse + * + * \param dev OTG controller info + * + * \return void + */ +static inline void set_srp_conditions (struct otg *dev) +{ +#ifdef UDC_HSA0_WORKAROUNDS + VDBG (" OTG action: SRP init: no action needed due to A0 WAs\n"); +#else + writel ((readl (&dev->regs->cap) & ~((u32) OTG_CAP_APU)), + &dev->regs->cap); + VDBG (" OTG action: set SRP conditions: disable APU\n"); +#endif +} + +/** + * \brief + * Reset conditions after SRP + * + * activates the auto-pull-up feature so after SRP the host + * will detect a device connect after calling this function + * + * \param dev OTG controller info + * + * \return void + */ +static inline void reset_srp_conditions (struct otg *dev) +{ +#ifdef UDC_HSA0_WORKAROUNDS + VDBG (" OTG action: SRP done: no action needed due to A0 WAs\n"); +#else + writel ((readl (&dev->regs->cap) | OTG_CAP_APU), + &dev->regs->cap); + VDBG (" OTG action: reset SRP conditions: enable APU\n"); +#endif +} + +/** + * \brief + * enable HNP for both devices + * + * \param dev OTG controller info + * + * \return success + */ +static inline int otg_enable_hnp (struct otg *dev) +{ + int retVal = 0; + +/* if (!dev->device) { + ERR ("Tried to send OTG request, device pointer not valid\n"); + retVal = -ENODEV; + } + else { + retVal = usb_otg_enable_b_hnp (dev->device); + DBG (" OTG action: enabled HNP in B-device\n"); + } + if (retVal < 0) { + RES_FLAG (OTG_A_bHNP_EN); + } + else { + SET_FLAG (OTG_A_bHNP_EN); + }*/ + return retVal; +} + +#endif /* CONFIG_USB_OTG || CONFIG_USB_OTGMUX_GADGET */ +#ifdef DEBUG +/** + * \brief + * Print OTG controller registers (debug mode only) + * + * \param dev OTG controller info + * + * \return void + */ +static inline void print_regs (struct otg *dev) +{ + DBG( "-- UOC registers ---\n"); + DBG( "otg cap = %08x\n", readl (&dev->regs->cap)); + DBG( "otg mux = %08x\n", readl (&dev->regs->mux)); + DBG( "otg sts = %08x\n", readl (&dev->regs->sts)); + DBG( "otg ctl = %08x\n", readl (&dev->regs->ctl)); + DBG( "otg tmr = %08x\n", readl (&dev->regs->tmr)); + DBG( "otg intr = %08x\n", readl (&dev->regs->intr)); + DBG( "otg inten = %08x\n", readl (&dev->regs->inten)); + DBG( "--------------------\n"); +} +#endif /* DEBUG */ + +#ifdef CONFIG_SOC_AU1200 + +/** + * \brief + * GPIO functions (Au1200 only) + * + * \param data pin info + * + * \return success + */ +static inline int au1000gpio_bit_get (u32 data) +{ + return (au_readl ((SYS_PINSTATERD & (1 << data)) ? 1 : 0)); +} + +#ifdef CONFIG_AU1X00_GPIO + + /* GPIO functions are defined in drivers/char/au1000_gpio.c */ + +#else + +static inline int au1000gpio_bit_tristate (u32 data) +{ + au_writel ((1 << data), SYS_TRIOUTCLR); + return 0; +} + +static inline int au1000gpio_bit_set (u32 data) +{ + au_writel ((1 << data), SYS_OUTPUTSET); + return 0; +} + +static inline int au1000gpio_bit_clear (u32 data) +{ + au_writel ((1 << data), SYS_OUTPUTCLR); + return 0; +} + +static inline int au1000gpio_bit_init (u32 data) +{ + return au1000gpio_bit_set (data); +} + +static inline int au1000gpio_bit_term (u32 data) +{ + return au1000gpio_bit_set (data); +} + +static inline int au1000gpio2_bit_set (u32 data) +{ + au_writel (((1 << (data - GPIO_2_BASE)) | + (1 << (data - GPIO_2_BASE + 0x10))), GPIO2_OUTPUT); + au_sync(); + return 0; +} + +static inline int au1000gpio2_bit_clear (u32 data) +{ + au_writel ((1 << (data - GPIO_2_BASE + 0x10)), GPIO2_OUTPUT); + au_sync(); + return 0; +} + +static inline int au1000gpio2_bit_init (u32 data) +{ + u32 temp = au_readl (GPIO2_ENABLE); + + if (!(temp | 1)) { + au_writel (temp | 1, GPIO2_ENABLE); + au_readl (GPIO2_ENABLE); + udelay (20); + } + if (temp | 2) { + au_writel (((temp & 0xfffffffd) | 1), GPIO2_ENABLE); + au_readl (GPIO2_ENABLE); + } + + /* FIXME: check the system impact of the P0A setting */ + /* DbAu1200 pin (GPIO_215) pin is shared w/ PSC0 functions */ + /* setting this field to GPIO affects also GPIO_16, GPIO_31 */ + + if (data == GPIO_215) { + au_writel (((au_readl (SYS_PINFUNC) & + ~((u32) SYS_PINFUNC_P0A)) | SYS_PINFUNC_P0A_GPIO), + SYS_PINFUNC); + } + au_writel (au_readl (GPIO2_INTENABLE) & ~(1 << (data - GPIO_2_BASE)), + GPIO2_INTENABLE); + au_writel (au_readl (GPIO2_DIR) | (1 << (data - GPIO_2_BASE)), + GPIO2_DIR); + au_sync(); + return 0; +} + +static inline int au1000gpio2_bit_term (u32 data) +{ + return au1000gpio2_bit_set (data); +} +#endif +#endif /* CONFIG_SOC_AU1200 */ + +#endif /* AU1200UOC_H */ diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c index 8f402f8..e147883 100644 --- a/drivers/usb/gadget/ether.c +++ b/drivers/usb/gadget/ether.c @@ -91,6 +91,13 @@ static const char driver_desc [] = DRIVE #define RX_EXTRA 20 /* guard against rx overflows */ +#ifdef CONFIG_USB_GADGET_AU1200UDC +/* + * AMD UDC supports dword aligned DMA buffers only, so skbuf buffers + * from network layer must be copied + */ +#define UDC_MAX_BUFLEN 2048 /* size of dword aligned buffer */ +#endif #include "rndis.h" #ifndef CONFIG_USB_ETH_RNDIS @@ -151,8 +158,13 @@ struct eth_dev { /* Thanks to NetChip Technologies for donating this product ID. * It's for devices with only CDC Ethernet configurations. */ +#ifdef CONFIG_USB_GADGET_AU1200UDC +#define CDC_VENDOR_NUM 0x0438 /* AMD */ +#define CDC_PRODUCT_NUM 0xdc01 /* AMD Linux-USB Ethernet Gadget (temporary) */ +#else #define CDC_VENDOR_NUM 0x0525 /* NetChip */ #define CDC_PRODUCT_NUM 0xa4a1 /* Linux-USB Ethernet Gadget */ +#endif /* For hardware that can't talk CDC, we use the same vendor ID that * ARM Linux has used for ethernet-over-usb, both with sa1100 and @@ -253,6 +265,10 @@ MODULE_PARM_DESC(host_addr, "Host Ethern #define DEV_CONFIG_CDC #endif +#ifdef CONFIG_USB_GADGET_AU1200UDC +#define DEV_CONFIG_CDC +#endif + /* For CDC-incapable hardware, choose the simple cdc subset. * Anything that talks bulk (without notable bugs) can do this. @@ -1056,6 +1072,10 @@ static void eth_reset_config (struct eth req = container_of (dev->tx_reqs.next, struct usb_request, list); list_del (&req->list); +#ifdef CONFIG_USB_GADGET_AU1200UDC + if (req->buf) + usb_ep_free_buffer (dev->in_ep, req->buf, req->dma, UDC_MAX_BUFLEN); +#endif usb_ep_free_request (dev->in_ep, req); } } @@ -1065,6 +1085,10 @@ static void eth_reset_config (struct eth req = container_of (dev->rx_reqs.next, struct usb_request, list); list_del (&req->list); +#ifdef CONFIG_USB_GADGET_AU1200UDC + if (req->buf) + usb_ep_free_buffer (dev->out_ep, req->buf, req->dma, UDC_MAX_BUFLEN); +#endif usb_ep_free_request (dev->out_ep, req); } } @@ -1632,7 +1656,9 @@ rx_submit (struct eth_dev *dev, struct u */ skb_reserve(skb, NET_IP_ALIGN); +#ifndef CONFIG_USB_GADGET_AU1200UDC req->buf = skb->data; +#endif req->length = size; req->complete = rx_complete; req->context = skb; @@ -1674,6 +1700,16 @@ static void rx_complete (struct usb_ep * break; } +#ifdef CONFIG_USB_GADGET_AU1200UDC + /* we need to copy here because AMD UDC needs dword aligned buffers */ + VDEBUG(dev, "memcpy( skb->data %lx,req->buf %lx,req->actual %d)\n", skb->data,req->buf,req->actual); + if (req->actual <= UDC_MAX_BUFLEN) { + memcpy(skb->data, req->buf, req->actual); + } + else { + ERROR(dev, "memcpy of %d bytes bigger than max %d\n", req->actual, UDC_MAX_BUFLEN); + } +#endif skb->dev = dev->net; skb->protocol = eth_type_trans (skb, dev->net); dev->stats.rx_packets++; @@ -1742,6 +1778,15 @@ static int prealloc (struct list_head *l req = usb_ep_alloc_request (ep, gfp_flags); if (!req) return list_empty (list) ? -ENOMEM : 0; + + +#ifdef CONFIG_USB_GADGET_AU1200UDC + /* allocate buffer which must be dword aligned for AMD UDC */ + req->buf = usb_ep_alloc_buffer (ep, UDC_MAX_BUFLEN, + &req->dma, GFP_ATOMIC); +#endif + + list_add (&req->list, list); } return 0; @@ -1753,6 +1798,10 @@ extra: next = req->list.next; list_del (&req->list); +#ifdef CONFIG_USB_GADGET_AU1200UDC + if (req->buf) + usb_ep_free_buffer (ep, req->buf, req->dma, UDC_MAX_BUFLEN); +#endif usb_ep_free_request (ep, req); if (next == list) @@ -1905,7 +1954,19 @@ static int eth_start_xmit (struct sk_buf rndis_add_hdr (skb); length = skb->len; } - req->buf = skb->data; +#ifdef CONFIG_USB_GADGET_AU1200UDC + /* we need to copy here because AMD UDC needs dword aligned buffers */ + VDEBUG(dev, "memcpy(req->buf %lx, skb->data %lx, length %d)", req->buf, skb->data, length); + if (length <= UDC_MAX_BUFLEN) { + memcpy(req->buf, skb->data, length); + } + else { + ERROR(dev, "memcpy of %d bytes bigger than max %d\n", length, UDC_MAX_BUFLEN); + } + VDEBUG(dev, "past memcpy(req->buf %lx, skb->data %lx, length %d)", req->buf, skb->data, length); +#else + req->buf = skb->data; +#endif req->context = skb; req->complete = tx_complete; @@ -2202,6 +2263,8 @@ eth_bind (struct usb_gadget *gadget) /* sh doesn't support multiple interfaces or configs */ cdc = 0; rndis = 0; + } else if (gadget_is_au1200udc(gadget)) { + rndis = 0; } else if (gadget_is_sa1100 (gadget)) { /* hardware can't write zlps */ zlp = 0; diff --git a/drivers/usb/gadget/file_storage.c b/drivers/usb/gadget/file_storage.c index ea09aaa..ae800e6 100644 --- a/drivers/usb/gadget/file_storage.c +++ b/drivers/usb/gadget/file_storage.c @@ -263,8 +263,14 @@ MODULE_LICENSE("Dual BSD/GPL"); * * DO NOT REUSE THESE IDs with any other driver!! Ever!! * Instead: allocate your own, using normal USB-IF procedures. */ + +#ifdef CONFIG_USB_GADGET_AU1200UDC +#define DRIVER_VENDOR_ID 0x0438 // AMD +#define DRIVER_PRODUCT_ID 0xdc02 // AMD Linux-USB File-backed Storage Gadget (temporary) +#else #define DRIVER_VENDOR_ID 0x0525 // NetChip #define DRIVER_PRODUCT_ID 0xa4a5 // Linux-USB File-backed Storage Gadget +#endif /* @@ -3717,6 +3723,8 @@ static int __init check_parameters(struc mod_data.can_stall = 0; if (mod_data.release == 0xffff) { // Parameter wasn't set + if (gadget_is_au1200udc(fsg->gadget)) + mod_data.can_stall = 0; /* The sa1100 controller is not supported */ if (gadget_is_sa1100(fsg->gadget)) gcnum = -1; diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h index 8cbae21..541fbd0 100644 --- a/drivers/usb/gadget/gadget_chips.h +++ b/drivers/usb/gadget/gadget_chips.h @@ -15,6 +15,12 @@ #define gadget_is_net2280(g) 0 #endif +#ifdef CONFIG_USB_GADGET_AU1200UDC +#define gadget_is_au1200udc(g) !strcmp("au1200udc", (g)->name) +#else +#define gadget_is_au1200udc(g) 0 +#endif + #ifdef CONFIG_USB_GADGET_DUMMY_HCD #define gadget_is_dummy(g) !strcmp("dummy_udc", (g)->name) #else @@ -143,5 +149,7 @@ static inline int usb_gadget_controller_ return 0x13; else if (gadget_is_imx(gadget)) return 0x14; + else if (gadget_is_au1200udc(gadget)) + return 0x15; return -ENOENT; } diff --git a/drivers/usb/gadget/zero.c b/drivers/usb/gadget/zero.c index 6c58636..4ec28bb 100644 --- a/drivers/usb/gadget/zero.c +++ b/drivers/usb/gadget/zero.c @@ -193,6 +193,10 @@ module_param (loopdefault, bool, S_IRUGO * DO NOT REUSE THESE IDs with a protocol-incompatible driver!! Ever!! * Instead: allocate your own, using normal USB-IF procedures. */ +#ifdef CONFIG_USB_GADGET_AU1200UDC +#define DRIVER_VENDOR_NUM 0x0438 /* AMD */ +#define DRIVER_PRODUCT_NUM 0xdc00 /* AMD Linux-USB "Gadget Zero" (temporary) */ +#else #ifndef CONFIG_USB_ZERO_HNPTEST #define DRIVER_VENDOR_NUM 0x0525 /* NetChip */ #define DRIVER_PRODUCT_NUM 0xa4a0 /* Linux-USB "Gadget Zero" */ @@ -200,6 +204,7 @@ module_param (loopdefault, bool, S_IRUGO #define DRIVER_VENDOR_NUM 0x1a0a /* OTG test device IDs */ #define DRIVER_PRODUCT_NUM 0xbadd #endif +#endif /*-------------------------------------------------------------------------*/ @@ -1127,8 +1132,11 @@ zero_unbind (struct usb_gadget *gadget) DBG (dev, "unbind\n"); /* we've already been disconnected ... no i/o is active */ - if (dev->req) + if (dev->req) { + /* free with original length */ + dev->req->length = USB_BUFSIZ; free_ep_req (gadget->ep0, dev->req); + } del_timer_sync (&dev->resume); kfree (dev); set_gadget_data (gadget, NULL); --3MwIy2ne0vdjdPXF-- From jcrouse@cosmic.amd.com Mon Jan 9 18:08:45 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 18:09:10 +0000 (GMT) Received: from amdext3.amd.com ([139.95.251.6]:22252 "EHLO amdext3.amd.com") by ftp.linux-mips.org with ESMTP id S8133655AbWAISIp (ORCPT ); Mon, 9 Jan 2006 18:08:45 +0000 Received: from SSVLGW02.amd.com (ssvlgw02.amd.com [139.95.250.170]) by amdext3.amd.com (8.12.11/8.12.11/AMD) with ESMTP id k09IB2Pc005743; Mon, 9 Jan 2006 10:11:03 -0800 Received: from 139.95.250.1 by SSVLGW02.amd.com with ESMTP (AMD SMTP Relay (Email Firewall v6.1.0)); Mon, 09 Jan 2006 10:10:49 -0800 X-Server-Uuid: 519AC16A-9632-469E-B354-112C592D09E8 Received: from ldcmail.amd.com (ldcmail.amd.com [147.5.200.40]) by amdint.amd.com (8.12.8/8.12.8/AMD) with ESMTP id k09IAmVP020146; Mon, 9 Jan 2006 10:10:49 -0800 (PST) Received: from cosmic.amd.com (cosmic.amd.com [147.5.201.206]) by ldcmail.amd.com (Postfix) with ESMTP id 99DF82028; Mon, 9 Jan 2006 11:10:48 -0700 (MST) Received: from cosmic.amd.com (localhost [127.0.0.1]) by cosmic.amd.com (8.13.4/8.13.4) with ESMTP id k09IJPak009954; Mon, 9 Jan 2006 11:19:25 -0700 Received: (from jcrouse@localhost) by cosmic.amd.com ( 8.13.4/8.13.4/Submit) id k09IJODT009953; Mon, 9 Jan 2006 11:19:24 -0700 Date: Mon, 9 Jan 2006 11:19:24 -0700 From: "Jordan Crouse" To: "Rodolfo Giometti" cc: linux-mips@linux-mips.org Subject: Re: ALCHEMY: Add SD support to AU1200 MMC/SD driver Message-ID: <20060109181924.GK17575@cosmic.amd.com> References: <20051202190108.GF28227@cosmic.amd.com> <20051214134139.GN22061@hulk.enneenne.com> <20051214155324.GC9734@cosmic.amd.com> <20060109174505.GD1373@gundam.enneenne.com> MIME-Version: 1.0 In-Reply-To: <20060109174505.GD1373@gundam.enneenne.com> User-Agent: Mutt/1.5.11 X-WSS-ID: 6FDC78A32C43579203-01-01 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9823 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jordan.crouse@amd.com Precedence: bulk X-list: linux-mips Content-Length: 1440 Lines: 35 On 09/01/06 18:45 +0100, Rodolfo Giometti wrote: > First of all I needed to disable the DMA support (dma = 0) and using > the FIFO mode, since Au1100 dma support seems not well implemented (or > not implemented at all) and my board freeze. That sound you heard was me smacking my head because I'm an idiot. Of course, the DMA won't work for the AU1100, at least not that engine, so you would certainly need to go for just PIO mode. > After that, when I insert a 256MB MMC card I get the attached messages > and the system refuses to power up the card (please, see the last > message who reports the power status). That message is innocent - it simply states that we couldn't identify your card, so we're powering it down. It looks like the card wasn't replying to the CMD2, so the controller figured that there was nothing on the line. > Have you any suggestions? :) Well, first of all make sure that the driver is correct - I wrote it against the AU1200 spec, so if there is something different in the AU1100 spec, we'll have to #ifdef it. Secondly, make sure the card really works. Thirdly, you'll have to stick in printk() statements in the driver, to make sure we're actually sending out the commands. Finally, you might have to stick a scope on the bus to make sure the protocol is sane on the line. Jordan -- Jordan Crouse Senior Linux Engineer AMD - Personal Connectivity Solutions Group From jcrouse@cosmic.amd.com Mon Jan 9 18:10:50 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 18:11:18 +0000 (GMT) Received: from amdext4.amd.com ([163.181.251.6]:13699 "EHLO amdext4.amd.com") by ftp.linux-mips.org with ESMTP id S8134432AbWAISKu (ORCPT ); Mon, 9 Jan 2006 18:10:50 +0000 Received: from SAUSGW02.amd.com (sausgw02.amd.com [163.181.250.22]) by amdext4.amd.com (8.12.11/8.12.11/AMD) with ESMTP id k09IDe7P000365; Mon, 9 Jan 2006 12:13:40 -0600 Received: from 163.181.250.1 by SAUSGW01.amd.com with ESMTP (AMD SMTP Relay (Email Firewall v6.1.0)); Mon, 09 Jan 2006 12:13:19 -0600 X-Server-Uuid: 8C3DB987-180B-4465-9446-45C15473FD3E Received: from ldcmail.amd.com (ldcmail.amd.com [147.5.200.40]) by amdint2.amd.com (8.12.8/8.12.8/AMD) with ESMTP id k09IDIh5025523; Mon, 9 Jan 2006 12:13:18 -0600 (CST) Received: from cosmic.amd.com (cosmic.amd.com [147.5.201.206]) by ldcmail.amd.com (Postfix) with ESMTP id 5428D2028; Mon, 9 Jan 2006 11:13:18 -0700 (MST) Received: from cosmic.amd.com (localhost [127.0.0.1]) by cosmic.amd.com (8.13.4/8.13.4) with ESMTP id k09ILsiN009983; Mon, 9 Jan 2006 11:21:54 -0700 Received: (from jcrouse@localhost) by cosmic.amd.com ( 8.13.4/8.13.4/Submit) id k09ILsPc009982; Mon, 9 Jan 2006 11:21:54 -0700 Date: Mon, 9 Jan 2006 11:21:54 -0700 From: "Jordan Crouse" To: linux-usb-devel@lists.sourceforge.net cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, info-linux@ldcmail.amd.com, thomas.dahlmann@amd.com Subject: Re: UDC support for MIPS/AU1200 and Geode/CS5536 Message-ID: <20060109182154.GL17575@cosmic.amd.com> References: <20060109180356.GA8855@cosmic.amd.com> MIME-Version: 1.0 In-Reply-To: <20060109180356.GA8855@cosmic.amd.com> User-Agent: Mutt/1.5.11 X-WSS-ID: 6FDC78353982717051-01-01 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9824 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jordan.crouse@amd.com Precedence: bulk X-list: linux-mips Content-Length: 453 Lines: 15 On 09/01/06 11:03 -0700, Jordan Crouse wrote: > From the "two-birds-one-stone" department, I am pleased to present USB UDC > support for both the MIPS Au1200 SoC and the Geode CS5535 south bridge. ^^^^^^ Of course, I meant the CS5536 - this *won't* work for the CS5535. Jordan -- Jordan Crouse Senior Linux Engineer AMD - Personal Connectivity Solutions Group From jcrouse@cosmic.amd.com Mon Jan 9 18:44:58 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 18:45:17 +0000 (GMT) Received: from amdext4.amd.com ([163.181.251.6]:3975 "EHLO amdext4.amd.com") by ftp.linux-mips.org with ESMTP id S8133657AbWAISo6 (ORCPT ); Mon, 9 Jan 2006 18:44:58 +0000 Received: from SAUSGW02.amd.com (sausgw02.amd.com [163.181.250.22]) by amdext4.amd.com (8.12.11/8.12.11/AMD) with ESMTP id k09IlrFP006887; Mon, 9 Jan 2006 12:47:53 -0600 Received: from 163.181.250.1 by SAUSGW02.amd.com with ESMTP (AMD SMTP Relay (Email Firewall v6.1.0)); Mon, 09 Jan 2006 12:47:41 -0600 X-Server-Uuid: 5FC0E2DF-CD44-48CD-883A-0ED95B391E89 Received: from ldcmail.amd.com (ldcmail.amd.com [147.5.200.40]) by amdint2.amd.com (8.12.8/8.12.8/AMD) with ESMTP id k09Ilfh5027308; Mon, 9 Jan 2006 12:47:41 -0600 (CST) Received: from cosmic.amd.com (cosmic.amd.com [147.5.201.206]) by ldcmail.amd.com (Postfix) with ESMTP id E71E12028; Mon, 9 Jan 2006 11:47:40 -0700 (MST) Received: from cosmic.amd.com (localhost [127.0.0.1]) by cosmic.amd.com (8.13.4/8.13.4) with ESMTP id k09IuH7J011581; Mon, 9 Jan 2006 11:56:17 -0700 Received: (from jcrouse@localhost) by cosmic.amd.com ( 8.13.4/8.13.4/Submit) id k09IuHSu011580; Mon, 9 Jan 2006 11:56:17 -0700 Date: Mon, 9 Jan 2006 11:56:17 -0700 From: "Jordan Crouse" To: linux-mips@linux-mips.org cc: ralf@linux-mips.org Subject: [PATCH] Cleanups for au1000/common/time.c Message-ID: <20060109185617.GN17575@cosmic.amd.com> MIME-Version: 1.0 User-Agent: Mutt/1.5.11 X-WSS-ID: 6FDC70470T02739764-01-01 Content-Type: multipart/mixed; boundary="ibTvN161/egqYuK8" Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9825 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jordan.crouse@amd.com Precedence: bulk X-list: linux-mips Content-Length: 1592 Lines: 59 --ibTvN161/egqYuK8 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: 7bit Cleaning out my pending queue, this is a patch from Sergei Shtylyov that just does some minor cleanups in au1000/common/time.c - fairly trivial stuff. Jordan --ibTvN161/egqYuK8 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline; filename=Au1xx0-time-cleanup.patch Content-Transfer-Encoding: 7bit Cleanups in arch/mips/au1000/common/time.c Signed-off-by: Sergei Shtylyov --- arch/mips/au1000/common/time.c | 9 ++------- 1 files changed, 2 insertions(+), 7 deletions(-) diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c index 883d3f3..fe883d4 100644 --- a/arch/mips/au1000/common/time.c +++ b/arch/mips/au1000/common/time.c @@ -50,10 +50,6 @@ #include #include -extern void do_softirq(void); -extern volatile unsigned long wall_jiffies; -unsigned long missed_heart_beats = 0; - static unsigned long r4k_offset; /* Amount to increment compare reg each time */ static unsigned long r4k_cur; /* What counter should be at next timer irq */ int no_au1xxx_32khz; @@ -387,10 +383,9 @@ static unsigned long do_fast_pm_gettimeo } #endif -void au1xxx_timer_setup(struct irqaction *irq) +void __init au1xxx_timer_setup(struct irqaction *irq) { - unsigned int est_freq; - extern unsigned long (*do_gettimeoffset)(void); + unsigned int est_freq; printk("calculating r4koff... "); r4k_offset = cal_r4koff(); --ibTvN161/egqYuK8-- From wd@denx.de Mon Jan 9 21:20:39 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 21:20:58 +0000 (GMT) Received: from mail-out.m-online.net ([212.18.0.9]:2758 "EHLO mail-out.m-online.net") by ftp.linux-mips.org with ESMTP id S8133646AbWAIVUi (ORCPT ); Mon, 9 Jan 2006 21:20:38 +0000 Received: from mail01.m-online.net (svr21.m-online.net [192.168.3.149]) by mail-out.m-online.net (Postfix) with ESMTP id 5F5A9708CE; Mon, 9 Jan 2006 22:23:40 +0100 (CET) X-Auth-Info: 9rjmi9LVaZAfXEmq1oWowzyjKRYS8/8gJ+kKZWZYKBM= X-Auth-Info: 9rjmi9LVaZAfXEmq1oWowzyjKRYS8/8gJ+kKZWZYKBM= X-Auth-Info: 9rjmi9LVaZAfXEmq1oWowzyjKRYS8/8gJ+kKZWZYKBM= Received: from mail.denx.de (p54966F34.dip.t-dialin.net [84.150.111.52]) by smtp-auth.mnet-online.de (Postfix) with ESMTP id 46146B96D9; Mon, 9 Jan 2006 22:23:40 +0100 (CET) Received: from atlas.denx.de (atlas.denx.de [10.0.0.14]) by mail.denx.de (Postfix) with ESMTP id D7A556D00A8; Mon, 9 Jan 2006 22:23:39 +0100 (MET) Received: from atlas.denx.de (localhost.localdomain [127.0.0.1]) by atlas.denx.de (Postfix) with ESMTP id C8289353A66; Mon, 9 Jan 2006 22:23:39 +0100 (MET) To: "Kevin D. Kissell" cc: "Sathesh Babu Edara" , linux-mips@linux-mips.org From: Wolfgang Denk Subject: Re: [processor frequency] Mime-version: 1.0 Content-type: text/plain; charset=ISO-8859-1 Content-transfer-encoding: 8bit In-reply-to: Your message of "Mon, 09 Jan 2006 10:00:48 +0100." <005a01c614fb$2fe76b00$10eca8c0@grendel> Date: Mon, 09 Jan 2006 22:23:39 +0100 Message-Id: <20060109212339.C8289353A66@atlas.denx.de> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9826 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wd@denx.de Precedence: bulk X-list: linux-mips Content-Length: 1136 Lines: 25 In message <005a01c614fb$2fe76b00$10eca8c0@grendel> you wrote: > There is no "ideal" value for a given processor frequency. > The lower the value, the less interrupt processing overhead, > but the slower the response time to events that are detected > or serviced during clock interrupts. 1000 HZ *may* be a sensible > value (I have my doubts, personally) for 2+ GHz PC processors, > but it's excessive (IMHO) for a 200MHz processor and unworkable > for a 20MHz CPU. I think that 100HZ is still a reasonable value > for an embedded RISC CPU, but the "ideal" value is going to > be a function of the application. We did some tests of the performance impact of 100 vs. 1000 Hz clock frequency on low end systems (50 MHz PowerPC); for details please see http://www.denx.de/wiki/view/Know/Clock100vs1000Hz Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de Our missions are peaceful -- not for conquest. When we do battle, it is only because we have no choice. -- Kirk, "The Squire of Gothos", stardate 2124.5 From kevink@mips.com Mon Jan 9 21:49:15 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 21:49:35 +0000 (GMT) Received: from 209-232-97-206.ded.pacbell.net ([209.232.97.206]:20463 "EHLO dns0.mips.com") by ftp.linux-mips.org with ESMTP id S8133508AbWAIVtP (ORCPT ); Mon, 9 Jan 2006 21:49:15 +0000 Received: from mercury.mips.com (sbcns-dmz [209.232.97.193]) by dns0.mips.com (8.12.11/8.12.11) with ESMTP id k09LplR0013566; Mon, 9 Jan 2006 13:51:48 -0800 (PST) Received: from [192.168.236.16] (grendel [192.168.236.16]) by mercury.mips.com (8.12.9/8.12.11) with ESMTP id k09LphYr015673; Mon, 9 Jan 2006 13:51:44 -0800 (PST) Message-ID: <43C2DB61.7090704@mips.com> Date: Mon, 09 Jan 2006 22:53:37 +0100 From: "Kevin D. Kissell" User-Agent: Thunderbird 1.5 (X11/20051025) MIME-Version: 1.0 To: Wolfgang Denk CC: Sathesh Babu Edara , linux-mips@linux-mips.org Subject: Re: [processor frequency] References: <20060109212339.C8289353A66@atlas.denx.de> In-Reply-To: <20060109212339.C8289353A66@atlas.denx.de> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.39 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9827 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kevink@mips.com Precedence: bulk X-list: linux-mips Content-Length: 1485 Lines: 31 Wolfgang Denk wrote: > In message <005a01c614fb$2fe76b00$10eca8c0@grendel> you wrote: >> There is no "ideal" value for a given processor frequency. >> The lower the value, the less interrupt processing overhead, >> but the slower the response time to events that are detected >> or serviced during clock interrupts. 1000 HZ *may* be a sensible >> value (I have my doubts, personally) for 2+ GHz PC processors, >> but it's excessive (IMHO) for a 200MHz processor and unworkable >> for a 20MHz CPU. I think that 100HZ is still a reasonable value >> for an embedded RISC CPU, but the "ideal" value is going to >> be a function of the application. > > We did some tests of the performance impact of 100 vs. 1000 Hz clock > frequency on low end systems (50 MHz PowerPC); for details please see > http://www.denx.de/wiki/view/Know/Clock100vs1000Hz My own results, on an SMP 2.6 kernel (as opposed to the uniprocessor 2.4 kernel used for the experiments reported) have been rather different. Certainly the degradations I observed were far worse than the 5-10% reported in the document you cite. I'll try to repeat your experiment when I get the time. BTW, I'm puzzled by the "context switch" benchmark test results. By what mechanism - or by what definition of "context switch" - can having more frequent interrupts make context switches happen more quickly? It seems to me that those results must be due to a systematic measurement error being added/removed. Regards, Kevin K From earlm@mips.com Mon Jan 9 21:59:21 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 21:59:38 +0000 (GMT) Received: from 209-232-97-206.ded.pacbell.net ([209.232.97.206]:24559 "EHLO dns0.mips.com") by ftp.linux-mips.org with ESMTP id S8133508AbWAIV7V convert rfc822-to-8bit (ORCPT ); Mon, 9 Jan 2006 21:59:21 +0000 Received: from mercury.mips.com (sbcns-dmz [209.232.97.193]) by dns0.mips.com (8.12.11/8.12.11) with ESMTP id k09M1DcR013598; Mon, 9 Jan 2006 14:01:14 -0800 (PST) Received: from exchange.MIPS.COM (exchange [192.168.20.29]) by mercury.mips.com (8.12.9/8.12.11) with ESMTP id k09M1DYr015869; Mon, 9 Jan 2006 14:01:14 -0800 (PST) Content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 8BIT X-MimeOLE: Produced By Microsoft Exchange V6.5.7226.0 Subject: RE: [processor frequency] Date: Mon, 9 Jan 2006 14:00:50 -0800 Message-ID: <3CB54817FDF733459B230DD27C690CEC010495E3@Exchange.MIPS.COM> X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: [processor frequency] Thread-Index: AcYVYxdD0AdhrbWSQZmY/XYAU4nEFQAAlBdg From: "Mitchell, Earl" To: "Wolfgang Denk" , "Kevin D. Kissell" Cc: "Sathesh Babu Edara" , X-Scanned-By: MIMEDefang 2.39 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9828 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: earlm@mips.com Precedence: bulk X-list: linux-mips Content-Length: 2045 Lines: 52 Wolfgang, In your summary you mention ... "This probably explains why many developers who never use low-end embedded processors don't care about (and usually don't even know of) these problems in the 2.6 kernel." The desktop/server guys typically use much larger caches (i.e. >= 512K) and most have L2, compared to embedded systems which typically use less without an L2. So I'd also expect embedded guys using small caches to see larger decreases in performance due to more cache misses (i.e. more interrupts produce more evictions). -earlm > -----Original Message----- > From: linux-mips-bounce@linux-mips.org > [mailto:linux-mips-bounce@linux-mips.org]On Behalf Of Wolfgang Denk > Sent: Monday, January 09, 2006 1:24 PM > To: Kevin D. Kissell > Cc: Sathesh Babu Edara; linux-mips@linux-mips.org > Subject: Re: [processor frequency] > > > In message <005a01c614fb$2fe76b00$10eca8c0@grendel> you wrote: > > There is no "ideal" value for a given processor frequency. > > The lower the value, the less interrupt processing overhead, > > but the slower the response time to events that are detected > > or serviced during clock interrupts. 1000 HZ *may* be a sensible > > value (I have my doubts, personally) for 2+ GHz PC processors, > > but it's excessive (IMHO) for a 200MHz processor and unworkable > > for a 20MHz CPU. I think that 100HZ is still a reasonable value > > for an embedded RISC CPU, but the "ideal" value is going to > > be a function of the application. > > We did some tests of the performance impact of 100 vs. 1000 Hz clock > frequency on low end systems (50 MHz PowerPC); for details please see > http://www.denx.de/wiki/view/Know/Clock100vs1000Hz > > Best regards, > > Wolfgang Denk > > -- > Software Engineering: Embedded and Realtime Systems, Embedded Linux > Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de > Our missions are peaceful -- not for conquest. When we do battle, it > is only because we have no choice. > -- Kirk, "The Squire of Gothos", stardate 2124.5 > > From oliver@neukum.org Mon Jan 9 22:41:47 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 22:42:04 +0000 (GMT) Received: from mail1.kontent.de ([81.88.34.36]:64898 "EHLO Mail1.KONTENT.De") by ftp.linux-mips.org with ESMTP id S8133508AbWAIWlr (ORCPT ); Mon, 9 Jan 2006 22:41:47 +0000 Received: from p549A1508.dip0.t-ipconnect.de (p549A1508.dip0.t-ipconnect.de [84.154.21.8]) by Mail1.KONTENT.De (Postfix) with ESMTP id 0AE4210D7EF6; Mon, 9 Jan 2006 23:44:58 +0100 (CET) From: Oliver Neukum To: linux-usb-devel@lists.sourceforge.net Subject: Re: [linux-usb-devel] [PATCH] UDC support for MIPS/AU1200 and Geode/CS5536 Date: Mon, 9 Jan 2006 23:44:55 +0100 User-Agent: KMail/1.8 Cc: "Jordan Crouse" , linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, info-linux@ldcmail.amd.com, thomas.dahlmann@amd.com References: <20060109180356.GA8855@cosmic.amd.com> In-Reply-To: <20060109180356.GA8855@cosmic.amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200601092344.55988.oliver@neukum.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9829 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: oliver@neukum.org Precedence: bulk X-list: linux-mips Content-Length: 769 Lines: 23 Am Montag, 9. Januar 2006 19:03 schrieb Jordan Crouse: > >From the "two-birds-one-stone" department, I am pleased to present USB UDC > support for both the MIPS Au1200 SoC and the Geode CS5535 south bridge. > Also, coming soon (in the next few days), OTG, which has been removed from > the usb_host patch, and put into its own patch (as per David's comments). > > This patch is against current linux-mips git, but it should apply for Linus's > tree as well. > > Regards, > Jordan > + VDBG("udc_read_bytes(): %d bytes\n", bytes); + + /* dwords first */ + for (i = 0; i < bytes / UDC_DWORD_BYTES; i++) { + *((u32*) (buf + (i<<2))) = readl(dev->rxfifo); + } Is there any reason you don't increment by 4? Regards Oliver From wd@denx.de Mon Jan 9 22:58:46 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 22:59:03 +0000 (GMT) Received: from mail-out.m-online.net ([212.18.0.9]:3288 "EHLO mail-out.m-online.net") by ftp.linux-mips.org with ESMTP id S8133508AbWAIW6n (ORCPT ); Mon, 9 Jan 2006 22:58:43 +0000 Received: from mail01.m-online.net (svr21.m-online.net [192.168.3.149]) by mail-out.m-online.net (Postfix) with ESMTP id C9DD170467; Tue, 10 Jan 2006 00:01:42 +0100 (CET) X-Auth-Info: /dHVD3Y4gS4wvlw+cdjISgOenRl4Gd81VHHP7i1LL9A= X-Auth-Info: /dHVD3Y4gS4wvlw+cdjISgOenRl4Gd81VHHP7i1LL9A= X-Auth-Info: /dHVD3Y4gS4wvlw+cdjISgOenRl4Gd81VHHP7i1LL9A= Received: from mail.denx.de (p54966F34.dip.t-dialin.net [84.150.111.52]) by smtp-auth.mnet-online.de (Postfix) with ESMTP id B3C56B8F14; Tue, 10 Jan 2006 00:01:42 +0100 (CET) Received: from atlas.denx.de (atlas.denx.de [10.0.0.14]) by mail.denx.de (Postfix) with ESMTP id 5E9466D00A8; Tue, 10 Jan 2006 00:01:42 +0100 (MET) Received: from atlas.denx.de (localhost.localdomain [127.0.0.1]) by atlas.denx.de (Postfix) with ESMTP id 51979354115; Tue, 10 Jan 2006 00:01:42 +0100 (MET) To: "Kevin D. Kissell" cc: Sathesh Babu Edara , linux-mips@linux-mips.org From: Wolfgang Denk Subject: Re: [processor frequency] Mime-version: 1.0 Content-type: text/plain; charset=ISO-8859-1 Content-transfer-encoding: 8bit In-reply-to: Your message of "Mon, 09 Jan 2006 22:53:37 +0100." <43C2DB61.7090704@mips.com> Date: Tue, 10 Jan 2006 00:01:42 +0100 Message-Id: <20060109230142.51979354115@atlas.denx.de> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9830 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wd@denx.de Precedence: bulk X-list: linux-mips Content-Length: 912 Lines: 22 In message <43C2DB61.7090704@mips.com> you wrote: > > BTW, I'm puzzled by the "context switch" benchmark test results. By what > mechanism - or by what definition of "context switch" - can having more > frequent interrupts make context switches happen more quickly? It seems > to me that those results must be due to a systematic measurement error > being added/removed. I have to admit that I don't have a good explanation for this either. It's what I got with (repeated) measurements. Cache (flush) issues might play a role here - but without closer analysis this is just speculation. Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de If you can't beat it or corrupt it, you pretend it was your idea in the first place. - Terry Pratchett, _Guards! Guards!_ From wd@denx.de Mon Jan 9 23:02:53 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 Jan 2006 23:03:11 +0000 (GMT) Received: from mail-out.m-online.net ([212.18.0.9]:33752 "EHLO mail-out.m-online.net") by ftp.linux-mips.org with ESMTP id S8133508AbWAIXCx (ORCPT ); Mon, 9 Jan 2006 23:02:53 +0000 Received: from mail01.m-online.net (svr21.m-online.net [192.168.3.149]) by mail-out.m-online.net (Postfix) with ESMTP id E0FDC709A4; Tue, 10 Jan 2006 00:05:55 +0100 (CET) X-Auth-Info: DoUMI+ncKDIHJ3bvPx28S3wmpFjkruShDtx+NMfL6yM= X-Auth-Info: DoUMI+ncKDIHJ3bvPx28S3wmpFjkruShDtx+NMfL6yM= X-Auth-Info: DoUMI+ncKDIHJ3bvPx28S3wmpFjkruShDtx+NMfL6yM= X-Auth-Info: DoUMI+ncKDIHJ3bvPx28S3wmpFjkruShDtx+NMfL6yM= Received: from mail.denx.de (p54966F34.dip.t-dialin.net [84.150.111.52]) by smtp-auth.mnet-online.de (Postfix) with ESMTP id C7905B8CE8; Tue, 10 Jan 2006 00:05:55 +0100 (CET) Received: from atlas.denx.de (atlas.denx.de [10.0.0.14]) by mail.denx.de (Postfix) with ESMTP id 6B62A6D00A8; Tue, 10 Jan 2006 00:05:55 +0100 (MET) Received: from atlas.denx.de (localhost.localdomain [127.0.0.1]) by atlas.denx.de (Postfix) with ESMTP id 5A961354115; Tue, 10 Jan 2006 00:05:55 +0100 (MET) To: "Mitchell, Earl" Cc: "Kevin D. Kissell" , "Sathesh Babu Edara" , linux-mips@linux-mips.org From: Wolfgang Denk Subject: Re: [processor frequency] Mime-version: 1.0 Content-type: text/plain; charset=ISO-8859-1 Content-transfer-encoding: 8bit In-reply-to: Your message of "Mon, 09 Jan 2006 14:00:50 PST." <3CB54817FDF733459B230DD27C690CEC010495E3@Exchange.MIPS.COM> Date: Tue, 10 Jan 2006 00:05:55 +0100 Message-Id: <20060109230555.5A961354115@atlas.denx.de> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9831 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wd@denx.de Precedence: bulk X-list: linux-mips Content-Length: 922 Lines: 23 Hello, in message <3CB54817FDF733459B230DD27C690CEC010495E3@Exchange.MIPS.COM> you wrote: > > The desktop/server guys typically use much larger caches (i.e. >= 512K) > and most have L2, compared to embedded systems which typically use less > without an L2. So I'd also expect embedded guys using small caches to see > larger decreases in performance due to more cache misses (i.e. more > interrupts produce more evictions). Corrent. FYI: the system used in my tests is a PowerPC at 50 MHz CPU clock with 4 kB I-Cache and 4 kB D-Cache ... Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de Every program has at least one bug and can be shortened by at least one instruction - from which, by induction, one can deduce that every program can be reduced to one instruction which doesn't work. From zzh.hust@gmail.com Tue Jan 10 00:59:42 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 10 Jan 2006 01:00:00 +0000 (GMT) Received: from wproxy.gmail.com ([64.233.184.206]:7103 "EHLO wproxy.gmail.com") by ftp.linux-mips.org with ESMTP id S8134419AbWAJA7m convert rfc822-to-8bit (ORCPT ); Tue, 10 Jan 2006 00:59:42 +0000 Received: by wproxy.gmail.com with SMTP id 36so65034wra for ; Mon, 09 Jan 2006 17:02:44 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=mlQWPMnA3akhkZEApBJr2eMBLnHHoB5unlK5Vo82fmDQM6RIZbD5VTlUU6b1m6q0Hhgbm3NozKDrWcfjoxB2v7WQuGFGEedHpPJDwRrmlqNgwuXqbwW6UqZ6qkYLLN8F/q6kE6ZLbvlUY4hs8Q6vm7sUhOn18BQ7P4vXNB9ySsE= Received: by 10.54.108.2 with SMTP id g2mr220355wrc; Mon, 09 Jan 2006 17:02:43 -0800 (PST) Received: by 10.54.156.1 with HTTP; Mon, 9 Jan 2006 17:02:43 -0800 (PST) Message-ID: <50c9a2250601091702g7e48c75br178868a3c91d48f4@mail.gmail.com> Date: Tue, 10 Jan 2006 09:02:43 +0800 From: zhuzhenhua To: Ralf Baechle Subject: Re: why the early_initcall(au1x00_setup) do not work? Cc: "P. Christeas" , linux-mips@linux-mips.org In-Reply-To: <20060109152429.GE4286@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline References: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> <20060109145610.GB4286@linux-mips.org> <200601091720.03822.p_christ@hol.gr> <20060109152429.GE4286@linux-mips.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9832 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zzh.hust@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 748 Lines: 25 On 1/9/06, Ralf Baechle wrote: > On Mon, Jan 09, 2006 at 05:20:01PM +0200, P. Christeas wrote: > > > > You've downloaded a kernel.org kernel it would seem - doesn't fly for MIPS. > > > Instead get a kernel from linux-mips.org. > > > > > > The early_initcall() construct has been removed. > > > > > > Ralf > > > > What's the difference between the trees? > > All the MIPS work is happening in the linux-mips.org tree. > > > Aren't the MIPS patches supposed to be merged to Linus' tree? > > In 2.6.15 things were alomst fully merged but several megabytes of > patches are between the linux-mips.org and kernel.org versions of 2.6.14. > > Ralf > in linux-mips, where to download the patches for standard kernel? zhuzhenhua From zzh.hust@gmail.com Tue Jan 10 06:00:16 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 10 Jan 2006 06:00:34 +0000 (GMT) Received: from wproxy.gmail.com ([64.233.184.206]:43376 "EHLO wproxy.gmail.com") by ftp.linux-mips.org with ESMTP id S8133398AbWAJGAQ convert rfc822-to-8bit (ORCPT ); Tue, 10 Jan 2006 06:00:16 +0000 Received: by wproxy.gmail.com with SMTP id 36so96011wra for ; Mon, 09 Jan 2006 22:03:19 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:mime-version:content-type:content-transfer-encoding:content-disposition; b=CnjSUQSGiictdoYY6r8TPbMHWb/4A2a5FnDv9iX+eJR4b/SjNaCZJBx84dtjYBwlCWtyDWpRYIdnn4hRnET07U23rXupT8YgDT9xU2kGqcmU49XQEkmabl1JcHYiZ2xFYCssE5ubPPC9yceFa+gsJ/mWNiM/+1rnNJlOWbX3Nlw= Received: by 10.54.151.9 with SMTP id y9mr442986wrd; Mon, 09 Jan 2006 22:03:19 -0800 (PST) Received: by 10.54.156.1 with HTTP; Mon, 9 Jan 2006 22:03:19 -0800 (PST) Message-ID: <50c9a2250601092203y2cd68d65rf712174e31d41806@mail.gmail.com> Date: Tue, 10 Jan 2006 14:03:19 +0800 From: zhuzhenhua To: linux-mips Subject: how to make zImage in linux 2.6? MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9833 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zzh.hust@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 285 Lines: 8 i download a 2.6.14 kernel, i find it can compile vmlinux, vmlinux.srec, but i can't find how to make zImage. In 2.4.x, there is a arch/mips/zboot/ to add board-special code to make zImage. and i do not find similiar codes in 2.6.does the 2.6 support zImage? Best regards zhuzhenhua From dom@mips.com Tue Jan 10 09:33:29 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 10 Jan 2006 09:33:51 +0000 (GMT) Received: from alg145.algor.co.uk ([62.254.210.145]:51206 "EHLO dmz.algor.co.uk") by ftp.linux-mips.org with ESMTP id S8133415AbWAJJd3 (ORCPT ); Tue, 10 Jan 2006 09:33:29 +0000 Received: from alg158.algor.co.uk ([62.254.210.158] helo=olympia.mips.com) by dmz.algor.co.uk with esmtp (Exim 3.35 #1 (Debian)) id 1EwFsa-00040s-00; Tue, 10 Jan 2006 09:33:24 +0000 Received: from olympia.mips.com ([192.168.192.128] helo=boris) by olympia.mips.com with esmtp (Exim 3.36 #1 (Debian)) id 1EwFvE-0005hQ-00; Tue, 10 Jan 2006 09:36:08 +0000 From: Dominic Sweetman MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Message-ID: <17347.32817.144103.968382@mips.com> Date: Tue, 10 Jan 2006 09:36:49 +0000 To: "Mitchell, Earl" Cc: "Wolfgang Denk" , "Kevin D. Kissell" , "Sathesh Babu Edara" , Subject: RE: [processor frequency] In-Reply-To: <3CB54817FDF733459B230DD27C690CEC010495E3@Exchange.MIPS.COM> References: <3CB54817FDF733459B230DD27C690CEC010495E3@Exchange.MIPS.COM> X-Mailer: VM 7.17 under 21.4 (patch 17) "Jumbo Shrimp" XEmacs Lucid X-MTUK-Scanner: Found to be clean X-MTUK-SpamCheck: not spam (whitelisted), SpamAssassin (score=-4.856, required 4, AWL, BAYES_00) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9834 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dom@mips.com Precedence: bulk X-list: linux-mips Content-Length: 1246 Lines: 30 My colleague Earl writes: > The desktop/server guys typically use much larger caches (i.e. >= 512K) > and most have L2, compared to embedded systems which typically use less > without an L2. So I'd also expect embedded guys using small caches to see > larger decreases in performance due to more cache misses (i.e. more > interrupts produce more evictions). It's certainly true that running an interrupt routine (even one which doesn't lead to any scheduling activity) will cause some cache traffic. But it is important to keep the relative timescales in mind. With an averagely bad memory system, evicting and replacing a cache line costs 150ns read latency, with a 100ns writeback (notionally done "in the background" just after the read) on about one miss in four... Let's make some pessimistic assumptions. Suppose an interrupt routine displaces 2KB of code and data and uses 32-byte cache lines, and we assume the process happens twice as the background process refills the cache to its liking. Then we'll get 120 odd reads, which will cost about 20us, about 2% of total time on a 1KHz clock. That doesn't sound like it should be a huge effect. It would be better to measure it, though. -- Dominic Sweetman MIPS Technologies. From giometti@enneenne.com Tue Jan 10 10:30:10 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 10 Jan 2006 10:30:31 +0000 (GMT) Received: from 81-174-11-161.f5.ngi.it ([81.174.11.161]:38316 "EHLO gundam.enneenne.com") by ftp.linux-mips.org with ESMTP id S8133415AbWAJKaK (ORCPT ); Tue, 10 Jan 2006 10:30:10 +0000 Received: from giometti by gundam.enneenne.com with local (Exim 3.36 #1 (Debian)) id 1EwGoR-0007ta-00 for ; Tue, 10 Jan 2006 11:33:11 +0100 Date: Tue, 10 Jan 2006 11:33:11 +0100 From: Rodolfo Giometti To: linux-mips@linux-mips.org Subject: [PATCH] IrDA support for au1000/au1100 Message-ID: <20060110103311.GE1373@gundam.enneenne.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="5Mfx4RzfBqgnTE/w" Content-Disposition: inline Organization: Programmi e soluzioni GNU/Linux X-PGP-Key: gpg --keyserver keyserver.penguin.de --recv-keys D25A5633 User-Agent: Mutt/1.5.5.1+cvs20040105i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9835 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: giometti@linux.it Precedence: bulk X-list: linux-mips Content-Length: 11665 Lines: 361 --5Mfx4RzfBqgnTE/w Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hello. Here a patch for IrDA support on au1000 and au1100 CPUs in order to work with linux 2.6.x. I tested the software with an au1100 based board. Ciao, Rodolfo -- GNU/Linux Solutions e-mail: giometti@enneenne.com Linux Device Driver giometti@gnudd.com Embedded Systems giometti@linux.it UNIX programming phone: +39 349 2432127 --5Mfx4RzfBqgnTE/w Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename="au1000_irda.patch" diff --git a/drivers/net/irda/Kconfig b/drivers/net/irda/Kconfig index d54156f..190138e 100644 --- a/drivers/net/irda/Kconfig +++ b/drivers/net/irda/Kconfig @@ -342,8 +342,8 @@ config TOSHIBA_FIR donauboe. config AU1000_FIR - tristate "Alchemy Au1000 SIR/FIR" - depends on MIPS_AU1000 && IRDA + tristate "Alchemy Au1000/Au1100 SIR/FIR" + depends on ( SOC_AU1000 || SOC_AU1100 ) && IRDA config SMC_IRCC_FIR tristate "SMSC IrCC (EXPERIMENTAL)" diff --git a/drivers/net/irda/au1k_ir.c b/drivers/net/irda/au1k_ir.c index e6b1985..34071f3 100644 --- a/drivers/net/irda/au1k_ir.c +++ b/drivers/net/irda/au1k_ir.c @@ -5,6 +5,8 @@ * Author: MontaVista Software, Inc. * ppopov@mvista.com or source@mvista.com * + * Driver ported to Linux 2.6.x by Rodolfo Giometti + * * This program is free software; you can distribute it and/or modify it * under the terms of the GNU General Public License (Version 2) as * published by the Free Software Foundation. @@ -32,19 +34,13 @@ #include #include -#include -#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) -#include -#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) -#include -#else -#error au1k_ir: unsupported board -#endif #include #include #include #include + +#include #include "au1000_ircc.h" static int au1k_irda_net_init(struct net_device *); @@ -52,7 +48,7 @@ static int au1k_irda_start(struct net_de static int au1k_irda_stop(struct net_device *dev); static int au1k_irda_hard_xmit(struct sk_buff *, struct net_device *); static int au1k_irda_rx(struct net_device *); -static void au1k_irda_interrupt(int, void *, struct pt_regs *); +static irqreturn_t au1k_irda_interrupt(int, void *, struct pt_regs *); static void au1k_tx_timeout(struct net_device *); static struct net_device_stats *au1k_irda_stats(struct net_device *); static int au1k_irda_ioctl(struct net_device *, struct ifreq *, int); @@ -78,12 +74,16 @@ static DEFINE_SPINLOCK(ir_lock); * IrDA peripheral bug. You have to read the register * twice to get the right value. */ -u32 read_ir_reg(u32 addr) +static inline u32 read_ir_reg(unsigned long addr) { - readl(addr); - return readl(addr); + au_readl(addr); + return au_readl(addr); } +static inline void write_ir_reg(u32 data, unsigned long addr) +{ + au_writel(data, addr); +} /* * Buffer allocation/deallocation routines. The buffer descriptor returned @@ -259,7 +259,7 @@ static int au1k_irda_net_init(struct net /* attach a data buffer to each descriptor */ for (i=0; irx_ring[i]->addr_0 = (u8)(pDB->dma_addr & 0xff); aup->rx_ring[i]->addr_1 = (u8)((pDB->dma_addr>>8) & 0xff); aup->rx_ring[i]->addr_2 = (u8)((pDB->dma_addr>>16) & 0xff); @@ -268,7 +268,7 @@ static int au1k_irda_net_init(struct net } for (i=0; itx_ring[i]->addr_0 = (u8)(pDB->dma_addr & 0xff); aup->tx_ring[i]->addr_1 = (u8)((pDB->dma_addr>>8) & 0xff); aup->tx_ring[i]->addr_2 = (u8)((pDB->dma_addr>>16) & 0xff); @@ -288,6 +288,9 @@ static int au1k_irda_net_init(struct net return 0; +out4: + ReleaseDB(aup, pDB); + out3: dma_free((void *)aup->rx_ring[0], 2 * MAX_NUM_IR_DESC*(sizeof(ring_dest_t))); @@ -320,22 +323,22 @@ static int au1k_init(struct net_device * aup->rx_ring[i]->flags = AU_OWN; } - writel(control, IR_INTERFACE_CONFIG); + write_ir_reg(control, IR_INTERFACE_CONFIG); au_sync_delay(10); - writel(read_ir_reg(IR_ENABLE) & ~0x8000, IR_ENABLE); /* disable PHY */ + write_ir_reg(read_ir_reg(IR_ENABLE) & ~0x8000, IR_ENABLE); /* disable PHY */ au_sync_delay(1); - writel(MAX_BUF_SIZE, IR_MAX_PKT_LEN); + write_ir_reg(MAX_BUF_SIZE, IR_MAX_PKT_LEN); ring_address = (u32)virt_to_phys((void *)aup->rx_ring[0]); - writel(ring_address >> 26, IR_RING_BASE_ADDR_H); - writel((ring_address >> 10) & 0xffff, IR_RING_BASE_ADDR_L); + write_ir_reg(ring_address >> 26, IR_RING_BASE_ADDR_H); + write_ir_reg((ring_address >> 10) & 0xffff, IR_RING_BASE_ADDR_L); - writel(RING_SIZE_64<<8 | RING_SIZE_64<<12, IR_RING_SIZE); + write_ir_reg(RING_SIZE_64<<8 | RING_SIZE_64<<12, IR_RING_SIZE); - writel(1<<2 | IR_ONE_PIN, IR_CONFIG_2); /* 48MHz */ - writel(0, IR_RING_ADDR_CMPR); + write_ir_reg(1<<2 | IR_ONE_PIN, IR_CONFIG_2); /* 48MHz */ + write_ir_reg(0, IR_RING_ADDR_CMPR); au1k_irda_set_speed(dev, 9600); return 0; @@ -352,13 +355,13 @@ static int au1k_irda_start(struct net_de return retval; } - if ((retval = request_irq(AU1000_IRDA_TX_INT, &au1k_irda_interrupt, + if ((retval = request_irq(AU1000_IRDA_TX_INT, au1k_irda_interrupt, 0, dev->name, dev))) { printk(KERN_ERR "%s: unable to get IRQ %d\n", dev->name, dev->irq); return retval; } - if ((retval = request_irq(AU1000_IRDA_RX_INT, &au1k_irda_interrupt, + if ((retval = request_irq(AU1000_IRDA_RX_INT, au1k_irda_interrupt, 0, dev->name, dev))) { free_irq(AU1000_IRDA_TX_INT, dev); printk(KERN_ERR "%s: unable to get IRQ %d\n", @@ -371,7 +374,7 @@ static int au1k_irda_start(struct net_de aup->irlap = irlap_open(dev, &aup->qos, hwname); netif_start_queue(dev); - writel(read_ir_reg(IR_CONFIG_2) | 1<<8, IR_CONFIG_2); /* int enable */ + write_ir_reg(read_ir_reg(IR_CONFIG_2) | 1<<8, IR_CONFIG_2); /* int enable */ aup->timer.expires = RUN_AT((3*HZ)); aup->timer.data = (unsigned long)dev; @@ -383,9 +386,9 @@ static int au1k_irda_stop(struct net_dev struct au1k_private *aup = netdev_priv(dev); /* disable interrupts */ - writel(read_ir_reg(IR_CONFIG_2) & ~(1<<8), IR_CONFIG_2); - writel(0, IR_CONFIG_1); - writel(0, IR_INTERFACE_CONFIG); /* disable clock */ + write_ir_reg(read_ir_reg(IR_CONFIG_2) & ~(1<<8), IR_CONFIG_2); + write_ir_reg(0, IR_CONFIG_1); + write_ir_reg(0, IR_INTERFACE_CONFIG); /* disable clock */ au_sync(); if (aup->irlap) { @@ -462,12 +465,12 @@ static void au1k_tx_ack(struct net_devic aup->newspeed = 0; } else { - writel(read_ir_reg(IR_CONFIG_1) & ~IR_TX_ENABLE, + write_ir_reg(read_ir_reg(IR_CONFIG_1) & ~IR_TX_ENABLE, IR_CONFIG_1); au_sync(); - writel(read_ir_reg(IR_CONFIG_1) | IR_RX_ENABLE, + write_ir_reg(read_ir_reg(IR_CONFIG_1) | IR_RX_ENABLE, IR_CONFIG_1); - writel(0, IR_RING_PROMPT); + write_ir_reg(0, IR_RING_PROMPT); au_sync(); } } @@ -543,8 +546,8 @@ static int au1k_irda_hard_xmit(struct sk ptxd->flags |= AU_OWN; au_sync(); - writel(read_ir_reg(IR_CONFIG_1) | IR_TX_ENABLE, IR_CONFIG_1); - writel(0, IR_RING_PROMPT); + write_ir_reg(read_ir_reg(IR_CONFIG_1) | IR_TX_ENABLE, IR_CONFIG_1); + write_ir_reg(0, IR_RING_PROMPT); au_sync(); dev_kfree_skb(skb); @@ -615,7 +618,7 @@ static int au1k_irda_rx(struct net_devic } prxd->flags |= AU_OWN; aup->rx_head = (aup->rx_head + 1) & (NUM_IR_DESC - 1); - writel(0, IR_RING_PROMPT); + write_ir_reg(0, IR_RING_PROMPT); au_sync(); /* next descriptor */ @@ -628,19 +631,21 @@ static int au1k_irda_rx(struct net_devic } -void au1k_irda_interrupt(int irq, void *dev_id, struct pt_regs *regs) +static irqreturn_t au1k_irda_interrupt(int irq, void *dev_id, struct pt_regs *regs) { struct net_device *dev = (struct net_device *) dev_id; if (dev == NULL) { printk(KERN_ERR "%s: isr: null dev ptr\n", dev->name); - return; + return IRQ_NONE; } - writel(0, IR_INT_CLEAR); /* ack irda interrupts */ + write_ir_reg(0, IR_INT_CLEAR); /* ack irda interrupts */ au1k_irda_rx(dev); au1k_tx_ack(dev); + + return IRQ_HANDLED; } @@ -683,10 +688,10 @@ au1k_irda_set_speed(struct net_device *d spin_lock_irqsave(&ir_lock, flags); /* disable PHY first */ - writel(read_ir_reg(IR_ENABLE) & ~0x8000, IR_ENABLE); + write_ir_reg(read_ir_reg(IR_ENABLE) & ~0x8000, IR_ENABLE); /* disable RX/TX */ - writel(read_ir_reg(IR_CONFIG_1) & ~(IR_RX_ENABLE|IR_TX_ENABLE), + write_ir_reg(read_ir_reg(IR_CONFIG_1) & ~(IR_RX_ENABLE|IR_TX_ENABLE), IR_CONFIG_1); au_sync_delay(1); while (read_ir_reg(IR_ENABLE) & (IR_RX_STATUS | IR_TX_STATUS)) { @@ -699,7 +704,7 @@ au1k_irda_set_speed(struct net_device *d } /* disable DMA */ - writel(read_ir_reg(IR_CONFIG_1) & ~IR_DMA_ENABLE, IR_CONFIG_1); + write_ir_reg(read_ir_reg(IR_CONFIG_1) & ~IR_DMA_ENABLE, IR_CONFIG_1); au_sync_delay(1); /* @@ -724,42 +729,42 @@ au1k_irda_set_speed(struct net_device *d if (speed == 4000000) { #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) bcsr->resets |= BCSR_RESETS_FIR_SEL; -#else /* Pb1000 and Pb1100 */ - writel(1<<13, CPLD_AUX1); +#elif defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) + write_ir_reg(1<<13, CPLD_AUX1); #endif } else { #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) bcsr->resets &= ~BCSR_RESETS_FIR_SEL; -#else /* Pb1000 and Pb1100 */ - writel(readl(CPLD_AUX1) & ~(1<<13), CPLD_AUX1); +#elif defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) + write_ir_reg(readl(CPLD_AUX1) & ~(1<<13), CPLD_AUX1); #endif } switch (speed) { case 9600: - writel(11<<10 | 12<<5, IR_WRITE_PHY_CONFIG); - writel(IR_SIR_MODE, IR_CONFIG_1); + write_ir_reg(11<<10 | 12<<5, IR_WRITE_PHY_CONFIG); + write_ir_reg(IR_SIR_MODE, IR_CONFIG_1); break; case 19200: - writel(5<<10 | 12<<5, IR_WRITE_PHY_CONFIG); - writel(IR_SIR_MODE, IR_CONFIG_1); + write_ir_reg(5<<10 | 12<<5, IR_WRITE_PHY_CONFIG); + write_ir_reg(IR_SIR_MODE, IR_CONFIG_1); break; case 38400: - writel(2<<10 | 12<<5, IR_WRITE_PHY_CONFIG); - writel(IR_SIR_MODE, IR_CONFIG_1); + write_ir_reg(2<<10 | 12<<5, IR_WRITE_PHY_CONFIG); + write_ir_reg(IR_SIR_MODE, IR_CONFIG_1); break; case 57600: - writel(1<<10 | 12<<5, IR_WRITE_PHY_CONFIG); - writel(IR_SIR_MODE, IR_CONFIG_1); + write_ir_reg(1<<10 | 12<<5, IR_WRITE_PHY_CONFIG); + write_ir_reg(IR_SIR_MODE, IR_CONFIG_1); break; case 115200: - writel(12<<5, IR_WRITE_PHY_CONFIG); - writel(IR_SIR_MODE, IR_CONFIG_1); + write_ir_reg(12<<5, IR_WRITE_PHY_CONFIG); + write_ir_reg(IR_SIR_MODE, IR_CONFIG_1); break; case 4000000: - writel(0xF, IR_WRITE_PHY_CONFIG); - writel(IR_FIR|IR_DMA_ENABLE|IR_RX_ENABLE, IR_CONFIG_1); + write_ir_reg(0xF, IR_WRITE_PHY_CONFIG); + write_ir_reg(IR_FIR|IR_DMA_ENABLE|IR_RX_ENABLE, IR_CONFIG_1); break; default: printk(KERN_ERR "%s unsupported speed %x\n", dev->name, speed); @@ -768,11 +773,11 @@ au1k_irda_set_speed(struct net_device *d } aup->speed = speed; - writel(read_ir_reg(IR_ENABLE) | 0x8000, IR_ENABLE); + write_ir_reg(read_ir_reg(IR_ENABLE) | 0x8000, IR_ENABLE); au_sync(); control = read_ir_reg(IR_ENABLE); - writel(0, IR_RING_PROMPT); + write_ir_reg(0, IR_RING_PROMPT); au_sync(); if (control & (1<<14)) { --5Mfx4RzfBqgnTE/w-- From thomas.dahlmann@amd.com Tue Jan 10 11:00:20 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 10 Jan 2006 11:00:39 +0000 (GMT) Received: from amdext4.amd.com ([163.181.251.6]:44936 "EHLO amdext4.amd.com") by ftp.linux-mips.org with ESMTP id S8133428AbWAJLAU (ORCPT ); Tue, 10 Jan 2006 11:00:20 +0000 Received: from SAUSGW01.amd.com (sausgw01.amd.com [163.181.250.21]) by amdext4.amd.com (8.12.11/8.12.11/AMD) with ESMTP id k0AB3KZO001003; Tue, 10 Jan 2006 05:03:20 -0600 Received: from 163.181.250.1 by SAUSGW01.amd.com with ESMTP (AMD SMTP Relay (Email Firewall v6.1.0)); Tue, 10 Jan 2006 05:03:11 -0600 X-Server-Uuid: 8C3DB987-180B-4465-9446-45C15473FD3E Received: from elbe.amd.com (elbe.amd.com [172.20.31.2]) by amdint2.amd.com (8.12.8/8.12.8/AMD) with ESMTP id k0AB38h5013642; Tue, 10 Jan 2006 05:03:09 -0600 (CST) Received: from [172.20.36.124] by elbe.amd.com (8.8.8+Sun/AMD-S-2.0) id MAA06856; Tue, 10 Jan 2006 12:03:08 +0100 (MET) Message-ID: <43C39431.6020308@amd.com> Date: Tue, 10 Jan 2006 12:02:09 +0100 From: "Thomas Dahlmann" User-Agent: Mozilla Thunderbird 0.9 (X11/20041103) X-Accept-Language: en-us, en MIME-Version: 1.0 To: "Oliver Neukum" cc: linux-usb-devel@lists.sourceforge.net, "Jordan Crouse" , linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, info-linux@ldcmail.amd.com Subject: Re: [linux-usb-devel] [PATCH] UDC support for MIPS/AU1200 and Geode/CS5536 References: <20060109180356.GA8855@cosmic.amd.com> <200601092344.55988.oliver@neukum.org> In-Reply-To: <200601092344.55988.oliver@neukum.org> X-WSS-ID: 6FDD4BE53982923370-01-01 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9836 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: thomas.dahlmann@amd.com Precedence: bulk X-list: linux-mips Content-Length: 1182 Lines: 47 Oliver Neukum wrote: >Am Montag, 9. Januar 2006 19:03 schrieb Jordan Crouse: > > >>>From the "two-birds-one-stone" department, I am pleased to present USB UDC >>support for both the MIPS Au1200 SoC and the Geode CS5535 south bridge. >>Also, coming soon (in the next few days), OTG, which has been removed from >>the usb_host patch, and put into its own patch (as per David's comments). >> >>This patch is against current linux-mips git, but it should apply for Linus's >>tree as well. >> >>Regards, >>Jordan >> >> >> >+ VDBG("udc_read_bytes(): %d bytes\n", bytes); >+ >+ /* dwords first */ >+ for (i = 0; i < bytes / UDC_DWORD_BYTES; i++) { >+ *((u32*) (buf + (i<<2))) = readl(dev->rxfifo); >+ } > >Is there any reason you don't increment by 4? > > Regards > Oliver > > > > > The loop is for reading dwords only, so "i < bytes / UDC_DWORD_BYTES" cuts off remaining 1,2 or 3 bytes which are handled by the next loop. But you are right, incrementing by 4 may look better, as for (i = 0; i < bytes - bytes % UDC_DWORD_BYTES; i+=4) { *((u32*) (buf + i)) = readl(dev->rxfifo); } Thanks, Thomas From dvrabel@cantab.net Tue Jan 10 13:13:54 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 10 Jan 2006 13:14:13 +0000 (GMT) Received: from webapps.arcom.com ([194.200.159.168]:14597 "EHLO webapps.arcom.com") by ftp.linux-mips.org with ESMTP id S8133428AbWAJNNy (ORCPT ); Tue, 10 Jan 2006 13:13:54 +0000 Received: from [10.2.2.14] ([10.2.2.14]) by webapps.arcom.com with Microsoft SMTPSVC(6.0.3790.211); Tue, 10 Jan 2006 13:20:42 +0000 Message-ID: <43C3B3C3.6080204@cantab.net> Date: Tue, 10 Jan 2006 13:16:51 +0000 From: David Vrabel User-Agent: Debian Thunderbird 1.0.7 (X11/20051017) X-Accept-Language: en-us, en MIME-Version: 1.0 To: Thomas Dahlmann CC: Oliver Neukum , linux-usb-devel@lists.sourceforge.net, Jordan Crouse , linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, info-linux@ldcmail.amd.com Subject: Re: [linux-usb-devel] [PATCH] UDC support for MIPS/AU1200 and Geode/CS5536 References: <20060109180356.GA8855@cosmic.amd.com> <200601092344.55988.oliver@neukum.org> <43C39431.6020308@amd.com> In-Reply-To: <43C39431.6020308@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 10 Jan 2006 13:20:42.0578 (UTC) FILETIME=[A83CA320:01C615E8] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9837 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dvrabel@cantab.net Precedence: bulk X-list: linux-mips Content-Length: 373 Lines: 13 Thomas Dahlmann wrote: > > The loop is for reading dwords only, so "i < bytes / UDC_DWORD_BYTES" cuts > off remaining 1,2 or 3 bytes which are handled by the next loop. > But you are right, incrementing by 4 may look better, as > > for (i = 0; i < bytes - bytes % UDC_DWORD_BYTES; i+=4) { for (i = 0; i <= bytes - UDC_DWORD_BYTES; i += 4) { ? David Vrabel From oliver@neukum.org Tue Jan 10 13:37:27 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 10 Jan 2006 13:37:48 +0000 (GMT) Received: from mail1.kontent.de ([81.88.34.36]:59827 "EHLO Mail1.KONTENT.De") by ftp.linux-mips.org with ESMTP id S3465568AbWAJNh1 (ORCPT ); Tue, 10 Jan 2006 13:37:27 +0000 Received: from p549A12AB.dip0.t-ipconnect.de (p549A12AB.dip0.t-ipconnect.de [84.154.18.171]) by Mail1.KONTENT.De (Postfix) with ESMTP id 0973F100EDC3; Tue, 10 Jan 2006 14:40:35 +0100 (CET) From: Oliver Neukum To: "Thomas Dahlmann" Subject: Re: [linux-usb-devel] [PATCH] UDC support for MIPS/AU1200 and Geode/CS5536 Date: Tue, 10 Jan 2006 14:40:38 +0100 User-Agent: KMail/1.8 Cc: linux-usb-devel@lists.sourceforge.net, "Jordan Crouse" , linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, info-linux@ldcmail.amd.com References: <20060109180356.GA8855@cosmic.amd.com> <200601092344.55988.oliver@neukum.org> <43C39431.6020308@amd.com> In-Reply-To: <43C39431.6020308@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200601101440.38853.oliver@neukum.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9838 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: oliver@neukum.org Precedence: bulk X-list: linux-mips Content-Length: 1493 Lines: 50 Am Dienstag, 10. Januar 2006 12:02 schrieb Thomas Dahlmann: > > Oliver Neukum wrote: > > >Am Montag, 9. Januar 2006 19:03 schrieb Jordan Crouse: > > > > > >>>From the "two-birds-one-stone" department, I am pleased to present USB UDC > >>support for both the MIPS Au1200 SoC and the Geode CS5535 south bridge. > >>Also, coming soon (in the next few days), OTG, which has been removed from > >>the usb_host patch, and put into its own patch (as per David's comments). > >> > >>This patch is against current linux-mips git, but it should apply for Linus's > >>tree as well. > >> > >>Regards, > >>Jordan > >> > >> > >> > >+ VDBG("udc_read_bytes(): %d bytes\n", bytes); > >+ > >+ /* dwords first */ > >+ for (i = 0; i < bytes / UDC_DWORD_BYTES; i++) { > >+ *((u32*) (buf + (i<<2))) = readl(dev->rxfifo); > >+ } > > > >Is there any reason you don't increment by 4? > > > > Regards > > Oliver > > > > > > > > > > > The loop is for reading dwords only, so "i < bytes / UDC_DWORD_BYTES" cuts > off remaining 1,2 or 3 bytes which are handled by the next loop. > But you are right, incrementing by 4 may look better, as > > for (i = 0; i < bytes - bytes % UDC_DWORD_BYTES; i+=4) { > *((u32*) (buf + i)) = readl(dev->rxfifo); > } Not only will it look better, but it'll save you a shift operation. You might even compute start and finish values before the loop and save an addition in the body. Regards Oliver From ralf@linux-mips.org Tue Jan 10 14:16:30 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 10 Jan 2006 14:16:48 +0000 (GMT) Received: from extgw-uk.mips.com ([62.254.210.129]:49431 "EHLO bacchus.net.dhis.org") by ftp.linux-mips.org with ESMTP id S3465573AbWAJOQa (ORCPT ); Tue, 10 Jan 2006 14:16:30 +0000 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by bacchus.net.dhis.org (8.13.4/8.13.4) with ESMTP id k0AEJPYc013935; Tue, 10 Jan 2006 14:19:25 GMT Received: (from ralf@localhost) by denk.linux-mips.net (8.13.4/8.13.4/Submit) id k0AEJPGZ013934; Tue, 10 Jan 2006 14:19:25 GMT Date: Tue, 10 Jan 2006 14:19:24 +0000 From: Ralf Baechle To: zhuzhenhua Cc: "P. Christeas" , linux-mips@linux-mips.org Subject: Re: why the early_initcall(au1x00_setup) do not work? Message-ID: <20060110141924.GA13779@linux-mips.org> References: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> <20060109145610.GB4286@linux-mips.org> <200601091720.03822.p_christ@hol.gr> <20060109152429.GE4286@linux-mips.org> <50c9a2250601091702g7e48c75br178868a3c91d48f4@mail.gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <50c9a2250601091702g7e48c75br178868a3c91d48f4@mail.gmail.com> User-Agent: Mutt/1.4.2.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9839 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Content-Length: 371 Lines: 13 On Tue, Jan 10, 2006 at 09:02:43AM +0800, zhuzhenhua wrote: > > In 2.6.15 things were alomst fully merged but several megabytes of > > patches are between the linux-mips.org and kernel.org versions of 2.6.14. > > > > Ralf > > > > in linux-mips, where to download the patches for standard kernel? I don't publish such patches - but they're eassy to generate. Ralf From anemo@mba.ocn.ne.jp Tue Jan 10 15:21:59 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 10 Jan 2006 15:22:17 +0000 (GMT) Received: from mba.ocn.ne.jp ([210.190.142.172]:38366 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S8133373AbWAJPV7 (ORCPT ); Tue, 10 Jan 2006 15:21:59 +0000 Received: from localhost (p5252-ipad212funabasi.chiba.ocn.ne.jp [58.91.169.252]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id DFD18A348 for ; Wed, 11 Jan 2006 00:25:01 +0900 (JST) Date: Wed, 11 Jan 2006 00:24:31 +0900 (JST) Message-Id: <20060111.002431.93019846.anemo@mba.ocn.ne.jp> To: linux-mips@linux-mips.org Subject: QEMU and kernel 2.6.15 From: Atsushi Nemoto X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9840 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips Content-Length: 2468 Lines: 58 Hi. I'm a QEMU newbie. Does anybody tried QEMU 0.8.0 with recent linux-mips kernel ? I got following output and the kernel hangs. $ qemu-system-mips -kernel ../build-qemu/arch/mips/boot/vmlinux.bin -m 16 -nographic (qemu) mips_r4k_init: start mips_r4k_init: load BIOS '/usr/local/share/qemu/mips_bios.bin' size 131072 Linux version 2.6.15-gb3880251 (anemo@debian) (gcc version 3.4.5) #12 Tue Jan 10 23:50:55 JST 2006 CPU revision is: 00018000 Determined physical RAM map: memory: 01000000 @ 00000000 (usable) On node 0 totalpages: 4096 DMA zone: 4096 pages, LIFO batch:0 DMA32 zone: 0 pages, LIFO batch:0 Normal zone: 0 pages, LIFO batch:0 HighMem zone: 0 pages, LIFO batch:0 Built 1 zonelists Kernel command line: console=ttyS0 debug ip=172.20.0.2:172.20.0.1::255.255.0.0 Primary instruction cache 2kB, physically tagged, 2-way, linesize 16 bytes. Primary data cache 2kB, 2-way, linesize 16 bytes. Synthesized TLB refill handler (19 instructions). Synthesized TLB load handler fastpath (31 instructions). Synthesized TLB store handler fastpath (31 instructions). Synthesized TLB modify handler fastpath (30 instructions). PID hash table entries: 128 (order: 7, 2048 bytes) Using 100.000 MHz high precision timer. Console: colour VGA+ 80x25 Dentry cache hash table entries: 4096 (order: 2, 16384 bytes) Inode-cache hash table entries: 2048 (order: 1, 8192 bytes) Memory: 13916k/16384k available (1702k kernel code, 2468k reserved, 321k data, 112k init, 0k highmem) Calibrating delay loop... 478.41 BogoMIPS (lpj=2392064) Mount-cache hash table entries: 512 Checking for 'wait' instruction... available. I can get qemu prompt by typing C-a c and 'info register' shows PC=0x80010d40 (qemu_handle_int+0xe0). (qemu) info registers pc=0x80010d40 HI=0x00000000 LO=0x00000000 ds 0000 801b6cd8 0 GPR00: r0 00000000 at 10008401 v0 8027fbe8 v1 00000000 GPR04: a0 80281f0c a1 80281e9c a2 8027fbe8 a3 80281f0c GPR08: t0 10008400 t1 1000001f t2 00000000 t3 00000000 GPR12: t4 7fffffff t5 ffffffff t6 00100100 t7 7fffffff GPR16: s0 00000002 s1 80281f08 s2 00000000 s3 00000000 GPR20: s4 00000000 s5 00000000 s6 00000000 s7 00000000 GPR24: t8 00000000 t9 00000001 k0 80281e80 k1 80281e80 GPR28: gp 80280000 sp 80281dd0 s8 80281e80 ra 801b74f8 CP0 Status 0x10008400 Cause 0x80000400 EPC 0x801b74f4 Config0 0x80008081 Config1 0x1e190c8a LLAddr 0x00000001 Whant's going on ? An interrupt is not cleared? Any advise is welcome. Thanks. --- Atsushi Nemoto From ralf@linux-mips.org Tue Jan 10 15:33:51 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 10 Jan 2006 15:34:08 +0000 (GMT) Received: from extgw-uk.mips.com ([62.254.210.129]:22811 "EHLO bacchus.net.dhis.org") by ftp.linux-mips.org with ESMTP id S8133442AbWAJPdv (ORCPT ); Tue, 10 Jan 2006 15:33:51 +0000 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by bacchus.net.dhis.org (8.13.4/8.13.4) with ESMTP id k0AFargA016926; Tue, 10 Jan 2006 15:36:53 GMT Received: (from ralf@localhost) by denk.linux-mips.net (8.13.4/8.13.4/Submit) id k0AFaqKg016925; Tue, 10 Jan 2006 15:36:52 GMT Date: Tue, 10 Jan 2006 15:36:52 +0000 From: Ralf Baechle To: Atsushi Nemoto Cc: linux-mips@linux-mips.org Subject: Re: QEMU and kernel 2.6.15 Message-ID: <20060110153652.GA4871@linux-mips.org> References: <20060111.002431.93019846.anemo@mba.ocn.ne.jp> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20060111.002431.93019846.anemo@mba.ocn.ne.jp> User-Agent: Mutt/1.4.2.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9841 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Content-Length: 185 Lines: 7 On Wed, Jan 11, 2006 at 12:24:31AM +0900, Atsushi Nemoto wrote: > Whant's going on ? An interrupt is not cleared? Qemu is still work in progress and needs further debugging. Ralf From ivan.korzakow@gmail.com Tue Jan 10 15:37:08 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 10 Jan 2006 15:37:26 +0000 (GMT) Received: from wproxy.gmail.com ([64.233.184.206]:49340 "EHLO wproxy.gmail.com") by ftp.linux-mips.org with ESMTP id S8133442AbWAJPhI convert rfc822-to-8bit (ORCPT ); Tue, 10 Jan 2006 15:37:08 +0000 Received: by wproxy.gmail.com with SMTP id 71so3657227wri for ; Tue, 10 Jan 2006 07:40:14 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=rlQw1LZMfLQvP6jpTs6worMMhgMxHbvrb3B64wCgAn76qajTJCK4RgkZdNmZBVMG9sgmVMcEwPgLUNDFMm91+4gqzxzrlWbOX9wS1ZUpoBnasu5LITNaqViLyKu8Ux+MZlGYV/8VHxcGrRbfjpTS7UD7wqs9M/6cZHF/Z9lMMK4= Received: by 10.54.84.1 with SMTP id h1mr9604365wrb; Tue, 10 Jan 2006 07:40:12 -0800 (PST) Received: by 10.54.69.5 with HTTP; Tue, 10 Jan 2006 07:40:12 -0800 (PST) Message-ID: Date: Tue, 10 Jan 2006 16:40:12 +0100 From: Ivan Korzakow To: Ralf Baechle Subject: Re: why the early_initcall(au1x00_setup) do not work? Cc: zhuzhenhua , "P. Christeas" , linux-mips@linux-mips.org In-Reply-To: <20060110141924.GA13779@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline References: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> <20060109145610.GB4286@linux-mips.org> <200601091720.03822.p_christ@hol.gr> <20060109152429.GE4286@linux-mips.org> <50c9a2250601091702g7e48c75br178868a3c91d48f4@mail.gmail.com> <20060110141924.GA13779@linux-mips.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9842 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ivan.korzakow@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 512 Lines: 16 2006/1/10, Ralf Baechle : > On Tue, Jan 10, 2006 at 09:02:43AM +0800, zhuzhenhua wrote: > > > > In 2.6.15 things were alomst fully merged but several megabytes of > > > patches are between the linux-mips.org and kernel.org versions of 2.6.14. > > > > > > Ralf > > > > > > > in linux-mips, where to download the patches for standard kernel? > > I don't publish such patches - but they're eassy to generate. > Could you be a bit more explicit about that "easy" way you generate them ? Ivan From ralf@linux-mips.org Tue Jan 10 15:41:32 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 10 Jan 2006 15:41:51 +0000 (GMT) Received: from extgw-uk.mips.com ([62.254.210.129]:30222 "EHLO bacchus.net.dhis.org") by ftp.linux-mips.org with ESMTP id S8133373AbWAJPlc (ORCPT ); Tue, 10 Jan 2006 15:41:32 +0000 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by bacchus.net.dhis.org (8.13.4/8.13.4) with ESMTP id k0AFiYHk017187 for ; Tue, 10 Jan 2006 15:44:34 GMT Received: (from ralf@localhost) by denk.linux-mips.net (8.13.4/8.13.4/Submit) id k0AFiYEH017186 for linux-mips@linux-mips.org; Tue, 10 Jan 2006 15:44:34 GMT Date: Tue, 10 Jan 2006 15:44:34 +0000 From: Ralf Baechle To: linux-mips@linux-mips.org Subject: [ADMIN] linux-mips.org moving ... Message-ID: <20060110154434.GB4871@linux-mips.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.4.2.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9843 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Content-Length: 180 Lines: 5 Starting on Thursday, January 12, MIPS UK where linux-mips.org is hosted will be moving to a new site. This will result in a some downtime for the linux-mips.org machine. Ralf From p_christ@hol.gr Tue Jan 10 15:52:09 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 10 Jan 2006 15:52:26 +0000 (GMT) Received: from [62.38.108.96] ([62.38.108.96]:18404 "EHLO pfn3.pefnos") by ftp.linux-mips.org with ESMTP id S8133373AbWAJPwJ (ORCPT ); Tue, 10 Jan 2006 15:52:09 +0000 Received: from xorhgos2.pefnos (xorhgos2.pefnos [192.168.0.3]) by pfn3.pefnos (Postfix) with ESMTP id 3995B1F101; Tue, 10 Jan 2006 17:55:06 +0200 (EET) From: "P. Christeas" To: linux-mips@linux-mips.org Subject: Re: QEMU and kernel 2.6.15 Date: Tue, 10 Jan 2006 17:54:52 +0200 User-Agent: KMail/1.9 Cc: Atsushi Nemoto References: <20060111.002431.93019846.anemo@mba.ocn.ne.jp> In-Reply-To: <20060111.002431.93019846.anemo@mba.ocn.ne.jp> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200601101754.53791.p_christ@hol.gr> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9844 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: p_christ@hol.gr Precedence: bulk X-list: linux-mips Content-Length: 774 Lines: 19 On Tuesday 10 January 2006 5:24 pm, Atsushi Nemoto wrote: > Hi. I'm a QEMU newbie. Does anybody tried QEMU 0.8.0 with recent > linux-mips kernel ? > > I got following output and the kernel hangs. > >... > Memory: 13916k/16384k available (1702k kernel code, 2468k reserved, 321k > data, 112k init, 0k highmem) Calibrating delay loop... 478.41 BogoMIPS > (lpj=2392064) > Mount-cache hash table entries: 512 > Checking for 'wait' instruction... available. > > However, this *does* resemble the bug I'm having in real hw. I generally get instablilities nearly always after the memory mapping and 'wait' instruction on a 4Kc core with 2.6.15. I'm not a MIPS expert nor have I the time to learn its internals. So, anything that might give me a hint is worth investigating.. From p_christ@hol.gr Tue Jan 10 15:54:56 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 10 Jan 2006 15:55:14 +0000 (GMT) Received: from [62.38.108.96] ([62.38.108.96]:48007 "EHLO pfn3.pefnos") by ftp.linux-mips.org with ESMTP id S8133373AbWAJPy4 (ORCPT ); Tue, 10 Jan 2006 15:54:56 +0000 Received: from xorhgos2.pefnos (xorhgos2.pefnos [192.168.0.3]) by pfn3.pefnos (Postfix) with ESMTP id 9B2AF1F101; Tue, 10 Jan 2006 17:57:56 +0200 (EET) From: "P. Christeas" To: linux-mips@linux-mips.org Subject: Re: why the early_initcall(au1x00_setup) do not work? Date: Tue, 10 Jan 2006 17:57:44 +0200 User-Agent: KMail/1.9 Cc: Ivan Korzakow References: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> <20060110141924.GA13779@linux-mips.org> In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200601101757.45297.p_christ@hol.gr> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9845 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: p_christ@hol.gr Precedence: bulk X-list: linux-mips Content-Length: 715 Lines: 18 On Tuesday 10 January 2006 5:40 pm, Ivan Korzakow wrote: > 2006/1/10, Ralf Baechle : > > On Tue, Jan 10, 2006 at 09:02:43AM +0800, zhuzhenhua wrote: > > > > In 2.6.15 things were alomst fully merged but several megabytes of > > > > patches are between the linux-mips.org and kernel.org versions of > > > > 2.6.14. > > > > > > > > Ralf > > > > > > in linux-mips, where to download the patches for standard kernel? > > > > I don't publish such patches - but they're eassy to generate. > > Could you be a bit more explicit about that "easy" way you generate them ? > > Ivan You make sure you have the two trees and diff them. They 're both in git and typically you could do that only using git. From ivan.korzakow@gmail.com Tue Jan 10 16:35:50 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 10 Jan 2006 16:36:15 +0000 (GMT) Received: from wproxy.gmail.com ([64.233.184.198]:36568 "EHLO wproxy.gmail.com") by ftp.linux-mips.org with ESMTP id S8133431AbWAJQfu convert rfc822-to-8bit (ORCPT ); Tue, 10 Jan 2006 16:35:50 +0000 Received: by wproxy.gmail.com with SMTP id 71so3673081wri for ; Tue, 10 Jan 2006 08:38:55 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=N+GidnhpSkoEOOOji69+4LjcQCC91aJk2xE88LuHKJIuH9XFkg4vLXYuOcY/X/CbDNlCF5Zq+EygMig3ZjKyjRoZvH8sllQM3RxuaDGXLHixLQ9aqnj9DBg7H+BPqK9lGSrePvVWwXhG6Y0ebpKOh1y7cC2yUvykGvcqyqTFcFM= Received: by 10.54.67.10 with SMTP id p10mr5463219wra; Tue, 10 Jan 2006 08:38:55 -0800 (PST) Received: by 10.54.69.5 with HTTP; Tue, 10 Jan 2006 08:38:55 -0800 (PST) Message-ID: Date: Tue, 10 Jan 2006 17:38:55 +0100 From: Ivan Korzakow To: "P. Christeas" Subject: Re: why the early_initcall(au1x00_setup) do not work? Cc: linux-mips@linux-mips.org In-Reply-To: <200601101757.45297.p_christ@hol.gr> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline References: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> <20060110141924.GA13779@linux-mips.org> <200601101757.45297.p_christ@hol.gr> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9846 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ivan.korzakow@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 1449 Lines: 37 2006/1/10, P. Christeas : > On Tuesday 10 January 2006 5:40 pm, Ivan Korzakow wrote: > > 2006/1/10, Ralf Baechle : > > > On Tue, Jan 10, 2006 at 09:02:43AM +0800, zhuzhenhua wrote: > > > > > In 2.6.15 things were alomst fully merged but several megabytes of > > > > > patches are between the linux-mips.org and kernel.org versions of > > > > > 2.6.14. > > > > > > > > > > Ralf > > > > > > > > in linux-mips, where to download the patches for standard kernel? > > > > > > I don't publish such patches - but they're eassy to generate. > > > > Could you be a bit more explicit about that "easy" way you generate them ? > > > > Ivan > You make sure you have the two trees and diff them. > They 're both in git and typically you could do that only using git. > Have you ever tried what you're talking about or is it a guess ? For example, let's say that there's a bug introduced when merging Linus tree with mips branch. How do you easily "bisect" in order to do a binary seek of this bug ? BTW, I noticed that Linux mips repository have several branches. Each branch is tracking each kernel minor version. I think this is completly useless : 1 - it makes the repository huge by keeping history since 2.2 (It's pointless for most people) 2 - The way branches are made is broken : you can not fetch separate branches without doing some "grafts" things Why not simply ask Linus to pull from the mips tree ? Ivan From p_christ@hol.gr Tue Jan 10 16:54:44 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 10 Jan 2006 16:55:22 +0000 (GMT) Received: from [62.38.108.96] ([62.38.108.96]:10206 "EHLO pfn3.pefnos") by ftp.linux-mips.org with ESMTP id S8133452AbWAJQyn (ORCPT ); Tue, 10 Jan 2006 16:54:43 +0000 Received: from xorhgos2.pefnos (xorhgos2.pefnos [192.168.0.3]) by pfn3.pefnos (Postfix) with ESMTP id 4783F1F101; Tue, 10 Jan 2006 18:57:40 +0200 (EET) From: "P. Christeas" To: linux-mips@linux-mips.org, Ralf Baechle Subject: Re: why the early_initcall(au1x00_setup) do not work? Date: Tue, 10 Jan 2006 18:57:24 +0200 User-Agent: KMail/1.9 Cc: Ivan Korzakow References: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> <200601101757.45297.p_christ@hol.gr> In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200601101857.26978.p_christ@hol.gr> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9847 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: p_christ@hol.gr Precedence: bulk X-list: linux-mips Content-Length: 1013 Lines: 20 On Tuesday 10 January 2006 6:38 pm, Ivan Korzakow wrote: > 2006/1/10, P. Christeas : > > You make sure you have the two trees and diff them. > > They 're both in git and typically you could do that only using git. > > Have you ever tried what you're talking about or is it a guess ? > For example, let's say that there's a bug introduced when merging > Linus tree with mips branch. How do you easily "bisect" in order to do > a binary seek of this bug ? I was about to mention the git incompatibility as I gave you the first answer. It's true what you say and I also find it annoying. That's why I use Linus tree. I cannot, though, complaint to Ralph about this practice. It seems that he has done his best to preserve the CVS history of his tree. We can only thank him for that. It is just a lot of work to trim the tree and make it Linus-parallel. There is also things that I don't know about git, so I won't jump to conclusions yet (as to whether it is feasible to merge with Linus). From ivan.korzakow@gmail.com Tue Jan 10 17:12:13 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 10 Jan 2006 17:12:42 +0000 (GMT) Received: from wproxy.gmail.com ([64.233.184.197]:14383 "EHLO wproxy.gmail.com") by ftp.linux-mips.org with ESMTP id S8133442AbWAJRMN convert rfc822-to-8bit (ORCPT ); Tue, 10 Jan 2006 17:12:13 +0000 Received: by wproxy.gmail.com with SMTP id 71so3682921wri for ; Tue, 10 Jan 2006 09:15:19 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=djh5j5BiFviIDAWhc37UPmvdEM9hKVUH2l4wBPV+d8+LqDyQI0ZrHyfkak97Y/p/1wjWPOP3V38gB21Xldg53Lfg2NgMFPgxuJOBc8UP0ZBeKca9cgU32k9/Cbyxsl/aB8S9zvYipc8oS51A1RA/Z6Yb/gOXHH9wImFd9Ajev0U= Received: by 10.54.76.4 with SMTP id y4mr9711599wra; Tue, 10 Jan 2006 09:15:18 -0800 (PST) Received: by 10.54.69.5 with HTTP; Tue, 10 Jan 2006 09:15:18 -0800 (PST) Message-ID: Date: Tue, 10 Jan 2006 18:15:18 +0100 From: Ivan Korzakow To: "P. Christeas" Subject: Re: why the early_initcall(au1x00_setup) do not work? Cc: linux-mips@linux-mips.org, Ralf Baechle In-Reply-To: <200601101857.26978.p_christ@hol.gr> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline References: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> <200601101757.45297.p_christ@hol.gr> <200601101857.26978.p_christ@hol.gr> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9848 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ivan.korzakow@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 1153 Lines: 24 2006/1/10, P. Christeas : > On Tuesday 10 January 2006 6:38 pm, Ivan Korzakow wrote: > > 2006/1/10, P. Christeas : > > > > You make sure you have the two trees and diff them. > > > They 're both in git and typically you could do that only using git. > > > > Have you ever tried what you're talking about or is it a guess ? > > For example, let's say that there's a bug introduced when merging > > Linus tree with mips branch. How do you easily "bisect" in order to do > > a binary seek of this bug ? > > I was about to mention the git incompatibility as I gave you the first > answer. It's true what you say and I also find it annoying. That's why I use > Linus tree. > I cannot, though, complaint to Ralph about this practice. It seems that he has > done his best to preserve the CVS history of his tree. We can only thank him > for that. It is just a lot of work to trim the tree and make it > Linus-parallel. Why not simply keep CVS repository available for 1% of people willing to browse the history ? And make life easier for 99% of people willing to work on 2.6 ... (2.4 work may continue to use CVS too). Ivan From jcrouse@cosmic.amd.com Tue Jan 10 17:26:40 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 10 Jan 2006 17:27:07 +0000 (GMT) Received: from amdext3.amd.com ([139.95.251.6]:30116 "EHLO amdext3.amd.com") by ftp.linux-mips.org with ESMTP id S8133466AbWAJR0k (ORCPT ); Tue, 10 Jan 2006 17:26:40 +0000 Received: from SSVLGW01.amd.com (ssvlgw01.amd.com [139.95.250.169]) by amdext3.amd.com (8.12.11/8.12.11/AMD) with ESMTP id k0AHTUVM029893; Tue, 10 Jan 2006 09:29:30 -0800 Received: from 139.95.250.1 by SSVLGW02.amd.com with ESMTP (AMD SMTP Relay (Email Firewall v6.1.0)); Tue, 10 Jan 2006 09:29:22 -0800 X-Server-Uuid: 519AC16A-9632-469E-B354-112C592D09E8 Received: from ldcmail.amd.com (ldcmail.amd.com [147.5.200.40]) by amdint.amd.com (8.12.8/8.12.8/AMD) with ESMTP id k0AHTMVP023896; Tue, 10 Jan 2006 09:29:22 -0800 (PST) Received: from cosmic.amd.com (cosmic.amd.com [147.5.201.206]) by ldcmail.amd.com (Postfix) with ESMTP id BC6F82028; Tue, 10 Jan 2006 10:29:21 -0700 (MST) Received: from cosmic.amd.com (localhost [127.0.0.1]) by cosmic.amd.com (8.13.4/8.13.4) with ESMTP id k0AHcDlC029945; Tue, 10 Jan 2006 10:38:13 -0700 Received: (from jcrouse@localhost) by cosmic.amd.com ( 8.13.4/8.13.4/Submit) id k0AHcDYp029944; Tue, 10 Jan 2006 10:38:13 -0700 Date: Tue, 10 Jan 2006 10:38:13 -0700 From: "Jordan Crouse" To: "Ivan Korzakow" cc: "P. Christeas" , linux-mips@linux-mips.org Subject: Re: why the early_initcall(au1x00_setup) do not work? Message-ID: <20060110173813.GA25480@cosmic.amd.com> References: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> <20060110141924.GA13779@linux-mips.org> <200601101757.45297.p_christ@hol.gr> MIME-Version: 1.0 In-Reply-To: User-Agent: Mutt/1.5.11 X-WSS-ID: 6FDD31782C43938785-01-01 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9849 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jordan.crouse@amd.com Precedence: bulk X-list: linux-mips Content-Length: 963 Lines: 36 > Have you ever tried what you're talking about or is it a guess ? I just did that. I have Linus's tree and tags, and Ralf's tree: git checkout mips git diff v2.6.14..HEAD the nice thing about git is that it was written to do exactly the sort of things we need it to do, like this. > For example, let's say that there's a bug introduced when merging > Linus tree with mips branch. How do you easily "bisect" in order to do > a binary seek of this bug ? Linus wrote a HOWTO on that very subject: http://www.kernel.org/pub/software/scm/git/docs/howto/isolate-bugs-with-bisect.txt > 2 - The way branches are made is broken : you can not fetch separate > branches without doing some "grafts" things I'm no git expert, but can't you just git-pull rsync://ftp.linux-mips.org/git/linux.git remote:local That works for me. Regards, Jordan -- Jordan Crouse Senior Linux Engineer AMD - Personal Connectivity Solutions Group From ralf@linux-mips.org Tue Jan 10 21:50:32 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 10 Jan 2006 21:50:53 +0000 (GMT) Received: from alg138.algor.co.uk ([62.254.210.138]:23245 "EHLO bacchus.net.dhis.org") by ftp.linux-mips.org with ESMTP id S8133460AbWAJVuc (ORCPT ); Tue, 10 Jan 2006 21:50:32 +0000 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by bacchus.net.dhis.org (8.13.4/8.13.4) with ESMTP id k0ALrOhe029027; Tue, 10 Jan 2006 21:53:25 GMT Received: (from ralf@localhost) by denk.linux-mips.net (8.13.4/8.13.4/Submit) id k0ALrMXn029026; Tue, 10 Jan 2006 21:53:22 GMT Date: Tue, 10 Jan 2006 21:53:22 +0000 From: Ralf Baechle To: "P. Christeas" Cc: linux-mips@linux-mips.org, Ivan Korzakow Subject: Re: why the early_initcall(au1x00_setup) do not work? Message-ID: <20060110215322.GA27577@linux-mips.org> References: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> <200601101757.45297.p_christ@hol.gr> <200601101857.26978.p_christ@hol.gr> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <200601101857.26978.p_christ@hol.gr> User-Agent: Mutt/1.4.2.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9850 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Content-Length: 1207 Lines: 25 On Tue, Jan 10, 2006 at 06:57:24PM +0200, P. Christeas wrote: > > > You make sure you have the two trees and diff them. > > > They 're both in git and typically you could do that only using git. > > > > Have you ever tried what you're talking about or is it a guess ? > > For example, let's say that there's a bug introduced when merging > > Linus tree with mips branch. How do you easily "bisect" in order to do > > a binary seek of this bug ? > > I was about to mention the git incompatibility as I gave you the first > answer. It's true what you say and I also find it annoying. That's why I use > Linus tree. > I cannot, though, complaint to Ralph about this practice. It seems that he has > done his best to preserve the CVS history of his tree. We can only thank him > for that. It is just a lot of work to trim the tree and make it > Linus-parallel. > There is also things that I don't know about git, so I won't jump to > conclusions yet (as to whether it is feasible to merge with Linus). It is possible to keep both Linus's and the lmo tree in the same repository with a _little_ care. I do that all the time. When compressed this will result in a bloat of just about 10-20MB. Ralf From zzh.hust@gmail.com Wed Jan 11 02:01:43 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 11 Jan 2006 02:02:03 +0000 (GMT) Received: from wproxy.gmail.com ([64.233.184.198]:54930 "EHLO wproxy.gmail.com") by ftp.linux-mips.org with ESMTP id S8133476AbWAKCBn convert rfc822-to-8bit (ORCPT ); Wed, 11 Jan 2006 02:01:43 +0000 Received: by wproxy.gmail.com with SMTP id 36so38470wra for ; Tue, 10 Jan 2006 18:04:51 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=UPo/ePkmPiK6vePRpeI3OY9vRzEbiX9ZK5ZlUJ69X0mQsH4Dor5jLjCJ4HQ1c8vRygAv+CXmtFy8/wLeZo2Rb9iFsgRwWevpsTouFqxnL8vMlqLD5R7DE7Z4fdnvcmOMSU4qjWoJe0vyS/z1pYK460mqL4FjLzfZ4lgry+Odwe8= Received: by 10.54.151.9 with SMTP id y9mr1514792wrd; Tue, 10 Jan 2006 18:04:50 -0800 (PST) Received: by 10.54.156.1 with HTTP; Tue, 10 Jan 2006 18:04:50 -0800 (PST) Message-ID: <50c9a2250601101804h73aa933dyf3434635aa7bde55@mail.gmail.com> Date: Wed, 11 Jan 2006 10:04:50 +0800 From: zhuzhenhua To: Ralf Baechle Subject: Re: why the early_initcall(au1x00_setup) do not work? Cc: "P. Christeas" , linux-mips@linux-mips.org In-Reply-To: <20060110141924.GA13779@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline References: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> <20060109145610.GB4286@linux-mips.org> <200601091720.03822.p_christ@hol.gr> <20060109152429.GE4286@linux-mips.org> <50c9a2250601091702g7e48c75br178868a3c91d48f4@mail.gmail.com> <20060110141924.GA13779@linux-mips.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9851 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zzh.hust@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 768 Lines: 29 On 1/10/06, Ralf Baechle wrote: > On Tue, Jan 10, 2006 at 09:02:43AM +0800, zhuzhenhua wrote: > > > > In 2.6.15 things were alomst fully merged but several megabytes of > > > patches are between the linux-mips.org and kernel.org versions of 2.6.14. > > > > > > Ralf > > > > > > > in linux-mips, where to download the patches for standard kernel? > > I don't publish such patches - but they're eassy to generate. i find on http://www.linux-mips.org/pub/linux/mips/kernel/v2.6/ can download the kernel tarball, i compire the 2.6.14 with the stand kernel, and found they are not same. is the tarball in http://www.linux-mips.org/pub/linux/mips/kernel/v2.6/ is tared with the cvs tree code in linux-mips? > > Ralf > Best regards zhuzhenhua From ivan.korzakow@gmail.com Wed Jan 11 11:06:55 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 11 Jan 2006 11:07:16 +0000 (GMT) Received: from wproxy.gmail.com ([64.233.184.205]:31897 "EHLO wproxy.gmail.com") by ftp.linux-mips.org with ESMTP id S8133429AbWAKLGz convert rfc822-to-8bit (ORCPT ); Wed, 11 Jan 2006 11:06:55 +0000 Received: by wproxy.gmail.com with SMTP id 71so126698wri for ; Wed, 11 Jan 2006 03:10:05 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=gjDTX9iblrfg7cC2ZZ1IEQHMmRVGUFGGkjCjBvxpaV3356sImMbFhh2wMPbK2aLHgUqgmheTBMC6o6JoRQiPcrTzj922qst+wSU0lNVy8jZtA9gfUqfiyiRsa2FMfgpcEOHNgsI1224WartvbwVcMF0mCdyav2RzaOZ05DJ4Q80= Received: by 10.54.72.5 with SMTP id u5mr798317wra; Wed, 11 Jan 2006 03:10:05 -0800 (PST) Received: by 10.54.69.5 with HTTP; Wed, 11 Jan 2006 03:10:05 -0800 (PST) Message-ID: Date: Wed, 11 Jan 2006 12:10:05 +0100 From: Ivan Korzakow To: Ralf Baechle Subject: Re: why the early_initcall(au1x00_setup) do not work? Cc: "P. Christeas" , linux-mips@linux-mips.org In-Reply-To: <20060110215322.GA27577@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline References: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> <200601101757.45297.p_christ@hol.gr> <200601101857.26978.p_christ@hol.gr> <20060110215322.GA27577@linux-mips.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9852 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ivan.korzakow@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 1444 Lines: 33 2006/1/10, Ralf Baechle : > On Tue, Jan 10, 2006 at 06:57:24PM +0200, P. Christeas wrote: > > > > > You make sure you have the two trees and diff them. > > > > They 're both in git and typically you could do that only using git. > > > > > > Have you ever tried what you're talking about or is it a guess ? > > > For example, let's say that there's a bug introduced when merging > > > Linus tree with mips branch. How do you easily "bisect" in order to do > > > a binary seek of this bug ? > > > > I was about to mention the git incompatibility as I gave you the first > > answer. It's true what you say and I also find it annoying. That's why I use > > Linus tree. > > I cannot, though, complaint to Ralph about this practice. It seems that he has > > done his best to preserve the CVS history of his tree. We can only thank him > > for that. It is just a lot of work to trim the tree and make it > > Linus-parallel. > > There is also things that I don't know about git, so I won't jump to > > conclusions yet (as to whether it is feasible to merge with Linus). > > It is possible to keep both Linus's and the lmo tree in the same > repository with a _little_ care. I do that all the time. When compressed > this will result in a bloat of just about 10-20MB. > It would be great to be a little bit more explicit by giving some _little_ examples ! Why not enlighting us directly instead of being so vague. Thanks Ivan From ralf@linux-mips.org Wed Jan 11 11:16:58 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 11 Jan 2006 11:17:19 +0000 (GMT) Received: from extgw-uk.mips.com ([62.254.210.129]:4118 "EHLO bacchus.net.dhis.org") by ftp.linux-mips.org with ESMTP id S8133376AbWAKLQ6 (ORCPT ); Wed, 11 Jan 2006 11:16:58 +0000 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by bacchus.net.dhis.org (8.13.4/8.13.4) with ESMTP id k0BBK1x7005085; Wed, 11 Jan 2006 11:20:02 GMT Received: (from ralf@localhost) by denk.linux-mips.net (8.13.4/8.13.4/Submit) id k0BBK110005084; Wed, 11 Jan 2006 11:20:01 GMT Date: Wed, 11 Jan 2006 11:20:01 +0000 From: Ralf Baechle To: Ivan Korzakow Cc: "P. Christeas" , linux-mips@linux-mips.org Subject: Re: why the early_initcall(au1x00_setup) do not work? Message-ID: <20060111112001.GA4403@linux-mips.org> References: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> <200601101757.45297.p_christ@hol.gr> <200601101857.26978.p_christ@hol.gr> <20060110215322.GA27577@linux-mips.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9853 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Content-Length: 506 Lines: 15 On Wed, Jan 11, 2006 at 12:10:05PM +0100, Ivan Korzakow wrote: > It would be great to be a little bit more explicit by giving some > _little_ examples ! Why not enlighting us directly instead of being so > vague. In books that kind of stuff is usually marked as "left as an exercise to the reader" ;-) git-clone rsync://ftp.linux-mips.org/pub/scm/linux.git repository cd repository git-fetch git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 master:linus git-repack -a -d Ralf From ralf@linux-mips.org Wed Jan 11 11:45:56 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 11 Jan 2006 11:46:17 +0000 (GMT) Received: from extgw-uk.mips.com ([62.254.210.129]:5405 "EHLO bacchus.net.dhis.org") by ftp.linux-mips.org with ESMTP id S8133429AbWAKLp4 (ORCPT ); Wed, 11 Jan 2006 11:45:56 +0000 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by bacchus.net.dhis.org (8.13.4/8.13.4) with ESMTP id k0BBmv9s005995; Wed, 11 Jan 2006 11:48:57 GMT Received: (from ralf@localhost) by denk.linux-mips.net (8.13.4/8.13.4/Submit) id k0ANK6lS003667; Tue, 10 Jan 2006 23:20:06 GMT Date: Tue, 10 Jan 2006 23:20:06 +0000 From: Ralf Baechle To: Ivan Korzakow Cc: "P. Christeas" , linux-mips@linux-mips.org Subject: Re: why the early_initcall(au1x00_setup) do not work? Message-ID: <20060110232006.GA3519@linux-mips.org> References: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> <200601101757.45297.p_christ@hol.gr> <200601101857.26978.p_christ@hol.gr> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9854 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Content-Length: 692 Lines: 16 On Tue, Jan 10, 2006 at 06:15:18PM +0100, Ivan Korzakow wrote: > Why not simply keep CVS repository available for 1% of people willing > to browse the history ? And make life easier for 99% of people willing > to work on 2.6 ... (2.4 work may continue to use CVS too). The CVS repository is still available - and will stay for a long time so people have a chance to do diffs against their existing checked out trees. But no more changes. Note, this does not affect the other projects in the CVS server. Each of them is maintained independantly and for each the decission to use CVS, git or some flying saucer technology to use is made by whoever is the caretaker of that project. Ralf From ralf@linux-mips.org Wed Jan 11 12:13:47 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 11 Jan 2006 12:14:18 +0000 (GMT) Received: from extgw-uk.mips.com ([62.254.210.129]:19734 "EHLO bacchus.net.dhis.org") by ftp.linux-mips.org with ESMTP id S8133429AbWAKMNr (ORCPT ); Wed, 11 Jan 2006 12:13:47 +0000 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by bacchus.net.dhis.org (8.13.4/8.13.4) with ESMTP id k0BCGk8d006778; Wed, 11 Jan 2006 12:16:47 GMT Received: (from ralf@localhost) by denk.linux-mips.net (8.13.4/8.13.4/Submit) id k0BCGjBY006776; Wed, 11 Jan 2006 12:16:45 GMT Date: Wed, 11 Jan 2006 12:16:45 +0000 From: Ralf Baechle To: zhuzhenhua Cc: "P. Christeas" , linux-mips@linux-mips.org Subject: Re: why the early_initcall(au1x00_setup) do not work? Message-ID: <20060111121645.GB4403@linux-mips.org> References: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> <20060109145610.GB4286@linux-mips.org> <200601091720.03822.p_christ@hol.gr> <20060109152429.GE4286@linux-mips.org> <50c9a2250601091702g7e48c75br178868a3c91d48f4@mail.gmail.com> <20060110141924.GA13779@linux-mips.org> <50c9a2250601101804h73aa933dyf3434635aa7bde55@mail.gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <50c9a2250601101804h73aa933dyf3434635aa7bde55@mail.gmail.com> User-Agent: Mutt/1.4.2.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9855 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Content-Length: 1038 Lines: 28 On Wed, Jan 11, 2006 at 10:04:50AM +0800, zhuzhenhua wrote: > On 1/10/06, Ralf Baechle wrote: > > On Tue, Jan 10, 2006 at 09:02:43AM +0800, zhuzhenhua wrote: > > > > > > In 2.6.15 things were alomst fully merged but several megabytes of > > > > patches are between the linux-mips.org and kernel.org versions of 2.6.14. > > > > > > > > Ralf > > > > > > > > > > in linux-mips, where to download the patches for standard kernel? > > > > I don't publish such patches - but they're eassy to generate. > i find on http://www.linux-mips.org/pub/linux/mips/kernel/v2.6/ can > download the kernel tarball, i compire the 2.6.14 with the stand > kernel, and found they are not same. > > is the tarball in > http://www.linux-mips.org/pub/linux/mips/kernel/v2.6/ is tared with > the cvs tree code in linux-mips? Some tarballs were rather old, were created before the switch to git. The 2.4 and 2.6 tarballs were created from the git tags. In case of doubt you could always try git-get-tar-commit-id on the tarball. Ralf From drow@nevyn.them.org Wed Jan 11 14:40:46 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 11 Jan 2006 14:41:10 +0000 (GMT) Received: from nevyn.them.org ([66.93.172.17]:9698 "EHLO nevyn.them.org") by ftp.linux-mips.org with ESMTP id S8133475AbWAKOkq (ORCPT ); Wed, 11 Jan 2006 14:40:46 +0000 Received: from drow by nevyn.them.org with local (Exim 4.54) id 1EwhCe-0004WV-OI; Wed, 11 Jan 2006 09:43:56 -0500 Date: Wed, 11 Jan 2006 09:43:56 -0500 From: Daniel Jacobowitz To: Atsushi Nemoto Cc: linux-mips@linux-mips.org Subject: Re: QEMU and kernel 2.6.15 Message-ID: <20060111144355.GA17275@nevyn.them.org> References: <20060111.002431.93019846.anemo@mba.ocn.ne.jp> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20060111.002431.93019846.anemo@mba.ocn.ne.jp> User-Agent: Mutt/1.5.8i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9856 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dan@debian.org Precedence: bulk X-list: linux-mips Content-Length: 1213 Lines: 33 On Wed, Jan 11, 2006 at 12:24:31AM +0900, Atsushi Nemoto wrote: > Hi. I'm a QEMU newbie. Does anybody tried QEMU 0.8.0 with recent > linux-mips kernel ? You've configured the kernel for QEMU, right? And are usin QEMU from CVS? > Checking for 'wait' instruction... available. > > > I can get qemu prompt by typing C-a c and 'info register' shows > PC=0x80010d40 (qemu_handle_int+0xe0). > > (qemu) info registers > pc=0x80010d40 HI=0x00000000 LO=0x00000000 ds 0000 801b6cd8 0 > GPR00: r0 00000000 at 10008401 v0 8027fbe8 v1 00000000 > GPR04: a0 80281f0c a1 80281e9c a2 8027fbe8 a3 80281f0c > GPR08: t0 10008400 t1 1000001f t2 00000000 t3 00000000 > GPR12: t4 7fffffff t5 ffffffff t6 00100100 t7 7fffffff > GPR16: s0 00000002 s1 80281f08 s2 00000000 s3 00000000 > GPR20: s4 00000000 s5 00000000 s6 00000000 s7 00000000 > GPR24: t8 00000000 t9 00000001 k0 80281e80 k1 80281e80 > GPR28: gp 80280000 sp 80281dd0 s8 80281e80 ra 801b74f8 > CP0 Status 0x10008400 Cause 0x80000400 EPC 0x801b74f4 > Config0 0x80008081 Config1 0x1e190c8a LLAddr 0x00000001 It worked for me the last time I tried, but that was a couple of weeks ago. The port may have gotten broken... -- Daniel Jacobowitz CodeSourcery From ivan.korzakow@gmail.com Wed Jan 11 15:04:20 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 11 Jan 2006 15:04:42 +0000 (GMT) Received: from wproxy.gmail.com ([64.233.184.194]:36220 "EHLO wproxy.gmail.com") by ftp.linux-mips.org with ESMTP id S8133542AbWAKPEU convert rfc822-to-8bit (ORCPT ); Wed, 11 Jan 2006 15:04:20 +0000 Received: by wproxy.gmail.com with SMTP id 71so174746wri for ; Wed, 11 Jan 2006 07:07:26 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=TjZf2N6P1+iBm60Ef1Bm67+hUa+ehDozsLkwHWax9t2eR3ZsUekaVRR/q0WcrLrnDurPfRsEqCuEs5J88lbU2WNaZpX7fficMt/mPxSGH2MskY4rS8mCvvJPzZf7mc5WRS6skid2fwJGLucPhuNh3EvTPJW6vgDnf30fvnk2D+A= Received: by 10.54.83.7 with SMTP id g7mr998314wrb; Wed, 11 Jan 2006 07:07:25 -0800 (PST) Received: by 10.54.69.5 with HTTP; Wed, 11 Jan 2006 07:07:25 -0800 (PST) Message-ID: Date: Wed, 11 Jan 2006 16:07:25 +0100 From: Ivan Korzakow To: Ralf Baechle Subject: Re: why the early_initcall(au1x00_setup) do not work? Cc: "P. Christeas" , linux-mips@linux-mips.org In-Reply-To: <20060111112001.GA4403@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline References: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> <200601101757.45297.p_christ@hol.gr> <200601101857.26978.p_christ@hol.gr> <20060110215322.GA27577@linux-mips.org> <20060111112001.GA4403@linux-mips.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9857 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ivan.korzakow@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 1220 Lines: 33 2006/1/11, Ralf Baechle : > On Wed, Jan 11, 2006 at 12:10:05PM +0100, Ivan Korzakow wrote: > > > It would be great to be a little bit more explicit by giving some > > _little_ examples ! Why not enlighting us directly instead of being so > > vague. > > In books that kind of stuff is usually marked as "left as an exercise to > the reader" ;-) yeah, but we are chating on a forum ;0) > > git-clone rsync://ftp.linux-mips.org/pub/scm/linux.git repository > cd repository > git-fetch git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 master:linus > git-repack -a -d > I know that but you miss my point. GIT is a tool to ease work on linux kernel, but the way you use it makes harder life of users of your tree. For example your tree contains more than 350 000 objects ! That makes a lot of git commands running slow... Let's say I'm developing a net drivers on ARM platform. I'm actually do not care about ARM development, but I do care about net tree. To do that, I just need to clone net tree because I know that ARM should be OK with this tree. What about MIPS ? I'm just wondering why not asking to Linus to pull from your tree like every others maintainers do ? Ivan From anemo@mba.ocn.ne.jp Wed Jan 11 15:06:31 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 11 Jan 2006 15:06:56 +0000 (GMT) Received: from mba.ocn.ne.jp ([210.190.142.172]:57567 "HELO smtp.mba.ocn.ne.jp") by ftp.linux-mips.org with SMTP id S8133731AbWAKPGb (ORCPT ); Wed, 11 Jan 2006 15:06:31 +0000 Received: from localhost (p8236-ipad03funabasi.chiba.ocn.ne.jp [219.160.88.236]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 01BC9B12C; Thu, 12 Jan 2006 00:09:34 +0900 (JST) Date: Thu, 12 Jan 2006 00:09:04 +0900 (JST) Message-Id: <20060112.000904.74752908.anemo@mba.ocn.ne.jp> To: dan@debian.org Cc: linux-mips@linux-mips.org Subject: Re: QEMU and kernel 2.6.15 From: Atsushi Nemoto In-Reply-To: <20060111144355.GA17275@nevyn.them.org> References: <20060111.002431.93019846.anemo@mba.ocn.ne.jp> <20060111144355.GA17275@nevyn.them.org> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9858 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips Content-Length: 865 Lines: 30 >>>>> On Wed, 11 Jan 2006 09:43:56 -0500, Daniel Jacobowitz said: dan> You've configured the kernel for QEMU, right? And are usin QEMU dan> from CVS? Yes, I configured the kernel with qemu_defconfig. I tried both QEMU 0.8.0 and tried current CVS today, but got same results. Here is my instructions: kernel: make O=../build-qemu qemu_defconfig make O=../build-qemu QEMU: ./configure --target-list=mips-softmmu --disable-gfx-check make Then: mips-softmmu/qemu-system-mips -kernel /home/git/build-qemu/arch/mips/boot/vmlinux.bin -m 16 -nographic dan> It worked for me the last time I tried, but that was a couple of dan> weeks ago. The port may have gotten broken... While QEMU 0.8.0 was released on Dec 19 and it seems there was not so much changes on kernel's arch/mips in last few weeks, we should be very close ... --- Atsushi Nemoto From ivan.korzakow@gmail.com Wed Jan 11 15:10:54 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 11 Jan 2006 15:11:16 +0000 (GMT) Received: from wproxy.gmail.com ([64.233.184.203]:3731 "EHLO wproxy.gmail.com") by ftp.linux-mips.org with ESMTP id S8133475AbWAKPKx convert rfc822-to-8bit (ORCPT ); Wed, 11 Jan 2006 15:10:53 +0000 Received: by wproxy.gmail.com with SMTP id 71so176420wri for ; Wed, 11 Jan 2006 07:14:05 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=InXUtVKzGoETskmJlvDMSxBC3g77aqHnhI5Sno6QiXWUXNaTh5B1ry0nAzSnYPw6yM+C8d4rZsjdtFYEe5l4FfyvehOWPTCBISGhhike8xPdzIHCUnSVbx4N8fjrSeMHXM1IXS0Q4mOU/77ClmM94EmiRdIAbut9O1+UKsb7oO0= Received: by 10.54.115.5 with SMTP id n5mr940737wrc; Wed, 11 Jan 2006 07:14:04 -0800 (PST) Received: by 10.54.69.5 with HTTP; Wed, 11 Jan 2006 07:14:04 -0800 (PST) Message-ID: Date: Wed, 11 Jan 2006 16:14:04 +0100 From: Ivan Korzakow To: Ralf Baechle Subject: Re: why the early_initcall(au1x00_setup) do not work? Cc: "P. Christeas" , linux-mips@linux-mips.org In-Reply-To: <20060110215322.GA27577@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline References: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> <200601101757.45297.p_christ@hol.gr> <200601101857.26978.p_christ@hol.gr> <20060110215322.GA27577@linux-mips.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9859 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ivan.korzakow@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 608 Lines: 26 2006/1/10, Ralf Baechle : > It is possible to keep both Linus's and the lmo tree in the same > repository with a _little_ care. I do that all the time. When compressed > this will result in a bloat of just about 10-20MB. > well, in a MIPS repo: $ git repack -a -d $ git prune-packed $ git prune $ du .git 266M .git $ tree .git/objects/ .git/objects/ |-- info | `-- packs `-- pack |-- pack-77ee75692f2944708c9dd65d6ba9100f6647b414.idx `-- pack-77ee75692f2944708c9dd65d6ba9100f6647b414.pack 2 directories, 3 files What kind of magical git commands are you using ? Ivan From ivan.korzakow@gmail.com Wed Jan 11 15:14:46 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 11 Jan 2006 15:15:08 +0000 (GMT) Received: from wproxy.gmail.com ([64.233.184.200]:21823 "EHLO wproxy.gmail.com") by ftp.linux-mips.org with ESMTP id S8133464AbWAKPOp convert rfc822-to-8bit (ORCPT ); Wed, 11 Jan 2006 15:14:45 +0000 Received: by wproxy.gmail.com with SMTP id 71so177354wri for ; Wed, 11 Jan 2006 07:17:57 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=JSPyKQQ6uPE8V5EuPZZfVm84EIASVdoPVRtzt+UIKDEH+zo/hHU3GVQ/y5qvkeYK8/BCXw4s7kWtgZFBTe1UvWPprDU4wa6rRLVWm89VyzPpzCM5Lpj0583W7uUcpB/rw0vj0RwGvKCKrdnRR4NJL+X3tnOvmiUAMjgX93fCB30= Received: by 10.54.120.12 with SMTP id s12mr907192wrc; Wed, 11 Jan 2006 07:17:56 -0800 (PST) Received: by 10.54.69.5 with HTTP; Wed, 11 Jan 2006 07:17:55 -0800 (PST) Message-ID: Date: Wed, 11 Jan 2006 16:17:55 +0100 From: Ivan Korzakow To: Ralf Baechle Subject: Re: why the early_initcall(au1x00_setup) do not work? Cc: "P. Christeas" , linux-mips@linux-mips.org In-Reply-To: <20060110232006.GA3519@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline References: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> <200601101757.45297.p_christ@hol.gr> <200601101857.26978.p_christ@hol.gr> <20060110232006.GA3519@linux-mips.org> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9860 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ivan.korzakow@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 615 Lines: 16 2006/1/11, Ralf Baechle : > On Tue, Jan 10, 2006 at 06:15:18PM +0100, Ivan Korzakow wrote: > > > Why not simply keep CVS repository available for 1% of people willing > > to browse the history ? And make life easier for 99% of people willing > > to work on 2.6 ... (2.4 work may continue to use CVS too). > > The CVS repository is still available - and will stay for a long time so > people have a chance to do diffs against their existing checked out trees. > But no more changes. > again why not letting 2.2 2.4 stay in CVS ? I don't think there are any active development, isn't it ? Ivan From ralf@linux-mips.org Wed Jan 11 19:04:44 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 11 Jan 2006 19:05:07 +0000 (GMT) Received: from extgw-uk.mips.com ([62.254.210.129]:47624 "EHLO bacchus.net.dhis.org") by ftp.linux-mips.org with ESMTP id S8133424AbWAKTEo (ORCPT ); Wed, 11 Jan 2006 19:04:44 +0000 Received: from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1]) by bacchus.net.dhis.org (8.13.4/8.13.4) with ESMTP id k0BJ7j9A025388; Wed, 11 Jan 2006 19:07:46 GMT Received: (from ralf@localhost) by denk.linux-mips.net (8.13.4/8.13.4/Submit) id k0BJ7hEa025381; Wed, 11 Jan 2006 19:07:43 GMT Date: Wed, 11 Jan 2006 19:07:43 +0000 From: Ralf Baechle To: Ivan Korzakow Cc: "P. Christeas" , linux-mips@linux-mips.org Subject: Re: why the early_initcall(au1x00_setup) do not work? Message-ID: <20060111190743.GE4403@linux-mips.org> References: <50c9a2250601082159p238cacd6r930709da9305479e@mail.gmail.com> <200601101757.45297.p_christ@hol.gr> <200601101857.26978.p_christ@hol.gr> <20060110215322.GA27577@linux-mips.org> <20060111112001.GA4403@linux-mips.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2.1i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9861 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Content-Length: 1006 Lines: 23 On Wed, Jan 11, 2006 at 04:07:25PM +0100, Ivan Korzakow wrote: > I know that but you miss my point. GIT is a tool to ease work on linux > kernel, but the way you use it makes harder life of users of your > tree. For example your tree contains more than 350 000 objects ! That > makes a lot of git commands running slow... Linus promised too look into that. He has too - it's what his tree would be facing in the not too distant future, otherwise. > Let's say I'm developing a net drivers on ARM platform. I'm actually > do not care about ARM development, but I do care about net tree. To do > that, I just need to clone net tree because I know that ARM should be > OK with this tree. What about MIPS ? > > I'm just wondering why not asking to Linus to pull from your tree like > every others maintainers do ? Like most other developers I create throw-away trees for that purpose, see the upstream-linus tree. Due to the way the Linux release process is working anything else is unrealistic. Ralf From yzzhang@sy-imatec.com Wed Jan 11 19:57:40 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 11 Jan 2006 19:57:59 +0000 (GMT) Received: from vweb.sina.net ([202.108.3.191]:42231 "EHLO vweb.sina.net") by ftp.linux-mips.org with ESMTP id S8133732AbWAKT5k (ORCPT ); Wed, 11 Jan 2006 19:57:40 +0000 Received: (qmail 21488 invoked by uid 99); 11 Jan 2006 20:00:35 -0000 Message-ID: <20060111200035.21487.qmail@sina.com> From: yzzhang@sy-imatec.com To: linux-mips@linux-mips.org CC: linux-cvs@linux-mips.org Subject: au1200 mae mmap problem Date: Thu, 12 Jan 2006 04:00:35 +0800 X-Mailer: SinaMail(3.0) X-Priority: 3 MIME-Version: 1.0 Content-Type: text/plain; charset="gb2312" Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9862 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yzzhang@sy-imatec.com Precedence: bulk X-list: linux-mips Content-Length: 2058 Lines: 58 I wrote a simple program to test Au1200 MAE. The result is always that program will return -1 because pmms->struct_size=0, though it is assigned a value of 0xdc during initialization in the kernel. anyone could explain the reason for me? Thanks in advance. ----------------------------------------------------------------------- In user space: if ((fmae = open("/dev/mae", O_RDWR)) < 0) { printf("mae open failed.\n"); return -1; } gMemSize = ioctl(fmae, AU1XXXMAE_INIT, &ioc); maeaddr = mmap (0, gMemSize, PROT_READ|PROT_WRITE, MAP_SHARED | MAP_NONCACHED, fmae, 0); if (maeaddr == MAP_FAILED) { printf("mae: attempt to map memory failed.\n"); return -1; } pmms = (PMAE_MASTER_T)maeaddr; if (pmms->struct_size < sizeof(MAE_MASTER_T)) { printf("mae_driver, structure size mismatch: driver=%x interface=%d\n",pmms->struct_size, sizeof(MAE_MASTER_T)); return -1; } ----------------------------------------------------------------------------------------- In kernel space,au1200's driver is listed as below: int au1xxxmae_mmap(struct file *filp, struct vm_area_struct *vma ) { unsigned long size = vma->vm_end - vma->vm_start; unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; offset += mae_phys_address; vma->vm_page_prot = pgprot_cached(vma->vm_page_prot); if(remap_pfn_range(vma, vma->vm_start, offset >> PAGE_SHIFT, size, vma->vm_page_prot)) { DBGPRINT(ERRORS,"Could not remap the page range\n"); return -EFAULT; } vma->vm_flags &= ~VM_IO; vma->vm_ops = &au1xxx_vmaops; au1xxx_vma_open(vma); return 0; } void init_mae_structs(void) { unsigned char k,x[10]; pmms = (PMAE_MASTER_T) KRNL_MAE_MASTER_STRUCT; // pmms means ptr to mae master struct // initialize the master structure memset((PVOID)KRNL_MAE_MASTER_STRUCT, 0, sizeof(MAE_MASTER_T)); pmms->struct_size=sizeof(MAE_MASTER_T); //pmms->struct_size = 0xdc ... ... } From yzzhang@sy-imatec.com Wed Jan 11 19:58:30 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 11 Jan 2006 19:58:54 +0000 (GMT) Received: from vweb.sina.net ([202.108.3.191]:52430 "EHLO vweb.sina.net") by ftp.linux-mips.org with ESMTP id S8133655AbWAKT5m (ORCPT ); Wed, 11 Jan 2006 19:57:42 +0000 Received: (qmail 51146 invoked by uid 99); 11 Jan 2006 20:00:45 -0000 Message-ID: <20060111200045.51145.qmail@sina.com> From: yzzhang@sy-imatec.com To: linux-mips@linux-mips.org CC: linux-cvs@linux-mips.org Subject: au1200 mae mmap problem Date: Thu, 12 Jan 2006 04:00:45 +0800 X-Mailer: SinaMail(3.0) X-Priority: 3 MIME-Version: 1.0 Content-Type: text/plain; charset="gb2312" Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9863 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yzzhang@sy-imatec.com Precedence: bulk X-list: linux-mips Content-Length: 2058 Lines: 58 I wrote a simple program to test Au1200 MAE. The result is always that program will return -1 because pmms->struct_size=0, though it is assigned a value of 0xdc during initialization in the kernel. anyone could explain the reason for me? Thanks in advance. ----------------------------------------------------------------------- In user space: if ((fmae = open("/dev/mae", O_RDWR)) < 0) { printf("mae open failed.\n"); return -1; } gMemSize = ioctl(fmae, AU1XXXMAE_INIT, &ioc); maeaddr = mmap (0, gMemSize, PROT_READ|PROT_WRITE, MAP_SHARED | MAP_NONCACHED, fmae, 0); if (maeaddr == MAP_FAILED) { printf("mae: attempt to map memory failed.\n"); return -1; } pmms = (PMAE_MASTER_T)maeaddr; if (pmms->struct_size < sizeof(MAE_MASTER_T)) { printf("mae_driver, structure size mismatch: driver=%x interface=%d\n",pmms->struct_size, sizeof(MAE_MASTER_T)); return -1; } ----------------------------------------------------------------------------------------- In kernel space,au1200's driver is listed as below: int au1xxxmae_mmap(struct file *filp, struct vm_area_struct *vma ) { unsigned long size = vma->vm_end - vma->vm_start; unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; offset += mae_phys_address; vma->vm_page_prot = pgprot_cached(vma->vm_page_prot); if(remap_pfn_range(vma, vma->vm_start, offset >> PAGE_SHIFT, size, vma->vm_page_prot)) { DBGPRINT(ERRORS,"Could not remap the page range\n"); return -EFAULT; } vma->vm_flags &= ~VM_IO; vma->vm_ops = &au1xxx_vmaops; au1xxx_vma_open(vma); return 0; } void init_mae_structs(void) { unsigned char k,x[10]; pmms = (PMAE_MASTER_T) KRNL_MAE_MASTER_STRUCT; // pmms means ptr to mae master struct // initialize the master structure memset((PVOID)KRNL_MAE_MASTER_STRUCT, 0, sizeof(MAE_MASTER_T)); pmms->struct_size=sizeof(MAE_MASTER_T); //pmms->struct_size = 0xdc ... ... } From yzzhang@sy-imatec.com Wed Jan 11 20:03:29 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 11 Jan 2006 20:03:49 +0000 (GMT) Received: from vweb.sina.net ([202.108.3.191]:58338 "EHLO vweb.sina.net") by ftp.linux-mips.org with ESMTP id S8133542AbWAKUD3 (ORCPT ); Wed, 11 Jan 2006 20:03:29 +0000 Received: (qmail 79165 invoked by uid 99); 11 Jan 2006 20:06:32 -0000 Message-ID: <20060111200632.79164.qmail@sina2-84.sina.net> From: yzzhang@sy-imatec.com To: linux-mips@linux-mips.org Subject: au1200 mae mmap problem Date: Thu, 12 Jan 2006 04:06:32 +0800 X-Mailer: SinaMail(3.0) X-Priority: 3 MIME-Version: 1.0 Content-Type: text/plain; charset="gb2312" Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9864 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: yzzhang@sy-imatec.com Precedence: bulk X-list: linux-mips Content-Length: 2058 Lines: 58 I wrote a simple program to test Au1200 MAE. The result is always that program will return -1 because pmms->struct_size=0, though it is assigned a value of 0xdc during initialization in the kernel. anyone could explain the reason for me? Thanks in advance. ----------------------------------------------------------------------- In user space: if ((fmae = open("/dev/mae", O_RDWR)) < 0) { printf("mae open failed.\n"); return -1; } gMemSize = ioctl(fmae, AU1XXXMAE_INIT, &ioc); maeaddr = mmap (0, gMemSize, PROT_READ|PROT_WRITE, MAP_SHARED | MAP_NONCACHED, fmae, 0); if (maeaddr == MAP_FAILED) { printf("mae: attempt to map memory failed.\n"); return -1; } pmms = (PMAE_MASTER_T)maeaddr; if (pmms->struct_size < sizeof(MAE_MASTER_T)) { printf("mae_driver, structure size mismatch: driver=%x interface=%d\n",pmms->struct_size, sizeof(MAE_MASTER_T)); return -1; } ----------------------------------------------------------------------------------------- In kernel space,au1200's driver is listed as below: int au1xxxmae_mmap(struct file *filp, struct vm_area_struct *vma ) { unsigned long size = vma->vm_end - vma->vm_start; unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; offset += mae_phys_address; vma->vm_page_prot = pgprot_cached(vma->vm_page_prot); if(remap_pfn_range(vma, vma->vm_start, offset >> PAGE_SHIFT, size, vma->vm_page_prot)) { DBGPRINT(ERRORS,"Could not remap the page range\n"); return -EFAULT; } vma->vm_flags &= ~VM_IO; vma->vm_ops = &au1xxx_vmaops; au1xxx_vma_open(vma); return 0; } void init_mae_structs(void) { unsigned char k,x[10]; pmms = (PMAE_MASTER_T) KRNL_MAE_MASTER_STRUCT; // pmms means ptr to mae master struct // initialize the master structure memset((PVOID)KRNL_MAE_MASTER_STRUCT, 0, sizeof(MAE_MASTER_T)); pmms->struct_size=sizeof(MAE_MASTER_T); //pmms->struct_size = 0xdc ... ... } From drow@nevyn.them.org Wed Jan 11 20:10:43 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 11 Jan 2006 20:11:08 +0000 (GMT) Received: from nevyn.them.org ([66.93.172.17]:44712 "EHLO nevyn.them.org") by ftp.linux-mips.org with ESMTP id S8133429AbWAKUKn (ORCPT ); Wed, 11 Jan 2006 20:10:43 +0000 Received: from drow by nevyn.them.org with local (Exim 4.54) id 1EwmLy-0005y9-Ma; Wed, 11 Jan 2006 15:13:54 -0500 Date: Wed, 11 Jan 2006 15:13:54 -0500 From: Daniel Jacobowitz To: Atsushi Nemoto Cc: linux-mips@linux-mips.org Subject: Re: QEMU and kernel 2.6.15 Message-ID: <20060111201354.GA22873@nevyn.them.org> References: <20060111.002431.93019846.anemo@mba.ocn.ne.jp> <20060111144355.GA17275@nevyn.them.org> <20060112.000904.74752908.anemo@mba.ocn.ne.jp> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20060112.000904.74752908.anemo@mba.ocn.ne.jp> User-Agent: Mutt/1.5.8i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9865 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dan@debian.org Precedence: bulk X-list: linux-mips Content-Length: 381 Lines: 11 On Thu, Jan 12, 2006 at 12:09:04AM +0900, Atsushi Nemoto wrote: > mips-softmmu/qemu-system-mips -kernel /home/git/build-qemu/arch/mips/boot/vmlinux.bin -m 16 -nographic Just to check, could you try -m 32 or -m 128? It shouldn't rely on more than 16MB, but the boundary condition may be wrong. Beyond that, I have no idea what might be wrong. -- Daniel Jacobowitz CodeSourcery From langabe@gmail.com Thu Jan 12 10:14:49 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 12 Jan 2006 10:15:14 +0000 (GMT) Received: from nproxy.gmail.com ([64.233.182.203]:13551 "EHLO nproxy.gmail.com") by ftp.linux-mips.org with ESMTP id S8126506AbWALKOt convert rfc822-to-8bit (ORCPT ); Thu, 12 Jan 2006 10:14:49 +0000 Received: by nproxy.gmail.com with SMTP id y38so265768nfb for ; Thu, 12 Jan 2006 02:18:03 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:mime-version:content-type:content-transfer-encoding:content-disposition; b=gPxCBSUvwNgh9bxaqBqCk9Re1QztVkkArI9NFZTo2BGzOT3FopmT04N4xXdhs82ca7aPfEYoTeIQzuwy1DpLXhLFIsJoEl6jzDv5jZ/9TrxMVpvNHo2KsEou0vx278d1LRaPIOhBAVwWe1lmW0t6gXMEXiT6Xqd5k/D0SrZwwys= Received: by 10.48.238.3 with SMTP id l3mr114893nfh; Thu, 12 Jan 2006 02:18:03 -0800 (PST) Received: by 10.48.225.20 with HTTP; Thu, 12 Jan 2006 02:18:03 -0800 (PST) Message-ID: Date: Thu, 12 Jan 2006 10:18:03 +0000 From: Alex Gonzalez To: linux-mips Subject: Compiling a non-pic glibc MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9866 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: langabe@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 2037 Lines: 41 Hi, What is the correct way of cross-compiling a non-pic static glibc? I thought something like, env CC="mips64-linux-gnu-gcc -mabi=n32 -mno-abicalls -fno-pic -mips4" ../glibc-src/configure --host=mips64-linux-gnu --build=i686-pc-linux-gnulibc2.2 --prefix=/usr --with-headers=/mips64-linux-gnu/sys-root/usr/include/ --enable-add-ons=linuxthreads --without-cvs --with-fp --disable-shared and 'make' will do it, but it fails with, make[2]: Entering directory `/home/alex/projects/glibc-src/iconv' /opt/redhat/mips64linux-031001/H-i686-pc-linux-gnulibc2.2/bin/mips64-linux-gnu-gcc -mabi=n32 -mno-abicalls -fno-pic -mips4 -nostdlib -nostartfiles -o /home/alex/projects/glibc-build/iconv/iconvconfig /home/alex/projects/glibc-build/csu/crt1.o /home/alex/projects/glibc-build/csu/crti.o `/opt/redhat/mips64linux-031001/H-i686-pc-linux-gnulibc2.2/bin/mips64-linux-gnu-gcc -mabi=n32 -mno-abicalls -fno-pic -mips4 --print-file-name=crtbegin.o` /home/alex/projects/glibc-build/iconv/iconvconfig.o /home/alex/projects/glibc-build/iconv/strtab.o /home/alex/projects/glibc-build/iconv/xmalloc.o /home/alex/projects/glibc-build/libc.a -lgcc /home/alex/projects/glibc-build/libc.a -lgcc `/opt/redhat/mips64linux-031001/H-i686-pc-linux-gnulibc2.2/bin/mips64-linux-gnu-gcc -mabi=n32 -mno-abicalls -fno-pic -mips4 --print-file-name=crtend.o` /home/alex/projects/glibc-build/csu/crtn.o /opt/redhat/mips64linux-031001/H-i686-pc-linux-gnulibc2.2/lib/gcc-lib/mips64-linux-gnu/3.3-mips64linux-031001/../../../../mips64-linux-gnu/bin/ld: /opt/redhat/mips64linux-031001/H-i686-pc-linux-gnulibc2.2/lib/gcc-lib/mips64-linux-gnu/3.3-mips64linux-031001/32/crtbegin.o: warning: linking PIC files with non-PIC files /opt/redhat/mips64linux-031001/H-i686-pc-linux-gnulibc2.2/lib/gcc-lib/mips64-linux-gnu/3.3-mips64linux-031001/../../../../mips64-linux-gnu/bin/ld: /home/alex/projects/glibc-build/iconv/iconvconfig.o: warning: linking PIC files with non-PIC files Just in case, I am trying to build glibc-2.3.1 with a gcc 3.3 based toolchain. Thanks, Alex From anemo@mba.ocn.ne.jp Sun Jan 15 18:03:05 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 15 Jan 2006 18:03:29 +0000 (GMT) Received: from p549F60EF.dip.t-dialin.net ([84.159.96.239]:20106 "EHLO p549F60EF.dip.t-dialin.net") by ftp.linux-mips.org with ESMTP id S8133356AbWAOSCw (ORCPT ); Sun, 15 Jan 2006 18:02:52 +0000 Received: from [IPv6:::ffff:210.190.142.172] ([IPv6:::ffff:210.190.142.172]:62915 "HELO smtp.mba.ocn.ne.jp") by linux-mips.net with SMTP id ; Thu, 12 Jan 2006 15:42:47 +0100 Received: from localhost (p3016-ipad205funabasi.chiba.ocn.ne.jp [222.146.98.16]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id 121C384F5; Thu, 12 Jan 2006 23:41:08 +0900 (JST) Date: Thu, 12 Jan 2006 23:40:38 +0900 (JST) Message-Id: <20060112.234038.07644223.anemo@mba.ocn.ne.jp> To: dan@debian.org Cc: linux-mips@linux-mips.org Subject: Re: QEMU and kernel 2.6.15 From: Atsushi Nemoto In-Reply-To: <20060111201354.GA22873@nevyn.them.org> References: <20060111144355.GA17275@nevyn.them.org> <20060112.000904.74752908.anemo@mba.ocn.ne.jp> <20060111201354.GA22873@nevyn.them.org> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9867 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips Content-Length: 347 Lines: 10 >>>>> On Wed, 11 Jan 2006 15:13:54 -0500, Daniel Jacobowitz said: dan> Just to check, could you try -m 32 or -m 128? It shouldn't rely dan> on more than 16MB, but the boundary condition may be wrong. dan> Beyond that, I have no idea what might be wrong. I tried both but it did not help. Thank you anyway. --- Atsushi Nemoto From anemo@mba.ocn.ne.jp Sun Jan 15 18:04:13 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 15 Jan 2006 18:04:47 +0000 (GMT) Received: from p549F60EF.dip.t-dialin.net ([84.159.96.239]:24714 "EHLO p549F60EF.dip.t-dialin.net") by ftp.linux-mips.org with ESMTP id S8133479AbWAOSEL (ORCPT ); Sun, 15 Jan 2006 18:04:11 +0000 Received: from mba.ocn.ne.jp ([IPv6:::ffff:210.190.142.172]:17645 "HELO smtp.mba.ocn.ne.jp") by linux-mips.net with SMTP id ; Thu, 12 Jan 2006 17:21:17 +0100 Received: from localhost (p3016-ipad205funabasi.chiba.ocn.ne.jp [222.146.98.16]) by smtp.mba.ocn.ne.jp (Postfix) with ESMTP id A3D8365E; Fri, 13 Jan 2006 01:19:56 +0900 (JST) Date: Fri, 13 Jan 2006 01:19:27 +0900 (JST) Message-Id: <20060113.011927.75184433.anemo@mba.ocn.ne.jp> To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org Subject: Re: QEMU and kernel 2.6.15 From: Atsushi Nemoto In-Reply-To: <20060110153652.GA4871@linux-mips.org> References: <20060111.002431.93019846.anemo@mba.ocn.ne.jp> <20060110153652.GA4871@linux-mips.org> X-Fingerprint: 6ACA 1623 39BD 9A94 9B1A B746 CA77 FE94 2874 D52F X-Pgp-Public-Key: http://wwwkeys.pgp.net/pks/lookup?op=get&search=0x2874D52F X-Mailer: Mew version 3.3 on Emacs 21.4 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9868 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: anemo@mba.ocn.ne.jp Precedence: bulk X-list: linux-mips Content-Length: 505 Lines: 16 >>>>> On Tue, 10 Jan 2006 15:36:52 +0000, Ralf Baechle said: ralf> Qemu is still work in progress and needs further debugging. Do you mean QEMU itself or Qemu port of the kernel? It looks timer setting in arch/mips/qemu is somewhat broken. qemu_timer_setup() installs the timer interrupt handler on irq 0, but do_qemu_int() also calls ll_timer_interrupt() directly. Which timer interrupt source does the kernel expect? r4k counter interrupt or i8259 timer? --- Atsushi Nemoto From zzh.hust@gmail.com Sun Jan 15 18:17:41 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 15 Jan 2006 18:18:09 +0000 (GMT) Received: from p549F60EF.dip.t-dialin.net ([84.159.96.239]:47498 "EHLO p549F60EF.dip.t-dialin.net") by ftp.linux-mips.org with ESMTP id S8133352AbWAOSRl (ORCPT ); Sun, 15 Jan 2006 18:17:41 +0000 Received: from wproxy.gmail.com ([IPv6:::ffff:64.233.184.204]:58313 "EHLO wproxy.gmail.com") by linux-mips.net with ESMTP id convert rfc822-to-8bit; Fri, 13 Jan 2006 03:41:45 +0100 Received: by wproxy.gmail.com with SMTP id 36so584812wra for ; Thu, 12 Jan 2006 18:39:40 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:mime-version:content-type:content-transfer-encoding:content-disposition; b=XT5o5SMjyZOtBeNWWxP1LOUty6gXqDaqz81iZauvCj4OYFDid540L/QRk9PBv5EIvp21PXwIewcrJXdEdkoFbAPStB1/MYVa4482HJVykLbdPZol1Ypu6SldB0ovDHGM7LeagiOl6nMrkk0VcWdSBB6MdrCWYL860Mb59CcDCK8= Received: by 10.54.94.16 with SMTP id r16mr4357288wrb; Thu, 12 Jan 2006 18:39:40 -0800 (PST) Received: by 10.54.156.1 with HTTP; Thu, 12 Jan 2006 18:39:40 -0800 (PST) Message-ID: <50c9a2250601121839n3d96327ald74e129aea19b56a@mail.gmail.com> Date: Fri, 13 Jan 2006 10:39:40 +0800 From: zhuzhenhua To: linux-mips Subject: does the linux kernel use k0, k1 regs? MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9869 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zzh.hust@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 473 Lines: 15 i have to handle a NMI interrupt in bootloader(0xBFC00000), and i want to return to linux after the NMI interrupt, i think other regs maybe be useing by linux-kernel, i think the NMI handle only can use K0, K1. and i do not find the use of K0, K1 in linux-kernel interrupt or exception handle so i think if the NMI interrupt a linux interrupt handle, there is still no conflict. i am not sure my thinking is right, anyone can give some hints? Best regards zhuzhenhua From zzh.hust@gmail.com Sun Jan 15 18:21:15 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 15 Jan 2006 18:21:35 +0000 (GMT) Received: from p549F60EF.dip.t-dialin.net ([84.159.96.239]:56458 "EHLO p549F60EF.dip.t-dialin.net") by ftp.linux-mips.org with ESMTP id S8126537AbWAOSVO (ORCPT ); Sun, 15 Jan 2006 18:21:14 +0000 Received: from wproxy.gmail.com ([IPv6:::ffff:64.233.184.198]:47286 "EHLO wproxy.gmail.com") by linux-mips.net with ESMTP id convert rfc822-to-8bit; Fri, 13 Jan 2006 08:06:24 +0100 Received: by wproxy.gmail.com with SMTP id 36so632604wra for ; Thu, 12 Jan 2006 23:04:22 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:mime-version:content-type:content-transfer-encoding:content-disposition; b=mDhYhbr16xM1hSi9THZplb5bghvhDefj3tHs483uh0TXxGyY5ngxmMcFJS8Xtnz+n88o2F83b5YhcCJFDMOMg0P6LpkYklnCZ+ACzeJb+q114q9VatICwNNGIAE7HajDgICUUZ6AYrDtMzUGwyKx+TrlNwhEQZGQxIg8sM2xoVQ= Received: by 10.54.132.17 with SMTP id f17mr4593145wrd; Thu, 12 Jan 2006 23:04:22 -0800 (PST) Received: by 10.54.156.1 with HTTP; Thu, 12 Jan 2006 23:04:21 -0800 (PST) Message-ID: <50c9a2250601122304idfa535dt7066274b6dce2d43@mail.gmail.com> Date: Fri, 13 Jan 2006 15:04:21 +0800 From: zhuzhenhua To: linux-mips Subject: does not the kernel support embedded ramdisk too larget? MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9870 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zzh.hust@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 362 Lines: 11 i compile the ramdisk.gz into the vmlinux, and if the ramdisk.gz is not too large, it works fine. it the ramdisk.gz is too large about 4M. it get error when uncomrpessed ramdisk "invalid compressed format(err=1)" My sdram is 64M, and i download uImage to 0x82000000,and then bootm 0x82000000 does anyone meet this? thanks for any hints Best regards Zhuzhenhua From ivan.korzakow@gmail.com Sun Jan 15 18:25:43 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 15 Jan 2006 18:26:12 +0000 (GMT) Received: from p549F60EF.dip.t-dialin.net ([84.159.96.239]:64138 "EHLO p549F60EF.dip.t-dialin.net") by ftp.linux-mips.org with ESMTP id S8133356AbWAOSZn (ORCPT ); Sun, 15 Jan 2006 18:25:43 +0000 Received: from wproxy.gmail.com ([IPv6:::ffff:64.233.184.196]:12779 "EHLO wproxy.gmail.com") by linux-mips.net with ESMTP id convert rfc822-to-8bit; Fri, 13 Jan 2006 10:22:49 +0100 Received: by wproxy.gmail.com with SMTP id 71so622125wri for ; Fri, 13 Jan 2006 01:20:47 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:mime-version:content-type:content-transfer-encoding:content-disposition; b=L20i5tpr3BBMdQM426soZQW+OAVgr+gOphYpnfUfoXFyinXQwJ8+eLkWVktNV77M7TR5BqHVAPSjWL190pHOeuKoyPmCVBCppDBtl4fJEV4OknxRZ8CY8xCpReiWRH0cBEJ74wi0mcUC5nL5Px2bboDbZjvTHMCJK2VqY86Z16g= Received: by 10.54.145.12 with SMTP id s12mr3761256wrd; Fri, 13 Jan 2006 01:20:47 -0800 (PST) Received: by 10.54.69.11 with HTTP; Fri, 13 Jan 2006 01:20:47 -0800 (PST) Message-ID: Date: Fri, 13 Jan 2006 10:20:47 +0100 From: Ivan Korzakow To: linux-mips@linux-mips.org Subject: How to apply 2.6.15-git7 patchset ? MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9871 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ivan.korzakow@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 223 Lines: 8 Hi Could anybody tell me why I can't apply cleanly the "patch-2.6.15-git7.bz2" patchset on a mips repository ? Of course I tried to apply this patch on a 2.6.15 tree... Actually only mips files failed to be patched. Ivan From thomas.dahlmann@amd.com Sun Jan 15 18:27:28 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 15 Jan 2006 18:27:51 +0000 (GMT) Received: from p549F60EF.dip.t-dialin.net ([84.159.96.239]:907 "EHLO p549F60EF.dip.t-dialin.net") by ftp.linux-mips.org with ESMTP id S8126537AbWAOS00 (ORCPT ); Sun, 15 Jan 2006 18:26:26 +0000 Received: from [IPv6:::ffff:163.181.251.6] ([IPv6:::ffff:163.181.251.6]:54926 "EHLO amdext4.amd.com") by linux-mips.net with ESMTP id ; Fri, 13 Jan 2006 11:12:08 +0100 Received: from SAUSGW02.amd.com (sausgw02.amd.com [163.181.250.22]) by amdext4.amd.com (8.12.11/8.12.11/AMD) with ESMTP id k0DA7p8b011365; Fri, 13 Jan 2006 04:08:42 -0600 Received: from 163.181.250.1 by SAUSGW01.amd.com with ESMTP (AMD SMTP Relay (Email Firewall v6.1.0)); Fri, 13 Jan 2006 04:08:23 -0600 X-Server-Uuid: 8C3DB987-180B-4465-9446-45C15473FD3E Received: from elbe.amd.com (elbe.amd.com [172.20.31.2]) by amdint2.amd.com (8.12.8/8.12.8/AMD) with ESMTP id k0DA8Kh5009974; Fri, 13 Jan 2006 04:08:20 -0600 (CST) Received: from [172.20.32.126] by elbe.amd.com (8.8.8+Sun/AMD-S-2.0) id LAA20341; Fri, 13 Jan 2006 11:08:19 +0100 (MET) Message-ID: <43C77C1D.3030702@amd.com> Date: Fri, 13 Jan 2006 11:08:29 +0100 From: "Thomas Dahlmann" User-Agent: Mozilla Thunderbird 1.0.6 (Windows/20050716) X-Accept-Language: en-us, en MIME-Version: 1.0 To: "Oliver Neukum" cc: linux-usb-devel@lists.sourceforge.net, "Jordan Crouse" , linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, info-linux@ldcmail.amd.com Subject: Re: [linux-usb-devel] [PATCH] UDC support for MIPS/AU1200 and Geode/CS5536 References: <20060109180356.GA8855@cosmic.amd.com> <200601092344.55988.oliver@neukum.org> <43C39431.6020308@amd.com> <200601101440.38853.oliver@neukum.org> In-Reply-To: <200601101440.38853.oliver@neukum.org> X-WSS-ID: 6FD9A39D3983386203-01-01 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9872 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: thomas.dahlmann@amd.com Precedence: bulk X-list: linux-mips Content-Length: 1691 Lines: 74 Oliver Neukum wrote: >Am Dienstag, 10. Januar 2006 12:02 schrieb Thomas Dahlmann: > > >>Oliver Neukum wrote: >> >> >> >>>Am Montag, 9. Januar 2006 19:03 schrieb Jordan Crouse: >>> >>> >>> >>> >>>>>From the "two-birds-one-stone" department, I am pleased to present USB UDC >>>>support for both the MIPS Au1200 SoC and the Geode CS5535 south bridge. >>>>Also, coming soon (in the next few days), OTG, which has been removed from >>>>the usb_host patch, and put into its own patch (as per David's comments). >>>> >>>>This patch is against current linux-mips git, but it should apply for Linus's >>>>tree as well. >>>> >>>>Regards, >>>>Jordan >>>> >>>> >>>> >>>> >>>> >>>+ VDBG("udc_read_bytes(): %d bytes\n", bytes); >>>+ >>>+ /* dwords first */ >>>+ for (i = 0; i < bytes / UDC_DWORD_BYTES; i++) { >>>+ *((u32*) (buf + (i<<2))) = readl(dev->rxfifo); >>>+ } >>> >>>Is there any reason you don't increment by 4? >>> >>> Regards >>> Oliver >>> >>> >>> >>> >>> >>> >>> >>The loop is for reading dwords only, so "i < bytes / UDC_DWORD_BYTES" cuts >>off remaining 1,2 or 3 bytes which are handled by the next loop. >>But you are right, incrementing by 4 may look better, as >> >> for (i = 0; i < bytes - bytes % UDC_DWORD_BYTES; i+=4) { >> *((u32*) (buf + i)) = readl(dev->rxfifo); >> } >> >> > >Not only will it look better, but it'll save you a shift operation. >You might even compute start and finish values before the loop and >save an addition in the body. > > Regards > Oliver > > > > > I have changed this for the next patch release. Thanks for the input ! Regards, Thomas From jcrouse@cosmic.amd.com Sun Jan 15 18:36:53 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 15 Jan 2006 18:37:27 +0000 (GMT) Received: from p549F60EF.dip.t-dialin.net ([84.159.96.239]:26251 "EHLO p549F60EF.dip.t-dialin.net") by ftp.linux-mips.org with ESMTP id S8133502AbWAOSgW (ORCPT ); Sun, 15 Jan 2006 18:36:22 +0000 Received: from amdext4.amd.com ([IPv6:::ffff:163.181.251.6]:3255 "EHLO amdext4.amd.com") by linux-mips.net with ESMTP id ; Fri, 13 Jan 2006 19:24:30 +0100 Received: from SAUSGW02.amd.com (sausgw02.amd.com [163.181.250.22]) by amdext4.amd.com (8.12.11/8.12.11/AMD) with ESMTP id k0DIKgOr008005; Fri, 13 Jan 2006 12:21:08 -0600 Received: from 163.181.250.1 by SAUSGW02.amd.com with ESMTP (AMD SMTP Relay (Email Firewall v6.1.0)); Fri, 13 Jan 2006 12:21:00 -0600 X-Server-Uuid: 5FC0E2DF-CD44-48CD-883A-0ED95B391E89 Received: from ldcmail.amd.com (ldcmail.amd.com [147.5.200.40]) by amdint2.amd.com (8.12.8/8.12.8/AMD) with ESMTP id k0DIKxh5000164; Fri, 13 Jan 2006 12:20:59 -0600 (CST) Received: from cosmic.amd.com (cosmic.amd.com [147.5.201.206]) by ldcmail.amd.com (Postfix) with ESMTP id 766E82028; Fri, 13 Jan 2006 11:20:59 -0700 (MST) Received: from cosmic.amd.com (localhost [127.0.0.1]) by cosmic.amd.com (8.13.4/8.13.4) with ESMTP id k0DIUcEX028910; Fri, 13 Jan 2006 11:30:38 -0700 Received: (from jcrouse@localhost) by cosmic.amd.com ( 8.13.4/8.13.4/Submit) id k0DIUc72028909; Fri, 13 Jan 2006 11:30:38 -0700 Date: Fri, 13 Jan 2006 11:30:38 -0700 From: "Jordan Crouse" To: linux-usb-devel@lists.sourceforge.net, linux-mips@linux-mips.org cc: thomas.dahlmann@amd.com Subject: [PATCH] EHCI support for the AU1200 Message-ID: <20060113183038.GK8925@cosmic.amd.com> MIME-Version: 1.0 User-Agent: Mutt/1.5.11 X-WSS-ID: 6FD930060T03439990-01-01 Content-Type: multipart/mixed; boundary=LyciRD1jyfeSSjG0 Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9873 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jordan.crouse@amd.com Precedence: bulk X-list: linux-mips Content-Length: 20036 Lines: 681 --LyciRD1jyfeSSjG0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: 7bit This is the re-send and fixed up version of the patch I sent out a few weeks ago, to be applied against latest linux-mips GIT. Unless somebody finds something horrible, I think these are ready to go into Greg's tree and sent on upstream. Here is the changelog: * All OTG references are removed and moved to their own patch (which will be forthcoming soon). * Fixed up some coding issues with the move from PCI, including the mapping of EHCI capability and operations registers (causing the bugs that were posted here). * Cached the cap register for speed * Au1200 init and remove routines were in the wrong place * reboot_notifier was registered twice Jordan --LyciRD1jyfeSSjG0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline; filename=usb_host.patch Content-Transfer-Encoding: 7bit ALCHEMY: Add EHCI support for AU1200 Signed-off-by: Jordan Crouse --- arch/mips/au1000/common/cputable.c | 2 arch/mips/au1000/common/platform.c | 4 drivers/usb/Kconfig | 8 - drivers/usb/host/Kconfig | 2 drivers/usb/host/ehci-au1xxx.c | 299 ++++++++++++++++++++ drivers/usb/host/ehci-hcd.c | 8 - drivers/usb/host/ohci-au1xxx.c | 105 ++++++- include/asm-mips/mach-mips/cpu-feature-overrides.h | 4 8 files changed, 405 insertions(+), 27 deletions(-) diff --git a/arch/mips/au1000/common/cputable.c b/arch/mips/au1000/common/cputable.c index 4dbde82..d8df5fd 100644 --- a/arch/mips/au1000/common/cputable.c +++ b/arch/mips/au1000/common/cputable.c @@ -38,7 +38,7 @@ struct cpu_spec cpu_specs[] = { { 0xffffffff, 0x02030204, "Au1100 BE", 0, 1 }, { 0xffffffff, 0x03030200, "Au1550 AA", 0, 1 }, { 0xffffffff, 0x04030200, "Au1200 AB", 0, 0 }, - { 0xffffffff, 0x04030201, "Au1200 AC", 0, 1 }, + { 0xffffffff, 0x04030201, "Au1200 AC", 1, 0 }, { 0x00000000, 0x00000000, "Unknown Au1xxx", 1, 0 }, }; diff --git a/arch/mips/au1000/common/platform.c b/arch/mips/au1000/common/platform.c index 48d3f54..dbb4ee7 100644 --- a/arch/mips/au1000/common/platform.c +++ b/arch/mips/au1000/common/platform.c @@ -20,7 +20,7 @@ static struct resource au1xxx_usb_ohci_resources[] = { [0] = { .start = USB_OHCI_BASE, - .end = USB_OHCI_BASE + USB_OHCI_LEN, + .end = USB_OHCI_BASE + USB_OHCI_LEN - 1, .flags = IORESOURCE_MEM, }, [1] = { @@ -278,9 +278,7 @@ static struct platform_device *au1xxx_pl &au1100_lcd_device, #endif #ifdef CONFIG_SOC_AU1200 -#if 0 /* fixme */ &au1xxx_usb_ehci_device, -#endif &au1xxx_usb_gdt_device, &au1xxx_usb_otg_device, &au1200_lcd_device, diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index 85dacc9..bff1258 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -9,10 +9,16 @@ menu "USB support" # NOTE: SL-811 option should be board-specific ... config USB_ARCH_HAS_HCD boolean - default y if USB_ARCH_HAS_OHCI + default y if USB_ARCH_HAS_OHCI || USB_ARCH_HAS_EHCI default y if ARM # SL-811 default PCI +# some non-PCI hcds implement EHCI +config USB_ARCH_HAS_EHCI + boolean + default y if SOC_AU1200 + default PCI + # many non-PCI SOC chips embed OHCI config USB_ARCH_HAS_OHCI boolean diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index ed1899d..4a4db1a 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -6,7 +6,7 @@ comment "USB Host Controller Drivers" config USB_EHCI_HCD tristate "EHCI HCD (USB 2.0) support" - depends on USB && PCI + depends on USB && USB_ARCH_HAS_EHCI ---help--- The Enhanced Host Controller Interface (EHCI) is standard for USB 2.0 "high speed" (480 Mbit/sec, 60 Mbyte/sec) host controller hardware. diff --git a/drivers/usb/host/ehci-au1xxx.c b/drivers/usb/host/ehci-au1xxx.c new file mode 100644 index 0000000..28faeaf --- /dev/null +++ b/drivers/usb/host/ehci-au1xxx.c @@ -0,0 +1,299 @@ +/* + * EHCI HCD (Host Controller Driver) for USB. + * + * (C) Copyright 2000-2004 David Brownell + * + * Bus Glue for AMD Alchemy Au1xxx + * + * Based on "ohci-au1xxx.c" by Matt Porter + * + * Modified for AMD Alchemy Au1200 EHC + * by K.Boge + * + * This file is licenced under the GPL. + */ + +#include +#include + +#ifndef CONFIG_SOC_AU1200 +#error "Alchemy chip doesn't have EHC" +#else /* Au1200 */ + +#define USB_HOST_CONFIG (USB_MSR_BASE + USB_MSR_MCFG) +#define USB_MCFG_PFEN (1<<31) +#define USB_MCFG_RDCOMB (1<<30) +#define USB_MCFG_SSDEN (1<<23) +#define USB_MCFG_PHYPLLEN (1<<19) +#define USB_MCFG_EHCCLKEN (1<<17) +#define USB_MCFG_UCAM (1<<7) +#define USB_MCFG_EBMEN (1<<3) +#define USB_MCFG_EMEMEN (1<<2) + +#define USBH_ENABLE_CE (USB_MCFG_PHYPLLEN | USB_MCFG_EHCCLKEN) +#ifdef CONFIG_DMA_COHERENT +#define USBH_ENABLE_INIT (USBH_ENABLE_CE \ + | USB_MCFG_PFEN | USB_MCFG_RDCOMB \ + | USB_MCFG_SSDEN | USB_MCFG_UCAM \ + | USB_MCFG_EBMEN | USB_MCFG_EMEMEN) +#else +#define USBH_ENABLE_INIT (USBH_ENABLE_CE \ + | USB_MCFG_PFEN | USB_MCFG_RDCOMB \ + | USB_MCFG_SSDEN \ + | USB_MCFG_EBMEN | USB_MCFG_EMEMEN) +#endif +#define USBH_DISABLE (USB_MCFG_EBMEN | USB_MCFG_EMEMEN) + +#endif /* Au1200 */ + +extern int usb_disabled(void); + +/*-------------------------------------------------------------------------*/ + +static void au1xxx_start_ehc(struct platform_device *dev) +{ + pr_debug(__FILE__ ": starting Au1xxx EHCI USB Controller\n"); + + /* write HW defaults again in case Yamon cleared them */ + if (au_readl(USB_HOST_CONFIG) == 0) { + au_writel(0x00d02000, USB_HOST_CONFIG); + au_readl(USB_HOST_CONFIG); + udelay(1000); + } + /* enable host controller */ + au_writel(USBH_ENABLE_CE | au_readl(USB_HOST_CONFIG), USB_HOST_CONFIG); + au_readl(USB_HOST_CONFIG); + udelay(1000); + au_writel(USBH_ENABLE_INIT | au_readl(USB_HOST_CONFIG), USB_HOST_CONFIG); + au_readl(USB_HOST_CONFIG); + udelay(1000); + + pr_debug(__FILE__ ": Clock to USB host has been enabled\n"); +} + +static void au1xxx_stop_ehc(struct platform_device *dev) +{ + pr_debug(__FILE__ ": stopping Au1xxx EHCI USB Controller\n"); + + /* Disable mem */ + au_writel(~USBH_DISABLE & au_readl(USB_HOST_CONFIG), USB_HOST_CONFIG); + udelay(1000); + /* Disable clock */ + au_writel(~USB_MCFG_EHCCLKEN & au_readl(USB_HOST_CONFIG), USB_HOST_CONFIG); + au_readl(USB_HOST_CONFIG); +} + +/*-------------------------------------------------------------------------*/ + +/* configure so an HC device and id are always provided */ +/* always called with process context; sleeping is OK */ + + +/** + * usb_ehci_au1xxx_probe - initialize Au1xxx-based HCDs + * Context: !in_interrupt() + * + * Allocates basic resources for this USB host controller, and + * then invokes the start() method for the HCD associated with it + * through the hotplug entry's driver_data. + * + */ +int usb_ehci_au1xxx_probe (const struct hc_driver *driver, + struct usb_hcd **hcd_out, + struct platform_device *dev) +{ + int retval; + struct usb_hcd *hcd; + struct ehci_hcd *ehci; + +#if defined(CONFIG_SOC_AU1200) && defined(CONFIG_DMA_COHERENT) + + /* Au1200 AB USB does not support coherent memory */ + if (!(read_c0_prid() & 0xff)) { + pr_info ("Au1200 ohci: !!! This is chip revision AB !!!\n"); + pr_info (" !!! update your board or re-configure the kernel !!!\n"); + return -ENODEV; + } +#endif + + au1xxx_start_ehc(dev); + + if (dev->resource[1].flags != IORESOURCE_IRQ) { + pr_debug ("resource[1] is not IORESOURCE_IRQ"); + retval = -ENOMEM; + } + hcd = usb_create_hcd(driver, &dev->dev, "Au1xxx"); + if (!hcd) + return -ENOMEM; + hcd->rsrc_start = dev->resource[0].start; + hcd->rsrc_len = dev->resource[0].end - dev->resource[0].start + 1; + + if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { + pr_debug("request_mem_region failed"); + retval = -EBUSY; + goto err1; + } + + hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); + if (!hcd->regs) { + pr_debug("ioremap failed"); + retval = -ENOMEM; + goto err2; + } + + ehci = hcd_to_ehci(hcd); + ehci->caps = hcd->regs; + ehci->regs = hcd->regs + HC_LENGTH(readl(&ehci->caps->hc_capbase)); + /* cache this readonly data; minimize chip reads */ + ehci->hcs_params = readl(&ehci->caps->hcs_params); + + /* ehci_hcd_init(hcd_to_ehci(hcd)); */ + + retval = usb_add_hcd(hcd, dev->resource[1].start, SA_INTERRUPT | SA_SHIRQ); + if (retval == 0) + return retval; + + au1xxx_stop_ehc(dev); + iounmap(hcd->regs); + err2: + release_mem_region(hcd->rsrc_start, hcd->rsrc_len); + err1: + usb_put_hcd(hcd); + return retval; +} + + +/* may be called without controller electrically present */ +/* may be called with controller, bus, and devices active */ + +/** + * usb_ehci_hcd_au1xxx_remove - shutdown processing for Au1xxx-based HCDs + * @dev: USB Host Controller being removed + * Context: !in_interrupt() + * + * Reverses the effect of usb_ehci_hcd_au1xxx_probe(), first invoking + * the HCD's stop() method. It is always called from a thread + * context, normally "rmmod", "apmd", or something similar. + * + */ +void usb_ehci_au1xxx_remove (struct usb_hcd *hcd, struct platform_device *dev) +{ + usb_remove_hcd(hcd); + iounmap(hcd->regs); + release_mem_region(hcd->rsrc_start, hcd->rsrc_len); + usb_put_hcd(hcd); + au1xxx_stop_ehc(dev); +} + +/*-------------------------------------------------------------------------*/ + +static const struct hc_driver ehci_au1xxx_hc_driver = { + .description = hcd_name, + .product_desc = "Au1xxx EHCI", + .hcd_priv_size = sizeof(struct ehci_hcd), + + /* + * generic hardware linkage + */ + .irq = ehci_irq, + .flags = HCD_MEMORY | HCD_USB2, + + /* + * basic lifecycle operations + */ + .reset = ehci_init, + .start = ehci_run, +#ifdef CONFIG_PM + /* suspend: ehci_au1xxx_suspend, -- tbd */ + /* resume: ehci_au1xxx_resume, -- tbd */ +#endif /*CONFIG_PM*/ + .stop = ehci_stop, + + /* + * managing i/o requests and associated device resources + */ + .urb_enqueue = ehci_urb_enqueue, + .urb_dequeue = ehci_urb_dequeue, + .endpoint_disable = ehci_endpoint_disable, + + /* + * scheduling support + */ + .get_frame_number = ehci_get_frame, + + /* + * root hub support + */ + .hub_status_data = ehci_hub_status_data, + .hub_control = ehci_hub_control, +#ifdef CONFIG_USB_SUSPEND + .hub_suspend = ehci_hub_suspend, + .hub_resume = ehci_hub_resume, +#endif +}; + +/*-------------------------------------------------------------------------*/ + +static int ehci_hcd_au1xxx_drv_probe(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct usb_hcd *hcd = NULL; + int ret; + + pr_debug ("In ehci_hcd_au1xxx_drv_probe\n"); + + if (usb_disabled()) + return -ENODEV; + + ret = usb_ehci_au1xxx_probe(&ehci_au1xxx_hc_driver, &hcd, pdev); + return ret; +} + +static int ehci_hcd_au1xxx_drv_remove(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct usb_hcd *hcd = dev_get_drvdata(dev); + + usb_ehci_au1xxx_remove(hcd, pdev); + return 0; +} + /*TBD*/ +/*static int ehci_hcd_au1xxx_drv_suspend(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct usb_hcd *hcd = dev_get_drvdata(dev); + + return 0; +} +static int ehci_hcd_au1xxx_drv_resume(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct usb_hcd *hcd = dev_get_drvdata(dev); + + return 0; +} +*/ + +static struct device_driver ehci_hcd_au1xxx_driver = { + .name = "au1xxx-ehci", + .bus = &platform_bus_type, + .probe = ehci_hcd_au1xxx_drv_probe, + .remove = ehci_hcd_au1xxx_drv_remove, + /*.suspend = ehci_hcd_au1xxx_drv_suspend, */ + /*.resume = ehci_hcd_au1xxx_drv_resume, */ +}; + +static int __init ehci_hcd_au1xxx_init (void) +{ + pr_debug (DRIVER_INFO " (Au1xxx)\n"); + + return driver_register(&ehci_hcd_au1xxx_driver); +} + +static void __exit ehci_hcd_au1xxx_cleanup (void) +{ + driver_unregister(&ehci_hcd_au1xxx_driver); +} + +module_init (ehci_hcd_au1xxx_init); +module_exit (ehci_hcd_au1xxx_cleanup); diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 29f52a4..30833fe 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -894,10 +894,10 @@ MODULE_DESCRIPTION (DRIVER_INFO); MODULE_AUTHOR (DRIVER_AUTHOR); MODULE_LICENSE ("GPL"); -#ifdef CONFIG_PCI +#if defined(CONFIG_SOC_AU1X00) +#include "ehci-au1xxx.c" +#elif defined(CONFIG_PCI) #include "ehci-pci.c" -#endif - -#if !defined(CONFIG_PCI) +#else #error "missing bus glue for ehci-hcd" #endif diff --git a/drivers/usb/host/ohci-au1xxx.c b/drivers/usb/host/ohci-au1xxx.c index 486202d..56c488e 100644 --- a/drivers/usb/host/ohci-au1xxx.c +++ b/drivers/usb/host/ohci-au1xxx.c @@ -19,9 +19,10 @@ */ #include - #include +#ifndef CONFIG_SOC_AU1200 + #define USBH_ENABLE_BE (1<<0) #define USBH_ENABLE_C (1<<1) #define USBH_ENABLE_E (1<<2) @@ -36,16 +37,46 @@ #error not byte order defined #endif +#else /* Au1200 */ + +#define USB_HOST_CONFIG (USB_MSR_BASE + USB_MSR_MCFG) +#define USB_MCFG_PFEN (1<<31) +#define USB_MCFG_RDCOMB (1<<30) +#define USB_MCFG_SSDEN (1<<23) +#define USB_MCFG_OHCCLKEN (1<<16) +#define USB_MCFG_UCAM (1<<7) +#define USB_MCFG_OBMEN (1<<1) +#define USB_MCFG_OMEMEN (1<<0) + +#define USBH_ENABLE_CE USB_MCFG_OHCCLKEN +#ifdef CONFIG_DMA_COHERENT +#define USBH_ENABLE_INIT (USB_MCFG_OHCCLKEN \ + | USB_MCFG_PFEN | USB_MCFG_RDCOMB \ + | USB_MCFG_SSDEN | USB_MCFG_UCAM \ + | USB_MCFG_OBMEN | USB_MCFG_OMEMEN) +#else +#define USBH_ENABLE_INIT (USB_MCFG_OHCCLKEN \ + | USB_MCFG_PFEN | USB_MCFG_RDCOMB \ + | USB_MCFG_SSDEN \ + | USB_MCFG_OBMEN | USB_MCFG_OMEMEN) +#endif +#define USBH_DISABLE (USB_MCFG_OBMEN | USB_MCFG_OMEMEN) + +#endif /* Au1200 */ + extern int usb_disabled(void); /*-------------------------------------------------------------------------*/ -static void au1xxx_start_hc(struct platform_device *dev) +static void au1xxx_start_ohc(struct platform_device *dev) { printk(KERN_DEBUG __FILE__ ": starting Au1xxx OHCI USB Controller\n"); /* enable host controller */ + +#ifndef CONFIG_SOC_AU1200 + au_writel(USBH_ENABLE_CE, USB_HOST_CONFIG); udelay(1000); au_writel(USBH_ENABLE_INIT, USB_HOST_CONFIG); @@ -56,17 +87,46 @@ static void au1xxx_start_hc(struct platf !(au_readl(USB_HOST_CONFIG) & USBH_ENABLE_RD)) udelay(1000); +#else /* Au1200 */ + + /* write HW defaults again in case Yamon cleared them */ + if (au_readl(USB_HOST_CONFIG) == 0) { + au_writel(0x00d02000, USB_HOST_CONFIG); + au_readl(USB_HOST_CONFIG); + udelay(1000); + } + au_writel(USBH_ENABLE_CE | au_readl(USB_HOST_CONFIG), USB_HOST_CONFIG); + au_readl(USB_HOST_CONFIG); + udelay(1000); + au_writel(USBH_ENABLE_INIT | au_readl(USB_HOST_CONFIG), USB_HOST_CONFIG); + au_readl(USB_HOST_CONFIG); + udelay(1000); + +#endif /* Au1200 */ + printk(KERN_DEBUG __FILE__ ": Clock to USB host has been enabled \n"); } -static void au1xxx_stop_hc(struct platform_device *dev) +static void au1xxx_stop_ohc(struct platform_device *dev) { printk(KERN_DEBUG __FILE__ ": stopping Au1xxx OHCI USB Controller\n"); +#ifndef CONFIG_SOC_AU1200 + /* Disable clock */ au_writel(readl((void *)USB_HOST_CONFIG) & ~USBH_ENABLE_CE, USB_HOST_CONFIG); + +#else /* Au1200 */ + + /* Disable mem */ + au_writel(~USBH_DISABLE & au_readl(USB_HOST_CONFIG), USB_HOST_CONFIG); + udelay(1000); + /* Disable clock */ + au_writel(~USBH_ENABLE_CE & au_readl(USB_HOST_CONFIG), USB_HOST_CONFIG); + au_readl(USB_HOST_CONFIG); +#endif /* Au1200 */ } @@ -85,14 +145,24 @@ static void au1xxx_stop_hc(struct platfo * through the hotplug entry's driver_data. * */ -int usb_hcd_au1xxx_probe (const struct hc_driver *driver, +int usb_ohci_au1xxx_probe (const struct hc_driver *driver, struct platform_device *dev) { int retval; struct usb_hcd *hcd; +#if defined(CONFIG_SOC_AU1200) && defined(CONFIG_DMA_COHERENT) + + /* Au1200 AB USB does not support coherent memory */ + if (!(read_c0_prid() & 0xff)) { + pr_info ("Au1200 ohci: !!! This is chip revision AB !!!\n"); + pr_info (" !!! update your board or re-configure the kernel !!!\n"); + return -ENODEV; + } +#endif + if (dev->resource[1].flags != IORESOURCE_IRQ) { - pr_debug ("resource[1] is not IORESOURCE_IRQ"); + pr_debug ("resource[1] is not IORESOURCE_IRQ\n"); retval = -ENOMEM; } @@ -103,26 +173,26 @@ int usb_hcd_au1xxx_probe (const struct h hcd->rsrc_len = dev->resource[0].end - dev->resource[0].start + 1; if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { - pr_debug("request_mem_region failed"); + pr_debug("request_mem_region failed\n"); retval = -EBUSY; goto err1; } hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); if (!hcd->regs) { - pr_debug("ioremap failed"); + pr_debug("ioremap failed\n"); retval = -ENOMEM; goto err2; } - au1xxx_start_hc(dev); + au1xxx_start_ohc(dev); ohci_hcd_init(hcd_to_ohci(hcd)); - retval = usb_add_hcd(hcd, dev->resource[1].start, SA_INTERRUPT); + retval = usb_add_hcd(hcd, dev->resource[1].start, SA_INTERRUPT | SA_SHIRQ); if (retval == 0) return retval; - au1xxx_stop_hc(dev); + au1xxx_stop_ohc(dev); iounmap(hcd->regs); err2: release_mem_region(hcd->rsrc_start, hcd->rsrc_len); @@ -145,10 +215,10 @@ int usb_hcd_au1xxx_probe (const struct h * context, normally "rmmod", "apmd", or something similar. * */ -void usb_hcd_au1xxx_remove (struct usb_hcd *hcd, struct platform_device *dev) +void usb_ohci_au1xxx_remove (struct usb_hcd *hcd, struct platform_device *dev) { usb_remove_hcd(hcd); - au1xxx_stop_hc(dev); + au1xxx_stop_ohc(dev); iounmap(hcd->regs); release_mem_region(hcd->rsrc_start, hcd->rsrc_len); usb_put_hcd(hcd); @@ -216,9 +286,9 @@ static const struct hc_driver ohci_au1xx */ .hub_status_data = ohci_hub_status_data, .hub_control = ohci_hub_control, -#ifdef CONFIG_PM - .bus_suspend = ohci_bus_suspend, - .bus_resume = ohci_bus_resume, +#ifdef CONFIG_USB_SUSPEND + .hub_suspend = ohci_hub_suspend, + .hub_resume = ohci_hub_resume, #endif .start_port_reset = ohci_start_port_reset, }; @@ -234,7 +304,7 @@ static int ohci_hcd_au1xxx_drv_probe(str if (usb_disabled()) return -ENODEV; - ret = usb_hcd_au1xxx_probe(&ohci_au1xxx_hc_driver, pdev); + ret = usb_ohci_au1xxx_probe(&ohci_au1xxx_hc_driver, pdev); return ret; } @@ -242,7 +312,7 @@ static int ohci_hcd_au1xxx_drv_remove(st { struct usb_hcd *hcd = platform_get_drvdata(pdev); - usb_hcd_au1xxx_remove(hcd, pdev); + usb_ohci_au1xxx_remove(hcd, pdev); return 0; } /*TBD*/ @@ -287,3 +357,4 @@ static void __exit ohci_hcd_au1xxx_clean module_init (ohci_hcd_au1xxx_init); module_exit (ohci_hcd_au1xxx_cleanup); + diff --git a/include/asm-mips/mach-mips/cpu-feature-overrides.h b/include/asm-mips/mach-mips/cpu-feature-overrides.h index 9f92aed..e06af6c 100644 --- a/include/asm-mips/mach-mips/cpu-feature-overrides.h +++ b/include/asm-mips/mach-mips/cpu-feature-overrides.h @@ -29,7 +29,11 @@ /* #define cpu_has_prefetch ? */ #define cpu_has_mcheck 1 /* #define cpu_has_ejtag ? */ +#ifdef CONFIG_CPU_HAS_LLSC #define cpu_has_llsc 1 +#else +#define cpu_has_llsc 0 +#endif /* #define cpu_has_vtag_icache ? */ /* #define cpu_has_dc_aliases ? */ /* #define cpu_has_ic_fills_f_dc ? */ --LyciRD1jyfeSSjG0-- From bunk@stusta.de Sun Jan 15 18:45:27 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 15 Jan 2006 18:45:53 +0000 (GMT) Received: from p549F60EF.dip.t-dialin.net ([84.159.96.239]:39307 "EHLO p549F60EF.dip.t-dialin.net") by ftp.linux-mips.org with ESMTP id S8133578AbWAOSp1 (ORCPT ); Sun, 15 Jan 2006 18:45:27 +0000 Received: from mailout.stusta.mhn.de ([IPv6:::ffff:141.84.69.5]:3602 "HELO mailout.stusta.mhn.de") by linux-mips.net with SMTP id ; Sat, 14 Jan 2006 02:35:46 +0100 Received: (qmail 4174 invoked from network); 14 Jan 2006 01:34:40 -0000 Received: from r063144.stusta.swh.mhn.de (10.150.63.144) by mailout.stusta.mhn.de with SMTP; 14 Jan 2006 01:34:40 -0000 Received: by r063144.stusta.swh.mhn.de (Postfix, from userid 1000) id 7CD0319F917; Sat, 14 Jan 2006 02:34:41 +0100 (CET) Date: Sat, 14 Jan 2006 02:34:41 +0100 From: Adrian Bunk To: Andrew Morton Cc: Ralf Baechle , Domen Puncer , linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, davem@davemloft.net Subject: [2.6 patch] Remove arch/mips/arc/salone.c Message-ID: <20060114013440.GV29663@stusta.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.11 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9874 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: bunk@stusta.de Precedence: bulk X-list: linux-mips Content-Length: 1792 Lines: 61 From: Domen Puncer ArcLoad(), ArcInvoke(), ArcExecute() aren't used. Signed-off-by: Domen Puncer Signed-off-by: Alexey Dobriyan Signed-off-by: Adrian Bunk --- This patch was already sent on: - 5 Jan 2006 This patch was sent by Alexey Dobriyan on: - 8 Nov 2005 arch/mips/arc/Makefile | 2 +- arch/mips/arc/salone.c | 25 ------------------------- 2 files changed, 1 insertion(+), 26 deletions(-) --- linux-kj.orig/arch/mips/arc/Makefile 2005-11-08 20:46:24.000000000 +0300 +++ linux-kj/arch/mips/arc/Makefile 2005-11-08 20:47:36.000000000 +0300 @@ -3,7 +3,7 @@ # lib-y += cmdline.o env.o file.o identify.o init.o \ - misc.o salone.o time.o tree.o + misc.o time.o tree.o lib-$(CONFIG_ARC_MEMORY) += memory.o lib-$(CONFIG_ARC_CONSOLE) += arc_con.o Index: linux-kj/arch/mips/arc/salone.c =================================================================== --- linux-kj.orig/arch/mips/arc/salone.c 2005-11-08 20:46:24.000000000 +0300 +++ /dev/null 1970-01-01 00:00:00.000000000 +0000 @@ -1,24 +0,0 @@ -/* - * Routines to load into memory and execute stand-along program images using - * ARCS PROM firmware. - * - * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) - */ -#include -#include - -LONG __init ArcLoad(CHAR *Path, ULONG TopAddr, ULONG *ExecAddr, ULONG *LowAddr) -{ - return ARC_CALL4(load, Path, TopAddr, ExecAddr, LowAddr); -} - -LONG __init ArcInvoke(ULONG ExecAddr, ULONG StackAddr, ULONG Argc, CHAR *Argv[], - CHAR *Envp[]) -{ - return ARC_CALL5(invoke, ExecAddr, StackAddr, Argc, Argv, Envp); -} - -LONG __init ArcExecute(CHAR *Path, LONG Argc, CHAR *Argv[], CHAR *Envp[]) -{ - return ARC_CALL4(exec, Path, Argc, Argv, Envp); -} From p_christ@hol.gr Sun Jan 15 18:48:17 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 15 Jan 2006 18:48:47 +0000 (GMT) Received: from [62.38.115.213] ([62.38.115.213]:12165 "EHLO pfn3.pefnos") by ftp.linux-mips.org with ESMTP id S8126537AbWAOSsB (ORCPT ); Sun, 15 Jan 2006 18:48:01 +0000 Received: from xorhgos2.pefnos (xorhgos2.pefnos [192.168.0.3]) by pfn3.pefnos (Postfix) with ESMTP id 643501F31B; Sun, 15 Jan 2006 20:51:15 +0200 (EET) From: "P. Christeas" To: Ivan Korzakow Subject: Re: How to apply 2.6.15-git7 patchset ? Date: Sun, 15 Jan 2006 20:50:57 +0200 User-Agent: KMail/1.9 Cc: linux-mips@linux-mips.org References: In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200601152050.59057.p_christ@hol.gr> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9875 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: p_christ@hol.gr Precedence: bulk X-list: linux-mips Content-Length: 425 Lines: 13 On Friday 13 January 2006 11:20 am, Ivan Korzakow wrote: > Hi > > Could anybody tell me why I can't apply cleanly the > "patch-2.6.15-git7.bz2" patchset on a mips repository ? Of course I > tried to apply this patch on a 2.6.15 tree... > Actually only mips files failed to be patched. > If it's only one file, you could resolve it manually. It is common that, if you apply Linus' patch to a MIPS tree, sth may fail. > Ivan From drow@nevyn.them.org Sun Jan 15 18:57:33 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 15 Jan 2006 18:57:54 +0000 (GMT) Received: from p549F60EF.dip.t-dialin.net ([84.159.96.239]:5516 "EHLO p549F60EF.dip.t-dialin.net") by ftp.linux-mips.org with ESMTP id S8133455AbWAOS5c (ORCPT ); Sun, 15 Jan 2006 18:57:32 +0000 Received: from nevyn.them.org ([IPv6:::ffff:66.93.172.17]:9962 "EHLO nevyn.them.org") by linux-mips.net with ESMTP id ; Sat, 14 Jan 2006 22:38:05 +0100 Received: from drow by nevyn.them.org with local (Exim 4.54) id 1Ext2x-0005Xo-MM; Sat, 14 Jan 2006 16:34:51 -0500 Date: Sat, 14 Jan 2006 16:34:51 -0500 From: Daniel Jacobowitz To: Alex Gonzalez Cc: linux-mips Subject: Re: Compiling a non-pic glibc Message-ID: <20060114213451.GA21268@nevyn.them.org> References: Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.8i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9876 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dan@debian.org Precedence: bulk X-list: linux-mips Content-Length: 417 Lines: 13 On Thu, Jan 12, 2006 at 10:18:03AM +0000, Alex Gonzalez wrote: > Hi, > > What is the correct way of cross-compiling a non-pic static glibc? You can't. MIPS/Linux userspace toolchains only support PIC out of the box; if you want to mess around with non-PIC toolchains expect to have to hack glibc (and possibly other places). In this case it looks like GCC's CRT files are PIC. -- Daniel Jacobowitz CodeSourcery From zzh.hust@gmail.com Sun Jan 15 19:00:29 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 15 Jan 2006 19:00:53 +0000 (GMT) Received: from p549F60EF.dip.t-dialin.net ([84.159.96.239]:14988 "EHLO p549F60EF.dip.t-dialin.net") by ftp.linux-mips.org with ESMTP id S8133595AbWAOTAA (ORCPT ); Sun, 15 Jan 2006 19:00:00 +0000 Received: from wproxy.gmail.com ([IPv6:::ffff:64.233.184.199]:3576 "EHLO wproxy.gmail.com") by linux-mips.net with ESMTP id convert rfc822-to-8bit; Sun, 15 Jan 2006 05:24:28 +0100 Received: by wproxy.gmail.com with SMTP id 36so966233wra for ; Sat, 14 Jan 2006 20:22:23 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:mime-version:content-type:content-transfer-encoding:content-disposition; b=bd1lOwud8+TYXsa+osp5z3Vfi44BaaJ3/gRqr5YugrCrILhL2yDFleRxJrYsu3lYLwnX/SEdM1lQVJnjc71WoJKVrHMAjHQ9zdSg0opXVWZ2pI414DlrRRDnIL0c318V8HpY9lL0J58CRkycUEvmj5yTjUKaGJYoQaPIESCFlTs= Received: by 10.54.136.13 with SMTP id j13mr6987843wrd; Sat, 14 Jan 2006 20:22:23 -0800 (PST) Received: by 10.54.156.1 with HTTP; Sat, 14 Jan 2006 20:22:23 -0800 (PST) Message-ID: <50c9a2250601142022k6e4a855r6fc0274e4cfb8369@mail.gmail.com> Date: Sun, 15 Jan 2006 12:22:23 +0800 From: zhuzhenhua To: linux-mips Subject: how to emdedded ramdisk.gz in vmlinux for linux-2.6.14? MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9877 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zzh.hust@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 274 Lines: 11 I download the kernel from linux-mips, and select to embedded ramdisk.gz into vmlinux. but i can't find where to place the ramdisk.gz. I try to put ramdisk.gz under top dir, or arch/mips/boot/, but it does not work. can someone give any hints? Best regards zhuzhenhua From tpoynor@mvista.com Sun Jan 15 19:15:03 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 15 Jan 2006 19:15:37 +0000 (GMT) Received: from p549F60EF.dip.t-dialin.net ([84.159.96.239]:49036 "EHLO p549F60EF.dip.t-dialin.net") by ftp.linux-mips.org with ESMTP id S8133443AbWAOTPD (ORCPT ); Sun, 15 Jan 2006 19:15:03 +0000 Received: from gateway-1237.mvista.com ([IPv6:::ffff:12.44.186.158]:47352 "EHLO hermes.mvista.com") by linux-mips.net with ESMTP id ; Thu, 12 Jan 2006 19:24:12 +0100 Received: from [10.0.10.193] (slurryseal.ddns.mvista.com [10.0.10.193]) by hermes.mvista.com (Postfix) with ESMTP id 14FAB1AD12; Thu, 12 Jan 2006 10:23:33 -0800 (PST) Message-ID: <43C69EC2.2070601@mvista.com> Date: Thu, 12 Jan 2006 10:24:02 -0800 From: Todd Poynor User-Agent: Thunderbird 1.5 (X11/20051201) MIME-Version: 1.0 To: "Vladimir A. Barinov" Cc: linux-mtd@lists.infradead.org, linux-mips@linux-mips.org Subject: Re: [PATCH] PNX8550 NAND flash driver References: <43A2F819.1040106@ru.mvista.com> In-Reply-To: <43A2F819.1040106@ru.mvista.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9878 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tpoynor@mvista.com Precedence: bulk X-list: linux-mips Content-Length: 25655 Lines: 834 Vladimir A. Barinov wrote: > Hi All, > > Attached patch is NAND flash driver for PNX8550 based platforms. > Any comments and suggestions are highly appreciated. > > Vladimir > > > ------------------------------------------------------------------------ > > Signed-off-by: vbarinov@ru.mvista.com > > drivers/mtd/nand/Kconfig | 6 > drivers/mtd/nand/Makefile | 1 > drivers/mtd/nand/pnx8550.c | 747 +++++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 754 insertions(+) > > Index: linux-2.6.15_0/drivers/mtd/nand/Kconfig > =================================================================== > --- linux-2.6.15_0.orig/drivers/mtd/nand/Kconfig > +++ linux-2.6.15_0/drivers/mtd/nand/Kconfig > @@ -90,6 +90,12 @@ config MTD_NAND_S3C2410 > No board specfic support is done by this driver, each board > must advertise a platform_device for the driver to attach. > > +config MTD_NAND_PNX8550 > + tristate "NAND Flash support for PNX8550" > + depends on PNX8550 && MTD_NAND > + help > + This enables the NAND flash controller on the PNX8550. > + > config MTD_NAND_S3C2410_DEBUG > bool "S3C2410 NAND driver debug" > depends on MTD_NAND_S3C2410 > Index: linux-2.6.15_0/drivers/mtd/nand/pnx8550.c > =================================================================== > --- /dev/null > +++ linux-2.6.15_0/drivers/mtd/nand/pnx8550.c > @@ -0,0 +1,747 @@ > +/* > + * Copyright (C) 2005 Koninklijke Philips Electronics N.V. > + * All Rights Reserved. > + * > + * Based on: drivers/mtd/nand/pnx8550.c by Torbjorn Lundberg > + * $Id: pnx8550_nand.c,v 1.8 2004/11/12 10:46:58 tobbe Exp $ > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License as published by > + * the Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. > + * > + * Overview: > + * This is a device driver for the NAND flash device found on the > + * PNX8550 board which utilizes the Samsung K9F5616U0C part. This is > + * a 32MByte (16M x 16 bits) NAND flash device. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#define UBTM_NAME "microBTM" > +#define UBTM_BLOCK_START ( 0x00000000) > +#define UBTM_BLOCK_END ( 0x00004000) /* 16K size, first block */ > +#define UBTM_SIZE ( UBTM_BLOCK_END - UBTM_BLOCK_START) > + > +#define BOOTLOADER_NAME "bootloader" > +#define BOOTLOADER_BLOCK_START ( UBTM_BLOCK_END) > +#define BOOTLOADER_BLOCK_END ( 0x00040000) /* 256K - 16K = 240K */ > +#define BOOTLOADER_SIZE ( BOOTLOADER_BLOCK_END - BOOTLOADER_BLOCK_START) > + > +#define ROMFS_SYS_NAME "ROMFS-Tools" > +#define ROMFS_SYS_BLOCK_START ( BOOTLOADER_BLOCK_END) > +#define ROMFS_SYS_BLOCK_END ( 0x00600000) /* 6M - 256K = 5.75M */ > +#define ROMFS_SYS_SIZE ( ROMFS_SYS_BLOCK_END - ROMFS_SYS_BLOCK_START) > + > +#define ROMFS_APP_NAME "ROMFS-User" > +#define ROMFS_APP_BLOCK_START ( ROMFS_SYS_BLOCK_END) > +#define ROMFS_APP_BLOCK_END ( 0x01000000) /* 16M - 6M = 10M */ > +#define ROMFS_APP_SIZE ( ROMFS_APP_BLOCK_END - ROMFS_APP_BLOCK_START) > + > +#define USER_NAME "User" > +#define USER_BLOCK_START ( ROMFS_APP_BLOCK_END) > +#define USER_BLOCK_END ( 0x02000000) /* 32M - 16M = 16M */ > +#define USER_SIZE ( USER_BLOCK_END - USER_BLOCK_START) > + > +#define NAND_ADDR(_col, _page) ((_col) & (mtd->oobblock - 1)) + ((_page) << this->page_shift) > + > +#define NAND_ADDR_SEND(_addr) pNandAddr[(_addr)/sizeof(u16)] = 0 > + > +#define NAND_TRANSFER_TO(_addr, _buffer, _bytes) pnx8550_nand_transfer((_buffer), ((u8*)pNandAddr) + (_addr), (_bytes), 1) > + > +#define NAND_TRANSFER_FROM(_addr, _buffer, _bytes) pnx8550_nand_transfer(((u8*)pNandAddr) + (_addr), (_buffer), (_bytes), 0) > + > +static void pnx8550_nand_register_setup(u_char cmd_no, u_char addr_no, > + u_char include_data, u_char monitor_ACK, > + u_char enable64M, int cmd_a, int cmd_b); > + > +static inline void pnx8550_nand_wait_for_dev_ready(void); > + > +static void pnx8550_nand_transfer(void *from, void *to, int bytes, int toxio); > + > +static void pnx8550_nand_transferDMA(void *from, void *to, int bytes, > + int toxio); > + > +/* > + * Define partitions for flash device > + */ > +#define NUM_PARTITIONS 5 > +const static struct mtd_partition partition_info[NUM_PARTITIONS] = { > + { > + .name = UBTM_NAME, > + .offset = UBTM_BLOCK_START, > + .size = UBTM_SIZE}, > + { > + .name = BOOTLOADER_NAME, > + .offset = BOOTLOADER_BLOCK_START, > + .size = BOOTLOADER_SIZE}, > + { > + .name = ROMFS_SYS_NAME, > + .offset = ROMFS_SYS_BLOCK_START, > + .size = ROMFS_SYS_SIZE}, > + { > + .name = ROMFS_APP_NAME, > + .offset = ROMFS_APP_BLOCK_START, > + .size = ROMFS_APP_SIZE}, > + { > + .name = USER_NAME, > + .offset = USER_BLOCK_START, > + .size = USER_SIZE} > +}; > + > +/* Bad block descriptor for 16Bit nand flash */ > +static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; > +static struct nand_bbt_descr nand16bit_memorybased = { > + .options = 0, > + .offs = 0, > + .len = 2, > + .pattern = scan_ff_pattern > +}; > + > +/* OOB Placement information that lines up with the boot loader code */ > +static struct nand_oobinfo nand16bit_oob_16 = { > + .useecc = MTD_NANDECC_AUTOPLACE, > + .eccbytes = 6, > + .eccpos = {2, 3, 4, 5, 6, 7}, > + .oobfree = {{8, 8}} > +}; > + > +/* Pointer into XIO for access to the 16Bit NAND flash device */ > +static volatile u16 *pNandAddr; > + > +/* Last command sent to the pnx8550_nand_command function */ > +static int last_command = -1; > +/* > + Next column address to read/write, set by pnx8550_nand_command > + updated by the read/write functions > +*/ > +static int last_col_addr = -1; > +/* > + Next page address to read/write, set by pnx8550_nand_command > + updated by the read/write functions > +*/ > +static int last_page_addr = -1; > + > +/* > + 32bit Aligned/DMA buffer > +*/ > +static u_char *transferBuffer = NULL; > + > +static struct mtd_info pnx8550_mtd; > +static struct nand_chip pnx8550_nand; > + > +/** > + * Transfer data to/from the NAND chip. > + * This function decides whether to use DMA or not depending on > + * the amount of data to transfer and the alignment of the buffers. > + * > + * @from: Address to transfer data from > + * @to: Address to transfer the data to > + * @bytes: Number of bytes to transfer > + * @toxio: Whether the transfer is going to XIO or not. > + */ > +static void pnx8550_nand_transfer(void *from, void *to, int bytes, int toxio) > +{ > + u16 *from16 = (u16 *) from; > + u16 *to16 = (u16 *) to; > + > + int i; > + > + if ((u32) from & 3) { > + printk > + ("%s: from buffer not 32bit aligned, will not use fastest transfer mechanism\n", > + __FUNCTION__); > + } > + if ((u32) to & 3) { > + printk > + ("%s: to buffer not 32bit aligned, will not use fastest transfer mechanism\n", > + __FUNCTION__); Those printks could get old pretty fast. Debugging info, not needed for normal operation. > + } > + > + if (((bytes & 3) || (bytes < 16)) || ((u32) to & 3) || ((u32) from & 3)) { > + if (((bytes & 1) == 0) && > + (((u32) to & 1) == 0) && (((u32) from & 1) == 0)) { > + int words = bytes / 2; > + > + local_irq_disable(); > + for (i = 0; i < words; i++) { > + to16[i] = from16[i]; > + } > + local_irq_enable(); Really necessary to disable all irqs around this transfer? How long can interrupts be off during that time? > + } else { > + printk > + ("%s: Transfer failed, byte-aligned transfers no allowed!\n", "non-word-aligned"? > + __FUNCTION__); > + } > + } else { > + pnx8550_nand_transferDMA(from, to, bytes, toxio); > + } > +} > + > +/** > + * Transfer data to/from the NAND chip using DMA > + * > + * @from: Address to transfer data from > + * @to: Address to transfer the data to > + * @bytes: Number of bytes to transfer > + * @toxio: Whether the transfer is going to XIO or not. > + */ > +static void pnx8550_nand_transferDMA(void *from, void *to, int bytes, int toxio) > +{ > + int cmd = 0; > + u32 internal; > + u32 external; > + > + if (toxio) { > + cmd = PNX8550_DMA_CTRL_PCI_CMD_WRITE; > + dma_cache_wback(from, bytes); > + internal = (u32) virt_to_phys(from); > + external = (u32) to - KSEG1; > + } else { > + cmd = PNX8550_DMA_CTRL_PCI_CMD_READ; > + internal = (u32) virt_to_phys(to); > + external = (u32) from - KSEG1; > + } > + > + local_irq_disable(); > + PNX8550_DMA_TRANS_SIZE = bytes >> 2; /* Length in words */ > + PNX8550_DMA_EXT_ADDR = external; > + PNX8550_DMA_INT_ADDR = internal; > + PNX8550_DMA_INT_CLEAR = 0xffff; > + PNX8550_DMA_CTRL = PNX8550_DMA_CTRL_BURST_512 | > + PNX8550_DMA_CTRL_SND2XIO | PNX8550_DMA_CTRL_INIT_DMA | cmd; > + > + while ((PNX8550_DMA_INT_STATUS & PNX8550_DMA_INT_COMPL) == 0) ; > + > + if (!toxio) { > + dma_cache_inv(to, bytes); > + } > + local_irq_enable(); Again, necessary to prevent interrupts? > +} > + > +/** > + * pnx8550_nand_read_byte - read one byte endianess aware from the chip > + * @mtd: MTD device structure > + * > + */ > +static u_char pnx8550_nand_read_byte(struct mtd_info *mtd) > +{ > + struct nand_chip *this = mtd->priv; > + u16 data = 0; > + int addr = NAND_ADDR(last_col_addr, last_page_addr); > + /* > + Read ID is a special case as we have to read BOTH bytes at the same > + time otherwise it doesn't work, once we have both bytes we work out > + which one we want. > + */ > + if (last_command == NAND_CMD_READID) { > + u32 *pNandAddr32 = (u32 *) pNandAddr; > + u32 data32; > + data32 = cpu_to_le32(pNandAddr32[0]); > + if (last_col_addr) { > + data = (u16) (data32 >> 16); > + } else { > + data = (u16) data32; > + } > + } else { > + data = cpu_to_le16(pNandAddr[(addr / sizeof(u16))]); > + if ((addr & 0x1) == 1) { > + data = (data & 0xff00) >> 16; > + } > + } > + /* > + Status is a special case, we don't need to increment the address > + because the address isn't used by the chip > + */ > + if (last_command != NAND_CMD_STATUS) { > + last_col_addr++; > + } > + return data & 0xff; > +} > + > +/** > + * pnx8550_nand_read_word - read one word from the chip > + * @mtd: MTD device structure > + * > + * Read function for 16bit buswith without > + * endianess conversion > + */ > +static u16 pnx8550_nand_read_word(struct mtd_info *mtd) > +{ > + struct nand_chip *this = mtd->priv; > + int addr = NAND_ADDR(last_col_addr, last_page_addr); > + u16 data = pNandAddr[(addr / sizeof(u16))]; > + return data; > +} > + > +/** > + * pnx8550_nand_write_byte - write one byte endianess aware to the chip > + * @mtd: MTD device structure > + * @byte: pointer to data byte to write > + * > + * Write function for 16bit buswith with > + * endianess conversion > + */ > +static void pnx8550_nand_write_byte(struct mtd_info *mtd, u_char byte) > +{ > + struct nand_chip *this = mtd->priv; > + int addr = NAND_ADDR(last_col_addr, last_page_addr); > + pNandAddr[(addr / sizeof(u16))] = le16_to_cpu((u16) byte); > +} > + > +/** > + * pnx8550_nand_write_word - write one word to the chip > + * @mtd: MTD device structure > + * @word: data word to write > + * > + * Write function for 16bit buswith without > + * endianess conversion > + */ > +static void pnx8550_nand_write_word(struct mtd_info *mtd, u16 word) > +{ > + struct nand_chip *this = mtd->priv; > + int addr = NAND_ADDR(last_col_addr, last_page_addr); > + pNandAddr[(addr / sizeof(u16))] = word; > +} > + > +/** > + * pnx8550_nand_write_buf - write buffer to chip > + * @mtd: MTD device structure > + * @buf: data buffer > + * @len: number of bytes to write > + * > + */ > +static void pnx8550_nand_write_buf(struct mtd_info *mtd, const u_char * buf, > + int len) > +{ > + struct nand_chip *this = mtd->priv; > + int addr = NAND_ADDR(last_col_addr, last_page_addr); > + int pageLen; > + int oobLen = 0; > + u_char *transBuf = (u_char *) buf; > + > + /* some sanity checking, word access only please */ > + if (len & 1) { > + printk("%s: non-word aligned length requested!\n", > + __FUNCTION__); > + } > + > + memcpy(transferBuffer, buf, len); > + transBuf = transferBuffer; > + > + /* > + Work out whether we are going to write to the OOB area > + after a standard page write. > + This is not the case when the command function is called > + with a column address > page size. Then we write as though > + it is to the page rather than the OOB as the command function > + has already selected the OOB area. > + */ > + if ((last_col_addr + len) > mtd->oobblock) > + oobLen = (last_col_addr + len) - mtd->oobblock; > + pageLen = len - oobLen; > + > + /* Clear the done flag */ > + PNX8550_GPXIO_CTRL |= PNX8550_GPXIO_CLR_DONE; > + if (pageLen > 0) { > + NAND_TRANSFER_TO(addr, transBuf, pageLen); > + } > + if (oobLen > 0) { > + pnx8550_nand_wait_for_dev_ready(); > + > + pnx8550_nand_register_setup(1, 0, 0, 1, 0, NAND_CMD_READOOB, 0); > + /* Work out where in the OOB we are going to start to write */ > + addr = NAND_ADDR(last_col_addr - mtd->oobblock, last_page_addr); > + NAND_ADDR_SEND(addr); > + pnx8550_nand_register_setup(2, 3, 1, 1, 0, NAND_CMD_SEQIN, > + NAND_CMD_PAGEPROG); > + > + /* Clear the done flag */ > + PNX8550_GPXIO_CTRL |= PNX8550_GPXIO_CLR_DONE; > + NAND_TRANSFER_TO(addr, transBuf + pageLen, oobLen); > + } > + > + /* > + Increment the address so on the next write we write in the > + correct place. > + */ > + last_col_addr += len; > + if (last_col_addr >= mtd->oobblock + mtd->oobsize) { > + last_col_addr -= mtd->oobblock + mtd->oobsize; > + last_page_addr++; > + } > +} > + > +/** > + * pnx8550_nand_read_buf - read chip data into buffer > + * @mtd: MTD device structure > + * @buf: buffer to store date > + * @len: number of bytes to read > + * > + */ > +static void pnx8550_nand_read_buf(struct mtd_info *mtd, u_char * buf, int len) > +{ > + struct nand_chip *this = mtd->priv; > + int addr = NAND_ADDR(last_col_addr, last_page_addr); > + int pageLen; > + int oobLen = 0; > + u_char *transBuf = buf; > + > + /* some sanity checking, word access only please */ > + if (len & 1) { > + printk("%s: non-word aligned length\n", __FUNCTION__); > + } > + > + transBuf = transferBuffer; > + > + /* > + Work out whether we are going to read the OOB area > + after a standard page read. > + This is not the case when the command function is called > + with a column address > page size. Then we read as though > + it is from the page rather than the OOB as the command > + function has already selected the OOB area. > + */ > + if ((last_col_addr + len) > mtd->oobblock) > + oobLen = (last_col_addr + len) - mtd->oobblock; > + pageLen = len - oobLen; > + > + if (pageLen) { > + NAND_TRANSFER_FROM(addr, transBuf, pageLen); > + } > + if (oobLen > 0) { > + pnx8550_nand_register_setup(1, 3, 1, 1, 0, NAND_CMD_READOOB, 0); > + addr = NAND_ADDR(last_col_addr - mtd->oobblock, last_page_addr); > + NAND_TRANSFER_FROM(addr, transBuf + pageLen, oobLen); > + } > + if (transBuf != buf) { > + memcpy(buf, transBuf, len); > + } > + > + /* > + Increment the address so on the next read we read from the > + correct place. > + */ > + last_col_addr += len; > + if (last_col_addr > mtd->oobblock + mtd->oobsize) { > + last_col_addr -= mtd->oobblock + mtd->oobsize; > + last_page_addr++; > + } > + return; > +} > + > +/** > + * pnx8550_nand_verify_buf - Verify chip data against buffer > + * @mtd: MTD device structure > + * @buf: buffer containing the data to compare > + * @len: number of bytes to compare > + * > + */ > +static int pnx8550_nand_verify_buf(struct mtd_info *mtd, const u_char * buf, > + int len) > +{ > + int result = 0; > + > + /* some sanity checking, word access only please */ > + if (len & 1) { > + printk("%s: non-word aligned length\n", __FUNCTION__); > + } > + > + pnx8550_nand_read_buf(mtd, transferBuffer, len); > + if (memcmp(buf, transferBuffer, len)) { > + result = -EFAULT; > + } > + > + return result; > + > +} > + > +/** > + * pnx8550_nand_command - Send command to NAND device > + * @mtd: MTD device structure > + * @command: the command to be sent > + * @column: the column address for this command, -1 if none > + * @page_addr: the page address for this command, -1 if none > + * > + * Send command to NAND device. > + */ > +static void pnx8550_nand_command(struct mtd_info *mtd, unsigned command, > + int column, int page_addr) > +{ > + register struct nand_chip *this = mtd->priv; > + u_char addr_no = 0; > + u_char spare = 0; > + int addr; > + /* > + If we are starting a write work out whether it is to the > + OOB or the main page and position the pointer correctly. > + */ > + if (command == NAND_CMD_SEQIN) { > + int readcmd; > + int col = column; > + if (column >= mtd->oobblock) { > + /* OOB area */ > + col -= mtd->oobblock; > + readcmd = NAND_CMD_READOOB; > + spare = 1; > + } else { > + readcmd = NAND_CMD_READ0; > + } > + pnx8550_nand_register_setup(1, 0, 0, 1, 0, readcmd, 0); > + addr = NAND_ADDR(col, page_addr); > + NAND_ADDR_SEND(addr); > + } > + > + /* Check the number of address bytes */ > + if ((column == -1) && (page_addr == -1)) { > + addr_no = 0; > + column = 0; > + page_addr = 0; > + } else if ((column == -1) && (page_addr != -1)) { > + addr_no = 2; > + column = 0; > + } else if ((column != -1) && (page_addr == -1)) { > + addr_no = 1; > + page_addr = 0; > + } else { > + addr_no = 3; > + } > + > + last_command = command; > + last_col_addr = column; > + last_page_addr = page_addr; > + > + switch (command) { > + > + case NAND_CMD_PAGEPROG: > + // Nothing to do, we've already done it! > + return; > + > + case NAND_CMD_SEQIN: > + if (addr_no != 3) > + printk > + ("NAND: Error. Command %02x needs 3 byte address, but addr_no = %d\n", > + command, addr_no); > + pnx8550_nand_register_setup(2, 3, 1, 1, spare, NAND_CMD_SEQIN, > + NAND_CMD_PAGEPROG); > + return; > + > + case NAND_CMD_ERASE1: > + if (addr_no != 2) > + printk > + ("NAND: Error. Command %02x needs 2 byte address, but addr_no = %d\n", > + command, addr_no); > + > + PNX8550_GPXIO_CTRL |= PNX8550_GPXIO_CLR_DONE; > + > + pnx8550_nand_register_setup(2, 2, 0, 1, 0, NAND_CMD_ERASE1, > + NAND_CMD_ERASE2); > + addr = NAND_ADDR(column, page_addr); > + NAND_ADDR_SEND(addr); > + return; > + > + case NAND_CMD_ERASE2: > + // Nothing to do, we've already done it! > + return; > + > + case NAND_CMD_STATUS: > + if (addr_no != 0) > + printk > + ("NAND: Error. Command %02x needs 0 byte address, but addr_no = %d\n", > + command, addr_no); > + pnx8550_nand_register_setup(1, 0, 1, 0, 0, NAND_CMD_STATUS, 0); > + return; > + > + case NAND_CMD_RESET: > + if (addr_no != 0) > + printk > + ("NAND: Error. Command %02x needs 0 byte address, but addr_no = %d\n", > + command, addr_no); > + pnx8550_nand_register_setup(1, 0, 0, 0, 0, NAND_CMD_RESET, 0); > + addr = NAND_ADDR(column, page_addr); > + NAND_ADDR_SEND(addr); > + return; > + > + case NAND_CMD_READ0: > + if (addr_no != 3) > + printk > + ("NAND: Error. Command %02x needs 3 byte address, but addr_no = %d\n", > + command, addr_no); > + > + pnx8550_nand_register_setup(1, 3, 1, 1, 0, NAND_CMD_READ0, 0); > + return; > + > + case NAND_CMD_READ1: > + printk("Wrong command: %02x\n", command); > + return; > + > + case NAND_CMD_READOOB: > + if (addr_no != 3) > + printk > + ("NAND: Error. Command %02x needs 3 byte address, but addr_no = %d\n", > + command, addr_no); > + pnx8550_nand_register_setup(1, 3, 1, 1, 0, NAND_CMD_READOOB, 0); > + return; > + > + case NAND_CMD_READID: > + if (addr_no != 1) > + printk > + ("NAND: Error. Command %02x needs 1 byte address, but addr_no = %d\n", > + command, addr_no); > + pnx8550_nand_register_setup(1, 1, 1, 0, 0, NAND_CMD_READID, 0); > + return; > + } > +} > + > +/* > + * Setup the registers in PCIXIO > + */ > +static void pnx8550_nand_register_setup(u_char cmd_no, > + u_char addr_no, > + u_char include_data, > + u_char monitor_ACK, > + u_char enable64M, int cmd_a, int cmd_b) > +{ > + unsigned int reg_nand = 0; > + reg_nand |= enable64M ? PNX8550_XIO_FLASH_64MB : 0; > + reg_nand |= include_data ? PNX8550_XIO_FLASH_INC_DATA : 0; > + reg_nand |= PNX8550_XIO_FLASH_CMD_PH(cmd_no); > + reg_nand |= PNX8550_XIO_FLASH_ADR_PH(addr_no); > + reg_nand |= PNX8550_XIO_FLASH_CMD_A(cmd_a); > + reg_nand |= PNX8550_XIO_FLASH_CMD_B(cmd_b); > + PNX8550_XIO_FLASH_CTRL = reg_nand; > + barrier(); > +} > + > +/* > + * Wait for the device to be ready for the next command > + */ > +static inline void pnx8550_nand_wait_for_dev_ready(void) > +{ > + while ((PNX8550_XIO_CTRL & PNX8550_XIO_CTRL_XIO_ACK) == 0) ; > +} > + > +/* > + * Return true if the device is ready, false otherwise > + */ > +static int pnx8550_nand_dev_ready(struct mtd_info *mtd) > +{ > + return ((PNX8550_XIO_CTRL & PNX8550_XIO_CTRL_XIO_ACK) != 0); > +} > + > +/* > + * hardware specific access to control-lines > + */ > +static void pnx8550_nand_hwcontrol(struct mtd_info *mtd, int cmd) > +{ > + // Nothing to do here, its all done by the XIO block > +} > + > +/* > + * Main initialization routine > + */ > +int __init pnx8550_nand_init(void) > +{ > + struct nand_chip *this; > + > + /* Get pointer to private data */ > + this = &pnx8550_nand; > + > + /* Initialize structures */ > + memset((char *)&pnx8550_mtd, 0, sizeof(struct mtd_info)); > + memset((char *)this, 0, sizeof(struct nand_chip)); > + > + /* Work out address of Nand Flash */ > + pNandAddr = (u16 *) (KSEG1 | (PNX8550_BASE18_ADDR & (~0x7))); > + > + pNandAddr = (u16 *) (((u32) pNandAddr) + > + ((PNX8550_XIO_SEL0 & PNX8550_XIO_SEL0_OFFSET_MASK) > + >> PNX8550_XIO_SEL0_OFFSET_SHIFT) * 8 * 1024 * > + 1024); > + > + /* Link the private data with the MTD structure */ > + pnx8550_mtd.priv = this; > + this->chip_delay = 15; > + this->options = NAND_BUSWIDTH_16; > + this->cmdfunc = pnx8550_nand_command; > + this->read_byte = pnx8550_nand_read_byte; > + this->read_word = pnx8550_nand_read_word; > + this->read_buf = pnx8550_nand_read_buf; > + this->write_byte = pnx8550_nand_write_byte; > + this->write_word = pnx8550_nand_write_word; > + this->write_buf = pnx8550_nand_write_buf; > + this->verify_buf = pnx8550_nand_verify_buf; > + this->dev_ready = pnx8550_nand_dev_ready; > + this->hwcontrol = pnx8550_nand_hwcontrol; > + this->eccmode = NAND_ECC_SOFT; > + this->badblock_pattern = &nand16bit_memorybased; > + this->autooob = &nand16bit_oob_16; > + > + transferBuffer = > + kmalloc(pnx8550_mtd.oobblock + pnx8550_mtd.oobsize, > + GFP_DMA | GFP_KERNEL); > + if (!transferBuffer) { > + printk(KERN_ERR > + "Unable to allocate NAND data buffer for PNX8550.\n"); > + return -ENOMEM; > + } > + > + /* Scan to find existence of the device */ > + if (nand_scan(&pnx8550_mtd, 1)) { > + printk("%s: Exiting No Devices\n", __FUNCTION__); > + return -ENXIO; Need kfree(transferBuffer) > + } > + > + /* Register the partitions */ > + add_mtd_partitions(&pnx8550_mtd, partition_info, NUM_PARTITIONS); Need Kconfig to select MTD_PARTITIONS if required. > + > + /* Return happy */ > + return 0; > +} > + > +module_init(pnx8550_nand_init); > + > +/* > + * Clean up routine > + */ > +#ifdef MODULE > +static void __exit pnx8550_nand_cleanup(void) > +{ > + /* Unregister the device */ > + del_mtd_device(&pnx8550_mtd); Need del_mtd_partitions I think? > + if (transferBuffer) { > + kfree(transferBuffer); "if (transferBuffer)" not needed and is discouraged . > + } > +} > + > +module_exit(pnx8550_nand_cleanup); > +#endif > + > +MODULE_LICENSE("GPL"); > +MODULE_AUTHOR("Adam Charrett"); > +MODULE_DESCRIPTION("Driver for 16Bit NAND Flash on the XIO bus for PNX8550"); > Index: linux-2.6.15_0/drivers/mtd/nand/Makefile > =================================================================== > --- linux-2.6.15_0.orig/drivers/mtd/nand/Makefile > +++ linux-2.6.15_0/drivers/mtd/nand/Makefile > @@ -18,5 +18,6 @@ obj-$(CONFIG_MTD_NAND_H1900) += h1910.o > obj-$(CONFIG_MTD_NAND_RTC_FROM4) += rtc_from4.o > obj-$(CONFIG_MTD_NAND_SHARPSL) += sharpsl.o > obj-$(CONFIG_MTD_NAND_NANDSIM) += nandsim.o > +obj-$(CONFIG_MTD_NAND_PNX8550) += pnx8550.o > > nand-objs = nand_base.o nand_bbt.o > > > ------------------------------------------------------------------------ > > ______________________________________________________ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ -- Todd From shuveb@gmail.com Mon Jan 16 06:31:00 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 06:31:34 +0000 (GMT) Received: from p549F60EF.dip.t-dialin.net ([84.159.96.239]:2452 "EHLO p549F60EF.dip.t-dialin.net") by ftp.linux-mips.org with ESMTP id S8126482AbWAPGbA (ORCPT ); Mon, 16 Jan 2006 06:31:00 +0000 Received: from uproxy.gmail.com ([IPv6:::ffff:66.249.92.194]:63554 "EHLO uproxy.gmail.com") by linux-mips.net with ESMTP id ; Sun, 15 Jan 2006 21:18:27 +0100 Received: by uproxy.gmail.com with SMTP id m3so441836uge for ; Sun, 15 Jan 2006 12:16:22 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:mime-version:content-type; b=LeoYH3cEg8epsaq4CyEI646CbHGOVHf/LG+pqLxprxnMgZ0PJ6Ge21N9rmpebFHALAdy75urokJlmyWN+pKwx6/O7JEWpTEWMvusVeQXJbfDZPWUF4TcstGYSVIW+rp1jQKW1HxJHmMaV+e5MIA/s655jVvNj0DAmWqO8XePL9s= Received: by 10.49.28.3 with SMTP id f3mr185718nfj; Sun, 15 Jan 2006 12:16:22 -0800 (PST) Received: by 10.49.29.1 with HTTP; Sun, 15 Jan 2006 12:16:21 -0800 (PST) Message-ID: Date: Mon, 16 Jan 2006 01:46:21 +0530 From: Shuveb Hussain To: linux-mips@linux-mips.org Subject: Arcload Ext2FS patch MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_Part_19961_16340785.1137356181819" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9879 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: shuveb@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 188757 Lines: 2474 ------=_Part_19961_16340785.1137356181819 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Dear List, Attached is the patch that adds Ext2FS reading capability to ArcLoad. This patch is based on onion's patch for arcboot. I have to compress it since it is somewhat large in size. Some notes: * The arc.cf file needs to be in /etc. * The kernels can be anywhere in OSLoadPartition, usually "/" * As usual, arcload needs to be in the DVH, pointed to by SystemPartition * OSLoader is the arcload filename in DVH * OSLoadFilename determines which of the kernels is loaded with whatever op= tions Problems: I cross compiled arcload on x86 and used TFTP to test, there are 2 directories in the e2fslib directories, "et" and "util" that seem to cause problems when cross compiling. Native compilation does not cause any errors. This compile time problem, can however be fixed by excuting make directly after doing a "cd" into these directories manually. The top level makefile is screwing things up somehow, and since I'm no make guru, can't figure out why. It is using mips-linux-gcc, rather than the native gcc. I have also put the patch here: http://shuveb.f2g.net/arcload-e2fs-shuveb.patch.bz2 Thanks, --shuveb ------=_Part_19961_16340785.1137356181819 Content-Type: application/x-bzip2; name=arcload-e2fs-shuveb.patch.bz2 Content-Transfer-Encoding: base64 Content-Disposition: attachment; filename="arcload-e2fs-shuveb.patch.bz2" QlpoOTFBWSZTWXJX3JADWad/gH//5Ih///////////////9jDP54AKUPsCm5tQPtC5dxejQChV9W yoBQ7zACYs4u90dvutX2vSqXawK0BpVWYAU1pT32729sD0AHkFGvvo++uvLO2nbK2dXjSgQq1vFg Pc896hnmdfWJ7x9e7j167ZfXx7de9UJQlmH2yQHZ97vO8Pud2qrY1F5d748+zB7fQG489nhs7U84 3uzDuvZdxL2xfLAh0z3Yz49awe8+4EnkC97fF7XXePO72+cr6+90+9qzavt9db6UuVPrtz17u+93 c9xprvDST1H164N7M9983e+ToHQ53d2wol6Br74dWX3dzfe8r40Aq+ypmqqurao9VEB89dz7g73v vsGNOuAAk687U1qqVQXWRBG2giieLvt6odrLd73tye9az32yehbclvcB0Fz32e6+vj3nPe2AQkiC nvCgduBm7A5ySw9b2HdkUFPPnOS6KNN7HKV20pQK61KOq2+6PZpe0FEXtkpFTZkKKFAIKjWbad8V gdSSUkAKXm0AACvbVKAASOw0UCJCFPbuNKBrKQHowltgAAAALtgEJAqEoJTFlFUgvdN12fRnsAD6 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sywWfSYqxYEpUUzQClIBoaP9GKiG0IP1wqm7CG6YYIrgo/WaKQ3VpqQk+m++yDiwFoC1C7w4pFuc iuWP/Ua/5TaPs42jmshRVSpinOCJHvtbP2//r/KNOQcvRfh718YQGZ2QJMIQUYAxQPy/qvJ8Lw/R WtcDYOVr7P/L69P+vw7eGsGOgTZpmATZu8/0QPJff2fbH2/u+y7t3Mz3BfbRQZaYadPvsnlgtusx vd3AwvM7Ile7PysbY/J3Y5Oa5K2p/FJMCTGiB0wkDp0xHD6/+tLIde7HtrP6mM+PhpjZYWfs8uzg r1x/3XOy/Hr6XkfvrCfGf6flz7cxB8KZcq0ZYL/+kDsFZN2xQiPWr8inX0119/xDXN+aYaivQ36U x//xdyRThQkHJX3JAA== ------=_Part_19961_16340785.1137356181819-- From florian.delizy@sagem.com Mon Jan 16 07:21:05 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 07:21:25 +0000 (GMT) Received: from ns1.sagem.com ([62.160.59.65]:6068 "EHLO mx1.sagem.com") by ftp.linux-mips.org with ESMTP id S8133351AbWAPHVF (ORCPT ); Mon, 16 Jan 2006 07:21:05 +0000 To: linux-mips Subject: =?ISO-8859-1?Q?R=E9f=2E_=3A_does_the_linux_kernel_use_k0=2C_k1_regs=3F?= MIME-Version: 1.0 Message-ID: From: Florian DELIZY Date: Mon, 16 Jan 2006 08:24:27 +0100 Content-Type: multipart/alternative; boundary="=_alternative 0028B1A5C12570F8_=" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9880 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian.delizy@sagem.com Precedence: bulk X-list: linux-mips Content-Length: 3744 Lines: 124 Message en plusieurs parties au format MIME --=_alternative 0028B1A5C12570F8_= Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable k0, k1 registers are used in SAVE=5FALL and RESTORE=5FALL macros mainly, to= =20 save all registers on the kernel stack, once all registered are properly saved, you can use them, and restore them = after, that's why kernel interrupt code does not=20 uise k0,k1, and let them for critical interruption code (save/restore=20 context) Have a look in include/asm-mips/stackframe.h (grep is your friend) -- Florian Delizy zhuzhenhua Envoy=E9 par : linux-mips-bounce@linux-mips.org 13/01/2006 03:39 Remis le : 15/01/2006 19:29 =20 Pour : linux-mips cc : (ccc : Florian DELIZY/EXT/SAGEM) Objet : does the linux kernel use k0, k1 regs? i have to handle a NMI interrupt in bootloader(0xBFC00000), and i want to return to linux after the NMI interrupt, i think other regs maybe be useing by linux-kernel, i think the NMI handle only can use K0, K1. and i do not find the use of K0, K1 in linux-kernel interrupt or exception handle so i think if the NMI interrupt a linux interrupt handle, there is still no conflict. i am not sure my thinking is right, anyone can give some hints? Best regards zhuzhenhua --=_alternative 0028B1A5C12570F8_= Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable
k0, k1 registers are used in SAVE=5F= ALL and RESTORE=5FALL macros mainly, to save all registers on the kernel st= ack,
once all registered are properly sav= ed, you can use them, and restore them after, that's why kernel interrupt c= ode does not
uise k0,k1, and let them for critica= l interruption code (save/restore context)


Have a look in include/asm-mips/stac= kframe.h (grep is your friend)

-- Florian Delizy




zhuzhenhua <zzh.hust@gmail.com= >

Envoy=E9 par : linux-mips-bounce@lin= ux-mips.org

13/01/2006 03:39
Remis le : 15/01/2006 19:29

       
        Pour : &= nbsp;      linux-mips <linux-mips@linux-mips.org>
        cc : &nb= sp;      (ccc : Florian DELIZY/EXT/SAGEM)
        Objet : =        does the linux kernel use k0, k1 regs?



i have to handle a NMI interrupt in= bootloader(0xBFC00000),
and i want to return to linux after the NMI interrupt,  i think other=
regs maybe be useing by linux-kernel, i think the NMI handle only can
use K0, K1.

and i do not find the use of K0, K1 in linux-kernel interrupt or
exception handle
so i think if the NMI interrupt a linux interrupt handle, there is
still no conflict.

i am not sure my thinking is right, anyone can give some hints?

Best regards

zhuzhenhua

--=_alternative 0028B1A5C12570F8_=-- From colin@realtek.com.tw Mon Jan 16 08:13:59 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 08:14:19 +0000 (GMT) Received: from mf2.realtek.com.tw ([60.248.182.46]:17679 "EHLO mf2.realtek.com.tw") by ftp.linux-mips.org with ESMTP id S3457192AbWAPIN7 (ORCPT ); Mon, 16 Jan 2006 08:13:59 +0000 Received: from msx.realtek.com.tw (unverified [172.21.1.77]) by mf2.realtek.com.tw (Clearswift SMTPRS 5.1.7) with ESMTP id for ; Mon, 16 Jan 2006 16:19:52 +0800 Received: from rtpdii3098 ([172.21.98.16]) by msx.realtek.com.tw (Lotus Domino Release 6.5.3) with ESMTP id 2006011616174962-447378 ; Mon, 16 Jan 2006 16:17:49 +0800 Message-ID: <005101c61a75$43edc6b0$106215ac@realtek.com.tw> From: "colin" To: Subject: Can I use this kind of performance counters to implement oProfile? Date: Mon, 16 Jan 2006 16:17:17 +0800 MIME-Version: 1.0 X-Priority: 3 (Normal) X-MSMail-Priority: Normal X-Mailer: Microsoft Outlook Express 6.00.2800.1506 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2800.1506 X-MIMETrack: Itemize by SMTP Server on msx/Realtek(Release 6.5.3|September 14, 2004) at 2006/01/16 =?Bog5?B?pFWkyCAwNDoxNzo0OQ==?=, Serialize by Router on msx/Realtek(Release 6.5.3|September 14, 2004) at 2006/01/16 =?Bog5?B?pFWkyCAwNDoxNzo1MQ==?=, Serialize complete at 2006/01/16 =?Bog5?B?pFWkyCAwNDoxNzo1MQ==?= Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="big5" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9881 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: colin@realtek.com.tw Precedence: bulk X-list: linux-mips Content-Length: 522 Lines: 22 Hi all, Our SOC has performance counters, and we would like to use oProfile on it. After surveying the oProfile doc, I found that the model of our performance counters donot seem to fit oProfile. This is because oProfile uses the interrupts caused by overflow of, say, cache miss count to estimate the probability of this event in every portion. Our SOC doesn't emit interrupt when event count overflow. Therefore, oProfile cannot be used to estimate cache miss event on our chip. Is that right? Regards, Colin From langabe@gmail.com Mon Jan 16 10:01:10 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 10:01:29 +0000 (GMT) Received: from uproxy.gmail.com ([66.249.92.204]:19766 "EHLO uproxy.gmail.com") by ftp.linux-mips.org with ESMTP id S3458532AbWAPKBJ convert rfc822-to-8bit (ORCPT ); Mon, 16 Jan 2006 10:01:09 +0000 Received: by uproxy.gmail.com with SMTP id u40so564150ugc for ; Mon, 16 Jan 2006 02:04:40 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:mime-version:content-type:content-transfer-encoding:content-disposition; b=gtCIoGfHk6Ubj2h6fvo3EFsPLsc/vZEtodYZ+R3+sFegTSwL8w++jB24d+JpT5/U3fT8vKT1K1Mh2cuPtbd88Je4XJN1IgKAxYmEalwnAUGenLSnTBDgcQpYYFCM1BWdCX/nPD054TWJ5JyzdorBTX8vxohDASeM9NBj1Q1fwRs= Received: by 10.48.4.9 with SMTP id 9mr215207nfd; Mon, 16 Jan 2006 02:04:40 -0800 (PST) Received: by 10.48.225.20 with HTTP; Mon, 16 Jan 2006 02:04:39 -0800 (PST) Message-ID: Date: Mon, 16 Jan 2006 10:04:39 +0000 From: Alex Gonzalez To: linux-mips Subject: Setting gp on pic code MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9882 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: langabe@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 838 Lines: 28 Hi, I am trying to set the gp register on pic code as follows: "la gp,_gp" Disassembling the resulting code, "lw gp,0(gp)" I am confused as to why it uses a gp-relative address instead of an absolute address for _gp. How I am supposed to reset gp then? A bit of background. I am working on a dual core chip, with each core running independently. They both boot from the same startup code, then the second core waits until the first one sets all the hardware and loads a pic binary into a shared memory region. The second core is then released and should reset gp and jump to the new binary (which is compiled separately from the startup code). This arrangement seems to work OK if the binary is compiled non-pic, but for pic code the gp register is not set to the correct value. Any insight into this appreciated. Thanks, Alex From zzh.hust@gmail.com Mon Jan 16 11:58:19 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 11:58:39 +0000 (GMT) Received: from wproxy.gmail.com ([64.233.184.202]:36801 "EHLO wproxy.gmail.com") by ftp.linux-mips.org with ESMTP id S8133443AbWAPL6T (ORCPT ); Mon, 16 Jan 2006 11:58:19 +0000 Received: by wproxy.gmail.com with SMTP id 36so1147524wra for ; Mon, 16 Jan 2006 04:01:50 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:references; b=n6MjQek7XczpBZ47AxDHBbcftZ7cfba97ejI4Q+JRXnl/TeC1eesE0V6dTlK8bMdMKSL8SCRXUdHuKUBI3H5mVIbBaozfEA0UK0tDPfwu7bcZB7kBJdirFY8/lFflO30Wa8CTYjwcfO5KLav5ACdgLz0Kvhw47pn1FLmPw7Ldi8= Received: by 10.54.104.14 with SMTP id b14mr949085wrc; Mon, 16 Jan 2006 04:01:49 -0800 (PST) Received: by 10.54.156.1 with HTTP; Mon, 16 Jan 2006 04:01:49 -0800 (PST) Message-ID: <50c9a2250601160401ifa8337cs2f8638f0077f37ed@mail.gmail.com> Date: Mon, 16 Jan 2006 20:01:49 +0800 From: zhuzhenhua To: Florian DELIZY Subject: =?ISO-8859-1?Q?Re:_R=E9f._:_does_the_linux_kernel_use_k0,_k1_regs=3F?= Cc: linux-mips In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="----=_Part_11679_22905433.1137412909940" References: Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9883 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zzh.hust@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 4995 Lines: 149 ------=_Part_11679_22905433.1137412909940 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Content-Disposition: inline thanks for all now in my NMI interrupt, i first move k0 value to Desave, then use k0 to handle, and then eret. it can work. On 1/16/06, Florian DELIZY wrote: > > > k0, k1 registers are used in SAVE_ALL and RESTORE_ALL macros mainly, to > save all registers on the kernel stack, > once all registered are properly saved, you can use them, and restore the= m > after, that's why kernel interrupt code does not > uise k0,k1, and let them for critical interruption code (save/restore > context) > > > Have a look in include/asm-mips/stackframe.h (grep is your friend) > > -- Florian Delizy > > > > > > *zhuzhenhua * > > Envoy=E9 par : linux-mips-bounce@linux-mips.org > > 13/01/2006 03:39 > Remis le : 15/01/2006 19:29 > > Pour : linux-mips > cc : (ccc : Florian DELIZY/EXT/SAGEM) > Objet : does the linux kernel use k0, k1 regs? > > > > i have to handle a NMI interrupt in bootloader(0xBFC00000), > and i want to return to linux after the NMI interrupt, i think other > regs maybe be useing by linux-kernel, i think the NMI handle only can > use K0, K1. > > and i do not find the use of K0, K1 in linux-kernel interrupt or > exception handle > so i think if the NMI interrupt a linux interrupt handle, there is > still no conflict. > > i am not sure my thinking is right, anyone can give some hints? > > Best regards > > zhuzhenhua > > > > ------=_Part_11679_22905433.1137412909940 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Content-Disposition: inline thanks for all
now in my NMI interrupt, i first move k0 value to Desave, then use k0 to ha= ndle, and then eret.
it can work.

On 1/16/06, Florian DELIZY <florian.delizy@sagem.com> wrote:

k0, k1 registers are used in SAVE_= ALL and RESTORE_ALL macros mainly, to save all registers on the kernel stac= k,
once all registered are properly s= aved, you can use them, and restore them after, that's why kernel interrupt= code does not
uise k0,k1, and let them for criti= cal interruption code (save/restore context)


Have a look in include/asm-mips/st= ackframe.h (grep is your friend)

-- Florian Delizy





zhuzhenhua <zzh.hust@gmail.com>

Envoy=E9 par : linux-mips-bounce@linux-mips.org

13/01/2006 03:39
Remis le : 15/01/2006 19:29

       
        Pour :=        linux-mips <linux-mips@linux-mips.org>
        cc : &= nbsp;      (ccc : Florian DELIZY/EXT/SAGEM)
        Objet = :        does the linux kernel use k0, k1 regs?



i have to handle a NMI interrupt = in bootloader(0xBFC00000),
and i want to return to linux after the NMI interrupt,  i think other=
regs maybe be useing by linux-kernel, i think the NMI handle only can
use K0, K1.

and i do not find the use of K0, K1 in linux-kernel interrupt or
exception handle
so i think if the NMI interrupt a linux interrupt handle, there is
still no conflict.

i am not sure my thinking is right, anyone can give some hints?

Best regards

zhuzhenhua


------=_Part_11679_22905433.1137412909940-- From zzh.hust@gmail.com Mon Jan 16 12:06:15 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 12:06:39 +0000 (GMT) Received: from wproxy.gmail.com ([64.233.184.195]:57709 "EHLO wproxy.gmail.com") by ftp.linux-mips.org with ESMTP id S8133443AbWAPMGP convert rfc822-to-8bit (ORCPT ); Mon, 16 Jan 2006 12:06:15 +0000 Received: by wproxy.gmail.com with SMTP id 36so1149085wra for ; Mon, 16 Jan 2006 04:09:41 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:mime-version:content-type:content-transfer-encoding:content-disposition; b=SUe5vb0ZRb6iyfK+nni6/bN1gHovvqRGl6fh+J9+iyXQ9TS/QgOJjYX/tEPNe4H22bqzUVGGfbpRdZATsV6GycNJMp1PUY3nuTtBXm+4YMEIUdCNHpoVtHWrLusKDCIFUorwjgRjqsRjeHTOW7jEa+Mrpx7+3CAtDsasf0AmU+4= Received: by 10.54.154.10 with SMTP id b10mr4096720wre; Mon, 16 Jan 2006 04:09:41 -0800 (PST) Received: by 10.54.156.1 with HTTP; Mon, 16 Jan 2006 04:09:41 -0800 (PST) Message-ID: <50c9a2250601160409v2d931490u9123d7b9ad93bfb7@mail.gmail.com> Date: Mon, 16 Jan 2006 20:09:41 +0800 From: zhuzhenhua To: linux-mips Subject: Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(1,0) MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9884 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zzh.hust@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 17041 Lines: 881 i download a linux 2.6.14 kernel from http://www.linux-mips.org/pub/linux/mips/kernel/. and i added arch/mips/ramdisk directory to embedded the ramdisk.gz in vmliux i also modify the arch/mips/Makefile and arch/mips/Kconfig but when i bootm the vmlinux, it has panic "Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(1,0)" thanks for any hints! Best regards! zhuzhenhua the arch/mips/ramdisk/Makefile as follow # # Makefile for a ramdisk image # obj-y += ramdisk.o O_FORMAT = $(shell $(OBJDUMP) -i | head -n 2 | grep elf32) img := $(subst ",,$(CONFIG_EMBEDDED_RAMDISK_IMAGE)) # add $(src) when $(img) is relative img := $(subst $(src)//,/,$(src)/$(img)) quiet_cmd_ramdisk = LD $@ define cmd_ramdisk $(LD) -T $(srctree)/$(src)/ld.script -b binary --oformat $(O_FORMAT) \ -o $@ $(img) endef $(obj)/ramdisk.o: $(img) $(srctree)/$(src)/ld.script $(call cmd,ramdisk) the arch/mips/ramdisk/ld.script as follow OUTPUT_ARCH(mips) SECTIONS { .initrd : { *(.data) } } as follow is my .config # # Automatically generated make config: don't edit # Linux kernel version: 2.6.14 # Mon Jan 16 19:13:36 2006 # CONFIG_MIPS=y # # Code maturity level options # CONFIG_EXPERIMENTAL=y CONFIG_CLEAN_COMPILE=y CONFIG_BROKEN_ON_SMP=y CONFIG_INIT_ENV_ARG_LIMIT=32 # # General setup # CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_SWAP=y CONFIG_SYSVIPC=y # CONFIG_POSIX_MQUEUE is not set # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y # CONFIG_AUDIT is not set CONFIG_HOTPLUG=y CONFIG_KOBJECT_UEVENT=y # CONFIG_IKCONFIG is not set CONFIG_INITRAMFS_SOURCE="" CONFIG_EMBEDDED=y CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_EXTRA_PASS is not set CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_EPOLL=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_SHMEM=y CONFIG_CC_ALIGN_FUNCTIONS=0 CONFIG_CC_ALIGN_LABELS=0 CONFIG_CC_ALIGN_LOOPS=0 CONFIG_CC_ALIGN_JUMPS=0 # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 # # Loadable module support # CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set CONFIG_OBSOLETE_MODPARM=y CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y CONFIG_KMOD=y # # Machine selection # CONFIG_MYCPU_EVA=y # CONFIG_MIPS_MTX1 is not set # CONFIG_MIPS_BOSPORUS is not set # CONFIG_MIPS_PB1000 is not set # CONFIG_MIPS_PB1100 is not set # CONFIG_MIPS_PB1500 is not set # CONFIG_MIPS_PB1550 is not set # CONFIG_MIPS_PB1200 is not set # CONFIG_MIPS_DB1000 is not set # CONFIG_MIPS_DB1100 is not set # CONFIG_MIPS_DB1500 is not set # CONFIG_MIPS_DB1550 is not set # CONFIG_MIPS_DB1200 is not set # CONFIG_MIPS_MIRAGE is not set # CONFIG_MIPS_COBALT is not set # CONFIG_MACH_DECSTATION is not set # CONFIG_MIPS_EV64120 is not set # CONFIG_MIPS_EV96100 is not set # CONFIG_MIPS_IVR is not set # CONFIG_MIPS_ITE8172 is not set # CONFIG_MACH_JAZZ is not set # CONFIG_LASAT is not set # CONFIG_MIPS_ATLAS is not set # CONFIG_MIPS_MALTA is not set # CONFIG_MIPS_SEAD is not set # CONFIG_MIPS_SIM is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set # CONFIG_MOMENCO_OCELOT is not set # CONFIG_MOMENCO_OCELOT_3 is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MIPS_XXS1500 is not set # CONFIG_PNX8550_V2PCI is not set # CONFIG_PNX8550_JBS is not set # CONFIG_DDB5074 is not set # CONFIG_DDB5476 is not set # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set # CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set # CONFIG_SIBYTE_BIGSUR is not set # CONFIG_SIBYTE_SWARM is not set # CONFIG_SIBYTE_SENTOSA is not set # CONFIG_SIBYTE_RHONE is not set # CONFIG_SIBYTE_CARMEL is not set # CONFIG_SIBYTE_PTSWARM is not set # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set # CONFIG_SNI_RM200_PCI is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NEED_PCI_MAP_STATE=y # CONFIG_CPU_BIG_ENDIAN is not set CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y CONFIG_SOC_MYCPU=y CONFIG_SOC_MYCORE=y CONFIG_MIPS_L1_CACHE_SHIFT=5 # # CPU selection # CONFIG_CPU_MIPS32_R1=y # CONFIG_CPU_MIPS32_R2 is not set # CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_MIPS64_R2 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set # CONFIG_CPU_R4300 is not set # CONFIG_CPU_R4X00 is not set # CONFIG_CPU_TX49XX is not set # CONFIG_CPU_R5000 is not set # CONFIG_CPU_R5432 is not set # CONFIG_CPU_R6000 is not set # CONFIG_CPU_NEVADA is not set # CONFIG_CPU_R8000 is not set # CONFIG_CPU_R10000 is not set # CONFIG_CPU_RM7000 is not set # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_SYS_HAS_CPU_MIPS32_R1=y CONFIG_CPU_MIPS32=y CONFIG_CPU_MIPSR1=y CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y # # Kernel type # CONFIG_32BIT=y # CONFIG_64BIT is not set CONFIG_PAGE_SIZE_4KB=y # CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_CPU_HAS_PREFETCH=y # CONFIG_MIPS_MT is not set # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y CONFIG_ARCH_FLATMEM_ENABLE=y CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y # CONFIG_DISCONTIGMEM_MANUAL is not set # CONFIG_SPARSEMEM_MANUAL is not set CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y # CONFIG_SPARSEMEM_STATIC is not set CONFIG_PREEMPT_NONE=y # CONFIG_PREEMPT_VOLUNTARY is not set # CONFIG_PREEMPT is not set # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # CONFIG_MMU=y # # PCCARD (PCMCIA/CardBus) support # # CONFIG_PCCARD is not set # # PCI Hotplug Support # # # Executable file formats # CONFIG_BINFMT_ELF=y # CONFIG_BINFMT_MISC is not set CONFIG_TRAD_SIGNALS=y # CONFIG_ACTPM is not set # # MIPS initrd options # CONFIG_EMBEDDED_RAMDISK=y CONFIG_EMBEDDED_RAMDISK_IMAGE="ramdisk.gz" # # Networking # CONFIG_NET=y # # Networking options # CONFIG_PACKET=y # CONFIG_PACKET_MMAP is not set CONFIG_UNIX=y CONFIG_XFRM=y CONFIG_XFRM_USER=m CONFIG_NET_KEY=y CONFIG_INET=y CONFIG_IP_MULTICAST=y # CONFIG_IP_ADVANCED_ROUTER is not set CONFIG_IP_FIB_HASH=y CONFIG_IP_PNP=y # CONFIG_IP_PNP_DHCP is not set CONFIG_IP_PNP_BOOTP=y # CONFIG_IP_PNP_RARP is not set # CONFIG_NET_IPIP is not set # CONFIG_NET_IPGRE is not set # CONFIG_IP_MROUTE is not set # CONFIG_ARPD is not set # CONFIG_SYN_COOKIES is not set # CONFIG_INET_AH is not set # CONFIG_INET_ESP is not set # CONFIG_INET_IPCOMP is not set CONFIG_INET_TUNNEL=m CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_BIC=y # # IP: Virtual Server Configuration # # CONFIG_IP_VS is not set # CONFIG_IPV6 is not set CONFIG_NETFILTER=y # CONFIG_NETFILTER_DEBUG is not set CONFIG_NETFILTER_NETLINK=m CONFIG_NETFILTER_NETLINK_QUEUE=m CONFIG_NETFILTER_NETLINK_LOG=m # # IP: Netfilter Configuration # # CONFIG_IP_NF_CONNTRACK is not set # CONFIG_IP_NF_QUEUE is not set # CONFIG_IP_NF_IPTABLES is not set # CONFIG_IP_NF_ARPTABLES is not set # # DCCP Configuration (EXPERIMENTAL) # # CONFIG_IP_DCCP is not set # # SCTP Configuration (EXPERIMENTAL) # # CONFIG_IP_SCTP is not set # CONFIG_ATM is not set # CONFIG_BRIDGE is not set # CONFIG_VLAN_8021Q is not set # CONFIG_DECNET is not set # CONFIG_LLC2 is not set # CONFIG_IPX is not set # CONFIG_ATALK is not set # CONFIG_X25 is not set # CONFIG_LAPB is not set # CONFIG_NET_DIVERT is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set # CONFIG_NET_SCHED is not set # CONFIG_NET_CLS_ROUTE is not set # # Network testing # # CONFIG_NET_PKTGEN is not set # CONFIG_HAMRADIO is not set # CONFIG_IRDA is not set # CONFIG_BT is not set CONFIG_IEEE80211=m # CONFIG_IEEE80211_DEBUG is not set CONFIG_IEEE80211_CRYPT_WEP=m CONFIG_IEEE80211_CRYPT_CCMP=m CONFIG_IEEE80211_CRYPT_TKIP=m # # Device Drivers # # # Generic Driver Options # CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_FW_LOADER is not set # # Connector - unified userspace <-> kernelspace linker # CONFIG_CONNECTOR=m # # Memory Technology Devices (MTD) # # CONFIG_MTD is not set # # Parallel port support # # CONFIG_PARPORT is not set # # Plug and Play support # # # Block devices # # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_CRYPTOLOOP is not set # CONFIG_BLK_DEV_NBD is not set CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=4096 CONFIG_BLK_DEV_INITRD=y # CONFIG_LBD is not set # CONFIG_CDROM_PKTCDVD is not set # # IO Schedulers # CONFIG_IOSCHED_NOOP=y CONFIG_IOSCHED_AS=y CONFIG_IOSCHED_DEADLINE=y CONFIG_IOSCHED_CFQ=y CONFIG_ATA_OVER_ETH=y # # ATA/ATAPI/MFM/RLL support # # CONFIG_IDE is not set # # SCSI device support # # CONFIG_RAID_ATTRS is not set # CONFIG_SCSI is not set # # Multi-device support (RAID and LVM) # # CONFIG_MD is not set # # Fusion MPT device support # # CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support # # # I2O device support # # # Network device support # CONFIG_NETDEVICES=y # CONFIG_DUMMY is not set # CONFIG_BONDING is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set # # PHY device support # CONFIG_PHYLIB=m CONFIG_PHYCONTROL=y # # MII PHY device drivers # CONFIG_MARVELL_PHY=m CONFIG_DAVICOM_PHY=m CONFIG_QSEMI_PHY=m CONFIG_LXT_PHY=m CONFIG_CICADA_PHY=m # # Ethernet (10 or 100Mbit) # CONFIG_NET_ETHERNET=y CONFIG_MII=m # # Ethernet (1000 Mbit) # # # Ethernet (10000 Mbit) # # # Token Ring devices # # # Wireless LAN (non-hamradio) # # CONFIG_NET_RADIO is not set # # Wan interfaces # # CONFIG_WAN is not set CONFIG_PPP=m CONFIG_PPP_MULTILINK=y # CONFIG_PPP_FILTER is not set CONFIG_PPP_ASYNC=m # CONFIG_PPP_SYNC_TTY is not set CONFIG_PPP_DEFLATE=m # CONFIG_PPP_BSDCOMP is not set CONFIG_PPPOE=m # CONFIG_SLIP is not set # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set # CONFIG_NETPOLL is not set # CONFIG_NET_POLL_CONTROLLER is not set # # ISDN subsystem # # CONFIG_ISDN is not set # # Telephony Support # # CONFIG_PHONE is not set # # Input device support # CONFIG_INPUT=y # # Userland interfaces # CONFIG_INPUT_MOUSEDEV=y CONFIG_INPUT_MOUSEDEV_PSAUX=y CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # CONFIG_INPUT_JOYDEV is not set # CONFIG_INPUT_TSDEV is not set CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_EVBUG is not set # # Input Device Drivers # # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_INPUT_JOYSTICK is not set # CONFIG_INPUT_TOUCHSCREEN is not set # CONFIG_INPUT_MISC is not set # # Hardware I/O ports # CONFIG_SERIO=y # CONFIG_SERIO_I8042 is not set CONFIG_SERIO_SERPORT=y CONFIG_SERIO_LIBPS2=m CONFIG_SERIO_RAW=m # CONFIG_GAMEPORT is not set # # Character devices # CONFIG_VT=y # CONFIG_VT_CONSOLE is not set CONFIG_HW_CONSOLE=y # CONFIG_SERIAL_NONSTANDARD is not set # # Serial drivers # # CONFIG_SERIAL_8250 is not set # # Non-8250 serial port support # CONFIG_SERIAL_MYCORE=y CONFIG_SERIAL_MYCORE_CONSOLE=y CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 # # IPMI # # CONFIG_IPMI_HANDLER is not set # # Watchdog Cards # # CONFIG_WATCHDOG is not set # CONFIG_RTC is not set # CONFIG_GEN_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # # Ftape, the floppy tape device driver # # CONFIG_RAW_DRIVER is not set # # TPM devices # # # I2C support # # CONFIG_I2C is not set # # Dallas's 1-wire bus # # CONFIG_W1 is not set # # Hardware Monitoring support # # CONFIG_HWMON is not set # CONFIG_HWMON_VID is not set # # Misc devices # # # Multimedia Capabilities Port drivers # # # Multimedia devices # # CONFIG_VIDEO_DEV is not set # # Digital Video Broadcasting Devices # # CONFIG_DVB is not set # # Graphics support # # CONFIG_FB is not set # # Console display driver support # # CONFIG_VGA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y # # Sound # # CONFIG_SOUND is not set # # USB support # # CONFIG_USB_ARCH_HAS_HCD is not set # CONFIG_USB_ARCH_HAS_OHCI is not set # # USB Gadget Support # # CONFIG_USB_GADGET is not set # # MMC/SD Card support # # CONFIG_MMC is not set # # InfiniBand support # # # SN Devices # # # File systems # CONFIG_EXT2_FS=y CONFIG_EXT2_FS_XATTR=y CONFIG_EXT2_FS_POSIX_ACL=y # CONFIG_EXT2_FS_SECURITY is not set # CONFIG_EXT2_FS_XIP is not set CONFIG_EXT3_FS=y CONFIG_EXT3_FS_XATTR=y CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y CONFIG_JBD=y # CONFIG_JBD_DEBUG is not set CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set CONFIG_REISERFS_FS_XATTR=y CONFIG_REISERFS_FS_POSIX_ACL=y CONFIG_REISERFS_FS_SECURITY=y # CONFIG_JFS_FS is not set CONFIG_FS_POSIX_ACL=y # CONFIG_XFS_FS is not set # CONFIG_MINIX_FS is not set # CONFIG_ROMFS_FS is not set CONFIG_INOTIFY=y # CONFIG_QUOTA is not set CONFIG_DNOTIFY=y CONFIG_AUTOFS_FS=m CONFIG_AUTOFS4_FS=m CONFIG_FUSE_FS=m # # CD-ROM/DVD Filesystems # # CONFIG_ISO9660_FS is not set # CONFIG_UDF_FS is not set # # DOS/FAT/NT Filesystems # # CONFIG_MSDOS_FS is not set # CONFIG_VFAT_FS is not set # CONFIG_NTFS_FS is not set # # Pseudo filesystems # CONFIG_PROC_FS=y CONFIG_PROC_KCORE=y CONFIG_SYSFS=y CONFIG_TMPFS=y # CONFIG_HUGETLB_PAGE is not set CONFIG_RAMFS=y CONFIG_RELAYFS_FS=m # # Miscellaneous filesystems # # CONFIG_ADFS_FS is not set # CONFIG_AFFS_FS is not set # CONFIG_HFS_FS is not set # CONFIG_HFSPLUS_FS is not set # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set CONFIG_CRAMFS=m # CONFIG_VXFS_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # # Network File Systems # CONFIG_NFS_FS=y # CONFIG_NFS_V3 is not set # CONFIG_NFS_V4 is not set # CONFIG_NFS_DIRECTIO is not set CONFIG_NFSD=m # CONFIG_NFSD_V3 is not set # CONFIG_NFSD_TCP is not set CONFIG_ROOT_NFS=y CONFIG_LOCKD=y CONFIG_EXPORTFS=m CONFIG_NFS_COMMON=y CONFIG_SUNRPC=y # CONFIG_RPCSEC_GSS_KRB5 is not set # CONFIG_RPCSEC_GSS_SPKM3 is not set CONFIG_SMB_FS=m # CONFIG_SMB_NLS_DEFAULT is not set # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set # CONFIG_9P_FS is not set # # Partition Types # # CONFIG_PARTITION_ADVANCED is not set CONFIG_MSDOS_PARTITION=y # # Native Language Support # CONFIG_NLS=m CONFIG_NLS_DEFAULT="iso8859-1" # CONFIG_NLS_CODEPAGE_437 is not set # CONFIG_NLS_CODEPAGE_737 is not set # CONFIG_NLS_CODEPAGE_775 is not set # CONFIG_NLS_CODEPAGE_850 is not set # CONFIG_NLS_CODEPAGE_852 is not set # CONFIG_NLS_CODEPAGE_855 is not set # CONFIG_NLS_CODEPAGE_857 is not set # CONFIG_NLS_CODEPAGE_860 is not set # CONFIG_NLS_CODEPAGE_861 is not set # CONFIG_NLS_CODEPAGE_862 is not set # CONFIG_NLS_CODEPAGE_863 is not set # CONFIG_NLS_CODEPAGE_864 is not set # CONFIG_NLS_CODEPAGE_865 is not set # CONFIG_NLS_CODEPAGE_866 is not set # CONFIG_NLS_CODEPAGE_869 is not set # CONFIG_NLS_CODEPAGE_936 is not set # CONFIG_NLS_CODEPAGE_950 is not set # CONFIG_NLS_CODEPAGE_932 is not set # CONFIG_NLS_CODEPAGE_949 is not set # CONFIG_NLS_CODEPAGE_874 is not set # CONFIG_NLS_ISO8859_8 is not set # CONFIG_NLS_CODEPAGE_1250 is not set # CONFIG_NLS_CODEPAGE_1251 is not set # CONFIG_NLS_ASCII is not set # CONFIG_NLS_ISO8859_1 is not set # CONFIG_NLS_ISO8859_2 is not set # CONFIG_NLS_ISO8859_3 is not set # CONFIG_NLS_ISO8859_4 is not set # CONFIG_NLS_ISO8859_5 is not set # CONFIG_NLS_ISO8859_6 is not set # CONFIG_NLS_ISO8859_7 is not set # CONFIG_NLS_ISO8859_9 is not set # CONFIG_NLS_ISO8859_13 is not set # CONFIG_NLS_ISO8859_14 is not set # CONFIG_NLS_ISO8859_15 is not set # CONFIG_NLS_KOI8_R is not set # CONFIG_NLS_KOI8_U is not set # CONFIG_NLS_UTF8 is not set # # Profiling support # # CONFIG_PROFILING is not set # # Kernel hacking # # CONFIG_PRINTK_TIME is not set # CONFIG_DEBUG_KERNEL is not set CONFIG_LOG_BUF_SHIFT=14 CONFIG_CROSSCOMPILE=y CONFIG_CMDLINE="" # # Security options # CONFIG_KEYS=y CONFIG_KEYS_DEBUG_PROC_KEYS=y # CONFIG_SECURITY is not set # # Cryptographic options # CONFIG_CRYPTO=y CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_MD4=m CONFIG_CRYPTO_MD5=m CONFIG_CRYPTO_SHA1=m CONFIG_CRYPTO_SHA256=m CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_DES=m CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_TWOFISH=m CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_AES=m CONFIG_CRYPTO_CAST5=m CONFIG_CRYPTO_CAST6=m CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_ARC4=m CONFIG_CRYPTO_KHAZAD=m CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_DEFLATE=m CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_CRC32C=m # CONFIG_CRYPTO_TEST is not set # # Hardware crypto devices # # # Library routines # CONFIG_CRC_CCITT=m CONFIG_CRC16=m CONFIG_CRC32=y CONFIG_LIBCRC32C=m CONFIG_ZLIB_INFLATE=m CONFIG_ZLIB_DEFLATE=m From fosterb@uoguelph.ca Mon Jan 16 12:08:25 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 12:08:48 +0000 (GMT) Received: from aeryn.cs.uoguelph.ca ([131.104.20.160]:9355 "EHLO aeryn.cs.uoguelph.ca") by ftp.linux-mips.org with ESMTP id S8133443AbWAPMIY (ORCPT ); Mon, 16 Jan 2006 12:08:24 +0000 Received: from beddie.cis.uoguelph.ca (marvin.cis.uoguelph.ca [131.104.48.131]) by aeryn.cs.uoguelph.ca (8.13.1/8.13.1) with ESMTP id k0GCBrWb016884; Mon, 16 Jan 2006 07:11:53 -0500 Received: from localhost (localhost.localdomain [127.0.0.1]) by beddie.cis.uoguelph.ca (Postfix) with ESMTP id 2443B1EB20; Mon, 16 Jan 2006 07:09:47 -0500 (EST) Received: from beddie.cis.uoguelph.ca ([127.0.0.1]) by localhost (localhost.localdomain [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 30690-08; Mon, 16 Jan 2006 07:09:47 -0500 (EST) Received: from [192.168.0.103] (CPE001217cc2ab6-CM001371143eca.cpe.net.cable.rogers.com [70.30.137.118]) by beddie.cis.uoguelph.ca (Postfix) with ESMTP id CC59F1EA74; Mon, 16 Jan 2006 07:09:46 -0500 (EST) Message-ID: <43CB8D89.6070308@uoguelph.ca> Date: Mon, 16 Jan 2006 07:11:53 -0500 From: Brett Foster User-Agent: Mozilla Thunderbird 1.0 (Windows/20041206) X-Accept-Language: en-us, en MIME-Version: 1.0 To: Alex Gonzalez CC: linux-mips Subject: Re: Setting gp on pic code References: In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.52 on 131.104.20.160 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9885 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: fosterb@uoguelph.ca Precedence: bulk X-list: linux-mips Content-Length: 297 Lines: 17 Alex Gonzalez wrote: >Hi, > >I am trying to set the gp register on pic code as follows: > >"la gp,_gp" > >Disassembling the resulting code, > >"lw gp,0(gp)" > > Yes, this is normal... Use the following to set up the GP: //init GP lui gp,%HI(_gp) ori gp,%LO(_gp) From hellokishore@gmail.com Mon Jan 16 12:19:55 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 12:20:18 +0000 (GMT) Received: from zproxy.gmail.com ([64.233.162.201]:39960 "EHLO zproxy.gmail.com") by ftp.linux-mips.org with ESMTP id S8133443AbWAPMTz (ORCPT ); Mon, 16 Jan 2006 12:19:55 +0000 Received: by zproxy.gmail.com with SMTP id l8so1101018nzf for ; Mon, 16 Jan 2006 04:23:26 -0800 (PST) DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=beta; d=gmail.com; h=received:message-id:date:from:to:subject:mime-version:content-type; b=CzCmpjC7U17TekwL70HqBBvVcj8+1QGL1iCtDPBNzixDoTYrA7Z3cEQnMJfcV4KgvU1gzUeH22NGEBERellrm5XfKFwpq+pha2E3/l/wggKKkaV0pAVGRBZhy7snLTkGC2i92YH3gc1Yk0g/uzycVGIvdr9uUlZTfxct2fnNvJ0= Received: by 10.36.101.3 with SMTP id y3mr4818948nzb; Mon, 16 Jan 2006 04:23:26 -0800 (PST) Received: by 10.36.49.4 with HTTP; Mon, 16 Jan 2006 04:23:26 -0800 (PST) Message-ID: Date: Mon, 16 Jan 2006 17:53:26 +0530 From: Kishore K To: linux-mips@linux-mips.org Subject: gcc -3.4.4 and linux-2.4.32 MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_Part_5435_18690732.1137414206474" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9886 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hellokishore@gmail.com Precedence: bulk X-list: linux-mips Content-Length: 5019 Lines: 113 ------=_Part_5435_18690732.1137414206474 Content-Type: multipart/alternative; boundary="----=_Part_5436_32105947.1137414206474" ------=_Part_5436_32105947.1137414206474 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Content-Disposition: inline hi When 2.4.32 kernel (from linux-mips) is compiled with the tool chain based on gcc 3.4.4 and binutils 2.16.1, the kernel crashes on malta board. The crash file is enclosed along with the mail. If the same kernel is compiled with the tool chain based on gcc 3.3.6, no problem is observed. May I know, whether it is because of the changes in ABI in gcc 3.4. If so, has any one got the patch to make 2.4.x kernels work with gcc 3.4 compilers= ? From the changelog, I can infer that, some changes have been done in 2.4.28kernel to work with gcc 3.4 for i386. If so, has the same thing been done for MIPS as well. TIA, --kishore ------=_Part_5436_32105947.1137414206474 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Content-Disposition: inline hi
When 2.4.32 kernel (from linux-mips) is compiled with the tool chain based on gcc 3.4.4 and binutils 2.16.1, the kernel crashes on malta board. The crash file is enclosed along with the mail. If the same kernel is compiled with the tool chain based on gcc 3.3.6, no problem is observed.

May I know, whether it is because of the changes in ABI in gcc 3.4. If so, has any one got the patch to make 2.4.x kernels work with gcc 3.4 compilers? From the changelog, I can infer that, some changes have been done in 2.4.28 kernel to work with gcc 3.4 for i386. If so, has the same thing been done for MIPS as well.

TIA,
--kishore

------=_Part_5436_32105947.1137414206474-- ------=_Part_5435_18690732.1137414206474 Content-Type: application/octet-stream; name=crash Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="crash" Start = 0x802c2040, range = (0x80100000,0x802fafff), format = SREC LINUX started... CPU revision is: 00018005 Primary instruction cache 16kB, physically tagged, 4-way, linesize 16 bytes. Primary data cache 16kB, 4-way, linesize 16 bytes. Linux version 2.4.32 (inca@localhost.localdomain) (gcc version 3.4.4) #2 Mon Jan 16 17:24:34 IST 2006 Determined physical RAM map: memory: 00001000 @ 00000000 (reserved) memory: 000ef000 @ 00001000 (ROM data) memory: 00010000 @ 000f0000 (reserved) memory: 0022a000 @ 00100000 (reserved) memory: 03cd6000 @ 0032a000 (usable) On node 0 totalpages: 16384 zone(0): 16384 pages. zone(1): 0 pages. zone(2): 0 pages. Kernel command line: ip=10.1.1.100:10.1.1.99:10.1.1.99:255.0.0.0:malta:eth0:off root=/dev/nfs nfsroot=/root/kishore/r1-alpha0calculating r4koff... 0009899a(625050) CPU frequency 125.01 MHz Using 62.505 MHz high precision timer. Calibrating delay loop... 124.51 BogoMIPS Memory: 61584k/62296k available (1787k kernel code, 712k reserved, 112k data, 108k init, 0k highmem) Dentry cache hash table entries: 8192 (order: 4, 65536 bytes) Inode cache hash table entries: 4096 (order: 3, 32768 bytes) Mount cache hash table entries: 512 (order: 0, 4096 bytes) Buffer cache hash table entries: 4096 (order: 2, 16384 bytes) Page-cache hash table entries: 16384 (order: 4, 65536 bytes) Checking for 'wait' instruction... available. POSIX conformance testing by UNIFIX Unable to handle kernel paging request at virtual address 00000014, epc == 8014579c, ra == 801457a4 Oops in fault.c::do_page_fault, line 206: $0 : 00000000 1000fc00 00000000 810fb0a0 802ec184 810fb120 00000000 810fb000 $8 : 00000030 80285240 00000000 000010fb 802ebb80 00000000 1000fc01 80300000 $16: 80100784 810fb0a0 00010f00 810fb120 ffffffe9 00000001 80300000 00000000 $24: 0000002c ba2e8ba3 802c0000 802c1e30 802dc300 801457a4 Hi : 00000000 Lo : 00000080 epc : 8014579c Not tainted Status: 1000fc03 Cause : 90800008 PrId : 00018005 Process swapper (pid: 0, stackpage=802c0000) Stack: 80300000 0000059c 80300000 80300000 80300000 80300000 000f41ff 80317248 802feb7c 80310000 0000059c 802ea920 802ff10c 00000060 00000000 ba2e8ba3 80100784 00000000 00010f00 00000000 802dc300 00000001 80290000 00000000 802dc300 8010726c 802c1ea8 801ac834 00000000 8032b428 000001f0 8032b420 80107d00 00000001 00010f00 00000000 802c1f68 ffffffff 000001f0 00000578 ... Call Trace: [<80100784>] [<80290000>] [<8010726c>] [<801ac834>] [<80107d00>] [<8015fb60>] [<80160118>] [<80100784>] [<80290000>] [<8018c998>] [<80111348>] [<801601e0>] [<80102780>] [<80111348>] Code: 00409821 3c168030 8ec26320 <0c055173> 8c440014 104000b0 00408021 0c0515a0 00402021 Kernel panic: Attempted to kill the idle task! In idle task - not syncing ------=_Part_5435_18690732.1137414206474-- From kevink@mips.com Mon Jan 16 12:21:38 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 12:21:58 +0000 (GMT) Received: from 209-232-97-206.ded.pacbell.net ([209.232.97.206]:60811 "EHLO dns0.mips.com") by ftp.linux-mips.org with ESMTP id S8133495AbWAPMVi (ORCPT ); Mon, 16 Jan 2006 12:21:38 +0000 Received: from mercury.mips.com (sbcns-dmz [209.232.97.193]) by dns0.mips.com (8.12.11/8.12.11) with ESMTP id k0GCOw53018813; Mon, 16 Jan 2006 04:24:58 -0800 (PST) Received: from [192.168.236.16] (grendel [192.168.236.16]) by mercury.mips.com (8.12.9/8.12.11) with ESMTP id k0GCOtYr014855; Mon, 16 Jan 2006 04:24:55 -0800 (PST) Message-ID: <43CB9110.7040003@mips.com> Date: Mon, 16 Jan 2006 13:26:56 +0100 From: "Kevin D. Kissell" User-Agent: Thunderbird 1.5 (X11/20051025) MIME-Version: 1.0 To: zhuzhenhua CC: Florian DELIZY , linux-mips Subject: Re: =?ISO-8859-1?Q?R=E9f=2E_=3A_does_the_linux_kernel_?= =?ISO-8859-1?Q?use_k0=2C_k1_regs=3F?= References: <50c9a2250601160401ifa8337cs2f8638f0077f37ed@mail.gmail.com> In-Reply-To: <50c9a2250601160401ifa8337cs2f8638f0077f37ed@mail.gmail.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.39 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9887 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kevink@mips.com Precedence: bulk X-list: linux-mips Content-Length: 335 Lines: 13 zhuzhenhua wrote: > thanks for all > now in my NMI interrupt, i first move k0 value to Desave, then use k0 to > handle, and then eret. > it can work. It can work as long as you understand that you can't use EJTAG breakpoints or (more difficult to avoid) handle DINT events that happen during your NMI handler. Regards, Kevin K. From marck@ivivity.com Mon Jan 16 14:45:27 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 14:45:44 +0000 (GMT) Received: from mail.ivivity.com ([64.238.111.98]:3913 "EHLO thoth.ivivity.com") by ftp.linux-mips.org with ESMTP id S8126497AbWAPOp0 convert rfc822-to-8bit (ORCPT ); Mon, 16 Jan 2006 14:45:26 +0000 X-MimeOLE: Produced By Microsoft Exchange V6.5.7226.0 Content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 8BIT Subject: RE: how to emdedded ramdisk.gz in vmlinux for linux-2.6.14? Date: Mon, 16 Jan 2006 09:48:52 -0500 Message-ID: <0F31272A2BCBBE4FA01344C6E69DBF501EAB1B@thoth.ivivity.com> X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: how to emdedded ramdisk.gz in vmlinux for linux-2.6.14? Thread-Index: AcYaBp5cvCKPBJABTCiDdTHIotWWwgApSvdA From: "Marc Karasek" To: "zhuzhenhua" , "linux-mips" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9888 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: marck@ivivity.com Precedence: bulk X-list: linux-mips Content-Length: 1013 Lines: 33 Look under arch/mips/ramdisk (I think). This is where you should put the ramdisk.gz image and the compiler will pick it up and put it into the vmlinux image for you. Any content within this email is provided "AS IS" for informational purposes only. No contract will be formed between the parties by virtue of this email. <**************************> Marc Karasek System Lead Technical Engineer iVivity Inc. PH: 678-990-1550 x238 Fax: 678-990-1551 <**************************> -----Original Message----- From: linux-mips-bounce@linux-mips.org [mailto:linux-mips-bounce@linux-mips.org]On Behalf Of zhuzhenhua Sent: Saturday, January 14, 2006 11:22 PM To: linux-mips Subject: how to emdedded ramdisk.gz in vmlinux for linux-2.6.14? I download the kernel from linux-mips, and select to embedded ramdisk.gz into vmlinux. but i can't find where to place the ramdisk.gz. I try to put ramdisk.gz under top dir, or arch/mips/boot/, but it does not work. can someone give any hints? Best regards zhuzhenhua From fxzhang@ict.ac.cn Mon Jan 16 15:15:45 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 15:16:11 +0000 (GMT) Received: from webmail.ict.ac.cn ([159.226.39.7]:53419 "HELO ict.ac.cn") by ftp.linux-mips.org with SMTP id S8133474AbWAPPPp (ORCPT ); Mon, 16 Jan 2006 15:15:45 +0000 Received: (qmail 10330 invoked by uid 507); 16 Jan 2006 14:48:21 -0000 Received: from unknown (HELO ?192.168.2.202?) (fxzhang@222.92.8.142) by ict.ac.cn with SMTP; 16 Jan 2006 14:48:21 -0000 Message-ID: <43CBB943.7080807@ict.ac.cn> Date: Mon, 16 Jan 2006 23:18:27 +0800 From: Fuxin Zhang User-Agent: Thunderbird 1.5 (Windows/20051201) MIME-Version: 1.0 To: colin CC: linux-mips@linux-mips.org Subject: Re: Can I use this kind of performance counters to implement oProfile? References: <005101c61a75$43edc6b0$106215ac@realtek.com.tw> In-Reply-To: <005101c61a75$43edc6b0$106215ac@realtek.com.tw> X-Enigmail-Version: 0.93.0.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9889 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: fxzhang@ict.ac.cn Precedence: bulk X-list: linux-mips Content-Length: 836 Lines: 30 You should be able to accumulate counters during process switching or a timer routine, I managed to implement perfctr(another profiling software) for godson-2 cpu, for both cases with/without interrupt support. You can look at generic perfctr code. colin 写道: > Hi all, > Our SOC has performance counters, and we would like to use oProfile on it. > After surveying the oProfile doc, I found that the model of our performance > counters donot seem to fit oProfile. > This is because oProfile uses the interrupts caused by overflow of, say, > cache miss count to estimate the probability of this event in every portion. > Our SOC doesn't emit interrupt when event count overflow. Therefore, > oProfile cannot be used to estimate cache miss event on our chip. Is that > right? > > Regards, > Colin > > > > > > > > > > > > From sbharathi@MidasComm.Com Mon Jan 16 15:28:10 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 15:28:28 +0000 (GMT) Received: from midas-91-171-chn.midascomm.com ([203.196.171.91]:3296 "EHLO info.midascomm.com") by ftp.linux-mips.org with ESMTP id S8133443AbWAPP2J (ORCPT ); Mon, 16 Jan 2006 15:28:09 +0000 Received: from bharathi.midascomm.com ([192.168.13.175]) by info.midascomm.com (8.12.10/8.12.10) with ESMTP id k0GFVZkP000416 for ; Mon, 16 Jan 2006 21:01:35 +0530 Date: Mon, 16 Jan 2006 21:06:22 +0530 (IST) From: Bharathi Subramanian To: Linux MIPS Subject: Timer Interrupt Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-midascomm.com-MailScanner-Information: Please contact the ISP for more information X-midascomm.com-MailScanner: Found to be clean X-midascomm.com-MailScanner-From: sbharathi@midascomm.com Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9890 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sbharathi@MidasComm.Com Precedence: bulk X-list: linux-mips Content-Length: 432 Lines: 16 Hi all, We are trying to implement the CPU Clock down feature for saving the power. In this process, Whenever the CPU is put in 1/2 Clock then the Timer interrupt is also getting delayed. Later I found that CPU Counter is used to generate the timer intr. How to make the Timer interrupt to happen at every 10ms, even if the CPU is in 1/2, 1/4 or 1/8 of the original clock?? Processor: MIPS 4Kc 32B Thanks :) -- Bharathi S From tbm@cyrius.com Mon Jan 16 15:42:24 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 15:42:44 +0000 (GMT) Received: from sorrow.cyrius.com ([65.19.161.204]:40209 "EHLO sorrow.cyrius.com") by ftp.linux-mips.org with ESMTP id S8133474AbWAPPmY (ORCPT ); Mon, 16 Jan 2006 15:42:24 +0000 Received: by sorrow.cyrius.com (Postfix, from userid 10) id 1D3C964D54; Mon, 16 Jan 2006 15:45:53 +0000 (UTC) Received: by deprecation.cyrius.com (Postfix, from userid 1000) id 7E4838517; Mon, 16 Jan 2006 15:45:43 +0000 (GMT) Date: Mon, 16 Jan 2006 15:45:43 +0000 From: Martin Michlmayr To: Peter Horton Cc: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH Cobalt 1/1] 64-bit fix Message-ID: <20060116154543.GA26771@deprecation.cyrius.com> References: <20050414185949.GA5578@skeleton-jack> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20050414185949.GA5578@skeleton-jack> User-Agent: Mutt/1.5.11 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9891 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tbm@cyrius.com Precedence: bulk X-list: linux-mips Content-Length: 3230 Lines: 105 * Peter Horton [2005-04-14 19:59]: > This patch adds detection of broken 64-bit mode LL/SC on Cobalt units. > With this patch my Qube2700 boots a 64-bit build fine. The later units > have some problems with the Tulip driver. Ralf, is this patch appropriate? Can you please apply it or provide some feedback. > P. > > -- > > Index: linux/arch/mips/kernel/cpu-probe.c > =================================================================== > --- linux.orig/arch/mips/kernel/cpu-probe.c 2005-04-11 23:19:17.000000000 +0100 > +++ linux/arch/mips/kernel/cpu-probe.c 2005-04-11 23:35:06.000000000 +0100 > @@ -131,6 +131,58 @@ > check_wait(); > } > > +#ifdef CONFIG_MIPS64 > + > +/* > + * On RM5230/5231 all accesses to XKPHYS by LL(D) are forced > + * to be uncached, bits 61-59 of the address are ignored. > + * > + * Apparently fixed on RM5230A/5231A. > + */ > +static inline int check_lld(void) > +{ > + unsigned long flags, value, match, phys, *addr; > + > + printk("Checking for lld bug... "); > + > + /* hope the stack is in the low 512MB */ > + phys = CPHYSADDR((unsigned long) &value); > + > + /* write value to memory */ > + value = 0xfedcba9876543210; > + addr = (unsigned long *) PHYS_TO_XKPHYS(K_CALG_UNCACHED, phys); > + *addr = value; > + > + /* stop spurious flushes */ > + local_irq_save(flags); > + > + /* flip cached value */ > + value = ~value; > + > + /* read value, supposedly from cache */ > + addr = (unsigned long *) PHYS_TO_XKPHYS(K_CALG_NONCOHERENT, phys); > + asm volatile("lld %0, %1" : "=r" (match) : "m" (*addr)); > + > + local_irq_restore(flags); > + > + match ^= value; > + > + switch ((long) match) { > + case 0: > + printk("no.\n"); > + break; > + case -1: > + printk("yes.\n"); > + break; > + default: > + printk("yikes yes! (%lx/%lx@%p)\nPlease report to .", value, match, &value); > + } > + > + return !match; > +} > + > +#endif > + > /* > * Probe whether cpu has config register by trying to play with > * alternate cache bit and see whether it matters. > @@ -347,7 +399,11 @@ > c->cputype = CPU_NEVADA; > c->isa_level = MIPS_CPU_ISA_IV; > c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | > - MIPS_CPU_DIVEC | MIPS_CPU_LLSC; > + MIPS_CPU_DIVEC; > +#ifdef CONFIG_MIPS64 > + if (check_lld()) > +#endif > + c->options |= MIPS_CPU_LLSC; > c->tlbsize = 48; > break; > case PRID_IMP_R6000: > Index: linux/include/asm-mips/addrspace.h > =================================================================== > --- linux.orig/include/asm-mips/addrspace.h 2005-04-11 23:19:17.000000000 +0100 > +++ linux/include/asm-mips/addrspace.h 2005-04-11 23:19:20.000000000 +0100 > @@ -120,7 +120,7 @@ > #define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED,(p)) > #define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE,(p)) > #define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK) > -#define PHYS_TO_XKPHYS(cm,a) (0x8000000000000000 | ((cm)<<59) | (a)) > +#define PHYS_TO_XKPHYS(cm,a) (0x8000000000000000 | ((unsigned long)(cm)<<59) | (a)) > > #if defined (CONFIG_CPU_R4300) \ > || defined (CONFIG_CPU_R4X00) \ -- Martin Michlmayr http://www.cyrius.com/ From tbm@cyrius.com Mon Jan 16 15:45:38 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 15:45:56 +0000 (GMT) Received: from sorrow.cyrius.com ([65.19.161.204]:42513 "EHLO sorrow.cyrius.com") by ftp.linux-mips.org with ESMTP id S8133474AbWAPPpi (ORCPT ); Mon, 16 Jan 2006 15:45:38 +0000 Received: by sorrow.cyrius.com (Postfix, from userid 10) id 9867F64D54; Mon, 16 Jan 2006 15:49:08 +0000 (UTC) Received: by deprecation.cyrius.com (Postfix, from userid 1000) id 306E48517; Mon, 16 Jan 2006 15:48:57 +0000 (GMT) Date: Mon, 16 Jan 2006 15:48:57 +0000 From: Martin Michlmayr To: Andrew Isaacson Cc: linux-mips@linux-mips.org Subject: Re: [patch 1/5] SiByte fixes for 2.6.12 Message-ID: <20060116154856.GB26771@deprecation.cyrius.com> References: <20051001092807.GD14463@linux-mips.org> <20051003131551.GA19075@nevyn.them.org> <20050622230042.GA17919@broadcom.com> <20051001092807.GD14463@linux-mips.org> <20051003131551.GA19075@nevyn.them.org> <20050622230003.GA17725@broadcom.com> <20050622230042.GA17919@broadcom.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20051003131551.GA19075@nevyn.them.org> <20050622230042.GA17919@broadcom.com> User-Agent: Mutt/1.5.11 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9892 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tbm@cyrius.com Precedence: bulk X-list: linux-mips Content-Length: 2017 Lines: 42 * Andrew Isaacson [2005-06-22 16:00]: > SB1 does not use the R4K TLB code. > > c->cputype = CPU_SB1; > + c->options &= ~MIPS_CPU_4KTLB; > + c->options |= MIPS_CPU_TLB; > #ifdef CONFIG_SB1_PASS_1_WORKAROUNDS * Daniel Jacobowitz [2005-10-03 09:15]: > > > Well, the flag is not really to specify whether the common code is to be > > > used or not. It's about whether the TLB is like that of the R4k. > > > Actually it's always been a mystery for me why the common code cannot be > > > used for the SB1, but perhaps there is something specific that I could > > > only discover in that "SB-1 Core User Manual" that I yet have to see, > > > sigh... > > > Of course if your TLB is indeed different from that of the R4k, then you > > > shouldn't be setting cp0.config.mt to 1 in the first place... > > The reason was primarily the tiny bit of extra performance because the > > SB1 doesn't need the hazard handling overhead. Also tlb-sb1 has a few > > changes that are needed to initialize a TLB in undefined state after > > powerup. That was needed to run Linux on firmware-less SB1 cores. > FYI, all I have is a piece of hard evidence: this patch was the > difference between not booting and booting for a Sentosa with CFE. > Which isn't firmwareless and isn't a tiny bit of extra performance > issue. > > I'll try to give CVS HEAD a shot this week sometime. * Maciej W. Rozycki [2005-10-03 14:35]: > > FYI, all I have is a piece of hard evidence: this patch was the > > difference between not booting and booting for a Sentosa with CFE. > > Which isn't firmwareless and isn't a tiny bit of extra performance > > issue. > Actually workarounds have been floating around for some time. ;-) But > I'm glad this has now been fixed properly. There was some discussion regarding this patch but no real conclusion. Is it working without this patch now, or should it be applied (or modified? - how?). -- Martin Michlmayr http://www.cyrius.com/ From tbm@cyrius.com Mon Jan 16 15:47:54 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 15:48:12 +0000 (GMT) Received: from sorrow.cyrius.com ([65.19.161.204]:44305 "EHLO sorrow.cyrius.com") by ftp.linux-mips.org with ESMTP id S8133495AbWAPPry (ORCPT ); Mon, 16 Jan 2006 15:47:54 +0000 Received: by sorrow.cyrius.com (Postfix, from userid 10) id 8232A64D54; Mon, 16 Jan 2006 15:51:23 +0000 (UTC) Received: by deprecation.cyrius.com (Postfix, from userid 1000) id D70938517; Mon, 16 Jan 2006 15:51:10 +0000 (GMT) Date: Mon, 16 Jan 2006 15:51:10 +0000 From: Martin Michlmayr To: Kaj-Michael Lang Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] Fix serial console detection Message-ID: <20060116155110.GC26771@deprecation.cyrius.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.11 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9893 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tbm@cyrius.com Precedence: bulk X-list: linux-mips Content-Length: 2021 Lines: 57 * Kaj-Michael Lang [2005-02-14 16:08]: > In ip22-setup.c the checks for serial/graphics console logic does > not check if ARCS console=g but the machine is using serial console, as > it does if no keyboard is attached. > > This patch adds a check if ConsoleOut is serial. There might also be > support for other graphics than Newport soon... Ralf, are there any objections to this patch or did you simply forget to apply it? > Index: arch/mips/sgi-ip22/ip22-setup.c > =================================================================== > RCS file: /home/cvs/linux/arch/mips/sgi-ip22/ip22-setup.c,v > retrieving revision 1.44 > diff -u -r1.44 ip22-setup.c > --- arch/mips/sgi-ip22/ip22-setup.c 10 Dec 2004 13:31:42 -0000 1.44 > +++ arch/mips/sgi-ip22/ip22-setup.c 14 Feb 2005 13:57:33 -0000 > @@ -56,6 +56,7 @@ > static int __init ip22_setup(void) > { > char *ctype; > + char *cserial; > > board_be_init = ip22_be_init; > ip22_time_init(); > @@ -81,9 +82,14 @@ > /* ARCS console environment variable is set to "g?" for > * graphics console, it is set to "d" for the first serial > * line and "d2" for the second serial line. > + * > + * Need to check if the case is 'g' but no keyboard: > + * (ConsoleIn/Out = serial ) > */ > ctype = ArcGetEnvironmentVariable("console"); > - if (ctype && *ctype == 'd') { > + cserial = ArcGetEnvironmentVariable("ConsoleOut"); > + > + if ( (ctype && *ctype == 'd') || (cserial && *cserial == 's')) { > static char options[8]; > char *baud = ArcGetEnvironmentVariable("dbaud"); > if (baud) > @@ -91,7 +97,7 @@ > add_preferred_console("ttyS", *(ctype + 1) == '2' ? 1 : 0, > baud ? options : NULL); > } else if (!ctype || *ctype != 'g') { > - /* Use ARC if we don't want serial ('d') or Newport ('g'). */ > + /* Use ARC if we don't want serial ('d') or Graphics ('g'). > */ > prom_flags |= PROM_FLAG_USE_AS_CONSOLE; > add_preferred_console("arc", 0, NULL); > } > -- Martin Michlmayr http://www.cyrius.com/ From tbm@cyrius.com Mon Jan 16 15:48:46 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 15:49:09 +0000 (GMT) Received: from sorrow.cyrius.com ([65.19.161.204]:45073 "EHLO sorrow.cyrius.com") by ftp.linux-mips.org with ESMTP id S8133495AbWAPPsq (ORCPT ); Mon, 16 Jan 2006 15:48:46 +0000 Received: by sorrow.cyrius.com (Postfix, from userid 10) id C49D264D55; Mon, 16 Jan 2006 15:52:17 +0000 (UTC) Received: by deprecation.cyrius.com (Postfix, from userid 1000) id 2CD958517; Mon, 16 Jan 2006 15:52:08 +0000 (GMT) Date: Mon, 16 Jan 2006 15:52:08 +0000 From: Martin Michlmayr To: linux-mips@linux-mips.org Subject: Re: make meth eht0 on IP32 Message-ID: <20060116155208.GD26771@deprecation.cyrius.com> References: <41E582A0.1050407@total-knowledge.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <41E582A0.1050407@total-knowledge.com> User-Agent: Mutt/1.5.11 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9894 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tbm@cyrius.com Precedence: bulk X-list: linux-mips Content-Length: 1182 Lines: 37 * Ilya A. Volynets-Evenbakh [2005-01-12 12:03]: > meth is built-in ethernet card on O2, and it would make sense for it to be > eth0, even if there is also another network card in PCI slot. This sounds like a good idea to me. Can this patch be applied? > Ilya. > > Index: drivers/net/Makefile > =================================================================== > RCS file: /home/cvs/linux/drivers/net/Makefile,v > retrieving revision 1.107 > diff -u -r1.107 Makefile > --- drivers/net/Makefile 15 Nov 2004 11:49:28 -0000 1.107 > +++ drivers/net/Makefile 12 Jan 2005 19:58:47 -0000 > @@ -28,6 +28,8 @@ > obj-$(CONFIG_MYRI_SBUS) += myri_sbus.o > obj-$(CONFIG_SUNGEM) += sungem.o sungem_phy.o > > +obj-$(CONFIG_SGI_O2MACE_ETH) += meth.o > + > obj-$(CONFIG_MACE) += mace.o > obj-$(CONFIG_BMAC) += bmac.o > > @@ -125,7 +127,6 @@ > obj-$(CONFIG_SUN3LANCE) += sun3lance.o > obj-$(CONFIG_DEFXX) += defxx.o > obj-$(CONFIG_SGISEEQ) += sgiseeq.o > -obj-$(CONFIG_SGI_O2MACE_ETH) += meth.o > obj-$(CONFIG_AT1700) += at1700.o > obj-$(CONFIG_FMV18X) += fmv18x.o > obj-$(CONFIG_EL1) += 3c501.o > -- Martin Michlmayr http://www.cyrius.com/ From tbm@cyrius.com Mon Jan 16 15:50:24 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 15:50:43 +0000 (GMT) Received: from sorrow.cyrius.com ([65.19.161.204]:50193 "EHLO sorrow.cyrius.com") by ftp.linux-mips.org with ESMTP id S8133495AbWAPPuY (ORCPT ); Mon, 16 Jan 2006 15:50:24 +0000 Received: by sorrow.cyrius.com (Postfix, from userid 10) id 7366564D54; Mon, 16 Jan 2006 15:53:54 +0000 (UTC) Received: by deprecation.cyrius.com (Postfix, from userid 1000) id DFF1A8517; Mon, 16 Jan 2006 15:53:43 +0000 (GMT) Date: Mon, 16 Jan 2006 15:53:43 +0000 From: Martin Michlmayr To: Daniel Jacobowitz Cc: ralf@linux-mips.org, linux-mips@linux-mips.org Subject: Re: Support /proc/kcore for MIPS Message-ID: <20060116155343.GE26771@deprecation.cyrius.com> References: <20050121005954.GA10260@nevyn.them.org> <20050214020209.GA25335@nevyn.them.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20050214020209.GA25335@nevyn.them.org> User-Agent: Mutt/1.5.11 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9895 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tbm@cyrius.com Precedence: bulk X-list: linux-mips Content-Length: 2312 Lines: 59 * Daniel Jacobowitz [2005-02-13 21:02]: > Ping. I've now tested this patch in both 32-bit and 64-bit kernels. Ralf, can this be applied or are there objections? > On Thu, Jan 20, 2005 at 07:59:54PM -0500, Daniel Jacobowitz wrote: > > I wanted to do live debugging on an ornery task_struct this morning, so I > > hooked up /proc/kcore for MIPS. I'm pretty sure that the CKSEG0 bits are > > wrong, but I did need to cover that region - because the SB-1 kernel links > > at 0xffffffff80100000 or so, disassembly and printing static variables don't > > work unless the debugger can read that region. > > > > Signed-off-by: Daniel Jacobowitz > > > > Index: linux/arch/mips/mm/init.c > > =================================================================== > > --- linux.orig/arch/mips/mm/init.c 2005-01-20 16:26:58.791321462 -0500 > > +++ linux/arch/mips/mm/init.c 2005-01-20 16:34:27.231213174 -0500 > > @@ -24,6 +24,7 @@ > > #include > > #include > > #include > > +#include > > > > #include > > #include > > @@ -197,6 +198,11 @@ > > return 0; > > } > > > > +static struct kcore_list kcore_mem, kcore_vmalloc; > > +#ifdef CONFIG_MIPS64 > > +static struct kcore_list kcore_kseg0; > > +#endif > > + > > void __init mem_init(void) > > { > > unsigned long codesize, reservedpages, datasize, initsize; > > @@ -247,6 +253,16 @@ > > datasize = (unsigned long) &_edata - (unsigned long) &_etext; > > initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin; > > > > +#ifdef CONFIG_MIPS64 > > + if ((unsigned long) &_text > (unsigned long) CKSEG0) > > + /* The -4 is a hack so that user tools don't have to handle > > + the overflow. */ > > + kclist_add(&kcore_kseg0, (void *) CKSEG0, 0x80000000 - 4); > > +#endif > > + kclist_add(&kcore_mem, __va(0), max_low_pfn << PAGE_SHIFT); > > + kclist_add(&kcore_vmalloc, (void *)VMALLOC_START, > > + VMALLOC_END-VMALLOC_START); > > + > > printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, " > > "%ldk reserved, %ldk data, %ldk init, %ldk highmem)\n", > > (unsigned long) nr_free_pages() << (PAGE_SHIFT-10), -- Martin Michlmayr http://www.cyrius.com/ From tbm@cyrius.com Mon Jan 16 15:56:09 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 15:56:26 +0000 (GMT) Received: from sorrow.cyrius.com ([65.19.161.204]:60689 "EHLO sorrow.cyrius.com") by ftp.linux-mips.org with ESMTP id S8133495AbWAPP4I (ORCPT ); Mon, 16 Jan 2006 15:56:08 +0000 Received: by sorrow.cyrius.com (Postfix, from userid 10) id 4D6EA64D54; Mon, 16 Jan 2006 15:59:40 +0000 (UTC) Received: by deprecation.cyrius.com (Postfix, from userid 1000) id A0AA98517; Mon, 16 Jan 2006 15:59:31 +0000 (GMT) Date: Mon, 16 Jan 2006 15:59:31 +0000 From: Martin Michlmayr To: Ed Martini Cc: linux-mips@linux-mips.org, macro@linux-mips.org Subject: Re: inconsistent asm macro Message-ID: <20060116155931.GF26771@deprecation.cyrius.com> References: <424A04A9.9060703@c2micro.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <424A04A9.9060703@c2micro.com> User-Agent: Mutt/1.5.11 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9896 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tbm@cyrius.com Precedence: bulk X-list: linux-mips Content-Length: 1491 Lines: 45 * Ed Martini [2005-03-29 17:45]: > In include/asm-mips/interrupt.h, the definition for local_irq_restore is > inconsistent in its use of .reorder/.noreorder assembler directives. > Other asm macros in interrupt.h are wrapped with '.set push' and '.set pop'. > > It doesn't seem to be a problem with the 2.96 mipsel-linux- assembler, > but it caused me a problem with my 4.0-based toolchain. (As it was the > local_irq_restore left the assembler in 'reorder' mode and a stack > pointer post-inc was reordered out of the return delay slot where it > belonged.) Luckily we have a sharp compiler guy who figured it out. > Thanks. > > As usual, there may be a reason for this, but it took me a whole day to > find it, and I thought I'd point it out. Maciej, since you use gcc 4, can you please review this patch? > Ed Martini > > $ diff -uN interrupt.h interrupt-new.h > --- interrupt.h 2005-03-29 17:35:02.922362384 -0800 > +++ interrupt-new.h 2005-03-29 17:33:26.350770293 -0800 > @@ -100,6 +100,7 @@ > > __asm__ ( > ".macro\tlocal_irq_restore flags\n\t" > + ".set\tpush\n\t" > ".set\tnoreorder\n\t" > ".set\tnoat\n\t" > "mfc0\t$1, $12\n\t" > @@ -109,8 +110,7 @@ > "or\t\\flags, $1\n\t" > "mtc0\t\\flags, $12\n\t" > "irq_disable_hazard\n\t" > - ".set\tat\n\t" > - ".set\treorder\n\t" > + ".set\tpop\n\t" > ".endm"); > > > -- Martin Michlmayr http://www.cyrius.com/ From tbm@cyrius.com Mon Jan 16 15:57:12 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 15:57:48 +0000 (GMT) Received: from sorrow.cyrius.com ([65.19.161.204]:61201 "EHLO sorrow.cyrius.com") by ftp.linux-mips.org with ESMTP id S8133495AbWAPP5M (ORCPT ); Mon, 16 Jan 2006 15:57:12 +0000 Received: by sorrow.cyrius.com (Postfix, from userid 10) id 3605464D54; Mon, 16 Jan 2006 16:00:41 +0000 (UTC) Received: by deprecation.cyrius.com (Postfix, from userid 1000) id DAF278517; Mon, 16 Jan 2006 16:00:31 +0000 (GMT) Date: Mon, 16 Jan 2006 16:00:31 +0000 From: Martin Michlmayr To: Dave Johnson Cc: linux-mips@linux-mips.org Subject: Re: [PATCH] gettimeofday jumps backwards then forwards Message-ID: <20060116160031.GA28383@deprecation.cyrius.com> References: <17118.25343.948383.547250@cortez.sw.starentnetworks.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <17118.25343.948383.547250@cortez.sw.starentnetworks.com> User-Agent: Mutt/1.5.11 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9897 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tbm@cyrius.com Precedence: bulk X-list: linux-mips Content-Length: 10934 Lines: 329 * Dave Johnson [2005-07-20 10:43]: > Below are 2 fixes I made to 2.6.12 to do with time jumping around > as reported by gettimeofday(). One is SB1250 specific and one appears > generic. > > The symptom is revealed by running multile copies (1 per cpu) of a > simple test program that calls gettimeofday() as fast as possible > looking for time to go backwards. > > When a jump is detected the program outputs a few samples before and > after each jump: Does anyone have comments regarding this patch? > value delta > 1121781527.912525: 1 > 1121781527.912525: 0 > 1121781527.912526: 1 > 1121781527.912526: 0 > 1121781527.912527: 1 > 1121781527.912527: 0 > 1121781527.912527: 0 > 1121781527.912527: 0 > 1121781527.911528: -999 > 1121781527.911529: 1 > 1121781527.911530: 1 > 1121781527.912532: 1002 > 1121781527.912533: 1 > 1121781527.912533: 0 > 1121781527.912534: 1 > 1121781527.912534: 0 > 1121781527.912535: 1 > 1121781527.912536: 1 > > value delta > 1121781545.635524: 1 > 1121781545.635524: 0 > 1121781545.635525: 1 > 1121781545.635525: 0 > 1121781545.635526: 1 > 1121781545.635526: 0 > 1121781545.635527: 1 > 1121781545.635527: 0 > 1121781545.634527: -1000 > 1121781545.635527: 1000 > 1121781545.635528: 1 > 1121781545.635529: 1 > 1121781545.635529: 0 > 1121781545.635530: 1 > 1121781545.635530: 0 > 1121781545.635531: 1 > 1121781545.635531: 0 > 1121781545.635532: 1 > 1121781545.635533: 1 > > Time jumps backwards 1msec then forwards 1msec a few usec > later. Usually lasts < 2us but I've seen it as long as 5us if the > system is under load. > > -- > > First problem I found is that sb1250_gettimeoffset() simply reads the > current cpu 0 timer remaining value, however once this counter reaches > 0 and the interrupt is raised, it immediately resets and begins to > count down again. > > If sb1250_gettimeoffset() is called on cpu 1 via do_gettimeofday() > after the timer has reset but prior to cpu 0 processing the interrupt > and taking write_seqlock() in timer_interrupt() it will return a > full value (or close to it) causing time to jump backwards 1ms. Once > cpu 0 handles the interrupt and timer_interrupt() gets far enough > along it will jump forward 1ms. > > To fix this problem I implemented mips_hpt_*() on sb1250 using a spare > timer unrelated to the existing periodic interrupt timers. It runs at > 1Mhz with a full 23bit counter. This eliminated the custom > do_gettimeoffset() for sb1250 and allowed use of the generic > fixed_rate_gettimeoffset() using mips_hpt_*() and timerhi/timerlo. > > -- > > The second problem is that more of timer_interrupt() needs to be > protected by xtime_lock: > > * do_timer() expects the arch-specific handler to take the lock as it > modifies jiffies[_64] and xtime. > * writing timerhi/lo in timer_interrupt() will mess up > fixed_rate_gettimeoffset() which reads timerhi/lo. > > -- > > With both changes do_gettimeofday() works correctly on both cpu 0 and > cpu 1. > > -- > > Other changes/cleanups: > > The existing sb1250 periodic timers were slow by 999ppm (given a > perfect 100mhz reference). The timers need to be loaded with 1 less > than the desired interval not the interval itself. > > M_SCD_TIMER_INIT and M_SCD_TIMER_CNT had the wrong field width (should > be 23 bits not 20 bits) > > -- > Dave Johnson > Starent Networks > > ============ > > diff -Nru a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c > --- a/arch/mips/kernel/time.c 2005-07-20 10:25:22 -04:00 > +++ b/arch/mips/kernel/time.c 2005-07-20 10:25:22 -04:00 > @@ -424,6 +424,8 @@ > unsigned long j; > unsigned int count; > > + write_seqlock(&xtime_lock); > + > count = mips_hpt_read(); > mips_timer_ack(); > > @@ -441,7 +443,6 @@ > * CMOS clock accordingly every ~11 minutes. rtc_set_time() has to be > * called as close as possible to 500 ms before the new second starts. > */ > - write_seqlock(&xtime_lock); > if ((time_status & STA_UNSYNC) == 0 && > xtime.tv_sec > last_rtc_update + 660 && > (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 && > @@ -453,7 +454,6 @@ > last_rtc_update = xtime.tv_sec - 600; > } > } > - write_sequnlock(&xtime_lock); > > /* > * If jiffies has overflown in this timer_interrupt, we must > @@ -495,6 +495,8 @@ > break; > } > } > + > + write_sequnlock(&xtime_lock); > > /* > * In UP mode, we call local_timer_interrupt() to do profiling > diff -Nru a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c > --- a/arch/mips/sibyte/sb1250/time.c 2005-07-20 10:25:22 -04:00 > +++ b/arch/mips/sibyte/sb1250/time.c 2005-07-20 10:25:22 -04:00 > @@ -47,23 +47,51 @@ > #define IMR_IP3_VAL K_INT_MAP_I1 > #define IMR_IP4_VAL K_INT_MAP_I2 > > +#define SB1250_HPT_NUM 3 > +#define SB1250_HPT_VALUE M_SCD_TIMER_CNT /* max value */ > +#define SB1250_HPT_SHIFT ((sizeof(unsigned int)*8)-V_SCD_TIMER_WIDTH) > + > + > extern int sb1250_steal_irq(int irq); > > +static unsigned int sb1250_hpt_read(void); > +static void sb1250_hpt_init(unsigned int); > + > +static unsigned int hpt_offset; > + > +void __init sb1250_hpt_setup(void) > +{ > + int cpu = smp_processor_id(); > + > + if (!cpu) { > + /* Setup hpt using timer #3 but do not enable irq for it */ > + __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CFG))); > + __raw_writeq(SB1250_HPT_VALUE, > + IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_INIT))); > + __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, > + IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CFG))); > + > + /* > + * we need to fill 32 bits, so just use the upper 23 bits and pretend > + * the timer is going 512Mhz instead of 1Mhz > + */ > + mips_hpt_frequency = V_SCD_TIMER_FREQ << SB1250_HPT_SHIFT; > + mips_hpt_init = sb1250_hpt_init; > + mips_hpt_read = sb1250_hpt_read; > + } > +} > + > + > void sb1250_time_init(void) > { > int cpu = smp_processor_id(); > int irq = K_INT_TIMER_0+cpu; > > - /* Only have 4 general purpose timers */ > - if (cpu > 3) { > + /* Only have 4 general purpose timers, and we use last one as hpt */ > + if (cpu > 2) { > BUG(); > } > > - if (!cpu) { > - /* Use our own gettimeoffset() routine */ > - do_gettimeoffset = sb1250_gettimeoffset; > - } > - > sb1250_mask_irq(cpu, irq); > > /* Map the timer interrupt to ip[4] of this cpu */ > @@ -75,10 +103,10 @@ > /* Disable the timer and set up the count */ > __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); > #ifdef CONFIG_SIMULATION > - __raw_writeq(50000 / HZ, > + __raw_writeq((50000 / HZ) - 1, > IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT))); > #else > - __raw_writeq(1000000 / HZ, > + __raw_writeq((V_SCD_TIMER_FREQ / HZ) - 1, > IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT))); > #endif > > @@ -104,7 +132,7 @@ > int cpu = smp_processor_id(); > int irq = K_INT_TIMER_0 + cpu; > > - /* Reset the timer */ > + /* ACK interrupt */ > ____raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, > IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); > > @@ -122,15 +150,26 @@ > } > > /* > - * We use our own do_gettimeoffset() instead of the generic one, > - * because the generic one does not work for SMP case. > - * In addition, since we use general timer 0 for system time, > - * we can get accurate intra-jiffy offset without calibration. > + * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over > + * again. There's no easy way to set to a specific value so store init value > + * in hpt_offset and subtract each time. > + * > + * Note: Timer isn't full 32bits so shift it into the upper part making > + * it appear to run at a higher frequency. > */ > -unsigned long sb1250_gettimeoffset(void) > +static unsigned int sb1250_hpt_read(void) > { > - unsigned long count = > - __raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT))); > + unsigned int count; > + > + count = G_SCD_TIMER_CNT(__raw_readq(IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CNT)))); > > - return 1000000/HZ - count; > - } > + count = (SB1250_HPT_VALUE - count) << SB1250_HPT_SHIFT; > + > + return count - hpt_offset; > +} > + > +static void sb1250_hpt_init(unsigned int count) > +{ > + hpt_offset = count; > + return; > +} > diff -Nru a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c > --- a/arch/mips/sibyte/swarm/setup.c 2005-07-20 10:25:22 -04:00 > +++ b/arch/mips/sibyte/swarm/setup.c 2005-07-20 10:25:22 -04:00 > @@ -64,6 +64,12 @@ > return "SiByte " SIBYTE_BOARD_NAME; > } > > +void __init swarm_time_init(void) > +{ > + /* Setup HPT */ > + sb1250_hpt_setup(); > +} > + > void __init swarm_timer_setup(struct irqaction *irq) > { > /* > @@ -96,6 +102,7 @@ > > panic_timeout = 5; /* For debug. */ > > + board_time_init = swarm_time_init; > board_timer_setup = swarm_timer_setup; > board_be_handler = swarm_be_handler; > > diff -Nru a/include/asm-mips/sibyte/sb1250.h b/include/asm-mips/sibyte/sb1250.h > --- a/include/asm-mips/sibyte/sb1250.h 2005-07-20 10:25:22 -04:00 > +++ b/include/asm-mips/sibyte/sb1250.h 2005-07-20 10:25:22 -04:00 > @@ -41,8 +41,8 @@ > extern unsigned int periph_rev; > extern unsigned int zbbus_mhz; > > +extern void sb1250_hpt_setup(void); > extern void sb1250_time_init(void); > -extern unsigned long sb1250_gettimeoffset(void); > extern void sb1250_mask_irq(int cpu, int irq); > extern void sb1250_unmask_irq(int cpu, int irq); > extern void sb1250_smp_finish(void); > diff -Nru a/include/asm-mips/sibyte/sb1250_scd.h b/include/asm-mips/sibyte/sb1250_scd.h > --- a/include/asm-mips/sibyte/sb1250_scd.h 2005-07-20 10:25:22 -04:00 > +++ b/include/asm-mips/sibyte/sb1250_scd.h 2005-07-20 10:25:22 -04:00 > @@ -307,14 +307,15 @@ > */ > > #define V_SCD_TIMER_FREQ 1000000 > +#define V_SCD_TIMER_WIDTH 23 > > #define S_SCD_TIMER_INIT 0 > -#define M_SCD_TIMER_INIT _SB_MAKEMASK(20,S_SCD_TIMER_INIT) > +#define M_SCD_TIMER_INIT _SB_MAKEMASK(V_SCD_TIMER_WIDTH,S_SCD_TIMER_INIT) > #define V_SCD_TIMER_INIT(x) _SB_MAKEVALUE(x,S_SCD_TIMER_INIT) > #define G_SCD_TIMER_INIT(x) _SB_GETVALUE(x,S_SCD_TIMER_INIT,M_SCD_TIMER_INIT) > > #define S_SCD_TIMER_CNT 0 > -#define M_SCD_TIMER_CNT _SB_MAKEMASK(20,S_SCD_TIMER_CNT) > +#define M_SCD_TIMER_CNT _SB_MAKEMASK(V_SCD_TIMER_WIDTH,S_SCD_TIMER_CNT) > #define V_SCD_TIMER_CNT(x) _SB_MAKEVALUE(x,S_SCD_TIMER_CNT) > #define G_SCD_TIMER_CNT(x) _SB_GETVALUE(x,S_SCD_TIMER_CNT,M_SCD_TIMER_CNT) -- Martin Michlmayr http://www.cyrius.com/ From tbm@cyrius.com Mon Jan 16 16:01:15 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 16:01:36 +0000 (GMT) Received: from sorrow.cyrius.com ([65.19.161.204]:65297 "EHLO sorrow.cyrius.com") by ftp.linux-mips.org with ESMTP id S8133495AbWAPQBP (ORCPT ); Mon, 16 Jan 2006 16:01:15 +0000 Received: by sorrow.cyrius.com (Postfix, from userid 10) id 3BFB164D54; Mon, 16 Jan 2006 16:04:43 +0000 (UTC) Received: by deprecation.cyrius.com (Postfix, from userid 1000) id 856D88517; Mon, 16 Jan 2006 16:03:55 +0000 (GMT) Date: Mon, 16 Jan 2006 16:03:55 +0000 From: Martin Michlmayr To: Jim Gifford , Linux MIPS List Subject: Re: Tulip RaQ2 64 Bit Fix Message-ID: <20060116160355.GB28383@deprecation.cyrius.com> References: <4393CD9F.3090305@jg555.com> <20051205114456.GA2728@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20051205114456.GA2728@linux-mips.org> User-Agent: Mutt/1.5.11 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9898 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tbm@cyrius.com Precedence: bulk X-list: linux-mips Content-Length: 521 Lines: 15 * Ralf Baechle [2005-12-05 11:44]: > > The attached patch allows the tulip driver to work with the RaQ2's > > network adapter. Without the patch under a 64 bit build, it will > > never negotiate and will drop packets. This driver is part of > > Linux Parisc, by Grant Grundler. It's currently in -mm, but Jeff > > Garzick will not apply it to the main tree. > > Why? Jim, I don't think you ever responded to this. Do you know the status of this patch? -- Martin Michlmayr http://www.cyrius.com/ From tbm@cyrius.com Mon Jan 16 16:02:56 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 16:03:16 +0000 (GMT) Received: from sorrow.cyrius.com ([65.19.161.204]:2578 "EHLO sorrow.cyrius.com") by ftp.linux-mips.org with ESMTP id S8133495AbWAPQCy (ORCPT ); Mon, 16 Jan 2006 16:02:54 +0000 Received: by sorrow.cyrius.com (Postfix, from userid 10) id 3D08B64D54; Mon, 16 Jan 2006 16:06:25 +0000 (UTC) Received: by deprecation.cyrius.com (Postfix, from userid 1000) id A3E8E8517; Mon, 16 Jan 2006 16:05:42 +0000 (GMT) Date: Mon, 16 Jan 2006 16:05:42 +0000 From: Martin Michlmayr To: Mark Mason Cc: linux-mips@linux-mips.org Subject: Re: Building the kernel for a Broadcom SB1 Message-ID: <20060116160542.GC28383@deprecation.cyrius.com> References: <20050915205904.16380.qmail@web31515.mail.mud.yahoo.com> <4329ED24.50506@broadcom.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4329ED24.50506@broadcom.com> User-Agent: Mutt/1.5.11 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9899 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tbm@cyrius.com Precedence: bulk X-list: linux-mips Content-Length: 1620 Lines: 40 * Mark Mason [2005-09-15 14:52]: > >I'm having a few issues building the current >2.6.14-rc1 for a > Broadcom SB1 MIPS64 processor. (No >huge surprise there, building > anything for that >processor is a pain.) > > > >Anyway, there are a few symbols undefined, which is >causing > problems. First off the bat is TO_PHYS_MASK. >There is no set of > definitions in >include/asm-mips/addrspace.h for the SB1 processor. > Here's the patch for that particular problem. There's also a few other > patches for the SB1 floating around (check the email archives), but > there appears to be a backlog with getting them committed to the CVS > repository. Can this patch be applied? > HTH, > Mark > > Index: include/asm-mips/addrspace.h > =================================================================== > RCS file: /home/cvs/linux/include/asm-mips/addrspace.h,v > retrieving revision 1.18 > diff -u -p -r1.18 addrspace.h > --- include/asm-mips/addrspace.h 14 Jul 2005 12:05:08 -0000 1.18 > +++ include/asm-mips/addrspace.h 15 Sep 2005 21:46:56 -0000 > @@ -131,6 +131,8 @@ > || defined (CONFIG_CPU_R5000) \ > || defined (CONFIG_CPU_NEVADA) \ > || defined (CONFIG_CPU_TX49XX) \ > + || defined (CONFIG_CPU_SB1) \ > + || defined (CONFIG_CPU_SB1A) \ > || defined (CONFIG_CPU_MIPS64_R1) > #define KUSIZE _LLCONST_(0x0000010000000000) /* 2^^40 */ > #define KUSIZE_64 _LLCONST_(0x0000010000000000) /* 2^^40 */ > . > -- Martin Michlmayr http://www.cyrius.com/ From tbm@cyrius.com Mon Jan 16 16:06:13 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 16:06:31 +0000 (GMT) Received: from sorrow.cyrius.com ([65.19.161.204]:6930 "EHLO sorrow.cyrius.com") by ftp.linux-mips.org with ESMTP id S8133509AbWAPQGN (ORCPT ); Mon, 16 Jan 2006 16:06:13 +0000 Received: by sorrow.cyrius.com (Postfix, from userid 10) id 2F61264D54; Mon, 16 Jan 2006 16:09:37 +0000 (UTC) Received: by deprecation.cyrius.com (Postfix, from userid 1000) id 108F88517; Mon, 16 Jan 2006 16:09:25 +0000 (GMT) Date: Mon, 16 Jan 2006 16:09:25 +0000 From: Martin Michlmayr To: Dave Johnson , Daniel Jacobowitz Cc: linux-mips@linux-mips.org Subject: Re: gdb gets confused with o32 core files, WANT_COMPAT_REG_H needed? Message-ID: <20060116160925.GE28383@deprecation.cyrius.com> References: <17162.16068.212165.340275@cortez.sw.starentnetworks.com> <20050828154530.GA26423@nevyn.them.org> <17162.16068.212165.340275@cortez.sw.starentnetworks.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20050828154530.GA26423@nevyn.them.org> <17162.16068.212165.340275@cortez.sw.starentnetworks.com> User-Agent: Mutt/1.5.11 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9900 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tbm@cyrius.com Precedence: bulk X-list: linux-mips Content-Length: 2192 Lines: 62 * Dave Johnson [2005-08-22 17:08]: > I've been trying to fix core file support for 64bit kernel with o32 > userspace (working against 2.6.12 cvs tag). > > After applying the patch posted on 13 Feb 2005 from Daniel Jacobowitz > to fix binfmt_elfo32.c (any reason this didn't make it into CVS?), > I still ran into trouble with gdb not understanding the NT_PRSTATUS > header in the core file. > > While Dan's fix makes the kernel use elf32 definitions, gdb was still > getting confused by pr_reg contained in the core file. > > Dan's definition of ELF_CORE_COPY_REGS in binfmt_elfo32.c is copying > the registers using EF_R0 as 0 not 6 producing results into offset 0 > through 37 not 6 through 43 as gdb expects for 32bit core files. > > Below patch (applied after Dan's patch) writes the registers at offset > 6 making gdb much happier. * Daniel Jacobowitz [2005-08-28 11:45]: > > Below patch (applied after Dan's patch) writes the registers at offset > > 6 making gdb much happier. > > FYI, this has all been rearranged since - it did this correctly at the > time. I don't know why the patch was dropped. Can this be applied? > Fix o32 core files under 64bit kernel to use correct register > offset in NT_PRSTATUS > > Signed-off-by: Dave Johnson > > ===== arch/mips/kernel/binfmt_elfo32.c 1.7 vs edited ===== > --- 1.7/arch/mips/kernel/binfmt_elfo32.c 2005-08-20 12:30:12 -04:00 > +++ edited/arch/mips/kernel/binfmt_elfo32.c 2005-08-22 16:09:59 -04:00 > @@ -51,6 +51,7 @@ > #define TASK32_SIZE 0x7fff8000UL > #undef ELF_ET_DYN_BASE > #define ELF_ET_DYN_BASE (TASK32_SIZE / 3 * 2) > +#define WANT_COMPAT_REG_H > > #include > #include > ===== include/asm-mips/reg.h 1.1 vs edited ===== > --- 1.1/include/asm-mips/reg.h 2005-02-02 11:39:14 -05:00 > +++ edited/include/asm-mips/reg.h 2005-08-22 15:55:04 -04:00 > @@ -70,7 +70,7 @@ > > #endif > > -#if CONFIG_MIPS64 > +#if defined(CONFIG_MIPS64) && !defined(WANT_COMPAT_REG_H) > > #define EF_R0 0 > #define EF_R1 1 > -- Martin Michlmayr http://www.cyrius.com/ From maillist@jg555.com Mon Jan 16 16:24:37 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 16:24:56 +0000 (GMT) Received: from Jg555.com ([64.30.195.78]:22183 "EHLO jg555.com") by ftp.linux-mips.org with ESMTP id S8133509AbWAPQYg (ORCPT ); Mon, 16 Jan 2006 16:24:36 +0000 Received: from [172.16.0.55] ([::ffff:172.16.0.55]) (AUTH: PLAIN root, TLS: TLSv1/SSLv3,256bits,AES256-SHA) by jg555.com with esmtp; Mon, 16 Jan 2006 08:28:08 -0800 id 001F0A6F.43CBC998.00007288 Message-ID: <43CBC97E.3090800@jg555.com> Date: Mon, 16 Jan 2006 08:27:42 -0800 From: Jim Gifford User-Agent: Thunderbird 1.5 (Windows/20051201) MIME-Version: 1.0 To: Martin Michlmayr CC: Linux MIPS List Subject: Re: Tulip RaQ2 64 Bit Fix References: <4393CD9F.3090305@jg555.com> <20051205114456.GA2728@linux-mips.org> <20060116160355.GB28383@deprecation.cyrius.com> In-Reply-To: <20060116160355.GB28383@deprecation.cyrius.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9901 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: maillist@jg555.com Precedence: bulk X-list: linux-mips Content-Length: 1811 Lines: 43 Martin Michlmayr wrote: > * Ralf Baechle [2005-12-05 11:44]: > >>> The attached patch allows the tulip driver to work with the RaQ2's >>> network adapter. Without the patch under a 64 bit build, it will >>> never negotiate and will drop packets. This driver is part of >>> Linux Parisc, by Grant Grundler. It's currently in -mm, but Jeff >>> Garzick will not apply it to the main tree. >>> >> Why? >> > > Jim, I don't think you ever responded to this. > > Do you know the status of this patch? > Jeff Garzick refuses to apply it do to spinlocks. Andrew Morton is including in his tree because it fixes issue with Parisc and with MIPS based builds. So it's kinda of what is the right thing to do. I also use this driver on my x86 builds, and it actually performs better. Here is a little history of how Grant made the driver. Grant Grundler is the network maintainer for Parisc Linux. He discovered that the tulip driver didn't perform that well. He researched the manufactures documentation and found out how to fix the driver to work to its optimum performance. He did this back in 2003, has submitted it to Jeff Garzick several times with no response. Around late 2004, I started to do test builds on 64 bit on my RaQ2 and discovered that the driver would not auto-negotiate transfer speeds. Talked to numerous people, then someone put me in touch with Grant. I tested the driver for about 2 weeks, ask Grant why it wasn't sent upstream, he told me about the spinlock issue. I then contacted Andrew Morton, explained everything as I am here, and he agreed it was needed and tried to get Jeff to add it. Jeff sends back a one liner say doing to it's use of spinlocks it's not accepted. That's the gory history. -- ---- Jim Gifford maillist@jg555.com From maillist@jg555.com Mon Jan 16 16:29:41 2006 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 16 Jan 2006 16:30:01 +0000 (GMT) Received: from Jg555.com ([64.30.195.78]:24487 "EHLO jg555.com") by ftp.linux-mips.org with ESMTP id S8133509AbWAPQ3l (ORCPT ); Mon, 16 Jan 2006 16:29:41 +0000 Received: from [172.16.0.55] ([::ffff:172.16.0.55]) (AUTH: PLAIN root, TLS: TLSv1/SSLv3,256bits,AES256-SHA) by jg555.com with esmtp; Mon, 16 Jan 2006 08:33:11 -0800 id 001F0A73.43CBCAC7.00007371 Message-ID: <43CBCAAE.6030403@jg555.com> Date: Mon, 16 Jan 2006 08:32:46 -0800 From: Jim Gifford User-Agent: Thunderbird 1.5 (Windows/20051201) MIME-Version: 1.0 To: Martin Michlmayr CC: Peter Horton , linux-mips@linux-mips.org, ralf@linux-mips.org Subject: Re: [PATCH Cobalt 1/1] 64-bit fix References: <20050414185949.GA5578@skeleton-jack> <20060116154543.GA26771@deprecation.cyrius.com> In-Reply-To: <20060116154543.GA26771@deprecation.cyrius.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 9902 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: maillist@jg555.com Precedence: bulk X-list: linux-mips Content-Length: 10134 Lines: 334 Here's a link to the updated patch. Works under 2.6.15 http://www.linuxfromscratch.org/patches/downloads/linux/linux-2.6.15-mips_fix-1.patch This include the iomap.c, which is not accepted by Ralf. Submitted By: Jim Gifford (patches at jg555 dot com) Date: 2006-01-09 Initial Package Version: 2.6.15 Origin: Jim Gifford Upstream Status: Not Accepted Description: Various Fixes for MIPS architectures diff -Naur linux-2.6.15.orig/arch/mips/lib/Makefile linux-2.6.15/arch/mips/lib/Makefile --- linux-2.6.15.orig/arch/mips/lib/Makefile 2006-01-09 21:32:16.000000000 +0000 +++ linux-2.6.15/arch/mips/lib/Makefile 2006-01-09 21:37:56.000000000 +0000 @@ -5,4 +5,6 @@ lib-y += csum_partial_copy.o memcpy.o promlib.o strlen_user.o strncpy_user.o \ strnlen_user.o uncached.o +obj-y += iomap.o + EXTRA_AFLAGS := $(CFLAGS) diff -Naur linux-2.6.15.orig/arch/mips/lib/iomap.c linux-2.6.15/arch/mips/lib/iomap.c --- linux-2.6.15.orig/arch/mips/lib/iomap.c 1970-01-01 00:00:00.000000000 +0000 +++ linux-2.6.15/arch/mips/lib/iomap.c 2006-01-09 21:37:56.000000000 +0000 @@ -0,0 +1,78 @@ +/* + * iomap.c, Memory Mapped I/O routines for MIPS architecture. + * + * This code is based on lib/iomap.c, by Linus Torvalds. + * + * Copyright (C) 2004-2005 Yoichi Yuasa + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include +#include +#include + +#include + +void __iomem *ioport_map(unsigned long port, unsigned int nr) +{ + unsigned long end; + + end = port + nr - 1UL; + if (ioport_resource.start > port || + ioport_resource.end < end || port > end) + return NULL; + + return (void __iomem *)(mips_io_port_base + port); +} + +void ioport_unmap(void __iomem *addr) +{ +} +EXPORT_SYMBOL(ioport_map); +EXPORT_SYMBOL(ioport_unmap); + +void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) +{ + unsigned long start, len, flags; + + if (dev == NULL) + return NULL; + + start = pci_resource_start(dev, bar); + len = pci_resource_len(dev, bar); + if (!start || !len) + return NULL; + + if (maxlen != 0 && len > maxlen) + len = maxlen; + + flags = pci_resource_flags(dev, bar); + if (flags & IORESOURCE_IO) + return ioport_map(start, len); + if (flags & IORESOURCE_MEM) { + if (flags & IORESOURCE_CACHEABLE) + return ioremap_cacheable_cow(start, len); + return ioremap_nocache(start, len); + } + + return NULL; +} + +void pci_iounmap(struct pci_dev *dev, void __iomem *addr) +{ + iounmap(addr); +} +EXPORT_SYMBOL(pci_iomap); +EXPORT_SYMBOL(pci_iounmap); diff -Naur linux-2.6.15.orig/include/asm-mips/addrspace.h linux-2.6.15/include/asm-mips/addrspace.h --- linux-2.6.15.orig/include/asm-mips/addrspace.h 2006-01-03 03:21:10.000000000 +0000 +++ linux-2.6.15/include/asm-mips/addrspace.h 2006-01-09 20:47:10.000000000 +0000 @@ -124,7 +124,7 @@ #define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE,(p)) #define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK) #define PHYS_TO_XKPHYS(cm,a) (_LLCONST_(0x8000000000000000) | \ - ((cm)<<59) | (a)) + ((unsigned long)(cm)<<59) | (a)) #if defined (CONFIG_CPU_R4300) \ || defined (CONFIG_CPU_R4X00) \ diff -Naur linux-2.6.15.orig/include/asm-mips/cobalt/cpu-feature-overrides.h linux-2.6.15/include/asm-mips/cobalt/cpu-feature-overrides.h --- linux-2.6.15.orig/include/asm-mips/cobalt/cpu-feature-overrides.h 1970-01-01 00:00:00.000000000 +0000 +++ linux-2.6.15/include/asm-mips/cobalt/cpu-feature-overrides.h 2006-01-09 20:52:18.000000000 +0000 @@ -0,0 +1,17 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2006 Ralf Baechle + */ +#ifndef __ASM_COBALT_CPU_FEATURE_OVERRIDES_H +#define __ASM_COBALT_CPU_FEATURE_OVERRIDES_H + +#ifdef CONFIG_64BIT +#define cpu_has_llsc 0 +#else +#define cpu_has_llsc 1 +#endif + +#endif /* __ASM_COBALT_CPU_FEATURE_OVERRIDES_H */ diff -Naur linux-2.6.15.orig/include/asm-mips/cobalt/ide.h linux-2.6.15/include/asm-mips/cobalt/ide.h --- linux-2.6.15.orig/include/asm-mips/cobalt/ide.h 1970-01-01 00:00:00.000000000 +0000 +++ linux-2.6.15/include/asm-mips/cobalt/ide.h 2006-01-09 20:47:10.000000000 +0000 @@ -0,0 +1,83 @@ + +/* + * PIO "in" transfers can cause D-cache lines to be allocated + * to the data being read. If the target is the page cache then + * the kernel can create a user space mapping of the same page + * without flushing it from the D-cache. This has large potential + * to create cache aliases. The Cobalts seem to trigger this + * problem easily. + * + * MIPs doesn't have a flush_dcache_range() so we roll + * our own. + * + * -- pdh + */ + +#define MAX_HWIFS 2 + +#include + +static inline void __flush_dcache(void) +{ + unsigned long dc_size, dc_line, addr, end; + + dc_size = current_cpu_data.dcache.ways << current_cpu_data.dcache.waybit; + dc_line = current_cpu_data.dcache.linesz; + + addr = CKSEG0; + end = addr + dc_size; + + for (; addr < end; addr += dc_line) + flush_dcache_line_indexed(addr); +} + +static inline void __flush_dcache_range(unsigned long start, unsigned long end) +{ + unsigned long dc_size, dc_line, addr; + + dc_size = current_cpu_data.dcache.ways << current_cpu_data.dcache.waybit; + dc_line = current_cpu_data.dcache.linesz; + + addr = start & ~(d