From ilya@gateway.total-knowledge.com Sat Feb  1 07:40:36 2003
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To: Ralf Baechle <ralf@linux-mips.org>
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Subject: Re: XFree XZ support
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Sorry. I take back "lying" part.

On Fri, Jan 31, 2003 at 10:48:14AM +0100, Ralf Baechle wrote:
> On Wed, Jan 29, 2003 at 06:46:11PM -0800, ilya@theIlya.com wrote:
>=20
> > Hold it there. I thought Impacts are the ones with i860...
> > You were either lying to me back then, or now.
>=20
> Watch your words.
>=20
> The Reality series are using upto about a dozen i860s in the gfx pipeline.
> XZ and Impact is a relativly simple gfx in comparison - I'm told there is
> about a dozen different graphics platforms that share nothing but the
> basic architecture and all are marketed as XZ.  I just hope that isn't
> true ...
>=20
>   Ralf
>=20

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From ralf@linux-mips.org Sat Feb  1 13:50:10 2003
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From: Ralf Baechle <ralf@linux-mips.org>
To: Kumba12345@aol.com
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On Fri, Jan 31, 2003 at 12:48:16PM -0500, Kumba12345@aol.com wrote:

>     (nil))
> ../../gcc/toplev.c:1367: Internal compiler error in function fatal_insn
> make[3]: *** [indydog.o] Error 1
> make[3]: Leaving directory `/usr/src/t/linux-2.4.20-mips/drivers/char'
> make[2]: *** [first_rule] Error 2
> make[2]: Leaving directory `/usr/src/t/linux-2.4.20-mips/drivers/char'
> make[1]: *** [_subdir_char] Error 2
> make[1]: Leaving directory `/usr/src/t/linux-2.4.20-mips/drivers'
> make: *** [_dir_drivers] Error 2

Know problem; the 64-bit egcs occasionally explodes when compiling some of
the funky macros from <asm/uaccess.h>.

> Second, After removing watchdog support and recompiling, I wound up with a 
> compiled kernel.  Attempting to boot it made another error:
> 
> Exception: <vector=Normal>
> Status register: 0x30044802<CU1,CU0,CH,IM7,IM4,IPL=???,MODE=KERNEL,EXL>
> Cause register: 0x8028<CE=0,IP8,EXC=II>
> Exception PC: 0x881ebeb4, Exception RA: 0x881ec4bc
> Reserved Instruction exception, contents of PC = 0x62900b
> Local I/O interrupt register 2: 0xc8 <EISA,SLOT0,SLOT1>
>   Saved user regs in hex (&gpda 0xa8740e48, &_regs 0xa8741048):
>   arg: a8740000 88200000 885fff80 88000000
>   tmp: a8740000 88239dc8 0 88239e07 881dc000 a87ffc20 a8746f70 9fc5c274
>   sve: a8740000 c12dc13a 0 c0f9138a 0 c0edd9c9 0 bf077b8a
>   t8 a8740000 t9 c0dcea58 at 0 v0 c0f9138a v1 0 k1 3ff
>   gp a8740000 fp abfb7d4f sp 4fd7ff27 ra cf31ffcf
> 
> PANIC: Unexpected exception

Another known problem.

> I used the linux-mips CVS 2_4 branch, pulled today, and the egcs-mips64 1.1.2 
> compiler and it's associated binutils.  As for the kernel, I wonder if this 
> has anything to do with the fact the kernel build passed -mcpu=r8000 when I'm 
> running an R4400.  I was told mips64 IP22 support should be mostly 
> functional, just it's been neglected for some time.
> 
> Anyways, if there is anymore information needed, please advise.  This system 
> works wonderfully on a 32-bit kernel built off a vanilla + debian patch, but 
> I wnated to try out mips64 on it just for kicks.

There is no advantage of running a 64-bit kernel on an Indy right now.
There are no 64-bit MIPS utilities and libraries shipping so all you could
do is running 32-bit software.

The only reason why I made the 64-bit Indy kernel at all was using it as
a stepping stone when porting Linux to the SGI Origin.

  Ralf

From ica2_ts@csv.ica.uni-stuttgart.de Sun Feb  2 21:49:55 2003
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Date: Sun, 2 Feb 2003 22:49:52 +0100
To: linux-mips@linux-mips.org
Cc: Ralf Baechle <ralf@linux-mips.org>
Subject: [PATCH] Fix r3k exception handler location
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Hello All,

this patch is untested, but I just can't see how a r3k can boot without it.


Thiemo


diff -BurpN linux-orig/arch/mips/kernel/traps.c linux-2.4.20/arch/mips/kernel/traps.c
--- linux-orig/arch/mips/kernel/traps.c	Fri Dec 20 04:19:49 2002
+++ linux-2.4.20/arch/mips/kernel/traps.c	Sun Feb  2 21:57:19 2003
@@ -1000,7 +1000,7 @@ void __init trap_init(void)
 	else if (mips_cpu.options & MIPS_CPU_4KEX)
 		memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic, 0x80);
 	else
-		memcpy((void *)(KSEG0 + 0x080), &except_vec3_generic, 0x80);
+		memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic, 0x80);
 
 	if (mips_cpu.cputype == CPU_R6000 || mips_cpu.cputype == CPU_R6000A) {
 		/*
diff -BurpN linux-orig/arch/mips64/kernel/traps.c linux-2.4.20/arch/mips64/kernel/traps.c
--- linux-orig/arch/mips64/kernel/traps.c	Fri Dec 20 04:19:51 2002
+++ linux-2.4.20/arch/mips64/kernel/traps.c	Sun Feb  2 21:57:20 2003
@@ -755,7 +755,7 @@ void __init trap_init(void)
 	} else if (mips_cpu.options & MIPS_CPU_4KEX)
 		memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic, 0x80);
 	else
-		memcpy((void *)(KSEG0 + 0x080), &except_vec3_generic, 0x80);
+		memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic, 0x80);
 
 	if (mips_cpu.cputype == CPU_R6000 || mips_cpu.cputype == CPU_R6000A) {
 		/*

From ralf@linux-mips.org Sun Feb  2 22:08:01 2003
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From: Ralf Baechle <ralf@linux-mips.org>
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Subject: Re: [PATCH] Fix r3k exception handler location
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On Sun, Feb 02, 2003 at 10:49:52PM +0100, Thiemo Seufer wrote:

> this patch is untested, but I just can't see how a r3k can boot without it.

Because it's not a R4000 ;-)

R3000 has different exception vector locations than R4000.

  Ralf

From lindahl@keyresearch.com Sun Feb  2 22:09:02 2003
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Subject: Re: [PATCH] Cobalt interrupthandler fix
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On Fri, Jan 24, 2003 at 03:15:24PM +0100, Karsten Merker wrote:

> the Cobalt NASRaQ (as well as other RaQ models) has the problem of freezing
> when there is activity on the serial port and on the ethernet at the same
> time. Peter de Schrijver has tracked this down to a bug in the interrupt
> handler. The handler currently does not check whether an interrupt is masked
> and calls the handling routine for _every_ interrupt, not only for those
> that are not masked out currently.

While we're at it:

[lindahl@fileserver mips]$ find . -name "*int-hand*" | xargs grep -L CP0_STATUS
./jmr3927/rbhma3100/int-handler.S
./philips/nino/int-handler.S

The philips case seems to have the same bug.

The jmr3927 thingie is hard to understand, so I can't tell if it has
the same bug or not.

-- greg

From clausen@pureza.melbourne.sgi.com Mon Feb  3 04:15:03 2003
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Date: Mon, 3 Feb 2003 15:14:32 +1100
From: Andrew Clausen <clausen@melbourne.sgi.com>
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Hi all,

I've got Debian running smoothly on an Origin 200 :)

I've also got it booting off a CD, by putting a dvh partition table,
containing an xfs partition with a kernel on it.  Unfortunately,
I couldn't get dvhtool to put sash on it.  (It complained the volume
header was too small, which it wasn't)
I had to use the sash off the hard disk.

Anyway, in principle, I should be able write a shell script to
create the above image, and add an isofs partition containing the debian
mips install cd.  Just, I bet it can't deal with sash / the prom
properly - it's probably dependent on arcboot.  Also, it would need
different kernel packages.

So, I guess an arcboot port would be the nicest solution?

Perhaps a better approach is to get the kernel to prompt users to
change disks, and stick in the vanilla debian CD?  i.e. have a
"mips64-bootstrap.img" CD image, which prompts for install-1 afterwards.

Cheers,
Andrew

PS: I don't speak for SGI

From Nemanja.Popov@micronasnit.com Mon Feb  3 08:57:27 2003
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From: "Nemanja Popov" <Nemanja.Popov@micronasnit.com>
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Subject: Lexra' s MMU
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Hi all !
  Does Lexra's CPU LX4280 has MMU. I've found from dateaheet LX4280 that
there is only SMMU (S stands for Simple) which does not include TLB and
exceptions related to that.
  I've noticed port for lexra (among others also for LX4280) on cvs. Is it
possible to run linux on that kind of processor, and if so will it manage
user space application as it should  with mmu.
  Thanx.


From ajc@gmx.net Mon Feb  3 10:07:42 2003
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Subject: Indy bootstrap tftp problem
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I am trying to install Linux on my Indy using the network boot procedure 
described on the debian site at 
<http://www.linux-debian.de/howto/debian-mips-woody-install.html>

This is not getting very far because the tftp load of the bootblock 
fails with the Indy bootrom reporting "ip fragments error" for each tftp 
reply packet that arrives (with debug enabled). Does anyone know what 
might be happening here? Is this a known bug in the bootrom?

More info - tcpdump on the server shows the tftp reply packets with 
blocksize 512 being sent out so there doesn't actually seem to be any ip 
fragmentation happening. Booting IRIX and running 'tftp get' works ok so 
it's only the rom that fails. Oh and this is quite an early Indy, so it 
may well have a buggy rom.

Any help appreciated. thx

Andrew Cannon


From kaos@ocs.com.au Mon Feb  3 10:30:55 2003
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From: Keith Owens <kaos@ocs.com.au>
To: Andrew Cannon <ajc@gmx.net>
Cc: linux-mips@linux-mips.org
Subject: Re: Indy bootstrap tftp problem 
In-reply-to: Your message of "Mon, 03 Feb 2003 11:08:00 BST."
             <3E3E3F80.8080704@gmx.net> 
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On Mon, 03 Feb 2003 11:08:00 +0100, 
Andrew Cannon <ajc@gmx.net> wrote:
>I am trying to install Linux on my Indy using the network boot procedure 
>described on the debian site at 
><http://www.linux-debian.de/howto/debian-mips-woody-install.html>
>
>This is not getting very far because the tftp load of the bootblock 
>fails with the Indy bootrom reporting "ip fragments error" for each tftp 
>reply packet that arrives (with debug enabled). Does anyone know what 
>might be happening here? Is this a known bug in the bootrom?

Some Indy bootroms do not cope with the "don't fragment" bit (DF) being
set.  If the tftp server is Linux

  echo "1" > /proc/sys/net/ipv4/ip_no_pmtu_disc


From ralf@linux-mips.org Mon Feb  3 12:26:46 2003
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Date: Mon, 3 Feb 2003 13:26:34 +0100
From: Ralf Baechle <ralf@linux-mips.org>
To: Nemanja Popov <Nemanja.Popov@micronasnit.com>
Cc: linux-mips@linux-mips.org
Subject: Re: Lexra' s MMU
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In-Reply-To: <001701c2cb62$3eccd500$e000a8c0@micronasnit.com>; from Nemanja.Popov@micronasnit.com on Mon, Feb 03, 2003 at 09:57:02AM +0100
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On Mon, Feb 03, 2003 at 09:57:02AM +0100, Nemanja Popov wrote:

>   Does Lexra's CPU LX4280 has MMU. I've found from dateaheet LX4280 that
> there is only SMMU (S stands for Simple) which does not include TLB and
> exceptions related to that.
>   I've noticed port for lexra (among others also for LX4280) on cvs. Is it
> possible to run linux on that kind of processor, and if so will it manage
> user space application as it should  with mmu.

TLB-less processors aren't supported at all by Linux 2.4.  Linux 2.5 has
the infrastructure in place to support TLB-less processors but we don't
support that on MIPS.  I guess it's probably not interesting because
TLB-less CPUs tend to be part of systems that are too resource constrained
to be of interest for use with Linux but I certainly wouldn't refuse such
patches.

The CVS kernel does not support Lexra processors.  There are a bit over one
year old Lexra patches for 2.4.  Me and the author agreed to not merge those
patches into the CVS kernel because Lexra is a dead company.

  Ralf

From vivienc@nerim.net Mon Feb  3 22:20:31 2003
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Subject: [PATCH 2.5] r4k_switch task_struct/thread_info fixes
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Hi,

	This patch fixes an incorrect use of THREAD_FLAGS instead of
TI_FLAGS when clearing the TIF_USEDFPU flag of the current thread info,
and an incorrect assumption when using ST_OFF, that the stack is shared
with task_struct, whereas it is shared with thread_info in 2.5.

Vivien.

Index: arch/mips64/kernel/r4k_switch.S
===================================================================
RCS file: /home/cvs/linux/arch/mips64/kernel/r4k_switch.S,v
retrieving revision 1.22
diff -u -r1.22 r4k_switch.S
--- arch/mips64/kernel/r4k_switch.S	5 Nov 2002 19:51:47 -0000	1.22
+++ arch/mips64/kernel/r4k_switch.S	3 Feb 2003 22:05:26 -0000
@@ -24,6 +24,10 @@
 
 	.set	mips3
 
+/* 
+ * Offset to the current process status flags, the first 32 bytes of the
+ * stack are not used.
+ */
 #define ST_OFF (KERNEL_STACK_SIZE - 32 - PT_SIZE + PT_STATUS)
 
 /*
@@ -58,15 +62,15 @@
 	nor	t1, zero, t1
 
 	and	t0, t0, t1
-	sd	t0, TASK_FLAGS(t3)
+	sd	t0, TI_FLAGS(t3)
 
 	/*
 	 * clear saved user stack CU1 bit
 	 */
-	ld	t0, ST_OFF(a0)
+	ld	t0, ST_OFF(t3)
 	li	t1, ~ST0_CU1
 	and	t0, t0, t1
-	sd	t0, ST_OFF(a0)
+	sd	t0, ST_OFF(t3)
 
 	
 	sll	t2, t0, 5
Index: arch/mips/kernel/r4k_switch.S
===================================================================
RCS file: /home/cvs/linux/arch/mips/kernel/r4k_switch.S,v
retrieving revision 1.29
diff -u -r1.29 r4k_switch.S
--- arch/mips/kernel/r4k_switch.S	5 Nov 2002 19:51:47 -0000	1.29
+++ arch/mips/kernel/r4k_switch.S	3 Feb 2003 22:06:17 -0000
@@ -67,10 +67,10 @@
 	/*
 	 * clear saved user stack CU1 bit
 	 */
-	lw	t0, ST_OFF(a0)
+	lw	t0, ST_OFF(t3)
 	li	t1, ~ST0_CU1
 	and	t0, t0, t1
-	sw	t0, ST_OFF(a0)
+	sw	t0, ST_OFF(t3)
 
 	FPU_SAVE_DOUBLE(a0, t0)			# clobbers t0
 


From clausen@pureza.melbourne.sgi.com Mon Feb  3 22:56:33 2003
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Date: Tue, 4 Feb 2003 09:56:01 +1100
From: Andrew Clausen <clausen@melbourne.sgi.com>
To: Jason Ormes <jormes@wideopenwest.com>
Cc: linux-mips@linux-mips.org
Subject: Re: debian's mips userland on mips64
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On Mon, Feb 03, 2003 at 10:59:52AM -0600, Jason Ormes wrote:
> I happened to see that you were running on an origin 200. I'm currently
> trying to build a kernel for an origin 200 that I have laying around and
> am getting a bunch of errors in the ip27-init.c file.  Is there some
> magic combination of flags when I build this?

I've been using 2.4.x cvs.  What error do you get?  Please post
to the list!

I've been compiling with:

	alias mipsmake='make CROSS_COMPILE=mips64-linux ARCH=mips64'
	mipsmake clean
	mipsmake menuconfig	<-- select arch/mips64/defconfig-ip27
	mipsmake vmlinux.64

>   You mention that you are
> using the mips64-linux kernel but when I turn on ip27 support it wants
> to build a little endian version?  Any help you could give me would be
> gratefully appreciated.

Doesn't for me...

Cheers,
Andrew


From clausen@pureza.melbourne.sgi.com Tue Feb  4 06:14:03 2003
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Date: Tue, 4 Feb 2003 17:13:23 +1100
From: Andrew Clausen <clausen@melbourne.sgi.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Subject: [patch] cmdline.c rewrite
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Hi all,

This patch is mainly a cleanup.  There is only one change (improvement!)
in the semantics:

Some kernel parameters are auto-generated.   eg: root= (always has been
broken).  Anyway, the old version of cmdline.c added these auto-generated
parameters unconditionally.  Now, it old adds them if there's no
collision with old parameters.  Is that Right?

Cheers,
Andrew


Index: cmdline.c
===================================================================
RCS file: /home/cvs/linux/arch/mips/arc/cmdline.c,v
retrieving revision 1.5.2.3
diff -u -r1.5.2.3 cmdline.c
--- cmdline.c	5 Aug 2002 23:53:30 -0000	1.5.2.3
+++ cmdline.c	24 Jan 2003 06:43:57 -0000
@@ -6,6 +6,8 @@
  * cmdline.c: Kernel command line creation using ARCS argc/argv.
  *
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
+ * Copyright (C) 2003 Silicon Graphics, Inc.
+ *	modifications by Andrew Clausen (clausen@gnu.org)
  */
 #include <linux/init.h>
 #include <linux/kernel.h>
@@ -16,96 +18,76 @@
 
 #undef DEBUG_CMDLINE
 
-char arcs_cmdline[CL_SIZE];
+char arcs_cmdline[CL_SIZE]; /* initialized to empty */
+static int __initdata arg_count = 0;
 
 char * __init prom_getcmdline(void)
 {
-	return &(arcs_cmdline[0]);
+	return arcs_cmdline;
 }
 
-static char *ignored[] = {
+static void __init append_translated_arg(const char* match, const char* trans)
+{
+	int len = strlen(match);
+	int i;
+
+	/* don't repeat arguments, like "root=X root=Y", unless the
+	 * replacement string "trans" is empty, in which case the user is
+	 * getting exactly what they asked for.
+	 */
+	if (strlen(trans) > 0 && strstr(arcs_cmdline, trans))
+		return;
+
+	for (i = 1; i < prom_argc; i++) {
+		if (!strncmp(prom_argv(i), match, len)) {
+			if (arg_count++)
+				strcat(arcs_cmdline, " ");
+			strcat(arcs_cmdline, trans);
+			strcat(arcs_cmdline, prom_argv(i) + len);
+			return;
+		}
+	}
+}
+
+static char __initdata *ignored_args[] = {
 	"ConsoleIn=",
 	"ConsoleOut=",
 	"SystemPartition=",
 	"OSLoader=",
 	"OSLoadPartition=",
 	"OSLoadFilename=",
-	"OSLoadOptions="
-};
-#define NENTS(foo) ((sizeof((foo)) / (sizeof((foo[0])))))
-
-static char *used_arc[][2] = {
-	{ "OSLoadPartition=", "root=" },
-	{ "OSLoadOptions=", "" }
+	"OSLoadOptions=",
+	NULL
 };
 
-static char * __init move_firmware_args(char* cp)
+static int __init is_arg_useful(const char* arg)
 {
-	char *s;
-	int actr, i;
-
-	actr = 1; /* Always ignore argv[0] */
-
-	while (actr < prom_argc) {
-		for(i = 0; i < NENTS(used_arc); i++) {
-			int len = strlen(used_arc[i][0]);
-
-			if (!strncmp(prom_argv(actr), used_arc[i][0], len)) {
-			/* Ok, we want it. First append the replacement... */
-				strcat(cp, used_arc[i][1]);
-				cp += strlen(used_arc[i][1]);
-				/* ... and now the argument */
-				s = strstr(prom_argv(actr), "=");
-				if (s) {
-					s++;
-					strcpy(cp, s);
-					cp += strlen(s);
-				}
-				*cp++ = ' ';
-				break;
-			}
-		}
-		actr++;
+	int i;
+	for (i = 0; ignored_args[i] != NULL; i++) {
+		if (!strncmp(arg, ignored_args[i], strlen(ignored_args[i]) - 1))
+			return 0;
 	}
-
-	return cp;
+	return 1;
 }
 
-
-void __init prom_init_cmdline(void)
+static void __init append_untranslated_args(void)
 {
-	char *cp;
-	int actr, i;
-
-	actr = 1; /* Always ignore argv[0] */
-
-	cp = &(arcs_cmdline[0]);
-	/*
-	 * Move ARC variables to the beginning to make sure they can be
-	 * overridden by later arguments.
-	 */
-	cp = move_firmware_args(cp);
-
-	while (actr < prom_argc) {
-		for (i = 0; i < NENTS(ignored); i++) {
-			int len = strlen(ignored[i]);
-
-			if (!strncmp(prom_argv(actr), ignored[i], len))
-				goto pic_cont;
+	int i;
+	for (i = 1; i < prom_argc; i++) {
+		if (is_arg_useful(prom_argv(i))) {
+			if (arg_count++)
+				strcat(arcs_cmdline, " ");
+			strcat(arcs_cmdline, prom_argv(i));
 		}
-		/* Ok, we want it. */
-		strcpy(cp, prom_argv(actr));
-		cp += strlen(prom_argv(actr));
-		*cp++ = ' ';
-
-	pic_cont:
-		actr++;
 	}
-	if (cp != &(arcs_cmdline[0])) /* get rid of trailing space */
-		--cp;
-	*cp = '\0';
+}
 
+void __init prom_init_cmdline(void)
+{
+	append_translated_arg("OSLoadOptions=", "");
+	append_translated_arg("OSLoadPartition=", "root=");
+	append_untranslated_args();
 #ifdef DEBUG_CMDLINE
-	prom_printf("prom_init_cmdline: %s\n", &(arcs_cmdline[0]));
+	prom_printf("prom_init_cmdline: \"%s\"\n", arcs_cmdline);
 #endif
 }


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Date: Tue, 4 Feb 2003 17:25:38 +1100
From: Andrew Clausen <clausen@melbourne.sgi.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Subject: [patch] ip27-timer irq fix
Message-ID: <20030204062538.GB27302@pureza.melbourne.sgi.com>
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Hi all,

This patch sets up irq's properly.  The author of this code
apparently didn't understand the ugly hacks that are going on
in bridge_irq_type.* (startup_bridge_irq() and friends).
So, they were:
	(a) allocating a stupid IRQ number (that collided with
	something else in my case).  This doesn't matter at all,
	since the timer interrupt comes through different channels
	to PCI device interrupts.

	(b) not calling setup_irq(), which meant, among other things,
	it wasn't appearing in /proc/interrupts.  setup_irq()
	was crashing on them on startup, because startup_bridge_irq()
	was trying to do all kinds of PCI initialization on it (IIRC).

Basically, if you pick an IRQ number less than BASE_PCI,
startup_bridge_irq() will ignore it, and all works dandy :)

The Right Solution TM would probably involve some other
hw_interrupt_type like cpu_irq_type, or something.

Cheers,
Andrew


Index: arch/mips/sgi-ip27/ip27-timer.c
===================================================================
RCS file: /home/cvs/linux/arch/mips/sgi-ip27/ip27-timer.c,v
retrieving revision 1.1.2.4
diff -u -r1.1.2.4 ip27-timer.c
--- arch/mips/sgi-ip27/ip27-timer.c	2 Dec 2002 00:24:51 -0000	1.1.2.4
+++ arch/mips/sgi-ip27/ip27-timer.c	30 Jan 2003 22:38:48 -0000
@@ -90,13 +90,11 @@
 	return retval;
 }
 
-#define IP27_TIMER_IRQ	9			/* XXX Assign number */
-
 void rt_timer_interrupt(struct pt_regs *regs)
 {
 	int cpu = smp_processor_id();
 	int cpuA = ((cputoslice(cpu)) == 0);
-	int irq = IP27_TIMER_IRQ;
+	int irq = CPU_TIMER_IRQ;
 
 	irq_enter(cpu, irq);
 	write_lock(&xtime_lock);
@@ -198,7 +196,7 @@
 	irq->handler = no_action;
 
 	/* setup irqaction */
-//	setup_irq(IP27_TIMER_IRQ, irq);		/* XXX Can't do this yet.  */
+	setup_irq(CPU_TIMER_IRQ, irq);
 }
 
 void __init ip27_time_init(void)
Index: include/asm-mips64/sn/sn0/ip27.h
===================================================================
RCS file: /home/cvs/linux/include/asm-mips64/sn/sn0/ip27.h,v
retrieving revision 1.9.2.1
diff -u -r1.9.2.1 ip27.h
--- include/asm-mips64/sn/sn0/ip27.h	27 Jun 2002 14:21:24 -0000	1.9.2.1
+++ include/asm-mips64/sn/sn0/ip27.h	30 Jan 2003 22:39:00 -0000
@@ -88,7 +88,8 @@
 #define CPU_RESCHED_B_IRQ	1
 #define CPU_CALL_A_IRQ		2
 #define CPU_CALL_B_IRQ		3
-#define BASE_PCI_IRQ		4
+#define CPU_TIMER_IRQ		4
+#define BASE_PCI_IRQ		5
 
 #define SN00_BRIDGE		0x9200000008000000
 #define SN00I_BRIDGE0		0x920000000b000000


From clausen@pureza.melbourne.sgi.com Tue Feb  4 06:30:23 2003
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	Tue, 4 Feb 2003 17:29:44 +1100
Date: Tue, 4 Feb 2003 17:29:44 +1100
From: Andrew Clausen <clausen@melbourne.sgi.com>
To: wakkerma@debian.org
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Subject: [patch] remove bogus "struct sigaction"
Message-ID: <20030204062944.GC27302@pureza.melbourne.sgi.com>
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Hi Wichert,

Somebody made their own "struct new_sigaction".  God knows why.

It should be #ifdef'd if it's actually useful to someone (right?),
but it's incompatible with linux-mips.  My patch... using the
struct sigaction out of the standard #includes... Works For Me TM.

Cheers,
Andrew


diff -rpu strace-4.4/signal.c strace-4.4-fixed/signal.c
--- strace-4.4/signal.c	Sun Aug 19 22:06:50 2001
+++ strace-4.4-fixed/signal.c	Thu Jan 23 23:30:59 2003
@@ -1363,26 +1363,11 @@ typedef struct siginfo
 } siginfo_t;
 #endif
 
-/* Structure describing the action to be taken when a signal arrives.  */
-struct new_sigaction
-{
-	union
-	{
-		__sighandler_t __sa_handler;
-		void (*__sa_sigaction) (int, siginfo_t *, void *);
-	}
-	__sigaction_handler;
-	unsigned long sa_flags;
-	void (*sa_restorer) (void);
-	unsigned long int sa_mask[2];
-};
-
-
 	int
 sys_rt_sigaction(tcp)
 	struct tcb *tcp;
 {
-	struct new_sigaction sa;
+	struct sigaction sa;
 	sigset_t sigset;
 	long addr;
 
@@ -1399,7 +1384,7 @@ sys_rt_sigaction(tcp)
 	else if (umove(tcp, addr, &sa) < 0)
 		tprintf("{...}");
 	else {
-		switch ((long) sa.__sigaction_handler.__sa_handler) {
+		switch ((long) sa.sa_handler) {
 			case (long) SIG_ERR:
 				tprintf("{SIG_ERR}");
 				break;
@@ -1410,8 +1395,7 @@ sys_rt_sigaction(tcp)
 				tprintf("{SIG_IGN}");
 				break;
 			default:
-				tprintf("{%#lx, ",
-						(long) sa.__sigaction_handler.__sa_handler);
+				tprintf("{%#lx, ", (long) sa.sa_handler);
 				sigemptyset(&sigset);
 #ifdef LINUXSPARC
 				if (tcp->u_arg[4] <= sizeof(sigset))


From yoichi_yuasa@montavista.co.jp Tue Feb  4 06:45:53 2003
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Date: Tue, 4 Feb 2003 15:40:25 +0900
From: Yoichi Yuasa <yoichi_yuasa@montavista.co.jp>
To: ralf@linux-mips.org
Cc: yoichi_yuasa@montavista.co.jp, linux-mips@linux-mips.org
Subject: [patch] TANBAC TB0226(NEC VR4131)
Message-Id: <20030204154025.340fdf40.yoichi_yuasa@montavista.co.jp>
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This is a multi-part message in MIME format.

--Multipart_Tue__4_Feb_2003_15:40:25_+0900_08258ab8
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Hello Ralf,

I added support of TANBAC TB0226 to vr41xx directory.

This patch is based on linux_2_4 tag cvs tree on ftp.linux-mips.org
Would you apply this patch to CVS on ftp.linux-mips.org?

Best Regards,

Yoichi

--Multipart_Tue__4_Feb_2003_15:40:25_+0900_08258ab8
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diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/Makefile linux/arch/mips/Makefile
--- linux.orig/arch/mips/Makefile	Fri Jan 24 10:25:54 2003
+++ linux/arch/mips/Makefile	Tue Feb  4 15:24:28 2003
@@ -429,6 +429,17 @@
 endif
 
 #
+# TANBAC TB0226 Mbase (VR4131)
+#
+ifdef CONFIG_TANBAC_TB0226
+SUBDIRS		+= arch/mips/vr41xx/common \
+		   arch/mips/vr41xx/tanbac-tb0226
+LIBS		+= arch/mips/vr41xx/common/vr41xx.o \
+		   arch/mips/vr41xx/tanbac-tb0226/tb0226.o
+LOADADDR	:= 0x80000000
+endif
+
+#
 # Philips Nino
 #
 ifdef CONFIG_NINO
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/config-shared.in linux/arch/mips/config-shared.in
--- linux.orig/arch/mips/config-shared.in	Mon Jan 27 11:06:23 2003
+++ linux/arch/mips/config-shared.in	Tue Feb  4 15:24:28 2003
@@ -191,6 +191,7 @@
    fi
 fi
 bool 'Support for SNI RM200 PCI' CONFIG_SNI_RM200_PCI
+bool 'Support for TANBAC TB0226 (Mbase)' CONFIG_TANBAC_TB0226
 dep_bool 'Support for Toshiba JMR-TX3927 board' CONFIG_TOSHIBA_JMR3927 $CONFIG_MIPS32
 bool 'Support for Victor MP-C303/304' CONFIG_VICTOR_MPC30X
 if [ "$CONFIG_VICTOR_MPC30X" = "y" ]; then
@@ -534,6 +535,19 @@
    define_bool CONFIG_OLD_TIME_C y
    define_bool CONFIG_PC_KEYB y
    define_bool CONFIG_PCI y
+fi
+if [ "$CONFIG_TANBAC_TB0226" = "y" ]; then
+   define_bool CONFIG_CPU_VR41XX y
+   define_bool CONFIG_IRQ_CPU y
+   define_bool CONFIG_NEW_TIME_C y
+   define_bool CONFIG_VR41XX_TIME_C y
+   define_bool CONFIG_NONCOHERENT_IO y
+   define_bool CONFIG_ISA n
+   define_bool CONFIG_PCI y
+   define_bool CONFIG_NEW_PCI y
+   define_bool CONFIG_PCI_AUTO y
+   define_bool CONFIG_DUMMY_KEYB y
+   define_bool CONFIG_SERIAL_MANY_PORTS y
 fi
 if [ "$CONFIG_TOSHIBA_JMR3927" = "y" ]; then
    define_bool CONFIG_TOSHIBA_BOARDS y
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/defconfig-tb0226 linux/arch/mips/defconfig-tb0226
--- linux.orig/arch/mips/defconfig-tb0226	Thu Jan  1 09:00:00 1970
+++ linux/arch/mips/defconfig-tb0226	Tue Feb  4 15:24:28 2003
@@ -0,0 +1,773 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+CONFIG_MIPS32=y
+# CONFIG_MIPS64 is not set
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+# CONFIG_MODVERSIONS is not set
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_ACER_PICA_61 is not set
+# CONFIG_MIPS_PB1000 is not set
+# CONFIG_MIPS_PB1100 is not set
+# CONFIG_MIPS_PB1500 is not set
+# CONFIG_MIPS_DB1000 is not set
+# CONFIG_MIPS_DB1100 is not set
+# CONFIG_MIPS_DB1500 is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_CASIO_E55 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_IBM_WORKPAD is not set
+# CONFIG_LASAT is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MAGNUM_4000 is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_NEC_EAGLE is not set
+# CONFIG_OLIVETTI_M700 is not set
+# CONFIG_NINO is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+CONFIG_TANBAC_TB0226=y
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_VICTOR_MPC30X is not set
+# CONFIG_ZAO_CAPCELLA is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+CONFIG_CPU_VR41XX=y
+CONFIG_IRQ_CPU=y
+CONFIG_NEW_TIME_C=y
+CONFIG_VR41XX_TIME_C=y
+CONFIG_NONCOHERENT_IO=y
+# CONFIG_ISA is not set
+CONFIG_PCI=y
+CONFIG_NEW_PCI=y
+CONFIG_PCI_AUTO=y
+CONFIG_DUMMY_KEYB=y
+CONFIG_SERIAL_MANY_PORTS=y
+# CONFIG_MIPS_AU1000 is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+CONFIG_CPU_VR41XX=y
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_SB1 is not set
+# CONFIG_CPU_ADVANCED is not set
+# CONFIG_CPU_HAS_LLSC is not set
+# CONFIG_CPU_HAS_LLDSCD is not set
+# CONFIG_CPU_HAS_WB is not set
+CONFIG_CPU_HAS_SYNC=y
+
+#
+# General setup
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_NET=y
+# CONFIG_PCI_NAMES is not set
+# CONFIG_ISA is not set
+# CONFIG_EISA is not set
+# CONFIG_TC is not set
+# CONFIG_MCA is not set
+# CONFIG_SBUS is not set
+# CONFIG_HOTPLUG is not set
+# CONFIG_PCMCIA is not set
+# CONFIG_HOTPLUG_PCI is not set
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_KCORE_ELF=y
+# CONFIG_KCORE_AOUT is not set
+# CONFIG_BINFMT_AOUT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_MIPS32_COMPAT is not set
+# CONFIG_MIPS32_O32 is not set
+# CONFIG_MIPS32_N32 is not set
+# CONFIG_BINFMT_ELF32 is not set
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_PM is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play configuration
+#
+# CONFIG_PNP is not set
+# CONFIG_ISAPNP is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_XD is not set
+# CONFIG_PARIDE is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_CISS_SCSI_TAPE is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_BLK_STATS is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+# CONFIG_BLK_DEV_MD is not set
+# CONFIG_MD_LINEAR is not set
+# CONFIG_MD_RAID0 is not set
+# CONFIG_MD_RAID1 is not set
+# CONFIG_MD_RAID5 is not set
+# CONFIG_MD_MULTIPATH is not set
+# CONFIG_BLK_DEV_LVM is not set
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_NETLINK_DEV=y
+# CONFIG_NETFILTER is not set
+# CONFIG_FILTER is not set
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_IPV6 is not set
+# CONFIG_KHTTPD is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+
+#
+#  
+#
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+
+#
+# Appletalk devices
+#
+# CONFIG_DEV_APPLETALK is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_LLC is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+# CONFIG_PHONE_IXJ is not set
+# CONFIG_PHONE_IXJ_PCMCIA is not set
+
+#
+# ATA/IDE/MFM/RLL support
+#
+# CONFIG_IDE is not set
+# CONFIG_BLK_DEV_IDE_MODES is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI support
+#
+CONFIG_SCSI=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_SD_EXTRA_DEVS=40
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=y
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_SR_EXTRA_DEVS=2
+# CONFIG_CHR_DEV_SG is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_DEBUG_QUEUES is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+CONFIG_SCSI_CONSTANTS=y
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_7000FASST is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AHA152X is not set
+# CONFIG_SCSI_AHA1542 is not set
+# CONFIG_SCSI_AHA1740 is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_IN2000 is not set
+# CONFIG_SCSI_AM53C974 is not set
+# CONFIG_SCSI_MEGARAID is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_CPQFCTS is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_DTC3280 is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_EATA_DMA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_GENERIC_NCR5380 is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_NCR53C406A is not set
+# CONFIG_SCSI_NCR53C7xx is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_NCR53C8XX is not set
+# CONFIG_SCSI_SYM53C8XX is not set
+# CONFIG_SCSI_PAS16 is not set
+# CONFIG_SCSI_PCI2000 is not set
+# CONFIG_SCSI_PCI2220I is not set
+# CONFIG_SCSI_PSI240I is not set
+# CONFIG_SCSI_QLOGIC_FAS is not set
+# CONFIG_SCSI_QLOGIC_ISP is not set
+# CONFIG_SCSI_QLOGIC_FC is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_SIM710 is not set
+# CONFIG_SCSI_SYM53C416 is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_T128 is not set
+# CONFIG_SCSI_U14_34F is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+# CONFIG_I2O_PCI is not set
+# CONFIG_I2O_BLOCK is not set
+# CONFIG_I2O_LAN is not set
+# CONFIG_I2O_SCSI is not set
+# CONFIG_I2O_PROC is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_SUNLANCE is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNBMAC is not set
+# CONFIG_SUNQE is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_LANCE is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_ISA is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_APRICOT is not set
+# CONFIG_CS89x0 is not set
+# CONFIG_TULIP is not set
+# CONFIG_DE4X5 is not set
+# CONFIG_DGRS is not set
+# CONFIG_DM9102 is not set
+CONFIG_EEPRO100=y
+# CONFIG_E100 is not set
+# CONFIG_LNE390 is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_NE3210 is not set
+# CONFIG_ES3210 is not set
+# CONFIG_8139CP is not set
+# CONFIG_8139TOO is not set
+# CONFIG_8139TOO_PIO is not set
+# CONFIG_8139TOO_TUNE_TWISTER is not set
+# CONFIG_8139TOO_8129 is not set
+# CONFIG_8139_OLD_RX_RESET is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_TC35815 is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_VIA_RHINE_MMIO is not set
+# CONFIG_WINBOND_840 is not set
+# CONFIG_LAN_SAA9730 is not set
+# CONFIG_NET_POCKET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_MYRI_SBUS is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Input core support
+#
+# CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+# CONFIG_VT_CONSOLE is not set
+CONFIG_SERIAL=y
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_SERIAL_EXTENDED is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_MOUSE is not set
+
+#
+# Joysticks
+#
+# CONFIG_INPUT_GAMEPORT is not set
+
+#
+# Input core support is needed for gameports
+#
+
+#
+# Input core support is needed for joysticks
+#
+# CONFIG_QIC02_TAPE is not set
+
+#
+# Watchdog Cards
+#
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+# CONFIG_ACQUIRE_WDT is not set
+# CONFIG_ADVANTECH_WDT is not set
+# CONFIG_ALIM7101_WDT is not set
+# CONFIG_SC520_WDT is not set
+# CONFIG_PCWATCHDOG is not set
+# CONFIG_EUROTECH_WDT is not set
+# CONFIG_IB700_WDT is not set
+# CONFIG_WAFER_WDT is not set
+# CONFIG_I810_TCO is not set
+# CONFIG_MIXCOMWD is not set
+# CONFIG_60XX_WDT is not set
+# CONFIG_SC1200_WDT is not set
+# CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_W83877F_WDT is not set
+# CONFIG_WDT is not set
+# CONFIG_WDTPCI is not set
+# CONFIG_MACHZ_WDT is not set
+# CONFIG_INDYDOG is not set
+# CONFIG_AMD7XX_TCO is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# File systems
+#
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_ADFS_FS_RW is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BEFS_DEBUG is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_JBD_DEBUG is not set
+# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_UMSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_TMPFS is not set
+CONFIG_RAMFS=y
+# CONFIG_ISO9660_FS is not set
+# CONFIG_JOLIET is not set
+# CONFIG_ZISOFS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_JFS_DEBUG is not set
+# CONFIG_JFS_STATISTICS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_NTFS_FS is not set
+# CONFIG_NTFS_RW is not set
+# CONFIG_HPFS_FS is not set
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_DEVFS_MOUNT is not set
+# CONFIG_DEVFS_DEBUG is not set
+CONFIG_DEVPTS_FS=y
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX4FS_RW is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_EXT2_FS=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UDF_FS is not set
+# CONFIG_UDF_RW is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_UFS_FS_WRITE is not set
+
+#
+# Network File Systems
+#
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=y
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_SUNRPC=y
+CONFIG_LOCKD=y
+# CONFIG_SMB_FS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_NCPFS_PACKET_SIGNING is not set
+# CONFIG_NCPFS_IOCTL_LOCKING is not set
+# CONFIG_NCPFS_STRONG is not set
+# CONFIG_NCPFS_NFS_NS is not set
+# CONFIG_NCPFS_OS2_NS is not set
+# CONFIG_NCPFS_SMALLDOS is not set
+# CONFIG_NCPFS_NLS is not set
+# CONFIG_NCPFS_EXTRAS is not set
+# CONFIG_ZISOFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+CONFIG_SGI_PARTITION=y
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SMB_NLS is not set
+# CONFIG_NLS is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Console drivers
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+
+#
+# Frame-buffer support
+#
+# CONFIG_FB is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_BANDWIDTH=y
+CONFIG_USB_LONG_TIMEOUT=y
+
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+CONFIG_USB_OHCI=y
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_MIDI is not set
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_HP8200e is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# USB Human Interface Devices (HID)
+#
+# CONFIG_USB_HID is not set
+
+#
+#     Input core support is needed for USB HID input layer or HIDBP support
+#
+# CONFIG_USB_HIDINPUT is not set
+# CONFIG_USB_HIDDEV is not set
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+# CONFIG_USB_AIPTEK is not set
+# CONFIG_USB_WACOM is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+
+#
+# USB Multimedia devices
+#
+
+#
+#   Video4Linux support is needed for USB Multimedia device support
+#
+
+#
+# USB Network adaptors
+#
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
+# CONFIG_USB_USBNET is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_TIGL is not set
+# CONFIG_USB_BRLVGER is not set
+# CONFIG_USB_LCD is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BLUEZ is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+# CONFIG_DEBUG is not set
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_MIPS_UNCACHED is not set
+
+#
+# Library routines
+#
+# CONFIG_ZLIB_INFLATE is not set
+# CONFIG_ZLIB_DEFLATE is not set
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/kernel/setup.c linux/arch/mips/kernel/setup.c
--- linux.orig/arch/mips/kernel/setup.c	Fri Jan 24 10:25:54 2003
+++ linux/arch/mips/kernel/setup.c	Tue Feb  4 15:24:28 2003
@@ -490,6 +490,7 @@
 	void victor_mpc30x_setup(void);
 	void ibm_workpad_setup(void);
 	void casio_e55_setup(void);
+	void tanbac_tb0226_setup(void);
 	void jmr3927_setup(void);
  	void it8172_setup(void);
 	void swarm_setup(void);
@@ -614,6 +615,11 @@
 #ifdef CONFIG_CASIO_E55
 		case MACH_CASIO_E55:
 			casio_e55_setup();
+			break;
+#endif
+#ifdef CONFIG_TANBAC_TB0226
+		case MACH_TANBAC_TB0226:
+			tanbac_tb0226_setup();
 			break;
 #endif
 		}
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/vr41xx/tanbac-tb0226/Makefile linux/arch/mips/vr41xx/tanbac-tb0226/Makefile
--- linux.orig/arch/mips/vr41xx/tanbac-tb0226/Makefile	Thu Jan  1 09:00:00 1970
+++ linux/arch/mips/vr41xx/tanbac-tb0226/Makefile	Tue Feb  4 15:24:28 2003
@@ -0,0 +1,19 @@
+#
+# Makefile for the TANBAC TB0226 specific parts of the kernel
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+USE_STANDARD_AS_RULE := true
+
+O_TARGET := tb0226.o
+
+all: tb0226.o
+
+obj-y	:= init.o setup.o
+
+obj-$(CONFIG_PCI)	+= pci_fixup.o
+
+include $(TOPDIR)/Rules.make
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/vr41xx/tanbac-tb0226/init.c linux/arch/mips/vr41xx/tanbac-tb0226/init.c
--- linux.orig/arch/mips/vr41xx/tanbac-tb0226/init.c	Thu Jan  1 09:00:00 1970
+++ linux/arch/mips/vr41xx/tanbac-tb0226/init.c	Tue Feb  4 15:24:28 2003
@@ -0,0 +1,68 @@
+/*
+ * FILE NAME
+ *	arch/mips/vr41xx/tanbac-tb0226/init.c
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	Initialisation code for the TANBAC TB0226.
+ *
+ * Copyright 2002,2003 Yoichi Yuasa
+ *                yuasa@hh.iij4u.or.jp
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License as published by the
+ *  Free Software Foundation; either version 2 of the License, or (at your
+ *  option) any later version.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+
+#include <asm/bootinfo.h>
+#include <asm/cpu.h>
+#include <asm/mipsregs.h>
+#include <asm/vr41xx/vr41xx.h>
+
+char arcs_cmdline[CL_SIZE];
+
+const char *get_system_type(void)
+{
+	return "TANBAC TB0226";
+}
+
+void __init bus_error_init(void)
+{
+}
+
+void __init prom_init(int argc, char **argv, unsigned long magic, int *prom_vec)
+{
+	u32 config;
+	int i;
+
+	/*
+	 * collect args and prepare cmd_line
+	 */
+	for (i = 1; i < argc; i++) {
+		strcat(arcs_cmdline, argv[i]);
+		if (i < (argc - 1))
+			strcat(arcs_cmdline, " ");
+	}
+
+	mips_machgroup = MACH_GROUP_NEC_VR41XX;
+	mips_machtype = MACH_TANBAC_TB0226;
+
+	switch (mips_cpu.processor_id) {
+	case PRID_VR4131_REV1_2:
+		config = read_c0_config();
+		config &= ~0x00000030UL;
+		config |= 0x00410000UL;
+		write_c0_config(config);
+		break;
+	default:
+		break;
+	}
+}
+
+void __init prom_free_prom_memory (void)
+{
+}
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/vr41xx/tanbac-tb0226/pci_fixup.c linux/arch/mips/vr41xx/tanbac-tb0226/pci_fixup.c
--- linux.orig/arch/mips/vr41xx/tanbac-tb0226/pci_fixup.c	Thu Jan  1 09:00:00 1970
+++ linux/arch/mips/vr41xx/tanbac-tb0226/pci_fixup.c	Tue Feb  4 15:24:28 2003
@@ -0,0 +1,87 @@
+/*
+ * FILE NAME
+ *	arch/mips/vr41xx/tanbac-tb0226/pci_fixup.c
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	The TANBAC TB0226 specific PCI fixups.
+ *
+ * Copyright 2002,2003 Yoichi Yuasa
+ *                yuasa@hh.iij4u.or.jp
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License as published by the
+ *  Free Software Foundation; either version 2 of the License, or (at your
+ *  option) any later version.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+
+#include <asm/vr41xx/tb0226.h>
+
+void __init pcibios_fixup_resources(struct pci_dev *dev)
+{
+}
+
+void __init pcibios_fixup(void)
+{
+}
+
+void __init pcibios_fixup_irqs(void)
+{
+	struct pci_dev *dev;
+	u8 slot, pin;
+
+	pci_for_each_dev(dev) {
+		slot = PCI_SLOT(dev->devfn);
+		dev->irq = 0;
+
+		switch (slot) {
+		case 12:
+			vr41xx_set_irq_trigger(GD82559_1_PIN, TRIGGER_LEVEL,
+			                       SIGNAL_THROUGH);
+			vr41xx_set_irq_level(GD82559_1_PIN, LEVEL_LOW);
+			dev->irq = GD82559_1_IRQ;
+			break;
+		case 13:
+			vr41xx_set_irq_trigger(GD82559_2_PIN, TRIGGER_LEVEL,
+			                       SIGNAL_THROUGH);
+			vr41xx_set_irq_level(GD82559_2_PIN, LEVEL_LOW);
+			dev->irq = GD82559_2_IRQ;
+			break;
+		case 14:
+			pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
+			switch (pin) {
+			case 1:
+				vr41xx_set_irq_trigger(UPD720100_INTA_PIN,
+				                       TRIGGER_LEVEL,
+				                       SIGNAL_THROUGH);
+				vr41xx_set_irq_level(UPD720100_INTA_PIN, LEVEL_LOW);
+				dev->irq = UPD720100_INTA_IRQ;
+				break;
+			case 2:
+				vr41xx_set_irq_trigger(UPD720100_INTB_PIN,
+				                       TRIGGER_LEVEL,
+				                       SIGNAL_THROUGH);
+				vr41xx_set_irq_level(UPD720100_INTB_PIN, LEVEL_LOW);
+				dev->irq = UPD720100_INTB_IRQ;
+				break;
+			case 3:
+				vr41xx_set_irq_trigger(UPD720100_INTC_PIN,
+				                       TRIGGER_LEVEL,
+				                       SIGNAL_THROUGH);
+				vr41xx_set_irq_level(UPD720100_INTC_PIN, LEVEL_LOW);
+				dev->irq = UPD720100_INTC_IRQ;
+				break;
+			}
+			break;
+		}
+
+		pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
+	}
+}
+
+unsigned int pcibios_assign_all_busses(void)
+{
+	return 0;
+}
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/vr41xx/tanbac-tb0226/setup.c linux/arch/mips/vr41xx/tanbac-tb0226/setup.c
--- linux.orig/arch/mips/vr41xx/tanbac-tb0226/setup.c	Thu Jan  1 09:00:00 1970
+++ linux/arch/mips/vr41xx/tanbac-tb0226/setup.c	Tue Feb  4 15:24:28 2003
@@ -0,0 +1,113 @@
+/*
+ * FILE NAME
+ *	arch/mips/vr41xx/tanbac-tb0226/setup.c
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	Setup for the TANBAC TB0226.
+ *
+ * Copyright 2002,2003 Yoichi Yuasa
+ *                yuasa@hh.iij4u.or.jp
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License as published by the
+ *  Free Software Foundation; either version 2 of the License, or (at your
+ *  option) any later version.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/console.h>
+#include <linux/ide.h>
+#include <linux/ioport.h>
+
+#include <asm/pci_channel.h>
+#include <asm/reboot.h>
+#include <asm/time.h>
+#include <asm/vr41xx/tb0226.h>
+
+#ifdef CONFIG_BLK_DEV_INITRD
+extern unsigned long initrd_start, initrd_end;
+extern void * __rd_start, * __rd_end;
+#endif
+
+#ifdef CONFIG_PCI
+static struct resource vr41xx_pci_io_resource = {
+	"PCI I/O space",
+	VR41XX_PCI_IO_START,
+	VR41XX_PCI_IO_END,
+	IORESOURCE_IO
+};
+
+static struct resource vr41xx_pci_mem_resource = {
+	"PCI memory space",
+	VR41XX_PCI_MEM_START,
+	VR41XX_PCI_MEM_END,
+	IORESOURCE_MEM
+};
+
+extern struct pci_ops vr41xx_pci_ops;
+
+struct pci_channel mips_pci_channels[] = {
+	{&vr41xx_pci_ops, &vr41xx_pci_io_resource, &vr41xx_pci_mem_resource, 0, 256},
+	{NULL, NULL, NULL, 0, 0}
+};
+
+struct vr41xx_pci_address_space vr41xx_pci_mem1 = {
+	VR41XX_PCI_MEM1_BASE,
+	VR41XX_PCI_MEM1_MASK,
+	IO_MEM1_RESOURCE_START
+};
+
+struct vr41xx_pci_address_space vr41xx_pci_mem2 = {
+	VR41XX_PCI_MEM2_BASE,
+	VR41XX_PCI_MEM2_MASK,
+	IO_MEM2_RESOURCE_START
+};
+
+struct vr41xx_pci_address_space vr41xx_pci_io = {
+	VR41XX_PCI_IO_BASE,
+	VR41XX_PCI_IO_MASK,
+	IO_PORT_RESOURCE_START
+};
+
+static struct vr41xx_pci_address_map pci_address_map = {
+	&vr41xx_pci_mem1,
+	&vr41xx_pci_mem2,
+	&vr41xx_pci_io
+};
+#endif
+
+void __init tanbac_tb0226_setup(void)
+{
+	set_io_port_base(IO_PORT_BASE);
+	ioport_resource.start = IO_PORT_RESOURCE_START;
+	ioport_resource.end = IO_PORT_RESOURCE_END;
+	iomem_resource.start = IO_MEM1_RESOURCE_START;
+	iomem_resource.end = IO_MEM2_RESOURCE_END;
+
+#ifdef CONFIG_BLK_DEV_INITRD
+	ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
+	initrd_start = (unsigned long)&__rd_start;
+	initrd_end = (unsigned long)&__rd_end;
+#endif
+
+	_machine_restart = vr41xx_restart;
+	_machine_halt = vr41xx_halt;
+	_machine_power_off = vr41xx_power_off;
+
+	board_time_init = vr41xx_time_init;
+	board_timer_setup = vr41xx_timer_setup;
+
+#ifdef CONFIG_FB
+	conswitchp = &dummy_con;
+#endif
+
+	vr41xx_bcu_init();
+
+	vr41xx_cmu_init(0);
+
+	vr41xx_siu_init(SIU_RS232C, 0);
+
+#ifdef CONFIG_PCI
+	vr41xx_pciu_init(&pci_address_map);
+#endif
+}
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/include/asm-mips/bootinfo.h linux/include/asm-mips/bootinfo.h
--- linux.orig/include/asm-mips/bootinfo.h	Wed Jan 29 10:29:12 2003
+++ linux/include/asm-mips/bootinfo.h	Tue Feb  4 15:24:28 2003
@@ -179,6 +179,7 @@
 #define MACH_VICTOR_MPC30X	3	/* Victor MP-C303/304 */
 #define MACH_IBM_WORKPAD	4	/* IBM WorkPad z50 */
 #define MACH_CASIO_E55		5	/* CASIO CASSIOPEIA E-10/15/55/65 */
+#define MACH_TANBAC_TB0226	6	/* TANBAC TB0226 (MBASE) */
 
 #define CL_SIZE			(256)
 
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/include/asm-mips/vr41xx/tb0226.h linux/include/asm-mips/vr41xx/tb0226.h
--- linux.orig/include/asm-mips/vr41xx/tb0226.h	Thu Jan  1 09:00:00 1970
+++ linux/include/asm-mips/vr41xx/tb0226.h	Tue Feb  4 15:24:28 2003
@@ -0,0 +1,69 @@
+/*
+ * FILE NAME
+ *	include/asm-mips/vr41xx/tb0226.h
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	Include file for TANBAC TB0226.
+ *
+ * Copyright 2002,2003 Yoichi Yuasa
+ *                yuasa@hh.iij4u.or.jp
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License as published by the
+ *  Free Software Foundation; either version 2 of the License, or (at your
+ *  option) any later version.
+ */
+#ifndef __TANBAC_TB0226_H
+#define __TANBAC_TB0226_H
+
+#include <asm/addrspace.h>
+#include <asm/vr41xx/vr41xx.h>
+
+/*
+ * Board specific address mapping
+ */
+#define VR41XX_PCI_MEM1_BASE		0x10000000
+#define VR41XX_PCI_MEM1_SIZE		0x04000000
+#define VR41XX_PCI_MEM1_MASK		0x7c000000
+
+#define VR41XX_PCI_MEM2_BASE		0x14000000
+#define VR41XX_PCI_MEM2_SIZE		0x02000000
+#define VR41XX_PCI_MEM2_MASK		0x7e000000
+
+#define VR41XX_PCI_IO_BASE		0x16000000
+#define VR41XX_PCI_IO_SIZE		0x02000000
+#define VR41XX_PCI_IO_MASK		0x7e000000
+
+#define VR41XX_PCI_IO_START		0x01000000
+#define VR41XX_PCI_IO_END		0x01ffffff
+
+#define VR41XX_PCI_MEM_START		0x12000000
+#define VR41XX_PCI_MEM_END		0x15ffffff
+
+#define IO_PORT_BASE			KSEG1ADDR(VR41XX_PCI_IO_BASE)
+#define IO_PORT_RESOURCE_START		0
+#define IO_PORT_RESOURCE_END		VR41XX_PCI_IO_SIZE
+#define IO_MEM1_RESOURCE_START		VR41XX_PCI_MEM1_BASE
+#define IO_MEM1_RESOURCE_END		(VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE)
+#define IO_MEM2_RESOURCE_START		VR41XX_PCI_MEM2_BASE
+#define IO_MEM2_RESOURCE_END		(VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE)
+
+/*
+ * General-Purpose I/O Pin Number
+ */
+#define GD82559_1_PIN			2
+#define GD82559_2_PIN			3
+#define UPD720100_INTA_PIN		4
+#define UPD720100_INTB_PIN		8
+#define UPD720100_INTC_PIN		13
+
+/*
+ * Interrupt Number
+ */
+#define GD82559_1_IRQ			GIU_IRQ(GD82559_1_PIN)
+#define GD82559_2_IRQ			GIU_IRQ(GD82559_2_PIN)
+#define UPD720100_INTA_IRQ		GIU_IRQ(UPD720100_INTA_PIN)
+#define UPD720100_INTB_IRQ		GIU_IRQ(UPD720100_INTB_PIN)
+#define UPD720100_INTC_IRQ		GIU_IRQ(UPD720100_INTC_PIN)
+
+#endif /* __TANBAC_TB0226_H */

--Multipart_Tue__4_Feb_2003_15:40:25_+0900_08258ab8--

From agx@sigxcpu.org Tue Feb  4 09:25:57 2003
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On Tue, Feb 04, 2003 at 05:13:23PM +1100, Andrew Clausen wrote:
> Some kernel parameters are auto-generated.   eg: root= (always has been
> broken).  Anyway, the old version of cmdline.c added these auto-generated
Can you explain in what way root= was broken?
 -- Guido

From ralf@linux-mips.org Tue Feb  4 12:44:13 2003
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From: Ralf Baechle <ralf@linux-mips.org>
To: Yoichi Yuasa <yoichi_yuasa@montavista.co.jp>
Cc: linux-mips@linux-mips.org
Subject: Re: [patch] TANBAC TB0226(NEC VR4131)
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On Tue, Feb 04, 2003 at 03:40:25PM +0900, Yoichi Yuasa wrote:

> This patch is based on linux_2_4 tag cvs tree on ftp.linux-mips.org
> Would you apply this patch to CVS on ftp.linux-mips.org?

Could you also make a patch against 2.5?  It's a huge PITA when 2.4 and
2.5 trees are diverging so I'd really like to have a patch for 2.5 also.

Patch applied,

  Ralf

From ralf@linux-mips.org Tue Feb  4 12:54:38 2003
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To: Vivien Chappelier <vivienc@nerim.net>
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Subject: Re: [PATCH 2.5] r4k_switch task_struct/thread_info fixes
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On Mon, Feb 03, 2003 at 11:21:50PM +0100, Vivien Chappelier wrote:

> 	This patch fixes an incorrect use of THREAD_FLAGS instead of
> TI_FLAGS when clearing the TIF_USEDFPU flag of the current thread info,
> and an incorrect assumption when using ST_OFF, that the stack is shared
> with task_struct, whereas it is shared with thread_info in 2.5.

Ok.  You missed r2300_switch.S though :)

  Ralf

From jormes@wideopenwest.com Tue Feb  4 15:33:03 2003
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Date: Tue, 04 Feb 2003 09:33:00 -0600
From: Jason Ormes <jormes@wideopenwest.com>
Subject: ip27-init.c problem
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Hello,

	I downloaded the linux_2_4 branch from the cvs repository and am
trying to build a kernel for an origin 200.  I'm using
binutils-mips64-linux-2.13.1-1 and egcs-mips64-linux-1.1.2-4 on a redhat
8.0 system.  I am getting these errors in ip27-init.c when trying to
build the kernel.

mips64-linux-gcc -D__KERNEL__ -I/home/jason/mips/linux/include -Wall
-Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common
-fomit-frame-pointer -I /home/jason/mips/linux/include/asm/gcc -mabi=64
-G 0 -mno-abicalls -fno-pic -Wa,--trap -pipe -mcpu=r8000 -mips4 -Wa,-32
-Wa,-mgp64   -nostdinc -iwithprefix include -DKBUILD_BASENAME=ip27_init
-c -o ip27-init.o ip27-init.c
ip27-init.c:48: parse error before `boot_cpumask'
ip27-init.c:48: warning: type defaults to `int' in declaration of
`boot_cpumask'
ip27-init.c:48: warning: data definition has no type or storage class
ip27-init.c:107: parse error before `cpumask_t'
ip27-init.c:109: warning: function declaration isn't a prototype
ip27-init.c: In function `do_cpumask':
ip27-init.c:116: `nasid' undeclared (first use in this function)
ip27-init.c:116: (Each undeclared identifier is reported only once
ip27-init.c:116: for each function it appears in.)
ip27-init.c:124: `cnode' undeclared (first use in this function)
ip27-init.c:125: `highest' undeclared (first use in this function)
ip27-init.c:130: warning: implicit declaration of function
`CPUMASK_SETB'
ip27-init.c:130: invalid type argument of `unary *'
ip27-init.c: At top level:
ip27-init.c:147: parse error before `*'
ip27-init.c:148: warning: function declaration isn't a prototype
ip27-init.c: In function `cpu_node_probe':
ip27-init.c:163: invalid type argument of `unary *'
ip27-init.c:170: invalid type argument of `unary *'
ip27-init.c: In function `cpu_enabled':
ip27-init.c:187: warning: implicit declaration of function
`CPUMASK_TSTB'
ip27-init.c: In function `mlreset':
ip27-init.c:203: warning: implicit declaration of function
`CPUMASK_CLRALL'
make[2]: *** [ip27-init.o] Error 1
make[2]: Leaving directory `/home/jason/mips/linux/arch/mips/sgi-ip27'
make[1]: *** [first_rule] Error 2
make[1]: Leaving directory `/home/jason/mips/linux/arch/mips/sgi-ip27'
make: *** [_dir_arch/mips/sgi-ip27] Error 2

I did 
make ARCH=mips64 clean
make ARCH=mips64 menuconfig and turned on ip27 support
make ARCH=mips64 deps
make ARCH=mips64 all

can someone point me in the right direction out of this problem?

Jason Ormes


From ralf@linux-mips.org Tue Feb  4 15:52:26 2003
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On Tue, Feb 04, 2003 at 09:33:00AM -0600, Jason Ormes wrote:

> 	I downloaded the linux_2_4 branch from the cvs repository and am
> trying to build a kernel for an origin 200.  I'm using
> binutils-mips64-linux-2.13.1-1 and egcs-mips64-linux-1.1.2-4 on a redhat
> 8.0 system.  I am getting these errors in ip27-init.c when trying to
> build the kernel.
> 
> mips64-linux-gcc -D__KERNEL__ -I/home/jason/mips/linux/include -Wall
> -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common
> -fomit-frame-pointer -I /home/jason/mips/linux/include/asm/gcc -mabi=64
> -G 0 -mno-abicalls -fno-pic -Wa,--trap -pipe -mcpu=r8000 -mips4 -Wa,-32
> -Wa,-mgp64   -nostdinc -iwithprefix include -DKBUILD_BASENAME=ip27_init
> -c -o ip27-init.o ip27-init.c
> ip27-init.c:48: parse error before `boot_cpumask'
> ip27-init.c:48: warning: type defaults to `int' in declaration of
> `boot_cpumask'
[...]

You're trying to build a uniprocessor kernel.  That's currently not supported.
Just enable CONFIG_SMP.  Do you actually have a uniprocessor Origin?

  Ralf

From vivienc@nerim.net Tue Feb  4 22:39:19 2003
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forgotten Cc:

---------- Forwarded message ----------
Date: Tue, 4 Feb 2003 22:09:08 +0100 (CET)
From: Vivien Chappelier <glaurung@vivienc.net1.nerim.net>
To: Ralf Baechle <ralf@linux-mips.org>
Subject: [PATCH 2.5] daily r4k_switch fixes

Hi,

	TIF_USEDFPU and _TIF_USEDFPU are not the same thing at all,
not surprisingly introducing bugs and confusion in r4k_switch.S
(mips64) and r2300_switch.S (mips) :)

On Tue, 4 Feb 2003, Ralf Baechle wrote:
> Ok.  You missed r2300_switch.S though :)

Not this time :)

Vivien.

Index: arch/mips/kernel/r2300_switch.S
===================================================================
RCS file: /home/cvs/linux/arch/mips/kernel/r2300_switch.S,v
retrieving revision 1.28
diff -u -r1.28 r2300_switch.S
--- arch/mips/kernel/r2300_switch.S	4 Feb 2003 12:53:57 -0000	1.28
+++ arch/mips/kernel/r2300_switch.S	4 Feb 2003 20:59:01 -0000
@@ -61,7 +61,7 @@
 	 */
 	lw	t3, TASK_THREAD_INFO(a0)
 	lw	t0, TI_FLAGS(t3)
-	li	t1, TIF_USEDFPU
+	li	t1, _TIF_USEDFPU
 	and	t2, t0, t1
 	beqz	t2, 1f
 	nor	t1, zero, t1
Index: arch/mips64/kernel/r4k_switch.S
===================================================================
RCS file: /home/cvs/linux/arch/mips64/kernel/r4k_switch.S,v
retrieving revision 1.23
diff -u -r1.23 r4k_switch.S
--- arch/mips64/kernel/r4k_switch.S	4 Feb 2003 12:53:57 -0000	1.23
+++ arch/mips64/kernel/r4k_switch.S	4 Feb 2003 20:59:09 -0000
@@ -56,7 +56,7 @@
 	 */
 	ld	t3, TASK_THREAD_INFO(a0)
 	ld	t0, TI_FLAGS(t3)
-	li	t1, TIF_USEDFPU
+	li	t1, _TIF_USEDFPU
 	and	t2, t0, t1
 	beqz	t2, 1f
 	nor	t1, zero, t1



From clausen@pureza.melbourne.sgi.com Tue Feb  4 22:40:49 2003
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Date: Wed, 5 Feb 2003 09:39:30 +1100
From: Andrew Clausen <clausen@melbourne.sgi.com>
To: Guido Guenther <agx@sigxcpu.org>,
	Linux-MIPS <linux-mips@linux-mips.org>
Subject: Re: [patch] cmdline.c rewrite
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On Tue, Feb 04, 2003 at 10:24:17AM +0100, Guido Guenther wrote:
> On Tue, Feb 04, 2003 at 05:13:23PM +1100, Andrew Clausen wrote:
> > Some kernel parameters are auto-generated.   eg: root= (always has been
> > broken).  Anyway, the old version of cmdline.c added these auto-generated
> Can you explain in what way root= was broken?

It was blindly copying from the environment variable a string
looking like dksc(0,1,2).  This should be translated (somehow)
to something looking like /dev/sdb1.  This would have to be
done after the hard disk probes.

Does Linux have some other notation for addressing devices by
their location on the bus?  (I recall a flamewar on the topic...)

Cheers,
Andrew


From vivienc@nerim.net Tue Feb  4 22:53:12 2003
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Subject: [PATCH 2.5] clear USEDFPU in copy_thread
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Hi,

	When copying a thread, access to the FPU is disabled by clearing
the ST0_CU1 bit in the new thread saved CP0_STATUS register. However, the
corresponding TIF_USEDFPU flag is not cleared at it should to indicate the
FPU has not yet been used by the new process.
	This patch also clears user_tid in mips64 code, and moves it away
from the FPU comment in the mips code.

Vivien.

Index: arch/mips64/kernel/process.c
===================================================================
RCS file: /home/cvs/linux/arch/mips64/kernel/process.c,v
retrieving revision 1.36
diff -u -r1.36 process.c
--- arch/mips64/kernel/process.c	9 Jan 2003 19:16:50 -0000	1.36
+++ arch/mips64/kernel/process.c	4 Feb 2003 22:47:00 -0000
@@ -114,6 +114,8 @@
 	p->thread.reg29 = (unsigned long) childregs;
 	p->thread.reg31 = (unsigned long) ret_from_fork;
 
+	p->user_tid = NULL;
+
 	/*
 	 * New tasks loose permission to use the fpu. This accelerates context
 	 * switching for most programs since they don't use the fpu.
@@ -121,6 +123,7 @@
 	p->thread.cp0_status = read_c0_status() &
                             ~(ST0_CU3|ST0_CU2|ST0_CU1|ST0_KSU);
 	childregs->cp0_status &= ~(ST0_CU3|ST0_CU2|ST0_CU1);
+	clear_ti_thread_flag(ti, TIF_USEDFPU);
 
 	return 0;
 }
Index: arch/mips/kernel/process.c
===================================================================
RCS file: /home/cvs/linux/arch/mips/kernel/process.c,v
retrieving revision 1.50
diff -u -r1.50 process.c
--- arch/mips/kernel/process.c	9 Jan 2003 19:16:50 -0000	1.50
+++ arch/mips/kernel/process.c	4 Feb 2003 22:47:04 -0000
@@ -117,6 +117,8 @@
 	p->thread.reg29 = (unsigned long) childregs;
 	p->thread.reg31 = (unsigned long) ret_from_fork;
 
+	p->user_tid = NULL;
+
 	/*
 	 * New tasks loose permission to use the fpu. This accelerates context
 	 * switching for most programs since they don't use the fpu.
@@ -124,7 +126,7 @@
 	p->thread.cp0_status = read_c0_status() &
                             ~(ST0_CU2|ST0_CU1|KU_MASK);
 	childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
-	p->user_tid = NULL;
+	clear_ti_thread_flag(ti, TIF_USEDFPU);
 
 	return 0;
 }


From vivienc@nerim.net Tue Feb  4 22:57:41 2003
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Hi,

	A mtc0 is missing in entry.S to disable interrupts while doing
ret_from_irq, ret_from_exception and resume_userspace.

Vivien.

Index: arch/mips64/kernel/entry.S
===================================================================
RCS file: /home/cvs/linux/arch/mips64/kernel/entry.S,v
retrieving revision 1.23
diff -u -r1.23 entry.S
--- arch/mips64/kernel/entry.S	9 Jan 2003 19:25:15 -0000	1.23
+++ arch/mips64/kernel/entry.S	4 Feb 2003 20:59:33 -0000
@@ -29,6 +29,7 @@
 		mfc0	t0, CP0_STATUS		# make sure need_resched and
 		ori	t0, t0, 1		# signals dont change between
 		xori	t0, t0, 1		# sampling and return
+		mtc0	t0, CP0_STATUS
 		SSNOP; SSNOP; SSNOP
 
 		LONG_L	a2, TI_FLAGS($28)


From agx@sigxcpu.org Tue Feb  4 23:13:27 2003
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From: Guido Guenther <agx@sigxcpu.org>
To: linux-mips@linux-mips.org
Subject: Re: [patch] cmdline.c rewrite
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On Wed, Feb 05, 2003 at 09:39:30AM +1100, Andrew Clausen wrote:
> It was blindly copying from the environment variable a string
> looking like dksc(0,1,2).  This should be translated (somehow)
> to something looking like /dev/sdb1.  This would have to be
> done after the hard disk probes.
If you set OSLoadPartition=/dev/sda1 (or whatever) - it allows you to
boot from hard disk without any boot loader involved. If you have a
bootloader (which is only true for IP22 [1]) it sets up the kernels
commandline properly anyway - so where's the problem? nfsroot?
 -- Guido

[1] talking only about SGI mips systems here

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Date: Wed, 5 Feb 2003 10:19:09 +1100
From: Andrew Clausen <clausen@melbourne.sgi.com>
To: Guido Guenther <agx@sigxcpu.org>, linux-mips@linux-mips.org
Subject: Re: [patch] cmdline.c rewrite
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On Wed, Feb 05, 2003 at 12:12:03AM +0100, Guido Guenther wrote:
> On Wed, Feb 05, 2003 at 09:39:30AM +1100, Andrew Clausen wrote:
> > It was blindly copying from the environment variable a string
> > looking like dksc(0,1,2).  This should be translated (somehow)
> > to something looking like /dev/sdb1.  This would have to be
> > done after the hard disk probes.
> If you set OSLoadPartition=/dev/sda1 (or whatever) - it allows you to
> boot from hard disk without any boot loader involved.

Huh?  The firmware uses something looking like OSLoadPartition=dksc(0,1,2),
not /dev/sda1.

>  If you have a
> bootloader (which is only true for IP22 [1]) it sets up the kernels
> commandline properly anyway - so where's the problem? nfsroot?

The problem is the firmware (on my IP27, anyway) uses a different
form to Linux for OSLoadPartition.  OSLoadPartition tells the
firmware / bootloader (sash here) where to find the kernel.

Cheers,
Andrew


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From: Guido Guenther <agx@sigxcpu.org>
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Subject: Re: [patch] cmdline.c rewrite
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On Wed, Feb 05, 2003 at 10:19:09AM +1100, Andrew Clausen wrote:
> Huh?  The firmware uses something looking like OSLoadPartition=dksc(0,1,2),
> not /dev/sda1.
Sure. But what we do on IP22 is to let the kernel look at OSLoadPartition and 
use that as the root device - so we're actually interested in
linux device names. This is basically done since we can't store the root
device in OSLoadOptions due to limited space.

> >  If you have a
> > bootloader (which is only true for IP22 [1]) it sets up the kernels
> > commandline properly anyway - so where's the problem? nfsroot?
> 
> The problem is the firmware (on my IP27, anyway) uses a different
> form to Linux for OSLoadPartition.  OSLoadPartition tells the
> firmware / bootloader (sash here) where to find the kernel.
Again: we don't care what the firmware wants here, we're interested what
the kernel expects. Why do you need sash for booting anyways? Can't
you let the PROM boot the kernel directly?

Anyways, I won't object to change OSLoadPartition, we have a bootloader
on IP22 so this isn't actually needed anymore.
 -- Guido

From clausen@pureza.melbourne.sgi.com Tue Feb  4 23:56:15 2003
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Date: Wed, 5 Feb 2003 10:55:43 +1100
From: Andrew Clausen <clausen@melbourne.sgi.com>
To: Guido Guenther <agx@sigxcpu.org>, linux-mips@linux-mips.org
Subject: Re: [patch] cmdline.c rewrite
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On Wed, Feb 05, 2003 at 12:45:29AM +0100, Guido Guenther wrote:
> On Wed, Feb 05, 2003 at 10:19:09AM +1100, Andrew Clausen wrote:
> > Huh?  The firmware uses something looking like OSLoadPartition=dksc(0,1,2),
> > not /dev/sda1.
> Sure. But what we do on IP22 is to let the kernel look at OSLoadPartition and 
> use that as the root device - so we're actually interested in
> linux device names. This is basically done since we can't store the root
> device in OSLoadOptions due to limited space.

Limited space?  Ah.  I understand now.

> > >  If you have a
> > > bootloader (which is only true for IP22 [1]) it sets up the kernels
> > > commandline properly anyway - so where's the problem? nfsroot?
> > 
> > The problem is the firmware (on my IP27, anyway) uses a different
> > form to Linux for OSLoadPartition.  OSLoadPartition tells the
> > firmware / bootloader (sash here) where to find the kernel.
>
> Again: we don't care what the firmware wants here,

I do.

> Why do you need sash for booting anyways? Can't
> you let the PROM boot the kernel directly?

No.  I can't figure out why.  In any case, the PROM uses OSLoadPartition
to find the kernel.

> Anyways, I won't object to change OSLoadPartition, we have a bootloader
> on IP22 so this isn't actually needed anymore.

It is on IP27.

So, we should obviously support OSLoadPartition=/dev/sda1 (=> root=/dev/sda1),
but it would also be nice to support OSLoadPartition=dksc(0,1,3).

Cheers,
Andrew

From jsun@orion.mvista.com Wed Feb  5 00:03:01 2003
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	linux-mips@linux-mips.org, jsun@mvista.com,
	Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [RFC & PATCH]  fixing tlb flush race problem on smp
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Here is a complete patch for both mips/mips64, 2.4 and 
2.5.  Of course only 2.4/mips combo is tested.

The clear_bit/set_bit actually need to be protected.
The flag setting needs to be in sync with the actual
hardware setting (set_entry_hi/set current pgd).  Otherwise
an tlb flushing IPI may does the wrong thing.

Jun

On Wed, Jan 29, 2003 at 09:06:27AM +0100, Ralf Baechle wrote:
> On Mon, Jan 27, 2003 at 05:03:46PM -0800, Jun Sun wrote:
> 
> > I also find a stupid typo and a subtle hole in my original patch.
> > Here is an updated version, for 2.4/mips only.  If it looks ok, I 
> > will extend to other sub-arches/trees.
> > 
> > This new one is pretty nice in that all mmu related operations
> > are put into one file and it is much easier to ensure correctness
> > later.
> 
> I like this one.
> 
> > +
> > +	/*
> > +	 * Mark current->active_mm as not "active" anymore.
> > +	 * We don't want to mislead possible IPI tlb flush routines.
> > +	 */
> > +	clear_bit(cpu, &prev->cpu_vm_mask);
> > +	set_bit(cpu, &next->cpu_vm_mask);
> > +
> > +	local_irq_restore(flags);
> 
> I don't think it's necessary to protect the clear_bit and set_bit operations
> with local_irq_save ... local_irq_restore.
> 
> In addition because switch_mm is always called with interrupts enabled you
> can simplify that to local_irq_disable ... local_irq_enable.
> 
>   Ralf
> 

--gBBFr7Ir9EOA20Yy
Content-Type: text/plain; charset=us-ascii
Content-Disposition: attachment; filename="030204-2.4-smp-tlb-flush.patch"

diff -Nru linux/arch/mips/mm/tlb-sb1.c.orig linux/arch/mips/mm/tlb-sb1.c
--- linux/arch/mips/mm/tlb-sb1.c.orig	Tue Feb  4 13:50:55 2003
+++ linux/arch/mips/mm/tlb-sb1.c	Tue Feb  4 14:01:24 2003
@@ -172,9 +172,7 @@
 			}
 			write_c0_entryhi(oldpid);
 		} else {
-			get_new_mmu_context(mm, cpu);
-			if (mm == current->active_mm)
-				write_c0_entryhi(cpu_asid(cpu, mm));
+			drop_mmu_context(mm, cpu);
 		}
 	}
 	local_irq_restore(flags);
@@ -253,17 +251,10 @@
    these entries, we just bump the asid. */
 void local_flush_tlb_mm(struct mm_struct *mm)
 {
-	unsigned long flags;
-	int cpu;
-	local_irq_save(flags);
-	cpu = smp_processor_id();
+	int cpu = smp_processor_id();
 	if (cpu_context(cpu, mm) != 0) {
-		get_new_mmu_context(mm, smp_processor_id());
-		if (mm == current->active_mm) {
-			write_c0_entryhi(cpu_asid(cpu, mm));
-		}
+		drop_mmu_context(mm, cpu);
 	}
-	local_irq_restore(flags);
 }
 
 /* Stolen from mips32 routines */
diff -Nru linux/arch/mips/mm/tlb-r4k.c.orig linux/arch/mips/mm/tlb-r4k.c
--- linux/arch/mips/mm/tlb-r4k.c.orig	Mon Jan 27 17:13:31 2003
+++ linux/arch/mips/mm/tlb-r4k.c	Tue Feb  4 14:15:04 2003
@@ -76,16 +76,10 @@
 	int cpu = smp_processor_id();
 
 	if (cpu_context(cpu, mm) != 0) {
-		unsigned long flags;
-
 #ifdef DEBUG_TLB
 		printk("[tlbmm<%d>]", cpu_context(cpu, mm));
 #endif
-		local_irq_save(flags);
-		get_new_mmu_context(mm, smp_processor_id());
-		if (mm == current->active_mm)
-			write_c0_entryhi(cpu_asid(cpu, mm));
-		local_irq_restore(flags);
+		drop_mmu_context(mm,cpu);
 	}
 }
 
@@ -133,9 +127,7 @@
 			}
 			write_c0_entryhi(oldpid);
 		} else {
-			get_new_mmu_context(mm, smp_processor_id());
-			if (mm == current->active_mm)
-				write_c0_entryhi(cpu_asid(cpu, mm));
+			drop_mmu_context(mm, cpu);
 		}
 		local_irq_restore(flags);
 	}
diff -Nru linux/arch/mips/mm/tlb-r3k.c.orig linux/arch/mips/mm/tlb-r3k.c
--- linux/arch/mips/mm/tlb-r3k.c.orig	Mon Jan 27 17:13:31 2003
+++ linux/arch/mips/mm/tlb-r3k.c	Tue Feb  4 14:09:04 2003
@@ -69,16 +69,10 @@
 	int cpu = smp_processor_id();
 
 	if (cpu_context(cpu, mm) != 0) {
-		unsigned long flags;
-
 #ifdef DEBUG_TLB
 		printk("[tlbmm<%lu>]", (unsigned long)cpu_context(cpu, mm));
 #endif
-		local_irq_save(flags);
-		get_new_mmu_context(mm, smp_processor_id());
-		if (mm == current->active_mm)
-			write_c0_entryhi(cpu_asid(cpu, mm));
-		local_irq_restore(flags);
+		drop_mmu_context(mm, cpu);
 	}
 }
 
@@ -119,9 +113,7 @@
 			}
 			write_c0_entryhi(oldpid);
 		} else {
-			get_new_mmu_context(mm, smp_processor_id());
-			if (mm == current->active_mm)
-				write_c0_entryhi(cpu_asid(cpu, mm));
+			drop_mmu_context(mm, cpu);
 		}
 		local_irq_restore(flags);
 	}
diff -Nru linux/arch/mips64/mm/tlb-sb1.c.orig linux/arch/mips64/mm/tlb-sb1.c
--- linux/arch/mips64/mm/tlb-sb1.c.orig	Mon Jan 27 17:13:34 2003
+++ linux/arch/mips64/mm/tlb-sb1.c	Tue Feb  4 14:45:58 2003
@@ -180,9 +180,7 @@
 			}
 			write_c0_entryhi(oldpid);
 		} else {
-			get_new_mmu_context(mm, cpu);
-			if (mm == current->active_mm)
-				write_c0_entryhi(cpu_asid(cpu, mm));
+			drop_mmu_context(mm, cpu);
 		}
 	}
 	local_irq_restore(flags);
@@ -231,17 +229,10 @@
    these entries, we just bump the asid. */
 void local_flush_tlb_mm(struct mm_struct *mm)
 {
-	unsigned long flags;
-	int cpu;
-	local_irq_save(flags);
-	cpu = smp_processor_id();
+	int cpu = smp_processor_id();
 	if (cpu_context(cpu, mm) != 0) {
-		get_new_mmu_context(mm, smp_processor_id());
-		if (mm == current->active_mm) {
-			write_c0_entryhi(cpu_asid(cpu, mm));
-		}
+		drop_mmu_context(mm, cpu);
 	}
-	local_irq_restore(flags);
 }
 
 /* Stolen from mips32 routines */
diff -Nru linux/arch/mips64/mm/tlb-r4k.c.orig linux/arch/mips64/mm/tlb-r4k.c
--- linux/arch/mips64/mm/tlb-r4k.c.orig	Mon Jan 27 17:13:34 2003
+++ linux/arch/mips64/mm/tlb-r4k.c	Tue Feb  4 14:47:52 2003
@@ -80,16 +80,10 @@
 	int cpu = smp_processor_id();
 
 	if (cpu_context(cpu, mm) != 0) {
-		unsigned long flags;
-
 #ifdef DEBUG_TLB
 		printk("[tlbmm<%d>]", mm->context);
 #endif
-		local_irq_save(flags);
-		get_new_mmu_context(mm, cpu);
-		if (mm == current->active_mm)
-			write_c0_entryhi(cpu_asid(cpu, mm));
-		local_irq_restore(flags);
+		drop_mmu_context(mm,cpu);
 	}
 }
 
@@ -137,9 +131,7 @@
 			}
 			write_c0_entryhi(oldpid);
 		} else {
-			get_new_mmu_context(mm, cpu);
-			if (mm == current->active_mm)
-				write_c0_entryhi(cpu_asid(cpu, mm));
+			drop_mmu_context(mm, cpu);
 		}
 		local_irq_restore(flags);
 	}
diff -Nru linux/arch/mips64/mm/tlb-andes.c.orig linux/arch/mips64/mm/tlb-andes.c
--- linux/arch/mips64/mm/tlb-andes.c.orig	Tue Feb  4 13:13:43 2003
+++ linux/arch/mips64/mm/tlb-andes.c	Tue Feb  4 14:49:59 2003
@@ -53,18 +53,12 @@
 
 void local_flush_tlb_mm(struct mm_struct *mm)
 {
-	if (cpu_context(smp_processor_id(), mm) != 0) {
-		unsigned long flags;
-
+	int cpu = smp_processor_id();
+	if (cpu_context(cpu, mm) != 0) {
 #ifdef DEBUG_TLB
 		printk("[tlbmm<%d>]", mm->context);
 #endif
-		local_irq_save(flags);
-		get_new_mmu_context(mm, smp_processor_id());
-		if (mm == current->active_mm)
-			write_c0_entryhi(cpu_context(smp_processor_id(), mm)
-				    & ASID_MASK);
-		local_irq_restore(flags);
+		drop_mmu_context(mm,cpu);
 	}
 }
 
@@ -106,10 +100,7 @@
 			}
 			write_c0_entryhi(oldpid);
 		} else {
-			get_new_mmu_context(mm, smp_processor_id());
-			if (mm == current->active_mm)
-				write_c0_entryhi(cpu_context(smp_processor_id(), mm)
-					    & ASID_MASK);
+			drop_mmu_context(mm, cpu);
 		}
 		local_irq_restore(flags);
 	}
diff -Nru linux/include/asm-mips/mmu_context.h.orig linux/include/asm-mips/mmu_context.h
--- linux/include/asm-mips/mmu_context.h.orig	Tue Feb  4 13:50:55 2003
+++ linux/include/asm-mips/mmu_context.h	Tue Feb  4 13:51:03 2003
@@ -89,12 +89,25 @@
 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
                              struct task_struct *tsk, unsigned cpu)
 {
+	unsigned long flags;
+
+	local_irq_save(flags);
+
 	/* Check if our ASID is of an older version and thus invalid */
 	if ((cpu_context(cpu, next) ^ asid_cache(cpu)) & ASID_VERSION_MASK)
 		get_new_mmu_context(next, cpu);
 
 	write_c0_entryhi(cpu_context(cpu, next));
 	TLBMISS_HANDLER_SETUP_PGD(next->pgd);
+
+	/*
+	 * Mark current->active_mm as not "active" anymore.
+	 * We don't want to mislead possible IPI tlb flush routines.
+	 */
+	clear_bit(cpu, &prev->cpu_vm_mask);
+	set_bit(cpu, &next->cpu_vm_mask);
+
+	local_irq_restore(flags);
 }
 
 /*
@@ -112,11 +125,39 @@
 static inline void
 activate_mm(struct mm_struct *prev, struct mm_struct *next)
 {
+	unsigned long flags;
+
+	local_irq_save(flags);
+
 	/* Unconditionally get a new ASID.  */
 	get_new_mmu_context(next, smp_processor_id());
 
 	write_c0_entryhi(cpu_context(smp_processor_id(), next));
 	TLBMISS_HANDLER_SETUP_PGD(next->pgd);
+	
+	local_irq_restore(flags);
+}
+
+/*
+ * If mm is currently active_mm, we can't really drop it.  Instead,
+ * we will get a new one for it.
+ */
+static inline void
+drop_mmu_context(struct mm_struct *mm, unsigned cpu)
+{
+	unsigned long flags;
+
+	local_irq_save(flags);
+
+	if (test_bit(cpu, &mm->cpu_vm_mask))  {
+		get_new_mmu_context(mm, cpu);
+		set_entryhi(CPU_CONTEXT(cpu, mm) & 0xff);
+	} else {
+		/* will get a new context next time */
+		CPU_CONTEXT(cpu, mm) = 0;
+	}
+
+	local_irq_restore(flags);
 }
 
 #endif /* _ASM_MMU_CONTEXT_H */
diff -Nru linux/include/asm-mips64/mmu_context.h.orig linux/include/asm-mips64/mmu_context.h
--- linux/include/asm-mips64/mmu_context.h.orig	Tue Jan 21 13:55:43 2003
+++ linux/include/asm-mips64/mmu_context.h	Tue Feb  4 14:46:00 2003
@@ -80,12 +80,25 @@
 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
                              struct task_struct *tsk, unsigned cpu)
 {
+	unsigned long flags;
+
+	local_irq_save(flags);
+
 	/* Check if our ASID is of an older version and thus invalid */
 	if ((cpu_context(cpu, next) ^ asid_cache(cpu)) & ASID_VERSION_MASK)
 		get_new_mmu_context(next, cpu);
 
 	write_c0_entryhi(cpu_context(cpu, next));
 	TLBMISS_HANDLER_SETUP_PGD(next->pgd);
+
+	/*
+	 * Mark current->active_mm as not "active" anymore.
+	 * We don't want to mislead possible IPI tlb flush routines.
+	 */
+	clear_bit(cpu, &prev->cpu_vm_mask);
+	set_bit(cpu, &next->cpu_vm_mask);
+
+	local_irq_restore(flags);
 }
 
 /*
@@ -103,11 +116,39 @@
 static inline void
 activate_mm(struct mm_struct *prev, struct mm_struct *next)
 {
+	unsigned long flags;
+
+	local_irq_save(flags);
+
 	/* Unconditionally get a new ASID.  */
 	get_new_mmu_context(next, smp_processor_id());
 
 	write_c0_entryhi(cpu_context(smp_processor_id(), next));
 	TLBMISS_HANDLER_SETUP_PGD(next->pgd);
+	
+	local_irq_restore(flags);
+}
+
+/*
+ * If mm is currently active_mm, we can't really drop it.  Instead,
+ * we will get a new one for it.
+ */
+static inline void
+drop_mmu_context(struct mm_struct *mm, unsigned cpu)
+{
+	unsigned long flags;
+
+	local_irq_save(flags);
+
+	if (test_bit(cpu, &mm->cpu_vm_mask))  {
+		get_new_mmu_context(mm, cpu);
+		set_entryhi(CPU_CONTEXT(cpu, mm) & 0xff);
+	} else {
+		/* will get a new context next time */
+		CPU_CONTEXT(cpu, mm) = 0;
+	}
+
+	local_irq_restore(flags);
 }
 
 #endif /* _ASM_MMU_CONTEXT_H */

--gBBFr7Ir9EOA20Yy
Content-Type: text/plain; charset=us-ascii
Content-Disposition: attachment; filename="030204-2.5-smp-tlb-flush.patch"

diff -Nru linux/arch/mips/mm/tlb-sb1.c.orig linux/arch/mips/mm/tlb-sb1.c
--- linux/arch/mips/mm/tlb-sb1.c.orig	Wed Dec 11 17:04:17 2002
+++ linux/arch/mips/mm/tlb-sb1.c	Tue Feb  4 15:00:53 2003
@@ -172,15 +172,7 @@
 			}
 			write_c0_entryhi(oldpid);
 		} else {
-			get_new_mmu_context(mm, cpu);
-			if (mm == current->active_mm) {
-				write_c0_entryhi(cpu_asid(cpu, mm));
-			} else if (!(cpu_asid(cpu, mm)) &&
-				   cpu_context(cpu, current->active_mm)) {
-				/* Just wrapped ASIDs, bump the active one */
-				get_new_mmu_context(current->active_mm, cpu);
-				write_c0_entryhi(cpu_context(cpu, current->active_mm)& 0xff);
-			}
+			drop_mmu_context(mm, cpu);
 		}
 	}
 	local_irq_restore(flags);
@@ -325,17 +317,10 @@
    these entries, we just bump the asid. */
 void local_flush_tlb_mm(struct mm_struct *mm)
 {
-	unsigned long flags;
-	int cpu;
-	local_irq_save(flags);
-	cpu = smp_processor_id();
+	int cpu = smp_processor_id();
 	if (cpu_context(cpu, mm) != 0) {
-		get_new_mmu_context(mm, smp_processor_id());
-		if (mm == current->active_mm) {
-			write_c0_entryhi(cpu_context(cpu, mm) & 0xff);
-		}
+		drop_mmu_context(mm, cpu);
 	}
-	local_irq_restore(flags);
 }
 
 /* Stolen from mips32 routines */
diff -Nru linux/arch/mips/mm/tlb-r4k.c.orig linux/arch/mips/mm/tlb-r4k.c
--- linux/arch/mips/mm/tlb-r4k.c.orig	Mon Jan 27 18:03:21 2003
+++ linux/arch/mips/mm/tlb-r4k.c	Tue Feb  4 15:04:29 2003
@@ -76,16 +76,10 @@
 	int cpu = smp_processor_id();
 
 	if (cpu_context(cpu, mm) != 0) {
-		unsigned long flags;
-
 #ifdef DEBUG_TLB
 		printk("[tlbmm<%d>]", cpu_context(cpu, mm));
 #endif
-		local_irq_save(flags);
-		get_new_mmu_context(mm, smp_processor_id());
-		if (mm == current->active_mm)
-			write_c0_entryhi(cpu_context(cpu, mm) & ASID_MASK);
-		local_irq_restore(flags);
+		drop_mmu_context(mm,cpu);
 	}
 }
 
@@ -134,9 +128,7 @@
 			}
 			write_c0_entryhi(oldpid);
 		} else {
-			get_new_mmu_context(mm, smp_processor_id());
-			if (mm == current->active_mm)
-				write_c0_entryhi(cpu_context(cpu, mm) & ASID_MASK);
+			drop_mmu_context(mm, cpu);
 		}
 		local_irq_restore(flags);
 	}
diff -Nru linux/arch/mips/mm/tlb-r3k.c.orig linux/arch/mips/mm/tlb-r3k.c
--- linux/arch/mips/mm/tlb-r3k.c.orig	Mon Jan 27 18:03:21 2003
+++ linux/arch/mips/mm/tlb-r3k.c	Tue Feb  4 15:05:22 2003
@@ -69,16 +69,10 @@
 	int cpu = smp_processor_id();
 
 	if (cpu_context(cpu, mm) != 0) {
-		unsigned long flags;
-
 #ifdef DEBUG_TLB
 		printk("[tlbmm<%lu>]", (unsigned long)cpu_context(cpu, mm));
 #endif
-		local_irq_save(flags);
-		get_new_mmu_context(mm, cpu);
-		if (mm == current->active_mm)
-			write_c0_entryhi(cpu_context(cpu, mm) & ASID_MASK);
-		local_irq_restore(flags);
+		drop_mmu_context(mm, cpu);
 	}
 }
 
@@ -120,9 +114,7 @@
 			}
 			write_c0_entryhi(oldpid);
 		} else {
-			get_new_mmu_context(mm, smp_processor_id());
-			if (mm == current->active_mm)
-				write_c0_entryhi(cpu_context(cpu, mm) & ASID_MASK);
+			drop_mmu_context(mm, cpu);
 		}
 		local_irq_restore(flags);
 	}
diff -Nru linux/arch/mips64/mm/tlb-sb1.c.orig linux/arch/mips64/mm/tlb-sb1.c
--- linux/arch/mips64/mm/tlb-sb1.c.orig	Wed Dec 11 17:04:19 2002
+++ linux/arch/mips64/mm/tlb-sb1.c	Tue Feb  4 15:07:42 2003
@@ -180,9 +180,7 @@
 			}
 			write_c0_entryhi(oldpid);
 		} else {
-			get_new_mmu_context(mm, cpu);
-			if (mm == current->active_mm)
-				write_c0_entryhi(cpu_context(cpu, mm) & 0xff);
+			drop_mmu_context(mm, cpu);
 		}
 	}
 	local_irq_restore(flags);
@@ -268,17 +266,10 @@
    these entries, we just bump the asid. */
 void local_flush_tlb_mm(struct mm_struct *mm)
 {
-	unsigned long flags;
-	int cpu;
-	local_irq_save(flags);
-	cpu = smp_processor_id();
+	int cpu = smp_processor_id();
 	if (cpu_context(cpu, mm) != 0) {
-		get_new_mmu_context(mm, smp_processor_id());
-		if (mm == current->active_mm) {
-			write_c0_entryhi(cpu_context(cpu, mm) & 0xff);
-		}
+		drop_mmu_context(mm, cpu);
 	}
-	local_irq_restore(flags);
 }
 
 /* Stolen from mips32 routines */
diff -Nru linux/arch/mips64/mm/tlb-r4k.c.orig linux/arch/mips64/mm/tlb-r4k.c
--- linux/arch/mips64/mm/tlb-r4k.c.orig	Mon Jan 27 18:03:22 2003
+++ linux/arch/mips64/mm/tlb-r4k.c	Tue Feb  4 15:08:21 2003
@@ -80,16 +80,10 @@
 	int cpu = smp_processor_id();
 
 	if (cpu_context(cpu, mm) != 0) {
-		unsigned long flags;
-
 #ifdef DEBUG_TLB
 		printk("[tlbmm<%d>]", cpu_context(cpu, mm));
 #endif
-		local_irq_save(flags);
-		get_new_mmu_context(mm, cpu);
-		if (mm == current->active_mm)
-			write_c0_entryhi(cpu_asid(cpu, mm));
-		local_irq_restore(flags);
+		drop_mmu_context(mm,cpu);
 	}
 }
 
@@ -138,9 +132,7 @@
 			}
 			write_c0_entryhi(oldpid);
 		} else {
-			get_new_mmu_context(mm, cpu);
-			if (mm == current->active_mm)
-				write_c0_entryhi(cpu_asid(cpu, mm));
+			drop_mmu_context(mm, cpu);
 		}
 		local_irq_restore(flags);
 	}
diff -Nru linux/arch/mips64/mm/tlb-andes.c.orig linux/arch/mips64/mm/tlb-andes.c
--- linux/arch/mips64/mm/tlb-andes.c.orig	Tue Feb  4 13:14:43 2003
+++ linux/arch/mips64/mm/tlb-andes.c	Tue Feb  4 14:53:28 2003
@@ -53,18 +53,12 @@
 
 void local_flush_tlb_mm(struct mm_struct *mm)
 {
-	if (cpu_context(smp_processor_id(), mm) != 0) {
-		unsigned long flags;
-
+	int cpu = smp_processor_id();
+	if (cpu_context(cpu, mm) != 0) {
 #ifdef DEBUG_TLB
 		printk("[tlbmm<%d>]", mm->context);
 #endif
-		local_irq_save(flags);
-		get_new_mmu_context(mm, smp_processor_id());
-		if (mm == current->active_mm)
-			write_c0_entryhi(cpu_context(smp_processor_id(), mm)
-				    & ASID_MASK);
-		local_irq_restore(flags);
+		drop_mmu_context(mm,cpu);
 	}
 }
 
@@ -108,10 +102,7 @@
 			}
 			write_c0_entryhi(oldpid);
 		} else {
-			get_new_mmu_context(mm, smp_processor_id());
-			if (mm == current->active_mm)
-				write_c0_entryhi(cpu_context(smp_processor_id(), mm)
-					    & ASID_MASK);
+			drop_mmu_context(mm, cpu);
 		}
 		local_irq_restore(flags);
 	}
diff -Nru linux/include/asm-mips/mmu_context.h.orig linux/include/asm-mips/mmu_context.h
--- linux/include/asm-mips/mmu_context.h.orig	Mon Jan 27 18:03:23 2003
+++ linux/include/asm-mips/mmu_context.h	Tue Feb  4 14:53:28 2003
@@ -92,12 +92,25 @@
 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
                              struct task_struct *tsk, unsigned cpu)
 {
+	unsigned long flags;
+
+	local_irq_save(flags);
+
 	/* Check if our ASID is of an older version and thus invalid */
 	if ((cpu_context(cpu, next) ^ asid_cache(cpu)) & ASID_VERSION_MASK)
 		get_new_mmu_context(next, cpu);
 
 	write_c0_entryhi(cpu_context(cpu, next));
 	TLBMISS_HANDLER_SETUP_PGD(next->pgd);
+
+	/*
+	 * Mark current->active_mm as not "active" anymore.
+	 * We don't want to mislead possible IPI tlb flush routines.
+	 */
+	clear_bit(cpu, &prev->cpu_vm_mask);
+	set_bit(cpu, &next->cpu_vm_mask);
+
+	local_irq_restore(flags);
 }
 
 /*
@@ -115,11 +128,39 @@
 static inline void
 activate_mm(struct mm_struct *prev, struct mm_struct *next)
 {
+	unsigned long flags;
+
+	local_irq_save(flags);
+
 	/* Unconditionally get a new ASID.  */
 	get_new_mmu_context(next, smp_processor_id());
 
 	write_c0_entryhi(cpu_context(smp_processor_id(), next));
 	TLBMISS_HANDLER_SETUP_PGD(next->pgd);
+	
+	local_irq_restore(flags);
+}
+
+/*
+ * If mm is currently active_mm, we can't really drop it.  Instead,
+ * we will get a new one for it.
+ */
+static inline void
+drop_mmu_context(struct mm_struct *mm, unsigned cpu)
+{
+	unsigned long flags;
+
+	local_irq_save(flags);
+
+	if (test_bit(cpu, &mm->cpu_vm_mask))  {
+		get_new_mmu_context(mm, cpu);
+		set_entryhi(CPU_CONTEXT(cpu, mm) & 0xff);
+	} else {
+		/* will get a new context next time */
+		CPU_CONTEXT(cpu, mm) = 0;
+	}
+
+	local_irq_restore(flags);
 }
 
 #endif /* _ASM_MMU_CONTEXT_H */
diff -Nru linux/include/asm-mips64/mmu_context.h.orig linux/include/asm-mips64/mmu_context.h
--- linux/include/asm-mips64/mmu_context.h.orig	Mon Jan 27 18:03:23 2003
+++ linux/include/asm-mips64/mmu_context.h	Tue Feb  4 14:53:28 2003
@@ -83,12 +83,25 @@
 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
                              struct task_struct *tsk, unsigned cpu)
 {
+	unsigned long flags;
+
+	local_irq_save(flags);
+
 	/* Check if our ASID is of an older version and thus invalid */
 	if ((cpu_context(cpu, next) ^ asid_cache(cpu)) & ASID_VERSION_MASK)
 		get_new_mmu_context(next, cpu);
 
 	write_c0_entryhi(cpu_context(cpu, next));
 	TLBMISS_HANDLER_SETUP_PGD(next->pgd);
+
+	/*
+	 * Mark current->active_mm as not "active" anymore.
+	 * We don't want to mislead possible IPI tlb flush routines.
+	 */
+	clear_bit(cpu, &prev->cpu_vm_mask);
+	set_bit(cpu, &next->cpu_vm_mask);
+
+	local_irq_restore(flags);
 }
 
 /*
@@ -106,11 +119,39 @@
 static inline void
 activate_mm(struct mm_struct *prev, struct mm_struct *next)
 {
+	unsigned long flags;
+
+	local_irq_save(flags);
+
 	/* Unconditionally get a new ASID.  */
 	get_new_mmu_context(next, smp_processor_id());
 
 	write_c0_entryhi(cpu_context(smp_processor_id(), next));
 	TLBMISS_HANDLER_SETUP_PGD(next->pgd);
+	
+	local_irq_restore(flags);
+}
+
+/*
+ * If mm is currently active_mm, we can't really drop it.  Instead,
+ * we will get a new one for it.
+ */
+static inline void
+drop_mmu_context(struct mm_struct *mm, unsigned cpu)
+{
+	unsigned long flags;
+
+	local_irq_save(flags);
+
+	if (test_bit(cpu, &mm->cpu_vm_mask))  {
+		get_new_mmu_context(mm, cpu);
+		set_entryhi(CPU_CONTEXT(cpu, mm) & 0xff);
+	} else {
+		/* will get a new context next time */
+		CPU_CONTEXT(cpu, mm) = 0;
+	}
+
+	local_irq_restore(flags);
 }
 
 #endif /* _ASM_MMU_CONTEXT_H */

--gBBFr7Ir9EOA20Yy--

From agx@sigxcpu.org Wed Feb  5 00:08:55 2003
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From: Guido Guenther <agx@sigxcpu.org>
To: linux-mips@linux-mips.org
Subject: Re: [patch] cmdline.c rewrite
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On Wed, Feb 05, 2003 at 10:55:43AM +1100, Andrew Clausen wrote:
> No.  I can't figure out why.  In any case, the PROM uses OSLoadPartition
> to find the kernel.
On IP22 the PROM uses SystemPartition to find the kernel/bootloader.
We set it to something like scsi(0)disk(1)rdisk(0)partition(8) to grab
it from the vh. Is SystemPartition used differently on IP27?

[..snip..]
> So, we should obviously support OSLoadPartition=/dev/sda1 (=> root=/dev/sda1),
> but it would also be nice to support OSLoadPartition=dksc(0,1,3).
Well we could either check if OSLoadPartition matches the linux device
naming scheme or the other way around and see if it looks like a valid
device identifier used by the PROM (I'd prefer the later, though) - or
simply make the OSLoadPartition <-> root= mapping '#ifdef CONFIG_SGI_IP22'.
 -- Guido

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From: Andrew Clausen <clausen@melbourne.sgi.com>
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On Wed, Feb 05, 2003 at 01:07:35AM +0100, Guido Guenther wrote:
> On IP22 the PROM uses SystemPartition to find the kernel/bootloader.
> We set it to something like scsi(0)disk(1)rdisk(0)partition(8) to grab
> it from the vh. Is SystemPartition used differently on IP27?

I think SystemPartition is ignored (haven't been able to see any
evidence to the contrary... I should look in the source...)

> [..snip..]
> > So, we should obviously support OSLoadPartition=/dev/sda1 (=> root=/dev/sda1),
> > but it would also be nice to support OSLoadPartition=dksc(0,1,3).
> Well we could either check if OSLoadPartition matches the linux device
> naming scheme or the other way around and see if it looks like a valid
> device identifier used by the PROM (I'd prefer the later, though) - or
> simply make the OSLoadPartition <-> root= mapping '#ifdef CONFIG_SGI_IP22'.

I think the middle option (the one you prefer) of matching dksc(0,1,3)
and converting it /dev/sda2 is best.  Just, it has to happen after the
hard disks are probed - /dev/sdXY are allocated dynamically (in
a predictable-for-end-user way), so you need to find out what it was
allocated to.  Is this doable in a nice way?

BTW, I think file system labels are a much better way of identifying FSs.

Perhaps this discussion is irrelevant... people who are using
OSLoadPartition to control their bootloader should just add a root=
option.

Cheers,
Andrew


From jormes@wideopenwest.com Wed Feb  5 00:36:27 2003
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hello,

can someone help me with this error?  Is this because the network failed?

scsi0 : QLogic ISP1020 SCSI on PCI bus 00 device 00 irq 4 I/O base 0x8200000
scsi1 : QLogic ISP1020 SCSI on PCI bus 00 device 08 irq 5 I/O base 0x8400000
eth0: Auto-Negotiation unsuccessful, trying force link mode
Slice A got dbe at 0xffffffff801882fc
Hub information:
ERR_INT_PEND = 0x200100
Hub has valid error information:
Overrun is set.  Error stack may contain additional information.
Hub error address is 02400208
Incoming message command 0x9e
Supplemental field of incoming message is 0x7f8
T5 Rn (for RRB only) is 0x0
Error type is Uncached Partial Read PRERR
Cpu 0
$0      : 0000000000000000 0000000014001ce0 a8000000013b1040 a8000000013b1000
$4      : a8000000013b1080 0000000000000000 0000000000000040 ffffffff80284688
$8      : 0000000014001ce1 0000000000000000 a8000000012d3c70 0000000000000004
$12     : 0000000000000000 a8000000013b1080 a8000000012d3c80 ffffffff8026e468
$16     : a8000000013b1040 0000000000000002 a8000000013b0400 a8000000003840c0
$20     : a800000000384000 0000000000000040 0000000000000001 a8000000013a7e00
$24     : 0000000000000040 0000000000000020
$28     : a8000000012d0000 a8000000012d3af0 0000000000000000 ffffffff8010ecd8
Hi      : 0000000000000000
Lo      : 0000000000000040
epc     : ffffffff801882fc    Not tainted
badvaddr: 0000000000000000
Status  : 14001ce2  [ KX SX UX KERNEL EXL ]
Cause   : 0000901c
Index:  0 pgmask=4kb va=c0000fff80000000 asid=00
        [pa=00000000000 c=0 d=0 v=0 g=0] [pa=00000000000 c=0 d=0 v=0 g=0]
Index:  1 pgmask=4kb va=c0000fff80000000 asid=00
        [pa=00000000000 c=0 d=0 v=0 g=0] [pa=00000000000 c=0 d=0 v=0 g=0]
Index:  2 pgmask=4kb va=c0000fff80000000 asid=00
        [pa=00000000000 c=0 d=0 v=0 g=0] [pa=00000000000 c=0 d=0 v=0 g=0]
Index:  3 pgmask=4kb va=c0000fff80000000 asid=00
        [pa=00000000000 c=0 d=0 v=0 g=0] [pa=00000000000 c=0 d=0 v=0 g=0]
Index:  4 pgmask=4kb va=c0000fff80000000 asid=00
        [pa=00000000000 c=0 d=0 v=0 g=0] [pa=00000000000 c=0 d=0 v=0 g=0]
Index:  5 pgmask=4kb va=c0000fff80000000 asid=00
        [pa=00000000000 c=0 d=0 v=0 g=0] [pa=00000000000 c=0 d=0 v=0 g=0]
Index:  6 pgmask=4kb va=c0000fff80000000 asid=00
        [pa=00000000000 c=0 d=0 v=0 g=0] [pa=00000000000 c=0 d=0 v=0 g=0]
Index:  7 pgmask=4kb va=c0000fff80000000 asid=00
        [pa=00000000000 c=0 d=0 v=0 g=0] [pa=00000000000 c=0 d=0 v=0 g=0]
Index:  8 pgmask=4kb va=c0000fff80000000 asid=00
        [pa=00000000000 c=0 d=0 v=0 g=0] [pa=00000000000 c=0 d=0 v=0 g=0]
Index:  9 pgmask=4kb va=c0000fff80000000 asid=00
        [pa=00000000000 c=0 d=0 v=0 g=0] [pa=00000000000 c=0 d=0 v=0 g=0]
Index: 10 pgmask=4kb va=c0000fff80000000 asid=00
        [pa=00000000000 c=0 d=0 v=0 g=0] [pa=00000000000 c=0 d=0 v=0 g=0]
Index: 11 pgmask=4kb va=c0000fff80000000 asid=00


Jason Ormes



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From: Andrew Clausen <clausen@melbourne.sgi.com>
To: Jason Ormes <jormes@wideopenwest.com>
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Subject: Re: kernel boot error.
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On Tue, Feb 04, 2003 at 06:41:10PM -0600, Jason Ormes wrote:
> hello,
> 
> can someone help me with this error?  Is this because the network failed?

I'm getting exactly the same problem.  What machine are you using?
I'm using an ip27 (origin 200), and an acenic network card.

It seems that there all kinds of PCI hacks in the ip27 support,
and I'm currently trying to figure out how to get this card working...

Cheers,
Andrew


From jormes@wideopenwest.com Wed Feb  5 01:07:39 2003
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Its an ip27 origin 200 with what hinv -v reports as a 

adapter IOC3 Rev 1, (pci id 2)
        controller multi function SuperIO
        controller Ethernet Rev 1

I did a little searching online 
anhttp://www.scd.ucar.edu/nets/docs/procs/SGI-100mbps/SGI-auto.htmld found a 
lot of references to origins having problems with the autonegotiation timing 
out to fast, but the only fix that I've found has to do with editing part of 
the kernel.  here's a link to one that I found. 
http://www.scd.ucar.edu/nets/docs/procs/SGI-100mbps/SGI-auto.html 

could this be part of the problem?

Thanks for the quick response, atleast I know I'm not alone.
Jason


On Tuesday 04 February 2003 06:43 pm, Andrew Clausen wrote:
> On Tue, Feb 04, 2003 at 06:41:10PM -0600, Jason Ormes wrote:
> > hello,
> >
> > can someone help me with this error?  Is this because the network failed?
>
> I'm getting exactly the same problem.  What machine are you using?
> I'm using an ip27 (origin 200), and an acenic network card.
>
> It seems that there all kinds of PCI hacks in the ip27 support,
> and I'm currently trying to figure out how to get this card working...
>
> Cheers,
> Andrew


From clausen@pureza.melbourne.sgi.com Wed Feb  5 01:15:16 2003
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From: Andrew Clausen <clausen@melbourne.sgi.com>
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Cc: linux-mips@linux-mips.org
Subject: Re: kernel boot error.
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On Tue, Feb 04, 2003 at 07:12:28PM -0600, Jason Ormes wrote:
> Its an ip27 origin 200 with what hinv -v reports as a 
> 
> adapter IOC3 Rev 1, (pci id 2)
>         controller multi function SuperIO
>         controller Ethernet Rev 1
> 
> I did a little searching online 
> anhttp://www.scd.ucar.edu/nets/docs/procs/SGI-100mbps/SGI-auto.htmld found a 
> lot of references to origins having problems with the autonegotiation timing 
> out to fast, but the only fix that I've found has to do with editing part of 
> the kernel.  here's a link to one that I found. 
> http://www.scd.ucar.edu/nets/docs/procs/SGI-100mbps/SGI-auto.html 
> 
> could this be part of the problem?

I doubt it.  This problem is a PCI bus issue.  I'm still
investigating... but it could be a multitude of things.
Have a look in mips/sgi-ip27/ip27-pci.c at all the functions
with "fixup" in their name.  Things like byte-swapping, configuring
IO addresses, etc.  I suspect we need something like this for
other cards.

Cheers,
Andrew


From tpolgar@freehandsystems.com Wed Feb  5 01:36:59 2003
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> I'm getting exactly the same problem.  What machine are you using?
> I'm using an ip27 (origin 200), and an acenic network card.
> 
> It seems that there all kinds of PCI hacks in the ip27 support,
> and I'm currently trying to figure out how to get this card working...

My buddy and I used to work at Alteon with my buddy doing most of the original
NIC firmware coding.  I don't remember who did the SGI driver side coding.  
The linux driver was done by Jes Sorensen using our OpenDriver kit. Let me
know if we can help in any way.   Is the Origin an SGI machine?  If so, i do
recall we had to do some special casing to get the card to work correctly. 
This was 4 years ago ....

Tibor

From long21st@yahoo.com Wed Feb  5 02:42:02 2003
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From: Long Li <long21st@yahoo.com>
Subject: Specify the as path when gcc runs
To: linux-mips@linux-mips.org
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Hi,

Is there a way that I can specify the path for 'as' on
the fly when I use gcc? I have a MIPS cross compiler
xgcc on Redhat 7.1. However, in the Makefile, I use
both the native compiler as well as the crosscompiler.
They both search the path to find the as to use, which
is incorrect. I don't want to rebuild the
crosscompiler to specify the path for as using
--with-as=pathname, and wonder if I can specify the as
path for the crosscompiler on the fly?


Thanks a lot!


Long

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From yoichi_yuasa@montavista.co.jp Wed Feb  5 02:46:14 2003
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Date: Wed, 5 Feb 2003 11:40:45 +0900
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On Tue, 4 Feb 2003 13:44:06 +0100
Ralf Baechle <ralf@linux-mips.org> wrote:

> On Tue, Feb 04, 2003 at 03:40:25PM +0900, Yoichi Yuasa wrote:
> 
> > This patch is based on linux_2_4 tag cvs tree on ftp.linux-mips.org
> > Would you apply this patch to CVS on ftp.linux-mips.org?
> 
> Could you also make a patch against 2.5?  It's a huge PITA when 2.4 and
> 2.5 trees are diverging so I'd really like to have a patch for 2.5 also.

OK, please wait for a moment.

> Patch applied,

Thanks you for your help.

Yoichi

From clausen@pureza.melbourne.sgi.com Wed Feb  5 03:07:01 2003
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Date: Wed, 5 Feb 2003 14:06:25 +1100
From: Andrew Clausen <clausen@melbourne.sgi.com>
To: Tibor Polgar <tpolgar@freehandsystems.com>
Cc: Jason Ormes <jormes@wideopenwest.com>, linux-mips@linux-mips.org
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On Tue, Feb 04, 2003 at 05:37:00PM -0800, Tibor Polgar wrote:
> > I'm getting exactly the same problem.  What machine are you using?
> > I'm using an ip27 (origin 200), and an acenic network card.
> > 
> > It seems that there all kinds of PCI hacks in the ip27 support,
> > and I'm currently trying to figure out how to get this card working...
> 
> My buddy and I used to work at Alteon with my buddy doing most of the original
> NIC firmware coding.  I don't remember who did the SGI driver side coding.  
> The linux driver was done by Jes Sorensen using our OpenDriver kit. Let me
> know if we can help in any way.   Is the Origin an SGI machine?

Yep.  It's sitting in an SGI machine room.

>   If so, i do
> recall we had to do some special casing to get the card to work correctly. 

Yeah, that would be right.  Have you had a look at pci_fixup_ioc3()?
(That's the network card that seems to come with the Origin 200).  I
bet it's something similar.

Just, the base address the card (PCI bus?) is spitting out is very odd:

	eth0: SGI AceNIC Gigabit Ethernet at 0xfe7fc000, irq 8

The card is in slot 6, so I'd expect the base address to be 0x8900000.
Anyway, it dies on this:

	writel(HW_RESET | (HW_RESET << 24), &regs->HostCtrl);

	with:
		&regs->HostCtrl=9200000008900040
	or
		&regs->HostCtrl=92000000fe7fc040
	(depending on the base address... I hard coded in a more
	sane one, but it still crashes)

Cheers,
Andrew


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From: Greg Lindahl <lindahl@keyresearch.com>
To: linux-mips@linux-mips.org
Subject: Re: Specify the as path when gcc runs
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On Tue, Feb 04, 2003 at 06:41:53PM -0800, Long Li wrote:

> Is there a way that I can specify the path for 'as' on
> the fly when I use gcc?

-Ya,directory

-- greg

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Date: Tue, 4 Feb 2003 22:19:50 -0600
From: "Dan Hopper" <hopper@pcsmail.amd.com>
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Subject: [patch 2.4] au1x00 prom.c hw addr case insensitivity fix
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Hi folks,

Attached please find a short fix to str2hexnum() in
arch/mips/au1000/common/prom.c of the 2.4 branch.  With this fix,
the contents of the "ethaddr" entry in the environment table passed
by the bootloader to the kernel can have upper case hexadecimal
digits.  

Without the patch, an address such as ethaddr =
"00:50:C2:0C:20:4f" is silently converted to "00:50:02:00:20:4f",
making for some serious head scratching if you're trying to bootp
the kernel.

Dan

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--- arch/mips/au1000/common/prom.c.orig	Tue Feb  4 20:38:28 2003
+++ arch/mips/au1000/common/prom.c	Tue Feb  4 22:09:17 2003
@@ -105,9 +105,11 @@
 inline unsigned char str2hexnum(unsigned char c)
 {
 	if(c >= '0' && c <= '9')
-	return c - '0';
+		return c - '0';
 	if(c >= 'a' && c <= 'f')
-	return c - 'a' + 10;
+		return c - 'a' + 10;
+	if(c >= 'A' && c <= 'F')
+		return c - 'A' + 10;
 	return 0; /* foo */
 }
 

--wRRV7LY7NUeQGEoC--


From yaelgilad@myrealbox.com Wed Feb  5 07:07:04 2003
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Hi,
I have a source level application, ~10 c files, standard stuff, mostly sockets.
I'd like it to run on my mips-linux platform.
I guess my changes should mostly be in the Makefile.
What should they be ?
Any simple example I can use ?

TIA



From agx@sigxcpu.org Wed Feb  5 09:29:41 2003
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From: Guido Guenther <agx@sigxcpu.org>
To: Linux/MIPS Development <linux-mips@linux-mips.org>
Subject: Re: debian installer on mips64 (origin 200)
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On Mon, Feb 03, 2003 at 03:14:32PM +1100, Andrew Clausen wrote:
> Anyway, in principle, I should be able write a shell script to
> create the above image, and add an isofs partition containing the debian
> mips install cd.  Just, I bet it can't deal with sash / the prom
> properly - it's probably dependent on arcboot.  Also, it would need
> different kernel packages.
It only makes sense to build 'native' kernel packages if we have the
corresponding toolchain packaged. Nobody ever packaged the mips64
binutils/egcs from oss for debian.

[..snip..] 
> Perhaps a better approach is to get the kernel to prompt users to
> change disks, and stick in the vanilla debian CD?  i.e. have a
> "mips64-bootstrap.img" CD image, which prompts for install-1 afterwards.
Why not use the CONFIG_EMBEDDED_RAMDISK option to append the installer
image as initrd to the kernel and dump this into the vh? To build the vh
on the CD you can probably use the same script Flo made for IP22:
 http://www.silicon-verl.de/home/flo/software/genisovh-0.1.tgz
Regards,
 -- Guido

From br1@4g-systems.de Wed Feb  5 11:35:09 2003
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Subject: which kernel tree for Au1500?
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hello, 

we are developing a board based on the Au1500 SOC and we need to adapt the 
linux kernel for it. since we need something working soon, we will 
concentrate on the 2.4 version.

so i wanted to ask which kernel tree is recommended for the Au1x00 chipset. 
i've found the tree on http://linux-mips.sourceforge.net/ and the 2_4 branch 
of linux-mips.org look most promising, but they have various differences, 
most obvious the hyd1100/ directory on sf and the db1x00/ directory on 
linux-mips. another significant difference is that the sf version has power 
management support and that linux-mips supports one more PHY in au1000_eth.c.

how is kernel work for mips organized?

many thanks,
bruno

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On Wed, Feb 05, 2003 at 02:06:25PM +1100, Andrew Clausen wrote:

> >   If so, i do
> > recall we had to do some special casing to get the card to work correctly. 
> 
> Yeah, that would be right.  Have you had a look at pci_fixup_ioc3()?
> (That's the network card that seems to come with the Origin 200).  I
> bet it's something similar.

Pci_fixup_ioc3() is only necessary for the IOC3 nic.  It's a PCI board
that's about as broken are it only can be.  The board runs on in PCI busses
clocked at 33MHz.  It only partially decodes the PCI config address space.
Attempted access to one of the nimplemented registers of the IOC3 will
result in access to another register.  That's too buggy for any OS to cope
with without that special kludge pci_fixup_ioc3.

> Just, the base address the card (PCI bus?) is spitting out is very odd:
> 
> 	eth0: SGI AceNIC Gigabit Ethernet at 0xfe7fc000, irq 8
> 
> The card is in slot 6, so I'd expect the base address to be 0x8900000.
> Anyway, it dies on this:

Query the address using the usual Linux PCI bus stuff from <linux/pci.h>.
Anything else is doomed, especially guessing ...

  Ralf

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From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Long Li <long21st@yahoo.com>
cc: linux-mips@linux-mips.org
Subject: Re: Specify the as path when gcc runs
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On Tue, 4 Feb 2003, Long Li wrote:

> Is there a way that I can specify the path for 'as' on
> the fly when I use gcc? I have a MIPS cross compiler

 Use "-B<path>".  You may use "-print-prog-name=as" to get feedback to be
sure the right binary is picked.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From atulsrivastava9@rediffmail.com Wed Feb  5 15:27:43 2003
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Subject: uart 16550 undefined state...
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Hello,

A small generic question ..

Have any body experienced undefined state of ns16550A Uart chip , 
especially during REinitialisation..

I get it when i my bootloader uses  uart0 and later after loding 
kernel
through serial link and using in my kernel command line 
console=ttyS0  then in init/main.c ,
  console_init() or open("/dev/console",....) the serial port is 
again
setup via serial_console_setup() or rs_open() like interfaces.
even afer taking care of same baudspeed it just send junk 
characters.

though initialising a uart is extremly simple.only difference 
betwen bootloader and kernel initialization  i can see regarding 
polling/interrupt mode.

if i mask those code in serial.c ..i don't have any problem..
but why it happens, what special sequence of initialisation can 
avoid this problem..

Best Regards,
Atul






From ralf@linux-mips.org Wed Feb  5 16:48:12 2003
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From: Ralf Baechle <ralf@linux-mips.org>
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On Wed, Feb 05, 2003 at 11:43:45AM +1100, Andrew Clausen wrote:

> On Tue, Feb 04, 2003 at 06:41:10PM -0600, Jason Ormes wrote:
> > hello,
> > 
> > can someone help me with this error?  Is this because the network failed?
> 
> I'm getting exactly the same problem.  What machine are you using?
> I'm using an ip27 (origin 200), and an acenic network card.
> 
> It seems that there all kinds of PCI hacks in the ip27 support,
> and I'm currently trying to figure out how to get this card working...

His particular machine is a uniprocessor machine, a very rare configuration.
In all the years I'm working with Origins this is just the second I
encounter.  Note that disabling one of the processor doesn't suffice;
this problem really only seems to hit machines with one physical processor.

  Ralf

From ralf@linux-mips.org Wed Feb  5 16:51:16 2003
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From: Ralf Baechle <ralf@linux-mips.org>
To: Gilad Benjamini <yaelgilad@myrealbox.com>
Cc: linux-mips@linux-mips.org
Subject: Re: Porting an application to mips-linux
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On Wed, Feb 05, 2003 at 07:07:05AM +0000, Gilad Benjamini wrote:

> I have a source level application, ~10 c files, standard stuff, mostly sockets.
> I'd like it to run on my mips-linux platform.
> I guess my changes should mostly be in the Makefile.
> What should they be ?
> Any simple example I can use ?

A normal application simply needs to be recompiled; if you're crosscompiling
the application you just have to set the CC,LD etc. variables to the
crosscompiler tools instead of the native tools.  If you're doing
native builds no changes at all should be necessary.  At least that's the
general procedure.

  Ralf

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Subject: Re: which kernel tree for Au1500?
From: Pete Popov <ppopov@mvista.com>
To: Bruno Randolf <br1@4g-systems.de>
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On Wed, 2003-02-05 at 03:34, Bruno Randolf wrote:
> hello, 
> 
> we are developing a board based on the Au1500 SOC and we need to adapt the 
> linux kernel for it. since we need something working soon, we will 
> concentrate on the 2.4 version.
> 
> so i wanted to ask which kernel tree is recommended for the Au1x00 chipset. 
> i've found the tree on http://linux-mips.sourceforge.net/ and the 2_4 branch 
> of linux-mips.org look most promising, but they have various differences, 
> most obvious the hyd1100/ directory on sf and the db1x00/ directory on 
> linux-mips. another significant difference is that the sf version has power 
> management support and that linux-mips supports one more PHY in au1000_eth.c.

linux-mips.org is more up to date now and I don't plan on updating the
sourceforge tree anymore. You don't need the hyd1100 board since it's an
internal board only. The PM support ... I haven't tested it in
linux-mips.org but it need a little work anyway.

Pete


From tor@spacetec.no Wed Feb  5 17:07:52 2003
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From: tor@spacetec.no (Tor Arntsen)
Date: Wed, 5 Feb 2003 18:07:49 +0100
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       "Re: kernel boot error." (Feb  5, 17:49)
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On Feb 5, 17:49, Ralf Baechle wrote:
>> On Tue, Feb 04, 2003 at 06:41:10PM -0600, Jason Ormes wrote:
>> I'm using an ip27 (origin 200), and an acenic network card.
[...] 

>His particular machine is a uniprocessor machine, a very rare configuration.
>In all the years I'm working with Origins this is just the second I
>encounter.  Note that disabling one of the processor doesn't suffice;
>this problem really only seems to hit machines with one physical processor.

1-CPU Origin-200's are not that uncommon.. I have one right here. Although 
we mostly used to buy 2-CPU Origins we also bought 1-CPU Origins now and 
then, depending on what we planned to use them for. It's all about price
in the end.

-Tor

From tpolgar@freehandsystems.com Wed Feb  5 17:52:06 2003
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> we are developing a board based on the Au1500 SOC and we need to adapt the
> linux kernel for it. since we need something working soon, we will
> concentrate on the 2.4 version.

We are just finishing up an Au1500 project right now.  FCS was yesterday!!!  
What we did was:


1) get from AMD the PB1500 development CD.  It has an "old" 2.4.17 kernel
along with MontaVista's HardHat Linux toolkit that's cross compiled to work on
x86 platforms.  If you have the $$$, MontaVista offers great support for the
Au1500 based stuff.  Their toolkit is top notch.

2) If you didn't already get from AMD a PB1500, do it.  The development
platform is a very nice start and will save you may weeks of code testing
headaches (and cause a few special ones).  At least for us here in USA, AMD
"loaned" a board at no charge, i.e. a purchase order is signed but they never
bill you.  We're projected to buy some 25,000 Au1500s per year from them so
that probably helped.

3) From there, look at the 2.4 latest CVS tree on linux-mips and Pete's own
36-bit mods in ftp://ftp.linux-mips.org/pub/linux/mips/people/ppopov/.   
AMD/MontaVista also released a 2.4.18 "like" linux but its a bit rough.

4) there are lots of other resources and headaches if you plan to cross
compile X, gtk, etc.

5) we are flash based and used the special mods Pete put in to the 2.4.17
kernel to support zImage flash booting.  We're using YAMON as our monitor and
with a few changes have a pretty nice setup - boot wise.

Tibor

From ppopov@mvista.com Wed Feb  5 19:37:41 2003
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Subject: Re: which kernel tree for Au1500?
From: Pete Popov <ppopov@mvista.com>
To: Tibor Polgar <tpolgar@freehandsystems.com>
Cc: Bruno Randolf <br1@4g-systems.de>, linux-mips@linux-mips.org
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On Wed, 2003-02-05 at 09:52, Tibor Polgar wrote:
> > we are developing a board based on the Au1500 SOC and we need to adapt the
> > linux kernel for it. since we need something working soon, we will
> > concentrate on the 2.4 version.
> 
> We are just finishing up an Au1500 project right now.  FCS was yesterday!!!  
> What we did was:
> 
> 
> 1) get from AMD the PB1500 development CD.  It has an "old" 2.4.17 kernel
> along with MontaVista's HardHat Linux toolkit that's cross compiled to work on
> x86 platforms.  If you have the $$$, MontaVista offers great support for the
> Au1500 based stuff.  Their toolkit is top notch.
> 
> 2) If you didn't already get from AMD a PB1500, do it.  The development
> platform is a very nice start and will save you may weeks of code testing
> headaches (and cause a few special ones).  At least for us here in USA, AMD
> "loaned" a board at no charge, i.e. a purchase order is signed but they never
> bill you.  We're projected to buy some 25,000 Au1500s per year from them so
> that probably helped.
> 
> 3) From there, look at the 2.4 latest CVS tree on linux-mips and Pete's own
> 36-bit mods in ftp://ftp.linux-mips.org/pub/linux/mips/people/ppopov/.   
> AMD/MontaVista also released a 2.4.18 "like" linux but its a bit rough.

This was not part of a MV release, or AMD "release" for that matter. I
think the rough port you got was from the working directory of an
engineer at AMD, before I had a chance to update linux-mips.org. MVL 3.0
does support all three Pb1x boards and after the install, you're ready
to go.

> 4) there are lots of other resources and headaches if you plan to cross
> compile X, gtk, etc.
> 
> 5) we are flash based and used the special mods Pete put in to the 2.4.17
> kernel to support zImage flash booting.  We're using YAMON as our monitor and
> with a few changes have a pretty nice setup - boot wise.

The zImage bits are not in linux-mips.org. I suppose I should create a
patch and put it in my directory; one of these days :)

Pete


From dan@embeddededge.com Wed Feb  5 19:46:46 2003
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Pete Popov wrote:

> ....The PM support ... I haven't tested it in
> linux-mips.org but it need a little work anyway.

It needs more than a little work :-)  I have lots of changes that
attempt to support sleep mode on the Au1xxxx.  Everything from
saving/restoring core state, to sdram self refresh, to driver
modifications for PM functions.  I've done this in the sourceforge
kernel and will update the linux-mips tree as I have time.  Some
of the patches will likely require some debate, as they touch software
outside of the core Au1xxx functions.

In addition to the kernel modifications, you need a boot rom that
will support the kernel.  It has to detect a wakeup condition, bring
the memory back the life, perform some processor initialization, and
then return to the kernel.  Basically, copy what Yamon does.  ;-)

If someone is seriously working on this, drop me a note and we can
exchange information.

Thanks.


	-- Dan


From ppopov@mvista.com Wed Feb  5 19:53:57 2003
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On Wed, 2003-02-05 at 11:47, Dan Malek wrote:
> Pete Popov wrote:
> 
> > ....The PM support ... I haven't tested it in
> > linux-mips.org but it need a little work anyway.
> 
> It needs more than a little work :-)  

I only had in mind the frequency scaling work I had done, not the sleep
mode. The frequency scaling "worked", but there were some bugs with the
timer since using the 'wait' instruction results in the cp0 timer
sleeping, but the external clock doesn't provide very good resolution.

Pete

> I have lots of changes that
> attempt to support sleep mode on the Au1xxxx.  Everything from
> saving/restoring core state, to sdram self refresh, to driver
> modifications for PM functions.  I've done this in the sourceforge
> kernel and will update the linux-mips tree as I have time.  Some
> of the patches will likely require some debate, as they touch software
> outside of the core Au1xxx functions.
> 
> In addition to the kernel modifications, you need a boot rom that
> will support the kernel.  It has to detect a wakeup condition, bring
> the memory back the life, perform some processor initialization, and
> then return to the kernel.  Basically, copy what Yamon does.  ;-)
> 
> If someone is seriously working on this, drop me a note and we can
> exchange information.
> 
> Thanks.
> 
> 
> 	-- Dan
> 
> 


From cwu@deltartp.com Wed Feb  5 23:39:12 2003
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From: Chien-Lung Wu <cwu@deltartp.com>
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Subject: Software floating point
Date: Wed, 5 Feb 2003 18:21:34 -0500 
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Hi,

I am building a cross-compiler for mips-linux on my linux box.  
Everything seems fine,  except software floating point. 
How can I turn on the software floating point when I build the glibc? 
Is software floating point are supported in libm.a/libm.so or ant other
lib*?

Thanks for your help.

Chien-Lung

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From: Andrew Clausen <clausen@melbourne.sgi.com>
To: Ralf Baechle <ralf@linux-mips.org>
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Subject: Re: kernel boot error.
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On Wed, Feb 05, 2003 at 03:03:40PM +0100, Ralf Baechle wrote:
> > Just, the base address the card (PCI bus?) is spitting out is very odd:
> > 
> > 	eth0: SGI AceNIC Gigabit Ethernet at 0xfe7fc000, irq 8
> > 
> > The card is in slot 6, so I'd expect the base address to be 0x8900000.
> > Anyway, it dies on this:
> 
> Query the address using the usual Linux PCI bus stuff from <linux/pci.h>.
> Anything else is doomed, especially guessing ...

That stuff is returning 0xfe7fc000.  That is sane for an Intel
configuration, but totally insane for Origins, and has no chance
of working.

Cheers,
Andrew


From lindahl@keyresearch.com Thu Feb  6 00:52:54 2003
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While inspecting the 2.4 cvs kernel, I saw that arch/mips/kernel/head.S
does not have a .align for ejtag_debug_buffer -- just a ".fill 4".
The alignment happens to be correct, I guess since it's the first
.data segment item in the file, but anyone rearranging the code could
trigger a misalignment, which causes an unaligned trap inside an
exception... try debugging that one. (OK, I got lucky...)

The 64 bit cvs kernel doesn't yet have this ejtag stuff in it. 2.5
looks the same as 2.4.

-- greg


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I'm a student and is wondering if you could  tell me what version of Linux is suitable for a SGI Indigo 2 machine?  Thanks. 
Ben Yates
443-677-2693

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<DIV><FONT face=Arial size=2>I'm a student and is wondering if you could&nbsp; 
tell me what version of Linux is suitable for a SGI Indigo 2 machine? 
&nbsp;Thanks. </FONT></DIV>
<DIV><FONT face=Arial size=2>Ben 
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From clausen@pureza.melbourne.sgi.com Thu Feb  6 02:40:02 2003
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From: Andrew Clausen <clausen@melbourne.sgi.com>
To: Guido Guenther <agx@sigxcpu.org>,
	Linux/MIPS Development <linux-mips@linux-mips.org>
Subject: Re: debian installer on mips64 (origin 200)
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On Wed, Feb 05, 2003 at 10:28:00AM +0100, Guido Guenther wrote:
> > Perhaps a better approach is to get the kernel to prompt users to
> > change disks, and stick in the vanilla debian CD?  i.e. have a
> > "mips64-bootstrap.img" CD image, which prompts for install-1 afterwards.
>
> Why not use the CONFIG_EMBEDDED_RAMDISK option to append the installer
> image as initrd to the kernel and dump this into the vh? To build the vh
> on the CD you can probably use the same script Flo made for IP22:
>  http://www.silicon-verl.de/home/flo/software/genisovh-0.1.tgz

Sounds sane :)

Unfortunately, I haven't been able to boot kernels stored in the volume
header :(

Cheers,
Andrew


From agx@sigxcpu.org Thu Feb  6 09:26:41 2003
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On Wed, Feb 05, 2003 at 08:36:24PM -0500, benyates3@comcast.net wrote:
> I'm a student and is wondering if you could  tell me what version of Linux is suitable for a SGI Indigo 2 machine?  Thanks. 
There are basically two more or less complete distributions out there:
 ftp://ftp.linux-mips.org:/pub/linux/mips/redhat
and
 http://ports.debian.org/mips
However only XL graphics is supported on the I2, Express and Impact
aren't.
 -- Guido

From ralf@linux-mips.org Thu Feb  6 10:51:36 2003
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On Wed, Feb 05, 2003 at 06:21:34PM -0500, Chien-Lung Wu wrote:

> I am building a cross-compiler for mips-linux on my linux box.  
> Everything seems fine,  except software floating point. 
> How can I turn on the software floating point when I build the glibc? 
> Is software floating point are supported in libm.a/libm.so or ant other
> lib*?

The kernel includes a floating point emulator so your hard fp code will
run fine on fpu-less code.

  Ralf

From ralf@linux-mips.org Thu Feb  6 11:26:06 2003
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From: Ralf Baechle <ralf@linux-mips.org>
To: Tor Arntsen <tor@spacetec.no>
Cc: linux-mips@linux-mips.org
Subject: Re: kernel boot error.
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On Wed, Feb 05, 2003 at 06:07:49PM +0100, Tor Arntsen wrote:

> >His particular machine is a uniprocessor machine, a very rare configuration.
> >In all the years I'm working with Origins this is just the second I
> >encounter.  Note that disabling one of the processor doesn't suffice;
> >this problem really only seems to hit machines with one physical processor.
> 
> 1-CPU Origin-200's are not that uncommon.. I have one right here. Although 
> we mostly used to buy 2-CPU Origins we also bought 1-CPU Origins now and 
> then, depending on what we planned to use them for. It's all about price
> in the end.

Maybe my machine room at SGI was just equipped to well :-)

  Ralf

From iilangov@cisco.com Thu Feb  6 14:04:49 2003
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Subject: manipulating e_machine value in the elf Header
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Hi,

I'm trying to port linux kernel to a mips board with a R4700 processor. It
has a rom monitor program which can be used to load the image. (has support
for tftp boot, xmodem....) . This bootloader has a hardcoded cpu_type which
is cross checked with the e_machine value in the elf header. When I try to
load the linux kernel this check (cpu_type == e_machine) fails & hence the
boot loader aborts the loading of image.

I tried to change the e_machine type value by changing the EM_MIPS value in
include/linux/elf.h, still e_machine type is "8" in the image even after
completely rebuilding the image. I even changed the EM_MIPS value in
/usr/include/elf.h & couple of other locations (sde headers.....) still no
luck....though hand editing the elf header is an option.. I don't want to do
that !

If any of you have any idea/suggestions I would be a happy man !

Thanks in advance,
Indu



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Hi,
I'm a student and wondering if there is anyone out there could send me full
instructions step by step on how to successfully install Linux on a SGI
Indigo2 machine and what particular version of Linux is needed? Thanks for
any help.


Ben Yates
443-677-2693


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From ralf@linux-mips.org Thu Feb  6 14:52:42 2003
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From: Ralf Baechle <ralf@linux-mips.org>
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On Thu, Feb 06, 2003 at 07:34:40PM +0530, Indukumar Ilangovan wrote:

> I'm trying to port linux kernel to a mips board with a R4700 processor. It
> has a rom monitor program which can be used to load the image. (has support
> for tftp boot, xmodem....) . This bootloader has a hardcoded cpu_type which
> is cross checked with the e_machine value in the elf header. When I try to
> load the linux kernel this check (cpu_type == e_machine) fails & hence the
> boot loader aborts the loading of image.
> 
> I tried to change the e_machine type value by changing the EM_MIPS value in
> include/linux/elf.h, still e_machine type is "8" in the image even after
> completely rebuilding the image. I even changed the EM_MIPS value in
> /usr/include/elf.h & couple of other locations (sde headers.....) still no
> luck....though hand editing the elf header is an option.. I don't want to do
> that !

I guess you're hunting the problem at the wrong place.  All MIPS ELF systems
are using EM_MIPS (8) for the e_machine.  A few ancient systems have been
using EM_MIPS_RS3_LE (10) but I've yet to see a system using that value.
So probably the bootloader is expecting the wrong value?

Your attempt at changing that value didn't work because the value is
hardcoded in binutils.  However if you change that value you'd break
binary compatibility with each and every Linux/MIPS binary.

  Ralf

From ralf@linux-mips.org Thu Feb  6 16:55:11 2003
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From: Ralf Baechle <ralf@linux-mips.org>
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On Wed, Feb 05, 2003 at 11:19:11AM +1100, Andrew Clausen wrote:

> On Wed, Feb 05, 2003 at 01:07:35AM +0100, Guido Guenther wrote:
> > On IP22 the PROM uses SystemPartition to find the kernel/bootloader.
> > We set it to something like scsi(0)disk(1)rdisk(0)partition(8) to grab
> > it from the vh. Is SystemPartition used differently on IP27?
> 
> I think SystemPartition is ignored (haven't been able to see any
> evidence to the contrary... I should look in the source...)

SystemPartition is to be used by the bootloader, that is sash in SGI's case.
So when booting a kernel directly from the volume header from the firmware's
point of view SystemPartition's value is irrelevant.  Afair it's used for
all non-absolute filenames where absolute ARC filenames are starting with
a device specificer like scsi(0)disk(1)partition(1), not just a slash to
indicate search from the fs root.

> > [..snip..]
> > > So, we should obviously support OSLoadPartition=/dev/sda1 (=> root=/dev/sda1),
> > > but it would also be nice to support OSLoadPartition=dksc(0,1,3).

> > Well we could either check if OSLoadPartition matches the linux device
> > naming scheme or the other way around and see if it looks like a valid
> > device identifier used by the PROM (I'd prefer the later, though) - or
> > simply make the OSLoadPartition <-> root= mapping '#ifdef CONFIG_SGI_IP22'.
> 
> I think the middle option (the one you prefer) of matching dksc(0,1,3)
> and converting it /dev/sda2 is best.  Just, it has to happen after the
> hard disks are probed - /dev/sdXY are allocated dynamically (in
> a predictable-for-end-user way), so you need to find out what it was
> allocated to.  Is this doable in a nice way?

Checkout ROOT_DEV and it's use in init/main.c.  Options such as root=...
are parsed very early during bootup.  After that is done you could check
if the value of ROOT_DEV is still 0 that is no root=... was passed and
fallback to a value derived from SystemPartition at some later stage.

Feel free to read the devfs code for additional transpiration ;)

> BTW, I think file system labels are a much better way of identifying FSs.

ARC dates back more than 10 years back.  It was written with PC partitions
and NT as OS in mind.  So don't expect fancy concepts or sanity ;-)

> Perhaps this discussion is irrelevant... people who are using
> OSLoadPartition to control their bootloader should just add a root=
> option.

The ARC code is also used by non-SGI systems and on some of those using a
non-standard variables is a bit of a pita.

  SystemPartition	The default path for the system partition.
  OSLoader		The default path for an operating-system loader program.
  OSLoadPartition	The default pathname of the partition containing the
			program to be loaded by the operating-system loader.
  OSLoadFilename	The default filename of the program the operating
			 system loader is to load.

Btw, device names like dksc(0,1,2) came from SGI's / MIPS's pre-ARC firmware
so are deprecated since 10 years.  Some things just don't want to die.

  Ralf

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On Thu, Feb 06, 2003 at 05:53:33PM +0100, Ralf Baechle wrote:
> > I think SystemPartition is ignored (haven't been able to see any
> > evidence to the contrary... I should look in the source...)
> 
> SystemPartition is to be used by the bootloader, that is sash in SGI's case.

AFAICT, sash ignores SystemPartition here.

> > BTW, I think file system labels are a much better way of identifying FSs.
> 
> ARC dates back more than 10 years back.  It was written with PC partitions
> and NT as OS in mind.  So don't expect fancy concepts or sanity ;-)

I'm talking about linux.  Linux should default to "root=rootfs", or
something.  If linux installers set labels, that is.

> The ARC code is also used by non-SGI systems and on some of those using a
> non-standard variables is a bit of a pita.
> 
>   SystemPartition	The default path for the system partition.

What's the "system partition"?  I think this is an Irix thing,
but I don't have any evidence.

> Btw, device names like dksc(0,1,2) came from SGI's / MIPS's pre-ARC firmware
> so are deprecated since 10 years.  Some things just don't want to die.

It requires a lot less typing ;)

Cheers,
Andrew


From jsun@orion.mvista.com Fri Feb  7 00:36:59 2003
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From: Jun Sun <jsun@mvista.com>
To: Vivien Chappelier <vivienc@nerim.net>
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	jsun@mvista.com
Subject: Re: [PATCH 2.5] r4k_switch task_struct/thread_info fixes
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Actually the following hunks are not right.  ST_OFF
should be applied against the task_struct, which is a0,
not thread_info (t3).  Try to back off the change and see if things
are ok.

Also see my next email before you rush into trying :-)

Jun


On Mon, Feb 03, 2003 at 11:21:50PM +0100, Vivien Chappelier wrote:
<snip>
>  	/*
>  	 * clear saved user stack CU1 bit
>  	 */
> -	ld	t0, ST_OFF(a0)
> +	ld	t0, ST_OFF(t3)
>  	li	t1, ~ST0_CU1
>  	and	t0, t0, t1
> -	sd	t0, ST_OFF(a0)
> +	sd	t0, ST_OFF(t3)
>  
>  	
>  	sll	t2, t0, 5
> Index: arch/mips/kernel/r4k_switch.S
> ===================================================================
> RCS file: /home/cvs/linux/arch/mips/kernel/r4k_switch.S,v
> retrieving revision 1.29
> diff -u -r1.29 r4k_switch.S
> --- arch/mips/kernel/r4k_switch.S	5 Nov 2002 19:51:47 -0000	1.29
> +++ arch/mips/kernel/r4k_switch.S	3 Feb 2003 22:06:17 -0000
> @@ -67,10 +67,10 @@
>  	/*
>  	 * clear saved user stack CU1 bit
>  	 */
> -	lw	t0, ST_OFF(a0)
> +	lw	t0, ST_OFF(t3)
>  	li	t1, ~ST0_CU1
>  	and	t0, t0, t1
> -	sw	t0, ST_OFF(a0)
> +	sw	t0, ST_OFF(t3)
>  
>  	FPU_SAVE_DOUBLE(a0, t0)			# clobbers t0
>  
> 

From jsun@orion.mvista.com Fri Feb  7 00:43:52 2003
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From: Jun Sun <jsun@mvista.com>
To: Vivien Chappelier <vivienc@nerim.net>
Cc: Ralf Baechle <ralf@oss.sgi.com>, linux-mips@linux-mips.org,
	jsun@mvista.com
Subject: Re: [PATCH 2.5] clear USEDFPU in copy_thread
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You should *not* clear USEDFPU in copy_thread().  Imagine
you assign a floating point variable f=0.3, then do fork()
and then in the child process, alas, f is undefined (zero
most likely).

If you really want to do it, it should be in start_thread().

Even if you don't have it cleared in start_thread(), things
should be generally OK.  You will have some dirty FPU content
instead of a all-zero one when you start a new program.  But then
since all sane program should assign register values before they
first time use them, so this bug should be well hidden.

I am still curious whether this is a bug in i386 as well or they do
clear the flag in some non-obvious way.  Note that the unlazy_fpu()
in copy_thread won't do it.  It only clears the current process's
USEDFPU flag, while the child process's flag is set way back in
copy_flags() calls inside do_fork().


Jun


On Tue, Feb 04, 2003 at 11:54:38PM +0100, Vivien Chappelier wrote:
> Hi,
> 
> 	When copying a thread, access to the FPU is disabled by clearing
> the ST0_CU1 bit in the new thread saved CP0_STATUS register. However, the
> corresponding TIF_USEDFPU flag is not cleared at it should to indicate the
> FPU has not yet been used by the new process.
> 	This patch also clears user_tid in mips64 code, and moves it away
> from the FPU comment in the mips code.
> 
> Vivien.
> 
> Index: arch/mips64/kernel/process.c
> ===================================================================
> RCS file: /home/cvs/linux/arch/mips64/kernel/process.c,v
> retrieving revision 1.36
> diff -u -r1.36 process.c
> --- arch/mips64/kernel/process.c	9 Jan 2003 19:16:50 -0000	1.36
> +++ arch/mips64/kernel/process.c	4 Feb 2003 22:47:00 -0000
> @@ -114,6 +114,8 @@
>  	p->thread.reg29 = (unsigned long) childregs;
>  	p->thread.reg31 = (unsigned long) ret_from_fork;
>  
> +	p->user_tid = NULL;
> +
>  	/*
>  	 * New tasks loose permission to use the fpu. This accelerates context
>  	 * switching for most programs since they don't use the fpu.
> @@ -121,6 +123,7 @@
>  	p->thread.cp0_status = read_c0_status() &
>                              ~(ST0_CU3|ST0_CU2|ST0_CU1|ST0_KSU);
>  	childregs->cp0_status &= ~(ST0_CU3|ST0_CU2|ST0_CU1);
> +	clear_ti_thread_flag(ti, TIF_USEDFPU);
>  
>  	return 0;
>  }
> Index: arch/mips/kernel/process.c
> ===================================================================
> RCS file: /home/cvs/linux/arch/mips/kernel/process.c,v
> retrieving revision 1.50
> diff -u -r1.50 process.c
> --- arch/mips/kernel/process.c	9 Jan 2003 19:16:50 -0000	1.50
> +++ arch/mips/kernel/process.c	4 Feb 2003 22:47:04 -0000
> @@ -117,6 +117,8 @@
>  	p->thread.reg29 = (unsigned long) childregs;
>  	p->thread.reg31 = (unsigned long) ret_from_fork;
>  
> +	p->user_tid = NULL;
> +
>  	/*
>  	 * New tasks loose permission to use the fpu. This accelerates context
>  	 * switching for most programs since they don't use the fpu.
> @@ -124,7 +126,7 @@
>  	p->thread.cp0_status = read_c0_status() &
>                              ~(ST0_CU2|ST0_CU1|KU_MASK);
>  	childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
> -	p->user_tid = NULL;
> +	clear_ti_thread_flag(ti, TIF_USEDFPU);
>  
>  	return 0;
>  }
> 

From quintela@mandrakesoft.com Fri Feb  7 01:21:23 2003
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>>>>> "jun" == Jun Sun <jsun@mvista.com> writes:

Hi

jun> Even if you don't have it cleared in start_thread(), things
jun> should be generally OK.  You will have some dirty FPU content
jun> instead of a all-zero one when you start a new program.  But then
jun> since all sane program should assign register values before they
jun> first time use them, so this bug should be well hidden.

I don't remind the exact details, but the problem appears to be the
security implications, you can see last values of previous process.

Yes, I still have to find a way where that is useful, but ...

Later, Juan.

-- 
In theory, practice and theory are the same, but in practice they 
are different -- Larry McVoy

From vivienc@nerim.net Fri Feb  7 09:29:16 2003
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On Thu, 6 Feb 2003, Jun Sun wrote:

> Actually the following hunks are not right.  ST_OFF
> should be applied against the task_struct, which is a0,
> not thread_info (t3).

In 2.4 yes, not in 2.5.

include/linux/sched.h:469
> union thread_union {
>         struct thread_info thread_info;
>         unsigned long stack[INIT_THREAD_SIZE/sizeof(long)];
> };

That means the top of the stack is actually at (task->thread_info +
KERNEL_STACK_SIZE) in 2.5. See for example arch/mips64/kernel/ptrace.c:107

> Also see my next email before you rush into trying :-)

Ok, I'll look at it later.

Vivien.


From andreev@niisi.msk.ru Fri Feb  7 14:39:10 2003
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Date: Fri, 07 Feb 2003 17:28:38 +0000
From: Alexandr Andreev <andreev@niisi.msk.ru>
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Subject: Endianity problems in XFree86-4.2 XAA on MIPSEB
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We have a MipsEB machine and a video card which has a 2D BitBLT engine.
It looks like we found a problem in XAA when we tried to use our hardware
8x8 Mono Pattern Fills. The problem appears when an application uses 
pixmaps.
Stipple and tile with the same pixmap are drawing in the different ways
(bytes in video memory are swapped). We looked through the XAA source tree
and found a dubious code in xaaPCache.c.

In two words... XAA tries to check that a pixmap (stipple/tile) can be 
reduced
to a 8x8 mono pattern, and if so, puts this stipple/tile to two dwords and
passes it to hw driver. And it looks like the stipple code works fine, 
but there
is an endianity problem in the "tile" case:

Bool
XAACheckStippleReducibility(PixmapPtr pPixmap)
{
...
pPriv->pattern0 = bits[0] | SHIFT_L(bits[1],8) | SHIFT_L(bits[2],16) | 
SHIFT_L(bits[3],24);
pPriv->pattern1 = bits[4] | SHIFT_L(bits[5],8) | SHIFT_L(bits[6],16) | 
SHIFT_L(bits[7],24);
...
}
where SHIFT_L(value, shift) is defined as ((value) >> (shift)) for Big 
Endian.


Bool
XAACheckTileReducibility(PixmapPtr pPixmap, Bool checkMono)
{
...
pPriv->pattern0 = bits[0] | (bits[1]<<8) | (bits[2]<<16) | (bits[3]<<24);
pPriv->pattern1 = bits[4] | (bits[5]<<8) | (bits[6]<<16) | (bits[7]<<24);
...
}

In both cases the unsigned int bits[] array contains bytes! with the 
bitmask to be
passed to a driver via pPriv->pattern0, pPriv->pattern1.

When we tried to use the fbdev driver which is not using XAA, the problem
is gone.

Did anybody see something similar on Mips EB with XFree + XAA?


From Geert.Uytterhoeven@sonycom.com Fri Feb  7 14:59:47 2003
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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Alexandr Andreev <andreev@niisi.msk.ru>
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On Fri, 7 Feb 2003, Alexandr Andreev wrote:
> We have a MipsEB machine and a video card which has a 2D BitBLT engine.
> It looks like we found a problem in XAA when we tried to use our hardware
> 8x8 Mono Pattern Fills. The problem appears when an application uses 
> pixmaps.
> Stipple and tile with the same pixmap are drawing in the different ways
> (bytes in video memory are swapped). We looked through the XAA source tree
> and found a dubious code in xaaPCache.c.

> Did anybody see something similar on Mips EB with XFree + XAA?

Have you asked this on xfree86-devel? Some PPC people may be able to help you.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


From agx@sigxcpu.org Fri Feb  7 15:47:05 2003
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On Fri, Feb 07, 2003 at 05:28:38PM +0000, Alexandr Andreev wrote:
> We have a MipsEB machine and a video card which has a 2D BitBLT engine.
It would help a lot if you'd tell us what card you're using. Some of the
drivers are more endian clean then others.
> It looks like we found a problem in XAA when we tried to use our hardware
> 8x8 Mono Pattern Fills. The problem appears when an application uses 
> pixmaps.
Did you have a look at the XAA.HOWTO at:
 xc/programs/Xserver/hw/xfree86/xaa
especially the
  BIT_ORDER_IN_BYTE_MSBFIRST
  BIT_ORDER_IN_BYTE_LSBFIRST
flags?
 --Guido

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Guido Guenther wrote:
> On Fri, Feb 07, 2003 at 05:28:38PM +0000, Alexandr Andreev wrote:
> 
>>We have a MipsEB machine and a video card which has a 2D BitBLT engine.
> 
> It would help a lot if you'd tell us what card you're using. Some of the
> drivers are more endian clean then others.

We have got our own card and our own driver, but it looks like this problem
is driver independant, because patterns are maked up in different ways 
for BE.


> Did you have a look at the XAA.HOWTO at:
>  xc/programs/Xserver/hw/xfree86/xaa
> especially the
>   BIT_ORDER_IN_BYTE_MSBFIRST
>   BIT_ORDER_IN_BYTE_LSBFIRST
> flags?
>  --Guido

Yes, but these flags specify bit ordering, not byte. And these flags 
work fine for
MipsEB.





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On Fri, Feb 07, 2003 at 10:29:16AM +0100, Vivien Chappelier wrote:
> On Thu, 6 Feb 2003, Jun Sun wrote:
> 
> > Actually the following hunks are not right.  ST_OFF
> > should be applied against the task_struct, which is a0,
> > not thread_info (t3).
> 
> In 2.4 yes, not in 2.5.
> 

You are right.  I got misled.  I thought task struct has 2 page 
size and thread_info is allocated from slab.  It should be reverse.

> include/linux/sched.h:469
> > union thread_union {
> >         struct thread_info thread_info;
> >         unsigned long stack[INIT_THREAD_SIZE/sizeof(long)];
> > };
> 
> That means the top of the stack is actually at (task->thread_info +
> KERNEL_STACK_SIZE) in 2.5. See for example arch/mips64/kernel/ptrace.c:107
> 
> > Also see my next email before you rush into trying :-)
> 
> Ok, I'll look at it later.
>

It turns I made a rather stupid comment there as well.  See it there.  :-)

Jun

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On Thu, Feb 06, 2003 at 04:43:42PM -0800, Jun Sun wrote:
> 
> You should *not* clear USEDFPU in copy_thread().  Imagine
> you assign a floating point variable f=0.3, then do fork()
> and then in the child process, alas, f is undefined (zero
> most likely).
> 
> If you really want to do it, it should be in start_thread().
>

This is plain stupid comment!  I was thinking about task->used_math
flag.  Please igore it.  
 
> I am still curious whether this is a bug in i386 as well or they do
> clear the flag in some non-obvious way.  Note that the unlazy_fpu()
> in copy_thread won't do it.  It only clears the current process's
> USEDFPU flag, while the child process's flag is set way back in
> copy_flags() calls inside do_fork().
>

But this comment still makes sense... 

Jun

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From: Vivien Chappelier <vivienc@nerim.net>
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To: Jun Sun <jsun@mvista.com>
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Subject: Re: [PATCH 2.5] clear USEDFPU in copy_thread
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> On Thu, Feb 06, 2003 at 04:43:42PM -0800, Jun Sun wrote:
> > I am still curious whether this is a bug in i386 as well or they do
> > clear the flag in some non-obvious way.  Note that the unlazy_fpu()
> > in copy_thread won't do it.  It only clears the current process's
> > USEDFPU flag, while the child process's flag is set way back in
> > copy_flags() calls inside do_fork().
> >

Well, I'm not an expert of linux/x86 at all, and this is a bit off
topic :), but look at the comment in arch/i386/process.c:408:
 * We fsave/fwait so that an exception goes off at the right time
 * (as a call from the fsave or fwait in effect) rather than to
 * the wrong process. Lazy FP saving no longer makes any sense
 * with modern CPU's, and this simplifies a lot of things (SMP
 * and UP become the same).

It seems they're just calling unlazy_fpu to do a fsave/fwait to
synchronize the FPU so that if an exception happens in the FPU code of a
process, the current process is signalled and not some newly scheduled
process instead. I think they do the same thing when cloning; put a
barrier to current process FPU operations so that it gets the signal, not
its child, if something is wrong in the previously executed FPU
instructions. Whether TIF_USEDFPU is set or cleared in the child isn't
really relevant in fact, it is maybe slightly inefficient because on
the first context switch of the child, an unnecessary fsave/fwait will be
done, but it doesn't hurt.

Vivien.


From Kumba12345@aol.com Fri Feb  7 19:41:38 2003
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Subject: Kernel from CVS won't boot
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       I've built a kernel from linux-mips CVS (2.4 branch), yet this kernel 
refuses to boot on my Indigo2 machine.  I get to the PROM monitor, type in 
"boot -f 2420_2" (what I named the kernel in the volume header), and it just 
stops doing anything and sits there.  The light on the front of my case 
starts flashing, indicating I believe a panic of some kind.

       Any ideas on what may be possible causes of this?  I'm booting my 
kernels from the volume header directly.  If configs are needed, I can 
provide them.

--Kumba

From clausen@pureza.melbourne.sgi.com Mon Feb 10 03:46:01 2003
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Date: Mon, 10 Feb 2003 14:45:49 +1100
From: Andrew Clausen <clausen@melbourne.sgi.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Guido Guenther <agx@sigxcpu.org>
Subject: porting arcboot
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Hi all,

I'm planning to try porting arcboot to ip27 (mips64).

I plan to do this by cross-compiling... this is actually the only
option since there's no 64 bit userland yet.

Some issues:

 * I'll be cross-compiling (using the mips64-linux-gcc & friends that
are provided on ftp.linux-mips.org), which means some makefile hacking...

 * there's no mips64-linux glibc, which means no libc headers are
available.  So I need to either cut&paste libc headers, or remove
dependencies on them.  This affects lots of code.

 * the e2fs stuff... how is this being maintained?  It uses libc
headers a bit... can I kill them?  Or will this make it hard to update
to new upstream e2fsprogs releases?

Anything else?

Cheers,
ANdrew


From agx@mittelerde.physik.uni-konstanz.de Mon Feb 10 10:03:32 2003
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Date: Mon, 10 Feb 2003 11:03:19 +0100
From: Guido Guenther <agx@gandalf.physik.uni-konstanz.de>
To: Andrew Clausen <clausen@melbourne.sgi.com>
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Subject: Re: porting arcboot
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Hi,
On Mon, Feb 10, 2003 at 02:45:49PM +1100, Andrew Clausen wrote:
>  * I'll be cross-compiling (using the mips64-linux-gcc & friends that
> are provided on ftp.linux-mips.org), which means some makefile hacking...
There hopefully shouldn't be any trouble with that outside of e2fslib.

>  * the e2fs stuff... how is this being maintained?  It uses libc
> headers a bit... can I kill them?  Or will this make it hard to update
> to new upstream e2fsprogs releases?
E2fslib will move out of arcboot with the next release and arcboot will
link against the non pic version in the debian archive. I'd really like
to keep e2fslib out of arcboot (at least for the debian version which is
quiet different from the oss.sgi.com version). There should't be many
libc header dependencies left then. If there are still any I'd be happy
to kill them.

> Anything else?
Except for the above change I was working on a better command line
handling among other things which I never got around to finish. Maybe
this beats me to it.
Regards,
 -- Guido

From vivienc@nerim.net Mon Feb 10 10:33:24 2003
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> I'm planning to try porting arcboot to ip27 (mips64).

I'm actually doing the same for ip32 (SGI O2). I've added support for
64-bit ELF while sticking to 32-bit arcboot to avoid the issues you
mention with 64-bit userland. The code is still a bit ugly and I've
hardcoded a different load address for the O2 (this should be a
'configure' option at least), but you might be interested to have a look.
The same trick used for the kernel could probably be used to relocate the
32-bit arcboot to 64-bit address space using objcopy, for the ip27 PROM
which only supports 64-bit ELF (according to Ralf).

An early patch is there:
http://www.linux-mips.org/~glaurung/arcboot-0.3.5-o2.diff

The idea is to load segments with the KSEG0 version of the physical
address, which can be done with 32-bit code (but limits kernel load
address to <512Mb). We then jump to the 64-bit entry point with a small
bit of mips4 assembly. 

Comments welcome.

Vivien.


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Date: Mon, 10 Feb 2003 19:56:13 +0900
From: Yoichi Yuasa <yoichi_yuasa@montavista.co.jp>
To: ralf@linux-mips.org
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Subject: [patch] TANBAC TB0226(NEC VR4131) for 2.5
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This is a multi-part message in MIME format.

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Hello again,

On Wed, 5 Feb 2003 11:40:45 +0900
Yoichi Yuasa <yoichi_yuasa@montavista.co.jp> wrote:

> On Tue, 4 Feb 2003 13:44:06 +0100
> Ralf Baechle <ralf@linux-mips.org> wrote:
> 
> > On Tue, Feb 04, 2003 at 03:40:25PM +0900, Yoichi Yuasa wrote:
> > 
> > > This patch is based on linux_2_4 tag cvs tree on ftp.linux-mips.org
> > > Would you apply this patch to CVS on ftp.linux-mips.org?
> > 
> > Could you also make a patch against 2.5?  It's a huge PITA when 2.4 and
> > 2.5 trees are diverging so I'd really like to have a patch for 2.5 also.
> 
> OK, please wait for a moment.

I also made a patch for 2.5.
Would you apply this patch to CVS on ftp.linux-mips.org?

Best Regards,

Yoichi

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diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/Kconfig-shared linux/arch/mips/Kconfig-shared
--- linux.orig/arch/mips/Kconfig-shared	Mon Feb 10 12:29:06 2003
+++ linux/arch/mips/Kconfig-shared	Mon Feb 10 19:17:40 2003
@@ -26,7 +26,7 @@
 
 config PCI_AUTO
 	bool "Support for PCI AUTO Config" if MIPS_PB1000
-	default y if ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || NEC_EAGLE || DDB5477 || DDB5476 || DDB5074 || MIPS_ITE8172 || MIPS_IVR || MIPS_EV96100 || MIPS_PB1500
+	default y if ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || NEC_EAGLE || DDB5477 || DDB5476 || DDB5074 || MIPS_ITE8172 || MIPS_IVR || MIPS_EV96100 || MIPS_PB1500 || TANBAC_TB0226
 
 config MIPS_PB1100
 	bool "Support for Alchemy Semi PB1100 board"
@@ -413,7 +413,7 @@
 
 config PCI
 	bool "Support for PCI controller" if SIBYTE_SB1xxx_SOC && SIBYTE_SB1250
-	default y if ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || SNI_RM200_PCI || SGI_IP32 || SGI_IP27 || NEC_EAGLE || DDB5477 || DDB5476 || DDB5074 || MOMENCO_OCELOT_G || MOMENCO_OCELOT || MIPS_MALTA || MIPS_ATLAS || LASAT || MIPS_ITE8172 || HP_LASERJET || MIPS_IVR || MIPS_EV96100 || MIPS_EV64120 || MIPS_COBALT || MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000
+	default y if ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || SNI_RM200_PCI || SGI_IP32 || SGI_IP27 || NEC_EAGLE || DDB5477 || DDB5476 || DDB5074 || MOMENCO_OCELOT_G || MOMENCO_OCELOT || MIPS_MALTA || MIPS_ATLAS || LASAT || MIPS_ITE8172 || HP_LASERJET || MIPS_IVR || MIPS_EV96100 || MIPS_EV64120 || MIPS_COBALT || MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 || TANBAC_TB0226
 	help
 	  Find out whether you have a PCI motherboard. PCI is the name of a
 	  bus system, i.e. the way the CPU talks to the other stuff inside
@@ -437,6 +437,12 @@
 	  Technology and now in turn merged with Fujitsu.  Say Y here to
 	  support this machine type.
 
+config TANBAC_TB0226
+	bool "Support for TANBAC TB0226 (Mbase)"
+	help
+	  The TANBAC TB0226 (Mbase) is a MIPS-based platform manufactured by TANBAC.
+	  Please refer to <http://www.tanbac.co.jp/> about Mbase.
+
 config TOSHIBA_JMR3927
 	bool "Support for Toshiba JMR-TX3927 board"
 	depends on MIPS32
@@ -490,8 +496,8 @@
 
 config NONCOHERENT_IO
 	bool
-	depends on ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || SNI_RM200_PCI || SGI_IP32 || SGI_IP22 || NINO || NEC_EAGLE || NEC_OSPREY || DDB5477 || DDB5476 || DDB5074 || MOMENCO_OCELOT_G || MOMENCO_OCELOT || MIPS_SEAD || MIPS_MALTA || MIPS_MAGNUM_4000 || OLIVETTI_M700 || MIPS_ATLAS || LASAT || MIPS_ITE8172 || IBM_WORKPAD || HP_LASERJET || MIPS_IVR || MIPS_EV96100 || MIPS_EV64120 || DECSTATION || MIPS_COBALT || MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 || CASIO_E55 || ACER_PICA_61
-	default y if ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || SNI_RM200_PCI || SGI_IP32 || SGI_IP22 || NINO || NEC_EAGLE || NEC_OSPREY || DDB5477 || DDB5476 || DDB5074 || MOMENCO_OCELOT_G || MOMENCO_OCELOT || MIPS_SEAD || MIPS_MALTA || MIPS_MAGNUM_4000 || OLIVETTI_M700 || MIPS_ATLAS || LASAT || MIPS_ITE8172 || IBM_WORKPAD || HP_LASERJET || MIPS_IVR || MIPS_EV96100 || MIPS_EV64120 || DECSTATION || MIPS_COBALT || MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 || CASIO_E55 || ACER_PICA_61
+	depends on ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || SNI_RM200_PCI || SGI_IP32 || SGI_IP22 || NINO || NEC_EAGLE || NEC_OSPREY || DDB5477 || DDB5476 || DDB5074 || MOMENCO_OCELOT_G || MOMENCO_OCELOT || MIPS_SEAD || MIPS_MALTA || MIPS_MAGNUM_4000 || OLIVETTI_M700 || MIPS_ATLAS || LASAT || MIPS_ITE8172 || IBM_WORKPAD || HP_LASERJET || MIPS_IVR || MIPS_EV96100 || MIPS_EV64120 || DECSTATION || MIPS_COBALT || MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 || CASIO_E55 || ACER_PICA_61 || TANBAC_TB0226
+	default y if ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || SNI_RM200_PCI || SGI_IP32 || SGI_IP22 || NINO || NEC_EAGLE || NEC_OSPREY || DDB5477 || DDB5476 || DDB5074 || MOMENCO_OCELOT_G || MOMENCO_OCELOT || MIPS_SEAD || MIPS_MALTA || MIPS_MAGNUM_4000 || OLIVETTI_M700 || MIPS_ATLAS || LASAT || MIPS_ITE8172 || IBM_WORKPAD || HP_LASERJET || MIPS_IVR || MIPS_EV96100 || MIPS_EV64120 || DECSTATION || MIPS_COBALT || MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 || CASIO_E55 || ACER_PICA_61 || TANBAC_TB0226
 	default n if (SIBYTE_SB1250 || SGI_IP27)
 
 config CPU_LITTLE_ENDIAN
@@ -505,17 +511,17 @@
 
 config IRQ_CPU
 	bool
-	depends on ZAO_CAPCELLA || VICTOR_MPC30X || SGI_IP22 || NEC_EAGLE || NEC_OSPREY || DDB5477 || DDB5476 || DDB5074 || IBM_WORKPAD || HP_LASERJET || DECSTATION || CASIO_E55
+	depends on ZAO_CAPCELLA || VICTOR_MPC30X || SGI_IP22 || NEC_EAGLE || NEC_OSPREY || DDB5477 || DDB5476 || DDB5074 || IBM_WORKPAD || HP_LASERJET || DECSTATION || CASIO_E55 || TANBAC_TB0226
 	default y
 
 config VR41XX_TIME_C
 	bool
-	depends on ZAO_CAPCELLA || VICTOR_MPC30X || NEC_EAGLE || IBM_WORKPAD || CASIO_E55
+	depends on ZAO_CAPCELLA || VICTOR_MPC30X || NEC_EAGLE || IBM_WORKPAD || CASIO_E55 || TANBAC_TB0226
 	default y
 
 config DUMMY_KEYB
 	bool
-	depends on ZAO_CAPCELLA || VICTOR_MPC30X || SIBYTE_SB1250 || NEC_EAGLE || NEC_OSPREY || DDB5477 || IBM_WORKPAD || CASIO_E55
+	depends on ZAO_CAPCELLA || VICTOR_MPC30X || SIBYTE_SB1250 || NEC_EAGLE || NEC_OSPREY || DDB5477 || IBM_WORKPAD || CASIO_E55 || TANBAC_TB0226
 	default y
 
 config ALCHEMY_COMMON
@@ -525,7 +531,7 @@
 
 config VR41XX_COMMON
 	bool
-	depends on NEC_EAGLE || ZAO_CAPCELLA || VICTOR_MPC30X || IBM_WORKPAD || CASIO_E55
+	depends on NEC_EAGLE || ZAO_CAPCELLA || VICTOR_MPC30X || IBM_WORKPAD || CASIO_E55 || TANBAC_TB0226
 	default y
 
 config VRC4173
@@ -554,7 +560,7 @@
 
 config NEW_PCI
 	bool
-	depends on ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || NEC_EAGLE || DDB5477 || DDB5476 || DDB5074 || MIPS_ITE8172 || HP_LASERJET || MIPS_IVR || MIPS_EV96100 || MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000
+	depends on ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || NEC_EAGLE || DDB5477 || DDB5476 || DDB5074 || MIPS_ITE8172 || HP_LASERJET || MIPS_IVR || MIPS_EV96100 || MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 || TANBAC_TB0226
 	default y
 
 config SWAP_IO_SPACE
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/Makefile linux/arch/mips/Makefile
--- linux.orig/arch/mips/Makefile	Fri Jan 24 10:26:58 2003
+++ linux/arch/mips/Makefile	Mon Feb 10 19:17:40 2003
@@ -277,6 +277,12 @@
 load-$(CONFIG_CASIO_E55)	+= 0x80004000
 
 #
+# TANBAC TB0226 Mbase (VR4131)
+#
+core-$(CONFIG_TANBAC_TB0226)	+= arch/mips/vr41xx/tanbac-tb0226/
+load-$(CONFIG_TANBAC_TB0226)	+= 0x80000000
+
+#
 # Philips Nino
 #
 core-$(CONFIG_NINO)		+= arch/mips/philips/nino/
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/defconfig-tb0226 linux/arch/mips/defconfig-tb0226
--- linux.orig/arch/mips/defconfig-tb0226	Thu Jan  1 09:00:00 1970
+++ linux/arch/mips/defconfig-tb0226	Mon Feb 10 19:17:40 2003
@@ -0,0 +1,900 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+CONFIG_MIPS32=y
+# CONFIG_MIPS64 is not set
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+
+#
+# General setup
+#
+CONFIG_NET=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+# CONFIG_MODVERSIONS is not set
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_ACER_PICA_61 is not set
+# CONFIG_MIPS_PB1000 is not set
+CONFIG_PCI_AUTO=y
+# CONFIG_MIPS_PB1100 is not set
+# CONFIG_MIPS_PB1500 is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_CASIO_E55 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_IBM_WORKPAD is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MAGNUM_4000 is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_NEC_EAGLE is not set
+# CONFIG_OLIVETTI_M700 is not set
+# CONFIG_NINO is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+CONFIG_PCI=y
+# CONFIG_SNI_RM200_PCI is not set
+CONFIG_TANBAC_TB0226=y
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_VICTOR_MPC30X is not set
+# CONFIG_ZAO_CAPCELLA is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_NONCOHERENT_IO=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_VR41XX_TIME_C=y
+CONFIG_DUMMY_KEYB=y
+CONFIG_VR41XX_COMMON=y
+CONFIG_NEW_PCI=y
+CONFIG_FB=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+CONFIG_CPU_VR41XX=y
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_SB1 is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+CONFIG_SWAP=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_KCORE_ELF=y
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play configuration
+#
+# CONFIG_PNP is not set
+
+#
+# Block devices
+#
+CONFIG_BLK_DEV_FD=y
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+CONFIG_BLK_DEV_LOOP=m
+CONFIG_BLK_DEV_NBD=m
+CONFIG_BLK_DEV_RAM=m
+CONFIG_BLK_DEV_RAM_SIZE=4096
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+
+#
+# IDE, ATA and ATAPI Block devices
+#
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_BLK_DEV_IDEDISK=y
+CONFIG_IDEDISK_MULTI_MODE=y
+# CONFIG_IDEDISK_STROKE is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+CONFIG_BLK_DEV_IDESCSI=y
+# CONFIG_IDE_TASK_IOCTL is not set
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_BLK_DEV_IDEPCI=y
+# CONFIG_BLK_DEV_GENERIC is not set
+CONFIG_IDEPCI_SHARE_IRQ=y
+CONFIG_BLK_DEV_IDEDMA_PCI=y
+# CONFIG_BLK_DEV_IDE_TCQ is not set
+# CONFIG_BLK_DEV_OFFBOARD is not set
+# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
+CONFIG_IDEDMA_PCI_AUTO=y
+# CONFIG_IDEDMA_ONLYDISK is not set
+CONFIG_BLK_DEV_IDEDMA=y
+# CONFIG_IDEDMA_PCI_WIP is not set
+CONFIG_BLK_DEV_ADMA=y
+# CONFIG_BLK_DEV_AEC62XX is not set
+# CONFIG_BLK_DEV_ALI15X3 is not set
+# CONFIG_BLK_DEV_AMD74XX is not set
+# CONFIG_BLK_DEV_CMD64X is not set
+# CONFIG_BLK_DEV_CY82C693 is not set
+# CONFIG_BLK_DEV_CS5530 is not set
+# CONFIG_BLK_DEV_HPT34X is not set
+# CONFIG_BLK_DEV_HPT366 is not set
+CONFIG_BLK_DEV_PIIX=y
+# CONFIG_BLK_DEV_NFORCE is not set
+# CONFIG_BLK_DEV_NS87415 is not set
+# CONFIG_BLK_DEV_OPTI621 is not set
+# CONFIG_BLK_DEV_PDC202XX_OLD is not set
+# CONFIG_BLK_DEV_PDC202XX_NEW is not set
+# CONFIG_BLK_DEV_SVWKS is not set
+# CONFIG_BLK_DEV_SIIMAGE is not set
+# CONFIG_BLK_DEV_SLC90E66 is not set
+# CONFIG_BLK_DEV_TRM290 is not set
+# CONFIG_BLK_DEV_VIA82CXXX is not set
+CONFIG_IDEDMA_AUTO=y
+# CONFIG_IDEDMA_IVB is not set
+CONFIG_BLK_DEV_IDE_MODES=y
+
+#
+# SCSI device support
+#
+CONFIG_SCSI=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=y
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=y
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_REPORT_LUNS is not set
+CONFIG_SCSI_CONSTANTS=y
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_IN2000 is not set
+# CONFIG_SCSI_AM53C974 is not set
+# CONFIG_SCSI_MEGARAID is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_CPQFCTS is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_EATA_DMA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_GENERIC_NCR5380 is not set
+# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_NCR53C7xx is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_NCR53C8XX is not set
+# CONFIG_SCSI_SYM53C8XX is not set
+# CONFIG_SCSI_PCI2000 is not set
+# CONFIG_SCSI_PCI2220I is not set
+# CONFIG_SCSI_QLOGIC_ISP is not set
+# CONFIG_SCSI_QLOGIC_FC is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_U14_34F is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=m
+# CONFIG_NETFILTER is not set
+# CONFIG_FILTER is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_NAT=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_TOS=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_ROUTE_LARGE_TABLES=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_IPV6 is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_B44 is not set
+# CONFIG_TC35815 is not set
+# CONFIG_DGRS is not set
+CONFIG_EEPRO100=y
+# CONFIG_E100 is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_8139CP is not set
+# CONFIG_8139TOO is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_LAN_SAA9730 is not set
+# CONFIG_NET_POCKET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+CONFIG_PPPOE=m
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=m
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1280
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=1024
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+# CONFIG_SERIO is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+# CONFIG_VT_CONSOLE is not set
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+CONFIG_FONT_8x16=y
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# File systems
+#
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+CONFIG_AUTOFS4_FS=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=m
+CONFIG_TMPFS=y
+CONFIG_RAMFS=y
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+# CONFIG_JFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_NTFS_FS is not set
+# CONFIG_HPFS_FS is not set
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+# CONFIG_QNX4FS_FS is not set
+CONFIG_ROMFS_FS=m
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UDF_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_XFS_FS is not set
+
+#
+# Network File Systems
+#
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=m
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V4 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_SUNRPC=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+# CONFIG_CIFS is not set
+CONFIG_SMB_FS=m
+CONFIG_SMB_NLS_DEFAULT=y
+CONFIG_SMB_NLS_REMOTE="cp932"
+# CONFIG_NCP_FS is not set
+# CONFIG_AFS_FS is not set
+CONFIG_ZISOFS_FS=y
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_SMB_NLS=y
+CONFIG_NLS=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+CONFIG_NLS_CODEPAGE_932=m
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ISO8859_1=m
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Console drivers
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+
+#
+# Frame-buffer support
+#
+# CONFIG_FB_CLGEN is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_RIVA is not set
+CONFIG_FB_MATROX=y
+# CONFIG_FB_MATROX_MILLENIUM is not set
+# CONFIG_FB_MATROX_MYSTIQUE is not set
+# CONFIG_FB_MATROX_G450 is not set
+# CONFIG_FB_MATROX_G100A is not set
+# CONFIG_FB_MATROX_MULTIHEAD is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_PM3 is not set
+# CONFIG_FB_E1356 is not set
+# CONFIG_FB_VIRTUAL is not set
+CONFIG_FBCON_ADVANCED=y
+# CONFIG_FBCON_MFB is not set
+# CONFIG_FBCON_CFB2 is not set
+# CONFIG_FBCON_CFB4 is not set
+CONFIG_FBCON_CFB8=y
+CONFIG_FBCON_CFB16=y
+CONFIG_FBCON_CFB24=y
+CONFIG_FBCON_CFB32=y
+# CONFIG_FBCON_ACCEL is not set
+# CONFIG_FBCON_AFB is not set
+# CONFIG_FBCON_ILBM is not set
+# CONFIG_FBCON_IPLAN2P2 is not set
+# CONFIG_FBCON_IPLAN2P4 is not set
+# CONFIG_FBCON_IPLAN2P8 is not set
+# CONFIG_FBCON_VGA_PLANES is not set
+# CONFIG_FBCON_HGA is not set
+# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_SUN12x22 is not set
+CONFIG_FBCON_FONTS=y
+CONFIG_FONT_8x8=y
+# CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+# CONFIG_FONT_MINI_4x6 is not set
+
+#
+# Sound
+#
+CONFIG_SOUND=y
+
+#
+# Open Sound System
+#
+# CONFIG_SOUND_PRIME is not set
+
+#
+# Advanced Linux Sound Architecture
+#
+# CONFIG_SND is not set
+
+#
+# USB support
+#
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_LONG_TIMEOUT=y
+CONFIG_USB_BANDWIDTH=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_UHCI_HCD_ALT is not set
+
+#
+# USB Device Class drivers
+#
+CONFIG_USB_AUDIO=m
+# CONFIG_USB_BLUETOOTH_TTY is not set
+# CONFIG_USB_MIDI is not set
+CONFIG_USB_ACM=m
+CONFIG_USB_PRINTER=m
+CONFIG_USB_STORAGE=m
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_ISD200=y
+CONFIG_USB_STORAGE_DPCM=y
+CONFIG_USB_STORAGE_HP8200e=y
+CONFIG_USB_STORAGE_SDDR09=y
+# CONFIG_USB_STORAGE_SDDR55 is not set
+CONFIG_USB_STORAGE_JUMPSHOT=y
+
+#
+# USB Human Interface Devices (HID)
+#
+CONFIG_USB_HID=m
+# CONFIG_USB_HIDINPUT is not set
+CONFIG_USB_HIDDEV=y
+
+#
+# USB HID Boot Protocol drivers
+#
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+# CONFIG_USB_AIPTEK is not set
+# CONFIG_USB_WACOM is not set
+# CONFIG_USB_POWERMATE is not set
+# CONFIG_USB_XPAD is not set
+
+#
+# USB Imaging devices
+#
+CONFIG_USB_MDC800=m
+CONFIG_USB_SCANNER=m
+CONFIG_USB_MICROTEK=m
+CONFIG_USB_HPUSBSCSI=m
+
+#
+# USB Multimedia devices
+#
+# CONFIG_USB_DABUSB is not set
+
+#
+# Video4Linux support is needed for USB Multimedia device support
+#
+
+#
+# USB Network adaptors
+#
+CONFIG_USB_CATC=m
+CONFIG_USB_CDCETHER=m
+CONFIG_USB_KAWETH=m
+CONFIG_USB_PEGASUS=m
+# CONFIG_USB_RTL8150 is not set
+CONFIG_USB_USBNET=m
+
+#
+# USB port drivers
+#
+
+#
+# USB Serial Converter support
+#
+CONFIG_USB_SERIAL=m
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_BELKIN=m
+CONFIG_USB_SERIAL_WHITEHEAT=m
+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
+CONFIG_USB_SERIAL_EMPEG=m
+CONFIG_USB_SERIAL_FTDI_SIO=m
+CONFIG_USB_SERIAL_VISOR=m
+CONFIG_USB_SERIAL_IPAQ=m
+CONFIG_USB_SERIAL_IR=m
+CONFIG_USB_SERIAL_EDGEPORT=m
+# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
+CONFIG_USB_SERIAL_KEYSPAN_PDA=m
+CONFIG_USB_SERIAL_KEYSPAN=m
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19QW is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19QI is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+CONFIG_USB_SERIAL_KLSI=m
+CONFIG_USB_SERIAL_MCT_U232=m
+CONFIG_USB_SERIAL_PL2303=m
+# CONFIG_USB_SERIAL_SAFE is not set
+CONFIG_USB_SERIAL_CYBERJACK=m
+CONFIG_USB_SERIAL_XIRCOM=m
+CONFIG_USB_SERIAL_OMNINET=m
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_TIGL is not set
+# CONFIG_USB_AUERSWALD is not set
+CONFIG_USB_RIO500=m
+# CONFIG_USB_BRLVGER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_TEST is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+CONFIG_SECURITY_CAPABILITIES=y
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=m
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/vr41xx/tanbac-tb0226/Makefile linux/arch/mips/vr41xx/tanbac-tb0226/Makefile
--- linux.orig/arch/mips/vr41xx/tanbac-tb0226/Makefile	Thu Jan  1 09:00:00 1970
+++ linux/arch/mips/vr41xx/tanbac-tb0226/Makefile	Mon Feb 10 19:17:41 2003
@@ -0,0 +1,7 @@
+#
+# Makefile for the TANBAC TB0226 specific parts of the kernel
+#
+
+obj-y	:= init.o setup.o
+
+obj-$(CONFIG_PCI)	+= pci_fixup.o
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/vr41xx/tanbac-tb0226/init.c linux/arch/mips/vr41xx/tanbac-tb0226/init.c
--- linux.orig/arch/mips/vr41xx/tanbac-tb0226/init.c	Thu Jan  1 09:00:00 1970
+++ linux/arch/mips/vr41xx/tanbac-tb0226/init.c	Mon Feb 10 19:17:41 2003
@@ -0,0 +1,68 @@
+/*
+ * FILE NAME
+ *	arch/mips/vr41xx/tanbac-tb0226/init.c
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	Initialisation code for the TANBAC TB0226.
+ *
+ * Copyright 2002,2003 Yoichi Yuasa
+ *                yuasa@hh.iij4u.or.jp
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License as published by the
+ *  Free Software Foundation; either version 2 of the License, or (at your
+ *  option) any later version.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+
+#include <asm/bootinfo.h>
+#include <asm/cpu.h>
+#include <asm/mipsregs.h>
+#include <asm/vr41xx/vr41xx.h>
+
+char arcs_cmdline[CL_SIZE];
+
+const char *get_system_type(void)
+{
+	return "TANBAC TB0226";
+}
+
+void __init bus_error_init(void)
+{
+}
+
+void __init prom_init(int argc, char **argv, unsigned long magic, int *prom_vec)
+{
+	u32 config;
+	int i;
+
+	/*
+	 * collect args and prepare cmd_line
+	 */
+	for (i = 1; i < argc; i++) {
+		strcat(arcs_cmdline, argv[i]);
+		if (i < (argc - 1))
+			strcat(arcs_cmdline, " ");
+	}
+
+	mips_machgroup = MACH_GROUP_NEC_VR41XX;
+	mips_machtype = MACH_TANBAC_TB0226;
+
+	switch (mips_cpu.processor_id) {
+	case PRID_VR4131_REV1_2:
+		config = read_c0_config();
+		config &= ~0x00000030UL;
+		config |= 0x00410000UL;
+		write_c0_config(config);
+		break;
+	default:
+		break;
+	}
+}
+
+void __init prom_free_prom_memory (void)
+{
+}
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/vr41xx/tanbac-tb0226/pci_fixup.c linux/arch/mips/vr41xx/tanbac-tb0226/pci_fixup.c
--- linux.orig/arch/mips/vr41xx/tanbac-tb0226/pci_fixup.c	Thu Jan  1 09:00:00 1970
+++ linux/arch/mips/vr41xx/tanbac-tb0226/pci_fixup.c	Mon Feb 10 19:17:41 2003
@@ -0,0 +1,87 @@
+/*
+ * FILE NAME
+ *	arch/mips/vr41xx/tanbac-tb0226/pci_fixup.c
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	The TANBAC TB0226 specific PCI fixups.
+ *
+ * Copyright 2002,2003 Yoichi Yuasa
+ *                yuasa@hh.iij4u.or.jp
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License as published by the
+ *  Free Software Foundation; either version 2 of the License, or (at your
+ *  option) any later version.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+
+#include <asm/vr41xx/tb0226.h>
+
+void __init pcibios_fixup_resources(struct pci_dev *dev)
+{
+}
+
+void __init pcibios_fixup(void)
+{
+}
+
+void __init pcibios_fixup_irqs(void)
+{
+	struct pci_dev *dev;
+	u8 slot, pin;
+
+	pci_for_each_dev(dev) {
+		slot = PCI_SLOT(dev->devfn);
+		dev->irq = 0;
+
+		switch (slot) {
+		case 12:
+			vr41xx_set_irq_trigger(GD82559_1_PIN, TRIGGER_LEVEL,
+			                       SIGNAL_THROUGH);
+			vr41xx_set_irq_level(GD82559_1_PIN, LEVEL_LOW);
+			dev->irq = GD82559_1_IRQ;
+			break;
+		case 13:
+			vr41xx_set_irq_trigger(GD82559_2_PIN, TRIGGER_LEVEL,
+			                       SIGNAL_THROUGH);
+			vr41xx_set_irq_level(GD82559_2_PIN, LEVEL_LOW);
+			dev->irq = GD82559_2_IRQ;
+			break;
+		case 14:
+			pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
+			switch (pin) {
+			case 1:
+				vr41xx_set_irq_trigger(UPD720100_INTA_PIN,
+				                       TRIGGER_LEVEL,
+				                       SIGNAL_THROUGH);
+				vr41xx_set_irq_level(UPD720100_INTA_PIN, LEVEL_LOW);
+				dev->irq = UPD720100_INTA_IRQ;
+				break;
+			case 2:
+				vr41xx_set_irq_trigger(UPD720100_INTB_PIN,
+				                       TRIGGER_LEVEL,
+				                       SIGNAL_THROUGH);
+				vr41xx_set_irq_level(UPD720100_INTB_PIN, LEVEL_LOW);
+				dev->irq = UPD720100_INTB_IRQ;
+				break;
+			case 3:
+				vr41xx_set_irq_trigger(UPD720100_INTC_PIN,
+				                       TRIGGER_LEVEL,
+				                       SIGNAL_THROUGH);
+				vr41xx_set_irq_level(UPD720100_INTC_PIN, LEVEL_LOW);
+				dev->irq = UPD720100_INTC_IRQ;
+				break;
+			}
+			break;
+		}
+
+		pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
+	}
+}
+
+unsigned int pcibios_assign_all_busses(void)
+{
+	return 0;
+}
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/vr41xx/tanbac-tb0226/setup.c linux/arch/mips/vr41xx/tanbac-tb0226/setup.c
--- linux.orig/arch/mips/vr41xx/tanbac-tb0226/setup.c	Thu Jan  1 09:00:00 1970
+++ linux/arch/mips/vr41xx/tanbac-tb0226/setup.c	Mon Feb 10 19:17:41 2003
@@ -0,0 +1,113 @@
+/*
+ * FILE NAME
+ *	arch/mips/vr41xx/tanbac-tb0226/setup.c
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	Setup for the TANBAC TB0226.
+ *
+ * Copyright 2002,2003 Yoichi Yuasa
+ *                yuasa@hh.iij4u.or.jp
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License as published by the
+ *  Free Software Foundation; either version 2 of the License, or (at your
+ *  option) any later version.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/console.h>
+#include <linux/ide.h>
+#include <linux/ioport.h>
+
+#include <asm/pci_channel.h>
+#include <asm/reboot.h>
+#include <asm/time.h>
+#include <asm/vr41xx/tb0226.h>
+
+#ifdef CONFIG_BLK_DEV_INITRD
+extern unsigned long initrd_start, initrd_end;
+extern void * __rd_start, * __rd_end;
+#endif
+
+#ifdef CONFIG_PCI
+static struct resource vr41xx_pci_io_resource = {
+	"PCI I/O space",
+	VR41XX_PCI_IO_START,
+	VR41XX_PCI_IO_END,
+	IORESOURCE_IO
+};
+
+static struct resource vr41xx_pci_mem_resource = {
+	"PCI memory space",
+	VR41XX_PCI_MEM_START,
+	VR41XX_PCI_MEM_END,
+	IORESOURCE_MEM
+};
+
+extern struct pci_ops vr41xx_pci_ops;
+
+struct pci_channel mips_pci_channels[] = {
+	{&vr41xx_pci_ops, &vr41xx_pci_io_resource, &vr41xx_pci_mem_resource, 0, 256},
+	{NULL, NULL, NULL, 0, 0}
+};
+
+struct vr41xx_pci_address_space vr41xx_pci_mem1 = {
+	VR41XX_PCI_MEM1_BASE,
+	VR41XX_PCI_MEM1_MASK,
+	IO_MEM1_RESOURCE_START
+};
+
+struct vr41xx_pci_address_space vr41xx_pci_mem2 = {
+	VR41XX_PCI_MEM2_BASE,
+	VR41XX_PCI_MEM2_MASK,
+	IO_MEM2_RESOURCE_START
+};
+
+struct vr41xx_pci_address_space vr41xx_pci_io = {
+	VR41XX_PCI_IO_BASE,
+	VR41XX_PCI_IO_MASK,
+	IO_PORT_RESOURCE_START
+};
+
+static struct vr41xx_pci_address_map pci_address_map = {
+	&vr41xx_pci_mem1,
+	&vr41xx_pci_mem2,
+	&vr41xx_pci_io
+};
+#endif
+
+void __init tanbac_tb0226_setup(void)
+{
+	set_io_port_base(IO_PORT_BASE);
+	ioport_resource.start = IO_PORT_RESOURCE_START;
+	ioport_resource.end = IO_PORT_RESOURCE_END;
+	iomem_resource.start = IO_MEM1_RESOURCE_START;
+	iomem_resource.end = IO_MEM2_RESOURCE_END;
+
+#ifdef CONFIG_BLK_DEV_INITRD
+	ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
+	initrd_start = (unsigned long)&__rd_start;
+	initrd_end = (unsigned long)&__rd_end;
+#endif
+
+	_machine_restart = vr41xx_restart;
+	_machine_halt = vr41xx_halt;
+	_machine_power_off = vr41xx_power_off;
+
+	board_time_init = vr41xx_time_init;
+	board_timer_setup = vr41xx_timer_setup;
+
+#ifdef CONFIG_FB
+	conswitchp = &dummy_con;
+#endif
+
+	vr41xx_bcu_init();
+
+	vr41xx_cmu_init(0);
+
+	vr41xx_siu_init(SIU_RS232C, 0);
+
+#ifdef CONFIG_PCI
+	vr41xx_pciu_init(&pci_address_map);
+#endif
+}
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/include/asm-mips/bootinfo.h linux/include/asm-mips/bootinfo.h
--- linux.orig/include/asm-mips/bootinfo.h	Wed Jan 29 10:30:13 2003
+++ linux/include/asm-mips/bootinfo.h	Mon Feb 10 19:17:41 2003
@@ -176,6 +176,7 @@
 #define MACH_VICTOR_MPC30X	3	/* Victor MP-C303/304 */
 #define MACH_IBM_WORKPAD	4	/* IBM WorkPad z50 */
 #define MACH_CASIO_E55		5	/* CASIO CASSIOPEIA E-10/15/55/65 */
+#define MACH_TANBAC_TB0226	6	/* TANBAC TB0226 (Mbase) */
 
 #define CL_SIZE			(256)
 
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/include/asm-mips/vr41xx/tb0226.h linux/include/asm-mips/vr41xx/tb0226.h
--- linux.orig/include/asm-mips/vr41xx/tb0226.h	Thu Jan  1 09:00:00 1970
+++ linux/include/asm-mips/vr41xx/tb0226.h	Mon Feb 10 19:17:41 2003
@@ -0,0 +1,69 @@
+/*
+ * FILE NAME
+ *	include/asm-mips/vr41xx/tb0226.h
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	Include file for TANBAC TB0226.
+ *
+ * Copyright 2002,2003 Yoichi Yuasa
+ *                yuasa@hh.iij4u.or.jp
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License as published by the
+ *  Free Software Foundation; either version 2 of the License, or (at your
+ *  option) any later version.
+ */
+#ifndef __TANBAC_TB0226_H
+#define __TANBAC_TB0226_H
+
+#include <asm/addrspace.h>
+#include <asm/vr41xx/vr41xx.h>
+
+/*
+ * Board specific address mapping
+ */
+#define VR41XX_PCI_MEM1_BASE		0x10000000
+#define VR41XX_PCI_MEM1_SIZE		0x04000000
+#define VR41XX_PCI_MEM1_MASK		0x7c000000
+
+#define VR41XX_PCI_MEM2_BASE		0x14000000
+#define VR41XX_PCI_MEM2_SIZE		0x02000000
+#define VR41XX_PCI_MEM2_MASK		0x7e000000
+
+#define VR41XX_PCI_IO_BASE		0x16000000
+#define VR41XX_PCI_IO_SIZE		0x02000000
+#define VR41XX_PCI_IO_MASK		0x7e000000
+
+#define VR41XX_PCI_IO_START		0x01000000
+#define VR41XX_PCI_IO_END		0x01ffffff
+
+#define VR41XX_PCI_MEM_START		0x12000000
+#define VR41XX_PCI_MEM_END		0x15ffffff
+
+#define IO_PORT_BASE			KSEG1ADDR(VR41XX_PCI_IO_BASE)
+#define IO_PORT_RESOURCE_START		0
+#define IO_PORT_RESOURCE_END		VR41XX_PCI_IO_SIZE
+#define IO_MEM1_RESOURCE_START		VR41XX_PCI_MEM1_BASE
+#define IO_MEM1_RESOURCE_END		(VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE)
+#define IO_MEM2_RESOURCE_START		VR41XX_PCI_MEM2_BASE
+#define IO_MEM2_RESOURCE_END		(VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE)
+
+/*
+ * General-Purpose I/O Pin Number
+ */
+#define GD82559_1_PIN			2
+#define GD82559_2_PIN			3
+#define UPD720100_INTA_PIN		4
+#define UPD720100_INTB_PIN		8
+#define UPD720100_INTC_PIN		13
+
+/*
+ * Interrupt Number
+ */
+#define GD82559_1_IRQ			GIU_IRQ(GD82559_1_PIN)
+#define GD82559_2_IRQ			GIU_IRQ(GD82559_2_PIN)
+#define UPD720100_INTA_IRQ		GIU_IRQ(UPD720100_INTA_PIN)
+#define UPD720100_INTB_IRQ		GIU_IRQ(UPD720100_INTB_PIN)
+#define UPD720100_INTC_IRQ		GIU_IRQ(UPD720100_INTC_PIN)
+
+#endif /* __TANBAC_TB0226_H */

--Multipart_Mon__10_Feb_2003_19:56:13_+0900_08239930--

From guido@honk1.physik.uni-konstanz.de Mon Feb 10 11:13:32 2003
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Date: Mon, 10 Feb 2003 12:13:30 +0100
From: Guido Guenther <agx@gandalf.physik.uni-konstanz.de>
To: Vivien Chappelier <vivienc@nerim.net>
Cc: linux-mips@linux-mips.org
Subject: Re: porting arcboot
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On Mon, Feb 10, 2003 at 11:33:39AM +0100, Vivien Chappelier wrote:
> mention with 64-bit userland. The code is still a bit ugly and I've
> hardcoded a different load address for the O2 (this should be a
> 'configure' option at least), but you might be interested to have a look.
Can't we read the load address (and needed space) from the elf header
before InitMalloc? Would be much nicer and we don't need a different
loader for every subarch.
 -- Guido

From guido@honk1.physik.uni-konstanz.de Mon Feb 10 11:26:45 2003
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From: Guido Guenther <agx@gandalf.physik.uni-konstanz.de>
To: Vivien Chappelier <vivienc@nerim.net>, linux-mips@linux-mips.org
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Subject: Re: porting arcboot
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On Mon, Feb 10, 2003 at 12:13:30PM +0100, Guido Guenther wrote:
> Can't we read the load address (and needed space) from the elf header
s/load address/kernel's load address/
> before InitMalloc? Would be much nicer and we don't need a different
> loader for every subarch.
In case we find a unique place for arcboot in the memory map of the
different subarches.
Regards,
 -- Guido

From marc.groeneveld@hccnet.nl Mon Feb 10 11:28:55 2003
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Subject: siemens rm300c and linux
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Hi everybody,

I have a rm300c from siemens nixdorf (R4400 mips processor, 64M RAM) and
want to put Linux on it.

Which distribution is the best choice?

Has someone tried and succeeded?

Maybe someone has some hints?

Thanks,

Marc Groeneveld.



From pa9mg@amsat.org Mon Feb 10 11:46:37 2003
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Hi everybody,

I have a rm300c from siemens nixdorf (R4400 mips processor, 64M RAM) and
want to put Linux on it.

Which distribution is the best choice?

Has someone tried and succeeded?

Maybe someone has some hints?

Thanks,

Marc Groeneveld.






From yoichi_yuasa@montavista.co.jp Mon Feb 10 12:30:32 2003
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Date: Mon, 10 Feb 2003 21:24:57 +0900
From: Yoichi Yuasa <yoichi_yuasa@montavista.co.jp>
To: ralf@linux-mips.org
Cc: yoichi_yuasa@montavista.co.jp, linux-mips@linux-mips.org
Subject: [patch] Keep Machine selection alphabetically sorted
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This is a multi-part message in MIME format.

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Hello Ralf,

Machine selection is sorted alphabetically by this patch.
Would you apply this patch to CVS on linux_2_4 tag of ftp.linux-mips.org?

Best Regards,

Yoichi

--Multipart_Mon__10_Feb_2003_21:24:57_+0900_0824d1a0
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diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/config-shared.in linux/arch/mips/config-shared.in
--- linux.orig/arch/mips/config-shared.in	Mon Feb 10 12:26:33 2003
+++ linux/arch/mips/config-shared.in	Mon Feb 10 21:10:14 2003
@@ -30,74 +30,6 @@
 dep_bool 'Support for Alchemy PB1100 board' CONFIG_MIPS_PB1100 $CONFIG_MIPS32
 dep_bool 'Support for Alchemy PB1500 board' CONFIG_MIPS_PB1500 $CONFIG_MIPS32
 dep_bool 'Support for BAGET MIPS series (EXPERIMENTAL)' CONFIG_BAGET_MIPS $CONFIG_MIPS32 $CONFIG_EXPERIMENTAL
-bool 'Support for CASIO CASSIOPEIA E-10/15/55/65' CONFIG_CASIO_E55
-dep_bool 'Support for Cobalt Server (EXPERIMENTAL)' CONFIG_MIPS_COBALT $CONFIG_EXPERIMENTAL
-if [ "$CONFIG_MIPS32" = "y" ]; then
-   bool 'Support for DECstations' CONFIG_DECSTATION
-else
-   dep_bool 'Support for DECstations (EXPERIMENTAL)' CONFIG_DECSTATION $CONFIG_EXPERIMENTAL
-fi
-dep_bool 'Support for Galileo EV64120 Evaluation board (EXPERIMENTAL)' CONFIG_MIPS_EV64120 $CONFIG_EXPERIMENTAL
-if [ "$CONFIG_MIPS_EV64120" = "y" ]; then
-   bool '  Enable Second PCI (PCI1)' CONFIG_EVB_PCI1
-   choice '  Galileo Chip Clock' \
-	"75	CONFIG_SYSCLK_75 \
-	 83.3	CONFIG_SYSCLK_83 \
-	 100	CONFIG_SYSCLK_100" 83.3
-fi
-dep_bool 'Support for Galileo EV96100 Evaluation board (EXPERIMENTAL)' CONFIG_MIPS_EV96100 $CONFIG_EXPERIMENTAL
-bool 'Support for Globespan IVR board' CONFIG_MIPS_IVR
-bool 'Support for Hewlett Packard LaserJet board' CONFIG_HP_LASERJET
-bool 'Support for IBM WorkPad z50' CONFIG_IBM_WORKPAD
-bool 'Support for LASAT Networks platforms' CONFIG_LASAT
-if [ "$CONFIG_LASAT" = "y" ]; then
-   tristate '  PICVUE LCD display driver' CONFIG_PICVUE
-   dep_tristate '   PICVUE LCD display driver /proc interface' CONFIG_PICVUE_PROC $CONFIG_PICVUE
-   bool '  DS1603 RTC driver' CONFIG_DS1603
-   bool '  LASAT sysctl interface' CONFIG_LASAT_SYSCTL
-fi
-bool 'Support for ITE 8172G board' CONFIG_MIPS_ITE8172
-if [ "$CONFIG_MIPS_ITE8172" = "y" ]; then
-   bool '  Support for older IT8172 (Rev C)' CONFIG_IT8172_REVC
-fi
-bool 'Support for MIPS Atlas board' CONFIG_MIPS_ATLAS
-bool 'Support for MIPS Magnum 4000' CONFIG_MIPS_MAGNUM_4000
-bool 'Support for MIPS Malta board' CONFIG_MIPS_MALTA
-dep_bool 'Support for MIPS SEAD board (EXPERIMENTAL)' CONFIG_MIPS_SEAD $CONFIG_EXPERIMENTAL
-bool 'Support for Momentum Ocelot board' CONFIG_MOMENCO_OCELOT
-bool 'Support for Momentum Ocelot-G board' CONFIG_MOMENCO_OCELOT_G
-dep_bool 'Support for NEC DDB Vrc-5074 (EXPERIMENTAL)' CONFIG_DDB5074 $CONFIG_EXPERIMENTAL
-bool 'Support for NEC DDB Vrc-5476' CONFIG_DDB5476
-bool 'Support for NEC DDB Vrc-5477' CONFIG_DDB5477
-if [ "$CONFIG_DDB5477" = "y" ]; then
-   int '   bus frequency (in kHZ, 0 for auto-detect)' CONFIG_DDB5477_BUS_FREQUENCY 0
-fi
-bool 'Support for NEC Osprey board' CONFIG_NEC_OSPREY
-bool 'Support for NEC Eagle/Hawk board' CONFIG_NEC_EAGLE
-if [ "$CONFIG_NEC_EAGLE" = "y" ]; then
-   tristate '  NEC VRC4173 support' CONFIG_VRC4173
-fi
-bool 'Support for Olivetti M700-10' CONFIG_OLIVETTI_M700
-dep_bool 'Support for Philips Nino (EXPERIMENTAL)' CONFIG_NINO $CONFIG_MIPS32 $CONFIG_EXPERIMENTAL
-if [ "$CONFIG_NINO" = "y" ]; then
-   choice 'Nino Model Number' \
-	"Model-300/301/302/319			CONFIG_NINO_4MB \
-	 Model-200/210/312/320/325/350/390	CONFIG_NINO_8MB \
-	 Model-500/510				CONFIG_NINO_16MB" Model-200
-fi
-bool 'Support for SGI IP22 (Indy/Indigo2)' CONFIG_SGI_IP22
-dep_bool 'Support for SGI-IP27 (Origin200/2000)' CONFIG_SGI_IP27 $CONFIG_MIPS64
-if [ "$CONFIG_SGI_IP27" = "y" ]; then
-   bool '  IP27 N-Mode' CONFIG_SGI_SN0_N_MODE
-   bool '  Discontiguous Memory Support' CONFIG_DISCONTIGMEM
-   bool '  NUMA Support' CONFIG_NUMA
-   bool '  Mapped kernel support' CONFIG_MAPPED_KERNEL
-   bool '  Kernel text replication support' CONFIG_REPLICATE_KTEXT
-   bool '  Exception handler replication support' CONFIG_REPLICATE_EXHANDLERS
-   define_bool CONFIG_SMP_CAPABLE y
-   #bool '  IP27 XXL' CONFIG_SGI_SN0_XXL
-fi
-dep_bool 'Support for SGI-IP32 (O2) (EXPERIMENTAL)' CONFIG_SGI_IP32 $CONFIG_EXPERIMENTAL
 dep_bool 'Support for Broadcom BCM1xxx SOCs (EXPERIMENTAL)' CONFIG_SIBYTE_SB1xxx_SOC $CONFIG_EXPERIMENTAL
 if [ "$CONFIG_SIBYTE_SB1xxx_SOC" = "y" ]; then
    choice '   BCM1xxx SOC-based board' \
@@ -191,14 +123,82 @@
       fi
    fi
 fi
+dep_bool 'Support for CASIO CASSIOPEIA E-10/15/55/65' CONFIG_CASIO_E55 $CONFIG_MIPS32
+dep_bool 'Support for Cobalt Server (EXPERIMENTAL)' CONFIG_MIPS_COBALT $CONFIG_EXPERIMENTAL
+if [ "$CONFIG_MIPS32" = "y" ]; then
+   bool 'Support for DECstations' CONFIG_DECSTATION
+else
+   dep_bool 'Support for DECstations (EXPERIMENTAL)' CONFIG_DECSTATION $CONFIG_EXPERIMENTAL
+fi
+dep_bool 'Support for Galileo EV64120 Evaluation board (EXPERIMENTAL)' CONFIG_MIPS_EV64120 $CONFIG_EXPERIMENTAL
+if [ "$CONFIG_MIPS_EV64120" = "y" ]; then
+   bool '  Enable Second PCI (PCI1)' CONFIG_EVB_PCI1
+   choice '  Galileo Chip Clock' \
+	"75	CONFIG_SYSCLK_75 \
+	 83.3	CONFIG_SYSCLK_83 \
+	 100	CONFIG_SYSCLK_100" 83.3
+fi
+dep_bool 'Support for Galileo EV96100 Evaluation board (EXPERIMENTAL)' CONFIG_MIPS_EV96100 $CONFIG_EXPERIMENTAL
+bool 'Support for Globespan IVR board' CONFIG_MIPS_IVR
+bool 'Support for Hewlett Packard LaserJet board' CONFIG_HP_LASERJET
+dep_bool 'Support for IBM WorkPad z50' CONFIG_IBM_WORKPAD $CONFIG_MIPS32
+bool 'Support for ITE 8172G board' CONFIG_MIPS_ITE8172
+if [ "$CONFIG_MIPS_ITE8172" = "y" ]; then
+   bool '  Support for older IT8172 (Rev C)' CONFIG_IT8172_REVC
+fi
+bool 'Support for LASAT Networks platforms' CONFIG_LASAT
+if [ "$CONFIG_LASAT" = "y" ]; then
+   tristate '  PICVUE LCD display driver' CONFIG_PICVUE
+   dep_tristate '   PICVUE LCD display driver /proc interface' CONFIG_PICVUE_PROC $CONFIG_PICVUE
+   bool '  DS1603 RTC driver' CONFIG_DS1603
+   bool '  LASAT sysctl interface' CONFIG_LASAT_SYSCTL
+fi
+bool 'Support for MIPS Atlas board' CONFIG_MIPS_ATLAS
+bool 'Support for MIPS Magnum 4000' CONFIG_MIPS_MAGNUM_4000
+bool 'Support for MIPS Malta board' CONFIG_MIPS_MALTA
+dep_bool 'Support for MIPS SEAD board (EXPERIMENTAL)' CONFIG_MIPS_SEAD $CONFIG_EXPERIMENTAL
+bool 'Support for Momentum Ocelot board' CONFIG_MOMENCO_OCELOT
+bool 'Support for Momentum Ocelot-G board' CONFIG_MOMENCO_OCELOT_G
+dep_bool 'Support for NEC DDB Vrc-5074 (EXPERIMENTAL)' CONFIG_DDB5074 $CONFIG_EXPERIMENTAL
+bool 'Support for NEC DDB Vrc-5476' CONFIG_DDB5476
+bool 'Support for NEC DDB Vrc-5477' CONFIG_DDB5477
+if [ "$CONFIG_DDB5477" = "y" ]; then
+   int '   bus frequency (in kHZ, 0 for auto-detect)' CONFIG_DDB5477_BUS_FREQUENCY 0
+fi
+dep_bool 'Support for NEC Eagle/Hawk board' CONFIG_NEC_EAGLE $CONFIG_MIPS32
+if [ "$CONFIG_NEC_EAGLE" = "y" ]; then
+   tristate '  NEC VRC4173 support' CONFIG_VRC4173
+fi
+dep_bool 'Support for NEC Osprey board' CONFIG_NEC_OSPREY $CONFIG_MIPS32
+bool 'Support for Olivetti M700-10' CONFIG_OLIVETTI_M700
+dep_bool 'Support for Philips Nino (EXPERIMENTAL)' CONFIG_NINO $CONFIG_MIPS32 $CONFIG_EXPERIMENTAL
+if [ "$CONFIG_NINO" = "y" ]; then
+   choice 'Nino Model Number' \
+	"Model-300/301/302/319			CONFIG_NINO_4MB \
+	 Model-200/210/312/320/325/350/390	CONFIG_NINO_8MB \
+	 Model-500/510				CONFIG_NINO_16MB" Model-200
+fi
+bool 'Support for SGI IP22 (Indy/Indigo2)' CONFIG_SGI_IP22
+dep_bool 'Support for SGI-IP27 (Origin200/2000)' CONFIG_SGI_IP27 $CONFIG_MIPS64
+if [ "$CONFIG_SGI_IP27" = "y" ]; then
+   bool '  IP27 N-Mode' CONFIG_SGI_SN0_N_MODE
+   bool '  Discontiguous Memory Support' CONFIG_DISCONTIGMEM
+   bool '  NUMA Support' CONFIG_NUMA
+   bool '  Mapped kernel support' CONFIG_MAPPED_KERNEL
+   bool '  Kernel text replication support' CONFIG_REPLICATE_KTEXT
+   bool '  Exception handler replication support' CONFIG_REPLICATE_EXHANDLERS
+   define_bool CONFIG_SMP_CAPABLE y
+   #bool '  IP27 XXL' CONFIG_SGI_SN0_XXL
+fi
+dep_bool 'Support for SGI-IP32 (O2) (EXPERIMENTAL)' CONFIG_SGI_IP32 $CONFIG_EXPERIMENTAL
 bool 'Support for SNI RM200 PCI' CONFIG_SNI_RM200_PCI
-bool 'Support for TANBAC TB0226 (Mbase)' CONFIG_TANBAC_TB0226
+dep_bool 'Support for TANBAC TB0226 (Mbase)' CONFIG_TANBAC_TB0226 $CONFIG_MIPS32
 dep_bool 'Support for Toshiba JMR-TX3927 board' CONFIG_TOSHIBA_JMR3927 $CONFIG_MIPS32
-bool 'Support for Victor MP-C303/304' CONFIG_VICTOR_MPC30X
+dep_bool 'Support for Victor MP-C303/304' CONFIG_VICTOR_MPC30X $CONFIG_MIPS32
 if [ "$CONFIG_VICTOR_MPC30X" = "y" ]; then
    tristate '  NEC VRC4173 support' CONFIG_VRC4173
 fi
-bool 'Support for ZAO Networks Capcella' CONFIG_ZAO_CAPCELLA
+dep_bool 'Support for ZAO Networks Capcella' CONFIG_ZAO_CAPCELLA $CONFIG_MIPS32
 
 dep_bool 'High Memory Support' CONFIG_HIGHMEM $CONFIG_MIPS32
 

--Multipart_Mon__10_Feb_2003_21:24:57_+0900_0824d1a0--

From vivienc@nerim.net Mon Feb 10 12:50:14 2003
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---------- Forwarded message ----------
Date: Mon, 10 Feb 2003 13:49:49 +0100 (CET)
From: Vivien Chappelier <glaurung@vivienc.net1.nerim.net>
To: Guido Guenther <agx@gandalf.physik.uni-konstanz.de>
Subject: Re: porting arcboot

On Mon, 10 Feb 2003, Guido Guenther wrote:
> > Can't we read the load address (and needed space) from the elf header
> s/load address/kernel's load address/

Yes, that's what we do already. I was speaking of arcboot load address,
sorry this wasn't very clear :)

> In case we find a unique place for arcboot in the memory map of the
> different subarches.

On the O2 physical memory starts from KSEG0 (0x80000000), the kernel is
loaded there for 32-bit version or in XKPHYS (0x9800000000000000) for the
64-bit version. I don't really know where the PROM code and data is
located precisely, but loading something (arcboot or a kernel) at
0x88000000 as with ip22 is not an option; the PROM says something like
'loading there would overwrite an existing program'. Why is kernel/arcboot
loaded at 0x88000000 on ip22? Is KSEG0 an option for ip22?
BTW, what's the status of mips64/ip22? I guess the PROM doesn't support
64-bit as on the ip32, so arcboot with 64-bit support would be needed as
well, right?

Vivien.



From vivienc@nerim.net Mon Feb 10 14:37:01 2003
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> P.S.: you didn't cc: linux-mips, feel free to forward this mail there if
> appropriate

It's just I forgot the Reply-all :)
I'll look into what you mention and how to implement it tonight.

Vivien.

---------- Forwarded message ----------
Date: Mon, 10 Feb 2003 14:38:06 +0100
From: Guido Guenther <agx@gandalf.physik.uni-konstanz.de>
To: Vivien Chappelier <vivienc@nerim.net>
Subject: Re: porting arcboot

On Mon, Feb 10, 2003 at 01:49:49PM +0100, Vivien Chappelier wrote:
> Yes, that's what we do already. I was speaking of arcboot load address,
> sorry this wasn't very clear :)
That's actually not what we do, at least not consistently. We parse the
load address from the elf header but also assume a reserved space
(reserver_base/reserve_size in loader.c).

> > In case we find a unique place for arcboot in the memory map of the
> > different subarches.
> 
> On the O2 physical memory starts from KSEG0 (0x80000000), the kernel is
> loaded there for 32-bit version or in XKPHYS (0x9800000000000000) for the
> 64-bit version. I don't really know where the PROM code and data is
> located precisely, but loading something (arcboot or a kernel) at
> 0x88000000 as with ip22 is not an option; the PROM says something like
I don't have the Indy's documentation around but I think the space between
0x80000000 and 0x88000000 is reserved for EISA (which only the I2
actually has). Anyways, I'd be nice to get rid of reserve_{base,size}
first, we could then build a unique loader and maybe simply adjust the
loader's load address using objcopy upon installation in the vh, so we
get away with a single binary for 32bit.

> 'loading there would overwrite an existing program'. Why is kernel/arcboot
> loaded at 0x88000000 on ip22? Is KSEG0 an option for ip22?
> BTW, what's the status of mips64/ip22? I guess the PROM doesn't support
Don't know, wanted to look at this together with getting 2.5 a bit further but
my Indys hard disk went up in flames a week a ago (hard disks are
currently failing around me like crazy).
> 64-bit as on the ip32, so arcboot with 64-bit support would be needed as
> well, right?
Thiemo told me that his R10k I2s PROM only loads 64bit executables.
Don't know if the rest of IP22 can laod 64bit executables at all.
 - Guido


From quintela@mandrakesoft.com Mon Feb 10 15:02:04 2003
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>>>>> "vivien" == Vivien Chappelier <vivienc@nerim.net> writes:

vivien> Thiemo told me that his R10k I2s PROM only loads 64bit executables.
vivien> Don't know if the rest of IP22 can laod 64bit executables at all.

I don't think so, mine (I2) only allows ECOFF, ELF is too young for it
:p

Later, Juan.

-- 
In theory, practice and theory are the same, but in practice they 
are different -- Larry McVoy

From hch@infradead.org Mon Feb 10 15:03:34 2003
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On Mon, Feb 10, 2003 at 04:01:40PM +0100, Juan Quintela wrote:
> >>>>> "vivien" == Vivien Chappelier <vivienc@nerim.net> writes:
> 
> vivien> Thiemo told me that his R10k I2s PROM only loads 64bit executables.
> vivien> Don't know if the rest of IP22 can laod 64bit executables at all.
> 
> I don't think so, mine (I2) only allows ECOFF, ELF is too young for it
> :p

You probably don't have a R10k I2..


From quintela@mandrakesoft.com Mon Feb 10 15:14:40 2003
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>>>>> "christoph" == Christoph Hellwig <hch@infradead.org> writes:

christoph> On Mon, Feb 10, 2003 at 04:01:40PM +0100, Juan Quintela wrote:
>> >>>>> "vivien" == Vivien Chappelier <vivienc@nerim.net> writes:
>> 
vivien> Thiemo told me that his R10k I2s PROM only loads 64bit executables.
vivien> Don't know if the rest of IP22 can laod 64bit executables at all.
>> 
>> I don't think so, mine (I2) only allows ECOFF, ELF is too young for it
>> :p

christoph> You probably don't have a R10k I2..

No, mine is a good old r4400SC :p

I thought that r10k I2 was IP28 not IP22, but I can be wrong as I
don't speak SGI code names natively :p

Later, Juan.

-- 
In theory, practice and theory are the same, but in practice they 
are different -- Larry McVoy

From agx@mittelerde.physik.uni-konstanz.de Mon Feb 10 15:23:46 2003
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On Mon, Feb 10, 2003 at 04:14:18PM +0100, Juan Quintela wrote:
> I thought that r10k I2 was IP28 not IP22, but I can be wrong as I
> don't speak SGI code names natively :p
Yept. According to:
 http://www.urban.ne.jp/home/mint/irix/hinv.html#indigo2-r10000sc-195-max
you are right.
 -- Guido

From karsten@excalibur.cologne.de Mon Feb 10 17:41:04 2003
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From: Karsten Merker <karsten@excalibur.cologne.de>
To: Marc <marc.groeneveld@hccnet.nl>
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Subject: Re: siemens rm300c and linux
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On Mon, Feb 10, 2003 at 12:32:00PM +0100, Marc wrote:

> I have a rm300c from siemens nixdorf (R4400 mips processor, 64M RAM) and
> want to put Linux on it.
> 
> Which distribution is the best choice?

Unfortunately none - the RM300C is not supported by Linux/MIPS.

Regards,
Karsten
-- 
#include <standard_disclaimer>
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From clausen@pureza.melbourne.sgi.com Mon Feb 10 22:40:10 2003
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Date: Tue, 11 Feb 2003 09:39:55 +1100
From: Andrew Clausen <clausen@melbourne.sgi.com>
To: Guido Guenther <agx@gandalf.physik.uni-konstanz.de>
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On Mon, Feb 10, 2003 at 11:03:19AM +0100, Guido Guenther wrote:
> E2fslib will move out of arcboot with the next release and arcboot will
> link against the non pic version in the debian archive. I'd really like
> to keep e2fslib out of arcboot (at least for the debian version which is
> quiet different from the oss.sgi.com version).

Ah, ok.  Now we're just stuck with the problem that we can't build
e2fsprogs for misp64, since we don't have the toolchain for it.

e2fsprogs looks like it resists cross-compiling also :(

So, the obstacles are:
 * e2fsprogs uses libc headers quite extensively, but there is no
glibc available for mips64 (right?).  It also seems to make quite a
few libc calls?  (How are you planning to deal with that?  Link
against it statically?  What about syscalls?)
 * e2fsprogs doesn't use autoconf/automake "properly".  It doesn't seem
to support cross-compiling.  Adding cross-compile support looks
somewhat non-trivial, since it builds it's own tools to compile itself.
(A fancy sed replacement, for some reason?)
 * there is no toolchain to build e2fsprogs on mips64 cleanly... need
to do that objcopy business.  This means hacking the build process?

> There should't be many
> libc header dependencies left then. If there are still any I'd be happy
> to kill them.

:)

Cheers,
Andrew


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Subject: Re: porting arcboot
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On Tue, Feb 11, 2003 at 09:39:55AM +1100, Andrew Clausen wrote:
>  * e2fsprogs uses libc headers quite extensively, but there is no
> glibc available for mips64 (right?).  It also seems to make quite a
> few libc calls?  (How are you planning to deal with that?  Link
> against it statically?  What about syscalls?)
e2fsprogs doesn't call glibc (in fact in can't since we don't link
arcboot against non PIC glibc). It calls arclib.
 -- Guido

From ralf@linux-mips.org Tue Feb 11 11:39:20 2003
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From: Ralf Baechle <ralf@linux-mips.org>
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	Guido Guenther <agx@sigxcpu.org>
Subject: Re: porting arcboot
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On Mon, Feb 10, 2003 at 02:45:49PM +1100, Andrew Clausen wrote:

> I'm planning to try porting arcboot to ip27 (mips64).
> 
> I plan to do this by cross-compiling... this is actually the only
> option since there's no 64 bit userland yet.
> 
> Some issues:
> 
>  * I'll be cross-compiling (using the mips64-linux-gcc & friends that
> are provided on ftp.linux-mips.org), which means some makefile hacking...
> 
>  * there's no mips64-linux glibc, which means no libc headers are
> available.  So I need to either cut&paste libc headers, or remove
> dependencies on them.  This affects lots of code.
> 
>  * the e2fs stuff... how is this being maintained?  It uses libc
> headers a bit... can I kill them?  Or will this make it hard to update
> to new upstream e2fsprogs releases?
> 
> Anything else?

Arcboot is a standalone program.  As such it shouldn't use anything from
glibc or it's going to be a royal pain in the lower back extension.
Look at Milo, spit and say no.  So keeping a private copy of the necessary
headers is the only sane way to get things to work.

  Ralf

From jiahanchen@yahoo.com Tue Feb 11 15:31:36 2003
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From: Jiahan Chen <jiahanchen@yahoo.com>
Subject: Mips Kernel Build
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Hi,

I'm working on Linux embedded applications with
PC (Intel) workstation as Development Host, and
Mips as Target. Currently, I have the following
questions:

1. What is a easy way to create a new kernel for Mips?
 1) With install.tar.bz2 and baseline.tar.bz2 from Mips ftp site
   download, or
 2) With Red Hat source disk installation on /usr/src/redhat,
   using a command like
   rpm -bc --target MIPS kernel-2.4.18.spec
   (I tried the above command with kernel-2.4.18, 
    and got many complaints about patches => failed.
    For example, 
+ echo 'Patch #280 (linux-2.4.16-mips-20011220.patch):'
Patch #280 (linux-2.4.16-mips-20011220.patch):
+ patch -p1 -s
Reversed (or previously applied) patch detected!  Assume -R? [n] y
1 out of 8 hunks FAILED -- saving rejects to file arch/mips/Makefile.rej
Reversed (or previously applied) patch detected!  Assume -R? [n]
......
out of 8 hunks FAILED -- saving rejects to file arch/mips/Makefile.rej
......

    I'm wondering if Kernel's 2.4.18 source tree distribution
    from RedHat CD is working for Mips Kernel creation. 
    In addition, do we have to do some updates in Spec file 
    to setup cross stuff properly after patch problems fixed? 
   or
 3) Other approach?

2. Do you have a simple procedure (scripts) to setup for
cross-development environment on the PC Host? 

3. How to add an item of new device driver to xconfig? 
Right now, I use the following procedure to create a 
new kernel (local version as practice) with kernel source
linux-2.4.18.tar.gz installation:
 make xconfig
 make dep
 make bzImage

4. Is mipsel-linux-run an emulator on Intel PC for running Mips
executable?
After cross-compiling a few examples on Host to create
executable (a.out), I tried 
  mipsel-linux-run a.out
and got the same error with different a.out as follows:
"mips-core: 4 byte read to unmapped address 0x400ee0 at 0x400ee0
program stopped with signal 7."

Thanks a lot! (Your full or partial answers are welcome!)

Jiahan


__________________________________________________
Do you Yahoo!?
Yahoo! Shopping - Send Flowers for Valentine's Day
http://shopping.yahoo.com

From Geert.Uytterhoeven@sonycom.com Tue Feb 11 15:49:07 2003
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On Tue, 11 Feb 2003, Jiahan Chen wrote:
> I'm working on Linux embedded applications with
> PC (Intel) workstation as Development Host, and
> Mips as Target. Currently, I have the following
> questions:
> 
> 1. What is a easy way to create a new kernel for Mips?

>     I'm wondering if Kernel's 2.4.18 source tree distribution
>     from RedHat CD is working for Mips Kernel creation. 

Most probably not.

Get the kernel from Linux/MIPS CVS, cfr. www.linux-mips.org.

> 2. Do you have a simple procedure (scripts) to setup for
> cross-development environment on the PC Host? 

If you run Debian, `apt-get install -t unstable toolchain-source', and read
/usr/share/doc/toolchain-source/README.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


From flo@rfc822.org Tue Feb 11 22:48:35 2003
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On Tue, Feb 11, 2003 at 09:39:55AM +1100, Andrew Clausen wrote:
>=20
> e2fsprogs looks like it resists cross-compiling also :(
>=20
> So, the obstacles are:
>  * e2fsprogs uses libc headers quite extensively, but there is no
> glibc available for mips64 (right?).  It also seems to make quite a
> few libc calls?  (How are you planning to deal with that?  Link
> against it statically?  What about syscalls?)
>  * e2fsprogs doesn't use autoconf/automake "properly".  It doesn't seem
> to support cross-compiling.  Adding cross-compile support looks
> somewhat non-trivial, since it builds it's own tools to compile itself.
> (A fancy sed replacement, for some reason?)
>  * there is no toolchain to build e2fsprogs on mips64 cleanly... need
> to do that objcopy business.  This means hacking the build process?

You dont need e2fsprogs - Just certain parts of the libe2fs which itself
just uses some very basic libc functions like malloc/free/str* which
we all have within arcboot. So you simple need to cross-compile the
libe2fs.

Flo
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
                        Heisenberg may have been here.

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From clausen@pureza.melbourne.sgi.com Wed Feb 12 05:04:04 2003
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Date: Wed, 12 Feb 2003 16:03:41 +1100
From: Andrew Clausen <clausen@melbourne.sgi.com>
To: Florian Lohoff <flo@rfc822.org>
Cc: Guido Guenther <agx@gandalf.physik.uni-konstanz.de>,
	Linux-MIPS <linux-mips@linux-mips.org>
Subject: Re: porting arcboot
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On Tue, Feb 11, 2003 at 11:46:22PM +0100, Florian Lohoff wrote:
> You dont need e2fsprogs

Right, just they seem so coupled...

> - Just certain parts of the libe2fs which itself
> just uses some very basic libc functions like malloc/free/str* which
> we all have within arcboot.

I disagree.

libe2fs includes lots of headers:

	pureza:~/e2fsprogs-1.32/lib$ find . | grep '\.[ch]$' | xargs grep -h "#include <" | sort | uniq | wc -l
	     77

Also, running nm gives libc calls that invoke syscalls galore.
For example:

	open64, close, ioctl, opendir, fprintf, getmntent, lseek64, time

I got these names from:

	pureza:~/e2fsprogs-1.32/lib$ nm libext2fs.a | grep '^ *U' | less

Am I missing something?

>  So you simple need to cross-compile the libe2fs.

That seems *hard*.

Cheers,
Andrew


From agx@mittelerde.physik.uni-konstanz.de Wed Feb 12 08:21:26 2003
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On Wed, Feb 12, 2003 at 04:03:41PM +1100, Andrew Clausen wrote:
> Also, running nm gives libc calls that invoke syscalls galore.
> For example:
> 
> 	open64, close, ioctl, opendir, fprintf, getmntent, lseek64, time
But we don't use all of e2fslib! The functions needed to get the kernel
from an e2fs only use a very small subset of these and are contained in
arclib.
 -- Guido

From ashish.anand@inspiretech.com Wed Feb 12 14:06:31 2003
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From: "Ashish anand" <ashish.anand@inspiretech.com>
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Subject: coprocessor unusable exception..
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Hello,

I have a quick and small question..

if after booting linux when i try to execute shell and other user space 
commands i get few coprocessor unusable exceptions resulting in messages
like..
Got cpu at 2aac289c.
Got cpu at 2aac28a0.
Got cpu at 2aac28a4.
Got cpu at 2aac28a8.
Got cpu at 2aac28dc.
Got cpu at 2aac287c.
Got cpu at 2aac2880.
Got cpu at 2aac2884.

where does fault it indicates for..?
Can I ignore it ..?

Best Regards,
Ashish Anand



From flo@rfc822.org Wed Feb 12 17:05:29 2003
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From: Florian Lohoff <flo@rfc822.org>
To: Andrew Clausen <clausen@melbourne.sgi.com>
Cc: Guido Guenther <agx@gandalf.physik.uni-konstanz.de>,
	Linux-MIPS <linux-mips@linux-mips.org>
Subject: Re: porting arcboot
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On Wed, Feb 12, 2003 at 04:03:41PM +1100, Andrew Clausen wrote:
> On Tue, Feb 11, 2003 at 11:46:22PM +0100, Florian Lohoff wrote:
> > You dont need e2fsprogs
>=20
> Right, just they seem so coupled...
>=20
> > - Just certain parts of the libe2fs which itself
> > just uses some very basic libc functions like malloc/free/str* which
> > we all have within arcboot.
>=20
> I disagree.
>=20
> libe2fs includes lots of headers:
>=20
> 	pureza:~/e2fsprogs-1.32/lib$ find . | grep '\.[ch]$' | xargs grep -h "#i=
nclude <" | sort | uniq | wc -l
> 	     77
>=20
> Also, running nm gives libc calls that invoke syscalls galore.
> For example:
>=20
> 	open64, close, ioctl, opendir, fprintf, getmntent, lseek64, time
>=20
> I got these names from:
>=20
> 	pureza:~/e2fsprogs-1.32/lib$ nm libext2fs.a | grep '^ *U' | less
>=20
> Am I missing something?

Yes - That you dont need all those objects in that archive.=20

Flo
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
                        Heisenberg may have been here.

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From jscheel@activevb.de Wed Feb 12 17:22:14 2003
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From: Julian Scheel <jscheel@activevb.de>
To: linux-mips@linux-mips.org
Subject: NEC VR4181A
Date: Wed, 12 Feb 2003 18:23:09 +0100
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Hello all,

I need a bit help. First I have to say I am a total newbie in cross-compiler 
and MIPS-section.
I have a little board with a NEC VR4181A CPU (Mips 64). Now I want to build a 
kernel for this board.
I think first I have to do is building a Cross-Toolchain, right?
Can someone give me some links how to do that?

Then I have to compile the kernel, are there any MIPS-specific things I have 
to be warned off?

Thanks in advance and many greatings,
Julian

From sseeger@stellartec.com Wed Feb 12 17:27:57 2003
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From: sseeger@stellartec.com (Steven Seeger)
To: <linux-mips@linux-mips.org>
Subject: RE: NEC VR4181A
Date: Wed, 12 Feb 2003 09:30:58 -0800
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Julian,

We are doing a project here at work with that board. Are you using the NEC
Osprey? The board is a POS. Watch out for the voltage buffers on the extern
ISA ports not being able to handle the speed of the ISA bus if the board
isn't warmed up. Get your heat gun if you're plugging in any hardware to it.

For building your cross compiler (you will want to use mipsel, which is 32.
Don't do 64 bit stuff on the 4181. You'll never need it) please see
http://www.ltc.com/~brad/mips/mips-cross-toolchain/ which is a great guide.
Take care not to overwrite your PC's libs with mips ones. Ouch. :)

I'm happy with this processor although it is a bit slow. I managed to get
worst case interrupt latency at 46 microseconds with linux going full blast
on network and compact flash stuff with our external board. (using RTAI and
kernel 2.4.18)

Steve

>-----Original Message-----
>From: linux-mips-bounce@linux-mips.org
>[mailto:linux-mips-bounce@linux-mips.org]On Behalf Of Julian Scheel
>Sent: Wednesday, February 12, 2003 9:23 AM
>To: linux-mips@linux-mips.org
>Subject: NEC VR4181A
>
>
>Hello all,
>
>I need a bit help. First I have to say I am a total newbie in
>cross-compiler
>and MIPS-section.
>I have a little board with a NEC VR4181A CPU (Mips 64). Now I
>want to build a
>kernel for this board.
>I think first I have to do is building a Cross-Toolchain, right?
>Can someone give me some links how to do that?
>
>Then I have to compile the kernel, are there any MIPS-specific
>things I have
>to be warned off?
>
>Thanks in advance and many greatings,
>Julian
>


From jsun@orion.mvista.com Wed Feb 12 18:11:25 2003
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From: Jun Sun <jsun@mvista.com>
To: Ashish anand <ashish.anand@inspiretech.com>
Cc: linux-mips@linux-mips.org, jsun@mvista.com
Subject: Re: coprocessor unusable exception..
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What kernel are you using?  Most likely someone stick a little
printk in your do_cpu() function.

Jun

On Wed, Feb 12, 2003 at 07:28:34PM +0530, Ashish anand wrote:
> Hello,
> 
> I have a quick and small question..
> 
> if after booting linux when i try to execute shell and other user space 
> commands i get few coprocessor unusable exceptions resulting in messages
> like..
> Got cpu at 2aac289c.
> Got cpu at 2aac28a0.
> Got cpu at 2aac28a4.
> Got cpu at 2aac28a8.
> Got cpu at 2aac28dc.
> Got cpu at 2aac287c.
> Got cpu at 2aac2880.
> Got cpu at 2aac2884.
> 
> where does fault it indicates for..?
> Can I ignore it ..?
> 
> Best Regards,
> Ashish Anand
> 
> 
> 

From clausen@pureza.melbourne.sgi.com Wed Feb 12 22:58:37 2003
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Date: Thu, 13 Feb 2003 09:58:23 +1100
From: Andrew Clausen <clausen@melbourne.sgi.com>
To: Florian Lohoff <flo@rfc822.org>
Cc: Guido Guenther <agx@gandalf.physik.uni-konstanz.de>,
	Linux-MIPS <linux-mips@linux-mips.org>
Subject: Re: porting arcboot
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On Wed, Feb 12, 2003 at 04:26:20PM +0100, Florian Lohoff wrote:
> > Am I missing something?
> 
> Yes - That you dont need all those objects in that archive. 

But how does that help?  It's painful to merely build the set
of objects we need.  (That would involve e2fsprogs makefile hacking...
i.e. not just reusing it out-of-the-box)  But it's absolutely necessary,
because it's impossible to build all the other objects for mips64 today.

So, are you doing the Makefile hacking, or what?

Cheers,
Andrew


From clausen@pureza.melbourne.sgi.com Thu Feb 13 06:00:30 2003
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Date: Thu, 13 Feb 2003 17:00:17 +1100
From: Andrew Clausen <clausen@melbourne.sgi.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: ralf@linux-mips.org, mg@sgi.com, gnb@sgi.com
Subject: [patch] ip27's _flush_cache_all uninitialized
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Hi all,

_flush_cache_all() and ___flush_cache_all() were uninitialized
(i.e. NULL).  Someone probably assumed (incorrectly) that this
was ok, since flush_cache_all() doesn't use _flush_cache_all()
(or so they thought...).

End result: anything that called flush_cache_all() (a macro)
tried to call a function at 0x0, and died.  This includes vmalloc().

I'm not sure what the best solution is, but this makes things work:

--- arch/mips64/mm/c-andes.c	9 Feb 2003 22:03:23 -0000	1.1.2.2
+++ arch/mips64/mm/c-andes.c	13 Feb 2003 05:50:54 -0000
@@ -48,6 +48,12 @@
 	}
 }
 
+static void andes_flush_cache_all(void)
+{
+	andes_flush_cache_l1();
+	andes_flush_cache_l2();
+}
+
 void andes_flush_icache_page(unsigned long page)
 {
 	if (scache_lsz64)
@@ -80,6 +86,7 @@
 	_clear_page = andes_clear_page;
 	_copy_page = andes_copy_page;
 
+	_flush_cache_all = ___flush_cache_all = andes_flush_cache_all;
 	_flush_cache_l1 = andes_flush_cache_l1;
 	_flush_cache_l2 = andes_flush_cache_l2;
 	_flush_cache_sigtramp = andes_flush_cache_sigtramp;


Cheers,
Andrew

From jsun@orion.mvista.com Thu Feb 13 06:48:43 2003
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From: Jun Sun <jsun@mvista.com>
To: Steven Seeger <sseeger@stellartec.com>
Cc: linux-mips@linux-mips.org, jsun@mvista.com
Subject: Re: NEC VR4181A
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On Wed, Feb 12, 2003 at 09:30:58AM -0800, Steven Seeger wrote:
> Julian,
> 
> We are doing a project here at work with that board. Are you using the NEC
> Osprey? 

Osprey uses Vr4181, which is a different chip from vr4181a.

> I'm happy with this processor although it is a bit slow. 

Yes, indeed.  Pretty the slowest MIPS CPU I ever have dealt.

> I managed to get
> worst case interrupt latency at 46 microseconds with linux going full blast
> on network and compact flash stuff with our external board. (using RTAI and
> kernel 2.4.18)

Interesting.  I was trying to get RT-Linux working at one time
but aborted that effort in the middle.

Jun

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--Multipart_Thu__13_Feb_2003_15:58:33_+0900_0823b2b8
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Hello Ralf,

I added support of NEC VR4181A and NEC SMVR4181A board.

As for VR4181A, The peripheral differs from VR4181 or VR4100 series greatly.
If a VR4100 core is removed from VR4181, VR4181A and VR4100 series,
they are completely different chip.

Therefore, the directory vr4181a was newly created below to arch/mips.

This patch is based on linux_2_4 tag cvs tree on ftp.linux-mips.org
Would you apply this patch to CVS on ftp.linux-mips.org?

P.S.
The patch for 2.5 is also created now. Please wait for a moment.

Best Regards,

Yoichi


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--Multipart_Thu__13_Feb_2003_15:58:33_+0900_0823b2b8--

From flo@rfc822.org Thu Feb 13 08:12:20 2003
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Date: Thu, 13 Feb 2003 09:10:14 +0100
From: Florian Lohoff <flo@rfc822.org>
To: Andrew Clausen <clausen@melbourne.sgi.com>
Cc: Guido Guenther <agx@gandalf.physik.uni-konstanz.de>,
	Linux-MIPS <linux-mips@linux-mips.org>
Subject: Re: porting arcboot
Message-ID: <20030213081014.GA569@paradigm.rfc822.org>
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On Thu, Feb 13, 2003 at 09:58:23AM +1100, Andrew Clausen wrote:
> On Wed, Feb 12, 2003 at 04:26:20PM +0100, Florian Lohoff wrote:
> > > Am I missing something?
> >=20
> > Yes - That you dont need all those objects in that archive.=20
>=20
> But how does that help?  It's painful to merely build the set
> of objects we need.  (That would involve e2fsprogs makefile hacking...
> i.e. not just reusing it out-of-the-box)  But it's absolutely necessary,
> because it's impossible to build all the other objects for mips64 today.
>=20
> So, are you doing the Makefile hacking, or what?
>=20

I havent got any mips64 equipment yet and even less time. I guess until
we have a real mips64-glibc we will need to put the kernel into the
volume-header.

Flo
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
                        Heisenberg may have been here.

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From sseeger@stellartec.com Thu Feb 13 13:19:24 2003
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From: sseeger@stellartec.com (Steven Seeger)
To: "'Jun Sun'" <jsun@mvista.com>
Cc: <linux-mips@linux-mips.org>
Subject: RE: NEC VR4181A
Date: Thu, 13 Feb 2003 05:22:36 -0800
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>Osprey uses Vr4181, which is a different chip from vr4181a.

Yeah I didn't notice the A on there. We are looking into the possibility of
using the A in our board. Part of the problem is that the A only comes in
BGA and we don't like dealing with that.

>Interesting.  I was trying to get RT-Linux working at one time
>but aborted that effort in the middle.

Getting RTAI working wasn't easy. Took over a week and it was supposedly
already "ported." One of these days I really must find the time to check in
my changes to that project. It works very well and is quite stable. I think
46 us worst-case interrupt response off one of the VR4181's interrupts from
an external source is very good.

Steve


From jsun@orion.mvista.com Thu Feb 13 17:46:47 2003
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From: Jun Sun <jsun@mvista.com>
To: Steven Seeger <sseeger@stellartec.com>
Cc: linux-mips@linux-mips.org, jsun@mvista.com
Subject: Re: NEC VR4181A
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On Thu, Feb 13, 2003 at 05:22:36AM -0800, Steven Seeger wrote:
> 
> Getting RTAI working wasn't easy. Took over a week and it was supposedly
> already "ported." One of these days I really must find the time to check in
> my changes to that project. 

Or post your patch against linux-mips.org tree somewhere.  I am sure
more than one people will be interested.

Jun


From long21st@yahoo.com Thu Feb 13 20:08:05 2003
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From: Long Li <long21st@yahoo.com>
Subject: memcpy embedded in gcc?
To: linux-mips@linux-mips.org
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Hi,

I am using a gcc 3.0.4 MIPS crosscompiler on Redhat. I
found something interesting: when I use specifly -O1
for compilation, and I can use memcpy function even I
did not tell the compiler where I declard it or define
it. However, when I specify -O0, then the compiler
tells me undefined reference to this memcpy function.
So my questions are:

1. Is memcpy a built-in function for gcc? But why not
for optimization level 0?

2. Besides memcpy, is there any other functions built
in too?


Thanks a lot!


Long


__________________________________________________
Do you Yahoo!?
Yahoo! Shopping - Send Flowers for Valentine's Day
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From drow@false.org Thu Feb 13 20:14:29 2003
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Date: Thu, 13 Feb 2003 15:14:17 -0500
From: Daniel Jacobowitz <dan@debian.org>
To: Long Li <long21st@yahoo.com>
Cc: linux-mips@linux-mips.org
Subject: Re: memcpy embedded in gcc?
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On Thu, Feb 13, 2003 at 12:07:57PM -0800, Long Li wrote:
> Hi,
> 
> I am using a gcc 3.0.4 MIPS crosscompiler on Redhat. I
> found something interesting: when I use specifly -O1
> for compilation, and I can use memcpy function even I
> did not tell the compiler where I declard it or define
> it. However, when I specify -O0, then the compiler
> tells me undefined reference to this memcpy function.
> So my questions are:
> 
> 1. Is memcpy a built-in function for gcc? But why not
> for optimization level 0?

Because using it is an optimization.

> 2. Besides memcpy, is there any other functions built
> in too?

Lots.  The list varies depending on the GCC version; see the manual.

-- 
Daniel Jacobowitz
MontaVista Software                         Debian GNU/Linux Developer

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Remove false dependency.  Add help info for CONFIG_DEBUG.

Patches for both 2.4 & 2.5.

Jun

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diff -Nru linux/Documentation/Configure.help.orig linux/Documentation/Configure.help
--- linux/Documentation/Configure.help.orig	Wed Jan 29 15:32:58 2003
+++ linux/Documentation/Configure.help	Thu Feb 13 12:22:21 2003
@@ -20482,6 +20482,13 @@
   Currently used only by the time services code in the MIPS port.
   Don't turn this on unless you know what you are doing.
 
+Enable run-time debugging
+CONFIG_DEBUG
+  If you say Y here, some debugging macros will do run-time checking.
+  If you say N here, those macros will mostly turn to no-ops.  For
+  MIPS boards only.  See include/asm-mips/debug.h for debuging macros.
+  If unsure, say N.
+
 Remote GDB kernel debugging
 CONFIG_REMOTE_DEBUG
   If you say Y here, it will be possible to remotely debug the MIPS
diff -Nru linux/arch/mips/config-shared.in.orig linux/arch/mips/config-shared.in
--- linux/arch/mips/config-shared.in.orig	Thu Feb 13 11:34:55 2003
+++ linux/arch/mips/config-shared.in	Thu Feb 13 12:26:54 2003
@@ -976,10 +976,8 @@
 
 bool 'Are you using a crosscompiler' CONFIG_CROSSCOMPILE
 bool 'Enable run-time debugging' CONFIG_DEBUG
-if [ "$CONFIG_AU1X00_UART" = "y" -o "$CONFIG_ZS" = "y" -o "$CONFIG_SIBYTE_SB1xxx_SOC" = "y" ]; then
-   dep_bool 'Remote GDB kernel debugging' CONFIG_REMOTE_DEBUG $CONFIG_DEBUG
-   dep_bool '  Console output to GDB' CONFIG_GDB_CONSOLE $CONFIG_REMOTE_DEBUG
-fi
+bool 'Remote GDB kernel debugging' CONFIG_REMOTE_DEBUG
+dep_bool '  Console output to GDB' CONFIG_GDB_CONSOLE $CONFIG_REMOTE_DEBUG
 if [ "$CONFIG_SIBYTE_SB1xxx_SOC" = "y" ]; then
    dep_bool 'Compile for Corelis Debugger' CONFIG_SB1XXX_CORELIS $CONFIG_DEBUG
 fi

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diff -Nru linux/arch/mips/Kconfig-shared.orig linux/arch/mips/Kconfig-shared
--- linux/arch/mips/Kconfig-shared.orig	Thu Feb 13 11:37:29 2003
+++ linux/arch/mips/Kconfig-shared	Thu Feb 13 12:26:08 2003
@@ -1547,7 +1547,7 @@
 
 config REMOTE_DEBUG
 	bool "Remote GDB kernel debugging"
-	depends on DEBUG_KERNEL && (AU1000_UART || ZS=y)
+	depends on DEBUG_KERNEL
 	help
 	  If you say Y here, it will be possible to remotely debug the MIPS
 	  kernel using gdb. This enlarges your kernel image disk size by
@@ -1566,6 +1566,12 @@
 config DEBUG
 	bool "Enable run-time debugging"
 	depends on DEBUG_KERNEL
+	help
+	  If you say Y here, some debugging macros will do run-time checking.
+	  If you say N here, those macros will mostly turn to no-ops.  For
+	  MIPS boards only.  See include/asm-mips/debug.h for debuging macros.
+	  If unsure, say N.
+
 
 config MAGIC_SYSRQ
 	bool "Magic SysRq key"

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From: "Aleksandar Todorovic" <atodorovic@rim.net>
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Hi everyone,

from the linux-mips docs I understand that Indigo2 is a special case when it comes to Linux? Can anyone please point me in the right direction of some sort of install instructions for this, or any information in regards to getting Linux running on an Indigo2

Thanks
Alex

From ilya@gateway.total-knowledge.com Thu Feb 13 22:01:43 2003
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I2 HOWTO on http://oss.sgi.com
There is more generic howto there that applies to Indys and in large part
to I2's

	Ilya.

On Thu, Feb 13, 2003 at 03:49:59PM -0500, Aleksandar Todorovic wrote:
> Hi everyone,
>=20
> from the linux-mips docs I understand that Indigo2 is a special case when=
 it comes to Linux? Can anyone please point me in the right direction of so=
me sort of install instructions for this, or any information in regards to =
getting Linux running on an Indigo2
>=20
> Thanks
> Alex
>=20

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Subject: RE: Nwebie - Linux Install on Indigo2
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Thread-Topic: Nwebie - Linux Install on Indigo2
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From: "Aleksandar Todorovic" <atodorovic@rim.net>
To: <ilya@theIlya.com>
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Would you happen to have the exact link to the doc you are reffering to,
I cant seem to find it, when I do a search nothing close comes up

Thanks
a

-----Original Message-----
From: ilya@theIlya.com [mailto:ilya@theIlya.com]
Sent: February 13, 2003 5:02 PM
To: Aleksandar Todorovic
Cc: linux-mips@linux-mips.org
Subject: Re: Nwebie - Linux Install on Indigo2


I2 HOWTO on http://oss.sgi.com
There is more generic howto there that applies to Indys and in large
part
to I2's

	Ilya.

On Thu, Feb 13, 2003 at 03:49:59PM -0500, Aleksandar Todorovic wrote:
> Hi everyone,
> 
> from the linux-mips docs I understand that Indigo2 is a special case
when it comes to Linux? Can anyone please point me in the right
direction of some sort of install instructions for this, or any
information in regards to getting Linux running on an Indigo2
> 
> Thanks
> Alex
> 

From jsun@orion.mvista.com Thu Feb 13 22:36:37 2003
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From: Jun Sun <jsun@mvista.com>
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Subject: [PATCH] malta kgdb, defconfig update
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This patch mainly makes Malta work with kgdb.  Some minor
defconfig improvement as well.

Don't expect any objections, but I'd like to run a check here ...

Jun

--iFRdW5/EC4oqxDHL
Content-Type: text/plain; charset=us-ascii
Content-Disposition: attachment; filename="030213.b-2.4-malta-kgdb-defconfig-update.patch"

diff -Nru linux/arch/mips/mips-boards/malta/malta_setup.c.orig linux/arch/mips/mips-boards/malta/malta_setup.c
--- linux/arch/mips/mips-boards/malta/malta_setup.c.orig	Mon Aug  5 16:53:34 2002
+++ linux/arch/mips/mips-boards/malta/malta_setup.c	Thu Feb 13 13:59:21 2003
@@ -51,10 +51,8 @@
 #endif
 
 #ifdef CONFIG_REMOTE_DEBUG
-extern void set_debug_traps(void);
 extern void rs_kgdb_hook(int);
-extern void breakpoint(void);
-static int remote_debug = 0;
+int remote_debug = 0;
 #endif
 
 extern struct ide_ops std_ide_ops;
@@ -64,9 +62,6 @@
 
 extern void mips_reboot_setup(void);
 
-extern void (*board_time_init)(void);
-extern void (*board_timer_setup)(struct irqaction *irq);
-extern unsigned long (*rtc_get_time)(void);
 extern void mips_time_init(void);
 extern void mips_timer_setup(struct irqaction *irq);
 extern unsigned long mips_rtc_get_time(void);
@@ -94,8 +89,8 @@
 #ifdef CONFIG_REMOTE_DEBUG
 	int rs_putDebugChar(char);
 	char rs_getDebugChar(void);
-	extern int (*putDebugChar)(char);
-	extern char (*getDebugChar)(void);
+	extern int (*generic_putDebugChar)(char);
+	extern char (*generic_getDebugChar)(void);
 #endif
 	char *argptr;
 	int i;
@@ -130,8 +125,8 @@
 		       line ? 1 : 0);
 
 		rs_kgdb_hook(line);
-		putDebugChar = rs_putDebugChar;
-		getDebugChar = rs_getDebugChar;
+		generic_putDebugChar = rs_putDebugChar;
+		generic_getDebugChar = rs_getDebugChar;
 
 		prom_printf("KGDB: Using serial line /dev/ttyS%d for session, "
 			    "please connect your debugger\n", line ? 1 : 0);
diff -Nru linux/arch/mips/mips-boards/malta/malta_int.c.orig linux/arch/mips/mips-boards/malta/malta_int.c
--- linux/arch/mips/mips-boards/malta/malta_int.c.orig	Thu Dec 12 10:35:07 2002
+++ linux/arch/mips/mips-boards/malta/malta_int.c	Thu Feb 13 14:03:00 2003
@@ -43,6 +43,12 @@
 extern void init_i8259_irqs (void);
 extern int mips_pcibios_iack(void);
 
+#ifdef CONFIG_REMOTE_DEBUG
+extern void breakpoint(void);
+extern void set_debug_traps(void);
+extern int remote_debug;
+#endif
+
 static spinlock_t mips_irq_lock = SPIN_LOCK_UNLOCKED;
 
 static inline int get_int(int *irq)
diff -Nru linux/arch/mips/defconfig-malta.orig linux/arch/mips/defconfig-malta
--- linux/arch/mips/defconfig-malta.orig	Thu Feb  6 13:24:01 2003
+++ linux/arch/mips/defconfig-malta	Thu Feb 13 12:15:15 2003
@@ -13,7 +13,9 @@
 #
 # Loadable module support
 #
-# CONFIG_MODULES is not set
+CONFIG_MODULES=y
+# CONFIG_MODVERSIONS is not set
+CONFIG_KMOD=y
 
 #
 # Machine selection
@@ -187,8 +189,8 @@
 # CONFIG_IP_MULTICAST is not set
 # CONFIG_IP_ADVANCED_ROUTER is not set
 CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-# CONFIG_IP_PNP_BOOTP is not set
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
 # CONFIG_IP_PNP_RARP is not set
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
@@ -567,13 +569,14 @@
 # CONFIG_CODA_FS is not set
 # CONFIG_INTERMEZZO_FS is not set
 CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
+CONFIG_NFS_V3=y
 CONFIG_ROOT_NFS=y
-# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
+CONFIG_NFSD=y
+CONFIG_NFSD_V3=y
 # CONFIG_NFSD_TCP is not set
 CONFIG_SUNRPC=y
 CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
 # CONFIG_SMB_FS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_NCPFS_PACKET_SIGNING is not set
diff -Nru linux/arch/mips64/defconfig-malta.orig linux/arch/mips64/defconfig-malta
--- linux/arch/mips64/defconfig-malta.orig	Thu Feb  6 13:24:02 2003
+++ linux/arch/mips64/defconfig-malta	Thu Feb 13 14:22:51 2003
@@ -13,7 +13,9 @@
 #
 # Loadable module support
 #
-# CONFIG_MODULES is not set
+CONFIG_MODULES=y
+# CONFIG_MODVERSIONS is not set
+CONFIG_KMOD=y
 
 #
 # Machine selection
@@ -185,8 +187,8 @@
 # CONFIG_IP_MULTICAST is not set
 # CONFIG_IP_ADVANCED_ROUTER is not set
 CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-# CONFIG_IP_PNP_BOOTP is not set
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
 # CONFIG_IP_PNP_RARP is not set
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
@@ -533,13 +535,14 @@
 # CONFIG_CODA_FS is not set
 # CONFIG_INTERMEZZO_FS is not set
 CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
+CONFIG_NFS_V3=y
 CONFIG_ROOT_NFS=y
-# CONFIG_NFSD is not set
-# CONFIG_NFSD_V3 is not set
+CONFIG_NFSD=y
+CONFIG_NFSD_V3=y
 # CONFIG_NFSD_TCP is not set
 CONFIG_SUNRPC=y
 CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
 # CONFIG_SMB_FS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_NCPFS_PACKET_SIGNING is not set
@@ -585,6 +588,8 @@
 #
 CONFIG_CROSSCOMPILE=y
 # CONFIG_DEBUG is not set
+# CONFIG_REMOTE_DEBUG is not set
+# CONFIG_GDB_CONSOLE is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 

--iFRdW5/EC4oqxDHL
Content-Type: text/plain; charset=us-ascii
Content-Disposition: attachment; filename="030213.b-2.5-malta-kgdb-defconfig-update.patch"

diff -Nru linux/arch/mips/mips-boards/malta/malta_setup.c.orig linux/arch/mips/mips-boards/malta/malta_setup.c
--- linux/arch/mips/mips-boards/malta/malta_setup.c.orig	Thu Oct 31 04:27:31 2002
+++ linux/arch/mips/mips-boards/malta/malta_setup.c	Thu Feb 13 14:25:07 2003
@@ -48,10 +48,8 @@
 #endif
 
 #ifdef CONFIG_REMOTE_DEBUG
-extern void set_debug_traps(void);
 extern void rs_kgdb_hook(int);
-extern void breakpoint(void);
-static int remote_debug = 0;
+int remote_debug = 0;
 #endif
 
 extern struct ide_ops std_ide_ops;
@@ -61,9 +59,6 @@
 
 extern void mips_reboot_setup(void);
 
-extern void (*board_time_init)(void);
-extern void (*board_timer_setup)(struct irqaction *irq);
-extern unsigned long (*rtc_get_time)(void);
 extern void mips_time_init(void);
 extern void mips_timer_setup(struct irqaction *irq);
 extern unsigned long mips_rtc_get_time(void);
@@ -91,8 +86,8 @@
 #ifdef CONFIG_REMOTE_DEBUG
 	int rs_putDebugChar(char);
 	char rs_getDebugChar(void);
-	extern int (*putDebugChar)(char);
-	extern char (*getDebugChar)(void);
+	extern int (*generic_putDebugChar)(char);
+	extern char (*generic_getDebugChar)(void);
 #endif
 	char *argptr;
 	int i;
@@ -127,8 +122,8 @@
 		       line ? 1 : 0);
 
 		rs_kgdb_hook(line);
-		putDebugChar = rs_putDebugChar;
-		getDebugChar = rs_getDebugChar;
+		generic_putDebugChar = rs_putDebugChar;
+		generic_getDebugChar = rs_getDebugChar;
 
 		prom_printf("KGDB: Using serial line /dev/ttyS%d for session, "
 			    "please connect your debugger\n", line ? 1 : 0);
diff -Nru linux/arch/mips/mips-boards/malta/malta_int.c.orig linux/arch/mips/mips-boards/malta/malta_int.c
--- linux/arch/mips/mips-boards/malta/malta_int.c.orig	Thu Dec 12 13:58:26 2002
+++ linux/arch/mips/mips-boards/malta/malta_int.c	Thu Feb 13 14:25:07 2003
@@ -43,6 +43,12 @@
 extern void init_i8259_irqs (void);
 extern int mips_pcibios_iack(void);
 
+#ifdef CONFIG_REMOTE_DEBUG
+extern void breakpoint(void);
+extern void set_debug_traps(void);
+extern int remote_debug;
+#endif
+
 static spinlock_t mips_irq_lock = SPIN_LOCK_UNLOCKED;
 
 static inline int get_int(int *irq)
diff -Nru linux/arch/mips/defconfig-malta.orig linux/arch/mips/defconfig-malta
--- linux/arch/mips/defconfig-malta.orig	Thu Dec 12 13:58:25 2002
+++ linux/arch/mips/defconfig-malta	Thu Feb 13 14:27:02 2003
@@ -21,7 +21,9 @@
 #
 # Loadable module support
 #
-# CONFIG_MODULES is not set
+CONFIG_MODULES=y
+# CONFIG_MODVERSIONS is not set
+CONFIG_KMOD=y
 
 #
 # Machine selection
@@ -243,8 +245,8 @@
 # CONFIG_IP_MULTICAST is not set
 # CONFIG_IP_ADVANCED_ROUTER is not set
 CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-# CONFIG_IP_PNP_BOOTP is not set
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
 # CONFIG_IP_PNP_RARP is not set
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
@@ -519,13 +521,17 @@
 # CONFIG_CODA_FS is not set
 # CONFIG_INTERMEZZO_FS is not set
 CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
+CONFIG_NFS_V3=y
 # CONFIG_NFS_V4 is not set
 CONFIG_ROOT_NFS=y
-# CONFIG_NFSD is not set
+CONFIG_NFSD=y
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V4 is not set
+# CONFIG_NFSD_TCP is not set
 CONFIG_SUNRPC=y
 CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
 # CONFIG_CIFS is not set
 # CONFIG_SMB_FS is not set
 # CONFIG_NCP_FS is not set
diff -Nru linux/arch/mips64/defconfig-malta.orig linux/arch/mips64/defconfig-malta
--- linux/arch/mips64/defconfig-malta.orig	Thu Feb 13 11:37:35 2003
+++ linux/arch/mips64/defconfig-malta	Thu Feb 13 14:29:10 2003
@@ -21,7 +21,9 @@
 #
 # Loadable module support
 #
-# CONFIG_MODULES is not set
+CONFIG_MODULES=y
+# CONFIG_MODVERSIONS is not set
+CONFIG_KMOD=y
 
 #
 # Machine selection
@@ -239,8 +241,8 @@
 # CONFIG_IP_MULTICAST is not set
 # CONFIG_IP_ADVANCED_ROUTER is not set
 CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-# CONFIG_IP_PNP_BOOTP is not set
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
 # CONFIG_IP_PNP_RARP is not set
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
@@ -498,13 +500,17 @@
 # CONFIG_CODA_FS is not set
 # CONFIG_INTERMEZZO_FS is not set
 CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
+CONFIG_NFS_V3=y
 # CONFIG_NFS_V4 is not set
 CONFIG_ROOT_NFS=y
-# CONFIG_NFSD is not set
+CONFIG_NFSD=y
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V4 is not set
+# CONFIG_NFSD_TCP is not set
 CONFIG_SUNRPC=y
 CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
 # CONFIG_CIFS is not set
 # CONFIG_SMB_FS is not set
 # CONFIG_NCP_FS is not set

--iFRdW5/EC4oqxDHL--

From ralf@linux-mips.org Fri Feb 14 01:58:48 2003
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From: Ralf Baechle <ralf@linux-mips.org>
To: Andrew Clausen <clausen@melbourne.sgi.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>, mg@sgi.com, gnb@sgi.com
Subject: Re: [patch] ip27's _flush_cache_all uninitialized
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On Thu, Feb 13, 2003 at 05:00:17PM +1100, Andrew Clausen wrote:

> _flush_cache_all() and ___flush_cache_all() were uninitialized
> (i.e. NULL).  Someone probably assumed (incorrectly) that this
> was ok, since flush_cache_all() doesn't use _flush_cache_all()
> (or so they thought...).
> 
> End result: anything that called flush_cache_all() (a macro)
> tried to call a function at 0x0, and died.  This includes vmalloc().
> 
> I'm not sure what the best solution is, but this makes things work:

And is guaranateed to crawl.  flush_cache_all() is a no-op for the R10k.

  Ralf

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Date: Fri, 14 Feb 2003 13:21:18 +1100
From: Andrew Clausen <clausen@melbourne.sgi.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Subject: Re: [patch] ip27's _flush_cache_all uninitialized
Message-ID: <20030214022118.GM8408@pureza.melbourne.sgi.com>
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On Fri, Feb 14, 2003 at 02:58:35AM +0100, Ralf Baechle wrote:
> > I'm not sure what the best solution is, but this makes things work:
> 
> And is guaranateed to crawl.  flush_cache_all() is a no-op for the R10k.

Right-o.  But who cares?  Apparently it almost never gets called.

Also, I couldn't find any documentation on what callers of
flush_cache_all() expect...

Cheers,
Andrew


From ralf@linux-mips.org Fri Feb 14 02:36:46 2003
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From: Ralf Baechle <ralf@linux-mips.org>
To: Andrew Clausen <clausen@melbourne.sgi.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Subject: Re: [patch] ip27's _flush_cache_all uninitialized
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On Fri, Feb 14, 2003 at 01:21:18PM +1100, Andrew Clausen wrote:

> On Fri, Feb 14, 2003 at 02:58:35AM +0100, Ralf Baechle wrote:
> > > I'm not sure what the best solution is, but this makes things work:
> > 
> > And is guaranateed to crawl.  flush_cache_all() is a no-op for the R10k.
> 
> Right-o.  But who cares?  Apparently it almost never gets called.
> 
> Also, I couldn't find any documentation on what callers of
> flush_cache_all() expect...

Documentation/cachetlb.txt - but it takes alot of reading between the lines
that is reading of the generic mm code to understand that document.

  Ralf

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>>>>> On Tue, 4 Feb 2003 16:02:50 -0800, Jun Sun <jsun@mvista.com> said:
jsun> Here is a complete patch for both mips/mips64, 2.4 and 2.5.  Of
jsun> course only 2.4/mips combo is tested.

The attached patch seems to break r3k codes.  Here is a patch to fix
it (only for 2.4/mips).

diff -ur linux-mips-cvs/include/asm-mips/mmu_context.h linux.new/include/asm-mips/mmu_context.h
--- linux-mips-cvs/include/asm-mips/mmu_context.h	Fri Feb 14 09:41:31 2003
+++ linux.new/include/asm-mips/mmu_context.h	Fri Feb 14 13:40:24 2003
@@ -151,7 +151,7 @@
 
 	if (test_bit(cpu, &mm->cpu_vm_mask))  {
 		get_new_mmu_context(mm, cpu);
-		write_c0_entryhi(cpu_context(cpu, mm) & 0xff);
+		write_c0_entryhi(cpu_context(cpu, mm) & ASID_MASK);
 	} else {
 		/* will get a new context next time */
 		cpu_context(cpu, mm) = 0;
---
Atsushi Nemoto

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On Mon, 10 Feb 2003, Yoichi Yuasa wrote:

> Machine selection is sorted alphabetically by this patch.

 Hmm, it seems the patch does more than just this...

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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 smp.c |   43 +++++++++++++++++++++++++++++--------------
 1 files changed, 29 insertions(+), 14 deletions(-)

Index: linux-2.5.60/arch/mips/kernel/smp.c
===================================================================
RCS file: /build/cvsroot/linux-2.5.60/arch/mips/kernel/smp.c,v
retrieving revision 1.1.1.1
diff -u -r1.1.1.1 smp.c
--- linux-2.5.60/arch/mips/kernel/smp.c	10 Feb 2003 22:15:04 -0000	1.1.1.1
+++ linux-2.5.60/arch/mips/kernel/smp.c	14 Feb 2003 06:09:00 -0000
@@ -185,22 +185,32 @@
 	smp_call_function(reschedule_this_cpu, NULL, 0, 0);
 }
 
-
 /*
- * The caller of this wants the passed function to run on every cpu.  If wait
- * is set, wait until all cpus have finished the function before returning.
- * The lock is here to protect the call structure.
+ * smp_call_function_on_cpu - Runs func on all processors in the mask
+ *
+ * @func: The function to run. This must be fast and non-blocking.
+ * @info: An arbitrary pointer to pass to the function.
+ * @wait: If true, wait (atomically) until function has completed on other CPUs.
+ * @mask The bitmask of CPUs to call the function
+ * 
+ * Returns 0 on success, else a negative status code. Does not return until
+ * remote CPUs are nearly ready to execute func or have executed it.
+ *
  * You must not call this function with disabled interrupts or from a
  * hardware interrupt handler or from a bottom half handler.
  */
-int smp_call_function (void (*func) (void *info), void *info, int retry, 
-								int wait)
+
+int smp_call_function_on_cpu (void (*func) (void *info), void *info, int wait,
+				unsigned long mask)
 {
-	int cpus = smp_num_cpus - 1;
-	int i;
+	int cpu, i, num_cpus;
 
-	if (smp_num_cpus < 2) {
-		return 0;
+	cpu = get_cpu();
+	mask &= ~(1UL << cpu);
+	num_cpus = hweight32(mask);
+	if (num_cpus == 0) {
+		put_cpu_no_resched();
+		return -EINVAL;
 	}
 
 	spin_lock(&smp_fn_call.lock);
@@ -209,19 +219,24 @@
 	smp_fn_call.fn = func;
 	smp_fn_call.data = info;
 
-	for (i = 0; i < smp_num_cpus; i++) {
-		if (i != smp_processor_id()) {
+	for (i = 0; i < NR_CPUS; i++) {
+		if (cpu_online(i) && ((1UL << i) & mask))
 			/* Call the board specific routine */
 			core_call_function(i);
-		}
 	}
 
 	if (wait) {
-		while(atomic_read(&smp_fn_call.finished) != cpus) {}
+		while(atomic_read(&smp_fn_call.finished) != num_cpus) {}
 	}
 
 	spin_unlock(&smp_fn_call.lock);
+	put_cpu_no_resched();
 	return 0;
+}
+
+int smp_call_function (void (*func) (void *info), void *info, int retry, int wait)
+{
+	return smp_call_function_on_cpu(func, info, wait, cpu_online_map);
 }
 
 void synchronize_irq(void)

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 smp.c |   51 ++++++++++++++++++++++++++++++++++++++++-----------
 1 files changed, 40 insertions(+), 11 deletions(-)

Index: linux-2.5.60/arch/mips64/kernel/smp.c
===================================================================
RCS file: /build/cvsroot/linux-2.5.60/arch/mips64/kernel/smp.c,v
retrieving revision 1.1.1.1
diff -u -r1.1.1.1 smp.c
--- linux-2.5.60/arch/mips64/kernel/smp.c	10 Feb 2003 22:15:44 -0000	1.1.1.1
+++ linux-2.5.60/arch/mips64/kernel/smp.c	14 Feb 2003 06:11:21 -0000
@@ -131,16 +131,35 @@
 	int wait;
 } *call_data;
 
-int smp_call_function (void (*func) (void *info), void *info, int retry, 
-								int wait)
+/*
+ * smp_call_function_on_cpu - Runs func on all processors in the mask
+ *
+ * @func: The function to run. This must be fast and non-blocking.
+ * @info: An arbitrary pointer to pass to the function.
+ * @wait: If true, wait (atomically) until function has completed on other CPUs.
+ * @mask The bitmask of CPUs to call the function
+ * 
+ * Returns 0 on success, else a negative status code. Does not return until
+ * remote CPUs are nearly ready to execute func or have executed it.
+ *
+ * You must not call this function with disabled interrupts or from a
+ * hardware interrupt handler or from a bottom half handler.
+ */
+
+int smp_call_function_on_cpu (void (*func) (void *info), void *info,
+				int wait, unsigned long mask)
 {
 	struct call_data_struct data;
-	int i, cpus = smp_num_cpus-1;
+	int i, cpu, num_cpus;
 	static spinlock_t lock = SPIN_LOCK_UNLOCKED;
 
-	if (cpus == 0)
-		return 0;
-
+	cpu = get_cpu();
+	mask &= ~(1UL << cpu);
+	num_cpus = hweight64(mask);
+	if (num_cpus == 0) {
+		put_cpu_no_resched();	
+		return -EINVAL;
+	}
 	data.func = func;
 	data.info = info;
 	atomic_set(&data.started, 0);
@@ -151,20 +170,30 @@
 	spin_lock_bh(&lock);
 	call_data = &data;
 	/* Send a message to all other CPUs and wait for them to respond */
-	for (i = 0; i < smp_num_cpus; i++)
-		if (smp_processor_id() != i)
+	for (i = 0; i < NR_CPUS; i++) {
+		if (!cpu_online(i))
+			continue;
+
+		if ((1UL << i) & mask)
 			sendintr(i, DOCALL);
+	}
 
 	/* Wait for response */
-	/* FIXME: lock-up detection, backtrace on lock-up */
-	while (atomic_read(&data.started) != cpus)
+	while (atomic_read(&data.started) != num_cpus)
 		barrier();
 
 	if (wait)
-		while (atomic_read(&data.finished) != cpus)
+		while (atomic_read(&data.finished) != num_cpus)
 			barrier();
 	spin_unlock_bh(&lock);
+	put_cpu_no_resched();
 	return 0;
+}
+
+int smp_call_function (void (*func) (void *info), void *info, int retry, 
+								int wait)
+{
+	return smp_call_function_on_cpu(func, info, wait, cpu_online_map);
 }
 
 extern void smp_call_function_interrupt(int irq, void *d, struct pt_regs *r)

From shughes@metrowerks.com Fri Feb 14 09:41:41 2003
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Subject: Re: NEC VR4181A
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Steven Seeger wrote:
> 
> >Osprey uses Vr4181, which is a different chip from vr4181a.
> 
[snip]
> >Interesting.  I was trying to get RT-Linux working at one time
> >but aborted that effort in the middle.
> 
> Getting RTAI working wasn't easy. Took over a week and it was supposedly
> already "ported." One of these days I really must find the time to check in
> my changes to that project. It works very well and is quite stable. I think
> 46 us worst-case interrupt response off one of the VR4181's interrupts from
> an external source is very good.
> 

Hi Steve,

Can you send what you have (or a patch) to Paolo at the rtai mailing
list, then he can merge this in with the existing mips stuff that's in
there.

Regards, Stuart



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On Fri, 14 Feb 2003 10:27:46 +0100 (MET)
"Maciej W. Rozycki" <macro@ds2.pg.gda.pl> wrote:

> On Mon, 10 Feb 2003, Yoichi Yuasa wrote:
> 
> > Machine selection is sorted alphabetically by this patch.
> 
>  Hmm, it seems the patch does more than just this...

Oops, change which supports VR4100 series only by MIPS32 is also included in it.

Yoichi

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Date: Fri, 14 Feb 2003 12:06:21 +0100 (MET)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Atsushi Nemoto <anemo@mba.sphere.ne.jp>
cc: jsun@mvista.com, ralf@linux-mips.org, quintela@mandrakesoft.com,
	linux-mips@linux-mips.org, nemoto@toshiba-tops.co.jp
Subject: Re: [RFC & PATCH] fixing tlb flush race problem on smp
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On Fri, 14 Feb 2003, Atsushi Nemoto wrote:

> The attached patch seems to break r3k codes.  Here is a patch to fix
> it (only for 2.4/mips).
> 
> diff -ur linux-mips-cvs/include/asm-mips/mmu_context.h linux.new/include/asm-mips/mmu_context.h
> --- linux-mips-cvs/include/asm-mips/mmu_context.h	Fri Feb 14 09:41:31 2003
> +++ linux.new/include/asm-mips/mmu_context.h	Fri Feb 14 13:40:24 2003
> @@ -151,7 +151,7 @@
>  
>  	if (test_bit(cpu, &mm->cpu_vm_mask))  {
>  		get_new_mmu_context(mm, cpu);
> -		write_c0_entryhi(cpu_context(cpu, mm) & 0xff);
> +		write_c0_entryhi(cpu_context(cpu, mm) & ASID_MASK);
>  	} else {
>  		/* will get a new context next time */
>  		cpu_context(cpu, mm) = 0;

 I've checked in a slightly different fix.  Thanks for spotting the
problem.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From kimai@laser5.co.jp Fri Feb 14 12:56:25 2003
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Date: Fri, 14 Feb 2003 21:56:16 +0900
From: Kunihiko IMAI <kimai@laser5.co.jp>
To: linux-mips@linux-mips.org
Subject: Re: NEC VR4181A
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Hi,

I'm also suffered from VR4181A :-)  I'm now trying to USBFU (device side)
driver.  The USBFU hardware has many many erratas.

On Thu, 13 Feb 2003 05:22:36 -0800
sseeger@stellartec.com (Steven Seeger) wrote:

> Yeah I didn't notice the A on there. We are looking into the possibility of
> using the A in our board. Part of the problem is that the A only comes in
> BGA and we don't like dealing with that.

VR4181 and VR4181A are completely different.  A developer of NEC said,
"We mistook at naming.  The name seems to be upgrade version, in fact,
they are quitely different."

On the other hand, VR4122 and VR4131 are similar at hardware level.
If you take care of designing board, they can be replaced with others :-)

Thanks.
_._. __._  _ . ... _  .___ ._. _____ _... ._ _._ _.._. .____  _ . ... _

                                                          Kunihiko IMAI

From br1@4g-systems.de Fri Feb 14 13:36:32 2003
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From: Bruno Randolf <br1@4g-systems.de>
To: linux-mips@linux-mips.org
Subject: [patch] au1x00 power management
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hello!

this is a trivial patch which enables the experimental power management on 
au1x00. while it does not add anything substantial it makes it working again 
by resolving some naming issues - resulting in about 50% less power 
consumption on my machine.

regards,
bruno


--Boundary-00=_MDPT+XYfYb0o1xz
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  charset="us-ascii";
  name="au1000_power.diff"
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--- linux-mips-2_4-cvs-clean/arch/mips/au1000/common/power.c	Wed Dec 11 07:12:29 2002
+++ linux-mips-2_4/arch/mips/au1000/common/power.c	Fri Feb 14 12:17:53 2003
@@ -52,10 +52,10 @@
 extern void au1k_wait(void);
 static void calibrate_delay(void);
 
-extern void set_au1000_speed(unsigned int new_freq);
-extern unsigned int get_au1000_speed(void);
-extern unsigned long get_au1000_uart_baud_base(void);
-extern void set_au1000_uart_baud_base(unsigned long new_baud_base);
+extern void set_au1x00_speed(unsigned int new_freq);
+extern unsigned int get_au1x00_speed(void);
+extern unsigned long get_au1x00_uart_baud_base(void);
+extern void set_au1x00_uart_baud_base(unsigned long new_baud_base);
 extern unsigned long save_local_and_disable(int controller);
 extern void restore_local_and_enable(int controller, unsigned long mask);
 extern void local_enable_irq(unsigned int irq_nr);
@@ -188,13 +188,13 @@
 			return -EFAULT;
 		}
 
-		old_baud_base = get_au1000_uart_baud_base();
-		old_cpu_freq = get_au1000_speed();
-
+		old_baud_base = get_au1x00_uart_baud_base();
+		old_cpu_freq = get_au1x00_speed();
+		
 		new_cpu_freq = pll * 12 * 1000000;
-		new_baud_base = (new_cpu_freq / 4) / 16;
-		set_au1000_speed(new_cpu_freq);
-		set_au1000_uart_baud_base(new_baud_base);
+		new_baud_base = (new_cpu_freq / 4) / 16;	
+		set_au1x00_speed(new_cpu_freq);
+		set_au1x00_uart_baud_base(new_baud_base);
 
 		old_refresh = au_readl(MEM_SDREFCFG) & 0x1ffffff;
 		new_refresh =
@@ -325,9 +325,11 @@
 	}
 }
 
+/*
 void au1k_wait(void)
 {
 	__asm__("nop\n\t" "nop\n\t");
 }
+*/
 
 #endif				/* CONFIG_PM */
--- linux-mips-2_4-cvs-clean/arch/mips/config-shared.in Fri Feb 14 12:12:25 2003
+++ linux-mips-2_4/arch/mips/config-shared.in   Fri Feb 14 12:46:14 2003
@@ -823,7 +823,9 @@

 tristate 'Kernel support for MISC binaries' CONFIG_BINFMT_MISC

-dep_bool 'Power Management support (EXPERIMENTAL)' CONFIG_PM $CONFIG_EXPERIMENTAL $CONFIG_MIPS_AU1000
+if [ "$CONFIG_CPU_AU1X00" = "y" ] ; then
+   dep_bool 'Power Management support (EXPERIMENTAL)' CONFIG_PM $CONFIG_EXPERIMENTAL
+fi
 endmenu

 source drivers/mtd/Config.in

--Boundary-00=_MDPT+XYfYb0o1xz--


From justinca@cs.cmu.edu Fri Feb 14 17:41:26 2003
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Subject: Re: [PATCH][2.5][4/14] smp_call_function_on_cpu - MIPS
From: Justin Carlson <justinca@cs.cmu.edu>
To: Zwane Mwaikambo <zwane@zwane.ca>
Cc: linux-kernel@vger.kernel.org, linux-mips@linux-mips.org
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On Fri, 2003-02-14 at 04:33, Zwane Mwaikambo wrote:
> +}
> +
> +int smp_call_function (void (*func) (void *info), void *info, int retry, int wait)
> +{
> +	return smp_call_function_on_cpu(func, info, wait, cpu_online_map);
>  }

IIRC, the semantics of smp_call_function() are to call the function on
all other cpus.  So shouldn't this be

	return smp_call_function_on_cpu(func, info, wait, cpu_online_map & ~(1<<smp_processor_id()));

?

Also, maybe you were planning to do this in a future patch, but
shouldn't smp_call_function() be moved to non-arch-specific code, given
this change?

-Justin



From shenminshi@netscape.net Fri Feb 14 18:02:08 2003
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From: shenminshi@netscape.net
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Subject: when does "init" become usermode process
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Hi,
  I was reading the kernel boot code toward the end where kernel's init thread execve("/sbin/init",x,x). Execve() calls sys_execve() and do_execve(). All the manpage and kernel document told us the init is the first usermode process running in the system. However, when the execve("/sbin/init",x,x) runs in the kernel (init/main.c), I believe we are still in the kernel mode, aren't we? Unless execve() does the trick to turn init into usermode by setting the KU bit in the STATUS register. I checked the execve() code and its not obvious whether it does this or not. I then check the init source code and it does not mess around the KU bit either.

My question is when and how does init turn itself into usermode.


Thanks

sms

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From kwalker@broadcom.com Fri Feb 14 18:29:59 2003
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shenminshi@netscape.net wrote:
> 
> My question is when and how does init turn itself into usermode.

Look at 'start_thread' in arch/mips/kernel/process.c, which is called
from load_elf_binary in fs/binfmt_elf.c (as a result of the execve
syscall).

Kip


From juszczec@hotmail.com Fri Feb 14 19:23:14 2003
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Hi folks

I'm trying to compile uClibc fur use on my Helio pda.  There is some kind of 
problem with the stack layout.  The one uClibc expects isn't what my kernel 
is putting together.

I'm trying to find out the stack layout for the
Toshiba TMPR3912AU, 75 MHz., 32-bit RISC processor so I can figure out what 
I'm getting out of the kernel.

There is one in ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf

Does this refer to the stack the kernel loads in binfmt_elf.c and is it the 
correct place to start?

Thanks

Mark

Thanks

Mark



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From jscheel@activevb.de Fri Feb 14 19:58:51 2003
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From: Julian Scheel <jscheel@activevb.de>
To: Yoichi Yuasa <yoichi_yuasa@montavista.co.jp>
Subject: Re: [patch] VR4181A and SMVR4181A
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Hi Yoichi,

I have a short question to your patch: What CPU do I have to select for the 
VR4181A?
MIPS32? or R41xx?

Am Donnerstag, 13. Februar 2003 07:58 schrieb Yoichi Yuasa:
> Hello Ralf,
>
> I added support of NEC VR4181A and NEC SMVR4181A board.
>
> As for VR4181A, The peripheral differs from VR4181 or VR4100 series
> greatly. If a VR4100 core is removed from VR4181, VR4181A and VR4100
> series, they are completely different chip.
>
> Therefore, the directory vr4181a was newly created below to arch/mips.
>
> This patch is based on linux_2_4 tag cvs tree on ftp.linux-mips.org
> Would you apply this patch to CVS on ftp.linux-mips.org?
>
> P.S.
> The patch for 2.5 is also created now. Please wait for a moment.
>
> Best Regards,
>
> Yoichi

-- 
Grüße,
Julian


From ralf@linux-mips.org Fri Feb 14 22:36:04 2003
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From: Ralf Baechle <ralf@linux-mips.org>
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On Fri, Feb 14, 2003 at 07:23:02PM +0000, Mark and Janice Juszczec wrote:

> There is one in ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
> 
> Does this refer to the stack the kernel loads in binfmt_elf.c and is it the 
> correct place to start?

The ABI only describes the stack frame used by functions and for their
arguments.  The arguments as passed to an invoked program are not subject
to the ABI documents though obviously the layout is choose such that it
can be passed to the program's main() without costly conversion.  I
therefore suggest you simply read binfmt_elf.c - that part is fairly
straight forward.

  Ralf

From jscheel@activevb.de Sat Feb 15 10:16:25 2003
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From: Julian Scheel <jscheel@activevb.de>
To: Yoichi Yuasa <yoichi_yuasa@montavista.co.jp>
Subject: Re: [patch] VR4181A and SMVR4181A
Date: Sat, 15 Feb 2003 11:17:16 +0100
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Hi,

I'm using the config, which is provided as arch/mips/defconfig-smvr4181a. The 
kernel is the 2.4-release (cvs -rlinux_2_4) form linux-mips.org.
Compiling works fine for some time, but then I get this error:

jscheel/Programmieren/cmms/linux/include/asm/gcc -G 0 -mno-abicalls -fno-pic 
-pipe -mcpu=r4600 -mips2 -Wa,--trap   -nostdinc -iwithprefix include 
-DKBUILD_BASENAME=pmu  -c -o pmu.o pmu.c
{standard input}: Assembler messages:
{standard input}:125: Warning: Tried to set unrecognized symbol: vr4100

{standard input}:126: Error: opcode not supported on this processor `standby'
make[1]: *** [pmu.o] Error 1
make[1]: Leaving directory 
`/home/jscheel/Programmieren/cmms/linux/arch/mips/vr4181a/common'
make: *** [_dir_arch/mips/vr4181a/common] Error 2

Is this a problem with your patch or perhaps with my cross-compiler? (Depends 
it on GCC 3.x?)

Thanks in advice!

Am Donnerstag, 13. Februar 2003 07:58 schrieb Yoichi Yuasa:
> Hello Ralf,
>
> I added support of NEC VR4181A and NEC SMVR4181A board.
>
> As for VR4181A, The peripheral differs from VR4181 or VR4100 series
> greatly. If a VR4100 core is removed from VR4181, VR4181A and VR4100
> series, they are completely different chip.
>
> Therefore, the directory vr4181a was newly created below to arch/mips.
>
> This patch is based on linux_2_4 tag cvs tree on ftp.linux-mips.org
> Would you apply this patch to CVS on ftp.linux-mips.org?
>
> P.S.
> The patch for 2.5 is also created now. Please wait for a moment.
>
> Best Regards,
>
> Yoichi

-- 
Grüße,
Julian


From bak@d2.dion.ne.jp Sat Feb 15 15:22:53 2003
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From: Kunihiko IMAI <bak@d2.dion.ne.jp>
To: linux-mips@linux-mips.org
Subject: Re: [patch] VR4181A and SMVR4181A
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Hi,

On Sat, 15 Feb 2003 11:17:16 +0100
Julian Scheel <jscheel@activevb.de> wrote:

> jscheel/Programmieren/cmms/linux/include/asm/gcc -G 0 -mno-abicalls -fno-pic 
> -pipe -mcpu=r4600 -mips2 -Wa,--trap   -nostdinc -iwithprefix include 
> -DKBUILD_BASENAME=pmu  -c -o pmu.o pmu.c
> {standard input}: Assembler messages:
> {standard input}:125: Warning: Tried to set unrecognized symbol: vr4100
> 
> {standard input}:126: Error: opcode not supported on this processor `standby'
> make[1]: *** [pmu.o] Error 1
> make[1]: Leaving directory 
> `/home/jscheel/Programmieren/cmms/linux/arch/mips/vr4181a/common'
> make: *** [_dir_arch/mips/vr4181a/common] Error 2

I met this error, too.  This means that your assembler didn't
recognize the instruction 'standby'.

To escape this error, quick and dirty method, replace 'standby' with 'cop0
0x21'.  These means same instruction.

Thanks.
_._. __._  _ . ... _  .___ ._. _____ _... ._ _._ _.._. .____  _ . ... _

                                                          Kunihiko IMAI

From kaos@sgi.com Sat Feb 15 23:59:53 2003
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On Thu, 13 Feb 2003 12:31:08 -0800, 
Jun Sun <jsun@mvista.com> wrote:
>Remove false dependency.  Add help info for CONFIG_DEBUG.
>+Enable run-time debugging
>+CONFIG_DEBUG
>+  If you say Y here, some debugging macros will do run-time checking.
>+  If you say N here, those macros will mostly turn to no-ops.  For
>+  MIPS boards only.  See include/asm-mips/debug.h for debuging macros.
>+  If unsure, say N.

CONFIG_DEBUG is too generic for an option that only applies to mips.
Make it CONFIG_MIPS_DEBUG.


From jscheel@activevb.de Sun Feb 16 17:19:33 2003
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From: Julian Scheel <jscheel@activevb.de>
Subject: Re: [patch] VR4181A and SMVR4181A
Date: Sun, 16 Feb 2003 18:20:47 +0100
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Hi,

Am Samstag, 15. Februar 2003 16:22 schrieb Kunihiko IMAI:
> I met this error, too.  This means that your assembler didn't
> recognize the instruction 'standby'.
>
> To escape this error, quick and dirty method, replace 'standby' with 'cop0
> 0x21'.  These means same instruction.

This don't helps for me. I get the same error, but with "cop00x21" instead of
standby.
I think it has something to do with the compiler options.
I use -mcpu=r4600 -mips2 -Wa,--trap, which is set for VR41xx CPU. But standby
seems to be a special option, not supported by r4600/mips2.
What compiler-options do you use?

--
Grüße,
Julian

From kimai@laser5.co.jp Sun Feb 16 20:00:29 2003
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Date: Mon, 17 Feb 2003 05:00:33 +0900
From: Kunihiko IMAI <kimai@laser5.co.jp>
To: linux-mips@linux-mips.org
Subject: Re: [patch] VR4181A and SMVR4181A
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Hi,

On Sun, 16 Feb 2003 18:20:47 +0100
Julian Scheel <jscheel@activevb.de> wrote:

> This don't helps for me. I get the same error, but with "cop00x21" instead of
> standby.

I'm sorry for shorten explanation.  Now I'm at home and have enough
document here...


o Rewrite 'standby' only in inline-assembler code, not any C symbol.

o Rewrite 'standby' with 'c0 0x21'.
  Space or tab is required between 'c0' and '0x21'.

  I thought 'cop0' op-code is also acceptable, but it may be my
  misunderstanding.


How I did to examine the mnemonic 'c0':

1. The users manual of VR-series says that machine code of 'standby'
   instruction is 0x42000021.

2. Make a file which contains only this code;
	perl -e 'printf "\x21\x00\x00\x42";' > standby.bin
	(Byte sequence is reversed because of little-endian)

3. Disassemble the file
	mipsel-linux-objdump -b binary -mmips:4600 -D standby.bin

Thanks.
_._. __._  _ . ... _  .___ ._. _____ _... ._ _._ _.._. .____  _ . ... _

                                                          Kunihiko IMAI

From vivienc@nerim.net Sun Feb 16 22:01:27 2003
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Hi,

	I think I'm facing an hardware bug with the IDT RV5000 CPU of the
SGI O2 (prid = 0x2321), and would like to know if someone else has faced
it or knows about it. When executing a load linked on a 64-bit address
(XKPHYS cache mode 3 in tested case), it seems the data is loaded directly
in secondary cache/system memory instead of the D-cache. Executing a
standard load operation on the same address loads the correct data, i.e.
lld %0, 0(%1) ; load the old content at address %1 in %0
ld %0, 0(%1)  ; load the correct content at address %1 in %0 
If I execute a writeback on the cache line before accessing it with the
ll/lld instruction, the data read is correct. ll/lld work correctly on
KSEG0 addresses though (in cache mode 3 too). I've also checked ll/lld
work correcly on the O2 R10000.

I'm actually hitting the bug while booting the kernel, in free_bootmem_core
(linux-2.5.47, mm/bootmem.c:125). test_and_clear_bit  
(include/asm-mips64/bitops.h:220) returns false, meaning the bit was
already cleared whereas it is not. All bdata->node_bootmem_map is
initialized to 0xff in init_bootmem_core (mm/bootmem.c:63), but the lld in
test_and_clear bit loads a 0 instead.

The processor errata (http://www.idt.com/docs/RC5000_ER_99398.pdf) only
speak of a bug with LLaddr being loaded with the virtual address instead
of the physical one, which doesn't seem related to my problem.

Sounds familiar to someone?

Vivien.


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Date: Mon, 17 Feb 2003 10:23:00 +1100
From: Andrew Clausen <clausen@melbourne.sgi.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Subject: bug in ip27 PROM
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Hi all,

I haven't been able to boot a kernel (neither IRIX nor Linux) directly
from the volume header on the ip27 (Origin 200).  I can only load
it from XFS partitions.

I've looked at the PROM source, and figured out that the XFS loader
loads in 64k chunks, but the volume header's loader loads in one
big read.  So, it's either failing due to a low timeout (old crappy
hard disks!), or the "large" buffer size isn't supported.

Anyone else experiencing this?

Anyway, the end result of this is it makes Flo's hack for embedding
a volume header on an ISO more Interesting.  I'll try making
a partition inside the ISO file system (overlapping with a file)
which contains an XFS file system containing kernels...

Cheers,
Andrew


From yoichi_yuasa@montavista.co.jp Mon Feb 17 01:57:12 2003
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Date: Mon, 17 Feb 2003 10:51:15 +0900
From: Yoichi Yuasa <yoichi_yuasa@montavista.co.jp>
To: Julian Scheel <jscheel@activevb.de>
Cc: yoichi_yuasa@montavista.co.jp, linux-mips@linux-mips.org
Subject: Re: [patch] VR4181A and SMVR4181A
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	<200302151117.16972.jscheel@activevb.de>
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Hi Julian,

On Sat, 15 Feb 2003 11:17:16 +0100
Julian Scheel <jscheel@activevb.de> wrote:

> Hi,
> 
> I'm using the config, which is provided as arch/mips/defconfig-smvr4181a. The 
> kernel is the 2.4-release (cvs -rlinux_2_4) form linux-mips.org.
> Compiling works fine for some time, but then I get this error:
> 
> jscheel/Programmieren/cmms/linux/include/asm/gcc -G 0 -mno-abicalls -fno-pic 
> -pipe -mcpu=r4600 -mips2 -Wa,--trap   -nostdinc -iwithprefix include 
> -DKBUILD_BASENAME=pmu  -c -o pmu.o pmu.c
> {standard input}: Assembler messages:
> {standard input}:125: Warning: Tried to set unrecognized symbol: vr4100
> 
> {standard input}:126: Error: opcode not supported on this processor `standby'
> make[1]: *** [pmu.o] Error 1
> make[1]: Leaving directory 
> `/home/jscheel/Programmieren/cmms/linux/arch/mips/vr4181a/common'
> make: *** [_dir_arch/mips/vr4181a/common] Error 2
> 
> Is this a problem with your patch or perhaps with my cross-compiler? (Depends 
> it on GCC 3.x?)

-m4100 option can be tried supposing you are using gcc
which has a problem as the present option.

Please change following line.

ifdef CONFIG_CPU_VR41XX
GCCFLAGS        += -mcpu=r4600 -mips2 -Wa,-m4100,--trap
endif

Please let me know what the result became.

Yoichi

From takano@os-omicron.org Mon Feb 17 04:33:07 2003
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Date: Mon, 17 Feb 2003 13:32:22 +0900
From: TAKANO Ryousei <takano@os-omicron.org>
To: linux-mips@linux-mips.org
Cc: takano@os-omicron.org
Subject: [PATCH][2/2] TANBAC TB0193 (L-Card+)
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Hi,

This mail attaches tanbac-tb0193-drivers.patch.

Thanks,
TAKANO Ryousei

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--Multipart_Mon__17_Feb_2003_13:32:22_+0900_081a55c0--

From takano@os-omicron.org Mon Feb 17 04:33:27 2003
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Date: Mon, 17 Feb 2003 13:32:13 +0900
From: TAKANO Ryousei <takano@os-omicron.org>
To: linux-mips@linux-mips.org
Cc: takano@os-omicron.org
Subject: [PATCH][1/2] TANBAC TB0193 (L-Card+)
Message-Id: <20030217133213.6febe320.takano@os-omicron.org>
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--Multipart_Mon__17_Feb_2003_13:32:13_+0900_082ec440
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Hi,

I am new to the linux-mips kernel development, and I want to
your sugestions.

I added support of TANBAC TB0193 (L-Card+) which has VR4181.
TB0193 is supported on Linux-VR's 2.4.0-test9 kernel, however
I have not seen it on linux-mips cvs tree yet.

The attatched patches is the following two parts:
* tanbac-tb0193-arch.patch includes arch/mips/vr4181/tanbac-tb0193 directory.
* tanbac-tb0193-drivers.patch includes cs89x0 patch and MTD flash driver
  from Linux-VR's 2.4.0-test9 kernel.

And these are based on linux_2_4 tag cvs tree.

I am now working for the PCMCIA staff.

Thanks,
TAKANO Ryousei

--Multipart_Mon__17_Feb_2003_13:32:13_+0900_082ec440
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--Multipart_Mon__17_Feb_2003_13:32:13_+0900_082ec440--

From yoichi_yuasa@montavista.co.jp Mon Feb 17 07:37:56 2003
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Date: Mon, 17 Feb 2003 16:32:05 +0900
From: Yoichi Yuasa <yoichi_yuasa@montavista.co.jp>
To: Julian Scheel <jscheel@activevb.de>
Cc: yoichi_yuasa@montavista.co.jp, linux-mips@linux-mips.org
Subject: Re: [patch] VR4181A and SMVR4181A
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Hi again,

On Mon, 17 Feb 2003 10:51:15 +0900
Yoichi Yuasa <yoichi_yuasa@montavista.co.jp> wrote:

> Hi Julian,
> 
> On Sat, 15 Feb 2003 11:17:16 +0100
> Julian Scheel <jscheel@activevb.de> wrote:
> 
> > Hi,
> > 
> > I'm using the config, which is provided as arch/mips/defconfig-smvr4181a. The 
> > kernel is the 2.4-release (cvs -rlinux_2_4) form linux-mips.org.
> > Compiling works fine for some time, but then I get this error:
> > 
> > jscheel/Programmieren/cmms/linux/include/asm/gcc -G 0 -mno-abicalls -fno-pic 
> > -pipe -mcpu=r4600 -mips2 -Wa,--trap   -nostdinc -iwithprefix include 
> > -DKBUILD_BASENAME=pmu  -c -o pmu.o pmu.c
> > {standard input}: Assembler messages:
> > {standard input}:125: Warning: Tried to set unrecognized symbol: vr4100
> > 
> > {standard input}:126: Error: opcode not supported on this processor `standby'
> > make[1]: *** [pmu.o] Error 1
> > make[1]: Leaving directory 
> > `/home/jscheel/Programmieren/cmms/linux/arch/mips/vr4181a/common'
> > make: *** [_dir_arch/mips/vr4181a/common] Error 2
> > 
> > Is this a problem with your patch or perhaps with my cross-compiler? (Depends 
> > it on GCC 3.x?)

This is a problem depending on binutils.
Please use binutils corresponding to VR4100 series.

> -m4100 option can be tried supposing you are using gcc
> which has a problem as the present option.
> 
> Please change following line.
> 
> ifdef CONFIG_CPU_VR41XX
> GCCFLAGS        += -mcpu=r4600 -mips2 -Wa,-m4100,--trap
> endif
> 
> Please let me know what the result became.

Yoichi

From jscheel@activevb.de Mon Feb 17 07:48:59 2003
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From: Julian Scheel <jscheel@activevb.de>
To: Yoichi Yuasa <yoichi_yuasa@montavista.co.jp>
Subject: Re: [patch] VR4181A and SMVR4181A
Date: Mon, 17 Feb 2003 08:50:18 +0100
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Hi Yoichi,

> Yoichi Yuasa <yoichi_yuasa@montavista.co.jp> wrote:
> [...]
>
> This is a problem depending on binutils.
> Please use binutils corresponding to VR4100 series.

I built my binutils on my own, following the tutorial found at 
http://www.ltc.com/~brad/mips/mips-cross-toolchain/. So I used 
../binutils/configure --target=mipsel-linux \
  --libdir='${exec_prefix}'/mipsel-linux/i386-linux/lib
as configure-settings. How can I set something more special than the 
mipsel-architecture (the vr4100-processors)

> > -m4100 option can be tried supposing you are using gcc
> > which has a problem as the present option.
> >
> > Please change following line.
> >
> > ifdef CONFIG_CPU_VR41XX
> > GCCFLAGS        += -mcpu=r4600 -mips2 -Wa,-m4100,--trap
> > endif
> >
> > Please let me know what the result became.

Shouldn't I additionally add -msoft-float, because the VR4181A has no 
FP-Coprocessor?

-- 
Grüße,
Julian


From yoichi_yuasa@montavista.co.jp Mon Feb 17 08:40:08 2003
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From: Yoichi Yuasa <yoichi_yuasa@montavista.co.jp>
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Hi Julian,

On Mon, 17 Feb 2003 08:50:18 +0100
Julian Scheel <jscheel@activevb.de> wrote:

> Hi Yoichi,
> 
> > Yoichi Yuasa <yoichi_yuasa@montavista.co.jp> wrote:
> > [...]
> >
> > This is a problem depending on binutils.
> > Please use binutils corresponding to VR4100 series.
> 
> I built my binutils on my own, following the tutorial found at 
> http://www.ltc.com/~brad/mips/mips-cross-toolchain/. So I used 
> ../binutils/configure --target=mipsel-linux \
>   --libdir='${exec_prefix}'/mipsel-linux/i386-linux/lib
> as configure-settings. How can I set something more special than the 
> mipsel-architecture (the vr4100-processors)

I am using binutils-2.12.1 .

I also try binutils-2.13.90.0.16 .
The binutils option was changed, it was able to compile as the following options.

GCCFLAGS        += -march=vr4100 -Wa,--trap

I don't know yet about the details of new options.
We need to investigate about the details of options.

> > > -m4100 option can be tried supposing you are using gcc
> > > which has a problem as the present option.
> > >
> > > Please change following line.
> > >
> > > ifdef CONFIG_CPU_VR41XX
> > > GCCFLAGS        += -mcpu=r4600 -mips2 -Wa,-m4100,--trap
> > > endif
> > >
> > > Please let me know what the result became.
> 
> Shouldn't I additionally add -msoft-float, because the VR4181A has no 
> FP-Coprocessor?

You have to add -msoft-float, if you don't use FPU Emulator.
FPU Emulator is used by the default.

Yoichi


From quintela@mandrakesoft.com Mon Feb 17 08:43:15 2003
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Subject: Re: [PATCH][1/2] TANBAC TB0193 (L-Card+)
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>>>>> "takano" == TAKANO Ryousei <takano@os-omicron.org> writes:

takano> Hi,
takano> I am new to the linux-mips kernel development, and I want to
takano> your sugestions.

takano> I added support of TANBAC TB0193 (L-Card+) which has VR4181.
takano> TB0193 is supported on Linux-VR's 2.4.0-test9 kernel, however
takano> I have not seen it on linux-mips cvs tree yet.

takano> The attatched patches is the following two parts:
takano> * tanbac-tb0193-arch.patch includes arch/mips/vr4181/tanbac-tb0193 directory.
takano> * tanbac-tb0193-drivers.patch includes cs89x0 patch and MTD flash driver
takano> from Linux-VR's 2.4.0-test9 kernel.

takano> And these are based on linux_2_4 tag cvs tree.

takano> I am now working for the PCMCIA staff.

+
+struct ide_ops tb0193_ide_ops = {
+	&tb0193_ide_default_irq,
+	&tb0193_ide_default_io_base,
+	&tb0193_ide_init_hwif_ports,
+	&tb0193_ide_request_irq,
+	&tb0193_ide_free_irq,
+	&tb0193_ide_check_region,
+	&tb0193_ide_request_region,
+	&tb0193_ide_release_region
+};


Please, use C99 initializers.


Later, Juan.

-- 
In theory, practice and theory are the same, but in practice they 
are different -- Larry McVoy

From quintela@mandrakesoft.com Mon Feb 17 09:21:52 2003
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>>>>> "takano" == TAKANO Ryousei <takano@os-omicron.org> writes:

takano> Hi,
takano> This mail attaches tanbac-tb0193-drivers.patch.

a cople of comments:

+static __u32 tb0193_read32(struct map_info *map, unsigned long ofs)
        ^^^^^

plain uXX instead of __uXX should work on kernel land.

+static struct map_info tb0193_map = {
+	name:		"TANBAC TB0193 flash",
+	read8:		tb0193_read8,
+	read16:		tb0193_read16,
+	read32:		tb0193_read32,
+	copy_from:	tb0193_copy_from,
+	write8:		tb0193_write8,
+	write16:	tb0193_write16,
+	write32:	tb0193_write32,
+	copy_to:	tb0193_copy_to,
+
+	map_priv_1:	WINDOW_ADDR,
+};

Please, use C99 initializers.

+static unsigned long lcard_max_flash_size = 0x01000000;
+static struct mtd_partition lcard_partitions[] = {
+	{ 
+		name:		"root file system",
+		offset:		0x00000000,
+		size:		0x00c00000,
+	},{
+		name:		"monitor",
+		offset:		0x00c00000,
+		size:		0x00020000,
+                mask_flags:	MTD_WRITEABLE,
+	},{
+		name:		"reserved",
+		offset:		0x00c20000,
+		size:		0x000e0000,
+	},{
+		name:		"kernel",
+		offset:		0x00d00000,
+		size:		0x00300000,
+	},
+};

at least for the structs use the C99 initializers.

Later, Juan.

-- 
In theory, practice and theory are the same, but in practice they 
are different -- Larry McVoy

From ralf@linux-mips.org Mon Feb 17 13:47:04 2003
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On Sun, Feb 16, 2003 at 06:25:24AM +0000, ppopov@linux-mips.org wrote:

> Modified files:
> 	drivers/mtd/maps: Tag: linux_2_4 Config.in Makefile 
> Added files:
> 	drivers/mtd/maps: Tag: linux_2_4 db1x00-flash.c 
> 
> Log message:
> 	Added Db1x00 mtd driver support. The driver supports all supported
> 	flash densities, but only the default 64Mb has been tested at this
> 	time.

#include <stdrant.h> you forgot 2.5 :-)

  Ralf

From jscheel@activevb.de Mon Feb 17 14:08:42 2003
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From: Julian Scheel <jscheel@activevb.de>
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Subject: Re: [patch] VR4181A and SMVR4181A
Date: Mon, 17 Feb 2003 15:10:00 +0100
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Hi Yoichi,

Am Montag, 17. Februar 2003 09:34 schrieb Yoichi Yuasa:
> I am using binutils-2.12.1 .
>
> I also try binutils-2.13.90.0.16 .
> The binutils option was changed, it was able to compile as the following
> options.
>
> GCCFLAGS        += -march=vr4100 -Wa,--trap
>
> I don't know yet about the details of new options.
> We need to investigate about the details of options.

This seems to work!

> You have to add -msoft-float, if you don't use FPU Emulator.
> FPU Emulator is used by the default.

Ok.

I have some more problems with the chip at present. I managed to build a 
kernel, but booting won't work.
I use the NEC Bootloader, and load the Image over a serial-connection to the 
Ram (address 0x8010000). The bootloader set the INTERNAL_REGISTERS_BASE to 
0xab000000. If I understand the starting-process, the kernel normally 
searches it at 0xbfa00000 which is the address, before the Bootloader changes 
it. This is set in include/asm-mips/nile4.h . It gets changed to 0x0a000000 
(set it smvr4181a.h).
Now I change the address in nile4.h to 0xab000000, so that the kernel should 
use the correct address and then changes it to his 0x0a000000.

I think this is the problem, because I get absolutely no output after the 
binary-download finished and should start.
Hopefully you can follow my explanation of the problem (c:

-- 
Grüße,
Julian


From takano@os-omicron.org Mon Feb 17 14:14:26 2003
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To: linux-mips@linux-mips.org
Subject: Re: [PATCH][1/2] TANBAC TB0193 (L-Card+)
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This is a multi-part message in MIME format.

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Hi, Juan

On Mon, 17 Feb 2003 09:42:50 +0100
Juan Quintela <quintela@mandrakesoft.com> wrote:
> Please, use C99 initializers.
> 

I fixed C99 initializers.

Thanks,
TAKANO Ryousei

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From takano@os-omicron.org Mon Feb 17 14:14:46 2003
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Date: Mon, 17 Feb 2003 23:13:47 +0900
From: TAKANO Ryousei <takano@os-omicron.org>
To: linux-mips@linux-mips.org
Subject: Re: [PATCH][2/2] TANBAC TB0193 (L-Card+)
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Hi, Juan

On Mon, 17 Feb 2003 10:21:31 +0100
Juan Quintela <quintela@mandrakesoft.com> wrote:

> plain uXX instead of __uXX should work on kernel land.
 (snip) 
> Please, use C99 initializers.
> 

I fixed __uXX staffs adn C99 initializers.

Thanks,
TAKANO Ryousei

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From yoichi_yuasa@montavista.co.jp Mon Feb 17 14:38:55 2003
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Date: Mon, 17 Feb 2003 23:33:03 +0900
From: Yoichi Yuasa <yoichi_yuasa@montavista.co.jp>
To: Julian Scheel <jscheel@activevb.de>
Cc: yoichi_yuasa@montavista.co.jp, linux-mips@linux-mips.org
Subject: Re: [patch] VR4181A and SMVR4181A
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Hi Julian,

On Mon, 17 Feb 2003 15:10:00 +0100
Julian Scheel <jscheel@activevb.de> wrote:

> Hi Yoichi,
> 
> Am Montag, 17. Februar 2003 09:34 schrieb Yoichi Yuasa:
> > I am using binutils-2.12.1 .
> >
> > I also try binutils-2.13.90.0.16 .
> > The binutils option was changed, it was able to compile as the following
> > options.
> >
> > GCCFLAGS        += -march=vr4100 -Wa,--trap
> >
> > I don't know yet about the details of new options.
> > We need to investigate about the details of options.
> 
> This seems to work!
> 
> > You have to add -msoft-float, if you don't use FPU Emulator.
> > FPU Emulator is used by the default.
> 
> Ok.
> 
> I have some more problems with the chip at present. I managed to build a 
> kernel, but booting won't work.
> I use the NEC Bootloader, and load the Image over a serial-connection to the 
> Ram (address 0x8010000). The bootloader set the INTERNAL_REGISTERS_BASE to 
> 0xab000000. If I understand the starting-process, the kernel normally 
> searches it at 0xbfa00000 which is the address, before the Bootloader changes 
> it. This is set in include/asm-mips/nile4.h . It gets changed to 0x0a000000 
> (set it smvr4181a.h).
> Now I change the address in nile4.h to 0xab000000, so that the kernel should 
> use the correct address and then changes it to his 0x0a000000.

Which bootloader are you using?
I use PMON (provided from NEC).

PMON load from serial or ethernet to 0x80100000.
This is specified by arch/mips/Makefile.

When you type "g", PMON is jumped to kernel_entry.
When PMON does not recognize kernel_entry,
you can investigate System.map and can specify an address.

Yoichi

From ppopov@mvista.com Mon Feb 17 19:37:49 2003
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Subject: Re: CVS Update@-mips.org: linux
From: Pete Popov <ppopov@mvista.com>
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On Mon, 2003-02-17 at 05:46, Ralf Baechle wrote:
> On Sun, Feb 16, 2003 at 06:25:24AM +0000, ppopov@linux-mips.org wrote:
> 
> > Modified files:
> > 	drivers/mtd/maps: Tag: linux_2_4 Config.in Makefile 
> > Added files:
> > 	drivers/mtd/maps: Tag: linux_2_4 db1x00-flash.c 
> > 
> > Log message:
> > 	Added Db1x00 mtd driver support. The driver supports all supported
> > 	flash densities, but only the default 64Mb has been tested at this
> > 	time.
> 
> #include <stdrant.h> you forgot 2.5 :-)

Sorry. Dan _is_ working on 2.5. I'll start testing the builds on 2.4 and
2.5 before committing the patches.

Pete


From clausen@pureza.melbourne.sgi.com Tue Feb 18 06:54:40 2003
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Date: Tue, 18 Feb 2003 17:54:27 +1100
From: Andrew Clausen <clausen@melbourne.sgi.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Subject: weirdness in bootmem_init(), arch/mips64/kernel/setup.c
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Hi all,

This code isn't really relevant to what I'm working on (it isn't compiled
in to kernels for the ip27), but I just noticed it, and it looks broken:

        /* Find the highest page frame number we have available.  */
        max_pfn = 0;
        for (i = 0; i < boot_mem_map.nr_map; i++) {
                unsigned long start, end;

                if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
                        continue;

*****           start = PFN_UP(boot_mem_map.map[i].addr);
*****           end = PFN_DOWN(boot_mem_map.map[i].addr
                      + boot_mem_map.map[i].size);

*****           if (start >= end)
                        continue;
                if (end > max_pfn)
                        max_pfn = end;
        }


That test looks like it will always succeed... and it looks like the
author wanted it to be a sanity check.

Why all this business with PFN_UP and PFN_DOWN?  (They are bit
shifts... PFN_UP shifts left, PFN_DOWN shifts right)

Cheers,
Andrew


From quintela@mandrakesoft.com Tue Feb 18 10:27:48 2003
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Subject: Re: weirdness in bootmem_init(), arch/mips64/kernel/setup.c
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From: Juan Quintela <quintela@mandrakesoft.com>
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 Clausen's message of "Tue, 18 Feb 2003 17:54:27 +1100")
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>>>>> "andrew" == Andrew Clausen <clausen@melbourne.sgi.com> writes:

andrew> Hi all,
andrew> This code isn't really relevant to what I'm working on (it isn't compiled
andrew> in to kernels for the ip27), but I just noticed it, and it looks broken:

andrew> /* Find the highest page frame number we have available.  */
andrew> max_pfn = 0;
andrew> for (i = 0; i < boot_mem_map.nr_map; i++) {
andrew> unsigned long start, end;

andrew> if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
andrew> continue;

andrew> *****           start = PFN_UP(boot_mem_map.map[i].addr);
andrew> *****           end = PFN_DOWN(boot_mem_map.map[i].addr
andrew> + boot_mem_map.map[i].size);

andrew> *****           if (start >= end)
andrew> continue;
andrew> if (end > max_pfn)
andrew> max_pfn = end;
andrew> }


andrew> That test looks like it will always succeed... and it looks like the
andrew> author wanted it to be a sanity check.

andrew> Why all this business with PFN_UP and PFN_DOWN?  (They are bit
andrew> shifts... PFN_UP shifts left, PFN_DOWN shifts right)

Not completely sure, but I think that it is related with the weird
discontig memory that Origins (and I think other MIPS machines) have.

(Just having put the file where that thing are, will have saved me a
grep :)

1st- Looking at the code, both of them shift right:

#define PFN_UP(x)	(((x) + PAGE_SIZE - 1) >> PAGE_SHIFT)
#define PFN_DOWN(x)	((x) >> PAGE_SHIFT)

PFN_UP -> page frame of next page
PFN_DOWN -> page frame of this page

2nd - if the region is empty (size = 0), start will be == end, which
      means that we don't considerd that area for checking what memory
      are available.

Standard disclaimer: That is my reading/things that I remind about
   that, any resemblance with reality can be pure coincidence :p  I am
   not an expert in SGI machines lowlevel details but any mean.

Later, Juan.

-- 
In theory, practice and theory are the same, but in practice they 
are different -- Larry McVoy

From ralf@linux-mips.org Tue Feb 18 10:33:34 2003
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From: Ralf Baechle <ralf@linux-mips.org>
To: Juan Quintela <quintela@mandrakesoft.com>
Cc: Andrew Clausen <clausen@melbourne.sgi.com>,
	Linux-MIPS <linux-mips@linux-mips.org>
Subject: Re: weirdness in bootmem_init(), arch/mips64/kernel/setup.c
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On Tue, Feb 18, 2003 at 11:27:23AM +0100, Juan Quintela wrote:

> andrew> That test looks like it will always succeed... and it looks like the
> andrew> author wanted it to be a sanity check.
> 
> andrew> Why all this business with PFN_UP and PFN_DOWN?  (They are bit
> andrew> shifts... PFN_UP shifts left, PFN_DOWN shifts right)
> 
> Not completely sure, but I think that it is related with the weird
> discontig memory that Origins (and I think other MIPS machines) have.

It's not used on Origins.

  Ralf

From ralf@linux-mips.org Tue Feb 18 10:42:51 2003
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From: Ralf Baechle <ralf@linux-mips.org>
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Subject: Re: weirdness in bootmem_init(), arch/mips64/kernel/setup.c
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On Tue, Feb 18, 2003 at 05:54:27PM +1100, Andrew Clausen wrote:

> This code isn't really relevant to what I'm working on (it isn't compiled
> in to kernels for the ip27), but I just noticed it, and it looks broken:
> 
>         /* Find the highest page frame number we have available.  */
>         max_pfn = 0;
>         for (i = 0; i < boot_mem_map.nr_map; i++) {
>                 unsigned long start, end;
> 
>                 if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
>                         continue;
> 
> *****           start = PFN_UP(boot_mem_map.map[i].addr);
> *****           end = PFN_DOWN(boot_mem_map.map[i].addr
>                       + boot_mem_map.map[i].size);
> 
> *****           if (start >= end)
>                         continue;
>                 if (end > max_pfn)
>                         max_pfn = end;
>         }
> 
> 
> That test looks like it will always succeed... and it looks like the
> author wanted it to be a sanity check.

> Why all this business with PFN_UP and PFN_DOWN?  (They are bit
> shifts... PFN_UP shifts left, PFN_DOWN shifts right)

Read again.  PFN_PHYS is shifting left, the others shift right.

Mm is based on complete pages and page numbers.  This code simply discards
partial pages before initializing mm with the list of available memory.
The case start > end cannot happen but start = end is possible for small
areas near the end of a page - but such an area is not usable for mm so
it's ignored.

  Ralf

From jsun@orion.mvista.com Tue Feb 18 17:59:19 2003
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From: Jun Sun <jsun@mvista.com>
To: Keith Owens <kaos@sgi.com>
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Subject: Re: [PATCH] REMOTE_DEBUG, DEBUG config cleanup
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The hope is some other arches might adopt it too.  How about
CONFIG_RUNTIME_DEBUG?

While we are on the subject, Ralf and I also are thinking to 
change CONFIG_REMOTE_DEBUG to CONFIG_KGDB.  Any objections?

Jun

On Sun, Feb 16, 2003 at 10:59:35AM +1100, Keith Owens wrote:
> On Thu, 13 Feb 2003 12:31:08 -0800, 
> Jun Sun <jsun@mvista.com> wrote:
> >Remove false dependency.  Add help info for CONFIG_DEBUG.
> >+Enable run-time debugging
> >+CONFIG_DEBUG
> >+  If you say Y here, some debugging macros will do run-time checking.
> >+  If you say N here, those macros will mostly turn to no-ops.  For
> >+  MIPS boards only.  See include/asm-mips/debug.h for debuging macros.
> >+  If unsure, say N.
> 
> CONFIG_DEBUG is too generic for an option that only applies to mips.
> Make it CONFIG_MIPS_DEBUG.
> 

From jsun@orion.mvista.com Tue Feb 18 20:38:58 2003
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Subject: [PATCH] kgdb cleanup and improvement
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--hoZxPH4CaxYzWscb
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Some misc improvements.  Various bits are contributed by Kip Walker.

. reverse an earlier change of CONFIG and gcc option.
. Add detach 'D', which lets kernel run free
. Make 'kill' and 'restart' to restart the machine
. Support "call foo()" (really useful)
	- add 'G' support, increase stack reserve
. remove useless code.

2.4 patch is attached.

Jun

--hoZxPH4CaxYzWscb
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diff -Nru linux/arch/mips/kernel/gdb-stub.c.orig linux/arch/mips/kernel/gdb-stub.c
--- linux/arch/mips/kernel/gdb-stub.c.orig	Fri Feb 14 10:31:01 2003
+++ linux/arch/mips/kernel/gdb-stub.c	Tue Feb 18 12:20:16 2003
@@ -127,6 +127,8 @@
 #include <linux/mm.h>
 #include <linux/console.h>
 #include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/reboot.h>
 
 #include <asm/asm.h>
 #include <asm/mipsregs.h>
@@ -595,30 +597,10 @@
 	char *ptr;
 	unsigned long *stack;
 
-#if 0
-	printk("in handle_exception()\n");
-	show_gdbregs(regs);
-#endif
-
-	/*
-	 * First check trap type. If this is CPU_UNUSABLE and CPU_ID is 1,
-	 * the simply switch the FPU on and return since this is no error
-	 * condition. kernel/traps.c does the same.
-	 * FIXME: This doesn't work yet, so we don't catch CPU_UNUSABLE
-	 * traps for now.
-	 */
-	trap = (regs->cp0_cause & 0x7c) >> 2;
-/*	printk("trap=%d\n",trap); */
-	if (trap == 11) {
-		if (((regs->cp0_cause >> CAUSEB_CE) & 3) == 1) {
-			regs->cp0_status |= ST0_CU1;
-			return;
-		}
-	}
-
 	/*
 	 * If we're in breakpoint() increment the PC
 	 */
+	trap = (regs->cp0_cause & 0x7c) >> 2;
 	if (trap == 9 && regs->cp0_epc == (unsigned long)breakinst)
 		regs->cp0_epc += 4;
 
@@ -707,6 +689,11 @@
 			output_buffer[3] = 0;
 			break;
 
+		case 'D':
+			/* detach; let CPU run */
+			putpacket(output_buffer);
+			return;
+
 		case 'd':
 			/* toggle debug flag */
 			break;
@@ -726,26 +713,21 @@
 
 		/*
 		 * set the value of the CPU registers - return OK
-		 * FIXME: Needs to be written
 		 */
 		case 'G':
 		{
-#if 0
-			unsigned long *newsp, psr;
-
 			ptr = &input_buffer[1];
-			hex2mem(ptr, (char *)registers, 16 * 4, 0); /* G & O regs */
-
-			/*
-			 * See if the stack pointer has moved. If so, then copy the
-			 * saved locals and ins to the new location.
-			 */
-
-			newsp = (unsigned long *)registers[SP];
-			if (sp != newsp)
-				sp = memcpy(newsp, sp, 16 * 4);
-
-#endif
+			hex2mem(ptr, (char *)&regs->reg0, 32*4, 0);
+			ptr += 32*8;
+			hex2mem(ptr, (char *)&regs->cp0_status, 6*4, 0);
+			ptr += 6*8;
+			hex2mem(ptr, (char *)&regs->fpr0, 32*4, 0);
+			ptr += 32*8;
+			hex2mem(ptr, (char *)&regs->cp1_fsr, 2*4, 0);
+			ptr += 2*8;
+			hex2mem(ptr, (char *)&regs->frame_ptr, 2*4, 0);
+			ptr += 2*8;
+			hex2mem(ptr, (char *)&regs->cp0_index, 16*4, 0);
 			strcpy(output_buffer,"OK");
 		 }
 		break;
@@ -811,19 +793,14 @@
 
 
 		/*
-		 * kill the program
-		 */
-		case 'k' :
-			break;		/* do nothing */
-
-
-		/*
-		 * Reset the whole machine (FIXME: system dependent)
+		 * kill the program; let us try to restart the machine
+		 * Reset the whole machine.
 		 */
+		case 'k':
 		case 'r':
+			machine_restart("kgdb restarts machine");
 			break;
 
-
 		/*
 		 * Step to next instruction
 		 */
@@ -922,6 +899,20 @@
 			);
 }
 
+/*
+ * malloc is needed by gdb client in "call func()", even a private one
+ * will make gdb happy
+ */
+static void *malloc(size_t size)
+{
+	return kmalloc(size, GFP_ATOMIC);
+}
+
+static void free(void *where)
+{
+	kfree(where);
+}
+
 #ifdef CONFIG_GDB_CONSOLE
 
 void gdb_putsn(const char *str, int l)
diff -Nru linux/arch/mips/kernel/gdb-low.S.orig linux/arch/mips/kernel/gdb-low.S
--- linux/arch/mips/kernel/gdb-low.S.orig	Mon Aug  5 16:53:33 2002
+++ linux/arch/mips/kernel/gdb-low.S	Tue Feb 18 12:11:59 2003
@@ -14,6 +14,16 @@
 #include <asm/gdb-stub.h>
 
 /*
+ * [jsun] We reserves about 2x GDB_FR_SIZE in stack.  The lower (addressed)
+ * part is used to store registers and passed to exception handler.
+ * The upper part is reserved for "call func" feature where gdb client
+ * saves some of the regs, setups call frame and passes args.
+ *
+ * A trace shows about 200 bytes are used to store about half of all regs.
+ * The rest should be big enough for frame setup and passing args.
+ */
+
+/*
  * The low level trap handler
  */
 		.align 	5
@@ -38,7 +48,7 @@
 		nop
 1:
 		move	k0,sp
-		subu	sp,k1,GDB_FR_SIZE
+		subu	sp,k1,GDB_FR_SIZE*2	# see comment above
 		sw	k0,GDB_FR_REG29(sp)
 		sw	v0,GDB_FR_REG2(sp)
 
diff -Nru linux/arch/mips/Makefile.orig linux/arch/mips/Makefile
--- linux/arch/mips/Makefile.orig	Tue Feb 18 12:28:17 2003
+++ linux/arch/mips/Makefile	Tue Feb 18 12:26:48 2003
@@ -41,8 +41,8 @@
 LINKFLAGS	+= -G 0 -static # -N
 MODFLAGS	+= -mlong-calls
 
-ifdef CONFIG_DEBUG
-GCCFLAGS	+= -gstabs+
+ifdef CONFIG_REMOTE_DEBUG
+GCCFLAGS	+= -g
 ifdef CONFIG_SB1XXX_CORELIS
 GCCFLAGS	+= -mno-sched-prolog -fno-omit-frame-pointer
 endif
diff -Nru linux/arch/mips64/Makefile.orig linux/arch/mips64/Makefile
--- linux/arch/mips64/Makefile.orig	Thu Feb 13 11:34:55 2003
+++ linux/arch/mips64/Makefile	Fri Feb 14 15:47:08 2003
@@ -39,8 +39,8 @@
 LINKFLAGS	+= -G 0 -static # -N
 MODFLAGS	+= -mlong-calls
 
-ifdef CONFIG_DEBUG
-GCCFLAGS	+= -gstabs+
+ifdef CONFIG_REMOTE_DEBUG
+GCCFLAGS	+= -g
 ifdef CONFIG_SB1XXX_CORELIS
 GCCFLAGS	+= -mno-sched-prolog -fno-omit-frame-pointer
 endif

--hoZxPH4CaxYzWscb--

From turcotte@broadcom.com Tue Feb 18 22:09:09 2003
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Reply-to: turcotte@broadcom.com
From: "Maurice Turcotte" <turcotte@broadcom.com>
To: linux-mips@linux-mips.org
Subject: Exec from Memory
Date: Tue, 18 Feb 2003 17:08:51 -0500
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Greetings:

I have a hypothetical linux-mips question posed by a colleage.

Suppose there is no file system available, since there is no disk. And
suppose that I had the capability to place an elf file in a known location
in memory. How would I execute it? It seems like exec really wants a file
name. BTW, this needs to run in use space, not kernel.

Any helpful pointers? Is there a FAQ that might address this?

mrt



From lindahl@keyresearch.com Tue Feb 18 22:15:37 2003
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From: Greg Lindahl <lindahl@keyresearch.com>
To: linux-mips@linux-mips.org
Subject: Re: Exec from Memory
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On Tue, Feb 18, 2003 at 05:08:51PM -0500, Maurice Turcotte wrote:

> Suppose there is no file system available, since there is no disk.

You lost me, there. Linux has filesystems like /dev, /proc, and for
your current dilemma, it has some "ramdisk" filesystems which are
careful not to not make a duplicate copy of a file when you mmap it.

So you can execute code right out of that filesystem without much
extra overhead.

If you don't want to keep a copy of the entire program in RAM (some of
it might not be executed at all or only once), then NFS mount a
remotely filesystem and run it from there.

-- greg



From justinca@cs.cmu.edu Tue Feb 18 22:22:46 2003
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Subject: Re: Exec from Memory
From: Justin Carlson <justinca@cs.cmu.edu>
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On Tue, 2003-02-18 at 17:08, Maurice Turcotte wrote:
> Greetings:
> 
> I have a hypothetical linux-mips question posed by a colleage.
> 
> Suppose there is no file system available, since there is no disk. And
> suppose that I had the capability to place an elf file in a known location
> in memory. How would I execute it? It seems like exec really wants a file
> name. BTW, this needs to run in use space, not kernel.
> 

There's no easy way (that know of) around the filesystem abstraction. 
You're going to have to deal with it in some manner.  Really basic
stuff, like the elf loader, depends on vfs abstractions.  While it's
possible to bypass all that, it would be a *lot* of work, and a lot of
nearly-duplicated code.

I can see a couple of options.  Other people might have better
suggestions.  :)

1) Use the embedded root ramdisk functionality in the kernel.  Make your
elf file /sbin/init, and run with it.

2) Hack a quick filesystem that uses a contiguous chunk of memory that
you either hardcode or pass in on the kernel command line.

-Justin



From earlm@mips.com Tue Feb 18 22:29:20 2003
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From: "Mitchell, Earl" <earlm@mips.com>
To: turcotte@broadcom.com
Cc: linux-mips@linux-mips.org
Subject: RE: Exec from Memory
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You don't have to have disk to use filesystem.
Lot of people using CompactFlash to hold filesystem.
There is also the NFS option. 

-earlm

> -----Original Message-----
> From: Justin Carlson [mailto:justinca@cs.cmu.edu]
> Sent: Tuesday, February 18, 2003 2:22 PM
> To: turcotte@broadcom.com
> Cc: linux-mips@linux-mips.org
> Subject: Re: Exec from Memory
> 
> On Tue, 2003-02-18 at 17:08, Maurice Turcotte wrote:
> > Greetings:
> >
> > I have a hypothetical linux-mips question posed by a colleage.
> >
> > Suppose there is no file system available, since there is no disk. And
> > suppose that I had the capability to place an elf file in a known
> location
> > in memory. How would I execute it? It seems like exec really wants a
> file
> > name. BTW, this needs to run in use space, not kernel.
> >
> 
> There's no easy way (that know of) around the filesystem abstraction.
> You're going to have to deal with it in some manner.  Really basic
> stuff, like the elf loader, depends on vfs abstractions.  While it's
> possible to bypass all that, it would be a *lot* of work, and a lot of
> nearly-duplicated code.
> 
> I can see a couple of options.  Other people might have better
> suggestions.  :)
> 
> 1) Use the embedded root ramdisk functionality in the kernel.  Make your
> elf file /sbin/init, and run with it.
> 
> 2) Hack a quick filesystem that uses a contiguous chunk of memory that
> you either hardcode or pass in on the kernel command line.
> 
> -Justin
> 


From clausen@pureza.melbourne.sgi.com Tue Feb 18 22:29:40 2003
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Date: Wed, 19 Feb 2003 09:29:13 +1100
From: Andrew Clausen <clausen@melbourne.sgi.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Subject: Re: weirdness in bootmem_init(), arch/mips64/kernel/setup.c
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On Tue, Feb 18, 2003 at 11:42:44AM +0100, Ralf Baechle wrote:
> Read again.  PFN_PHYS is shifting left, the others shift right.

Ooops, sorry for the noise...

Cheers,
Andrew


From brm@murphy.dk Wed Feb 19 23:05:58 2003
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To: linux-mips@linux-mips.org
Subject: [PATCH 2.4] Latest updates for LASAT 2.4
Cc: ralf@linux-mips.org
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From: Brian Murphy <brm@murphy.dk>
Date: Thu, 20 Feb 2003 00:05:49 +0100
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This is just a maintainance patch for LASAT removing unused 
cruft and updating stuff to be more compatible with the 2.5 way of
doing things (mostly local_irq_* stuff). It also impliments a polling
printf (prom_printf) for debugging and if you have a recent prom
monitor / bootloader it gets started after a shutdown or panic
from whence you can restart, examine memory, etc...

I have a unifying patch for 2.5 but It wont work until a newer
2.5 is merged back to the mips-linux tree (for crc support) and 
the serial driver in 2.5 is fixed so a serial port can be 
registered dynamically (or do you want the patch anyway Ralf
to sync things up?)

/Brian

Index: arch/mips/lasat/ds1603.c
===================================================================
RCS file: /cvs/linux-mips/arch/mips/lasat/ds1603.c,v
retrieving revision 1.1.1.2
retrieving revision 1.4
diff -u -r1.1.1.2 -r1.4
--- arch/mips/lasat/ds1603.c	13 Dec 2002 23:41:18 -0000	1.1.1.2
+++ arch/mips/lasat/ds1603.c	14 Dec 2002 17:43:38 -0000	1.4
@@ -145,12 +145,14 @@
 	return word;
 }
 
-void ds1603_set(unsigned long time)
+int ds1603_set(unsigned long time)
 {
 	rtc_init_op();
 	rtc_write_byte(SET_TIME_CMD);
 	rtc_write_word(time);
 	rtc_end_op();
+
+	return 0;
 }
 
 void ds1603_set_trimmer(unsigned int trimval)
Index: arch/mips/lasat/ds1603.h
===================================================================
RCS file: /cvs/linux-mips/arch/mips/lasat/ds1603.h,v
retrieving revision 1.1.1.2
retrieving revision 1.4
diff -u -r1.1.1.2 -r1.4
--- arch/mips/lasat/ds1603.h	13 Dec 2002 23:41:18 -0000	1.1.1.2
+++ arch/mips/lasat/ds1603.h	19 Jan 2003 21:51:44 -0000	1.4
@@ -21,7 +21,7 @@
 extern struct ds_defs *ds1603;
 
 unsigned long ds1603_read(void);
-void ds1603_set(unsigned long);
+int ds1603_set(unsigned long);
 void ds1603_set_trimmer(unsigned int);
 void ds1603_enable(void);
 void ds1603_disable(void);
Index: arch/mips/lasat/interrupt.c
===================================================================
RCS file: /cvs/linux-mips/arch/mips/lasat/interrupt.c,v
retrieving revision 1.1.1.2
retrieving revision 1.15
diff -u -r1.1.1.2 -r1.15
--- arch/mips/lasat/interrupt.c	13 Dec 2002 23:41:18 -0000	1.1.1.2
+++ arch/mips/lasat/interrupt.c	19 Jan 2003 21:16:19 -0000	1.15
@@ -53,9 +53,9 @@
 	unsigned long flags;
 	DEBUG_INT("disable_lasat_irq: %d", irq_nr);
 
-	save_and_cli(flags);
+	local_irq_save(flags);
 	*lasat_int_mask &= ~(1 << irq_nr) << lasat_int_mask_shift;
-	restore_flags(flags);
+	local_irq_restore(flags);
 }
 
 void enable_lasat_irq(unsigned int irq_nr)
@@ -63,9 +63,9 @@
 	unsigned long flags;
 	DEBUG_INT("enable_lasat_irq: %d", irq_nr);
 
-	save_and_cli(flags);
+	local_irq_save(flags);
 	*lasat_int_mask |= (1 << irq_nr) << lasat_int_mask_shift;
-	restore_flags(flags);
+	local_irq_restore(flags);
 }
 
 static unsigned int startup_lasat_irq(unsigned int irq)
@@ -164,15 +164,15 @@
 
 	switch (mips_machtype) {
 	case MACH_LASAT_100:
-		lasat_int_status = LASAT_INT_STATUS_REG_100;
-		lasat_int_mask = LASAT_INT_MASK_REG_100;
+		lasat_int_status = (void *)LASAT_INT_STATUS_REG_100;
+		lasat_int_mask = (void *)LASAT_INT_MASK_REG_100;
 		lasat_int_mask_shift = LASATINT_MASK_SHIFT_100;
 		get_int_status = get_int_status_100;
 		*lasat_int_mask = 0;
 		break;
 	case MACH_LASAT_200:
-		lasat_int_status = LASAT_INT_STATUS_REG_200;
-		lasat_int_mask = LASAT_INT_MASK_REG_200;
+		lasat_int_status = (void *)LASAT_INT_STATUS_REG_200;
+		lasat_int_mask = (void *)LASAT_INT_MASK_REG_200;
 		lasat_int_mask_shift = LASATINT_MASK_SHIFT_200;
 		get_int_status = get_int_status_200;
 		*lasat_int_mask &= 0xffff;
Index: arch/mips/lasat/lasat_board.c
===================================================================
RCS file: /cvs/linux-mips/arch/mips/lasat/lasat_board.c,v
retrieving revision 1.1.1.2
retrieving revision 1.15
diff -u -r1.1.1.2 -r1.15
--- arch/mips/lasat/lasat_board.c	13 Dec 2002 23:41:18 -0000	1.1.1.2
+++ arch/mips/lasat/lasat_board.c	19 Jan 2003 21:07:58 -0000	1.15
@@ -23,20 +23,20 @@
  *
  * Routines specific to the LASAT boards
  */
+#include <linux/types.h>
 #include <asm/lasat/lasat.h>
 #include <linux/kernel.h>
 #include <linux/string.h>
 #include <linux/ctype.h>
 #include <asm/bootinfo.h>
-#include <asm/lasat/lasat_mtd.h>
 #include <asm/addrspace.h>
 #include "at93c.h"
 /* New model description table */
 #include "lasat_models.h"
 struct lasat_info lasat_board_info;
 
-extern unsigned long crc32(unsigned long, unsigned char *, int);
-
+unsigned long crc32(unsigned long, unsigned char *, int);
+void update_bcastaddr(void);
 
 int EEPROMRead(unsigned int pos, unsigned char *data, int len)
 {
@@ -57,81 +57,39 @@
 	return 0;
 }
 
-static int upgrade_eeprom_info(struct lasat_eeprom_struct * ser_data)
+static void init_flash_sizes(void)
 {
-	struct lasat_eeprom_struct_pre7 old;
-
-	memcpy(&old, ser_data, sizeof(struct lasat_eeprom_struct_pre7));
-
-	switch (ser_data->version) {
-	case 1:
-	case 2:
-	case 3:
-		/* These have old serial numbers that we can't convert. */
-		return -1;
-
-	case 4:
-		/* This used flags for obscure purposes. */
-		old.version = 5;
-
-	case 5:
-		/* Writecount didn't exist. */
-		old.writecount = 1;
-		old.version = 6;
-
-	case 6:
-		/* The length of the part numbers have changed. */
-		/* So the print_serial, prod_partno, etc have moved. */
-		/* Also, now the dash is part of the part number (in
-		 * accordance with our philosophy that the part numbers
-		 * are to be considered "random data"). */
-
-		memset(ser_data, 0, 128);
-
-		ser_data->cfg[0] = 0;
-		ser_data->cfg[1] = 0;
-		ser_data->cfg[2] = 0;
-
-		memcpy(ser_data->hwaddr, old.hwaddr0, 6);
-
-		memcpy(ser_data->print_partno, old.print_partno, 6);
-		ser_data->print_partno[6] = '-';
-		memcpy(ser_data->print_partno+7, old.print_partno+6, 3);
-
-		memcpy(ser_data->print_serial, old.print_serial, 14);
-
-		memcpy(ser_data->prod_partno, old.prod_partno, 6);
-		ser_data->prod_partno[6] = '-';
-		memcpy(ser_data->prod_partno+7, old.prod_partno+6, 3);
-
-		memcpy(ser_data->prod_serial, old.prod_serial, 14);
-
-		memcpy(ser_data->passwd_hash, old.passwd_hash, 16);
-
-		ser_data->vendid = old.vendor;
-		ser_data->ts_ref = old.ts_ref;
-		ser_data->ts_signoff = old.ts_signoff;
-		ser_data->serviceflag = old.writecount;
-
-		ser_data->ipaddr = old.ipaddr;
-		ser_data->netmask = old.netmask;
-
-		/* make up something */
-		ser_data->cfg[0] = 0x01132001;
-		ser_data->cfg[1] = 0x00010061;
+	int i;
+	unsigned long *lb = lasat_board_info.li_flashpart_base;
+	unsigned long *ls = lasat_board_info.li_flashpart_size;
 
-		ser_data->prid = ((ser_data->cfg[0] >> 4) & 0x0f);
-		ser_data->version = 7;
+	ls[LASAT_MTD_BOOTLOADER] = 0x40000;
+	ls[LASAT_MTD_SERVICE] = 0xC0000;
+	ls[LASAT_MTD_NORMAL] = 0x100000;
 
+	if (mips_machtype == MACH_LASAT_100) {
+		lasat_board_info.li_flash_base = KSEG1ADDR(0x1e000000);
+		
+		lb[LASAT_MTD_BOOTLOADER] = KSEG1ADDR(0x1e400000);
 
-	case 7:
-		/* Up to date */
-		return 0;
+		if (lasat_board_info.li_flash_size > 0x200000) {
+			ls[LASAT_MTD_CONFIG] = 0x100000;
+			ls[LASAT_MTD_FS] = 0x500000;
+		}
+	} else {
+		lasat_board_info.li_flash_base = KSEG1ADDR(0x10000000);
 
-	default:
-		/* What, an unknown version? */
-		return -1;
+		if (lasat_board_info.li_flash_size < 0x1000000) {
+			lb[LASAT_MTD_BOOTLOADER] = KSEG1ADDR(0x10000000);
+			ls[LASAT_MTD_CONFIG] = 0x100000;
+			if (lasat_board_info.li_flash_size >= 0x400000) {
+				ls[LASAT_MTD_FS] = lasat_board_info.li_flash_size - 0x300000;
+			}
+		}
 	}
+
+	for (i = 1; i < LASAT_MTD_LAST; i++)
+		lb[i] = lb[i-1] + ls[i-1];
 }
 
 int lasat_init_board_info(void)
@@ -139,19 +97,13 @@
 	int c;
 	unsigned long crc;
 	unsigned long cfg0, cfg1;
-	const vendor_info_t    *pvi;
 	const product_info_t   *ppi;
 	int i_n_base_models = N_BASE_MODELS;
 	const char * const * i_txt_base_models = txt_base_models;
-	int i_n_vendors = N_VENDORS;
-	vendor_info_t const *i_vendor_info_table = vendor_info_table;
 	int i_n_prids = N_PRIDS;
 
 	memset(&lasat_board_info, 0, sizeof(lasat_board_info));
 
-	/* Assume EEPROM struct is LASAT_EEPROM_VERSION */
-	lasat_board_info.li_eeprom_upgrade_version = 1;
-	
 	/* First read the EEPROM info */
 	EEPROMRead(0, (unsigned char *)&lasat_board_info.li_eeprom_info, 
 		   sizeof(struct lasat_eeprom_struct));
@@ -161,44 +113,21 @@
 		    sizeof(struct lasat_eeprom_struct) - 4);
 
 	if (crc != lasat_board_info.li_eeprom_info.crc32) {
-		return -1;
+		prom_printf("WARNING...\nWARNING...\nEEPROM CRC does not match calculated, attempting to soldier on...\n");
 	}
 
 	if (lasat_board_info.li_eeprom_info.version != LASAT_EEPROM_VERSION)
 	{
-		if (0 > upgrade_eeprom_info(&(lasat_board_info.li_eeprom_info))) {
-			printk("Upgrading EEPROM information from version %d to version %d failed!\n", 
-			       (unsigned int)lasat_board_info.li_eeprom_info.version,
-			       LASAT_EEPROM_VERSION);
-			return -1;
-		}
-		lasat_write_eeprom_info();
-
-		/* OK, the EEPROM struct is not LASAT_EEPROM_VERSION */
-		lasat_board_info.li_eeprom_upgrade_version = 0;
+		prom_printf("WARNING...\nWARNING...\nEEPROM version %d, wanted version %d, attempting to soldier on...\n",
+		       (unsigned int)lasat_board_info.li_eeprom_info.version,
+		       LASAT_EEPROM_VERSION);
 	}
 
-	/*
-	 * Part and serial no.
-	 */
-	memcpy(lasat_board_info.li_partno,
-	       lasat_board_info.li_eeprom_info.prod_partno, 12);
-	lasat_board_info.li_partno[12] = '\0';
-
-	memcpy(lasat_board_info.li_serial,
-	       lasat_board_info.li_eeprom_info.prod_serial,
-	       14);
-	lasat_board_info.li_serial[14] = '\0';
-
-	/*
-	 * If configuration field is present, use that
-	 */
-
 	cfg0 = lasat_board_info.li_eeprom_info.cfg[0];
 	cfg1 = lasat_board_info.li_eeprom_info.cfg[1];
 
 	if ( LASAT_W0_DSCTYPE(cfg0) != 1) {
-		return -1;
+		prom_printf("WARNING...\nWARNING...\nInvalid configuration read from EEPROM, attempting to soldier on...");
 	}
 	/* We have a valid configuration */
 
@@ -282,35 +211,6 @@
 		break;
 	}
 
-	switch (LASAT_W1_EDHAC(cfg1)) {
-	case 0x0:
-		lasat_board_info.li_edhac = 0;
-		lasat_board_info.li_eadi  = 0;
-		break;
-	case 0x1:
-		lasat_board_info.li_edhac = 0;
-		lasat_board_info.li_eadi  = 1;
-		break;
-	case 0x2:
-		lasat_board_info.li_edhac = 1;
-		lasat_board_info.li_eadi  = 1;
-		break;
-	case 0x3:
-		lasat_board_info.li_edhac = 2;
-		lasat_board_info.li_eadi  = 1;
-		break;
-	}
-	/* The 200 board always has EADI */
-	if (LASAT_W0_CPUTYPE(cfg0) == 1) {
-		lasat_board_info.li_eadi = 1;
-	}
-
-	lasat_board_info.li_hifn = LASAT_W1_HIFN(cfg1);
-	lasat_board_info.li_isdn = LASAT_W1_ISDN(cfg1);
-	lasat_board_info.li_ide  = LASAT_W1_IDE(cfg1);
-	lasat_board_info.li_hdlc = LASAT_W1_HDLC(cfg1);
-	lasat_board_info.li_usversion = LASAT_W1_USVERSION(cfg1);
-
 	/* Flash size */
 	switch (LASAT_W1_FLASHSIZE(cfg1)) {
 	case 0:
@@ -330,73 +230,25 @@
 		break;
 	}
 
-	/* Flash base addresses */
-	if (mips_machtype == MACH_LASAT_100) {
-		lasat_board_info.li_flash_base = KSEG1ADDR(0x1e000000);
-		lasat_board_info.li_flash_service_base = KSEG1ADDR(0x1e400000);
-		lasat_board_info.li_flash_service_size = 0x100000;
-		lasat_board_info.li_flash_normal_base = KSEG1ADDR(0x1e500000);
-		lasat_board_info.li_flash_normal_size = 0x100000;
-		if (lasat_board_info.li_flash_size > 0x200000) {
-			lasat_board_info.li_flash_cfg_base = KSEG1ADDR(0x1e600000);
-			lasat_board_info.li_flash_cfg_size = 0x100000;
-			lasat_board_info.li_flash_fs_base = KSEG1ADDR(0x1e700000);
-			lasat_board_info.li_flash_fs_size = 0x500000;
-		}
-	} else {
-		lasat_board_info.li_flash_base = KSEG1ADDR(0x10000000);
-		if (lasat_board_info.li_flash_size < 0x1000000) {
-			lasat_board_info.li_flash_service_base = KSEG1ADDR(0x10000000);
-			lasat_board_info.li_flash_service_size = 0x100000;
-			lasat_board_info.li_flash_cfg_base = KSEG1ADDR(0x10200000);
-			lasat_board_info.li_flash_cfg_size = 0x100000;
-			lasat_board_info.li_flash_normal_base = KSEG1ADDR(0x10100000);
-			lasat_board_info.li_flash_normal_size = 0x100000;
-			if (lasat_board_info.li_flash_size >= 0x400000) {
-				lasat_board_info.li_flash_fs_base = KSEG1ADDR(0x10300000);
-				lasat_board_info.li_flash_fs_size = 
-					lasat_board_info.li_flash_size - 0x300000;
-			}
-		} else {
-			lasat_board_info.li_flash_service_base = KSEG1ADDR(0x10400000);
-			lasat_board_info.li_flash_service_size = 0x100000;
-			lasat_board_info.li_flash_cfg_base = KSEG1ADDR(0x10000000);
-			lasat_board_info.li_flash_cfg_size = 0x200000;
-			lasat_board_info.li_flash_normal_base = KSEG1ADDR(0x10200000);
-			lasat_board_info.li_flash_normal_size = 0x100000;
-			lasat_board_info.li_flash_fs_base = KSEG1ADDR(0x10500000);
-			lasat_board_info.li_flash_fs_size = 0xa00000;
-		}
-	}
+	init_flash_sizes();
 
 	lasat_board_info.li_bmid = LASAT_W0_BMID(cfg0);
 	lasat_board_info.li_prid = lasat_board_info.li_eeprom_info.prid;
 	if (lasat_board_info.li_prid == 0xffff || lasat_board_info.li_prid == 0)
 		lasat_board_info.li_prid = lasat_board_info.li_bmid;
-	lasat_board_info.li_vendid = lasat_board_info.li_eeprom_info.vendid;
 
 	/* Base model stuff */
 	if (lasat_board_info.li_bmid > i_n_base_models)
 		lasat_board_info.li_bmid = i_n_base_models;
 	strcpy(lasat_board_info.li_bmstr, i_txt_base_models[lasat_board_info.li_bmid]);
 
-	/* Vendor stuff */
-	if (lasat_board_info.li_vendid >= i_n_vendors)
-		lasat_board_info.li_vendid = 0;
-	pvi = &i_vendor_info_table[lasat_board_info.li_vendid];
-	strcpy(lasat_board_info.li_vendstr, pvi->vi_name);
-
 	/* Product ID dependent values */
 	c = lasat_board_info.li_prid;
 	if (c >= i_n_prids) {
 		strcpy(lasat_board_info.li_namestr, "Unknown Model");
 		strcpy(lasat_board_info.li_typestr, "Unknown Type");
-		lasat_board_info.li_vpn_kbps = 0;
-		lasat_board_info.li_vpn_tunnels = 0;
-		lasat_board_info.li_vpn_clients = 0;
 	} else {
-		/* Product ID names (also depending on vendor ID) */
-		ppi = &pvi->vi_product_info[c];
+		ppi = &vendor_info_table[0].vi_product_info[c];
 		strcpy(lasat_board_info.li_namestr, ppi->pi_name);
 		if (ppi->pi_type)
 			strcpy(lasat_board_info.li_typestr, ppi->pi_type);
@@ -404,7 +256,9 @@
 			sprintf(lasat_board_info.li_typestr, "%d",10*c);
 	}
 
-	lasat_board_info.li_debugaccess = lasat_board_info.li_eeprom_info.debugaccess;
+#if defined(CONFIG_INET) && defined(CONFIG_SYSCTL)
+	update_bcastaddr();
+#endif
 
 	return 0;
 }
@@ -423,19 +277,3 @@
 		    sizeof(struct lasat_eeprom_struct));
 }
 
-char *get_firmware_version(void)
-{
-	char *fw;
-	fw = (unsigned char *)(lasat_board_info.li_flash_normal_base);
-
-	if ( (((unsigned long *)fw)[0] != 0xfedeabba) ||
-			(((unsigned long *)fw)[1] != 0x00bedead))
-		return "NONE";
-
-	fw += 0x50;
-	if ((*fw == 0) || (strlen(fw) > 175)) {
-		return "UNKNOWN";
-	}
-
-	return fw;
-}
Index: arch/mips/lasat/pci.c
===================================================================
RCS file: /cvs/linux-mips/arch/mips/lasat/pci.c,v
retrieving revision 1.1.1.3
retrieving revision 1.7
diff -u -r1.1.1.3 -r1.7
--- arch/mips/lasat/pci.c	11 Jan 2003 23:38:10 -0000	1.1.1.3
+++ arch/mips/lasat/pci.c	11 Jan 2003 23:47:58 -0000	1.7
@@ -164,16 +164,16 @@
 {
         u32 data=0, flags;
 
-	save_and_cli(flags);
+	local_irq_save(flags);
 
 	if (lasat_pcibios_config_access(PCI_ACCESS_READ, dev, reg, &data)) {
-		restore_flags(flags);
+		local_irq_restore(flags);
 		return -1;
 	}
 
 	*val = (data >> ((reg & 3) << 3)) & 0xff;
 
-	restore_flags(flags);
+	local_irq_restore(flags);
 	return PCIBIOS_SUCCESSFUL;
 }
 
@@ -185,16 +185,16 @@
 	if (reg & 1)
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 
-	save_and_cli(flags);
+	local_irq_save(flags);
 
 	if (lasat_pcibios_config_access(PCI_ACCESS_READ, dev, reg, &data)) {
-		restore_flags(flags);
+		local_irq_restore(flags);
 		return -1;
 	}
 
 	*val = (data >> ((reg & 3) << 3)) & 0xffff;
 
-	restore_flags(flags);
+	local_irq_restore(flags);
 	return PCIBIOS_SUCCESSFUL;
 }
 
@@ -205,16 +205,16 @@
 	if (reg & 3)
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 
-	save_and_cli(flags);
+	local_irq_save(flags);
 
 	if (lasat_pcibios_config_access(PCI_ACCESS_READ, dev, reg, &data)) {
-		restore_flags(flags);
+		local_irq_restore(flags);
 		return -1;
 	}
 
 	*val = data;
 
-	restore_flags(flags);
+	local_irq_restore(flags);
 	return PCIBIOS_SUCCESSFUL;
 }
 
@@ -223,7 +223,7 @@
 {
         u32 data=0, flags, err;
 
-	save_and_cli(flags);
+	local_irq_save(flags);
 
         err = lasat_pcibios_config_access(PCI_ACCESS_READ, dev, reg, &data);
         if (err)
@@ -234,7 +234,7 @@
 
 	err = lasat_pcibios_config_access(PCI_ACCESS_WRITE, dev, reg, &data);
 out:
-	restore_flags(flags);
+	local_irq_restore(flags);
 
 	if (err)
 		return -1;
@@ -249,7 +249,7 @@
 	if (reg & 1)
 		return PCIBIOS_BAD_REGISTER_NUMBER;
        
-	save_and_cli(flags);
+	local_irq_save(flags);
 
         err = lasat_pcibios_config_access(PCI_ACCESS_READ, dev, reg, &data);
         if (err)
@@ -260,7 +260,7 @@
 
 	err = lasat_pcibios_config_access(PCI_ACCESS_WRITE, dev, reg, &data);
 out:
-	restore_flags(flags);
+	local_irq_restore(flags);
 
 	if (err)
 		return -1;
@@ -275,10 +275,10 @@
 	if (reg & 3)
 		return PCIBIOS_BAD_REGISTER_NUMBER;
 
-	save_and_cli(flags);
+	local_irq_save(flags);
 
 	err = lasat_pcibios_config_access(PCI_ACCESS_WRITE, dev, reg, &val);
-	restore_flags(flags);
+	local_irq_restore(flags);
 
 	if (err)
 		return -1;
Index: arch/mips/lasat/picvue.c
===================================================================
RCS file: /cvs/linux-mips/arch/mips/lasat/picvue.c,v
retrieving revision 1.1.1.2
retrieving revision 1.11
diff -u -r1.1.1.2 -r1.11
--- arch/mips/lasat/picvue.c	13 Dec 2002 23:41:18 -0000	1.1.1.2
+++ arch/mips/lasat/picvue.c	6 Feb 2003 21:52:44 -0000	1.11
@@ -11,6 +11,7 @@
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/errno.h>
+#include <linux/string.h>
 
 #include "picvue.h"
 
@@ -109,7 +110,8 @@
 	pvc_wait();
 }
 
-void pvc_write_string(const unsigned char *str, u8 addr, int line) {
+void pvc_write_string(const unsigned char *str, u8 addr, int line)
+{
 	int i = 0;
 
 	if (line > 0 && (PVC_NLINES > 1))
@@ -122,9 +124,33 @@
 	}
 }
 
+void pvc_write_string_centered(const unsigned char *str, int line)
+{
+	int len = strlen(str);
+	u8 addr;
+
+	if (len > PVC_VISIBLE_CHARS)
+		addr = 0;
+	else
+		addr = (PVC_VISIBLE_CHARS - strlen(str))/2;
+
+	pvc_write_string(str, addr, line);
+}
+
+void pvc_dump_string(const unsigned char *str)
+{
+	int len = strlen(str);
+
+	pvc_clear();
+	pvc_write_string(str, 0, 0);
+	if (len > PVC_VISIBLE_CHARS)
+		pvc_write_string(&str[PVC_VISIBLE_CHARS], 0, 1);
+}
+
 #define BM_SIZE			8
 #define MAX_PROGRAMMABLE_CHARS	8
-int pvc_program_cg(int charnum, u8 bitmap[BM_SIZE]) {
+int pvc_program_cg(int charnum, u8 bitmap[BM_SIZE])
+{
 	int i;
 	int addr;
 
@@ -146,7 +172,8 @@
 #define  ONE_LINE	0
 #define  LARGE_FONT	(1 << 2)
 #define  SMALL_FONT	0
-static void pvc_funcset(u8 cmd) {
+static void pvc_funcset(u8 cmd)
+{
 	pvc_write(FUNC_SET_CMD | (cmd & (EIGHT_BYTE|TWO_LINES|LARGE_FONT)), MODE_INST);
 }
 
@@ -154,7 +181,8 @@
 #define  AUTO_INC		(1 << 1)
 #define  AUTO_DEC		0
 #define  CURSOR_FOLLOWS_DISP	(1 << 0)
-static void pvc_entrymode(u8 cmd) {
+static void pvc_entrymode(u8 cmd)
+{
 	pvc_write(ENTRYMODE_CMD | (cmd & (AUTO_INC|CURSOR_FOLLOWS_DISP)), MODE_INST);
 }
 
@@ -163,7 +191,8 @@
 #define  DISP_ON	(1 << 2)
 #define  CUR_ON		(1 << 1)
 #define  CUR_BLINK	(1 << 0)
-void pvc_dispcnt(u8 cmd) {
+void pvc_dispcnt(u8 cmd)
+{
 	pvc_write(DISP_CNT_CMD | (cmd & (DISP_ON|CUR_ON|CUR_BLINK)), MODE_INST);
 }
 
@@ -172,17 +201,20 @@
 #define  CURSOR		0
 #define  RIGHT		(1 << 2)
 #define  LEFT		0
-void pvc_move(u8 cmd) {
+void pvc_move(u8 cmd)
+{
 	pvc_write(MOVE_CMD | (cmd & (DISPLAY|RIGHT)), MODE_INST);
 }
 
 #define CLEAR_CMD	0x1
-void pvc_clear(void) {
+void pvc_clear(void)
+{
 	pvc_write(CLEAR_CMD, MODE_INST);
 }
 
 #define HOME_CMD	0x2
-void pvc_home(void) {
+void pvc_home(void)
+{
 	pvc_write(HOME_CMD, MODE_INST);
 }
 
@@ -197,6 +229,10 @@
 	pvc_funcset(cmd);
 	pvc_dispcnt(DISP_ON);
 	pvc_entrymode(AUTO_INC);
+
+	pvc_clear();
+	pvc_write_string_centered("Display", 0);
+	pvc_write_string_centered("Initialized", 1);
 
 	return 0;
 }
Index: arch/mips/lasat/picvue.h
===================================================================
RCS file: /cvs/linux-mips/arch/mips/lasat/picvue.h,v
retrieving revision 1.1.1.2
diff -u -r1.1.1.2 picvue.h
--- arch/mips/lasat/picvue.h	13 Dec 2002 23:41:18 -0000	1.1.1.2
+++ arch/mips/lasat/picvue.h	19 Feb 2003 20:29:12 -0000
@@ -23,6 +23,8 @@
 #define PVC_VISIBLE_CHARS	16
 
 void pvc_write_string(const unsigned char *str, u8 addr, int line);
+void pvc_write_string_centered(const unsigned char *str, int line);
+void pvc_dump_string(const unsigned char *str);
 
 #define BM_SIZE			8
 #define MAX_PROGRAMMABLE_CHARS	8
Index: arch/mips/lasat/picvue_proc.c
===================================================================
RCS file: /cvs/linux-mips/arch/mips/lasat/picvue_proc.c,v
retrieving revision 1.1.1.2
retrieving revision 1.6
diff -u -r1.1.1.2 -r1.6
--- arch/mips/lasat/picvue_proc.c	13 Dec 2002 23:41:18 -0000	1.1.1.2
+++ arch/mips/lasat/picvue_proc.c	12 Jan 2003 17:10:28 -0000	1.6
@@ -81,7 +81,7 @@
         return origcount;
 }
 
-static int pvc_proc_scroll(struct file *file, const char *buffer,            
+static int pvc_proc_write_scroll(struct file *file, const char *buffer,
                            unsigned long count, void *data)
 {
         int origcount = count;
@@ -109,6 +109,20 @@
         return origcount;
 }
 
+static int pvc_proc_read_scroll(char *page, char **start,
+                             off_t off, int count,
+                             int *eof, void *data)
+{
+        char *origpage = page;
+
+	down(&pvc_sem);
+        page += sprintf(page, "%d\n", scroll_dir * scroll_interval);
+	up(&pvc_sem);
+
+        return page - origpage; 
+}
+
+
 void pvc_proc_timerfunc(unsigned long data)
 {
 	if (scroll_dir < 0)
@@ -155,7 +169,8 @@
 	proc_entry = create_proc_entry("scroll", 0644, pvc_display_dir);
 	if (proc_entry == NULL)
 		goto error;
-	proc_entry->write_proc = pvc_proc_scroll;
+	proc_entry->write_proc = pvc_proc_write_scroll;
+	proc_entry->read_proc = pvc_proc_read_scroll;
 
 	init_timer(&timer);
 	timer.function = pvc_proc_timerfunc;
Index: arch/mips/lasat/prom.c
===================================================================
RCS file: /cvs/linux-mips/arch/mips/lasat/prom.c,v
retrieving revision 1.1.1.2
retrieving revision 1.12
diff -u -r1.1.1.2 -r1.12
--- arch/mips/lasat/prom.c	13 Dec 2002 23:41:18 -0000	1.1.1.2
+++ arch/mips/lasat/prom.c	6 Feb 2003 21:28:52 -0000	1.12
@@ -1,6 +1,7 @@
 /*
  * PROM interface routines.
  */
+#include <linux/types.h>
 #include <linux/config.h>
 #include <linux/init.h>
 #include <linux/string.h>
@@ -15,6 +16,74 @@
 
 #include "at93c.h"
 #include <asm/lasat/eeprom.h>
+#include "prom.h"
+
+#define RESET_VECTOR	0xbfc00000
+#define PROM_JUMP_TABLE_ENTRY(n) (*((u32 *)(RESET_VECTOR + 0x20) + n))
+#define PROM_DISPLAY_ADDR	PROM_JUMP_TABLE_ENTRY(0)
+#define PROM_PUTC_ADDR		PROM_JUMP_TABLE_ENTRY(1)
+#define PROM_MONITOR_ADDR	PROM_JUMP_TABLE_ENTRY(2)
+
+static void null_prom_printf(const char * fmt, ...)
+{
+}
+
+static void null_prom_display(const char *string, int pos, int clear)
+{
+}
+
+static void null_prom_monitor(void)
+{
+}
+
+static void null_prom_putc(char c)
+{
+}
+
+/* these are functions provided by the bootloader */
+static void (* prom_putc)(char c) = null_prom_putc;
+void (* prom_printf)(const char * fmt, ...) = null_prom_printf;
+void (* prom_display)(const char *string, int pos, int clear) = 
+		null_prom_display;
+void (* prom_monitor)(void) = null_prom_monitor;
+
+#define PROM_PRINTFBUF_SIZE 256
+static char prom_printfbuf[PROM_PRINTFBUF_SIZE];
+
+static void real_prom_printf(const char * fmt, ...)
+{
+	va_list ap;
+	int len;
+	char *c = prom_printfbuf;
+	int i;
+
+	va_start(ap, fmt);
+	len = vsnprintf(prom_printfbuf, PROM_PRINTFBUF_SIZE, fmt, ap);
+	va_end(ap);
+
+	/* output overflowed the buffer */
+	if (len < 0 || len > PROM_PRINTFBUF_SIZE)
+		len = PROM_PRINTFBUF_SIZE;
+
+	for (i=0; i < len; i++) {
+		if (*c == '\n')
+			prom_putc('\r');
+		prom_putc(*c++);
+	}
+}
+
+static void setup_prom_vectors(void)
+{
+	u32 version = *(u32 *)(RESET_VECTOR + 0x90);
+
+	if (version == 306) {
+		prom_display = (void *)PROM_DISPLAY_ADDR;
+		prom_putc = (void *)PROM_PUTC_ADDR;
+		prom_printf = real_prom_printf;
+		prom_monitor = (void *)PROM_MONITOR_ADDR;
+	}
+	prom_printf("prom vectors set up\n");
+}
 
 char arcs_cmdline[CL_SIZE];
 
@@ -27,6 +96,8 @@
 
 void __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
 {
+	setup_prom_vectors();
+
 	if (mips_cpu.cputype == CPU_R5000)
 		mips_machtype = MACH_LASAT_200;
 	else
@@ -50,21 +121,12 @@
 	/* Set memory regions */
 	ioport_resource.start = 0;		/* Should be KSEGx ???	*/
 	ioport_resource.end = 0xffffffff;	/* Should be ???	*/
-#if 0
-	/*
-	 * We should do it right, i.e. like this, in stead of passing mem=xxxM.
-	 */
+
 	add_memory_region(0, lasat_board_info.li_memsize, BOOT_MEM_RAM);
-#endif
 }
 
 void prom_free_prom_memory(void)
 {
-}
-
-void prom_printf(const char * fmt, ...)
-{
-	return;
 }
 
 const char *get_system_type(void)
Index: arch/mips/lasat/prom.h
===================================================================
RCS file: arch/mips/lasat/prom.h
diff -N arch/mips/lasat/prom.h
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ arch/mips/lasat/prom.h	4 Feb 2003 20:38:40 -0000	1.2
@@ -0,0 +1,6 @@
+#ifndef PROM_H
+#define PROM_H
+extern void (* prom_display)(const char *string, int pos, int clear);
+extern void (* prom_monitor)(void);
+extern void (* prom_printf)(const char * fmt, ...);
+#endif
Index: arch/mips/lasat/reset.c
===================================================================
RCS file: /cvs/linux-mips/arch/mips/lasat/reset.c,v
retrieving revision 1.1.1.2
retrieving revision 1.6
diff -u -r1.1.1.2 -r1.6
--- arch/mips/lasat/reset.c	13 Dec 2002 23:41:18 -0000	1.1.1.2
+++ arch/mips/lasat/reset.c	12 Jan 2003 17:10:28 -0000	1.6
@@ -29,6 +29,7 @@
 #include <asm/system.h>
 #include <asm/lasat/lasat.h>
 #include "picvue.h"
+#include "prom.h"
 
 static void lasat_machine_restart(char *command);
 static void lasat_machine_halt(void);
@@ -38,31 +39,29 @@
 
 static void lasat_machine_restart(char *command)
 {
-	cli();
+	local_irq_disable();
 
-	{
-		volatile unsigned int *softres_reg = lasat_misc->reset_reg;
-
-		if (lasat_boot_to_service) {
-			printk("machine_restart: Rebooting to service mode\n");
-			*(volatile unsigned int *)0xa0000024 = 0xdeadbeef;
-			*(volatile unsigned int *)0xa00000fc = 0xfedeabba;
-		}
-		*softres_reg = 0xbedead;
+	if (lasat_boot_to_service) {
+		printk("machine_restart: Rebooting to service mode\n");
+		*(volatile unsigned int *)0xa0000024 = 0xdeadbeef;
+		*(volatile unsigned int *)0xa00000fc = 0xfedeabba;
 	}
+	*lasat_misc->reset_reg = 0xbedead;
 	for (;;) ;
 }
 
 #define MESSAGE "System halted"
 static void lasat_machine_halt(void)
 {
+	local_irq_disable();
+
 	/* Disable interrupts and loop forever */
 	printk(KERN_NOTICE MESSAGE "\n");
 #ifdef CONFIG_PICVUE
 	pvc_clear();
 	pvc_write_string(MESSAGE, 0, 0);
 #endif
-	cli();
+	prom_monitor();
 	for (;;) ;
 }
 
Index: arch/mips/lasat/setup.c
===================================================================
RCS file: /cvs/linux-mips/arch/mips/lasat/setup.c,v
retrieving revision 1.1.1.4
retrieving revision 1.19
diff -u -r1.1.1.4 -r1.19
--- arch/mips/lasat/setup.c	13 Dec 2002 23:41:18 -0000	1.1.1.4
+++ arch/mips/lasat/setup.c	19 Jan 2003 22:05:31 -0000	1.19
@@ -7,6 +7,8 @@
  * Thomas Horsten <thh@lasat.com>
  * Copyright (C) 2000 LASAT Networks A/S.
  *
+ * Brian Murphy <brian@murphy.dk>
+ *
  * ########################################################################
  *
  *  This program is free software; you can distribute it and/or modify it
@@ -40,7 +42,6 @@
 #include <asm/irq.h>
 #include <asm/lasat/lasat.h>
 
-#include <asm/lasat/lasat_mtd.h>
 #include <linux/serial.h>
 #include <asm/serial.h>
 #include <asm/lasat/serial.h>
@@ -55,6 +56,8 @@
 #include <asm/lasat/picvue.h>
 #include <asm/lasat/eeprom.h>
 
+#include "prom.h"
+
 int lasat_command_line = 0;
 void lasatint_init(void);
 
@@ -98,27 +101,34 @@
 	{ (void *)PVC_REG_200, PVC_DATA_SHIFT_200, PVC_DATA_M_200,
 		PVC_E_200, PVC_RW_200, PVC_RS_200 }
 };
+#endif
 
-
-static int lasat_panic_event(struct notifier_block *this,
+static int lasat_panic_display(struct notifier_block *this,
 			     unsigned long event, void *ptr)
 {
+#ifdef CONFIG_PICVUE
 	unsigned char *string = ptr;
 	if (string == NULL)
 		string = "Kernel Panic";
-	pvc_write_string(string, 0, 0);
-	if (strlen(string) > PVC_VISIBLE_CHARS)
-		pvc_write_string(&string[PVC_VISIBLE_CHARS], 0, 1);
+	pvc_dump_string(string);
+#endif
+	return NOTIFY_DONE;
+}
+
+static int lasat_panic_prom_monitor(struct notifier_block *this,
+			     unsigned long event, void *ptr)
+{
+	prom_monitor();
 	return NOTIFY_DONE;
 }
 
-static struct notifier_block lasat_panic_block = {
-	lasat_panic_event,
-	NULL,
-	INT_MAX /* try to do it first */
+static struct notifier_block lasat_panic_block[] = 
+{
+	{ lasat_panic_display, NULL, INT_MAX },
+	{ lasat_panic_prom_monitor, NULL, INT_MIN }
 };
-#endif
 
+#ifdef CONFIG_BLK_DEV_IDE
 static int lasat_ide_default_irq(ide_ioreg_t base) {
 	return 0;
 }
@@ -126,6 +136,7 @@
 static ide_ioreg_t lasat_ide_default_io_base(int index) {
 	return 0;
 }
+#endif
 
 static void lasat_time_init(void)
 {
@@ -176,14 +187,16 @@
 
 void __init lasat_setup(void)
 {
+	int i;
 	lasat_misc  = &lasat_misc_info[mips_machtype];
 #ifdef CONFIG_PICVUE
 	picvue = &pvc_defs[mips_machtype];
-	/* Set up panic notifier */
-
-	notifier_chain_register(&panic_notifier_list, &lasat_panic_block);
 #endif
 
+	/* Set up panic notifier */
+	for (i = 0; i < sizeof(lasat_panic_block) / sizeof(struct notifier_block); i++)
+		notifier_chain_register(&panic_notifier_list, &lasat_panic_block[i]);
+
 #ifdef CONFIG_BLK_DEV_IDE
 	ide_ops = &std_ide_ops;
 	ide_ops->ide_default_irq = &lasat_ide_default_irq;
@@ -205,76 +218,8 @@
 
 	/* Switch from prom exception handler to normal mode */
 	change_c0_status(ST0_BEV,0);
-}
-
-#ifdef CONFIG_LASAT_SERVICE
-/*
- * Called by init() (just before starting user space init program)
- */
-static int __init lasat_init(void)
-{
-	/* This is where we call service mode */
-	lasat_service();
-	for (;;) {}	/* We should never get here */
-
-	return 0;
-}
-
-__initcall(lasat_init);
-#endif
-
-unsigned long lasat_flash_partition_start(int partno)
-{
-	unsigned long dst;
-
-	switch (partno) {
-	case LASAT_MTD_BOOTLOADER:
-		dst = lasat_board_info.li_flash_service_base;
-		break;
-	case LASAT_MTD_SERVICE:
-		dst = lasat_board_info.li_flash_service_base + BOOTLOADER_SIZE;
-		break;
-	case LASAT_MTD_NORMAL:
-		dst = lasat_board_info.li_flash_normal_base;
-		break;
-	case LASAT_MTD_FS:
-		dst = lasat_board_info.li_flash_fs_base;
-		break;
-	case LASAT_MTD_CONFIG:
-		dst = lasat_board_info.li_flash_cfg_base;
-		break;
-	default:
-		dst = 0;
-		break;
-	}
 
-	return dst;
+	prom_printf("Lasat specific initialization complete\n");
 }
 
-unsigned long lasat_flash_partition_size(int partno)
-{
-	unsigned long size;
-
-	switch (partno) {
-	case LASAT_MTD_BOOTLOADER:
-		size = BOOTLOADER_SIZE;
-		break;
-	case LASAT_MTD_SERVICE:
-		size = lasat_board_info.li_flash_service_size - BOOTLOADER_SIZE;
-		break;
-	case LASAT_MTD_NORMAL:
-		size = lasat_board_info.li_flash_normal_size;
-		break;
-	case LASAT_MTD_FS:
-		size = lasat_board_info.li_flash_fs_size;
-		break;
-	case LASAT_MTD_CONFIG:
-		size = lasat_board_info.li_flash_cfg_size;
-		break;
-	default:
-		size = 0;
-		break;
-	}
 
-	return size;
-}
Index: arch/mips/lasat/sysctl.c
===================================================================
RCS file: /cvs/linux-mips/arch/mips/lasat/sysctl.c,v
retrieving revision 1.1.1.1
retrieving revision 1.5
diff -u -r1.1.1.1 -r1.5
--- arch/mips/lasat/sysctl.c	8 Oct 2002 18:52:04 -0000	1.1.1.1
+++ arch/mips/lasat/sysctl.c	19 Feb 2003 21:42:14 -0000	1.5
@@ -23,6 +23,7 @@
  *
  * Routines specific to the LASAT boards
  */
+#include <linux/types.h>
 #include <asm/lasat/lasat.h>
 
 #include <linux/config.h>
@@ -39,8 +40,6 @@
 #include "sysctl.h"
 #include "ds1603.h"
 
-static char lasat_firmware_version[176];
-
 static DECLARE_MUTEX(lasat_info_sem);
 
 /* Strategy function to write EEPROM after changing string entry */ 
@@ -96,25 +95,6 @@
 	return 0;
 }
 
-/* Same for vendor ID that's only a char in EEPROM struct */
-int proc_dolasatvendor(ctl_table *table, int write, struct file *filp,
-		       void *buffer, size_t *lenp)
-{
-	int r;
-	down(&lasat_info_sem);
-	r = proc_dointvec(table, write, filp, buffer, lenp);
-	if ( (!write) || r) {
-		up(&lasat_info_sem);
-		return r;
-	}
-	lasat_board_info.li_eeprom_info.vendid = 
-		lasat_board_info.li_vendid & 0xff;
-	lasat_board_info.li_vendid &= 0xff;
-	lasat_write_eeprom_info();
-	up(&lasat_info_sem);
-	return 0;
-}
-
 static int rtctmp;
 
 #ifdef CONFIG_DS1603
@@ -185,6 +165,22 @@
 #endif
 
 #ifdef CONFIG_INET
+static char lasat_bcastaddr[16];
+
+void update_bcastaddr(void)
+{
+	unsigned int ip;
+	
+	ip = lasat_board_info.li_eeprom_info.ipaddr |
+		~lasat_board_info.li_eeprom_info.netmask;
+
+	sprintf(lasat_bcastaddr, "%d.%d.%d.%d",
+			(ip      ) & 0xff,
+			(ip >>  8) & 0xff,
+			(ip >> 16) & 0xff,
+			(ip >> 24) & 0xff);
+}
+
 static char proc_lasat_ipbuf[32];
 /* Parsing of IP address */
 int proc_lasat_ip(ctl_table *table, int write, struct file *filp,
@@ -251,6 +247,7 @@
 		*lenp = len;
 		filp->f_pos += len;
 	}
+	update_bcastaddr();
 	up(&lasat_info_sem);
 	return 0;
 }
@@ -274,8 +271,6 @@
 	{
 		if (name && *name == LASAT_PRID)
 			lasat_board_info.li_eeprom_info.prid = *(int*)newval;
-		if (name && *name == LASAT_DEBUGACCESS)
-			lasat_board_info.li_eeprom_info.debugaccess = *(char*)newval;
 
 		lasat_write_eeprom_info();
 		lasat_init_board_info();
@@ -318,66 +313,29 @@
 	 0444, NULL, &proc_dointvec, &sysctl_intvec},
 	{LASAT_MODEL, "bmid", &lasat_board_info.li_bmid, sizeof(int),
 	 0444, NULL, &proc_dointvec, &sysctl_intvec},
-	{LASAT_SERIAL, "serial", &lasat_board_info.li_serial, sizeof(lasat_board_info.li_serial),
-	 0444, NULL, &proc_dostring, &sysctl_string},
-	{LASAT_PARTNO, "partno", &lasat_board_info.li_partno, sizeof(lasat_board_info.li_partno),
-	 0444, NULL, &proc_dostring, &sysctl_string},
-	{LASAT_EDHAC, "edhac", &lasat_board_info.li_edhac, sizeof(int),
-	 0444, NULL, &proc_dointvec, &sysctl_intvec},
-	{LASAT_EADI, "eadi", &lasat_board_info.li_eadi, sizeof(int),
-	 0444, NULL, &proc_dointvec, &sysctl_intvec},
-	{LASAT_LEASEDLINE, "leasedline", &lasat_board_info.li_leasedline, sizeof(int),
-	 0444, NULL, &proc_dointvec, &sysctl_intvec},
-	{LASAT_ISDN, "isdn", &lasat_board_info.li_isdn, sizeof(int),
-	 0444, NULL, &proc_dointvec, &sysctl_intvec},
-	{LASAT_HIFN, "hifn", &lasat_board_info.li_hifn, sizeof(int),
-	 0444, NULL, &proc_dointvec, &sysctl_intvec},
-	{LASAT_USVER, "us-version", &lasat_board_info.li_usversion, sizeof(int),
-	 0444, NULL, &proc_dointvec, &sysctl_intvec},
 	{LASAT_PRID, "prid", &lasat_board_info.li_prid, sizeof(int),
 	 0644, NULL, &proc_lasat_eeprom_value, &sysctl_lasat_eeprom_value},
-	{LASAT_VENDID, "vendid", &lasat_board_info.li_vendid, sizeof(int),
-	 0644, NULL, &proc_dolasatvendor, &sysctl_intvec},
 #ifdef CONFIG_INET
 	{LASAT_IPADDR, "ipaddr", &lasat_board_info.li_eeprom_info.ipaddr, sizeof(int),
 	 0644, NULL, &proc_lasat_ip, &sysctl_lasat_intvec},
 	{LASAT_NETMASK, "netmask", &lasat_board_info.li_eeprom_info.netmask, sizeof(int),
 	 0644, NULL, &proc_lasat_ip, &sysctl_lasat_intvec},
+	{LASAT_BCAST, "bcastaddr", &lasat_bcastaddr, 
+		sizeof(lasat_bcastaddr), 0600, NULL, 
+		&proc_dostring, &sysctl_string},
 #endif
 	{LASAT_PASSWORD, "passwd_hash", &lasat_board_info.li_eeprom_info.passwd_hash, sizeof(lasat_board_info.li_eeprom_info.passwd_hash),
 	 0600, NULL, &proc_dolasatstring, &sysctl_lasatstring},
-	{LASAT_SERVICEFLAG, "serviceflag", &lasat_board_info.li_eeprom_info.serviceflag, sizeof(lasat_board_info.li_eeprom_info.serviceflag),
-	 0644, NULL, &proc_dolasatint, &sysctl_lasat_intvec},
 	{LASAT_SBOOT, "boot-service", &lasat_boot_to_service, sizeof(int),
-	 0666, NULL, &proc_dointvec, &sysctl_intvec},
+	 0644, NULL, &proc_dointvec, &sysctl_intvec},
 #if CONFIG_DS1603
 	{LASAT_RTC, "rtc", &rtctmp, sizeof(int),
 	 0644, NULL, &proc_dolasatrtc, &sysctl_lasat_rtc},
 #endif
-	{LASAT_VER, "version", &lasat_firmware_version, 176,
-	 0444, NULL, &proc_dostring, &sysctl_string},
-	{LASAT_SERVICEVER, "service-version", (char*)0xbfc00100/* fixed position */, 64,
-	 0444, NULL, &proc_dostring, &sysctl_string},
-#if 0
-	{LASAT_WANLED, "wan_led", &lasat_wan_led, sizeof(int),
-	 0644, NULL, &proc_dointvec, &sysctl_intvec},
-#endif
- 	{LASAT_UPGRADE, "upgrade_eeprom", &lasat_board_info.li_eeprom_upgrade_version, sizeof(int),
-	 0644, NULL, &proc_dointvec, &sysctl_intvec},
- 	{LASAT_VPN_KBPS, "vpn_kbps", &lasat_board_info.li_vpn_kbps, sizeof(int),
-	 0644, NULL, &proc_dointvec, &sysctl_intvec},
- 	{LASAT_TUNNELS, "vpn_tunnels", &lasat_board_info.li_vpn_tunnels, sizeof(int),
-	 0644, NULL, &proc_dointvec, &sysctl_intvec},
- 	{LASAT_CLIENTS, "vpn_clients", &lasat_board_info.li_vpn_clients, sizeof(int),
-	 0644, NULL, &proc_dointvec, &sysctl_intvec},
-	{LASAT_VENDSTR, "vendstr", &lasat_board_info.li_vendstr, sizeof(lasat_board_info.li_vendstr),
-	 0444, NULL, &proc_dostring, &sysctl_string},
 	{LASAT_NAMESTR, "namestr", &lasat_board_info.li_namestr, sizeof(lasat_board_info.li_namestr),
 	 0444, NULL, &proc_dostring, &sysctl_string},
 	{LASAT_TYPESTR, "typestr", &lasat_board_info.li_typestr, sizeof(lasat_board_info.li_typestr),
 	 0444, NULL, &proc_dostring, &sysctl_string},
-	{LASAT_DEBUGACCESS, "debugaccess", &lasat_board_info.li_debugaccess, sizeof(int),
-	 0644, NULL, &proc_lasat_eeprom_value, &sysctl_lasat_eeprom_value},
 	{0}
 };
 
Index: arch/mips/lasat/sysctl.h
===================================================================
RCS file: /cvs/linux-mips/arch/mips/lasat/sysctl.h,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -u -r1.1.1.1 -r1.2
--- arch/mips/lasat/sysctl.h	8 Oct 2002 18:52:04 -0000	1.1.1.1
+++ arch/mips/lasat/sysctl.h	19 Jan 2003 20:05:36 -0000	1.2
@@ -8,36 +8,17 @@
 /* /proc/sys/lasat */
 enum {
 	LASAT_CPU_HZ=1,
-	LASAT_BUS_HZ=2,
-	LASAT_MODEL=3,
-	LASAT_SERIAL=4,
-	LASAT_PARTNO=5,
-	LASAT_EDHAC=6,
-	LASAT_EADI=7,
-	LASAT_LEASEDLINE=8,
-	LASAT_ISDN=9,
-	LASAT_HIFN=10,
-	LASAT_USVER=11,
-	LASAT_PRID=12,
-	LASAT_IPADDR=13,
-	LASAT_NETMASK=14,
-	LASAT_PASSWORD=15,
-	LASAT_SERVICEFLAG=16,
-	LASAT_VENDID=17,
-	LASAT_SBOOT=18,
-	LASAT_RTC=19,
-/*	LASAT_CFG=20,		*/
-	LASAT_VER=21,
-/*	LASAT_WANLED=22,	*/
-	LASAT_UPGRADE=23,
-	LASAT_VPN_KBPS=24,
-	LASAT_TUNNELS=25,
-	LASAT_CLIENTS=26,
-	LASAT_VENDSTR=27,
-	LASAT_NAMESTR=28,
-	LASAT_TYPESTR=29,
-	LASAT_SERVICEVER=30,
-	LASAT_DEBUGACCESS=31,
+	LASAT_BUS_HZ,
+	LASAT_MODEL,
+	LASAT_PRID,
+	LASAT_IPADDR,
+	LASAT_NETMASK,
+	LASAT_BCAST,
+	LASAT_PASSWORD,
+	LASAT_SBOOT,
+	LASAT_RTC,
+	LASAT_NAMESTR,
+	LASAT_TYPESTR,
 };
 
 #endif /* _LASAT_SYSCTL_H */
Index: arch/mips/lasat/image/Makefile
===================================================================
RCS file: /cvs/linux-mips/arch/mips/lasat/image/Makefile,v
retrieving revision 1.1.1.2
retrieving revision 1.6
diff -u -r1.1.1.2 -r1.6
--- arch/mips/lasat/image/Makefile	13 Dec 2002 23:41:18 -0000	1.1.1.2
+++ arch/mips/lasat/image/Makefile	12 Jan 2003 17:49:45 -0000	1.6
@@ -11,7 +11,7 @@
 endif
 
 MKLASATIMG = mklasatimg
-MKLASATIMG_ARCH = mq2,mqpro
+MKLASATIMG_ARCH = mq2,mqpro,sp100,sp200
 ifdef CONFIG_LASAT_SERVICE
 MKLASATIMG_FLAG = -s
 else
Index: drivers/mtd/maps/lasat.c
===================================================================
RCS file: /cvs/linux-mips/drivers/mtd/maps/lasat.c,v
retrieving revision 1.1.1.2
diff -u -r1.1.1.2 lasat.c
--- drivers/mtd/maps/lasat.c	13 Dec 2002 23:39:54 -0000	1.1.1.2
+++ drivers/mtd/maps/lasat.c	10 Feb 2003 19:44:15 -0000
@@ -12,7 +12,6 @@
 #include <linux/mtd/partitions.h>
 #include <linux/config.h>
 #include <asm/lasat/lasat.h>
-#include <asm/lasat/lasat_mtd.h>
 
 static struct mtd_info *mymtd;
 
@@ -73,11 +72,12 @@
 };
 
 static struct mtd_partition partition_info[LASAT_MTD_LAST];
-static char *lasat_mtd_partnames[] = {"Bootloader", "Service", "Normal", "Filesystem", "Config"};
+static char *lasat_mtd_partnames[] = {"Bootloader", "Service", "Normal", "Config", "Filesystem"};
 
 static int __init init_sp(void)
 {
 	int i;
+	int nparts = 0;
 	/* this does not play well with the old flash code which 
 	 * protects and uprotects the flash when necessary */
        	printk(KERN_NOTICE "Unprotecting flash\n");
@@ -100,12 +100,15 @@
 
 		for (i=0; i < LASAT_MTD_LAST; i++) {
 			size = lasat_flash_partition_size(i);
-			partition_info[i].size = size;
-			partition_info[i].offset = offset;
-			offset += size;
+			if (size != 0) {
+				nparts++;
+				partition_info[i].size = size;
+				partition_info[i].offset = offset;
+				offset += size;
+			}
 		}
 
-		add_mtd_partitions( mymtd, partition_info, LASAT_MTD_LAST );
+		add_mtd_partitions( mymtd, partition_info, nparts );
 		return 0;
 	}
 
Index: include/asm-mips/lasat/lasat.h
===================================================================
RCS file: /cvs/linux-mips/include/asm-mips/lasat/lasat.h,v
retrieving revision 1.1.1.2
retrieving revision 1.8
diff -u -r1.1.1.2 -r1.8
--- include/asm-mips/lasat/lasat.h	13 Dec 2002 23:38:24 -0000	1.1.1.2
+++ include/asm-mips/lasat/lasat.h	11 Feb 2003 18:26:02 -0000	1.8
@@ -27,16 +27,7 @@
 #ifndef _LASAT_H
 #define _LASAT_H
 
-#include <linux/config.h>
-
-/*
- * Configuration block magic word(s)
- */
-#define LASAT_CONFIG_MAGIC     ('L'|('C'<<8)|('B'<<16)|('2'<<24)) /* LCB2 */
-#define LASAT_CONFIG_MAGIC_INT ('L'|('C'<<8)|('B'<<16)|('x'<<24)) /* LCBx */
-
 #ifndef _LANGUAGE_ASSEMBLY
-#include <linux/types.h>
 
 extern struct lasat_misc {
 	volatile u32 *reset_reg;
@@ -44,6 +35,15 @@
 	u32 flash_wp_bit;
 } *lasat_misc;
 
+enum lasat_mtdparts {
+	LASAT_MTD_BOOTLOADER,
+	LASAT_MTD_SERVICE,
+	LASAT_MTD_NORMAL,
+	LASAT_MTD_CONFIG,
+	LASAT_MTD_FS,
+	LASAT_MTD_LAST
+};
+
 /*
  * The format of the data record in the EEPROM.
  * See Documentation/LASAT/eeprom.txt for a detailed description
@@ -182,42 +182,17 @@
 struct lasat_info {
 	unsigned int  li_cpu_hz;
 	unsigned int  li_bus_hz;
-	unsigned int  li_flags;
 	unsigned int  li_bmid;
 	unsigned int  li_memsize;
 	unsigned int  li_flash_size;
-	unsigned int  li_edhac;
-	unsigned int  li_eadi;
-	unsigned int  li_hifn;
-	unsigned int  li_isdn;
-	unsigned int  li_ide;
-	unsigned int  li_hdlc;
-	unsigned int  li_leasedline;
-	unsigned int  li_usversion;
-	unsigned int  li_hw_flags;
-	unsigned int  li_vendid;
 	unsigned int  li_prid;
 	unsigned char li_bmstr[16];
-	unsigned char li_vendstr[32];
 	unsigned char li_namestr[32];
 	unsigned char li_typestr[16];
-	unsigned char li_partno[13];
-	unsigned char li_serial[15];
-	unsigned int  li_vpn_kbps;	/* kbit/s */
-	unsigned int  li_vpn_tunnels;
-	unsigned int  li_vpn_clients;
 	/* Info on the Flash layout */
 	unsigned int  li_flash_base;
-	unsigned int  li_flash_service_base;
-	unsigned int  li_flash_service_size;
-	unsigned int  li_flash_normal_base;
-	unsigned int  li_flash_normal_size;
-	unsigned int  li_flash_cfg_base;
-	unsigned int  li_flash_cfg_size;
-	unsigned int  li_flash_fs_base;
-	unsigned int  li_flash_fs_size;
-	unsigned int  li_flash_fs2_base;
-	unsigned int  li_flash_fs2_size;
+	unsigned long li_flashpart_base[LASAT_MTD_LAST];
+	unsigned long li_flashpart_size[LASAT_MTD_LAST];
 	struct lasat_eeprom_struct li_eeprom_info;
 	unsigned int  li_eeprom_upgrade_version;
 	unsigned int  li_debugaccess;
@@ -225,6 +200,22 @@
 
 extern struct lasat_info lasat_board_info;
 
+static inline unsigned long lasat_flash_partition_start(int partno)
+{
+	if (partno < 0 || partno >= LASAT_MTD_LAST)
+		return 0;
+
+	return lasat_board_info.li_flashpart_base[partno];
+}
+
+static inline unsigned long lasat_flash_partition_size(int partno)
+{
+	if (partno < 0 || partno >= LASAT_MTD_LAST)
+		return 0;
+
+	return lasat_board_info.li_flashpart_size[partno];
+}
+
 /* Called from setup() to initialize the global board_info struct */
 extern int lasat_init_board_info(void);
 
@@ -241,7 +232,12 @@
 		__delay(lasat_board_info.li_cpu_hz / 2 / (NANOTH / ns) + 1);
 }
 
+extern void (* prom_printf)(const char *fmt, ...);
+
 #endif /* !defined (_LANGUAGE_ASSEMBLY) */
+
+#define LASAT_SERVICEMODE_MAGIC_1     0xdeadbeef
+#define LASAT_SERVICEMODE_MAGIC_2     0xfedeabba
 
 /* Lasat 100 boards */
 #define LASAT_GT_BASE           (KSEG1ADDR(0x14000000))
Index: include/asm-mips/lasat/lasat_mtd.h
===================================================================
RCS file: include/asm-mips/lasat/lasat_mtd.h
diff -N include/asm-mips/lasat/lasat_mtd.h
--- include/asm-mips/lasat/lasat_mtd.h	8 Oct 2002 18:48:35 -0000	1.1.1.1
+++ /dev/null	1 Jan 1970 00:00:00 -0000
@@ -1,15 +0,0 @@
-#include <linux/types.h>
-
-enum lasat_mtdparts {
-	LASAT_MTD_BOOTLOADER,
-	LASAT_MTD_SERVICE,
-	LASAT_MTD_NORMAL,
-	LASAT_MTD_FS,
-	LASAT_MTD_CONFIG,
-	LASAT_MTD_LAST
-}; 
-
-#define BOOTLOADER_SIZE 0x40000
-
-extern unsigned long lasat_flash_partition_start(int partno);
-extern unsigned long lasat_flash_partition_size(int partno);

From clausen@pureza.melbourne.sgi.com Thu Feb 20 00:27:13 2003
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Date: Thu, 20 Feb 2003 11:26:55 +1100
From: Andrew Clausen <clausen@melbourne.sgi.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: ralf@linux-mips.org, linux-ia64@linuxia64.org
Subject: [patch] sys32_sysinfo broken on mips64 and ia64
Message-ID: <20030220002655.GE915@pureza.melbourne.sgi.com>
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Hi all,

The sys32_sysinfo() calls are currently using an old version of
"struct sysinfo32", in both the mips64 and ia64 ports.

busybox's init can't cope with the bogus output on my Origin 200,
so this bug prevents the Debian installer from bootstrapping.

This is the mips64 version of the patch.  A very similar patch
could be constructed for ia64... it's very obvious what to do,
so I'll leave it to you ia64 people :)

Cheers,
Andrew


diff -u -r1.42.2.23 linux32.c
--- arch/mips64/kernel/linux32.c	23 Jan 2003 02:12:59 -0000	1.42.2.23
+++ arch/mips64/kernel/linux32.c	20 Feb 2003 00:05:41 -0000
@@ -672,8 +672,11 @@
         u32 bufferram;
         u32 totalswap;
         u32 freeswap;
-        unsigned short procs;
-        char _f[22];
+        u16 procs;
+	u32 totalhigh;
+	u32 freehigh;
+	u32 mem_unit;
+	char _f[8];
 };
 
 extern asmlinkage int sys_sysinfo(struct sysinfo *info);
@@ -698,6 +701,9 @@
 	err |= __put_user (s.totalswap, &info->totalswap);
 	err |= __put_user (s.freeswap, &info->freeswap);
 	err |= __put_user (s.procs, &info->procs);
+	err |= __put_user (s.totalhigh, &info->totalhigh);
+	err |= __put_user (s.freehigh, &info->freehigh);
+	err |= __put_user (s.mem_unit, &info->mem_unit);
 	if (err)
 		return -EFAULT;
 	return ret;



From clausen@pureza.melbourne.sgi.com Thu Feb 20 00:38:50 2003
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Date: Thu, 20 Feb 2003 11:38:39 +1100
From: Andrew Clausen <clausen@melbourne.sgi.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: ralf@linux-mips.org
Subject: [patch] bogus ramdisk sanity check on ip27
Message-ID: <20030220003839.GF915@pureza.melbourne.sgi.com>
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Hi all,

There is currently a check that the ramdisk image resides at a sane
memory address, below "max_pfn".  However, max_pfn isn't initialized
(and apparently isn't relevant) for ip27.  The only assignments to
max_pfn lie inside #ifndef CONFIG_SGI_IP27.

Therefore, this test is bogus, so here's a patch to
#ifndef CONFIG_SGI_IP27 it.

This patch applies cleanly on 2.4.x and 2.5.x (at a different offset).

Cheers,
Andrew

diff -u -r1.31.2.25 setup.c
--- arch/mips64/kernel/setup.c	22 Jan 2003 05:11:38 -0000	1.31.2.25
+++ arch/mips64/kernel/setup.c	20 Feb 2003 00:05:41 -0000
@@ -358,6 +358,8 @@
 		printk("Initial ramdisk at: 0x%p (%lu bytes)\n",
 		       (void *)initrd_start,
 		       initrd_size);
+/* FIXME: is this right? */
+#ifndef CONFIG_SGI_IP27
 		if (CPHYSADDR(initrd_end) > PFN_PHYS(max_pfn)) {
 			printk("initrd extends beyond end of memory "
 			       "(0x%p > 0x%p)\ndisabling initrd\n",
@@ -365,6 +367,7 @@
 			       (void *)PFN_PHYS(max_pfn));
 			initrd_start = 0;
 		}
+#endif /* !CONFIG_SGI_IP27 */
 	}
 #endif
 }



From krishnakumar@naturesoft.net Thu Feb 20 06:07:54 2003
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From: "Krishnakumar. R" <krishnakumar@naturesoft.net>
Reply-To: krishnakumar@naturesoft.net
To: linux-mips@linux-mips.org
Subject: Ramdisk image on flash.
Date: Thu, 20 Feb 2003 11:35:09 +0530
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Hi,

Is there any way that I can keep 
a ramdisk image (containing the root filesystem)
in a flash device and boot to it.


The ramdisk should be separate from the
kernel image.


Thanks in advance
Regards
KK


From mike.connors@ghs.com Thu Feb 20 16:10:44 2003
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From: "Mike Connors" <mike.connors@ghs.com>
To: <linux-mips@linux-mips.org>
Subject: Where is libgcc_s.so.1? 
Date: Thu, 20 Feb 2003 20:05:37 -0800
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Hi All, 

I'm trying to find the rpm that contains libgcc_s.so.1.  
It wasn't installed with the RedHat 7.3 install from 
ftp.mips.com and I'm having trouble finding it at H.J.'s 
repository. 

Any help would be appreciated. 

Thanks in advance, 
Mike 

--- 
Mike Connors			Green Hills Software, San Clemente 
Field Applications Engineer	131 Avenida Victoria 
mailto:mikec@ghs.com		San Clemente, CA  92672 
phone: 1-949-369-3950		
cell:  1-949-412-3951		fax: 1-949-369-3959 

Articles about Integrity:  

EETimes: Proper RTOS designs can improve device security 
	http://www.eetimes.com/story/OEG20020419S0082 
ESC: RTOS Requirements for Use in Safety Critical Systems  
 http://www.infoxpress.com/reviewtracker/reprints.asp?page_id=1045 

Green Hills in the News: 

FAA Certifies INTEGRITYR RTOS for DO-178B, Level A 
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INTEGRITYR RTOS selected by Boeing's C-17 Globemaster III 
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Radstone Supports INTEGRITYR RTOS on COTS hardware 
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Ryan International Selects INTEGRITYR as Avionics Platform 
	http://www.ghs.com/news/220930r.html 
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INTEGRITYR RTOS Used For B-1 Bomber Flight Simulator: 
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Green Hills Software Becomes #2 RTOS Company 
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INTEGRITYR RTOS 4.0 Release Announced 
	http://www.ghs.com/news/220313i.html 

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From macro@ds2.pg.gda.pl Thu Feb 20 17:30:42 2003
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Date: Thu, 20 Feb 2003 18:31:02 +0100 (MET)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
Subject: [patch] Cobalt IRQ handler CP0 interlock?
Message-ID: <Pine.GSO.3.96.1030220182355.25777G-100000@delta.ds2.pg.gda.pl>
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Hello,

 Does Cobalt have a processor that implements its pipeline differently or
interlocks on CP0 loads?  If not, I'll apply the following fix. 

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

patch-mips-2.4.20-20030214-cobalt-int-0
diff -up --recursive --new-file linux-mips-2.4.20-20030214.macro/arch/mips/cobalt/int-handler.S linux-mips-2.4.20-20030214/arch/mips/cobalt/int-handler.S
--- linux-mips-2.4.20-20030214.macro/arch/mips/cobalt/int-handler.S	2003-01-28 03:56:27.000000000 +0000
+++ linux-mips-2.4.20-20030214/arch/mips/cobalt/int-handler.S	2003-02-15 10:28:15.000000000 +0000
@@ -31,6 +31,7 @@
 		 */
 		mfc0	s0,CP0_CAUSE	# get raw irq status
 		mfc0	a0,CP0_STATUS	# get irq mask
+		nop
 		and	s0,s0,a0	# compute masked irq status
 
 		andi	a0,s0,CAUSEF_IP2	/* Check for Galileo timer */


From macro@ds2.pg.gda.pl Thu Feb 20 17:41:40 2003
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From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
Subject: [patch] Coalesce duplicated SiByte settings
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Hello,

 There is quite a lot identical entries for SiByte board variations in the
top-level architecture Makefiles.  They look confusing and I don't think
they are necessary.  Following is a proposal to remove duplicated entries. 
OK? 

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

patch-mips-2.4.20-20030214-sibyte_board-0
diff -up --recursive --new-file linux-mips-2.4.20-20030214.macro/arch/mips/Makefile linux-mips-2.4.20-20030214/arch/mips/Makefile
--- linux-mips-2.4.20-20030214.macro/arch/mips/Makefile	2003-02-08 03:56:22.000000000 +0000
+++ linux-mips-2.4.20-20030214/arch/mips/Makefile	2003-02-15 10:51:13.000000000 +0000
@@ -464,9 +464,9 @@ LOADADDR	:= 0x88002000
 endif
 
 #
-# Sibyte SB1250 SOC
+# Sibyte SB1250 SOC and Broadcom (SiByte) BCM112x SOCs
 #
-ifdef CONFIG_SIBYTE_SB1250
+ifneq ($(CONFIG_SIBYTE_SB1250)$(CONFIG_SIBYTE_BCM112X),)
 # This is a LIB so that it links at the end, and initcalls are later
 # the sequence; but it is built as an object so that modules don't get
 # removed (as happens, even if they have __initcall/module_init)
@@ -476,67 +476,21 @@ LOADADDR	:= 0x80100000
 endif
 
 #
-# Sibyte SWARM board
+# Sibyte boards:
 #
-ifdef CONFIG_SIBYTE_SWARM
-LIBS		+= arch/mips/sibyte/swarm/sbswarm.a
-SUBDIRS		+= arch/mips/sibyte/swarm
-endif
-ifdef CONFIG_SIBYTE_SENTOSA
+# BCM91250A (SWARM),
+# BCM91250E (Sentosa),
+# BCM91120C (CRhine),
+# BCM91120x (Carmel),
+# BCM91125C (CRhone),
+# BCM91125E (Rhone).
+#
+ifdef CONFIG_SIBYTE_BOARD
 LIBS		+= arch/mips/sibyte/swarm/sbswarm.a
 SUBDIRS		+= arch/mips/sibyte/swarm
 endif
 
 #
-# Broadcom (SiByte) BCM112x SOCs
-# (In fact, this just uses the exact same support as the BCM1250.)
-#
-ifdef CONFIG_SIBYTE_BCM112X
-# This is a LIB so that it links at the end, and initcalls are later
-# the sequence; but it is built as an object so that modules don't get
-# removed (as happens, even if they have __initcall/module_init)
-LIBS		+= arch/mips/sibyte/sb1250/sb1250.o
-SUBDIRS		+= arch/mips/sibyte/sb1250
-LOADADDR	:= 0x80100000
-endif
-
-#
-# Sibyte BCM91120C (CRhine) board
-# (In fact, this just uses the exact same support as the BCM912500A (SWARM).)
-#
-ifdef CONFIG_SIBYTE_CRHINE
-LIBS          += arch/mips/sibyte/swarm/sbswarm.a
-SUBDIRS       += arch/mips/sibyte/swarm
-endif
-
-#
-# Sibyte BCM91120x (Carmel) board
-# (In fact, this just uses the exact same support as the BCM912500A (SWARM).)
-#
-ifdef CONFIG_SIBYTE_CARMEL
-LIBS          += arch/mips/sibyte/swarm/sbswarm.a
-SUBDIRS       += arch/mips/sibyte/swarm
-endif
-
-#
-# Sibyte BCM91125C (CRhone) board
-# (In fact, this just uses the exact same support as the BCM912500A (SWARM).)
-#
-ifdef CONFIG_SIBYTE_CRHONE
-LIBS          += arch/mips/sibyte/swarm/sbswarm.a
-SUBDIRS       += arch/mips/sibyte/swarm
-endif
-
-#
-# Sibyte BCM91125E (Rhone) board
-# (In fact, this just uses the exact same support as the BCM912500A (SWARM).)
-#
-ifdef CONFIG_SIBYTE_RHONE
-LIBS          += arch/mips/sibyte/swarm/sbswarm.a
-SUBDIRS       += arch/mips/sibyte/swarm
-endif
-
-#
 # Sibyte CFE firmware
 #
 ifdef CONFIG_SIBYTE_CFE
diff -up --recursive --new-file linux-mips-2.4.20-20030214.macro/arch/mips64/Makefile linux-mips-2.4.20-20030214/arch/mips64/Makefile
--- linux-mips-2.4.20-20030214.macro/arch/mips64/Makefile	2003-02-08 03:56:27.000000000 +0000
+++ linux-mips-2.4.20-20030214/arch/mips64/Makefile	2003-02-15 10:50:41.000000000 +0000
@@ -192,9 +192,9 @@ LOADADDR	:= 0x80002000
 endif
 
 #
-# Sibyte SB1250 SOC
+# Sibyte SB1250 SOC and Broadcom (SiByte) BCM112x SOCs
 #
-ifdef CONFIG_SIBYTE_SB1250
+ifneq ($(CONFIG_SIBYTE_SB1250)$(CONFIG_SIBYTE_BCM112X),)
 # This is a LIB so that it links at the end, and initcalls are later
 # the sequence; but it is built as an object so that modules don't get
 # removed (as happens, even if they have __initcall/module_init)
@@ -208,71 +208,21 @@ endif
 endif
 
 #
-# Sibyte SWARM board
+# Sibyte boards:
 #
-ifdef CONFIG_SIBYTE_SWARM
-LIBS		+= arch/mips/sibyte/swarm/sbswarm.a
-SUBDIRS		+= arch/mips/sibyte/swarm
-endif
-ifdef CONFIG_SIBYTE_SENTOSA
+# BCM91250A (SWARM),
+# BCM91250E (Sentosa),
+# BCM91120C (CRhine),
+# BCM91120x (Carmel),
+# BCM91125C (CRhone),
+# BCM91125E (Rhone).
+#
+ifdef CONFIG_SIBYTE_BOARD
 LIBS		+= arch/mips/sibyte/swarm/sbswarm.a
 SUBDIRS		+= arch/mips/sibyte/swarm
 endif
 
 #
-# Broadcom (SiByte) BCM112x SOCs
-# (In fact, this just uses the exact same support as the BCM1250.)
-#
-ifdef CONFIG_SIBYTE_BCM112X
-# This is a LIB so that it links at the end, and initcalls are later
-# the sequence; but it is built as an object so that modules don't get
-# removed (as happens, even if they have __initcall/module_init)
-LIBS		+= arch/mips/sibyte/sb1250/sb1250.o
-SUBDIRS		+= arch/mips/sibyte/sb1250
-ifdef CONFIG_MIPS_UNCACHED
-LOADADDR	:= 0xa0100000
-else
-LOADADDR	:= 0x80100000
-endif
-endif
-
-#
-# Sibyte BCM91120C (CRhine) board
-# (In fact, this just uses the exact same support as the BCM912500A (SWARM).)
-#
-ifdef CONFIG_SIBYTE_CRHINE
-LIBS          += arch/mips/sibyte/swarm/sbswarm.a
-SUBDIRS       += arch/mips/sibyte/swarm
-endif
-
-#
-# Sibyte BCM91120x (Carmel) board
-# (In fact, this just uses the exact same support as the BCM912500A (SWARM).)
-#
-ifdef CONFIG_SIBYTE_CARMEL
-LIBS          += arch/mips/sibyte/swarm/sbswarm.a
-SUBDIRS       += arch/mips/sibyte/swarm
-endif
-
-#
-# Sibyte BCM91125C (CRhone) board
-# (In fact, this just uses the exact same support as the BCM912500A (SWARM).)
-#
-ifdef CONFIG_SIBYTE_CRHONE
-LIBS          += arch/mips/sibyte/swarm/sbswarm.a
-SUBDIRS       += arch/mips/sibyte/swarm
-endif
-
-#
-# Sibyte BCM91125E (Rhone) board
-# (In fact, this just uses the exact same support as the BCM912500A (SWARM).)
-#
-ifdef CONFIG_SIBYTE_RHONE
-LIBS          += arch/mips/sibyte/swarm/sbswarm.a
-SUBDIRS       += arch/mips/sibyte/swarm
-endif
-
-#
 # Sibyte CFE firmware
 #
 ifdef CONFIG_SIBYTE_CFE


From kwalker@broadcom.com Thu Feb 20 17:48:37 2003
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From: "Kip Walker" <kwalker@broadcom.com>
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cc: linux-mips@linux-mips.org, "Ralf Baechle" <ralf@linux-mips.org>
Subject: Re: [patch] Coalesce duplicated SiByte settings
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"Maciej W. Rozycki" wrote:
> 
> Hello,
> 
>  There is quite a lot identical entries for SiByte board variations in the
> top-level architecture Makefiles.  They look confusing and I don't think
> they are necessary.  Following is a proposal to remove duplicated entries.
> OK?

Mmm, cool.  No objection here.  I think they'll continue to share the
subdirectories/code that they do now.

Kip


From ppopov@mvista.com Thu Feb 20 18:24:28 2003
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Subject: Re: Ramdisk image on flash.
From: Pete Popov <ppopov@mvista.com>
To: krishnakumar@naturesoft.net
Cc: linux-mips@linux-mips.org, Ralf Baechle <ralf@linux-mips.org>
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On Wed, 2003-02-19 at 22:05, Krishnakumar. R wrote:
> Hi,
> 
> Is there any way that I can keep 
> a ramdisk image (containing the root filesystem)
> in a flash device and boot to it.

Yes, and other architectures have support for passing arguments to the
kernel that tell it where the ramdisk is. I don't know that we've done
that for MIPS, yet.  It wouldn't be too hard to do and maybe someone on
this list is already working on it (I think someone actually is working
on it and was preparing a patch for Ralf).

> The ramdisk should be separate from the kernel image.

Pete




From ralf@linux-mips.org Thu Feb 20 18:31:24 2003
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From: Ralf Baechle <ralf@linux-mips.org>
To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Cc: linux-mips@linux-mips.org
Subject: Re: [patch] Coalesce duplicated SiByte settings
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On Thu, Feb 20, 2003 at 06:41:52PM +0100, Maciej W. Rozycki wrote:

>  There is quite a lot identical entries for SiByte board variations in the
> top-level architecture Makefiles.  They look confusing and I don't think
> they are necessary.  Following is a proposal to remove duplicated entries. 
> OK? 

Yep, I like this.

  Ralf

From ralf@linux-mips.org Thu Feb 20 18:53:24 2003
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From: Ralf Baechle <ralf@linux-mips.org>
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Subject: Re: [patch] Cobalt IRQ handler CP0 interlock?
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On Thu, Feb 20, 2003 at 06:31:02PM +0100, Maciej W. Rozycki wrote:

>  Does Cobalt have a processor that implements its pipeline differently or
> interlocks on CP0 loads?  If not, I'll apply the following fix. 

Mfc0 doesn't need a nops on any R4000 class CPU I know of.

  Ralf

From tpolgar@freehandsystems.com Thu Feb 20 19:30:29 2003
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Pete Popov wrote:
> 
> On Wed, 2003-02-19 at 22:05, Krishnakumar. R wrote:
> > Hi,
> >
> > Is there any way that I can keep
> > a ramdisk image (containing the root filesystem)
> > in a flash device and boot to it.
> 
> Yes, and other architectures have support for passing arguments to the
> kernel that tell it where the ramdisk is. I don't know that we've done
> that for MIPS, yet.  It wouldn't be too hard to do and maybe someone on
> this list is already working on it (I think someone actually is working
> on it and was preparing a patch for Ralf).

For having separate initrd and kernel load we also need an aware bootloader
that knows where to find the ramdisk.   RedBoot, from what i read, seems to be
i386 specific.    The Yamon i've patched "COULD" be made to do it.   

> 
> > The ramdisk should be separate from the kernel image.

How is this currently done in non-mips archs?   I know lilo and Druid can do
this with a configuration file and hard sector addressing into a filesystem,
but i never understood how they avoid/get around file fragmentation issues.

Tibor

From jsun@orion.mvista.com Thu Feb 20 19:34:07 2003
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Date: Thu, 20 Feb 2003 11:34:04 -0800
From: Jun Sun <jsun@mvista.com>
To: linux-mips@linux-mips.org
Cc: jsun@mvista.com
Subject: [PATCH] rename CONFIG_REMOTE_DEBUG and CONFIG_DEBUG
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This patch make the following changes

	1) CONFIG_REMOTE_DEBUG -> CONFIG_KGDB
	2) CONFIG_DEBUG -> CONFIG_RUNTIME_DEBUG

MIPS is pretty much the only one (other than the pitiful s390 :0)
using REMOTE_DEBUG instead of KGDB.  So it is a good thing to change
it.

As Keith pointed out, CONFIG_DEBUG is too general (which has
already caused confusion, BTW).  RUNTIME_DEBUG is more appropriate.

Jun

--wTWi5aaYRw9ix9vO
Content-Type: text/plain; charset=us-ascii
Content-Disposition: attachment; filename="030220.a-2.4-rename-CONFIG.patch"

diff -Nru linux/Documentation/Configure.help.orig linux/Documentation/Configure.help
--- linux/Documentation/Configure.help.orig	Thu Feb 20 10:22:47 2003
+++ linux/Documentation/Configure.help	Thu Feb 20 11:21:25 2003
@@ -20483,10 +20483,10 @@
   Don't turn this on unless you know what you are doing.
 
 Enable run-time debugging
-CONFIG_DEBUG
+CONFIG_RUNTIME_DEBUG
   If you say Y here, some debugging macros will do run-time checking.
-  If you say N here, those macros will mostly turn to no-ops.  For
-  MIPS boards only.  See include/asm-mips/debug.h for debuging macros.
+  If you say N here, those macros will mostly turn to no-ops.  Currently
+  supported by MIPS arch.  See include/asm-mips/debug.h for debuging macros.
   If unsure, say N.
 
 Remote GDB kernel debugging
diff -Nru linux/arch/mips/au1000/common/Makefile.orig linux/arch/mips/au1000/common/Makefile
--- linux/arch/mips/au1000/common/Makefile.orig	Thu Dec 12 10:35:07 2002
+++ linux/arch/mips/au1000/common/Makefile	Thu Feb 20 10:49:19 2003
@@ -23,7 +23,7 @@
 
 obj-$(CONFIG_AU1X00_UART) += serial.o
 obj-$(CONFIG_AU1000_USB_DEVICE) += usbdev.o
-obj-$(CONFIG_REMOTE_DEBUG) += dbg_io.o
+obj-$(CONFIG_KGDB) += dbg_io.o
 obj-$(CONFIG_RTC) += rtc.o
 
 include $(TOPDIR)/Rules.make
diff -Nru linux/arch/mips/au1000/common/dbg_io.c.orig linux/arch/mips/au1000/common/dbg_io.c
--- linux/arch/mips/au1000/common/dbg_io.c.orig	Wed Jan 29 15:33:01 2003
+++ linux/arch/mips/au1000/common/dbg_io.c	Thu Feb 20 10:49:19 2003
@@ -3,7 +3,7 @@
 #include <asm/io.h>
 #include <asm/au1000.h>
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 
 /*
  * FIXME the user should be able to select the
diff -Nru linux/arch/mips/au1000/common/irq.c.orig linux/arch/mips/au1000/common/irq.c
--- linux/arch/mips/au1000/common/irq.c.orig	Thu Dec 12 10:35:07 2002
+++ linux/arch/mips/au1000/common/irq.c	Thu Feb 20 10:49:19 2003
@@ -77,7 +77,7 @@
 #define EXT_INTC1_REQ1 5 /* IP 5 */
 #define MIPS_TIMER_IP  7 /* IP 7 */
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 extern void breakpoint(void);
 #endif
 
@@ -507,7 +507,7 @@
 	}
 
 	set_c0_status(ALLINTS);
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	/* If local serial I/O used for debug port, enter kgdb at once */
 	puts("Waiting for kgdb to connect...");
 	set_debug_traps();
diff -Nru linux/arch/mips/au1000/common/serial.c.orig linux/arch/mips/au1000/common/serial.c
--- linux/arch/mips/au1000/common/serial.c.orig	Thu Dec 12 10:35:07 2002
+++ linux/arch/mips/au1000/common/serial.c	Thu Feb 20 10:49:19 2003
@@ -987,7 +987,7 @@
 		set_bit(TTY_IO_ERROR, &info->tty->flags);
 
 	info->flags &= ~ASYNC_INITIALIZED;
-#ifndef CONFIG_REMOTE_DEBUG
+#ifndef CONFIG_KGDB
 	au_writel(0, UART_MOD_CNTRL + state->port);
 	au_sync_delay(10);
 #endif
diff -Nru linux/arch/mips/baget/vacserial.c.orig linux/arch/mips/baget/vacserial.c
--- linux/arch/mips/baget/vacserial.c.orig	Thu Nov  7 14:05:32 2002
+++ linux/arch/mips/baget/vacserial.c	Thu Feb 20 10:49:19 2003
@@ -2790,7 +2790,7 @@
 }
 #endif
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 #undef PRINT_DEBUG_PORT_INFO
 
 /*
@@ -2902,4 +2902,4 @@
 	return(serial_inp(info, VAC_UART_RX));
 }
 
-#endif /* CONFIG_REMOTE_DEBUG */
+#endif /* CONFIG_KGDB */
diff -Nru linux/arch/mips/ddb5074/irq.c.orig linux/arch/mips/ddb5074/irq.c
--- linux/arch/mips/ddb5074/irq.c.orig	Mon Aug  5 16:53:31 2002
+++ linux/arch/mips/ddb5074/irq.c	Thu Feb 20 10:49:19 2003
@@ -210,7 +210,7 @@
 
 void __init ddb_irq_setup(void)
 {
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	if (remote_debug)
 		set_debug_traps();
 	breakpoint();		/* you may move this line to whereever you want :-) */
diff -Nru linux/arch/mips/ddb5074/setup.c.orig linux/arch/mips/ddb5074/setup.c
--- linux/arch/mips/ddb5074/setup.c.orig	Mon Dec  2 16:55:37 2002
+++ linux/arch/mips/ddb5074/setup.c	Thu Feb 20 10:49:19 2003
@@ -28,7 +28,7 @@
 #include <asm/traps.h>
 
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 extern void rs_kgdb_hook(int);
 extern void breakpoint(void);
 #endif
diff -Nru linux/arch/mips/ddb5xxx/common/irq.c.orig linux/arch/mips/ddb5xxx/common/irq.c
--- linux/arch/mips/ddb5xxx/common/irq.c.orig	Sun Jul 14 17:02:55 2002
+++ linux/arch/mips/ddb5xxx/common/irq.c	Thu Feb 20 10:49:19 2003
@@ -19,7 +19,7 @@
 
 void __init init_IRQ(void)
 {
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	extern void breakpoint(void);
 	extern void set_debug_traps(void);
 
diff -Nru linux/arch/mips/ddb5xxx/ddb5074/irq.c.orig linux/arch/mips/ddb5xxx/ddb5074/irq.c
--- linux/arch/mips/ddb5xxx/ddb5074/irq.c.orig	Mon Aug  5 16:53:31 2002
+++ linux/arch/mips/ddb5xxx/ddb5074/irq.c	Thu Feb 20 10:49:19 2003
@@ -142,7 +142,7 @@
 
 void __init ddb_irq_setup(void)
 {
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	if (remote_debug)
 		set_debug_traps();
 	breakpoint();		/* you may move this line to whereever you want :-) */
diff -Nru linux/arch/mips/ddb5xxx/ddb5074/setup.c.orig linux/arch/mips/ddb5xxx/ddb5074/setup.c
--- linux/arch/mips/ddb5xxx/ddb5074/setup.c.orig	Mon Dec  2 16:55:40 2002
+++ linux/arch/mips/ddb5xxx/ddb5074/setup.c	Thu Feb 20 10:49:20 2003
@@ -31,7 +31,7 @@
 #include <asm/ddb5xxx/ddb5xxx.h>
 
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 extern void rs_kgdb_hook(int);
 extern void breakpoint(void);
 #endif
diff -Nru linux/arch/mips/ddb5xxx/ddb5074/pci_ops.c.orig linux/arch/mips/ddb5xxx/ddb5074/pci_ops.c
--- linux/arch/mips/ddb5xxx/ddb5074/pci_ops.c.orig	Mon Aug  5 16:53:31 2002
+++ linux/arch/mips/ddb5xxx/ddb5074/pci_ops.c	Thu Feb 20 11:18:54 2003
@@ -281,7 +281,7 @@
 };
 
 
-#if defined(CONFIG_DEBUG)
+#if defined(CONFIG_RUNTIME_DEBUG)
 void jsun_scan_pci_bus(void)
 {
 	struct pci_bus bus;
diff -Nru linux/arch/mips/ddb5xxx/ddb5476/Makefile.orig linux/arch/mips/ddb5xxx/ddb5476/Makefile
--- linux/arch/mips/ddb5xxx/ddb5476/Makefile.orig	Tue Jun 25 08:46:59 2002
+++ linux/arch/mips/ddb5xxx/ddb5476/Makefile	Thu Feb 20 10:49:20 2003
@@ -15,6 +15,6 @@
 
 obj-y				+= setup.o irq.o int-handler.o pci.o pci_ops.o \
 				   nile4_pic.o vrc5476_irq.o
-obj-$(CONFIG_REMOTE_DEBUG)	+= dbg_io.o
+obj-$(CONFIG_KGDB)	+= dbg_io.o
 
 include $(TOPDIR)/Rules.make
diff -Nru linux/arch/mips/ddb5xxx/ddb5476/setup.c.orig linux/arch/mips/ddb5xxx/ddb5476/setup.c
--- linux/arch/mips/ddb5xxx/ddb5476/setup.c.orig	Mon Dec  2 16:55:40 2002
+++ linux/arch/mips/ddb5xxx/ddb5476/setup.c	Thu Feb 20 10:49:20 2003
@@ -41,7 +41,7 @@
 #define TIMER_IRQ			(VRC5476_IRQ_BASE + VRC5476_IRQ_GPT)
 #endif
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 extern void breakpoint(void);
 #endif
 
diff -Nru linux/arch/mips/ddb5xxx/ddb5476/pci.c.orig linux/arch/mips/ddb5xxx/ddb5476/pci.c
--- linux/arch/mips/ddb5xxx/ddb5476/pci.c.orig	Mon Aug  5 16:53:31 2002
+++ linux/arch/mips/ddb5xxx/ddb5476/pci.c	Thu Feb 20 11:18:54 2003
@@ -100,7 +100,7 @@
 	}
 }
 
-#if defined(CONFIG_DEBUG)
+#if defined(CONFIG_RUNTIME_DEBUG)
 extern void jsun_scan_pci_bus(void);
 #endif
 
diff -Nru linux/arch/mips/ddb5xxx/ddb5476/pci_ops.c.orig linux/arch/mips/ddb5xxx/ddb5476/pci_ops.c
--- linux/arch/mips/ddb5xxx/ddb5476/pci_ops.c.orig	Mon Aug  5 16:53:31 2002
+++ linux/arch/mips/ddb5xxx/ddb5476/pci_ops.c	Thu Feb 20 11:18:54 2003
@@ -296,7 +296,7 @@
 };
 
 
-#if defined(CONFIG_DEBUG)
+#if defined(CONFIG_RUNTIME_DEBUG)
 void jsun_scan_pci_bus(void)
 {
 	struct pci_bus bus;
diff -Nru linux/arch/mips/ddb5xxx/ddb5477/Makefile.orig linux/arch/mips/ddb5xxx/ddb5477/Makefile
--- linux/arch/mips/ddb5xxx/ddb5477/Makefile.orig	Tue Jun 25 08:46:59 2002
+++ linux/arch/mips/ddb5xxx/ddb5477/Makefile	Thu Feb 20 11:18:54 2003
@@ -12,7 +12,7 @@
 
 obj-y	 += int-handler.o irq.o irq_5477.o setup.o pci.o pci_ops.o lcd44780.o
 
-obj-$(CONFIG_DEBUG) 		+= debug.o
+obj-$(CONFIG_RUNTIME_DEBUG) 		+= debug.o
 obj-$(CONFIG_REMOTE_DEBUG)	+= kgdb_io.o
 obj-$(CONFIG_BLK_DEV_INITRD)	+= ramdisk.o
 
diff -Nru linux/arch/mips/ddb5xxx/ddb5477/irq.c.orig linux/arch/mips/ddb5xxx/ddb5477/irq.c
--- linux/arch/mips/ddb5xxx/ddb5477/irq.c.orig	Mon Dec  2 16:55:40 2002
+++ linux/arch/mips/ddb5xxx/ddb5477/irq.c	Thu Feb 20 11:18:54 2003
@@ -176,7 +176,7 @@
 	db_assert(ddb_in32(DDB_NMISTAT) == 0);
 
 	if (ddb_in32(DDB_INT1STAT) != 0) {
-#if defined(CONFIG_DEBUG)
+#if defined(CONFIG_RUNTIME_DEBUG)
 		vrc5477_show_int_regs();
 #endif
 		panic("error interrupt has happened.");
diff -Nru linux/arch/mips/ddb5xxx/ddb5477/pci.c.orig linux/arch/mips/ddb5xxx/ddb5477/pci.c
--- linux/arch/mips/ddb5xxx/ddb5477/pci.c.orig	Fri Dec 13 10:25:00 2002
+++ linux/arch/mips/ddb5xxx/ddb5477/pci.c	Thu Feb 20 11:18:54 2003
@@ -166,7 +166,7 @@
 	}
 }
 
-#if defined(CONFIG_DEBUG)
+#if defined(CONFIG_RUNTIME_DEBUG)
 extern void jsun_scan_pci_bus(void);
 extern void jsun_assign_pci_resource(void);
 #endif
diff -Nru linux/arch/mips/galileo-boards/ev64120/irq.c.orig linux/arch/mips/galileo-boards/ev64120/irq.c
--- linux/arch/mips/galileo-boards/ev64120/irq.c.orig	Mon Dec  2 16:55:41 2002
+++ linux/arch/mips/galileo-boards/ev64120/irq.c	Thu Feb 20 10:49:20 2003
@@ -421,7 +421,7 @@
 	set_c0_status(IE_IRQ2);
 
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	{
 		extern int DEBUG_CHANNEL;
 		serial_init(DEBUG_CHANNEL);
diff -Nru linux/arch/mips/gt64120/momenco_ocelot/Makefile.orig linux/arch/mips/gt64120/momenco_ocelot/Makefile
--- linux/arch/mips/gt64120/momenco_ocelot/Makefile.orig	Tue Jun 25 08:47:00 2002
+++ linux/arch/mips/gt64120/momenco_ocelot/Makefile	Thu Feb 20 10:49:20 2003
@@ -12,6 +12,6 @@
 
 obj-y	 += int-handler.o irq.o pci.o prom.o reset.o setup.o
 
-obj-$(CONFIG_REMOTE_DEBUG) += dbg_io.o
+obj-$(CONFIG_KGDB) += dbg_io.o
 
 include $(TOPDIR)/Rules.make
diff -Nru linux/arch/mips/gt64120/momenco_ocelot/dbg_io.c.orig linux/arch/mips/gt64120/momenco_ocelot/dbg_io.c
--- linux/arch/mips/gt64120/momenco_ocelot/dbg_io.c.orig	Thu Nov 29 07:09:48 2001
+++ linux/arch/mips/gt64120/momenco_ocelot/dbg_io.c	Thu Feb 20 10:49:20 2003
@@ -1,6 +1,6 @@
 #include <linux/config.h>
 
-#if defined(CONFIG_REMOTE_DEBUG)
+#if defined(CONFIG_KGDB)
 
 #include <asm/serial.h> /* For the serial port location and base baud */
 
diff -Nru linux/arch/mips/gt64120/momenco_ocelot/irq.c.orig linux/arch/mips/gt64120/momenco_ocelot/irq.c
--- linux/arch/mips/gt64120/momenco_ocelot/irq.c.orig	Mon Dec  2 16:55:49 2002
+++ linux/arch/mips/gt64120/momenco_ocelot/irq.c	Thu Feb 20 10:49:20 2003
@@ -161,7 +161,7 @@
 
 	gt64120_irq_init();
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	printk("start kgdb ...\n");
 	set_debug_traps();
 	breakpoint();	/* you may move this line to whereever you want :-) */
diff -Nru linux/arch/mips/hp-lj/Makefile.orig linux/arch/mips/hp-lj/Makefile
--- linux/arch/mips/hp-lj/Makefile.orig	Tue Jun 25 08:47:00 2002
+++ linux/arch/mips/hp-lj/Makefile	Thu Feb 20 10:49:20 2003
@@ -17,7 +17,7 @@
 
 obj-y   := init.o setup.o irq.o int-handler.o pci.o utils.o asic.o
 
-obj-$(CONFIG_REMOTE_DEBUG) += gdb_hook.o
+obj-$(CONFIG_KGDB) += gdb_hook.o
 obj-$(CONFIG_DIRECT_PRINTK) += gdb_hook.o
 
 obj-$(CONFIG_BLK_DEV_INITRD) += initrd.o
diff -Nru linux/arch/mips/hp-lj/irq.c.orig linux/arch/mips/hp-lj/irq.c
--- linux/arch/mips/hp-lj/irq.c.orig	Mon Aug  5 16:53:32 2002
+++ linux/arch/mips/hp-lj/irq.c	Thu Feb 20 10:49:20 2003
@@ -25,7 +25,7 @@
     mips_cpu_irq_init(0);
     set_except_vector(0, hpIRQ);
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
     {
        extern void breakpoint(void);
        extern int remote_debug;
diff -Nru linux/arch/mips/hp-lj/setup.c.orig linux/arch/mips/hp-lj/setup.c
--- linux/arch/mips/hp-lj/setup.c.orig	Mon Aug  5 16:53:32 2002
+++ linux/arch/mips/hp-lj/setup.c	Thu Feb 20 10:49:20 2003
@@ -20,7 +20,7 @@
 #include <asm/hp-lj/asic.h>
 #include "utils.h"
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 int remote_debug = 0;
 #endif
 
@@ -144,7 +144,7 @@
 
    board_timer_setup = hp_time_init;
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
    {
       extern char CommandLine[];
       remote_debug = (strstr(CommandLine, "kgdb") != NULL);
diff -Nru linux/arch/mips/ite-boards/generic/Makefile.orig linux/arch/mips/ite-boards/generic/Makefile
--- linux/arch/mips/ite-boards/generic/Makefile.orig	Mon Aug  5 16:53:32 2002
+++ linux/arch/mips/ite-boards/generic/Makefile	Thu Feb 20 10:49:20 2003
@@ -20,6 +20,6 @@
 
 obj-$(CONFIG_PCI) += it8172_pci.o
 obj-$(CONFIG_IT8172_CIR) += it8172_cir.o
-obj-$(CONFIG_REMOTE_DEBUG) += dbg_io.o
+obj-$(CONFIG_KGDB) += dbg_io.o
 
 include $(TOPDIR)/Rules.make
diff -Nru linux/arch/mips/ite-boards/generic/dbg_io.c.orig linux/arch/mips/ite-boards/generic/dbg_io.c
--- linux/arch/mips/ite-boards/generic/dbg_io.c.orig	Sun Mar 18 05:52:36 2001
+++ linux/arch/mips/ite-boards/generic/dbg_io.c	Thu Feb 20 10:49:20 2003
@@ -1,7 +1,7 @@
 
 #include <linux/config.h>
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 
 /* --- CONFIG --- */
 
diff -Nru linux/arch/mips/ite-boards/generic/irq.c.orig linux/arch/mips/ite-boards/generic/irq.c
--- linux/arch/mips/ite-boards/generic/irq.c.orig	Mon Dec  2 16:55:49 2002
+++ linux/arch/mips/ite-boards/generic/irq.c	Thu Feb 20 10:49:20 2003
@@ -65,7 +65,7 @@
 #define DPRINTK(fmt, args...)
 #endif
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 extern void breakpoint(void);
 #endif
 
@@ -301,7 +301,7 @@
 	irq_desc[MIPS_CPU_TIMER_IRQ].handler = &cp0_irq_type;
 	set_c0_status(ALLINTS_NOTIMER);
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	/* If local serial I/O used for debug port, enter kgdb at once */
 	puts("Waiting for kgdb to connect...");
 	set_debug_traps();
diff -Nru linux/arch/mips/jmr3927/rbhma3100/Makefile.orig linux/arch/mips/jmr3927/rbhma3100/Makefile
--- linux/arch/mips/jmr3927/rbhma3100/Makefile.orig	Tue Jun 25 08:47:00 2002
+++ linux/arch/mips/jmr3927/rbhma3100/Makefile	Thu Feb 20 10:49:21 2003
@@ -13,6 +13,6 @@
 obj-y	 += init.o int-handler.o irq.o setup.o rtc.o pci_fixup.o pci_ops.o
 
 obj-$(CONFIG_LL_DEBUG) 		+= debug.o
-obj-$(CONFIG_REMOTE_DEBUG)	+= kgdb_io.o
+obj-$(CONFIG_KGDB)	+= kgdb_io.o
 
 include $(TOPDIR)/Rules.make
diff -Nru linux/arch/mips/jmr3927/rbhma3100/irq.c.orig linux/arch/mips/jmr3927/rbhma3100/irq.c
--- linux/arch/mips/jmr3927/rbhma3100/irq.c.orig	Mon Dec  2 16:55:53 2002
+++ linux/arch/mips/jmr3927/rbhma3100/irq.c	Thu Feb 20 10:49:21 2003
@@ -444,7 +444,7 @@
 void __init init_IRQ(void)
 {
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
         extern void breakpoint(void);
         extern void set_debug_traps(void);
 
diff -Nru linux/arch/mips/kernel/Makefile.orig linux/arch/mips/kernel/Makefile
--- linux/arch/mips/kernel/Makefile.orig	Mon Dec 16 18:12:48 2002
+++ linux/arch/mips/kernel/Makefile	Thu Feb 20 10:49:21 2003
@@ -50,7 +50,7 @@
 
 obj-$(CONFIG_BINFMT_IRIX)	+= irixelf.o irixioctl.o irixsig.o sysirix.o \
 				   irixinv.o
-obj-$(CONFIG_REMOTE_DEBUG)	+= gdb-low.o gdb-stub.o
+obj-$(CONFIG_KGDB)	+= gdb-low.o gdb-stub.o
 obj-$(CONFIG_PROC_FS)		+= proc.o
 
 obj-$(CONFIG_NEW_PCI)		+= pci.o
diff -Nru linux/arch/mips/kernel/gdb-stub.c.orig linux/arch/mips/kernel/gdb-stub.c
--- linux/arch/mips/kernel/gdb-stub.c.orig	Thu Feb 20 10:22:50 2003
+++ linux/arch/mips/kernel/gdb-stub.c	Thu Feb 20 10:49:21 2003
@@ -99,7 +99,7 @@
  *  the kernel running. It will promptly halt and wait
  *  for the host gdb session to connect. It does this
  *  since the "Kernel Hacking" option has defined
- *  CONFIG_REMOTE_DEBUG which in turn enables your calls
+ *  CONFIG_KGDB which in turn enables your calls
  *  to:
  *     set_debug_traps();
  *     breakpoint();
diff -Nru linux/arch/mips/mips-boards/atlas/atlas_int.c.orig linux/arch/mips/mips-boards/atlas/atlas_int.c
--- linux/arch/mips/mips-boards/atlas/atlas_int.c.orig	Mon Aug  5 16:53:34 2002
+++ linux/arch/mips/mips-boards/atlas/atlas_int.c	Thu Feb 20 10:49:21 2003
@@ -130,7 +130,7 @@
 	return;
 }
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 extern void breakpoint(void);
 extern int remote_debug;
 #endif
@@ -155,7 +155,7 @@
 		irq_desc[i].handler	= &atlas_irq_type;
 	}
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	if (remote_debug) {
 		set_debug_traps();
 		breakpoint();
diff -Nru linux/arch/mips/mips-boards/atlas/atlas_setup.c.orig linux/arch/mips/mips-boards/atlas/atlas_setup.c
--- linux/arch/mips/mips-boards/atlas/atlas_setup.c.orig	Mon Aug  5 16:53:34 2002
+++ linux/arch/mips/mips-boards/atlas/atlas_setup.c	Thu Feb 20 10:49:21 2003
@@ -38,7 +38,7 @@
 char serial_console[20];
 #endif
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 extern void rs_kgdb_hook(int);
 extern void saa9730_kgdb_hook(void);
 extern void breakpoint(void);
@@ -64,7 +64,7 @@
 
 void __init atlas_setup(void)
 {
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	int rs_putDebugChar(char);
 	char rs_getDebugChar(void);
 	int saa9730_putDebugChar(char);
@@ -90,7 +90,7 @@
 	}
 #endif
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	argptr = prom_getcmdline();
 	if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
 		int line;
diff -Nru linux/arch/mips/mips-boards/generic/Makefile.orig linux/arch/mips/mips-boards/generic/Makefile
--- linux/arch/mips/mips-boards/generic/Makefile.orig	Mon Aug  5 16:53:34 2002
+++ linux/arch/mips/mips-boards/generic/Makefile	Thu Feb 20 10:49:21 2003
@@ -32,6 +32,6 @@
 obj-$(CONFIG_MIPS_ATLAS)	+= time.o
 obj-$(CONFIG_MIPS_MALTA)	+= time.o
 obj-$(CONFIG_PCI)		+= pci.o
-obj-$(CONFIG_REMOTE_DEBUG)	+= gdb_hook.o
+obj-$(CONFIG_KGDB)	+= gdb_hook.o
 
 include $(TOPDIR)/Rules.make
diff -Nru linux/arch/mips/mips-boards/malta/malta_int.c.orig linux/arch/mips/mips-boards/malta/malta_int.c
--- linux/arch/mips/mips-boards/malta/malta_int.c.orig	Thu Feb 20 10:22:50 2003
+++ linux/arch/mips/mips-boards/malta/malta_int.c	Thu Feb 20 10:49:21 2003
@@ -43,7 +43,7 @@
 extern void init_i8259_irqs (void);
 extern int mips_pcibios_iack(void);
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 extern void breakpoint(void);
 extern void set_debug_traps(void);
 extern int remote_debug;
@@ -142,7 +142,7 @@
 	init_generic_irq();
 	init_i8259_irqs();
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	if (remote_debug) {
 		set_debug_traps();
 		breakpoint();
diff -Nru linux/arch/mips/mips-boards/malta/malta_setup.c.orig linux/arch/mips/mips-boards/malta/malta_setup.c
--- linux/arch/mips/mips-boards/malta/malta_setup.c.orig	Thu Feb 20 10:22:50 2003
+++ linux/arch/mips/mips-boards/malta/malta_setup.c	Thu Feb 20 10:49:21 2003
@@ -50,7 +50,7 @@
 char serial_console[20];
 #endif
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 extern void rs_kgdb_hook(int);
 int remote_debug = 0;
 #endif
@@ -86,7 +86,7 @@
 
 void __init malta_setup(void)
 {
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	int rs_putDebugChar(char);
 	char rs_getDebugChar(void);
 	extern int (*generic_putDebugChar)(char);
@@ -112,7 +112,7 @@
 	}
 #endif
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	argptr = prom_getcmdline();
 	if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
 		int line;
diff -Nru linux/arch/mips/momentum/ocelot_g/Makefile.orig linux/arch/mips/momentum/ocelot_g/Makefile
--- linux/arch/mips/momentum/ocelot_g/Makefile.orig	Mon Dec  2 16:57:02 2002
+++ linux/arch/mips/momentum/ocelot_g/Makefile	Thu Feb 20 10:49:21 2003
@@ -12,6 +12,6 @@
 
 obj-y	 += gt-irq.o pci-irq.o pci.o int-handler.o irq.o prom.o reset.o setup.o
 
-obj-$(CONFIG_REMOTE_DEBUG) += dbg_io.o
+obj-$(CONFIG_KGDB) += dbg_io.o
 
 include $(TOPDIR)/Rules.make
diff -Nru linux/arch/mips/momentum/ocelot_g/dbg_io.c.orig linux/arch/mips/momentum/ocelot_g/dbg_io.c
--- linux/arch/mips/momentum/ocelot_g/dbg_io.c.orig	Mon Sep  2 09:11:44 2002
+++ linux/arch/mips/momentum/ocelot_g/dbg_io.c	Thu Feb 20 10:49:21 2003
@@ -1,6 +1,6 @@
 #include <linux/config.h>
 
-#if defined(CONFIG_REMOTE_DEBUG)
+#if defined(CONFIG_KGDB)
 
 #include <asm/serial.h> /* For the serial port location and base baud */
 
diff -Nru linux/arch/mips/momentum/ocelot_g/irq.c.orig linux/arch/mips/momentum/ocelot_g/irq.c
--- linux/arch/mips/momentum/ocelot_g/irq.c.orig	Mon Dec  2 16:57:03 2002
+++ linux/arch/mips/momentum/ocelot_g/irq.c	Thu Feb 20 10:49:21 2003
@@ -161,7 +161,7 @@
 
 	gt64240_irq_init();
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	printk("start kgdb ...\n");
 	set_debug_traps();
 	breakpoint();	/* you may move this line to whereever you want :-) */
diff -Nru linux/arch/mips/momentum/ocelot_c/Makefile.orig linux/arch/mips/momentum/ocelot_c/Makefile
--- linux/arch/mips/momentum/ocelot_c/Makefile.orig	Wed Nov 13 02:00:14 2002
+++ linux/arch/mips/momentum/ocelot_c/Makefile	Thu Feb 20 10:49:21 2003
@@ -13,6 +13,6 @@
 obj-y	 += mv-irq.o cpci-irq.o uart-irq.o int-handler.o irq.o
 obj-y    += pci-irq.o pci.o prom.o reset.o setup.o 
 
-obj-$(CONFIG_REMOTE_DEBUG) += dbg_io.o
+obj-$(CONFIG_KGDB) += dbg_io.o
 
 include $(TOPDIR)/Rules.make
diff -Nru linux/arch/mips/momentum/ocelot_c/dbg_io.c.orig linux/arch/mips/momentum/ocelot_c/dbg_io.c
--- linux/arch/mips/momentum/ocelot_c/dbg_io.c.orig	Mon Nov 11 15:05:46 2002
+++ linux/arch/mips/momentum/ocelot_c/dbg_io.c	Thu Feb 20 10:49:21 2003
@@ -1,6 +1,6 @@
 #include <linux/config.h>
 
-#if defined(CONFIG_REMOTE_DEBUG)
+#if defined(CONFIG_KGDB)
 
 #include <asm/serial.h> /* For the serial port location and base baud */
 
diff -Nru linux/arch/mips/momentum/ocelot_c/irq.c.orig linux/arch/mips/momentum/ocelot_c/irq.c
--- linux/arch/mips/momentum/ocelot_c/irq.c.orig	Sun Dec  1 16:24:50 2002
+++ linux/arch/mips/momentum/ocelot_c/irq.c	Thu Feb 20 10:49:21 2003
@@ -171,7 +171,7 @@
 	uart_irq_init();
 	cpci_irq_init();
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	printk("start kgdb ...\n");
 	set_debug_traps();
 	breakpoint();	/* you may move this line to whereever you want :-) */
diff -Nru linux/arch/mips/philips/nino/irq.c.orig linux/arch/mips/philips/nino/irq.c
--- linux/arch/mips/philips/nino/irq.c.orig	Mon Dec  2 16:57:05 2002
+++ linux/arch/mips/philips/nino/irq.c	Thu Feb 20 10:49:22 2003
@@ -251,7 +251,7 @@
 
 void __init init_IRQ(void)
 {
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	extern void breakpoint(void);
 	extern void set_debug_traps(void);
 
diff -Nru linux/arch/mips/sgi-ip22/ip22-setup.c.orig linux/arch/mips/sgi-ip22/ip22-setup.c
--- linux/arch/mips/sgi-ip22/ip22-setup.c.orig	Wed Jan 29 15:33:03 2003
+++ linux/arch/mips/sgi-ip22/ip22-setup.c	Thu Feb 20 10:49:22 2003
@@ -31,7 +31,7 @@
 #include <asm/io.h>
 #include <asm/traps.h>
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 extern void rs_kgdb_hook(int);
 extern void breakpoint(void);
 static int remote_debug = 0;
@@ -129,7 +129,7 @@
 void __init ip22_setup(void)
 {
 	char *ctype;
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	char *kgdb_ttyd;
 #endif
 	sgitime_init();
@@ -173,7 +173,7 @@
 	}
 #endif
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	kgdb_ttyd = prom_getcmdline();
 	if ((kgdb_ttyd = strstr(kgdb_ttyd, "kgdb=ttyd")) != NULL) {
 		int line;
diff -Nru linux/arch/mips/sibyte/sb1250/irq.c.orig linux/arch/mips/sibyte/sb1250/irq.c
--- linux/arch/mips/sibyte/sb1250/irq.c.orig	Thu Feb 13 11:34:55 2003
+++ linux/arch/mips/sibyte/sb1250/irq.c	Thu Feb 20 10:49:22 2003
@@ -58,7 +58,7 @@
 extern unsigned long ldt_eoi_space;
 #endif
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 extern void breakpoint(void);
 extern void set_debug_traps(void);
 
@@ -368,14 +368,14 @@
 #ifdef CONFIG_BCM1250_PROF
 	imask |= STATUSF_IP7;
 #endif
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	imask |= STATUSF_IP6;
 #endif
 	/* Enable necessary IPs, disable the rest */
 	change_c0_status(ST0_IM, imask);
 	set_except_vector(0, sb1250_irq_handler);
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	if (kgdb_flag) {
 		/* Setup uart 1 settings, mapper */
 		out64(M_DUART_IMR_BRK, KSEG1 + A_DUART + R_DUART_IMR_B);
@@ -392,7 +392,7 @@
 #endif
 }
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 
 #include <linux/delay.h>
 
@@ -414,4 +414,4 @@
 	if (!user_mode(regs))
 		set_async_breakpoint(regs->cp0_epc);
 }
-#endif 	/* CONFIG_REMOTE_DEBUG */
+#endif 	/* CONFIG_KGDB */
diff -Nru linux/arch/mips/sibyte/sb1250/irq_handler.S.orig linux/arch/mips/sibyte/sb1250/irq_handler.S
--- linux/arch/mips/sibyte/sb1250/irq_handler.S.orig	Wed Jan 29 15:33:04 2003
+++ linux/arch/mips/sibyte/sb1250/irq_handler.S	Thu Feb 20 10:49:22 2003
@@ -108,7 +108,7 @@
 2:
 #endif
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	/* KGDB (uart 1) interrupt is routed to IP[6] */
 	andi	t1, s0, CAUSEF_IP6
 	beqz	t1, 1f
diff -Nru linux/arch/mips/sibyte/swarm/Makefile.orig linux/arch/mips/sibyte/swarm/Makefile
--- linux/arch/mips/sibyte/swarm/Makefile.orig	Thu Feb 13 11:34:55 2003
+++ linux/arch/mips/sibyte/swarm/Makefile	Thu Feb 20 10:49:22 2003
@@ -4,7 +4,7 @@
 
 OBJS-y                   = setup.o cmdline.o rtc_xicor1241.o rtc_m41t81.o
 
-OBJS-$(CONFIG_REMOTE_DEBUG) += dbg_io.o
+OBJS-$(CONFIG_KGDB) += dbg_io.o
 
 sbswarm.a: $(OBJS-y)
 	$(AR) rcs sbswarm.a $^
diff -Nru linux/arch/mips/vr4181/common/irq.c.orig linux/arch/mips/vr4181/common/irq.c
--- linux/arch/mips/vr4181/common/irq.c.orig	Mon Aug  5 16:53:36 2002
+++ linux/arch/mips/vr4181/common/irq.c	Thu Feb 20 10:49:22 2003
@@ -239,7 +239,7 @@
 	setup_irq(VR4181_IRQ_RTCL1, &reserved);
 	setup_irq(VR4181_IRQ_RTCL2, &reserved);
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	printk("Setting debug traps - please connect the remote debugger.\n");
 
 	set_debug_traps();
diff -Nru linux/arch/mips/vr4181/osprey/Makefile.orig linux/arch/mips/vr4181/osprey/Makefile
--- linux/arch/mips/vr4181/osprey/Makefile.orig	Tue Jun 25 08:47:01 2002
+++ linux/arch/mips/vr4181/osprey/Makefile	Thu Feb 20 10:49:22 2003
@@ -12,6 +12,6 @@
 
 obj-y	 := setup.o prom.o reset.o
 
-obj-$(CONFIG_REMOTE_DEBUG)	+= dbg_io.o
+obj-$(CONFIG_KGDB)	+= dbg_io.o
 
 include $(TOPDIR)/Rules.make
diff -Nru linux/arch/mips/vr41xx/common/icu.c.orig linux/arch/mips/vr41xx/common/icu.c
--- linux/arch/mips/vr41xx/common/icu.c.orig	Thu Oct  3 09:58:02 2002
+++ linux/arch/mips/vr41xx/common/icu.c	Thu Feb 20 10:49:22 2003
@@ -339,7 +339,7 @@
 
 	set_except_vector(0, vr41xx_handle_interrupt);
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	printk("Setting debug traps - please connect the remote debugger.\n");
 	set_debug_traps();
 	breakpoint();
diff -Nru linux/arch/mips/Makefile.orig linux/arch/mips/Makefile
--- linux/arch/mips/Makefile.orig	Thu Feb 20 10:22:49 2003
+++ linux/arch/mips/Makefile	Thu Feb 20 10:49:18 2003
@@ -41,7 +41,7 @@
 LINKFLAGS	+= -G 0 -static # -N
 MODFLAGS	+= -mlong-calls
 
-ifdef CONFIG_REMOTE_DEBUG
+ifdef CONFIG_KGDB
 GCCFLAGS	+= -g
 ifdef CONFIG_SB1XXX_CORELIS
 GCCFLAGS	+= -mno-sched-prolog -fno-omit-frame-pointer
diff -Nru linux/arch/mips/config-shared.in.orig linux/arch/mips/config-shared.in
--- linux/arch/mips/config-shared.in.orig	Thu Feb 20 10:22:49 2003
+++ linux/arch/mips/config-shared.in	Thu Feb 20 11:18:54 2003
@@ -975,11 +975,11 @@
 comment 'Kernel hacking'
 
 bool 'Are you using a crosscompiler' CONFIG_CROSSCOMPILE
-bool 'Enable run-time debugging' CONFIG_DEBUG
+bool 'Enable run-time debugging' CONFIG_RUNTIME_DEBUG
 bool 'Remote GDB kernel debugging' CONFIG_REMOTE_DEBUG
 dep_bool '  Console output to GDB' CONFIG_GDB_CONSOLE $CONFIG_REMOTE_DEBUG
 if [ "$CONFIG_SIBYTE_SB1xxx_SOC" = "y" ]; then
-   dep_bool 'Compile for Corelis Debugger' CONFIG_SB1XXX_CORELIS $CONFIG_DEBUG
+   dep_bool 'Compile for Corelis Debugger' CONFIG_SB1XXX_CORELIS $CONFIG_RUNTIME_DEBUG
 fi
 bool 'Magic SysRq key' CONFIG_MAGIC_SYSRQ
 if [ "$CONFIG_SMP" != "y" ]; then
diff -Nru linux/arch/mips/defconfig-decstation.orig linux/arch/mips/defconfig-decstation
--- linux/arch/mips/defconfig-decstation.orig	Thu Feb 13 11:34:55 2003
+++ linux/arch/mips/defconfig-decstation	Thu Feb 20 11:18:55 2003
@@ -598,7 +598,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_REMOTE_DEBUG is not set
 # CONFIG_GDB_CONSOLE is not set
 # CONFIG_MAGIC_SYSRQ is not set
diff -Nru linux/arch/mips/defconfig-pb1000.orig linux/arch/mips/defconfig-pb1000
--- linux/arch/mips/defconfig-pb1000.orig	Thu Feb 13 11:34:55 2003
+++ linux/arch/mips/defconfig-pb1000	Thu Feb 20 11:18:56 2003
@@ -810,7 +810,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_REMOTE_DEBUG is not set
 # CONFIG_GDB_CONSOLE is not set
 # CONFIG_MAGIC_SYSRQ is not set
diff -Nru linux/arch/mips/defconfig-pb1100.orig linux/arch/mips/defconfig-pb1100
--- linux/arch/mips/defconfig-pb1100.orig	Thu Feb 13 11:34:55 2003
+++ linux/arch/mips/defconfig-pb1100	Thu Feb 20 11:18:56 2003
@@ -834,7 +834,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_REMOTE_DEBUG is not set
 # CONFIG_GDB_CONSOLE is not set
 # CONFIG_MAGIC_SYSRQ is not set
diff -Nru linux/arch/mips/defconfig-pb1500.orig linux/arch/mips/defconfig-pb1500
--- linux/arch/mips/defconfig-pb1500.orig	Thu Feb 13 11:34:55 2003
+++ linux/arch/mips/defconfig-pb1500	Thu Feb 20 11:18:56 2003
@@ -1019,7 +1019,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_REMOTE_DEBUG is not set
 # CONFIG_GDB_CONSOLE is not set
 # CONFIG_MAGIC_SYSRQ is not set
diff -Nru linux/arch/mips/defconfig-sb1250-swarm.orig linux/arch/mips/defconfig-sb1250-swarm
--- linux/arch/mips/defconfig-sb1250-swarm.orig	Thu Feb 13 11:34:55 2003
+++ linux/arch/mips/defconfig-sb1250-swarm	Thu Feb 20 11:18:56 2003
@@ -551,7 +551,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_REMOTE_DEBUG is not set
 # CONFIG_GDB_CONSOLE is not set
 # CONFIG_SB1XXX_CORELIS is not set
diff -Nru linux/arch/mips/defconfig-db1000.orig linux/arch/mips/defconfig-db1000
--- linux/arch/mips/defconfig-db1000.orig	Thu Feb 13 11:34:55 2003
+++ linux/arch/mips/defconfig-db1000	Thu Feb 20 11:18:55 2003
@@ -755,7 +755,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_REMOTE_DEBUG is not set
 # CONFIG_GDB_CONSOLE is not set
 # CONFIG_MAGIC_SYSRQ is not set
diff -Nru linux/arch/mips/defconfig-db1500.orig linux/arch/mips/defconfig-db1500
--- linux/arch/mips/defconfig-db1500.orig	Thu Feb 13 11:34:55 2003
+++ linux/arch/mips/defconfig-db1500	Thu Feb 20 11:18:55 2003
@@ -763,7 +763,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_REMOTE_DEBUG is not set
 # CONFIG_GDB_CONSOLE is not set
 # CONFIG_MAGIC_SYSRQ is not set
diff -Nru linux/arch/mips/defconfig.orig linux/arch/mips/defconfig
--- linux/arch/mips/defconfig.orig	Thu Feb  6 13:24:00 2003
+++ linux/arch/mips/defconfig	Thu Feb 20 11:18:55 2003
@@ -641,7 +641,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-atlas.orig linux/arch/mips/defconfig-atlas
--- linux/arch/mips/defconfig-atlas.orig	Thu Feb  6 13:24:00 2003
+++ linux/arch/mips/defconfig-atlas	Thu Feb 20 11:18:55 2003
@@ -640,7 +640,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-capcella.orig linux/arch/mips/defconfig-capcella
--- linux/arch/mips/defconfig-capcella.orig	Thu Feb  6 13:24:00 2003
+++ linux/arch/mips/defconfig-capcella	Thu Feb 20 11:18:55 2003
@@ -641,7 +641,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-cobalt.orig linux/arch/mips/defconfig-cobalt
--- linux/arch/mips/defconfig-cobalt.orig	Thu Feb  6 13:24:00 2003
+++ linux/arch/mips/defconfig-cobalt	Thu Feb 20 11:18:55 2003
@@ -636,7 +636,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-ddb5476.orig linux/arch/mips/defconfig-ddb5476
--- linux/arch/mips/defconfig-ddb5476.orig	Thu Feb  6 13:24:01 2003
+++ linux/arch/mips/defconfig-ddb5476	Thu Feb 20 11:18:55 2003
@@ -677,7 +677,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-CONFIG_DEBUG=y
+CONFIG_RUNTIME_DEBUG=y
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-ddb5477.orig linux/arch/mips/defconfig-ddb5477
--- linux/arch/mips/defconfig-ddb5477.orig	Thu Feb  6 13:24:01 2003
+++ linux/arch/mips/defconfig-ddb5477	Thu Feb 20 11:18:55 2003
@@ -573,7 +573,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-CONFIG_DEBUG=y
+CONFIG_RUNTIME_DEBUG=y
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-e55.orig linux/arch/mips/defconfig-e55
--- linux/arch/mips/defconfig-e55.orig	Thu Feb  6 13:24:01 2003
+++ linux/arch/mips/defconfig-e55	Thu Feb 20 11:18:55 2003
@@ -601,7 +601,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-eagle.orig linux/arch/mips/defconfig-eagle
--- linux/arch/mips/defconfig-eagle.orig	Thu Feb  6 13:24:01 2003
+++ linux/arch/mips/defconfig-eagle	Thu Feb 20 11:18:55 2003
@@ -776,7 +776,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-ev64120.orig linux/arch/mips/defconfig-ev64120
--- linux/arch/mips/defconfig-ev64120.orig	Thu Feb  6 13:24:01 2003
+++ linux/arch/mips/defconfig-ev64120	Thu Feb 20 11:18:55 2003
@@ -558,7 +558,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-ev96100.orig linux/arch/mips/defconfig-ev96100
--- linux/arch/mips/defconfig-ev96100.orig	Thu Feb  6 13:24:01 2003
+++ linux/arch/mips/defconfig-ev96100	Thu Feb 20 11:18:55 2003
@@ -553,7 +553,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-hp-lj.orig linux/arch/mips/defconfig-hp-lj
--- linux/arch/mips/defconfig-hp-lj.orig	Thu Feb  6 13:24:01 2003
+++ linux/arch/mips/defconfig-hp-lj	Thu Feb 20 11:18:55 2003
@@ -708,7 +708,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-ip22.orig linux/arch/mips/defconfig-ip22
--- linux/arch/mips/defconfig-ip22.orig	Thu Feb  6 13:24:01 2003
+++ linux/arch/mips/defconfig-ip22	Thu Feb 20 11:18:55 2003
@@ -641,7 +641,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-it8172.orig linux/arch/mips/defconfig-it8172
--- linux/arch/mips/defconfig-it8172.orig	Thu Feb  6 13:24:01 2003
+++ linux/arch/mips/defconfig-it8172	Thu Feb 20 11:18:55 2003
@@ -729,7 +729,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-ivr.orig linux/arch/mips/defconfig-ivr
--- linux/arch/mips/defconfig-ivr.orig	Thu Feb  6 13:24:01 2003
+++ linux/arch/mips/defconfig-ivr	Thu Feb 20 11:18:55 2003
@@ -765,7 +765,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-jmr3927.orig linux/arch/mips/defconfig-jmr3927
--- linux/arch/mips/defconfig-jmr3927.orig	Thu Feb  6 13:24:01 2003
+++ linux/arch/mips/defconfig-jmr3927	Thu Feb 20 11:18:55 2003
@@ -618,7 +618,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-lasat.orig linux/arch/mips/defconfig-lasat
--- linux/arch/mips/defconfig-lasat.orig	Thu Feb  6 13:24:01 2003
+++ linux/arch/mips/defconfig-lasat	Thu Feb 20 11:18:55 2003
@@ -705,7 +705,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 CONFIG_MAGIC_SYSRQ=y
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-malta.orig linux/arch/mips/defconfig-malta
--- linux/arch/mips/defconfig-malta.orig	Thu Feb 20 10:22:49 2003
+++ linux/arch/mips/defconfig-malta	Thu Feb 20 11:18:55 2003
@@ -621,7 +621,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-mpc30x.orig linux/arch/mips/defconfig-mpc30x
--- linux/arch/mips/defconfig-mpc30x.orig	Thu Feb  6 13:24:01 2003
+++ linux/arch/mips/defconfig-mpc30x	Thu Feb 20 11:18:55 2003
@@ -648,7 +648,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-nino.orig linux/arch/mips/defconfig-nino
--- linux/arch/mips/defconfig-nino.orig	Thu Feb  6 13:24:01 2003
+++ linux/arch/mips/defconfig-nino	Thu Feb 20 11:18:55 2003
@@ -498,7 +498,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-ocelot.orig linux/arch/mips/defconfig-ocelot
--- linux/arch/mips/defconfig-ocelot.orig	Thu Feb  6 13:24:01 2003
+++ linux/arch/mips/defconfig-ocelot	Thu Feb 20 11:18:56 2003
@@ -547,7 +547,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-osprey.orig linux/arch/mips/defconfig-osprey
--- linux/arch/mips/defconfig-osprey.orig	Thu Feb  6 13:24:01 2003
+++ linux/arch/mips/defconfig-osprey	Thu Feb 20 11:18:56 2003
@@ -520,7 +520,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-rm200.orig linux/arch/mips/defconfig-rm200
--- linux/arch/mips/defconfig-rm200.orig	Thu Feb  6 13:24:01 2003
+++ linux/arch/mips/defconfig-rm200	Thu Feb 20 11:18:56 2003
@@ -481,7 +481,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-sead.orig linux/arch/mips/defconfig-sead
--- linux/arch/mips/defconfig-sead.orig	Thu Feb  6 13:24:01 2003
+++ linux/arch/mips/defconfig-sead	Thu Feb 20 11:18:56 2003
@@ -359,7 +359,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-tb0226.orig linux/arch/mips/defconfig-tb0226
--- linux/arch/mips/defconfig-tb0226.orig	Tue Feb  4 04:43:06 2003
+++ linux/arch/mips/defconfig-tb0226	Thu Feb 20 11:18:56 2003
@@ -764,7 +764,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips/defconfig-workpad.orig linux/arch/mips/defconfig-workpad
--- linux/arch/mips/defconfig-workpad.orig	Thu Feb  6 13:24:02 2003
+++ linux/arch/mips/defconfig-workpad	Thu Feb 20 11:18:56 2003
@@ -601,7 +601,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips64/Makefile.orig linux/arch/mips64/Makefile
--- linux/arch/mips64/Makefile.orig	Thu Feb 20 10:22:51 2003
+++ linux/arch/mips64/Makefile	Thu Feb 20 10:49:22 2003
@@ -39,7 +39,7 @@
 LINKFLAGS	+= -G 0 -static # -N
 MODFLAGS	+= -mlong-calls
 
-ifdef CONFIG_REMOTE_DEBUG
+ifdef CONFIG_KGDB
 GCCFLAGS	+= -g
 ifdef CONFIG_SB1XXX_CORELIS
 GCCFLAGS	+= -mno-sched-prolog -fno-omit-frame-pointer
diff -Nru linux/arch/mips64/defconfig-malta.orig linux/arch/mips64/defconfig-malta
--- linux/arch/mips64/defconfig-malta.orig	Thu Feb 20 10:22:51 2003
+++ linux/arch/mips64/defconfig-malta	Thu Feb 20 11:18:54 2003
@@ -587,7 +587,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_REMOTE_DEBUG is not set
 # CONFIG_GDB_CONSOLE is not set
 # CONFIG_MAGIC_SYSRQ is not set
diff -Nru linux/arch/mips64/defconfig-sb1250-swarm.orig linux/arch/mips64/defconfig-sb1250-swarm
--- linux/arch/mips64/defconfig-sb1250-swarm.orig	Thu Feb 13 11:34:55 2003
+++ linux/arch/mips64/defconfig-sb1250-swarm	Thu Feb 20 11:18:54 2003
@@ -551,7 +551,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_REMOTE_DEBUG is not set
 # CONFIG_GDB_CONSOLE is not set
 # CONFIG_SB1XXX_CORELIS is not set
diff -Nru linux/arch/mips64/defconfig-decstation.orig linux/arch/mips64/defconfig-decstation
--- linux/arch/mips64/defconfig-decstation.orig	Thu Feb 13 11:34:55 2003
+++ linux/arch/mips64/defconfig-decstation	Thu Feb 20 11:18:54 2003
@@ -596,7 +596,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_REMOTE_DEBUG is not set
 # CONFIG_GDB_CONSOLE is not set
 # CONFIG_MAGIC_SYSRQ is not set
diff -Nru linux/arch/mips64/defconfig.orig linux/arch/mips64/defconfig
--- linux/arch/mips64/defconfig.orig	Thu Feb  6 13:24:02 2003
+++ linux/arch/mips64/defconfig	Thu Feb 20 11:18:54 2003
@@ -590,7 +590,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 
 #
diff -Nru linux/arch/mips64/defconfig-atlas.orig linux/arch/mips64/defconfig-atlas
--- linux/arch/mips64/defconfig-atlas.orig	Thu Feb  6 13:24:02 2003
+++ linux/arch/mips64/defconfig-atlas	Thu Feb 20 11:18:54 2003
@@ -584,7 +584,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips64/defconfig-ip22.orig linux/arch/mips64/defconfig-ip22
--- linux/arch/mips64/defconfig-ip22.orig	Thu Feb  6 13:24:02 2003
+++ linux/arch/mips64/defconfig-ip22	Thu Feb 20 11:18:54 2003
@@ -637,7 +637,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/arch/mips64/defconfig-ip27.orig linux/arch/mips64/defconfig-ip27
--- linux/arch/mips64/defconfig-ip27.orig	Thu Feb  6 13:24:02 2003
+++ linux/arch/mips64/defconfig-ip27	Thu Feb 20 11:18:54 2003
@@ -590,7 +590,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 
 #
diff -Nru linux/arch/mips64/defconfig-ip32.orig linux/arch/mips64/defconfig-ip32
--- linux/arch/mips64/defconfig-ip32.orig	Thu Feb  6 13:24:02 2003
+++ linux/arch/mips64/defconfig-ip32	Thu Feb 20 11:18:54 2003
@@ -609,7 +609,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_MIPS_UNCACHED=y
 
diff -Nru linux/arch/mips64/defconfig-sead.orig linux/arch/mips64/defconfig-sead
--- linux/arch/mips64/defconfig-sead.orig	Thu Feb  6 13:24:02 2003
+++ linux/arch/mips64/defconfig-sead	Thu Feb 20 11:18:54 2003
@@ -357,7 +357,7 @@
 # Kernel hacking
 #
 CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG is not set
+# CONFIG_RUNTIME_DEBUG is not set
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_MIPS_UNCACHED is not set
 
diff -Nru linux/drivers/char/Config.in.orig linux/drivers/char/Config.in
--- linux/drivers/char/Config.in.orig	Thu Feb 20 10:22:52 2003
+++ linux/drivers/char/Config.in	Thu Feb 20 10:49:23 2003
@@ -99,7 +99,7 @@
             if [ "$CONFIG_SIBYTE_SB1250_DUART_CONSOLE" = "y" ]; then
                define_bool CONFIG_SERIAL_CONSOLE y
             fi
-            if [ "$CONFIG_REMOTE_DEBUG" = "y" ]; then
+            if [ "$CONFIG_KGDB" = "y" ]; then
                define_bool CONFIG_SIBYTE_SB1250_DUART_NO_PORT_1 y
             fi
          fi
diff -Nru linux/drivers/sgi/char/sgiserial.c.orig linux/drivers/sgi/char/sgiserial.c
--- linux/drivers/sgi/char/sgiserial.c.orig	Wed Jan 29 15:33:19 2003
+++ linux/drivers/sgi/char/sgiserial.c	Thu Feb 20 10:49:23 2003
@@ -18,7 +18,7 @@
  *                                             any speed - not only 9600
  */
 
-#include <linux/config.h> /* for CONFIG_REMOTE_DEBUG */
+#include <linux/config.h> /* for CONFIG_KGDB */
 #include <linux/errno.h>
 #include <linux/signal.h>
 #include <linux/sched.h>
@@ -395,7 +395,7 @@
 	mark_bh(SERIAL_BH);
 }
 
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 extern void set_async_breakpoint(unsigned int epc);
 #endif
 
@@ -431,7 +431,7 @@
 	 * for remote target debugging and arch/sparc/kernel/sparc-stub.c
 	 * to see how all this works.
 	 */
-#ifdef CONFIG_REMOTE_DEBUG
+#ifdef CONFIG_KGDB
 	if((info->kgdb_channel) && (ch =='\003')) {
 		set_async_breakpoint(read_32bit_cp0_register(CP0_EPC));
 		goto clear_and_exit;
diff -Nru linux/drivers/sound/Config.in.orig linux/drivers/sound/Config.in
--- linux/drivers/sound/Config.in.orig	Thu Dec 12 10:35:13 2002
+++ linux/drivers/sound/Config.in	Thu Feb 20 10:49:23 2003
@@ -35,7 +35,7 @@
 dep_mbool    '    Creative SBLive! MIDI' CONFIG_MIDI_EMU10K1 $CONFIG_SOUND_EMU10K1 $CONFIG_EXPERIMENTAL
 dep_tristate '  Crystal SoundFusion (CS4280/461x)' CONFIG_SOUND_FUSION $CONFIG_SOUND $CONFIG_PCI
 dep_tristate '  Crystal Sound CS4281' CONFIG_SOUND_CS4281 $CONFIG_SOUND $CONFIG_PCI
-if [ "$CONFIG_SIBYTE_SB1250" = "y" -a "$CONFIG_REMOTE_DEBUG" != "y" ]; then
+if [ "$CONFIG_SIBYTE_SB1250" = "y" -a "$CONFIG_KGDB" != "y" ]; then
     dep_tristate '  Crystal Sound CS4297a (for Swarm)' CONFIG_SOUND_BCM_CS4297A $CONFIG_SOUND
 fi
 dep_tristate '  Ensoniq AudioPCI (ES1370)' CONFIG_SOUND_ES1370 $CONFIG_SOUND $CONFIG_PCI
diff -Nru linux/drivers/sound/trident.c.orig linux/drivers/sound/trident.c
--- linux/drivers/sound/trident.c.orig	Wed Jan 29 15:33:21 2003
+++ linux/drivers/sound/trident.c	Thu Feb 20 11:18:56 2003
@@ -66,7 +66,7 @@
  *      with nothing in between. 
  *  v0.14.10a
  *      June 21 2002 Muli Ben-Yehuda <mulix@actcom.co.il> 
- *      use a debug macro instead of #ifdef CONFIG_DEBUG, trim to 80 columns 
+ *      use a debug macro instead of #ifdef CONFIG_RUNTIME_DEBUG, trim to 80 columns 
  *      per line, use 'do {} while (0)' in statement macros. 
  *  v0.14.10
  *      June 6 2002 Lei Hu <Lei_hu@ali.com.tw>
diff -Nru linux/include/asm-mips/ddb5xxx/ddb5477.h.orig linux/include/asm-mips/ddb5xxx/ddb5477.h
--- linux/include/asm-mips/ddb5xxx/ddb5477.h.orig	Thu Dec 12 10:39:50 2002
+++ linux/include/asm-mips/ddb5xxx/ddb5477.h	Thu Feb 20 11:18:56 2003
@@ -329,7 +329,7 @@
  * debug routines
  */
 #ifndef __ASSEMBLY__
-#if defined(CONFIG_DEBUG)
+#if defined(CONFIG_RUNTIME_DEBUG)
 extern void vrc5477_show_pdar_regs(void);
 extern void vrc5477_show_pci_regs(void);
 extern void vrc5477_show_bar_regs(void);
diff -Nru linux/include/asm-mips/debug.h.orig linux/include/asm-mips/debug.h
--- linux/include/asm-mips/debug.h.orig	Thu Dec 12 10:42:53 2002
+++ linux/include/asm-mips/debug.h	Thu Feb 20 11:18:56 2003
@@ -1,5 +1,5 @@
 /*
- * Debug macros for run-time debugging.  Turned on/off with CONFIG_DEBUG option.
+ * Debug macros for run-time debugging.  Turned on/off with CONFIG_RUNTIME_DEBUG option.
  *
  * Copyright (C) 2001 MontaVista Software Inc.
  * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
@@ -17,13 +17,13 @@
 #include <linux/config.h>
 
 /*
- * run-time macros for catching spurious errors.  Eable CONFIG_DEBUG in
+ * run-time macros for catching spurious errors.  Eable CONFIG_RUNTIME_DEBUG in
  * kernel hacking config menu to use them.
  *
  * Use them as run-time debugging aid.  NEVER USE THEM AS ERROR HANDLING CODE!!!
  */
 
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_RUNTIME_DEBUG
 
 #include <linux/kernel.h>
 

--wTWi5aaYRw9ix9vO--

From ppopov@mvista.com Thu Feb 20 19:38:21 2003
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Subject: Re: Ramdisk image on flash.
From: Pete Popov <ppopov@mvista.com>
To: Tibor Polgar <tpolgar@freehandsystems.com>
Cc: krishnakumar@naturesoft.net, linux-mips@linux-mips.org
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On Thu, 2003-02-20 at 11:30, Tibor Polgar wrote:
> Pete Popov wrote:
> > 
> > On Wed, 2003-02-19 at 22:05, Krishnakumar. R wrote:
> > > Hi,
> > >
> > > Is there any way that I can keep
> > > a ramdisk image (containing the root filesystem)
> > > in a flash device and boot to it.
> > 
> > Yes, and other architectures have support for passing arguments to the
> > kernel that tell it where the ramdisk is. I don't know that we've done
> > that for MIPS, yet.  It wouldn't be too hard to do and maybe someone on
> > this list is already working on it (I think someone actually is working
> > on it and was preparing a patch for Ralf).
> 
> For having separate initrd and kernel load we also need an aware bootloader
> that knows where to find the ramdisk.   RedBoot, from what i read, seems to be
> i386 specific.    The Yamon i've patched "COULD" be made to do it.   

I haven't looked at how initrd support is really done in other arches. But I
think the kernel copies the initrd image from its original location to a
new location, so I don't see why the original location couldn't be in
flash.  You could just pass the physical address to the kernel, and have
the kernel load it from flash to ram. 
 
Pete


From msalter@redhat.com Thu Feb 20 19:41:20 2003
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Subject: Re: Ramdisk image on flash.
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>>>>> Tibor Polgar writes:

> Pete Popov wrote:
>> 
>> On Wed, 2003-02-19 at 22:05, Krishnakumar. R wrote:
>> > Hi,
>> >
>> > Is there any way that I can keep
>> > a ramdisk image (containing the root filesystem)
>> > in a flash device and boot to it.
>> 
>> Yes, and other architectures have support for passing arguments to the
>> kernel that tell it where the ramdisk is. I don't know that we've done
>> that for MIPS, yet.  It wouldn't be too hard to do and maybe someone on
>> this list is already working on it (I think someone actually is working
>> on it and was preparing a patch for Ralf).

> For having separate initrd and kernel load we also need an aware bootloader
> that knows where to find the ramdisk.   RedBoot, from what i read, seems to be
> i386 specific.

Not at all. RedBoot can be used to pass a command line to MIPS kernels. It
would be simple to add the passing of a ramdisk address. It already supports
ramdisks from ARM and SH kernels.

--Mark

From brian@murphy.dk Thu Feb 20 19:42:36 2003
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To: Tibor Polgar <tpolgar@freehandsystems.com>
CC: linux-mips@linux-mips.org
Subject: Re: Ramdisk image on flash.
References: <200302201135.09154.krishnakumar@naturesoft.net> <1045765647.30379.262.camel@zeus.mvista.com> <3E552CDF.ECD08EEF@freehandsystems.com>
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Tibor Polgar wrote:

>Pete Popov wrote:
>  
>
>>On Wed, 2003-02-19 at 22:05, Krishnakumar. R wrote:
>>    
>>
>>>Hi,
>>>
>>>Is there any way that I can keep
>>>a ramdisk image (containing the root filesystem)
>>>in a flash device and boot to it.
>>>      
>>>
>>Yes, and other architectures have support for passing arguments to the
>>kernel that tell it where the ramdisk is. I don't know that we've done
>>that for MIPS, yet.  It wouldn't be too hard to do and maybe someone on
>>this list is already working on it (I think someone actually is working
>>on it and was preparing a patch for Ralf).
>>    
>>
>
>For having separate initrd and kernel load we also need an aware bootloader
>that knows where to find the ramdisk.   RedBoot, from what i read, seems to be
>i386 specific.    The Yamon i've patched "COULD" be made to do it.   
>  
>
RedBoot is very portable and not at all i386 specific. I just ported it 
to the LASAT
boards I support in the linux kernel - it took a few days. When you have 
ported it
you almost instantly have a really nice embedded operating system too. 
Perhaps
you were confusing it with GRUB?

How this helps with ramdisks I don't know :-).

/Brian


From tpolgar@freehandsystems.com Thu Feb 20 20:01:39 2003
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Subject: Re: Ramdisk image on flash.
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> >> On Wed, 2003-02-19 at 22:05, Krishnakumar. R wrote:
> >> > Hi,
> >> >
> >> > Is there any way that I can keep
> >> > a ramdisk image (containing the root filesystem)
> >> > in a flash device and boot to it.
> >>
> >> Yes, and other architectures have support for passing arguments to the
> >> kernel that tell it where the ramdisk is. I don't know that we've done
> >> that for MIPS, yet.  It wouldn't be too hard to do and maybe someone on
> >> this list is already working on it (I think someone actually is working
> >> on it and was preparing a patch for Ralf).
> 
> > For having separate initrd and kernel load we also need an aware bootloader
> > that knows where to find the ramdisk.   RedBoot, from what i read, seems to be
> > i386 specific.
> 
> Not at all. RedBoot can be used to pass a command line to MIPS kernels. It
> would be simple to add the passing of a ramdisk address. It already supports
> ramdisks from ARM and SH kernels.

The original poster wanted a setup where the initrd was NOT part of the
kernel, which begs the question of how/where it would be put into flash so
something could load/uncompress it.   I'd love to have a way to decouple the
two so i wouldn't have to recompile the kernel when i change the root image,
but still not waste any space in flash.   I guess they could be written one
after the other and the loader is just given a "load map" of where each one
resides.   Would this satisfy Krishnakumar's requirements?

Tibor

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Subject: Re: Ramdisk image on flash.
From: Alan Cox <alan@lxorguk.ukuu.org.uk>
To: Tibor Polgar <tpolgar@freehandsystems.com>
Cc: Mark Salter <msalter@redhat.com>, krishnakumar@naturesoft.net,
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On Thu, 2003-02-20 at 20:01, Tibor Polgar wrote:
> The original poster wanted a setup where the initrd was NOT part of the
> kernel, which begs the question of how/where it would be put into flash so
> something could load/uncompress it.   I'd love to have a way to decouple the
> two so i wouldn't have to recompile the kernel when i change the root image,
> but still not waste any space in flash.   I guess they could be written one
> after the other and the loader is just given a "load map" of where each one
> resides.   Would this satisfy Krishnakumar's requirements?

You probably also want them aligned to 256Kbyte after or similar so that you
can drop the initrd into a seperate erase block on the flash. There are
people doing this. Its actually not hard to hardwire an address into the
initrd code.

Red Boot knows how to do this nicely and it may be a good approach. It does
all the work for this on the ipaq for example.

You can also run some kernels out of flash, I've helped someone get the x86
kernels running from flash for example.


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Subject: Re: Ramdisk image on flash.
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>>>>> Tibor Polgar writes:

>> >> On Wed, 2003-02-19 at 22:05, Krishnakumar. R wrote:
>> >> > Hi,
>> >> >
>> >> > Is there any way that I can keep
>> >> > a ramdisk image (containing the root filesystem)
>> >> > in a flash device and boot to it.
>> >>
>> >> Yes, and other architectures have support for passing arguments to the
>> >> kernel that tell it where the ramdisk is. I don't know that we've done
>> >> that for MIPS, yet.  It wouldn't be too hard to do and maybe someone on
>> >> this list is already working on it (I think someone actually is working
>> >> on it and was preparing a patch for Ralf).
>> 
>> > For having separate initrd and kernel load we also need an aware bootloader
>> > that knows where to find the ramdisk.   RedBoot, from what i read, seems to be
>> > i386 specific.
>> 
>> Not at all. RedBoot can be used to pass a command line to MIPS kernels. It
>> would be simple to add the passing of a ramdisk address. It already supports
>> ramdisks from ARM and SH kernels.

> The original poster wanted a setup where the initrd was NOT part of the
> kernel, which begs the question of how/where it would be put into flash so
> something could load/uncompress it.   I'd love to have a way to decouple the
> two so i wouldn't have to recompile the kernel when i change the root image,
> but still not waste any space in flash.   I guess they could be written one
> after the other and the loader is just given a "load map" of where each one
> resides.   Would this satisfy Krishnakumar's requirements?

The ARM kernel separates the two and RedBoot handles that. There are a
number of approaches. Typically, RedBoot is used to store the separate
images in flash. You can then have a script that loads them into memory
and starts the kernel. You could have a script grab the two images off
of a tftp server. etc.

--Mark



From dan@embeddededge.com Thu Feb 20 20:35:51 2003
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Subject: Re: Ramdisk image on flash.
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Tibor Polgar wrote:

> The original poster wanted a setup where the initrd was NOT part of the
> kernel, which begs the question of how/where it would be put into flash so
> something could load/uncompress it. 

I regularly do this with compressed kernels (zImage) on PowerPC, ARM, and
Alchemy MIPS processors.  I attach the compressed ramdisk to the zImage,
usually with "cat" and some shell scripts.  The zImage uncompressor code
will relocate the ramdisk (and potentially ask for additional kernel
command line parameters) and will tell the kernel where the ramdisk is
located.  I don't have to recompile the kernel to do this, and best of
all it doesn't require any special boot rom knowledge of the image.  It
works with all boot roms that can load a binary image into a memory location
(not everyone uses RedBoot) :-)  Another advantage is exactly the same
image that you repeatedly test by loading over tftp or with a debugger
can be written into flash memory without modification.  It removes the
need to actually have to write to flash to test the image that will be
eventually written to flash.  You just jump to the start of the image to
uncompress/relocate/initialize/jump to kernel regardless of where it
is located.

When using ramdisks from flash, you must relocate them to RAM because the
kernel thinks it can add the pages used by the compressed ramdisk into the
free pool once the ramdisk is uncompressed into the file system cache.  The
uncompressor code I mentioned above will test the start address of the
image and copy it to ram if necessary.

There are a couple of things keeping me from making a patch for the MIPS
kernel.  This method is in conflict with the "compiled in" ramdisk method,
and reserving the "bootmem" pages to ensure the kernel doesn't allocate the
compressed ramdisk pages before they are freed doesn't work well compared
to other architectures.  I'm still running on luck with this latter problem,
but I think I can fix it.  I don't know yet what to do about the conflicts
and assumptions made about the compiled-in ramdisk.

Thanks.


	-- Dan


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From: Jun Sun <jsun@mvista.com>
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	linux-mips@linux-mips.org, jsun@mvista.com
Subject: Re: Ramdisk image on flash.
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On Thu, Feb 20, 2003 at 12:01:49PM -0800, Tibor Polgar wrote:
> > >> On Wed, 2003-02-19 at 22:05, Krishnakumar. R wrote:
> > >> > Hi,
> > >> >
> > >> > Is there any way that I can keep
> > >> > a ramdisk image (containing the root filesystem)
> > >> > in a flash device and boot to it.
> > >>
> > >> Yes, and other architectures have support for passing arguments to the
> > >> kernel that tell it where the ramdisk is. I don't know that we've done
> > >> that for MIPS, yet.  It wouldn't be too hard to do and maybe someone on
> > >> this list is already working on it (I think someone actually is working
> > >> on it and was preparing a patch for Ralf).
> > 
> > > For having separate initrd and kernel load we also need an aware bootloader
> > > that knows where to find the ramdisk.   RedBoot, from what i read, seems to be
> > > i386 specific.
> > 
> > Not at all. RedBoot can be used to pass a command line to MIPS kernels. It
> > would be simple to add the passing of a ramdisk address. It already supports
> > ramdisks from ARM and SH kernels.
> 
> The original poster wanted a setup where the initrd was NOT part of the
> kernel, which begs the question of how/where it would be put into flash so
> something could load/uncompress it.   I'd love to have a way to decouple the
> two so i wouldn't have to recompile the kernel when i change the root image,
> but still not waste any space in flash.   I guess they could be written one
> after the other and the loader is just given a "load map" of where each one
> resides.   Would this satisfy Krishnakumar's requirements?
>

For the sanity of kernel, I also favor leaving ramfs root outside kernel.
It would be nice if we can do the following :

1) create kernel ELF as normal
2) outside the kernel, create .o file that is ramfs root
3) outside the kernel, we use a separate tool/program that combines
   1) and 2) into a new ELF file.  The entry point of the new ELF file
   would append ramfs parameters (such as "initrd=xxxx") to the args
   and then jump to kernel_entry.

There are some difficulties, but looks very possible.

Jun

From jsun@orion.mvista.com Thu Feb 20 20:45:12 2003
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From: Jun Sun <jsun@mvista.com>
To: Dan Malek <dan@embeddededge.com>
Cc: Tibor Polgar <tpolgar@freehandsystems.com>,
	Mark Salter <msalter@redhat.com>, krishnakumar@naturesoft.net,
	linux-mips@linux-mips.org, jsun@mvista.com
Subject: Re: Ramdisk image on flash.
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On Thu, Feb 20, 2003 at 03:35:15PM -0500, Dan Malek wrote:
> Tibor Polgar wrote:
> 
> > The original poster wanted a setup where the initrd was NOT part of the
> > kernel, which begs the question of how/where it would be put into flash so
> > something could load/uncompress it. 
> 
> I regularly do this with compressed kernels (zImage) on PowerPC, ARM, and
> Alchemy MIPS processors.  I attach the compressed ramdisk to the zImage,
> usually with "cat" and some shell scripts.  The zImage uncompressor code
> will relocate the ramdisk (and potentially ask for additional kernel
> command line parameters) and will tell the kernel where the ramdisk is
> located.  I don't have to recompile the kernel to do this, and best of
> all it doesn't require any special boot rom knowledge of the image.  It
> works with all boot roms that can load a binary image into a memory location
> (not everyone uses RedBoot) :-)  Another advantage is exactly the same
> image that you repeatedly test by loading over tftp or with a debugger
> can be written into flash memory without modification.  It removes the
> need to actually have to write to flash to test the image that will be
> eventually written to flash.  You just jump to the start of the image to
> uncompress/relocate/initialize/jump to kernel regardless of where it
> is located.
>

Looks like you have the solution that I called for. :-)
 
> 
> There are a couple of things keeping me from making a patch for the MIPS
> kernel.  This method is in conflict with the "compiled in" ramdisk method,
> and reserving the "bootmem" pages to ensure the kernel doesn't allocate the
> compressed ramdisk pages before they are freed doesn't work well compared
> to other architectures.  I'm still running on luck with this latter problem,
> but I think I can fix it.  I don't know yet what to do about the conflicts
> and assumptions made about the compiled-in ramdisk.
>

The compiled-in one uses a configure option.  Perhaps you can rely on that
to differentiate?  Once the new method get stable, I am in favor to 
covert all embedded ramdisk to the new one.

Jun

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Anybody would object this?  It allows one to override
CROSS_COMPILE from command line or top-level Makefile.

Jun


--ULyIDA2m8JTe+TiX
Content-Type: text/plain; charset=us-ascii
Content-Disposition: attachment; filename="030220.b-2.4-allow-CROSS_COMPILE-override.patch"

diff -Nru linux/arch/mips/Makefile.orig linux/arch/mips/Makefile
--- linux/arch/mips/Makefile.orig	Thu Feb 20 10:49:18 2003
+++ linux/arch/mips/Makefile	Thu Feb 20 12:18:53 2003
@@ -23,7 +23,9 @@
 endif
 
 ifdef CONFIG_CROSSCOMPILE
-CROSS_COMPILE	= $(tool-prefix)
+  ifndef CROSS_COMPILE
+    CROSS_COMPILE	= $(tool-prefix)
+  endif
 endif
 
 #

--ULyIDA2m8JTe+TiX--

From ppopov@mvista.com Thu Feb 20 20:59:53 2003
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Subject: Re: Ramdisk image on flash.
From: Pete Popov <ppopov@mvista.com>
To: Jun Sun <jsun@mvista.com>
Cc: Dan Malek <dan@embeddededge.com>,
	Tibor Polgar <tpolgar@freehandsystems.com>,
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On Thu, 2003-02-20 at 12:44, Jun Sun wrote:
> On Thu, Feb 20, 2003 at 03:35:15PM -0500, Dan Malek wrote:
> > Tibor Polgar wrote:
> > 
> > > The original poster wanted a setup where the initrd was NOT part of the
> > > kernel, which begs the question of how/where it would be put into flash so
> > > something could load/uncompress it. 
> > 
> > I regularly do this with compressed kernels (zImage) on PowerPC, ARM, and
> > Alchemy MIPS processors.  I attach the compressed ramdisk to the zImage,
> > usually with "cat" and some shell scripts.  The zImage uncompressor code
> > will relocate the ramdisk (and potentially ask for additional kernel
> > command line parameters) and will tell the kernel where the ramdisk is
> > located.  I don't have to recompile the kernel to do this, and best of
> > all it doesn't require any special boot rom knowledge of the image.  It
> > works with all boot roms that can load a binary image into a memory location
> > (not everyone uses RedBoot) :-)  Another advantage is exactly the same
> > image that you repeatedly test by loading over tftp or with a debugger
> > can be written into flash memory without modification.  It removes the
> > need to actually have to write to flash to test the image that will be
> > eventually written to flash.  You just jump to the start of the image to
> > uncompress/relocate/initialize/jump to kernel regardless of where it
> > is located.
> >
> 
> Looks like you have the solution that I called for. :-)
>  
> > 
> > There are a couple of things keeping me from making a patch for the MIPS
> > kernel.  This method is in conflict with the "compiled in" ramdisk method,
> > and reserving the "bootmem" pages to ensure the kernel doesn't allocate the
> > compressed ramdisk pages before they are freed doesn't work well compared
> > to other architectures.  I'm still running on luck with this latter problem,
> > but I think I can fix it.  I don't know yet what to do about the conflicts
> > and assumptions made about the compiled-in ramdisk.
> >
> 
> The compiled-in one uses a configure option.  Perhaps you can rely on that
> to differentiate?  Once the new method get stable, I am in favor to 
> covert all embedded ramdisk to the new one.

Me too. Keep in mind too that there is no "standard" zImage support in
mips right now.  I'm not sure what Dan is using for the zImage support,
that but that's another patch that needs to make its way in the source
tree.  I added zImage support in the form of an arch/mips/zboot
directory and supporting files, but that never made it in linux-mips.org
because it added yet another copy of zlib (my argument was, so what, all
the other arches do it).

Pete


From agx@sigxcpu.org Thu Feb 20 21:00:52 2003
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To: linux-mips@linux-mips.org
Subject: Re: Ramdisk image on flash.
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On Thu, Feb 20, 2003 at 10:27:27AM -0800, Pete Popov wrote:
> Yes, and other architectures have support for passing arguments to the
> kernel that tell it where the ramdisk is. I don't know that we've done
We're using a patch for the debian kernels that allows to pass the
initrd's loadaddress and size on the kernel's command line. If this is of
some use I can send a patch.
 -- Guido

From agx@sigxcpu.org Thu Feb 20 21:10:38 2003
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On Thu, Feb 20, 2003 at 12:37:32PM -0800, Jun Sun wrote:
> 1) create kernel ELF as normal
> 2) outside the kernel, create .o file that is ramfs root
> 3) outside the kernel, we use a separate tool/program that combines
>    1) and 2) into a new ELF file.  The entry point of the new ELF file
>    would append ramfs parameters (such as "initrd=xxxx") to the args
>    and then jump to kernel_entry.
This is basically what we do for IP22 in debian. We embed kernel and
initrd together with a small loader into one ELF executable. The prom
tftboots and starts the loader. The loader then moves the kernel to it's
loadaddres, puts the initrd to an appropriate address and jumps into
the kernel passing all the necessary args.
 -- Guido

From brian@murphy.dk Thu Feb 20 21:15:12 2003
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Jun Sun wrote:

>Anybody would object this?  It allows one to override
>
Why not but this is less messy:

--- arch/mips/Makefile  13 Dec 2002 23:41:09 -0000      1.1.1.8
+++ arch/mips/Makefile  20 Feb 2003 21:10:30 -0000
@@ -23,7 +23,7 @@
 endif
 
 ifdef CONFIG_CROSSCOMPILE
-CROSS_COMPILE  = $(tool-prefix)
+CROSS_COMPILE ?= $(tool-prefix)
 endif
 
 #

/Brian


From jsun@orion.mvista.com Thu Feb 20 21:23:15 2003
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From: Jun Sun <jsun@mvista.com>
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Is this allowed?  Can't find any such usage in kernel other
than the worrisome comment below:

arch/arm/Makefile:# Grr, ?= doesn't work as all the other assignment operators do.  Make bug?


Jun

On Thu, Feb 20, 2003 at 10:15:06PM +0100, Brian Murphy wrote:
> Jun Sun wrote:
> 
> >Anybody would object this?  It allows one to override
> >
> Why not but this is less messy:
> 
> --- arch/mips/Makefile  13 Dec 2002 23:41:09 -0000      1.1.1.8
> +++ arch/mips/Makefile  20 Feb 2003 21:10:30 -0000
> @@ -23,7 +23,7 @@
>  endif
>  
>  ifdef CONFIG_CROSSCOMPILE
> -CROSS_COMPILE  = $(tool-prefix)
> +CROSS_COMPILE ?= $(tool-prefix)
>  endif
>  
>  #
> 
> /Brian
> 

From dan@embeddededge.com Thu Feb 20 21:25:14 2003
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Subject: Re: Ramdisk image on flash.
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Pete Popov wrote:

> Me too. Keep in mind too that there is no "standard" zImage support in
> mips right now.  I'm not sure what Dan is using for the zImage support,

I took what you had started, copied lots of stuff from the same thing
I did for PowerPC a long time ago, and actually improved on that (I think) :-).
It seems every Alchemy processor I work with has a different boot rom,
so like PowerPC this gives us the ability to also format kernel calling
conventions in addition to zImage/initrd booting and flexibility.

> that but that's another patch that needs to make its way in the source
> tree.

I'll get it there :-)

> ....  I added zImage support in the form of an arch/mips/zboot
> directory and supporting files, but that never made it in linux-mips.org
> because it added yet another copy of zlib (my argument was, so what, all
> the other arches do it).

Yeah, I know about zlib.  I have "fixed" this more than once on PowerPC
to use the kernel zlib, but it still hasn't stuck in the source tree :-)
I'll try to get it right when I do a MIPS patch.

Thanks.


	-- Dan


From dan@embeddededge.com Thu Feb 20 21:32:42 2003
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Subject: Re: Ramdisk image on flash.
References: <200302201135.09154.krishnakumar@naturesoft.net> <1045765647.30379.262.camel@zeus.mvista.com> <20030220205911.GB27240@bogon.ms20.nix>
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Guido Guenther wrote:

> We're using a patch for the debian kernels that allows to pass the
> initrd's loadaddress and size on the kernel's command line. If this is of
> some use I can send a patch.

Thanks.  I think that patch has been posted in the past because I am
using it in what I am doing.  I would actually like to pass this as
enviornment variables, since the command lines are getting quite long
in some cases and IMHO should really reflect general driver/kernel
options.


	-- Dan



From brian@murphy.dk Thu Feb 20 21:35:33 2003
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Jun Sun wrote:

>Is this allowed?  Can't find any such usage in kernel other
>than the worrisome comment below:
>
>arch/arm/Makefile:# Grr, ?= doesn't work as all the other assignment operators do.  Make bug?
>  
>
>  
>
It worked for me when I tested the patch, at least for this simple case.
Might have something to do with the make version, when was the comment
written?

brm@brian:~$ make -v
GNU Make version 3.79.1, by Richard Stallman and Roland McGrath.

/Brian


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Subject: Re: [PATCH] allow CROSS_COMPILE override
From: Pete Popov <ppopov@mvista.com>
To: Brian Murphy <brian@murphy.dk>
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On Thu, 2003-02-20 at 13:35, Brian Murphy wrote:
> Jun Sun wrote:
> 
> >Is this allowed?  Can't find any such usage in kernel other
> >than the worrisome comment below:
> >
> >arch/arm/Makefile:# Grr, ?= doesn't work as all the other assignment operators do.  Make bug?
> >  
> >
> >  
> >
> It worked for me when I tested the patch, at least for this simple case.
> Might have something to do with the make version, when was the comment
> written?
> 
> brm@brian:~$ make -v
> GNU Make version 3.79.1, by Richard Stallman and Roland McGrath.

I know for a fact that this syntax works for me on RH7.3 because we use
it heavily in a bunch of tools makefiles.

Pete


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Date: Thu, 20 Feb 2003 16:57:26 -0500
From: Daniel Jacobowitz <dan@debian.org>
To: Jun Sun <jsun@mvista.com>
Cc: linux-mips@linux-mips.org
Subject: Re: [PATCH] allow CROSS_COMPILE override
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On Thu, Feb 20, 2003 at 12:47:03PM -0800, Jun Sun wrote:
> Anybody would object this?  It allows one to override
> CROSS_COMPILE from command line or top-level Makefile.
> 
> Jun
> 

Silly question: why does this matter if CROSS_COMPILE is on the command
line?  Command line definitions override anything in the makefile.  Is
it falling off the command line in a recursive make?

> diff -Nru linux/arch/mips/Makefile.orig linux/arch/mips/Makefile
> --- linux/arch/mips/Makefile.orig	Thu Feb 20 10:49:18 2003
> +++ linux/arch/mips/Makefile	Thu Feb 20 12:18:53 2003
> @@ -23,7 +23,9 @@
>  endif
>  
>  ifdef CONFIG_CROSSCOMPILE
> -CROSS_COMPILE	= $(tool-prefix)
> +  ifndef CROSS_COMPILE
> +    CROSS_COMPILE	= $(tool-prefix)
> +  endif
>  endif
>  
>  #


-- 
Daniel Jacobowitz
MontaVista Software                         Debian GNU/Linux Developer

From brian@murphy.dk Thu Feb 20 22:03:44 2003
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Jun Sun wrote:

>Is this allowed?  Can't find any such usage in kernel other
>than the worrisome comment below:
>
>arch/arm/Makefile:# Grr, ?= doesn't work as all the other assignment operators do.  Make bug?
>
>
>  
>
The arm code does this:

# Only set INCDIR if its not already defined above
# Grr, ?= doesn't work as all the other assignment operators do.  Make bug?
ifeq ($(origin INCDIR), undefined)
INCDIR          := $(MACHINE)
endif

where the make docs say:

INCDIR ?= $(MACHINE)

is the same as

ifeq ($(origin INCDIR), undefined)
INCDIR          = $(MACHINE)
endif

which means INCDIR will reflect changes to MACHINE.
The := form sets INCDIR once and for all. What do you want?
I can't see that this should be a problem in the arm makefile.
Perhaps I'm missing something.

/Brian


From brian@murphy.dk Thu Feb 20 22:07:32 2003
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Daniel Jacobowitz wrote:

>Silly question: why does this matter if CROSS_COMPILE is on the command
>line?  Command line definitions override anything in the makefile.  Is
>it falling off the command line in a recursive make?
>  
>
You need ?= to allow the define in the top level makefile to override 
that in
the sub-makefile. You also need it if you want to get the value from an
environment variable and not from something like this:

make CROSS_COMPILE=xxx

which is the only case where it works now.

/Brian



From kwalker@broadcom.com Thu Feb 20 22:44:07 2003
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From: "Kip Walker" <kwalker@broadcom.com>
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To: "Ralf Baechle" <ralf@linux-mips.org>, linux-mips@linux-mips.org
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I just discovered that my compiler is scheduling the code in the asm
blocks in unaligned.c *before* the 'goto sigbus'.  My gcc is 3.1.1 with
some almost certainly unrelated local mods.

Anyway, is there a reason these aren't marked as volatile?  The gcc docs
have the scary comment "You can prevent an `asm' instruction from being
deleted, MOVED SIGNIFICANTLY, or combined, by writing the keyword
`volatile' after the`asm'."

Here's an example, for the lw_op case in the mips64 kernel:
---------
	case lw_op:
		if (verify_area(VERIFY_READ, addr, 4))
			goto sigbus;

		__asm__(
			"1:\tlwl\t%0, (%2)\n"
			"2:\tlwr\t%0, 3(%2)\n\t"
---------

Compiled with normal mips64 build flags (for SB1) was turned into:
---------
	### verify_area
        ld      $2,2400($28)
        daddu   $3,$5,4
        or      $3,$5,$3
        and     $2,$2,$3
        li      $4,-14                  # 0xfffffffffffffff2
        movz    $4,$0,$2
...
	### the asm code
        1:      lwl     $9, ($5)
2:      lwr     $9, 3($5)
        li      $3, 0
3:      .section        .fixup,"ax"
        4:      li      $3, -14
        j       3b

...
	### finally, the verify_area result check
        beq     $4,$0,$L1131

---------

Kip


From jsun@orion.mvista.com Fri Feb 21 00:08:18 2003
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From: Jun Sun <jsun@mvista.com>
To: Brian Murphy <brian@murphy.dk>
Cc: linux-mips@linux-mips.org, jsun@mvista.com
Subject: Re: [PATCH] allow CROSS_COMPILE override
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On Thu, Feb 20, 2003 at 11:03:38PM +0100, Brian Murphy wrote:
> Jun Sun wrote:
> 
> >Is this allowed?  Can't find any such usage in kernel other
> >than the worrisome comment below:
> >
> >arch/arm/Makefile:# Grr, ?= doesn't work as all the other assignment operators do.  Make bug?
> >
> >
> >  
> >
> The arm code does this:
> 
> # Only set INCDIR if its not already defined above
> # Grr, ?= doesn't work as all the other assignment operators do.  Make bug?
> ifeq ($(origin INCDIR), undefined)
> INCDIR          := $(MACHINE)
> endif
> 
> where the make docs say:
> 
> INCDIR ?= $(MACHINE)
> 
> is the same as
> 
> ifeq ($(origin INCDIR), undefined)
> INCDIR          = $(MACHINE)
> endif
> 
> which means INCDIR will reflect changes to MACHINE.
> The := form sets INCDIR once and for all. What do you want?

':=' is fine, as long as "?=" is deemed appropriate for kernel and hackers.

Jun

From ralf@linux-mips.org Fri Feb 21 01:10:04 2003
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From: Ralf Baechle <ralf@linux-mips.org>
To: Kip Walker <kwalker@broadcom.com>
Cc: linux-mips@linux-mips.org
Subject: Re: __volatile__ for asms in unaligned.c
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On Thu, Feb 20, 2003 at 02:43:58PM -0800, Kip Walker wrote:

> Anyway, is there a reason these aren't marked as volatile?  The gcc docs
> have the scary comment "You can prevent an `asm' instruction from being
> deleted, MOVED SIGNIFICANTLY, or combined, by writing the keyword
> `volatile' after the`asm'."

It's a valid code movement by gcc's no longer really new basic block
reordering thing.  I admit I'm pretty surprised this wasn't found before.

So I just added the volatiles.

  Ralf

From anemo@mba.sphere.ne.jp Fri Feb 21 02:20:23 2003
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Date: Fri, 21 Feb 2003 11:24:56 +0900 (JST)
Message-Id: <20030221.112456.41627052.nemoto@toshiba-tops.co.jp>
To: krishnakumar@naturesoft.net
Cc: linux-mips@linux-mips.org, ralf@linux-mips.org
Subject: Re: Ramdisk image on flash.
From: Atsushi Nemoto <anemo@mba.sphere.ne.jp>
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>>>>> On Thu, 20 Feb 2003 11:35:09 +0530, "Krishnakumar. R" <krishnakumar@naturesoft.net> said:
krishnakumar> Is there any way that I can keep a ramdisk image
krishnakumar> (containing the root filesystem) in a flash device and
krishnakumar> boot to it.

If your flash device can be accessed as MTD block device, you can use
"root=/dev/mtdblockN load_ramdisk=1" (and also "ramdisk_start=N") boot
option to load your (compressed) ramdisk image from the flash device.

This method needs following patch (for 2.4.20).  Also, this method
does not need initrd support or bootloader support.

--- linux-2.4.20/init/do_mounts.c	Wed Dec 25 15:30:02 2002
+++ linux/init/do_mounts.c	Wed Dec 25 16:56:40 2002
@@ -883,6 +883,18 @@
 		}
 	} else if (is_floppy && rd_doload && rd_load_disk(0))
 		ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
+#if defined(CONFIG_MTD_BLOCK) || defined(CONFIG_MTD_BLOCK_RO)
+#ifndef MTD_BLOCK_MAJOR
+#define MTD_BLOCK_MAJOR 31
+#endif
+	else if (MAJOR(ROOT_DEV) == MTD_BLOCK_MAJOR && rd_doload) {
+#ifdef CONFIG_BLK_DEV_RAM
+		create_dev("/dev/ram", MKDEV(RAMDISK_MAJOR, 0), NULL);
+#endif
+		if (rd_load_image("/dev/root"))
+			ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
+	}
+#endif
 	mount_root();
 out:
 	sys_umount("/dev", 0);
---
Atsushi Nemoto

From ralf@linux-mips.org Fri Feb 21 02:46:43 2003
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From: Ralf Baechle <ralf@linux-mips.org>
To: Andrew Clausen <clausen@melbourne.sgi.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Subject: Re: [patch] sys32_sysinfo broken on mips64 and ia64
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On Thu, Feb 20, 2003 at 11:26:55AM +1100, Andrew Clausen wrote:

> The sys32_sysinfo() calls are currently using an old version of
> "struct sysinfo32", in both the mips64 and ia64 ports.
> 
> busybox's init can't cope with the bogus output on my Origin 200,
> so this bug prevents the Debian installer from bootstrapping.
> 
> This is the mips64 version of the patch.  A very similar patch
> could be constructed for ia64... it's very obvious what to do,
> so I'll leave it to you ia64 people :)

Sigh...  Each time I curse some certain person for copying code from the
ia64 compat code, it was of abysimal quality back in at that time -
unlike the Sparc code.

Will apply ...

  Ralf

From ralf@linux-mips.org Fri Feb 21 03:12:53 2003
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From: Ralf Baechle <ralf@linux-mips.org>
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Cc: Linux-MIPS <linux-mips@linux-mips.org>
Subject: Re: [patch] bogus ramdisk sanity check on ip27
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On Thu, Feb 20, 2003 at 11:38:39AM +1100, Andrew Clausen wrote:

> There is currently a check that the ramdisk image resides at a sane
> memory address, below "max_pfn".  However, max_pfn isn't initialized
> (and apparently isn't relevant) for ip27.  The only assignments to
> max_pfn lie inside #ifndef CONFIG_SGI_IP27.
> 
> Therefore, this test is bogus, so here's a patch to
> #ifndef CONFIG_SGI_IP27 it.
> 
> This patch applies cleanly on 2.4.x and 2.5.x (at a different offset).

No winner in a beauty contest but I think it's ok until we sort the
underlying NUMA issues which we'd have to do anyway at some point -
more ccNUMA stuff will come eventually ...

  Ralf

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From: Yoichi Yuasa <yoichi_yuasa@montavista.co.jp>
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Cc: yoichi_yuasa@montavista.co.jp, linux-mips@linux-mips.org,
	matsu@megasolution.jp, jsun@mvista.com
Subject: [patch] vr41xx giu bug fix
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This is a multi-part message in MIME format.

--Multipart_Fri__21_Feb_2003_13:14:01_+0900_0824f3b0
Content-Type: text/plain; charset=US-ASCII
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Hi Ralf,

I got the report that a problem is in giu.c of vr41xx.
These patches to the problem are appended to this e-mail.

Please apply these patches to CVS tree.

Yoichi

--Multipart_Fri__21_Feb_2003_13:14:01_+0900_0824f3b0
Content-Type: text/plain;
 name="vr41xx-giu-24.diff"
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 filename="vr41xx-giu-24.diff"
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diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/vr41xx/common/giu.c linux/arch/mips/vr41xx/common/giu.c
--- linux.orig/arch/mips/vr41xx/common/giu.c	Fri Oct  4 01:58:02 2002
+++ linux/arch/mips/vr41xx/common/giu.c	Fri Feb 21 12:33:33 2003
@@ -108,9 +108,9 @@
 void vr41xx_clear_giuint(int pin)
 {
 	if (pin < 16)
-		write_giuint(GIUINTSTATL, (u16)1 << pin);
+		write_giuint((u16)1 << pin, GIUINTSTATL);
 	else
-		write_giuint(GIUINTSTATH, (u16)1 << (pin - 16));
+		write_giuint((u16)1 << (pin - 16), GIUINTSTATH);
 }
 
 void vr41xx_set_irq_trigger(int pin, int trigger, int hold)

--Multipart_Fri__21_Feb_2003_13:14:01_+0900_0824f3b0
Content-Type: text/plain;
 name="vr41xx-giu-25.diff"
Content-Disposition: attachment;
 filename="vr41xx-giu-25.diff"
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diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/vr41xx/common/giu.c linux/arch/mips/vr41xx/common/giu.c
--- linux.orig/arch/mips/vr41xx/common/giu.c	Fri Oct  4 10:52:37 2002
+++ linux/arch/mips/vr41xx/common/giu.c	Fri Feb 21 13:05:14 2003
@@ -108,9 +108,9 @@
 void vr41xx_clear_giuint(int pin)
 {
 	if (pin < 16)
-		write_giuint(GIUINTSTATL, (u16)1 << pin);
+		write_giuint((u16)1 << pin, GIUINTSTATL);
 	else
-		write_giuint(GIUINTSTATH, (u16)1 << (pin - 16));
+		write_giuint((u16)1 << (pin - 16), GIUINTSTATH);
 }
 
 void vr41xx_set_irq_trigger(int pin, int trigger, int hold)

--Multipart_Fri__21_Feb_2003_13:14:01_+0900_0824f3b0--

From ipv6_san@rediffmail.com Fri Feb 21 11:39:22 2003
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Well, i have a Linux machine i686 and an IAD based on MIPS 32-bit 
arch,
both enabled with IPv6.

Linux with 2.4.18-14 based on i686 configured as...
# ip -6 addr add 3ff3:1234::1/64 dev eth0
# ip -6 route add 3ffe:1234/64 dev eth0

IAD with 2.4.5-pre1 kernel based on MIPS 32-bit core configured 
as...
# ip -6 addr add 3ff3:1234::2/64 dev epmac1
# ip -6 route add 3ff3:1234/64dev epmac1
--------------------------------------------------
My IAD has a Flash, where the Linux kernel and the filesystem
images are present.
Flash size = 16MB
Filesystem is jffs2
Generated partitions are...
yamon partition size:2048 Kb
kernel partition size: 1024 Kb
rw image size: 10624 Kb
env partition size:128 Kb

Total: 13824 Kb
------------------------------

These two are connected in a IPv4 based LAN.
When i try to ping6 from Linux machine to the IAD,
my IAD hangs and generates a kernel OOps message.
Below is the snap shot of the message...

Following message is produced at the IAD terminal.....

# Unable to handle kernel paging request at virtual address 
00000000, epc == 802
4ce74, ra == 802592a8
Oops in fault.c:do_page_fault, line 172:
$0 : 00000000 1000fc00 8024ce70 8032bbbc
$4 : 00000000 83cbf120 00000000 83cbf17c
$8 : 00000001 0000000f 8030e000 00000003
$12: 00000416 83f69e18 00000000 8030914b
$16: fffffffd 00000000 00000018 c0026d20
$20: 81120dc0 83cbf17c 83cbf17c 00000000
$24: 00000001 2ac1d440
$28: 80106000 80107d78 83cbf120 802592a8
epc   : 8024ce74
Status: 1000fc03
Cause : 00800008
Process swapper (pid: 0, stackpage=80106000)
Stack: 00000008 00000000 83a00000 00000000 fd010018 83a11860 
8031fd50 00000000
        00000000 8024ca40 00000000 0000002c 8e8e1dac 00000000 
fffffffd 83cbf120
        00000000 83cbf17c c0026d20 00000000 00000000 00000000 
800e1d38 80259b0c
        83a53346 801efd1c 83a53346 839e92a0 00000000 83a118e0 
83a53346 00000000
        8022a1ec 80229e90 00000001 83cbf120 0000000e 8008a0e0 
04000000 00000000
        801f9384 ...
Call Trace: [<8024ca40>] [<c0026d20>] [<80259b0c>] [<801efd1c>] 
[<8022a1ec>] [<8
0229e90>] [<801f9384>] [<8024c97c>] [<8011f6b0>] [<8011f214>] 
[<801f5674>] [<801
1af14>] [<8011f73c>] [<8011ad88>] [<8011aacc>] [<8011aacc>] 
[<801117cc>] [<80111
7cc>] [<8010a478>] [<8010dee8>] [<80107fe0>] [<80125700>] 
[<801117cc>] [<8010600
0>] [<80107f60>] [<8010870c>] [<801086f0>] [<80108a78>] 
[<80115470>] [<802bfffc>
] [<802b7d30>] [<802c0b48>] [<801005e8>]
Code: 03e00008  27bd0030  00803021 <8cc50000> 30a400e0  10800003  
240300e0  1483
0034  24020001

Suggestions/Tips are welcome.

-San
-------------------------------------




From ashish.anand@inspiretech.com Fri Feb 21 11:59:53 2003
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From: "Ashish anand" <ashish.anand@inspiretech.com>
To: linux-mips@linux-mips.org
Subject: wired tlb entries and global bit..
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A small question..

1.my understanding of wired tlb entries mean set of address translations
that i always want to be present throughout the system is on ,
irrespective of asid's/tlb flush , examplesake pci io/mem window ...is
this right?

2.can i acheive the same by using the global bit from entrylo0 and
entrylo1.

Best Regards,
Ashish Anand



From macro@ds2.pg.gda.pl Fri Feb 21 12:11:37 2003
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From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Ralf Baechle <ralf@linux-mips.org>
cc: linux-mips@linux-mips.org
Subject: Re: [patch] Cobalt IRQ handler CP0 interlock?
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On Thu, 20 Feb 2003, Ralf Baechle wrote:

> >  Does Cobalt have a processor that implements its pipeline differently or
> > interlocks on CP0 loads?  If not, I'll apply the following fix. 
> 
> Mfc0 doesn't need a nops on any R4000 class CPU I know of.

 Well, my MIPS R4k manual is vague on this matter and my IDT software
manual for R3k, R4k, R5k is even explicit on the load delay slot of mfc0. 
But a run-time test proves otherwise. 

 I stand corrected then unless someone finds a counter-example.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From ralf@linux-mips.org Fri Feb 21 12:23:21 2003
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Date: Fri, 21 Feb 2003 13:23:14 +0100
From: Ralf Baechle <ralf@linux-mips.org>
To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Cc: linux-mips@linux-mips.org
Subject: Re: [patch] Cobalt IRQ handler CP0 interlock?
Message-ID: <20030221132314.A28300@linux-mips.org>
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On Fri, Feb 21, 2003 at 01:11:58PM +0100, Maciej W. Rozycki wrote:

> > >  Does Cobalt have a processor that implements its pipeline differently or
> > > interlocks on CP0 loads?  If not, I'll apply the following fix. 
> > 
> > Mfc0 doesn't need a nops on any R4000 class CPU I know of.
> 
>  Well, my MIPS R4k manual is vague on this matter and my IDT software
> manual for R3k, R4k, R5k is even explicit on the load delay slot of mfc0. 
> But a run-time test proves otherwise. 
> 
>  I stand corrected then unless someone finds a counter-example.

All I can say it's working fine like this since 1984 for R4000 class CPUs.

  Ralf

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On Thu, 20 Feb 2003 kwalker@linux-mips.org wrote:

> Modified files:
> 	include/asm-mips64: Tag: linux_2_4 a.out.h elf.h processor.h 
> 	arch/mips64/kernel: Tag: linux_2_4 process.c signal.c 
> 
> Log message:
> 	Represent ABI (o32,n32,n64) in thread mflags using 2 bits:
> 	MF_32BIT_REGS, MF_32BIT_ADDR.

 Why do you assume no ABI set for ELF32 means n32?  Historically it means
o32 and arch/mips64/kernel/binfmt_elfo32.c treats it as such.  Also a
brief study of binutils reveals the interpretation is the same for IRIX
which does not handle the EF_MIPS_ABI mask. 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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Date: Fri, 21 Feb 2003 13:41:16 +0100 (MET)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Ralf Baechle <ralf@linux-mips.org>
cc: linux-mips@linux-mips.org
Subject: Re: [patch] Cobalt IRQ handler CP0 interlock?
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On Fri, 21 Feb 2003, Ralf Baechle wrote:

> All I can say it's working fine like this since 1984 for R4000 class CPUs.

 You meant something like "since 1991", I suppose.  Even R2000 is there
since 1986 only. ;-)

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From ralf@linux-mips.org Fri Feb 21 12:46:23 2003
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From: Ralf Baechle <ralf@linux-mips.org>
To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
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Subject: Re: [patch] Cobalt IRQ handler CP0 interlock?
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On Fri, Feb 21, 2003 at 01:41:16PM +0100, Maciej W. Rozycki wrote:

> > All I can say it's working fine like this since 1984 for R4000 class CPUs.
> 
>  You meant something like "since 1991", I suppose.  Even R2000 is there
> since 1986 only. ;-)

Typo.  I actually meant 1994, the year in which I started working with MIPS
and on Linux/MIPS at that time on R4400.

  Ralf

From ncrook@micron.com Fri Feb 21 13:42:56 2003
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To: "'Ashish anand'" <ashish.anand@inspiretech.com>,
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Subject: RE: wired tlb entries and global bit..
Date: Fri, 21 Feb 2003 06:42:42 -0700
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>>A small question..
>>
>>1.my understanding of wired tlb entries mean set of address translations
>>that i always want to be present throughout the system is on ,
>>irrespective of asid's/tlb flush , examplesake pci io/mem window ...is
>>this right?
>>
>>2.can i acheive the same by using the global bit from entrylo0 and
>>entrylo1.
>>
>>Best Regards,
>>Ashish Anand

A wired entry can EITHER be irrespective of ASID (if the G bit for the entry
is set) OR can take the current ASID into account (if the G bit for the entry
is clear) -- using wired TLB entries to map things like PCI io/mem window is
an example of a translation that would be fixed regardless of the process and
therefore you would want to set the G bit (which would make the ASID field
"don't care")

Neal.



From ralf@linux-mips.org Fri Feb 21 14:23:19 2003
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From: Ralf Baechle <ralf@linux-mips.org>
To: Yoichi Yuasa <yoichi_yuasa@montavista.co.jp>
Cc: linux-mips@linux-mips.org, matsu@megasolution.jp, jsun@mvista.com
Subject: Re: [patch] vr41xx giu bug fix
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On Fri, Feb 21, 2003 at 01:14:01PM +0900, Yoichi Yuasa wrote:

> I got the report that a problem is in giu.c of vr41xx.
> These patches to the problem are appended to this e-mail.
> 
> Please apply these patches to CVS tree.

Ok.

  Ralf

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	Linux-MIPS <linux-mips@linux-mips.org>
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On Fri, 21 Feb 2003, Ralf Baechle wrote:

> Sigh...  Each time I curse some certain person for copying code from the
> ia64 compat code, it was of abysimal quality back in at that time -
> unlike the Sparc code.

 Hmm, I think it's well-known the sparc64 port is mature unlike the ia64
one.  So why anyone uses the latter for any real work except the ia64
itself looks like a mystery to me... 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From macro@ds2.pg.gda.pl Fri Feb 21 18:41:40 2003
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On 21 Feb 2003, santosh kumar gowda wrote:

> Following message is produced at the IAD terminal.....
> 
> # Unable to handle kernel paging request at virtual address 
> 00000000, epc == 802
> 4ce74, ra == 802592a8
> Oops in fault.c:do_page_fault, line 172:
[...]
> Suggestions/Tips are welcome.

 Decode the oops first or nobody will be able to give any help.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From kwalker@broadcom.com Fri Feb 21 20:22:08 2003
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Suggestions and corrections are welcome.  I'm not an ABI/binutils
expert.  FYI, I let Ralf eyeball this before checking it in.

Kip

"Maciej W. Rozycki" wrote:
> 
> On Thu, 20 Feb 2003 kwalker@linux-mips.org wrote:
> 
> > Modified files:
> >       include/asm-mips64: Tag: linux_2_4 a.out.h elf.h processor.h
> >       arch/mips64/kernel: Tag: linux_2_4 process.c signal.c
> >
> > Log message:
> >       Represent ABI (o32,n32,n64) in thread mflags using 2 bits:
> >       MF_32BIT_REGS, MF_32BIT_ADDR.
> 
>  Why do you assume no ABI set for ELF32 means n32?  Historically it means
> o32 and arch/mips64/kernel/binfmt_elfo32.c treats it as such.  Also a
> brief study of binutils reveals the interpretation is the same for IRIX
> which does not handle the EF_MIPS_ABI mask.
> 
> --
> +  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
> +--------------------------------------------------------------+
> +        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From baitisj@idealab.com Fri Feb 21 20:25:19 2003
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Subject: fixup_bigphys_addr and DBAu1500 dev board
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Gentlemen:

I've just received a DBAu1500 development board, along with a Texas Instruments
PCI1510 CardBus bridge PCI card.  As such, I believe that I'm interested in
addressing the full 36 bit physical address space on the board.

I've installed the cross-compiling toolchain from
{ftp://ftp.linux-mips.org/pub/linux/mips/redhat/7.3}. mipsel-linux-gcc reports
version 2.96, mipsel-linux-ld reports 2.13.90.0.16. I have successfully built
other kernels with this toolchain for my board.

I checked out the latest linux_2_4 as of yesterday, copied the default
config for my board (cp arch/mips/defconfig-db1500), did 'make oldconfig',
and then 'make dep && make vmlinux'.

At the final linking of the kernel, here's what happened:

    mipsel-linux-ld -G 0 -static  -T arch/mips/ld.script arch/mips/kernel/head.o arch/mips/kernel/init_task.o init/main.o init/version.o init/do_mounts.o \
            --start-group \
            arch/mips/kernel/kernel.o arch/mips/mm/mm.o kernel/kernel.o mm/mm.o fs/fs.o ipc/ipc.o arch/mips/math-emu/fpu_emulator.o \
             drivers/char/char.o drivers/block/block.o drivers/misc/misc.o drivers/net/net.o drivers/media/media.o drivers/sound/sounddrivers.o drivers/pci/driver.o drivers/pcmcia/pcmcia.o drivers/net/wireless/wireless_net.o drivers/video/video.o drivers/usb/usbdrv.o drivers/input/inputdrv.o \
            net/network.o \
            arch/mips/lib/lib.a /home/baitisj/au_dev/mips_linux/linux/lib/lib.a arch/mips/au1000/db1x00/db1x00.o arch/mips/au1000/common/au1000.o \
            --end-group \
            -o vmlinux
    arch/mips/au1000/db1x00/db1x00.o(.text.init+0x160): In function `au1x00_setup':
    : undefined reference to `fixup_bigphys_addr'
    arch/mips/au1000/db1x00/db1x00.o(.text.init+0x164): In function `au1x00_setup':
    : undefined reference to `fixup_bigphys_addr'
    make: *** [vmlinux] Error 1


I took a look at arch/mips/au1000/db1x00/setup.c, and it appears that I'm
running into issues with:

    #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_AU1500)
      extern phys_t (*fixup_bigphys_addr)(phys_t phys_addr, phys_t size);
    #endif

I recursively grepped through my kernel source and could find no other
references to 'fixup_bigphys_addr'.

I browsed the CVS log for setup.c, resulting in the following:

    Revision 1.1.2.2 / Mon Dec 16 18:00:48 2002 UTC (2 months ago) by ppopov
    Branch: linux_2_4
    Changes since 1.1.2.1: +30 -0 lines
    Diff to previous 1.1.2.1 to branchpoint 1.1

    - cleaned up dead code
    - updated the Db1x pci code to patch the Pb1500
    - renamed __ioremap_fixup to fixup_bigphys_addr to match a new
    36 bit address patch.


    Revision 1.1.2.1 / Wed Dec 11 06:12:29 2002 UTC (2 months, 1 week ago) by
                       ppopov
    Branch: linux_2_4
    Changes since 1.1: +212 -0 lines
    Diff to previous 1.1

    Alchemy Au1x updates:
    - better config options to separate CPU and boards specific options
    - Added support for the Db1x boards
    - fixed usbdev compile problems
    - update to Pb1500 pci code

My next move was to cvs up -D "one month ago" my kernel_2_4 source. I cleaned,
and repeated the compiling procedure above, with the same result.

I'd love to know where this mystery fixup_bigphys_addr comes from!?

Thank you all for your hard work! I look forward to contributing in any
way that I can.


Best regards,

Jeff



-- 
         Jeffrey Baitis - Associate Software Engineer

                    Evolution Robotics, Inc.
                     130 West Union Street
                       Pasadena CA 91103

 tel: 626.535.2776  |  fax: 626.535.2777  |  baitisj@evolution.com 


From dan@embeddededge.com Fri Feb 21 20:40:08 2003
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CC: ppopov@mvista.com, linux-mips@linux-mips.org
Subject: Re: fixup_bigphys_addr and DBAu1500 dev board
References: <200302201135.09154.krishnakumar@naturesoft.net> <20030221.112456.41627052.nemoto@toshiba-tops.co.jp> <20030221122515.E20129@luca.pas.lab>
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Jeff Baitis wrote:

> I'd love to know where this mystery fixup_bigphys_addr comes from!?

You need the 36-bit patch from Pete that is not yet part of the
linux-mips tree.

You can find it on linux-mips.org in /pub/linux/mips/people/ppopov.

Have fun!


	-- Dan



From macro@ds2.pg.gda.pl Fri Feb 21 20:50:18 2003
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On Fri, 21 Feb 2003, Kip Walker wrote:

> Suggestions and corrections are welcome.  I'm not an ABI/binutils
> expert.  FYI, I let Ralf eyeball this before checking it in.

 False alarm -- sorry for the confusion.  The ELF flags for MIPS are
twisted and inconsistent due to historical reasons (or ad hoc hacks) and
it seems they fooled me this time.  We could actually adjust
binfmt_elfo32.c a bit instead. 

> "Maciej W. Rozycki" wrote:
> > 
> > > Modified files:
> > >       include/asm-mips64: Tag: linux_2_4 a.out.h elf.h processor.h
> > >       arch/mips64/kernel: Tag: linux_2_4 process.c signal.c
> > >
> > > Log message:
> > >       Represent ABI (o32,n32,n64) in thread mflags using 2 bits:
> > >       MF_32BIT_REGS, MF_32BIT_ADDR.
> > 
> >  Why do you assume no ABI set for ELF32 means n32?  Historically it means
> > o32 and arch/mips64/kernel/binfmt_elfo32.c treats it as such.  Also a
> > brief study of binutils reveals the interpretation is the same for IRIX
> > which does not handle the EF_MIPS_ABI mask.

 Please try to reply below original text, BTW.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From ppopov@mvista.com Fri Feb 21 22:06:59 2003
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Subject: Re: fixup_bigphys_addr and DBAu1500 dev board
From: Pete Popov <ppopov@mvista.com>
To: Dan Malek <dan@embeddededge.com>
Cc: baitisj@evolution.com, linux-mips@linux-mips.org
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On Fri, 2003-02-21 at 12:40, Dan Malek wrote:
> Jeff Baitis wrote:
> 
> > I'd love to know where this mystery fixup_bigphys_addr comes from!?
> 
> You need the 36-bit patch from Pete that is not yet part of the
> linux-mips tree.
> 
> You can find it on linux-mips.org in /pub/linux/mips/people/ppopov.

Thanks Dan.

Jeff, the patch still applies almost 100% cleanly (just a couple of
"offsets" messages). Let me know if you have problems. There is a readme
in my directory that describes all the patches. 

Pete


From baitisj@idealab.com Sat Feb 22 03:50:38 2003
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Subject: Re: fixup_bigphys_addr and DBAu1500 dev board
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Dan & Pete:

Thank you very much for your help!

I've patched things up, and my kernel runs, but the yenta_socket kernel module
still locks the system. Time to break out GDB and take a look at everything!
Please let me know if ya'll have some suggestions. :*)

After the 36-bit PCI patch, I had to alter include/asm-mips/io.h in order to
get drivers/net/wireless to compile. Preprocessor expansion of outw_p in the
hermes.h -> hermes_enable_interrupt and hermes_set_irqmask inline functions
caused some issues; I hope this patch is of some use!

Regards,

Jeff


diff -u -r1.29.2.19 include/asm-mips/io.h
--- include/asm-mips/io.h        28 Nov 2002 23:04:11 -0000      1.29.2.19
+++ include/asm-mips/io.h        22 Feb 2003 03:44:27 -0000
@@ -329,12 +329,25 @@
        SLOW_DOWN_IO;                                                   \
 } while(0)
 
-#define outw_p(val,port)                                               \
-do {                                                                   \
-       *(volatile u16 *)(mips_io_port_base + __swizzle_addr_w(port)) = \
-               __ioswab16(val);                                        \
-       SLOW_DOWN_IO;                                                   \
-} while(0)
+/* baitisj */
+static inline u16 outw_p(u16 val, unsigned long port)
+{
+    register u16 retval;
+    do {
+        retval = *(volatile u16 *)(mips_io_port_base + __swizzle_addr_w(port)) =
+            __ioswab16(val);
+        SLOW_DOWN_IO;
+    } while(0);
+    return retval;
+}
+/*  
+ *  #define outw_p(val,port)                                           \
+ *  do {                                                                       \
+ *     *(volatile u16 *)(mips_io_port_base + __swizzle_addr_w(port)) = \
+ *             __ioswab16(val);                                        \
+ *     SLOW_DOWN_IO;                                                   \
+ *  } while(0)
+ */
 
 #define outl_p(val,port)                                               \
 do {                                                                   \



On Fri, Feb 21, 2003 at 03:40:44PM -0500, Dan Malek wrote:
> Jeff Baitis wrote:
> 
> > I'd love to know where this mystery fixup_bigphys_addr comes from!?
> 
> You need the 36-bit patch from Pete that is not yet part of the
> linux-mips tree.
> 
> You can find it on linux-mips.org in /pub/linux/mips/people/ppopov.
> 
> Have fun!
> 
> 
> 	-- Dan
> 
> 
> 

-- 
         Jeffrey Baitis - Associate Software Engineer

                    Evolution Robotics, Inc.
                     130 West Union Street
                       Pasadena CA 91103

 tel: 626.535.2776  |  fax: 626.535.2777  |  baitisj@evolution.com 


From jiahanchen@yahoo.com Sat Feb 22 15:37:39 2003
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From: Jiahan Chen <jiahanchen@yahoo.com>
Subject: rebuild tool for Mips
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Hi, 

I'm working on a project for Mips embedded spplication, 
after cross-compiler stuff setup on Redhat 7.3 environment,
I got two problems:

1. Baseline install:
I tried to install baseline stuff accoring to the 4-step
instructions in README, however, the installation failed
with the message as follows:

[root@localhost install]# ./install.redhat mipsel
mkdir -p /export/mipselroot/var/lib/rpm
rpm --root /export/mipselroot --initdb
Traceback (innermost last):
 File "./findrpm", line 47, in ?
  list.header (src, srpm, name)
 File "./findrpm", line 13, in header
  for n in os.listdir(dir):
OSError: [Errno 2] No such file or directory
Traceback (innermost last):
 File "./findrpm", line 47, in ?
  list.header (src, srpm, name)
 File "./findrpm", line 13, in header
  for n in os.listdir(dir):
OSError: [Errno 2] No such file or directory
setup does not exist.
rm -f /export/mipselroot/etc/ld.so.conf
touch /export/mipselroot/etc/ld.so.conf
touch: creating `/export/mipselroot/etc/ld.so.conf': No such file or directory
make: *** [init] Error 1
Failed to install!

2. POSIX lib with Mips cross ld:

When I tried to cross-compile a test program with POSIX pthread and shared
memory (e.g. pthread_create() and shm_open()), I got errors from
ld. As shown below, I specified lib with 
-L/export/tools/mipsel-linx/lib which contians libpthread.a
and librt.a for the above POSIX functions.
However, it seemed cross ld still to use the native default:
/lib/libpthread.so.0 first.
Based on man ld: "Directories specified on the command line are
  searched  before the default directories."
I guess that there are some config issues I have not set up properly yet.

[root@localhost shm0]# make -f Makemips
/export/tools/bin/mipsel-linux-gcc  -o ylxmem0 -L/export/tools/mipsel-linx/lib
-lpthread -lrt  ylxmem.c mallocShm.c
/export/tools/lib/gcc-lib/mipsel-linux/2.96/../../../../mipsel-linux/bin/ld:
skipping incompatible /lib/libpthread.so.0 when searching for
/lib/libpthread.so.0
/export/tools/lib/gcc-lib/mipsel-linux/2.96/../../../../mipsel-linux/bin/ld:
skipping incompatible /lib/libpthread.so.0 when searching for
/lib/libpthread.so.0
/export/tools/lib/gcc-lib/mipsel-linux/2.96/../../../../mipsel-linux/bin/ld:
skipping incompatible /lib/libpthread.so.0 when searching for
/lib/libpthread.so.0
/export/tools/lib/gcc-lib/mipsel-linux/2.96/../../../../mipsel-linux/bin/ld:
skipping incompatible /lib/libpthread.so.0 when searching for
/lib/libpthread.so.0
/export/tools/lib/gcc-lib/mipsel-linux/2.96/../../../../mipsel-linux/bin/ld:
skipping incompatible /lib/libpthread.so.0 when searching for
/lib/libpthread.so.0
/export/tools/lib/gcc-lib/mipsel-linux/2.96/../../../../mipsel-linux/bin/ld:
skipping incompatible /lib/libpthread.so.0 when searching for
/lib/libpthread.so.0
/export/tools/lib/gcc-lib/mipsel-linux/2.96/../../../../mipsel-linux/bin/ld:
cannot find /lib/libpthread.so.0
collect2: ld returned 1 exit status
make: *** [all] Error 1

Thanks a lot,

Jiahan



__________________________________________________
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	Is there any Linux port available for NEC Image RISC Station MIPS machine ?


Prasad Nuli

From ralf@linux-mips.org Sat Feb 22 20:55:32 2003
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On Sat, Feb 22, 2003 at 02:45:21PM -0500, Prasad V Nuli wrote:

>  Is there any Linux port available for NEC Image RISC Station MIPS machine ?

Unmaintained since several years.  You're welcome to hack on it :-)

  Ralf

From Geert.Uytterhoeven@sonycom.com Sun Feb 23 09:20:10 2003
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From: Geert Uytterhoeven <geert@linux-m68k.org>
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On Fri, 21 Feb 2003, Jeff Baitis wrote:
> -#define outw_p(val,port)                                               \
> -do {                                                                   \
> -       *(volatile u16 *)(mips_io_port_base + __swizzle_addr_w(port)) = \
> -               __ioswab16(val);                                        \
> -       SLOW_DOWN_IO;                                                   \
> -} while(0)
> +/* baitisj */
> +static inline u16 outw_p(u16 val, unsigned long port)
> +{
> +    register u16 retval;
> +    do {
> +        retval = *(volatile u16 *)(mips_io_port_base + __swizzle_addr_w(port)) =
> +            __ioswab16(val);
> +        SLOW_DOWN_IO;
> +    } while(0);
> +    return retval;
> +}

You don't need the `do { ... } while (0)' construct in an inline function.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


From santhoshk@nestec.net Sun Feb 23 16:47:43 2003
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Subject: QUERY: Porting Linux kernel to Toshiba TX4927
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Hi all,

I need to clarify the following points.

1. Has somone already ported Linux to TX4927 chip?
2. If not, what is the complexity of this wor?
3. If yes, then who is maintaining it. We could not get any information from
the source tree.
4. If yes, is it an open source? where can I get the source code.

Thanks in advance
Santhosh K

From ipv6_san@rediffmail.com Mon Feb 24 04:07:34 2003
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On Sat, 22 Feb 2003 Maciej W. Rozycki wrote :
>On 21 Feb 2003, santosh kumar gowda wrote:
>
> > Following message is produced at the IAD terminal.....
> >
> > # Unable to handle kernel paging request at virtual address
> > 00000000, epc == 802
> > 4ce74, ra == 802592a8
> > Oops in fault.c:do_page_fault, line 172:
>[...]
> > Suggestions/Tips are welcome.
>
>  Decode the oops first or nobody will be able to give any 
>help.

how do i decode the oops ??? help pls.

-San
--------------------------------------


From rddunlap@osdl.org Mon Feb 24 04:18:56 2003
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>
>
> On Sat, 22 Feb 2003 Maciej W. Rozycki wrote :
>>On 21 Feb 2003, santosh kumar gowda wrote:
>>
>> > Following message is produced at the IAD terminal.....
>> >
>> > # Unable to handle kernel paging request at virtual address
>> > 00000000, epc == 802
>> > 4ce74, ra == 802592a8
>> > Oops in fault.c:do_page_fault, line 172:
>>[...]
>> > Suggestions/Tips are welcome.
>>
>>  Decode the oops first or nobody will be able to give any
>>help.
>
> how do i decode the oops ??? help pls.

Please see linux/REPORTING-BUGS and
linux/Documentation/oops-tracing.txt .
The latter will tell you how to use use 'ksymoops'
to decode an oops message.

~Randy




From ipv6_san@rediffmail.com Mon Feb 24 05:27:56 2003
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On Mon, 24 Feb 2003 Randy.Dunlap wrote :
> >
> >
> > On Sat, 22 Feb 2003 Maciej W. Rozycki wrote :
> >>On 21 Feb 2003, santosh kumar gowda wrote:
> >>
> >> > Following message is produced at the IAD terminal.....
> >> >
> >> > # Unable to handle kernel paging request at virtual 
>address
> >> > 00000000, epc == 802
> >> > 4ce74, ra == 802592a8
> >> > Oops in fault.c:do_page_fault, line 172:
> >>[...]
> >> > Suggestions/Tips are welcome.
> >>
> >>  Decode the oops first or nobody will be able to give any
> >>help.
> >
> > how do i decode the oops ??? help pls.
>
>Please see linux/REPORTING-BUGS and
>linux/Documentation/oops-tracing.txt .
>The latter will tell you how to use use 'ksymoops'
>to decode an oops message.

The Embedded Linux running on my MIPS based device has following 
cmds...

kallsyms  kill      killall   klogd     ksyms

Also, Flash ROM of the device is loaded with kernel and 
filesystem
images. so it not possible for me to browse through the source 
code.

-San
---------------------------------



From Geert.Uytterhoeven@sonycom.com Mon Feb 24 08:41:28 2003
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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: santosh kumar gowda <ipv6_san@rediffmail.com>
cc: "Randy.Dunlap" <rddunlap@osdl.org>, macro@ds2.pg.gda.pl,
	netdev@oss.sgi.com,
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On 24 Feb 2003, santosh kumar gowda wrote:
> Also, Flash ROM of the device is loaded with kernel and 
> filesystem
> images. so it not possible for me to browse through the source 
> code.

You do not have access to the Linux kernel sources? Sounds like a violation of
the GPL! Please contact your vendor and ask them for the sources.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


From mksarav@comp.nus.edu.sg Mon Feb 24 09:25:44 2003
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Subject: Please use appropriate subject line  [was (Re: Re: Re: (no subject))] 
From: "M K Saravanan" <mksarav@comp.nus.edu.sg>
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I don't remember who started this thread.  Kindly use appropriate title in
the "Subject" when posting queries.  It will also help when somebody
follow the archive on a particular topic.

-- mks --

--
M K Saravanan
http://www.comp.nus.edu.sg/~mksarav





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Hi Ralf,

We need to change -mcpu in order to use an instruction peculiar to VR4100.
The option of -mcpu changes with versions of binutils.

If it is limited to some versions, I can be corresponded using check_gcc.
Can you tell me some versions of binutils?

Yoichi

From sjhill@realitydiluted.com Mon Feb 24 13:56:00 2003
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To: SANTHOSH K <santhoshk@nestec.net>
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Subject: Re: QUERY: Porting Linux kernel to Toshiba TX4927
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SANTHOSH K wrote:
> 
> 1. Has somone already ported Linux to TX4927 chip?
 >
Yes, we (TimeSys) have already done this.

> 2. If not, what is the complexity of this wor?
 >
Oh, it was a pretty interesting port. The PCI code is
pretty awful.

> 3. If yes, then who is maintaining it. We could not get any information from
 > the source tree.
 >
We will actively maintain it.

> 4. If yes, is it an open source? where can I get the source code.
>
The code should be released in the next couple of months.

-Steve


From ppopov@mvista.com Mon Feb 24 17:31:00 2003
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Subject: Re: QUERY: Porting Linux kernel to Toshiba TX4927
From: Pete Popov <ppopov@mvista.com>
To: "Steven J. Hill" <sjhill@realitydiluted.com>
Cc: SANTHOSH K <santhoshk@nestec.net>,
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On Mon, 2003-02-24 at 05:46, Steven J. Hill wrote:
> SANTHOSH K wrote:
> > 
> > 1. Has somone already ported Linux to TX4927 chip?
>  >
> Yes, we (TimeSys) have already done this.
> 
> > 2. If not, what is the complexity of this wor?
>  >
> Oh, it was a pretty interesting port. The PCI code is
> pretty awful.
> 
> > 3. If yes, then who is maintaining it. We could not get any information from
>  > the source tree.
>  >
> We will actively maintain it.
> 
> > 4. If yes, is it an open source? where can I get the source code.
> >
> The code should be released in the next couple of months.

Duplicated effort. We too have a 4927 port which the development
engineer who worked on it hasn't had time to push out.

Pete


From ppopov@mvista.com Mon Feb 24 17:42:29 2003
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Subject: Re: fixup_bigphys_addr and DBAu1500 dev board
From: Pete Popov <ppopov@mvista.com>
To: baitisj@evolution.com
Cc: Dan Malek <dan@embeddededge.com>, linux-mips@linux-mips.org
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On Fri, 2003-02-21 at 19:50, Jeff Baitis wrote:
> Dan & Pete:
> 
> Thank you very much for your help!
> 
> I've patched things up, and my kernel runs, but the yenta_socket kernel module
> still locks the system. Time to break out GDB and take a look at everything!
> Please let me know if ya'll have some suggestions. :*)

yenta socket? There's no hardware on the board to support this.

pcmcia is always a pain in the neck to setup, but it does work on the Db
and Pb boards cause I very recently tested it. Note that I've tested it
only as a module though. The defconfig-db1500 in linux-mips.org already
has pcmcia support turned on. The socket driver module you'll end up
with is drivers/pcmcia/au1x00_ss.o. That's the module you want to load.
Note also that there is a small patch in my directory for pcmcia.

I've tested wireless cards in the past, but not recently. Recently I've
tested ata cards only. You might want to start with that as proof that
you have everything else working.

> After the 36-bit PCI patch, I had to alter include/asm-mips/io.h in order to
> get drivers/net/wireless to compile. Preprocessor expansion of outw_p in the
> hermes.h -> hermes_enable_interrupt and hermes_set_irqmask inline functions
> caused some issues; I hope this patch is of some use!

Only if Ralf applies it :)

Pete

> Regards,
> 
> Jeff
> 
> 
> diff -u -r1.29.2.19 include/asm-mips/io.h
> --- include/asm-mips/io.h        28 Nov 2002 23:04:11 -0000      1.29.2.19
> +++ include/asm-mips/io.h        22 Feb 2003 03:44:27 -0000
> @@ -329,12 +329,25 @@
>         SLOW_DOWN_IO;                                                   \
>  } while(0)
>  
> -#define outw_p(val,port)                                               \
> -do {                                                                   \
> -       *(volatile u16 *)(mips_io_port_base + __swizzle_addr_w(port)) = \
> -               __ioswab16(val);                                        \
> -       SLOW_DOWN_IO;                                                   \
> -} while(0)
> +/* baitisj */
> +static inline u16 outw_p(u16 val, unsigned long port)
> +{
> +    register u16 retval;
> +    do {
> +        retval = *(volatile u16 *)(mips_io_port_base + __swizzle_addr_w(port)) =
> +            __ioswab16(val);
> +        SLOW_DOWN_IO;
> +    } while(0);
> +    return retval;
> +}
> +/*  
> + *  #define outw_p(val,port)                                           \
> + *  do {                                                                       \
> + *     *(volatile u16 *)(mips_io_port_base + __swizzle_addr_w(port)) = \
> + *             __ioswab16(val);                                        \
> + *     SLOW_DOWN_IO;                                                   \
> + *  } while(0)
> + */
>  
>  #define outl_p(val,port)                                               \
>  do {                                                                   \
> 
> 
> 
> On Fri, Feb 21, 2003 at 03:40:44PM -0500, Dan Malek wrote:
> > Jeff Baitis wrote:
> > 
> > > I'd love to know where this mystery fixup_bigphys_addr comes from!?
> > 
> > You need the 36-bit patch from Pete that is not yet part of the
> > linux-mips tree.
> > 
> > You can find it on linux-mips.org in /pub/linux/mips/people/ppopov.
> > 
> > Have fun!
> > 
> > 
> > 	-- Dan
> > 
> > 
> > 


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RTFM
(Hint $LINUX_SOURCE_TREE/Documentation/)

On Mon, Feb 24, 2003 at 04:06:47AM -0000, santosh kumar gowda wrote:
>=20
>=20
> On Sat, 22 Feb 2003 Maciej W. Rozycki wrote :
> >On 21 Feb 2003, santosh kumar gowda wrote:
> >
> >> Following message is produced at the IAD terminal.....
> >>
> >> # Unable to handle kernel paging request at virtual address
> >> 00000000, epc =3D=3D 802
> >> 4ce74, ra =3D=3D 802592a8
> >> Oops in fault.c:do_page_fault, line 172:
> >[...]
> >> Suggestions/Tips are welcome.
> >
> > Decode the oops first or nobody will be able to give any=20
> >help.
>=20
> how do i decode the oops ??? help pls.
>=20
> -San
> --------------------------------------
>=20
>=20

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From ralf@linux-mips.org Mon Feb 24 20:22:00 2003
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From: Ralf Baechle <ralf@linux-mips.org>
To: Yoichi Yuasa <yoichi_yuasa@montavista.co.jp>
Cc: linux-mips@linux-mips.org
Subject: Re: Change -mcpu option for VR41xx
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On Mon, Feb 24, 2003 at 09:07:55PM +0900, Yoichi Yuasa wrote:

> We need to change -mcpu in order to use an instruction peculiar to VR4100.
> The option of -mcpu changes with versions of binutils.
> 
> If it is limited to some versions, I can be corresponded using check_gcc.
> Can you tell me some versions of binutils?

Binutils starting with about 2.10 should support -mcpu=4100.

  Ralf

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This is a multi-part message in MIME format.

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Hi Ralf,

On Mon, 24 Feb 2003 21:21:46 +0100
Ralf Baechle <ralf@linux-mips.org> wrote:

> On Mon, Feb 24, 2003 at 09:07:55PM +0900, Yoichi Yuasa wrote:
> 
> > We need to change -mcpu in order to use an instruction peculiar to VR4100.
> > The option of -mcpu changes with versions of binutils.
> > 
> > If it is limited to some versions, I can be corresponded using check_gcc.
> > Can you tell me some versions of binutils?
> 
> Binutils starting with about 2.10 should support -mcpu=4100.

I checked about some binutils.

binutils -mcpu option for VR4100 series

2.10:
        * VR4100
        * vr4100
        * 4100
        * mips64vr4100
        * r4100

2.11:
2.12:
2.13:
        * VR4100
        * 4100
        * mips64vr4100
        * r4100

In addition for the VR4100 series, there is an -m4100 option.

As for us, it is best to use the following option.

GCCFLAGS        += -mcpu=r4100 -mips2 -Wa,-m4100,--trap

Would you apply this patch to CVS?

Thanks,

Yoichi

--Multipart_Tue__25_Feb_2003_12:48:50_+0900_0828eae8
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diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/Makefile linux/arch/mips/Makefile
--- linux.orig/arch/mips/Makefile	Fri Feb 21 03:53:37 2003
+++ linux/arch/mips/Makefile	Tue Feb 25 12:27:57 2003
@@ -66,7 +66,7 @@
 GCCFLAGS	+= -mcpu=r4300 -mips2 -Wa,--trap
 endif
 ifdef CONFIG_CPU_VR41XX
-GCCFLAGS	+= -mcpu=r4600 -mips2 -Wa,--trap
+GCCFLAGS	+= -mcpu=r4100 -mips2 -Wa,-m4100,--trap
 endif
 ifdef CONFIG_CPU_R4X00
 GCCFLAGS	+= -mcpu=r4600 -mips2 -Wa,--trap

--Multipart_Tue__25_Feb_2003_12:48:50_+0900_0828eae8
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diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/Makefile linux/arch/mips/Makefile
--- linux.orig/arch/mips/Makefile	Fri Jan 24 10:26:58 2003
+++ linux/arch/mips/Makefile	Tue Feb 25 12:40:23 2003
@@ -57,7 +57,7 @@
 cflags-$(CONFIG_CPU_TX39XX)	+= -mcpu=r3000 -mips1
 cflags-$(CONFIG_CPU_R6000)	+= -mcpu=r6000 -mips2 -Wa,--trap
 cflags-$(CONFIG_CPU_R4300)	+= -mcpu=r4300 -mips2 -Wa,--trap
-cflags-$(CONFIG_CPU_VR41XX)	+= -mcpu=r4600 -mips2 -Wa,--trap
+cflags-$(CONFIG_CPU_VR41XX)	+= -mcpu=r4100 -mips2 -Wa,-m4100,--trap
 cflags-$(CONFIG_CPU_R4X00)	+= -mcpu=r4600 -mips2 -Wa,--trap
 cflags-$(CONFIG_CPU_TX49XX)	+= -mcpu=r4600 -mips2 -Wa,--trap
 cflags-$(CONFIG_CPU_MIPS32)	+= -mcpu=r4600 -mips2 -Wa,--trap

--Multipart_Tue__25_Feb_2003_12:48:50_+0900_0828eae8--

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From chris@cryptoapps.com Tue Feb 25 08:01:07 2003
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Date: Tue, 25 Feb 2003 00:01:04 -0800
From: Chris Zimman <chris@cryptoapps.com>
To: linux-mips@linux-mips.org
Subject: Pb1500 PCI problems
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I've seen some strange stuff in the PCI code in 2.4.19-rc1 and 2.4.20
from the CVS tree.

Neither trees compile out of the box for the PB1500, both having errors
in one place or another.  2.4.20 blows up during boot in:

...

00:10.0 Class 2000: 0356:2000 (rev 56)
        Mem unavailable -- skipping
        Mem unavailable -- skipping
        Mem unavailable -- skipping
        Mem unavailable -- skipping
        Mem unavailable -- skipping
        Mem unavailable -- skipping
00:11.0 Class 0000: 0000:0000
        Mem at 0x40000000 [size=0xffd0]
        Mem at 0x4000ffd0 [size=0xffd0]
Reserved instruction in kernel code in traps.c::do_ri, line 650:
$0 : 00000000 1000fc00 c0000000 c0000000 00000001 c0000000 00000000 1000fc00
$8 : 810fa7f0 00000000 ffffffbf ffffffff fffffff8 ffffffff 00000010 00000003
$16: 00000000 00000000 8034be88 00000000 00000000 00000098 00000000 00000000
$24: 8034bd53 00000000                   8034a000 8034be48 00000004 80274c80
Hi : 00000000
Lo : 000000c0
epc  : 80274ca0    Not tainted
Status: 1000fc02
Cause : 00800028
Process swapper (pid: 1, stackpage=8034a000)
Stack:    00000000 00000098 8027fe6f 80274c80 00000400 0000000d 00000000
 8034bef0 00000000 8030e108 80274e0c 00000088 00000000 00000000 802b4588
 802dbc68 8027fe58 4000ffd0 1000fc01 00000090 801e73d8 4000ffd0 ffff0036
 00000000 00000000 00000088 00000000 801084f0 00000000 00000098 00000000
 00000000 802b49d0 802b4b34 8027fea0 00000000 00000001 00000001 00000000
 8034bef0 ...
Call Trace:   [<8027fe6f>] [<80274c80>] [<80274e0c>] [<8027fe58>] [<801e73d8>]
 [<801084f0>] [<8027fea0>] [<8010078c>] [<8027ff6c>] [<8012cf90>] [<8010078c>]
 [<80101f24>] [<801e9040>] [<8010078c>] [<8010079c>] [<801022d4>] [<80100780>]
 [<801022c4>]

Code: 24040001  12640023  00431825 <8c620000> ae420000  0000000f  3c03000d  34631b72  3c02802d 
Kernel panic: Attempted to kill init!


2.4.19-rc1 fares a little better, but has strange problems as well:


chris@au1500:~$ lspci -vv
00:01.0 PIC: Unknown device bad7:0800 (rev db) (prog-if ba)
        Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
        Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
        Interrupt: pin ? routed to IRQ 255
        Region 0: Memory at <ignored> (type 3, prefetchable) [disabled]
        Region 2: I/O ports at <ignored> [disabled]
        Region 4: Memory at <ignored> (low-1M, prefetchable) [disabled]
        Expansion ROM at 0800b800 [disabled] [size=2K]

00:05.0 Class 1060: Unknown device 0007:1040 (rev 0d)
        !!! Invalid class 1060 for header type 02
        Subsystem: Unknown device 4054:0800
        Control: I/O- Mem+ BusMaster- SpecCycle+ MemWINV+ VGASnoop+ ParErr- Stepping- SERR- FastB2B-
        Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort+ >SERR- <PERR-
        Interrupt: pin ? routed to IRQ 255
        Region 0: I/O ports at <ignored> [disabled]
        Bus: primary=55, secondary=40, subordinate=00, sec-latency=8
        BridgeCtl: Parity+ SERR- ISA+ VGA- MAbort- >Reset- 16bInt- PostWrite+
        16-bit legacy interface ports at 0006

00:0a.0 Class 8e10: Unknown device f809:0040 (rev 10)
        Subsystem: Unknown device 0008:03e0
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop+ ParErr- Stepping- SERR- FastB2B-
        Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
        Latency: 128 (1000ns min, 3000ns max), cache line size da
        Interrupt: pin         Region 5: Memory at <invalid-64bit-slot> (64-bit, non-prefetchable)
        Expansion ROM at 27bd0000 [disabled] [size=2K]

00:10.0 Class 2000: Unknown device 0356:2000 (rev 56) (prog-if 03)
        Subsystem: Unknown device 0356:2000
        Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr+ Stepping- SERR+ FastB2B+
        Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR-
        Latency: 3 (8000ns max), cache line size 56
        Interrupt: pin C routed to IRQ 255
        Region 0: Memory at 20000350 (type 3, non-prefetchable) [size=16]
        Region 1: Memory at 20000350 (type 3, non-prefetchable) [size=16]
        Region 2: Memory at 20000350 (type 3, non-prefetchable) [size=16]
        Region 3: Memory at 20000350 (type 3, non-prefetchable) [size=16]
        Region 4: Memory at 20000350 (type 3, non-prefetchable) [size=16]
        Region 5: Memory at 20000350 (type 3, non-prefetchable) [size=16]
        Expansion ROM at 20000000 [disabled] [size=512M]


Before I go digging too much, I'd like it if someone else with a PB1500
or similar can confirm what I'm seeing.

The kernel was built with defconfig-pb1500, and using GCC 3.2.2 and bintutils 2.13

The 2.4.19-rc1 kernel seems to work fine otherwise, BTW

Thanks

--Chris

From ica2_ts@csv.ica.uni-stuttgart.de Tue Feb 25 08:03:59 2003
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To: jeff <jeff_lee@coventive.com>
Cc: linux-mips@linux-mips.org
Subject: Re: Kernel 2.4.20
Message-ID: <20030225080327.GC25303@rembrandt.csv.ica.uni-stuttgart.de>
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jeff wrote:
> Dear All,
>     I am trying to porting NEC Vr4131 platform from 2.4.16 to 2.4.20 but I found some problem.
> In kernel 2.4.16, the kernel entry is 0x80002470 but the kernel entry in 2.4.20 is 0x801xxxxx

That's just normal, the entry is variable.

> So my problem is how to change the kernel entry from 0x801xxxxx to be 0x8000xxxx? or how 
> to test this kernel when the kernel entry is 0x801xxxxx?

The entry address is encoded in the ELF header at the beginning of vmlinux
(as it is for all other ELF executables). The header's layout can be found
e.g. in linux/include/linux/elf.h.


Thiemo

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From ica2_ts@csv.ica.uni-stuttgart.de Tue Feb 25 08:33:29 2003
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To: jeff <jeff_lee@coventive.com>
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Subject: Re: Kernel 2.4.20
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jeff wrote:
> Dear Thiemo,
>     Thanks for your quickly response.
> I try to modify the /arch/mips/ld.script.in or /arch/mips/kernel/head.S

This won't help. The entry address is where the linker happens to
place the entry function. It may vary even for slight differences
in Kernel compilation.

> but still can't work (entry is changed but kernel can't work).

What does "can't work" mean? What happens exactly?

What sort of bootloader are you using? Normally it is able to
handle ELF properly, which makes this thing work automatically.

> Do I make any mistake?

Sounds so.


Thiemo

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From ica2_ts@csv.ica.uni-stuttgart.de Tue Feb 25 09:42:50 2003
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To: jeff <jeff_lee@coventive.com>
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Subject: Re: Kernel 2.4.20
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jeff wrote:
> Dear Thiemo,
>     We modified the head.S and the kernel_entry change to 0x80000798
> (check from System.map) and we download this kernel to RAM address
> 0x80000000 and jump to 0x8000798 to execute.

By adding a pre_kernel_entry() there, I guess.

> It show EXCEPTION...
> And our bootloader will not handle ELF file format. But after build the kernel
> image, we got two image, vmlinux and vmlinux.binary. vmlinux is FLE file
> format and vmlinux.binary is only data (check by file). We download 
> vmlinux.binary to test.

One more guess: The conversion to binary lost some important section.


Thiemo

From ipv6_san@rediffmail.com Tue Feb 25 10:18:22 2003
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Hello,

I have a MIPS processor based device, currently running with
Linux-2.4.5-pre1.
I have a BSP for my device from Lineo Inc., which incorporates
Linux-2.4.5-pre1 source code.

Now i want to port latest USAGI kernel code onto my device.

How to step further ??
Is the USAGI code, platform independent ??
Do i need to make any changes in the kernel source code ??
Need to change any configuration files ??


-San
---------------------------------------------------------------------
This is Linux Country.  On a quiet night, you can hear Windows 
reboot.
---------------------------------------------------------------------




From jorik@dnd.utwente.nl Tue Feb 25 10:30:38 2003
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From: Jorik Jonker <jorik@boeventronie.net>
To: linux-mips@linux-mips.org
Subject: Port to SGI Onyx
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Hi,

I recently got a (free) SGI Onyx, and I was interested in running something
different on it than IRIX. I wondered if anybody ever attemped to run linux
on this beast, and if not, who would like to anticipate in porting linux to
it.
My Onyx:
- quad R4400 100MHz IP19 MIPS (each 1Mb cache)
- 256Mb RAM
- RealityEngine2 Graphics
- 2 Raster Manager units

(for those who are interested in pictures of this thing:
http://boeventronie.net/images/hardware/sgi/onyx/ )

regards,
-- 
Jorik Jonker
http://boeventronie.net/

From yoshfuji@linux-ipv6.org Tue Feb 25 10:55:12 2003
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Subject: Re: USAGI Kernel for MIPS based device
From: YOSHIFUJI Hideaki / =?iso-2022-jp?B?GyRCNUhGIzFRTEAbKEI=?= 
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In article <20030225101731.9289.qmail@webmail14.rediffmail.com> (at 25 Feb 2003 10:17:31 -0000), "Santosh " <ipv6_san@rediffmail.com> says:

> Now i want to port latest USAGI kernel code onto my device.
:
> Is the USAGI code, platform independent ??

It should be.  We run our code on our
 - ix86
 - Ultra SPARC
 - Power PC
 - MIPS
 - ARM
machines.
(Unfortunately, we don't have x86-64, ia86 or alpha machines...)

-- 
Hideaki YOSHIFUJI @ USAGI Project <yoshfuji@linux-ipv6.org>
GPG FP: 9022 65EB 1ECF 3AD1 0BDF  80D8 4807 F894 E062 0EEA

From ralf@linux-mips.org Tue Feb 25 12:44:46 2003
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On Tue, Feb 25, 2003 at 10:17:31AM -0000, Santosh  wrote:

> I have a MIPS processor based device, currently running with
> Linux-2.4.5-pre1.
> I have a BSP for my device from Lineo Inc., which incorporates
> Linux-2.4.5-pre1 source code.

2.4.5 is almost two years old by now.  You're missing a huge pule of bug
fixes among them MIPS IPv6 fixes.

  Ralf

From macro@ds2.pg.gda.pl Tue Feb 25 13:18:20 2003
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From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Yoichi Yuasa <yoichi_yuasa@montavista.co.jp>
cc: Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
Subject: Re: Change -mcpu option for VR41xx
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On Tue, 25 Feb 2003, Yoichi Yuasa wrote:

> binutils -mcpu option for VR4100 series
> 
> 2.10:
>         * VR4100
>         * vr4100
>         * 4100
>         * mips64vr4100
>         * r4100
> 
> 2.11:
> 2.12:
> 2.13:
>         * VR4100
>         * 4100
>         * mips64vr4100
>         * r4100

 They are case insensitive, which is why the redundancy was removed.

> In addition for the VR4100 series, there is an -m4100 option.

 Which is deprecated and scheduled for removal in the future.

> As for us, it is best to use the following option.
> 
> GCCFLAGS        += -mcpu=r4100 -mips2 -Wa,-m4100,--trap
> 
> Would you apply this patch to CVS?

 The trunk version of gas only supports "-m4100" and "vr4100" (but leading
letters are dropped if no exact match happens) for "-mcpu=" (which is also
deprecated), "-march=" and "-mtune=".  Additionally it supports "vr4111",
"vr4111", "vr4120", "vr4130" and "vr4181".  I suggest you go for: 

GCCFLAGS	+= -mcpu=vr4100 -mips2 -Wa,--trap

for now as other options may trigger an error depending on the version of
tools used ("-mcpu=" is passed down to gas).

 I think we'll soon have to cook up a run-time gcc check for what is
accepted and use the "-march=" and "-mtune=" options preferably and
failing that, revert to legacy options like above.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From yaelgilad@myrealbox.com Tue Feb 25 13:49:00 2003
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How does one tweak the kernel's "modules_install" target in the 
makefile to properly be used for cross compiling ?
I can change the kernel Makefile, but I'd rather not.

My aim is to compile the modules and pack them into a ramdisk 
that is compiled into the kernel.



From Geert.Uytterhoeven@sonycom.com Tue Feb 25 13:51:42 2003
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On Tue, 25 Feb 2003, Gilad Benjamini wrote:
> How does one tweak the kernel's "modules_install" target in the 
> makefile to properly be used for cross compiling ?
> I can change the kernel Makefile, but I'd rather not.

make INSTALL_MOD_PATH=...

Note that depmod will fail anyway.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


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Subject: Re: Pb1500 PCI problems
From: Pete Popov <ppopov@mvista.com>
To: Chris Zimman <chris@cryptoapps.com>
Cc: linux-mips <linux-mips@linux-mips.org>
In-Reply-To: <20030225080104.GA18741@mail.cryptoapps.com>
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On Tue, 2003-02-25 at 00:01, Chris Zimman wrote:
> I've seen some strange stuff in the PCI code in 2.4.19-rc1 and 2.4.20
> from the CVS tree.
> 
> Neither trees compile out of the box for the PB1500, both having errors
> in one place or another.  2.4.20 blows up during boot in:

I probably need to put this in the main FAQ or something. 

There are some required patches that you need to apply which are not in
the tree yet. Take a look at
ftp.linux-mips.org:/pub/linux/mips/people/ppopov. There is a README
there that describes the patches. At the very least you need to apply
the 36 bit patch.

Pete

> ...
> 
> 00:10.0 Class 2000: 0356:2000 (rev 56)
>         Mem unavailable -- skipping
>         Mem unavailable -- skipping
>         Mem unavailable -- skipping
>         Mem unavailable -- skipping
>         Mem unavailable -- skipping
>         Mem unavailable -- skipping
> 00:11.0 Class 0000: 0000:0000
>         Mem at 0x40000000 [size=0xffd0]
>         Mem at 0x4000ffd0 [size=0xffd0]
> Reserved instruction in kernel code in traps.c::do_ri, line 650:
> $0 : 00000000 1000fc00 c0000000 c0000000 00000001 c0000000 00000000 1000fc00
> $8 : 810fa7f0 00000000 ffffffbf ffffffff fffffff8 ffffffff 00000010 00000003
> $16: 00000000 00000000 8034be88 00000000 00000000 00000098 00000000 00000000
> $24: 8034bd53 00000000                   8034a000 8034be48 00000004 80274c80
> Hi : 00000000
> Lo : 000000c0
> epc  : 80274ca0    Not tainted
> Status: 1000fc02
> Cause : 00800028
> Process swapper (pid: 1, stackpage=8034a000)
> Stack:    00000000 00000098 8027fe6f 80274c80 00000400 0000000d 00000000
>  8034bef0 00000000 8030e108 80274e0c 00000088 00000000 00000000 802b4588
>  802dbc68 8027fe58 4000ffd0 1000fc01 00000090 801e73d8 4000ffd0 ffff0036
>  00000000 00000000 00000088 00000000 801084f0 00000000 00000098 00000000
>  00000000 802b49d0 802b4b34 8027fea0 00000000 00000001 00000001 00000000
>  8034bef0 ...
> Call Trace:   [<8027fe6f>] [<80274c80>] [<80274e0c>] [<8027fe58>] [<801e73d8>]
>  [<801084f0>] [<8027fea0>] [<8010078c>] [<8027ff6c>] [<8012cf90>] [<8010078c>]
>  [<80101f24>] [<801e9040>] [<8010078c>] [<8010079c>] [<801022d4>] [<80100780>]
>  [<801022c4>]
> 
> Code: 24040001  12640023  00431825 <8c620000> ae420000  0000000f  3c03000d  34631b72  3c02802d 
> Kernel panic: Attempted to kill init!
> 
> 
> 2.4.19-rc1 fares a little better, but has strange problems as well:
> 
> 
> chris@au1500:~$ lspci -vv
> 00:01.0 PIC: Unknown device bad7:0800 (rev db) (prog-if ba)
>         Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
>         Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
>         Interrupt: pin ? routed to IRQ 255
>         Region 0: Memory at <ignored> (type 3, prefetchable) [disabled]
>         Region 2: I/O ports at <ignored> [disabled]
>         Region 4: Memory at <ignored> (low-1M, prefetchable) [disabled]
>         Expansion ROM at 0800b800 [disabled] [size=2K]
> 
> 00:05.0 Class 1060: Unknown device 0007:1040 (rev 0d)
>         !!! Invalid class 1060 for header type 02
>         Subsystem: Unknown device 4054:0800
>         Control: I/O- Mem+ BusMaster- SpecCycle+ MemWINV+ VGASnoop+ ParErr- Stepping- SERR- FastB2B-
>         Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort+ >SERR- <PERR-
>         Interrupt: pin ? routed to IRQ 255
>         Region 0: I/O ports at <ignored> [disabled]
>         Bus: primary=55, secondary=40, subordinate=00, sec-latency=8
>         BridgeCtl: Parity+ SERR- ISA+ VGA- MAbort- >Reset- 16bInt- PostWrite+
>         16-bit legacy interface ports at 0006
> 
> 00:0a.0 Class 8e10: Unknown device f809:0040 (rev 10)
>         Subsystem: Unknown device 0008:03e0
>         Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop+ ParErr- Stepping- SERR- FastB2B-
>         Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
>         Latency: 128 (1000ns min, 3000ns max), cache line size da
>         Interrupt: pin         Region 5: Memory at <invalid-64bit-slot> (64-bit, non-prefetchable)
>         Expansion ROM at 27bd0000 [disabled] [size=2K]
> 
> 00:10.0 Class 2000: Unknown device 0356:2000 (rev 56) (prog-if 03)
>         Subsystem: Unknown device 0356:2000
>         Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr+ Stepping- SERR+ FastB2B+
>         Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR-
>         Latency: 3 (8000ns max), cache line size 56
>         Interrupt: pin C routed to IRQ 255
>         Region 0: Memory at 20000350 (type 3, non-prefetchable) [size=16]
>         Region 1: Memory at 20000350 (type 3, non-prefetchable) [size=16]
>         Region 2: Memory at 20000350 (type 3, non-prefetchable) [size=16]
>         Region 3: Memory at 20000350 (type 3, non-prefetchable) [size=16]
>         Region 4: Memory at 20000350 (type 3, non-prefetchable) [size=16]
>         Region 5: Memory at 20000350 (type 3, non-prefetchable) [size=16]
>         Expansion ROM at 20000000 [disabled] [size=512M]
> 
> 
> Before I go digging too much, I'd like it if someone else with a PB1500
> or similar can confirm what I'm seeing.
> 
> The kernel was built with defconfig-pb1500, and using GCC 3.2.2 and bintutils 2.13
> 
> The 2.4.19-rc1 kernel seems to work fine otherwise, BTW
> 
> Thanks
> 
> --Chris
> 
> 


From jiahanchen@yahoo.com Tue Feb 25 16:49:53 2003
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From: Jiahan Chen <jiahanchen@yahoo.com>
Subject: Kernel Source Tree & Rebuild for Mips
To: Pete Popov <ppopov@mvista.com>
Cc: linux-mips@linux-mips.org
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--- Pete Popov <ppopov@mvista.com> wrote:
> On Tue, 2003-02-25 at 00:01, Chris Zimman wrote:
> > I've seen some strange stuff in the PCI code in 2.4.19-rc1 and 2.4.20
> > from the CVS tree.
> > 

Where and how can I get CVS source tree to build customized 
Linux kernel for Mips?

Recently, I downloaded linux-2.4.18.tar.gz, patch-2.4.19.bz2,
patch-2.4.20.bz2 from www.kernel.org, used cross-compiler 
mipsel-linux-gcc, mips-linux-ld
on Redhat 7.3 PC envoronment, and got quite a few errors from 
compiling and ld. Can you or someone give me help?

Thanks,

Jiahan


__________________________________________________
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From Geert.Uytterhoeven@sonycom.com Tue Feb 25 17:05:36 2003
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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Jiahan Chen <jiahanchen@yahoo.com>
cc: Pete Popov <ppopov@mvista.com>,
	Linux/MIPS Development <linux-mips@linux-mips.org>
Subject: Re: Kernel Source Tree & Rebuild for Mips
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On Tue, 25 Feb 2003, Jiahan Chen wrote:
> --- Pete Popov <ppopov@mvista.com> wrote:
> > On Tue, 2003-02-25 at 00:01, Chris Zimman wrote:
> > > I've seen some strange stuff in the PCI code in 2.4.19-rc1 and 2.4.20
> > > from the CVS tree.
> > > 
> 
> Where and how can I get CVS source tree to build customized 
> Linux kernel for Mips?

http://www.google.com/search?q=Linux+MIPS+CVS

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


From ppopov@mvista.com Tue Feb 25 17:33:15 2003
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Subject: Re: Kernel Source Tree & Rebuild for Mips
From: Pete Popov <ppopov@mvista.com>
To: Jiahan Chen <jiahanchen@yahoo.com>
Cc: linux-mips@linux-mips.org
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On Tue, 2003-02-25 at 08:49, Jiahan Chen wrote:
> --- Pete Popov <ppopov@mvista.com> wrote:
> > On Tue, 2003-02-25 at 00:01, Chris Zimman wrote:
> > > I've seen some strange stuff in the PCI code in 2.4.19-rc1 and 2.4.20
> > > from the CVS tree.
> > > 
> 
> Where and how can I get CVS source tree to build customized 
> Linux kernel for Mips?
> 
> Recently, I downloaded linux-2.4.18.tar.gz, patch-2.4.19.bz2,
> patch-2.4.20.bz2 from www.kernel.org, used cross-compiler 
> mipsel-linux-gcc, mips-linux-ld
> on Redhat 7.3 PC envoronment, and got quite a few errors from 
> compiling and ld. Can you or someone give me help?

The mips linux port is hosted on linux-mips.org. Take a look at the
documentation on www.linux-mips.org and go from there.

Pete


From jsun@orion.mvista.com Tue Feb 25 17:47:29 2003
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From: Jun Sun <jsun@mvista.com>
To: jeff <jeff_lee@coventive.com>
Cc: linux-mips@linux-mips.org, jsun@mvista.com
Subject: Re: Kernel 2.4.20
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On Tue, Feb 25, 2003 at 03:58:51PM +0800, jeff wrote:
> Dear All,
>     I am trying to porting NEC Vr4131 platform from 2.4.16 to 2.4.20 but I found some problem.
> In kernel 2.4.16, the kernel entry is 0x80002470 but the kernel entry in 2.4.20 is 0x801xxxxx
> So my problem is how to change the kernel entry from 0x801xxxxx to be 0x8000xxxx? or how 
> to test this kernel when the kernel entry is 0x801xxxxx?
>

Change LOADADDR to 0x80002000 in arch/mips/Makefile.  If you
want to learn more about it, see 

http://linux.junsun.net/porting-howto/porting-howto.html#chapter-directory

Jun
 

From baitisj@idealab.com Tue Feb 25 21:55:01 2003
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From: Jeff Baitis <baitisj@evolution.com>
To: Pete Popov <ppopov@mvista.com>
Cc: linux-mips@linux-mips.org
Subject: Re: fixup_bigphys_addr and DBAu1500 dev board
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References: <200302201135.09154.krishnakumar@naturesoft.net> <20030221.112456.41627052.nemoto@toshiba-tops.co.jp> <20030221122515.E20129@luca.pas.lab> <3E568ECC.2090601@embeddededge.com> <20030221195031.I20129@luca.pas.lab> <1046108783.16540.512.camel@zeus.mvista.com>
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Yes, the DBAu1500 board does not have CardBus support. We want to support
802.11A/G, so at the moment I have a 3.3V PCI card with a Texas Instruments
1510 CardBus bridge. A lot of modern wireless cards are CardBus-only, so that's
why we have decided to incorporate the TI bridge into our boards.

If someone out there has some notes or tips concerning getting PCMCIA working
under this architecture, I would greatly appreciate the information.

Take care, and thanks again!

-Jeff


On Mon, Feb 24, 2003 at 09:46:24AM -0800, Pete Popov wrote:
> On Fri, 2003-02-21 at 19:50, Jeff Baitis wrote:
> > Dan & Pete:
> > 
> > Thank you very much for your help!
> > 
> > I've patched things up, and my kernel runs, but the yenta_socket kernel module
> > still locks the system. Time to break out GDB and take a look at everything!
> > Please let me know if ya'll have some suggestions. :*)
> 
> yenta socket? There's no hardware on the board to support this.
> 
> pcmcia is always a pain in the neck to setup, but it does work on the Db
> and Pb boards cause I very recently tested it. Note that I've tested it
> only as a module though. The defconfig-db1500 in linux-mips.org already
> has pcmcia support turned on. The socket driver module you'll end up
> with is drivers/pcmcia/au1x00_ss.o. That's the module you want to load.
> Note also that there is a small patch in my directory for pcmcia.
> 
> I've tested wireless cards in the past, but not recently. Recently I've
> tested ata cards only. You might want to start with that as proof that
> you have everything else working.
> 
> > After the 36-bit PCI patch, I had to alter include/asm-mips/io.h in order to
> > get drivers/net/wireless to compile. Preprocessor expansion of outw_p in the
> > hermes.h -> hermes_enable_interrupt and hermes_set_irqmask inline functions
> > caused some issues; I hope this patch is of some use!
> 
> Only if Ralf applies it :)
> 
> Pete

-- 
         Jeffrey Baitis - Associate Software Engineer

                    Evolution Robotics, Inc.
                     130 West Union Street
                       Pasadena CA 91103

 tel: 626.535.2776  |  fax: 626.535.2777  |  baitisj@evolution.com 


From ppopov@mvista.com Tue Feb 25 22:01:34 2003
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Subject: Re: fixup_bigphys_addr and DBAu1500 dev board
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On Tue, 2003-02-25 at 13:54, Jeff Baitis wrote:
> Yes, the DBAu1500 board does not have CardBus support. We want to support
> 802.11A/G, so at the moment I have a 3.3V PCI card with a Texas Instruments
> 1510 CardBus bridge. A lot of modern wireless cards are CardBus-only, so that's
> why we have decided to incorporate the TI bridge into our boards.

Ah, yes, that's true.  Just FYI, I had to debug a cardbus problem months
ago on a different architecture, so I did it on the Pb1500 instead. It
was a pci-cardbus adapter and I did get it to work,eventually, with a
cardbus wireless card. Unfortunately I didn't have time to clean it up
and submit it anywhere, internally or externally, and the bits died at
some point. 

So what you're trying to do is not hopeless but it will require some
debugging :)

Pete

> If someone out there has some notes or tips concerning getting PCMCIA working
> under this architecture, I would greatly appreciate the information.
> 
> Take care, and thanks again!
> 
> -Jeff
> 
> 
> On Mon, Feb 24, 2003 at 09:46:24AM -0800, Pete Popov wrote:
> > On Fri, 2003-02-21 at 19:50, Jeff Baitis wrote:
> > > Dan & Pete:
> > > 
> > > Thank you very much for your help!
> > > 
> > > I've patched things up, and my kernel runs, but the yenta_socket kernel module
> > > still locks the system. Time to break out GDB and take a look at everything!
> > > Please let me know if ya'll have some suggestions. :*)
> > 
> > yenta socket? There's no hardware on the board to support this.
> > 
> > pcmcia is always a pain in the neck to setup, but it does work on the Db
> > and Pb boards cause I very recently tested it. Note that I've tested it
> > only as a module though. The defconfig-db1500 in linux-mips.org already
> > has pcmcia support turned on. The socket driver module you'll end up
> > with is drivers/pcmcia/au1x00_ss.o. That's the module you want to load.
> > Note also that there is a small patch in my directory for pcmcia.
> > 
> > I've tested wireless cards in the past, but not recently. Recently I've
> > tested ata cards only. You might want to start with that as proof that
> > you have everything else working.
> > 
> > > After the 36-bit PCI patch, I had to alter include/asm-mips/io.h in order to
> > > get drivers/net/wireless to compile. Preprocessor expansion of outw_p in the
> > > hermes.h -> hermes_enable_interrupt and hermes_set_irqmask inline functions
> > > caused some issues; I hope this patch is of some use!
> > 
> > Only if Ralf applies it :)
> > 
> > Pete


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From: Keith Owens <kaos@sgi.com>
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Subject: Re: modules_install 
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On Tue, 25 Feb 2003 14:51:40 +0100 (MET), 
Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>On Tue, 25 Feb 2003, Gilad Benjamini wrote:
>> How does one tweak the kernel's "modules_install" target in the 
>> makefile to properly be used for cross compiling ?
>> I can change the kernel Makefile, but I'd rather not.
>
>make INSTALL_MOD_PATH=...
>
>Note that depmod will fail anyway.

Cross compile for ia64.

make ARCH=ia64 \
	CROSS_COMPILE=/usr/bin/ia64-linux- \
	INSTALL_MOD_PATH=/build/kaos \
	DEPMOD=/bin/true

DEPMOD=/bin/true makes depmod a noop, the first boot on the target will
build modules.dep.


From yoichi_yuasa@montavista.co.jp Wed Feb 26 03:00:15 2003
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Date: Wed, 26 Feb 2003 11:54:05 +0900
From: Yoichi Yuasa <yoichi_yuasa@montavista.co.jp>
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On Tue, 25 Feb 2003 14:18:38 +0100 (MET)
"Maciej W. Rozycki" <macro@ds2.pg.gda.pl> wrote:

> On Tue, 25 Feb 2003, Yoichi Yuasa wrote:
> 
> > binutils -mcpu option for VR4100 series
> > 
> > 2.10:
> >         * VR4100
> >         * vr4100
> >         * 4100
> >         * mips64vr4100
> >         * r4100
> > 
> > 2.11:
> > 2.12:
> > 2.13:
> >         * VR4100
> >         * 4100
> >         * mips64vr4100
> >         * r4100
> 
>  They are case insensitive, which is why the redundancy was removed.
> 
> > In addition for the VR4100 series, there is an -m4100 option.
> 
>  Which is deprecated and scheduled for removal in the future.
> 
> > As for us, it is best to use the following option.
> > 
> > GCCFLAGS        += -mcpu=r4100 -mips2 -Wa,-m4100,--trap
> > 
> > Would you apply this patch to CVS?
> 
>  The trunk version of gas only supports "-m4100" and "vr4100" (but leading
> letters are dropped if no exact match happens) for "-mcpu=" (which is also
> deprecated), "-march=" and "-mtune=".  Additionally it supports "vr4111",
> "vr4111", "vr4120", "vr4130" and "vr4181".  I suggest you go for: 
> 
> GCCFLAGS	+= -mcpu=vr4100 -mips2 -Wa,--trap
> 
> for now as other options may trigger an error depending on the version of
> tools used ("-mcpu=" is passed down to gas).

With the following versions.
I cannot compile with an instruction peculiar to VR4100, if there is no -m4100.

GNU ld version 2.12.90.0.1 20020307
GNU ld version 2.12.1

We need to add -m4100 option.

GCCFLAGS	+= -mcpu=vr4100 -mips2 -Wa,-m4100,--trap

>  I think we'll soon have to cook up a run-time gcc check for what is
> accepted and use the "-march=" and "-mtune=" options preferably and
> failing that, revert to legacy options like above.

Thanks,

Yoichi

From jiahanchen@yahoo.com Wed Feb 26 03:06:44 2003
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Date: Tue, 25 Feb 2003 19:06:36 -0800 (PST)
From: Jiahan Chen <jiahanchen@yahoo.com>
Subject: CVS Usage and Kernel Build
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: linux-mips@linux-mips.org
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> > 
> > Where and how can I get CVS source tree to build customized 
> > Linux kernel for Mips?
> 
> http://www.google.com/search?q=Linux+MIPS+CVS
> 
> Gr{oetje,eeting}s,
>

From Mips web-site, I read:
 
cvs -d :pserver:cvs@ftp.linux-mips.org:/home/cvs login
(Only needed the first time you use anonymous CVS, the password is "cvs")
cvs -d :pserver:cvs@ftp.linux-mips.org:/home/cvs co <repository>

I have a few questions:
1. There should be a client "cvs" in my linux PC, then to use 
   above command to get CVS source files INDIVIDUALLY?
2. After get everything from ftp site as above, do we use
   the similar procedure to re-build linux kernel for MIPS, such as
   make config; make dep; make vmlinux
3. Does this source tree support R3000 (CPU) and USB?
4. In order to add a new USB device driver, do I need update
   drivers/usb/Config.In and drivers/usb/Makefile manully?

Currently, I am in the initial phase for development, the Network
card is not available and Winmoden doesn't work with Linux,
so I have no ftp connection from my Linux box to get
CVS. In this case, is there any alternative to get CVS source
tree?

Thanks,

Jiahan

 


__________________________________________________
Do you Yahoo!?
Yahoo! Tax Center - forms, calculators, tips, more
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From Geert.Uytterhoeven@sonycom.com Wed Feb 26 09:28:08 2003
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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Jiahan Chen <jiahanchen@yahoo.com>
cc: Linux/MIPS Development <linux-mips@linux-mips.org>
Subject: Re: CVS Usage and Kernel Build
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On Tue, 25 Feb 2003, Jiahan Chen wrote:
> > > Where and how can I get CVS source tree to build customized 
> > > Linux kernel for Mips?
> > 
> > http://www.google.com/search?q=Linux+MIPS+CVS
> > 
> > Gr{oetje,eeting}s,
> >
> 
> >From Mips web-site, I read:
>  
> cvs -d :pserver:cvs@ftp.linux-mips.org:/home/cvs login
> (Only needed the first time you use anonymous CVS, the password is "cvs")
> cvs -d :pserver:cvs@ftp.linux-mips.org:/home/cvs co <repository>
> 
> I have a few questions:
> 1. There should be a client "cvs" in my linux PC, then to use 
>    above command to get CVS source files INDIVIDUALLY?

cvs -d :pserver:cvs@ftp.linux-mips.org:/home/cvs co linux/path/to/file.

> 2. After get everything from ftp site as above, do we use
>    the similar procedure to re-build linux kernel for MIPS, such as
>    make config; make dep; make vmlinux

Yes.

> 3. Does this source tree support R3000 (CPU) and USB?

Yes.

> 4. In order to add a new USB device driver, do I need update
>    drivers/usb/Config.In and drivers/usb/Makefile manully?

Yes.

> Currently, I am in the initial phase for development, the Network
> card is not available and Winmoden doesn't work with Linux,
> so I have no ftp connection from my Linux box to get
> CVS. In this case, is there any alternative to get CVS source
> tree?

Use CVS on another box.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


From yogishpatila@rediffmail.com Wed Feb 26 11:50:43 2003
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Subject: problematic big endian ramdisk...
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I am unable to make a working big endian ramdisk.

I have tried big endian ramdisk from
ftp://ftp.ltc.com/pub/linux/mips/ramdisk/ramdisk
and sorry to say this is simply not big endian ramdisk.
i find in mailing list other people also complaining about 
this...

when trying to execve it gives me ENOEXEC error that is because
first few bytes of elf header are swapped.

specific problem is in identifying the e_type and e_machine 
fields
in elf header of executables.
expected value of e_type is 0x2(ET_EXEC) amd e_machine is
0x8(EM_MIPS)
but those are read as 0x200 and 0x800 respectivly ..this is
obviously the endianness problem.

but if i try the big endian ramdisk from debian it just goes 
fine.
but this is precompiled busybox hence i can't add my stuff 
there.

can anybody point to a link for downloading a correct big endian
ramdisk..

with regards,
--yogi




From macro@ds2.pg.gda.pl Wed Feb 26 12:18:24 2003
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Date: Wed, 26 Feb 2003 13:18:40 +0100 (MET)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Yoichi Yuasa <yoichi_yuasa@montavista.co.jp>
cc: ralf@linux-mips.org, linux-mips@linux-mips.org
Subject: Re: Change -mcpu option for VR41xx
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On Wed, 26 Feb 2003, Yoichi Yuasa wrote:

> >  The trunk version of gas only supports "-m4100" and "vr4100" (but leading
> > letters are dropped if no exact match happens) for "-mcpu=" (which is also
> > deprecated), "-march=" and "-mtune=".  Additionally it supports "vr4111",
> > "vr4111", "vr4120", "vr4130" and "vr4181".  I suggest you go for: 
> > 
> > GCCFLAGS	+= -mcpu=vr4100 -mips2 -Wa,--trap
> > 
> > for now as other options may trigger an error depending on the version of
> > tools used ("-mcpu=" is passed down to gas).
> 
> With the following versions.
> I cannot compile with an instruction peculiar to VR4100, if there is no -m4100.
> 
> GNU ld version 2.12.90.0.1 20020307
> GNU ld version 2.12.1
> 
> We need to add -m4100 option.
> 
> GCCFLAGS	+= -mcpu=vr4100 -mips2 -Wa,-m4100,--trap

 Strange, what does `gcc -v -mcpu=vr4100 -mips2 -Wa,--trap -xassembler -c
/dev/null -o /dev/null' say to you? 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From lindahl@keyresearch.com Thu Feb 27 00:53:40 2003
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In the mips, mips64, and even the i386 arch, arch/kernel/smp.c has
this in smp_call_function:

        spin_lock(&call_lock);
        call_data = &data;

        /* Send a message to all other CPUs and wait for them to respond */
        for (i = 0; i < smp_num_cpus; i++)
                if (i != cpu)
                        core_send_ipi(i, SMP_CALL_FUNCTION);

call_data isn't volatile, it's a plain static *. So how can we be sure
that "call_data = &data" does anything other than change a register?

The i386 has a wb() after the assignment; we don't even have that.

greg



From yoichi_yuasa@montavista.co.jp Thu Feb 27 01:47:21 2003
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From: Yoichi Yuasa <yoichi_yuasa@montavista.co.jp>
To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
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On Wed, 26 Feb 2003 13:18:40 +0100 (MET)
"Maciej W. Rozycki" <macro@ds2.pg.gda.pl> wrote:

> On Wed, 26 Feb 2003, Yoichi Yuasa wrote:
> 
> > >  The trunk version of gas only supports "-m4100" and "vr4100" (but leading
> > > letters are dropped if no exact match happens) for "-mcpu=" (which is also
> > > deprecated), "-march=" and "-mtune=".  Additionally it supports "vr4111",
> > > "vr4111", "vr4120", "vr4130" and "vr4181".  I suggest you go for: 
> > > 
> > > GCCFLAGS	+= -mcpu=vr4100 -mips2 -Wa,--trap
> > > 
> > > for now as other options may trigger an error depending on the version of
> > > tools used ("-mcpu=" is passed down to gas).
> > 
> > With the following versions.
> > I cannot compile with an instruction peculiar to VR4100, if there is no -m4100.
> > 
> > GNU ld version 2.12.90.0.1 20020307
> > GNU ld version 2.12.1
> > 
> > We need to add -m4100 option.
> > 
> > GCCFLAGS	+= -mcpu=vr4100 -mips2 -Wa,-m4100,--trap
> 
>  Strange, what does `gcc -v -mcpu=vr4100 -mips2 -Wa,--trap -xassembler -c
> /dev/null -o /dev/null' say to you? 

$ mipsel-linux-gcc -v -mcpu=vr4100 -mips2 -Wa,--trap -xassembler -c /dev/null -o /dev/null
Reading specs from /usr/local/lib/gcc-lib/mipsel-linux/2.95.4/specs
gcc version 2.95.4 20011002 (Debian prerelease)
 /usr/local/mipsel-linux/bin/as -EL -mips2 -mcpu=vr4100 -v -KPIC --trap -o /dev/null /dev/null
GNU assembler version 2.12.90.0.1 (mipsel-linux) using BFD version 2.12.90.0.1 20020307 Debian/GNU Linux

Yoichi

From jsun@orion.mvista.com Thu Feb 27 01:54:42 2003
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In my previous patch that fixes a bunch of TLB issues,
a new bug was introduced.  Since we now rely on mm->cpu_vm_mask
to indicate the true MMU owner, we need to update this flag
whenever there is ownership change.  

It turns out that activate_mm() does the ownership as well.
Here is the patch that fixes this problem.

A big thank to Clausen for spotting this and tracing it to
a great depth.

Jun




--a8Wt8u1KmwUX3Y2C
Content-Type: text/plain; charset=us-ascii
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diff -Nru link/include/asm-mips/mmu_context.h.orig link/include/asm-mips/mmu_context.h
--- link/include/asm-mips/mmu_context.h.orig	Thu Feb 20 10:22:57 2003
+++ link/include/asm-mips/mmu_context.h	Wed Feb 26 17:43:43 2003
@@ -126,6 +126,7 @@
 activate_mm(struct mm_struct *prev, struct mm_struct *next)
 {
 	unsigned long flags;
+	int cpu = smp_processor_id();
 
 	local_irq_save(flags);
 
@@ -134,7 +135,11 @@
 
 	write_c0_entryhi(cpu_context(smp_processor_id(), next));
 	TLBMISS_HANDLER_SETUP_PGD(next->pgd);
-	
+
+	/* mark mmu ownership change */	
+	clear_bit(cpu, &prev->cpu_vm_mask);
+	set_bit(cpu, &next->cpu_vm_mask);
+
 	local_irq_restore(flags);
 }
 
diff -Nru link/include/asm-mips64/mmu_context.h.orig link/include/asm-mips64/mmu_context.h
--- link/include/asm-mips64/mmu_context.h.orig	Thu Feb 20 10:23:10 2003
+++ link/include/asm-mips64/mmu_context.h	Wed Feb 26 17:44:03 2003
@@ -117,6 +117,7 @@
 activate_mm(struct mm_struct *prev, struct mm_struct *next)
 {
 	unsigned long flags;
+	int cpu = smp_processor_id();
 
 	local_irq_save(flags);
 
@@ -125,7 +126,11 @@
 
 	write_c0_entryhi(cpu_context(smp_processor_id(), next));
 	TLBMISS_HANDLER_SETUP_PGD(next->pgd);
-	
+
+	/* mark mmu ownership change */ 
+	clear_bit(cpu, &prev->cpu_vm_mask);
+	set_bit(cpu, &next->cpu_vm_mask);
+
 	local_irq_restore(flags);
 }
 

--a8Wt8u1KmwUX3Y2C--

From kevink@mips.com Thu Feb 27 07:57:37 2003
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> In the mips, mips64, and even the i386 arch, arch/kernel/smp.c has
> this in smp_call_function:
> 
>         spin_lock(&call_lock);
>         call_data = &data;
> 
>         /* Send a message to all other CPUs and wait for them to respond */
>         for (i = 0; i < smp_num_cpus; i++)
>                 if (i != cpu)
>                         core_send_ipi(i, SMP_CALL_FUNCTION);
> 
> call_data isn't volatile, it's a plain static *. So how can we be sure
> that "call_data = &data" does anything other than change a register?
> 
> The i386 has a wb() after the assignment; we don't even have that.

call_data is neither local nor static to the function, so the modification
of the storage location would seem to be mandatory for the compiler
before the call to core_send_ipi(), so I can see how the code, as written, 
would generally work on most MIPS CPUs.  However, it would be legal 
for the compiler to defer the store until *just* before the invocation of 
core_send_ipi(), and on moderately complex,  high-ILP processors 
it seems to me like the wb() might well be necessary.  I take it that
you've observed a problem with this on your system?:

From lindahl@keyresearch.com Thu Feb 27 08:46:09 2003
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> call_data is neither local nor static to the function, so the modification
> of the storage location would seem to be mandatory for the compiler
> before the call to core_send_ipi(),

Ah, yes. call_data is static but is scoped in the file, not the function.

And if you add OOO to the mix, I guess that the wb() becomes
necessary.

> I take it that you've observed a problem with this on your system?:

No. I had a bug that was freezing one of my cpus, so the other one was
eventually getting stuck in an endless loop in smp_call_function(). I
added a little debugging so it prink()ed when that happens, and then I
got to thinking about how smp_call_function() worked...

Personally, I think the kernel ought to not go into endless loops
without saying something useful on the console. Hanging in
smp_call_function() is always the symptom, not the bug, but still,
it's nice to print what is known instead of being silent.
Unfortunately, I see quite a few opportunities for endless loops in
device drivers (grrr). Makes you wonder how Windows works at all with
all those shitty but closed-source drivers.

-- greg


From ZhouY.external@infineon.com Thu Feb 27 10:34:34 2003
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Subject: How can I the flash memory of MIPS Malta board in my application?
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Hi dear experts,
    I want to save some test data inside the flash memory of MIPS Malta
board, and later access these test data from my application. How can I do
that? 
    If you know the clue about it, please drop me a line. Thanks in advance!

   Best regards,

   Yidan Zhou

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Subject: [patch] simulate_ll and simulate_sc
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This is a multi-part message in MIME format.

--Multipart_Thu__27_Feb_2003_20:48:46_+0900_082acd58
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Hi Ralf,

I found a bug in simulate_ll and simulate_sc.

When send_sig in these, in order not to operate the value of EPC correctly,
simulate_* happens continuously.

Please apply these patches to CVS tree.

Thanks,

Yoichi


--Multipart_Thu__27_Feb_2003_20:48:46_+0900_082acd58
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 name="simulate_llsc-v24.diff"
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diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/kernel/traps.c linux/arch/mips/kernel/traps.c
--- linux.orig/arch/mips/kernel/traps.c	Tue Feb 11 07:50:48 2003
+++ linux/arch/mips/kernel/traps.c	Thu Feb 27 20:00:43 2003
@@ -140,6 +140,7 @@
 	return;
 
 sig:
+	compute_return_epc(regs);
 	send_sig(signal, current, 1);
 }
 
@@ -184,6 +185,7 @@
 	return;
 
 sig:
+	compute_return_epc(regs);
 	send_sig(signal, current, 1);
 }
 

--Multipart_Thu__27_Feb_2003_20:48:46_+0900_082acd58
Content-Type: text/plain;
 name="simulate_llsc-v25.diff"
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diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/kernel/traps.c linux/arch/mips/kernel/traps.c
--- linux.orig/arch/mips/kernel/traps.c	Wed Feb 12 13:26:43 2003
+++ linux/arch/mips/kernel/traps.c	Thu Feb 27 20:34:29 2003
@@ -135,6 +135,7 @@
 	return;
 
 sig:
+	compute_return_epc(regs);
 	send_sig(signal, current, 1);
 }
 
@@ -179,6 +180,7 @@
 	return;
 
 sig:
+	compute_return_epc(regs);
 	send_sig(signal, current, 1);
 }
 

--Multipart_Thu__27_Feb_2003_20:48:46_+0900_082acd58--

From macro@ds2.pg.gda.pl Thu Feb 27 12:05:18 2003
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To: Yoichi Yuasa <yoichi_yuasa@montavista.co.jp>,
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On Thu, 27 Feb 2003, Yoichi Yuasa wrote:

> $ mipsel-linux-gcc -v -mcpu=vr4100 -mips2 -Wa,--trap -xassembler -c /dev/null -o /dev/null
> Reading specs from /usr/local/lib/gcc-lib/mipsel-linux/2.95.4/specs
> gcc version 2.95.4 20011002 (Debian prerelease)
>  /usr/local/mipsel-linux/bin/as -EL -mips2 -mcpu=vr4100 -v -KPIC --trap -o /dev/null /dev/null
> GNU assembler version 2.12.90.0.1 (mipsel-linux) using BFD version 2.12.90.0.1 20020307 Debian/GNU Linux

 Ah, I see how it happens now -- "-mipsN" has a higher priority than
"-mcpu=" (but lower than "-march=") so in this case "-mips2" overrides
"-mcpu=vr4100".  How about:

GCCFLAGS	+= -mcpu=vr4100 -Wa,--trap

then?

 Ralf, it seems the "-mcpu=XXXX -mipsN" settings are contradicting and
XXXX is ignored (I don't see it as my gcc translates "-mcpu=XXXX" into
"-march=XXXX -mtune=XXXX" as a step towards transiting to 3.x).  I think
the following settings would be more reasonable:

GCCFLAGS	+= -mabi=32 -mcpu=XXXX	# for the 32-bit kernel

GCCFLAGS	+= -mabi=n64 -mcpu=XXXX	# for the 64-bit kernel

(additional processor-specific flags skipped).  Is that supported by the
oldest version of binutils you want to support?

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From yoichi_yuasa@montavista.co.jp Thu Feb 27 12:43:15 2003
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Date: Thu, 27 Feb 2003 21:37:07 +0900
From: Yoichi Yuasa <yoichi_yuasa@montavista.co.jp>
To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
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Hi,

On Thu, 27 Feb 2003 13:05:02 +0100 (MET)
"Maciej W. Rozycki" <macro@ds2.pg.gda.pl> wrote:

> On Thu, 27 Feb 2003, Yoichi Yuasa wrote:
> 
> > $ mipsel-linux-gcc -v -mcpu=vr4100 -mips2 -Wa,--trap -xassembler -c /dev/null -o /dev/null
> > Reading specs from /usr/local/lib/gcc-lib/mipsel-linux/2.95.4/specs
> > gcc version 2.95.4 20011002 (Debian prerelease)
> >  /usr/local/mipsel-linux/bin/as -EL -mips2 -mcpu=vr4100 -v -KPIC --trap -o /dev/null /dev/null
> > GNU assembler version 2.12.90.0.1 (mipsel-linux) using BFD version 2.12.90.0.1 20020307 Debian/GNU Linux
> 
>  Ah, I see how it happens now -- "-mipsN" has a higher priority than
> "-mcpu=" (but lower than "-march=") so in this case "-mips2" overrides
> "-mcpu=vr4100".  How about:
> 
> GCCFLAGS	+= -mcpu=vr4100 -Wa,--trap
> 
> then?

That is fine.
However, the following warning is displayed.

Warning: The -mcpu option is deprecated.  Please use -march and -mtune instead.

>  Ralf, it seems the "-mcpu=XXXX -mipsN" settings are contradicting and
> XXXX is ignored (I don't see it as my gcc translates "-mcpu=XXXX" into
> "-march=XXXX -mtune=XXXX" as a step towards transiting to 3.x).  I think
> the following settings would be more reasonable:
> 
> GCCFLAGS	+= -mabi=32 -mcpu=XXXX	# for the 32-bit kernel
> 
> GCCFLAGS	+= -mabi=n64 -mcpu=XXXX	# for the 64-bit kernel
> 
> (additional processor-specific flags skipped).  Is that supported by the
> oldest version of binutils you want to support?

Thanks,

Yoichi

From macro@ds2.pg.gda.pl Thu Feb 27 13:07:10 2003
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From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Yoichi Yuasa <yoichi_yuasa@montavista.co.jp>
cc: ralf@linux-mips.org, linux-mips@linux-mips.org
Subject: Re: Change -mcpu option for VR41xx
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On Thu, 27 Feb 2003, Yoichi Yuasa wrote:

> >  Ah, I see how it happens now -- "-mipsN" has a higher priority than
> > "-mcpu=" (but lower than "-march=") so in this case "-mips2" overrides
> > "-mcpu=vr4100".  How about:
> > 
> > GCCFLAGS	+= -mcpu=vr4100 -Wa,--trap
> > 
> > then?
> 
> That is fine.
> However, the following warning is displayed.
> 
> Warning: The -mcpu option is deprecated.  Please use -march and -mtune instead.

 Does is disappear with "-m4100"?  That would be strange.  And "-mcpu=" is
indeed deprecated, but it works for most versions and "-march=" and
"-mtune=" are too new to be used by everyone.  But as I wrote, we will end
with a test for these options eventually as "-mcpu=" is already removed
from the trunk.  As a result the warning will disappear.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From sjhill@realitydiluted.com Thu Feb 27 14:48:25 2003
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Subject: Re: How can I the flash memory of MIPS Malta board in my application?
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ZhouY.external@infineon.com wrote:
>
>     I want to save some test data inside the flash memory of MIPS Malta
> board, and later access these test data from my application. How can I do
> that? 
>     If you know the clue about it, please drop me a line. Thanks in advance!
>
Well, I have not worked with the Malta board, yet. I will assume
the flash is standard NOR flash accessible through a sane memory
mapping. You should probably use the MTD layer and then you can
use the character or block devices to access your data. I would
guess you should use the Physically Mapped MTD driver. The MTD
web page is (http://www.linux-mtd.infradead.org/). Cheers.

-Steve


From ZhouY.external@infineon.com Thu Feb 27 15:29:06 2003
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From: ZhouY.external@infineon.com
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Subject: MIPS Malta board Linux installation 
Date: Thu, 27 Feb 2003 16:28:51 +0100
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Hello everyone,
  I tried to install a Linux to my MIPS Malta board, but during the time of
NFS installation, the linux crashed. The linux distribution is provided by
MIPS Malta Board CD  and I exactly followed the installation manual. The
following messages are the error messages and the configuration information.
  Do you have any clues about it?
  Thanks in advance!

  Best regards,

  Yidan Zhou 


----------------------------------------------------------------------

YAMON> info all

**** Info boot ****

YAMON ROM Monitor, Revision 02.02.
Copyright (c) 1999-2001 MIPS Technologies, Inc. - All Rights Reserved.

For a list of available commands, type 'help'.

Compilation time =              Sep 12 2002  11:41:49


**** Info board ****

Board type/revision =           0x02 (Malta) / 0x00
Core board type/revision =      0x01 (CoreLV) / 0x01
FPGA revision =                 0x0001
MAC address =                   00.d0.a0.00.01.77
Board S/N =                     0000000127
PCI bus frequency =             16.67 MHz


**** Info cpu ****

Processor Company ID/options =  0x01 (MIPS Technologies, Inc.) / 0x00
Processor ID/revision =         