From ralf@linux-mips.org Fri Jul 1 09:28:36 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Fri, 01 Jul 2005 10:28:37 +0100 (BST) From: ralf@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Fri, 01 Jul 2005 10:28:37 +0100 X-archive-position: 509 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ralf@ftp.linux-mips.org 05/07/01 10:28:30 Modified files: drivers/net : ioc3-eth.c Log message: Using the right registers to fiddle with the MII interface makes the driver work sooo much better ;-) diff -urN linux/drivers/net/ioc3-eth.c linux/drivers/net/ioc3-eth.c --- linux/drivers/net/ioc3-eth.c 2005/03/18 17:37:32 1.99 +++ linux/drivers/net/ioc3-eth.c 2005/07/01 09:28:30 1.100 @@ -499,7 +499,7 @@ ioc3_w_micr((phy << MICR_PHYADDR_SHIFT) | reg | MICR_READTRIG); while (ioc3_r_micr() & MICR_BUSY); - return ioc3_r_micr() & MIDR_DATA_MASK; + return ioc3_r_midr_r() & MIDR_DATA_MASK; } static void ioc3_mdio_write(struct net_device *dev, int phy, int reg, int data) From ralf@linux-mips.org Fri Jul 1 10:43:25 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Fri, 01 Jul 2005 11:43:25 +0100 (BST) From: ralf@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Fri, 01 Jul 2005 11:43:25 +0100 X-archive-position: 510 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ralf@ftp.linux-mips.org 05/07/01 11:43:17 Modified files: drivers/net : ioc3-eth.c Log message: First check the link, then configure duplex in the NIC. Without this the IOC3 might missbehave until the MII timer runs for the first time. diff -urN linux/drivers/net/ioc3-eth.c linux/drivers/net/ioc3-eth.c --- linux/drivers/net/ioc3-eth.c 2005/07/01 09:28:30 1.100 +++ linux/drivers/net/ioc3-eth.c 2005/07/01 10:43:17 1.101 @@ -1291,7 +1291,6 @@ dev->features = NETIF_F_IP_CSUM; #endif - ioc3_setup_duplex(ip); sw_physid1 = ioc3_mdio_read(dev, ip->mii.phy_id, MII_PHYSID1); sw_physid2 = ioc3_mdio_read(dev, ip->mii.phy_id, MII_PHYSID2); @@ -1300,6 +1299,7 @@ goto out_stop; mii_check_media(&ip->mii, 1, 1); + ioc3_setup_duplex(ip); vendor = (sw_physid1 << 12) | (sw_physid2 >> 4); model = (sw_physid2 >> 4) & 0x3f; From macro@linux-mips.org Fri Jul 1 16:11:11 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Fri, 01 Jul 2005 17:11:11 +0100 (BST) From: macro@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Fri, 01 Jul 2005 17:11:11 +0100 X-archive-position: 511 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: macro@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: macro@ftp.linux-mips.org 05/07/01 17:11:05 Modified files: arch/mips/dec : ecc-berr.c int-handler.S kn01-berr.c kn02-irq.c kn02xa-berr.c setup.c arch/mips/dec/prom: identify.c drivers/mtd/devices: ms02-nv.c drivers/net : declance.c drivers/scsi : dec_esp.c drivers/serial : dz.c drivers/tc : tc.c zs.c drivers/video : pmag-aa-fb.c pmag-ba-fb.c pmagb-b-fb.c include/asm-mips/dec: ioasic_addrs.h kn01.h kn02.h kn02xa.h kn03.h kn05.h tc.h include/asm-mips/mach-dec: mc146818rtc.h Added files: include/asm-mips/dec: system.h Log message: Use physical addresses at the interface level, letting drivers remap them as appropriate. diff -urN linux/arch/mips/dec/ecc-berr.c linux/arch/mips/dec/ecc-berr.c --- linux/arch/mips/dec/ecc-berr.c 2005/06/22 20:56:26 1.7 +++ linux/arch/mips/dec/ecc-berr.c 2005/07/01 16:10:40 1.8 @@ -227,11 +227,11 @@ */ static inline void dec_kn02_be_init(void) { - volatile u32 *csr = (void *)KN02_CSR_BASE; + volatile u32 *csr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR); unsigned long flags; - kn0x_erraddr = (void *)(KN02_SLOT_BASE + KN02_ERRADDR); - kn0x_chksyn = (void *)(KN02_SLOT_BASE + KN02_CHKSYN); + kn0x_erraddr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_ERRADDR); + kn0x_chksyn = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CHKSYN); spin_lock_irqsave(&kn02_lock, flags); @@ -250,11 +250,11 @@ static inline void dec_kn03_be_init(void) { - volatile u32 *mcr = (void *)(KN03_SLOT_BASE + IOASIC_MCR); - volatile u32 *mbcs = (void *)(KN4K_SLOT_BASE + KN4K_MB_CSR); + volatile u32 *mcr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR); + volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR); - kn0x_erraddr = (void *)(KN03_SLOT_BASE + IOASIC_ERRADDR); - kn0x_chksyn = (void *)(KN03_SLOT_BASE + IOASIC_CHKSYN); + kn0x_erraddr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_ERRADDR); + kn0x_chksyn = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_CHKSYN); /* * Set normal ECC detection and generation, enable ECC correction. diff -urN linux/arch/mips/dec/int-handler.S linux/arch/mips/dec/int-handler.S --- linux/arch/mips/dec/int-handler.S 2003/11/18 01:17:46 1.15 +++ linux/arch/mips/dec/int-handler.S 2005/07/01 16:10:40 1.16 @@ -2,9 +2,9 @@ * arch/mips/dec/int-handler.S * * Copyright (C) 1995, 1996, 1997 Paul M. Antoine and Harald Koerfgen - * Copyright (C) 2000, 2001, 2002, 2003 Maciej W. Rozycki + * Copyright (C) 2000, 2001, 2002, 2003, 2005 Maciej W. Rozycki * - * Written by Ralf Baechle and Andreas Busse, modified for DECStation + * Written by Ralf Baechle and Andreas Busse, modified for DECstation * support by Paul Antoine and Harald Koerfgen. * * completly rewritten: @@ -14,11 +14,12 @@ * by Maciej W. Rozycki. */ #include + +#include #include -#include #include +#include #include -#include #include #include @@ -28,11 +29,14 @@ #include #include +#define KN02_CSR_BASE CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR) +#define KN02XA_IOASIC_BASE CKSEG1ADDR(KN02XA_SLOT_BASE + IOASIC_IOCTL) +#define KN03_IOASIC_BASE CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_IOCTL) .text .set noreorder /* - * decstation_handle_int: Interrupt handler for DECStations + * decstation_handle_int: Interrupt handler for DECstations * * We follow the model in the Indy interrupt code by David Miller, where he * says: a lot of complication here is taken away because: @@ -48,7 +52,7 @@ * 3) Linux only thinks in terms of all IRQs on or all IRQs * off, nothing in between like BSD spl() brain-damage. * - * Furthermore, the IRQs on the DECStations look basically (barring + * Furthermore, the IRQs on the DECstations look basically (barring * software IRQs which we don't use at all) like... * * DS2100/3100's, aka kn01, aka Pmax: @@ -61,7 +65,7 @@ * 3 Lance Ethernet * 4 DZ11 serial * 5 RTC - * 6 Memory Controller + * 6 Memory Controller & Video * 7 FPU * * DS5000/200, aka kn02, aka 3max: diff -urN linux/arch/mips/dec/kn01-berr.c linux/arch/mips/dec/kn01-berr.c --- linux/arch/mips/dec/kn01-berr.c 2005/06/22 20:58:45 1.1 +++ linux/arch/mips/dec/kn01-berr.c 2005/07/01 16:10:40 1.2 @@ -51,7 +51,7 @@ static inline void dec_kn01_be_ack(void) { - volatile u16 *csr = (void *)(KN01_SLOT_BASE + KN01_CSR); + volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR); unsigned long flags; spin_lock_irqsave(&kn01_lock, flags); @@ -64,7 +64,8 @@ static int dec_kn01_be_backend(struct pt_regs *regs, int is_fixup, int invoker) { - volatile u32 *kn01_erraddr = (void *)(KN01_SLOT_BASE + KN01_ERRADDR); + volatile u32 *kn01_erraddr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + + KN01_ERRADDR); static const char excstr[] = "exception"; static const char intstr[] = "interrupt"; @@ -152,7 +153,7 @@ irqreturn_t dec_kn01_be_interrupt(int irq, void *dev_id, struct pt_regs *regs) { - volatile u16 *csr = (void *)(KN01_SLOT_BASE + KN01_CSR); + volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR); int action; if (!(*csr & KN01_CSR_MEMERR)) @@ -178,7 +179,7 @@ void __init dec_kn01_be_init(void) { - volatile u16 *csr = (void *)(KN01_SLOT_BASE + KN01_CSR); + volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR); unsigned long flags; spin_lock_irqsave(&kn01_lock, flags); diff -urN linux/arch/mips/dec/kn02-irq.c linux/arch/mips/dec/kn02-irq.c --- linux/arch/mips/dec/kn02-irq.c 2005/06/22 20:56:26 1.7 +++ linux/arch/mips/dec/kn02-irq.c 2005/07/01 16:10:40 1.8 @@ -37,7 +37,8 @@ static inline void unmask_kn02_irq(unsigned int irq) { - volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE; + volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + + KN02_CSR); cached_kn02_csr |= (1 << (irq - kn02_irq_base + 16)); *csr = cached_kn02_csr; @@ -45,7 +46,8 @@ static inline void mask_kn02_irq(unsigned int irq) { - volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE; + volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + + KN02_CSR); cached_kn02_csr &= ~(1 << (irq - kn02_irq_base + 16)); *csr = cached_kn02_csr; @@ -105,7 +107,8 @@ void __init init_kn02_irqs(int base) { - volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE; + volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + + KN02_CSR); unsigned long flags; int i; diff -urN linux/arch/mips/dec/kn02xa-berr.c linux/arch/mips/dec/kn02xa-berr.c --- linux/arch/mips/dec/kn02xa-berr.c 2005/06/22 20:58:45 1.1 +++ linux/arch/mips/dec/kn02xa-berr.c 2005/07/01 16:10:40 1.2 @@ -20,6 +20,7 @@ #include #include +#include #include #include @@ -29,8 +30,8 @@ static inline void dec_kn02xa_be_ack(void) { - volatile u32 *mer = (void *)KN02XA_MER; - volatile u32 *mem_intr = (void *)KN02XA_MEM_INTR; + volatile u32 *mer = (void *)CKSEG1ADDR(KN02XA_MER); + volatile u32 *mem_intr = (void *)CKSEG1ADDR(KN02XA_MEM_INTR); *mer = KN02CA_MER_INTR; /* Clear errors; keep the ARC IRQ. */ *mem_intr = 0; /* Any write clears the bus IRQ. */ @@ -40,8 +41,8 @@ static int dec_kn02xa_be_backend(struct pt_regs *regs, int is_fixup, int invoker) { - volatile u32 *kn02xa_mer = (void *)KN02XA_MER; - volatile u32 *kn02xa_ear = (void *)KN02XA_EAR; + volatile u32 *kn02xa_mer = (void *)CKSEG1ADDR(KN02XA_MER); + volatile u32 *kn02xa_ear = (void *)CKSEG1ADDR(KN02XA_EAR); static const char excstr[] = "exception"; static const char intstr[] = "interrupt"; @@ -126,7 +127,7 @@ void __init dec_kn02xa_be_init(void) { - volatile u32 *mbcs = (void *)(KN4K_SLOT_BASE + KN4K_MB_CSR); + volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR); /* For KN04 we need to make sure EE (?) is enabled in the MB. */ if (current_cpu_data.cputype == CPU_R4000SC) diff -urN linux/arch/mips/dec/setup.c linux/arch/mips/dec/setup.c --- linux/arch/mips/dec/setup.c 2005/06/22 20:56:26 1.47 +++ linux/arch/mips/dec/setup.c 2005/07/01 16:10:40 1.48 @@ -39,6 +39,7 @@ #include #include #include +#include extern void dec_machine_restart(char *command); @@ -48,10 +49,16 @@ extern asmlinkage void decstation_handle_int(void); +unsigned long dec_kn_slot_base, dec_kn_slot_size; + +EXPORT_SYMBOL(dec_kn_slot_base); +EXPORT_SYMBOL(dec_kn_slot_size); + spinlock_t ioasic_ssr_lock; volatile u32 *ioasic_base; -unsigned long dec_kn_slot_size; + +EXPORT_SYMBOL(ioasic_base); /* * IRQ routing and priority tables. Priorites are set as follows: @@ -78,6 +85,9 @@ int dec_interrupt[DEC_NR_INTS] = { [0 ... DEC_NR_INTS - 1] = -1 }; + +EXPORT_SYMBOL(dec_interrupt); + int_ptr cpu_mask_nr_tbl[DEC_MAX_CPU_INTS][2] = { { { .i = ~0 }, { .p = dec_intr_unimplemented } }, }; @@ -755,7 +765,3 @@ if (dec_interrupt[DEC_IRQ_HALT] >= 0) setup_irq(dec_interrupt[DEC_IRQ_HALT], &haltirq); } - -EXPORT_SYMBOL(ioasic_base); -EXPORT_SYMBOL(dec_kn_slot_size); -EXPORT_SYMBOL(dec_interrupt); diff -urN linux/arch/mips/dec/prom/identify.c linux/arch/mips/dec/prom/identify.c --- linux/arch/mips/dec/prom/identify.c 2004/02/11 15:17:32 1.16 +++ linux/arch/mips/dec/prom/identify.c 2005/07/01 16:10:45 1.17 @@ -2,7 +2,7 @@ * identify.c: machine identification code. * * Copyright (C) 1998 Harald Koerfgen and Paul M. Antoine - * Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki + * Copyright (C) 2002, 2003, 2004, 2005 Maciej W. Rozycki */ #include #include @@ -12,6 +12,7 @@ #include #include + #include #include #include @@ -21,6 +22,7 @@ #include #include #include +#include #include "dectypes.h" @@ -68,34 +70,44 @@ static inline void prom_init_kn01(void) { - dec_rtc_base = (void *)KN01_RTC_BASE; + dec_kn_slot_base = KN01_SLOT_BASE; dec_kn_slot_size = KN01_SLOT_SIZE; + + dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN01_RTC); } static inline void prom_init_kn230(void) { - dec_rtc_base = (void *)KN01_RTC_BASE; + dec_kn_slot_base = KN01_SLOT_BASE; dec_kn_slot_size = KN01_SLOT_SIZE; + + dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN01_RTC); } static inline void prom_init_kn02(void) { - dec_rtc_base = (void *)KN02_RTC_BASE; + dec_kn_slot_base = KN02_SLOT_BASE; dec_kn_slot_size = KN02_SLOT_SIZE; + + dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN02_RTC); } static inline void prom_init_kn02xa(void) { - ioasic_base = (void *)KN02XA_IOASIC_BASE; - dec_rtc_base = (void *)KN02XA_RTC_BASE; + dec_kn_slot_base = KN02XA_SLOT_BASE; dec_kn_slot_size = IOASIC_SLOT_SIZE; + + ioasic_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_IOCTL); + dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_TOY); } static inline void prom_init_kn03(void) { - ioasic_base = (void *)KN03_IOASIC_BASE; - dec_rtc_base = (void *)KN03_RTC_BASE; + dec_kn_slot_base = KN03_SLOT_BASE; dec_kn_slot_size = IOASIC_SLOT_SIZE; + + ioasic_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_IOCTL); + dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_TOY); } diff -urN linux/drivers/mtd/devices/ms02-nv.c linux/drivers/mtd/devices/ms02-nv.c --- linux/drivers/mtd/devices/ms02-nv.c 2005/06/16 20:42:07 1.12 +++ linux/drivers/mtd/devices/ms02-nv.c 2005/07/01 16:10:49 1.13 @@ -293,13 +293,13 @@ switch (mips_machtype) { case MACH_DS5000_200: - csr = (volatile u32 *)KN02_CSR_BASE; + csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR); if (*csr & KN02_CSR_BNK32M) stride = 2; break; case MACH_DS5000_2X0: case MACH_DS5900: - csr = (volatile u32 *)KN03_MCR_BASE; + csr = (volatile u32 *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR); if (*csr & KN03_MCR_BNK32M) stride = 2; break; diff -urN linux/drivers/net/declance.c linux/drivers/net/declance.c --- linux/drivers/net/declance.c 2005/06/16 20:30:59 1.39 +++ linux/drivers/net/declance.c 2005/07/01 16:10:51 1.40 @@ -5,7 +5,7 @@ * * adopted from sunlance.c by Richard van den Berg * - * Copyright (C) 2002, 2003 Maciej W. Rozycki + * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki * * additional sources: * - PMAD-AA TURBOchannel Ethernet Module Functional Specification, @@ -57,13 +57,15 @@ #include #include +#include + #include #include #include #include #include +#include #include -#include static char version[] __devinitdata = "declance.c: v0.009 by Linux MIPS DECstation task force\n"; @@ -79,10 +81,6 @@ #define PMAD_LANCE 2 #define PMAX_LANCE 3 -#ifndef CONFIG_TC -unsigned long system_base; -unsigned long dmaptr; -#endif #define LE_CSR0 0 #define LE_CSR1 1 @@ -1027,10 +1025,6 @@ unsigned long esar_base; unsigned char *esar; -#ifndef CONFIG_TC - system_base = KN01_LANCE_BASE; -#endif - if (dec_lance_debug && version_printed++ == 0) printk(version); @@ -1063,7 +1057,7 @@ switch (type) { #ifdef CONFIG_TC case ASIC_LANCE: - dev->base_addr = system_base + IOASIC_LANCE; + dev->base_addr = CKSEG1ADDR(dec_kn_slot_base + IOASIC_LANCE); /* buffer space for the on-board LANCE shared memory */ /* @@ -1072,7 +1066,7 @@ dev->mem_start = CKSEG1ADDR(0x00020000); dev->mem_end = dev->mem_start + 0x00020000; dev->irq = dec_interrupt[DEC_IRQ_LANCE]; - esar_base = system_base + IOASIC_ESAR; + esar_base = CKSEG1ADDR(dec_kn_slot_base + IOASIC_ESAR); /* Workaround crash with booting KN04 2.1k from Disk */ memset((void *)dev->mem_start, 0, @@ -1109,7 +1103,7 @@ case PMAD_LANCE: claim_tc_card(slot); - dev->mem_start = get_tc_base_addr(slot); + dev->mem_start = CKSEG1ADDR(get_tc_base_addr(slot)); dev->base_addr = dev->mem_start + 0x100000; dev->irq = get_tc_irq_nr(slot); esar_base = dev->mem_start + 0x1c0002; @@ -1138,9 +1132,9 @@ case PMAX_LANCE: dev->irq = dec_interrupt[DEC_IRQ_LANCE]; - dev->base_addr = KN01_LANCE_BASE; - dev->mem_start = KN01_LANCE_BASE + 0x01000000; - esar_base = KN01_RTC_BASE + 1; + dev->base_addr = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE); + dev->mem_start = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE_MEM); + esar_base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_ESAR + 1); lp->dma_irq = -1; /* diff -urN linux/drivers/scsi/dec_esp.c linux/drivers/scsi/dec_esp.c --- linux/drivers/scsi/dec_esp.c 2005/06/16 20:31:01 1.29 +++ linux/drivers/scsi/dec_esp.c 2005/07/01 16:10:53 1.30 @@ -18,7 +18,7 @@ * 20001005 - Initialization fixes for 2.4.0-test9 * Florian Lohoff * - * Copyright (C) 2002, 2003 Maciej W. Rozycki + * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki */ #include @@ -41,6 +41,7 @@ #include #include #include +#include #include #define DEC_SCSI_SREG 0 @@ -183,7 +184,8 @@ esp->dregs = 0; /* ESP register base */ - esp->eregs = (struct ESP_regs *) (system_base + IOASIC_SCSI); + esp->eregs = (void *)CKSEG1ADDR(dec_kn_slot_base + + IOASIC_SCSI); /* Set the command buffer */ esp->esp_command = (volatile unsigned char *) cmd_buffer; @@ -228,10 +230,11 @@ mem_start = get_tc_base_addr(slot); /* Store base addr into esp struct */ - esp->slot = CPHYSADDR(mem_start); + esp->slot = mem_start; esp->dregs = 0; - esp->eregs = (struct ESP_regs *) (mem_start + DEC_SCSI_SREG); + esp->eregs = (void *)CKSEG1ADDR(mem_start + + DEC_SCSI_SREG); esp->do_pio_cmds = 1; /* Set the command buffer */ diff -urN linux/drivers/serial/dz.c linux/drivers/serial/dz.c --- linux/drivers/serial/dz.c 2004/11/15 11:49:32 1.4 +++ linux/drivers/serial/dz.c 2005/07/01 16:10:55 1.5 @@ -645,9 +645,9 @@ if (mips_machtype == MACH_DS23100 || mips_machtype == MACH_DS5100) - base = (unsigned long) KN01_DZ11_BASE; + base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_DZ11); else - base = (unsigned long) KN02_DZ11_BASE; + base = CKSEG1ADDR(KN02_SLOT_BASE + KN02_DZ11); for (i = 0, dport = dz_ports; i < DZ_NB_PORT; i++, dport++) { spin_lock_init(&dport->port.lock); diff -urN linux/drivers/tc/tc.c linux/drivers/tc/tc.c --- linux/drivers/tc/tc.c 2005/06/16 20:37:41 1.18 +++ linux/drivers/tc/tc.c 2005/07/01 16:10:57 1.19 @@ -10,31 +10,29 @@ * Copyright (c) Harald Koerfgen, 1998 * Copyright (c) 2001, 2003, 2005 Maciej W. Rozycki */ -#include #include -#include #include #include +#include +#include #include +#include #include +#include +#include + #include #include #include #include #include -#include -#include - -#define TC_DEBUG MODULE_LICENSE("GPL"); slot_info tc_bus[MAX_SLOT]; static int num_tcslots; static tcinfo *info; -unsigned long system_base; - /* * Interface to the world. Read comment in include/asm-mips/tc.h. */ @@ -97,13 +95,16 @@ static void __init tc_probe(unsigned long startaddr, unsigned long size, int slots) { + unsigned long slotaddr; int i, slot, err; long offset; - unsigned char pattern[4]; - unsigned char *module; + u8 pattern[4]; + volatile u8 *module; for (slot = 0; slot < slots; slot++) { - module = (char *)(startaddr + slot * size); + slotaddr = startaddr + slot * size; + module = ioremap_nocache(slotaddr, size); + BUG_ON(!module); offset = OLDCARD; @@ -112,8 +113,10 @@ err |= get_dbe(pattern[1], module + OLDCARD + TC_PATTERN1); err |= get_dbe(pattern[2], module + OLDCARD + TC_PATTERN2); err |= get_dbe(pattern[3], module + OLDCARD + TC_PATTERN3); - if (err) + if (err) { + iounmap(module); continue; + } if (pattern[0] != 0x55 || pattern[1] != 0x00 || pattern[2] != 0xaa || pattern[3] != 0xff) { @@ -124,16 +127,20 @@ err |= get_dbe(pattern[1], module + TC_PATTERN1); err |= get_dbe(pattern[2], module + TC_PATTERN2); err |= get_dbe(pattern[3], module + TC_PATTERN3); - if (err) + if (err) { + iounmap(module); continue; + } } if (pattern[0] != 0x55 || pattern[1] != 0x00 || - pattern[2] != 0xaa || pattern[3] != 0xff) + pattern[2] != 0xaa || pattern[3] != 0xff) { + iounmap(module); continue; + } - tc_bus[slot].base_addr = (unsigned long)module; - for(i = 0; i < 8; i++) { + tc_bus[slot].base_addr = slotaddr; + for (i = 0; i < 8; i++) { tc_bus[slot].firmware[i] = module[TC_FIRM_VER + offset + 4 * i]; tc_bus[slot].vendor[i] = @@ -171,6 +178,8 @@ tc_bus[slot].interrupt = -1; break; } + + iounmap(module); } } @@ -196,8 +205,8 @@ tc_bus[i].flags = FREE; } - info = (tcinfo *) rex_gettcinfo(); - slot0addr = (unsigned long)CKSEG1ADDR(rex_slot_address(0)); + info = rex_gettcinfo(); + slot0addr = CPHYSADDR((long)rex_slot_address(0)); switch (mips_machtype) { case MACH_DS5000_200: @@ -216,35 +225,21 @@ tc_clock = 10000 / info->clk_period; - if (TURBOCHANNEL && info->slot_size && slot0addr) { - printk("TURBOchannel rev. %1d at %2d.%1d MHz ", info->revision, - tc_clock / 10, tc_clock % 10); - printk("(with%s parity)\n", info->parity ? "" : "out"); + if (info->slot_size && slot0addr) { + pr_info("TURBOchannel rev. %d at %d.%d MHz (with%s parity)\n", + info->revision, tc_clock / 10, tc_clock % 10, + info->parity ? "" : "out"); slot_size = info->slot_size << 20; tc_probe(slot0addr, slot_size, num_tcslots); - /* - * All TURBOchannel DECstations have the onboard devices - * where the (num_tcslots + 0 or 1 on DS5k/xx) Option Module - * would be. - */ - if(mips_machtype == MACH_DS5000_XX) - i = 1; - else - i = 0; - - system_base = slot0addr + slot_size * (num_tcslots + i); - -#ifdef TC_DEBUG - for (i = 0; i < num_tcslots; i++) - if (tc_bus[i].base_addr) { - printk(" slot %d: ", i); - printk("%s %s %s\n", tc_bus[i].vendor, - tc_bus[i].name, tc_bus[i].firmware); - } -#endif + for (i = 0; i < num_tcslots; i++) { + if (!tc_bus[i].base_addr) + continue; + pr_info(" slot %d: %s %s %s\n", i, tc_bus[i].vendor, + tc_bus[i].name, tc_bus[i].firmware); + } } return 0; @@ -258,4 +253,3 @@ EXPORT_SYMBOL(get_tc_base_addr); EXPORT_SYMBOL(get_tc_irq_nr); EXPORT_SYMBOL(get_tc_speed); -EXPORT_SYMBOL(system_base); diff -urN linux/drivers/tc/zs.c linux/drivers/tc/zs.c --- linux/drivers/tc/zs.c 2005/06/16 20:49:03 1.60 +++ linux/drivers/tc/zs.c 2005/07/01 16:10:57 1.61 @@ -65,14 +65,14 @@ #include #include #include -#include -#ifdef CONFIG_MACH_DECSTATION #include +#include #include +#include +#include #include -#include -#endif + #ifdef CONFIG_KGDB #include #endif @@ -1602,30 +1602,22 @@ return; } - /* - * When serial console is activated, tc_init has not been called yet - * and system_base is undefined. Unfortunately we have to hardcode - * system_base for this case :-(. HK - */ switch(mips_machtype) { #ifdef CONFIG_MACH_DECSTATION case MACH_DS5000_2X0: case MACH_DS5900: - system_base = CKSEG1ADDR(0x1f800000); n_chips = 2; zs_parms = &ds_parms; zs_parms->irq0 = dec_interrupt[DEC_IRQ_SCC0]; zs_parms->irq1 = dec_interrupt[DEC_IRQ_SCC1]; break; case MACH_DS5000_1XX: - system_base = CKSEG1ADDR(0x1c000000); n_chips = 2; zs_parms = &ds_parms; zs_parms->irq0 = dec_interrupt[DEC_IRQ_SCC0]; zs_parms->irq1 = dec_interrupt[DEC_IRQ_SCC1]; break; case MACH_DS5000_XX: - system_base = CKSEG1ADDR(0x1c000000); n_chips = 1; zs_parms = &ds_parms; zs_parms->irq0 = dec_interrupt[DEC_IRQ_SCC0]; @@ -1647,10 +1639,10 @@ * The sccs reside on the high byte of the 16 bit IOBUS */ zs_channels[n_channels].control = - (volatile unsigned char *)system_base + + (volatile void *)CKSEG1ADDR(dec_kn_slot_base + (0 == chip ? zs_parms->scc0 : zs_parms->scc1) + (0 == channel ? zs_parms->channel_a_offset : - zs_parms->channel_b_offset); + zs_parms->channel_b_offset)); zs_channels[n_channels].data = zs_channels[n_channels].control + 4; diff -urN linux/drivers/video/pmag-aa-fb.c linux/drivers/video/pmag-aa-fb.c --- linux/drivers/video/pmag-aa-fb.c 2003/12/11 16:39:55 1.3 +++ linux/drivers/video/pmag-aa-fb.c 2005/07/01 16:10:59 1.4 @@ -413,7 +413,7 @@ static int __init init_one(int slot) { - unsigned long base_addr = get_tc_base_addr(slot); + unsigned long base_addr = CKSEG1ADDR(get_tc_base_addr(slot)); struct aafb_info *ip = &my_fb_info[slot]; memset(ip, 0, sizeof(struct aafb_info)); diff -urN linux/drivers/video/pmag-ba-fb.c linux/drivers/video/pmag-ba-fb.c --- linux/drivers/video/pmag-ba-fb.c 2004/10/12 01:45:47 1.19 +++ linux/drivers/video/pmag-ba-fb.c 2005/07/01 16:10:59 1.20 @@ -122,7 +122,7 @@ int __init pmagbafb_init_one(int slot) { - unsigned long base_addr = get_tc_base_addr(slot); + unsigned long base_addr = CKSEG1ADDR(get_tc_base_addr(slot)); struct fb_info *info = &pmagba_fb_info[slot]; struct display *disp = &pmagba_disp[slot]; diff -urN linux/drivers/video/pmagb-b-fb.c linux/drivers/video/pmagb-b-fb.c --- linux/drivers/video/pmagb-b-fb.c 2004/10/12 01:45:47 1.18 +++ linux/drivers/video/pmagb-b-fb.c 2005/07/01 16:10:59 1.19 @@ -123,7 +123,7 @@ int __init pmagbbfb_init_one(int slot) { - unsigned long base_addr = get_tc_base_addr(slot); + unsigned long base_addr = CKSEG1ADDR(get_tc_base_addr(slot)); struct fb_info *info = &pmagbb_fb_info[slot]; printk("PMAGB-BA framebuffer in slot %d\n", slot); diff -urN linux/include/asm-mips/dec/system.h linux/include/asm-mips/dec/system.h --- linux/include/asm-mips/dec/system.h 1970/01/01 00:00:00 +++ linux/include/asm-mips/dec/system.h 2005-07-01 17:11:02.313242000 +0100 1.1 @@ -0,0 +1,18 @@ +/* + * include/asm-mips/dec/system.h + * + * Generic DECstation/DECsystem bits. + * + * Copyright (C) 2005 Maciej W. Rozycki + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ +#ifndef __ASM_DEC_SYSTEM_H +#define __ASM_DEC_SYSTEM_H + +extern unsigned long dec_kn_slot_base, dec_kn_slot_size; + +#endif /* __ASM_DEC_SYSTEM_H */ diff -urN linux/include/asm-mips/dec/ioasic_addrs.h linux/include/asm-mips/dec/ioasic_addrs.h --- linux/include/asm-mips/dec/ioasic_addrs.h 2003/04/14 12:31:05 1.7 +++ linux/include/asm-mips/dec/ioasic_addrs.h 2005/07/01 16:11:02 1.8 @@ -45,7 +45,8 @@ /* - * Offsets for I/O ASIC registers (relative to (system_base + IOASIC_IOCTL)). + * Offsets for I/O ASIC registers + * (relative to (dec_kn_slot_base + IOASIC_IOCTL)). */ /* all systems */ #define IO_REG_SCSI_DMA_P 0x00 /* SCSI DMA Pointer */ diff -urN linux/include/asm-mips/dec/kn01.h linux/include/asm-mips/dec/kn01.h --- linux/include/asm-mips/dec/kn01.h 2005/06/22 20:56:29 1.7 +++ linux/include/asm-mips/dec/kn01.h 2005/07/01 16:11:02 1.8 @@ -13,9 +13,7 @@ #ifndef __ASM_MIPS_DEC_KN01_H #define __ASM_MIPS_DEC_KN01_H -#include - -#define KN01_SLOT_BASE CKSEG1ADDR(0x10000000) +#define KN01_SLOT_BASE 0x10000000 #define KN01_SLOT_SIZE 0x01000000 /* @@ -41,17 +39,9 @@ /* - * Some port addresses... - */ -#define KN01_LANCE_BASE (KN01_SLOT_BASE + KN01_LANCE) /* 0xB8000000 */ -#define KN01_DZ11_BASE (KN01_SLOT_BASE + KN01_DZ11) /* 0xBC000000 */ -#define KN01_RTC_BASE (KN01_SLOT_BASE + KN01_RTC) /* 0xBD000000 */ - - -/* * Frame buffer memory address. */ -#define KN01_VFB_MEM CKSEG1ADDR(0x0fc00000) +#define KN01_VFB_MEM 0x0fc00000 /* * CPU interrupt bits. diff -urN linux/include/asm-mips/dec/kn02.h linux/include/asm-mips/dec/kn02.h --- linux/include/asm-mips/dec/kn02.h 2005/06/22 20:56:29 1.8 +++ linux/include/asm-mips/dec/kn02.h 2005/07/01 16:11:02 1.9 @@ -13,11 +13,7 @@ #ifndef __ASM_MIPS_DEC_KN02_H #define __ASM_MIPS_DEC_KN02_H -#include -#include - - -#define KN02_SLOT_BASE CKSEG1ADDR(0x1fc00000) +#define KN02_SLOT_BASE 0x1fc00000 #define KN02_SLOT_SIZE 0x00080000 /* @@ -34,14 +30,6 @@ /* - * Some port addresses... - */ -#define KN02_DZ11_BASE (KN02_SLOT_BASE + KN02_DZ11) /* DZ11 */ -#define KN02_RTC_BASE (KN02_SLOT_BASE + KN02_RTC) /* RTC */ -#define KN02_CSR_BASE (KN02_SLOT_BASE + KN02_CSR) /* CSR */ - - -/* * System Control & Status Register bits. */ #define KN02_CSR_RES_28 (0xf<<28) /* unused */ diff -urN linux/include/asm-mips/dec/kn02xa.h linux/include/asm-mips/dec/kn02xa.h --- linux/include/asm-mips/dec/kn02xa.h 2005/06/22 20:56:29 1.9 +++ linux/include/asm-mips/dec/kn02xa.h 2005/07/01 16:11:02 1.10 @@ -17,31 +17,23 @@ #ifndef __ASM_MIPS_DEC_KN02XA_H #define __ASM_MIPS_DEC_KN02XA_H -#include #include -#define KN02XA_SLOT_BASE CKSEG1ADDR(0x1c000000) - -/* - * Some port addresses... - */ -#define KN02XA_IOASIC_BASE (KN02XA_SLOT_BASE + IOASIC_IOCTL) /* I/O ASIC */ -#define KN02XA_RTC_BASE (KN02XA_SLOT_BASE + IOASIC_TOY) /* RTC */ - +#define KN02XA_SLOT_BASE 0x1c000000 /* * Memory control ASIC registers. */ -#define KN02XA_MER CKSEG1ADDR(0x0c400000) /* memory error register */ -#define KN02XA_MSR CKSEG1ADDR(0x0c800000) /* memory size register */ +#define KN02XA_MER 0x0c400000 /* memory error register */ +#define KN02XA_MSR 0x0c800000 /* memory size register */ /* * CPU control ASIC registers. */ -#define KN02XA_MEM_CONF CKSEG1ADDR(0x0e000000) /* write timeout config */ -#define KN02XA_EAR CKSEG1ADDR(0x0e000004) /* error address register */ -#define KN02XA_BOOT0 CKSEG1ADDR(0x0e000008) /* boot 0 register */ -#define KN02XA_MEM_INTR CKSEG1ADDR(0x0e00000c) /* write err IRQ stat & ack */ +#define KN02XA_MEM_CONF 0x0e000000 /* write timeout config */ +#define KN02XA_EAR 0x0e000004 /* error address register */ +#define KN02XA_BOOT0 0x0e000008 /* boot 0 register */ +#define KN02XA_MEM_INTR 0x0e00000c /* write err IRQ stat & ack */ /* * Memory Error Register bits, common definitions. diff -urN linux/include/asm-mips/dec/kn03.h linux/include/asm-mips/dec/kn03.h --- linux/include/asm-mips/dec/kn03.h 2005/06/16 20:31:04 1.8 +++ linux/include/asm-mips/dec/kn03.h 2005/07/01 16:11:02 1.9 @@ -10,24 +10,15 @@ * * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions * are by courtesy of Chris Fraser. - * Copyright (C) 2000, 2002, 2003 Maciej W. Rozycki + * Copyright (C) 2000, 2002, 2003, 2005 Maciej W. Rozycki */ #ifndef __ASM_MIPS_DEC_KN03_H #define __ASM_MIPS_DEC_KN03_H -#include #include #include -#define KN03_SLOT_BASE CKSEG1ADDR(0x1f800000) - -/* - * Some port addresses... - */ -#define KN03_IOASIC_BASE (KN03_SLOT_BASE + IOASIC_IOCTL) /* I/O ASIC */ -#define KN03_RTC_BASE (KN03_SLOT_BASE + IOASIC_TOY) /* RTC */ -#define KN03_MCR_BASE (KN03_SLOT_BASE + IOASIC_MCR) /* MCR */ - +#define KN03_SLOT_BASE 0x1f800000 /* * CPU interrupt bits. diff -urN linux/include/asm-mips/dec/kn05.h linux/include/asm-mips/dec/kn05.h --- linux/include/asm-mips/dec/kn05.h 2005/06/22 20:56:29 1.6 +++ linux/include/asm-mips/dec/kn05.h 2005/07/01 16:11:02 1.7 @@ -21,7 +21,6 @@ #ifndef __ASM_MIPS_DEC_KN05_H #define __ASM_MIPS_DEC_KN05_H -#include #include /* @@ -30,7 +29,7 @@ * passed to the I/O ASIC's decoder like with the KN03 or KN02-BA/CA. * Others are handled locally. "Low" slots are always passed. */ -#define KN4K_SLOT_BASE KSEG1ADDR(0x1fc00000) +#define KN4K_SLOT_BASE 0x1fc00000 #define KN4K_MB_ROM (0*IOASIC_SLOT_SIZE) /* KN05/KN04 card ROM */ #define KN4K_IOCTL (1*IOASIC_SLOT_SIZE) /* I/O ASIC */ diff -urN linux/include/asm-mips/dec/tc.h linux/include/asm-mips/dec/tc.h --- linux/include/asm-mips/dec/tc.h 2002/08/06 00:08:59 1.2 +++ linux/include/asm-mips/dec/tc.h 2005/07/01 16:11:02 1.3 @@ -7,10 +7,8 @@ * * Copyright (c) 1998 Harald Koerfgen */ -#ifndef ASM_TC_H -#define ASM_TC_H - -extern unsigned long system_base; +#ifndef __ASM_DEC_TC_H +#define __ASM_DEC_TC_H /* * Search for a TURBOchannel Option Module @@ -36,8 +34,8 @@ */ extern unsigned long get_tc_irq_nr(int); /* - * Return TURBOchannel clock frequency in hz + * Return TURBOchannel clock frequency in Hz */ extern unsigned long get_tc_speed(void); -#endif +#endif /* __ASM_DEC_TC_H */ diff -urN linux/include/asm-mips/mach-dec/mc146818rtc.h linux/include/asm-mips/mach-dec/mc146818rtc.h --- linux/include/asm-mips/mach-dec/mc146818rtc.h 2004/06/06 02:12:54 1.3 +++ linux/include/asm-mips/mach-dec/mc146818rtc.h 2005/07/01 16:11:04 1.4 @@ -3,7 +3,7 @@ * * Copyright (C) 1998, 2001 by Ralf Baechle * Copyright (C) 1998 by Harald Koerfgen - * Copyright (C) 2002 Maciej W. Rozycki + * Copyright (C) 2002, 2005 Maciej W. Rozycki * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -14,23 +14,18 @@ #define __ASM_MIPS_DEC_RTC_DEC_H #include - #include +#include extern volatile u8 *dec_rtc_base; -extern unsigned long dec_kn_slot_size; -#define RTC_PORT(x) CPHYSADDR(dec_rtc_base) +#define RTC_PORT(x) CPHYSADDR((long)dec_rtc_base) #define RTC_IO_EXTENT dec_kn_slot_size #define RTC_IOMAPPED 0 #undef RTC_IRQ #define RTC_DEC_YEAR 0x3f /* Where we store the real year on DECs. */ -#include -#include -#include - static inline unsigned char CMOS_READ(unsigned long addr) { return dec_rtc_base[addr * 4]; From ths@linux-mips.org Sun Jul 3 17:32:07 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Sun, 03 Jul 2005 18:32:07 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Sun, 03 Jul 2005 18:32:07 +0100 X-archive-position: 512 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/03 18:32:01 Modified files: drivers/scsi : qla1280.c qla1280.h Log message: qla1280 patchset from hch: qla1280-remove-dead-flags. diff -urN linux/drivers/scsi/qla1280.c linux/drivers/scsi/qla1280.c --- linux/drivers/scsi/qla1280.c 2005/03/18 17:37:44 1.45 +++ linux/drivers/scsi/qla1280.c 2005/07/03 17:32:01 1.46 @@ -996,7 +996,6 @@ break; case ABORT_DEVICE: - ha->flags.in_reset = 1; if (qla1280_verbose) printk(KERN_INFO "scsi(%ld:%d:%d:%d): Queueing abort device " @@ -1010,7 +1009,6 @@ printk(KERN_INFO "scsi(%ld:%d:%d:%d): Queueing device reset " "command.\n", ha->host_no, bus, target, lun); - ha->flags.in_reset = 1; if (qla1280_device_reset(ha, bus, target) == 0) result = SUCCESS; break; @@ -1019,7 +1017,6 @@ if (qla1280_verbose) printk(KERN_INFO "qla1280(%ld:%d): Issuing BUS " "DEVICE RESET\n", ha->host_no, bus); - ha->flags.in_reset = 1; if (qla1280_bus_reset(ha, bus == 0)) result = SUCCESS; @@ -1047,7 +1044,6 @@ if (!list_empty(&ha->done_q)) qla1280_done(ha); - ha->flags.in_reset = 0; /* If we didn't manage to issue the action, or we have no * command to wait for, exit here */ @@ -1612,7 +1608,6 @@ /* enable risc and host interrupts */ WRT_REG_WORD(®->ictrl, (ISP_EN_INT | ISP_EN_RISC)); RD_REG_WORD(®->ictrl); /* PCI Posted Write flush */ - ha->flags.ints_enabled = 1; } static inline void @@ -1624,7 +1619,6 @@ /* disable risc and host interrupts */ WRT_REG_WORD(®->ictrl, 0); RD_REG_WORD(®->ictrl); /* PCI Posted Write flush */ - ha->flags.ints_enabled = 0; } /* @@ -1655,7 +1649,6 @@ ha->flags.reset_active = 0; ha->flags.abort_isp_active = 0; - ha->flags.ints_enabled = 0; #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) if (ia64_platform_is("sn2")) { printk(KERN_INFO "scsi(%li): Enabling SN2 PCI DMA " diff -urN linux/drivers/scsi/qla1280.h linux/drivers/scsi/qla1280.h --- linux/drivers/scsi/qla1280.h 2004/10/25 20:44:35 1.20 +++ linux/drivers/scsi/qla1280.h 2005/07/03 17:32:01 1.21 @@ -1082,10 +1082,6 @@ uint32_t reset_active:1; /* 3 */ uint32_t abort_isp_active:1; /* 4 */ uint32_t disable_risc_code_load:1; /* 5 */ - uint32_t enable_64bit_addressing:1; /* 6 */ - uint32_t in_reset:1; /* 7 */ - uint32_t ints_enabled:1; - uint32_t ignore_nvram:1; #ifdef __ia64__ uint32_t use_pci_vchannel:1; #endif From ths@linux-mips.org Sun Jul 3 17:34:07 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Sun, 03 Jul 2005 18:34:07 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Sun, 03 Jul 2005 18:34:07 +0100 X-archive-position: 513 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/03 18:34:01 Modified files: drivers/scsi : qla1280.c Log message: qla1280 patchset from hch: qla1280-disable-intr-posting-bug. diff -urN linux/drivers/scsi/qla1280.c linux/drivers/scsi/qla1280.c --- linux/drivers/scsi/qla1280.c 2005/07/03 17:32:01 1.46 +++ linux/drivers/scsi/qla1280.c 2005/07/03 17:34:01 1.47 @@ -1241,6 +1241,22 @@ return qla1280_biosparam(disk->device, NULL, disk->capacity, geom); } #endif + +/* disable risc and host interrupts */ +static inline void +qla1280_disable_intrs(struct scsi_qla_host *ha) +{ + WRT_REG_WORD(&ha->iobase->ictrl, 0); + RD_REG_WORD(&ha->iobase->ictrl); /* PCI Posted Write flush */ +} + +/* enable risc and host interrupts */ +static inline void +qla1280_enable_intrs(struct scsi_qla_host *ha) +{ + WRT_REG_WORD(&ha->iobase->ictrl, (ISP_EN_INT | ISP_EN_RISC)); + RD_REG_WORD(&ha->iobase->ictrl); /* PCI Posted Write flush */ +} /************************************************************************** * qla1280_intr_handler @@ -1262,7 +1278,7 @@ ha->isr_count++; reg = ha->iobase; - WRT_REG_WORD(®->ictrl, 0); /* disable our interrupt. */ + qla1280_disable_intrs(ha); data = qla1280_debounce_register(®->istatus); /* Check for pending interrupts. */ @@ -1275,8 +1291,7 @@ spin_unlock(HOST_LOCK); - /* enable our interrupt. */ - WRT_REG_WORD(®->ictrl, (ISP_EN_INT | ISP_EN_RISC)); + qla1280_enable_intrs(ha); LEAVE_INTR("qla1280_intr_handler"); return IRQ_RETVAL(handled); @@ -1589,38 +1604,6 @@ /* QLogic ISP1280 Hardware Support Functions. */ /****************************************************************************/ - /* - * qla2100_enable_intrs - * qla2100_disable_intrs - * - * Input: - * ha = adapter block pointer. - * - * Returns: - * None - */ -static inline void -qla1280_enable_intrs(struct scsi_qla_host *ha) -{ - struct device_reg __iomem *reg; - - reg = ha->iobase; - /* enable risc and host interrupts */ - WRT_REG_WORD(®->ictrl, (ISP_EN_INT | ISP_EN_RISC)); - RD_REG_WORD(®->ictrl); /* PCI Posted Write flush */ -} - -static inline void -qla1280_disable_intrs(struct scsi_qla_host *ha) -{ - struct device_reg __iomem *reg; - - reg = ha->iobase; - /* disable risc and host interrupts */ - WRT_REG_WORD(®->ictrl, 0); - RD_REG_WORD(®->ictrl); /* PCI Posted Write flush */ -} - /* * qla1280_initialize_adapter * Initialize board. @@ -4728,7 +4711,7 @@ #if LINUX_VERSION_CODE >= 0x020600 error_disable_adapter: - WRT_REG_WORD(&ha->iobase->ictrl, 0); + qla1280_disable_intrs(ha); #endif error_free_irq: free_irq(pdev->irq, ha); @@ -4765,7 +4748,7 @@ scsi_remove_host(host); #endif - WRT_REG_WORD(&ha->iobase->ictrl, 0); + qla1280_disable_intrs(ha); free_irq(pdev->irq, ha); From ths@linux-mips.org Sun Jul 3 17:35:21 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Sun, 03 Jul 2005 18:35:21 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Sun, 03 Jul 2005 18:35:21 +0100 X-archive-position: 514 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/03 18:35:15 Modified files: drivers/scsi : qla1280.c Log message: qla1280 patchset from hch: qla1280-misc-cleanups. diff -urN linux/drivers/scsi/qla1280.c linux/drivers/scsi/qla1280.c --- linux/drivers/scsi/qla1280.c 2005/07/03 17:34:01 1.47 +++ linux/drivers/scsi/qla1280.c 2005/07/03 17:35:15 1.48 @@ -1435,7 +1435,6 @@ * * Input: * ha = adapter block pointer. - * done_q = done queue. */ static void qla1280_done(struct scsi_qla_host *ha) @@ -1569,7 +1568,7 @@ case CS_DATA_OVERRUN: dprintk(2, "Data overrun 0x%x\n", residual_length); - dprintk(2, "qla1280_isr: response packet data\n"); + dprintk(2, "qla1280_return_status: response packet data\n"); qla1280_dump_buffer(2, (char *)sts, RESPONSE_ENTRY_SIZE); host_status = DID_ERROR; break; @@ -2037,7 +2036,7 @@ mb[1] = *ql1280_board_tbl[ha->devnum].fwstart; err = qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); if (err) { - printk(KERN_ERR "scsi(%li): Failed checksum\n", ha->host_no); + printk(KERN_ERR "scsi(%li): RISC checksum failed.\n", ha->host_no); return err; } @@ -3056,10 +3055,13 @@ REQUEST_ENTRY_CNT - (ha->req_ring_index - cnt); } + dprintk(3, "Number of free entries=(%d) seg_cnt=0x%x\n", + ha->req_q_cnt, seg_cnt); + /* If room for request in request ring. */ if ((req_cnt + 2) >= ha->req_q_cnt) { status = 1; - dprintk(2, "qla1280_64bit_start_scsi: in-ptr=0x%x req_q_cnt=" + dprintk(2, "qla1280_start_scsi: in-ptr=0x%x req_q_cnt=" "0x%xreq_cnt=0x%x", ha->req_ring_index, ha->req_q_cnt, req_cnt); goto out; @@ -3071,7 +3073,7 @@ if (cnt >= MAX_OUTSTANDING_COMMANDS) { status = 1; - dprintk(2, "qla1280_64bit_start_scsi: NO ROOM IN " + dprintk(2, "qla1280_start_scsi: NO ROOM IN " "OUTSTANDING ARRAY, req_q_cnt=0x%x", ha->req_q_cnt); goto out; } @@ -3080,7 +3082,7 @@ ha->req_q_cnt -= req_cnt; CMD_HANDLE(sp->cmd) = (unsigned char *)(unsigned long)(cnt + 1); - dprintk(2, "64bit_start: cmd=%p sp=%p CDB=%xm, handle %lx\n", cmd, sp, + dprintk(2, "start: cmd=%p sp=%p CDB=%xm, handle %lx\n", cmd, sp, cmd->cmnd[0], (long)CMD_HANDLE(sp->cmd)); dprintk(2, " bus %i, target %i, lun %i\n", SCSI_BUS_32(cmd), SCSI_TCN_32(cmd), SCSI_LUN_32(cmd)); @@ -4603,7 +4605,7 @@ if (pci_set_dma_mask(ha->pdev, (dma_addr_t) ~ 0ULL)) { if (pci_set_dma_mask(ha->pdev, 0xffffffff)) { printk(KERN_WARNING "scsi(%li): Unable to set a " - " suitable DMA mask - aboring\n", ha->host_no); + "suitable DMA mask - aborting\n", ha->host_no); error = -ENODEV; goto error_free_irq; } @@ -4613,14 +4615,14 @@ #else if (pci_set_dma_mask(ha->pdev, 0xffffffff)) { printk(KERN_WARNING "scsi(%li): Unable to set a " - " suitable DMA mask - aboring\n", ha->host_no); + "suitable DMA mask - aborting\n", ha->host_no); error = -ENODEV; goto error_free_irq; } #endif ha->request_ring = pci_alloc_consistent(ha->pdev, - ((REQUEST_ENTRY_CNT + 1) * (sizeof(request_t))), + ((REQUEST_ENTRY_CNT + 1) * sizeof(request_t)), &ha->request_dma); if (!ha->request_ring) { printk(KERN_INFO "qla1280: Failed to get request memory\n"); @@ -4628,7 +4630,7 @@ } ha->response_ring = pci_alloc_consistent(ha->pdev, - ((RESPONSE_ENTRY_CNT + 1) * (sizeof(struct response))), + ((RESPONSE_ENTRY_CNT + 1) * sizeof(struct response)), &ha->response_dma); if (!ha->response_ring) { printk(KERN_INFO "qla1280: Failed to get response memory\n"); @@ -4723,11 +4725,11 @@ #endif error_free_response_ring: pci_free_consistent(ha->pdev, - ((RESPONSE_ENTRY_CNT + 1) * (sizeof(struct response))), + ((RESPONSE_ENTRY_CNT + 1) * sizeof(struct response)), ha->response_ring, ha->response_dma); error_free_request_ring: pci_free_consistent(ha->pdev, - ((REQUEST_ENTRY_CNT + 1) * (sizeof(request_t))), + ((REQUEST_ENTRY_CNT + 1) * sizeof(request_t)), ha->request_ring, ha->request_dma); error_put_host: scsi_host_put(host); From ths@linux-mips.org Sun Jul 3 17:38:43 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Sun, 03 Jul 2005 18:38:43 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Sun, 03 Jul 2005 18:38:43 +0100 X-archive-position: 515 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/03 18:38:37 Modified files: drivers/scsi : qla1280.c qla1280.h Log message: qla1280 patchset from hch: qla1280-use-sam-constants. diff -urN linux/drivers/scsi/qla1280.c linux/drivers/scsi/qla1280.c --- linux/drivers/scsi/qla1280.c 2005/07/03 17:35:15 1.48 +++ linux/drivers/scsi/qla1280.c 2005/07/03 17:38:37 1.49 @@ -4017,8 +4017,8 @@ } /* Target busy */ - if (scsi_status & SS_BUSY_CONDITION && - scsi_status != SS_RESERVE_CONFLICT) { + if (scsi_status & SAM_STAT_BUSY && + scsi_status != SAM_STAT_RESERVATION_CONFLICT) { CMD_RESULT(cmd) = DID_BUS_BUSY << 16 | (scsi_status & 0xff); } else { @@ -4026,7 +4026,7 @@ /* Save ISP completion status */ CMD_RESULT(cmd) = qla1280_return_status(pkt, cmd); - if (scsi_status & SS_CHECK_CONDITION) { + if (scsi_status & SAM_STAT_CHECK_CONDITION) { if (comp_status != CS_ARS_FAILED) { uint16_t req_sense_length = le16_to_cpu(pkt->req_sense_length); diff -urN linux/drivers/scsi/qla1280.h linux/drivers/scsi/qla1280.h --- linux/drivers/scsi/qla1280.h 2005/07/03 17:32:01 1.21 +++ linux/drivers/scsi/qla1280.h 2005/07/03 17:38:37 1.22 @@ -979,14 +979,6 @@ #define CS_RETRY 0x82 /* Driver defined */ /* - * ISP status entry - SCSI status byte bit definitions. - */ -#define SS_CHECK_CONDITION BIT_1 -#define SS_CONDITION_MET BIT_2 -#define SS_BUSY_CONDITION BIT_3 -#define SS_RESERVE_CONFLICT (BIT_4 | BIT_3) - -/* * ISP target entries - Option flags bit definitions. */ #define OF_ENABLE_TAG BIT_1 /* Tagged queue action enable */ From ths@linux-mips.org Sun Jul 3 17:39:32 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Sun, 03 Jul 2005 18:39:32 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Sun, 03 Jul 2005 18:39:32 +0100 X-archive-position: 516 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/03 18:39:26 Modified files: drivers/scsi : qla1280.h Log message: qla1280 patchset from hch: qla1280-remove-SG_SEGMENTS. diff -urN linux/drivers/scsi/qla1280.h linux/drivers/scsi/qla1280.h --- linux/drivers/scsi/qla1280.h 2005/07/03 17:38:37 1.22 +++ linux/drivers/scsi/qla1280.h 2005/07/03 17:39:26 1.23 @@ -94,9 +94,6 @@ #define REQUEST_ENTRY_CNT 256 /* Number of request entries. */ #define RESPONSE_ENTRY_CNT 16 /* Number of response entries. */ -/* Number of segments 1 - 65535 */ -#define SG_SEGMENTS 32 /* Cmd entry + 6 continuations */ - /* * SCSI Request Block structure (sp) that is placed * on cmd->SCp location of every I/O From ths@linux-mips.org Sun Jul 3 17:41:18 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Sun, 03 Jul 2005 18:41:18 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Sun, 03 Jul 2005 18:41:18 +0100 X-archive-position: 517 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/03 18:41:12 Modified files: drivers/scsi : qla1280.c Log message: qla1280 patchset from hch: qla1280-start-firmware. diff -urN linux/drivers/scsi/qla1280.c linux/drivers/scsi/qla1280.c --- linux/drivers/scsi/qla1280.c 2005/07/03 17:38:37 1.49 +++ linux/drivers/scsi/qla1280.c 2005/07/03 17:41:12 1.50 @@ -1709,69 +1709,6 @@ return status; } - -/* - * ISP Firmware Test - * Checks if present version of RISC firmware is older than - * driver firmware. - * - * Input: - * ha = adapter block pointer. - * - * Returns: - * 0 = firmware does not need to be loaded. - */ -static int -qla1280_isp_firmware(struct scsi_qla_host *ha) -{ - struct nvram *nv = (struct nvram *) ha->response_ring; - int status = 0; /* dg 2/27 always loads RISC */ - uint16_t mb[MAILBOX_REGISTER_COUNT]; - - ENTER("qla1280_isp_firmware"); - - dprintk(1, "scsi(%li): Determining if RISC is loaded\n", ha->host_no); - - /* Bad NVRAM data, load RISC code. */ - if (!ha->nvram_valid) { - ha->flags.disable_risc_code_load = 0; - } else - ha->flags.disable_risc_code_load = - nv->cntr_flags_1.disable_loading_risc_code; - - if (ha->flags.disable_risc_code_load) { - dprintk(3, "qla1280_isp_firmware: Telling RISC to verify " - "checksum of loaded BIOS code.\n"); - - /* Verify checksum of loaded RISC code. */ - mb[0] = MBC_VERIFY_CHECKSUM; - /* mb[1] = ql12_risc_code_addr01; */ - mb[1] = *ql1280_board_tbl[ha->devnum].fwstart; - - if (!(status = - qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]))) { - /* Start firmware execution. */ - dprintk(3, "qla1280_isp_firmware: Startng F/W " - "execution.\n"); - - mb[0] = MBC_EXECUTE_FIRMWARE; - /* mb[1] = ql12_risc_code_addr01; */ - mb[1] = *ql1280_board_tbl[ha->devnum].fwstart; - qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]); - } else - printk(KERN_INFO "qla1280: RISC checksum failed.\n"); - } else { - dprintk(1, "qla1280: NVRAM configured to load RISC load.\n"); - status = 1; - } - - if (status) - dprintk(2, "qla1280_isp_firmware: **** Load RISC code ****\n"); - - LEAVE("qla1280_isp_firmware"); - return status; -} - /* * Chip diagnostics * Test chip for proper operation. @@ -2056,14 +1993,7 @@ static int qla1280_load_firmware(struct scsi_qla_host *ha) { - int err = -ENODEV; - - /* If firmware needs to be loaded */ - if (!qla1280_isp_firmware(ha)) { - printk(KERN_ERR "scsi(%li): isp_firmware() failed!\n", - ha->host_no); - goto out; - } + int err; err = qla1280_chip_diag(ha); if (err) From ths@linux-mips.org Sun Jul 3 17:43:39 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Sun, 03 Jul 2005 18:43:39 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Sun, 03 Jul 2005 18:43:39 +0100 X-archive-position: 518 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/03 18:43:33 Modified files: drivers/scsi : qla1280.c qla1280.h Log message: qla1280 patchset from hch: qla1280-fix-isp_config-bitfield-mess. diff -urN linux/drivers/scsi/qla1280.c linux/drivers/scsi/qla1280.c --- linux/drivers/scsi/qla1280.c 2005/07/03 17:41:12 1.50 +++ linux/drivers/scsi/qla1280.c 2005/07/03 17:43:33 1.51 @@ -2165,9 +2165,9 @@ /* nv->cntr_flags_1.disable_loading_risc_code = 1; */ nv->firmware_feature.f.enable_fast_posting = 1; nv->firmware_feature.f.disable_synchronous_backoff = 1; - nv->termination.f.scsi_bus_0_control = 3; - nv->termination.f.scsi_bus_1_control = 3; - nv->termination.f.auto_term_support = 1; + nv->termination.scsi_bus_0_control = 3; + nv->termination.scsi_bus_1_control = 3; + nv->termination.auto_term_support = 1; /* * Set default FIFO magic - What appropriate values would be here @@ -2177,7 +2177,12 @@ * header file provided by QLogic seems to be bogus or incomplete * at best. */ - nv->isp_config.c = ISP_CFG1_BENAB|ISP_CFG1_F128; + nv->isp_config.burst_enable = 1; + if (IS_ISP1040(ha)) + nv->isp_config.fifo_threshold |= 3; + else + nv->isp_config.fifo_threshold |= 4; + if (IS_ISP1x160(ha)) nv->isp_parameter = 0x01; /* fast memory enable */ @@ -2338,31 +2343,40 @@ hwrev = RD_REG_WORD(®->cfg_0) & ISP_CFG0_HWMSK; - cfg1 = RD_REG_WORD(®->cfg_1); + cfg1 = RD_REG_WORD(®->cfg_1) & ~(BIT_4 | BIT_5 | BIT_6); cdma_conf = RD_REG_WORD(®->cdma_cfg); ddma_conf = RD_REG_WORD(®->ddma_cfg); /* Busted fifo, says mjacob. */ - if (hwrev == ISP_CFG0_1040A) - WRT_REG_WORD(®->cfg_1, cfg1 | ISP_CFG1_F64); - else - WRT_REG_WORD(®->cfg_1, cfg1 | ISP_CFG1_F64 | ISP_CFG1_BENAB); + if (hwrev != ISP_CFG0_1040A) + cfg1 |= nv->isp_config.fifo_threshold << 4; + + cfg1 |= nv->isp_config.burst_enable << 2; + WRT_REG_WORD(®->cfg_1, cfg1); WRT_REG_WORD(®->cdma_cfg, cdma_conf | CDMA_CONF_BENAB); WRT_REG_WORD(®->ddma_cfg, cdma_conf | DDMA_CONF_BENAB); } else { + uint16_t cfg1, term; + /* Set ISP hardware DMA burst */ - mb[0] = nv->isp_config.c; + cfg1 = nv->isp_config.fifo_threshold << 4; + cfg1 |= nv->isp_config.burst_enable << 2; /* Enable DMA arbitration on dual channel controllers */ if (ha->ports > 1) - mb[0] |= BIT_13; - WRT_REG_WORD(®->cfg_1, mb[0]); + cfg1 |= BIT_13; + WRT_REG_WORD(®->cfg_1, cfg1); /* Set SCSI termination. */ - WRT_REG_WORD(®->gpio_enable, (BIT_3 + BIT_2 + BIT_1 + BIT_0)); - mb[0] = nv->termination.c & (BIT_3 + BIT_2 + BIT_1 + BIT_0); - WRT_REG_WORD(®->gpio_data, mb[0]); + WRT_REG_WORD(®->gpio_enable, + BIT_7 | BIT_3 | BIT_2 | BIT_1 | BIT_0); + term = nv->termination.scsi_bus_1_control; + term |= nv->termination.scsi_bus_0_control << 2; + term |= nv->termination.auto_term_support << 7; + RD_REG_WORD(®->id_l); /* Flush PCI write */ + WRT_REG_WORD(®->gpio_data, term); } + RD_REG_WORD(®->id_l); /* Flush PCI write */ /* ISP parameter word. */ mb[0] = MBC_SET_SYSTEM_PARAMETER; diff -urN linux/drivers/scsi/qla1280.h linux/drivers/scsi/qla1280.h --- linux/drivers/scsi/qla1280.h 2005/07/03 17:39:26 1.23 +++ linux/drivers/scsi/qla1280.h 2005/07/03 17:43:33 1.24 @@ -375,29 +375,23 @@ uint16_t unused_12; /* 12, 13 */ uint16_t unused_14; /* 14, 15 */ - union { - uint8_t c; - struct { - uint8_t reserved:2; - uint8_t burst_enable:1; - uint8_t reserved_1:1; - uint8_t fifo_threshold:4; - } f; + struct { + uint8_t reserved:2; + uint8_t burst_enable:1; + uint8_t reserved_1:1; + uint8_t fifo_threshold:4; } isp_config; /* 16 */ /* Termination * 0 = Disable, 1 = high only, 3 = Auto term */ - union { - uint8_t c; - struct { - uint8_t scsi_bus_1_control:2; - uint8_t scsi_bus_0_control:2; - uint8_t unused_0:1; - uint8_t unused_1:1; - uint8_t unused_2:1; - uint8_t auto_term_support:1; - } f; + struct { + uint8_t scsi_bus_1_control:2; + uint8_t scsi_bus_0_control:2; + uint8_t unused_0:1; + uint8_t unused_1:1; + uint8_t unused_2:1; + uint8_t auto_term_support:1; } termination; /* 17 */ uint16_t isp_parameter; /* 18, 19 */ From ths@linux-mips.org Sun Jul 3 17:44:45 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Sun, 03 Jul 2005 18:44:45 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Sun, 03 Jul 2005 18:44:45 +0100 X-archive-position: 519 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/03 18:44:39 Modified files: drivers/scsi : qla1280.c qla1280.h Log message: qla1280 patchset from hch: qla1280-fix-paramater-bitfield-mess. diff -urN linux/drivers/scsi/qla1280.c linux/drivers/scsi/qla1280.c --- linux/drivers/scsi/qla1280.c 2005/07/03 17:43:33 1.51 +++ linux/drivers/scsi/qla1280.c 2005/07/03 17:44:39 1.52 @@ -1304,7 +1304,7 @@ uint8_t mr; uint16_t mb[MAILBOX_REGISTER_COUNT]; struct nvram *nv; - int status; + int status, lun; nv = &ha->nvram; @@ -1312,24 +1312,38 @@ /* Set Target Parameters. */ mb[0] = MBC_SET_TARGET_PARAMETERS; - mb[1] = (uint16_t) (bus ? target | BIT_7 : target); - mb[1] <<= 8; - - mb[2] = (nv->bus[bus].target[target].parameter.c << 8); + mb[1] = (uint16_t)((bus ? target | BIT_7 : target) << 8); + mb[2] = nv->bus[bus].target[target].parameter.renegotiate_on_error << 8; + mb[2] |= nv->bus[bus].target[target].parameter.stop_queue_on_check << 9; + mb[2] |= nv->bus[bus].target[target].parameter.auto_request_sense << 10; + mb[2] |= nv->bus[bus].target[target].parameter.tag_queuing << 11; + mb[2] |= nv->bus[bus].target[target].parameter.enable_sync << 12; + mb[2] |= nv->bus[bus].target[target].parameter.enable_wide << 13; + mb[2] |= nv->bus[bus].target[target].parameter.parity_checking << 14; + mb[2] |= nv->bus[bus].target[target].parameter.disconnect_allowed << 15; if (IS_ISP1x160(ha)) { mb[2] |= nv->bus[bus].target[target].ppr_1x160.flags.enable_ppr << 5; - mb[3] = (nv->bus[bus].target[target].flags.flags1x160.sync_offset << 8) | - nv->bus[bus].target[target].sync_period; + mb[3] = (nv->bus[bus].target[target].flags.flags1x160.sync_offset << 8); mb[6] = (nv->bus[bus].target[target].ppr_1x160.flags.ppr_options << 8) | nv->bus[bus].target[target].ppr_1x160.flags.ppr_bus_width; mr |= BIT_6; } else { - mb[3] = (nv->bus[bus].target[target].flags.flags1x80.sync_offset << 8) | - nv->bus[bus].target[target].sync_period; + mb[3] = (nv->bus[bus].target[target].flags.flags1x80.sync_offset << 8); } + mb[3] |= nv->bus[bus].target[target].sync_period; + + status = qla1280_mailbox_command(ha, mr, mb); - status = qla1280_mailbox_command(ha, mr, &mb[0]); + /* Set Device Queue Parameters. */ + for (lun = 0; lun < MAX_LUNS; lun++) { + mb[0] = MBC_SET_DEVICE_QUEUE; + mb[1] = (uint16_t)((bus ? target | BIT_7 : target) << 8); + mb[1] |= lun; + mb[2] = nv->bus[bus].max_queue_depth; + mb[3] = nv->bus[bus].target[target].execution_throttle; + status |= qla1280_mailbox_command(ha, 0x0f, mb); + } if (status) printk(KERN_WARNING "scsi(%ld:%i:%i): " @@ -1376,19 +1390,19 @@ } #if LINUX_VERSION_CODE > 0x020500 - nv->bus[bus].target[target].parameter.f.enable_sync = device->sdtr; - nv->bus[bus].target[target].parameter.f.enable_wide = device->wdtr; + nv->bus[bus].target[target].parameter.enable_sync = device->sdtr; + nv->bus[bus].target[target].parameter.enable_wide = device->wdtr; nv->bus[bus].target[target].ppr_1x160.flags.enable_ppr = device->ppr; #endif if (driver_setup.no_sync || (driver_setup.sync_mask && (~driver_setup.sync_mask & (1 << target)))) - nv->bus[bus].target[target].parameter.f.enable_sync = 0; + nv->bus[bus].target[target].parameter.enable_sync = 0; if (driver_setup.no_wide || (driver_setup.wide_mask && (~driver_setup.wide_mask & (1 << target)))) - nv->bus[bus].target[target].parameter.f.enable_wide = 0; + nv->bus[bus].target[target].parameter.enable_wide = 0; if (IS_ISP1x160(ha)) { if (driver_setup.no_ppr || (driver_setup.ppr_mask && @@ -1397,7 +1411,7 @@ } spin_lock_irqsave(HOST_LOCK, flags); - if (nv->bus[bus].target[target].parameter.f.enable_sync) + if (nv->bus[bus].target[target].parameter.enable_sync) status = qla1280_set_target_parameters(ha, bus, target); qla1280_get_target_parameters(ha, device); spin_unlock_irqrestore(HOST_LOCK, flags); @@ -2127,17 +2141,17 @@ { struct nvram *nv = &ha->nvram; - nv->bus[bus].target[target].parameter.f.renegotiate_on_error = 1; - nv->bus[bus].target[target].parameter.f.auto_request_sense = 1; - nv->bus[bus].target[target].parameter.f.tag_queuing = 1; - nv->bus[bus].target[target].parameter.f.enable_sync = 1; + nv->bus[bus].target[target].parameter.renegotiate_on_error = 1; + nv->bus[bus].target[target].parameter.auto_request_sense = 1; + nv->bus[bus].target[target].parameter.tag_queuing = 1; + nv->bus[bus].target[target].parameter.enable_sync = 1; #if 1 /* Some SCSI Processors do not seem to like this */ - nv->bus[bus].target[target].parameter.f.enable_wide = 1; + nv->bus[bus].target[target].parameter.enable_wide = 1; #endif - nv->bus[bus].target[target].parameter.f.parity_checking = 1; - nv->bus[bus].target[target].parameter.f.disconnect_allowed = 1; nv->bus[bus].target[target].execution_throttle = nv->bus[bus].max_queue_depth - 1; + nv->bus[bus].target[target].parameter.parity_checking = 1; + nv->bus[bus].target[target].parameter.disconnect_allowed = 1; if (IS_ISP1x160(ha)) { nv->bus[bus].target[target].flags.flags1x160.device_enable = 1; @@ -2213,66 +2227,53 @@ struct nvram *nv = &ha->nvram; uint16_t mb[MAILBOX_REGISTER_COUNT]; int status, lun; + uint16_t flag; /* Set Target Parameters. */ mb[0] = MBC_SET_TARGET_PARAMETERS; - mb[1] = (uint16_t) (bus ? target | BIT_7 : target); - mb[1] <<= 8; - - /* - * Do not enable wide, sync, and ppr for the initial - * INQUIRY run. We enable this later if we determine - * the target actually supports it. - */ - nv->bus[bus].target[target].parameter.f. - auto_request_sense = 1; - nv->bus[bus].target[target].parameter.f. - stop_queue_on_check = 0; - - if (IS_ISP1x160(ha)) - nv->bus[bus].target[target].ppr_1x160. - flags.enable_ppr = 0; + mb[1] = (uint16_t)((bus ? target | BIT_7 : target) << 8); /* - * No sync, wide, etc. while probing + * Do not enable sync and ppr for the initial INQUIRY run. We + * enable this later if we determine the target actually + * supports it. */ - mb[2] = (nv->bus[bus].target[target].parameter.c << 8) & - ~(TP_SYNC /*| TP_WIDE | TP_PPR*/); + mb[2] = (TP_RENEGOTIATE | TP_AUTO_REQUEST_SENSE | TP_TAGGED_QUEUE + | TP_WIDE | TP_PARITY | TP_DISCONNECT); if (IS_ISP1x160(ha)) mb[3] = nv->bus[bus].target[target].flags.flags1x160.sync_offset << 8; else mb[3] = nv->bus[bus].target[target].flags.flags1x80.sync_offset << 8; mb[3] |= nv->bus[bus].target[target].sync_period; - - status = qla1280_mailbox_command(ha, BIT_3 | BIT_2 | BIT_1 | BIT_0, &mb[0]); + status = qla1280_mailbox_command(ha, 0x0f, mb); /* Save Tag queuing enable flag. */ - mb[0] = BIT_0 << target; - if (nv->bus[bus].target[target].parameter.f.tag_queuing) - ha->bus_settings[bus].qtag_enables |= mb[0]; + flag = (BIT_0 << target) & mb[0]; + if (nv->bus[bus].target[target].parameter.tag_queuing) + ha->bus_settings[bus].qtag_enables |= flag; /* Save Device enable flag. */ if (IS_ISP1x160(ha)) { if (nv->bus[bus].target[target].flags.flags1x160.device_enable) - ha->bus_settings[bus].device_enables |= mb[0]; + ha->bus_settings[bus].device_enables |= flag; ha->bus_settings[bus].lun_disables |= 0; } else { if (nv->bus[bus].target[target].flags.flags1x80.device_enable) - ha->bus_settings[bus].device_enables |= mb[0]; + ha->bus_settings[bus].device_enables |= flag; /* Save LUN disable flag. */ if (nv->bus[bus].target[target].flags.flags1x80.lun_disable) - ha->bus_settings[bus].lun_disables |= mb[0]; + ha->bus_settings[bus].lun_disables |= flag; } /* Set Device Queue Parameters. */ for (lun = 0; lun < MAX_LUNS; lun++) { mb[0] = MBC_SET_DEVICE_QUEUE; - mb[1] = (uint16_t)(bus ? target | BIT_7 : target); - mb[1] = mb[1] << 8 | lun; + mb[1] = (uint16_t)((bus ? target | BIT_7 : target) << 8); + mb[1] |= lun; mb[2] = nv->bus[bus].max_queue_depth; mb[3] = nv->bus[bus].target[target].execution_throttle; - status |= qla1280_mailbox_command(ha, 0x0f, &mb[0]); + status |= qla1280_mailbox_command(ha, 0x0f, mb); } return status; @@ -2317,7 +2318,6 @@ struct nvram *nv = &ha->nvram; int bus, target, status = 0; uint16_t mb[MAILBOX_REGISTER_COUNT]; - uint16_t mask; ENTER("qla1280_nvram_config"); @@ -2325,7 +2325,7 @@ /* Always force AUTO sense for LINUX SCSI */ for (bus = 0; bus < MAX_BUSES; bus++) for (target = 0; target < MAX_TARGETS; target++) { - nv->bus[bus].target[target].parameter.f. + nv->bus[bus].target[target].parameter. auto_request_sense = 1; } } else { @@ -2392,16 +2392,17 @@ /* Firmware feature word. */ mb[0] = MBC_SET_FIRMWARE_FEATURES; - mask = BIT_5 | BIT_1 | BIT_0; - mb[1] = le16_to_cpu(nv->firmware_feature.w) & (mask); + mb[1] = nv->firmware_feature.f.enable_fast_posting; + mb[1] |= nv->firmware_feature.f.report_lvd_bus_transition << 1; + mb[1] |= nv->firmware_feature.f.disable_synchronous_backoff << 5; #if defined(CONFIG_IA64_GENERIC) || defined (CONFIG_IA64_SGI_SN2) if (ia64_platform_is("sn2")) { printk(KERN_INFO "scsi(%li): Enabling SN2 PCI DMA " "workaround\n", ha->host_no); - mb[1] |= BIT_9; + mb[1] |= nv->firmware_feature.f.unused_9 << 9; /* XXX */ } #endif - status |= qla1280_mailbox_command(ha, mask, &mb[0]); + status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); /* Retry count and delay. */ mb[0] = MBC_SET_RETRY_COUNT; @@ -2430,27 +2431,27 @@ mb[2] |= BIT_5; if (nv->bus[1].config_2.data_line_active_negation) mb[2] |= BIT_4; - status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]); + status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb); mb[0] = MBC_SET_DATA_OVERRUN_RECOVERY; mb[1] = 2; /* Reset SCSI bus and return all outstanding IO */ - status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]); + status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); /* thingy */ mb[0] = MBC_SET_PCI_CONTROL; - mb[1] = 2; /* Data DMA Channel Burst Enable */ - mb[2] = 2; /* Command DMA Channel Burst Enable */ - status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]); + mb[1] = BIT_1; /* Data DMA Channel Burst Enable */ + mb[2] = BIT_1; /* Command DMA Channel Burst Enable */ + status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb); mb[0] = MBC_SET_TAG_AGE_LIMIT; mb[1] = 8; - status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]); + status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); /* Selection timeout. */ mb[0] = MBC_SET_SELECTION_TIMEOUT; mb[1] = nv->bus[0].selection_timeout; mb[2] = nv->bus[1].selection_timeout; - status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]); + status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb); for (bus = 0; bus < ha->ports; bus++) status |= qla1280_config_bus(ha, bus); @@ -3891,21 +3892,21 @@ result = cmd->request_buffer; n = &ha->nvram; - n->bus[bus].target[target].parameter.f.enable_wide = 0; - n->bus[bus].target[target].parameter.f.enable_sync = 0; + n->bus[bus].target[target].parameter.enable_wide = 0; + n->bus[bus].target[target].parameter.enable_sync = 0; n->bus[bus].target[target].ppr_1x160.flags.enable_ppr = 0; if (result[7] & 0x60) - n->bus[bus].target[target].parameter.f.enable_wide = 1; + n->bus[bus].target[target].parameter.enable_wide = 1; if (result[7] & 0x10) - n->bus[bus].target[target].parameter.f.enable_sync = 1; + n->bus[bus].target[target].parameter.enable_sync = 1; if ((result[2] >= 3) && (result[4] + 5 > 56) && (result[56] & 0x4)) n->bus[bus].target[target].ppr_1x160.flags.enable_ppr = 1; dprintk(2, "get_target_options(): wide %i, sync %i, ppr %i\n", - n->bus[bus].target[target].parameter.f.enable_wide, - n->bus[bus].target[target].parameter.f.enable_sync, + n->bus[bus].target[target].parameter.enable_wide, + n->bus[bus].target[target].parameter.enable_sync, n->bus[bus].target[target].ppr_1x160.flags.enable_ppr); } #endif diff -urN linux/drivers/scsi/qla1280.h linux/drivers/scsi/qla1280.h --- linux/drivers/scsi/qla1280.h 2005/07/03 17:43:33 1.24 +++ linux/drivers/scsi/qla1280.h 2005/07/03 17:44:39 1.25 @@ -451,18 +451,15 @@ uint16_t unused_38; /* 38, 39 */ struct { - union { - uint8_t c; - struct { - uint8_t renegotiate_on_error:1; - uint8_t stop_queue_on_check:1; - uint8_t auto_request_sense:1; - uint8_t tag_queuing:1; - uint8_t enable_sync:1; - uint8_t enable_wide:1; - uint8_t parity_checking:1; - uint8_t disconnect_allowed:1; - } f; + struct { + uint8_t renegotiate_on_error:1; + uint8_t stop_queue_on_check:1; + uint8_t auto_request_sense:1; + uint8_t tag_queuing:1; + uint8_t enable_sync:1; + uint8_t enable_wide:1; + uint8_t parity_checking:1; + uint8_t disconnect_allowed:1; } parameter; /* 40 */ uint8_t execution_throttle; /* 41 */ From ths@linux-mips.org Sun Jul 3 17:46:27 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Sun, 03 Jul 2005 18:46:28 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Sun, 03 Jul 2005 18:46:27 +0100 X-archive-position: 520 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/03 18:46:21 Modified files: drivers/scsi : qla1280.c qla1280.h Log message: qla1280 patchset from hch: qla1280-sparse-fixes. diff -urN linux/drivers/scsi/qla1280.c linux/drivers/scsi/qla1280.c --- linux/drivers/scsi/qla1280.c 2005/07/03 17:44:39 1.52 +++ linux/drivers/scsi/qla1280.c 2005/07/03 17:46:21 1.53 @@ -1522,7 +1522,7 @@ int host_status = DID_ERROR; uint16_t comp_status = le16_to_cpu(sts->comp_status); uint16_t state_flags = le16_to_cpu(sts->state_flags); - uint16_t residual_length = le16_to_cpu(sts->residual_length); + uint16_t residual_length = le32_to_cpu(sts->residual_length); uint16_t scsi_status = le16_to_cpu(sts->scsi_status); #if DEBUG_QLA1280_INTR static char *reason[] = { @@ -1908,7 +1908,7 @@ "%d,%d(0x%x)\n", risc_code_address, cnt, num, risc_address); for(i = 0; i < cnt; i++) - ((uint16_t *)ha->request_ring)[i] = + ((__le16 *)ha->request_ring)[i] = cpu_to_le16(risc_code_address[i]); mb[0] = MBC_LOAD_RAM; @@ -2962,7 +2962,7 @@ struct scsi_cmnd *cmd = sp->cmd; cmd_a64_entry_t *pkt; struct scatterlist *sg = NULL; - u32 *dword_ptr; + __le32 *dword_ptr; dma_addr_t dma_handle; int status = 0; int cnt; @@ -3249,7 +3249,7 @@ struct scsi_cmnd *cmd = sp->cmd; struct cmd_entry *pkt; struct scatterlist *sg = NULL; - uint32_t *dword_ptr; + __le32 *dword_ptr; int status = 0; int cnt; int req_cnt; diff -urN linux/drivers/scsi/qla1280.h linux/drivers/scsi/qla1280.h --- linux/drivers/scsi/qla1280.h 2005/07/03 17:44:39 1.25 +++ linux/drivers/scsi/qla1280.h 2005/07/03 17:46:21 1.26 @@ -516,23 +516,23 @@ uint8_t entry_count; /* Entry count. */ uint8_t sys_define; /* System defined. */ uint8_t entry_status; /* Entry Status. */ - uint32_t handle; /* System handle. */ + __le32 handle; /* System handle. */ uint8_t lun; /* SCSI LUN */ uint8_t target; /* SCSI ID */ - uint16_t cdb_len; /* SCSI command length. */ - uint16_t control_flags; /* Control flags. */ - uint16_t reserved; - uint16_t timeout; /* Command timeout. */ - uint16_t dseg_count; /* Data segment count. */ + __le16 cdb_len; /* SCSI command length. */ + __le16 control_flags; /* Control flags. */ + __le16 reserved; + __le16 timeout; /* Command timeout. */ + __le16 dseg_count; /* Data segment count. */ uint8_t scsi_cdb[MAX_CMDSZ]; /* SCSI command words. */ - uint32_t dseg_0_address; /* Data segment 0 address. */ - uint32_t dseg_0_length; /* Data segment 0 length. */ - uint32_t dseg_1_address; /* Data segment 1 address. */ - uint32_t dseg_1_length; /* Data segment 1 length. */ - uint32_t dseg_2_address; /* Data segment 2 address. */ - uint32_t dseg_2_length; /* Data segment 2 length. */ - uint32_t dseg_3_address; /* Data segment 3 address. */ - uint32_t dseg_3_length; /* Data segment 3 length. */ + __le32 dseg_0_address; /* Data segment 0 address. */ + __le32 dseg_0_length; /* Data segment 0 length. */ + __le32 dseg_1_address; /* Data segment 1 address. */ + __le32 dseg_1_length; /* Data segment 1 length. */ + __le32 dseg_2_address; /* Data segment 2 address. */ + __le32 dseg_2_length; /* Data segment 2 length. */ + __le32 dseg_3_address; /* Data segment 3 address. */ + __le32 dseg_3_length; /* Data segment 3 length. */ }; /* @@ -544,21 +544,21 @@ uint8_t entry_count; /* Entry count. */ uint8_t sys_define; /* System defined. */ uint8_t entry_status; /* Entry Status. */ - uint32_t reserved; /* Reserved */ - uint32_t dseg_0_address; /* Data segment 0 address. */ - uint32_t dseg_0_length; /* Data segment 0 length. */ - uint32_t dseg_1_address; /* Data segment 1 address. */ - uint32_t dseg_1_length; /* Data segment 1 length. */ - uint32_t dseg_2_address; /* Data segment 2 address. */ - uint32_t dseg_2_length; /* Data segment 2 length. */ - uint32_t dseg_3_address; /* Data segment 3 address. */ - uint32_t dseg_3_length; /* Data segment 3 length. */ - uint32_t dseg_4_address; /* Data segment 4 address. */ - uint32_t dseg_4_length; /* Data segment 4 length. */ - uint32_t dseg_5_address; /* Data segment 5 address. */ - uint32_t dseg_5_length; /* Data segment 5 length. */ - uint32_t dseg_6_address; /* Data segment 6 address. */ - uint32_t dseg_6_length; /* Data segment 6 length. */ + __le32 reserved; /* Reserved */ + __le32 dseg_0_address; /* Data segment 0 address. */ + __le32 dseg_0_length; /* Data segment 0 length. */ + __le32 dseg_1_address; /* Data segment 1 address. */ + __le32 dseg_1_length; /* Data segment 1 length. */ + __le32 dseg_2_address; /* Data segment 2 address. */ + __le32 dseg_2_length; /* Data segment 2 length. */ + __le32 dseg_3_address; /* Data segment 3 address. */ + __le32 dseg_3_length; /* Data segment 3 length. */ + __le32 dseg_4_address; /* Data segment 4 address. */ + __le32 dseg_4_length; /* Data segment 4 length. */ + __le32 dseg_5_address; /* Data segment 5 address. */ + __le32 dseg_5_length; /* Data segment 5 length. */ + __le32 dseg_6_address; /* Data segment 6 address. */ + __le32 dseg_6_length; /* Data segment 6 length. */ }; /* @@ -574,22 +574,22 @@ #define RF_FULL BIT_1 /* Full */ #define RF_BAD_HEADER BIT_2 /* Bad header. */ #define RF_BAD_PAYLOAD BIT_3 /* Bad payload. */ - uint32_t handle; /* System handle. */ - uint16_t scsi_status; /* SCSI status. */ - uint16_t comp_status; /* Completion status. */ - uint16_t state_flags; /* State flags. */ -#define SF_TRANSFER_CMPL BIT_14 /* Transfer Complete. */ -#define SF_GOT_SENSE BIT_13 /* Got Sense */ -#define SF_GOT_STATUS BIT_12 /* Got Status */ -#define SF_TRANSFERRED_DATA BIT_11 /* Transferred data */ -#define SF_SENT_CDB BIT_10 /* Send CDB */ -#define SF_GOT_TARGET BIT_9 /* */ -#define SF_GOT_BUS BIT_8 /* */ - uint16_t status_flags; /* Status flags. */ - uint16_t time; /* Time. */ - uint16_t req_sense_length; /* Request sense data length. */ - uint32_t residual_length; /* Residual transfer length. */ - uint16_t reserved[4]; + __le32 handle; /* System handle. */ + __le16 scsi_status; /* SCSI status. */ + __le16 comp_status; /* Completion status. */ + __le16 state_flags; /* State flags. */ +#define SF_TRANSFER_CMPL BIT_14 /* Transfer Complete. */ +#define SF_GOT_SENSE BIT_13 /* Got Sense */ +#define SF_GOT_STATUS BIT_12 /* Got Status */ +#define SF_TRANSFERRED_DATA BIT_11 /* Transferred data */ +#define SF_SENT_CDB BIT_10 /* Send CDB */ +#define SF_GOT_TARGET BIT_9 /* */ +#define SF_GOT_BUS BIT_8 /* */ + __le16 status_flags; /* Status flags. */ + __le16 time; /* Time. */ + __le16 req_sense_length;/* Request sense data length. */ + __le32 residual_length; /* Residual transfer length. */ + __le16 reserved[4]; uint8_t req_sense_data[32]; /* Request sense data. */ }; @@ -602,7 +602,7 @@ uint8_t entry_count; /* Entry count. */ uint8_t sys_define; /* System defined. */ uint8_t entry_status; /* Entry Status. */ - uint32_t reserved; + __le32 reserved; uint8_t lun; /* SCSI LUN */ uint8_t target; /* SCSI ID */ uint8_t modifier; /* Modifier (7-0). */ @@ -626,11 +626,11 @@ uint32_t handle; /* System handle. */ uint8_t lun; /* SCSI LUN */ uint8_t target; /* SCSI ID */ - uint16_t cdb_len; /* SCSI command length. */ - uint16_t control_flags; /* Control flags. */ - uint16_t reserved; - uint16_t timeout; /* Command timeout. */ - uint16_t dseg_count; /* Data segment count. */ + __le16 cdb_len; /* SCSI command length. */ + __le16 control_flags; /* Control flags. */ + __le16 reserved; + __le16 timeout; /* Command timeout. */ + __le16 dseg_count; /* Data segment count. */ uint8_t scsi_cdb[88]; /* SCSI command words. */ }; @@ -643,20 +643,20 @@ uint8_t entry_count; /* Entry count. */ uint8_t sys_define; /* System defined. */ uint8_t entry_status; /* Entry Status. */ - uint32_t handle; /* System handle. */ + __le32 handle; /* System handle. */ uint8_t lun; /* SCSI LUN */ uint8_t target; /* SCSI ID */ - uint16_t cdb_len; /* SCSI command length. */ - uint16_t control_flags; /* Control flags. */ - uint16_t reserved; - uint16_t timeout; /* Command timeout. */ - uint16_t dseg_count; /* Data segment count. */ + __le16 cdb_len; /* SCSI command length. */ + __le16 control_flags; /* Control flags. */ + __le16 reserved; + __le16 timeout; /* Command timeout. */ + __le16 dseg_count; /* Data segment count. */ uint8_t scsi_cdb[MAX_CMDSZ]; /* SCSI command words. */ - uint32_t reserved_1[2]; /* unused */ - uint32_t dseg_0_address[2]; /* Data segment 0 address. */ - uint32_t dseg_0_length; /* Data segment 0 length. */ - uint32_t dseg_1_address[2]; /* Data segment 1 address. */ - uint32_t dseg_1_length; /* Data segment 1 length. */ + __le32 reserved_1[2]; /* unused */ + __le32 dseg_0_address[2]; /* Data segment 0 address. */ + __le32 dseg_0_length; /* Data segment 0 length. */ + __le32 dseg_1_address[2]; /* Data segment 1 address. */ + __le32 dseg_1_length; /* Data segment 1 length. */ } cmd_a64_entry_t, request_t; /* @@ -668,16 +668,16 @@ uint8_t entry_count; /* Entry count. */ uint8_t sys_define; /* System defined. */ uint8_t entry_status; /* Entry Status. */ - uint32_t dseg_0_address[2]; /* Data segment 0 address. */ - uint32_t dseg_0_length; /* Data segment 0 length. */ - uint32_t dseg_1_address[2]; /* Data segment 1 address. */ - uint32_t dseg_1_length; /* Data segment 1 length. */ - uint32_t dseg_2_address[2]; /* Data segment 2 address. */ - uint32_t dseg_2_length; /* Data segment 2 length. */ - uint32_t dseg_3_address[2]; /* Data segment 3 address. */ - uint32_t dseg_3_length; /* Data segment 3 length. */ - uint32_t dseg_4_address[2]; /* Data segment 4 address. */ - uint32_t dseg_4_length; /* Data segment 4 length. */ + __le32 dseg_0_address[2]; /* Data segment 0 address. */ + __le32 dseg_0_length; /* Data segment 0 length. */ + __le32 dseg_1_address[2]; /* Data segment 1 address. */ + __le32 dseg_1_length; /* Data segment 1 length. */ + __le32 dseg_2_address[2]; /* Data segment 2 address. */ + __le32 dseg_2_length; /* Data segment 2 length. */ + __le32 dseg_3_address[2]; /* Data segment 3 address. */ + __le32 dseg_3_length; /* Data segment 3 length. */ + __le32 dseg_4_address[2]; /* Data segment 4 address. */ + __le32 dseg_4_length; /* Data segment 4 length. */ }; /* @@ -689,10 +689,10 @@ uint8_t entry_count; /* Entry count. */ uint8_t reserved_1; uint8_t entry_status; /* Entry Status not used. */ - uint32_t reserved_2; - uint16_t lun; /* Bit 15 is bus number. */ - uint16_t reserved_4; - uint32_t option_flags; + __le32 reserved_2; + __le16 lun; /* Bit 15 is bus number. */ + __le16 reserved_4; + __le32 option_flags; uint8_t status; uint8_t reserved_5; uint8_t command_count; /* Number of ATIOs allocated. */ @@ -702,8 +702,8 @@ /* commands (2-26). */ uint8_t group_7_length; /* SCSI CDB length for group 7 */ /* commands (2-26). */ - uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */ - uint16_t reserved_6[20]; + __le16 timeout; /* 0 = 30 seconds, 0xFFFF = disable */ + __le16 reserved_6[20]; }; /* @@ -717,20 +717,20 @@ uint8_t entry_count; /* Entry count. */ uint8_t reserved_1; uint8_t entry_status; /* Entry Status. */ - uint32_t reserved_2; + __le32 reserved_2; uint8_t lun; /* SCSI LUN */ uint8_t reserved_3; uint8_t operators; uint8_t reserved_4; - uint32_t option_flags; + __le32 option_flags; uint8_t status; uint8_t reserved_5; uint8_t command_count; /* Number of ATIOs allocated. */ uint8_t immed_notify_count; /* Number of Immediate Notify */ /* entries allocated. */ - uint16_t reserved_6; - uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */ - uint16_t reserved_7[20]; + __le16 reserved_6; + __le16 timeout; /* 0 = 30 seconds, 0xFFFF = disable */ + __le16 reserved_7[20]; }; /* @@ -742,20 +742,20 @@ uint8_t entry_count; /* Entry count. */ uint8_t reserved_1; uint8_t entry_status; /* Entry Status. */ - uint32_t reserved_2; + __le32 reserved_2; uint8_t lun; uint8_t initiator_id; uint8_t reserved_3; uint8_t target_id; - uint32_t option_flags; + __le32 option_flags; uint8_t status; uint8_t reserved_4; uint8_t tag_value; /* Received queue tag message value */ uint8_t tag_type; /* Received queue tag message type */ /* entries allocated. */ - uint16_t seq_id; + __le16 seq_id; uint8_t scsi_msg[8]; /* SCSI message not handled by ISP */ - uint16_t reserved_5[8]; + __le16 reserved_5[8]; uint8_t sense_data[18]; }; @@ -768,16 +768,16 @@ uint8_t entry_count; /* Entry count. */ uint8_t reserved_1; uint8_t entry_status; /* Entry Status. */ - uint32_t reserved_2; + __le32 reserved_2; uint8_t lun; uint8_t initiator_id; uint8_t reserved_3; uint8_t target_id; - uint32_t option_flags; + __le32 option_flags; uint8_t status; uint8_t event; - uint16_t seq_id; - uint16_t reserved_4[22]; + __le16 seq_id; + __le16 reserved_4[22]; }; /* @@ -789,12 +789,12 @@ uint8_t entry_count; /* Entry count. */ uint8_t reserved_1; uint8_t entry_status; /* Entry Status. */ - uint32_t reserved_2; + __le32 reserved_2; uint8_t lun; uint8_t initiator_id; uint8_t cdb_len; uint8_t target_id; - uint32_t option_flags; + __le32 option_flags; uint8_t status; uint8_t scsi_status; uint8_t tag_value; /* Received queue tag message value */ @@ -812,28 +812,28 @@ uint8_t entry_count; /* Entry count. */ uint8_t reserved_1; uint8_t entry_status; /* Entry Status. */ - uint32_t reserved_2; + __le32 reserved_2; uint8_t lun; /* SCSI LUN */ uint8_t initiator_id; uint8_t reserved_3; uint8_t target_id; - uint32_t option_flags; + __le32 option_flags; uint8_t status; uint8_t scsi_status; uint8_t tag_value; /* Received queue tag message value */ uint8_t tag_type; /* Received queue tag message type */ - uint32_t transfer_length; - uint32_t residual; - uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */ - uint16_t dseg_count; /* Data segment count. */ - uint32_t dseg_0_address; /* Data segment 0 address. */ - uint32_t dseg_0_length; /* Data segment 0 length. */ - uint32_t dseg_1_address; /* Data segment 1 address. */ - uint32_t dseg_1_length; /* Data segment 1 length. */ - uint32_t dseg_2_address; /* Data segment 2 address. */ - uint32_t dseg_2_length; /* Data segment 2 length. */ - uint32_t dseg_3_address; /* Data segment 3 address. */ - uint32_t dseg_3_length; /* Data segment 3 length. */ + __le32 transfer_length; + __le32 residual; + __le16 timeout; /* 0 = 30 seconds, 0xFFFF = disable */ + __le16 dseg_count; /* Data segment count. */ + __le32 dseg_0_address; /* Data segment 0 address. */ + __le32 dseg_0_length; /* Data segment 0 length. */ + __le32 dseg_1_address; /* Data segment 1 address. */ + __le32 dseg_1_length; /* Data segment 1 length. */ + __le32 dseg_2_address; /* Data segment 2 address. */ + __le32 dseg_2_length; /* Data segment 2 length. */ + __le32 dseg_3_address; /* Data segment 3 address. */ + __le32 dseg_3_length; /* Data segment 3 length. */ }; /* @@ -845,24 +845,24 @@ uint8_t entry_count; /* Entry count. */ uint8_t reserved_1; uint8_t entry_status; /* Entry Status. */ - uint32_t reserved_2; + __le32 reserved_2; uint8_t lun; /* SCSI LUN */ uint8_t initiator_id; uint8_t reserved_3; uint8_t target_id; - uint32_t option_flags; + __le32 option_flags; uint8_t status; uint8_t scsi_status; uint8_t tag_value; /* Received queue tag message value */ uint8_t tag_type; /* Received queue tag message type */ - uint32_t transfer_length; - uint32_t residual; - uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */ - uint16_t dseg_count; /* Data segment count. */ - uint32_t dseg_0_address; /* Data segment 0 address. */ - uint32_t dseg_0_length; /* Data segment 0 length. */ - uint32_t dseg_1_address; /* Data segment 1 address. */ - uint16_t dseg_1_length; /* Data segment 1 length. */ + __le32 transfer_length; + __le32 residual; + __le16 timeout; /* 0 = 30 seconds, 0xFFFF = disable */ + __le16 dseg_count; /* Data segment count. */ + __le32 dseg_0_address; /* Data segment 0 address. */ + __le32 dseg_0_length; /* Data segment 0 length. */ + __le32 dseg_1_address; /* Data segment 1 address. */ + __le16 dseg_1_length; /* Data segment 1 length. */ uint8_t sense_data[18]; }; @@ -875,25 +875,25 @@ uint8_t entry_count; /* Entry count. */ uint8_t reserved_1; uint8_t entry_status; /* Entry Status. */ - uint32_t reserved_2; + __le32 reserved_2; uint8_t lun; /* SCSI LUN */ uint8_t initiator_id; uint8_t reserved_3; uint8_t target_id; - uint32_t option_flags; + __le32 option_flags; uint8_t status; uint8_t scsi_status; uint8_t tag_value; /* Received queue tag message value */ uint8_t tag_type; /* Received queue tag message type */ - uint32_t transfer_length; - uint32_t residual; - uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */ - uint16_t dseg_count; /* Data segment count. */ - uint32_t reserved_4[2]; - uint32_t dseg_0_address[2]; /* Data segment 0 address. */ - uint32_t dseg_0_length; /* Data segment 0 length. */ - uint32_t dseg_1_address[2]; /* Data segment 1 address. */ - uint32_t dseg_1_length; /* Data segment 1 length. */ + __le32 transfer_length; + __le32 residual; + __le16 timeout; /* 0 = 30 seconds, 0xFFFF = disable */ + __le16 dseg_count; /* Data segment count. */ + __le32 reserved_4[2]; + __le32 dseg_0_address[2];/* Data segment 0 address. */ + __le32 dseg_0_length; /* Data segment 0 length. */ + __le32 dseg_1_address[2];/* Data segment 1 address. */ + __le32 dseg_1_length; /* Data segment 1 length. */ }; /* @@ -905,21 +905,21 @@ uint8_t entry_count; /* Entry count. */ uint8_t reserved_1; uint8_t entry_status; /* Entry Status. */ - uint32_t reserved_2; + __le32 reserved_2; uint8_t lun; /* SCSI LUN */ uint8_t initiator_id; uint8_t reserved_3; uint8_t target_id; - uint32_t option_flags; + __le32 option_flags; uint8_t status; uint8_t scsi_status; uint8_t tag_value; /* Received queue tag message value */ uint8_t tag_type; /* Received queue tag message type */ - uint32_t transfer_length; - uint32_t residual; - uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */ - uint16_t dseg_count; /* Data segment count. */ - uint16_t reserved_4[7]; + __le32 transfer_length; + __le32 residual; + __le16 timeout; /* 0 = 30 seconds, 0xFFFF = disable */ + __le16 dseg_count; /* Data segment count. */ + __le16 reserved_4[7]; uint8_t sense_data[18]; }; From ths@linux-mips.org Sun Jul 3 18:00:39 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Sun, 03 Jul 2005 19:00:39 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Sun, 03 Jul 2005 19:00:39 +0100 X-archive-position: 521 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/03 19:00:33 Modified files: drivers/serial : ip22zilog.c Log message: Update zilog timeout, thanks Peter Fuerst. diff -urN linux/drivers/serial/ip22zilog.c linux/drivers/serial/ip22zilog.c --- linux/drivers/serial/ip22zilog.c 2004/12/03 06:07:38 1.16 +++ linux/drivers/serial/ip22zilog.c 2005/07/03 18:00:33 1.17 @@ -881,6 +881,7 @@ up->cflag = termios->c_cflag; ip22zilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(port)); + uart_update_timeout(port, termios->c_cflag, baud); spin_unlock_irqrestore(&up->port.lock, flags); } @@ -1047,6 +1048,8 @@ } con->cflag = cflag | CS8; /* 8N1 */ + + uart_update_timeout(&ip22zilog_port_table[con->index].port, cflag, baud); } static int __init ip22zilog_console_setup(struct console *con, char *options) From ths@linux-mips.org Sun Jul 3 19:07:25 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Sun, 03 Jul 2005 20:07:25 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Sun, 03 Jul 2005 20:07:25 +0100 X-archive-position: 522 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/03 20:07:19 Modified files: arch/mips/pci : pci-lasat.c Log message: Resurrect lasat. Two plat_setup functions are one to many. diff -urN linux/arch/mips/pci/pci-lasat.c linux/arch/mips/pci/pci-lasat.c --- linux/arch/mips/pci/pci-lasat.c 2005/06/21 13:56:31 1.10 +++ linux/arch/mips/pci/pci-lasat.c 2005/07/03 19:07:19 1.11 @@ -34,7 +34,7 @@ .io_resource = &lasat_pci_io_resource, }; -void __init plat_setup(void) +static int __init lasat_pci_setup(void) { printk("PCI: starting\n"); @@ -50,8 +50,12 @@ } register_pci_controller(&lasat_pci_controller); + + return 0; } +arch_initcall(lasat_pci_setup); + #define LASATINT_ETH1 0 #define LASATINT_ETH0 1 #define LASATINT_HDC 2 From ths@linux-mips.org Sun Jul 3 19:12:14 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Sun, 03 Jul 2005 20:12:14 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Sun, 03 Jul 2005 20:12:14 +0100 X-archive-position: 523 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/03 20:12:05 Modified files: arch/mips/pci : pci-lasat.c Log message: Code cleanup, thanks Brian Murphy. diff -urN linux/arch/mips/pci/pci-lasat.c linux/arch/mips/pci/pci-lasat.c --- linux/arch/mips/pci/pci-lasat.c 2005/07/03 19:07:19 1.11 +++ linux/arch/mips/pci/pci-lasat.c 2005/07/03 19:12:05 1.12 @@ -7,10 +7,8 @@ */ #include #include -#include #include #include -#include #include extern struct pci_ops nile4_pci_ops; @@ -18,14 +16,14 @@ static struct resource lasat_pci_mem_resource = { .name = "LASAT PCI MEM", .start = 0x18000000, - .end = 0x19FFFFFF, + .end = 0x19ffffff, .flags = IORESOURCE_MEM, }; static struct resource lasat_pci_io_resource = { .name = "LASAT PCI IO", .start = 0x1a000000, - .end = 0x1bFFFFFF, + .end = 0x1bffffff, .flags = IORESOURCE_IO, }; @@ -36,16 +34,16 @@ static int __init lasat_pci_setup(void) { - printk("PCI: starting\n"); + printk("PCI: starting\n"); - switch (mips_machtype) { - case MACH_LASAT_100: + switch (mips_machtype) { + case MACH_LASAT_100: lasat_pci_controller.pci_ops = >64120_pci_ops; break; - case MACH_LASAT_200: + case MACH_LASAT_200: lasat_pci_controller.pci_ops = &nile4_pci_ops; break; - default: + default: panic("pcibios_init: mips_machtype incorrect"); } @@ -68,24 +66,24 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { - switch (slot) { - case 1: - return LASATINT_PCIA; /* Expansion Module 0 */ - case 2: - return LASATINT_PCIB; /* Expansion Module 1 */ - case 3: - return LASATINT_PCIC; /* Expansion Module 2 */ - case 4: - return LASATINT_ETH1; /* Ethernet 1 (LAN 2) */ - case 5: - return LASATINT_ETH0; /* Ethernet 0 (LAN 1) */ - case 6: - return LASATINT_HDC; /* IDE controller */ - default: - return 0xff; /* Illegal */ - } + switch (slot) { + case 1: + return LASATINT_PCIA; + case 2: + return LASATINT_PCIB; + case 3: + return LASATINT_PCIC; + case 4: + return LASATINT_ETH1; /* Ethernet 1 (LAN 2) */ + case 5: + return LASATINT_ETH0; /* Ethernet 0 (LAN 1) */ + case 6: + return LASATINT_HDC; /* IDE controller */ + default: + return 0xff; /* Illegal */ + } - return -1; + return -1; } /* Do platform specific device initialization at pci_enable_device() time */ From ths@linux-mips.org Sun Jul 3 19:16:19 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Sun, 03 Jul 2005 20:16:19 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Sun, 03 Jul 2005 20:16:19 +0100 X-archive-position: 524 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/03 20:16:13 Modified files: arch/mips/pci : pci-lasat.c Log message: Brian Murphy says: this fixes Lasat pci to work with multi-function devices by assigning the correct values based on pin number (instead of ignoring them). diff -urN linux/arch/mips/pci/pci-lasat.c linux/arch/mips/pci/pci-lasat.c --- linux/arch/mips/pci/pci-lasat.c 2005/07/03 19:12:05 1.12 +++ linux/arch/mips/pci/pci-lasat.c 2005/07/03 19:16:13 1.13 @@ -68,11 +68,9 @@ { switch (slot) { case 1: - return LASATINT_PCIA; case 2: - return LASATINT_PCIB; case 3: - return LASATINT_PCIC; + return LASATINT_PCIA + (((slot-1) + (pin-1)) % 4); case 4: return LASATINT_ETH1; /* Ethernet 1 (LAN 2) */ case 5: From ralf@linux-mips.org Wed Jul 6 10:43:58 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Wed, 06 Jul 2005 11:43:58 +0100 (BST) From: ralf@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Wed, 06 Jul 2005 11:43:58 +0100 X-archive-position: 525 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ralf@ftp.linux-mips.org 05/07/06 11:43:52 Modified files: arch/mips/sibyte/sb1250: time.c Log message: Don't redeclare ll_local_timer_interrupt. diff -urN linux/arch/mips/sibyte/sb1250/time.c linux/arch/mips/sibyte/sb1250/time.c --- linux/arch/mips/sibyte/sb1250/time.c 2005/02/22 21:51:35 1.17 +++ linux/arch/mips/sibyte/sb1250/time.c 2005/07/06 10:43:52 1.18 @@ -100,7 +100,6 @@ void sb1250_timer_interrupt(struct pt_regs *regs) { - extern asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs); int cpu = smp_processor_id(); int irq = K_INT_TIMER_0 + cpu; From ralf@linux-mips.org Wed Jul 6 10:51:27 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Wed, 06 Jul 2005 11:51:27 +0100 (BST) From: ralf@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Wed, 06 Jul 2005 11:51:27 +0100 X-archive-position: 526 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ralf@ftp.linux-mips.org 05/07/06 11:51:21 Modified files: drivers/pci : pci.ids Log message: Better describe SOC-it as "SOC-it 101 System Controller". diff -urN linux/drivers/pci/pci.ids linux/drivers/pci/pci.ids --- linux/drivers/pci/pci.ids 2005/06/18 14:42:48 1.82 +++ linux/drivers/pci/pci.ids 2005/07/06 10:51:21 1.83 @@ -7668,7 +7668,7 @@ 153d FILANET Corp 153e TECHWELL Inc 153f MIPS Technologies, Inc. - 0001 SOC-it + 0001 SOC-it 101 System Controller 1540 PROVIDEO MULTIMEDIA Co Ltd 1541 MACHONE Communications 1542 VIVID Technology Inc From ralf@linux-mips.org Wed Jul 6 12:08:21 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Wed, 06 Jul 2005 13:08:21 +0100 (BST) From: ralf@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Wed, 06 Jul 2005 13:08:21 +0100 X-archive-position: 527 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ralf@ftp.linux-mips.org 05/07/06 13:08:14 Modified files: arch/mips : Kconfig Makefile defconfig arch/mips/configs: atlas_defconfig capcella_defconfig cobalt_defconfig db1000_defconfig db1100_defconfig db1500_defconfig db1550_defconfig ddb5476_defconfig ddb5477_defconfig decstation_defconfig e55_defconfig ev64120_defconfig ev96100_defconfig ip22_defconfig ip27_defconfig ip32_defconfig it8172_defconfig ivr_defconfig jaguar-atx_defconfig jmr3927_defconfig lasat200_defconfig malta_defconfig mpc30x_defconfig ocelot_3_defconfig ocelot_c_defconfig ocelot_defconfig ocelot_g_defconfig pb1100_defconfig pb1500_defconfig pb1550_defconfig rm200_defconfig sb1250-swarm_defconfig sead_defconfig tb0226_defconfig tb0229_defconfig workpad_defconfig yosemite_defconfig arch/mips/kernel: Makefile r4k_switch.S traps.c arch/mips/lib-32: Makefile arch/mips/lib-64: Makefile arch/mips/mm : Makefile cache.c tlb-r4k.c tlb-sb1.c arch/mips/oprofile: Makefile drivers/video : epson1356fb.c include/asm-mips: addrspace.h page.h pgtable-32.h pgtable-bits.h pgtable.h include/asm-mips/mach-mips: cpu-feature-overrides.h Log message: Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1. diff -urN linux/arch/mips/Kconfig linux/arch/mips/Kconfig --- linux/arch/mips/Kconfig 2005/06/05 03:57:20 1.147 +++ linux/arch/mips/Kconfig 2005/07/06 12:08:11 1.148 @@ -888,16 +888,28 @@ prompt "CPU type" default CPU_R4X00 -config CPU_MIPS32 - bool "MIPS32" +config CPU_MIPS32_R1 + bool "MIPS32 Release 1" select CPU_SUPPORTS_32BIT_KERNEL select CPU_HAS_PREFETCH + help + Choose this option to build a kernel for release 1 or later of the + MIPS32 architecture. Most modern embedded systems with a 32-bit + MIPS processor are based on a MIPS32 processor. If you know the + specific type of processor in your system, choose those that one + otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. -config CPU_MIPS64 - bool "MIPS64" +config CPU_MIPS64_R1 + bool "MIPS64 Release 1" select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL select CPU_HAS_PREFETCH + help + Choose this option to build a kernel for release 1 or later of the + MIPS64 architecture. Many modern embedded systems with a 64-bit + MIPS processor are based on a MIPS64 processor. If you know the + specific type of processor in your system, choose those that one + otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. config CPU_R3000 bool "R3000" @@ -1133,7 +1145,7 @@ config 64BIT_PHYS_ADDR bool "Support for 64-bit physical address space" - depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && MIPS32 + depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32_R1 || CPU_MIPS64_R1) && MIPS32 config CPU_ADVANCED bool "Override CPU Options" @@ -1156,7 +1168,7 @@ config CPU_HAS_LLDSCD bool "lld/scd Instructions available" if CPU_ADVANCED - default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX && !CPU_MIPS32 + default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX && !CPU_MIPS32_R1 help Say Y here if your CPU has the lld and scd instructions, the 64-bit equivalents of ll and sc. Say Y here for better performance, N if diff -urN linux/arch/mips/Makefile linux/arch/mips/Makefile --- linux/arch/mips/Makefile 2005/06/03 13:08:04 1.195 +++ linux/arch/mips/Makefile 2005/07/06 12:08:11 1.196 @@ -178,11 +178,11 @@ $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \ -Wa,--trap -cflags-$(CONFIG_CPU_MIPS32) += \ +cflags-$(CONFIG_CPU_MIPS32_R1) += \ $(call set_gccflags,mips32,mips32,r4600,mips3,mips2) \ -Wa,--trap -cflags-$(CONFIG_CPU_MIPS64) += \ +cflags-$(CONFIG_CPU_MIPS64_R1) += \ $(call set_gccflags,mips64,mips64,r4600,mips3,mips2) \ -Wa,--trap diff -urN linux/arch/mips/defconfig linux/arch/mips/defconfig --- linux/arch/mips/defconfig 2005/06/18 14:42:40 1.293 +++ linux/arch/mips/defconfig 2005/07/06 12:08:11 1.294 @@ -126,8 +126,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/atlas_defconfig linux/arch/mips/configs/atlas_defconfig --- linux/arch/mips/configs/atlas_defconfig 2005/06/18 14:42:40 1.57 +++ linux/arch/mips/configs/atlas_defconfig 2005/07/06 12:08:11 1.58 @@ -125,8 +125,8 @@ # # CPU selection # -CONFIG_CPU_MIPS32=y -# CONFIG_CPU_MIPS64 is not set +CONFIG_CPU_MIPS32_R1=y +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/capcella_defconfig linux/arch/mips/configs/capcella_defconfig --- linux/arch/mips/configs/capcella_defconfig 2005/06/18 14:42:40 1.57 +++ linux/arch/mips/configs/capcella_defconfig 2005/07/06 12:08:11 1.58 @@ -129,8 +129,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set CONFIG_CPU_VR41XX=y diff -urN linux/arch/mips/configs/cobalt_defconfig linux/arch/mips/configs/cobalt_defconfig --- linux/arch/mips/configs/cobalt_defconfig 2005/06/18 14:42:40 1.54 +++ linux/arch/mips/configs/cobalt_defconfig 2005/07/06 12:08:11 1.55 @@ -115,8 +115,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/db1000_defconfig linux/arch/mips/configs/db1000_defconfig --- linux/arch/mips/configs/db1000_defconfig 2005/06/18 14:42:40 1.60 +++ linux/arch/mips/configs/db1000_defconfig 2005/07/06 12:08:11 1.61 @@ -120,8 +120,8 @@ # # CPU selection # -CONFIG_CPU_MIPS32=y -# CONFIG_CPU_MIPS64 is not set +CONFIG_CPU_MIPS32_R1=y +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/db1100_defconfig linux/arch/mips/configs/db1100_defconfig --- linux/arch/mips/configs/db1100_defconfig 2005/06/18 14:42:40 1.59 +++ linux/arch/mips/configs/db1100_defconfig 2005/07/06 12:08:11 1.60 @@ -120,8 +120,8 @@ # # CPU selection # -CONFIG_CPU_MIPS32=y -# CONFIG_CPU_MIPS64 is not set +CONFIG_CPU_MIPS32_R1=y +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/db1500_defconfig linux/arch/mips/configs/db1500_defconfig --- linux/arch/mips/configs/db1500_defconfig 2005/06/18 14:42:40 1.62 +++ linux/arch/mips/configs/db1500_defconfig 2005/07/06 12:08:11 1.63 @@ -122,8 +122,8 @@ # # CPU selection # -CONFIG_CPU_MIPS32=y -# CONFIG_CPU_MIPS64 is not set +CONFIG_CPU_MIPS32_R1=y +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/db1550_defconfig linux/arch/mips/configs/db1550_defconfig --- linux/arch/mips/configs/db1550_defconfig 2005/06/18 14:42:40 1.37 +++ linux/arch/mips/configs/db1550_defconfig 2005/07/06 12:08:11 1.38 @@ -121,8 +121,8 @@ # # CPU selection # -CONFIG_CPU_MIPS32=y -# CONFIG_CPU_MIPS64 is not set +CONFIG_CPU_MIPS32_R1=y +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/ddb5476_defconfig linux/arch/mips/configs/ddb5476_defconfig --- linux/arch/mips/configs/ddb5476_defconfig 2005/06/18 14:42:40 1.54 +++ linux/arch/mips/configs/ddb5476_defconfig 2005/07/06 12:08:11 1.55 @@ -116,8 +116,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/ddb5477_defconfig linux/arch/mips/configs/ddb5477_defconfig --- linux/arch/mips/configs/ddb5477_defconfig 2005/06/18 14:42:40 1.54 +++ linux/arch/mips/configs/ddb5477_defconfig 2005/07/06 12:08:11 1.55 @@ -116,8 +116,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/decstation_defconfig linux/arch/mips/configs/decstation_defconfig --- linux/arch/mips/configs/decstation_defconfig 2005/06/18 13:54:44 1.55 +++ linux/arch/mips/configs/decstation_defconfig 2005/07/06 12:08:11 1.56 @@ -121,8 +121,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set CONFIG_CPU_R3000=y # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/e55_defconfig linux/arch/mips/configs/e55_defconfig --- linux/arch/mips/configs/e55_defconfig 2005/06/18 14:42:40 1.56 +++ linux/arch/mips/configs/e55_defconfig 2005/07/06 12:08:11 1.57 @@ -128,8 +128,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set CONFIG_CPU_VR41XX=y diff -urN linux/arch/mips/configs/ev64120_defconfig linux/arch/mips/configs/ev64120_defconfig --- linux/arch/mips/configs/ev64120_defconfig 2005/06/18 14:42:40 1.53 +++ linux/arch/mips/configs/ev64120_defconfig 2005/07/06 12:08:11 1.54 @@ -123,8 +123,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/ev96100_defconfig linux/arch/mips/configs/ev96100_defconfig --- linux/arch/mips/configs/ev96100_defconfig 2005/06/18 14:42:40 1.54 +++ linux/arch/mips/configs/ev96100_defconfig 2005/07/06 12:08:11 1.55 @@ -122,8 +122,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/ip22_defconfig linux/arch/mips/configs/ip22_defconfig --- linux/arch/mips/configs/ip22_defconfig 2005/06/18 14:42:40 1.63 +++ linux/arch/mips/configs/ip22_defconfig 2005/07/06 12:08:11 1.64 @@ -126,8 +126,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/ip27_defconfig linux/arch/mips/configs/ip27_defconfig --- linux/arch/mips/configs/ip27_defconfig 2005/06/18 14:42:40 1.67 +++ linux/arch/mips/configs/ip27_defconfig 2005/07/06 12:08:11 1.68 @@ -131,8 +131,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/ip32_defconfig linux/arch/mips/configs/ip32_defconfig --- linux/arch/mips/configs/ip32_defconfig 2005/06/18 14:42:40 1.57 +++ linux/arch/mips/configs/ip32_defconfig 2005/07/06 12:08:11 1.58 @@ -120,8 +120,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/it8172_defconfig linux/arch/mips/configs/it8172_defconfig --- linux/arch/mips/configs/it8172_defconfig 2005/06/18 14:42:40 1.53 +++ linux/arch/mips/configs/it8172_defconfig 2005/07/06 12:08:11 1.54 @@ -123,8 +123,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/ivr_defconfig linux/arch/mips/configs/ivr_defconfig --- linux/arch/mips/configs/ivr_defconfig 2005/06/18 14:42:40 1.53 +++ linux/arch/mips/configs/ivr_defconfig 2005/07/06 12:08:11 1.54 @@ -121,8 +121,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/jaguar-atx_defconfig linux/arch/mips/configs/jaguar-atx_defconfig --- linux/arch/mips/configs/jaguar-atx_defconfig 2005/06/18 14:42:40 1.58 +++ linux/arch/mips/configs/jaguar-atx_defconfig 2005/07/06 12:08:11 1.59 @@ -124,8 +124,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/jmr3927_defconfig linux/arch/mips/configs/jmr3927_defconfig --- linux/arch/mips/configs/jmr3927_defconfig 2005/06/18 14:42:40 1.54 +++ linux/arch/mips/configs/jmr3927_defconfig 2005/07/06 12:08:11 1.55 @@ -115,8 +115,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set CONFIG_CPU_TX39XX=y # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/lasat200_defconfig linux/arch/mips/configs/lasat200_defconfig --- linux/arch/mips/configs/lasat200_defconfig 2005/06/18 14:42:40 1.54 +++ linux/arch/mips/configs/lasat200_defconfig 2005/07/06 12:08:11 1.55 @@ -124,8 +124,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/malta_defconfig linux/arch/mips/configs/malta_defconfig --- linux/arch/mips/configs/malta_defconfig 2005/06/18 14:42:40 1.56 +++ linux/arch/mips/configs/malta_defconfig 2005/07/06 12:08:11 1.57 @@ -128,8 +128,8 @@ # # CPU selection # -CONFIG_CPU_MIPS32=y -# CONFIG_CPU_MIPS64 is not set +CONFIG_CPU_MIPS32_R1=y +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/mpc30x_defconfig linux/arch/mips/configs/mpc30x_defconfig --- linux/arch/mips/configs/mpc30x_defconfig 2005/06/18 14:42:40 1.58 +++ linux/arch/mips/configs/mpc30x_defconfig 2005/07/06 12:08:11 1.59 @@ -129,8 +129,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set CONFIG_CPU_VR41XX=y diff -urN linux/arch/mips/configs/ocelot_3_defconfig linux/arch/mips/configs/ocelot_3_defconfig --- linux/arch/mips/configs/ocelot_3_defconfig 2005/06/18 14:42:40 1.26 +++ linux/arch/mips/configs/ocelot_3_defconfig 2005/07/06 12:08:11 1.27 @@ -125,8 +125,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/ocelot_c_defconfig linux/arch/mips/configs/ocelot_c_defconfig --- linux/arch/mips/configs/ocelot_c_defconfig 2005/06/18 14:42:40 1.52 +++ linux/arch/mips/configs/ocelot_c_defconfig 2005/07/06 12:08:11 1.53 @@ -116,8 +116,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/ocelot_defconfig linux/arch/mips/configs/ocelot_defconfig --- linux/arch/mips/configs/ocelot_defconfig 2005/06/18 14:42:40 1.54 +++ linux/arch/mips/configs/ocelot_defconfig 2005/07/06 12:08:11 1.55 @@ -119,8 +119,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/ocelot_g_defconfig linux/arch/mips/configs/ocelot_g_defconfig --- linux/arch/mips/configs/ocelot_g_defconfig 2005/06/18 14:42:40 1.47 +++ linux/arch/mips/configs/ocelot_g_defconfig 2005/07/06 12:08:11 1.48 @@ -119,8 +119,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/pb1100_defconfig linux/arch/mips/configs/pb1100_defconfig --- linux/arch/mips/configs/pb1100_defconfig 2005/06/18 14:42:40 1.56 +++ linux/arch/mips/configs/pb1100_defconfig 2005/07/06 12:08:11 1.57 @@ -122,8 +122,8 @@ # # CPU selection # -CONFIG_CPU_MIPS32=y -# CONFIG_CPU_MIPS64 is not set +CONFIG_CPU_MIPS32_R1=y +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/pb1500_defconfig linux/arch/mips/configs/pb1500_defconfig --- linux/arch/mips/configs/pb1500_defconfig 2005/06/18 14:42:40 1.62 +++ linux/arch/mips/configs/pb1500_defconfig 2005/07/06 12:08:11 1.63 @@ -121,8 +121,8 @@ # # CPU selection # -CONFIG_CPU_MIPS32=y -# CONFIG_CPU_MIPS64 is not set +CONFIG_CPU_MIPS32_R1=y +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/pb1550_defconfig linux/arch/mips/configs/pb1550_defconfig --- linux/arch/mips/configs/pb1550_defconfig 2005/06/18 14:42:40 1.52 +++ linux/arch/mips/configs/pb1550_defconfig 2005/07/06 12:08:11 1.53 @@ -121,8 +121,8 @@ # # CPU selection # -CONFIG_CPU_MIPS32=y -# CONFIG_CPU_MIPS64 is not set +CONFIG_CPU_MIPS32_R1=y +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/rm200_defconfig linux/arch/mips/configs/rm200_defconfig --- linux/arch/mips/configs/rm200_defconfig 2005/06/18 14:42:40 1.64 +++ linux/arch/mips/configs/rm200_defconfig 2005/07/06 12:08:12 1.65 @@ -130,8 +130,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/sb1250-swarm_defconfig linux/arch/mips/configs/sb1250-swarm_defconfig --- linux/arch/mips/configs/sb1250-swarm_defconfig 2005/06/18 14:42:40 1.60 +++ linux/arch/mips/configs/sb1250-swarm_defconfig 2005/07/06 12:08:12 1.61 @@ -138,8 +138,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/sead_defconfig linux/arch/mips/configs/sead_defconfig --- linux/arch/mips/configs/sead_defconfig 2005/06/18 14:42:40 1.52 +++ linux/arch/mips/configs/sead_defconfig 2005/07/06 12:08:12 1.53 @@ -113,8 +113,8 @@ # # CPU selection # -CONFIG_CPU_MIPS32=y -# CONFIG_CPU_MIPS64 is not set +CONFIG_CPU_MIPS32_R1=y +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/configs/tb0226_defconfig linux/arch/mips/configs/tb0226_defconfig --- linux/arch/mips/configs/tb0226_defconfig 2005/06/18 14:42:40 1.56 +++ linux/arch/mips/configs/tb0226_defconfig 2005/07/06 12:08:12 1.57 @@ -127,8 +127,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set CONFIG_CPU_VR41XX=y diff -urN linux/arch/mips/configs/tb0229_defconfig linux/arch/mips/configs/tb0229_defconfig --- linux/arch/mips/configs/tb0229_defconfig 2005/06/18 14:42:40 1.59 +++ linux/arch/mips/configs/tb0229_defconfig 2005/07/06 12:08:12 1.60 @@ -129,8 +129,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set CONFIG_CPU_VR41XX=y diff -urN linux/arch/mips/configs/workpad_defconfig linux/arch/mips/configs/workpad_defconfig --- linux/arch/mips/configs/workpad_defconfig 2005/06/18 14:42:40 1.56 +++ linux/arch/mips/configs/workpad_defconfig 2005/07/06 12:08:12 1.57 @@ -128,8 +128,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set CONFIG_CPU_VR41XX=y diff -urN linux/arch/mips/configs/yosemite_defconfig linux/arch/mips/configs/yosemite_defconfig --- linux/arch/mips/configs/yosemite_defconfig 2005/06/18 14:42:40 1.58 +++ linux/arch/mips/configs/yosemite_defconfig 2005/07/06 12:08:12 1.59 @@ -124,8 +124,8 @@ # # CPU selection # -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_R3000 is not set # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_VR41XX is not set diff -urN linux/arch/mips/kernel/Makefile linux/arch/mips/kernel/Makefile --- linux/arch/mips/kernel/Makefile 2005/02/21 10:45:09 1.88 +++ linux/arch/mips/kernel/Makefile 2005/07/06 12:08:13 1.89 @@ -28,8 +28,8 @@ obj-$(CONFIG_CPU_NEVADA) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_R10000) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_SB1) += r4k_fpu.o r4k_switch.o -obj-$(CONFIG_CPU_MIPS32) += r4k_fpu.o r4k_switch.o -obj-$(CONFIG_CPU_MIPS64) += r4k_fpu.o r4k_switch.o +obj-$(CONFIG_CPU_MIPS32_R1) += r4k_fpu.o r4k_switch.o +obj-$(CONFIG_CPU_MIPS64_R1) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_R6000) += r6000_fpu.o r4k_switch.o obj-$(CONFIG_SMP) += smp.o diff -urN linux/arch/mips/kernel/r4k_switch.S linux/arch/mips/kernel/r4k_switch.S --- linux/arch/mips/kernel/r4k_switch.S 2004/10/19 17:55:49 1.38 +++ linux/arch/mips/kernel/r4k_switch.S 2005/07/06 12:08:13 1.39 @@ -165,7 +165,7 @@ 1: #endif -#ifdef CONFIG_CPU_MIPS32 +#ifdef CONFIG_CPU_MIPS32_R1 mtc1 t1, $f0 mtc1 t1, $f1 mtc1 t1, $f2 diff -urN linux/arch/mips/kernel/traps.c linux/arch/mips/kernel/traps.c --- linux/arch/mips/kernel/traps.c 2005/06/22 20:43:29 1.217 +++ linux/arch/mips/kernel/traps.c 2005/07/06 12:08:13 1.218 @@ -864,7 +864,7 @@ reg_val & (1<<22) ? "E0 " : ""); printk("IDX: 0x%08x\n", reg_val & ((1<<22)-1)); -#if defined(CONFIG_CPU_MIPS32) || defined (CONFIG_CPU_MIPS64) +#if defined(CONFIG_CPU_MIPS32_R1) || defined (CONFIG_CPU_MIPS64_R1) if (reg_val & (1<<22)) printk("DErrAddr0: 0x%0*lx\n", field, read_c0_derraddr0()); diff -urN linux/arch/mips/lib-32/Makefile linux/arch/mips/lib-32/Makefile --- linux/arch/mips/lib-32/Makefile 2004/06/08 12:03:09 1.7 +++ linux/arch/mips/lib-32/Makefile 2005/07/06 12:08:13 1.8 @@ -4,8 +4,8 @@ lib-y += csum_partial.o memset.o watch.o -obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o -obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o +obj-$(CONFIG_CPU_MIPS32_R1) += dump_tlb.o +obj-$(CONFIG_CPU_MIPS64_R1) += dump_tlb.o obj-$(CONFIG_CPU_NEVADA) += dump_tlb.o obj-$(CONFIG_CPU_R10000) += dump_tlb.o obj-$(CONFIG_CPU_R3000) += r3k_dump_tlb.o diff -urN linux/arch/mips/lib-64/Makefile linux/arch/mips/lib-64/Makefile --- linux/arch/mips/lib-64/Makefile 2004/06/08 12:03:09 1.7 +++ linux/arch/mips/lib-64/Makefile 2005/07/06 12:08:13 1.8 @@ -4,8 +4,8 @@ lib-y += csum_partial.o memset.o watch.o -obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o -obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o +obj-$(CONFIG_CPU_MIPS32_R1) += dump_tlb.o +obj-$(CONFIG_CPU_MIPS64_R1) += dump_tlb.o obj-$(CONFIG_CPU_NEVADA) += dump_tlb.o obj-$(CONFIG_CPU_R10000) += dump_tlb.o obj-$(CONFIG_CPU_R3000) += r3k_dump_tlb.o diff -urN linux/arch/mips/mm/Makefile linux/arch/mips/mm/Makefile --- linux/arch/mips/mm/Makefile 2005/01/12 00:10:42 1.75 +++ linux/arch/mips/mm/Makefile 2005/07/06 12:08:14 1.76 @@ -9,8 +9,8 @@ obj-$(CONFIG_MIPS64) += pgtable-64.o obj-$(CONFIG_HIGHMEM) += highmem.o -obj-$(CONFIG_CPU_MIPS32) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o -obj-$(CONFIG_CPU_MIPS64) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o +obj-$(CONFIG_CPU_MIPS32_R1) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o +obj-$(CONFIG_CPU_MIPS64_R1) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o obj-$(CONFIG_CPU_NEVADA) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o obj-$(CONFIG_CPU_R10000) += c-r4k.o cex-gen.o pg-r4k.o tlb-andes.o obj-$(CONFIG_CPU_R3000) += c-r3k.o tlb-r3k.o pg-r4k.o diff -urN linux/arch/mips/mm/cache.c linux/arch/mips/mm/cache.c --- linux/arch/mips/mm/cache.c 2005/03/18 17:36:53 1.20 +++ linux/arch/mips/mm/cache.c 2005/07/06 12:08:14 1.21 @@ -118,8 +118,8 @@ #if defined(CONFIG_CPU_R4X00) || defined(CONFIG_CPU_VR41XX) || \ defined(CONFIG_CPU_R4300) || defined(CONFIG_CPU_R5000) || \ defined(CONFIG_CPU_NEVADA) || defined(CONFIG_CPU_R5432) || \ - defined(CONFIG_CPU_R5500) || defined(CONFIG_CPU_MIPS32) || \ - defined(CONFIG_CPU_MIPS64) || defined(CONFIG_CPU_TX49XX) || \ + defined(CONFIG_CPU_R5500) || defined(CONFIG_CPU_MIPS32_R1) || \ + defined(CONFIG_CPU_MIPS64_R1) || defined(CONFIG_CPU_TX49XX) || \ defined(CONFIG_CPU_RM7000) || defined(CONFIG_CPU_RM9000) ld_mmu_r4xx0(); #endif diff -urN linux/arch/mips/mm/tlb-r4k.c linux/arch/mips/mm/tlb-r4k.c --- linux/arch/mips/mm/tlb-r4k.c 2005/04/02 10:21:56 1.43 +++ linux/arch/mips/mm/tlb-r4k.c 2005/07/06 12:08:14 1.44 @@ -263,7 +263,7 @@ idx = read_c0_index(); ptep = pte_offset_map(pmdp, address); -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) write_c0_entrylo0(ptep->pte_high); ptep++; write_c0_entrylo1(ptep->pte_high); diff -urN linux/arch/mips/mm/tlb-sb1.c linux/arch/mips/mm/tlb-sb1.c --- linux/arch/mips/mm/tlb-sb1.c 2005/04/14 11:31:25 1.50 +++ linux/arch/mips/mm/tlb-sb1.c 2005/07/06 12:08:14 1.51 @@ -321,7 +321,7 @@ idx = read_c0_index(); ptep = pte_offset_map(pmdp, address); -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) write_c0_entrylo0(ptep->pte_high); ptep++; write_c0_entrylo1(ptep->pte_high); diff -urN linux/arch/mips/oprofile/Makefile linux/arch/mips/oprofile/Makefile --- linux/arch/mips/oprofile/Makefile 2005/01/17 17:54:23 1.2 +++ linux/arch/mips/oprofile/Makefile 2005/07/06 12:08:14 1.3 @@ -10,6 +10,6 @@ oprofile-y := $(DRIVER_OBJS) common.o -oprofile-$(CONFIG_CPU_MIPS32) += op_model_mipsxx.o -oprofile-$(CONFIG_CPU_MIPS64) += op_model_mipsxx.o +oprofile-$(CONFIG_CPU_MIPS32_R1) += op_model_mipsxx.o +oprofile-$(CONFIG_CPU_MIPS64_R1) += op_model_mipsxx.o oprofile-$(CONFIG_CPU_RM9000) += op_model_rm9000.o diff -urN linux/drivers/video/epson1356fb.c linux/drivers/video/epson1356fb.c --- linux/drivers/video/epson1356fb.c 2005/02/28 13:35:57 1.5 +++ linux/drivers/video/epson1356fb.c 2005/07/06 12:08:14 1.6 @@ -2037,7 +2037,7 @@ { struct fb_info_e1356 *info = (struct fb_info_e1356*)fb; unsigned int len; -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) u64 start=0, off; #else unsigned long start=0, off; @@ -2122,7 +2122,7 @@ if (info->fix.mmunalign) vma->vm_start += 2; -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) if (e1356_remap_page_range(vma->vm_start, off, vma->vm_end - vma->vm_start, vma->vm_page_prot)) @@ -3020,7 +3020,7 @@ fb_info.membase_virt + fb_info.fb_size); } -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) /* * Return indicates whether a page was freed so caller can adjust rss diff -urN linux/include/asm-mips/addrspace.h linux/include/asm-mips/addrspace.h --- linux/include/asm-mips/addrspace.h 2005/06/30 16:10:04 1.16 +++ linux/include/asm-mips/addrspace.h 2005/07/06 12:08:14 1.17 @@ -131,7 +131,7 @@ || defined (CONFIG_CPU_R5000) \ || defined (CONFIG_CPU_NEVADA) \ || defined (CONFIG_CPU_TX49XX) \ - || defined (CONFIG_CPU_MIPS64) + || defined (CONFIG_CPU_MIPS64_R1) #define KUSIZE _LLCONST_(0x0000010000000000) /* 2^^40 */ #define KUSIZE_64 _LLCONST_(0x0000010000000000) /* 2^^40 */ #define K0SIZE _LLCONST_(0x0000001000000000) /* 2^^36 */ diff -urN linux/include/asm-mips/page.h linux/include/asm-mips/page.h --- linux/include/asm-mips/page.h 2005/02/10 12:19:59 1.46 +++ linux/include/asm-mips/page.h 2005/07/06 12:08:14 1.47 @@ -76,7 +76,7 @@ * These are used to make use of C type-checking.. */ #ifdef CONFIG_64BIT_PHYS_ADDR - #ifdef CONFIG_CPU_MIPS32 + #ifdef CONFIG_CPU_MIPS32_R1 typedef struct { unsigned long pte_low, pte_high; } pte_t; #define pte_val(x) ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) #else diff -urN linux/include/asm-mips/pgtable-32.h linux/include/asm-mips/pgtable-32.h --- linux/include/asm-mips/pgtable-32.h 2005/04/29 11:15:19 1.17 +++ linux/include/asm-mips/pgtable-32.h 2005/07/06 12:08:14 1.18 @@ -116,7 +116,7 @@ pmd_val(*pmdp) = ((unsigned long) invalid_pte_table); } -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) #define pte_page(x) pfn_to_page(pte_pfn(x)) #define pte_pfn(x) ((unsigned long)((x).pte_high >> 6)) static inline pte_t @@ -139,7 +139,7 @@ #define pte_pfn(x) ((unsigned long)((x).pte >> PAGE_SHIFT)) #define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) #endif -#endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) */ +#endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) */ #define __pgd_offset(address) pgd_index(address) #define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) @@ -202,7 +202,7 @@ */ #define PTE_FILE_MAX_BITS 27 -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) /* fixme */ #define pte_to_pgoff(_pte) (((_pte).pte_high >> 6) + ((_pte).pte_high & 0x3f)) #define pgoff_to_pte(off) \ diff -urN linux/include/asm-mips/pgtable-bits.h linux/include/asm-mips/pgtable-bits.h --- linux/include/asm-mips/pgtable-bits.h 2004/12/04 18:16:09 1.12 +++ linux/include/asm-mips/pgtable-bits.h 2005/07/06 12:08:14 1.13 @@ -33,7 +33,7 @@ * unpredictable things. The code (when it is written) to deal with * this problem will be in the update_mmu_cache() code for the r4k. */ -#if defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR) +#if defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR) #define _PAGE_PRESENT (1<<6) /* implemented in software */ #define _PAGE_READ (1<<7) /* implemented in software */ @@ -123,7 +123,7 @@ #endif #endif -#endif /* defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR) */ +#endif /* defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR) */ #define __READABLE (_PAGE_READ | _PAGE_SILENT_READ | _PAGE_ACCESSED) #define __WRITEABLE (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED) @@ -140,7 +140,7 @@ #define PAGE_CACHABLE_DEFAULT _CACHE_CACHABLE_COW #endif -#if defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR) +#if defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR) #define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT >> 3) #else #define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT >> 9) diff -urN linux/include/asm-mips/pgtable.h linux/include/asm-mips/pgtable.h --- linux/include/asm-mips/pgtable.h 2005/04/11 12:24:16 1.104 +++ linux/include/asm-mips/pgtable.h 2005/07/06 12:08:14 1.105 @@ -80,7 +80,7 @@ #define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL)) #define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) static inline void set_pte(pte_t *ptep, pte_t pte) { ptep->pte_high = pte.pte_high; @@ -168,7 +168,7 @@ * Undefined behaviour if not.. */ static inline int pte_user(pte_t pte) { BUG(); return 0; } -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_READ; } static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_WRITE; } static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_MODIFIED; } @@ -327,7 +327,7 @@ */ #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) { pte.pte_low &= _PAGE_CHG_MASK; diff -urN linux/include/asm-mips/mach-mips/cpu-feature-overrides.h linux/include/asm-mips/mach-mips/cpu-feature-overrides.h --- linux/include/asm-mips/mach-mips/cpu-feature-overrides.h 2005/01/15 01:31:04 1.2 +++ linux/include/asm-mips/mach-mips/cpu-feature-overrides.h 2005/07/06 12:08:14 1.3 @@ -39,7 +39,7 @@ /* #define cpu_has_subset_pcaches ? */ #endif -#ifdef CONFIG_CPU_MIPS64 +#ifdef CONFIG_CPU_MIPS64_R1 #define cpu_has_tlb 1 #define cpu_has_4kex 1 #define cpu_has_4ktlb 1 From ths@linux-mips.org Thu Jul 7 09:19:37 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Thu, 07 Jul 2005 10:19:37 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Thu, 07 Jul 2005 10:19:37 +0100 X-archive-position: 528 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/07 10:19:31 Modified files: arch/mips : Makefile Log message: Hack to make compiles for the other endianness easier. diff -urN linux/arch/mips/Makefile linux/arch/mips/Makefile --- linux/arch/mips/Makefile 2005/07/06 12:08:11 1.196 +++ linux/arch/mips/Makefile 2005/07/07 09:19:31 1.197 @@ -92,6 +92,15 @@ LDFLAGS_vmlinux += -G 0 -static -n -nostdlib MODFLAGS += -mlong-calls +# +# We explicitly add the endianness specifier if needed, this allows +# to compile kernels with a toolchain for the other endianness. We +# carefully avoid to add it redundantly because gcc 3.3/3.4 complains +# when fed the toolchain default! +# +cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips*el-linux*' && echo -EB) +cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips*el-linux*' || echo -EL) + cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \ -fno-omit-frame-pointer From ths@linux-mips.org Thu Jul 7 11:18:56 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Thu, 07 Jul 2005 12:18:57 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Thu, 07 Jul 2005 12:18:57 +0100 X-archive-position: 529 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/07 12:18:50 Modified files: arch/mips : Makefile Log message: Grep deesn't like shell-style matching... diff -urN linux/arch/mips/Makefile linux/arch/mips/Makefile --- linux/arch/mips/Makefile 2005/07/07 09:19:31 1.197 +++ linux/arch/mips/Makefile 2005/07/07 11:18:49 1.198 @@ -98,8 +98,8 @@ # carefully avoid to add it redundantly because gcc 3.3/3.4 complains # when fed the toolchain default! # -cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips*el-linux*' && echo -EB) -cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips*el-linux*' || echo -EL) +cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-linux.*' && echo -EB) +cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-linux.*' || echo -EL) cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \ -fno-omit-frame-pointer From ths@linux-mips.org Thu Jul 7 11:42:56 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Thu, 07 Jul 2005 12:42:56 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Thu, 07 Jul 2005 12:42:56 +0100 X-archive-position: 530 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/07 12:42:49 Modified files: arch/mips : Makefile Log message: ... and it isn't a canonicalized triplet but just the n-plet used to configure gcc. diff -urN linux/arch/mips/Makefile linux/arch/mips/Makefile --- linux/arch/mips/Makefile 2005/07/07 11:18:49 1.198 +++ linux/arch/mips/Makefile 2005/07/07 11:42:49 1.199 @@ -98,8 +98,8 @@ # carefully avoid to add it redundantly because gcc 3.3/3.4 complains # when fed the toolchain default! # -cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-linux.*' && echo -EB) -cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-linux.*' || echo -EL) +cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB) +cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL) cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \ -fno-omit-frame-pointer From ths@linux-mips.org Thu Jul 7 21:44:31 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Thu, 07 Jul 2005 22:44:31 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Thu, 07 Jul 2005 22:44:31 +0100 X-archive-position: 531 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/07 22:44:25 Modified files: arch/mips/cobalt: setup.c arch/mips/momentum/jaguar_atx: setup.c arch/mips/momentum/ocelot_3: setup.c arch/mips/momentum/ocelot_g: setup.c arch/mips/sgi-ip27: ip27-init.c arch/mips/sibyte/swarm: setup.c Log message: Fix plat_setup inconsistencies. diff -urN linux/arch/mips/cobalt/setup.c linux/arch/mips/cobalt/setup.c --- linux/arch/mips/cobalt/setup.c 2005/06/21 13:56:30 1.25 +++ linux/arch/mips/cobalt/setup.c 2005/07/07 21:44:24 1.26 @@ -91,7 +91,7 @@ .io_offset = 0 - GT64111_IO_BASE }; -int __init plat_setup(void) +void __init plat_setup(void) { static struct uart_port uart; unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0); diff -urN linux/arch/mips/momentum/jaguar_atx/setup.c linux/arch/mips/momentum/jaguar_atx/setup.c --- linux/arch/mips/momentum/jaguar_atx/setup.c 2005/06/21 13:56:31 1.15 +++ linux/arch/mips/momentum/jaguar_atx/setup.c 2005/07/07 21:44:24 1.16 @@ -351,7 +351,7 @@ arch_initcall(ja_pci_init); -int __init plat_setup(void) +void __init plat_setup(void) { unsigned int tmpword; diff -urN linux/arch/mips/momentum/ocelot_3/setup.c linux/arch/mips/momentum/ocelot_3/setup.c --- linux/arch/mips/momentum/ocelot_3/setup.c 2005/06/21 13:56:31 1.4 +++ linux/arch/mips/momentum/ocelot_3/setup.c 2005/07/07 21:44:24 1.5 @@ -307,7 +307,7 @@ arch_initcall(ja_pci_init); -int __init plat_setup(void) +void __init plat_setup(void) { unsigned int tmpword; diff -urN linux/arch/mips/momentum/ocelot_g/setup.c linux/arch/mips/momentum/ocelot_g/setup.c --- linux/arch/mips/momentum/ocelot_g/setup.c 2005/06/21 13:56:31 1.19 +++ linux/arch/mips/momentum/ocelot_g/setup.c 2005/07/07 21:44:24 1.20 @@ -160,7 +160,7 @@ printk("Done\n"); } -int __init plat_setup(void) +void __init plat_setup(void) { void (*l3func)(unsigned long) = (void *) KSEG1ADDR(setup_l3cache); unsigned int tmpword; diff -urN linux/arch/mips/sgi-ip27/ip27-init.c linux/arch/mips/sgi-ip27/ip27-init.c --- linux/arch/mips/sgi-ip27/ip27-init.c 2005/06/21 13:56:32 1.69 +++ linux/arch/mips/sgi-ip27/ip27-init.c 2005/07/07 21:44:24 1.70 @@ -243,6 +243,4 @@ set_io_port_base(IO_BASE); board_time_init = ip27_time_init; - - return 0; } diff -urN linux/arch/mips/sibyte/swarm/setup.c linux/arch/mips/sibyte/swarm/setup.c --- linux/arch/mips/sibyte/swarm/setup.c 2005/06/21 13:56:32 1.35 +++ linux/arch/mips/sibyte/swarm/setup.c 2005/07/07 21:44:25 1.36 @@ -84,7 +84,7 @@ return (is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL); } -int __init plat_setup(void) +void __init plat_setup(void) { sb1250_setup(); From ths@linux-mips.org Fri Jul 8 07:36:57 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Fri, 08 Jul 2005 08:36:58 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Fri, 08 Jul 2005 08:36:57 +0100 X-archive-position: 532 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/08 08:36:52 Modified files: arch/mips/arc : identify.c include/asm-mips: bootinfo.h Log message: IP30 Identification. diff -urN linux/arch/mips/arc/identify.c linux/arch/mips/arc/identify.c --- linux/arch/mips/arc/identify.c 2004/08/31 17:01:08 1.13 +++ linux/arch/mips/arc/identify.c 2005/07/08 07:36:51 1.14 @@ -44,6 +44,11 @@ MACH_GROUP_SGI, MACH_SGI_IP28, PROM_FLAG_ARCS + }, { "SGI-IP30", + "SGI Octane", + MACH_GROUP_SGI, + MACH_SGI_IP30, + PROM_FLAG_ARCS }, { "SGI-IP32", "SGI O2", MACH_GROUP_SGI, diff -urN linux/include/asm-mips/bootinfo.h linux/include/asm-mips/bootinfo.h --- linux/include/asm-mips/bootinfo.h 2005/03/01 06:33:17 1.80 +++ linux/include/asm-mips/bootinfo.h 2005/07/08 07:36:51 1.81 @@ -77,6 +77,7 @@ #define MACH_SGI_IP27 1 /* Origin 200, Origin 2000, Onyx 2 */ #define MACH_SGI_IP28 2 /* Indigo2 Impact */ #define MACH_SGI_IP32 3 /* O2 */ +#define MACH_SGI_IP30 4 /* Octane, Octane2 */ /* * Valid machtype for group COBALT From ths@linux-mips.org Fri Jul 8 08:03:54 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Fri, 08 Jul 2005 09:03:54 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Fri, 08 Jul 2005 09:03:54 +0100 X-archive-position: 533 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/08 09:03:48 Modified files: include/asm-mips: stackframe.h Log message: Fix get_saved_sp for 64bit address space. Simplify set_save_sp. diff -urN linux/include/asm-mips/stackframe.h linux/include/asm-mips/stackframe.h --- linux/include/asm-mips/stackframe.h 2005/04/01 14:07:13 1.37 +++ linux/include/asm-mips/stackframe.h 2005/07/08 08:03:48 1.38 @@ -90,24 +90,28 @@ #ifdef CONFIG_MIPS32 mfc0 \temp, CP0_CONTEXT srl \temp, 23 - LONG_S \stackp, kernelsp(\temp) #endif #if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64) lw \temp, TI_CPU(gp) dsll \temp, 3 - lui \temp2, %hi(kernelsp) - daddu \temp, \temp2 - LONG_S \stackp, %lo(kernelsp)(\temp) #endif #if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64) MFC0 \temp, CP0_CONTEXT dsrl \temp, 23 - LONG_S \stackp, kernelsp(\temp) #endif + LONG_S \stackp, kernelsp(\temp) .endm #else .macro get_saved_sp /* Uniprocessor variation */ +#if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64) + lui k1, %highest(kernelsp) + daddiu k1, %higher(kernelsp) + dsll k1, k1, 16 + daddiu k1, %hi(kernelsp) + dsll k1, k1, 16 +#else lui k1, %hi(kernelsp) +#endif LONG_L k1, %lo(kernelsp)(k1) .endm From ths@linux-mips.org Fri Jul 8 09:17:11 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Fri, 08 Jul 2005 10:17:11 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Fri, 08 Jul 2005 10:17:11 +0100 X-archive-position: 534 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/08 10:17:05 Modified files: include/asm-mips: checksum.h Log message: Protect noat assembly with .set push/pop and make it somewhat readable. diff -urN linux/include/asm-mips/checksum.h linux/include/asm-mips/checksum.h --- linux/include/asm-mips/checksum.h 2005/01/25 04:28:54 1.28 +++ linux/include/asm-mips/checksum.h 2005/07/08 09:17:05 1.29 @@ -70,14 +70,15 @@ static inline unsigned short int csum_fold(unsigned int sum) { __asm__( - ".set\tnoat\t\t\t# csum_fold\n\t" - "sll\t$1,%0,16\n\t" - "addu\t%0,$1\n\t" - "sltu\t$1,%0,$1\n\t" - "srl\t%0,%0,16\n\t" - "addu\t%0,$1\n\t" - "xori\t%0,0xffff\n\t" - ".set\tat" + " .set push # csum_fold\n" + " .set noat \n" + " sll $1, %0, 16 \n" + " addu %0, $1 \n" + " sltu $1, %0, $1 \n" + " srl %0, %0, 16 \n" + " addu %0, $1 \n" + " xori %0, 0xffff \n" + " .set pop" : "=r" (sum) : "0" (sum)); @@ -127,29 +128,30 @@ unsigned int sum) { __asm__( - ".set\tnoat\t\t\t# csum_tcpudp_nofold\n\t" + " .set push # csum_tcpudp_nofold\n" + " .set noat \n" #ifdef CONFIG_MIPS32 - "addu\t%0, %2\n\t" - "sltu\t$1, %0, %2\n\t" - "addu\t%0, $1\n\t" - - "addu\t%0, %3\n\t" - "sltu\t$1, %0, %3\n\t" - "addu\t%0, $1\n\t" - - "addu\t%0, %4\n\t" - "sltu\t$1, %0, %4\n\t" - "addu\t%0, $1\n\t" + " addu %0, %2 \n" + " sltu $1, %0, %2 \n" + " addu %0, $1 \n" + + " addu %0, %3 \n" + " sltu $1, %0, %3 \n" + " addu %0, $1 \n" + + " addu %0, %4 \n" + " sltu $1, %0, %4 \n" + " addu %0, $1 \n" #endif #ifdef CONFIG_MIPS64 - "daddu\t%0, %2\n\t" - "daddu\t%0, %3\n\t" - "daddu\t%0, %4\n\t" - "dsll32\t$1, %0, 0\n\t" - "daddu\t%0, $1\n\t" - "dsrl32\t%0, %0, 0\n\t" + " daddu %0, %2 \n" + " daddu %0, %3 \n" + " daddu %0, %4 \n" + " dsll32 $1, %0, 0 \n" + " daddu %0, $1 \n" + " dsrl32 %0, %0, 0 \n" #endif - ".set\tat" + " .set pop" : "=r" (sum) : "0" (daddr), "r"(saddr), #ifdef __MIPSEL__ @@ -192,57 +194,57 @@ unsigned int sum) { __asm__( - ".set\tpush\t\t\t# csum_ipv6_magic\n\t" - ".set\tnoreorder\n\t" - ".set\tnoat\n\t" - "addu\t%0, %5\t\t\t# proto (long in network byte order)\n\t" - "sltu\t$1, %0, %5\n\t" - "addu\t%0, $1\n\t" - - "addu\t%0, %6\t\t\t# csum\n\t" - "sltu\t$1, %0, %6\n\t" - "lw\t%1, 0(%2)\t\t\t# four words source address\n\t" - "addu\t%0, $1\n\t" - "addu\t%0, %1\n\t" - "sltu\t$1, %0, %1\n\t" - - "lw\t%1, 4(%2)\n\t" - "addu\t%0, $1\n\t" - "addu\t%0, %1\n\t" - "sltu\t$1, %0, %1\n\t" - - "lw\t%1, 8(%2)\n\t" - "addu\t%0, $1\n\t" - "addu\t%0, %1\n\t" - "sltu\t$1, %0, %1\n\t" - - "lw\t%1, 12(%2)\n\t" - "addu\t%0, $1\n\t" - "addu\t%0, %1\n\t" - "sltu\t$1, %0, %1\n\t" - - "lw\t%1, 0(%3)\n\t" - "addu\t%0, $1\n\t" - "addu\t%0, %1\n\t" - "sltu\t$1, %0, %1\n\t" - - "lw\t%1, 4(%3)\n\t" - "addu\t%0, $1\n\t" - "addu\t%0, %1\n\t" - "sltu\t$1, %0, %1\n\t" - - "lw\t%1, 8(%3)\n\t" - "addu\t%0, $1\n\t" - "addu\t%0, %1\n\t" - "sltu\t$1, %0, %1\n\t" - - "lw\t%1, 12(%3)\n\t" - "addu\t%0, $1\n\t" - "addu\t%0, %1\n\t" - "sltu\t$1, %0, %1\n\t" + " .set push # csum_ipv6_magic\n" + " .set noreorder \n" + " .set noat \n" + " addu %0, %5 # proto (long in network byte order)\n" + " sltu $1, %0, %5 \n" + " addu %0, $1 \n" + + " addu %0, %6 # csum\n" + " sltu $1, %0, %6 \n" + " lw %1, 0(%2) # four words source address\n" + " addu %0, $1 \n" + " addu %0, %1 \n" + " sltu $1, %0, %1 \n" + + " lw %1, 4(%2) \n" + " addu %0, $1 \n" + " addu %0, %1 \n" + " sltu $1, %0, %1 \n" + + " lw %1, 8(%2) \n" + " addu %0, $1 \n" + " addu %0, %1 \n" + " sltu $1, %0, %1 \n" + + " lw %1, 12(%2) \n" + " addu %0, $1 \n" + " addu %0, %1 \n" + " sltu $1, %0, %1 \n" + + " lw %1, 0(%3) \n" + " addu %0, $1 \n" + " addu %0, %1 \n" + " sltu $1, %0, %1 \n" + + " lw %1, 4(%3) \n" + " addu %0, $1 \n" + " addu %0, %1 \n" + " sltu $1, %0, %1 \n" + + " lw %1, 8(%3) \n" + " addu %0, $1 \n" + " addu %0, %1 \n" + " sltu $1, %0, %1 \n" + + " lw %1, 12(%3) \n" + " addu %0, $1 \n" + " addu %0, %1 \n" + " sltu $1, %0, %1 \n" - "addu\t%0, $1\t\t\t# Add final carry\n\t" - ".set\tpop" + " addu %0, $1 # Add final carry\n" + " .set pop" : "=r" (sum), "=r" (proto) : "r" (saddr), "r" (daddr), "0" (htonl(len)), "1" (htonl(proto)), "r" (sum)); From ths@linux-mips.org Fri Jul 8 20:10:23 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Fri, 08 Jul 2005 21:10:23 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Fri, 08 Jul 2005 21:10:23 +0100 X-archive-position: 535 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/08 21:10:17 Modified files: arch/mips/mm : tlbex.c Log message: Those literals are long. diff -urN linux/arch/mips/mm/tlbex.c linux/arch/mips/mm/tlbex.c --- linux/arch/mips/mm/tlbex.c 2005/06/30 10:51:01 1.26 +++ linux/arch/mips/mm/tlbex.c 2005/07/08 20:10:17 1.27 @@ -487,7 +487,7 @@ static __init int __attribute__((unused)) in_compat_space_p(long addr) { /* Is this address in 32bit compat space? */ - return (((addr) & 0xffffffff00000000) == 0xffffffff00000000); + return (((addr) & 0xffffffff00000000L) == 0xffffffff00000000L); } static __init int __attribute__((unused)) rel_highest(long val) From ths@linux-mips.org Sun Jul 10 10:29:09 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Sun, 10 Jul 2005 11:29:09 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Sun, 10 Jul 2005 11:29:09 +0100 X-archive-position: 536 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/10 11:29:03 Modified files: arch/mips/au1000/mtx-1: init.c arch/mips/mm : dma-ip32.c arch/mips/oprofile: Kconfig arch/mips/pci : fixup-vr4133.c ops-msc.c ops-tx4927.c arch/mips/sgi-ip32: crime.c arch/mips/vr41xx/nec-cmbvr4133: init.c irq.c drivers/i2c/busses: i2c-au1550.c drivers/media/video: vino.c drivers/pcmcia : Kconfig au1000_db1x00.c au1000_generic.c au1000_generic.h au1000_xxs1500.c vrc4173_cardu.c vrc4173_cardu.h drivers/tc : zs.h drivers/usb/host: ohci-au1xxx.c drivers/video : bt431.h gbefb.c maxinefb.c pmag-aa-fb.c pmag-ba-fb.c include/asm-mips: ucontext.h include/asm-mips/mips-boards: msc01_pci.h sound/mips : au1x00.c sound/oss : au1000.c au1550_ac97.c nec_vrc5477.c Log message: Paint whitespaces in mainline colour. diff -urN linux/arch/mips/au1000/mtx-1/init.c linux/arch/mips/au1000/mtx-1/init.c --- linux/arch/mips/au1000/mtx-1/init.c 2005/04/14 12:34:15 1.8 +++ linux/arch/mips/au1000/mtx-1/init.c 2005/07/10 10:29:00 1.9 @@ -58,7 +58,7 @@ mips_machgroup = MACH_GROUP_ALCHEMY; mips_machtype = MACH_MTX1; /* set the platform # */ - + prom_init_cmdline(); memsize_str = prom_getenv("memsize"); diff -urN linux/arch/mips/mm/dma-ip32.c linux/arch/mips/mm/dma-ip32.c --- linux/arch/mips/mm/dma-ip32.c 2005/04/08 18:57:59 1.4 +++ linux/arch/mips/mm/dma-ip32.c 2005/07/10 10:29:00 1.5 @@ -175,7 +175,7 @@ for (i = 0; i < nents; i++, sg++) { unsigned long addr; - + addr = (unsigned long) page_address(sg->page)+sg->offset; if (addr) __dma_sync(addr, sg->length, direction); @@ -251,9 +251,9 @@ size_t size, enum dma_data_direction direction) { unsigned long addr; - + BUG_ON(direction == DMA_NONE); - + dma_handle&=RAM_OFFSET_MASK; addr = dma_handle + PAGE_OFFSET; if(dma_handle>=256*1024*1024) @@ -315,9 +315,9 @@ enum dma_data_direction direction) { int i; - + BUG_ON(direction == DMA_NONE); - + /* Make sure that gcc doesn't leave the empty loop body. */ for (i = 0; i < nelems; i++, sg++) __dma_sync((unsigned long)page_address(sg->page), diff -urN linux/arch/mips/oprofile/Kconfig linux/arch/mips/oprofile/Kconfig --- linux/arch/mips/oprofile/Kconfig 2004/12/12 02:22:46 1.1 +++ linux/arch/mips/oprofile/Kconfig 2005/07/10 10:29:00 1.2 @@ -7,7 +7,7 @@ help Say Y here to enable the extended profiling support mechanisms used by profilers such as OProfile. - + config OPROFILE tristate "OProfile system profiling (EXPERIMENTAL)" diff -urN linux/arch/mips/pci/fixup-vr4133.c linux/arch/mips/pci/fixup-vr4133.c --- linux/arch/mips/pci/fixup-vr4133.c 2004/12/15 14:08:18 1.1 +++ linux/arch/mips/pci/fixup-vr4133.c 2005/07/10 10:29:00 1.2 @@ -11,9 +11,9 @@ * is licensed "as is" without any warranty of any kind, whether express * or implied. * - * Modified for support in 2.6 + * Modified for support in 2.6 * Author: Manish Lachwani (mlachwani@mvista.com) - * + * */ #include #include @@ -29,21 +29,21 @@ /* Do platform specific device initialization at pci_enable_device() time */ int pcibios_plat_dev_init(struct pci_dev *dev) { - /* + /* * We have to reset AMD PCnet adapter on Rockhopper since * PMON leaves it enabled and generating interrupts. This leads * to a lock if some PCI device driver later enables the IRQ line * shared with PCnet and there is no AMD PCnet driver to catch its - * interrupts. + * interrupts. */ #ifdef CONFIG_ROCKHOPPER - if (dev->vendor == PCI_VENDOR_ID_AMD && + if (dev->vendor == PCI_VENDOR_ID_AMD && dev->device == PCI_DEVICE_ID_AMD_LANCE) { inl(pci_resource_start(dev, 0) + 0x18); } #endif - /* + /* * we have to open the bridges' windows down to 0 because otherwise * we cannot access ISA south bridge I/O registers that get mapped from * 0. for example, 8259 PIC would be unaccessible without that @@ -60,8 +60,8 @@ return 0; } -/* - * M1535 IRQ mapping +/* + * M1535 IRQ mapping * Feel free to change this, although it shouldn't be needed */ #define M1535_IRQ_INTA 7 @@ -124,7 +124,7 @@ {1, ROCKHOPPER_PCI2_SLOT, M1535_IRQ_INTC}, /* PCI slot #2 */ {1, ROCKHOPPER_M5237_SLOT, M1535_IRQ_USB}, /* USB host controller */ {1, ROCKHOPPER_M5229_SLOT, IDE_PRIMARY_IRQ}, /* IDE controller */ - {2, ROCKHOPPER_PCNET_SLOT, M1535_IRQ_INTD}, /* AMD Am79c973 on-board + {2, ROCKHOPPER_PCNET_SLOT, M1535_IRQ_INTD}, /* AMD Am79c973 on-board ethernet */ {2, ROCKHOPPER_PCI3_SLOT, M1535_IRQ_INTB}, /* PCI slot #3 */ {2, ROCKHOPPER_PCI4_SLOT, M1535_IRQ_INTC} /* PCI slot #4 */ diff -urN linux/arch/mips/pci/ops-msc.c linux/arch/mips/pci/ops-msc.c --- linux/arch/mips/pci/ops-msc.c 2005/04/14 11:31:25 1.7 +++ linux/arch/mips/pci/ops-msc.c 2005/07/10 10:29:00 1.8 @@ -1,8 +1,8 @@ /* * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc. - * All rights reserved. - * Authors: Carsten Langgaard - * Maciej W. Rozycki + * All rights reserved. + * Authors: Carsten Langgaard + * Maciej W. Rozycki * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) * * This program is free software; you can distribute it and/or modify it diff -urN linux/arch/mips/pci/ops-tx4927.c linux/arch/mips/pci/ops-tx4927.c --- linux/arch/mips/pci/ops-tx4927.c 2005/01/22 22:14:10 1.7 +++ linux/arch/mips/pci/ops-tx4927.c 2005/07/10 10:29:00 1.8 @@ -120,7 +120,7 @@ switch (size) { case 1: *val = *(volatile u8 *) ((ulong) & tx4927_pcicptr-> - g2pcfgdata | + g2pcfgdata | #ifdef __LITTLE_ENDIAN (where & 3)); #else @@ -129,7 +129,7 @@ break; case 2: *val = *(volatile u16 *) ((ulong) & tx4927_pcicptr-> - g2pcfgdata | + g2pcfgdata | #ifdef __LITTLE_ENDIAN (where & 3)); #else @@ -169,7 +169,7 @@ switch (size) { case 1: *(volatile u8 *) ((ulong) & tx4927_pcicptr-> - g2pcfgdata | + g2pcfgdata | #ifdef __LITTLE_ENDIAN (where & 3)) = val; #else @@ -179,7 +179,7 @@ case 2: *(volatile u16 *) ((ulong) & tx4927_pcicptr-> - g2pcfgdata | + g2pcfgdata | #ifdef __LITTLE_ENDIAN (where & 3)) = val; #else diff -urN linux/arch/mips/sgi-ip32/crime.c linux/arch/mips/sgi-ip32/crime.c --- linux/arch/mips/sgi-ip32/crime.c 2005/01/12 00:10:42 1.7 +++ linux/arch/mips/sgi-ip32/crime.c 2005/07/10 10:29:01 1.8 @@ -26,7 +26,7 @@ unsigned int id, rev; const int field = 2 * sizeof(unsigned long); - set_io_port_base((unsigned long) ioremap(MACEPCI_LOW_IO, 0x2000000)); + set_io_port_base((unsigned long) ioremap(MACEPCI_LOW_IO, 0x2000000)); crime = ioremap(CRIME_BASE, sizeof(struct sgi_crime)); mace = ioremap(MACE_BASE, sizeof(struct sgi_mace)); diff -urN linux/arch/mips/vr41xx/nec-cmbvr4133/init.c linux/arch/mips/vr41xx/nec-cmbvr4133/init.c --- linux/arch/mips/vr41xx/nec-cmbvr4133/init.c 2004/12/15 14:08:18 1.1 +++ linux/arch/mips/vr41xx/nec-cmbvr4133/init.c 2005/07/10 10:29:01 1.2 @@ -12,7 +12,7 @@ * is licensed "as is" without any warranty of any kind, whether express * or implied. * - * Support for NEC-CMBVR4133 in 2.6 + * Support for NEC-CMBVR4133 in 2.6 * Manish Lachwani (mlachwani@mvista.com) */ #include @@ -40,7 +40,7 @@ { u32 data; - /* + /* * Workaround for the bug in PMON on VR4133. PMON leaves * AMD PCNet controller (on Rockhopper) initialized and running in * bus master mode. We have do disable it before doing any @@ -69,7 +69,7 @@ (4 & 0xfc) | 1UL, PCICONFAREG); - + data &= ~4; writel(data, PCICONFDREG); diff -urN linux/arch/mips/vr41xx/nec-cmbvr4133/irq.c linux/arch/mips/vr41xx/nec-cmbvr4133/irq.c --- linux/arch/mips/vr41xx/nec-cmbvr4133/irq.c 2004/12/15 14:08:18 1.1 +++ linux/arch/mips/vr41xx/nec-cmbvr4133/irq.c 2005/07/10 10:29:01 1.2 @@ -27,9 +27,9 @@ extern void disable_8259A_irq(unsigned int irq); extern void mask_and_ack_8259A(unsigned int irq); extern void init_8259A(int hoge); - + extern int vr4133_rockhopper; - + static unsigned int startup_i8259_irq(unsigned int irq) { enable_8259A_irq(irq - I8259_IRQ_BASE); diff -urN linux/drivers/i2c/busses/i2c-au1550.c linux/drivers/i2c/busses/i2c-au1550.c --- linux/drivers/i2c/busses/i2c-au1550.c 2005/04/14 11:31:25 1.3 +++ linux/drivers/i2c/busses/i2c-au1550.c 2005/07/10 10:29:01 1.4 @@ -21,7 +21,7 @@ * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. - * + * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. @@ -289,8 +289,8 @@ .functionality = au1550_func, }; -/* - * registering functions to load algorithms at runtime +/* + * registering functions to load algorithms at runtime * Prior to calling us, the 50MHz clock frequency and routing * must have been set up for the PSC indicated by the adapter. */ diff -urN linux/drivers/media/video/vino.c linux/drivers/media/video/vino.c --- linux/drivers/media/video/vino.c 2003/09/17 20:05:09 1.7 +++ linux/drivers/media/video/vino.c 2005/07/10 10:29:01 1.8 @@ -1,6 +1,6 @@ /* * (incomplete) Driver for the VINO (Video In No Out) system found in SGI Indys. - * + * * This file is subject to the terms and conditions of the GNU General Public * License version 2 as published by the Free Software Foundation. * @@ -139,7 +139,7 @@ static int i2c_vino_client_unreg(struct i2c_client *client) { int res = 0; - + down(&Vino->input_lock); if (client == Vino->decoder.driver) { if (Vino->decoder.owner) @@ -223,7 +223,7 @@ { unsigned long rev; int i, ret = 0; - + /* VINO is Indy specific beast */ if (ip22_is_fullhouse()) return -ENODEV; @@ -231,7 +231,7 @@ /* * VINO is in the EISA address space, so the sysid register will tell * us if the EISA_PRESENT pin on MC has been pulled low. - * + * * If EISA_PRESENT is not set we definitely don't have a VINO equiped * system. */ diff -urN linux/drivers/pcmcia/Kconfig linux/drivers/pcmcia/Kconfig --- linux/drivers/pcmcia/Kconfig 2005/03/18 17:37:43 1.16 +++ linux/drivers/pcmcia/Kconfig 2005/07/10 10:29:01 1.17 @@ -201,4 +201,3 @@ endif # PCCARD endmenu - diff -urN linux/drivers/pcmcia/au1000_db1x00.c linux/drivers/pcmcia/au1000_db1x00.c --- linux/drivers/pcmcia/au1000_db1x00.c 2005/04/14 11:31:26 1.7 +++ linux/drivers/pcmcia/au1000_db1x00.c 2005/07/10 10:29:01 1.8 @@ -8,7 +8,7 @@ * * Copyright 2004 Pete Popov, updated the driver to 2.6. * Followed the sa11xx API and largely copied many of the hardware - * independent functions. + * independent functions. * * ######################################################################## * @@ -27,7 +27,7 @@ * * ######################################################################## * - * + * */ #include @@ -72,7 +72,7 @@ au_sync_delay(2); } -static void +static void db1x00_pcmcia_socket_state(struct au1000_pcmcia_socket *skt, struct pcmcia_state *state) { u32 inserted; @@ -96,8 +96,8 @@ return; } - if (inserted) - debug("db1x00 socket %d: inserted %d, vs %d pcmcia %x\n", + if (inserted) + debug("db1x00 socket %d: inserted %d, vs %d pcmcia %x\n", skt->nr, inserted, vs, bcsr->pcmcia); if (inserted) { @@ -121,14 +121,14 @@ * we should turn off power to it */ if ((skt->nr == 0) && (bcsr->pcmcia & BCSR_PCMCIA_PC0RST)) { - bcsr->pcmcia &= ~(BCSR_PCMCIA_PC0RST | + bcsr->pcmcia &= ~(BCSR_PCMCIA_PC0RST | BCSR_PCMCIA_PC0DRVEN | BCSR_PCMCIA_PC0VPP | BCSR_PCMCIA_PC0VCC); au_sync_delay(10); } else if ((skt->nr == 1) && bcsr->pcmcia & BCSR_PCMCIA_PC1RST) { - bcsr->pcmcia &= ~(BCSR_PCMCIA_PC1RST | + bcsr->pcmcia &= ~(BCSR_PCMCIA_PC1RST | BCSR_PCMCIA_PC1DRVEN | BCSR_PCMCIA_PC1VPP | BCSR_PCMCIA_PC1VCC); @@ -138,21 +138,21 @@ state->bvd1=1; state->bvd2=1; - state->wrprot=0; + state->wrprot=0; } -static int +static int db1x00_pcmcia_configure_socket(struct au1000_pcmcia_socket *skt, struct socket_state_t *state) { u16 pwr; int sock = skt->nr; - debug("config_skt %d Vcc %dV Vpp %dV, reset %d\n", - sock, state->Vcc, state->Vpp, + debug("config_skt %d Vcc %dV Vpp %dV, reset %d\n", + sock, state->Vcc, state->Vpp, state->flags & SS_RESET); /* pcmcia reg was set to zero at init time. Be careful when - * initializing a socket not to wipe out the settings of the + * initializing a socket not to wipe out the settings of the * other socket. */ pwr = bcsr->pcmcia; @@ -177,9 +177,9 @@ case 33: default: pwr |= SET_VCC_VPP(0,0,sock); - printk("%s: bad Vcc/Vpp (%d:%d)\n", - __FUNCTION__, - state->Vcc, + printk("%s: bad Vcc/Vpp (%d:%d)\n", + __FUNCTION__, + state->Vcc, state->Vpp); break; } @@ -198,16 +198,16 @@ case 50: default: pwr |= SET_VCC_VPP(0,0,sock); - printk("%s: bad Vcc/Vpp (%d:%d)\n", - __FUNCTION__, - state->Vcc, + printk("%s: bad Vcc/Vpp (%d:%d)\n", + __FUNCTION__, + state->Vcc, state->Vpp); break; } break; default: /* what's this ? */ pwr |= SET_VCC_VPP(0,0,sock); - printk(KERN_ERR "%s: bad Vcc %d\n", + printk(KERN_ERR "%s: bad Vcc %d\n", __FUNCTION__, state->Vcc); break; } @@ -266,7 +266,7 @@ /* nothing to do for now */ } -struct pcmcia_low_level db1x00_pcmcia_ops = { +struct pcmcia_low_level db1x00_pcmcia_ops = { .owner = THIS_MODULE, .hw_init = db1x00_pcmcia_hw_init, diff -urN linux/drivers/pcmcia/au1000_generic.c linux/drivers/pcmcia/au1000_generic.c --- linux/drivers/pcmcia/au1000_generic.c 2005/04/29 11:15:09 1.20 +++ linux/drivers/pcmcia/au1000_generic.c 2005/07/10 10:29:01 1.21 @@ -7,8 +7,8 @@ * ppopov@embeddedalley.com or source@mvista.com * * Copyright 2004 Pete Popov, Embedded Alley Solutions, Inc. - * Updated the driver to 2.6. Followed the sa11xx API and largely - * copied many of the hardware independent functions. + * Updated the driver to 2.6. Followed the sa11xx API and largely + * copied many of the hardware independent functions. * * ######################################################################## * @@ -78,7 +78,7 @@ au1x_board_init, }; -static int +static int au1x00_pcmcia_skt_state(struct au1000_pcmcia_socket *skt) { struct pcmcia_state state; @@ -243,7 +243,7 @@ /* au1x00_pcmcia_get_socket() * Implements the get_socket() operation for the in-kernel PCMCIA - * service (formerly SS_GetSocket in Card Services). Not a very + * service (formerly SS_GetSocket in Card Services). Not a very * exciting routine. * * Returns: 0 @@ -342,7 +342,7 @@ map->static_start = skt->phys_mem + map->card_start; } - debug("set_mem_map %d start %08lx card_start %08x\n", + debug("set_mem_map %d start %08lx card_start %08x\n", map->map, map->static_start, map->card_start); return 0; @@ -409,11 +409,11 @@ skt->res_mem.flags = IORESOURCE_MEM; skt->res_attr.name = "attribute"; skt->res_attr.flags = IORESOURCE_MEM; - + /* * PCMCIA client drivers use the inb/outb macros to access the - * IO registers. Since mips_io_port_base is added to the - * access address of the mips implementation of inb/outb, + * IO registers. Since mips_io_port_base is added to the + * access address of the mips implementation of inb/outb, * we need to subtract it here because we want to access the * I/O or MEM address directly, without going through this * "mips_io_port_base" mechanism. @@ -459,7 +459,7 @@ do { struct au1000_pcmcia_socket *skt = PCMCIA_SOCKET(i); - + del_timer_sync(&skt->poll_timer); pcmcia_unregister_socket(&skt->socket); out_err: diff -urN linux/drivers/pcmcia/au1000_generic.h linux/drivers/pcmcia/au1000_generic.h --- linux/drivers/pcmcia/au1000_generic.h 2005/04/14 11:31:26 1.7 +++ linux/drivers/pcmcia/au1000_generic.h 2005/07/10 10:29:01 1.8 @@ -63,21 +63,21 @@ struct pcmcia_state { unsigned detect: 1, - ready: 1, - wrprot: 1, + ready: 1, + wrprot: 1, bvd1: 1, bvd2: 1, - vs_3v: 1, - vs_Xv: 1; + vs_3v: 1, + vs_Xv: 1; }; struct pcmcia_configure { unsigned sock: 8, - vcc: 8, - vpp: 8, - output: 1, - speaker: 1, - reset: 1; + vcc: 8, + vpp: 8, + output: 1, + speaker: 1, + reset: 1; }; struct pcmcia_irqs { @@ -90,7 +90,7 @@ struct au1000_pcmcia_socket { struct pcmcia_socket socket; - /* + /* * Info from low level handler */ struct device *dev; diff -urN linux/drivers/pcmcia/au1000_xxs1500.c linux/drivers/pcmcia/au1000_xxs1500.c --- linux/drivers/pcmcia/au1000_xxs1500.c 2005/04/14 11:31:26 1.3 +++ linux/drivers/pcmcia/au1000_xxs1500.c 2005/07/10 10:29:01 1.4 @@ -73,14 +73,14 @@ au_sync_delay(100); /* assert reset */ - au_writel(au_readl(GPIO2_PINSTATE) | (1<<4)|(1<<20), + au_writel(au_readl(GPIO2_PINSTATE) | (1<<4)|(1<<20), GPIO2_OUTPUT); au_sync_delay(100); return 0; } -static int +static int xxs1500_pcmcia_socket_state(unsigned sock, struct pcmcia_state *state) { u32 inserted; u32 vs; @@ -122,7 +122,7 @@ state->bvd1= gpio2 & (1<<10); state->bvd2 = gpio2 & (1<<11); - state->wrprot=0; + state->wrprot=0; return 1; } @@ -136,13 +136,13 @@ } -static int +static int xxs1500_pcmcia_configure_socket(const struct pcmcia_configure *configure) { if(configure->sock > PCMCIA_MAX_SOCK) return -1; - DEBUG("Vcc %dV Vpp %dV, reset %d\n", + DEBUG("Vcc %dV Vpp %dV, reset %d\n", configure->vcc, configure->vpp, configure->reset); switch(configure->vcc){ @@ -166,22 +166,22 @@ if (!configure->reset) { DEBUG("deassert reset\n"); - au_writel((au_readl(GPIO2_PINSTATE) & ~(1<<4))|(1<<20), + au_writel((au_readl(GPIO2_PINSTATE) & ~(1<<4))|(1<<20), GPIO2_OUTPUT); au_sync_delay(100); - au_writel((au_readl(GPIO2_PINSTATE) & ~(1<<5))|(1<<21), + au_writel((au_readl(GPIO2_PINSTATE) & ~(1<<5))|(1<<21), GPIO2_OUTPUT); } else { DEBUG("assert reset\n"); - au_writel(au_readl(GPIO2_PINSTATE) | (1<<4)|(1<<20), + au_writel(au_readl(GPIO2_PINSTATE) | (1<<4)|(1<<20), GPIO2_OUTPUT); } au_sync_delay(100); return 0; } -struct pcmcia_low_level xxs1500_pcmcia_ops = { +struct pcmcia_low_level xxs1500_pcmcia_ops = { xxs1500_pcmcia_init, xxs1500_pcmcia_shutdown, xxs1500_pcmcia_socket_state, diff -urN linux/drivers/pcmcia/vrc4173_cardu.c linux/drivers/pcmcia/vrc4173_cardu.c --- linux/drivers/pcmcia/vrc4173_cardu.c 2005/04/08 18:58:22 1.5 +++ linux/drivers/pcmcia/vrc4173_cardu.c 2005/07/10 10:29:01 1.6 @@ -295,7 +295,7 @@ map = io->map; if (map > 1) - return -EINVAL; + return -EINVAL; io->start = exca_readw(socket, IO_WIN_SA(map)); io->stop = exca_readw(socket, IO_WIN_EA(map)); @@ -461,7 +461,7 @@ status = exca_readb(socket, IF_STATUS); csc = exca_readb(socket, CARD_SC); - if ((csc & CARD_DT_CHG) && + if ((csc & CARD_DT_CHG) && ((status & (CARD_DETECT1|CARD_DETECT2)) == (CARD_DETECT1|CARD_DETECT2))) events |= SS_DETECT; diff -urN linux/drivers/pcmcia/vrc4173_cardu.h linux/drivers/pcmcia/vrc4173_cardu.h --- linux/drivers/pcmcia/vrc4173_cardu.h 2003/09/09 11:40:32 1.3 +++ linux/drivers/pcmcia/vrc4173_cardu.h 2005/07/10 10:29:01 1.4 @@ -136,8 +136,8 @@ #define IO_WIN_CNT 0x007 #define IO_WIN_CNT_MASK(x) (0x03 << ((x) << 2)) - #define IO_WIN_DATA_AUTOSZ(x) (0x02 << ((x) << 2)) - #define IO_WIN_DATA_16BIT(x) (0x01 << ((x) << 2)) + #define IO_WIN_DATA_AUTOSZ(x) (0x02 << ((x) << 2)) + #define IO_WIN_DATA_16BIT(x) (0x01 << ((x) << 2)) #define IO_WIN_SA(x) (0x008 + ((x) << 2)) #define IO_WIN_EA(x) (0x00a + ((x) << 2)) diff -urN linux/drivers/tc/zs.h linux/drivers/tc/zs.h --- linux/drivers/tc/zs.h 2005/06/13 19:58:52 1.10 +++ linux/drivers/tc/zs.h 2005/07/10 10:29:02 1.11 @@ -44,24 +44,24 @@ */ #define ZILOG_HUP_NOTIFY 0x0001 /* Notify getty on hangups and closes on the callout port */ -#define ZILOG_FOURPORT 0x0002 /* Set OU1, OUT2 per AST Fourport settings */ +#define ZILOG_FOURPORT 0x0002 /* Set OU1, OUT2 per AST Fourport settings */ #define ZILOG_SAK 0x0004 /* Secure Attention Key (Orange book) */ #define ZILOG_SPLIT_TERMIOS 0x0008 /* Separate termios for dialin/callout */ #define ZILOG_SPD_MASK 0x0030 #define ZILOG_SPD_HI 0x0010 /* Use 56000 instead of 38400 bps */ -#define ZILOG_SPD_VHI 0x0020 /* Use 115200 instead of 38400 bps */ -#define ZILOG_SPD_CUST 0x0030 /* Use user-specified divisor */ +#define ZILOG_SPD_VHI 0x0020 /* Use 115200 instead of 38400 bps */ +#define ZILOG_SPD_CUST 0x0030 /* Use user-specified divisor */ #define ZILOG_SKIP_TEST 0x0040 /* Skip UART test during autoconfiguration */ -#define ZILOG_AUTO_IRQ 0x0080 /* Do automatic IRQ during autoconfiguration */ +#define ZILOG_AUTO_IRQ 0x0080 /* Do automatic IRQ during autoconfiguration */ #define ZILOG_SESSION_LOCKOUT 0x0100 /* Lock out cua opens based on session */ #define ZILOG_PGRP_LOCKOUT 0x0200 /* Lock out cua opens based on pgrp */ #define ZILOG_CALLOUT_NOHUP 0x0400 /* Don't do hangups for cua device */ #define ZILOG_FLAGS 0x0FFF /* Possible legal ZILOG flags */ -#define ZILOG_USR_MASK 0x0430 /* Legal flags that non-privileged +#define ZILOG_USR_MASK 0x0430 /* Legal flags that non-privileged * users can set or reset */ /* Internal flags used only by kernel/chr_drv/serial.c */ diff -urN linux/drivers/usb/host/ohci-au1xxx.c linux/drivers/usb/host/ohci-au1xxx.c --- linux/drivers/usb/host/ohci-au1xxx.c 2005/04/03 20:39:19 1.5 +++ linux/drivers/usb/host/ohci-au1xxx.c 2005/07/10 10:29:02 1.6 @@ -51,7 +51,7 @@ /* wait for reset complete (read register twice; see au1500 errata) */ while (au_readl(USB_HOST_CONFIG), - !(au_readl(USB_HOST_CONFIG) & USBH_ENABLE_RD)) + !(au_readl(USB_HOST_CONFIG) & USBH_ENABLE_RD)) udelay(1000); printk(KERN_DEBUG __FILE__ @@ -161,7 +161,7 @@ int ret; ohci_dbg (ohci, "ohci_au1xxx_start, ohci:%p", ohci); - + if ((ret = ohci_init (ohci)) < 0) return ret; diff -urN linux/drivers/video/bt431.h linux/drivers/video/bt431.h --- linux/drivers/video/bt431.h 2003/09/23 12:11:09 1.2 +++ linux/drivers/video/bt431.h 2005/07/10 10:29:02 1.3 @@ -176,7 +176,7 @@ { /* * Magic from the MACH sources. - * + * * Cx = x + D + H - P * P = 37 if 1:1, 52 if 4:1, 57 if 5:1 * D = pixel skew between outdata and external data diff -urN linux/drivers/video/gbefb.c linux/drivers/video/gbefb.c --- linux/drivers/video/gbefb.c 2005/03/04 19:40:45 1.14 +++ linux/drivers/video/gbefb.c 2005/07/10 10:29:02 1.15 @@ -1065,7 +1065,7 @@ device_remove_file(dev, &dev_attr_revision); } -static void gbefb_create_sysfs(struct device *dev) +static void gbefb_create_sysfs(struct device *dev) { device_create_file(dev, &dev_attr_size); device_create_file(dev, &dev_attr_revision); diff -urN linux/drivers/video/maxinefb.c linux/drivers/video/maxinefb.c --- linux/drivers/video/maxinefb.c 2004/10/12 01:45:47 1.18 +++ linux/drivers/video/maxinefb.c 2005/07/10 10:29:02 1.19 @@ -109,7 +109,7 @@ .owner = THIS_MODULE, .fb_get_fix = gen_get_fix, .fb_get_var = gen_get_var, - .fb_setcolreg = maxinefb_setcolreg, + .fb_setcolreg = maxinefb_setcolreg, .fb_fillrect = cfb_fillrect, .fb_copyarea = cfb_copyarea, .fb_imageblit = cfb_imageblit, diff -urN linux/drivers/video/pmag-aa-fb.c linux/drivers/video/pmag-aa-fb.c --- linux/drivers/video/pmag-aa-fb.c 2005/07/01 16:10:59 1.4 +++ linux/drivers/video/pmag-aa-fb.c 2005/07/10 10:29:02 1.5 @@ -478,7 +478,7 @@ return 0; } -/* +/* * Initialise the framebuffer. */ int __init pmagaafb_init(void) diff -urN linux/drivers/video/pmag-ba-fb.c linux/drivers/video/pmag-ba-fb.c --- linux/drivers/video/pmag-ba-fb.c 2005/07/01 16:10:59 1.20 +++ linux/drivers/video/pmag-ba-fb.c 2005/07/10 10:29:02 1.21 @@ -66,7 +66,7 @@ .accel = FB_ACCEL_NONE, .vmode = FB_VMODE_NONINTERLACED, }; - + static struct fb_fix_screeninfo pmagbafb_fix = { .id = "PMAG-BA", .smem_len = (1024 * 864), diff -urN linux/include/asm-mips/ucontext.h linux/include/asm-mips/ucontext.h --- linux/include/asm-mips/ucontext.h 2005/05/31 11:49:19 1.6 +++ linux/include/asm-mips/ucontext.h 2005/07/10 10:29:02 1.7 @@ -11,11 +11,11 @@ #define _ASM_UCONTEXT_H struct ucontext { - unsigned long uc_flags; - struct ucontext *uc_link; - stack_t uc_stack; - struct sigcontext uc_mcontext; - sigset_t uc_sigmask; /* mask last for extensibility */ + unsigned long uc_flags; + struct ucontext *uc_link; + stack_t uc_stack; + struct sigcontext uc_mcontext; + sigset_t uc_sigmask; /* mask last for extensibility */ }; #endif /* _ASM_UCONTEXT_H */ diff -urN linux/include/asm-mips/mips-boards/msc01_pci.h linux/include/asm-mips/mips-boards/msc01_pci.h --- linux/include/asm-mips/mips-boards/msc01_pci.h 2005/02/01 20:19:03 1.5 +++ linux/include/asm-mips/mips-boards/msc01_pci.h 2005/07/10 10:29:02 1.6 @@ -30,22 +30,22 @@ #define MSC01_PCI_CFGADDR_OFS 0x0610 #define MSC01_PCI_CFGDATA_OFS 0x0618 #define MSC01_PCI_IACK_OFS 0x0620 -#define MSC01_PCI_HEAD0_OFS 0x2000 /* DevID, VendorID */ -#define MSC01_PCI_HEAD1_OFS 0x2008 /* Status, Command */ -#define MSC01_PCI_HEAD2_OFS 0x2010 /* Class code, RevID */ -#define MSC01_PCI_HEAD3_OFS 0x2018 /* bist, header, latency */ -#define MSC01_PCI_HEAD4_OFS 0x2020 /* BAR 0 */ -#define MSC01_PCI_HEAD5_OFS 0x2028 /* BAR 1 */ -#define MSC01_PCI_HEAD6_OFS 0x2030 /* BAR 2 */ -#define MSC01_PCI_HEAD7_OFS 0x2038 /* BAR 3 */ -#define MSC01_PCI_HEAD8_OFS 0x2040 /* BAR 4 */ -#define MSC01_PCI_HEAD9_OFS 0x2048 /* BAR 5 */ -#define MSC01_PCI_HEAD10_OFS 0x2050 /* CardBus CIS Ptr */ -#define MSC01_PCI_HEAD11_OFS 0x2058 /* SubSystem ID, -VendorID */ -#define MSC01_PCI_HEAD12_OFS 0x2060 /* ROM BAR */ -#define MSC01_PCI_HEAD13_OFS 0x2068 /* Capabilities ptr */ -#define MSC01_PCI_HEAD14_OFS 0x2070 /* reserved */ -#define MSC01_PCI_HEAD15_OFS 0x2078 /* Maxl, ming, intpin, int */ +#define MSC01_PCI_HEAD0_OFS 0x2000 /* DevID, VendorID */ +#define MSC01_PCI_HEAD1_OFS 0x2008 /* Status, Command */ +#define MSC01_PCI_HEAD2_OFS 0x2010 /* Class code, RevID */ +#define MSC01_PCI_HEAD3_OFS 0x2018 /* bist, header, latency */ +#define MSC01_PCI_HEAD4_OFS 0x2020 /* BAR 0 */ +#define MSC01_PCI_HEAD5_OFS 0x2028 /* BAR 1 */ +#define MSC01_PCI_HEAD6_OFS 0x2030 /* BAR 2 */ +#define MSC01_PCI_HEAD7_OFS 0x2038 /* BAR 3 */ +#define MSC01_PCI_HEAD8_OFS 0x2040 /* BAR 4 */ +#define MSC01_PCI_HEAD9_OFS 0x2048 /* BAR 5 */ +#define MSC01_PCI_HEAD10_OFS 0x2050 /* CardBus CIS Ptr */ +#define MSC01_PCI_HEAD11_OFS 0x2058 /* SubSystem ID, -VendorID */ +#define MSC01_PCI_HEAD12_OFS 0x2060 /* ROM BAR */ +#define MSC01_PCI_HEAD13_OFS 0x2068 /* Capabilities ptr */ +#define MSC01_PCI_HEAD14_OFS 0x2070 /* reserved */ +#define MSC01_PCI_HEAD15_OFS 0x2078 /* Maxl, ming, intpin, int */ #define MSC01_PCI_BAR0_OFS 0x2220 #define MSC01_PCI_CFG_OFS 0x2380 #define MSC01_PCI_SWAP_OFS 0x2388 @@ -87,73 +87,73 @@ #define MSC01_PCI_P2SCMAPL_MAP_SHF 24 #define MSC01_PCI_P2SCMAPL_MAP_MSK 0xff000000 -#define MSC01_PCI_INTCFG_RST_SHF 10 -#define MSC01_PCI_INTCFG_RST_MSK 0x00000400 -#define MSC01_PCI_INTCFG_RST_BIT 0x00000400 -#define MSC01_PCI_INTCFG_MWE_SHF 9 -#define MSC01_PCI_INTCFG_MWE_MSK 0x00000200 -#define MSC01_PCI_INTCFG_MWE_BIT 0x00000200 -#define MSC01_PCI_INTCFG_DTO_SHF 8 -#define MSC01_PCI_INTCFG_DTO_MSK 0x00000100 -#define MSC01_PCI_INTCFG_DTO_BIT 0x00000100 -#define MSC01_PCI_INTCFG_MA_SHF 7 -#define MSC01_PCI_INTCFG_MA_MSK 0x00000080 -#define MSC01_PCI_INTCFG_MA_BIT 0x00000080 -#define MSC01_PCI_INTCFG_TA_SHF 6 -#define MSC01_PCI_INTCFG_TA_MSK 0x00000040 -#define MSC01_PCI_INTCFG_TA_BIT 0x00000040 -#define MSC01_PCI_INTCFG_RTY_SHF 5 -#define MSC01_PCI_INTCFG_RTY_MSK 0x00000020 -#define MSC01_PCI_INTCFG_RTY_BIT 0x00000020 -#define MSC01_PCI_INTCFG_MWP_SHF 4 -#define MSC01_PCI_INTCFG_MWP_MSK 0x00000010 -#define MSC01_PCI_INTCFG_MWP_BIT 0x00000010 -#define MSC01_PCI_INTCFG_MRP_SHF 3 -#define MSC01_PCI_INTCFG_MRP_MSK 0x00000008 -#define MSC01_PCI_INTCFG_MRP_BIT 0x00000008 -#define MSC01_PCI_INTCFG_SWP_SHF 2 -#define MSC01_PCI_INTCFG_SWP_MSK 0x00000004 -#define MSC01_PCI_INTCFG_SWP_BIT 0x00000004 -#define MSC01_PCI_INTCFG_SRP_SHF 1 -#define MSC01_PCI_INTCFG_SRP_MSK 0x00000002 -#define MSC01_PCI_INTCFG_SRP_BIT 0x00000002 -#define MSC01_PCI_INTCFG_SE_SHF 0 -#define MSC01_PCI_INTCFG_SE_MSK 0x00000001 -#define MSC01_PCI_INTCFG_SE_BIT 0x00000001 - -#define MSC01_PCI_INTSTAT_RST_SHF 10 -#define MSC01_PCI_INTSTAT_RST_MSK 0x00000400 -#define MSC01_PCI_INTSTAT_RST_BIT 0x00000400 -#define MSC01_PCI_INTSTAT_MWE_SHF 9 -#define MSC01_PCI_INTSTAT_MWE_MSK 0x00000200 -#define MSC01_PCI_INTSTAT_MWE_BIT 0x00000200 -#define MSC01_PCI_INTSTAT_DTO_SHF 8 -#define MSC01_PCI_INTSTAT_DTO_MSK 0x00000100 -#define MSC01_PCI_INTSTAT_DTO_BIT 0x00000100 -#define MSC01_PCI_INTSTAT_MA_SHF 7 -#define MSC01_PCI_INTSTAT_MA_MSK 0x00000080 -#define MSC01_PCI_INTSTAT_MA_BIT 0x00000080 -#define MSC01_PCI_INTSTAT_TA_SHF 6 -#define MSC01_PCI_INTSTAT_TA_MSK 0x00000040 -#define MSC01_PCI_INTSTAT_TA_BIT 0x00000040 -#define MSC01_PCI_INTSTAT_RTY_SHF 5 -#define MSC01_PCI_INTSTAT_RTY_MSK 0x00000020 -#define MSC01_PCI_INTSTAT_RTY_BIT 0x00000020 -#define MSC01_PCI_INTSTAT_MWP_SHF 4 -#define MSC01_PCI_INTSTAT_MWP_MSK 0x00000010 -#define MSC01_PCI_INTSTAT_MWP_BIT 0x00000010 -#define MSC01_PCI_INTSTAT_MRP_SHF 3 -#define MSC01_PCI_INTSTAT_MRP_MSK 0x00000008 -#define MSC01_PCI_INTSTAT_MRP_BIT 0x00000008 -#define MSC01_PCI_INTSTAT_SWP_SHF 2 -#define MSC01_PCI_INTSTAT_SWP_MSK 0x00000004 -#define MSC01_PCI_INTSTAT_SWP_BIT 0x00000004 -#define MSC01_PCI_INTSTAT_SRP_SHF 1 -#define MSC01_PCI_INTSTAT_SRP_MSK 0x00000002 -#define MSC01_PCI_INTSTAT_SRP_BIT 0x00000002 -#define MSC01_PCI_INTSTAT_SE_SHF 0 -#define MSC01_PCI_INTSTAT_SE_MSK 0x00000001 -#define MSC01_PCI_INTSTAT_SE_BIT 0x00000001 +#define MSC01_PCI_INTCFG_RST_SHF 10 +#define MSC01_PCI_INTCFG_RST_MSK 0x00000400 +#define MSC01_PCI_INTCFG_RST_BIT 0x00000400 +#define MSC01_PCI_INTCFG_MWE_SHF 9 +#define MSC01_PCI_INTCFG_MWE_MSK 0x00000200 +#define MSC01_PCI_INTCFG_MWE_BIT 0x00000200 +#define MSC01_PCI_INTCFG_DTO_SHF 8 +#define MSC01_PCI_INTCFG_DTO_MSK 0x00000100 +#define MSC01_PCI_INTCFG_DTO_BIT 0x00000100 +#define MSC01_PCI_INTCFG_MA_SHF 7 +#define MSC01_PCI_INTCFG_MA_MSK 0x00000080 +#define MSC01_PCI_INTCFG_MA_BIT 0x00000080 +#define MSC01_PCI_INTCFG_TA_SHF 6 +#define MSC01_PCI_INTCFG_TA_MSK 0x00000040 +#define MSC01_PCI_INTCFG_TA_BIT 0x00000040 +#define MSC01_PCI_INTCFG_RTY_SHF 5 +#define MSC01_PCI_INTCFG_RTY_MSK 0x00000020 +#define MSC01_PCI_INTCFG_RTY_BIT 0x00000020 +#define MSC01_PCI_INTCFG_MWP_SHF 4 +#define MSC01_PCI_INTCFG_MWP_MSK 0x00000010 +#define MSC01_PCI_INTCFG_MWP_BIT 0x00000010 +#define MSC01_PCI_INTCFG_MRP_SHF 3 +#define MSC01_PCI_INTCFG_MRP_MSK 0x00000008 +#define MSC01_PCI_INTCFG_MRP_BIT 0x00000008 +#define MSC01_PCI_INTCFG_SWP_SHF 2 +#define MSC01_PCI_INTCFG_SWP_MSK 0x00000004 +#define MSC01_PCI_INTCFG_SWP_BIT 0x00000004 +#define MSC01_PCI_INTCFG_SRP_SHF 1 +#define MSC01_PCI_INTCFG_SRP_MSK 0x00000002 +#define MSC01_PCI_INTCFG_SRP_BIT 0x00000002 +#define MSC01_PCI_INTCFG_SE_SHF 0 +#define MSC01_PCI_INTCFG_SE_MSK 0x00000001 +#define MSC01_PCI_INTCFG_SE_BIT 0x00000001 + +#define MSC01_PCI_INTSTAT_RST_SHF 10 +#define MSC01_PCI_INTSTAT_RST_MSK 0x00000400 +#define MSC01_PCI_INTSTAT_RST_BIT 0x00000400 +#define MSC01_PCI_INTSTAT_MWE_SHF 9 +#define MSC01_PCI_INTSTAT_MWE_MSK 0x00000200 +#define MSC01_PCI_INTSTAT_MWE_BIT 0x00000200 +#define MSC01_PCI_INTSTAT_DTO_SHF 8 +#define MSC01_PCI_INTSTAT_DTO_MSK 0x00000100 +#define MSC01_PCI_INTSTAT_DTO_BIT 0x00000100 +#define MSC01_PCI_INTSTAT_MA_SHF 7 +#define MSC01_PCI_INTSTAT_MA_MSK 0x00000080 +#define MSC01_PCI_INTSTAT_MA_BIT 0x00000080 +#define MSC01_PCI_INTSTAT_TA_SHF 6 +#define MSC01_PCI_INTSTAT_TA_MSK 0x00000040 +#define MSC01_PCI_INTSTAT_TA_BIT 0x00000040 +#define MSC01_PCI_INTSTAT_RTY_SHF 5 +#define MSC01_PCI_INTSTAT_RTY_MSK 0x00000020 +#define MSC01_PCI_INTSTAT_RTY_BIT 0x00000020 +#define MSC01_PCI_INTSTAT_MWP_SHF 4 +#define MSC01_PCI_INTSTAT_MWP_MSK 0x00000010 +#define MSC01_PCI_INTSTAT_MWP_BIT 0x00000010 +#define MSC01_PCI_INTSTAT_MRP_SHF 3 +#define MSC01_PCI_INTSTAT_MRP_MSK 0x00000008 +#define MSC01_PCI_INTSTAT_MRP_BIT 0x00000008 +#define MSC01_PCI_INTSTAT_SWP_SHF 2 +#define MSC01_PCI_INTSTAT_SWP_MSK 0x00000004 +#define MSC01_PCI_INTSTAT_SWP_BIT 0x00000004 +#define MSC01_PCI_INTSTAT_SRP_SHF 1 +#define MSC01_PCI_INTSTAT_SRP_MSK 0x00000002 +#define MSC01_PCI_INTSTAT_SRP_BIT 0x00000002 +#define MSC01_PCI_INTSTAT_SE_SHF 0 +#define MSC01_PCI_INTSTAT_SE_MSK 0x00000001 +#define MSC01_PCI_INTSTAT_SE_BIT 0x00000001 #define MSC01_PCI_CFGADDR_BNUM_SHF 16 #define MSC01_PCI_CFGADDR_BNUM_MSK 0x00ff0000 @@ -220,19 +220,19 @@ * Registers absolute addresses */ -#define MSC01_PCI_ID (MSC01_PCI_REG_BASE + MSC01_PCI_ID_OFS) -#define MSC01_PCI_SC2PMBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMBASL_OFS) -#define MSC01_PCI_SC2PMMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMSKL_OFS) -#define MSC01_PCI_SC2PMMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMAPL_OFS) -#define MSC01_PCI_SC2PIOBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOBASL_OFS) -#define MSC01_PCI_SC2PIOMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMSKL_OFS) -#define MSC01_PCI_SC2PIOMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMAPL_OFS) -#define MSC01_PCI_P2SCMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMSKL_OFS) -#define MSC01_PCI_P2SCMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMAPL_OFS) -#define MSC01_PCI_INTCFG (MSC01_PCI_REG_BASE + MSC01_PCI_INTCFG_OFS) -#define MSC01_PCI_INTSTAT (MSC01_PCI_REG_BASE + MSC01_PCI_INTSTAT_OFS) -#define MSC01_PCI_CFGADDR (MSC01_PCI_REG_BASE + MSC01_PCI_CFGADDR_OFS) -#define MSC01_PCI_CFGDATA (MSC01_PCI_REG_BASE + MSC01_PCI_CFGDATA_OFS) +#define MSC01_PCI_ID (MSC01_PCI_REG_BASE + MSC01_PCI_ID_OFS) +#define MSC01_PCI_SC2PMBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMBASL_OFS) +#define MSC01_PCI_SC2PMMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMSKL_OFS) +#define MSC01_PCI_SC2PMMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMAPL_OFS) +#define MSC01_PCI_SC2PIOBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOBASL_OFS) +#define MSC01_PCI_SC2PIOMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMSKL_OFS) +#define MSC01_PCI_SC2PIOMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMAPL_OFS) +#define MSC01_PCI_P2SCMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMSKL_OFS) +#define MSC01_PCI_P2SCMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMAPL_OFS) +#define MSC01_PCI_INTCFG (MSC01_PCI_REG_BASE + MSC01_PCI_INTCFG_OFS) +#define MSC01_PCI_INTSTAT (MSC01_PCI_REG_BASE + MSC01_PCI_INTSTAT_OFS) +#define MSC01_PCI_CFGADDR (MSC01_PCI_REG_BASE + MSC01_PCI_CFGADDR_OFS) +#define MSC01_PCI_CFGDATA (MSC01_PCI_REG_BASE + MSC01_PCI_CFGDATA_OFS) #define MSC01_PCI_IACK (MSC01_PCI_REG_BASE + MSC01_PCI_IACK_OFS) #define MSC01_PCI_HEAD0 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD0_OFS) #define MSC01_PCI_HEAD1 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD1_OFS) @@ -249,7 +249,7 @@ #define MSC01_PCI_HEAD12 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS) #define MSC01_PCI_HEAD13 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS) #define MSC01_PCI_HEAD14 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS) -#define MSC01_PCI_HEAD15 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS) +#define MSC01_PCI_HEAD15 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS) #define MSC01_PCI_BAR0 (MSC01_PCI_REG_BASE + MSC01_PCI_BAR0_OFS) #define MSC01_PCI_CFG (MSC01_PCI_REG_BASE + MSC01_PCI_CFG_OFS) #define MSC01_PCI_SWAP (MSC01_PCI_REG_BASE + MSC01_PCI_SWAP_OFS) diff -urN linux/sound/mips/au1x00.c linux/sound/mips/au1x00.c --- linux/sound/mips/au1x00.c 2004/10/27 05:10:46 1.1 +++ linux/sound/mips/au1x00.c 2005/07/10 10:29:03 1.2 @@ -102,7 +102,7 @@ typedef struct snd_card_au1000 { snd_card_t *card; au1000_ac97_reg_t volatile *ac97_ioport; - + struct resource *ac97_res_port; spinlock_t ac97_lock; ac97_t *ac97; @@ -166,7 +166,7 @@ } } -static void +static void au1000_dma_start(audio_stream_t *stream) { snd_pcm_substream_t *substream = stream->substream; @@ -179,12 +179,12 @@ if (stream->buffer == NULL) { dma_start = virt_to_phys(runtime->dma_area); - stream->period_size = frames_to_bytes(runtime, + stream->period_size = frames_to_bytes(runtime, runtime->period_size); stream->buffer = kmalloc(sizeof(au1000_period_t), GFP_KERNEL); pointer = stream->buffer; for (i = 0 ; i < runtime->periods ; i++) { - pointer->start = (u32)(dma_start + + pointer->start = (u32)(dma_start + (i * stream->period_size)); pointer->relative_end = (u32) (((i+1) * stream->period_size) - 0x1); @@ -195,7 +195,7 @@ } } pointer->next = stream->buffer; - + spin_lock_irqsave(&stream->dma_lock, flags); init_dma(stream->dma); if (get_dma_active_buffer(stream->dma) == 0) { @@ -247,7 +247,7 @@ spin_lock(&stream->dma_lock); break; case (~DMA_D0 & ~DMA_D1): - printk(KERN_ERR "DMA %d empty irq.\n",stream->dma); + printk(KERN_ERR "DMA %d empty irq.\n",stream->dma); } spin_unlock(&stream->dma_lock); snd_pcm_period_elapsed(substream); @@ -268,7 +268,7 @@ .info = (SNDRV_PCM_INFO_INTERLEAVED | \ SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID), .formats = SNDRV_PCM_FMTBIT_S16_LE, - .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | + .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050), .rate_min = 8000, .rate_max = 22050, @@ -364,7 +364,7 @@ { audio_stream_t *stream = substream->private_data; int err = 0; - + switch (cmd) { case SNDRV_PCM_TRIGGER_START: au1000_dma_start(stream); @@ -435,7 +435,7 @@ &snd_card_au1000_playback_ops); snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_card_au1000_capture_ops); - + pcm->private_data = au1000; pcm->info_flags = 0; strcpy(pcm->name, "Au1000 AC97 PCM"); @@ -468,7 +468,7 @@ /*-------------------------- AC97 CODEC Control ------------------------------*/ -static unsigned short +static unsigned short snd_au1000_ac97_read(ac97_t *ac97, unsigned short reg) { u32 volatile cmd; @@ -500,7 +500,7 @@ spin_unlock(au1000->ac97_lock); return data; - + } @@ -625,7 +625,7 @@ } -static int __init +static int __init au1000_init(void) { int err; diff -urN linux/sound/oss/au1000.c linux/sound/oss/au1000.c --- linux/sound/oss/au1000.c 2004/10/25 20:44:49 1.12 +++ linux/sound/oss/au1000.c 2005/07/10 10:29:03 1.13 @@ -2123,7 +2123,7 @@ #ifdef CONFIG_MIPS_XXS1500 /* deassert eapd */ - wrcodec(&s->codec, AC97_POWER_CONTROL, + wrcodec(&s->codec, AC97_POWER_CONTROL, rdcodec(&s->codec, AC97_POWER_CONTROL) & ~0x8000); /* mute a number of signals which seem to be causing problems * if not muted. diff -urN linux/sound/oss/au1550_ac97.c linux/sound/oss/au1550_ac97.c --- linux/sound/oss/au1550_ac97.c 2005/04/14 12:47:15 1.4 +++ linux/sound/oss/au1550_ac97.c 2005/07/10 10:29:03 1.5 @@ -333,7 +333,7 @@ */ temp = rdcodec(codec, AC97_POWER_CONTROL); } - + /* Check if Codec REF,ANL,DAC,ADC ready */ if ((temp & 0x7f0f) != 0x000f) @@ -1123,7 +1123,7 @@ count *= db->cnt_factor; - down(&s->sem); + down(&s->sem); add_wait_queue(&db->wait, &wait); while (count > 0) { @@ -1222,7 +1222,7 @@ } spin_lock_irqsave(&s->lock, flags); - + if (file->f_mode & FMODE_READ) { if (s->dma_adc.count >= (signed)s->dma_adc.dma_fragsize) mask |= POLLIN | POLLRDNORM; @@ -1230,7 +1230,7 @@ if (file->f_mode & FMODE_WRITE) { if (s->dma_dac.mapped) { if (s->dma_dac.count >= - (signed)s->dma_dac.dma_fragsize) + (signed)s->dma_dac.dma_fragsize) mask |= POLLOUT | POLLWRNORM; } else { if ((signed) s->dma_dac.dmasize >= @@ -1781,7 +1781,7 @@ else pr_debug("open: blocking\n"); #endif - + file->private_data = s; /* wait for device to become free */ down(&s->open_sem); @@ -1845,7 +1845,7 @@ struct au1550_state *s = (struct au1550_state *)file->private_data; lock_kernel(); - + if (file->f_mode & FMODE_WRITE) { unlock_kernel(); drain_dac(s, file->f_flags & O_NONBLOCK); diff -urN linux/sound/oss/nec_vrc5477.c linux/sound/oss/nec_vrc5477.c --- linux/sound/oss/nec_vrc5477.c 2004/09/19 12:30:26 1.18 +++ linux/sound/oss/nec_vrc5477.c 2005/07/10 10:29:03 1.19 @@ -397,10 +397,10 @@ static int ac97_codec_not_present(struct ac97_codec *codec) { - struct vrc5477_ac97_state *s = + struct vrc5477_ac97_state *s = (struct vrc5477_ac97_state *)codec->private_data; unsigned long flags; - unsigned short count = 0xffff; + unsigned short count = 0xffff; spin_lock_irqsave(&s->lock, flags); @@ -419,8 +419,8 @@ outl((AC97_RESET << 16) | 0, s->io + VRC5477_CODEC_WR); /* test whether we get a response from ac97 chip */ - count = 0xffff; - do { + count = 0xffff; + do { if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000)) break; } while (--count); @@ -435,7 +435,7 @@ /* --------------------------------------------------------------------- */ -extern inline void +extern inline void stop_dac(struct vrc5477_ac97_state *s) { struct dmabuf* db = &s->dma_dac; @@ -652,7 +652,7 @@ #define DMABUF_DEFAULTORDER (16-PAGE_SHIFT) #define DMABUF_MINORDER 1 -extern inline void dealloc_dmabuf(struct vrc5477_ac97_state *s, +extern inline void dealloc_dmabuf(struct vrc5477_ac97_state *s, struct dmabuf *db) { if (db->lbuf) { From ths@linux-mips.org Mon Jul 11 08:35:31 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Mon, 11 Jul 2005 09:35:31 +0100 (BST) From: ths@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Mon, 11 Jul 2005 09:35:31 +0100 X-archive-position: 537 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ths@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ths@ftp.linux-mips.org 05/07/11 09:35:25 Modified files: . : Makefile Log message: Use the mainline way to handle this. diff -urN linux/Makefile linux/Makefile --- linux/Makefile 2005/06/18 14:42:38 1.254 +++ linux/Makefile 2005/07/11 08:35:25 1.255 @@ -167,7 +167,10 @@ # then ARCH is assigned, getting whatever value it gets normally, and # SUBARCH is subsequently ignored. -SUBARCH := mips +SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \ + -e s/arm.*/arm/ -e s/sa110/arm/ \ + -e s/s390x/s390/ -e s/parisc64/parisc/ \ + -e s/mips.*/mips/ ) # Cross compiling and selecting different set of gcc/bin-utils # --------------------------------------------------------------------------- From ralf@linux-mips.org Mon Jul 11 09:42:28 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Mon, 11 Jul 2005 10:42:28 +0100 (BST) From: ralf@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Mon, 11 Jul 2005 10:42:28 +0100 X-archive-position: 538 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ralf@ftp.linux-mips.org 05/07/11 10:42:22 Modified files: drivers/net/tulip: .cvsignore drivers/net/e1000: .cvsignore drivers/net/sk98lin: .cvsignore drivers/net/irda: .cvsignore drivers/net/wireless: .cvsignore drivers/net/tokenring: .cvsignore drivers/media/dvb/ttusb-budget: .cvsignore drivers/media/dvb/bt8xx: .cvsignore drivers/media/dvb/ttpci: .cvsignore drivers/media/dvb/cinergyT2: .cvsignore drivers/media/dvb/dvb-core: .cvsignore drivers/media/dvb/b2c2: .cvsignore drivers/media/dvb/ttusb-dec: .cvsignore drivers/media/dvb/frontends: .cvsignore drivers/pci/hotplug: .cvsignore drivers/char/mwave: .cvsignore drivers/char/drm: .cvsignore drivers/acpi : .cvsignore drivers/input/joystick: .cvsignore drivers/input/misc: .cvsignore drivers/input/gameport: .cvsignore drivers/video/riva: .cvsignore drivers/video : .cvsignore drivers/video/aty: .cvsignore drivers/video/console: .cvsignore drivers/video/matrox: .cvsignore Added files: drivers/usb/media/pwc: .cvsignore drivers/pci/pcie: .cvsignore drivers/scsi/lpfc: .cvsignore Log message: Spam, spam, spam beautyful spam ... diff -urN linux/drivers/net/tulip/.cvsignore linux/drivers/net/tulip/.cvsignore --- linux/drivers/net/tulip/.cvsignore 2004/11/12 14:11:34 1.8 +++ linux/drivers/net/tulip/.cvsignore 2005/07/11 09:42:18 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/net/e1000/.cvsignore linux/drivers/net/e1000/.cvsignore --- linux/drivers/net/e1000/.cvsignore 2004/11/12 14:11:34 1.8 +++ linux/drivers/net/e1000/.cvsignore 2005/07/11 09:42:18 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/net/sk98lin/.cvsignore linux/drivers/net/sk98lin/.cvsignore --- linux/drivers/net/sk98lin/.cvsignore 2004/11/12 14:11:34 1.8 +++ linux/drivers/net/sk98lin/.cvsignore 2005/07/11 09:42:18 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/net/irda/.cvsignore linux/drivers/net/irda/.cvsignore --- linux/drivers/net/irda/.cvsignore 2004/11/12 14:11:34 1.8 +++ linux/drivers/net/irda/.cvsignore 2005/07/11 09:42:18 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/net/wireless/.cvsignore linux/drivers/net/wireless/.cvsignore --- linux/drivers/net/wireless/.cvsignore 2004/11/12 14:11:34 1.8 +++ linux/drivers/net/wireless/.cvsignore 2005/07/11 09:42:18 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/net/tokenring/.cvsignore linux/drivers/net/tokenring/.cvsignore --- linux/drivers/net/tokenring/.cvsignore 2004/11/12 14:11:34 1.8 +++ linux/drivers/net/tokenring/.cvsignore 2005/07/11 09:42:18 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/usb/media/pwc/.cvsignore linux/drivers/usb/media/pwc/.cvsignore --- linux/drivers/usb/media/pwc/.cvsignore 1970/01/01 00:00:00 +++ linux/drivers/usb/media/pwc/.cvsignore 2005-07-11 10:42:19.251043000 +0100 1.1 @@ -0,0 +1,5 @@ +.*.o +.*.o.d +.*.cmd +*.ko +*.mod.c diff -urN linux/drivers/media/dvb/ttusb-budget/.cvsignore linux/drivers/media/dvb/ttusb-budget/.cvsignore --- linux/drivers/media/dvb/ttusb-budget/.cvsignore 2004/11/12 14:11:33 1.4 +++ linux/drivers/media/dvb/ttusb-budget/.cvsignore 2005/07/11 09:42:19 1.5 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/media/dvb/bt8xx/.cvsignore linux/drivers/media/dvb/bt8xx/.cvsignore --- linux/drivers/media/dvb/bt8xx/.cvsignore 2004/11/12 14:11:33 1.4 +++ linux/drivers/media/dvb/bt8xx/.cvsignore 2005/07/11 09:42:19 1.5 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/media/dvb/ttpci/.cvsignore linux/drivers/media/dvb/ttpci/.cvsignore --- linux/drivers/media/dvb/ttpci/.cvsignore 2004/11/12 14:11:33 1.4 +++ linux/drivers/media/dvb/ttpci/.cvsignore 2005/07/11 09:42:19 1.5 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/media/dvb/cinergyT2/.cvsignore linux/drivers/media/dvb/cinergyT2/.cvsignore --- linux/drivers/media/dvb/cinergyT2/.cvsignore 2004/11/16 17:26:40 1.1 +++ linux/drivers/media/dvb/cinergyT2/.cvsignore 2005/07/11 09:42:19 1.2 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/media/dvb/dvb-core/.cvsignore linux/drivers/media/dvb/dvb-core/.cvsignore --- linux/drivers/media/dvb/dvb-core/.cvsignore 2004/11/12 14:11:33 1.6 +++ linux/drivers/media/dvb/dvb-core/.cvsignore 2005/07/11 09:42:19 1.7 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/media/dvb/b2c2/.cvsignore linux/drivers/media/dvb/b2c2/.cvsignore --- linux/drivers/media/dvb/b2c2/.cvsignore 2004/11/12 14:11:33 1.4 +++ linux/drivers/media/dvb/b2c2/.cvsignore 2005/07/11 09:42:19 1.5 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/media/dvb/ttusb-dec/.cvsignore linux/drivers/media/dvb/ttusb-dec/.cvsignore --- linux/drivers/media/dvb/ttusb-dec/.cvsignore 2004/11/12 14:11:33 1.4 +++ linux/drivers/media/dvb/ttusb-dec/.cvsignore 2005/07/11 09:42:20 1.5 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/media/dvb/frontends/.cvsignore linux/drivers/media/dvb/frontends/.cvsignore --- linux/drivers/media/dvb/frontends/.cvsignore 2004/11/12 14:11:33 1.6 +++ linux/drivers/media/dvb/frontends/.cvsignore 2005/07/11 09:42:20 1.7 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/pci/hotplug/.cvsignore linux/drivers/pci/hotplug/.cvsignore --- linux/drivers/pci/hotplug/.cvsignore 2004/02/20 17:35:35 1.2 +++ linux/drivers/pci/hotplug/.cvsignore 2005/07/11 09:42:20 1.3 @@ -1,4 +1,5 @@ -gen-devlist -devlist.h -classlist.h +.*.o +.*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/pci/pcie/.cvsignore linux/drivers/pci/pcie/.cvsignore --- linux/drivers/pci/pcie/.cvsignore 1970/01/01 00:00:00 +++ linux/drivers/pci/pcie/.cvsignore 2005-07-11 10:42:20.651709000 +0100 1.1 @@ -0,0 +1,5 @@ +.*.o +.*.o.d +.*.cmd +*.ko +*.mod.c diff -urN linux/drivers/char/mwave/.cvsignore linux/drivers/char/mwave/.cvsignore --- linux/drivers/char/mwave/.cvsignore 2004/11/12 14:11:31 1.8 +++ linux/drivers/char/mwave/.cvsignore 2005/07/11 09:42:20 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/char/drm/.cvsignore linux/drivers/char/drm/.cvsignore --- linux/drivers/char/drm/.cvsignore 2004/11/12 14:11:31 1.8 +++ linux/drivers/char/drm/.cvsignore 2005/07/11 09:42:20 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/scsi/lpfc/.cvsignore linux/drivers/scsi/lpfc/.cvsignore --- linux/drivers/scsi/lpfc/.cvsignore 1970/01/01 00:00:00 +++ linux/drivers/scsi/lpfc/.cvsignore 2005-07-11 10:42:21.001636000 +0100 1.1 @@ -0,0 +1,5 @@ +.*.o +.*.o.d +.*.cmd +*.ko +*.mod.c diff -urN linux/drivers/acpi/.cvsignore linux/drivers/acpi/.cvsignore --- linux/drivers/acpi/.cvsignore 2004/11/12 14:11:30 1.8 +++ linux/drivers/acpi/.cvsignore 2005/07/11 09:42:21 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/input/joystick/.cvsignore linux/drivers/input/joystick/.cvsignore --- linux/drivers/input/joystick/.cvsignore 2004/11/12 14:11:32 1.8 +++ linux/drivers/input/joystick/.cvsignore 2005/07/11 09:42:21 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/input/misc/.cvsignore linux/drivers/input/misc/.cvsignore --- linux/drivers/input/misc/.cvsignore 2004/11/12 14:11:32 1.2 +++ linux/drivers/input/misc/.cvsignore 2005/07/11 09:42:21 1.3 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/input/gameport/.cvsignore linux/drivers/input/gameport/.cvsignore --- linux/drivers/input/gameport/.cvsignore 2004/11/12 14:11:32 1.8 +++ linux/drivers/input/gameport/.cvsignore 2005/07/11 09:42:21 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/video/riva/.cvsignore linux/drivers/video/riva/.cvsignore --- linux/drivers/video/riva/.cvsignore 2004/11/12 14:11:36 1.8 +++ linux/drivers/video/riva/.cvsignore 2005/07/11 09:42:21 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/video/.cvsignore linux/drivers/video/.cvsignore --- linux/drivers/video/.cvsignore 2004/11/12 14:11:36 1.9 +++ linux/drivers/video/.cvsignore 2005/07/11 09:42:21 1.10 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/video/aty/.cvsignore linux/drivers/video/aty/.cvsignore --- linux/drivers/video/aty/.cvsignore 2004/11/12 14:11:36 1.8 +++ linux/drivers/video/aty/.cvsignore 2005/07/11 09:42:21 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/video/console/.cvsignore linux/drivers/video/console/.cvsignore --- linux/drivers/video/console/.cvsignore 2004/11/12 14:11:36 1.4 +++ linux/drivers/video/console/.cvsignore 2005/07/11 09:42:22 1.5 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/drivers/video/matrox/.cvsignore linux/drivers/video/matrox/.cvsignore --- linux/drivers/video/matrox/.cvsignore 2004/11/12 14:11:36 1.8 +++ linux/drivers/video/matrox/.cvsignore 2005/07/11 09:42:22 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c From ralf@linux-mips.org Mon Jul 11 09:51:45 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Mon, 11 Jul 2005 10:51:45 +0100 (BST) From: ralf@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Mon, 11 Jul 2005 10:51:45 +0100 X-archive-position: 539 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ralf@ftp.linux-mips.org 05/07/11 10:51:40 Modified files: sound/usb : .cvsignore sound/usb/usx2y: .cvsignore sound/i2c/other: .cvsignore sound/i2c : .cvsignore sound/pci/ali5451: .cvsignore sound/pci/rme9652: .cvsignore sound/pci/cs46xx: .cvsignore sound/pci/nm256: .cvsignore sound/pci/au88x0: .cvsignore sound/pci/trident: .cvsignore sound/pci : .cvsignore sound/pci/ymfpci: .cvsignore sound/pci/vx222: .cvsignore sound/pci/korg1212: .cvsignore sound/pci/emu10k1: .cvsignore sound/pci/ice1712: .cvsignore sound/pci/ac97 : .cvsignore sound/pci/mixart: .cvsignore sound/core/oss : .cvsignore sound/core/seq/oss: .cvsignore sound/core/seq : .cvsignore sound/core/seq/instr: .cvsignore sound/core : .cvsignore sound/synth/emux: .cvsignore sound/synth : .cvsignore sound/drivers/vx: .cvsignore sound/drivers/mpu401: .cvsignore sound/drivers : .cvsignore sound/drivers/opl4: .cvsignore sound/drivers/opl3: .cvsignore sound/isa/opti9xx: .cvsignore sound/isa/sb : .cvsignore sound/isa/gus : .cvsignore sound/isa/ad1816a: .cvsignore sound/isa : .cvsignore sound/isa/ad1848: .cvsignore sound/isa/es1688: .cvsignore sound/isa/cs423x: .cvsignore Added files: sound/pci/hda : .cvsignore Log message: Guess ... diff -urN linux/sound/usb/.cvsignore linux/sound/usb/.cvsignore --- linux/sound/usb/.cvsignore 2004/10/15 00:31:26 1.1 +++ linux/sound/usb/.cvsignore 2005/07/11 09:51:35 1.2 @@ -1 +1,5 @@ +.*.o +.*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/usb/usx2y/.cvsignore linux/sound/usb/usx2y/.cvsignore --- linux/sound/usb/usx2y/.cvsignore 2004/10/15 00:31:26 1.1 +++ linux/sound/usb/usx2y/.cvsignore 2005/07/11 09:51:35 1.2 @@ -1 +1,5 @@ +.*.o +.*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/i2c/other/.cvsignore linux/sound/i2c/other/.cvsignore --- linux/sound/i2c/other/.cvsignore 2004/10/15 00:31:25 1.1 +++ linux/sound/i2c/other/.cvsignore 2005/07/11 09:51:35 1.2 @@ -1 +1,5 @@ +.*.o +.*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/i2c/.cvsignore linux/sound/i2c/.cvsignore --- linux/sound/i2c/.cvsignore 2004/11/12 14:11:41 1.8 +++ linux/sound/i2c/.cvsignore 2005/07/11 09:51:35 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/pci/ali5451/.cvsignore linux/sound/pci/ali5451/.cvsignore --- linux/sound/pci/ali5451/.cvsignore 2004/11/12 14:11:41 1.8 +++ linux/sound/pci/ali5451/.cvsignore 2005/07/11 09:51:35 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/pci/rme9652/.cvsignore linux/sound/pci/rme9652/.cvsignore --- linux/sound/pci/rme9652/.cvsignore 2004/11/12 14:11:41 1.8 +++ linux/sound/pci/rme9652/.cvsignore 2005/07/11 09:51:35 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/pci/cs46xx/.cvsignore linux/sound/pci/cs46xx/.cvsignore --- linux/sound/pci/cs46xx/.cvsignore 2004/11/12 14:11:41 1.8 +++ linux/sound/pci/cs46xx/.cvsignore 2005/07/11 09:51:35 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/pci/nm256/.cvsignore linux/sound/pci/nm256/.cvsignore --- linux/sound/pci/nm256/.cvsignore 2004/11/12 14:11:41 1.8 +++ linux/sound/pci/nm256/.cvsignore 2005/07/11 09:51:35 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/pci/au88x0/.cvsignore linux/sound/pci/au88x0/.cvsignore --- linux/sound/pci/au88x0/.cvsignore 2004/10/15 00:31:26 1.1 +++ linux/sound/pci/au88x0/.cvsignore 2005/07/11 09:51:36 1.2 @@ -1 +1,5 @@ +.*.o +.*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/pci/hda/.cvsignore linux/sound/pci/hda/.cvsignore --- linux/sound/pci/hda/.cvsignore 1970/01/01 00:00:00 +++ linux/sound/pci/hda/.cvsignore 2005-07-11 10:51:36.362772000 +0100 1.1 @@ -0,0 +1,5 @@ +.*.o +.*.o.d +.*.cmd +*.ko +*.mod.c diff -urN linux/sound/pci/trident/.cvsignore linux/sound/pci/trident/.cvsignore --- linux/sound/pci/trident/.cvsignore 2004/11/12 14:11:41 1.8 +++ linux/sound/pci/trident/.cvsignore 2005/07/11 09:51:36 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/pci/.cvsignore linux/sound/pci/.cvsignore --- linux/sound/pci/.cvsignore 2004/11/12 14:11:41 1.8 +++ linux/sound/pci/.cvsignore 2005/07/11 09:51:36 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/pci/ymfpci/.cvsignore linux/sound/pci/ymfpci/.cvsignore --- linux/sound/pci/ymfpci/.cvsignore 2004/11/12 14:11:41 1.8 +++ linux/sound/pci/ymfpci/.cvsignore 2005/07/11 09:51:36 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/pci/vx222/.cvsignore linux/sound/pci/vx222/.cvsignore --- linux/sound/pci/vx222/.cvsignore 2004/10/15 00:31:26 1.1 +++ linux/sound/pci/vx222/.cvsignore 2005/07/11 09:51:36 1.2 @@ -1 +1,5 @@ +.*.o +.*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/pci/korg1212/.cvsignore linux/sound/pci/korg1212/.cvsignore --- linux/sound/pci/korg1212/.cvsignore 2004/11/12 14:11:41 1.8 +++ linux/sound/pci/korg1212/.cvsignore 2005/07/11 09:51:36 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/pci/emu10k1/.cvsignore linux/sound/pci/emu10k1/.cvsignore --- linux/sound/pci/emu10k1/.cvsignore 2004/11/12 14:11:41 1.8 +++ linux/sound/pci/emu10k1/.cvsignore 2005/07/11 09:51:36 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/pci/ice1712/.cvsignore linux/sound/pci/ice1712/.cvsignore --- linux/sound/pci/ice1712/.cvsignore 2004/10/15 00:31:26 1.1 +++ linux/sound/pci/ice1712/.cvsignore 2005/07/11 09:51:36 1.2 @@ -1 +1,5 @@ +.*.o +.*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/pci/ac97/.cvsignore linux/sound/pci/ac97/.cvsignore --- linux/sound/pci/ac97/.cvsignore 2004/11/12 14:11:41 1.8 +++ linux/sound/pci/ac97/.cvsignore 2005/07/11 09:51:37 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/pci/mixart/.cvsignore linux/sound/pci/mixart/.cvsignore --- linux/sound/pci/mixart/.cvsignore 2004/10/15 00:31:26 1.1 +++ linux/sound/pci/mixart/.cvsignore 2005/07/11 09:51:37 1.2 @@ -1 +1,5 @@ +.*.o +.*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/core/oss/.cvsignore linux/sound/core/oss/.cvsignore --- linux/sound/core/oss/.cvsignore 2004/11/12 14:11:40 1.8 +++ linux/sound/core/oss/.cvsignore 2005/07/11 09:51:37 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/core/seq/oss/.cvsignore linux/sound/core/seq/oss/.cvsignore --- linux/sound/core/seq/oss/.cvsignore 2004/11/12 14:11:40 1.8 +++ linux/sound/core/seq/oss/.cvsignore 2005/07/11 09:51:37 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/core/seq/.cvsignore linux/sound/core/seq/.cvsignore --- linux/sound/core/seq/.cvsignore 2004/11/12 14:11:40 1.8 +++ linux/sound/core/seq/.cvsignore 2005/07/11 09:51:37 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/core/seq/instr/.cvsignore linux/sound/core/seq/instr/.cvsignore --- linux/sound/core/seq/instr/.cvsignore 2004/11/12 14:11:40 1.8 +++ linux/sound/core/seq/instr/.cvsignore 2005/07/11 09:51:37 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/core/.cvsignore linux/sound/core/.cvsignore --- linux/sound/core/.cvsignore 2004/11/12 14:11:40 1.8 +++ linux/sound/core/.cvsignore 2005/07/11 09:51:37 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/synth/emux/.cvsignore linux/sound/synth/emux/.cvsignore --- linux/sound/synth/emux/.cvsignore 2004/11/12 14:11:42 1.8 +++ linux/sound/synth/emux/.cvsignore 2005/07/11 09:51:38 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/synth/.cvsignore linux/sound/synth/.cvsignore --- linux/sound/synth/.cvsignore 2004/11/12 14:11:42 1.8 +++ linux/sound/synth/.cvsignore 2005/07/11 09:51:38 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/drivers/vx/.cvsignore linux/sound/drivers/vx/.cvsignore --- linux/sound/drivers/vx/.cvsignore 2004/10/15 00:31:25 1.1 +++ linux/sound/drivers/vx/.cvsignore 2005/07/11 09:51:38 1.2 @@ -1 +1,5 @@ +.*.o +.*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/drivers/mpu401/.cvsignore linux/sound/drivers/mpu401/.cvsignore --- linux/sound/drivers/mpu401/.cvsignore 2004/11/12 14:11:40 1.8 +++ linux/sound/drivers/mpu401/.cvsignore 2005/07/11 09:51:38 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/drivers/.cvsignore linux/sound/drivers/.cvsignore --- linux/sound/drivers/.cvsignore 2004/11/12 14:11:40 1.8 +++ linux/sound/drivers/.cvsignore 2005/07/11 09:51:38 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/drivers/opl4/.cvsignore linux/sound/drivers/opl4/.cvsignore --- linux/sound/drivers/opl4/.cvsignore 2004/10/15 00:31:25 1.1 +++ linux/sound/drivers/opl4/.cvsignore 2005/07/11 09:51:38 1.2 @@ -1 +1,5 @@ +.*.o +.*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/drivers/opl3/.cvsignore linux/sound/drivers/opl3/.cvsignore --- linux/sound/drivers/opl3/.cvsignore 2004/11/12 14:11:41 1.8 +++ linux/sound/drivers/opl3/.cvsignore 2005/07/11 09:51:38 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/isa/opti9xx/.cvsignore linux/sound/isa/opti9xx/.cvsignore --- linux/sound/isa/opti9xx/.cvsignore 2004/11/12 14:11:41 1.8 +++ linux/sound/isa/opti9xx/.cvsignore 2005/07/11 09:51:38 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/isa/sb/.cvsignore linux/sound/isa/sb/.cvsignore --- linux/sound/isa/sb/.cvsignore 2004/11/12 14:11:41 1.8 +++ linux/sound/isa/sb/.cvsignore 2005/07/11 09:51:39 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/isa/gus/.cvsignore linux/sound/isa/gus/.cvsignore --- linux/sound/isa/gus/.cvsignore 2004/11/12 14:11:41 1.8 +++ linux/sound/isa/gus/.cvsignore 2005/07/11 09:51:39 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/isa/ad1816a/.cvsignore linux/sound/isa/ad1816a/.cvsignore --- linux/sound/isa/ad1816a/.cvsignore 2004/11/12 14:11:41 1.8 +++ linux/sound/isa/ad1816a/.cvsignore 2005/07/11 09:51:39 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/isa/.cvsignore linux/sound/isa/.cvsignore --- linux/sound/isa/.cvsignore 2004/11/12 14:11:41 1.8 +++ linux/sound/isa/.cvsignore 2005/07/11 09:51:39 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/isa/ad1848/.cvsignore linux/sound/isa/ad1848/.cvsignore --- linux/sound/isa/ad1848/.cvsignore 2004/11/12 14:11:41 1.8 +++ linux/sound/isa/ad1848/.cvsignore 2005/07/11 09:51:39 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/isa/es1688/.cvsignore linux/sound/isa/es1688/.cvsignore --- linux/sound/isa/es1688/.cvsignore 2004/11/12 14:11:41 1.8 +++ linux/sound/isa/es1688/.cvsignore 2005/07/11 09:51:39 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/sound/isa/cs423x/.cvsignore linux/sound/isa/cs423x/.cvsignore --- linux/sound/isa/cs423x/.cvsignore 2004/11/12 14:11:41 1.8 +++ linux/sound/isa/cs423x/.cvsignore 2005/07/11 09:51:39 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c From ralf@linux-mips.org Mon Jul 11 09:59:49 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Mon, 11 Jul 2005 10:59:50 +0100 (BST) From: ralf@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Mon, 11 Jul 2005 10:59:50 +0100 X-archive-position: 540 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ralf@ftp.linux-mips.org 05/07/11 10:59:44 Modified files: net/irda/irlan : .cvsignore net/irda/ircomm: .cvsignore net/irda : .cvsignore net/irda/irnet : .cvsignore net/wanrouter : .cvsignore arch/i386/kernel: .cvsignore arch/i386/boot : .cvsignore arch/i386/boot/compressed: .cvsignore fs/jbd : .cvsignore Log message: And the last few ... diff -urN linux/net/irda/irlan/.cvsignore linux/net/irda/irlan/.cvsignore --- linux/net/irda/irlan/.cvsignore 2004/11/12 14:11:39 1.10 +++ linux/net/irda/irlan/.cvsignore 2005/07/11 09:59:43 1.11 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/net/irda/ircomm/.cvsignore linux/net/irda/ircomm/.cvsignore --- linux/net/irda/ircomm/.cvsignore 2004/11/12 14:11:39 1.10 +++ linux/net/irda/ircomm/.cvsignore 2005/07/11 09:59:43 1.11 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/net/irda/.cvsignore linux/net/irda/.cvsignore --- linux/net/irda/.cvsignore 2004/11/12 14:11:39 1.10 +++ linux/net/irda/.cvsignore 2005/07/11 09:59:43 1.11 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/net/irda/irnet/.cvsignore linux/net/irda/irnet/.cvsignore --- linux/net/irda/irnet/.cvsignore 2004/11/12 14:11:39 1.8 +++ linux/net/irda/irnet/.cvsignore 2005/07/11 09:59:43 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/net/wanrouter/.cvsignore linux/net/wanrouter/.cvsignore --- linux/net/wanrouter/.cvsignore 2004/11/12 14:11:40 1.11 +++ linux/net/wanrouter/.cvsignore 2005/07/11 09:59:43 1.12 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c diff -urN linux/arch/i386/kernel/.cvsignore linux/arch/i386/kernel/.cvsignore --- linux/arch/i386/kernel/.cvsignore 2005/01/19 02:06:45 1.10 +++ linux/arch/i386/kernel/.cvsignore 2005/07/11 09:59:43 1.11 @@ -1,6 +1,8 @@ -asm-offsets.s -vmlinux.lds -vsyscall.lds .*.o .*.o.d .*.cmd +*.ko +*.mod.c +asm-offsets.s +vmlinux.lds +vsyscall.lds diff -urN linux/arch/i386/boot/.cvsignore linux/arch/i386/boot/.cvsignore --- linux/arch/i386/boot/.cvsignore 2002/11/02 20:01:53 1.4 +++ linux/arch/i386/boot/.cvsignore 2005/07/11 09:59:43 1.5 @@ -1,5 +1,7 @@ *.s bootsect +bzImage setup +vmlinux.bin zImage .*.cmd diff -urN linux/arch/i386/boot/compressed/.cvsignore linux/arch/i386/boot/compressed/.cvsignore --- linux/arch/i386/boot/compressed/.cvsignore 2002/11/02 20:01:53 1.4 +++ linux/arch/i386/boot/compressed/.cvsignore 2005/07/11 09:59:43 1.5 @@ -1,4 +1,5 @@ *tmppiggy* vmlinux -vmlinux.out +vmlinux.bin +vmlinux.bin.gz .*.cmd diff -urN linux/fs/jbd/.cvsignore linux/fs/jbd/.cvsignore --- linux/fs/jbd/.cvsignore 2004/11/12 14:11:37 1.8 +++ linux/fs/jbd/.cvsignore 2005/07/11 09:59:44 1.9 @@ -1,3 +1,5 @@ .*.o .*.o.d .*.cmd +*.ko +*.mod.c From ralf@linux-mips.org Mon Jul 11 10:03:41 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Mon, 11 Jul 2005 11:03:41 +0100 (BST) From: ralf@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Mon, 11 Jul 2005 11:03:41 +0100 X-archive-position: 541 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ralf@ftp.linux-mips.org 05/07/11 11:03:35 Modified files: arch/mips : Makefile arch/mips/au1000/common: dbdma.c irq.c pci.c platform.c setup.c time.c arch/mips/au1000/csb250: board_setup.c init.c arch/mips/au1000/db1x00: init.c arch/mips/au1000/hydrogen3: init.c arch/mips/au1000/pb1000: board_setup.c arch/mips/au1000/pb1200: board_setup.c arch/mips/au1000/xxs1500: board_setup.c init.c irqmap.c arch/mips/cobalt: irq.c arch/mips/ddb5xxx/ddb5477: irq.c setup.c arch/mips/dec : ecc-berr.c arch/mips/ite-boards/generic: it8172_setup.c time.c arch/mips/kernel: binfmt_elfn32.c binfmt_elfo32.c cpu-bugs64.c cpu-probe.c gdb-stub.c genex.S ioctl32.c irq.c linux32.c process.c r2300_switch.S r4k_switch.S semaphore.c signal32.c sysirix.c vmlinux.lds.S arch/mips/lasat: at93c.c at93c.h ds1603.c ds1603.h interrupt.c lasat_board.c picvue.c picvue.h picvue_proc.c prom.c reset.c setup.c sysctl.c arch/mips/lasat/image: Makefile head.S arch/mips/lib : memcpy.S arch/mips/lib-32: Makefile arch/mips/lib-64: Makefile arch/mips/math-emu: cp1emu.c arch/mips/mips-boards/atlas: atlas_int.c arch/mips/mips-boards/generic: init.c time.c arch/mips/mips-boards/malta: malta_setup.c arch/mips/mm : c-r4k.c c-sb1.c cerr-sb1.c dma-noncoherent.c pg-sb1.c tlbex.c arch/mips/momentum/jaguar_atx: int-handler.S prom.c setup.c arch/mips/momentum/ocelot_c: int-handler.S prom.c arch/mips/pci : fixup-cobalt.c fixup-ddb5074.c fixup-ddb5477.c fixup-malta.c fixup-rbtx4927.c fixup-sni.c ops-au1000.c ops-ddb5477.c ops-tx4927.c pci-ddb5477.c pci.c arch/mips/pmc-sierra/yosemite: atmel_read_eeprom.c atmel_read_eeprom.h arch/mips/sgi-ip22: ip22-eisa.c ip22-hpc.c ip22-int.c ip22-nvram.c ip22-reset.c ip22-time.c arch/mips/sgi-ip27: ip27-memory.c ip27-smp.c arch/mips/sgi-ip32: ip32-reset.c arch/mips/sibyte/cfe: cfe_error.h console.c setup.c smp.c arch/mips/sibyte/sb1250: bus_watcher.c irq.c arch/mips/sibyte/swarm: rtc_m41t81.c setup.c arch/mips/sni : irq.c setup.c arch/mips/tx4927/common: tx4927_irq_handler.S tx4927_setup.c arch/mips/tx4927/toshiba_rbtx4927: Makefile toshiba_rbtx4927_irq.c toshiba_rbtx4927_setup.c arch/mips/vr41xx/common: vrc4173.c arch/mips/vr41xx/nec-cmbvr4133: setup.c drivers/net : ioc3-eth.c include/asm-mips: asmmacro.h bitops.h fpregdef.h fpu.h r4kcache.h rtc.h sigcontext.h socket.h statfs.h thread_info.h titan_dep.h war.h xxs1500.h include/asm-mips/ddb5xxx: ddb5477.h include/asm-mips/ip32: mace.h include/asm-mips/lasat: serial.h include/asm-mips/mach-db1x00: db1x00.h include/asm-mips/mach-jazz: floppy.h include/asm-mips/mach-pb1x00: pb1500.h include/asm-mips/sgi: gio.h hpc3.h ioc.h ip22.h mc.h include/asm-mips/sibyte: carmel.h sb1250_defs.h sb1250_dma.h sb1250_genbus.h sb1250_int.h sb1250_l2c.h sb1250_ldt.h sb1250_mac.h sb1250_mc.h sb1250_regs.h sb1250_scd.h sb1250_smbus.h sb1250_syncser.h sb1250_uart.h include/asm-mips/tx4927: tx4927.h tx4927_pci.h include/asm-mips/vr41xx: vrc4173.h Log message: A little more whitespace cleanup. diff -urN linux/arch/mips/Makefile linux/arch/mips/Makefile --- linux/arch/mips/Makefile 2005/07/07 11:42:49 1.199 +++ linux/arch/mips/Makefile 2005/07/11 10:03:23 1.200 @@ -197,7 +197,7 @@ cflags-$(CONFIG_CPU_R5000) += \ $(call set_gccflags,r5000,mips4,r5000,mips4,mips2) \ - -Wa,--trap + -Wa,--trap cflags-$(CONFIG_CPU_R5432) += \ $(call set_gccflags,r5400,mips4,r5000,mips4,mips2) \ @@ -770,7 +770,7 @@ @$(MAKE) $(clean)=arch/mips/boot @$(MAKE) $(clean)=arch/mips/lasat -# Generate dev_id; new_id++; #if 0 - printk("add_device: id:%x flags:%x padd:%x\n", + printk("add_device: id:%x flags:%x padd:%x\n", p->dev_id, p->dev_flags, p->dev_physaddr ); #endif } @@ -390,7 +390,7 @@ * and if we try that first we are likely to not waste larger * slabs of memory. */ - desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t), + desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t), GFP_KERNEL|GFP_DMA); if (desc_base == 0) return 0; @@ -482,13 +482,13 @@ /* If source input is fifo, set static address. */ if (stp->dev_flags & DEV_FLAGS_IN) { - if ( stp->dev_flags & DEV_FLAGS_BURSTABLE ) + if ( stp->dev_flags & DEV_FLAGS_BURSTABLE ) src1 |= DSCR_SRC1_SAM(DSCR_xAM_BURST); - else + else src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC); } - if (stp->dev_physaddr) + if (stp->dev_physaddr) src0 = stp->dev_physaddr; /* Set up dest1. For now, assume no stride and increment. @@ -518,7 +518,7 @@ else dest1 |= DSCR_DEST1_DAM(DSCR_xAM_STATIC); } - if (dtp->dev_physaddr) + if (dtp->dev_physaddr) dest0 = dtp->dev_physaddr; #if 0 @@ -581,7 +581,7 @@ dp->dscr_source0 = virt_to_phys(buf); dp->dscr_cmd1 = nbytes; /* Check flags */ - if (flags & DDMA_FLAGS_IE) + if (flags & DDMA_FLAGS_IE) dp->dscr_cmd0 |= DSCR_CMD0_IE; if (flags & DDMA_FLAGS_NOIE) dp->dscr_cmd0 &= ~DSCR_CMD0_IE; @@ -590,10 +590,10 @@ ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); /* - * There is an errata on the Au1200/Au1550 parts that could result - * in "stale" data being DMA'd. It has to do with the snoop logic on - * the dache eviction buffer. NONCOHERENT_IO is on by default for - * these parts. If it is fixedin the future, these dma_cache_inv will + * There is an errata on the Au1200/Au1550 parts that could result + * in "stale" data being DMA'd. It has to do with the snoop logic on + * the dache eviction buffer. NONCOHERENT_IO is on by default for + * these parts. If it is fixedin the future, these dma_cache_inv will * just be nothing more than empty macros. See io.h. * */ dma_cache_wback_inv((unsigned long)buf, nbytes); @@ -638,7 +638,7 @@ /* Load up buffer address and byte count */ /* Check flags */ - if (flags & DDMA_FLAGS_IE) + if (flags & DDMA_FLAGS_IE) dp->dscr_cmd0 |= DSCR_CMD0_IE; if (flags & DDMA_FLAGS_NOIE) dp->dscr_cmd0 &= ~DSCR_CMD0_IE; @@ -646,16 +646,16 @@ dp->dscr_dest0 = virt_to_phys(buf); dp->dscr_cmd1 = nbytes; #if 0 - printk("cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n", - dp->dscr_cmd0, dp->dscr_cmd1, dp->dscr_source0, + printk("cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n", + dp->dscr_cmd0, dp->dscr_cmd1, dp->dscr_source0, dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1 ); #endif /* - * There is an errata on the Au1200/Au1550 parts that could result in - * "stale" data being DMA'd. It has to do with the snoop logic on the - * dache eviction buffer. NONCOHERENT_IO is on by default for these - * parts. If it is fixedin the future, these dma_cache_inv will just - * be nothing more than empty macros. See io.h. + * There is an errata on the Au1200/Au1550 parts that could result in + * "stale" data being DMA'd. It has to do with the snoop logic on the + * dache eviction buffer. NONCOHERENT_IO is on by default for these + * parts. If it is fixedin the future, these dma_cache_inv will just + * be nothing more than empty macros. See io.h. * */ dma_cache_inv((unsigned long)buf,nbytes); dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */ @@ -780,9 +780,9 @@ do { dp->dscr_cmd0 &= ~DSCR_CMD0_V; - /* reset our SW status -- this is used to determine - * if a descriptor is in use by upper level SW. Since - * posting can reset 'V' bit. + /* reset our SW status -- this is used to determine + * if a descriptor is in use by upper level SW. Since + * posting can reset 'V' bit. */ dp->sw_status = 0; dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); diff -urN linux/arch/mips/au1000/common/irq.c linux/arch/mips/au1000/common/irq.c --- linux/arch/mips/au1000/common/irq.c 2005/03/13 08:19:05 1.39 +++ linux/arch/mips/au1000/common/irq.c 2005/07/11 10:03:23 1.40 @@ -313,8 +313,8 @@ action.handler = handler; action.next = NULL; - irq_desc[AU1000_TOY_MATCH2_INT].action = &action; - irq_desc[AU1000_TOY_MATCH2_INT].status + irq_desc[AU1000_TOY_MATCH2_INT].action = &action; + irq_desc[AU1000_TOY_MATCH2_INT].status &= ~(IRQ_DISABLED | IRQ_AUTODETECT | IRQ_WAITING | IRQ_INPROGRESS); local_enable_irq(AU1000_TOY_MATCH2_INT); diff -urN linux/arch/mips/au1000/common/pci.c linux/arch/mips/au1000/common/pci.c --- linux/arch/mips/au1000/common/pci.c 2004/12/03 08:30:47 1.6 +++ linux/arch/mips/au1000/common/pci.c 2005/07/11 10:03:23 1.7 @@ -40,14 +40,14 @@ /* TBD */ static struct resource pci_io_resource = { - "pci IO space", + "pci IO space", (u32)PCI_IO_START, (u32)PCI_IO_END, IORESOURCE_IO }; static struct resource pci_mem_resource = { - "pci memory space", + "pci memory space", (u32)PCI_MEM_START, (u32)PCI_MEM_END, IORESOURCE_MEM @@ -68,7 +68,7 @@ static int __init au1x_pci_setup(void) { #if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550) - virt_io_addr = (unsigned long)ioremap(Au1500_PCI_IO_START, + virt_io_addr = (unsigned long)ioremap(Au1500_PCI_IO_START, Au1500_PCI_IO_END - Au1500_PCI_IO_START + 1); if (!virt_io_addr) { @@ -77,7 +77,7 @@ } #ifdef CONFIG_DMA_NONCOHERENT - /* + /* * Set the NC bit in controller for Au1500 pre-AC silicon */ u32 prid = read_c0_prid(); diff -urN linux/arch/mips/au1000/common/platform.c linux/arch/mips/au1000/common/platform.c --- linux/arch/mips/au1000/common/platform.c 2005/04/14 11:31:25 1.5 +++ linux/arch/mips/au1000/common/platform.c 2005/07/11 10:03:23 1.6 @@ -43,7 +43,7 @@ }; /*** AU1100 LCD controller ***/ - + #ifdef CONFIG_FB_AU1100 static struct resource au1100_lcd_resources[] = { [0] = { diff -urN linux/arch/mips/au1000/common/setup.c linux/arch/mips/au1000/common/setup.c --- linux/arch/mips/au1000/common/setup.c 2005/06/30 10:48:40 1.24 +++ linux/arch/mips/au1000/common/setup.c 2005/07/11 10:03:23 1.25 @@ -97,7 +97,7 @@ argptr = prom_getcmdline(); strcat(argptr, " console=ttyS0,115200"); } -#endif +#endif #ifdef CONFIG_FB_AU1100 if ((argptr = strstr(argptr, "video=")) == NULL) { diff -urN linux/arch/mips/au1000/common/time.c linux/arch/mips/au1000/common/time.c --- linux/arch/mips/au1000/common/time.c 2005/04/08 08:34:43 1.35 +++ linux/arch/mips/au1000/common/time.c 2005/07/11 10:03:23 1.36 @@ -280,7 +280,7 @@ cpu_speed = count * 2; } #else - cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * + cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * AU1000_SRC_CLK; count = cpu_speed / 2; #endif @@ -355,7 +355,7 @@ : "hi", "lo", GCC_REG_ACCUM); /* - * Due to possible jiffies inconsistencies, we need to check + * Due to possible jiffies inconsistencies, we need to check * the result so that we'll get a timer that is monotonic. */ if (res >= USECS_PER_JIFFY) @@ -374,8 +374,8 @@ au_sync(); offset = pc0 - last_pc0; if (offset > 2*MATCH20_INC) { - printk("huge offset %x, last_pc0 %x last_match20 %x pc0 %x\n", - (unsigned)offset, (unsigned)last_pc0, + printk("huge offset %x, last_pc0 %x last_match20 %x pc0 %x\n", + (unsigned)offset, (unsigned)last_pc0, (unsigned)last_match20, (unsigned)pc0); } offset = (unsigned long)((offset * 305) / 10); @@ -392,11 +392,11 @@ r4k_offset = cal_r4koff(); printk("%08lx(%d)\n", r4k_offset, (int) r4k_offset); - //est_freq = 2*r4k_offset*HZ; - est_freq = r4k_offset*HZ; + //est_freq = 2*r4k_offset*HZ; + est_freq = r4k_offset*HZ; est_freq += 5000; /* round */ est_freq -= est_freq%10000; - printk("CPU frequency %d.%02d MHz\n", est_freq/1000000, + printk("CPU frequency %d.%02d MHz\n", est_freq/1000000, (est_freq%1000000)*100/1000000); set_au1x00_speed(est_freq); set_au1x00_lcd_clock(); // program the LCD clock diff -urN linux/arch/mips/au1000/csb250/board_setup.c linux/arch/mips/au1000/csb250/board_setup.c --- linux/arch/mips/au1000/csb250/board_setup.c 2005/01/14 23:59:07 1.4 +++ linux/arch/mips/au1000/csb250/board_setup.c 2005/07/11 10:03:23 1.5 @@ -182,7 +182,7 @@ au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV); au_writel(0, Au1500_PCI_MWBASE_REV_CCL); au_writel(0x02a00356, Au1500_PCI_STATCMD); - au_writel(0x00003c04, Au1500_PCI_HDRTYPE); + au_writel(0x00003c04, Au1500_PCI_HDRTYPE); au_writel(0x00000008, Au1500_PCI_MBAR); au_sync(); @@ -216,7 +216,7 @@ unsigned int gpio2_pins; retval = 1; - + /* First, disable both selects, then assert the one requested. */ au_writel(0xc000c000, GPIO2_OUTPUT); diff -urN linux/arch/mips/au1000/csb250/init.c linux/arch/mips/au1000/csb250/init.c --- linux/arch/mips/au1000/csb250/init.c 2005/04/14 12:34:15 1.3 +++ linux/arch/mips/au1000/csb250/init.c 2005/07/11 10:03:23 1.4 @@ -80,7 +80,7 @@ csb_env[0] = env1; mips_machgroup = MACH_GROUP_ALCHEMY; - mips_machtype = MACH_CSB250; + mips_machtype = MACH_CSB250; prom_init_cmdline(); memsize_str = prom_getenv("memsize"); diff -urN linux/arch/mips/au1000/db1x00/init.c linux/arch/mips/au1000/db1x00/init.c --- linux/arch/mips/au1000/db1x00/init.c 2003/11/18 01:17:46 1.5 +++ linux/arch/mips/au1000/db1x00/init.c 2005/07/11 10:03:24 1.6 @@ -61,7 +61,7 @@ prom_envp = (char **) fw_arg2; mips_machgroup = MACH_GROUP_ALCHEMY; - mips_machtype = MACH_DB1000; /* set the platform # */ + mips_machtype = MACH_DB1000; /* set the platform # */ prom_init_cmdline(); diff -urN linux/arch/mips/au1000/hydrogen3/init.c linux/arch/mips/au1000/hydrogen3/init.c --- linux/arch/mips/au1000/hydrogen3/init.c 2005/04/14 12:34:15 1.3 +++ linux/arch/mips/au1000/hydrogen3/init.c 2005/07/11 10:03:24 1.4 @@ -62,7 +62,7 @@ prom_envp = envp; mips_machgroup = MACH_GROUP_ALCHEMY; - mips_machtype = MACH_DB1000; /* set the platform # */ + mips_machtype = MACH_DB1000; /* set the platform # */ prom_init_cmdline(); memsize_str = prom_getenv("memsize"); diff -urN linux/arch/mips/au1000/pb1000/board_setup.c linux/arch/mips/au1000/pb1000/board_setup.c --- linux/arch/mips/au1000/pb1000/board_setup.c 2005/01/19 02:18:44 1.10 +++ linux/arch/mips/au1000/pb1000/board_setup.c 2005/07/11 10:03:24 1.11 @@ -174,7 +174,7 @@ case 0x02: /* HB */ break; default: /* HC and newer */ - /* Enable sys bus clock divider when IDLE state or no bus + /* Enable sys bus clock divider when IDLE state or no bus activity. */ au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); break; diff -urN linux/arch/mips/au1000/pb1200/board_setup.c linux/arch/mips/au1000/pb1200/board_setup.c --- linux/arch/mips/au1000/pb1200/board_setup.c 2005/03/04 08:31:06 1.3 +++ linux/arch/mips/au1000/pb1200/board_setup.c 2005/07/11 10:03:24 1.4 @@ -151,7 +151,7 @@ /* * change PIO or PIO+Ddma * check the GPIO-5 pin condition. pb1200:s18_dot */ - switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 5)) ? 1 : 0; + switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 5)) ? 1 : 0; #endif /* The Pb1200 development board uses external MUX for PSC0 to diff -urN linux/arch/mips/au1000/xxs1500/board_setup.c linux/arch/mips/au1000/xxs1500/board_setup.c --- linux/arch/mips/au1000/xxs1500/board_setup.c 2004/09/14 06:38:46 1.5 +++ linux/arch/mips/au1000/xxs1500/board_setup.c 2005/07/11 10:03:24 1.6 @@ -49,7 +49,7 @@ void __init board_setup(void) { u32 pin_func; - + // set multiple use pins (UART3/GPIO) to UART (it's used as UART too) pin_func = au_readl(SYS_PINFUNC) & (u32)(~SYS_PF_UR3); pin_func |= SYS_PF_UR3; @@ -75,11 +75,11 @@ au_writel(1, GPIO2_ENABLE); /* gpio2 208/9/10/11 are inputs */ au_writel((1<<8) | (1<<9) | (1<<10) | (1<<11), GPIO2_DIR); - + /* turn off power */ au_writel((au_readl(GPIO2_PINSTATE) & ~(1<<14))|(1<<30), GPIO2_OUTPUT); #endif - + #ifdef CONFIG_PCI #if defined(__MIPSEB__) diff -urN linux/arch/mips/au1000/xxs1500/init.c linux/arch/mips/au1000/xxs1500/init.c --- linux/arch/mips/au1000/xxs1500/init.c 2003/11/18 01:17:46 1.4 +++ linux/arch/mips/au1000/xxs1500/init.c 2005/07/11 10:03:24 1.5 @@ -55,7 +55,7 @@ prom_envp = (char **) fw_arg2; mips_machgroup = MACH_GROUP_ALCHEMY; - mips_machtype = MACH_XXS1500; /* set the platform # */ + mips_machtype = MACH_XXS1500; /* set the platform # */ prom_init_cmdline(); diff -urN linux/arch/mips/au1000/xxs1500/irqmap.c linux/arch/mips/au1000/xxs1500/irqmap.c --- linux/arch/mips/au1000/xxs1500/irqmap.c 2004/10/25 20:44:16 1.4 +++ linux/arch/mips/au1000/xxs1500/irqmap.c 2005/07/11 10:03:24 1.5 @@ -56,7 +56,7 @@ { AU1500_GPIO_207, INTC_INT_LOW_LEVEL, 0 }, { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 }, - { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 }, + { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 }, { AU1000_GPIO_2, INTC_INT_LOW_LEVEL, 0 }, { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 }, { AU1000_GPIO_4, INTC_INT_LOW_LEVEL, 0 }, /* CF interrupt */ diff -urN linux/arch/mips/cobalt/irq.c linux/arch/mips/cobalt/irq.c --- linux/arch/mips/cobalt/irq.c 2005/04/11 12:46:57 1.13 +++ linux/arch/mips/cobalt/irq.c 2005/07/11 10:03:24 1.14 @@ -113,7 +113,7 @@ static struct irqaction irq_via = { no_action, 0, { { 0, } }, "cascade", NULL, NULL }; - + void __init arch_init_irq(void) { /* diff -urN linux/arch/mips/ddb5xxx/ddb5477/irq.c linux/arch/mips/ddb5xxx/ddb5477/irq.c --- linux/arch/mips/ddb5xxx/ddb5477/irq.c 2004/08/20 11:29:06 1.13 +++ linux/arch/mips/ddb5xxx/ddb5477/irq.c 2005/07/11 10:03:25 1.14 @@ -76,7 +76,7 @@ extern void vrc5477_irq_init(u32 base); extern void mips_cpu_irq_init(u32 base); extern asmlinkage void ddb5477_handle_int(void); -extern int setup_irq(unsigned int irq, struct irqaction *irqaction); +extern int setup_irq(unsigned int irq, struct irqaction *irqaction); static struct irqaction irq_cascade = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL }; void __init arch_init_irq(void) @@ -94,7 +94,7 @@ /* setup PCI interrupt attributes */ set_pci_int_attr(PCI0, INTA, ACTIVE_LOW, LEVEL_SENSE); set_pci_int_attr(PCI0, INTB, ACTIVE_LOW, LEVEL_SENSE); - if (mips_machtype == MACH_NEC_ROCKHOPPERII) + if (mips_machtype == MACH_NEC_ROCKHOPPERII) set_pci_int_attr(PCI0, INTC, ACTIVE_HIGH, LEVEL_SENSE); else set_pci_int_attr(PCI0, INTC, ACTIVE_LOW, LEVEL_SENSE); @@ -134,7 +134,7 @@ /* setup cascade interrupts */ setup_irq(VRC5477_IRQ_BASE + VRC5477_I8259_CASCADE, &irq_cascade); - setup_irq(CPU_IRQ_BASE + CPU_VRC5477_CASCADE, &irq_cascade); + setup_irq(CPU_IRQ_BASE + CPU_VRC5477_CASCADE, &irq_cascade); /* hook up the first-level interrupt handler */ set_except_vector(0, ddb5477_handle_int); diff -urN linux/arch/mips/ddb5xxx/ddb5477/setup.c linux/arch/mips/ddb5xxx/ddb5477/setup.c --- linux/arch/mips/ddb5xxx/ddb5477/setup.c 2005/06/21 13:56:30 1.28 +++ linux/arch/mips/ddb5xxx/ddb5477/setup.c 2005/07/11 10:03:25 1.29 @@ -141,7 +141,7 @@ /* mips_hpt_frequency is 1/2 of the cpu core freq */ i = (read_c0_config() >> 28 ) & 7; - if ((current_cpu_data.cputype == CPU_R5432) && (i == 3)) + if ((current_cpu_data.cputype == CPU_R5432) && (i == 3)) i = 4; mips_hpt_frequency = bus_frequency*(i+4)/4; } @@ -294,11 +294,11 @@ if (mips_machtype == MACH_NEC_ROCKHOPPER || mips_machtype == MACH_NEC_ROCKHOPPERII) { - /* Disable bus diagnostics. */ + /* Disable bus diagnostics. */ ddb_out32(DDB_PCICTL0_L, 0); ddb_out32(DDB_PCICTL0_H, 0); ddb_out32(DDB_PCICTL1_L, 0); - ddb_out32(DDB_PCICTL1_H, 0); + ddb_out32(DDB_PCICTL1_H, 0); } if (mips_machtype == MACH_NEC_ROCKHOPPER) { @@ -350,7 +350,7 @@ */ pci_write_config_byte(&dev_m1533, 0x58, 0x74); - /* + /* * positive decode (bit6 -0) * enable IDE controler interrupt (bit 4 -1) * setup SIRQ to point to IRQ 14 (bit 3:0 - 1101) @@ -360,31 +360,31 @@ /* Setup M5229 registers */ dev_m5229.bus = &bus; dev_m5229.sysdata = NULL; - dev_m5229.devfn = 4*8; // slot 4 (AD15): M5229 IDE + dev_m5229.devfn = 4*8; // slot 4 (AD15): M5229 IDE /* * enable IDE in the M5229 config register 0x50 (bit 0 - 1) - * M5229 IDSEL is addr:15; see above setting + * M5229 IDSEL is addr:15; see above setting */ pci_read_config_byte(&dev_m5229, 0x50, &temp8); pci_write_config_byte(&dev_m5229, 0x50, temp8 | 0x1); - /* - * enable bus master (bit 2) and IO decoding (bit 0) + /* + * enable bus master (bit 2) and IO decoding (bit 0) */ pci_read_config_byte(&dev_m5229, 0x04, &temp8); pci_write_config_byte(&dev_m5229, 0x04, temp8 | 0x5); /* * enable native, copied from arch/ppc/k2boot/head.S - * TODO - need volatile, need to be portable + * TODO - need volatile, need to be portable */ pci_write_config_byte(&dev_m5229, 0x09, 0xef); - /* Set Primary Channel Command Block Timing */ + /* Set Primary Channel Command Block Timing */ pci_write_config_byte(&dev_m5229, 0x59, 0x31); - /* + /* * Enable primary channel 40-pin cable * M5229 register 0x4a (bit 0) */ diff -urN linux/arch/mips/dec/ecc-berr.c linux/arch/mips/dec/ecc-berr.c --- linux/arch/mips/dec/ecc-berr.c 2005/07/01 16:10:40 1.8 +++ linux/arch/mips/dec/ecc-berr.c 2005/07/11 10:03:25 1.9 @@ -255,7 +255,7 @@ kn0x_erraddr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_ERRADDR); kn0x_chksyn = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_CHKSYN); - + /* * Set normal ECC detection and generation, enable ECC correction. * For KN05 we also need to make sure EE (?) is enabled in the MB. diff -urN linux/arch/mips/ite-boards/generic/it8172_setup.c linux/arch/mips/ite-boards/generic/it8172_setup.c --- linux/arch/mips/ite-boards/generic/it8172_setup.c 2005/06/21 13:56:30 1.22 +++ linux/arch/mips/ite-boards/generic/it8172_setup.c 2005/07/11 10:03:25 1.23 @@ -129,7 +129,7 @@ /* * IO/MEM resources. - * + * * revisit this area. */ set_io_port_base(KSEG1); diff -urN linux/arch/mips/ite-boards/generic/time.c linux/arch/mips/ite-boards/generic/time.c --- linux/arch/mips/ite-boards/generic/time.c 2003/11/28 18:52:41 1.15 +++ linux/arch/mips/ite-boards/generic/time.c 2005/07/11 10:03:25 1.16 @@ -72,7 +72,7 @@ static inline unsigned char bin_to_hw(unsigned char c) { - if (rtc_dm_binary()) + if (rtc_dm_binary()) return c; else return ((c/10) << 4) + (c%10); @@ -91,9 +91,9 @@ static inline unsigned char hour_bin_to_hw(unsigned char c) { - if (rtc_24h()) + if (rtc_24h()) return bin_to_hw(c); - if (c >= 12) + if (c >= 12) return 0x80 | bin_to_hw((c==12)?12:c-12); /* 12 is 12pm */ else return bin_to_hw((c==0)?12:c); /* 0 is 12 AM, not 0 am */ @@ -105,9 +105,9 @@ unsigned char tmp = hw_to_bin(c&0x3f); if (rtc_24h()) return tmp; - if (c & 0x80) + if (c & 0x80) return (tmp==12)?12:tmp+12; /* 12pm is 12, not 24 */ - else + else return (tmp==12)?0:tmp; /* 12am is 0 */ } @@ -145,7 +145,7 @@ return (mips_hpt_frequency / HZ); } -static unsigned long +static unsigned long it8172_rtc_get_time(void) { unsigned int year, mon, day, hour, min, sec; @@ -166,12 +166,12 @@ hour = hour_hw_to_bin(CMOS_READ(RTC_HOURS)); day = hw_to_bin(CMOS_READ(RTC_DAY_OF_MONTH)); mon = hw_to_bin(CMOS_READ(RTC_MONTH)); - year = hw_to_bin(CMOS_READ(RTC_YEAR)) + + year = hw_to_bin(CMOS_READ(RTC_YEAR)) + hw_to_bin(*rtc_century_reg) * 100; /* restore interrupts */ local_irq_restore(flags); - + return mktime(year, mon, day, hour, min, sec); } diff -urN linux/arch/mips/kernel/binfmt_elfn32.c linux/arch/mips/kernel/binfmt_elfn32.c --- linux/arch/mips/kernel/binfmt_elfn32.c 2005/01/26 02:22:22 1.5 +++ linux/arch/mips/kernel/binfmt_elfn32.c 2005/07/11 10:03:25 1.6 @@ -102,7 +102,7 @@ * Convert jiffies to nanoseconds and seperate with * one divide. */ - u64 nsec = (u64)jiffies * TICK_NSEC; + u64 nsec = (u64)jiffies * TICK_NSEC; value->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &value->tv_usec); value->tv_usec /= NSEC_PER_USEC; } diff -urN linux/arch/mips/kernel/binfmt_elfo32.c linux/arch/mips/kernel/binfmt_elfo32.c --- linux/arch/mips/kernel/binfmt_elfo32.c 2005/01/26 02:22:22 1.6 +++ linux/arch/mips/kernel/binfmt_elfo32.c 2005/07/11 10:03:25 1.7 @@ -104,7 +104,7 @@ * Convert jiffies to nanoseconds and seperate with * one divide. */ - u64 nsec = (u64)jiffies * TICK_NSEC; + u64 nsec = (u64)jiffies * TICK_NSEC; value->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &value->tv_usec); value->tv_usec /= NSEC_PER_USEC; } diff -urN linux/arch/mips/kernel/cpu-bugs64.c linux/arch/mips/kernel/cpu-bugs64.c --- linux/arch/mips/kernel/cpu-bugs64.c 2004/10/08 02:41:13 1.6 +++ linux/arch/mips/kernel/cpu-bugs64.c 2005/07/11 10:03:25 1.7 @@ -137,7 +137,7 @@ for (i = 0; i < 8; i++) if (v1[i] != w[i]) bug = 1; - + if (bug == 0) { printk("no.\n"); return; @@ -149,7 +149,7 @@ for (i = 0; i < 8; i++) if (v2[i] != w[i]) fix = 0; - + if (fix == 1) { printk("yes.\n"); return; diff -urN linux/arch/mips/kernel/cpu-probe.c linux/arch/mips/kernel/cpu-probe.c --- linux/arch/mips/kernel/cpu-probe.c 2005/06/06 16:40:58 1.49 +++ linux/arch/mips/kernel/cpu-probe.c 2005/07/11 10:03:25 1.50 @@ -52,7 +52,7 @@ /* The Au1xxx wait is available only if using 32khz counter or * external timer source, but specifically not CP0 Counter. */ -int allow_au1k_wait; +int allow_au1k_wait; static void au1k_wait(void) { @@ -440,7 +440,7 @@ default: panic("Unsupported ISA type, cp0.config0.at: %d.", isa); } - + return config0 & MIPS_CONF_M; } @@ -476,7 +476,7 @@ if (config2 & MIPS_CONF2_SL) c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT; - + return config2 & MIPS_CONF_M; } diff -urN linux/arch/mips/kernel/gdb-stub.c linux/arch/mips/kernel/gdb-stub.c --- linux/arch/mips/kernel/gdb-stub.c 2005/01/14 03:03:23 1.34 +++ linux/arch/mips/kernel/gdb-stub.c 2005/07/11 10:03:25 1.35 @@ -690,8 +690,8 @@ * acquire the big kgdb spinlock */ if (!spin_trylock(&kgdb_lock)) { - /* - * some other CPU has the lock, we should go back to + /* + * some other CPU has the lock, we should go back to * receive the gdb_wait IPC */ return; @@ -706,7 +706,7 @@ async_bp.addr = 0; } - /* + /* * acquire the CPU spinlocks */ for (i = num_online_cpus()-1; i >= 0; i--) @@ -897,7 +897,7 @@ ptr = &input_buffer[1]; if (hexToLong(&ptr, &addr)) regs->cp0_epc = addr; - + goto exit_kgdb_exception; break; @@ -1004,7 +1004,7 @@ return; __asm__ __volatile__( - ".globl breakinst\n\t" + ".globl breakinst\n\t" ".set\tnoreorder\n\t" "nop\n" "breakinst:\tbreak\n\t" @@ -1017,7 +1017,7 @@ void async_breakpoint(void) { __asm__ __volatile__( - ".globl async_breakinst\n\t" + ".globl async_breakinst\n\t" ".set\tnoreorder\n\t" "nop\n" "async_breakinst:\tbreak\n\t" diff -urN linux/arch/mips/kernel/genex.S linux/arch/mips/kernel/genex.S --- linux/arch/mips/kernel/genex.S 2005/05/31 11:49:19 1.11 +++ linux/arch/mips/kernel/genex.S 2005/07/11 10:03:25 1.12 @@ -246,10 +246,10 @@ LONG_L a1, PT_EPC(sp) #if CONFIG_MIPS32 PRINT("Got \nexception at %08lx\012") -#endif +#endif #if CONFIG_MIPS64 PRINT("Got \nexception at %016lx\012") -#endif +#endif .endm .macro __BUILD_count exception diff -urN linux/arch/mips/kernel/ioctl32.c linux/arch/mips/kernel/ioctl32.c --- linux/arch/mips/kernel/ioctl32.c 2004/09/24 12:54:00 1.20 +++ linux/arch/mips/kernel/ioctl32.c 2005/07/11 10:03:25 1.21 @@ -27,7 +27,7 @@ #include "compat_ioctl.c" typedef int (* ioctl32_handler_t)(unsigned int, unsigned int, unsigned long, struct file *); - + #define COMPATIBLE_IOCTL(cmd) HANDLE_IOCTL((cmd),sys_ioctl) #define HANDLE_IOCTL(cmd,handler) { (cmd), (ioctl32_handler_t)(handler), NULL }, #define IOCTL_TABLE_START \ diff -urN linux/arch/mips/kernel/irq.c linux/arch/mips/kernel/irq.c --- linux/arch/mips/kernel/irq.c 2005/01/14 03:03:23 1.81 +++ linux/arch/mips/kernel/irq.c 2005/07/11 10:03:25 1.82 @@ -77,7 +77,7 @@ if (i < NR_IRQS) { spin_lock_irqsave(&irq_desc[i].lock, flags); action = irq_desc[i].action; - if (!action) + if (!action) goto skip; seq_printf(p, "%3d: ",i); #ifndef CONFIG_SMP diff -urN linux/arch/mips/kernel/linux32.c linux/arch/mips/kernel/linux32.c --- linux/arch/mips/kernel/linux32.c 2005/04/13 17:43:59 1.28 +++ linux/arch/mips/kernel/linux32.c 2005/07/11 10:03:25 1.29 @@ -267,7 +267,7 @@ struct sysinfo s; int ret, err; mm_segment_t old_fs = get_fs (); - + set_fs (KERNEL_DS); ret = sys_sysinfo(&s); set_fs (old_fs); @@ -514,7 +514,7 @@ compat_gid_t gid; compat_uid_t cuid; compat_gid_t cgid; - compat_mode_t mode; + compat_mode_t mode; unsigned short seq; unsigned short __pad1; unsigned int __unused1; @@ -1288,17 +1288,17 @@ mm_segment_t old_fs = get_fs(); int ret; off_t of; - + if (offset && get_user(of, offset)) return -EFAULT; - + set_fs(KERNEL_DS); ret = sys_sendfile(out_fd, in_fd, offset ? &of : NULL, count); set_fs(old_fs); - + if (offset && put_user(of, offset)) return -EFAULT; - + return ret; } @@ -1316,11 +1316,11 @@ #undef AL /* - * System call vectors. + * System call vectors. * * Argument checking cleaned up. Saved 20% in size. * This function doesn't need to set the kernel lock because - * it is set by the callees. + * it is set by the callees. */ asmlinkage long sys32_socketcall(int call, unsigned int *args32) @@ -1356,11 +1356,11 @@ /* copy_from_user should be SMP safe. */ if (copy_from_user(a, args32, socketcall_nargs[call])) return -EFAULT; - + a0=a[0]; a1=a[1]; - - switch(call) + + switch(call) { case SYS_SOCKET: err = sys_socket(a0,a1,a[2]); @@ -1422,12 +1422,12 @@ return err; } -struct sigevent32 { +struct sigevent32 { u32 sigev_value; - u32 sigev_signo; - u32 sigev_notify; - u32 payload[(64 / 4) - 3]; -}; + u32 sigev_signo; + u32 sigev_notify; + u32 payload[(64 / 4) - 3]; +}; extern asmlinkage long sys_timer_create(clockid_t which_clock, @@ -1438,20 +1438,20 @@ sys32_timer_create(u32 clock, struct sigevent32 __user *se32, timer_t __user *timer_id) { struct sigevent __user *p = NULL; - if (se32) { + if (se32) { struct sigevent se; p = compat_alloc_user_space(sizeof(struct sigevent)); - memset(&se, 0, sizeof(struct sigevent)); + memset(&se, 0, sizeof(struct sigevent)); if (get_user(se.sigev_value.sival_int, &se32->sigev_value) || __get_user(se.sigev_signo, &se32->sigev_signo) || __get_user(se.sigev_notify, &se32->sigev_notify) || - __copy_from_user(&se._sigev_un._pad, &se32->payload, + __copy_from_user(&se._sigev_un._pad, &se32->payload, sizeof(se32->payload)) || copy_to_user(p, &se, sizeof(se))) return -EFAULT; - } + } return sys_timer_create(clock, p, timer_id); -} +} asmlinkage long sysn32_rt_sigtimedwait(const sigset_t __user *uthese, diff -urN linux/arch/mips/kernel/process.c linux/arch/mips/kernel/process.c --- linux/arch/mips/kernel/process.c 2005/05/31 11:49:19 1.79 +++ linux/arch/mips/kernel/process.c 2005/07/11 10:03:25 1.80 @@ -191,7 +191,7 @@ if (clone_flags & CLONE_SETTLS) ti->tp_value = regs->regs[7]; - + return 0; } diff -urN linux/arch/mips/kernel/r2300_switch.S linux/arch/mips/kernel/r2300_switch.S --- linux/arch/mips/kernel/r2300_switch.S 2004/03/18 01:29:04 1.35 +++ linux/arch/mips/kernel/r2300_switch.S 2005/07/11 10:03:25 1.36 @@ -35,7 +35,7 @@ /* * FPU context is saved iff the process has used it's FPU in the current * time slice as indicated by TIF_USEDFPU. In any case, the CU1 bit for user - * space STATUS register should be 0, so that a process *always* starts its + * space STATUS register should be 0, so that a process *always* starts its * userland with FPU disabled after each context switch. * * FPU will be enabled as soon as the process accesses FPU again, through @@ -55,7 +55,7 @@ cpu_save_nonscratch a0 sw ra, THREAD_REG31(a0) - /* + /* * check if we need to save FPU registers */ lw t3, TASK_THREAD_INFO(a0) diff -urN linux/arch/mips/kernel/r4k_switch.S linux/arch/mips/kernel/r4k_switch.S --- linux/arch/mips/kernel/r4k_switch.S 2005/07/06 12:08:13 1.39 +++ linux/arch/mips/kernel/r4k_switch.S 2005/07/11 10:03:25 1.40 @@ -33,7 +33,7 @@ /* * FPU context is saved iff the process has used it's FPU in the current * time slice as indicated by _TIF_USEDFPU. In any case, the CU1 bit for user - * space STATUS register should be 0, so that a process *always* starts its + * space STATUS register should be 0, so that a process *always* starts its * userland with FPU disabled after each context switch. * * FPU will be enabled as soon as the process accesses FPU again, through @@ -164,7 +164,7 @@ dmtc1 t1, $f31 1: #endif - + #ifdef CONFIG_CPU_MIPS32_R1 mtc1 t1, $f0 mtc1 t1, $f1 diff -urN linux/arch/mips/kernel/semaphore.c linux/arch/mips/kernel/semaphore.c --- linux/arch/mips/kernel/semaphore.c 2005/06/23 15:57:15 1.15 +++ linux/arch/mips/kernel/semaphore.c 2005/07/11 10:03:25 1.16 @@ -56,7 +56,7 @@ } else if (cpu_has_llsc) { __asm__ __volatile__( " .set mips3 \n" - "1: ll %0, %2 # __sem_update_count \n" + "1: ll %0, %2 # __sem_update_count \n" " sra %1, %0, 31 \n" " not %1 \n" " and %1, %0, %1 \n" diff -urN linux/arch/mips/kernel/signal32.c linux/arch/mips/kernel/signal32.c --- linux/arch/mips/kernel/signal32.c 2005/06/15 13:00:12 1.31 +++ linux/arch/mips/kernel/signal32.c 2005/07/11 10:03:25 1.32 @@ -604,7 +604,7 @@ if (!used_math()) goto out; - /* + /* * Save FPU state to signal context. Signal handler will "inherit" * current FPU state. */ diff -urN linux/arch/mips/kernel/sysirix.c linux/arch/mips/kernel/sysirix.c --- linux/arch/mips/kernel/sysirix.c 2005/03/17 21:50:49 1.70 +++ linux/arch/mips/kernel/sysirix.c 2005/07/11 10:03:25 1.71 @@ -1870,7 +1870,7 @@ struct irix_dirent64 __user *dirent; struct irix_dirent64_callback * buf = __buf; unsigned short reclen = ROUND_UP64(NAME_OFFSET64(dirent) + namlen + 1); - int err = 0; + int err = 0; if (!access_ok(VERIFY_WRITE, buf, sizeof(*buf))) return -EFAULT; diff -urN linux/arch/mips/kernel/vmlinux.lds.S linux/arch/mips/kernel/vmlinux.lds.S --- linux/arch/mips/kernel/vmlinux.lds.S 2005/06/21 13:56:31 1.14 +++ linux/arch/mips/kernel/vmlinux.lds.S 2005/07/11 10:03:25 1.15 @@ -15,7 +15,7 @@ /* This is the value for an Origin kernel, taken from an IRIX kernel. */ /* . = 0xc00000000001c000; */ - /* Set the vaddr for the text segment to a value + /* Set the vaddr for the text segment to a value >= 0xa800 0000 0001 9000 if no symmon is going to configured >= 0xa800 0000 0030 0000 otherwise */ diff -urN linux/arch/mips/lasat/at93c.c linux/arch/mips/lasat/at93c.c --- linux/arch/mips/lasat/at93c.c 2004/04/14 22:04:49 1.3 +++ linux/arch/mips/lasat/at93c.c 2005/07/11 10:03:26 1.4 @@ -1,7 +1,7 @@ -/* +/* * Atmel AT93C46 serial eeprom driver * - * Brian Murphy + * Brian Murphy * */ #include @@ -21,12 +21,12 @@ struct at93c_defs *at93c; -static void at93c_reg_write(u32 val) +static void at93c_reg_write(u32 val) { *at93c->reg = val; } -static u32 at93c_reg_read(void) +static u32 at93c_reg_read(void) { u32 tmp = *at93c->reg; return tmp; @@ -81,7 +81,7 @@ } static void at93c_write_bits(u32 data, int size) -{ +{ int i; int shift = size - 1; u32 mask = (1 << shift); @@ -90,7 +90,7 @@ at93c_write_databit((data & mask) >> shift); data <<= 1; } -} +} static void at93c_init_op(void) { @@ -104,8 +104,8 @@ lasat_ndelay(250); } -static void at93c_wait(void) -{ +static void at93c_wait(void) +{ at93c_init_op(); while (!at93c_read_databit()) ; diff -urN linux/arch/mips/lasat/at93c.h linux/arch/mips/lasat/at93c.h --- linux/arch/mips/lasat/at93c.h 2003/02/25 22:39:02 1.2 +++ linux/arch/mips/lasat/at93c.h 2005/07/11 10:03:26 1.3 @@ -1,7 +1,7 @@ -/* +/* * Atmel AT93C46 serial eeprom driver * - * Brian Murphy + * Brian Murphy * */ diff -urN linux/arch/mips/lasat/ds1603.c linux/arch/mips/lasat/ds1603.c --- linux/arch/mips/lasat/ds1603.c 2004/04/14 22:04:49 1.4 +++ linux/arch/mips/lasat/ds1603.c 2005/07/11 10:03:26 1.5 @@ -1,7 +1,7 @@ -/* - * Dallas Semiconductors 1603 RTC driver +/* + * Dallas Semiconductors 1603 RTC driver * - * Brian Murphy + * Brian Murphy * */ #include @@ -20,12 +20,12 @@ struct ds_defs *ds1603 = NULL; /* HW specific register functions */ -static void rtc_reg_write(unsigned long val) +static void rtc_reg_write(unsigned long val) { *ds1603->reg = val; } -static unsigned long rtc_reg_read(void) +static unsigned long rtc_reg_read(void) { unsigned long tmp = *ds1603->reg; return tmp; @@ -80,7 +80,7 @@ { unsigned int data; - data = (rtc_datareg_read() & (1 << ds1603->data_read_shift)) + data = (rtc_datareg_read() & (1 << ds1603->data_read_shift)) >> ds1603->data_read_shift; rtc_cycle_clock(rtc_reg_read()); return data; diff -urN linux/arch/mips/lasat/ds1603.h linux/arch/mips/lasat/ds1603.h --- linux/arch/mips/lasat/ds1603.h 2003/02/25 22:39:02 1.3 +++ linux/arch/mips/lasat/ds1603.h 2005/07/11 10:03:26 1.4 @@ -1,7 +1,7 @@ -/* - * Dallas Semiconductors 1603 RTC driver +/* + * Dallas Semiconductors 1603 RTC driver * - * Brian Murphy + * Brian Murphy * */ #ifndef __DS1603_H diff -urN linux/arch/mips/lasat/interrupt.c linux/arch/mips/lasat/interrupt.c --- linux/arch/mips/lasat/interrupt.c 2005/02/28 13:39:57 1.13 +++ linux/arch/mips/lasat/interrupt.c 2005/07/11 10:03:26 1.14 @@ -15,7 +15,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. * - * Routines for generic manipulation of the interrupts found on the + * Routines for generic manipulation of the interrupts found on the * Lasat boards. */ #include @@ -100,7 +100,7 @@ return *lasat_int_status & *lasat_int_mask; } -static unsigned long get_int_status_200(void) +static unsigned long get_int_status_200(void) { unsigned long int_status; diff -urN linux/arch/mips/lasat/lasat_board.c linux/arch/mips/lasat/lasat_board.c --- linux/arch/mips/lasat/lasat_board.c 2003/11/18 01:17:46 1.6 +++ linux/arch/mips/lasat/lasat_board.c 2005/07/11 10:03:26 1.7 @@ -67,7 +67,7 @@ if (mips_machtype == MACH_LASAT_100) { lasat_board_info.li_flash_base = 0x1e000000; - + lb[LASAT_MTD_BOOTLOADER] = 0x1e400000; if (lasat_board_info.li_flash_size > 0x200000) { @@ -103,7 +103,7 @@ memset(&lasat_board_info, 0, sizeof(lasat_board_info)); /* First read the EEPROM info */ - EEPROMRead(0, (unsigned char *)&lasat_board_info.li_eeprom_info, + EEPROMRead(0, (unsigned char *)&lasat_board_info.li_eeprom_info, sizeof(struct lasat_eeprom_struct)); /* Check the CRC */ @@ -188,7 +188,7 @@ case 0x1: lasat_board_info.li_cpu_hz = lasat_board_info.li_bus_hz + - (lasat_board_info.li_bus_hz >> 1); + (lasat_board_info.li_bus_hz >> 1); break; case 0x2: lasat_board_info.li_cpu_hz = @@ -271,7 +271,7 @@ lasat_board_info.li_eeprom_info.crc32 = crc; /* Write the EEPROM info */ - EEPROMWrite(0, (unsigned char *)&lasat_board_info.li_eeprom_info, + EEPROMWrite(0, (unsigned char *)&lasat_board_info.li_eeprom_info, sizeof(struct lasat_eeprom_struct)); } diff -urN linux/arch/mips/lasat/picvue.c linux/arch/mips/lasat/picvue.c --- linux/arch/mips/lasat/picvue.c 2003/02/25 22:39:02 1.3 +++ linux/arch/mips/lasat/picvue.c 2005/07/11 10:03:26 1.4 @@ -1,7 +1,7 @@ -/* +/* * Picvue PVC160206 display driver * - * Brian Murphy + * Brian Murphy * */ #include @@ -24,12 +24,12 @@ DECLARE_MUTEX(pvc_sem); -static void pvc_reg_write(u32 val) +static void pvc_reg_write(u32 val) { *picvue->reg = val; } -static u32 pvc_reg_read(void) +static u32 pvc_reg_read(void) { u32 tmp = *picvue->reg; return tmp; @@ -65,12 +65,12 @@ { u32 data = pvc_reg_read(); u8 byte; - data |= picvue->rw; + data |= picvue->rw; data &= ~picvue->rs; pvc_reg_write(data); ndelay(40); byte = pvc_read_byte(data); - data |= picvue->rs; + data |= picvue->rs; pvc_reg_write(data); return byte; } diff -urN linux/arch/mips/lasat/picvue.h linux/arch/mips/lasat/picvue.h --- linux/arch/mips/lasat/picvue.h 2003/02/25 22:39:02 1.3 +++ linux/arch/mips/lasat/picvue.h 2005/07/11 10:03:26 1.4 @@ -1,7 +1,7 @@ -/* +/* * Picvue PVC160206 display driver * - * Brian Murphy + * Brian Murphy * */ #include diff -urN linux/arch/mips/lasat/picvue_proc.c linux/arch/mips/lasat/picvue_proc.c --- linux/arch/mips/lasat/picvue_proc.c 2003/02/25 22:39:02 1.3 +++ linux/arch/mips/lasat/picvue_proc.c 2005/07/11 10:03:26 1.4 @@ -1,7 +1,7 @@ -/* +/* * Picvue PVC160206 display driver * - * Brian Murphy + * Brian Murphy * */ #include @@ -51,10 +51,10 @@ page += sprintf(page, "%s\n", pvc_lines[lineno]); up(&pvc_sem); - return page - origpage; + return page - origpage; } -static int pvc_proc_write_line(struct file *file, const char *buffer, +static int pvc_proc_write_line(struct file *file, const char *buffer, unsigned long count, void *data) { int origcount = count; @@ -119,7 +119,7 @@ page += sprintf(page, "%d\n", scroll_dir * scroll_interval); up(&pvc_sem); - return page - origpage; + return page - origpage; } diff -urN linux/arch/mips/lasat/prom.c linux/arch/mips/lasat/prom.c --- linux/arch/mips/lasat/prom.c 2004/04/14 22:04:49 1.10 +++ linux/arch/mips/lasat/prom.c 2005/07/11 10:03:26 1.11 @@ -42,7 +42,7 @@ /* these are functions provided by the bootloader */ static void (* prom_putc)(char c) = null_prom_putc; void (* prom_printf)(const char * fmt, ...) = null_prom_printf; -void (* prom_display)(const char *string, int pos, int clear) = +void (* prom_display)(const char *string, int pos, int clear) = null_prom_display; void (* prom_monitor)(void) = null_prom_monitor; diff -urN linux/arch/mips/lasat/reset.c linux/arch/mips/lasat/reset.c --- linux/arch/mips/lasat/reset.c 2003/11/18 01:17:46 1.5 +++ linux/arch/mips/lasat/reset.c 2005/07/11 10:03:26 1.6 @@ -1,4 +1,4 @@ -/* +/* * Thomas Horsten * Copyright (C) 2000 LASAT Networks A/S. * diff -urN linux/arch/mips/lasat/setup.c linux/arch/mips/lasat/setup.c --- linux/arch/mips/lasat/setup.c 2005/06/21 13:56:31 1.16 +++ linux/arch/mips/lasat/setup.c 2005/07/11 10:03:26 1.17 @@ -105,7 +105,7 @@ return NOTIFY_DONE; } -static struct notifier_block lasat_panic_block[] = +static struct notifier_block lasat_panic_block[] = { { lasat_panic_display, NULL, INT_MAX }, { lasat_panic_prom_monitor, NULL, INT_MIN } @@ -120,7 +120,7 @@ { write_c0_compare( - read_c0_count() + + read_c0_count() + mips_hpt_frequency / HZ); change_c0_status(ST0_IM, IE_IRQ0 | IE_IRQ5); } diff -urN linux/arch/mips/lasat/sysctl.c linux/arch/mips/lasat/sysctl.c --- linux/arch/mips/lasat/sysctl.c 2004/08/13 07:18:52 1.6 +++ linux/arch/mips/lasat/sysctl.c 2005/07/11 10:03:26 1.7 @@ -37,14 +37,14 @@ static DECLARE_MUTEX(lasat_info_sem); -/* Strategy function to write EEPROM after changing string entry */ +/* Strategy function to write EEPROM after changing string entry */ int sysctl_lasatstring(ctl_table *table, int *name, int nlen, void *oldval, size_t *oldlenp, void *newval, size_t newlen, void **context) { int r; down(&lasat_info_sem); - r = sysctl_string(table, name, + r = sysctl_string(table, name, nlen, oldval, oldlenp, newval, newlen, context); if (r < 0) { up(&lasat_info_sem); @@ -74,7 +74,7 @@ return 0; } -/* proc function to write EEPROM after changing int entry */ +/* proc function to write EEPROM after changing int entry */ int proc_dolasatint(ctl_table *table, int write, struct file *filp, void *buffer, size_t *lenp, loff_t *ppos) { @@ -93,7 +93,7 @@ static int rtctmp; #ifdef CONFIG_DS1603 -/* proc function to read/write RealTime Clock */ +/* proc function to read/write RealTime Clock */ int proc_dolasatrtc(ctl_table *table, int write, struct file *filp, void *buffer, size_t *lenp, loff_t *ppos) { @@ -165,9 +165,9 @@ void update_bcastaddr(void) { unsigned int ip; - - ip = (lasat_board_info.li_eeprom_info.ipaddr & - lasat_board_info.li_eeprom_info.netmask) | + + ip = (lasat_board_info.li_eeprom_info.ipaddr & + lasat_board_info.li_eeprom_info.netmask) | ~lasat_board_info.li_eeprom_info.netmask; sprintf(lasat_bcastaddr, "%d.%d.%d.%d", @@ -205,7 +205,7 @@ break; len++; } - if (len >= sizeof(proc_lasat_ipbuf)-1) + if (len >= sizeof(proc_lasat_ipbuf)-1) len = sizeof(proc_lasat_ipbuf) - 1; if (copy_from_user(proc_lasat_ipbuf, buffer, len)) { @@ -249,8 +249,8 @@ } #endif /* defined(CONFIG_INET) */ -static int sysctl_lasat_eeprom_value(ctl_table *table, int *name, int nlen, - void *oldval, size_t *oldlenp, +static int sysctl_lasat_eeprom_value(ctl_table *table, int *name, int nlen, + void *oldval, size_t *oldlenp, void *newval, size_t newlen, void **context) { @@ -293,7 +293,7 @@ if (!strcmp(filp->f_dentry->d_name.name, "debugaccess")) lasat_board_info.li_eeprom_info.debugaccess = lasat_board_info.li_debugaccess; } - lasat_write_eeprom_info(); + lasat_write_eeprom_info(); up(&lasat_info_sem); return 0; } @@ -316,8 +316,8 @@ 0644, NULL, &proc_lasat_ip, &sysctl_lasat_intvec}, {LASAT_NETMASK, "netmask", &lasat_board_info.li_eeprom_info.netmask, sizeof(int), 0644, NULL, &proc_lasat_ip, &sysctl_lasat_intvec}, - {LASAT_BCAST, "bcastaddr", &lasat_bcastaddr, - sizeof(lasat_bcastaddr), 0600, NULL, + {LASAT_BCAST, "bcastaddr", &lasat_bcastaddr, + sizeof(lasat_bcastaddr), 0600, NULL, &proc_dostring, &sysctl_string}, #endif {LASAT_PASSWORD, "passwd_hash", &lasat_board_info.li_eeprom_info.passwd_hash, sizeof(lasat_board_info.li_eeprom_info.passwd_hash), diff -urN linux/arch/mips/lasat/image/Makefile linux/arch/mips/lasat/image/Makefile --- linux/arch/mips/lasat/image/Makefile 2004/04/13 22:07:45 1.7 +++ linux/arch/mips/lasat/image/Makefile 2005/07/11 10:03:26 1.8 @@ -21,7 +21,7 @@ HEAD_DEFINES := -D_kernel_start=0x$(KERNEL_START) \ -D_kernel_entry=0x$(KERNEL_ENTRY) \ -D VERSION="\"$(Version)\"" \ - -D TIMESTAMP=$(shell date +%s) + -D TIMESTAMP=$(shell date +%s) $(obj)/head.o: $(obj)/head.S $(KERNEL_IMAGE) $(CC) -fno-pic $(HEAD_DEFINES) -I$(TOPDIR)/include -c -o $@ $< diff -urN linux/arch/mips/lasat/image/head.S linux/arch/mips/lasat/image/head.S --- linux/arch/mips/lasat/image/head.S 2002/10/06 21:21:28 1.2 +++ linux/arch/mips/lasat/image/head.S 2005/07/11 10:03:26 1.3 @@ -27,5 +27,5 @@ .word TIMESTAMP .org 0x50 -release: +release: .string VERSION diff -urN linux/arch/mips/lib/memcpy.S linux/arch/mips/lib/memcpy.S --- linux/arch/mips/lib/memcpy.S 2003/07/26 12:00:12 1.18 +++ linux/arch/mips/lib/memcpy.S 2005/07/11 10:03:27 1.19 @@ -101,7 +101,7 @@ #define NBYTES 8 #define LOG_NBYTES 3 -/* +/* * As we are sharing code base with the mips32 tree (which use the o32 ABI * register definitions). We need to redefine the register definitions from * the n64 ABI register naming to the o32 ABI register naming. @@ -118,7 +118,7 @@ #define t5 $13 #define t6 $14 #define t7 $15 - + #else #define LOAD lw diff -urN linux/arch/mips/lib-32/Makefile linux/arch/mips/lib-32/Makefile --- linux/arch/mips/lib-32/Makefile 2005/07/06 12:08:13 1.8 +++ linux/arch/mips/lib-32/Makefile 2005/07/11 10:03:27 1.9 @@ -2,7 +2,7 @@ # Makefile for MIPS-specific library files.. # -lib-y += csum_partial.o memset.o watch.o +lib-y += csum_partial.o memset.o watch.o obj-$(CONFIG_CPU_MIPS32_R1) += dump_tlb.o obj-$(CONFIG_CPU_MIPS64_R1) += dump_tlb.o diff -urN linux/arch/mips/lib-64/Makefile linux/arch/mips/lib-64/Makefile --- linux/arch/mips/lib-64/Makefile 2005/07/06 12:08:13 1.8 +++ linux/arch/mips/lib-64/Makefile 2005/07/11 10:03:27 1.9 @@ -2,7 +2,7 @@ # Makefile for MIPS-specific library files.. # -lib-y += csum_partial.o memset.o watch.o +lib-y += csum_partial.o memset.o watch.o obj-$(CONFIG_CPU_MIPS32_R1) += dump_tlb.o obj-$(CONFIG_CPU_MIPS64_R1) += dump_tlb.o diff -urN linux/arch/mips/math-emu/cp1emu.c linux/arch/mips/math-emu/cp1emu.c --- linux/arch/mips/math-emu/cp1emu.c 2005/05/11 12:02:48 1.37 +++ linux/arch/mips/math-emu/cp1emu.c 2005/07/11 10:03:27 1.38 @@ -454,7 +454,7 @@ * instruction */ xcp->cp0_epc += 4; - contpc = (void *) + contpc = (void *) (xcp->cp0_epc + (MIPSInst_SIMM(ir) << 2)); diff -urN linux/arch/mips/mips-boards/atlas/atlas_int.c linux/arch/mips/mips-boards/atlas/atlas_int.c --- linux/arch/mips/mips-boards/atlas/atlas_int.c 2005/02/28 13:39:57 1.23 +++ linux/arch/mips/mips-boards/atlas/atlas_int.c 2005/07/11 10:03:27 1.24 @@ -121,7 +121,7 @@ int i; atlas_hw0_icregs = (struct atlas_ictrl_regs *)ioremap (ATLAS_ICTRL_REGS_BASE, sizeof(struct atlas_ictrl_regs *)); - + /* * Mask out all interrupt by writing "1" to all bit position in * the interrupt reset reg. diff -urN linux/arch/mips/mips-boards/generic/init.c linux/arch/mips/mips-boards/generic/init.c --- linux/arch/mips/mips-boards/generic/init.c 2005/02/01 20:18:59 1.19 +++ linux/arch/mips/mips-boards/generic/init.c 2005/07/11 10:03:28 1.20 @@ -201,7 +201,7 @@ generic_putDebugChar = saa9730_putDebugChar; generic_getDebugChar = saa9730_getDebugChar; } - else + else #endif { speed = rs_kgdb_hook(line, speed); @@ -246,7 +246,7 @@ mips_revision_corid = MIPS_REVISION_CORID; if (mips_revision_corid == MIPS_REVISION_CORID_CORE_EMUL) { - if (BONITO_PCIDID == 0x0001df53 || + if (BONITO_PCIDID == 0x0001df53 || BONITO_PCIDID == 0x0003df53) mips_revision_corid = MIPS_REVISION_CORID_CORE_EMUL_BON; else @@ -312,7 +312,7 @@ case MIPS_REVISION_CORID_CORE_MSC: case MIPS_REVISION_CORID_CORE_FPGA2: case MIPS_REVISION_CORID_CORE_EMUL_MSC: - _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000); + _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000); mb(); MSC_READ(MSC01_PCI_CFG, data); diff -urN linux/arch/mips/mips-boards/generic/time.c linux/arch/mips/mips-boards/generic/time.c --- linux/arch/mips/mips-boards/generic/time.c 2004/09/19 12:30:04 1.24 +++ linux/arch/mips/mips-boards/generic/time.c 2005/07/11 10:03:28 1.25 @@ -89,7 +89,7 @@ * really calculate the timer frequency * For now we hardwire the SEAD board frequency to 12MHz. */ - + if ((prid == (PRID_COMP_MIPS | PRID_IMP_20KC)) || (prid == (PRID_COMP_MIPS | PRID_IMP_25KF))) count = 12000000; diff -urN linux/arch/mips/mips-boards/malta/malta_setup.c linux/arch/mips/mips-boards/malta/malta_setup.c --- linux/arch/mips/mips-boards/malta/malta_setup.c 2005/06/21 13:56:31 1.32 +++ linux/arch/mips/mips-boards/malta/malta_setup.c 2005/07/11 10:03:28 1.33 @@ -151,15 +151,15 @@ argptr = prom_getcmdline(); if (strstr(argptr, "iobcuncached")) { BONITO_PCICACHECTRL &= ~BONITO_PCICACHECTRL_IOBCCOH_EN; - BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG & + BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG & ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); printk("Disabled Bonito IOBC coherency\n"); } else { BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_IOBCCOH_EN; - BONITO_PCIMEMBASECFG |= - (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | + BONITO_PCIMEMBASECFG |= + (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); printk("Disabled Bonito IOBC coherency\n"); } diff -urN linux/arch/mips/mm/c-r4k.c linux/arch/mips/mm/c-r4k.c --- linux/arch/mips/mm/c-r4k.c 2005/04/25 16:36:23 1.108 +++ linux/arch/mips/mm/c-r4k.c 2005/07/11 10:03:28 1.109 @@ -127,13 +127,13 @@ CACHE32_UNROLL32_ALIGN2; /* I'm in even chunk. blast odd chunks */ - for (ws = 0; ws < ws_end; ws += ws_inc) - for (addr = start + 0x400; addr < end; addr += 0x400 * 2) + for (ws = 0; ws < ws_end; ws += ws_inc) + for (addr = start + 0x400; addr < end; addr += 0x400 * 2) cache32_unroll32(addr|ws,Index_Invalidate_I); CACHE32_UNROLL32_ALIGN; /* I'm in odd chunk. blast even chunks */ - for (ws = 0; ws < ws_end; ws += ws_inc) - for (addr = start; addr < end; addr += 0x400 * 2) + for (ws = 0; ws < ws_end; ws += ws_inc) + for (addr = start; addr < end; addr += 0x400 * 2) cache32_unroll32(addr|ws,Index_Invalidate_I); } @@ -157,13 +157,13 @@ CACHE32_UNROLL32_ALIGN2; /* I'm in even chunk. blast odd chunks */ - for (ws = 0; ws < ws_end; ws += ws_inc) - for (addr = start + 0x400; addr < end; addr += 0x400 * 2) + for (ws = 0; ws < ws_end; ws += ws_inc) + for (addr = start + 0x400; addr < end; addr += 0x400 * 2) cache32_unroll32(addr|ws,Index_Invalidate_I); CACHE32_UNROLL32_ALIGN; /* I'm in odd chunk. blast even chunks */ - for (ws = 0; ws < ws_end; ws += ws_inc) - for (addr = start; addr < end; addr += 0x400 * 2) + for (ws = 0; ws < ws_end; ws += ws_inc) + for (addr = start; addr < end; addr += 0x400 * 2) cache32_unroll32(addr|ws,Index_Invalidate_I); } diff -urN linux/arch/mips/mm/c-sb1.c linux/arch/mips/mm/c-sb1.c --- linux/arch/mips/mm/c-sb1.c 2005/03/18 17:36:53 1.57 +++ linux/arch/mips/mm/c-sb1.c 2005/07/11 10:03:28 1.58 @@ -270,7 +270,7 @@ __sb1_writeback_inv_dcache_all(); else __sb1_writeback_inv_dcache_range(start, end); - + /* Just flush the whole icache if the range is big enough */ if ((end - start) > icache_range_cutoff) __sb1_flush_icache_all(); diff -urN linux/arch/mips/mm/cerr-sb1.c linux/arch/mips/mm/cerr-sb1.c --- linux/arch/mips/mm/cerr-sb1.c 2004/12/13 17:33:59 1.12 +++ linux/arch/mips/mm/cerr-sb1.c 2005/07/11 10:03:28 1.13 @@ -25,7 +25,7 @@ #include #include #endif - + /* SB1 definitions */ /* XXX should come from config1 XXX */ @@ -136,14 +136,14 @@ #ifndef CONFIG_SIBYTE_BUS_WATCHER -static void check_bus_watcher(void) -{ +static void check_bus_watcher(void) +{ uint32_t status, l2_err, memio_err; /* Destructive read, clears register and interrupt */ status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS)); /* Bit 31 is always on, but there's no #define for that */ - if (status & ~(1UL << 31)) { + if (status & ~(1UL << 31)) { l2_err = csr_in32(IOADDR(A_BUS_L2_ERRORS)); memio_err = csr_in32(IOADDR(A_BUS_MEM_IO_ERRORS)); prom_printf("Bus watcher error counters: %08x %08x\n", l2_err, memio_err); @@ -153,14 +153,14 @@ (int)(G_SCD_BERR_TID(status) >> 6), (int)G_SCD_BERR_RID(status), (int)G_SCD_BERR_DCODE(status)); - } else { - prom_printf("Bus watcher indicates no error\n"); - } -} -#else -extern void check_bus_watcher(void); -#endif - + } else { + prom_printf("Bus watcher indicates no error\n"); + } +} +#else +extern void check_bus_watcher(void); +#endif + asmlinkage void sb1_cache_error(void) { uint64_t cerr_dpa; diff -urN linux/arch/mips/mm/dma-noncoherent.c linux/arch/mips/mm/dma-noncoherent.c --- linux/arch/mips/mm/dma-noncoherent.c 2005/04/08 18:57:59 1.12 +++ linux/arch/mips/mm/dma-noncoherent.c 2005/07/11 10:03:28 1.13 @@ -162,7 +162,7 @@ for (i = 0; i < nents; i++, sg++) { unsigned long addr; - + addr = (unsigned long) page_address(sg->page); if (addr) __dma_sync(addr + sg->offset, sg->length, direction); @@ -230,9 +230,9 @@ size_t size, enum dma_data_direction direction) { unsigned long addr; - + BUG_ON(direction == DMA_NONE); - + addr = dma_handle + PAGE_OFFSET; __dma_sync(addr, size, direction); } @@ -282,9 +282,9 @@ enum dma_data_direction direction) { int i; - + BUG_ON(direction == DMA_NONE); - + /* Make sure that gcc doesn't leave the empty loop body. */ for (i = 0; i < nelems; i++, sg++) __dma_sync((unsigned long)page_address(sg->page), diff -urN linux/arch/mips/mm/pg-sb1.c linux/arch/mips/mm/pg-sb1.c --- linux/arch/mips/mm/pg-sb1.c 2005/04/04 11:36:34 1.20 +++ linux/arch/mips/mm/pg-sb1.c 2005/07/11 10:03:28 1.21 @@ -200,7 +200,7 @@ /* * Pad descriptors to cacheline, since each is exclusively owned by a - * particular CPU. + * particular CPU. */ typedef struct dmadscr_s { u64 dscr_a; diff -urN linux/arch/mips/mm/tlbex.c linux/arch/mips/mm/tlbex.c --- linux/arch/mips/mm/tlbex.c 2005/07/08 20:10:17 1.27 +++ linux/arch/mips/mm/tlbex.c 2005/07/11 10:03:28 1.28 @@ -1261,7 +1261,7 @@ /* * TLB load/store/modify handlers. - * + * * Only the fastpath gets synthesized at runtime, the slowpath for * do_page_fault remains normal asm. */ diff -urN linux/arch/mips/momentum/jaguar_atx/int-handler.S linux/arch/mips/momentum/jaguar_atx/int-handler.S --- linux/arch/mips/momentum/jaguar_atx/int-handler.S 2004/03/19 04:46:42 1.7 +++ linux/arch/mips/momentum/jaguar_atx/int-handler.S 2005/07/11 10:03:28 1.8 @@ -27,11 +27,11 @@ SAVE_ALL CLI .set at - mfc0 t0, CP0_CAUSE + mfc0 t0, CP0_CAUSE mfc0 t2, CP0_STATUS and t0, t2 - + andi t1, t0, STATUSF_IP0 /* sw0 software interrupt */ bnez t1, ll_sw0_irq andi t1, t0, STATUSF_IP1 /* sw1 software interrupt */ @@ -103,25 +103,25 @@ move a1, sp jal do_IRQ j ret_from_irq - + ll_pcib_irq: li a0, 5 move a1, sp jal do_IRQ j ret_from_irq - + ll_uart_irq: li a0, 6 move a1, sp jal do_IRQ j ret_from_irq - + ll_cputimer_irq: li a0, 7 move a1, sp jal ll_timer_interrupt j ret_from_irq - + ll_mv64340_decode_irq: move a0, sp jal ll_mv64340_irq diff -urN linux/arch/mips/momentum/jaguar_atx/prom.c linux/arch/mips/momentum/jaguar_atx/prom.c --- linux/arch/mips/momentum/jaguar_atx/prom.c 2004/08/24 15:10:05 1.13 +++ linux/arch/mips/momentum/jaguar_atx/prom.c 2005/07/11 10:03:28 1.14 @@ -64,7 +64,7 @@ /* turn the clock off and read-strobe */ JAGUAR_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE); - + /* return the data */ return ((JAGUAR_FPGA_READ(EEPROM_MODE) >> 3) & 0x1); } diff -urN linux/arch/mips/momentum/jaguar_atx/setup.c linux/arch/mips/momentum/jaguar_atx/setup.c --- linux/arch/mips/momentum/jaguar_atx/setup.c 2005/07/07 21:44:24 1.16 +++ linux/arch/mips/momentum/jaguar_atx/setup.c 2005/07/11 10:03:28 1.17 @@ -451,7 +451,7 @@ #ifdef GEMDEBUG_TRACEBUFFER { unsigned int tbControl; - tbControl = + tbControl = 0 << 26 | /* post trigger delay 0 */ 0x2 << 16 | /* sequential trace mode */ // 0x0 << 16 | /* non-sequential trace mode */ diff -urN linux/arch/mips/momentum/ocelot_c/int-handler.S linux/arch/mips/momentum/ocelot_c/int-handler.S --- linux/arch/mips/momentum/ocelot_c/int-handler.S 2004/01/02 18:13:51 1.4 +++ linux/arch/mips/momentum/ocelot_c/int-handler.S 2005/07/11 10:03:28 1.5 @@ -27,11 +27,11 @@ SAVE_ALL CLI .set at - mfc0 t0, CP0_CAUSE + mfc0 t0, CP0_CAUSE mfc0 t2, CP0_STATUS and t0, t2 - + andi t1, t0, STATUSF_IP0 /* sw0 software interrupt */ bnez t1, ll_sw0_irq andi t1, t0, STATUSF_IP1 /* sw1 software interrupt */ @@ -83,7 +83,7 @@ move a1, sp jal do_IRQ j ret_from_irq - + ll_cpci_decode_irq: move a0, sp jal ll_cpci_irq @@ -99,4 +99,4 @@ move a1, sp jal do_IRQ j ret_from_irq - + diff -urN linux/arch/mips/momentum/ocelot_c/prom.c linux/arch/mips/momentum/ocelot_c/prom.c --- linux/arch/mips/momentum/ocelot_c/prom.c 2004/08/24 15:10:05 1.11 +++ linux/arch/mips/momentum/ocelot_c/prom.c 2005/07/11 10:03:28 1.12 @@ -67,7 +67,7 @@ /* turn the clock off and read-strobe */ OCELOT_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE); - + /* return the data */ return ((OCELOT_FPGA_READ(EEPROM_MODE) >> 3) & 0x1); } diff -urN linux/arch/mips/pci/fixup-cobalt.c linux/arch/mips/pci/fixup-cobalt.c --- linux/arch/mips/pci/fixup-cobalt.c 2005/04/11 12:46:57 1.11 +++ linux/arch/mips/pci/fixup-cobalt.c 2005/07/11 10:03:29 1.12 @@ -64,7 +64,7 @@ if (dev->devfn != PCI_DEVFN(0, 0)) return; - + /* Fix PCI latency-timer and cache-line-size values in Galileo * host bridge. */ diff -urN linux/arch/mips/pci/fixup-ddb5074.c linux/arch/mips/pci/fixup-ddb5074.c --- linux/arch/mips/pci/fixup-ddb5074.c 2004/08/24 15:10:05 1.3 +++ linux/arch/mips/pci/fixup-ddb5074.c 2005/07/11 10:03:29 1.4 @@ -5,7 +5,7 @@ { extern struct pci_dev *pci_pmu; u8 t8; - + pci_pmu = dev; /* for LEDs D2 and D3 */ /* Program the lines for LEDs D2 and D3 to output */ pci_read_config_byte(dev, 0x7d, &t8); diff -urN linux/arch/mips/pci/fixup-ddb5477.c linux/arch/mips/pci/fixup-ddb5477.c --- linux/arch/mips/pci/fixup-ddb5477.c 2004/08/24 15:10:05 1.4 +++ linux/arch/mips/pci/fixup-ddb5477.c 2005/07/11 10:03:29 1.5 @@ -65,7 +65,7 @@ ioaddr = pci_resource_start(dev, 0); inw(ioaddr + PCNET32_WIO_RESET); /* reset chip */ - + /* bcr_18 |= 0x0800 */ outw(18, ioaddr + PCNET32_WIO_RAP); temp = inw(ioaddr + PCNET32_WIO_BDP); diff -urN linux/arch/mips/pci/fixup-malta.c linux/arch/mips/pci/fixup-malta.c --- linux/arch/mips/pci/fixup-malta.c 2004/10/31 16:07:33 1.7 +++ linux/arch/mips/pci/fixup-malta.c 2005/07/11 10:03:29 1.8 @@ -56,7 +56,7 @@ 0, 0, 0, 3, 4, 5, 6, 7, 0, 9, 10, 11, - 12, 0, 14, 15 + 12, 0, 14, 15 }; int i; diff -urN linux/arch/mips/pci/fixup-rbtx4927.c linux/arch/mips/pci/fixup-rbtx4927.c --- linux/arch/mips/pci/fixup-rbtx4927.c 2004/11/12 03:10:46 1.4 +++ linux/arch/mips/pci/fixup-rbtx4927.c 2005/07/11 10:03:29 1.5 @@ -7,7 +7,7 @@ * Author: MontaVista Software, Inc. * ppopov@mvista.com or source@mvista.com * - * Copyright (C) 2000-2001 Toshiba Corporation + * Copyright (C) 2000-2001 Toshiba Corporation * * Copyright (C) 2004 MontaVista Software Inc. * Author: Manish Lachwani (mlachwani@mvista.com) diff -urN linux/arch/mips/pci/fixup-sni.c linux/arch/mips/pci/fixup-sni.c --- linux/arch/mips/pci/fixup-sni.c 2004/10/31 16:07:33 1.7 +++ linux/arch/mips/pci/fixup-sni.c 2005/07/11 10:03:29 1.8 @@ -32,7 +32,7 @@ * Device 4: Unused * Device 5: Slot 2 * Device 6: Slot 3 - * Device 7: Slot 4 + * Device 7: Slot 4 * * Documentation says the VGA is device 5 and device 3 is unused but that * seem to be a documentation error. At least on my RM200C the Cirrus diff -urN linux/arch/mips/pci/ops-au1000.c linux/arch/mips/pci/ops-au1000.c --- linux/arch/mips/pci/ops-au1000.c 2005/02/28 05:15:40 1.15 +++ linux/arch/mips/pci/ops-au1000.c 2005/07/11 10:03:29 1.16 @@ -119,7 +119,7 @@ last_entryLo0 = last_entryLo1 = 0xffffffff; } - /* Allow board vendors to implement their own off-chip idsel. + /* Allow board vendors to implement their own off-chip idsel. * If it doesn't succeed, may as well bail out at this point. */ if (board_pci_idsel) { diff -urN linux/arch/mips/pci/ops-ddb5477.c linux/arch/mips/pci/ops-ddb5477.c --- linux/arch/mips/pci/ops-ddb5477.c 2003/11/11 01:58:56 1.3 +++ linux/arch/mips/pci/ops-ddb5477.c 2005/07/11 10:03:29 1.4 @@ -127,7 +127,7 @@ } static int read_config_dword(struct pci_config_swap *swap, - struct pci_bus *bus, u32 devfn, u32 where, + struct pci_bus *bus, u32 devfn, u32 where, u32 * val) { u32 bus_num, slot_num, func_num; @@ -153,7 +153,7 @@ } static int read_config_word(struct pci_config_swap *swap, - struct pci_bus *bus, u32 devfn, u32 where, + struct pci_bus *bus, u32 devfn, u32 where, u16 * val) { int status; diff -urN linux/arch/mips/pci/ops-tx4927.c linux/arch/mips/pci/ops-tx4927.c --- linux/arch/mips/pci/ops-tx4927.c 2005/07/10 10:29:00 1.8 +++ linux/arch/mips/pci/ops-tx4927.c 2005/07/11 10:03:29 1.9 @@ -1,16 +1,16 @@ /* * Copyright 2001 MontaVista Software Inc. * Author: MontaVista Software, Inc. - * ahennessy@mvista.com + * ahennessy@mvista.com * - * Copyright (C) 2000-2001 Toshiba Corporation + * Copyright (C) 2000-2001 Toshiba Corporation * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) * * Based on arch/mips/ddb5xxx/ddb5477/pci_ops.c * * Define the pci_ops for the Toshiba rbtx4927 * - * Much of the code is derived from the original DDB5074 port by + * Much of the code is derived from the original DDB5074 port by * Geert Uytterhoeven * * Copyright 2004 MontaVista Software Inc. diff -urN linux/arch/mips/pci/pci-ddb5477.c linux/arch/mips/pci/pci-ddb5477.c --- linux/arch/mips/pci/pci-ddb5477.c 2004/10/31 16:07:33 1.11 +++ linux/arch/mips/pci/pci-ddb5477.c 2005/07/11 10:03:29 1.12 @@ -76,7 +76,7 @@ */ /* - * irq mapping : device -> pci int # -> vrc4377 irq# , + * irq mapping : device -> pci int # -> vrc4377 irq# , * ddb5477 board manual page 4 and vrc5477 manual page 46 */ @@ -137,9 +137,9 @@ unsigned char *slot_irq_map; unsigned char irq; - /* + /* * We ignore the swizzled slot and pin values. The original - * pci_fixup_irq() codes largely base irq number on the dev slot + * pci_fixup_irq() codes largely base irq number on the dev slot * numbers because except for one case they are unique even * though there are multiple pci buses. */ @@ -160,7 +160,7 @@ if (mips_machtype == MACH_NEC_ROCKHOPPERII) { /* hack to distinquish overlapping slot 20s, one - * on bus 0 (ALI USB on the M1535 on the backplane), + * on bus 0 (ALI USB on the M1535 on the backplane), * and one on bus 2 (NEC USB controller on the CPU board) * Make the M1535 USB - ISA IRQ number 9. */ diff -urN linux/arch/mips/pci/pci.c linux/arch/mips/pci/pci.c --- linux/arch/mips/pci/pci.c 2004/12/16 12:55:01 1.30 +++ linux/arch/mips/pci/pci.c 2005/07/11 10:03:29 1.31 @@ -132,7 +132,7 @@ hose->need_domain_info = need_domain_info; next_busno = bus->subordinate + 1; /* Don't allow 8-bit bus number overflow inside the hose - - reserve some space for bridges. */ + reserve some space for bridges. */ if (next_busno > 224) { next_busno = 0; need_domain_info = 1; @@ -260,7 +260,7 @@ (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { pci_read_bridge_bases(bus); pcibios_fixup_device_resources(dev, bus); - } + } for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) { struct pci_dev *dev = pci_dev_b(ln); diff -urN linux/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.c linux/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.c --- linux/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.c 2003/12/18 01:52:13 1.2 +++ linux/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.c 2005/07/11 10:03:29 1.3 @@ -30,7 +30,7 @@ * * This code reads the ATMEL 24CXX EEPROM. The PMC-Sierra Yosemite board uses the ATMEL * 24C32/24C64 which uses two byte addressing as compared to 24C16. Note that this program - * uses the serial port like /dev/ttyS0, to communicate with the EEPROM. Hence, you are + * uses the serial port like /dev/ttyS0, to communicate with the EEPROM. Hence, you are * expected to have a connectivity from the EEPROM to the serial port. This program does * __not__ communicate using the I2C protocol */ @@ -64,14 +64,14 @@ static void send_byte(unsigned char byte) { int i = 0; - - for (i = 7; i >= 0; i--) + + for (i = 7; i >= 0; i--) send_bit((byte >> i) & 0x01); } - + static void send_start(void) { - sda_hi; + sda_hi; delay(TXX); scl_hi; delay(TXX); @@ -114,9 +114,9 @@ int i; unsigned char byte=0; - for (i=7;i>=0;i--) + for (i=7;i>=0;i--) byte |= (recv_bit() << i); - + return byte; } diff -urN linux/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.h linux/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.h --- linux/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.h 2005/04/14 12:47:15 1.4 +++ linux/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.h 2005/07/11 10:03:29 1.5 @@ -27,7 +27,7 @@ */ /* - * Header file for atmel_read_eeprom.c + * Header file for atmel_read_eeprom.c */ #include @@ -45,7 +45,7 @@ #define DEFAULT_PORT "/dev/ttyS0" /* Port to open */ #define TXX 0 /* Dummy loop for spinning */ -#define BLOCK_SEL 0x00 +#define BLOCK_SEL 0x00 #define SLAVE_ADDR 0xa0 #define READ_BIT 0x01 #define WRITE_BIT 0x00 diff -urN linux/arch/mips/sgi-ip22/ip22-eisa.c linux/arch/mips/sgi-ip22/ip22-eisa.c --- linux/arch/mips/sgi-ip22/ip22-eisa.c 2003/09/30 14:27:18 1.7 +++ linux/arch/mips/sgi-ip22/ip22-eisa.c 2005/07/11 10:03:29 1.8 @@ -242,7 +242,7 @@ int i, c; char *str; u8 *slot_addr; - + if (!(sgimc->systemid & SGIMC_SYSID_EPRESENT)) { printk(KERN_INFO "EISA: bus not present.\n"); return 1; diff -urN linux/arch/mips/sgi-ip22/ip22-hpc.c linux/arch/mips/sgi-ip22/ip22-hpc.c --- linux/arch/mips/sgi-ip22/ip22-hpc.c 2003/11/18 05:15:20 1.7 +++ linux/arch/mips/sgi-ip22/ip22-hpc.c 2005/07/11 10:03:29 1.8 @@ -49,7 +49,7 @@ sgint = &sgioc->int3; system_type = "SGI Indy"; } - + sgi_ioc_reset = (SGIOC_RESET_PPORT | SGIOC_RESET_KBDMOUSE | SGIOC_RESET_EISA | SGIOC_RESET_ISDN | SGIOC_RESET_LC0OFF); diff -urN linux/arch/mips/sgi-ip22/ip22-int.c linux/arch/mips/sgi-ip22/ip22-int.c --- linux/arch/mips/sgi-ip22/ip22-int.c 2004/08/20 09:19:02 1.22 +++ linux/arch/mips/sgi-ip22/ip22-int.c 2005/07/11 10:03:29 1.23 @@ -28,7 +28,7 @@ /* #define DEBUG_SGINT */ /* So far nothing hangs here */ -#undef USE_LIO3_IRQ +#undef USE_LIO3_IRQ struct sgint_regs *sgint; @@ -272,32 +272,32 @@ irq_exit(); } -static struct irqaction local0_cascade = { +static struct irqaction local0_cascade = { .handler = no_action, .flags = SA_INTERRUPT, .name = "local0 cascade", }; -static struct irqaction local1_cascade = { +static struct irqaction local1_cascade = { .handler = no_action, .flags = SA_INTERRUPT, .name = "local1 cascade", }; -static struct irqaction buserr = { +static struct irqaction buserr = { .handler = no_action, .flags = SA_INTERRUPT, .name = "Bus Error", }; -static struct irqaction map0_cascade = { +static struct irqaction map0_cascade = { .handler = no_action, .flags = SA_INTERRUPT, .name = "mapable0 cascade", }; #ifdef USE_LIO3_IRQ -static struct irqaction map1_cascade = { +static struct irqaction map1_cascade = { .handler = no_action, .flags = SA_INTERRUPT, .name = "mapable1 cascade", diff -urN linux/arch/mips/sgi-ip22/ip22-nvram.c linux/arch/mips/sgi-ip22/ip22-nvram.c --- linux/arch/mips/sgi-ip22/ip22-nvram.c 2004/12/03 06:05:25 1.4 +++ linux/arch/mips/sgi-ip22/ip22-nvram.c 2005/07/11 10:03:29 1.5 @@ -39,7 +39,7 @@ *ptr |= EEPROM_CSEL; \ *ptr |= EEPROM_ECLK; }) - + #define eeprom_cs_off(ptr) ({ \ *ptr &= ~EEPROM_ECLK; \ *ptr &= ~EEPROM_CSEL; \ @@ -50,7 +50,7 @@ /* * clock in the nvram command and the register number. For the * national semiconductor nv ram chip the op code is 3 bits and - * the address is 6/8 bits. + * the address is 6/8 bits. */ static inline void eeprom_cmd(volatile unsigned int *ctrl, unsigned cmd, unsigned reg) @@ -90,7 +90,7 @@ if (*ctrl & EEPROM_DATI) res |= 1; } - + eeprom_cs_off(ctrl); return res; @@ -113,7 +113,7 @@ reg <<= 1; tmp = hpc3c0->bbram[reg++] & 0xff; return (tmp << 8) | (hpc3c0->bbram[reg] & 0xff); - } + } } EXPORT_SYMBOL(ip22_nvram_read); diff -urN linux/arch/mips/sgi-ip22/ip22-reset.c linux/arch/mips/sgi-ip22/ip22-reset.c --- linux/arch/mips/sgi-ip22/ip22-reset.c 2003/11/18 05:15:20 1.16 +++ linux/arch/mips/sgi-ip22/ip22-reset.c 2005/07/11 10:03:29 1.17 @@ -185,7 +185,7 @@ add_timer(&debounce_timer); } - /* Power button was pressed + /* Power button was pressed * ioc.ps page 22: "The Panel Register is called Power Control by Full * House. Only lowest 2 bits are used. Guiness uses upper four bits * for volume control". This is not true, all bits are pulled high diff -urN linux/arch/mips/sgi-ip22/ip22-time.c linux/arch/mips/sgi-ip22/ip22-time.c --- linux/arch/mips/sgi-ip22/ip22-time.c 2003/11/18 05:15:20 1.28 +++ linux/arch/mips/sgi-ip22/ip22-time.c 2005/07/11 10:03:29 1.29 @@ -126,7 +126,7 @@ unsigned long r4k_ticks[3]; unsigned long r4k_tick; - /* + /* * Figure out the r4k offset, the algorithm is very simple and works in * _all_ cases as long as the 8254 counter register itself works ok (as * an interrupt driving timer it does not because of bug, this is why diff -urN linux/arch/mips/sgi-ip27/ip27-memory.c linux/arch/mips/sgi-ip27/ip27-memory.c --- linux/arch/mips/sgi-ip27/ip27-memory.c 2005/01/15 01:31:06 1.28 +++ linux/arch/mips/sgi-ip27/ip27-memory.c 2005/07/11 10:03:30 1.29 @@ -538,7 +538,7 @@ for_each_online_node(node) { unsigned slot, numslots; struct page *end, *p; - + /* * This will free up the bootmem, ie, slot 0 memory. */ diff -urN linux/arch/mips/sgi-ip27/ip27-smp.c linux/arch/mips/sgi-ip27/ip27-smp.c --- linux/arch/mips/sgi-ip27/ip27-smp.c 2005/02/13 23:10:08 1.22 +++ linux/arch/mips/sgi-ip27/ip27-smp.c 2005/07/11 10:03:30 1.23 @@ -136,7 +136,7 @@ REMOTE_HUB_S(nasid, PI_INT_MASK1_A, 0); REMOTE_HUB_S(nasid, PI_INT_MASK1_B, 0); - for (i = 0; i < 128; i++) + for (i = 0; i < 128; i++) REMOTE_HUB_CLR_INTR(nasid, i); } diff -urN linux/arch/mips/sgi-ip32/ip32-reset.c linux/arch/mips/sgi-ip32/ip32-reset.c --- linux/arch/mips/sgi-ip32/ip32-reset.c 2005/01/10 01:17:37 1.9 +++ linux/arch/mips/sgi-ip32/ip32-reset.c 2005/07/11 10:03:30 1.10 @@ -140,7 +140,7 @@ reg_c = CMOS_READ(RTC_INTR_FLAGS); if (!(reg_c & RTC_IRQF)) { - printk(KERN_WARNING + printk(KERN_WARNING "%s: RTC IRQ without RTC_IRQF\n", __FUNCTION__); } /* Wait until interrupt goes away */ diff -urN linux/arch/mips/sibyte/cfe/cfe_error.h linux/arch/mips/sibyte/cfe/cfe_error.h --- linux/arch/mips/sibyte/cfe/cfe_error.h 2002/09/27 15:49:12 1.4 +++ linux/arch/mips/sibyte/cfe/cfe_error.h 2005/07/11 10:03:30 1.5 @@ -17,15 +17,15 @@ */ /* ********************************************************************* - * + * * Broadcom Common Firmware Environment (CFE) - * + * * Error codes File: cfe_error.h - * + * * CFE's global error code list is here. - * + * * Author: Mitch Lichtenberg - * + * ********************************************************************* */ diff -urN linux/arch/mips/sibyte/cfe/console.c linux/arch/mips/sibyte/cfe/console.c --- linux/arch/mips/sibyte/cfe/console.c 2003/11/18 01:17:47 1.5 +++ linux/arch/mips/sibyte/cfe/console.c 2005/07/11 10:03:30 1.6 @@ -38,7 +38,7 @@ last += written; } while (last < count); } - + } static int cfe_console_setup(struct console *cons, char *str) diff -urN linux/arch/mips/sibyte/cfe/setup.c linux/arch/mips/sibyte/cfe/setup.c --- linux/arch/mips/sibyte/cfe/setup.c 2004/11/21 19:32:20 1.20 +++ linux/arch/mips/sibyte/cfe/setup.c 2005/07/11 10:03:30 1.21 @@ -285,7 +285,7 @@ while (1) ; } cfe_init(cfe_handle, cfe_ept); - /* + /* * Get the handle for (at least) prom_putchar, possibly for * boot console */ diff -urN linux/arch/mips/sibyte/cfe/smp.c linux/arch/mips/sibyte/cfe/smp.c --- linux/arch/mips/sibyte/cfe/smp.c 2004/11/26 10:06:36 1.15 +++ linux/arch/mips/sibyte/cfe/smp.c 2005/07/11 10:03:30 1.16 @@ -57,7 +57,7 @@ void prom_boot_secondary(int cpu, struct task_struct *idle) { int retval; - + retval = cfe_cpu_start(cpu_logical_map(cpu), &smp_bootstrap, __KSTK_TOS(idle), (unsigned long)idle->thread_info, 0); diff -urN linux/arch/mips/sibyte/sb1250/bus_watcher.c linux/arch/mips/sibyte/sb1250/bus_watcher.c --- linux/arch/mips/sibyte/sb1250/bus_watcher.c 2005/02/22 21:51:35 1.10 +++ linux/arch/mips/sibyte/sb1250/bus_watcher.c 2005/07/11 10:03:30 1.11 @@ -10,13 +10,13 @@ * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. - * + * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* +/* * The Bus Watcher monitors internal bus transactions and maintains * counts of transactions with error status, logging details and * causing one of several interrupts. This driver provides a handler @@ -155,7 +155,7 @@ static void create_proc_decoder(struct bw_stats_struct *stats) { struct proc_dir_entry *ent; - + ent = create_proc_read_entry("bus_watcher", S_IWUSR | S_IRUGO, NULL, bw_read_proc, stats); if (!ent) { diff -urN linux/arch/mips/sibyte/sb1250/irq.c linux/arch/mips/sibyte/sb1250/irq.c --- linux/arch/mips/sibyte/sb1250/irq.c 2005/02/28 13:39:58 1.33 +++ linux/arch/mips/sibyte/sb1250/irq.c 2005/07/11 10:03:30 1.34 @@ -222,7 +222,7 @@ * Clear for all CPUs so an affinity switch * doesn't find an old status */ - __raw_writeq(pending, + __raw_writeq(pending, IOADDR(A_IMR_REGISTER(cpu, R_IMR_LDT_INTERRUPT_CLR))); } @@ -377,7 +377,7 @@ /* * Note that the timer interrupts are also mapped, but this is - * done in sb1250_time_init(). Also, the profiling driver + * done in sb1250_time_init(). Also, the profiling driver * does its own management of IP7. */ @@ -392,7 +392,7 @@ if (kgdb_flag) { kgdb_irq = K_INT_UART_0 + kgdb_port; -#ifdef CONFIG_SIBYTE_SB1250_DUART +#ifdef CONFIG_SIBYTE_SB1250_DUART sb1250_duart_present[kgdb_port] = 0; #endif /* Setup uart 1 settings, mapper */ diff -urN linux/arch/mips/sibyte/swarm/rtc_m41t81.c linux/arch/mips/sibyte/swarm/rtc_m41t81.c --- linux/arch/mips/sibyte/swarm/rtc_m41t81.c 2005/02/22 21:51:46 1.8 +++ linux/arch/mips/sibyte/swarm/rtc_m41t81.c 2005/07/11 10:03:31 1.9 @@ -129,7 +129,7 @@ /* Clear error bit by writing a 1 */ __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); return -1; - } + } /* read the same byte again to make sure it is written */ __raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE, @@ -137,7 +137,7 @@ while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) ; - + return 0; } @@ -149,13 +149,13 @@ /* * Note the write order matters as it ensures the correctness. - * When we write sec, 10th sec is clear. It is reasonable to + * When we write sec, 10th sec is clear. It is reasonable to * believe we should finish writing min within a second. */ tm.tm_sec = BIN2BCD(tm.tm_sec); m41t81_write(M41T81REG_SC, tm.tm_sec); - + tm.tm_min = BIN2BCD(tm.tm_min); m41t81_write(M41T81REG_MN, tm.tm_min); @@ -188,7 +188,7 @@ { unsigned int year, mon, day, hour, min, sec; - /* + /* * min is valid if two reads of sec are the same. */ for (;;) { diff -urN linux/arch/mips/sibyte/swarm/setup.c linux/arch/mips/sibyte/swarm/setup.c --- linux/arch/mips/sibyte/swarm/setup.c 2005/07/07 21:44:25 1.36 +++ linux/arch/mips/sibyte/swarm/setup.c 2005/07/11 10:03:31 1.37 @@ -98,7 +98,7 @@ rtc_get_time = xicor_get_time; rtc_set_time = xicor_set_time; } - + if (m41t81_probe()) { printk("swarm setup: M41T81 RTC detected.\n"); rtc_get_time = m41t81_get_time; diff -urN linux/arch/mips/sni/irq.c linux/arch/mips/sni/irq.c --- linux/arch/mips/sni/irq.c 2005/02/28 13:39:58 1.12 +++ linux/arch/mips/sni/irq.c 2005/07/11 10:03:31 1.13 @@ -102,7 +102,7 @@ /* * hwint 1 deals with EISA and SCSI interrupts, - * + * * The EISA_INT bit in CSITPEND is high active, all others are low active. */ void pciasic_hwint1(struct pt_regs *regs) diff -urN linux/arch/mips/sni/setup.c linux/arch/mips/sni/setup.c --- linux/arch/mips/sni/setup.c 2005/06/21 13:56:32 1.52 +++ linux/arch/mips/sni/setup.c 2005/07/11 10:03:31 1.53 @@ -111,7 +111,7 @@ * The RM200/RM300 has a few holes in it's PCI/EISA memory address space used * for other purposes. Be paranoid and allocate all of the before the PCI * code gets a chance to to map anything else there ... - * + * * This leaves the following areas available: * * 0x10000000 - 0x1009ffff (640kB) PCI/EISA/ISA Bus Memory diff -urN linux/arch/mips/tx4927/common/tx4927_irq_handler.S linux/arch/mips/tx4927/common/tx4927_irq_handler.S --- linux/arch/mips/tx4927/common/tx4927_irq_handler.S 2003/11/18 01:17:47 1.3 +++ linux/arch/mips/tx4927/common/tx4927_irq_handler.S 2005/07/11 10:03:31 1.4 @@ -42,13 +42,13 @@ CLI .set at - mfc0 t0, CP0_CAUSE + mfc0 t0, CP0_CAUSE mfc0 t1, CP0_STATUS and t0, t1 - + andi t1, t0, STATUSF_IP7 /* cpu timer */ bnez t1, ll_ip7 - + /* IP6..IP3 multiplexed -- do not use */ andi t1, t0, STATUSF_IP2 /* tx4927 pic */ diff -urN linux/arch/mips/tx4927/common/tx4927_setup.c linux/arch/mips/tx4927/common/tx4927_setup.c --- linux/arch/mips/tx4927/common/tx4927_setup.c 2005/06/27 22:07:43 1.9 +++ linux/arch/mips/tx4927/common/tx4927_setup.c 2005/07/11 10:03:31 1.10 @@ -148,7 +148,7 @@ print_cp0(key, 16, "CONFIG ", read_c0_config()); return; } - + void print_pic(char *key, u32 reg, char *name) { printk("%s pic:0x%08x:%s=0x%08x\n", key, reg, name, diff -urN linux/arch/mips/tx4927/toshiba_rbtx4927/Makefile linux/arch/mips/tx4927/toshiba_rbtx4927/Makefile --- linux/arch/mips/tx4927/toshiba_rbtx4927/Makefile 2003/11/15 02:20:59 1.3 +++ linux/arch/mips/tx4927/toshiba_rbtx4927/Makefile 2005/07/11 10:03:31 1.4 @@ -1,5 +1,5 @@ -obj-y += toshiba_rbtx4927_prom.o -obj-y += toshiba_rbtx4927_setup.o -obj-y += toshiba_rbtx4927_irq.o +obj-y += toshiba_rbtx4927_prom.o +obj-y += toshiba_rbtx4927_setup.o +obj-y += toshiba_rbtx4927_irq.o EXTRA_AFLAGS := $(CFLAGS) diff -urN linux/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c linux/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c --- linux/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c 2005/01/14 03:03:24 1.12 +++ linux/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c 2005/07/11 10:03:31 1.13 @@ -31,7 +31,7 @@ /* -IRQ Device +IRQ Device 00 RBTX4927-ISA/00 01 RBTX4927-ISA/01 PS2/Keyboard 02 RBTX4927-ISA/02 Cascade RBTX4927-ISA (irqs 8-15) @@ -52,15 +52,15 @@ 16 TX4927-CP0/00 Software 0 17 TX4927-CP0/01 Software 1 18 TX4927-CP0/02 Cascade TX4927-CP0 -19 TX4927-CP0/03 Multiplexed -- do not use -20 TX4927-CP0/04 Multiplexed -- do not use -21 TX4927-CP0/05 Multiplexed -- do not use -22 TX4927-CP0/06 Multiplexed -- do not use +19 TX4927-CP0/03 Multiplexed -- do not use +20 TX4927-CP0/04 Multiplexed -- do not use +21 TX4927-CP0/05 Multiplexed -- do not use +22 TX4927-CP0/06 Multiplexed -- do not use 23 TX4927-CP0/07 CPU TIMER 24 TX4927-PIC/00 25 TX4927-PIC/01 -26 TX4927-PIC/02 +26 TX4927-PIC/02 27 TX4927-PIC/03 Cascade RBTX4927-IOC 28 TX4927-PIC/04 29 TX4927-PIC/05 RBTX4927 RTL-8019AS ethernet @@ -80,7 +80,7 @@ 43 TX4927-PIC/19 44 TX4927-PIC/20 45 TX4927-PIC/21 -46 TX4927-PIC/22 TX4927 PCI PCI-ERR +46 TX4927-PIC/22 TX4927 PCI PCI-ERR 47 TX4927-PIC/23 TX4927 PCI PCI-PMA (not used) 48 TX4927-PIC/24 49 TX4927-PIC/25 @@ -100,7 +100,7 @@ 62 RBTX4927-IOC/06 63 RBTX4927-IOC/07 -NOTES: +NOTES: SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58 SouthBridge/ISA/pin=0 no pci irq used by this device SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR via ISA IRQ14 @@ -175,19 +175,19 @@ static const u32 toshiba_rbtx4927_irq_debug_flag = (TOSHIBA_RBTX4927_IRQ_NONE | TOSHIBA_RBTX4927_IRQ_INFO | TOSHIBA_RBTX4927_IRQ_WARN | TOSHIBA_RBTX4927_IRQ_EROR -// | TOSHIBA_RBTX4927_IRQ_IOC_INIT -// | TOSHIBA_RBTX4927_IRQ_IOC_STARTUP -// | TOSHIBA_RBTX4927_IRQ_IOC_SHUTDOWN -// | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE -// | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE -// | TOSHIBA_RBTX4927_IRQ_IOC_MASK -// | TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ -// | TOSHIBA_RBTX4927_IRQ_ISA_INIT -// | TOSHIBA_RBTX4927_IRQ_ISA_STARTUP -// | TOSHIBA_RBTX4927_IRQ_ISA_SHUTDOWN -// | TOSHIBA_RBTX4927_IRQ_ISA_ENABLE -// | TOSHIBA_RBTX4927_IRQ_ISA_DISABLE -// | TOSHIBA_RBTX4927_IRQ_ISA_MASK +// | TOSHIBA_RBTX4927_IRQ_IOC_INIT +// | TOSHIBA_RBTX4927_IRQ_IOC_STARTUP +// | TOSHIBA_RBTX4927_IRQ_IOC_SHUTDOWN +// | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE +// | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE +// | TOSHIBA_RBTX4927_IRQ_IOC_MASK +// | TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ +// | TOSHIBA_RBTX4927_IRQ_ISA_INIT +// | TOSHIBA_RBTX4927_IRQ_ISA_STARTUP +// | TOSHIBA_RBTX4927_IRQ_ISA_SHUTDOWN +// | TOSHIBA_RBTX4927_IRQ_ISA_ENABLE +// | TOSHIBA_RBTX4927_IRQ_ISA_DISABLE +// | TOSHIBA_RBTX4927_IRQ_ISA_MASK // | TOSHIBA_RBTX4927_IRQ_ISA_ENDIRQ ); #endif diff -urN linux/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c linux/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c --- linux/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c 2005/03/04 17:24:33 1.15 +++ linux/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c 2005/07/11 10:03:31 1.16 @@ -400,7 +400,7 @@ /* enable secondary ide */ v08_43 |= 0x80; - /* + /* * !!! DO NOT REMOVE THIS COMMENT IT IS REQUIRED BY SMSC !!! * * This line of code is intended to provide the user with a work diff -urN linux/arch/mips/vr41xx/common/vrc4173.c linux/arch/mips/vr41xx/common/vrc4173.c --- linux/arch/mips/vr41xx/common/vrc4173.c 2005/01/15 01:31:06 1.11 +++ linux/arch/mips/vr41xx/common/vrc4173.c 2005/07/11 10:03:31 1.12 @@ -476,7 +476,7 @@ if (cascade_irq < GIU_IRQ(0) || cascade_irq > GIU_IRQ(15)) return -EINVAL; - + vrc4173_outw(0, VRC4173_MSYSINT1REG); vr41xx_set_irq_trigger(GIU_IRQ_TO_PIN(cascade_irq), TRIGGER_LEVEL, SIGNAL_THROUGH); diff -urN linux/arch/mips/vr41xx/nec-cmbvr4133/setup.c linux/arch/mips/vr41xx/nec-cmbvr4133/setup.c --- linux/arch/mips/vr41xx/nec-cmbvr4133/setup.c 2005/06/21 13:56:32 1.3 +++ linux/arch/mips/vr41xx/nec-cmbvr4133/setup.c 2005/07/11 10:03:31 1.4 @@ -37,13 +37,13 @@ .size = 0x1be0000, .offset = 0, .mask_flags = 0, - }, + }, { .name = "PMON", .size = 0x140000, .offset = MTDPART_OFS_APPEND, .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, + }, { .name = "User FS2", .size = MTDPART_SIZ_FULL, diff -urN linux/drivers/net/ioc3-eth.c linux/drivers/net/ioc3-eth.c --- linux/drivers/net/ioc3-eth.c 2005/07/01 10:43:17 1.101 +++ linux/drivers/net/ioc3-eth.c 2005/07/11 10:03:32 1.102 @@ -1524,7 +1524,7 @@ struct ethtool_drvinfo *info) { struct ioc3_private *ip = netdev_priv(dev); - + strcpy (info->driver, IOC3_NAME); strcpy (info->version, IOC3_VERSION); strcpy (info->bus_info, pci_name(ip->pdev)); @@ -1550,7 +1550,7 @@ spin_lock_irq(&ip->ioc3_lock); rc = mii_ethtool_sset(&ip->mii, cmd); spin_unlock_irq(&ip->ioc3_lock); - + return rc; } diff -urN linux/include/asm-mips/asmmacro.h linux/include/asm-mips/asmmacro.h --- linux/include/asm-mips/asmmacro.h 2004/05/27 12:54:17 1.14 +++ linux/include/asm-mips/asmmacro.h 2005/07/11 10:03:32 1.15 @@ -7,10 +7,10 @@ */ #ifndef _ASM_ASMMACRO_H #define _ASM_ASMMACRO_H - + #include #include - + #ifdef CONFIG_MIPS32 #include #endif diff -urN linux/include/asm-mips/bitops.h linux/include/asm-mips/bitops.h --- linux/include/asm-mips/bitops.h 2005/06/23 15:57:18 1.59 +++ linux/include/asm-mips/bitops.h 2005/07/11 10:03:32 1.60 @@ -20,13 +20,13 @@ #define SZLONG_MASK 31UL #define __LL "ll " #define __SC "sc " -#define cpu_to_lelongp(x) cpu_to_le32p((__u32 *) (x)) +#define cpu_to_lelongp(x) cpu_to_le32p((__u32 *) (x)) #elif (_MIPS_SZLONG == 64) #define SZLONG_LOG 6 #define SZLONG_MASK 63UL #define __LL "lld " #define __SC "scd " -#define cpu_to_lelongp(x) cpu_to_le64p((__u64 *) (x)) +#define cpu_to_lelongp(x) cpu_to_le64p((__u64 *) (x)) #endif #ifdef __KERNEL__ diff -urN linux/include/asm-mips/fpregdef.h linux/include/asm-mips/fpregdef.h --- linux/include/asm-mips/fpregdef.h 2003/07/29 03:21:47 1.2 +++ linux/include/asm-mips/fpregdef.h 2005/07/11 10:03:32 1.3 @@ -13,7 +13,7 @@ #define _ASM_FPREGDEF_H #include - + #if _MIPS_SIM == _MIPS_SIM_ABI32 /* @@ -56,7 +56,7 @@ #define fcr31 $31 /* FPU status register */ #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ - + #if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 #define fv0 $f0 /* return value */ diff -urN linux/include/asm-mips/fpu.h linux/include/asm-mips/fpu.h --- linux/include/asm-mips/fpu.h 2005/05/09 13:16:07 1.12 +++ linux/include/asm-mips/fpu.h 2005/07/11 10:03:32 1.13 @@ -95,7 +95,7 @@ if (cpu_has_fpu) { __enable_fpu(); KSTK_STATUS(current) |= ST0_CU1; - set_thread_flag(TIF_USEDFPU); + set_thread_flag(TIF_USEDFPU); } } @@ -103,7 +103,7 @@ { if (cpu_has_fpu) { KSTK_STATUS(current) &= ~ST0_CU1; - clear_thread_flag(TIF_USEDFPU); + clear_thread_flag(TIF_USEDFPU); __disable_fpu(); } } @@ -132,7 +132,7 @@ static inline fpureg_t *get_fpu_regs(struct task_struct *tsk) { if (cpu_has_fpu) { - if ((tsk == current) && __is_fpu_owner()) + if ((tsk == current) && __is_fpu_owner()) _save_fp(current); return tsk->thread.fpu.hard.fpr; } diff -urN linux/include/asm-mips/r4kcache.h linux/include/asm-mips/r4kcache.h --- linux/include/asm-mips/r4kcache.h 2004/12/07 02:08:34 1.24 +++ linux/include/asm-mips/r4kcache.h 2005/07/11 10:03:32 1.25 @@ -171,11 +171,11 @@ unsigned long start = INDEX_BASE; unsigned long end = start + current_cpu_data.dcache.waysize; unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit; - unsigned long ws_end = current_cpu_data.dcache.ways << + unsigned long ws_end = current_cpu_data.dcache.ways << current_cpu_data.dcache.waybit; unsigned long ws, addr; - for (ws = 0; ws < ws_end; ws += ws_inc) + for (ws = 0; ws < ws_end; ws += ws_inc) for (addr = start; addr < end; addr += 0x200) cache16_unroll32(addr|ws,Index_Writeback_Inv_D); } @@ -200,8 +200,8 @@ current_cpu_data.dcache.waybit; unsigned long ws, addr; - for (ws = 0; ws < ws_end; ws += ws_inc) - for (addr = start; addr < end; addr += 0x200) + for (ws = 0; ws < ws_end; ws += ws_inc) + for (addr = start; addr < end; addr += 0x200) cache16_unroll32(addr|ws,Index_Writeback_Inv_D); } @@ -214,8 +214,8 @@ current_cpu_data.icache.waybit; unsigned long ws, addr; - for (ws = 0; ws < ws_end; ws += ws_inc) - for (addr = start; addr < end; addr += 0x200) + for (ws = 0; ws < ws_end; ws += ws_inc) + for (addr = start; addr < end; addr += 0x200) cache16_unroll32(addr|ws,Index_Invalidate_I); } @@ -239,8 +239,8 @@ current_cpu_data.icache.waybit; unsigned long ws, addr; - for (ws = 0; ws < ws_end; ws += ws_inc) - for (addr = start; addr < end; addr += 0x200) + for (ws = 0; ws < ws_end; ws += ws_inc) + for (addr = start; addr < end; addr += 0x200) cache16_unroll32(addr|ws,Index_Invalidate_I); } @@ -249,11 +249,11 @@ unsigned long start = INDEX_BASE; unsigned long end = start + current_cpu_data.scache.waysize; unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit; - unsigned long ws_end = current_cpu_data.scache.ways << + unsigned long ws_end = current_cpu_data.scache.ways << current_cpu_data.scache.waybit; unsigned long ws, addr; - for (ws = 0; ws < ws_end; ws += ws_inc) + for (ws = 0; ws < ws_end; ws += ws_inc) for (addr = start; addr < end; addr += 0x200) cache16_unroll32(addr|ws,Index_Writeback_Inv_SD); } @@ -278,8 +278,8 @@ current_cpu_data.scache.waybit; unsigned long ws, addr; - for (ws = 0; ws < ws_end; ws += ws_inc) - for (addr = start; addr < end; addr += 0x200) + for (ws = 0; ws < ws_end; ws += ws_inc) + for (addr = start; addr < end; addr += 0x200) cache16_unroll32(addr|ws,Index_Writeback_Inv_SD); } @@ -318,8 +318,8 @@ current_cpu_data.dcache.waybit; unsigned long ws, addr; - for (ws = 0; ws < ws_end; ws += ws_inc) - for (addr = start; addr < end; addr += 0x400) + for (ws = 0; ws < ws_end; ws += ws_inc) + for (addr = start; addr < end; addr += 0x400) cache32_unroll32(addr|ws,Index_Writeback_Inv_D); } @@ -343,8 +343,8 @@ current_cpu_data.dcache.waybit; unsigned long ws, addr; - for (ws = 0; ws < ws_end; ws += ws_inc) - for (addr = start; addr < end; addr += 0x400) + for (ws = 0; ws < ws_end; ws += ws_inc) + for (addr = start; addr < end; addr += 0x400) cache32_unroll32(addr|ws,Index_Writeback_Inv_D); } @@ -357,8 +357,8 @@ current_cpu_data.icache.waybit; unsigned long ws, addr; - for (ws = 0; ws < ws_end; ws += ws_inc) - for (addr = start; addr < end; addr += 0x400) + for (ws = 0; ws < ws_end; ws += ws_inc) + for (addr = start; addr < end; addr += 0x400) cache32_unroll32(addr|ws,Index_Invalidate_I); } @@ -383,7 +383,7 @@ unsigned long ws, addr; for (ws = 0; ws < ws_end; ws += ws_inc) - for (addr = start; addr < end; addr += 0x400) + for (addr = start; addr < end; addr += 0x400) cache32_unroll32(addr|ws,Index_Invalidate_I); } @@ -392,11 +392,11 @@ unsigned long start = INDEX_BASE; unsigned long end = start + current_cpu_data.scache.waysize; unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit; - unsigned long ws_end = current_cpu_data.scache.ways << + unsigned long ws_end = current_cpu_data.scache.ways << current_cpu_data.scache.waybit; unsigned long ws, addr; - for (ws = 0; ws < ws_end; ws += ws_inc) + for (ws = 0; ws < ws_end; ws += ws_inc) for (addr = start; addr < end; addr += 0x400) cache32_unroll32(addr|ws,Index_Writeback_Inv_SD); } @@ -421,8 +421,8 @@ current_cpu_data.scache.waybit; unsigned long ws, addr; - for (ws = 0; ws < ws_end; ws += ws_inc) - for (addr = start; addr < end; addr += 0x400) + for (ws = 0; ws < ws_end; ws += ws_inc) + for (addr = start; addr < end; addr += 0x400) cache32_unroll32(addr|ws,Index_Writeback_Inv_SD); } @@ -461,8 +461,8 @@ current_cpu_data.icache.waybit; unsigned long ws, addr; - for (ws = 0; ws < ws_end; ws += ws_inc) - for (addr = start; addr < end; addr += 0x800) + for (ws = 0; ws < ws_end; ws += ws_inc) + for (addr = start; addr < end; addr += 0x800) cache64_unroll32(addr|ws,Index_Invalidate_I); } @@ -487,7 +487,7 @@ unsigned long ws, addr; for (ws = 0; ws < ws_end; ws += ws_inc) - for (addr = start; addr < end; addr += 0x800) + for (addr = start; addr < end; addr += 0x800) cache64_unroll32(addr|ws,Index_Invalidate_I); } @@ -496,11 +496,11 @@ unsigned long start = INDEX_BASE; unsigned long end = start + current_cpu_data.scache.waysize; unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit; - unsigned long ws_end = current_cpu_data.scache.ways << + unsigned long ws_end = current_cpu_data.scache.ways << current_cpu_data.scache.waybit; unsigned long ws, addr; - for (ws = 0; ws < ws_end; ws += ws_inc) + for (ws = 0; ws < ws_end; ws += ws_inc) for (addr = start; addr < end; addr += 0x800) cache64_unroll32(addr|ws,Index_Writeback_Inv_SD); } @@ -525,8 +525,8 @@ current_cpu_data.scache.waybit; unsigned long ws, addr; - for (ws = 0; ws < ws_end; ws += ws_inc) - for (addr = start; addr < end; addr += 0x800) + for (ws = 0; ws < ws_end; ws += ws_inc) + for (addr = start; addr < end; addr += 0x800) cache64_unroll32(addr|ws,Index_Writeback_Inv_SD); } @@ -561,11 +561,11 @@ unsigned long start = INDEX_BASE; unsigned long end = start + current_cpu_data.scache.waysize; unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit; - unsigned long ws_end = current_cpu_data.scache.ways << + unsigned long ws_end = current_cpu_data.scache.ways << current_cpu_data.scache.waybit; unsigned long ws, addr; - for (ws = 0; ws < ws_end; ws += ws_inc) + for (ws = 0; ws < ws_end; ws += ws_inc) for (addr = start; addr < end; addr += 0x1000) cache128_unroll32(addr|ws,Index_Writeback_Inv_SD); } @@ -590,8 +590,8 @@ current_cpu_data.scache.waybit; unsigned long ws, addr; - for (ws = 0; ws < ws_end; ws += ws_inc) - for (addr = start; addr < end; addr += 0x1000) + for (ws = 0; ws < ws_end; ws += ws_inc) + for (addr = start; addr < end; addr += 0x1000) cache128_unroll32(addr|ws,Index_Writeback_Inv_SD); } diff -urN linux/include/asm-mips/rtc.h linux/include/asm-mips/rtc.h --- linux/include/asm-mips/rtc.h 2004/02/05 00:05:48 1.2 +++ linux/include/asm-mips/rtc.h 2005/07/11 10:03:32 1.3 @@ -1,5 +1,5 @@ /* - * include/asm-mips/rtc.h + * include/asm-mips/rtc.h * * (Really an interface for drivers/char/genrtc.c) * diff -urN linux/include/asm-mips/sigcontext.h linux/include/asm-mips/sigcontext.h --- linux/include/asm-mips/sigcontext.h 2005/05/31 11:49:19 1.14 +++ linux/include/asm-mips/sigcontext.h 2005/07/11 10:03:32 1.15 @@ -10,7 +10,7 @@ #define _ASM_SIGCONTEXT_H #include - + #if _MIPS_SIM == _MIPS_SIM_ABI32 /* @@ -39,7 +39,7 @@ }; #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ - + #if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 /* diff -urN linux/include/asm-mips/socket.h linux/include/asm-mips/socket.h --- linux/include/asm-mips/socket.h 2004/10/26 03:28:00 1.20 +++ linux/include/asm-mips/socket.h 2005/07/11 10:03:32 1.21 @@ -80,7 +80,7 @@ * @SOCK_STREAM - stream (connection) socket * @SOCK_RAW - raw socket * @SOCK_RDM - reliably-delivered message - * @SOCK_SEQPACKET - sequential packet socket + * @SOCK_SEQPACKET - sequential packet socket * @SOCK_PACKET - linux specific way of getting packets at the dev level. * For writing rarp and other similar things on the user level. */ diff -urN linux/include/asm-mips/statfs.h linux/include/asm-mips/statfs.h --- linux/include/asm-mips/statfs.h 2004/09/24 14:54:25 1.6 +++ linux/include/asm-mips/statfs.h 2005/07/11 10:03:32 1.7 @@ -57,7 +57,7 @@ }; #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ - + #if _MIPS_SIM == _MIPS_SIM_ABI64 struct statfs64 { /* Same as struct statfs */ diff -urN linux/include/asm-mips/thread_info.h linux/include/asm-mips/thread_info.h --- linux/include/asm-mips/thread_info.h 2005/04/13 17:44:00 1.20 +++ linux/include/asm-mips/thread_info.h 2005/07/11 10:03:32 1.21 @@ -133,7 +133,7 @@ /* work to do on interrupt/exception return */ #define _TIF_WORK_MASK (0x0000ffef & ~_TIF_SECCOMP) /* work to do on any return to u-space */ -#define _TIF_ALLWORK_MASK (0x8000ffff & ~_TIF_SECCOMP) +#define _TIF_ALLWORK_MASK (0x8000ffff & ~_TIF_SECCOMP) #endif /* __KERNEL__ */ diff -urN linux/include/asm-mips/titan_dep.h linux/include/asm-mips/titan_dep.h --- linux/include/asm-mips/titan_dep.h 2004/07/29 21:58:31 1.9 +++ linux/include/asm-mips/titan_dep.h 2005/07/11 10:03:32 1.10 @@ -228,4 +228,4 @@ #define RM9K_READ_8(ofs, val) *(val) = *(volatile u8 *)(RM9000x2_BASE_ADDR+ofs) #define RM9K_READ_16(ofs, val) *(val) = *(volatile u16 *)(RM9000x2_BASE_ADDR+ofs) -#endif +#endif diff -urN linux/include/asm-mips/war.h linux/include/asm-mips/war.h --- linux/include/asm-mips/war.h 2005/06/15 13:00:12 1.20 +++ linux/include/asm-mips/war.h 2005/07/11 10:03:32 1.21 @@ -113,7 +113,7 @@ */ #define BCM1250_M3_WAR 1 -/* +/* * This is a DUART workaround related to glitches around register accesses */ #define SIBYTE_1956_WAR 1 @@ -122,7 +122,7 @@ /* * Fill buffers not flushed on CACHE instructions - * + * * Hit_Invalidate_I cacheops invalidate an icache line but the refill * for that line can get stale data from the fill buffer instead of * accessing memory if the previous icache miss was also to that line. diff -urN linux/include/asm-mips/xxs1500.h linux/include/asm-mips/xxs1500.h --- linux/include/asm-mips/xxs1500.h 2004/01/15 06:27:55 1.2 +++ linux/include/asm-mips/xxs1500.h 2005/07/11 10:03:32 1.3 @@ -22,7 +22,7 @@ * * ######################################################################## * - * + * */ #ifndef __ASM_XXS1500_H #define __ASM_XXS1500_H diff -urN linux/include/asm-mips/ddb5xxx/ddb5477.h linux/include/asm-mips/ddb5xxx/ddb5477.h --- linux/include/asm-mips/ddb5xxx/ddb5477.h 2003/02/26 21:15:05 1.7 +++ linux/include/asm-mips/ddb5xxx/ddb5477.h 2005/07/11 10:03:32 1.8 @@ -247,7 +247,7 @@ * All PCI irq but INTC are active low. */ -/* +/* * irq number block assignment */ @@ -285,7 +285,7 @@ #define VRC5477_IRQ_IOPCI_INTB (17 + VRC5477_IRQ_BASE) /* USB-P */ #define VRC5477_IRQ_IOPCI_INTC (18 + VRC5477_IRQ_BASE) /* AC97 */ #define VRC5477_IRQ_IOPCI_INTD (19 + VRC5477_IRQ_BASE) /* Reserved */ -#define VRC5477_IRQ_UART1 (20 + VRC5477_IRQ_BASE) +#define VRC5477_IRQ_UART1 (20 + VRC5477_IRQ_BASE) #define VRC5477_IRQ_SPT0 (21 + VRC5477_IRQ_BASE) /* special purpose timer 0 */ #define VRC5477_IRQ_GPT0 (22 + VRC5477_IRQ_BASE) /* general purpose timer 0 */ #define VRC5477_IRQ_GPT1 (23 + VRC5477_IRQ_BASE) /* general purpose timer 1 */ @@ -301,7 +301,7 @@ /* * i2859 irq assignment */ -#define I8259_IRQ_RESERVED_0 (0 + I8259_IRQ_BASE) +#define I8259_IRQ_RESERVED_0 (0 + I8259_IRQ_BASE) #define I8259_IRQ_KEYBOARD (1 + I8259_IRQ_BASE) /* M1543 default */ #define I8259_IRQ_CASCADE (2 + I8259_IRQ_BASE) #define I8259_IRQ_UART_B (3 + I8259_IRQ_BASE) /* M1543 default, may conflict with RTC according to schematic diagram */ diff -urN linux/include/asm-mips/ip32/mace.h linux/include/asm-mips/ip32/mace.h --- linux/include/asm-mips/ip32/mace.h 2004/08/31 16:49:32 1.11 +++ linux/include/asm-mips/ip32/mace.h 2005/07/11 10:03:32 1.12 @@ -94,7 +94,7 @@ unsigned long xxx; /* later... */ }; -/* +/* * Ethernet interface */ struct mace_ethernet { @@ -129,7 +129,7 @@ volatile unsigned long rx_fifo; }; -/* +/* * Peripherals */ @@ -251,7 +251,7 @@ timer_reg audio_out2; timer_reg video_in1; timer_reg video_in2; - timer_reg video_out; + timer_reg video_out; }; struct mace_perif { @@ -272,7 +272,7 @@ }; -/* +/* * ISA peripherals */ diff -urN linux/include/asm-mips/lasat/serial.h linux/include/asm-mips/lasat/serial.h --- linux/include/asm-mips/lasat/serial.h 2003/07/11 13:18:01 1.3 +++ linux/include/asm-mips/lasat/serial.h 2005/07/11 10:03:33 1.4 @@ -1,13 +1,13 @@ #include /* Lasat 100 boards serial configuration */ -#define LASAT_BASE_BAUD_100 ( 7372800 / 16 ) +#define LASAT_BASE_BAUD_100 ( 7372800 / 16 ) #define LASAT_UART_REGS_BASE_100 0x1c8b0000 #define LASAT_UART_REGS_SHIFT_100 2 #define LASATINT_UART_100 8 /* * LASAT 200 boards serial configuration */ -#define LASAT_BASE_BAUD_200 (100000000 / 16 / 12) +#define LASAT_BASE_BAUD_200 (100000000 / 16 / 12) #define LASAT_UART_REGS_BASE_200 (Vrc5074_PHYS_BASE + 0x0300) #define LASAT_UART_REGS_SHIFT_200 3 #define LASATINT_UART_200 13 diff -urN linux/include/asm-mips/mach-db1x00/db1x00.h linux/include/asm-mips/mach-db1x00/db1x00.h --- linux/include/asm-mips/mach-db1x00/db1x00.h 2005/01/15 01:31:04 1.7 +++ linux/include/asm-mips/mach-db1x00/db1x00.h 2005/07/11 10:03:33 1.8 @@ -23,7 +23,7 @@ * * ######################################################################## * - * + * */ #ifndef __ASM_DB1X00_H #define __ASM_DB1X00_H diff -urN linux/include/asm-mips/mach-jazz/floppy.h linux/include/asm-mips/mach-jazz/floppy.h --- linux/include/asm-mips/mach-jazz/floppy.h 2003/11/18 01:17:48 1.1 +++ linux/include/asm-mips/mach-jazz/floppy.h 2005/07/11 10:03:33 1.2 @@ -92,7 +92,7 @@ return request_irq(FLOPPY_IRQ, floppy_interrupt, SA_INTERRUPT | SA_SAMPLE_RANDOM, "floppy", NULL); } - + static inline void fd_free_irq(void) { free_irq(FLOPPY_IRQ, NULL); diff -urN linux/include/asm-mips/mach-pb1x00/pb1500.h linux/include/asm-mips/mach-pb1x00/pb1500.h --- linux/include/asm-mips/mach-pb1x00/pb1500.h 2004/01/13 08:09:22 1.1 +++ linux/include/asm-mips/mach-pb1x00/pb1500.h 2005/07/11 10:03:33 1.2 @@ -33,11 +33,11 @@ #define PCI_BOARD_REG 0xAE000010 #define PCMCIA_BOARD_REG 0xAE000010 #define PC_DEASSERT_RST 0x80 - #define PC_DRV_EN 0x10 + #define PC_DRV_EN 0x10 #define PB1500_G_CONTROL 0xAE000014 #define PB1500_RST_VDDI 0xAE00001C #define PB1500_LEDS 0xAE000018 - + #define PB1500_HEX_LED 0xAF000004 #define PB1500_HEX_LED_BLANK 0xAF000008 diff -urN linux/include/asm-mips/sgi/gio.h linux/include/asm-mips/sgi/gio.h --- linux/include/asm-mips/sgi/gio.h 2003/03/19 04:23:47 1.2 +++ linux/include/asm-mips/sgi/gio.h 2005/07/11 10:03:33 1.3 @@ -16,7 +16,7 @@ * * The Indigo and Indy have two GIO bus connectors. Indigo2 (all models) have * three physical connectors, but only two slots, GFX and EXP0. - * + * * There is 10MB of GIO address space for GIO64 slot devices * slot# slot type address range size * ----- --------- ----------------------- ----- diff -urN linux/include/asm-mips/sgi/hpc3.h linux/include/asm-mips/sgi/hpc3.h --- linux/include/asm-mips/sgi/hpc3.h 2003/07/10 15:20:38 1.4 +++ linux/include/asm-mips/sgi/hpc3.h 2005/07/11 10:03:33 1.5 @@ -221,7 +221,7 @@ #define HPC3_BESTAT_PIDMASK 0x3f700 /* DMA channel parity identifier */ u32 _unused1[0x14000/4 - 5]; /* padding */ - + /* Now direct PIO per-HPC3 peripheral access to external regs. */ volatile u32 scsi0_ext[256]; /* SCSI channel 0 external regs */ u32 _unused2[0x7c00/4]; @@ -304,7 +304,7 @@ volatile u32 bbram[8192-50-14]; /* Battery backed ram */ }; -/* +/* * It is possible to have two HPC3's within the address space on * one machine, though only having one is more likely on an Indy. */ diff -urN linux/include/asm-mips/sgi/ioc.h linux/include/asm-mips/sgi/ioc.h --- linux/include/asm-mips/sgi/ioc.h 2004/09/25 14:20:00 1.8 +++ linux/include/asm-mips/sgi/ioc.h 2005/07/11 10:03:33 1.9 @@ -16,7 +16,7 @@ #include #include -/* +/* * All registers are 8-bit wide alligned on 32-bit boundary. Bad things * happen if you try word access them. You have been warned. */ @@ -138,7 +138,7 @@ u8 _sysid[3]; volatile u8 sysid; #define SGIOC_SYSID_FULLHOUSE 0x01 -#define SGIOC_SYSID_BOARDREV(x) ((x & 0xe0) > 5) +#define SGIOC_SYSID_BOARDREV(x) ((x & 0xe0) > 5) #define SGIOC_SYSID_CHIPREV(x) ((x & 0x1e) > 1) u32 _unused2; u8 _read[3]; diff -urN linux/include/asm-mips/sgi/ip22.h linux/include/asm-mips/sgi/ip22.h --- linux/include/asm-mips/sgi/ip22.h 2003/07/10 15:20:38 1.4 +++ linux/include/asm-mips/sgi/ip22.h 2005/07/11 10:03:33 1.5 @@ -12,7 +12,7 @@ #ifndef _SGI_IP22_H #define _SGI_IP22_H -/* +/* * These are the virtual IRQ numbers, we divide all IRQ's into * 'spaces', the 'space' determines where and how to enable/disable * that particular IRQ on an SGI machine. HPC DMA and MC DMA interrups diff -urN linux/include/asm-mips/sgi/mc.h linux/include/asm-mips/sgi/mc.h --- linux/include/asm-mips/sgi/mc.h 2003/06/16 13:54:54 1.4 +++ linux/include/asm-mips/sgi/mc.h 2005/07/11 10:03:33 1.5 @@ -182,14 +182,14 @@ volatile u32 dtlb_hi3; u32 _unused33; volatile u32 dtlb_lo3; - + u32 _unused34[0x0392]; - + u32 _unused35; volatile u32 rpsscounter; /* Chirps at 100ns */ u32 _unused36[0x1000/4-2*4]; - + u32 _unused37; volatile u32 maddronly; /* Address DMA goes at */ u32 _unused38; diff -urN linux/include/asm-mips/sibyte/carmel.h linux/include/asm-mips/sibyte/carmel.h --- linux/include/asm-mips/sibyte/carmel.h 2003/11/18 01:17:48 1.2 +++ linux/include/asm-mips/sibyte/carmel.h 2005/07/11 10:03:33 1.3 @@ -25,12 +25,12 @@ #define SIBYTE_BOARD_NAME "Carmel" -#define GPIO_PHY_INTERRUPT 2 -#define GPIO_NONMASKABLE_INT 3 -#define GPIO_CF_INSERTED 6 -#define GPIO_MONTEREY_RESET 7 -#define GPIO_QUADUART_INT 8 -#define GPIO_CF_INT 9 +#define GPIO_PHY_INTERRUPT 2 +#define GPIO_NONMASKABLE_INT 3 +#define GPIO_CF_INSERTED 6 +#define GPIO_MONTEREY_RESET 7 +#define GPIO_QUADUART_INT 8 +#define GPIO_CF_INT 9 #define GPIO_FPGA_CCLK 10 #define GPIO_FPGA_DOUT 11 #define GPIO_FPGA_DIN 12 diff -urN linux/include/asm-mips/sibyte/sb1250_defs.h linux/include/asm-mips/sibyte/sb1250_defs.h --- linux/include/asm-mips/sibyte/sb1250_defs.h 2003/07/08 15:50:12 1.7 +++ linux/include/asm-mips/sibyte/sb1250_defs.h 2005/07/11 10:03:33 1.8 @@ -1,23 +1,23 @@ /* ********************************************************************* * SB1250 Board Support Package - * - * Global constants and macros File: sb1250_defs.h - * + * + * Global constants and macros File: sb1250_defs.h + * * This file contains macros and definitions used by the other * include files. * * SB1250 specification level: User's manual 1/02/02 - * + * * Author: Mitch Lichtenberg - * - ********************************************************************* + * + ********************************************************************* * * Copyright 2000,2001,2002,2003 * Broadcom Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, @@ -27,7 +27,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA ********************************************************************* */ @@ -105,7 +105,7 @@ #define SIBYTE_HDR_FMASK_112x_ALL 0x0000f00 #define SIBYTE_HDR_FMASK_112x_PASS1 0x0000100 -/* Bit mask for chip/revision. (use _ALL for all revisions of a chip). */ +/* Bit mask for chip/revision. (use _ALL for all revisions of a chip). */ #define SIBYTE_HDR_FMASK(chip, pass) \ (SIBYTE_HDR_FMASK_ ## chip ## _ ## pass) #define SIBYTE_HDR_FMASK_ALLREVS(chip) \ @@ -150,31 +150,31 @@ /* ********************************************************************* * Naming schemes for constants in these files: - * - * M_xxx MASK constant (identifies bits in a register). + * + * M_xxx MASK constant (identifies bits in a register). * For multi-bit fields, all bits in the field will * be set. * * K_xxx "Code" constant (value for data in a multi-bit * field). The value is right justified. * - * V_xxx "Value" constant. This is the same as the + * V_xxx "Value" constant. This is the same as the * corresponding "K_xxx" constant, except it is * shifted to the correct position in the register. * * S_xxx SHIFT constant. This is the number of bits that - * a field value (code) needs to be shifted + * a field value (code) needs to be shifted * (towards the left) to put the value in the right * position for the register. * - * A_xxx ADDRESS constant. This will be a physical + * A_xxx ADDRESS constant. This will be a physical * address. Use the PHYS_TO_K1 macro to generate * a K1SEG address. * * R_xxx RELATIVE offset constant. This is an offset from * an A_xxx constant (usually the first register in * a group). - * + * * G_xxx(X) GET value. This macro obtains a multi-bit field * from a register, masks it, and shifts it to * the bottom of the register (retrieving a K_xxx @@ -189,7 +189,7 @@ /* - * Cast to 64-bit number. Presumably the syntax is different in + * Cast to 64-bit number. Presumably the syntax is different in * assembly language. * * Note: you'll need to define uint32_t and uint64_t in your headers. diff -urN linux/include/asm-mips/sibyte/sb1250_dma.h linux/include/asm-mips/sibyte/sb1250_dma.h --- linux/include/asm-mips/sibyte/sb1250_dma.h 2003/07/08 15:50:12 1.5 +++ linux/include/asm-mips/sibyte/sb1250_dma.h 2005/07/11 10:03:33 1.6 @@ -1,24 +1,24 @@ /* ********************************************************************* * SB1250 Board Support Package - * + * * DMA definitions File: sb1250_dma.h - * + * * This module contains constants and macros useful for * programming the SB1250's DMA controllers, both the data mover * and the Ethernet DMA. - * + * * SB1250 specification level: User's manual 1/02/02 - * + * * Author: Mitch Lichtenberg - * - ********************************************************************* + * + ********************************************************************* * * Copyright 2000,2001,2002,2003 * Broadcom Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, @@ -28,7 +28,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA ********************************************************************* */ @@ -43,9 +43,9 @@ * DMA Registers ********************************************************************* */ -/* +/* * Ethernet and Serial DMA Configuration Register 0 (Table 7-4) - * Registers: DMA_CONFIG0_MAC_x_RX_CH_0 + * Registers: DMA_CONFIG0_MAC_x_RX_CH_0 * Registers: DMA_CONFIG0_MAC_x_TX_CH_0 * Registers: DMA_CONFIG0_SER_x_RX * Registers: DMA_CONFIG0_SER_x_TX @@ -98,7 +98,7 @@ /* * Ethernet and Serial DMA Configuration Register 1 (Table 7-5) - * Registers: DMA_CONFIG1_MAC_x_RX_CH_0 + * Registers: DMA_CONFIG1_MAC_x_RX_CH_0 * Registers: DMA_CONFIG1_DMA_x_TX_CH_0 * Registers: DMA_CONFIG1_SER_x_RX * Registers: DMA_CONFIG1_SER_x_TX @@ -152,11 +152,11 @@ /* * DMA Descriptor Count Registers (Table 7-8) */ - + /* No bitfields */ -/* +/* * Current Descriptor Address Register (Table 7-11) */ @@ -275,14 +275,14 @@ #define V_DMA_DSCRB_STATUS(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_STATUS) #define G_DMA_DSCRB_STATUS(x) _SB_GETVALUE(x,S_DMA_DSCRB_STATUS,M_DMA_DSCRB_STATUS) -/* +/* * Ethernet Descriptor Status Bits (Table 7-15) */ #define M_DMA_ETHRX_BADIP4CS _SB_MAKEMASK1(51) #define M_DMA_ETHRX_DSCRERR _SB_MAKEMASK1(52) -#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) +#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) /* Note: BADTCPCS is actually in DSCR_B options field */ #define M_DMA_ETHRX_BADTCPCS _SB_MAKEMASK1(0) #endif /* 1250 PASS2 || 112x PASS1 */ @@ -324,7 +324,7 @@ #define M_DMA_ETHTX_SOP _SB_MAKEMASK1(63) -/* +/* * Ethernet Transmit Options (Table 7-17) */ @@ -377,7 +377,7 @@ * Data Mover Registers ********************************************************************* */ -/* +/* * Data Mover Descriptor Base Address Register (Table 7-22) * Register: DM_DSCR_BASE_0 * Register: DM_DSCR_BASE_1 @@ -414,7 +414,7 @@ #define M_DM_DSCR_BASE_ABORT _SB_MAKEMASK1(62) #define M_DM_DSCR_BASE_ENABL _SB_MAKEMASK1(63) -/* +/* * Data Mover Descriptor Count Register (Table 7-25) */ diff -urN linux/include/asm-mips/sibyte/sb1250_genbus.h linux/include/asm-mips/sibyte/sb1250_genbus.h --- linux/include/asm-mips/sibyte/sb1250_genbus.h 2003/07/08 15:50:12 1.6 +++ linux/include/asm-mips/sibyte/sb1250_genbus.h 2005/07/11 10:03:34 1.7 @@ -1,23 +1,23 @@ /* ********************************************************************* * SB1250 Board Support Package - * + * * Generic Bus Constants File: sb1250_genbus.h - * - * This module contains constants and macros useful for + * + * This module contains constants and macros useful for * manipulating the SB1250's Generic Bus interface - * + * * SB1250 specification level: User's manual 1/02/02 - * + * * Author: Mitch Lichtenberg - * - ********************************************************************* + * + ********************************************************************* * * Copyright 2000,2001,2002,2003 * Broadcom Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, @@ -27,7 +27,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA ********************************************************************* */ diff -urN linux/include/asm-mips/sibyte/sb1250_int.h linux/include/asm-mips/sibyte/sb1250_int.h --- linux/include/asm-mips/sibyte/sb1250_int.h 2003/07/08 15:50:12 1.5 +++ linux/include/asm-mips/sibyte/sb1250_int.h 2005/07/11 10:03:34 1.6 @@ -1,23 +1,23 @@ /* ********************************************************************* * SB1250 Board Support Package - * + * * Interrupt Mapper definitions File: sb1250_int.h - * + * * This module contains constants for manipulating the SB1250's * interrupt mapper and definitions for the interrupt sources. - * + * * SB1250 specification level: User's manual 1/02/02 - * + * * Author: Mitch Lichtenberg - * - ********************************************************************* + * + ********************************************************************* * * Copyright 2000,2001,2002,2003 * Broadcom Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, @@ -27,7 +27,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA ********************************************************************* */ @@ -43,7 +43,7 @@ /* * Interrupt sources (Table 4-8, UM 0.2) - * + * * First, the interrupt numbers. */ diff -urN linux/include/asm-mips/sibyte/sb1250_l2c.h linux/include/asm-mips/sibyte/sb1250_l2c.h --- linux/include/asm-mips/sibyte/sb1250_l2c.h 2003/07/08 15:50:12 1.5 +++ linux/include/asm-mips/sibyte/sb1250_l2c.h 2005/07/11 10:03:34 1.6 @@ -1,23 +1,23 @@ /* ********************************************************************* * SB1250 Board Support Package - * + * * L2 Cache constants and macros File: sb1250_l2c.h - * + * * This module contains constants useful for manipulating the * level 2 cache. - * + * * SB1250 specification level: User's manual 1/02/02 - * + * * Author: Mitch Lichtenberg - * - ********************************************************************* + * + ********************************************************************* * * Copyright 2000,2001,2002,2003 * Broadcom Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, @@ -27,7 +27,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA ********************************************************************* */ diff -urN linux/include/asm-mips/sibyte/sb1250_ldt.h linux/include/asm-mips/sibyte/sb1250_ldt.h --- linux/include/asm-mips/sibyte/sb1250_ldt.h 2003/07/08 15:50:12 1.5 +++ linux/include/asm-mips/sibyte/sb1250_ldt.h 2005/07/11 10:03:34 1.6 @@ -1,23 +1,23 @@ /* ********************************************************************* * SB1250 Board Support Package - * + * * LDT constants File: sb1250_ldt.h - * - * This module contains constants and macros to describe - * the LDT interface on the SB1250. - * + * + * This module contains constants and macros to describe + * the LDT interface on the SB1250. + * * SB1250 specification level: User's manual 1/02/02 - * + * * Author: Mitch Lichtenberg - * - ********************************************************************* + * + ********************************************************************* * * Copyright 2000,2001,2002,2003 * Broadcom Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, @@ -27,7 +27,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA ********************************************************************* */ @@ -155,7 +155,7 @@ /* * LDT Status Register (Table 8-14). Note that these constants - * assume you've read the command and status register + * assume you've read the command and status register * together (32-bit read at offset 0x04) * * These bits also apply to the secondary status @@ -183,8 +183,8 @@ #define M_LDT_STATUS_DETPARERR _SB_MAKEMASK1_32(31) /* - * Bridge Control Register (Table 8-16). Note that these - * constants assume you've read the register as a 32-bit + * Bridge Control Register (Table 8-16). Note that these + * constants assume you've read the register as a 32-bit * read (offset 0x3C) */ diff -urN linux/include/asm-mips/sibyte/sb1250_mac.h linux/include/asm-mips/sibyte/sb1250_mac.h --- linux/include/asm-mips/sibyte/sb1250_mac.h 2003/07/08 15:50:12 1.5 +++ linux/include/asm-mips/sibyte/sb1250_mac.h 2005/07/11 10:03:34 1.6 @@ -1,23 +1,23 @@ /* ********************************************************************* * SB1250 Board Support Package - * + * * MAC constants and macros File: sb1250_mac.h - * + * * This module contains constants and macros for the SB1250's * ethernet controllers. - * + * * SB1250 specification level: User's manual 1/02/02 - * + * * Author: Mitch Lichtenberg - * - ********************************************************************* + * + ********************************************************************* * * Copyright 2000,2001,2002,2003 * Broadcom Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, @@ -27,7 +27,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA ********************************************************************* */ @@ -311,7 +311,7 @@ /* * These constants are used to configure the fields within the Frame - * Configuration Register. + * Configuration Register. */ #define K_MAC_IFG_RX_10 _SB_MAKE64(0) /* See table 176, not used */ @@ -393,7 +393,7 @@ * Register: MAC_INT_MASK_2 */ -/* +/* * Use these constants to shift the appropriate channel * into the CH0 position so the same tests can be used * on each channel. diff -urN linux/include/asm-mips/sibyte/sb1250_mc.h linux/include/asm-mips/sibyte/sb1250_mc.h --- linux/include/asm-mips/sibyte/sb1250_mc.h 2003/07/08 15:50:12 1.5 +++ linux/include/asm-mips/sibyte/sb1250_mc.h 2005/07/11 10:03:34 1.6 @@ -1,23 +1,23 @@ /* ********************************************************************* * SB1250 Board Support Package - * - * Memory Controller constants File: sb1250_mc.h - * + * + * Memory Controller constants File: sb1250_mc.h + * * This module contains constants and macros useful for * programming the memory controller. - * + * * SB1250 specification level: User's manual 1/02/02 - * + * * Author: Mitch Lichtenberg - * - ********************************************************************* + * + ********************************************************************* * * Copyright 2000,2001,2002,2003 * Broadcom Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, @@ -27,7 +27,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA ********************************************************************* */ @@ -166,7 +166,7 @@ #define K_MC_REF_RATE_100MHz 0x62 #define K_MC_REF_RATE_133MHz 0x81 -#define K_MC_REF_RATE_200MHz 0xC4 +#define K_MC_REF_RATE_200MHz 0xC4 #define V_MC_REF_RATE_100MHz V_MC_REF_RATE(K_MC_REF_RATE_100MHz) #define V_MC_REF_RATE_133MHz V_MC_REF_RATE(K_MC_REF_RATE_133MHz) @@ -228,7 +228,7 @@ V_MC_ADDR_DRIVE_DEFAULT | \ V_MC_DATA_DRIVE_DEFAULT | \ V_MC_CLOCK_DRIVE_DEFAULT | \ - V_MC_REF_RATE_DEFAULT + V_MC_REF_RATE_DEFAULT diff -urN linux/include/asm-mips/sibyte/sb1250_regs.h linux/include/asm-mips/sibyte/sb1250_regs.h --- linux/include/asm-mips/sibyte/sb1250_regs.h 2003/07/08 15:50:12 1.5 +++ linux/include/asm-mips/sibyte/sb1250_regs.h 2005/07/11 10:03:34 1.6 @@ -1,23 +1,23 @@ /* ********************************************************************* * SB1250 Board Support Package - * + * * Register Definitions File: sb1250_regs.h - * + * * This module contains the addresses of the on-chip peripherals * on the SB1250. - * + * * SB1250 specification level: 01/02/2002 - * + * * Author: Mitch Lichtenberg - * - ********************************************************************* + * + ********************************************************************* * * Copyright 2000,2001,2002,2003 * Broadcom Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, @@ -27,7 +27,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA ********************************************************************* */ @@ -40,20 +40,20 @@ /* ********************************************************************* * Some general notes: - * + * * For the most part, when there is more than one peripheral * of the same type on the SOC, the constants below will be * offsets from the base of each peripheral. For example, * the MAC registers are described as offsets from the first * MAC register, and there will be a MAC_REGISTER() macro - * to calculate the base address of a given MAC. - * + * to calculate the base address of a given MAC. + * * The information in this file is based on the SB1250 SOC * manual version 0.2, July 2000. ********************************************************************* */ -/* ********************************************************************* +/* ********************************************************************* * Memory Controller Registers ********************************************************************* */ @@ -101,7 +101,7 @@ #define R_MC_TEST_ECC 0x0000000420 #define R_MC_MCLK_CFG 0x0000000500 -/* ********************************************************************* +/* ********************************************************************* * L2 Cache Control Registers ********************************************************************* */ @@ -126,7 +126,7 @@ #define A_L2_EEC_ADDRESS A_L2_ECC_TAG -/* ********************************************************************* +/* ********************************************************************* * PCI Interface Registers ********************************************************************* */ @@ -134,7 +134,7 @@ #define A_PCI_TYPE01_HEADER 0x00DE000800 -/* ********************************************************************* +/* ********************************************************************* * Ethernet DMA and MACs ********************************************************************* */ @@ -184,7 +184,7 @@ (R_MAC_DMA_CHANNEL_BASE(txrx,chan) + \ (reg)) -/* +/* * DMA channel registers, relative to A_MAC_DMA_CHANNEL_BASE */ @@ -259,7 +259,7 @@ #define MAC_CHMAP_COUNT 4 -/* ********************************************************************* +/* ********************************************************************* * DUART Registers ********************************************************************* */ @@ -363,7 +363,7 @@ #endif /* 1250 PASS2 || 112x PASS1 */ -/* ********************************************************************* +/* ********************************************************************* * Synchronous Serial Registers ********************************************************************* */ @@ -397,7 +397,7 @@ (reg)) -/* +/* * DMA channel registers, relative to A_SER_DMA_CHANNEL_BASE */ @@ -457,7 +457,7 @@ #define R_SER_RMON_RX_ERRORS 0x000001F0 #define R_SER_RMON_RX_BADADDR 0x000001F8 -/* ********************************************************************* +/* ********************************************************************* * Generic Bus Registers ********************************************************************* */ @@ -513,7 +513,7 @@ #define R_IO_PCMCIA_CFG 0x0A60 #define R_IO_PCMCIA_STATUS 0x0A70 -/* ********************************************************************* +/* ********************************************************************* * GPIO Registers ********************************************************************* */ @@ -537,7 +537,7 @@ #define R_GPIO_PIN_CLR 0x30 #define R_GPIO_PIN_SET 0x38 -/* ********************************************************************* +/* ********************************************************************* * SMBus Registers ********************************************************************* */ @@ -573,7 +573,7 @@ #define R_SMB_CONTROL 0x0000000060 #define R_SMB_PEC 0x0000000070 -/* ********************************************************************* +/* ********************************************************************* * Timer Registers ********************************************************************* */ @@ -641,7 +641,7 @@ #endif /* 1250 PASS2 || 112x PASS1 */ -/* ********************************************************************* +/* ********************************************************************* * System Control Registers ********************************************************************* */ @@ -649,7 +649,7 @@ #define A_SCD_SYSTEM_CFG 0x0010020008 #define A_SCD_SYSTEM_MANUF 0x0010038000 -/* ********************************************************************* +/* ********************************************************************* * System Address Trap Registers ********************************************************************* */ @@ -672,7 +672,7 @@ #endif /* 1250 PASS2 || 112x PASS1 */ -/* ********************************************************************* +/* ********************************************************************* * System Interrupt Mapper Registers ********************************************************************* */ @@ -701,7 +701,7 @@ #define R_IMR_INTERRUPT_MAP_BASE 0x0200 #define R_IMR_INTERRUPT_MAP_COUNT 64 -/* ********************************************************************* +/* ********************************************************************* * System Performance Counter Registers ********************************************************************* */ @@ -711,7 +711,7 @@ #define A_SCD_PERF_CNT_2 0x00100204E0 #define A_SCD_PERF_CNT_3 0x00100204E8 -/* ********************************************************************* +/* ********************************************************************* * System Bus Watcher Registers ********************************************************************* */ @@ -726,13 +726,13 @@ #define A_BUS_L2_ERRORS 0x00100208C0 #define A_BUS_MEM_IO_ERRORS 0x00100208C8 -/* ********************************************************************* +/* ********************************************************************* * System Debug Controller Registers ********************************************************************* */ #define A_SCD_JTAG_BASE 0x0010000000 -/* ********************************************************************* +/* ********************************************************************* * System Trace Buffer Registers ********************************************************************* */ @@ -755,7 +755,7 @@ #define A_SCD_TRACE_SEQUENCE_6 0x0010020A90 #define A_SCD_TRACE_SEQUENCE_7 0x0010020A98 -/* ********************************************************************* +/* ********************************************************************* * System Generic DMA Registers ********************************************************************* */ diff -urN linux/include/asm-mips/sibyte/sb1250_scd.h linux/include/asm-mips/sibyte/sb1250_scd.h --- linux/include/asm-mips/sibyte/sb1250_scd.h 2003/07/08 15:50:12 1.6 +++ linux/include/asm-mips/sibyte/sb1250_scd.h 2005/07/11 10:03:34 1.7 @@ -1,23 +1,23 @@ /* ********************************************************************* * SB1250 Board Support Package - * + * * SCD Constants and Macros File: sb1250_scd.h - * + * * This module contains constants and macros useful for * manipulating the System Control and Debug module on the 1250. - * + * * SB1250 specification level: User's manual 1/02/02 - * + * * Author: Mitch Lichtenberg - * - ********************************************************************* + * + ********************************************************************* * * Copyright 2000,2001,2002,2003 * Broadcom Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, @@ -27,7 +27,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA ********************************************************************* */ @@ -130,40 +130,40 @@ /* System Manufacturing Register * Register: SCD_SYSTEM_MANUF */ - + /* Wafer ID: bits 31:0 */ #define S_SYS_WAFERID1_200 _SB_MAKE64(0) #define M_SYS_WAFERID1_200 _SB_MAKEMASK(32,S_SYS_WAFERID1_200) #define V_SYS_WAFERID1_200(x) _SB_MAKEVALUE(x,S_SYS_WAFERID1_200) #define G_SYS_WAFERID1_200(x) _SB_GETVALUE(x,S_SYS_WAFERID1_200,M_SYS_WAFERID1_200) - + #define S_SYS_BIN _SB_MAKE64(32) #define M_SYS_BIN _SB_MAKEMASK(4,S_SYS_BIN) #define V_SYS_BIN _SB_MAKEVALUE(x,S_SYS_BIN) #define G_SYS_BIN _SB_GETVALUE(x,S_SYS_BIN,M_SYS_BIN) - + /* Wafer ID: bits 39:36 */ #define S_SYS_WAFERID2_200 _SB_MAKE64(36) #define M_SYS_WAFERID2_200 _SB_MAKEMASK(4,S_SYS_WAFERID2_200) #define V_SYS_WAFERID2_200(x) _SB_MAKEVALUE(x,S_SYS_WAFERID2_200) #define G_SYS_WAFERID2_200(x) _SB_GETVALUE(x,S_SYS_WAFERID2_200,M_SYS_WAFERID2_200) - + /* Wafer ID: bits 39:0 */ #define S_SYS_WAFERID_300 _SB_MAKE64(0) #define M_SYS_WAFERID_300 _SB_MAKEMASK(40,S_SYS_WAFERID_300) #define V_SYS_WAFERID_300(x) _SB_MAKEVALUE(x,S_SYS_WAFERID_300) #define G_SYS_WAFERID_300(x) _SB_GETVALUE(x,S_SYS_WAFERID_300,M_SYS_WAFERID_300) - + #define S_SYS_XPOS _SB_MAKE64(40) #define M_SYS_XPOS _SB_MAKEMASK(6,S_SYS_XPOS) #define V_SYS_XPOS(x) _SB_MAKEVALUE(x,S_SYS_XPOS) #define G_SYS_XPOS(x) _SB_GETVALUE(x,S_SYS_XPOS,M_SYS_XPOS) - + #define S_SYS_YPOS _SB_MAKE64(46) #define M_SYS_YPOS _SB_MAKEMASK(6,S_SYS_YPOS) #define V_SYS_YPOS(x) _SB_MAKEVALUE(x,S_SYS_YPOS) #define G_SYS_YPOS(x) _SB_GETVALUE(x,S_SYS_YPOS,M_SYS_YPOS) - + /* * System Config Register (Table 4-2) * Register: SCD_SYSTEM_CFG diff -urN linux/include/asm-mips/sibyte/sb1250_smbus.h linux/include/asm-mips/sibyte/sb1250_smbus.h --- linux/include/asm-mips/sibyte/sb1250_smbus.h 2003/07/08 15:50:12 1.5 +++ linux/include/asm-mips/sibyte/sb1250_smbus.h 2005/07/11 10:03:34 1.6 @@ -1,23 +1,23 @@ /* ********************************************************************* * SB1250 Board Support Package - * + * * SMBUS Constants File: sb1250_smbus.h - * - * This module contains constants and macros useful for + * + * This module contains constants and macros useful for * manipulating the SB1250's SMbus devices. - * + * * SB1250 specification level: 01/02/2002 - * + * * Author: Mitch Lichtenberg - * - ********************************************************************* + * + ********************************************************************* * * Copyright 2000,2001,2002,2003 * Broadcom Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, @@ -27,7 +27,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA ********************************************************************* */ diff -urN linux/include/asm-mips/sibyte/sb1250_syncser.h linux/include/asm-mips/sibyte/sb1250_syncser.h --- linux/include/asm-mips/sibyte/sb1250_syncser.h 2003/07/08 15:50:12 1.6 +++ linux/include/asm-mips/sibyte/sb1250_syncser.h 2005/07/11 10:03:34 1.7 @@ -7,17 +7,17 @@ * manipulating the SB1250's Synchronous Serial * * SB1250 specification level: User's manual 1/02/02 - * + * * Author: Mitch Lichtenberg * ********************************************************************* * * Copyright 2000,2001,2002,2003 * Broadcom Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, @@ -27,7 +27,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA ********************************************************************* */ diff -urN linux/include/asm-mips/sibyte/sb1250_uart.h linux/include/asm-mips/sibyte/sb1250_uart.h --- linux/include/asm-mips/sibyte/sb1250_uart.h 2003/07/08 15:50:12 1.7 +++ linux/include/asm-mips/sibyte/sb1250_uart.h 2005/07/11 10:03:34 1.8 @@ -1,23 +1,23 @@ /* ********************************************************************* * SB1250 Board Support Package - * + * * UART Constants File: sb1250_uart.h - * - * This module contains constants and macros useful for + * + * This module contains constants and macros useful for * manipulating the SB1250's UARTs * * SB1250 specification level: User's manual 1/02/02 - * + * * Author: Mitch Lichtenberg - * - ********************************************************************* + * + ********************************************************************* * * Copyright 2000,2001,2002,2003 * Broadcom Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, @@ -27,7 +27,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA ********************************************************************* */ @@ -37,7 +37,7 @@ #include "sb1250_defs.h" -/* ********************************************************************** +/* ********************************************************************** * DUART Registers ********************************************************************** */ @@ -145,7 +145,7 @@ #define V_DUART_MISC_CMD_START_BREAK V_DUART_MISC_CMD(K_DUART_MISC_CMD_START_BREAK) #define V_DUART_MISC_CMD_STOP_BREAK V_DUART_MISC_CMD(K_DUART_MISC_CMD_STOP_BREAK) -#define M_DUART_CMD_RESERVED _SB_MAKEMASK1(7) +#define M_DUART_CMD_RESERVED _SB_MAKEMASK1(7) /* * DUART Status Register (Table 10-6) @@ -165,7 +165,7 @@ /* * DUART Baud Rate Register (Table 10-7) - * Register: DUART_CLK_SEL_A + * Register: DUART_CLK_SEL_A * Register: DUART_CLK_SEL_B */ @@ -332,7 +332,7 @@ (chan == 0 ? M_DUART_OUT_PIN_CLR0 : M_DUART_OUT_PIN_CLR1) #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) -/* +/* * Full Interrupt Control Register */ diff -urN linux/include/asm-mips/tx4927/tx4927.h linux/include/asm-mips/tx4927/tx4927.h --- linux/include/asm-mips/tx4927/tx4927.h 2004/12/04 18:16:09 1.4 +++ linux/include/asm-mips/tx4927/tx4927.h 2005/07/11 10:03:34 1.5 @@ -45,14 +45,14 @@ /* TX4927 SDRAM controller (64-bit registers) */ -#define TX4927_SDRAMC_BASE 0x8000 -#define TX4927_SDRAMC_SDCCR0 0x8000 +#define TX4927_SDRAMC_BASE 0x8000 +#define TX4927_SDRAMC_SDCCR0 0x8000 #define TX4927_SDRAMC_SDCCR1 0x8008 #define TX4927_SDRAMC_SDCCR2 0x8010 #define TX4927_SDRAMC_SDCCR3 0x8018 #define TX4927_SDRAMC_SDCTR 0x8040 #define TX4927_SDRAMC_SDCMD 0x8058 -#define TX4927_SDRAMC_LIMIT 0x8fff +#define TX4927_SDRAMC_LIMIT 0x8fff /* TX4927 external bus controller (64-bit registers) */ @@ -289,8 +289,8 @@ /* TX4927 serial port 0 (32-bit registers) */ -#define TX4927_SIO0_BASE 0xf300 -#define TX4927_SIO0_SILCR0 0xf300 +#define TX4927_SIO0_BASE 0xf300 +#define TX4927_SIO0_SILCR0 0xf300 #define TX4927_SIO0_SILCR0_RESERVED_16_31 BM_16_31 #define TX4927_SIO0_SILCR0_RWUB BM_15_15 #define TX4927_SIO0_SILCR0_TWUB BM_14_14 @@ -309,7 +309,7 @@ #define TX4927_SIO0_SILCR0_UMODE_DATA_7_BIT (~BM_00_01) #define TX4927_SIO0_SILCR0_UMODE_DATA_8_BIT_MC BM_01_01 #define TX4927_SIO0_SILCR0_UMODE_DATA_7_BIT_MC BM_00_01 -#define TX4927_SIO0_SIDICR0 0xf304 +#define TX4927_SIO0_SIDICR0 0xf304 #define TX4927_SIO0_SIDICR0_RESERVED_16_31 BM_16_31 #define TX4927_SIO0_SIDICR0_TDE BM_15_15 #define TX4927_SIO0_SIDICR0_RDE BM_14_14 @@ -330,7 +330,7 @@ #define TX4927_SIO0_SIDICR0_STIE_TRDY BM_02_02 #define TX4927_SIO0_SIDICR0_STIE_TXALS BM_01_01 #define TX4927_SIO0_SIDICR0_STIE_UBRKD BM_00_00 -#define TX4927_SIO0_SIDISR0 0xf308 +#define TX4927_SIO0_SIDISR0 0xf308 #define TX4927_SIO0_SIDISR0_RESERVED_16_31 BM_16_31 #define TX4927_SIO0_SIDISR0_UBRK BM_15_15 #define TX4927_SIO0_SIDISR0_UVALID BM_14_14 @@ -344,7 +344,7 @@ #define TX4927_SIO0_SIDISR0_STIS BM_06_06 #define TX4927_SIO0_SIDISR0_RESERVED_05_05 BM_05_05 #define TX4927_SIO0_SIDISR0_RFDN BM_00_04 -#define TX4927_SIO0_SISCISR0 0xf30c +#define TX4927_SIO0_SISCISR0 0xf30c #define TX4927_SIO0_SISCISR0_RESERVED_06_31 BM_06_31 #define TX4927_SIO0_SISCISR0_OERS BM_05_05 #define TX4927_SIO0_SISCISR0_CTSS BM_04_04 @@ -352,7 +352,7 @@ #define TX4927_SIO0_SISCISR0_TRDY BM_02_02 #define TX4927_SIO0_SISCISR0_TXALS BM_01_01 #define TX4927_SIO0_SISCISR0_UBRKD BM_00_00 -#define TX4927_SIO0_SIFCR0 0xf310 +#define TX4927_SIO0_SIFCR0 0xf310 #define TX4927_SIO0_SIFCR0_RESERVED_16_31 BM_16_31 #define TX4927_SIO0_SIFCR0_SWRST BM_16_31 #define TX4927_SIO0_SIFCR0_RESERVED_09_14 BM_09_14 @@ -370,7 +370,7 @@ #define TX4927_SIO0_SIFCR0_TFRST BM_02_02 #define TX4927_SIO0_SIFCR0_RFRST BM_01_01 #define TX4927_SIO0_SIFCR0_FRSTE BM_00_00 -#define TX4927_SIO0_SIFLCR0 0xf314 +#define TX4927_SIO0_SIFLCR0 0xf314 #define TX4927_SIO0_SIFLCR0_RESERVED_13_31 BM_13_31 #define TX4927_SIO0_SIFLCR0_RCS BM_12_12 #define TX4927_SIO0_SIFLCR0_TES BM_11_11 @@ -381,7 +381,7 @@ #define TX4927_SIO0_SIFLCR0_RESERVED_05_06 BM_05_06 #define TX4927_SIO0_SIFLCR0_RTSTL BM_01_04 #define TX4927_SIO0_SIFLCR0_TBRK BM_00_00 -#define TX4927_SIO0_SIBGR0 0xf318 +#define TX4927_SIO0_SIBGR0 0xf318 #define TX4927_SIO0_SIBGR0_RESERVED_10_31 BM_10_31 #define TX4927_SIO0_SIBGR0_BCLK BM_08_09 #define TX4927_SIO0_SIBGR0_BCLK_T0 (~BM_08_09) @@ -389,28 +389,28 @@ #define TX4927_SIO0_SIBGR0_BCLK_T4 BM_09_09 #define TX4927_SIO0_SIBGR0_BCLK_T6 BM_08_09 #define TX4927_SIO0_SIBGR0_BRD BM_00_07 -#define TX4927_SIO0_SITFIF00 0xf31c +#define TX4927_SIO0_SITFIF00 0xf31c #define TX4927_SIO0_SITFIF00_RESERVED_08_31 BM_08_31 #define TX4927_SIO0_SITFIF00_TXD BM_00_07 -#define TX4927_SIO0_SIRFIFO0 0xf320 +#define TX4927_SIO0_SIRFIFO0 0xf320 #define TX4927_SIO0_SIRFIFO0_RESERVED_08_31 BM_08_31 #define TX4927_SIO0_SIRFIFO0_RXD BM_00_07 -#define TX4927_SIO0_SIRFIFO0 0xf320 -#define TX4927_SIO0_LIMIT 0xf3ff +#define TX4927_SIO0_SIRFIFO0 0xf320 +#define TX4927_SIO0_LIMIT 0xf3ff /* TX4927 serial port 1 (32-bit registers) */ -#define TX4927_SIO1_BASE 0xf400 -#define TX4927_SIO1_SILCR1 0xf400 -#define TX4927_SIO1_SIDICR1 0xf404 -#define TX4927_SIO1_SIDISR1 0xf408 -#define TX4927_SIO1_SISCISR1 0xf40c -#define TX4927_SIO1_SIFCR1 0xf410 -#define TX4927_SIO1_SIFLCR1 0xf414 -#define TX4927_SIO1_SIBGR1 0xf418 -#define TX4927_SIO1_SITFIF01 0xf41c -#define TX4927_SIO1_SIRFIFO1 0xf420 -#define TX4927_SIO1_LIMIT 0xf4ff +#define TX4927_SIO1_BASE 0xf400 +#define TX4927_SIO1_SILCR1 0xf400 +#define TX4927_SIO1_SIDICR1 0xf404 +#define TX4927_SIO1_SIDISR1 0xf408 +#define TX4927_SIO1_SISCISR1 0xf40c +#define TX4927_SIO1_SIFCR1 0xf410 +#define TX4927_SIO1_SIFLCR1 0xf414 +#define TX4927_SIO1_SIBGR1 0xf418 +#define TX4927_SIO1_SITFIF01 0xf41c +#define TX4927_SIO1_SIRFIFO1 0xf420 +#define TX4927_SIO1_LIMIT 0xf4ff /* TX4927 parallel port (32-bit registers) */ diff -urN linux/include/asm-mips/tx4927/tx4927_pci.h linux/include/asm-mips/tx4927/tx4927_pci.h --- linux/include/asm-mips/tx4927/tx4927_pci.h 2003/10/29 19:39:34 1.3 +++ linux/include/asm-mips/tx4927/tx4927_pci.h 2005/07/11 10:03:34 1.4 @@ -5,8 +5,8 @@ * * Copyright (C) 2000-2001 Toshiba Corporation */ -#ifndef __ASM_TX4927_TX4927_PCI_H -#define __ASM_TX4927_TX4927_PCI_H +#ifndef __ASM_TX4927_TX4927_PCI_H +#define __ASM_TX4927_TX4927_PCI_H #define TX4927_CCFG_TOE 0x00004000 diff -urN linux/include/asm-mips/vr41xx/vrc4173.h linux/include/asm-mips/vr41xx/vrc4173.h --- linux/include/asm-mips/vr41xx/vrc4173.h 2005/01/15 01:31:04 1.8 +++ linux/include/asm-mips/vr41xx/vrc4173.h 2005/07/11 10:03:34 1.9 @@ -21,8 +21,8 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#ifndef __NEC_VRC4173_H -#define __NEC_VRC4173_H +#ifndef __NEC_VRC4173_H +#define __NEC_VRC4173_H #include #include From ralf@linux-mips.org Mon Jul 11 10:24:06 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Mon, 11 Jul 2005 11:24:06 +0100 (BST) From: ralf@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Mon, 11 Jul 2005 11:24:06 +0100 X-archive-position: 542 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ralf@ftp.linux-mips.org 05/07/11 11:24:00 linux/arch/mips/qemu Update of /home/cvs/linux/arch/mips/qemu In directory ftp.linux-mips.org:/tmp/cvs-serv11348/arch/mips/qemu Log Message: Directory /home/cvs/linux/arch/mips/qemu added to the repository From ralf@linux-mips.org Mon Jul 11 10:28:38 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Mon, 11 Jul 2005 11:28:38 +0100 (BST) From: ralf@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Mon, 11 Jul 2005 11:28:38 +0100 X-archive-position: 543 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ralf@ftp.linux-mips.org 05/07/11 11:28:32 linux/include/asm-mips/mach-qemu Update of /home/cvs/linux/include/asm-mips/mach-qemu In directory ftp.linux-mips.org:/tmp/cvs-serv11810/include/asm-mips/mach-qemu Log Message: Directory /home/cvs/linux/include/asm-mips/mach-qemu added to the repository From ralf@linux-mips.org Mon Jul 11 10:37:56 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Mon, 11 Jul 2005 11:37:56 +0100 (BST) From: ralf@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Mon, 11 Jul 2005 11:37:56 +0100 X-archive-position: 544 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ralf@ftp.linux-mips.org 05/07/11 11:37:51 Modified files: include/asm-mips: vga.h Log message: Fix endianess bugs. diff -urN linux/include/asm-mips/vga.h linux/include/asm-mips/vga.h --- linux/include/asm-mips/vga.h 2002/11/06 20:47:10 1.3 +++ linux/include/asm-mips/vga.h 2005/07/11 10:37:51 1.4 @@ -6,6 +6,8 @@ #ifndef _ASM_VGA_H #define _ASM_VGA_H +#include + /* * On the PC, we can just recalculate addresses and then * access the videoram directly without any black magic. @@ -16,4 +18,27 @@ #define vga_readb(x) (*(x)) #define vga_writeb(x,y) (*(y) = (x)) +#define VT_BUF_HAVE_RW +/* + * These are only needed for supporting VGA or MDA text mode, which use little + * endian byte ordering. + * In other cases, we can optimize by using native byte ordering and + * has already done the right job for us. + */ + +static inline void scr_writew(u16 val, volatile u16 *addr) +{ + *addr = cpu_to_le16(val); +} + +static inline u16 scr_readw(volatile const u16 *addr) +{ + return le16_to_cpu(*addr); +} + +#define scr_memcpyw(d, s, c) memcpy(d, s, c) +#define scr_memmovew(d, s, c) memmove(d, s, c) +#define VT_BUF_HAVE_MEMCPYW +#define VT_BUF_HAVE_MEMMOVEW + #endif /* _ASM_VGA_H */ From ralf@linux-mips.org Mon Jul 11 10:50:21 2005 Received: with ECARTIS (v1.0.0; list linux-cvs-patches); Mon, 11 Jul 2005 11:50:21 +0100 (BST) From: ralf@linux-mips.org To: linux-cvs-patches@linux-mips.org Subject: CVS Update@linux-mips.org: linux Date: Mon, 11 Jul 2005 11:50:21 +0100 X-archive-position: 545 X-ecartis-version: Ecartis v1.0.0 Sender: linux-cvs-patches-bounce@linux-mips.org Errors-to: linux-cvs-patches-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk Reply-to: linux-mips@linux-mips.org X-list: linux-cvs-patches CVSROOT: /home/cvs Module name: linux Changes by: ralf@ftp.linux-mips.org 05/07/11 11:50:14 Modified files: arch/mips : Kconfig Makefile defconfig arch/mips/boot : .cvsignore Makefile arch/mips/configs: atlas_defconfig capcella_defconfig cobalt_defconfig db1000_defconfig db1100_defconfig db1500_defconfig db1550_defconfig ddb5476_defconfig ddb5477_defconfig decstation_defconfig e55_defconfig ev64120_defconfig ev96100_defconfig ip22_defconfig ip27_defconfig ip32_defconfig it8172_defconfig ivr_defconfig jaguar-atx_defconfig jmr3927_defconfig lasat200_defconfig malta_defconfig mpc30x_defconfig ocelot_3_defconfig ocelot_c_defconfig ocelot_defconfig ocelot_g_defconfig pb1100_defconfig pb1500_defconfig pb1550_defconfig rm200_defconfig sb1250-swarm_defconfig sead_defconfig tb0226_defconfig tb0229_defconfig workpad_defconfig yosemite_defconfig arch/mips/kernel: head.S Added files: arch/mips/configs: qemu_defconfig arch/mips/qemu : .cvsignore Makefile q-firmware.c q-int.S q-irq.c q-mem.c q-setup.c q-vga.c include/asm-mips: qemu.h include/asm-mips/mach-qemu: cpu-feature-overrides.h param.h Log message: Kernel configuration to support Qemu's system architecture. More information can be found at http://www.linux-mips.org/wiki/Qemu. diff -urN linux/arch/mips/Kconfig linux/arch/mips/Kconfig --- linux/arch/mips/Kconfig 2005/07/06 12:08:11 1.148 +++ linux/arch/mips/Kconfig 2005/07/11 10:50:11 1.149 @@ -450,6 +450,24 @@ Yosemite is an evaluation board for the RM9000x2 processor manufactured by PMC-Sierra. +config QEMU + bool "Support for Qemu" + select DMA_COHERENT + select GENERIC_ISA_DMA + select HAVE_STD_PC_SERIAL_PORT + select I8259 + select ISA + select SWAP_IO_SPACE + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + help + Qemu is a software emulator which among other architectures also + can simulate a MIPS32 4Kc system. This patch adds support for the + system architecture that currently is being simulated by Qemu. It + will eventually be removed again when Qemu has the capability to + simulate actual MIPS hardware platforms. More information on Qemu + can be found at http://www.linux-mips.org/wiki/Qemu. + config SGI_IP22 bool "Support for SGI IP22 (Indy/Indigo2)" select ARC diff -urN linux/arch/mips/Makefile linux/arch/mips/Makefile --- linux/arch/mips/Makefile 2005/07/11 10:03:23 1.200 +++ linux/arch/mips/Makefile 2005/07/11 10:50:11 1.201 @@ -459,6 +459,13 @@ load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000 # +# Qemu simulating MIPS32 4Kc +# +core-$(CONFIG_QEMU) += arch/mips/qemu/ +cflags-$(CONFIG_QEMU) += -Iinclude/asm-mips/mach-qemu +load-$(CONFIG_QEMU) += 0xffffffff80010000 + +# # Momentum Ocelot-3 # core-$(CONFIG_MOMENCO_OCELOT_3) += arch/mips/momentum/ocelot_3/ @@ -751,10 +758,17 @@ all: vmlinux.srec endif +ifdef CONFIG_QEMU +all: vmlinux.bin +endif + ifdef CONFIG_SNI_RM200_PCI all: vmlinux.ecoff endif +vmlinux.bin: $(vmlinux-32) + +@$(call makeboot,$@) + vmlinux.ecoff vmlinux.rm200: $(vmlinux-32) +@$(call makeboot,$@) diff -urN linux/arch/mips/defconfig linux/arch/mips/defconfig --- linux/arch/mips/defconfig 2005/07/06 12:08:11 1.294 +++ linux/arch/mips/defconfig 2005/07/11 10:50:12 1.295 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:00 2005 +# Mon Jul 11 11:45:30 2005 # CONFIG_MIPS=y @@ -93,6 +93,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set CONFIG_SGI_IP22=y # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/boot/.cvsignore linux/arch/mips/boot/.cvsignore --- linux/arch/mips/boot/.cvsignore 2005/05/19 14:44:24 1.11 +++ linux/arch/mips/boot/.cvsignore 2005/07/11 10:50:12 1.12 @@ -3,4 +3,5 @@ zImage zImage.tmp .*.cmd +vmlinux.bin vmlinux.srec diff -urN linux/arch/mips/boot/Makefile linux/arch/mips/boot/Makefile --- linux/arch/mips/boot/Makefile 2004/10/20 00:04:04 1.28 +++ linux/arch/mips/boot/Makefile 2005/07/11 10:50:12 1.29 @@ -33,6 +33,9 @@ $(obj)/elf2ecoff: $(obj)/elf2ecoff.c $(HOSTCC) -o $@ $^ +vmlinux.bin: $(VMLINUX) + $(OBJCOPY) -O binary $(strip-flags) $(VMLINUX) $(obj)/vmlinux.bin + vmlinux.srec: $(VMLINUX) $(OBJCOPY) -S -O srec $(strip-flags) $(VMLINUX) $(obj)/vmlinux.srec diff -urN linux/arch/mips/configs/qemu_defconfig linux/arch/mips/configs/qemu_defconfig --- linux/arch/mips/configs/qemu_defconfig 1970/01/01 00:00:00 +++ linux/arch/mips/configs/qemu_defconfig 2005-07-11 11:50:12.818178000 +0100 1.1 @@ -0,0 +1,629 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.12 +# Mon Jul 11 11:46:46 2005 +# +CONFIG_MIPS=y + +# +# Code maturity level options +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_CLEAN_COMPILE=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +# CONFIG_SWAP is not set +# CONFIG_SYSVIPC is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_SYSCTL is not set +# CONFIG_AUDIT is not set +# CONFIG_HOTPLUG is not set +CONFIG_KOBJECT_UEVENT=y +# CONFIG_IKCONFIG is not set +CONFIG_EMBEDDED=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_PRINTK=y +# CONFIG_BUG is not set +# CONFIG_BASE_FULL is not set +# CONFIG_FUTEX is not set +# CONFIG_EPOLL is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +# CONFIG_SHMEM is not set +CONFIG_CC_ALIGN_FUNCTIONS=0 +CONFIG_CC_ALIGN_LABELS=0 +CONFIG_CC_ALIGN_LOOPS=0 +CONFIG_CC_ALIGN_JUMPS=0 +CONFIG_TINY_SHMEM=y +CONFIG_BASE_SMALL=1 + +# +# Loadable module support +# +# CONFIG_MODULES is not set + +# +# Machine selection +# +# CONFIG_MIPS_MTX1 is not set +# CONFIG_MIPS_BOSPORUS is not set +# CONFIG_MIPS_PB1000 is not set +# CONFIG_MIPS_PB1100 is not set +# CONFIG_MIPS_PB1500 is not set +# CONFIG_MIPS_PB1550 is not set +# CONFIG_MIPS_PB1200 is not set +# CONFIG_MIPS_DB1000 is not set +# CONFIG_MIPS_DB1100 is not set +# CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set +# CONFIG_MIPS_DB1200 is not set +# CONFIG_MIPS_MIRAGE is not set +# CONFIG_MIPS_COBALT is not set +# CONFIG_MACH_DECSTATION is not set +# CONFIG_MIPS_EV64120 is not set +# CONFIG_MIPS_EV96100 is not set +# CONFIG_MIPS_IVR is not set +# CONFIG_MIPS_ITE8172 is not set +# CONFIG_MACH_JAZZ is not set +# CONFIG_LASAT is not set +# CONFIG_MIPS_ATLAS is not set +# CONFIG_MIPS_MALTA is not set +# CONFIG_MIPS_SEAD is not set +# CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_MOMENCO_OCELOT is not set +# CONFIG_MOMENCO_OCELOT_3 is not set +# CONFIG_MOMENCO_OCELOT_C is not set +# CONFIG_MOMENCO_OCELOT_G is not set +# CONFIG_MIPS_XXS1500 is not set +# CONFIG_DDB5074 is not set +# CONFIG_DDB5476 is not set +# CONFIG_DDB5477 is not set +# CONFIG_MACH_VR41XX is not set +# CONFIG_PMC_YOSEMITE is not set +CONFIG_QEMU=y +# CONFIG_SGI_IP22 is not set +# CONFIG_SGI_IP27 is not set +# CONFIG_SGI_IP32 is not set +# CONFIG_SIBYTE_SWARM is not set +# CONFIG_SIBYTE_SENTOSA is not set +# CONFIG_SIBYTE_RHONE is not set +# CONFIG_SIBYTE_CARMEL is not set +# CONFIG_SIBYTE_PTSWARM is not set +# CONFIG_SIBYTE_LITTLESUR is not set +# CONFIG_SIBYTE_CRHINE is not set +# CONFIG_SIBYTE_CRHONE is not set +# CONFIG_SNI_RM200_PCI is not set +# CONFIG_TOSHIBA_JMR3927 is not set +# CONFIG_TOSHIBA_RBTX4927 is not set +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_HAVE_DEC_LOCK=y +CONFIG_DMA_COHERENT=y +CONFIG_GENERIC_ISA_DMA=y +CONFIG_I8259=y +CONFIG_CPU_BIG_ENDIAN=y +# CONFIG_CPU_LITTLE_ENDIAN is not set +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SWAP_IO_SPACE=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 +CONFIG_HAVE_STD_PC_SERIAL_PORT=y + +# +# CPU selection +# +# CONFIG_CPU_MIPS32_R1 is not set +# CONFIG_CPU_MIPS64_R1 is not set +# CONFIG_CPU_R3000 is not set +# CONFIG_CPU_TX39XX is not set +# CONFIG_CPU_VR41XX is not set +# CONFIG_CPU_R4300 is not set +CONFIG_CPU_R4X00=y +# CONFIG_CPU_TX49XX is not set +# CONFIG_CPU_R5000 is not set +# CONFIG_CPU_R5432 is not set +# CONFIG_CPU_R6000 is not set +# CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R8000 is not set +# CONFIG_CPU_R10000 is not set +# CONFIG_CPU_RM7000 is not set +# CONFIG_CPU_RM9000 is not set +# CONFIG_CPU_SB1 is not set +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y + +# +# Kernel type +# +CONFIG_MIPS32=y +# CONFIG_MIPS64 is not set +# CONFIG_64BIT is not set +CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set +# CONFIG_PAGE_SIZE_16KB is not set +# CONFIG_PAGE_SIZE_64KB is not set +# CONFIG_64BIT_PHYS_ADDR is not set +# CONFIG_CPU_ADVANCED is not set +CONFIG_CPU_HAS_LLSC=y +CONFIG_CPU_HAS_LLDSCD=y +CONFIG_CPU_HAS_SYNC=y +# CONFIG_PREEMPT is not set + +# +# Bus options (PCI, PCMCIA, EISA, ISA, TC) +# +CONFIG_ISA=y +CONFIG_MMU=y + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# PCI Hotplug Support +# + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_MISC is not set +CONFIG_TRAD_SIGNALS=y + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +# CONFIG_PREVENT_FIRMWARE_BUILD is not set +# CONFIG_FW_LOADER is not set + +# +# Memory Technology Devices (MTD) +# +# CONFIG_MTD is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# +# CONFIG_PNP is not set + +# +# Block devices +# +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_RAM is not set +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_LBD is not set +# CONFIG_CDROM_PKTCDVD is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_SCSI is not set + +# +# Old CD-ROM drivers (not SCSI, not IDE) +# +# CONFIG_CD_NO_IDESCSI is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# + +# +# IEEE 1394 (FireWire) support +# + +# +# I2O device support +# + +# +# Networking support +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_IP_TCPDIAG=y +# CONFIG_IP_TCPDIAG_IPV6 is not set +# CONFIG_IPV6 is not set +# CONFIG_NETFILTER is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set +# CONFIG_NET_CLS_ROUTE is not set + +# +# Network testing +# +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_SMC is not set +# CONFIG_NET_VENDOR_RACAL is not set +# CONFIG_DEPCA is not set +# CONFIG_HP100 is not set +CONFIG_NET_ISA=y +# CONFIG_E2100 is not set +# CONFIG_EWRK3 is not set +# CONFIG_EEXPRESS is not set +# CONFIG_EEXPRESS_PRO is not set +# CONFIG_HPLAN_PLUS is not set +# CONFIG_HPLAN is not set +# CONFIG_LP486E is not set +# CONFIG_ETH16I is not set +CONFIG_NE2000=y +# CONFIG_NET_PCI is not set +# CONFIG_NET_POCKET is not set + +# +# Ethernet (1000 Mbit) +# + +# +# Ethernet (10000 Mbit) +# + +# +# Token Ring devices +# +# CONFIG_TR is not set + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_UNIX98_PTYS is not set +# CONFIG_LEGACY_PTYS is not set + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_RTC is not set +# CONFIG_GEN_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_DRM is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Misc devices +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Console display driver support +# +CONFIG_VGA_CONSOLE=y +# CONFIG_MDA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +# CONFIG_USB_ARCH_HAS_HCD is not set +# CONFIG_USB_ARCH_HAS_OHCI is not set + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# InfiniBand support +# +# CONFIG_INFINIBAND is not set + +# +# File systems +# +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +# CONFIG_JBD is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set + +# +# XFS support +# +# CONFIG_XFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_QUOTA is not set +# CONFIG_DNOTIFY is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +# CONFIG_PROC_FS is not set +# CONFIG_SYSFS is not set +# CONFIG_TMPFS is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y + +# +# Miscellaneous filesystems +# +# CONFIG_HFSPLUS_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_SUNRPC=y +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +# CONFIG_NLS is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_CROSSCOMPILE=y +CONFIG_CMDLINE="console=ttyS0 debug ip=172.20.0.2:172.20.0.1::255.255.0.0" + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +# CONFIG_CRC_CCITT is not set +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_PROBE=y diff -urN linux/arch/mips/configs/atlas_defconfig linux/arch/mips/configs/atlas_defconfig --- linux/arch/mips/configs/atlas_defconfig 2005/07/06 12:08:11 1.58 +++ linux/arch/mips/configs/atlas_defconfig 2005/07/11 10:50:12 1.59 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:01 2005 +# Mon Jul 11 11:45:33 2005 # CONFIG_MIPS=y @@ -92,6 +92,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/capcella_defconfig linux/arch/mips/configs/capcella_defconfig --- linux/arch/mips/configs/capcella_defconfig 2005/07/06 12:08:11 1.58 +++ linux/arch/mips/configs/capcella_defconfig 2005/07/11 10:50:12 1.59 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:01 2005 +# Mon Jul 11 11:45:36 2005 # CONFIG_MIPS=y @@ -92,6 +92,7 @@ # CONFIG_DDB5477 is not set CONFIG_MACH_VR41XX=y # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/cobalt_defconfig linux/arch/mips/configs/cobalt_defconfig --- linux/arch/mips/configs/cobalt_defconfig 2005/07/06 12:08:11 1.55 +++ linux/arch/mips/configs/cobalt_defconfig 2005/07/11 10:50:12 1.56 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:02 2005 +# Mon Jul 11 11:45:38 2005 # CONFIG_MIPS=y @@ -86,6 +86,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/db1000_defconfig linux/arch/mips/configs/db1000_defconfig --- linux/arch/mips/configs/db1000_defconfig 2005/07/06 12:08:11 1.61 +++ linux/arch/mips/configs/db1000_defconfig 2005/07/11 10:50:12 1.62 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:02 2005 +# Mon Jul 11 11:45:42 2005 # CONFIG_MIPS=y @@ -92,6 +92,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/db1100_defconfig linux/arch/mips/configs/db1100_defconfig --- linux/arch/mips/configs/db1100_defconfig 2005/07/06 12:08:11 1.60 +++ linux/arch/mips/configs/db1100_defconfig 2005/07/11 10:50:12 1.61 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:03 2005 +# Mon Jul 11 11:45:45 2005 # CONFIG_MIPS=y @@ -92,6 +92,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/db1500_defconfig linux/arch/mips/configs/db1500_defconfig --- linux/arch/mips/configs/db1500_defconfig 2005/07/06 12:08:11 1.63 +++ linux/arch/mips/configs/db1500_defconfig 2005/07/11 10:50:12 1.64 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:03 2005 +# Mon Jul 11 11:45:48 2005 # CONFIG_MIPS=y @@ -92,6 +92,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/db1550_defconfig linux/arch/mips/configs/db1550_defconfig --- linux/arch/mips/configs/db1550_defconfig 2005/07/06 12:08:11 1.38 +++ linux/arch/mips/configs/db1550_defconfig 2005/07/11 10:50:12 1.39 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:04 2005 +# Mon Jul 11 11:45:51 2005 # CONFIG_MIPS=y @@ -92,6 +92,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/ddb5476_defconfig linux/arch/mips/configs/ddb5476_defconfig --- linux/arch/mips/configs/ddb5476_defconfig 2005/07/06 12:08:11 1.55 +++ linux/arch/mips/configs/ddb5476_defconfig 2005/07/11 10:50:12 1.56 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:04 2005 +# Mon Jul 11 11:45:54 2005 # CONFIG_MIPS=y @@ -86,6 +86,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/ddb5477_defconfig linux/arch/mips/configs/ddb5477_defconfig --- linux/arch/mips/configs/ddb5477_defconfig 2005/07/06 12:08:11 1.55 +++ linux/arch/mips/configs/ddb5477_defconfig 2005/07/11 10:50:12 1.56 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:05 2005 +# Mon Jul 11 11:45:56 2005 # CONFIG_MIPS=y @@ -86,6 +86,7 @@ CONFIG_DDB5477=y # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/decstation_defconfig linux/arch/mips/configs/decstation_defconfig --- linux/arch/mips/configs/decstation_defconfig 2005/07/06 12:08:11 1.56 +++ linux/arch/mips/configs/decstation_defconfig 2005/07/11 10:50:12 1.57 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:15 2005 +# Mon Jul 11 11:45:58 2005 # CONFIG_MIPS=y @@ -92,6 +92,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/e55_defconfig linux/arch/mips/configs/e55_defconfig --- linux/arch/mips/configs/e55_defconfig 2005/07/06 12:08:11 1.57 +++ linux/arch/mips/configs/e55_defconfig 2005/07/11 10:50:12 1.58 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:15 2005 +# Mon Jul 11 11:46:01 2005 # CONFIG_MIPS=y @@ -92,6 +92,7 @@ # CONFIG_DDB5477 is not set CONFIG_MACH_VR41XX=y # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/ev64120_defconfig linux/arch/mips/configs/ev64120_defconfig --- linux/arch/mips/configs/ev64120_defconfig 2005/07/06 12:08:11 1.54 +++ linux/arch/mips/configs/ev64120_defconfig 2005/07/11 10:50:12 1.55 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:16 2005 +# Mon Jul 11 11:46:03 2005 # CONFIG_MIPS=y @@ -92,6 +92,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/ev96100_defconfig linux/arch/mips/configs/ev96100_defconfig --- linux/arch/mips/configs/ev96100_defconfig 2005/07/06 12:08:11 1.55 +++ linux/arch/mips/configs/ev96100_defconfig 2005/07/11 10:50:12 1.56 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:16 2005 +# Mon Jul 11 11:46:05 2005 # CONFIG_MIPS=y @@ -92,6 +92,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/ip22_defconfig linux/arch/mips/configs/ip22_defconfig --- linux/arch/mips/configs/ip22_defconfig 2005/07/06 12:08:11 1.64 +++ linux/arch/mips/configs/ip22_defconfig 2005/07/11 10:50:12 1.65 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:17 2005 +# Mon Jul 11 11:46:07 2005 # CONFIG_MIPS=y @@ -93,6 +93,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set CONFIG_SGI_IP22=y # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/ip27_defconfig linux/arch/mips/configs/ip27_defconfig --- linux/arch/mips/configs/ip27_defconfig 2005/07/06 12:08:11 1.68 +++ linux/arch/mips/configs/ip27_defconfig 2005/07/11 10:50:12 1.69 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:17 2005 +# Mon Jul 11 11:46:10 2005 # CONFIG_MIPS=y @@ -95,6 +95,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set CONFIG_SGI_IP27=y # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/ip32_defconfig linux/arch/mips/configs/ip32_defconfig --- linux/arch/mips/configs/ip32_defconfig 2005/07/06 12:08:11 1.58 +++ linux/arch/mips/configs/ip32_defconfig 2005/07/11 10:50:12 1.59 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:18 2005 +# Mon Jul 11 11:46:12 2005 # CONFIG_MIPS=y @@ -87,6 +87,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set CONFIG_SGI_IP32=y diff -urN linux/arch/mips/configs/it8172_defconfig linux/arch/mips/configs/it8172_defconfig --- linux/arch/mips/configs/it8172_defconfig 2005/07/06 12:08:11 1.54 +++ linux/arch/mips/configs/it8172_defconfig 2005/07/11 10:50:12 1.55 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:19 2005 +# Mon Jul 11 11:46:14 2005 # CONFIG_MIPS=y @@ -93,6 +93,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/ivr_defconfig linux/arch/mips/configs/ivr_defconfig --- linux/arch/mips/configs/ivr_defconfig 2005/07/06 12:08:11 1.54 +++ linux/arch/mips/configs/ivr_defconfig 2005/07/11 10:50:12 1.55 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:19 2005 +# Mon Jul 11 11:46:16 2005 # CONFIG_MIPS=y @@ -93,6 +93,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/jaguar-atx_defconfig linux/arch/mips/configs/jaguar-atx_defconfig --- linux/arch/mips/configs/jaguar-atx_defconfig 2005/07/06 12:08:11 1.59 +++ linux/arch/mips/configs/jaguar-atx_defconfig 2005/07/11 10:50:12 1.60 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:20 2005 +# Mon Jul 11 11:46:18 2005 # CONFIG_MIPS=y @@ -90,6 +90,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/jmr3927_defconfig linux/arch/mips/configs/jmr3927_defconfig --- linux/arch/mips/configs/jmr3927_defconfig 2005/07/06 12:08:11 1.55 +++ linux/arch/mips/configs/jmr3927_defconfig 2005/07/11 10:50:12 1.56 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:20 2005 +# Mon Jul 11 11:46:21 2005 # CONFIG_MIPS=y @@ -86,6 +86,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/lasat200_defconfig linux/arch/mips/configs/lasat200_defconfig --- linux/arch/mips/configs/lasat200_defconfig 2005/07/06 12:08:11 1.55 +++ linux/arch/mips/configs/lasat200_defconfig 2005/07/11 10:50:12 1.56 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:21 2005 +# Mon Jul 11 11:46:23 2005 # CONFIG_MIPS=y @@ -92,6 +92,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/malta_defconfig linux/arch/mips/configs/malta_defconfig --- linux/arch/mips/configs/malta_defconfig 2005/07/06 12:08:11 1.57 +++ linux/arch/mips/configs/malta_defconfig 2005/07/11 10:50:12 1.58 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:22 2005 +# Mon Jul 11 11:46:26 2005 # CONFIG_MIPS=y @@ -92,6 +92,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/mpc30x_defconfig linux/arch/mips/configs/mpc30x_defconfig --- linux/arch/mips/configs/mpc30x_defconfig 2005/07/06 12:08:11 1.59 +++ linux/arch/mips/configs/mpc30x_defconfig 2005/07/11 10:50:12 1.60 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:22 2005 +# Mon Jul 11 11:46:28 2005 # CONFIG_MIPS=y @@ -92,6 +92,7 @@ # CONFIG_DDB5477 is not set CONFIG_MACH_VR41XX=y # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/ocelot_3_defconfig linux/arch/mips/configs/ocelot_3_defconfig --- linux/arch/mips/configs/ocelot_3_defconfig 2005/07/06 12:08:11 1.27 +++ linux/arch/mips/configs/ocelot_3_defconfig 2005/07/11 10:50:12 1.28 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:23 2005 +# Mon Jul 11 11:46:30 2005 # CONFIG_MIPS=y @@ -93,6 +93,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/ocelot_c_defconfig linux/arch/mips/configs/ocelot_c_defconfig --- linux/arch/mips/configs/ocelot_c_defconfig 2005/07/06 12:08:11 1.53 +++ linux/arch/mips/configs/ocelot_c_defconfig 2005/07/11 10:50:12 1.54 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:23 2005 +# Mon Jul 11 11:46:32 2005 # CONFIG_MIPS=y @@ -86,6 +86,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/ocelot_defconfig linux/arch/mips/configs/ocelot_defconfig --- linux/arch/mips/configs/ocelot_defconfig 2005/07/06 12:08:11 1.55 +++ linux/arch/mips/configs/ocelot_defconfig 2005/07/11 10:50:12 1.56 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:24 2005 +# Mon Jul 11 11:46:34 2005 # CONFIG_MIPS=y @@ -86,6 +86,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/ocelot_g_defconfig linux/arch/mips/configs/ocelot_g_defconfig --- linux/arch/mips/configs/ocelot_g_defconfig 2005/07/06 12:08:11 1.48 +++ linux/arch/mips/configs/ocelot_g_defconfig 2005/07/11 10:50:12 1.49 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:24 2005 +# Mon Jul 11 11:46:36 2005 # CONFIG_MIPS=y @@ -86,6 +86,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/pb1100_defconfig linux/arch/mips/configs/pb1100_defconfig --- linux/arch/mips/configs/pb1100_defconfig 2005/07/06 12:08:11 1.57 +++ linux/arch/mips/configs/pb1100_defconfig 2005/07/11 10:50:12 1.58 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:25 2005 +# Mon Jul 11 11:46:39 2005 # CONFIG_MIPS=y @@ -92,6 +92,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/pb1500_defconfig linux/arch/mips/configs/pb1500_defconfig --- linux/arch/mips/configs/pb1500_defconfig 2005/07/06 12:08:11 1.63 +++ linux/arch/mips/configs/pb1500_defconfig 2005/07/11 10:50:12 1.64 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:25 2005 +# Mon Jul 11 11:46:41 2005 # CONFIG_MIPS=y @@ -92,6 +92,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/pb1550_defconfig linux/arch/mips/configs/pb1550_defconfig --- linux/arch/mips/configs/pb1550_defconfig 2005/07/06 12:08:11 1.53 +++ linux/arch/mips/configs/pb1550_defconfig 2005/07/11 10:50:12 1.54 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:26 2005 +# Mon Jul 11 11:46:44 2005 # CONFIG_MIPS=y @@ -92,6 +92,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/rm200_defconfig linux/arch/mips/configs/rm200_defconfig --- linux/arch/mips/configs/rm200_defconfig 2005/07/06 12:08:12 1.65 +++ linux/arch/mips/configs/rm200_defconfig 2005/07/11 10:50:12 1.66 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:26 2005 +# Mon Jul 11 11:46:49 2005 # CONFIG_MIPS=y @@ -94,6 +94,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/sb1250-swarm_defconfig linux/arch/mips/configs/sb1250-swarm_defconfig --- linux/arch/mips/configs/sb1250-swarm_defconfig 2005/07/06 12:08:12 1.61 +++ linux/arch/mips/configs/sb1250-swarm_defconfig 2005/07/11 10:50:12 1.62 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:27 2005 +# Mon Jul 11 11:46:51 2005 # CONFIG_MIPS=y @@ -94,6 +94,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/sead_defconfig linux/arch/mips/configs/sead_defconfig --- linux/arch/mips/configs/sead_defconfig 2005/07/06 12:08:12 1.53 +++ linux/arch/mips/configs/sead_defconfig 2005/07/11 10:50:12 1.54 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:27 2005 +# Mon Jul 11 11:46:53 2005 # CONFIG_MIPS=y @@ -84,6 +84,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/tb0226_defconfig linux/arch/mips/configs/tb0226_defconfig --- linux/arch/mips/configs/tb0226_defconfig 2005/07/06 12:08:12 1.57 +++ linux/arch/mips/configs/tb0226_defconfig 2005/07/11 10:50:12 1.58 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:28 2005 +# Mon Jul 11 11:46:55 2005 # CONFIG_MIPS=y @@ -92,6 +92,7 @@ # CONFIG_DDB5477 is not set CONFIG_MACH_VR41XX=y # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/tb0229_defconfig linux/arch/mips/configs/tb0229_defconfig --- linux/arch/mips/configs/tb0229_defconfig 2005/07/06 12:08:12 1.60 +++ linux/arch/mips/configs/tb0229_defconfig 2005/07/11 10:50:12 1.61 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:28 2005 +# Mon Jul 11 11:46:58 2005 # CONFIG_MIPS=y @@ -92,6 +92,7 @@ # CONFIG_DDB5477 is not set CONFIG_MACH_VR41XX=y # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/workpad_defconfig linux/arch/mips/configs/workpad_defconfig --- linux/arch/mips/configs/workpad_defconfig 2005/07/06 12:08:12 1.57 +++ linux/arch/mips/configs/workpad_defconfig 2005/07/11 10:50:12 1.58 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:29 2005 +# Mon Jul 11 11:47:00 2005 # CONFIG_MIPS=y @@ -92,6 +92,7 @@ # CONFIG_DDB5477 is not set CONFIG_MACH_VR41XX=y # CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/configs/yosemite_defconfig linux/arch/mips/configs/yosemite_defconfig --- linux/arch/mips/configs/yosemite_defconfig 2005/07/06 12:08:12 1.59 +++ linux/arch/mips/configs/yosemite_defconfig 2005/07/11 10:50:12 1.60 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.12 -# Sat Jun 18 14:53:29 2005 +# Mon Jul 11 11:47:02 2005 # CONFIG_MIPS=y @@ -93,6 +93,7 @@ # CONFIG_DDB5477 is not set # CONFIG_MACH_VR41XX is not set CONFIG_PMC_YOSEMITE=y +# CONFIG_QEMU is not set # CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP32 is not set diff -urN linux/arch/mips/kernel/head.S linux/arch/mips/kernel/head.S --- linux/arch/mips/kernel/head.S 2005/04/01 14:07:13 1.66 +++ linux/arch/mips/kernel/head.S 2005/07/11 10:50:14 1.67 @@ -131,8 +131,6 @@ EXPORT(stext) # used for profiling EXPORT(_stext) - __INIT - NESTED(kernel_entry, 16, sp) # kernel entry point setup_c0_status_pri @@ -166,6 +164,8 @@ j start_kernel END(kernel_entry) + __INIT + #ifdef CONFIG_SMP /* * SMP slave cpus entry point. Board specific code for bootstrap calls this diff -urN linux/arch/mips/qemu/.cvsignore linux/arch/mips/qemu/.cvsignore --- linux/arch/mips/qemu/.cvsignore 1970/01/01 00:00:00 +++ linux/arch/mips/qemu/.cvsignore 2005-07-11 11:50:14.500769000 +0100 1.1 @@ -0,0 +1,5 @@ +.*.o +.*.o.d +.*.cmd +*.ko +*.mod.c diff -urN linux/arch/mips/qemu/Makefile linux/arch/mips/qemu/Makefile --- linux/arch/mips/qemu/Makefile 1970/01/01 00:00:00 +++ linux/arch/mips/qemu/Makefile 2005-07-11 11:50:14.521702000 +0100 1.1 @@ -0,0 +1,5 @@ +# +# Makefile for Qemu specific kernel interface routines under Linux. +# + +obj-y = q-firmware.o q-int.o q-irq.o q-mem.o q-setup.o q-vga.o diff -urN linux/arch/mips/qemu/q-firmware.c linux/arch/mips/qemu/q-firmware.c --- linux/arch/mips/qemu/q-firmware.c 1970/01/01 00:00:00 +++ linux/arch/mips/qemu/q-firmware.c 2005-07-11 11:50:14.545455000 +0100 1.1 @@ -0,0 +1,7 @@ +#include +#include + +void __init prom_init(void) +{ + add_memory_region(0x0<<20, 0x10<<20, BOOT_MEM_RAM); +} diff -urN linux/arch/mips/qemu/q-int.S linux/arch/mips/qemu/q-int.S --- linux/arch/mips/qemu/q-int.S 1970/01/01 00:00:00 +++ linux/arch/mips/qemu/q-int.S 2005-07-11 11:50:14.570837000 +0100 1.1 @@ -0,0 +1,17 @@ +/* + * Qemu interrupt handler code. + * + * Copyright (C) 2005 by Ralf Baechle + */ +#include +#include +#include + + .align 5 + NESTED(qemu_handle_int, PT_SIZE, sp) + SAVE_ALL + CLI + move a0, sp + PTR_LA ra, ret_from_irq + j do_qemu_int + END(qemu_handle_int) diff -urN linux/arch/mips/qemu/q-irq.c linux/arch/mips/qemu/q-irq.c --- linux/arch/mips/qemu/q-irq.c 1970/01/01 00:00:00 +++ linux/arch/mips/qemu/q-irq.c 2005-07-11 11:50:14.583834000 +0100 1.1 @@ -0,0 +1,37 @@ +#include +#include + +#include +#include +#include +#include +#include + +extern asmlinkage void qemu_handle_int(void); + +asmlinkage void do_qemu_int(struct pt_regs *regs) +{ + unsigned int pending = read_c0_status() & read_c0_cause(); + + if (pending & 0x8000) { + ll_timer_interrupt(Q_COUNT_COMPARE_IRQ, regs); + return; + } + if (pending & 0x0400) { + int irq = i8259_irq(); + + if (likely(irq >= 0)) + do_IRQ(irq, regs); + + return; + } +} + +void __init arch_init_irq(void) +{ + set_except_vector(0, qemu_handle_int); + mips_hpt_frequency = QEMU_C0_COUNTER_CLOCK; /* 100MHz */ + + init_i8259_irqs(); + set_c0_status(0x8400); +} diff -urN linux/arch/mips/qemu/q-mem.c linux/arch/mips/qemu/q-mem.c --- linux/arch/mips/qemu/q-mem.c 1970/01/01 00:00:00 +++ linux/arch/mips/qemu/q-mem.c 2005-07-11 11:50:14.609481000 +0100 1.1 @@ -0,0 +1,6 @@ +#include + +unsigned long __init prom_free_prom_memory(void) +{ + return 0UL; +} diff -urN linux/arch/mips/qemu/q-setup.c linux/arch/mips/qemu/q-setup.c --- linux/arch/mips/qemu/q-setup.c 1970/01/01 00:00:00 +++ linux/arch/mips/qemu/q-setup.c 2005-07-11 11:50:14.634915000 +0100 1.1 @@ -0,0 +1,23 @@ +#include +#include +#include + +extern void qvga_init(void); + +#define QEMU_PORT_BASE 0xb4000000 + +static void __init qemu_timer_setup(struct irqaction *irq) +{ + /* set the clock to 100 Hz */ + outb_p(0x34,0x43); /* binary, mode 2, LSB/MSB, ch 0 */ + outb_p(LATCH & 0xff , 0x40); /* LSB */ + outb(LATCH >> 8 , 0x40); /* MSB */ + setup_irq(0, irq); +} + +void __init plat_setup(void) +{ + set_io_port_base(QEMU_PORT_BASE); + qvga_init(); + board_timer_setup = qemu_timer_setup; +} diff -urN linux/arch/mips/qemu/q-vga.c linux/arch/mips/qemu/q-vga.c --- linux/arch/mips/qemu/q-vga.c 1970/01/01 00:00:00 +++ linux/arch/mips/qemu/q-vga.c 2005-07-11 11:50:14.657562000 +0100 1.1 @@ -0,0 +1,188 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2005 by Ralf Baechle (ralf@linux-mips.org) + * + * This will eventually go into the qemu firmware. + */ +#include +#include +#include +#include