CVS Update@linux-mips.org: malta

[chris@linux-mips.org]

CVSROOT:        /home/cvs
Module name:    malta
Changes by:     chris@ftp.linux-mips.org        05/07/28 18:21:49

Modified files:
        linux/include/asm-mips: Tag: MaltaRef_2_6 system.h 

Log message:
        * include/asm-mips/system.h: comment typo

diff -urN malta/linux/include/asm-mips/system.h 
malta/linux/include/asm-mips/system.h
--- malta/linux/include/asm-mips/system.h       2005/06/21 13:36:24     
1.69.1000.3
+++ malta/linux/include/asm-mips/system.h       2005/07/28 17:21:49     
1.69.1000.4
@@ -71,7 +71,7 @@
  * does not enforce ordering, since there is no data dependency between
  * the read of "a" and the read of "b".  Therefore, on some CPUs, such
  * as Alpha, "y" could be set to 3 and "x" to 0.  Use rmb()
- * in cases like thiswhere there are no data dependencies.
+ * in cases like this where there are no data dependencies.
  */
 
 #define read_barrier_depends() do { } while(0)