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CVS Update@linux-mips.org: malta

To: maltalinux-cvs-patches@linux-mips.org
Subject: CVS Update@linux-mips.org: malta
From: beth@linux-mips.org
Date: Fri, 10 Jun 2005 10:45:01 +0100
Reply-to: linux-mips@linux-mips.org
Sender: maltalinux-cvs-patches-bounce@linux-mips.org
CVSROOT:        /home/cvs
Module name:    malta
Changes by:     beth@ftp.linux-mips.org 05/06/10 10:45:00

Modified files:
        linux/arch/mips: Tag: MaltaRef_2_6 Kconfig 
        linux/arch/mips/kernel: Tag: MaltaRef_2_6 Makefile cpu-probe.c 
                                entry.S proc.c 
        linux/include/asm-mips: Tag: MaltaRef_2_6 cpu-features.h cpu.h 
                                hazards.h mipsregs.h 
Added files:
        linux/arch/mips/kernel: Tag: MaltaRef_2_6 mips_mt.c rtlx.c vpe.c 
        linux/include/asm-mips: Tag: MaltaRef_2_6 mipsmtregs.h rtlx.h 

Log message:
        * arch/mips/kernel/cpu-probe.c:
        * arch/mips/kernel/entry.S:
        * arch/mips/kernel/mips_mt.c:
        * arch/mips/kernel/proc.c:
        * include/asm-mips/cpu-features.h:
        * include/asm-mips/cpu.h:
        * include/asm-mips/hazards.h:
        * include/asm-mips/mipsmtregs.h:
        * include/asm-mips/mipsregs.h: Add support for MIPS 34K
        
        * arch/mips/Kconfig:
        * arch/mips/kernel/Makefile:
        * arch/mips/kernel/rtlx.c:
        * arch/mips/kernel/vpe.c:
        * include/asm-mips/rtlx.h: Add support for MIPS AP/SP

diff -urN malta/linux/arch/mips/Kconfig malta/linux/arch/mips/Kconfig
--- malta/linux/arch/mips/Kconfig       2004/09/14 16:27:50     1.73.1000.4
+++ malta/linux/arch/mips/Kconfig       2005/06/10 09:44:59     1.73.1000.5
@@ -1296,12 +1296,38 @@
        default y if CPU_SB1 || MIPS_BOARDS_GEN
 
 config CPU_MIPS32_24K
-       bool "Support for MIPS 24K CPU" if CPU_MIPS32
+       bool "Support for MIPS 24K/34K CPUs" if CPU_MIPS32
        default y if MIPS_BOARDS_GEN
        help
-         Include support for the MIPS 24K. This option is necessary for
-         correct operation of the kernel on a 24K.  It incurs a minor overhead
-         for other MIPS32 processors.
+         Include support for the MIPS 24K and 34K. This option is necessary 
+         for correct operation of the kernel on a 24K or 34K.  It incurs a 
+         minor overhead for other MIPS32 processors. If in doubt say yes.
+
+config MIPS_MT
+       bool "Enable MIPS MT"
+
+config MIPS_VPE_LOADER
+       bool "VPE loader support."
+       depends on MIPS_MT
+       help
+         Includes a loader for loading an elf relocatable object
+         onto another VPE and running it.
+
+config MIPS_VPE_LOADER_TOM
+       bool "Load VPE program into memory hidden from linux"
+       depends on MIPS_VPE_LOADER
+       default y  
+       help
+         The loader can use memory that is present but has been hidden from
+         Linux using the kernel command line option "mem=xxMB". It's up to
+         you to ensure the amount you put in the option and the space your
+         program requires is less or equal to the amount physically present.
+
+# this should possibly be in drivers/char, but it is rather cpu related. Hmmm
+config MIPS_VPE_APSP_API
+       bool "Enable support for AP/SP API (RTLX)"
+       depends on MIPS_VPE_LOADER      
+       help
 
 config SB1_PASS_1_WORKAROUNDS
        bool
@@ -1409,7 +1435,7 @@
 
 config SMP
        bool "Multi-Processing support"
-       depends on CPU_RM9000 || (SIBYTE_SB1250 && !SIBYTE_STANDALONE) || 
SGI_IP27
+       depends on CPU_RM9000 || (SIBYTE_SB1250 && !SIBYTE_STANDALONE) || 
SGI_IP27 
        ---help---
          This enables support for systems with more than one CPU. If you have
          a system with only one CPU, like most personal computers, say N. If
diff -urN malta/linux/arch/mips/kernel/mips_mt.c 
malta/linux/arch/mips/kernel/mips_mt.c
--- malta/linux/arch/mips/kernel/Attic/mips_mt.c        1970/01/01 00:00:00
+++ malta/linux/arch/mips/kernel/Attic/mips_mt.c        2005-06-10 
10:45:00.011099000 +0100     1.1.2.1
@@ -0,0 +1,98 @@
+/*
+ * General MIPS MT support routines, usable in AP/SP, SMVP, or SMTC kernels
+ * Copyright (C) 2005 Mips Technologies, Inc 
+ */
+
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/cpumask.h>
+#include <linux/interrupt.h>
+
+#include <asm/cpu.h>
+#include <asm/processor.h>
+#include <asm/atomic.h>
+#include <asm/system.h>
+#include <asm/hardirq.h>
+#include <asm/mmu_context.h>
+#include <asm/smp.h>
+#include <asm/mipsmtregs.h>
+#include <asm/cacheflush.h>
+
+/*
+ * Dump new MIPS MT state for the core. Does *not* halt TCs.
+ */
+
+void mips_mt_regdump()
+{
+       int flags;
+       int vpflags;
+       int mvpconf0;
+       int nvpe;
+       int ntc;
+       int i;
+       int tc;
+       unsigned long haltval;
+       unsigned long tcstatval;
+#ifdef CONFIG_MIPS_MT_SMTC
+       void smtc_soft_dump(void);
+#endif /* CONFIG_MIPT_MT_SMTC */
+
+       local_irq_save(flags);
+       vpflags = dvpe();
+
+       printk("=== MIPS MT State Dump ===\n");
+       printk("-- Global State --\n");
+       printk("   MVPControl : %08x\n", vpflags);
+       printk("   MVPConf0 : %08x\n", (mvpconf0 = read_c0_mvpconf0()));
+       nvpe = ((mvpconf0 & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT) + 1;
+       ntc = ((mvpconf0 & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT) + 1;
+       printk("-- per-VPE State --\n");
+       for(i = 0; i < nvpe; i++) {
+           for(tc = 0; tc < ntc; tc++) {
+                       settc(tc);
+               if((read_tc_c0_tcbind() & TCBIND_CURVPE) == i) {
+                   printk("  VPE %d\n", i);
+                   printk("   VPEControl : %08lx\n", read_vpe_c0_vpecontrol());
+                   printk("   VPEConf0 : %08lx\n", read_vpe_c0_vpeconf0());
+                   printk("   VPE%d.Status : %08lx\n", i, 
read_vpe_c0_status());
+                   printk("   VPE%d.Cause : %08lx\n", i, read_vpe_c0_cause());
+                   break; /* Next VPE */
+               }
+           }
+       }
+       printk("-- per-TC State --\n");
+       for(tc = 0; tc < ntc; tc++) {
+               settc(tc);
+               if(read_tc_c0_tcbind() == read_c0_tcbind()) {
+                       /* Are we dumping ourself?  */
+                       haltval = 0; /* Then we're not halted, and mustn't be */
+                       tcstatval = flags; /* And pre-dump TCStatus is flags */
+                       printk("  TC %d (current TC)\n", tc);
+               } else { 
+                       haltval = read_tc_c0_tchalt();
+                       write_tc_c0_tchalt(1);
+                       tcstatval = read_tc_c0_tcstatus();
+                       printk("  TC %d\n", tc);
+               }
+               printk("   TCStatus : %08lx\n", tcstatval);
+               printk("   TCBind : %08lx\n", read_tc_c0_tcbind());
+               printk("   TCRestart : %08lx\n", read_tc_c0_tcrestart());
+               printk("   TCHalt : %08lx\n", haltval);
+               printk("   TCContext : %08lx\n", read_tc_c0_tccontext());
+               if(!haltval) write_tc_c0_tchalt(0);
+       }
+#ifdef CONFIG_MIPS_MT_SMTC
+       smtc_soft_dump();
+#endif /* CONFIG_MIPT_MT_SMTC */
+       printk("===========================\n");
+       evpe(vpflags);
+       local_irq_restore(flags);
+}
+
+asmlinkage void noinline mips_mt_inthazard(void)
+{
+       __asm__ __volatile__("jr.hb $ra\n\t");
+}
+
+
+
diff -urN malta/linux/arch/mips/kernel/rtlx.c 
malta/linux/arch/mips/kernel/rtlx.c
--- malta/linux/arch/mips/kernel/Attic/rtlx.c   1970/01/01 00:00:00
+++ malta/linux/arch/mips/kernel/Attic/rtlx.c   2005-06-10 10:45:00.022201000 
+0100     1.1.2.1
@@ -0,0 +1,341 @@
+/*
+ * Copyright (C) 2005 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/init.h>
+#include <asm/uaccess.h>
+#include <linux/slab.h>
+#include <linux/list.h>
+#include <linux/vmalloc.h>
+#include <linux/elf.h>
+#include <linux/seq_file.h>
+#include <linux/syscalls.h>
+#include <linux/moduleloader.h>
+#include <linux/interrupt.h>
+#include <linux/poll.h>
+#include <linux/sched.h>
+#include <linux/wait.h>
+#include <asm/mipsmtregs.h>
+#include <asm/cacheflush.h>
+#include <asm/atomic.h>
+#include <asm/cpu.h>
+#include <asm/processor.h>
+#include <asm/system.h>
+#include <asm/rtlx.h>
+
+#define RTLX_MAJOR 64
+#define RTLX_TARG_VPE 1
+
+struct rtlx_info *rtlx;
+static int major;
+static char module_name[] = "rtlx";
+static inline int spacefree(int read, int write, int size);
+
+static struct chan_waitqueues {
+       wait_queue_head_t rt_queue;
+       wait_queue_head_t lx_queue;
+} channel_wqs[RTLX_CHANNELS];
+
+static struct irqaction irq;
+static int irq_num;
+
+extern void *vpe_get_shared(int index);
+
+static void rtlx_dispatch(struct pt_regs *regs)
+{
+       do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_RTLX_IRQ, regs);
+}
+
+irqreturn_t rtlx_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+       irqreturn_t r = IRQ_HANDLED;
+       int i;
+
+       for (i = 0; i < RTLX_CHANNELS; i++) {
+               struct rtlx_channel *chan = &rtlx->channel[i];
+
+               if (chan->lx_read != chan->lx_write)
+                       wake_up_interruptible(&channel_wqs[i].lx_queue);
+       }
+
+       return r;
+}
+
+void dump_rtlx(void)
+{
+       int i;
+
+       printk("id 0x%lx state %d\n", rtlx->id, rtlx->state);
+
+       for (i = 0; i < RTLX_CHANNELS; i++) {
+               struct rtlx_channel *chan = &rtlx->channel[i];
+
+               printk(" rt_state %d lx_state %d buffer_size %d\n",
+                      chan->rt_state, chan->lx_state, chan->buffer_size);
+
+               printk(" rt_read %d rt_write %d\n",
+                      chan->rt_read, chan->rt_write);
+
+               printk(" lx_read %d lx_write %d\n",
+                      chan->lx_read, chan->lx_write);
+
+               printk(" rt_buffer <%s>\n", chan->rt_buffer);
+               printk(" lx_buffer <%s>\n", chan->lx_buffer);
+       }
+}
+
+/* call when we have the address of the shared structure from the SP side. */
+static int rtlx_init(struct rtlx_info *rtlxi)
+{
+       int i;
+
+       if (rtlxi->id != RTLX_ID) {
+               printk(KERN_WARNING "no valid RTLX id at 0x%p\n", rtlxi);
+               return (-ENOEXEC);
+       }
+
+       /* initialise the wait queues */
+       for (i = 0; i < RTLX_CHANNELS; i++) {
+               init_waitqueue_head(&channel_wqs[i].rt_queue);
+               init_waitqueue_head(&channel_wqs[i].lx_queue);
+       }
+
+       /* set up for interrupt handling */
+       memset(&irq, 0, sizeof(struct irqaction));
+
+       if (cpu_has_vi) {
+               set_vi_handler(MIPS_CPU_RTLX_IRQ, rtlx_dispatch);
+       }
+
+       irq_num = MIPSCPU_INT_BASE + MIPS_CPU_RTLX_IRQ;
+       irq.handler = rtlx_interrupt;
+       irq.flags = SA_INTERRUPT;
+       irq.name = "RTLX";
+       irq.dev_id = rtlx;
+       setup_irq(irq_num, &irq);
+
+       rtlx = rtlxi;
+       return (0);
+}
+
+/* only allow one open process at a time to open each channel */
+static int rtlx_open(struct inode *inode, struct file *filp)
+{
+       int minor, ret;
+       struct rtlx_channel *chan;
+
+       /* assume only 1 device at the mo. */
+       minor = MINOR(inode->i_rdev);
+
+       if (rtlx == NULL) {
+               struct rtlx_info **p;
+               if( (p = vpe_get_shared(RTLX_TARG_VPE)) == NULL) {
+                       printk(" vpe_get_shared is NULL. Has an SP program been 
loaded?\n");
+                       return (-EFAULT);
+               }
+
+               if (*p == NULL) {
+                       printk(" vpe_shared %p %p\n", p, *p);
+                       return (-EFAULT);
+               }
+
+               if ((ret = rtlx_init(*p)) < 0)
+                       return (ret);
+       }
+
+       chan = &rtlx->channel[minor];
+
+       /* already open? */
+       if (chan->lx_state == RTLX_STATE_OPENED)
+               return (-EBUSY);
+
+       chan->lx_state = RTLX_STATE_OPENED;
+       return (0);
+}
+
+static int rtlx_release(struct inode *inode, struct file *filp)
+{
+       int minor;
+
+       minor = MINOR(inode->i_rdev);
+       rtlx->channel[minor].lx_state = RTLX_STATE_UNUSED;
+       return (0);
+}
+
+static unsigned int rtlx_poll(struct file *file, poll_table * wait)
+{
+       int minor;
+       unsigned int mask = 0;
+       struct rtlx_channel *chan;
+
+       minor = MINOR(file->f_dentry->d_inode->i_rdev);
+       chan = &rtlx->channel[minor];
+
+       poll_wait(file, &channel_wqs[minor].rt_queue, wait);
+       poll_wait(file, &channel_wqs[minor].lx_queue, wait);
+
+       /* data available to read? */
+       if (chan->lx_read != chan->lx_write)
+               mask |= POLLIN | POLLRDNORM;
+
+       /* space to write */
+       if (spacefree(chan->rt_read, chan->rt_write, chan->buffer_size))
+               mask |= POLLOUT | POLLWRNORM;
+
+       return (mask);
+}
+
+static ssize_t rtlx_read(struct file *file, char __user * buffer, size_t count,
+                        loff_t * ppos)
+{
+       size_t fl = 0L;
+       int minor;
+       struct rtlx_channel *lx;
+       DECLARE_WAITQUEUE(wait, current);
+
+       minor = MINOR(file->f_dentry->d_inode->i_rdev);
+       lx = &rtlx->channel[minor];
+
+       /* data available? */
+       if (lx->lx_write == lx->lx_read) {
+               if (file->f_flags & O_NONBLOCK)
+                       return (0);     // -EAGAIN makes cat whinge
+
+               /* go to sleep */
+               add_wait_queue(&channel_wqs[minor].lx_queue, &wait);
+               set_current_state(TASK_INTERRUPTIBLE);
+
+               while (lx->lx_write == lx->lx_read)
+                       schedule();
+
+               set_current_state(TASK_RUNNING);
+               remove_wait_queue(&channel_wqs[minor].lx_queue, &wait);
+
+               /* back running */
+       }
+
+       /* find out how much in total */
+       count = min( count,
+                    (size_t)(lx->lx_write + lx->buffer_size - lx->lx_read) % 
lx->buffer_size);
+
+       /* then how much from the read pointer onwards */
+       fl = min( count, (size_t)lx->buffer_size - lx->lx_read);
+
+       copy_to_user (buffer, &lx->lx_buffer[lx->lx_read], fl);
+
+       /* and if there is anything left at the beginning of the buffer */
+       if ( count - fl )
+               copy_to_user (buffer + fl, lx->lx_buffer, count - fl);
+
+       /* update the index */
+       lx->lx_read += count;
+       lx->lx_read %= lx->buffer_size;
+
+       return (count);
+}
+
+static inline int spacefree(int read, int write, int size)
+{
+       if (read == write) {
+               /* never fill the buffer completely, so indexes are always 
equal if empty
+                  and only empty, or !equal if data available */
+               return (size - 1);
+       }
+
+       return ((read + size - write) % size) - 1;
+}
+
+static ssize_t rtlx_write(struct file *file, const char __user * buffer,
+                         size_t count, loff_t * ppos)
+{
+       int minor;
+       struct rtlx_channel *rt;
+       size_t fl;
+       DECLARE_WAITQUEUE(wait, current);
+
+       minor = MINOR(file->f_dentry->d_inode->i_rdev);
+       rt = &rtlx->channel[minor];
+
+       /* any space left... */
+       if (!spacefree(rt->rt_read, rt->rt_write, rt->buffer_size)) {
+
+               if (file->f_flags & O_NONBLOCK)
+                       return (-EAGAIN);
+
+               add_wait_queue(&channel_wqs[minor].rt_queue, &wait);
+               set_current_state(TASK_INTERRUPTIBLE);
+
+               while (!spacefree(rt->rt_read, rt->rt_write, rt->buffer_size))
+                       schedule();
+
+               set_current_state(TASK_RUNNING);
+               remove_wait_queue(&channel_wqs[minor].rt_queue, &wait);
+       }
+
+       /* total number of bytes to copy */
+       count = min( count, (size_t)spacefree(rt->rt_read, rt->rt_write, 
rt->buffer_size) );
+
+       /* first bit from write pointer to the end of the buffer, or count */
+       fl = min(count, (size_t) rt->buffer_size - rt->rt_write);
+       
+       copy_from_user(&rt->rt_buffer[rt->rt_write], buffer, fl);
+
+       /* if there's any left copy to the beginning of the buffer */
+       if( count - fl )
+               copy_from_user(rt->rt_buffer, buffer + fl, count - fl);
+
+       rt->rt_write += count;
+       rt->rt_write %= rt->buffer_size;
+
+       return(count);
+}
+
+static struct file_operations rtlx_fops = {
+       .owner = THIS_MODULE,
+       .open = rtlx_open,
+       .release = rtlx_release,
+       .write = rtlx_write,
+       .read = rtlx_read,
+       .poll = rtlx_poll
+};
+
+static int rtlx_module_init(void)
+{
+       if ((major = register_chrdev(RTLX_MAJOR, module_name, &rtlx_fops)) < 0) 
{
+               printk("rtlx_module_init: unable to register device\n");
+               return (-EBUSY);
+       }
+
+       if (major == 0)
+               major = RTLX_MAJOR;
+
+       return (0);
+}
+
+static void rtlx_module_exit(void)
+{
+       unregister_chrdev(major, module_name);
+}
+
+module_init(rtlx_module_init);
+module_exit(rtlx_module_exit);
+MODULE_DESCRIPTION("MIPS RTLX");
+MODULE_AUTHOR("Elizabeth Clarke, MIPS Technologies, Inc");
+MODULE_LICENSE("GPL");
diff -urN malta/linux/arch/mips/kernel/vpe.c malta/linux/arch/mips/kernel/vpe.c
--- malta/linux/arch/mips/kernel/Attic/vpe.c    1970/01/01 00:00:00
+++ malta/linux/arch/mips/kernel/Attic/vpe.c    2005-06-10 10:45:00.035922000 
+0100     1.1.2.1
@@ -0,0 +1,1295 @@
+/*
+ * Copyright (C) 2004, 2005 MIPS Technologies, Inc.  All rights reserved.
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ */
+
+/*
+ * VPE support module
+ *
+ * Provides support for loading a MIPS SP program on VPE1.
+ * The SP enviroment is rather simple, no tlb's.  It needs to be relocatable
+ * (or partially linked). You should initialise your stack in the startup
+ * code. This loader looks for the symbol __start and sets up
+ * execution to resume from there. The MIPS SDE kit contains suitable examples.
+ *
+ * To load and run, simply cat a SP 'program file' to /dev/vpe1.
+ * i.e cat spapp >/dev/vpe1.
+ *
+ * You'll need to have the following device files.
+ * mknod /dev/vpe0 c 63 0
+ * mknod /dev/vpe1 c 63 1
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/init.h>
+#include <asm/uaccess.h>
+#include <linux/slab.h>
+#include <linux/list.h>
+#include <linux/vmalloc.h>
+#include <linux/elf.h>
+#include <linux/seq_file.h>
+#include <linux/syscalls.h>
+#include <linux/moduleloader.h>
+#include <linux/interrupt.h>
+#include <linux/poll.h>
+#include <linux/bootmem.h>
+#include <asm/mipsregs.h>
+#include <asm/cacheflush.h>
+#include <asm/atomic.h>
+#include <asm/cpu.h>
+#include <asm/processor.h>
+#include <asm/system.h>
+
+typedef void *vpe_handle;
+
+#if 0
+#define DEBUGP printk
+#else
+#define DEBUGP(fmt , a...)
+#endif
+
+// defined here because the kernel module loader doesn't have
+// anything to do with it.
+#define SHN_MIPS_SCOMMON 0xff03
+
+#ifndef ARCH_SHF_SMALL
+#define ARCH_SHF_SMALL 0
+#endif
+
+/* If this is set, the section belongs in the init part of the module */
+#define INIT_OFFSET_MASK (1UL << (BITS_PER_LONG-1))
+
+// temp number, 
+#define VPE_MAJOR 63
+
+static char module_name[] = "vpe";
+static int major = 0;
+
+/* grab the likely amount of memory we will need. */
+#ifdef CONFIG_MIPS_VPE_LOADER_TOM
+#define P_SIZE (2 * 1024 * 1024)
+#else
+/* add an overhead to the max kmalloc size for non-striped symbols/etc */
+#define P_SIZE (256 * 1024)
+#endif
+
+#define MAX_VPES 16
+
+enum vpe_state {
+       VPE_STATE_UNUSED = 0,
+       VPE_STATE_INUSE,
+       VPE_STATE_RUNNING
+};
+
+enum tc_state { 
+       TC_STATE_UNUSED = 0,
+       TC_STATE_INUSE,
+       TC_STATE_RUNNING,
+       TC_STATE_DYNAMIC
+};
+
+struct vpe;
+typedef struct tc {
+       enum tc_state state;
+       int index;
+
+       /* parent VPE */
+       struct vpe *pvpe;
+       
+       /* The list of TC's with this VPE */
+       struct list_head tc;
+
+       /* The global list of tc's */
+       struct list_head list;
+} tc_t;
+
+typedef struct vpe {
+       enum vpe_state state;
+
+       /* (device) minor associated with this vpe */
+       int minor;
+
+       /* elfloader stuff */
+       void *load_addr;
+       u32 len;
+       char *pbuffer;
+       u32 plen;
+
+       unsigned long __start;
+
+       /* tc's associated with this vpe */
+       struct list_head tc;
+
+       /* The list of vpe's */
+       struct list_head list;
+
+       /* shared symbol address */
+       void *shared_ptr;
+} vpe_t;
+
+struct vpecontrol_ {
+       /* Virtual processing elements */
+       struct list_head vpe_list;
+
+       /* Thread contexts */
+       struct list_head tc_list;
+} vpecontrol;
+
+static void release_progmem(void *ptr);
+static void dump_vpe(vpe_t * v);
+extern void save_gp_address(unsigned int secbase, unsigned int rel);
+
+/* get the vpe associated with this minor */
+struct vpe *get_vpe(int minor)
+{
+       struct vpe *v;
+
+       list_for_each_entry(v, &vpecontrol.vpe_list, list) {
+               if (v->minor == minor)
+                       return (v);
+       }
+
+       printk(KERN_DEBUG "VPE: get_vpe minor %d not found\n", minor);
+       return (NULL);
+}
+
+/* get the vpe associated with this minor */
+struct tc *get_tc(int index)
+{
+       struct tc *t;
+
+       list_for_each_entry(t, &vpecontrol.tc_list, list) {
+               if (t->index == index)
+                       return (t);
+       }
+
+       printk(KERN_DEBUG "VPE: get_tc index %d not found\n", index);
+
+       return (NULL);
+}
+
+struct tc *get_tc_unused(void)
+{
+       struct tc *t;
+
+       list_for_each_entry(t, &vpecontrol.tc_list, list) {
+               if (t->state == TC_STATE_UNUSED)
+                       return (t);
+       }
+
+       printk(KERN_DEBUG "VPE: All TC's are in use\n");
+
+       return (NULL);
+}
+
+/* allocate a vpe and associate it with this minor (or index) */
+struct vpe *alloc_vpe(int minor)
+{
+       struct vpe *v;
+
+       if ((v = kmalloc(sizeof(struct vpe), GFP_KERNEL)) == NULL) {
+               printk(KERN_WARNING "VPE: alloc_vpe no mem\n");
+               return (NULL);
+       }
+
+       memset(v, 0, sizeof(struct vpe));
+
+       INIT_LIST_HEAD(&v->tc);
+       list_add_tail(&v->list, &vpecontrol.vpe_list);
+
+       v->minor = minor;
+       return (v);
+}
+
+/* allocate a tc. At startup only tc0 is running, all other can be halted. */
+struct tc *alloc_tc(int index)
+{
+       struct tc *t;
+
+       if ((t = kmalloc(sizeof(struct tc), GFP_KERNEL)) == NULL) {
+               printk(KERN_WARNING "VPE: alloc_tc no mem\n");
+               return (NULL);
+       }
+
+       memset(t, 0, sizeof(struct tc));
+
+       INIT_LIST_HEAD(&t->tc);
+       list_add_tail(&t->list, &vpecontrol.tc_list);
+
+       t->index = index;
+
+       return (t);
+}
+
+/* clean up and free everything */
+void release_vpe(struct vpe *v)
+{
+       list_del(&v->list);
+       if (v->load_addr)
+               release_progmem(v);
+       kfree(v);
+}
+
+void dump_mtregs(void)
+{
+       unsigned long val;
+
+       val = read_c0_config3();
+       printk("config3 0x%lx MT %ld\n", val,
+              (val & CONFIG3_MT) >> CONFIG3_MT_SHIFT);
+
+       val = read_c0_mvpconf0();
+       printk("mvpconf0 0x%lx, PVPE %ld PTC %ld M %ld\n", val,
+              (val & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT,
+              val & MVPCONF0_PTC, (val & MVPCONF0_M) >> MVPCONF0_M_SHIFT);
+
+       val = read_c0_mvpcontrol();
+       printk("MVPControl 0x%lx, STLB %ld VPC %ld EVP %ld\n", val,
+              (val & MVPCONTROL_STLB) >> MVPCONTROL_STLB_SHIFT,
+              (val & MVPCONTROL_VPC) >> MVPCONTROL_VPC_SHIFT,
+              (val & MVPCONTROL_EVP));
+
+       val = read_c0_vpeconf0();
+       printk("VPEConf0 0x%lx MVP %ld\n", val,
+              (val & VPECONF0_MVP) >> VPECONF0_MVP_SHIFT);
+}
+
+/* Find some VPE program space  */
+static void *alloc_progmem(u32 len)
+{
+#ifdef CONFIG_MIPS_VPE_LOADER_TOM
+       /* this means you must tell linux to use less memory than you 
physically have */
+       return ((void *)((max_pfn * PAGE_SIZE) + KSEG0));
+#else
+       // simple grab some mem for now
+       return (kmalloc(len, GFP_KERNEL));
+#endif
+}
+
+static void release_progmem(void *ptr)
+{
+#ifndef CONFIG_MIPS_VPE_LOADER_TOM
+       if (ptr)
+               kfree(ptr);
+#endif
+}
+
+/* Update size with this section: return offset. */
+static long get_offset(unsigned long *size, Elf_Shdr * sechdr)
+{
+       long ret;
+
+       ret = ALIGN(*size, sechdr->sh_addralign ? : 1);
+       *size = ret + sechdr->sh_size;
+       return ret;
+}
+
+/* Lay out the SHF_ALLOC sections in a way not dissimilar to how ld
+   might -- code, read-only data, read-write data, small data.  Tally
+   sizes, and place the offsets into sh_entsize fields: high bit means it
+   belongs in init. */
+static void layout_sections(struct module *mod, const Elf_Ehdr * hdr,
+                           Elf_Shdr * sechdrs, const char *secstrings)
+{
+       static unsigned long const masks[][2] = {
+               /* NOTE: all executable code must be the first section
+                * in this array; otherwise modify the text_size
+                * finder in the two loops below */
+               {SHF_EXECINSTR | SHF_ALLOC, ARCH_SHF_SMALL},
+               {SHF_ALLOC, SHF_WRITE | ARCH_SHF_SMALL},
+               {SHF_WRITE | SHF_ALLOC, ARCH_SHF_SMALL},
+               {ARCH_SHF_SMALL | SHF_ALLOC, 0}
+       };
+       unsigned int m, i;
+
+       for (i = 0; i < hdr->e_shnum; i++)
+               sechdrs[i].sh_entsize = ~0UL;
+
+       for (m = 0; m < ARRAY_SIZE(masks); ++m) {
+               for (i = 0; i < hdr->e_shnum; ++i) {
+                       Elf_Shdr *s = &sechdrs[i];
+
+                       //  || strncmp(secstrings + s->sh_name, ".init", 5) == 
0)
+                       if ((s->sh_flags & masks[m][0]) != masks[m][0]
+                           || (s->sh_flags & masks[m][1])
+                           || s->sh_entsize != ~0UL)
+                               continue;
+                       s->sh_entsize = get_offset(&mod->core_size, s);
+               }
+
+               if (m == 0)
+                       mod->core_text_size = mod->core_size;
+
+       }
+}
+
+
+/* from module-elf32.c, but subverted a little */
+
+struct mips_hi16 {
+       struct mips_hi16 *next;
+       Elf32_Addr *addr;
+       Elf32_Addr value;
+};
+
+static struct mips_hi16 *mips_hi16_list;
+static unsigned int gp_offs, gp_addr;
+
+static int apply_r_mips_none(struct module *me, uint32_t *location,
+                            Elf32_Addr v)
+{
+       return 0;
+}
+
+static int apply_r_mips_gprel16(struct module *me, uint32_t *location,
+                               Elf32_Addr v)
+{
+       int rel;
+       
+       if( !(*location & 0xffff) ) {
+               rel = (int)v - gp_addr;
+       }
+       else {
+               /* .sbss + gp(relative) + offset */
+               /* kludge! */
+               rel =  (int)(short)((int)v + gp_offs +
+                                   (int)(short)(*location & 0xffff) - gp_addr);
+       }
+       
+       if( (rel > 32768) || (rel < -32768) ) {
+               printk(KERN_ERR
+                      "apply_r_mips_gprel16: relative address out of range 
0x%x %d\n",
+                      rel, rel);
+               return(-ENOEXEC);
+       }
+
+       *location = (*location & 0xffff0000) | (rel & 0xffff);
+       
+       return 0;
+}
+
+static int apply_r_mips_pc16(struct module *me, uint32_t *location,
+                            Elf32_Addr v)
+{
+       int rel;
+       rel = (((unsigned int)v - (unsigned int)location));
+       rel >>= 2;              // because the offset is in _instructions_ not 
bytes.
+       rel -= 1;               // and one instruction less due to the branch 
delay slot.
+       
+       if( (rel > 32768) || (rel < -32768) ) {
+               printk(KERN_ERR
+                      "apply_r_mips_pc16: relative address out of range 
0x%x\n", rel);
+               return(-ENOEXEC);
+       }
+       
+       *location = (*location & 0xffff0000) | (rel & 0xffff);
+       return 0;
+}
+
+static int apply_r_mips_32(struct module *me, uint32_t *location,
+                          Elf32_Addr v)
+{
+       *location += v;
+
+       return 0;
+}
+
+static int apply_r_mips_26(struct module *me, uint32_t *location,
+                          Elf32_Addr v)
+{
+       if (v % 4) {
+               printk(KERN_ERR "module %s: dangerous relocation mod4\n", 
me->name);
+               return -ENOEXEC;
+       }
+
+/* Not desperately convinced this is a good check of an overflow condition
+   anyway. But it gets in the way of handling undefined weak symbols which
+   we want to set to zero.
+   if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) {
+   printk(KERN_ERR
+   "module %s: relocation overflow\n",
+   me->name);
+   return -ENOEXEC;
+   }
+*/
+
+       *location = (*location & ~0x03ffffff) |
+               ((*location + (v >> 2)) & 0x03ffffff);
+       return 0;
+}
+
+static int apply_r_mips_hi16(struct module *me, uint32_t *location,
+                            Elf32_Addr v)
+{
+       struct mips_hi16 *n;
+
+       /*
+        * We cannot relocate this one now because we don't know the value of
+        * the carry we need to add.  Save the information, and let LO16 do the
+        * actual relocation.
+        */
+       n = kmalloc(sizeof *n, GFP_KERNEL);
+       if (!n)
+               return -ENOMEM;
+
+       n->addr = location;
+       n->value = v;
+       n->next = mips_hi16_list;
+       mips_hi16_list = n;
+
+       return 0;
+}
+
+static int apply_r_mips_lo16(struct module *me, uint32_t *location,
+                            Elf32_Addr v)
+{
+       unsigned long insnlo = *location;
+       Elf32_Addr val, vallo;
+
+       /* Sign extend the addend we extract from the lo insn.  */
+       vallo = ((insnlo & 0xffff) ^ 0x8000) - 0x8000;
+
+       if (mips_hi16_list != NULL) {
+               struct mips_hi16 *l;
+
+               l = mips_hi16_list;
+               while (l != NULL) {
+                       struct mips_hi16 *next;
+                       unsigned long insn;
+
+                       /*
+                        * The value for the HI16 had best be the same.
+                        */
+                       if (v != l->value) {
+                               printk("%d != %d\n", v, l->value);
+                               goto out_danger;
+                       }
+                       
+
+                       /*
+                        * Do the HI16 relocation.  Note that we actually don't
+                        * need to know anything about the LO16 itself, except
+                        * where to find the low 16 bits of the addend needed
+                        * by the LO16.
+                        */
+                       insn = *l->addr;
+                       val = ((insn & 0xffff) << 16) + vallo;
+                       val += v;
+
+                       /*
+                        * Account for the sign extension that will happen in
+                        * the low bits.
+                        */
+                       val = ((val >> 16) + ((val & 0x8000) != 0)) & 0xffff;
+
+                       insn = (insn & ~0xffff) | val;
+                       *l->addr = insn;
+
+                       next = l->next;
+                       kfree(l);
+                       l = next;
+               }
+
+               mips_hi16_list = NULL;
+       }
+
+       /*
+        * Ok, we're done with the HI16 relocs.  Now deal with the LO16.
+        */
+       val = v + vallo;
+       insnlo = (insnlo & ~0xffff) | (val & 0xffff);
+       *location = insnlo;
+
+       return 0;
+
+out_danger:
+       printk(KERN_ERR "module %s: dangerous " "relocation\n", me->name);
+
+       return -ENOEXEC;
+}
+
+static int (*reloc_handlers[]) (struct module *me, uint32_t *location,
+                               Elf32_Addr v) = {
+       [R_MIPS_NONE]   = apply_r_mips_none,
+       [R_MIPS_32]     = apply_r_mips_32,
+       [R_MIPS_26]     = apply_r_mips_26,
+       [R_MIPS_HI16]   = apply_r_mips_hi16,
+       [R_MIPS_LO16]   = apply_r_mips_lo16,
+       [R_MIPS_GPREL16] = apply_r_mips_gprel16,
+       [R_MIPS_PC16] = apply_r_mips_pc16
+};
+
+
+int apply_relocations(Elf32_Shdr *sechdrs,
+                     const char *strtab,
+                     unsigned int symindex,
+                     unsigned int relsec,
+                     struct module *me)
+{
+       Elf32_Rel *rel = (void *) sechdrs[relsec].sh_addr;
+       Elf32_Sym *sym;
+       uint32_t *location;
+       unsigned int i;
+       Elf32_Addr v;
+       int res;
+
+       for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
+               Elf32_Word r_info = rel[i].r_info;
+
+               /* This is where to make the change */
+               location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
+                       + rel[i].r_offset;
+               /* This is the symbol it is referring to */
+               sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
+                       + ELF32_R_SYM(r_info);
+               
+               if (!sym->st_value) {
+                       printk(KERN_DEBUG "%s: undefined weak symbol %s\n",
+                              me->name, strtab + sym->st_name);
+                       /* just print the warning, dont barf */
+               }
+
+               v = sym->st_value;
+
+               res = reloc_handlers[ELF32_R_TYPE(r_info)](me, location, v);
+               if( res ) {
+                       printk(KERN_DEBUG
+                              "relocation error 0x%x sym refer <%s> value 0x%x 
"
+                              "type 0x%x r_info 0x%x\n",
+                              (unsigned int)location, strtab + sym->st_name, v,
+                              r_info, ELF32_R_TYPE(r_info));
+               }
+
+               if (res)
+                       return res;
+       }
+
+       return 0;
+}
+
+void save_gp_address(unsigned int secbase, unsigned int rel)
+{
+       gp_addr = secbase + rel;
+       gp_offs = gp_addr - (secbase & 0xffff0000);
+}
+/* end module-elf32.c */
+
+
+
+/* Change all symbols so that sh_value encodes the pointer directly. */
+static int simplify_symbols(Elf_Shdr * sechdrs,
+                           unsigned int symindex,
+                           const char *strtab,
+                           const char *secstrings,
+                           unsigned int nsecs, struct module *mod)
+{
+       Elf_Sym *sym = (void *)sechdrs[symindex].sh_addr;
+       unsigned long secbase, bssbase = 0;
+       unsigned int i, n = sechdrs[symindex].sh_size / sizeof(Elf_Sym);
+       int ret = 0, size;
+
+       /* find the .bss section for COMMON symbols */
+       for (i = 0; i < nsecs; i++) {
+               if (strncmp(secstrings + sechdrs[i].sh_name, ".bss", 4) == 0)
+                       bssbase = sechdrs[i].sh_addr;
+       }
+
+       for (i = 1; i < n; i++) {
+               switch (sym[i].st_shndx) {
+               case SHN_COMMON:
+                       /* Allocate space for the symbol in the .bss section. 
st_value is currently size.
+                          We want it to have the address of the symbol. */
+
+                       size = sym[i].st_value;
+                       sym[i].st_value = bssbase;
+
+                       bssbase += size;
+                       break;
+
+               case SHN_ABS:
+                       /* Don't need to do anything */
+                       break;
+
+               case SHN_UNDEF:
+                       /* ret = -ENOENT; */
+                       break;
+
+               case SHN_MIPS_SCOMMON:
+
+                       printk(KERN_DEBUG
+                              "simplify_symbols: ignoring SHN_MIPS_SCOMMON 
symbol <%s> st_shndx %d\n",
+                              strtab + sym[i].st_name, sym[i].st_shndx);
+
+                       // .sbss section 
+                       break;
+
+               default:
+                       secbase = sechdrs[sym[i].st_shndx].sh_addr;
+
+                       if (strncmp(strtab + sym[i].st_name, "_gp", 3) == 0) {
+                               save_gp_address(secbase, sym[i].st_value);
+                       }
+
+                       sym[i].st_value += secbase;
+                       break;
+               }
+
+       }
+
+       return ret;
+}
+
+#ifdef DEBUG_ELFLOADER
+static void dump_elfsymbols(Elf_Shdr * sechdrs, unsigned int symindex,
+                           const char *strtab, struct module *mod)
+{
+       Elf_Sym *sym = (void *)sechdrs[symindex].sh_addr;
+       unsigned int i, n = sechdrs[symindex].sh_size / sizeof(Elf_Sym);
+
+       printk(KERN_DEBUG "dump_elfsymbols: n %d\n", n);
+       for (i = 1; i < n; i++) {
+               printk(KERN_DEBUG " i %d name <%s> 0x%x\n", i,
+                      strtab + sym[i].st_name, sym[i].st_value);
+       }
+}
+#endif
+
+static void dump_tc(struct tc *t)
+{
+       printk(KERN_WARNING "VPE: TC index %d TCStatus 0x%lx halt 0x%lx\n",
+              t->index, read_tc_c0_tcstatus(), read_tc_c0_tchalt());
+       printk(KERN_WARNING "VPE: tcrestart 0x%lx\n", read_tc_c0_tcrestart());
+}
+
+static void dump_tclist(void)
+{
+       struct tc *t;
+
+       list_for_each_entry(t, &vpecontrol.tc_list, list) {
+               dump_tc(t);
+       }
+}
+
+/* We are prepared so configure and start the VPE... */
+int vpe_run(vpe_t * v)
+{
+       unsigned long val;
+       struct tc *t;
+
+       /* check we are the Master VPE */
+       val = read_c0_vpeconf0();
+       if (!(val & VPECONF0_MVP)) {
+               printk(KERN_WARNING
+                      "VPE: only Master VPE's are allowed to configure MT\n");
+               return (-1);
+       }
+
+       /* disable MT (using dvpe) */
+       dvpe();
+
+       /* Put MVPE's into 'configuration state' */
+       write_c0_mvpcontrol(read_c0_mvpcontrol() | MVPCONTROL_VPC);
+
+       if (!list_empty(&v->tc)) {
+               if ((t = list_entry(v->tc.next, struct tc, tc)) == NULL) {
+                       printk(KERN_WARNING "VPE: TC %d is already in use.\n",
+                              t->index);
+                       return (-ENOEXEC);
+               }
+       } else {
+               printk(KERN_WARNING "VPE: No TC's associated with VPE %d\n",
+                      v->minor);
+               return (-ENOEXEC);
+       }
+
+       settc(t->index);
+
+       val = read_vpe_c0_vpeconf0();
+
+       /* should check it is halted, and not activated */
+       if ((read_tc_c0_tcstatus() & TCSTATUS_A) || !(read_tc_c0_tchalt() & 
TCHALT_H)) {
+               printk(KERN_WARNING "VPE: TC %d is already doing something!\n",
+                      t->index);
+
+               dump_tclist();
+               return (-ENOEXEC);
+       }
+
+       /* Write the address we want it to start running from in the TCPC 
register. */
+       write_tc_c0_tcrestart((unsigned long)v->__start);
+
+       /* write the sivc_info address to tccontext */
+       write_tc_c0_tccontext((unsigned long)0);
+
+       /* Set up the XTC bit in vpeconf0 to point at our tc */
+       write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | (t->index << 
VPECONF0_XTC_SHIFT));
+
+       /* mark the TC as activated, not interrupt exempt and not dynamically 
allocatable */
+       val = read_tc_c0_tcstatus();
+       val = (val & ~(TCSTATUS_DA | TCSTATUS_IXMT)) | TCSTATUS_A;
+       write_tc_c0_tcstatus(val);
+       
+       write_tc_c0_tchalt(read_tc_c0_tchalt() & ~TCHALT_H);
+
+       /* set up VPE1 */
+       write_vpe_c0_vpecontrol(read_vpe_c0_vpecontrol() & ~VPECONTROL_TE);     
// no multiple TC's
+       write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | VPECONF0_VPA);   // 
enable this VPE
+
+       /* The sde-kit passes 'memsize' to __start in $a3, so set something 
here...
+          Or set $a3 to zero and define DFLT_STACK_SIZE and DFLT_HEAP_SIZE 
when you compile
+          your program */
+
+       mttgpr($7, 0);
+
+       /* set config to be the same as vpe0, particularly kseg0 coherency alg 
*/
+       write_vpe_c0_config(read_c0_config());
+
+       /* clear out any left overs from a previous program */
+       write_vpe_c0_cause(0);
+
+       /* take system out of configuration state */
+       write_c0_mvpcontrol(read_c0_mvpcontrol() & ~MVPCONTROL_VPC);
+
+       /* clear interrupts enabled IE, ERL, EXL, and KSU from c0 status */
+       write_vpe_c0_status(read_vpe_c0_status() & ~(ST0_ERL | ST0_KSU | ST0_IE 
| ST0_EXL));
+
+       /* set it running */
+       evpe(EVPE_ENABLE);
+
+       return (0);
+}
+
+static unsigned long find_vpe_symbols(vpe_t * v, Elf_Shdr * sechdrs,
+                                     unsigned int symindex, const char *strtab,
+                                     struct module *mod)
+{
+       Elf_Sym *sym = (void *)sechdrs[symindex].sh_addr;
+       unsigned int i, n = sechdrs[symindex].sh_size / sizeof(Elf_Sym);
+
+       for (i = 1; i < n; i++) {
+               if (strcmp(strtab + sym[i].st_name, "__start") == 0) {
+                       v->__start = sym[i].st_value;
+               }
+
+               if (strcmp(strtab + sym[i].st_name, "vpe_shared") == 0) {
+                       v->shared_ptr = (void *)sym[i].st_value;
+               }
+       }
+
+       return (0);
+}
+
+/* Allocates a VPE with some program code space(the load address), copies the 
contents
+   of the program (p)buffer performing relocatations/etc, free's it when 
finished.
+*/
+int vpe_elfload(vpe_t * v)
+{
+       Elf_Ehdr *hdr;
+       Elf_Shdr *sechdrs;
+       long err = 0;
+       char *secstrings, *strtab = NULL;
+       unsigned int len, i, symindex = 0, strindex = 0;
+
+       struct module mod;      // so we can re-use the relocations code
+
+       memset(&mod, 0, sizeof(struct module));
+       strcpy(mod.name, "VPE dummy prog module");
+
+       hdr = (Elf_Ehdr *) v->pbuffer;
+       len = v->plen;
+
+       /* Sanity checks against insmoding binaries or wrong arch,
+          weird elf version */
+       if (memcmp(hdr->e_ident, ELFMAG, 4) != 0
+           || hdr->e_type != ET_REL || !elf_check_arch(hdr)
+           || hdr->e_shentsize != sizeof(*sechdrs)) {
+               printk(KERN_WARNING
+                      "VPE program, wrong arch or weird elf version\n");
+
+               return (-ENOEXEC);
+       }
+
+       if (len < hdr->e_shoff + hdr->e_shnum * sizeof(Elf_Shdr)) {
+               printk(KERN_ERR "VPE program length %u truncated\n", len);
+               return (-ENOEXEC);
+       }
+
+       /* Convenience variables */
+       sechdrs = (void *)hdr + hdr->e_shoff;
+       secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
+       sechdrs[0].sh_addr = 0;
+
+       /* And these should exist, but gcc whinges if we don't init them */
+       symindex = strindex = 0;
+
+       for (i = 1; i < hdr->e_shnum; i++) {
+
+               if (sechdrs[i].sh_type != SHT_NOBITS
+                   && len < sechdrs[i].sh_offset + sechdrs[i].sh_size) {
+                       printk(KERN_ERR "VPE program length %u truncated\n",
+                              len);
+                       return (-ENOEXEC);
+               }
+
+               /* Mark all sections sh_addr with their address in the
+                  temporary image. */
+               sechdrs[i].sh_addr = (size_t) hdr + sechdrs[i].sh_offset;
+
+               /* Internal symbols and strings. */
+               if (sechdrs[i].sh_type == SHT_SYMTAB) {
+                       symindex = i;
+                       strindex = sechdrs[i].sh_link;
+                       strtab = (char *)hdr + sechdrs[strindex].sh_offset;
+               }
+       }
+
+       layout_sections(&mod, hdr, sechdrs, secstrings);
+
+       v->load_addr = alloc_progmem(mod.core_size);
+       memset(v->load_addr, 0, mod.core_size);
+
+       printk("VPE elf_loader: loading to %p\n", v->load_addr);
+
+       for (i = 0; i < hdr->e_shnum; i++) {
+               void *dest;
+
+               if (!(sechdrs[i].sh_flags & SHF_ALLOC))
+                       continue;
+
+               dest = v->load_addr + sechdrs[i].sh_entsize;
+
+               if (sechdrs[i].sh_type != SHT_NOBITS)
+                       memcpy(dest, (void *)sechdrs[i].sh_addr,
+                              sechdrs[i].sh_size);
+               /* Update sh_addr to point to copy in image. */
+               sechdrs[i].sh_addr = (unsigned long)dest;
+       }
+
+       /* Fix up syms, so that st_value is a pointer to location. */
+       err =
+               simplify_symbols(sechdrs, symindex, strtab, secstrings,
+                                hdr->e_shnum, &mod);
+       if (err < 0) {
+               printk(KERN_WARNING "VPE: unable to simplify symbols\n");
+               goto cleanup;
+       }
+
+       /* Now do relocations. */
+       for (i = 1; i < hdr->e_shnum; i++) {
+               const char *strtab = (char *)sechdrs[strindex].sh_addr;
+               unsigned int info = sechdrs[i].sh_info;
+
+               /* Not a valid relocation section? */
+               if (info >= hdr->e_shnum)
+                       continue;
+
+               /* Don't bother with non-allocated sections */
+               if (!(sechdrs[info].sh_flags & SHF_ALLOC))
+                       continue;
+
+               if (sechdrs[i].sh_type == SHT_REL)
+                       err =
+                               apply_relocations(sechdrs, strtab, symindex, i, 
&mod);
+               else if (sechdrs[i].sh_type == SHT_RELA)
+                       err = apply_relocate_add(sechdrs, strtab, symindex, i,
+                                                &mod);
+               if (err < 0) {
+                       printk(KERN_WARNING
+                              "vpe_elfload: error in relocations err %ld\n",
+                              err);
+                       goto cleanup;
+               }
+       }
+
+       /* make sure it's physically written out */
+       flush_icache_range((unsigned long)v->load_addr,
+                          (unsigned long)v->load_addr + v->len);
+
+       if ((find_vpe_symbols(v, sechdrs, symindex, strtab, &mod)) < 0) {
+
+               printk(KERN_WARNING
+                      "VPE: program doesn't contain __start or vpe_shared 
symbols\n");
+               err = -ENOEXEC;
+       }
+
+       printk(" elf loaded\n");
+
+cleanup:
+       return (err);
+}
+
+static void dump_vpe(vpe_t * v)
+{
+       struct tc *t;
+
+       printk(KERN_DEBUG "VPEControl 0x%lx\n", read_vpe_c0_vpecontrol());
+       printk(KERN_DEBUG "VPEConf0 0x%lx\n", read_vpe_c0_vpeconf0());
+
+       list_for_each_entry(t, &vpecontrol.tc_list, list) {
+               dump_tc(t);
+       }
+}
+
+/* checks for VPE is unused and gets ready to load program      */
+static int vpe_open(struct inode *inode, struct file *filp)
+{
+       int minor;
+       vpe_t *v;
+
+       /* assume only 1 device at the mo. */
+       if ((minor = MINOR(inode->i_rdev)) != 1) {
+               printk(KERN_WARNING "VPE: only vpe1 is supported\n");
+               return (-ENODEV);
+       }
+
+       if ((v = get_vpe(minor)) == NULL) {
+               printk(KERN_WARNING "VPE: unable to get vpe\n");
+               return (-ENODEV);
+       }
+
+       if (v->state != VPE_STATE_UNUSED) {
+               unsigned long tmp;
+               struct tc *t;
+               
+               printk(KERN_WARNING "VPE: device %d already in use\n", minor);
+
+               dvpe();
+               dump_vpe(v);
+               
+               printk(KERN_WARNING "VPE: re-initialising %d\n", minor);
+
+               release_progmem(v->load_addr);
+
+               t = get_tc(minor);
+               settc(minor);
+               tmp = read_tc_c0_tcstatus();
+
+               /* mark not allocated and not dynamically allocatable */
+               tmp &= ~(TCSTATUS_A | TCSTATUS_DA);
+               tmp |= TCSTATUS_IXMT;   /* interrupt exempt */
+               write_tc_c0_tcstatus(tmp);
+               
+               write_tc_c0_tchalt(TCHALT_H);
+                       
+       }
+       
+       // allocate it so when we get write ops we know it's expected.
+       v->state = VPE_STATE_INUSE;
+
+       /* this of-course trashes what was there before... */
+       v->pbuffer = vmalloc(P_SIZE);
+       v->plen = P_SIZE;
+       v->load_addr = NULL;
+       v->len = 0;
+
+       return (0);
+}
+
+static int vpe_release(struct inode *inode, struct file *filp)
+{
+       int minor, ret = 0;
+       vpe_t *v;
+       Elf_Ehdr *hdr;
+
+       minor = MINOR(inode->i_rdev);
+       if ((v = get_vpe(minor)) == NULL)
+               return (-ENODEV);
+
+       // simple case of fire and forget, so tell the VPE to run...
+
+       hdr = (Elf_Ehdr *) v->pbuffer;
+       if (memcmp(hdr->e_ident, ELFMAG, 4) == 0) {
+               if (vpe_elfload(v) >= 0)
+                       vpe_run(v);
+               else {
+                       printk(KERN_WARNING "VPE: ELF load failed.\n");
+                       ret = -ENOEXEC;
+               }
+       } else {
+               printk(KERN_WARNING "VPE: only elf files are supported\n");
+               ret = -ENOEXEC;
+       }
+
+       // cleanup any temp buffers
+       if (v->pbuffer)
+               vfree(v->pbuffer);
+       v->plen = 0;
+       return (ret);
+}
+
+static ssize_t vpe_write(struct file *file, const char __user * buffer,
+                        size_t count, loff_t * ppos)
+{
+       int minor;
+       size_t ret = count;
+       vpe_t *v;
+
+       minor = MINOR(file->f_dentry->d_inode->i_rdev);
+       if ((v = get_vpe(minor)) == NULL)
+               return (-ENODEV);
+
+       if (v->pbuffer == NULL) {
+               printk(KERN_ERR "vpe_write: no pbuffer\n");
+               return (-ENOMEM);
+       }
+
+       if ((count + v->len) > v->plen) {
+               printk(KERN_WARNING
+                      "VPE Loader: elf size too big. Perhaps strip uneeded 
symbols\n");
+               return (-ENOMEM);
+       }
+
+       count -= copy_from_user(v->pbuffer + v->len, buffer, count);
+       if (!count) {
+               printk("vpe_write: copy_to_user failed\n");
+               return (-EFAULT);
+       }
+
+       v->len += count;
+       return (ret);
+}
+
+static struct file_operations vpe_fops = {
+       .owner = THIS_MODULE,
+       .open = vpe_open,
+       .release = vpe_release,
+       .write = vpe_write
+};
+
+/* module wrapper entry points */
+/* give me a vpe */
+vpe_handle vpe_alloc(void)
+{
+       int i;
+       struct vpe *v;
+
+       /* find a vpe */
+       for (i = 1; i < MAX_VPES; i++) {
+               if ((v = get_vpe(i)) != NULL) {
+                       v->state = VPE_STATE_INUSE;
+                       return (v);
+               }
+       }
+       return (NULL);
+}
+
+EXPORT_SYMBOL(vpe_alloc);
+
+/* start running from here */
+int vpe_start(vpe_handle vpe, unsigned long start)
+{
+       struct vpe *v = vpe;
+
+       v->__start = start;
+       return (vpe_run(v));
+}
+
+EXPORT_SYMBOL(vpe_start);
+
+/* halt it for now */
+int vpe_stop(vpe_handle vpe)
+{
+       struct vpe *v = vpe;
+       struct tc *t;
+       unsigned int evpe_flags;
+
+       evpe_flags = dvpe();
+
+       if ((t = list_entry(v->tc.next, struct tc, tc)) != NULL) {
+
+               settc(t->index);
+               write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() & ~VPECONF0_VPA);
+       }
+
+       evpe(evpe_flags);
+
+       return (0);
+}
+
+EXPORT_SYMBOL(vpe_stop);
+
+/* I've done with it thank you */
+int vpe_free(vpe_handle vpe)
+{
+       struct vpe *v = vpe;
+       struct tc *t;
+       unsigned int evpe_flags;
+
+       if ((t = list_entry(v->tc.next, struct tc, tc)) == NULL) {
+               return (-ENOEXEC);
+       }
+
+       evpe_flags = dvpe();
+
+       /* Put MVPE's into 'configuration state' */
+       write_c0_mvpcontrol(read_c0_mvpcontrol() | MVPCONTROL_VPC);
+
+       settc(t->index);
+       write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() & ~VPECONF0_VPA);
+
+       /* mark the TC unallocated and halt'ed */
+       write_tc_c0_tcstatus(read_tc_c0_tcstatus() & ~TCSTATUS_A);
+       write_tc_c0_tchalt(TCHALT_H);
+
+       v->state = VPE_STATE_UNUSED;
+
+       write_c0_mvpcontrol(read_c0_mvpcontrol() & ~MVPCONTROL_VPC);
+       evpe(evpe_flags);
+
+       return (0);
+}
+
+EXPORT_SYMBOL(vpe_free);
+
+void *vpe_get_shared(int index)
+{
+       struct vpe *v;
+
+       if ((v = get_vpe(index)) == NULL) {
+               printk(KERN_WARNING "vpe: invalid vpe index %d\n", index);
+               return (NULL);
+       }
+
+       return (v->shared_ptr);
+}
+
+EXPORT_SYMBOL(vpe_get_shared);
+
+static int vpe_module_init(void)
+{
+       struct vpe *v = NULL;
+       struct tc *t;
+       unsigned long val;
+       int i;
+
+       if (!cpu_has_mipsmt)
+               return (-ENODEV);
+
+       if ((major = register_chrdev(VPE_MAJOR, module_name, &vpe_fops) < 0))
+               return (-EBUSY);
+
+       if (major == 0)
+               major = VPE_MAJOR;
+
+       dmt();
+       dvpe();
+
+       /* Put MVPE's into 'configuration state' */
+       write_c0_mvpcontrol(read_c0_mvpcontrol() | MVPCONTROL_VPC);
+
+       /* dump_mtregs(); */
+
+       INIT_LIST_HEAD(&vpecontrol.vpe_list);
+       INIT_LIST_HEAD(&vpecontrol.tc_list);
+
+       val = read_c0_mvpconf0();
+       for (i = 0; i < ((val & MVPCONF0_PTC) + 1); i++) {
+               t = alloc_tc(i);
+
+               /* VPE's */
+               if (i < ((val & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT) + 1) {
+                       settc(i);
+
+                       if ((v = alloc_vpe(i)) == NULL) {
+                               printk(KERN_WARNING "VPE: unable to allocate 
VPE\n");
+                               return (-ENODEV);
+                       }
+
+                       list_add(&t->tc, &v->tc);       /* add the tc to the 
list of this vpe's tc's. */
+
+                       /* deactivate all but vpe0 */
+                       if (i != 0) {
+                               unsigned long tmp = read_vpe_c0_vpeconf0();
+
+                               tmp &= ~VPECONF0_VPA;
+
+                               /* master VPE */
+                               tmp |= VPECONF0_MVP;
+                               write_vpe_c0_vpeconf0(tmp);
+                       }
+
+                       /* disable multi-threading with TC's */
+                       write_vpe_c0_vpecontrol(read_vpe_c0_vpecontrol() & 
~VPECONTROL_TE);
+
+                       if (i != 0) {
+                               write_vpe_c0_status((read_c0_status() &
+                                                    ~(ST0_IM | ST0_IE | 
ST0_KSU))
+                                                   | ST0_CU0);
+
+                               /* set config to be the same as vpe0, 
particularly kseg0 coherency alg */
+                               write_vpe_c0_config(read_c0_config());
+                       }
+
+               }
+
+               /* TC's */
+               t->pvpe = v;    /* set the parent vpe */
+
+               if (i != 0) {
+                       unsigned long tmp;
+
+                       /* tc 0 will of course be running.... */
+                       if (i == 0)
+                               t->state = TC_STATE_RUNNING;
+
+                       settc(i);
+
+                       /* bind a TC to each VPE, May as well put all excess 
TC's
+                          on the last VPE */
+                       if (i >= (((val & MVPCONF0_PVPE) >> 
MVPCONF0_PVPE_SHIFT) + 1))
+                               write_tc_c0_tcbind(read_tc_c0_tcbind() |
+                                                  ((val & MVPCONF0_PVPE) >> 
MVPCONF0_PVPE_SHIFT));
+                       else
+                               write_tc_c0_tcbind(read_tc_c0_tcbind() | i);
+
+                       tmp = read_tc_c0_tcstatus();
+
+                       /* mark not allocated and not dynamically allocatable */
+                       tmp &= ~(TCSTATUS_A | TCSTATUS_DA);
+                       tmp |= TCSTATUS_IXMT;   /* interrupt exempt */
+                       write_tc_c0_tcstatus(tmp);
+
+                       write_tc_c0_tchalt(TCHALT_H);
+               }
+       }
+
+       /* release config state */
+       write_c0_mvpcontrol(read_c0_mvpcontrol() & ~MVPCONTROL_VPC);
+
+       return (0);
+}
+
+static void vpe_module_exit(void)
+{
+       struct vpe *v, *n;
+
+       list_for_each_entry_safe(v, n, &vpecontrol.vpe_list, list) {
+               if (v->state != VPE_STATE_UNUSED) {
+                       release_vpe(v);
+               }
+       }
+
+       unregister_chrdev(major, module_name);
+}
+
+module_init(vpe_module_init);
+module_exit(vpe_module_exit);
+MODULE_DESCRIPTION("MIPS VPE");
+MODULE_AUTHOR("Elizabeth Clarke, MIPS Technologies, Inc");
+MODULE_LICENSE("GPL");
diff -urN malta/linux/arch/mips/kernel/Makefile 
malta/linux/arch/mips/kernel/Makefile
--- malta/linux/arch/mips/kernel/Makefile       2004/09/14 16:27:52     
1.80.1000.2
+++ malta/linux/arch/mips/kernel/Makefile       2005/06/10 09:44:59     
1.80.1000.3
@@ -35,6 +35,9 @@
 
 obj-$(CONFIG_SMP)              += smp.o
 
+obj-$(CONFIG_MIPS_VPE_LOADER)  += vpe.o
+obj-$(CONFIG_MIPS_VPE_APSP_API)        += rtlx.o
+
 obj-$(CONFIG_I8259)            += i8259.o
 obj-$(CONFIG_IRQ_CPU)          += irq_cpu.o
 obj-$(CONFIG_IRQ_CPU_RM7K)     += irq-rm7000.o
diff -urN malta/linux/arch/mips/kernel/cpu-probe.c 
malta/linux/arch/mips/kernel/cpu-probe.c
--- malta/linux/arch/mips/kernel/cpu-probe.c    2005/01/05 18:18:38     
1.35.1000.4
+++ malta/linux/arch/mips/kernel/cpu-probe.c    2005/06/10 09:44:59     
1.35.1000.5
@@ -76,11 +76,25 @@
 #endif
 }
 
+static int __initdata nowait = 0;
+
+int __init wait_disable(char *s)
+{
+       nowait = 1;
+       return 1;
+}
+
+__setup("nowait", wait_disable);
+
 static inline void check_wait(void)
 {
        struct cpuinfo_mips *c = &current_cpu_data;
 
        printk("Checking for 'wait' instruction... ");
+       if (nowait) {
+               printk (" disabled.\n");
+               return;
+       }
        switch (c->cputype) {
        case CPU_R3081:
        case CPU_R3081E:
@@ -108,6 +122,7 @@
 /*     case CPU_20KC:*/
        case CPU_24K:
        case CPU_25KF:
+       case CPU_34K:
                cpu_wait = r4k_wait;
                printk(" available.\n");
                break;
@@ -438,6 +453,10 @@
                /* Vectored Interrupts */
                c->options |= MIPS_CPU_VI;
        }
+       if (config3 & (1<<2)) {
+               /* MIPS MT */
+               c->options |= MIPS_CPU_MIPSMT;
+       }
 }
 
 static inline void decode_config2(struct cpuinfo_mips *c)
@@ -514,6 +533,10 @@
                /* Probe for L2 cache */
                c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
                break;
+       case PRID_IMP_34K:
+               c->cputype = CPU_34K;
+               c->isa_level = MIPS_CPU_ISA_M32;
+               break;
        }
 }
 
diff -urN malta/linux/arch/mips/kernel/entry.S 
malta/linux/arch/mips/kernel/entry.S
--- malta/linux/arch/mips/kernel/entry.S        2004/09/14 16:27:52     
1.60.1000.2
+++ malta/linux/arch/mips/kernel/entry.S        2005/06/10 09:44:59     
1.60.1000.3
@@ -153,3 +153,17 @@
 #endif
        j       ret_from_irq
        END(spurious_interrupt)
+
+       
+#if defined(CONFIG_CPU_MIPS32R2) || defined(CONFIG_MIPS_MT)
+/*
+ * MIPS32R2 Instruction Hazard Barrier - must be called
+ */
+
+LEAF(mips_ihb)
+       .set    mips32
+       jr.hb   ra
+       nop
+       END(mips_ihb)
+
+#endif /* CONFIG_CPU_MIPS32R2 */
diff -urN malta/linux/arch/mips/kernel/proc.c 
malta/linux/arch/mips/kernel/proc.c
--- malta/linux/arch/mips/kernel/proc.c 2004/03/24 10:37:26     1.53
+++ malta/linux/arch/mips/kernel/proc.c 2005/06/10 09:44:59     1.53.1000.1
@@ -68,6 +68,7 @@
        [CPU_20KC]      "MIPS 20Kc",
        [CPU_24K]       "MIPS 24K",
        [CPU_25KF]      "MIPS 25Kf",
+       [CPU_34K]       "MIPS 34K",
        [CPU_VR4111]    "NEC VR4111",
        [CPU_VR4121]    "NEC VR4121",
        [CPU_VR4122]    "NEC VR4122",
diff -urN malta/linux/include/asm-mips/mipsmtregs.h 
malta/linux/include/asm-mips/mipsmtregs.h
--- malta/linux/include/asm-mips/Attic/mipsmtregs.h     1970/01/01 00:00:00
+++ malta/linux/include/asm-mips/Attic/mipsmtregs.h     2005-06-10 
10:45:00.229894000 +0100     1.1.2.1
@@ -0,0 +1,360 @@
+/*
+ * MT regs definitions, follows on from mipsregs.h
+ * Copyright (C) 2004 - 2005 MIPS Technologies, Inc.  All rights reserved.
+ * Elizabeth Clarke et. al.
+ *
+ */
+#ifndef _ASM_MIPSMTREGS_H
+#define _ASM_MIPSMTREGS_H
+
+#include <asm/war.h>
+
+#ifndef __ASSEMBLY__
+
+/*
+ * C macros
+ */
+
+#define read_c0_mvpcontrol()        __read_32bit_c0_register($0, 1)
+#define write_c0_mvpcontrol(val)    __write_32bit_c0_register($0, 1, val)
+
+#define read_c0_mvpconf0()          __read_32bit_c0_register($0, 2)
+#define read_c0_mvpconf1()          __read_32bit_c0_register($0, 3)
+
+#define read_c0_vpecontrol()        __read_32bit_c0_register($1, 1)
+#define write_c0_vpecontrol(val)    __write_32bit_c0_register($1, 1, val)
+
+#define read_c0_vpeconf0()          __read_32bit_c0_register($1, 2)
+#define write_c0_vpeconf0(val)      __write_32bit_c0_register($1, 2, val)
+
+#define read_c0_tcstatus()          __read_32bit_c0_register($2, 1)
+#define write_c0_tcstatus(val)      __write_32bit_c0_register($2, 1, val)
+
+#define read_c0_tcbind()            __read_32bit_c0_register($2, 2)
+
+#define read_c0_tccontext()         __read_32bit_c0_register($2, 5)
+#define write_c0_tccontext(val)     __write_32bit_c0_register($2, 5, val)
+
+#else /* Assembly */
+/*
+ * Macros for use in assembly language code
+ */
+
+#define CP0_MVPCONTROL  $0,1
+#define CP0_MVPCONF0    $0,2
+#define CP0_MVPCONF1    $0,3
+#define CP0_VPECONTROL  $1,1
+#define CP0_VPECONF0    $1,2
+#define CP0_VPECONF1    $1,3
+#define CP0_YQMASK      $1,4
+#define CP0_VPESCHEDULE $1,5
+#define CP0_VPESCHEFBK  $1,6
+#define CP0_TCSTATUS    $2,1
+#define CP0_TCBIND      $2,2
+#define CP0_TCRESTART   $2,3
+#define CP0_TCHALT      $2,4
+#define CP0_TCCONTEXT   $2,5
+#define CP0_TCSCHEDULE  $2,6
+#define CP0_TCSCHEFBK   $2,7
+#define CP0_SRSCONF0    $6,1
+#define CP0_SRSCONF1    $6,2
+#define CP0_SRSCONF2    $6,3
+#define CP0_SRSCONF3    $6,4
+#define CP0_SRSCONF4    $6,5
+
+#endif
+
+/* MVPControl fields */
+#define MVPCONTROL_EVP          (_ULCAST_(1))
+
+#define MVPCONTROL_VPC_SHIFT    1
+#define MVPCONTROL_VPC          (_ULCAST_(1) << MVPCONTROL_VPC_SHIFT)
+
+#define MVPCONTROL_STLB_SHIFT   2
+#define MVPCONTROL_STLB         (_ULCAST_(1) << MVPCONTROL_STLB_SHIFT)
+
+
+/* MVPConf0 fields */
+#define MVPCONF0_PTC_SHIFT      0
+#define MVPCONF0_PTC            ( _ULCAST_(0xff))
+#define MVPCONF0_PVPE_SHIFT     10
+#define MVPCONF0_PVPE           ( _ULCAST_(0xf) << MVPCONF0_PVPE_SHIFT)
+#define MVPCONF0_TCA_SHIFT      15
+#define MVPCONF0_TCA            ( _ULCAST_(1) << MVPCONF0_TCA_SHIFT)
+#define MVPCONF0_PTLBE_SHIFT    16
+#define MVPCONF0_PTLBE          (_ULCAST_(0x3ff) << MVPCONF0_PTLBE_SHIFT)
+#define MVPCONF0_TLBS_SHIFT     29
+#define MVPCONF0_TLBS           (_ULCAST_(1) << MVPCONF0_TLBS_SHIFT)
+#define MVPCONF0_M_SHIFT        31
+#define MVPCONF0_M              (_ULCAST_(0x1) << MVPCONF0_M_SHIFT)
+
+
+/* config3 fields */
+#define CONFIG3_MT_SHIFT        2
+#define CONFIG3_MT              (_ULCAST_(1) << CONFIG3_MT_SHIFT)
+
+
+/* VPEControl fields (per VPE) */
+#define VPECONTROL_TARGTC       (_ULCAST_(0xff))
+
+#define VPECONTROL_TE_SHIFT     15
+#define VPECONTROL_TE           (_ULCAST_(1) << VPECONTROL_TE_SHIFT)
+#define VPECONTROL_EXCPT_SHIFT      16
+#define VPECONTROL_EXCPT        (_ULCAST_(0x7) << VPECONTROL_EXCPT_SHIFT)
+
+/* Thread Exception Codes for EXCPT field */
+#define THREX_TU    0
+#define THREX_TO    1
+#define THREX_IYQ   2
+#define THREX_GSX   3
+#define THREX_YSCH  4
+#define THREX_GSSCH 5
+
+#define VPECONTROL_GSI_SHIFT    20
+#define VPECONTROL_GSI          (_ULCAST_(1) << VPECONTROL_GSI_SHIFT)
+#define VPECONTROL_YSI_SHIFT        21
+#define VPECONTROL_YSI          (_ULCAST_(1) << VPECONTROL_YSI_SHIFT)
+
+/* VPEConf0 fields (per VPE) */
+#define VPECONF0_VPA_SHIFT      0
+#define VPECONF0_VPA            (_ULCAST_(1) << VPECONF0_VPA_SHIFT)
+#define VPECONF0_MVP_SHIFT      1
+#define VPECONF0_MVP            (_ULCAST_(1) << VPECONF0_MVP_SHIFT)
+#define VPECONF0_XTC_SHIFT      21
+#define VPECONF0_XTC            (_ULCAST_(0xff) << VPECONF0_XTC_SHIFT)
+
+/* TCStatus fields (per TC) */
+#define TCSTATUS_TASID          (_ULCAST_(0xff))
+#define TCSTATUS_IXMT_SHIFT     10
+#define TCSTATUS_IXMT           (_ULCAST_(1) << TCSTATUS_IXMT_SHIFT)
+#define TCSTATUS_TKSU_SHIFT     11
+#define TCSTATUS_TKSU           (_ULCAST_(3) << TCSTATUS_TKSU_SHIFT)
+#define TCSTATUS_A_SHIFT        13
+#define TCSTATUS_A              (_ULCAST_(1) << TCSTATUS_A_SHIFT)
+#define TCSTATUS_DA_SHIFT       15
+#define TCSTATUS_DA             (_ULCAST_(1) << TCSTATUS_DA_SHIFT)
+#define TCSTATUS_DT_SHIFT       20
+#define TCSTATUS_DT             (_ULCAST_(1) << TCSTATUS_DT_SHIFT)
+#define TCSTATUS_TDS_SHIFT      21
+#define TCSTATUS_TDS            (_ULCAST_(1) << TCSTATUS_TDS_SHIFT)
+#define TCSTATUS_TSST_SHIFT     22
+#define TCSTATUS_TSST           (_ULCAST_(1) << TCSTATUS_TSST_SHIFT)
+#define TCSTATUS_RNST_SHIFT     23
+#define TCSTATUS_RNST           (_ULCAST_(3) << TCSTATUS_RNST_SHIFT)
+/* Codes for RNST */
+#define TC_RUNNING  0
+#define TC_WAITING  1
+#define TC_YIELDING 2
+#define TC_GATED    3
+
+#define TCSTATUS_TMX_SHIFT      27
+#define TCSTATUS_TMX            (_ULCAST_(1) << TCSTATUS_TMX_SHIFT)
+/* TCStatus TCU bits can use same definitions/offsets as CU bits in Status */
+
+/* TCBind */
+#define TCBIND_CURVPE_SHIFT     0
+#define TCBIND_CURVPE           (_ULCAST_(0xf))
+
+#define TCBIND_CURTC_SHIFT      21
+
+#define TCBIND_CURTC            (_ULCAST_(0xff) << TCBIND_CURTC_SHIFT)
+
+/* TCHalt */
+#define TCHALT_H                (_ULCAST_(1))
+
+#ifndef __ASSEMBLY__
+
+extern asmlinkage void noinline mips_ihb(void);
+
+extern void mips_mt_regdump(void);
+
+static inline unsigned int dvpe(void)
+{
+  int res = 0;
+    
+  __asm__ __volatile__(
+                      ".set noreorder\n\t"
+                      ".set mips32r2\n\t"
+                      "dvpe\t%0\n\t"
+                      "ehb\n\t"
+                      ".set mips0\n\t"
+                      ".set reorder"
+                      : "=r" (res));
+
+  mips_ihb();
+
+  return(res);
+}
+
+static inline void __raw_evpe(void)
+{
+  __asm__ __volatile__(
+                      ".set noreorder\n\t"
+                      ".set mips32r2\n\t"
+                      "evpe\n\t"
+                      "ehb\n\t"
+                      ".set mips0\n\t"
+                      ".set reorder"
+                      );
+}
+
+/* enable multiVPE if previous suggested it should be.
+   EVPE_ENABLE to force */
+
+#define EVPE_ENABLE MVPCONTROL_EVP
+static inline void evpe(int previous)
+{
+  if ((previous & MVPCONTROL_EVP))
+    __raw_evpe();
+}
+
+static inline unsigned int dmt(void)
+{
+  int res = 0;
+
+  __asm__ __volatile__(
+                      ".set noreorder\n\t"
+                      ".set mips32r2\n\t"
+                      "dmt\t%0\n\t"
+                      "ehb\n\t"
+                      ".set mips0\n\t"
+                      ".set reorder"
+                      : "=r" (res));
+
+  mips_ihb();
+
+  return(res);
+}
+
+static inline void __raw_emt(void)
+{
+  __asm__ __volatile__(
+                      ".set noreorder\n\t"
+                      ".set mips32r2\n\t"
+                      "emt\n\t"
+                      "ehb\n\t"
+                      ".set mips0\n\t"
+                      ".set reorder"
+                      );
+}
+
+/* enable multiVPE if previous suggested it should be.
+   EVPE_ENABLE to force */
+
+#define EMT_ENABLE VPECONTROL_TE
+
+static inline void emt(int previous)
+{
+  if ((previous & EMT_ENABLE))
+    __raw_emt();
+}
+
+static inline void ehb(void)
+{
+  __asm__ __volatile__(
+                      "ehb\n\t"
+                      );
+}
+
+// rt rd swapped in the documentation?
+// idioms appear to be plausible.
+#define mftc0(rt,sel)                                          \
+  ({ unsigned long  __res;                                     \
+    __asm__ __volatile__(                                      \
+                        ".set noat\n\t"                        \
+                        "mftc0\t%0," #rt ", " #sel "\n\t"      \
+                        ".set at\n\t"                          \
+                        : "=r" (__res));                       \
+    __res;                                                     \
+  })
+
+#define mftgpr(rt)
+({ unsigned long __res;                             \
+  __asm__ __volatile__(                           \
+                      ".set noat\n\t"                             \
+                      "mftgpr\t%0," #rt "\n\t"                    \
+                      ".set at\n\t"                               \
+                      : "=r" (__res));                            \
+  __res;                                      \
+ })
+
+#define mftr(rt,u,sel)
+  ({ unsigned long __res;                             \
+    __asm__ __volatile__(                           \
+                        ".set noat\n\t"                             \
+                        "mftr\t%0, " #rt ", " #u ", " #sel "\n\t"   \
+                        ".set at\n\t"                               \
+                        : "=r" (__res));                            \
+    __res;                                      \
+  })
+
+#define mttgpr(rd,v)                                   \
+  ({                                                   \
+    __asm__ __volatile__(                              \
+                        "mttgpr\t %0," #rd "\n\t"      \
+                        : : "r" (v));
+  })
+
+#define mttc0(rd,sel,v)                                                \
+  ({                                                           \
+    __asm__ __volatile__(                                      \
+                        "mttc0\t %0," #rd ", " #sel "\n\t"     \
+                        : : "r" (v));
+  })
+
+
+#define mttr(rd,u,sel,v)                                               \
+  ({                                                                   \
+    __asm__ __volatile__(                                              \
+                        "mttr\t %0," #rd ", " #u ", " #sel "\n\t"      \
+                        : : "r" (v));
+  })
+
+
+#define settc(tc)                                                      \
+  write_c0_vpecontrol( (read_c0_vpecontrol() & ~(VPECONTROL_TARGTC)) | (tc)); \
+  ehb()
+
+
+/* you *must* set the target tc (settc) before trying to use these */ 
+#define read_vpe_c0_vpecontrol()        mftc0($1, 1)
+#define write_vpe_c0_vpecontrol(val)    mttc0($1, 1, val)
+#define read_vpe_c0_vpeconf0()          mftc0($1, 2)
+#define write_vpe_c0_vpeconf0(val)      mttc0($1, 2, val)
+#define read_vpe_c0_status()            mftc0($12, 0)
+#define write_vpe_c0_status(val)        mttc0($12, 0, val)
+#define read_vpe_c0_cause()             mftc0($13, 0)
+#define write_vpe_c0_cause(val)         mttc0($13, 0, val)
+#define read_vpe_c0_config()            mftc0($16, 0)
+#define write_vpe_c0_config(val)        mttc0($16, 0, val)
+#define read_vpe_c0_config1()           mftc0($16, 1)
+#define write_vpe_c0_config1(val)       mttc0($16, 1, val)
+#define read_vpe_c0_config7()           mftc0($16, 7)
+#define write_vpe_c0_config7(val)       mttc0($16, 7, val)
+#define read_vpe_c0_ebase()             mftc0($15,1)
+#define write_vpe_c0_ebase(val)         mttc0($15, 1, val)
+#define write_vpe_c0_compare(val)       mttc0($11, 0, val)
+
+
+/* TC */
+#define read_tc_c0_tcstatus()       mftc0($2, 1)
+#define write_tc_c0_tcstatus(val)   mttc0($2,1,val)
+#define read_tc_c0_tcbind()         mftc0($2, 2)
+#define write_tc_c0_tcbind(val)     mttc0($2,2,val)
+#define read_tc_c0_tcrestart()      mftc0($2, 3)
+#define write_tc_c0_tcrestart(val)  mttc0($2,3,val)
+#define read_tc_c0_tchalt()         mftc0($2, 4)
+#define write_tc_c0_tchalt(val)     mttc0($2,4,val)
+#define read_tc_c0_tccontext()      mftc0($2, 5)
+#define write_tc_c0_tccontext(val)  mttc0($2,5,val)
+
+/* GPR */
+#define read_tc_gpr_sp()            mftgpr($29)
+#define write_tc_gpr_sp(val)        mttgpr($29, val)
+#define read_tc_gpr_gp()            mftgpr($28)
+#define write_tc_gpr_gp(val)        mttgpr($28, val)
+
+
+#endif /* Not __ASSEMBLY__ */
+
+#endif
diff -urN malta/linux/include/asm-mips/rtlx.h 
malta/linux/include/asm-mips/rtlx.h
--- malta/linux/include/asm-mips/Attic/rtlx.h   1970/01/01 00:00:00
+++ malta/linux/include/asm-mips/Attic/rtlx.h   2005-06-10 10:45:00.243835000 
+0100     1.1.2.1
@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 2004, 2005 MIPS Technologies, Inc.  All rights reserved.
+ *
+ */
+
+#ifndef _RTLX_H
+#define _RTLX_H_
+
+#define LX_NODE_BASE 10
+
+#define MIPSCPU_INT_BASE       16
+#define MIPS_CPU_RTLX_IRQ 0
+
+#define RTLX_VERSION 1
+#define RTLX_xID 0x12345600
+#define RTLX_ID (RTLX_xID | RTLX_VERSION)
+#define RTLX_CHANNELS 8
+
+enum rtlx_state {
+       RTLX_STATE_UNUSED = 0,
+       RTLX_STATE_INITIALISED,
+       RTLX_STATE_REMOTE_READY,
+       RTLX_STATE_OPENED
+};
+
+#define RTLX_BUFFER_SIZE 1024
+/* each channel supports read and write.
+   linux (vpe0) reads lx_buffer  and writes rt_buffer
+   SP (vpe1) reads rt_buffer and writes lx_buffer
+*/
+typedef struct rtlx_channel {
+       enum rtlx_state rt_state;
+       enum rtlx_state lx_state;
+
+       int buffer_size;
+
+       /* read and write indexes per buffer */
+       int rt_write, rt_read;
+       char *rt_buffer;
+
+       int lx_write, lx_read;
+       char *lx_buffer;
+
+       void *queues;
+
+} rtlx_channel_t;
+
+typedef struct rtlx_info {
+       unsigned long id;
+       enum rtlx_state state;
+
+       struct rtlx_channel channel[RTLX_CHANNELS];
+
+} rtlx_info_t;
+
+#endif
diff -urN malta/linux/include/asm-mips/cpu-features.h 
malta/linux/include/asm-mips/cpu-features.h
--- malta/linux/include/asm-mips/cpu-features.h 2004/09/14 16:29:26     
1.4.1000.2
+++ malta/linux/include/asm-mips/cpu-features.h 2005/06/10 09:45:00     
1.4.1000.3
@@ -73,6 +73,9 @@
 #ifndef cpu_has_ic_fills_f_dc
 #define cpu_has_ic_fills_f_dc  (cpu_data[0].dcache.flags & MIPS_CACHE_IC_F_DC)
 #endif
+#ifndef cpu_has_mipsmt
+# define cpu_has_mipsmt                (cpu_data[0].options & MIPS_CPU_MIPSMT)
+#endif
 
 #ifdef CONFIG_MIPS32
 # ifndef cpu_has_nofpuex
diff -urN malta/linux/include/asm-mips/cpu.h malta/linux/include/asm-mips/cpu.h
--- malta/linux/include/asm-mips/cpu.h  2004/07/08 17:57:45     1.52.1000.1
+++ malta/linux/include/asm-mips/cpu.h  2005/06/10 09:45:00     1.52.1000.2
@@ -71,6 +71,7 @@
 #define PRID_IMP_4KEMPR2       0x9100
 #define PRID_IMP_4KSD          0x9200
 #define PRID_IMP_24K           0x9300
+#define PRID_IMP_34K           0x9500
 
 #define PRID_IMP_UNKNOWN       0xff00
 
@@ -177,7 +178,8 @@
 #define CPU_VR4133             56
 #define CPU_AU1550             57
 #define CPU_24K                        58
-#define CPU_LAST               58
+#define CPU_34K                        59
+#define CPU_LAST               59
 
 /*
  * ISA Level encodings
@@ -220,5 +222,6 @@
 #define MIPS_CPU_PREFETCH      0x00040000 /* CPU has usable prefetch */
 #define MIPS_CPU_VI            0x00080000 /* CPU supports MIPSR2 vectored 
interrupts */
 #define MIPS_CPU_EI            0x00100000 /* CPU supports MIPSR2 external 
interrupt controller mode */
+#define MIPS_CPU_MIPSMT                0x00400000 /* CPU supports MIPS MT */
 
 #endif /* _ASM_CPU_H */
diff -urN malta/linux/include/asm-mips/hazards.h 
malta/linux/include/asm-mips/hazards.h
--- malta/linux/include/asm-mips/hazards.h      2005/01/18 18:02:41     
1.3.1000.3
+++ malta/linux/include/asm-mips/hazards.h      2005/06/10 09:45:00     
1.3.1000.4
@@ -223,6 +223,16 @@
                )
 
 #endif
+
+#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT)
+/*
+ * MIPS32 Release 2 defines Instruction Hazard Barrier,
+ * which is a form of jump. So it needs to be invoked
+ * as a subroutine.
+ */
+extern asmlinkage void mips_ihb(void);
+
+#endif /* CONFIG_CPU_MIPSR2 */
 #endif /* __ASSEMBLY__ */
 
 #endif /* _ASM_HAZARDS_H */
diff -urN malta/linux/include/asm-mips/mipsregs.h 
malta/linux/include/asm-mips/mipsregs.h
--- malta/linux/include/asm-mips/mipsregs.h     2004/09/14 16:29:26     
1.62.1000.2
+++ malta/linux/include/asm-mips/mipsregs.h     2005/06/10 09:45:00     
1.62.1000.3
@@ -37,6 +37,8 @@
 #define _ULCAST_ (unsigned long)
 #endif
 
+#include <asm/mipsmtregs.h>
+
 /*
  * Coprocessor 0 register names
  */

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