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[PATCH 03/17] MIPS: mm: uasm: Fix lh micro-assembler instruction

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Subject: [PATCH 03/17] MIPS: mm: uasm: Fix lh micro-assembler instruction
From: Markos Chandras <markos.chandras@imgtec.com>
Date: Mon, 23 Jun 2014 10:38:46 +0100
Cc: Markos Chandras <markos.chandras@imgtec.com>
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Commit d6b3314b49e12e8c349deb4ca28e7028db00728f
"MIPS: uasm: Add lh uam instruction"

added the 'lh' micro-assembler instruction but it used the 'lw' opcode
for it. Fix it by using the correct 'lh' opcode.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
---
 arch/mips/mm/uasm-mips.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/mm/uasm-mips.c b/arch/mips/mm/uasm-mips.c
index 4535a9d19ea5..6708a2dbf934 100644
--- a/arch/mips/mm/uasm-mips.c
+++ b/arch/mips/mm/uasm-mips.c
@@ -89,7 +89,7 @@ static struct insn insn_table[] = {
        { insn_lb, M(lb_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
        { insn_ld,  M(ld_op, 0, 0, 0, 0, 0),  RS | RT | SIMM },
        { insn_ldx, M(spec3_op, 0, 0, 0, ldx_op, lx_op), RS | RT | RD },
-       { insn_lh,  M(lw_op, 0, 0, 0, 0, 0),  RS | RT | SIMM },
+       { insn_lh,  M(lh_op, 0, 0, 0, 0, 0),  RS | RT | SIMM },
        { insn_lld,  M(lld_op, 0, 0, 0, 0, 0),  RS | RT | SIMM },
        { insn_ll,  M(ll_op, 0, 0, 0, 0, 0),  RS | RT | SIMM },
        { insn_lui,  M(lui_op, 0, 0, 0, 0, 0),  RT | SIMM },
-- 
2.0.0


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