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[PATCH 44/58] MIPS: asm: cpu: Add cpu flag for Enhanced Virtual Addressi

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Subject: [PATCH 44/58] MIPS: asm: cpu: Add cpu flag for Enhanced Virtual Addressing
From: Markos Chandras <markos.chandras@imgtec.com>
Date: Mon, 27 Jan 2014 20:19:31 +0000
Cc: Markos Chandras <markos.chandras@imgtec.com>
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The MIPS *Aptiv family uses bit 28 in Config5 CP0 register to
indicate whether the core supports EVA or not.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
---
 arch/mips/include/asm/cpu-features.h | 4 +++-
 arch/mips/include/asm/cpu.h          | 1 +
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/mips/include/asm/cpu-features.h 
b/arch/mips/include/asm/cpu-features.h
index 9052fb9..6b95c8e 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -26,7 +26,9 @@
 #ifndef cpu_has_segments
 #define cpu_has_segments       (cpu_data[0].options & MIPS_CPU_SEGMENTS)
 #endif
-
+#ifndef cpu_has_eva
+#define cpu_has_eva            (cpu_data[0].options & MIPS_CPU_EVA)
+#endif
 
 /*
  * For the moment we don't consider R6000 and R8000 so we can assume that
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 76411df..1474750 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -358,6 +358,7 @@ enum cpu_type_enum {
 #define MIPS_CPU_MICROMIPS     0x01000000 /* CPU has microMIPS capability */
 #define MIPS_CPU_TLBINV                0x02000000 /* CPU supports TLBINV/F */
 #define MIPS_CPU_SEGMENTS      0x04000000 /* CPU supports Segmentation Control 
registers */
+#define MIPS_CPU_EVA           0x80000000 /* CPU supports Enhanced Virtual 
Addressing */
 
 /*
  * CPU ASE encodings
-- 
1.8.5.3



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