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Re: [PATCH 1/2] MIPS: KVM: use common EHINV aware UNIQUE_ENTRYHI

To: James Hogan <james.hogan@imgtec.com>, John Crispin <john@phrozen.org>, Ralf Baechle <ralf@linux-mips.org>, <linux-mips@linux-mips.org>
Subject: Re: [PATCH 1/2] MIPS: KVM: use common EHINV aware UNIQUE_ENTRYHI
From: Markos Chandras <Markos.Chandras@imgtec.com>
Date: Wed, 15 Jan 2014 10:16:14 +0000
Cc: Gleb Natapov <gleb@redhat.com>, Paolo Bonzini <pbonzini@redhat.com>, <kvm@vger.kernel.org>, Sanjay Lal <sanjayl@kymasys.com>
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On 01/15/2014 10:11 AM, James Hogan wrote:
When KVM is enabled and TLB invalidation is supported,
kvm_mips_flush_host_tlb() can cause a machine check exception due to
multiple matching TLB entries. This can occur on shutdown even when KVM
hasn't been actively used.

Commit adb78de9eae8 (MIPS: mm: Move UNIQUE_ENTRYHI macro to a header
file) created a common UNIQUE_ENTRYHI in asm/tlb.h but it didn't update
the copy of UNIQUE_ENTRYHI in kvm_tlb.c to use it.

Commit 36b175451399 (MIPS: tlb: Set the EHINV bit for TLBINVF cores when
invalidating the TLB) later added TLB invalidation (EHINV) support to
the common UNIQUE_ENTRYHI.

Therefore make kvm_tlb.c use the EHINV aware UNIQUE_ENTRYHI
implementation in asm/tlb.h too.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: Gleb Natapov <gleb@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Sanjay Lal <sanjayl@kymasys.com>
---
This is based on John Crispin's mips-next-3.14 branch.

I do not object to it being squashed into commit adb78de9eae8 (MIPS: mm:
Move UNIQUE_ENTRYHI macro to a header file) since that commit hasn't
reached mainline yet.
---
  arch/mips/kvm/kvm_tlb.c | 4 +---
  1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/mips/kvm/kvm_tlb.c b/arch/mips/kvm/kvm_tlb.c
index c777dd36d4a8..52083ea7fddd 100644
--- a/arch/mips/kvm/kvm_tlb.c
+++ b/arch/mips/kvm/kvm_tlb.c
@@ -25,6 +25,7 @@
  #include <asm/mmu_context.h>
  #include <asm/pgtable.h>
  #include <asm/cacheflush.h>
+#include <asm/tlb.h>

  #undef CONFIG_MIPS_MT
  #include <asm/r4kcache.h>
@@ -35,9 +36,6 @@

  #define PRIx64 "llx"

-/* Use VZ EntryHi.EHINV to invalidate TLB entries */
-#define UNIQUE_ENTRYHI(idx) (CKSEG0 + ((idx) << (PAGE_SHIFT + 1)))
-
  atomic_t kvm_mips_instance;
  EXPORT_SYMBOL(kvm_mips_instance);



Thanks. That looks good to me.

Reviewed-by: Markos Chandras <markos.chandras@imgtec.com>

--
markos


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